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if not self.imm_width:
return True
elif x not in range(- (2 ** (self.imm_width-1) + 1), 2 ** (self.imm_width-1)):
''' Note: 2 ** (self.imm_width-1) + 1 is not tight, it is actually up to - 2** imm_width-1.
However: this allows us to invert immediates where necessary for signed ops without incurring
problems in edge cases.
'''
return True
return False
def is_oversized_int(self, x) -> bool:
if type(x) != int:
return False
if x not in range(- (2 ** (self.imm_width-1) + 1), 2 ** (self.imm_width-1)):
return True
return False
def is_safe_imm(self, x) -> bool:
if 'immediate' in x.keys():
return not self.is_oversized_imm(x)
return False
def __init__(self, opcode, operands):
''' Class initializer, has a lot of convenience methods to allow simpler inheriting classes
'''
self.opcode = opcode
self.operands = operands
self.required_temp_regs = []
# Get our registers and types (these are recurring patterns)
self.specific_regs = safe_pullregs(operands)
self.operand_types = pulltypes(operands)
# used for checking which virtualized registers to write
self.written_regs = self.specific_regs[:self.num_reg_writes]
self.riscv_instructions = []
self.immediate_value = None
self.needs_synthesis = []
self.set_offset_reg = None
self.offset = 0
if not operands: # safeguard against nops, rets and other stuff like that
return
# See if this can be made cleaner
for operand in operands:
offset = operand.get('offset')
if self.is_oversized_imm(operand): # mark oversized immediates for synthesis
self.needs_synthesis.append(operand['immediate'])
self.required_temp_regs.append(OP2_OVERSIZE)
elif offset: # offset registers may be offset by an oversized amount
if self.is_oversized_int(offset): # mark oversized offsets for synthesis
self.needs_synthesis.append(offset)
self.required_temp_regs.append(OP2_OVERSIZE)
self.set_offset_reg = (
len(self.specific_regs), self.specific_regs.index(operand['register']))
self.specific_regs.append(OP2_OVERSIZE)
elif type(offset) == int: # not oversized
self.offset = offset
elif isreg(offset): # offset *by* a register
self.set_offset_reg = (
len(self.specific_regs), self.specific_regs.index(operand['register']))
self.specific_regs.append(offset['register'])
self.required_temp_regs.append(OP2_OVERSIZE)
self.iflag = 'i' if any(self.is_safe_imm(o) for o in operands) else ''
self.fp_wflag = get_fl_flag(operands[0])
self.wflag = is_half_width(operands[0])
def get_args(self) -> List:
"""Get the arguments for the emit, with shift, immediate, and immediate temps interleaved
Returns:
List: List of arguments in format ready for output
"""
rs = []
reg_ct = 0
for op, optype in zip(self.operands, self.operand_types):
if optype == 'register':
rs.append(self.specific_regs[reg_ct])
reg_ct += 1
elif optype == 'label':
rs.append(op['label'])
elif optype == 'immediate':
if self.is_oversized_imm(op):
rs.append(self.required_temp_regs[0])
else:
rs.append(op['immediate'])
return rs
def emit_riscv(self):
for immediate, reg in zip(self.needs_synthesis, self.required_temp_regs):
self.riscv_instructions.append(
f'li {reg}, {immediate} # synthesis of oversized immediate'
)
if self.set_offset_reg:
x, y = self.set_offset_reg
x = self.specific_regs[x]
y = self.specific_regs[y]