code
stringlengths
35
6.69k
score
float64
6.5
11.5
module Add_full_521 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1042 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1041 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.237599
module Add_full_522 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1044 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1043 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.831414
module Add_full_523 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1046 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1045 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.383173
module Add_full_524 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1048 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1047 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.737158
module Add_full_525 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1050 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1049 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.434029
module Add_full_526 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1052 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1051 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.320271
module Add_full_527 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1054 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1053 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.379339
module Add_full_528 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1056 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1055 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.524795
module Add_full_529 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1058 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1057 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.312847
module Add_full_530 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1060 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1059 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.238866
module Add_full_531 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1062 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1061 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.015621
module Add_full_532 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1064 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1063 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.599992
module Add_full_533 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1066 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1065 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.141661
module Add_full_534 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1068 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1067 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
6.98049
module Add_full_535 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1070 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1069 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.372155
module Add_full_536 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1072 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1071 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.131155
module Add_full_537 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1074 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1073 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.267153
module Add_full_538 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1076 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1075 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.219195
module Add_full_539 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1078 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1077 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
6.920927
module Add_full_540 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1080 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1079 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.611109
module Add_full_541 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1082 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1081 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.24861
module Add_full_542 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1084 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1083 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.145762
module Add_full_543 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1086 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1085 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
6.714215
module Add_full_544 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1088 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1087 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.30797
module Add_full_545 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1090 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1089 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.914675
module Add_full_546 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1092 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1091 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.620423
module Add_full_547 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1094 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1093 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.393973
module Add_full_548 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1096 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1095 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.717103
module Add_full_549 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1098 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1097 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.510284
module Add_full_550 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1100 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1099 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.159898
module Add_full_551 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1102 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1101 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.412471
module Add_full_552 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1104 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1103 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.559879
module Add_full_553 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1106 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1105 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.546344
module Add_full_554 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1108 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1107 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.825794
module Add_full_557 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1114 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1113 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.408465
module Add_full_558 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1116 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1115 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.320355
module Add_full_561 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1122 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1121 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.592178
module Add_full_562 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1124 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1123 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.109061
module Add_full_565 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1130 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1129 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.715429
module Add_full_566 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1132 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1131 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.432491
module Add_full_569 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1138 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1137 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.16235
module Add_full_570 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1140 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1139 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.580069
module Add_full_573 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1146 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1145 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.074398
module Add_full_574 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1148 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1147 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.059775
module Add_full_577 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1154 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1153 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.715611
module Add_full_578 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1156 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1155 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.929496
module Add_full_581 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1162 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1161 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.607956
module Add_full_582 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1164 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1163 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.951753
module Add_full_585 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1170 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1169 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.55168
module Add_full_586 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1172 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1171 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.845865
module Add_full_589 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1178 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1177 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.310468
module Add_full_590 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1180 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1179 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.605126
module Add_full_593 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1186 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1185 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.231445
module Add_full_594 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1188 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1187 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.646153
module Add_full_597 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1194 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1193 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.556355
module Add_full_598 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1196 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1195 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.668094
module Add_full_601 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1202 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1201 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.550151
module Add_full_602 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1204 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1203 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.686436
module Add_full_605 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1210 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1209 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.128044
module Add_full_606 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1212 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1211 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.886838
module Add_full_609 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1218 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1217 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.319059
module Add_full_610 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1220 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1219 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.398854
module Add_full_611 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1222 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1221 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.681931
module Add_full_612 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1224 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1223 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.885044
module Add_full_613 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1226 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1225 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.540455
module Add_full_614 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1228 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1227 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.091756
module Add_full_615 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1230 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1229 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.464894
module Add_full_616 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1232 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1231 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.592811
module Add_full_617 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1234 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1233 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.964235
module Add_full_618 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1236 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1235 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.27409
module Add_full_619 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1238 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1237 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.350756
module Add_full_620 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1240 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1239 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.694513
module Add_full_621 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1242 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1241 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.311728
module Add_full_622 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1244 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1243 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.625452
module Add_full_623 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1246 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1245 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.343269
module Add_full_624 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1248 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1247 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.013298
module Add_full_625 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1250 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1249 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.33788
module Add_full_626 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1252 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1251 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.714692
module Add_full_627 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1254 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1253 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.519174
module Add_full_628 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1256 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1255 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.586716
module Add_full_629 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1258 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1257 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.36705
module Add_full_630 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1260 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1259 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.239076
module Add_full_631 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1262 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1261 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.162231
module Add_full_632 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1264 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1263 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.807062
module Add_full_633 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1266 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1265 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.586345
module Add_full_634 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1268 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1267 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.401162
module Add_full_635 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1270 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1269 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.088664
module Add_full_636 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1272 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1271 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.5117
module Add_full_637 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1274 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1273 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.741936
module Add_full_638 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1276 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1275 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.5893
module Add_full_639 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1278 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1277 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.706488
module Add_full_640 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1280 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1279 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.355149
module bit16_5 ( a16, b16, sum16, c_out16, c_in16 ); input [15:0] a16; input [15:0] b16; output [15:0] sum16; input c_in16; output c_out16; wire c1; bit8_10 A161 ( .sum8(sum16[7:0]), .c_out8(c1), .a8(a16[7:0]), .b8(b16[7:0]), .c_in8(c_in16) ); bit8_9 A162 ( .sum8(sum16[15:8]), .c_out8(c_out16), .a8(a16[15:8]), .b8(b16[15:8]), .c_in8(c1) ); endmodule
6.777289
module Add_full_641 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1282 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1281 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.851422
module Add_full_642 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1284 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1283 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.620529
module Add_full_643 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1286 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1285 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.671323
module Add_full_644 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1288 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1287 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.204458
module Add_full_645 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1290 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1289 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.194469
module Add_full_646 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1292 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1291 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.899465
module Add_full_647 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1294 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1293 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.711179