code
stringlengths
35
6.69k
score
float64
6.5
11.5
module Add_full_397 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_794 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_793 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.876146
module Add_full_398 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_796 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_795 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.808543
module Add_full_399 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_798 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_797 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.916359
module Add_full_400 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_800 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_799 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.974732
module Add_full_401 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_802 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_801 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.711673
module Add_full_402 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_804 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_803 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.926832
module Add_full_403 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_806 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_805 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.740883
module Add_full_404 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_808 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_807 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.972777
module Add_full_405 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_810 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_809 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.534285
module Add_full_406 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_812 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_811 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.561248
module Add_full_407 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_814 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_813 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.925617
module Add_full_408 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_816 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_815 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.376033
module Add_full_409 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_818 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_817 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.745737
module Add_full_410 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_820 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_819 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.013738
module Add_full_411 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_822 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_821 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.781701
module Add_full_412 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3, n1; Add_half_824 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_823 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); CND2IX1 U1 ( .B(w3), .A(n1), .Z(c_out) ); CIVX2 U2 ( .A(w2), .Z(n1) ); endmodule
6.547245
module Add_full_413 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_826 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_825 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.882631
module Add_full_414 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_828 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_827 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.392147
module Add_full_415 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_830 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_829 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.974221
module Add_full_416 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_832 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_831 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.234388
module Add_full_417 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_834 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_833 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.453836
module Add_full_418 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_836 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_835 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.797036
module Add_full_421 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_842 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_841 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.642873
module Add_full_422 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_844 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_843 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.27345
module Add_full_425 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_850 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_849 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.731296
module Add_full_426 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_852 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_851 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.669788
module Add_full_429 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_858 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_857 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.785687
module Add_full_430 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_860 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_859 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.471042
module Add_full_433 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_866 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_865 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.825826
module Add_full_434 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_868 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_867 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.202625
module Add_full_437 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_874 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_873 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.081991
module Add_full_438 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_876 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_875 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.004456
module Add_full_441 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_882 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_881 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.51209
module Add_full_442 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_884 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_883 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.544018
module Add_full_445 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_890 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_889 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.07252
module Add_full_446 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_892 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_891 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.948057
module Add_full_449 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_898 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_897 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.902657
module Add_full_450 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_900 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_899 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.628934
module Add_full_453 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_906 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_905 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.595523
module Add_full_454 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_908 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_907 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.075249
module Add_full_457 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_914 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_913 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.879796
module Add_full_458 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_916 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_915 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.855297
module Add_full_459 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_918 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_917 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.815573
module Add_full_460 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_920 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_919 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.011006
module Add_full_461 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_922 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_921 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.853513
module Add_full_462 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_924 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_923 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.946353
module Add_full_463 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_926 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_925 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.858545
module Add_full_464 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_928 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_927 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.340085
module Add_full_465 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_930 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_929 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.086903
module Add_full_466 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_932 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_931 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.733731
module Add_full_469 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_938 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_937 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.639535
module Add_full_470 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_940 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_939 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.768741
module Add_full_473 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_946 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_945 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.962281
module Add_full_474 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_948 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_947 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.119579
module Add_full_475 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_950 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_949 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.851366
module Add_full_476 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_952 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_951 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.230308
module Add_full_477 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_954 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_953 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.229235
module Add_full_478 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_956 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_955 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.890923
module Add_full_479 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_958 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_957 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.864009
module Add_full_480 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_960 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_959 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.586833
module Add_full_481 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_962 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_961 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.459845
module Add_full_482 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_964 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_963 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.37428
module Add_full_483 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_966 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_965 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.349229
module Add_full_484 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_968 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_967 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.173641
module Add_full_485 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_970 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_969 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.582256
module Add_full_486 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_972 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_971 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.541002
module Add_full_487 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_974 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_973 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.581399
module Add_full_488 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_976 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_975 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.684972
module Add_full_489 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_978 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_977 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.806956
module Add_full_490 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_980 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_979 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.724287
module Add_full_491 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_982 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_981 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.540351
module Add_full_492 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_984 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_983 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.763798
module Add_full_493 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_986 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_985 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.198424
module Add_full_494 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_988 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_987 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.002297
module Add_full_495 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_990 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_989 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.662132
module Add_full_496 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_992 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_991 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.724538
module Add_full_497 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_994 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_993 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.872452
module Add_full_498 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_996 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_995 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.901077
module Add_full_499 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_998 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_997 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.769674
module Add_full_500 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1000 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_999 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.600886
module Add_full_501 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1002 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1001 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.620577
module Add_full_502 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1004 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1003 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.859116
module Add_full_503 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1006 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1005 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.839348
module Add_full_504 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1008 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1007 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.908316
module Add_full_505 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1010 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1009 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.407661
module Add_full_506 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1012 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1011 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.640228
module Add_full_507 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1014 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1013 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.553852
module Add_full_508 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1016 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1015 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.542177
module Add_full_509 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1018 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1017 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.476068
module Add_full_510 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1020 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1019 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.446356
module Add_full_511 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1022 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1021 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.290459
module Add_full_512 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1024 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1023 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.782101
module Add_full_513 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1026 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1025 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.346945
module Add_full_514 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1028 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1027 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.731688
module Add_full_515 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1030 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1029 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.683882
module Add_full_516 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1032 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1031 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.577076
module Add_full_517 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1034 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1033 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.365481
module Add_full_518 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1036 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1035 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.174669
module Add_full_519 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1038 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1037 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.434014
module Add_full_520 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_1040 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_1039 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.202109