code
stringlengths
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6.5
11.5
module Add_full_216 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3, n1; Add_half_432 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_431 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); CND2IX1 U1 ( .B(w3), .A(n1), .Z(c_out) ); CIVX2 U2 ( .A(w2), .Z(n1) ); endmodule
7.906717
module Add_full_217 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_434 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_433 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.702991
module Add_full_218 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_436 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_435 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.219772
module Add_full_219 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_438 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_437 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.717316
module Add_full_220 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_440 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_439 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.10292
module Add_full_221 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_442 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_441 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.168547
module Add_full_222 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_444 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_443 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.194117
module Add_full_223 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_446 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_445 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.239466
module Add_full_224 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_448 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_447 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.719787
module Add_full_225 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_450 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_449 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.528847
module Add_full_226 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_452 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_451 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.596502
module Add_full_227 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_454 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_453 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.660422
module Add_full_228 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_456 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_455 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.422271
module Add_full_229 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_458 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_457 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.383655
module Add_full_230 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_460 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_459 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.169962
module Add_full_231 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_462 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_461 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.122734
module Add_full_232 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_464 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_463 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.149546
module Add_full_233 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_466 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_465 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.305632
module Add_full_234 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_468 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_467 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.729195
module Add_full_235 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_470 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_469 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.32725
module Add_full_236 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_472 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_471 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.401595
module Add_full_237 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_474 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_473 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.472382
module Add_full_238 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_476 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_475 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.399505
module Add_full_239 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_478 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_477 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.50439
module Add_full_240 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_480 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_479 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.30206
module Add_full_241 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_482 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_481 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.981655
module Add_full_242 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_484 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_483 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.745712
module Add_full_243 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_486 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_485 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.946553
module Add_full_244 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_488 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_487 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.802129
module Add_full_245 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_490 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_489 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.80642
module Add_full_246 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_492 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_491 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.602096
module Add_full_247 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_494 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_493 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.918448
module Add_full_248 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_496 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_495 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.058176
module Add_full_249 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_498 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_497 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.440479
module Add_full_250 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_500 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_499 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.377879
module Add_full_251 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_502 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_501 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.355414
module Add_full_252 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_504 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_503 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.549191
module Add_full_253 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_506 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_505 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.449095
module Add_full_254 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_508 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_507 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.622175
module Add_full_255 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_510 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_509 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.223695
module Add_full_256 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_512 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_511 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.751011
module bit16_2 ( a16, b16, sum16, c_out16, c_in16 ); input [15:0] a16; input [15:0] b16; output [15:0] sum16; input c_in16; output c_out16; wire c1; bit8_4 A161 ( .sum8(sum16[7:0]), .c_out8(c1), .a8(a16[7:0]), .b8(b16[7:0]), .c_in8(c_in16) ); bit8_3 A162 ( .sum8(sum16[15:8]), .c_out8(c_out16), .a8(a16[15:8]), .b8(b16[15:8]), .c_in8(c1) ); endmodule
6.899748
module Add_full_257 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_514 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_513 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.615927
module Add_full_258 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_516 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_515 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.417286
module Add_full_261 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_522 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_521 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.376839
module Add_full_262 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_524 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_523 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.531545
module Add_full_265 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_530 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_529 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.456015
module Add_full_266 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_532 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_531 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.405115
module Add_full_269 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_538 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_537 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.066409
module Add_full_270 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_540 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_539 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.673388
module Add_full_273 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_546 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_545 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.658689
module Add_full_274 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_548 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_547 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.826404
module Add_full_277 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_554 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_553 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.503589
module Add_full_278 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_556 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_555 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.33814
module Add_full_281 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_562 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_561 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.50174
module Add_full_282 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_564 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_563 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.713098
module Add_full_285 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_570 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_569 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.317802
module Add_full_286 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_572 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_571 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.542466
module Add_full_289 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_578 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_577 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.415751
module Add_full_290 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_580 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_579 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.580022
module Add_full_292 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_584 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_583 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.566279
module Add_full_293 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_586 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_585 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.254225
module Add_full_294 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_588 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_587 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.620287
module Add_full_295 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_590 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_589 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.170692
module Add_full_296 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_592 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_591 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.282952
module Add_full_297 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_594 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_593 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.297565
module Add_full_298 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_596 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_595 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.512573
module Add_full_301 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_602 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_601 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.563632
module Add_full_302 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_604 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_603 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.933154
module Add_full_303 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_606 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_605 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.499394
module Add_full_305 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_610 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_609 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.590068
module Add_full_306 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_612 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_611 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.567102
module Add_full_309 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_618 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_617 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.200233
module Add_full_310 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_620 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_619 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2XL U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.602813
module Add_full_312 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_624 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_623 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.90691
module Add_full_317 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_634 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_633 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
8.065829
module Add_full_318 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_636 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_635 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.800189
module Add_full_321 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_642 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_641 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.8188
module Add_full_322 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_644 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_643 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.000387
module Add_full_325 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_650 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_649 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.715944
module Add_full_326 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_652 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_651 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.802779
module Add_full_337 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_674 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_673 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.909118
module Add_full_338 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_676 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_675 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.765223
module Add_full_341 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_682 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_681 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.937424
module Add_full_342 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_684 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_683 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.255902
module Add_full_345 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_690 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_689 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.515475
module Add_full_346 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_692 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_691 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.702277
module Add_full_349 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_698 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_697 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.571147
module Add_full_350 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_700 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_699 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.811914
module Add_full_372 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3, n1, n2; Add_half_744 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_743 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); CIVX2 U1 ( .A(w3), .Z(n2) ); CIVX2 U2 ( .A(w2), .Z(n1) ); CND2X2 U3 ( .A(n2), .B(n1), .Z(c_out) ); endmodule
6.757842
module Add_full_385 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_770 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_769 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.475341
module Add_full_386 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_772 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_771 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.972974
module Add_full_389 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_778 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_777 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.342422
module Add_full_390 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_780 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_779 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w2), .B(w3), .Z(c_out) ); endmodule
7.646516
module Add_full_391 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_782 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_781 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.793569
module Add_full_392 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_784 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_783 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.126614
module Add_full_393 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_786 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_785 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.556658
module Add_full_394 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_788 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_787 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.99421
module Add_full_395 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_790 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_789 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
7.680958
module Add_full_396 ( sum, c_out, a, b, c_in ); input a, b, c_in; output sum, c_out; wire w1, w2, w3; Add_half_792 M1 ( .sum(w1), .c_out(w2), .a(a), .b(b) ); Add_half_791 M2 ( .sum(sum), .c_out(w3), .a(w1), .b(c_in) ); COR2X1 U1 ( .A(w3), .B(w2), .Z(c_out) ); endmodule
8.074269