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module C8T28SOI_LR_CNBFX8_P4 ( Z, A ); output Z; input A; buf U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX14_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX14_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX14_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX14_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX18_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX18_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX18_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX18_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX22_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX22_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX22_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX22_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX27_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX27_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX27_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX27_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX2_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX2_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX2_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX2_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX32_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX32_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX32_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX32_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX37_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX37_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX37_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX37_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX4_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX4_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX4_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX4_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX74_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX74_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX74_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX74_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX9_P0 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX9_P10 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX9_P16 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNIVX9_P4 ( Z, A ); output Z; input A; not U1 (Z, A); `ifdef functional `else specify specparam tDELAY = 0.0; (A - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X15_P0 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X15_P10 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X15_P16 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X15_P4 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X27_P0 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X27_P10 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X27_P16 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X27_P4 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X9_P0 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X9_P10 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X9_P16 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNMUX21X9_P4 ( Z, D0, D1, S0 ); output Z; input D0; input D1; input S0; C28SOI_SC_8_CLK_LR_U_MUX2 U1 ( Z, D0, D1, S0 ); `ifdef functional `else specify specparam tDELAY = 0.0; if (!D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (D1 && !S0) (D0 + => Z) = (tDELAY, tDELAY); if (!D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && S0) (D1 + => Z) = (tDELAY, tDELAY); if (D0 && !D1) (S0 - => Z) = (tDELAY, tDELAY); if (!D0 && D1) (S0 + => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X15_P0 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X15_P10 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X15_P16 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X15_P4 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X27_P0 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X27_P10 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X27_P16 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X27_P4 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X8_P0 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X8_P10 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X8_P16 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2X8_P4 ( Z, A, B ); output Z; input A; input B; and U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A - => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX15_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX15_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX15_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX15_P4 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX27_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX27_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX27_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX27_P4 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX9_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX9_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX9_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNAND2AX9_P4 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); or U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (B) (A + => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X15_P0 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X15_P10 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X15_P16 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X15_P4 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X27_P0 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X27_P10 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X27_P16 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X27_P4 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X8_P0 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X8_P10 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X8_P16 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2X8_P4 ( Z, A, B ); output Z; input A; input B; or U1 (INTERNAL1, A, B); not U2 (Z, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A - => Z) = (tDELAY, tDELAY); if (!A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX15_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX15_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX15_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX15_P4 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX27_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX27_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX27_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX27_P4 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX9_P0 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX9_P10 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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module C8T28SOI_LR_CNNOR2AX9_P16 ( Z, A, B ); output Z; input A; input B; not U1 (INTERNAL1, B); and U2 (Z, A, INTERNAL1); `ifdef functional `else specify specparam tDELAY = 0.0; if (!B) (A + => Z) = (tDELAY, tDELAY); if (A) (B - => Z) = (tDELAY, tDELAY); endspecify `endif endmodule
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