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stringlengths 1
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stringlengths 6
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/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#include "Spi.h"
#include "Eep_ConfigTypes.h"
#define SPI_EB_MAX_LENGTH 64u
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/s32k148_evbq176/config/Eep_Cfg.h
|
C
|
unknown
| 4,185
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* Microchip 25LC160B (32 bytes pages)
*/
#include "../../../include/Eep.h"
#include "Spi.h"
#include "debug.h"
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_CHIP E2_M9525
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define Spi_SEQ_CMD SpiConf_SpiSequence_SEQ_CMD
#define Spi_SEQ_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define Spi_SEQ_READ SpiConf_SpiSequence_SEQ_READ
#define Spi_SEQ_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define Spi_CH_ADDR SpiConf_SpiChannel_CH_ADDR
#define Spi_CH_CMD SpiConf_SpiChannel_CH_CMD
#define Spi_CH_DATA SpiConf_SpiChannel_CH_DATA
#define Spi_CH_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_SEQ_EEP_CMD Spi_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 Spi_SEQ_CMD2
#define SPI_SEQ_EEP_READ Spi_SEQ_READ
#define SPI_SEQ_EEP_WRITE Spi_SEQ_WRITE
#define SPI_CH_EEP_CMD Spi_CH_CMD
#define SPI_CH_EEP_ADDR Spi_CH_ADDR
#define SPI_CH_EEP_WREN Spi_CH_WREN
#define SPI_CH_EEP_DATA Spi_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
.EepFastReadBlockSize = 64,
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
// This parameter is the used size of EEPROM device in bytes.
#if (E2_CHIP == E2_25LC160B)
.EepSize = 0x800, /* 16Kb for 25LC160B */
#elif (E2_CHIP == E2_M9525)
.EepSize = 0x8000, /* 256Kb for M9525 */
#endif
#if (E2_CHIP == E2_25LC160B)
.EepPageSize = 32, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#elif (E2_CHIP == E2_M9525)
.EepPageSize = 64, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/s32k148_evbq176/config/Eep_Lcfg.c
|
C
|
unknown
| 4,351
|
# ARCH defines
ARCH=mpc5xxx
ARCH_FAM=ppc
# CFG (y/n) macros
CFG=PPC E200Z0 MPC55XX MPC560X MPC560XB SPC560B54 BRD_SPC560B54_SPC56XXMB
CFG+=MCU_ARC_CONFIG
CFG+=CREATE_SREC
CFG+=VLE
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC DIO DMA CAN GPT LIN MCU PORT PWM WDG FLS SPI
# Required modules
MOD_USE += MCU KERNEL
# Default cross compiler
COMPILER?=cw
# Default cross compiler
COMPILER_FLAVOR=s32_newlib
DEFAULT_CROSS_COMPILE = /c/devtools/Freescale/S32DS_Power_v2017.R1/Cross_Tools/powerpc-eabivle-4_9/bin/powerpc-eabivle-
DEFAULT_CW_COMPILE= /c/devtools/Freescale/cw_mpc5xxx_2.10
DEFAULT_DIAB_COMPILE = /c/devtools/WindRiver/diab/5.9.3.0/WIN32
DEFAULT_GHS_COMPILE = /c/devtools/ghs/comp_201314p
# Defines
def-y += SRAM_SIZE=0x10000
# Software floating point, PowerPC No Small-Data ELF EABI Object Format
DIAB_TARGET?=-tPPCE200Z0VFS:simple
GHS_TARGET?=ppc560xb
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/build_config.mk
|
Makefile
|
unknown
| 950
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Dma.h"
const Dma_MuxConfigType DmaMuxConfig [DMA_NUMBER_OF_CHANNELS] =
{
[DMA_START_CHANNEL] = {
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_0_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_0_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_1_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_1_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_2_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_2_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_3_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_3_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_4_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_4_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_5_TX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_DSPI_5_RX
},
{
.DMA_CHANNEL_ENABLE = 1, .DMA_CHANNEL_TRIG_ENABLE = 0, .DMA_CHANNEL_SOURCE = DMA_ADC0
}
};
const Dma_ChannelConfigType DmaChannelConfig [DMA_NUMBER_OF_CHANNELS] =
{
[DMA_START_CHANNEL] = {
.DMA_CHANNEL_PRIORITY = DMA_DSPI_A_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_A_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_B_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_B_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_C_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_C_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_D_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_D_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_E_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_E_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_F_COMMAND_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_DSPI_F_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
},
{
.DMA_CHANNEL_PRIORITY = DMA_ADC_GROUP0_RESULT_CHANNEL, .DMA_CHANNEL_PREEMTION_ENABLE = 1
}
};
const Dma_ConfigType DmaConfig []=
{
{
#if defined(CFG_DMA_MUX)
DmaMuxConfig,
#endif
.dmaChannelConfigPtr = DmaChannelConfig,
.dmaChannelArbitration = DMA_FIXED_PRIORITY_ARBITRATION
}
};
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Dma_Cfg.c
|
C
|
unknown
| 4,104
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef DMA_CFG_H_
#define DMA_CFG_H_
typedef enum
{
DMA_DSPI_A_COMMAND_CHANNEL, /* 0 */
DMA_DSPI_A_RESULT_CHANNEL,
DMA_DSPI_B_COMMAND_CHANNEL, /* 1 */
DMA_DSPI_B_RESULT_CHANNEL,
DMA_DSPI_C_COMMAND_CHANNEL, /* 2 */
DMA_DSPI_C_RESULT_CHANNEL,
DMA_DSPI_D_COMMAND_CHANNEL, /* 3 */
DMA_DSPI_D_RESULT_CHANNEL,
DMA_DSPI_E_COMMAND_CHANNEL, /* 4 */
DMA_DSPI_E_RESULT_CHANNEL,
DMA_DSPI_F_COMMAND_CHANNEL, /* 5 */
DMA_DSPI_F_RESULT_CHANNEL,
DMA_ADC_GROUP0_RESULT_CHANNEL,
DMA_NUMBER_OF_CHANNELS
} Dma_ChannelType;
#define DMA_START_CHANNEL DMA_DSPI_A_COMMAND_CHANNEL
#endif /* DMA_CFG_H_ */
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Dma_Cfg.h
|
C
|
unknown
| 1,414
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Eep_Cfg.h
|
C
|
unknown
| 4,156
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* Microchip 25LC160B (32 bytes pages)
*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_CHIP E2_25LC160B
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD SpiConf_SpiSequence_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define SPI_SEQ_EEP_READ SpiConf_SpiSequence_SEQ_READ
#define SPI_SEQ_EEP_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define SPI_CH_EEP_CMD SpiConf_SpiChannel_CH_CMD
#define SPI_CH_EEP_ADDR SpiConf_SpiChannel_CH_ADDR
#define SPI_CH_EEP_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_CH_EEP_DATA SpiConf_SpiChannel_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
.EepFastReadBlockSize = 64,
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
// This parameter is the used size of EEPROM device in bytes.
#if (E2_CHIP == E2_25LC160B)
.EepSize = 0x800, /* 16Kb for 25LC160B */
#elif (E2_CHIP == E2_M9525)
.EepSize = 0x8000, /* 256Kb for M9525 */
#endif
#if (E2_CHIP == E2_25LC160B)
.EepPageSize = 32, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#elif (E2_CHIP == E2_M9525)
.EepPageSize = 64, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Eep_Lcfg.c
|
C
|
unknown
| 4,051
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
#include "flash.h"
#include <stdlib.h>
#if defined(CFG_SPC560B54)
/*lint -e940 -e785 -e835 -e9027 -e845 -e651 To increase readability */
const FlashType flashInfo[2] = {
/* NO RWW */
/* Bank 0, Array 0 */
{
.sectCnt = 10,
.bankSize = 0xC0000,
.regBase = 0xC3F88000UL,
.sectAddr[0] = 0, /* 0, B0F0, LOW */
.addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) /* + 0 */,
.sectAddr[1] = 0x08000, /* 1, B0F1, LOW */
.addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1u,
.sectAddr[2] = 0x0c000, /* 2, B0F2, LOW */
.addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2u,
.sectAddr[3] = 0x10000, /* 3, B0F3, LOW */
.addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3u,
.sectAddr[4] = 0x18000, /* 4, B0F4, LOW */
.addrSpace[4] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 4u,
.sectAddr[5] = 0x20000, /* 5, B0F5, LOW */
.addrSpace[5] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 5u,
.sectAddr[6] = 0x40000, /* 6, B0F6, MID */
.addrSpace[6] = ADDR_SPACE_SET(ADDR_SPACE_MID) /* + 0 */,
.sectAddr[7] = 0x60000, /* 7, B0F7, MID */
.addrSpace[7] = ADDR_SPACE_SET(ADDR_SPACE_MID) + 1u,
/* Bank 0, Array 1 */
.sectAddr[8] = 0x80000, /* 8, B0F8, HIGH */
.addrSpace[8] = ADDR_SPACE_SET(ADDR_SPACE_HIGH) /* + 0 */,
.sectAddr[9] = 0xa0000, /* 9, B0F9, HIGH */
.addrSpace[9] = ADDR_SPACE_SET(ADDR_SPACE_HIGH) + 1u,
.sectAddr[10] = 0xc0000, /* End, NOT a sector */
},
{
/* Bank 1, Data */
.sectCnt = 4u,
.bankSize = 0x810000 - 0x800000,
.regBase = 0xC3F8C000UL,
.sectAddr[0] = 0x800000, /* LOW */
.addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) /* + 0 */,
.sectAddr[1] = 0x804000, /* LOW */
.addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,
.sectAddr[2] = 0x808000, /* LOW */
.addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,
.sectAddr[3] = 0x80c000, /* LOW */
.addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,
.sectAddr[4] = 0x810000, /* End, NOT a sector */
}
};
#else
#error CPU NOT supported
#endif
const Fls_ConfigType FlsConfigSet[]=
{
{
#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)
.FlsAcWrite = __FLS_ERASE_RAM__,
.FlsAcErase = __FLS_WRITE_RAM__,
#else
.FlsAcWrite = NULL,
.FlsAcErase = NULL,
#endif
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification = NULL,
.FlsInfo = flashInfo,
.FlsMaxReadFastMode = 16,
.FlsMaxReadNormalMode = 16,
.FlsMaxWriteFastMode = 32,
.FlsMaxWriteNormalMode = 32,
}
};
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Fls_Cfg.c
|
C
|
unknown
| 3,360
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @addtogroup Fls Flash Driver
* @{ */
/** @file Fls_Cfg.h
* Definitions of configuration parameters for Flash Driver.
*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
#define USE_FLS_INFO STD_ON
/* STD container : Fls
* FlsConfigSet 1..*
* FlsGeneral 1
* FlsPublishedInformation 1
*/
#include "MemIf_Types.h"
/* FlsGeneral, 3.0 OK */
#define FLS_VARIANT_PB STD_OFF
#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */
#define FLS_BASE_ADDRESS 0x00000000
#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_SET_MODE_API STD_OFF /* NO SUPPORT */
#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */
#define FLS_VERSION_INFO_API STD_ON
/* FlsPublishedInformation, 3.0 OK */
#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */
#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */
#define FLS_ERASE_TIME 0 /* NO SUPPORT */
#define FLS_ERASED_VALUE (uint8)0xff /* NO SUPPORT */
#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */
#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */
#define FLS_WRITE_TIME 0 /* NO SUPPORT */
/* MCU Specific */
#if defined(CFG_SPC560B54)
#define FLASH_BANK_CNT 2
#define FLASH_PAGE_SIZE 8
#define FLASH_MAX_SECTORS 10
#define FLS_TOTAL_SIZE ((16*4+768)*1024)
#else
#error CPU not supported
#endif
#if (USE_FLS_INFO==STD_ON)
typedef struct Flash {
uint32 size;
uint32 sectCnt;
uint32 bankSize;
uint32 regBase;
uint32 sectAddr[FLASH_MAX_SECTORS+1];
uint16 addrSpace[FLASH_MAX_SECTORS+1];
} FlashType;
#else
typedef struct {
Fls_LengthType FlsNumberOfSectors;
Fls_LengthType FlsPageSize;
Fls_LengthType FlsSectorSize;
Fls_AddressType FlsSectorStartaddress;
} Fls_SectorType;
#endif
struct Flash;
typedef struct {
void (*FlsAcErase)(void); /* NO SUPPORT */
void (*FlsAcWrite)(void); /* NO SUPPORT */
// FlsCallCycle N/A in core.
void (*FlsJobEndNotification)(void);
void (*FlsJobErrorNotification)(void);
uint32 FlsMaxReadFastMode;
uint32 FlsMaxReadNormalMode;
uint32 FlsMaxWriteFastMode;
uint32 FlsMaxWriteNormalMode;
uint32 FlsProtection; /* NO SUPPORT */
#if (USE_FLS_INFO==STD_ON)
const struct Flash *FlsInfo;
#else
const Fls_SectorType *FlsSectorList;
#endif
// const uint32 FlsSectorListSize; /* NO SUPPORT */
} Fls_ConfigSetType;
typedef Fls_ConfigSetType Fls_ConfigType;
extern const Fls_ConfigSetType FlsConfigSet[];
#endif /*FLS_CFG_H_*/
/** @} */
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Fls_Cfg.h
|
C
|
unknown
| 3,649
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef WDG_CFG_H_
#define WDG_CFG_H_
#include "Std_Types.h"
#include "WdgIf_Types.h"
#define WDG_INDEX 0u
#define WDG_VERSION_INFO_API STD_ON
#define WDG_DEV_ERROR_DETECT STD_ON
typedef struct
{
uint32 ReloadValue;
uint8 ActivationBit;
}Wdg_SettingsType;
typedef struct
{
WdgIf_ModeType Wdg_DefaultMode;
Wdg_SettingsType WdgSettingsFast;
Wdg_SettingsType WdgSettingsSlow;
Wdg_SettingsType WdgSettingsOff;
}Wdg_ModeConfigType;
typedef struct
{
const Wdg_ModeConfigType *Wdg_ModeConfig;
}Wdg_ConfigType;
extern const Wdg_ConfigType WdgConfig;
#endif /* WDG_CFG_H_ */
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Wdg_Cfg.h
|
C
|
unknown
| 1,409
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Wdg.h"
const Wdg_ModeConfigType WdgModeConfig =
{
.Wdg_DefaultMode = WDGIF_OFF_MODE,
.WdgSettingsFast =
{
.ReloadValue = 4u, /* ms */
.ActivationBit = 1u,
},
.WdgSettingsSlow =
{
.ReloadValue = 250, /* ms */
.ActivationBit = 1,
},
.WdgSettingsOff =
{
.ReloadValue = 0x7D00, /* not used */
.ActivationBit = 0,
},
};
const Wdg_ConfigType WdgConfig =
{
.Wdg_ModeConfig = &WdgModeConfig,
};
|
2301_81045437/classic-platform
|
boards/spc560b54_spc56xxmb/config/Wdg_Lcfg.c
|
C
|
unknown
| 1,278
|
# ARCH defines
ARCH=mpc5xxx
ARCH_FAM=ppc
# CFG (y/n) macros
CFG=PPC E200Z4D MPC55XX SPC56XL70 BRD_SPC56XL70_SPC56XL
CFG+=SPE_FPU_SCALAR_SINGLE
CFG+=MCU_ARC_CONFIG FCCU
CFG+=CREATE_SREC
CFG+=VLE
# What buildable modules does this board have,
# default or private
# Memory + Peripherals
MOD_AVAIL+=ADC DIO DMA CAN GPT LIN MCU PORT PWM WDG FLS SPI
# Required modules
MOD_USE += MCU KERNEL
# Defines
def-y += SRAM_SIZE=0x30000
def-y += L_BOOT_RESERVED_SPACE=0x10000
# Default cross compiler
COMPILER?=cw
# Default cross compiler
COMPILER_FLAVOR=s32_newlib
DEFAULT_CROSS_COMPILE = /c/devtools/Freescale/S32DS_Power_v2017.R1/Cross_Tools/powerpc-eabivle-4_9/bin/powerpc-eabivle-
DEFAULT_CW_COMPILE= /c/devtools/Freescale/cw_mpc5xxx_2.10
DEFAULT_DIAB_COMPILE = /c/devtools/WindRiver/diab/5.9.3.0/WIN32
vle=$(if $(filter $(CFG),VLE),y)
novle=$(if $(vle),n,y)
SPE_FPU_SCALAR_SINGLE=$(if $(filter $(CFG),SPE_FPU_SCALAR_SINGLE),y)
nospe=$(if $(SPE_FPU_SCALAR_SINGLE),n,y)
diab-$(vle)$(nospe)+=-tPPC5643LFS:simple # SW floating point, VLE
diab-$(novle)$(nospe)+=-tPPCE200Z4DNMS:simple # SW floating point, Book-E
diab-$(vle)$(SPE_FPU_SCALAR_SINGLE)+=-tPPC5643LFF:simple # Single HW, Double SW Floating Point
diab-$(novle)$(SPE_FPU_SCALAR_SINGLE)+=-tPPCE200Z4DNFF:simple # SW floating point, Book-E
diab-x+=$(diab-yy)
DIAB_TARGET?=$(strip $(diab-x))
# VLE
GHS_TARGET?=ppc563xm
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/build_config.mk
|
Makefile
|
unknown
| 1,436
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Eep_Cfg.h
|
C
|
unknown
| 4,156
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* Microchip 25LC160B (32 bytes pages)
*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_CHIP E2_25LC160B
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD SpiConf_SpiSequence_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define SPI_SEQ_EEP_READ SpiConf_SpiSequence_SEQ_READ
#define SPI_SEQ_EEP_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define SPI_CH_EEP_CMD SpiConf_SpiChannel_CH_CMD
#define SPI_CH_EEP_ADDR SpiConf_SpiChannel_CH_ADDR
#define SPI_CH_EEP_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_CH_EEP_DATA SpiConf_SpiChannel_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
.EepFastReadBlockSize = 64,
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
// This parameter is the used size of EEPROM device in bytes.
#if (E2_CHIP == E2_25LC160B)
.EepSize = 0x800, /* 16Kb for 25LC160B */
#elif (E2_CHIP == E2_M9525)
.EepSize = 0x8000, /* 256Kb for M9525 */
#endif
#if (E2_CHIP == E2_25LC160B)
.EepPageSize = 32, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#elif (E2_CHIP == E2_M9525)
.EepPageSize = 64, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Eep_Lcfg.c
|
C
|
unknown
| 4,073
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
#include "flash.h"
#include <stdlib.h>
#if defined(CFG_SPC56XL70)
#define FLASH_REGS_BASE 0xC3F88000UL
/* RWW between partitions*
*
* LOW 8*16KB + 2*64KB = 256KB
* MID 2*128KB = 256KB
* HIGH 6*256KB = 1536KB
*/
const FlashType flashInfo[] = {
[0].sectCnt = 18,
[0].bankSize = 0x200000,
[0].regBase = FLASH_REGS_BASE,
/* LOW */
[0].sectAddr[0] = 0,
[0].addrSpace[0] = ADDR_SPACE(0, ADDR_SPACE_LOW, 1 ),
[0].sectAddr[1] = 0x00004000,
[0].addrSpace[1] = ADDR_SPACE(1, ADDR_SPACE_LOW, 1 ),
[0].sectAddr[2] = 0x00008000,
[0].addrSpace[2] = ADDR_SPACE(2, ADDR_SPACE_LOW, 1 ),
[0].sectAddr[3] = 0x0000C000,
[0].addrSpace[3] = ADDR_SPACE(3, ADDR_SPACE_LOW, 1 ),
[0].sectAddr[4] = 0x00010000,
[0].addrSpace[4] = ADDR_SPACE(4, ADDR_SPACE_LOW, 2 ),
[0].sectAddr[5] = 0x00014000,
[0].addrSpace[5] = ADDR_SPACE(5, ADDR_SPACE_LOW, 2 ),
[0].sectAddr[6] = 0x00018000,
[0].addrSpace[6] = ADDR_SPACE(6, ADDR_SPACE_LOW, 2 ),
[0].sectAddr[7] = 0x0001C000,
[0].addrSpace[7] = ADDR_SPACE(7, ADDR_SPACE_LOW, 2 ),
[0].sectAddr[8] = 0x00020000,
[0].addrSpace[8] = ADDR_SPACE(8, ADDR_SPACE_LOW, 3 ),
[0].sectAddr[9] = 0x00030000,
[0].addrSpace[9] = ADDR_SPACE(9, ADDR_SPACE_LOW, 3 ),
/* MID */
[0].sectAddr[10] = 0x00040000,
[0].addrSpace[10] = ADDR_SPACE(0, ADDR_SPACE_MID, 4 ),
[0].sectAddr[11] = 0x00060000,
[0].addrSpace[11] = ADDR_SPACE(1, ADDR_SPACE_MID, 4 ),
/* HIGH */
[0].sectAddr[12] = 0x00080000,
[0].addrSpace[12] = ADDR_SPACE(0, ADDR_SPACE_HIGH, 5 ),
[0].sectAddr[13] = 0x000C0000,
[0].addrSpace[13] = ADDR_SPACE(1, ADDR_SPACE_HIGH, 5 ),
[0].sectAddr[14] = 0x00100000,
[0].addrSpace[14] = ADDR_SPACE(2, ADDR_SPACE_HIGH, 6 ),
[0].sectAddr[15] = 0x00140000,
[0].addrSpace[15] = ADDR_SPACE(3, ADDR_SPACE_HIGH, 6 ),
[0].sectAddr[16] = 0x00180000,
[0].addrSpace[16] = ADDR_SPACE(4, ADDR_SPACE_HIGH, 7 ),
[0].sectAddr[17] = 0x001C0000,
[0].addrSpace[17] = ADDR_SPACE(5, ADDR_SPACE_HIGH, 7 ),
[0].sectAddr[18] = 0x200000, /* End, NOT a sector */
};
#else
#error CPU NOT supported
#endif
const Fls_ConfigType FlsConfigSet[]=
{
{
#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)
.FlsAcWrite = __FLS_ERASE_RAM__,
.FlsAcErase = __FLS_WRITE_RAM__,
#else
.FlsAcWrite = NULL,
.FlsAcErase = NULL,
#endif
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification = NULL,
.FlsInfo = flashInfo,
.FlsMaxReadFastMode = 16,
.FlsMaxReadNormalMode = 16,
.FlsMaxWriteFastMode = 32,
.FlsMaxWriteNormalMode = 32,
// .FlsSectorList = &fls_evbSectorList[0],
// .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),
// .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,
}
};
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Fls_Cfg.c
|
C
|
unknown
| 3,847
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @addtogroup Fls Flash Driver
* @{ */
/** @file Fls_Cfg.h
* Definitions of configuration parameters for Flash Driver.
*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
#define USE_FLS_INFO STD_ON
/* STD container : Fls
* FlsConfigSet 1..*
* FlsGeneral 1
* FlsPublishedInformation 1
*/
#include "MemIf_Types.h"
/* FlsGeneral, 3.0 OK */
#define FLS_VARIANT_PB STD_OFF
#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */
#define FLS_BASE_ADDRESS 0x00000000
#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_SET_MODE_API STD_ON
//#define FLS_TOTAL_SIZE
#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */
#define FLS_VERSION_INFO_API STD_ON
/* FlsPublishedInformation, 3.0 OK */
#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */
#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */
#define FLS_ERASE_TIME 0 /* NO SUPPORT */
#define FLS_ERASED_VALUE (uint8)0xff /* NO SUPPORT */
#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */
#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */
#define FLS_WRITE_TIME 0 /* NO SUPPORT */
/* MCU Specific */
#if defined(CFG_SPC56XL70)
#define FLASH_BANK_CNT 1
#define FLASH_PAGE_SIZE 8
#define FLASH_MAX_SECTORS 18
#define FLS_TOTAL_SIZE ((8*16+2*64+2*128+6*256)*1024)
#else
#error CPU not supported
#endif
#include "Fls_ConfigTypes.h"
#endif /*FLS_CFG_H_*/
/** @} */
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Fls_Cfg.h
|
C
|
unknown
| 2,854
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef WDG_CFG_H_
#define WDG_CFG_H_
#include "Std_Types.h"
#include "WdgIf_Types.h"
#define WDG_INDEX 0
#define WDG_VERSION_INFO_API STD_ON
#define WDG_DEV_ERROR_DETECT STD_ON
typedef struct
{
uint32 ReloadValue;
uint8 ActivationBit;
}Wdg_SettingsType;
typedef struct
{
WdgIf_ModeType Wdg_DefaultMode;
Wdg_SettingsType WdgSettingsFast;
Wdg_SettingsType WdgSettingsSlow;
Wdg_SettingsType WdgSettingsOff;
}Wdg_ModeConfigType;
typedef struct
{
const Wdg_ModeConfigType *Wdg_ModeConfig;
}Wdg_ConfigType;
extern const Wdg_ConfigType WdgConfig;
#endif /* WDG_CFG_H_ */
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Wdg_Cfg.h
|
C
|
unknown
| 1,397
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Wdg.h"
const Wdg_ModeConfigType WdgModeConfig =
{
.Wdg_DefaultMode = WDGIF_OFF_MODE,
.WdgSettingsFast =
{
.ReloadValue = 200, // ms
.ActivationBit = 1,
},
.WdgSettingsSlow =
{
.ReloadValue = 2000, // ms
.ActivationBit = 1,
},
.WdgSettingsOff =
{
.ReloadValue = 0,
.ActivationBit = 0,
},
};
const Wdg_ConfigType WdgConfig =
{
.Wdg_ModeConfig = &WdgModeConfig,
};
|
2301_81045437/classic-platform
|
boards/spc56el70_spc56l/config/Wdg_Lcfg.c
|
C
|
unknown
| 1,253
|
# ARCH defines
ARCH=armv7_m
ARCH_FAM=arm
ARCH_MCU=stm32
#
# CFG (y/n) macros
#
CFG=ARM ARMV7_M ARM_CM3 THUMB
CFG+=STM32 STM32F1X
# Add our board
CFG+=BRD_STM32_STM3210C
CFG+=TIMER_DWT
CFG+=CREATE_SREC
#
# ST have devided devices into ( See chapter 6 in Ref manual )
# LD - Low Density. STM32F101xx,F102xx,F103xx). Flash 16->32Kbytes
# MD - Medium Density. Same as above. Flash 64->128Kbytes
# HD - High Denstiry. STM32F101xx,F103xx. Flash 256->512Kbytes
# CL - Connectivity Line. STM32F105xx,F107xx
#
# [ STM32_MD | CFG_STM32_LD | CFG_STM32_HD | CFG_STM32_CL ]
CFG+=STM32_CL
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO MCU FLS PORT PWM GPT EA
MOD_AVAIL+=TCF LWIP TCPIP SLEEP SOAD DOIP ETHSM
# Required modules
MOD_USE += MCU KERNEL
def-y += NON_ASR_ETH_DRIVER
def-y += USE_NO_ETHIF
#
# Extra defines
#
# Select the right device in ST header files.
# [ STM32F10X_LD | STM32F10X_MD | STM32F10X_HD |STM32F10X_CL ]
def-y += STM32F10X_CL
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
def-y += L_BOOT_RESERVED_SPACE=0x0
|
2301_81045437/classic-platform
|
boards/stm32_stm3210c/build_config.mk
|
Makefile
|
unknown
| 1,221
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
#include <stdlib.h>
#if defined(CFG_STM32F1X)
const FlashType flashInfo[] = {
{
/* Main memory use last 32 kB */
.size = FLS_TOTAL_SIZE,
.sectCnt = FLASH_MAX_PAGES,
.sectAddr = { 0x08038000,
/*.sectAddr[1] = */ 0x08038800,
/*.sectAddr[2] = */ 0x08039000,
/*.sectAddr[3] = */ 0x08039800,
/*.sectAddr[4] = */ 0x0803A000,
/*.sectAddr[5] = */ 0x0803A800,
/*.sectAddr[6] = */ 0x0803B000,
/*.sectAddr[7] = */ 0x0803B800,
/*.sectAddr[8] = */ 0x0803C000,
/*.sectAddr[9] = */ 0x0803C800,
/*.sectAddr[10] = */ 0x0803D000,
/*.sectAddr[11] = */ 0x0803D800,
/*.sectAddr[12] = */ 0x0803E000,
/*.sectAddr[13] = */ 0x0803E800,
/*.sectAddr[14] = */ 0x0803F000,
/*.sectAddr[15] = */ 0x0803F800,
/*.sectAddr[16] = */ 0x08040000, }
}
};
#else
#error CPU NOT supported
#endif
const Fls_ConfigType FlsConfigSet[]=
{
{
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification = NULL,
.FlsInfo = flashInfo
}
};
|
2301_81045437/classic-platform
|
boards/stm32_stm3210c/config/Fls_Cfg.c
|
C
|
unknown
| 1,890
|
/* -------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @addtogroup Fls Flash Driver
* @{ */
/** @file Fls_Cfg.h
* Definitions of configuration parameters for Flash Driver.
*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
#include "MemIf_Types.h"
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_CANCEL_API STD_OFF
#define FLS_SET_MODE_API STD_OFF
#define FLS_VERSION_INFO_API STD_OFF
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_ERASED_VALUE (uint8)0xff
/* MCU Specific */
#if defined(CFG_STM32F1X)
#define FLS_TOTAL_SIZE 0x40000
#define FLASH_PAGE_SIZE 2048
#define FLASH_MAX_PAGES 16 // Main memory sectors == pages, only first 16 used (32K)
#else
#error CPU not supported
#endif
typedef struct Flash {
uint32 size;
uint32 sectCnt;
uint32 sectAddr[FLASH_MAX_PAGES+1]; // Main memory sectors == pages
} FlashType;
typedef struct {
// FlsCallCycle N/A in core.
void (*FlsJobEndNotification)();
void (*FlsJobErrorNotification)();
const struct Flash *FlsInfo;
} Fls_ConfigType;
extern const Fls_ConfigType FlsConfigSet[];
#endif /*FLS_CFG_H_*/
/** @} */
|
2301_81045437/classic-platform
|
boards/stm32_stm3210c/config/Fls_Cfg.h
|
C
|
unknown
| 1,953
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef WDG_CFG_H_
#define WDG_CFG_H_
#include "Std_Types.h"
#include "WdgIf_Types.h"
typedef enum
{
IWDG_CK_Counter_Clock_4 = 0,
IWDG_CK_Counter_Clock_8,
IWDG_CK_Counter_Clock_16,
IWDG_CK_Counter_Clock_32,
IWDG_CK_Counter_Clock_64,
IWDG_CK_Counter_Clock_128,
IWDG_CK_Counter_Clock_256,
}Wdg_IWDG_TimerBaseType;
typedef struct
{
Wdg_IWDG_TimerBaseType TimerBase;
uint16 ReloadValue;
uint8 ActivationBit;
}Wdg_IWDG_SettingsType;
typedef struct
{
WdgIf_ModeType Wdg_DefaultMode;
Wdg_IWDG_SettingsType WdgSettingsFast;
Wdg_IWDG_SettingsType WdgSettingsSlow;
Wdg_IWDG_SettingsType WdgSettingsOff;
}Wdg_IWDG_ModeConfigType;
typedef struct
{
const Wdg_GeneralType *Wdg_General;
const Wdg_IWDG_ModeConfigType *Wdg_IWDGModeConfig;
}Wdg_IWDG_ConfigType;
extern const Wdg_GeneralType WdgIWDGGeneral;
extern const Wdg_IWDG_ConfigType WdgIWDGConfig;
typedef enum
{
WDG_CK_Counter_Clock_1 = 0,
WDG_CK_Counter_Clock_2,
WDG_CK_Counter_Clock_4,
WDG_CK_Counter_Clock_8,
}Wdg_WWDG_TimerBaseType;
typedef struct
{
Wdg_WWDG_TimerBaseType TimerBase;
uint8 WindowValue;
uint8 CounterPreset;
uint8 ActivationBit;
}Wdg_WWDG_SettingsType;
typedef struct
{
WdgIf_ModeType Wdg_DefaultMode;
Wdg_WWDG_SettingsType WdgSettingsFast;
Wdg_WWDG_SettingsType WdgSettingsSlow;
Wdg_WWDG_SettingsType WdgSettingsOff;
}Wdg_WWDG_ModeConfigType;
typedef struct
{
const Wdg_GeneralType *Wdg_General;
const Wdg_WWDG_ModeConfigType *Wdg_WWDGModeConfig;
}Wdg_WWDG_ConfigType;
typedef struct
{
const Wdg_IWDG_ConfigType *Wdg_IWDG_Config;
const Wdg_WWDG_ConfigType *Wdg_WWDG_Config;
}Wdg_ConfigType;
extern const Wdg_GeneralType WdgWWDGGeneral;
extern const Wdg_WWDG_ConfigType WdgWWDGConfig;
extern const Wdg_ConfigType WdgConfig;
#endif /* WDG_CFG_H_ */
|
2301_81045437/classic-platform
|
boards/stm32_stm3210c/config/Wdg_Cfg.h
|
C
|
unknown
| 2,697
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Wdg.h"
#if defined(CFG_STM32F1X)
void Wdg_IWDG_Init (const Wdg_IWDG_ConfigType* ConfigPtr);
void Wdg_IWDG_Trigger (uint16 timeout);
Std_ReturnType Wdg_IWDG_SetMode (WdgIf_ModeType Mode);
void Wdg_IWDG_GetVersionInfo (void /* IMPROVEMENT Std_VersionInfoType* versioninfo*/);
void Wdg_WWDG_Init (const Wdg_WWDG_ConfigType* ConfigPtr);
void Wdg_WWDG_Trigger (uint16 timeout);
Std_ReturnType Wdg_WWDG_SetMode (WdgIf_ModeType Mode);
void Wdg_WWDG_GetVersionInfo (void /* IMPROVEMENT Std_VersionInfoType* versioninfo*/);
#endif
const Wdg_IWDG_ModeConfigType WdgIWDGModeConfig =
{
.Wdg_DefaultMode = WDGIF_OFF_MODE,
.WdgSettingsFast =
{
.TimerBase = IWDG_CK_Counter_Clock_8,
.ReloadValue = 0x7FF,
.ActivationBit = 1,
},
.WdgSettingsSlow =
{
.TimerBase = IWDG_CK_Counter_Clock_256,
.ReloadValue = 0xFFF,
.ActivationBit = 1,
},
.WdgSettingsOff =
{
.TimerBase = IWDG_CK_Counter_Clock_4,
.ReloadValue = 0x7F,
.ActivationBit = 0,
},
};
const Wdg_GeneralType WdgIWDGGeneral =
{
.Wdg_Index = 1,
.Wdg_TriggerLocationPtr = Wdg_IWDG_Trigger,
.Wdg_SetModeLocationPtr = Wdg_IWDG_SetMode,
};
const Wdg_IWDG_ConfigType WdgIWDGConfig =
{
.Wdg_General = &WdgIWDGGeneral,
.Wdg_IWDGModeConfig = &WdgIWDGModeConfig,
};
/* The windowed watchdog is clocked from PCLK1. Max allowed frequency
* of this is 36Mhz.
*
* Max Twwdg = T_PCLK1 * 4096 * 2^TimerBase * (CounterPreset & 0x3F) + 1)=
*
* = 58.25 ms
*
*
*
* Min Twwdg = T_PCLK1 * 4096 * 2^TimerBase * (CounterPreset & 0x3F) + 1)=
*
* = 7.28 ms
* */
/* IMPROVEMENT: Add implementation for Independent WD as well. This will make it
* possible to test a multiple WD design within the STM32. */
const Wdg_WWDG_ModeConfigType WdgWWDGModeConfig =
{
.Wdg_DefaultMode = WDGIF_OFF_MODE,
.WdgSettingsFast =
{
.TimerBase = WDG_CK_Counter_Clock_4,
.WindowValue = 0x7F,
.CounterPreset = 0x7F,
.ActivationBit = 1,
},
.WdgSettingsSlow =
{
.TimerBase = WDG_CK_Counter_Clock_8,
.WindowValue = 0x7F,
.CounterPreset = 0x7F,
.ActivationBit = 1,
},
.WdgSettingsOff =
{
.TimerBase = WDG_CK_Counter_Clock_8,
.WindowValue = 0x7F,
.CounterPreset = 0x7F,
.ActivationBit = 0,
},
};
const Wdg_GeneralType WdgWWDGGeneral =
{
.Wdg_Index = 0,
.Wdg_TriggerLocationPtr = Wdg_WWDG_Trigger,
.Wdg_SetModeLocationPtr = Wdg_WWDG_SetMode,
};
const Wdg_WWDG_ConfigType WdgWWDGConfig =
{
.Wdg_General = &WdgWWDGGeneral,
.Wdg_WWDGModeConfig = &WdgWWDGModeConfig,
};
const Wdg_ConfigType WdgConfig =
{
&WdgIWDGConfig,
&WdgWWDGConfig,
};
|
2301_81045437/classic-platform
|
boards/stm32_stm3210c/config/Wdg_Lcfg.c
|
C
|
unknown
| 3,697
|
# ARCH defines
ARCH=armv7_m
ARCH_FAM=arm
ARCH_MCU=stm32
#
# CFG (y/n) macros
#
CFG=ARM ARMV7E_M ARM_CM4 HW_FLOAT THUMB
CFG+=STM32 STM32F3X
# Add our board
#CFG+=BRD_STM32_STM3210C
CFG+=BRD_STM32F3_DISCOVERY
CFG+=TIMER_DWT
CFG+=CREATE_SREC
#
# ST have devided devices into ( See chapter 6 in Ref manual )
# LD - Low Density. STM32F101xx,F102xx,F103xx). Flash 16->32Kbytes
# MD - Medium Density. Same as above. Flash 64->128Kbytes
# HD - High Denstiry. STM32F101xx,F103xx. Flash 256->512Kbytes
# CL - Connectivity Line. STM32F105xx,F107xx
#
# [ STM32_MD | CFG_STM32_LD | CFG_STM32_HD | CFG_STM32_CL ]
CFG+=STM32_CL
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO MCU FLS PORT PWM GPT EA
MOD_AVAIL+=TCF LWIP SLEEP SOAD DOIP ETHSM
# Required modules
MOD_USE += MCU KERNEL
#
# Extra defines
#
# Select the right device in ST header files.
# [ STM32F10X_LD | STM32F10X_MD | STM32F10X_HD |STM32F10X_CL ]
#def-y += STM32F10X_CL
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
def-y += L_BOOT_RESERVED_SPACE=0x0
|
2301_81045437/classic-platform
|
boards/stm32f3_discovery/build_config.mk
|
Makefile
|
unknown
| 1,197
|
# ARCH defines
ARCH=aurix
ARCH_FAM=tricore
#
# CFG (y/n) macros
#
CFG=TRICORE
CFG+=AURIX
CFG+=BRD_TC297_TB
CFG+=TC29X
CFG+=TC2XX
CFG+=TC212
CFG+=OS_SYSTICK2
CFG+=TIMER
CFG+=TIMER_AURIX
SELECT_CORE?=0
# What buildable modules does this board have,
# default or private
# MCAL (supplied by Infineon)
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT WDG SPI IRQ DMA DSADC ETH FR HSSL I2C ICU IOM LIN MSC PWM SENT SMU STM UART TTY_UART TCPIP LWIP
# Required modules
MOD_USE += KERNEL
#
# Extra defines
#
def-y += __TC29XX__
COMPILER=gcc
# For now assume located here:C:\HIGHTEC\toolchains\tricore\v4.6.5.0-infineon-1.1
#DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0/bin/tricore-
#DEFAULT_CROSS_COMPILE=/c/HIGHTEC/toolchains/tricore/v4.6.5.0-infineon-1.1/bin/tricore-
#DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0-infineon-1.1/bin/tricore-
DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0/bin/tricore-
#$(error $(PATH))
#PATH:=$(PATH):/c/devtools/HIGHTEC/licensemanager
# Default cross compiler
#DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
|
2301_81045437/classic-platform
|
boards/tc212l_stkit/build_config.mk
|
Makefile
|
unknown
| 1,181
|
# ARCH defines
ARCH=aurix
ARCH_FAM=tricore
#
# CFG (y/n) macros
#
CFG=TRICORE
CFG+=AURIX
CFG+=BRD_TC264_TRB
CFG+=TC26X
CFG+=TC2XX
CFG+=OS_SYSTICK2
CFG+=TIMER
CFG+=TIMER_AURIX
SELECT_CORE?=0
# What buildable modules does this board have,
# default or private
# MCAL (supplied by Infineon)
MOD_AVAIL+=CAN DIO MCU FLS PORT DMA GPT GTM
# Required modules
MOD_USE += KERNEL
#
# Extra defines
#
def-y += __TC29XX__
COMPILER=gcc
DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.9.2.0/bin/tricore-
PATH:=$(PATH):/c/devtools/HIGHTEC/licensemanager
|
2301_81045437/classic-platform
|
boards/tc264_trb/build_config.mk
|
Makefile
|
unknown
| 605
|
# ARCH defines
ARCH=aurix
ARCH_FAM=tricore
#
# CFG (y/n) macros
#
CFG+=TRICORE
CFG+=AURIX
CFG+=BRD_TC297_TB
CFG+=TC29X
CFG+=TC2XX
CFG+=OS_SYSTICK2
CFG+=TIMER
CFG+=TIMER_AURIX
SELECT_CORE?=0
# What buildable modules does this board have,
# default or private
# MCAL (supplied by Infineon)
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT WDG SPI IRQ DMA DSADC ETH FR HSSL I2C ICU IOM LIN MSC PWM SENT SMU STM UART TTY_UART TCPIP LWIP
# Required modules
MOD_USE += KERNEL
#
# Extra defines
#
def-y += __TC29XX__
COMPILER=gcc
# For now assume located here:C:\HIGHTEC\toolchains\tricore\v4.6.5.0-infineon-1.1
#DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0/bin/tricore-
#DEFAULT_CROSS_COMPILE=/c/HIGHTEC/toolchains/tricore/v4.6.5.0-infineon-1.1/bin/tricore-
#DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0-infineon-1.1/bin/tricore-
DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC/toolchains/tricore/v4.6.5.0/bin/tricore-
#$(error $(PATH))
#PATH:=$(PATH):/c/devtools/HIGHTEC/licensemanager
# Default cross compiler
#DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
|
2301_81045437/classic-platform
|
boards/tc297_trb/build_config.mk
|
Makefile
|
unknown
| 1,170
|
# ARCH defines
ARCH=aurix
ARCH_FAM=tricore
#
# CFG (y/n) macros
#
CFG=TRICORE
CFG+=AURIX
CFG+=BRD_TC399_TB
CFG+=TC39X
CFG+=TC3XX
CFG+=OS_SYSTICK2
CFG+=TIMER
CFG+=TIMER_AURIX
SELECT_CORE?=0
# What buildable modules does this board have,
# default or private
# MCAL (supplied by Infineon)
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT WDG SPI IRQ DMA DSADC ETH FR HSSL I2C ICU IOM LIN MSC PWM SENT SMU STM UART TTY_UART TCPIP LWIP
# Required modules
MOD_USE += KERNEL
#
# Extra defines
#
def-y += __TC39XX__
COMPILER=gcc
# For now assume located here:C:\devtools\HIGHTEC\toolchains\tricore\v4.6.6.0-infineon-1.1
DEFAULT_CROSS_COMPILE=/c/devtools/HIGHTEC_4661/toolchains/tricore/v4.6.6.1/bin/tricore-
|
2301_81045437/classic-platform
|
boards/tc399_trb/build_config.mk
|
Makefile
|
unknown
| 753
|
# ARCH defines
ARCH=arm_cr4
ARCH_FAM=arm
#
# CFG (y/n) macros
#
CFG=ARM ARM_CR5 ARMV7_AR # ARM_CR4 # ARMV7_AR
# Add our board
CFG+=TMS570 BRD_TMDX570_LC43HDK TMS570LC43X
CFG+=OS_SYSTICK2
CFG+=HW_FLOAT
CFG+=THUMB
CFG+=BIG_ENDIAN
CFG+=TIMER_RTI
CFG += MCU_CACHE
#
# ST have devided devices into ( See chapter 6 in Ref manual )
# LD - Low Density. STM32F101xx,F102xx,F103xx). Flash 16->32Kbytes
# MD - Medium Density. Same as above. Flash 64->128Kbytes
# HD - High Denstiry. STM32F101xx,F103xx. Flash 256->512Kbytes
# CL - Connectivity Line. STM32F105xx,F107xx
#
# [ STM32_MD | CFG_STM32_LD | CFG_STM32_HD | CFG_STM32_CL ]
#CFG+=STM32_CL
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT WDG SPI
MOD_AVAIL+=TCF LWIP TCPIP SLEEP
# Required modules
MOD_USE += MCU KERNEL
#
# Extra defines
#
# Select the right device in ST header files.
# [ STM32F10X_LD | STM32F10X_MD | STM32F10X_HD |STM32F10X_CL ]
#def-y += STM32F10X_CL
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
|
2301_81045437/classic-platform
|
boards/tmdx570lc43hdk/build_config.mk
|
Makefile
|
unknown
| 1,181
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* STM M9525
*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_M95M02_A125 3
#define E2_CHIP E2_M9525
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
#if (E2_CHIP != E2_M95M02_A125)
#define EEP_ADDR_LENGTH 2u
#else
#define EEP_ADDR_LENGTH 3u
#endif
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/tmdx570lc43hdk/config/Eep_Cfg.h
|
C
|
unknown
| 4,408
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD SpiConf_SpiSequence_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define SPI_SEQ_EEP_READ SpiConf_SpiSequence_SEQ_READ
#define SPI_SEQ_EEP_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define SPI_CH_EEP_CMD SpiConf_SpiChannel_CH_CMD
#define SPI_CH_EEP_ADDR SpiConf_SpiChannel_CH_ADDR
#define SPI_CH_EEP_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_CH_EEP_DATA SpiConf_SpiChannel_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 64,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 64,
#elif (E2_CHIP == E2_M95M02_A125)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 64,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x800u, /* 16Kb 25LC160B, */
.EepPageSize = 32u, /* 32 for 25LC160B, 16 for 25LC160A, */
#elif (E2_CHIP == E2_M9525)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x8000, /* 256Kb for M9525 */
.EepPageSize = 64u, /* 64 for M9525 */
#elif (E2_CHIP == E2_M95M02_A125)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x40000u, /* 2Mb */
.EepPageSize = 256u,
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/tmdx570lc43hdk/config/Eep_Lcfg.c
|
C
|
unknown
| 4,481
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
const FlashType flashInfo[] = {
[0].sectCnt = 32,
[0].bankSize = 0x20000, // 128 kB
[0].regBase = 0xF0200000UL,
[0].sectAddr[0] = 0x00000000UL,
[0].sectAddr[1] = 0x00001000UL,
[0].sectAddr[2] = 0x00002000UL,
[0].sectAddr[3] = 0x00003000UL,
[0].sectAddr[4] = 0x00004000UL,
[0].sectAddr[5] = 0x00005000UL,
[0].sectAddr[6] = 0x00006000UL,
[0].sectAddr[7] = 0x00007000UL,
[0].sectAddr[8] = 0x00008000UL,
[0].sectAddr[9] = 0x00009000UL,
[0].sectAddr[10] = 0x0000A000UL,
[0].sectAddr[11] = 0x0000B000UL,
[0].sectAddr[12] = 0x0000C000UL,
[0].sectAddr[13] = 0x0000D000UL,
[0].sectAddr[14] = 0x0000E000UL,
[0].sectAddr[15] = 0x0000F000UL,
[0].sectAddr[16] = 0x00010000UL,
[0].sectAddr[17] = 0x00011000UL,
[0].sectAddr[18] = 0x00012000UL,
[0].sectAddr[19] = 0x00013000UL,
[0].sectAddr[20] = 0x00014000UL,
[0].sectAddr[21] = 0x00015000UL,
[0].sectAddr[22] = 0x00016000UL,
[0].sectAddr[23] = 0x00017000UL,
[0].sectAddr[24] = 0x00018000UL,
[0].sectAddr[25] = 0x00019000UL,
[0].sectAddr[26] = 0x0001A000UL,
[0].sectAddr[27] = 0x0001B000UL,
[0].sectAddr[28] = 0x0001C000UL,
[0].sectAddr[29] = 0x0001D000UL,
[0].sectAddr[30] = 0x0001E000UL,
[0].sectAddr[31] = 0x0001F000UL,
[0].sectAddr[32] = 0x00020000UL, // end
};
const Fls_ConfigType FlsConfigSet[]=
{
{
.FlsAcWrite = NULL,
.FlsAcErase = NULL,
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification = NULL,
#if (STD_ON == USE_FLS_INFO)
.FlsInfo = flashInfo,
#endif
.FlsMaxReadFastMode = 16,
.FlsMaxReadNormalMode = 16,
.FlsMaxWriteFastMode = 32,
.FlsMaxWriteNormalMode = 32,
// .FlsSectorList = &fls_evbSectorList[0],
// .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),
// .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,
}
};
|
2301_81045437/classic-platform
|
boards/tmdx570lc43hdk/config/Fls_Cfg.c
|
C
|
unknown
| 2,723
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
#define USE_FLS_INFO STD_ON
/* STD container : Fls
* FlsConfigSet 1..*
* FlsGeneral 1
* FlsPublishedInformation 1
*/
#include "MemIf_Types.h"
/* FlsGeneral, 3.0 OK */
#define FLS_VARIANT_PB STD_OFF
#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */
#define FLS_BASE_ADDRESS 0x00000000
#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_SET_MODE_API STD_OFF
#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */
#define FLS_VERSION_INFO_API STD_ON
/* FlsPublishedInformation, 3.0 OK */
#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */
#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */
#define FLS_ERASE_TIME 0 /* NO SUPPORT */
#define FLS_ERASED_VALUE (uint8)0xff /* NO SUPPORT */
#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */
#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */
#define FLS_WRITE_TIME 0 /* NO SUPPORT */
#define FLASH_MAX_SECTORS 32
#define FLS_TOTAL_SIZE 0x20000
#include "Fls_ConfigTypes.h"
#if 0
#if (USE_FLS_INFO==STD_ON)
typedef struct Flash {
uint32_t size;
uint32_t sectCnt;
uint32_t bankSize;
uint32_t regBase;
uint32_t sectAddr[FLASH_MAX_SECTORS+1];
uint16_t addrSpace[FLASH_MAX_SECTORS+1];
} FlashType;
#else
typedef struct {
Fls_LengthType FlsNumberOfSectors;
Fls_LengthType FlsPageSize;
Fls_LengthType FlsSectorSize;
Fls_AddressType FlsSectorStartaddress;
} Fls_SectorType;
#endif
#endif
#endif /*FLS_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/tmdx570lc43hdk/config/Fls_Cfg.h
|
C
|
unknown
| 2,616
|
# ARCH defines
ARCH=arm_cr4
ARCH_FAM=arm
#
# CFG (y/n) macros
#
CFG+=ARM ARM_CR4 ARMV7_AR
# Add our board
CFG+=TMS570 BRD_TMDX570_LS12HDK TMS570LS12X
CFG+=OS_SYSTICK2
CFG+=HW_FLOAT
CFG+=THUMB
CFG+=BIG_ENDIAN
CFG+=TIMER_RTI
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT WDG SPI LIN CAN_DCAN
MOD_AVAIL+=TCF LWIP TCPIP SLEEP
# Required modules
MOD_USE += MCU KERNEL
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
|
2301_81045437/classic-platform
|
boards/tmdx570ls12hdk/build_config.mk
|
Makefile
|
unknown
| 568
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* STM M9525
*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_M95M02_A125 3
#define E2_CHIP E2_M9525
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
#if (E2_CHIP != E2_M95M02_A125)
#define EEP_ADDR_LENGTH 2u
#else
#define EEP_ADDR_LENGTH 3u
#endif
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/tmdx570ls12hdk/config/Eep_Cfg.h
|
C
|
unknown
| 4,408
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD SpiConf_SpiSequence_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define SPI_SEQ_EEP_READ SpiConf_SpiSequence_SEQ_READ
#define SPI_SEQ_EEP_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define SPI_CH_EEP_CMD SpiConf_SpiChannel_CH_CMD
#define SPI_CH_EEP_ADDR SpiConf_SpiChannel_CH_ADDR
#define SPI_CH_EEP_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_CH_EEP_DATA SpiConf_SpiChannel_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 64,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 64,
#elif (E2_CHIP == E2_M95M02_A125)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 64,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x800u, /* 16Kb 25LC160B, */
.EepPageSize = 32u, /* 32 for 25LC160B, 16 for 25LC160A, */
#elif (E2_CHIP == E2_M9525)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x8000, /* 256Kb for M9525 */
.EepPageSize = 64u, /* 64 for M9525 */
#elif (E2_CHIP == E2_M95M02_A125)
// This parameter is the used size of EEPROM device in bytes.
.EepSize = 0x40000u, /* 2Mb */
.EepPageSize = 256u,
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/tmdx570ls12hdk/config/Eep_Lcfg.c
|
C
|
unknown
| 4,481
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
const FlashType flashInfo[] = {
[0].sectCnt = 4,
[0].bankSize = 0x10000, //64 kB
[0].regBase = 0xF0200000UL,
[0].sectAddr[0] = 0,
[0].sectAddr[1] = 0x00004000,
[0].sectAddr[2] = 0x00008000,
[0].sectAddr[3] = 0x0000C000,
};
const Fls_ConfigType FlsConfigSet[]=
{
{
.FlsAcWrite = NULL,
.FlsAcErase = NULL,
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification = NULL,
#if (STD_ON == USE_FLS_INFO)
.FlsInfo = flashInfo,
#endif
.FlsMaxReadFastMode = 16,
.FlsMaxReadNormalMode = 16,
.FlsMaxWriteFastMode = 32,
.FlsMaxWriteNormalMode = 32,
// .FlsSectorList = &fls_evbSectorList[0],
// .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),
// .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,
}
};
|
2301_81045437/classic-platform
|
boards/tmdx570ls12hdk/config/Fls_Cfg.c
|
C
|
unknown
| 1,600
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
#define USE_FLS_INFO STD_ON
/* STD container : Fls
* FlsConfigSet 1..*
* FlsGeneral 1
* FlsPublishedInformation 1
*/
#include "MemIf_Types.h"
/* FlsGeneral, 3.0 OK */
#define FLS_VARIANT_PB STD_OFF
#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */
#define FLS_BASE_ADDRESS 0x00000000
#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_SET_MODE_API STD_OFF
#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */
#define FLS_VERSION_INFO_API STD_ON
/* FlsPublishedInformation, 3.0 OK */
#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */
#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */
#define FLS_ERASE_TIME 0 /* NO SUPPORT */
#define FLS_ERASED_VALUE (uint8)0xff /* NO SUPPORT */
#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */
#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */
#define FLS_WRITE_TIME 0 /* NO SUPPORT */
#define FLASH_MAX_SECTORS 4
#define FLS_TOTAL_SIZE 0x10000
#include "Fls_ConfigTypes.h"
#if 0
#if (USE_FLS_INFO==STD_ON)
typedef struct Flash {
uint32_t size;
uint32_t sectCnt;
uint32_t bankSize;
uint32_t regBase;
uint32_t sectAddr[FLASH_MAX_SECTORS+1];
uint16_t addrSpace[FLASH_MAX_SECTORS+1];
} FlashType;
#else
typedef struct {
Fls_LengthType FlsNumberOfSectors;
Fls_LengthType FlsPageSize;
Fls_LengthType FlsSectorSize;
Fls_AddressType FlsSectorStartaddress;
} Fls_SectorType;
#endif
#endif
#endif /*FLS_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/tmdx570ls12hdk/config/Fls_Cfg.h
|
C
|
unknown
| 2,615
|
# ARCH defines
ARCH=arm_cr4
ARCH_FAM=arm
#
# CFG (y/n) macros
#
CFG=ARM ARM_CR4 ARM_CR5 ARMV7_AR
# Add our board
CFG+=TRAVEO TRAVEO_S6J328C
CFG+=OS_SYSTICK2
CFG+=HW_FLOAT
CFG+=THUMB
CFG+=LITTLE_ENDIAN
CFG+=MCAL_CYPRESS
CFG+=MCAL_EXTERNAL
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO FLS GPT MCU PORT PWM SPI WDG
# Required modules
MOD_USE += MCU KERNEL
GHS_TARGET=cortexr4f
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
GHS_COMPILE=/c/devtools/ghs/arm/comp_201354
|
2301_81045437/classic-platform
|
boards/traveo_s6j328c/build_config.mk
|
Makefile
|
unknown
| 606
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/traveo_s6j328c/config/Eep_Cfg.h
|
C
|
unknown
| 4,149
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* Microchip 25LC160B (32 bytes pages)
*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_CHIP E2_M9525
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD SpiConf_SpiSequence_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 SpiConf_SpiSequence_SEQ_CMD2
#define SPI_SEQ_EEP_READ SpiConf_SpiSequence_SEQ_READ
#define SPI_SEQ_EEP_WRITE SpiConf_SpiSequence_SEQ_WRITE
#define SPI_CH_EEP_CMD SpiConf_SpiChannel_CH_CMD
#define SPI_CH_EEP_ADDR SpiConf_SpiChannel_CH_ADDR
#define SPI_CH_EEP_WREN SpiConf_SpiChannel_CH_WREN
#define SPI_CH_EEP_DATA SpiConf_SpiChannel_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
.EepFastReadBlockSize = 64,
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
// This parameter is the used size of EEPROM device in bytes.
#if (E2_CHIP == E2_25LC160B)
.EepSize = 0x800, /* 16Kb for 25LC160B */
#elif (E2_CHIP == E2_M9525)
.EepSize = 0x8000, /* 256Kb for M9525 */
#endif
#if (E2_CHIP == E2_25LC160B)
.EepPageSize = 32, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#elif (E2_CHIP == E2_M9525)
.EepPageSize = 64, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/traveo_s6j328c/config/Eep_Lcfg.c
|
C
|
unknown
| 4,041
|
# ARCH defines
ARCH=armv7_ar
ARCH_FAM=arm
#
# CFG (y/n) macros
#
CFG=ARM ARMV7_AR ARM_GIC ZYNQ
# Add our board
CFG+=BRD_ZYNQ_ZC702 OS_SYSTICK2
CFG+=TIMER_GLOBAL
CFG+=HW_FLOAT
CFG+=THUMB
CFG+=TIMER
CFG+=MMU_SETUP
# What buildable modules does this board have,
# default or private
# MCAL
MOD_AVAIL+=ADC CAN DIO MCU FLS FEE PORT PWM GPT ICU WDG SPI ETH LIN
MOD_AVAIL+=TCF LWIP TCPIP SLEEP SOAD DOIP ETHSM
# Required modules
MOD_USE += MCU KERNEL
#
# Extra defines
#
#def-y += NON_ASR_ETH_DRIVER
#def-y += USE_NO_ETHIF
# Default cross compiler
DEFAULT_CROSS_COMPILE = /opt/arm-none-eabi/bin/arm-none-eabi-
DEFAULT_ARMCC_COMPILE=/c/devtools/DS-5
|
2301_81045437/classic-platform
|
boards/zynq_zc702/build_config.mk
|
Makefile
|
unknown
| 698
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef EEP_CFG_H_
#define EEP_CFG_H_
#define EEP_USES_EXTERNAL_DRIVER
#include "Spi.h"
#include "Eep_ConfigTypes.h"
// M95256 or 25LC160B
#define E2_WREN 0x6 // Write Enable 0000 0110
#define E2_WRDI 0x4 // Write Disable 0000 0100
#define E2_RDSR 0x5 // Read Status Register 0000 0101
// 1 - Read data
#define E2_WRSR 0x1 // Write Status Register 0000 0001
// 1 - Write data
#define E2_READ 0x3 // Read from Memory Array 0000 0011
// 1 - Write 16-bit address
// n - 8 -bit read data
#define E2_WRITE 0x2 // WRITE Write to Memory Array 0000 0010
// 1 Write 16-bit address
// n - 8-bit reads
/* EepGeneral */
// Switches to activate or deactivate interrupt controlled job processing. true:
// Interrupt controlled job processing enabled. false: Interrupt controlled job
// processing disabled.
#define EEP_USE_INTERRUPTS STD_OFF
// Pre-processor switch to enable and disable development error detection.
// true: Development error detection enabled. false: Development error
// detection disabled.
#define EEP_DEV_ERROR_DETECT STD_ON
// Pre-processor switch to enable / disable the API to read out the modules
// version information. true: Version info API enabled. false: Version info API
// disabled.
#define EEP_VERSION_INFO_API STD_ON
// ndex of the driver, used by EA.
#define EEP_DRIVER_INDEX 1
// Switches to activate or deactivate write cycle reduction (EEPROM value is
// read and compared before being overwritten). true: Write cycle reduction
// enabled. false: Write cycle reduction disabled.
#define EEP_WRITE_CYCLE_REDUCTION STD_OFF
// Container for runtime configuration parameters of the EEPROM driver.
// Implementation Type: Eep_ConfigType.
/* EepPublishedInformation
*/
// Total size of EEPROM in bytes. Implementation Type: Eep_LengthType.
#define EEP_TOTAL_SIZE TBD
// Size of smallest erasable EEPROM data unit in bytes.
#define EEP_ERASE_UNIT_SIZE TBD
// EepMinimumLengthType {EEP_MINIMUM_LENGTH_TYPE}
// Minimum expected size of Eep_LengthType.
#define EEP_MINIMUM_LENGTH_TYPE TBD
// Minimum expected size of Eep_AddressType.
#define EEP_MINIMUM_ADDRESS_TYPE TBD
// Size of smallest writable EEPROM data unit in bytes.
#define EEP_WRITE_UNIT_SIZE TBD
// Value of an erased EEPROM cell.
#define EEP_ERASE_VALUE 0
// Number of erase cycles specified for the EEP device (usually given in the
// device data sheet).
#define EEP_SPECIFIED_ERASE_CYCLES TBD
// Size of smallest readable EEPROM data unit in bytes.
#define EEP_READ_UNIT_SIZE TBD
// Time for writing one EEPROM data unit.(float)
#define EEP_WRITE_TIME TBD
// Time for erasing one EEPROM data unit (float)
#define EEP_ERASE_TIME TBD
// Specified maximum number of write cycles under worst case conditions of
// specific EEPROM hardware (e.g. +90�C)
#define EEP_ALLOWED_WRITE_CYCLES x
extern const Eep_ConfigType EepConfigData[];
#define EEP_DEFAULT_CONFIG EepConfigData[0]
#endif /*EEP_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/zynq_zc702/config/Eep_Cfg.h
|
C
|
unknown
| 4,156
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* Configured for:
* Microchip 25LC160B (32 bytes pages)
*/
#include "Eep.h"
#include "Spi.h"
#include "debug.h"
#define E2_M9525 1
#define E2_25LC160B 2
#define E2_CHIP E2_25LC160B
#if defined(USE_EA)
extern void Ea_JobErrorNotification(void);
extern void Ea_JobEndNotification(void);
#endif
static void _JobEndNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB END NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobEndNotification();
#endif
}
static void _JobErrorNotify(void){
DEBUG(DEBUG_LOW,"EEP JOB ERROR NOTIFICATION\n");
#if defined(USE_EA)
Ea_JobErrorNotification();
#endif
}
#define SPI_SEQ_EEP_CMD Spi_SEQ_CMD
#define SPI_SEQ_EEP_CMD2 Spi_SEQ_CMD2
#define SPI_SEQ_EEP_READ Spi_SEQ_READ
#define SPI_SEQ_EEP_WRITE Spi_SEQ_WRITE
#define SPI_CH_EEP_CMD Spi_CH_CMD
#define SPI_CH_EEP_ADDR Spi_CH_ADDR
#define SPI_CH_EEP_WREN Spi_CH_WREN
#define SPI_CH_EEP_DATA Spi_CH_DATA
const Eep_ExternalDriverType EepExternalDriver = {
// READ and WRITE sequences and ID's defined in Spi_Cfg.h
.EepCmdSequence = SPI_SEQ_EEP_CMD,
.EepCmd2Sequence = SPI_SEQ_EEP_CMD2,
.EepReadSequence = SPI_SEQ_EEP_READ,
.EepWriteSequence = SPI_SEQ_EEP_WRITE,
// Jobs may be left out..
// Channels used
.EepCmdChannel = SPI_CH_EEP_CMD,
.EepAddrChannel = SPI_CH_EEP_ADDR,
.EepWrenChannel = SPI_CH_EEP_WREN,
.EepDataChannel = SPI_CH_EEP_DATA,
};
const Eep_ConfigType EepConfigData[] = {
{
// call cycle of the job processing function during write/erase operations. Unit: [s]
// .EepJobCallCycle = 0.2,
// This parameter is the EEPROM device base address.
.EepBaseAddress = 0,
// This parameter is the default EEPROM device mode after initialization.
.EepDefaultMode = MEMIF_MODE_FAST,
#if (E2_CHIP == E2_25LC160B)
// This parameter is the number of bytes read within one job processing cycle in fast mode
.EepFastReadBlockSize = 32,
// This parameter is the number of bytes written within one job processing cycle in fast mode
.EepFastWriteBlockSize = 32,
#elif (E2_CHIP == E2_M9525)
.EepFastReadBlockSize = 64,
.EepFastWriteBlockSize = 64,
#endif
// This parameter is a reference to a callback function for positive job result
.Eep_JobEndNotification = _JobEndNotify,
// This parameter is a reference to a callback function for negative job result
.Eep_JobErrorNotification = _JobErrorNotify,
.EepNormalReadBlockSize = 4,
// Number of bytes written within one job processing cycle in normal mode.
.EepNormalWriteBlockSize = 1,
// This parameter is the used size of EEPROM device in bytes.
#if (E2_CHIP == E2_25LC160B)
.EepSize = 0x800, /* 16Kb for 25LC160B */
#elif (E2_CHIP == E2_M9525)
.EepSize = 0x8000, /* 256Kb for M9525 */
#endif
#if (E2_CHIP == E2_25LC160B)
.EepPageSize = 32, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#elif (E2_CHIP == E2_M9525)
.EepPageSize = 64, /* 64 for M9525, 32 for 25LC160B, 16 for 25LC160A */
#endif
.externalDriver = &EepExternalDriver,
}
};
|
2301_81045437/classic-platform
|
boards/zynq_zc702/config/Eep_Lcfg.c
|
C
|
unknown
| 3,925
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Fls.h"
#include "Fee.h"
extern uint8 ReadBuffer[FLASH_PAGE_SIZE + HEADER_SIZE + DUMMY_RD_BYTES];
extern uint8 WriteBuffer[FLASH_PAGE_SIZE + HEADER_SIZE];
const FlashType flashInfo[] =
{
{
.FlsBaseAddress= 0x00000000U,
.FlsTotalSize = 0x01000000U,
.sectCnt = 256U,
.bankSize = 0x01000000U, //128 MB
.regBase = 0xE000D000U,
.sectAddr =
{
0x00000000U,
0x00010000U,
0x00020000U,
0x00030000U,
0x00040000U,
0x00050000U,
0x00060000U,
0x00070000U,
0x00080000U,
0x00090000U,
0x000A0000U,
0x000B0000U,
0x000C0000U,
0x000D0000U,
0x000E0000U,
0x000F0000U,
0x00100000U,
0x00110000U,
0x00120000U,
0x00130000U,
0x00140000U,
0x00150000U,
0x00160000U,
0x00170000U,
0x00180000U,
0x00190000U,
0x001A0000U,
0x001B0000U,
0x001C0000U,
0x001D0000U,
0x001E0000U,
0x001F0000U,
0x00200000U,
0x00210000U,
0x00220000U,
0x00230000U,
0x00240000U,
0x00250000U,
0x00260000U,
0x00270000U,
0x00280000U,
0x00290000U,
0x002A0000U,
0x002B0000U,
0x002C0000U,
0x002D0000U,
0x002E0000U,
0x002F0000U,
0x00300000U,
0x00310000U,
0x00320000U,
0x00330000U,
0x00340000U,
0x00350000U,
0x00360000U,
0x00370000U,
0x00380000U,
0x00390000U,
0x003A0000U,
0x003B0000U,
0x003C0000U,
0x003D0000U,
0x003E0000U,
0x003F0000U,
0x00400000U,
0x00410000U,
0x00420000U,
0x00430000U,
0x00440000U,
0x00450000U,
0x00460000U,
0x00470000U,
0x00480000U,
0x00490000U,
0x004A0000U,
0x004B0000U,
0x004C0000U,
0x004D0000U,
0x004E0000U,
0x004F0000U,
0x00500000U,
0x00510000U,
0x00520000U,
0x00530000U,
0x00540000U,
0x00550000U,
0x00560000U,
0x00570000U,
0x00580000U,
0x00590000U,
0x005A0000U,
0x005B0000U,
0x005C0000U,
0x005D0000U,
0x005E0000U,
0x005F0000U,
0x00600000U,
0x00610000U,
0x00620000U,
0x00630000U,
0x00640000U,
0x00650000U,
0x00660000U,
0x00670000U,
0x00680000U,
0x00690000U,
0x006A0000U,
0x006B0000U,
0x006C0000U,
0x006D0000U,
0x006E0000U,
0x006F0000U,
0x00700000U,
0x00710000U,
0x00720000U,
0x00730000U,
0x00740000U,
0x00750000U,
0x00760000U,
0x00770000U,
0x00780000U,
0x00790000U,
0x007A0000U,
0x007B0000U,
0x007C0000U,
0x007D0000U,
0x007E0000U,
0x007F0000U,
0x00800000U,
0x00810000U,
0x00820000U,
0x00830000U,
0x00840000U,
0x00850000U,
0x00860000U,
0x00870000U,
0x00880000U,
0x00890000U,
0x008A0000U,
0x008B0000U,
0x008C0000U,
0x008D0000U,
0x008E0000U,
0x008F0000U,
0x00900000U,
0x00910000U,
0x00920000U,
0x00930000U,
0x00940000U,
0x00950000U,
0x00960000U,
0x00970000U,
0x00980000U,
0x00990000U,
0x009A0000U,
0x009B0000U,
0x009C0000U,
0x009D0000U,
0x009E0000U,
0x009F0000U,
0x00A00000U,
0x00A10000U,
0x00A20000U,
0x00A30000U,
0x00A40000U,
0x00A50000U,
0x00A60000U,
0x00A70000U,
0x00A80000U,
0x00A90000U,
0x00AA0000U,
0x00AB0000U,
0x00AC0000U,
0x00AD0000U,
0x00AE0000U,
0x00AF0000U,
0x00B00000U,
0x00B10000U,
0x00B20000U,
0x00B30000U,
0x00B40000U,
0x00B50000U,
0x00B60000U,
0x00B70000U,
0x00B80000U,
0x00B90000U,
0x00BA0000U,
0x00BB0000U,
0x00BC0000U,
0x00BD0000U,
0x00BE0000U,
0x00BF0000U,
0x00C00000U,
0x00C10000U,
0x00C20000U,
0x00C30000U,
0x00C40000U,
0x00C50000U,
0x00C60000U,
0x00C70000U,
0x00C80000U,
0x00C90000U,
0x00CA0000U,
0x00CB0000U,
0x00CC0000U,
0x00CD0000U,
0x00CE0000U,
0x00CF0000U,
0x00D00000U,
0x00D10000U,
0x00D20000U,
0x00D30000U,
0x00D40000U,
0x00D50000U,
0x00D60000U,
0x00D70000U,
0x00D80000U,
0x00D90000U,
0x00DA0000U,
0x00DB0000U,
0x00DC0000U,
0x00DD0000U,
0x00DE0000U,
0x00DF0000U,
0x00E00000U,
0x00E10000U,
0x00E20000U,
0x00E30000U,
0x00E40000U,
0x00E50000U,
0x00E60000U,
0x00E70000U,
0x00E80000U,
0x00E90000U,
0x00EA0000U,
0x00EB0000U,
0x00EC0000U,
0x00ED0000U,
0x00EE0000U,
0x00EF0000U,
0x00F00000U,
0x00F10000U,
0x00F20000U,
0x00F30000U,
0x00F40000U,
0x00F50000U,
0x00F60000U,
0x00F70000U,
0x00F80000U,
0x00F90000U,
0x00FA0000U,
0x00FB0000U,
0x00FC0000U,
0x00FD0000U,
0x00FE0000U,
0x00FF0000U,
}
}
};
const Fls_ConfigType FlsConfigSet[] =
{
{
.QspiIf_Arc_Init = QspiIf_Arc_Init ,
.QspiIf_Arc_Erase = QspiIf_Arc_Erase ,
.QspiIf_Arc_Write = QspiIf_Arc_Write ,
.QspiIf_Arc_Read = QspiIf_Arc_Read ,
.QspiIf_Arc_Fast_Read = QspiIf_Arc_Fast_Read,
.QspiIf_Arc_ReadBuffer = ReadBuffer ,
.QspiIf_Arc_WriteBuffer = WriteBuffer ,
#if (USE_FLS_INFO==STD_ON)
.FlsInfo = flashInfo ,
#endif
.FlsAcErase = 0u,
.FlsAcWrite = 0u,
.FlsMaxReadFastMode = 0x100u,
.FlsMaxReadNormalMode = 0x100u,
.FlsMaxWriteFastMode = 0x100u,
.FlsMaxWriteNormalMode = 0x100u,
#if (FEE_POLLING_MODE == STD_OFF)
.FlsJobEndNotification = Fee_JobEndNotification,
.FlsJobErrorNotification= Fee_JobErrorNotification,
#else
.FlsJobEndNotification = NULL,
.FlsJobErrorNotification= NULL,
#endif
.FlsProtection = 0u,
}
};
|
2301_81045437/classic-platform
|
boards/zynq_zc702/config/Fls_Cfg.c
|
C
|
unknown
| 8,873
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef FLS_CFG_H_
#define FLS_CFG_H_
/** @tagSettings DEFAULT_ARCHITECTURE=ZYNQ */
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=4.1.2 */
/** @file Fls_Cfg.h
* Definitions of configuration parameters for Fls Driver.
*/
#if !(((FLS_SW_MAJOR_VERSION == 2) && (FLS_SW_MINOR_VERSION == 0)) )
#error Fls: Configuration file expected BSW module version to be 2.0.*
#endif
#if !(((FLS_AR_RELEASE_MAJOR_VERSION == 4) && (FLS_AR_RELEASE_MINOR_VERSION == 1)) )
#error Fls: Configuration file expected AUTOSAR version to be 4.1.*
#endif
#define USE_FLS_INFO STD_ON
/* STD container : Fls
* FlsConfigSet 1..*
* FlsGeneral 1
* FlsPublishedInformation 1
*/
/** @req SWS_Fls_00308 */
#include "MemIf_Types.h"
#include "QspiIf.h"
#if defined(USE_FEE)
/** @req SWS_Fls_00262 */
/** @req SWS_Fls_00263 */
#include "Fee_Cbk.h"
#endif
/* FlsGeneral, 3.0 OK */
#define FLS_VARIANT_PB STD_OFF
#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */
#define FLS_BASE_ADDRESS 0x00000000
#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */
#define FLS_COMPARE_API STD_ON
#define FLS_DEV_ERROR_DETECT STD_ON
#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */
#define FLS_GET_JOB_RESULT_API STD_ON
#define FLS_GET_STATUS_API STD_ON
#define FLS_SET_MODE_API STD_OFF /* NO SUPPORT */
#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */
#define FLS_VERSION_INFO_API STD_ON
/* FlsPublishedInformation, 3.0 OK */
#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */
#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */
#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */
#define FLS_ERASE_TIME 0 /* NO SUPPORT */
#define FLS_ERASED_VALUE (uint8)0xff /* NO SUPPORT */
#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */
#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */
#define FLS_WRITE_TIME 0 /* NO SUPPORT */
typedef struct {
uint8 (*QspiIf_Arc_Erase)(uint32, uint32);
uint8 (*QspiIf_Arc_Write)(uint32, uint32);
uint8 (*QspiIf_Arc_Read)(uint32, uint32);
uint8 (*QspiIf_Arc_Fast_Read)(uint32, uint32);
void (*QspiIf_Arc_Init)(void);
/** @req SWS_Fls_00109 */
/** @req SWS_Fls_00110 */
void (*FlsJobEndNotification)();
void (*FlsJobErrorNotification)();
#if (USE_FLS_INFO==STD_ON)
/** @req SWS_Fls_00355 */
const struct Flash *FlsInfo;
#else
const Fls_SectorType *FlsSectorList;
#endif
uint8 *QspiIf_Arc_ReadBuffer;
uint8 *QspiIf_Arc_WriteBuffer;
uint32 FlsAcErase; /* NO SUPPORT */
uint32 FlsAcWrite; /* NO SUPPORT */
// FlsCallCycle N/A in core.
uint32 FlsMaxReadFastMode; /* NO SUPPORT */
uint32 FlsMaxReadNormalMode; /* NO SUPPORT */
uint32 FlsMaxWriteFastMode; /* NO SUPPORT */
uint32 FlsMaxWriteNormalMode; /* NO SUPPORT */
uint32 FlsProtection; /* NO SUPPORT */
} Fls_ConfigSetType;
/** @req SWS_Fls_00368 */
/** @req SWS_Fls_00353 */
/** @req SWS_Fls_00354 */
typedef Fls_ConfigSetType Fls_ConfigType;
typedef struct Flash {
uint32 FlsBaseAddress;
uint32 FlsTotalSize;
uint32 sectCnt;
uint32 bankSize;
uint32 regBase;
uint32 sectAddr[FLASH_NUM_SECTORS];
} FlashType;
extern const Fls_ConfigType FlsConfigSet[1];
#endif /*FLS_CFG_H_*/
|
2301_81045437/classic-platform
|
boards/zynq_zc702/config/Fls_Cfg.h
|
C
|
unknown
| 4,274
|
obj-y += DltUartCom.o
inc-y += $(ROOTDIR)/Cdd/DltUartCom/src
vpath-y += $(ROOTDIR)/Cdd/DltUartCom/src
|
2301_81045437/classic-platform
|
cdd/DltUartCom/mod.mk
|
Makefile
|
unknown
| 107
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "ComStack_Types.h"
#if defined(USE_DLT)
#include "Dlt.h"
#endif
#include "DltUartCom.h"
#include "Uart.h"
/*------------------------------------------------------------------------------------------------*/
/* static functions */
static void dltUartCom_txcbk(void);
static void dltUartCom_rxcbk(uint8 a_Data);
static void dltUartCom_ercbk(uint8 error);
/*------------------------------------------------------------------------------------------------*/
/** \fn void dltUartCom_txcbk(void)
* \brief transmit callback function
*/
static void dltUartCom_txcbk(void) {
/* defined for debug purposes */
}
/*------------------------------------------------------------------------------------------------*/
/** \fn void dltUartCom_rxcbk(uint8 a_Data)
* \brief receive callback function
*
* \param a_Data received data
*/
static void dltUartCom_rxcbk(uint8 a_Data) {
#if defined(USE_DLT)
PduInfoType pdu;
pdu.SduDataPtr = &a_Data;
pdu.SduLength = sizeof(a_Data);
DltCom_ReceiveIndication(DLTUARTCOM_PDU_ID_RX, &pdu);
#endif
}
/*------------------------------------------------------------------------------------------------*/
/** \fn void dltUartCom_ercbk(uint8 error)
* \brief error callback function
*
* \param error error byte extracted from uart register
*/
static void dltUartCom_ercbk(uint8 error) {
(void) error;
/* defined for debug purposes */
}
/** \fn void DltUartCom_Init(void)
* \brief initialize Dltcom for uart
*/
void DltUartCom_Init(void) {
(void) Uart_GetChannel(DLTUARTCOM_CHANNEL, dltUartCom_txcbk, dltUartCom_rxcbk, dltUartCom_ercbk);
}
/*------------------------------------------------------------------------------------------------*/
/** \fn Std_ReturnType DltUartCom_Transmit(PduIdType DltTxPduId, const PduInfoType* PduInfoPtr)
* \brief transmit DLT data via uart
* \param DltTxPduId ID of Dlt I-PDU to be transmitted
* \param PduInfoPtr Pointer to a structure with I-PDU related data that shall be transmitted
* \return E_OK: Transmit request has been accepted
* E_NOT_OK: Transmit request has not been accepted
*/
Std_ReturnType DltUartCom_Transmit(PduIdType DltTxPduId, const PduInfoType* PduInfoPtr) {
Std_ReturnType res = E_NOT_OK;
uint16 size = PduInfoPtr->SduLength;
/* Relay message to UART if it fits into the available buffer space */
if (size <= Uart_GetFreeTransmitData(DLTUARTCOM_CHANNEL, size)) {
Uart_TransmitData(DLTUARTCOM_CHANNEL, size, PduInfoPtr->SduDataPtr);
res = E_OK;
}
return res;
}
|
2301_81045437/classic-platform
|
cdd/DltUartCom/src/DltUartCom.c
|
C
|
unknown
| 3,437
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef DLTCOM_UART_H_
#define DLTCOM_UART_H_
#include "ComStack_Types.h"
#include "DltUartCom_Cfg.h"
/*------------------------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------------------------*/
/* function declarations */
void DltUartCom_Init(void);
Std_ReturnType DltUartCom_Transmit(PduIdType DltTxPduId, const PduInfoType* PduInfoPtr);
#endif
|
2301_81045437/classic-platform
|
cdd/DltUartCom/src/DltUartCom.h
|
C
|
unknown
| 1,226
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef DLTCOM_UART_CFG_H_
#define DLTCOM_UART_CFG_H_
/*------------------------------------------------------------------------------------------------*/
/* UART channel to be used */
#define DLTUARTCOM_CHANNEL (UART_CHANNEL_0)
#define DLTUARTCOM_BUFSIZE (500U)
/*This Pdu Id will be used by lower layer when it calls DltCom_ReceiveIndication */
#define DLTUARTCOM_PDU_ID_RX (0)
#endif
|
2301_81045437/classic-platform
|
cdd/DltUartCom/src/DltUartCom_Cfg.h
|
C
|
unknown
| 1,158
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=NONE */
/** @tagSettings DEFAULT_ARCHITECTURE=RH850F1H|ZYNQ|JACINTO6 */
#ifndef CDD_ETHTRCV_H_
#define CDD_ETHTRCV_H_
#include "EthTrcv_Types.h"
#include "CDD_EthTrcvTypes.h"
#include "CddEthTrcv_Cfg.h"
#define ETHTRCV_MAX_ADDRESS 32u
Std_ReturnType EthTrcv_TransceiverInit (uint8 ctrlIdx);
void EthTrcv_TransceiverLinkUp(uint8 ctrlIdx);
uint8 EthTrcv_FindPhyAdrs (uint8 CtrlIdx);
uint8 EthTrcv_FindConfiguredPhyAdrs(uint8 CtrlIdx);
#endif /* CDD_ETHTRCV_H_ */
|
2301_81045437/classic-platform
|
cdd/EthTrcv/inc/CDD_EthTrcv.h
|
C
|
unknown
| 1,335
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=NONE */
/** @tagSettings DEFAULT_ARCHITECTURE=RH850F1H|ZYNQ|JACINTO6 */
#ifndef CDD_ETHTRCV_TYPES_H_
#define CDD_ETHTRCV_TYPES_H_
#include "Std_Types.h"
typedef struct {
/* Extendable but restricted to these parameters for the moment */
uint8 address;
}EthTrcvAddressType;
typedef struct {
/* Extendable but restricted to these parameters for the moment */
EthTrcvAddressType *TrcvAdrs;
}EthTrcv_ConfigSetType;
#endif /* CDD_ETHTRCV_TYPES_H_ */
|
2301_81045437/classic-platform
|
cdd/EthTrcv/inc/CDD_EthTrcvTypes.h
|
C
|
unknown
| 1,293
|
ifeq ($(BOARDDIR),rh850f1h)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),mpc5748g_mpc574xg_mb)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),mpc5746c_mpc574xg_mb)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),mpc5748g_mpc574xg_mb)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),mpc5777c_mpc57xx_mb)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),jacinto6)
obj-y += CDD_EthTrcv_NonGeneric.o
else ifeq ($(BOARDDIR),s32k148_evbq176)
obj-y += CDD_EthTrcv_NonGeneric.o
else
obj-y += CDD_EthTrcv_Generic.o
endif
obj-$(USE_CDDETHTRCV) += CddEthTrcv_Cfg.o
inc-y += $(ROOTDIR)/communication/EthTrcv/inc
inc-y += $(ROOTDIR)/cdd/EthTrcv/inc
vpath-y += $(ROOTDIR)/cdd/EthTrcv/src
|
2301_81045437/classic-platform
|
cdd/EthTrcv/mod.mk
|
Makefile
|
unknown
| 747
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=NONE */
/** @tagSettings DEFAULT_ARCHITECTURE=ZYNQ */
/* This file Supports only CLAUSE 22 MDIO frame type */
/* This file Supports only one PHY access, no multiple PHY access */
#include "Eth.h"
#include "CDD_EthTrcv.h"
#include "LwIpAdp.h"
#if defined(USE_DET)
#include "Det.h"
#define DET_REPORT_ERROR(_api,_err) (void)Det_ReportError(ETH_MODULE_ID,0,(_api),(_err))
#else
#define DET_REPORT_ERROR(_api,_err)
#endif
#define BMCR_REGISTER 0u
#define BMSR_REGISTER 1u
#define PHY_IDR1 2u
#define PHY_IDR2 3u
#define AUTONEG_ADVERTISE_REGISTER 4u
#define PHY_SOFT_RESET 0x8000u
#define AUTONEG_RESTART 0x0200u
#define ENABLE_AUTO_NEGOTIATION 0x1000u
#define ENABLE_100MBPS_DUPLEX 0x2100u
#define AUTO_NEG_COMPLETE 0x0020u
#define RGMII_TXRX_CLK_DELAY 0x0030
#define ASYMMETRIC_PAUSE 0x0800
#define PAUSE 0x0400
#define LINKSPEED_1000MBPS 0x0040
#define LINKSPEED_100MBPS 0x2000
#define LINKSPEED_10MBPS 0x0000
#define LINK_STATUS 0x0004u
static uint8 PhyAddress = ETHTRCV_MAX_ADDRESS; /* Invalid address or Phy is not initialised in this context */
static LinkState linkStatus = NO_LINK;
/**
* Fetch PHY address:: mock up function for ETH tranciever
* @param ctrlIdx
* @return phyAddr
*/
uint8 EthTrcv_FindPhyAdrs(uint8 CtrlIdx)
{
uint8 phyAddr;
for (phyAddr = 0; phyAddr < ETHTRCV_MAX_ADDRESS; phyAddr++) {
uint8 Status;
uint16 Reg1;
uint16 Reg2;
Status = Eth_ReadMii(CtrlIdx,phyAddr, PHY_IDR1, &Reg1);
Status |= Eth_ReadMii(CtrlIdx,phyAddr, PHY_IDR2, &Reg2); /* change it */
if ((Status == ETH_OK) &&
(Reg1 > 0x0000) && (Reg1 < 0xffff) &&
(Reg2 > 0x0000) && (Reg2 < 0xffff)) {
return phyAddr;
}
}
return phyAddr;
}
/**
* Fetch PHY address from the configuration
* @param CtrlIdx
* @return phyAddr
*/
#if (STD_OFF == ETHTRCV_AUTO_FIND_ADDRESS)
uint8 EthTrcv_FindConfiguredPhyAdrs(uint8 CtrlIdx)
{
for(uint32 i = 0; i < ETHTRCV_ADDRESS_CNT; i++){
uint8 Status;
uint16 Reg1;
uint16 Reg2;
Status = Eth_ReadMii(CtrlIdx,EthTrcvConfigSet.TrcvAdrs[i].address, 2, &Reg1);
Status |= Eth_ReadMii(CtrlIdx,EthTrcvConfigSet.TrcvAdrs[i].address, 3, &Reg2); /* change it */
if ((Status == ETH_OK) &&
(Reg1 > 0x0000) && (Reg1 < 0xffff) &&
(Reg2 > 0x0000) && (Reg2 < 0xffff)) {
return EthTrcvConfigSet.TrcvAdrs[i].address;
}
}
return ETHTRCV_MAX_ADDRESS;
}
#endif
/**
* Link Setting up - Needed to be called from a cyclic routine
* precondition - phyAddress is valid
* @param CtrlIdx
* @return
*/
void EthTrcv_TransceiverLinkUp(uint8 CtrlIdx)
{
if(PhyAddress != ETHTRCV_MAX_ADDRESS){
uint16 statusValue = 0;
if(linkStatus == NO_LINK)
{
(void)EthTrcv_TransceiverInit(CtrlIdx);
}
Eth_ReadMii(CtrlIdx,PhyAddress,BMSR_REGISTER,&statusValue);
if((statusValue & LINK_STATUS ) != LINK_STATUS){
linkStatus = LINK_UP;
}else{
linkStatus = LINK_DOWN;
}
LwIpAdp_LinkStateUpdate(linkStatus);
}else{
(void)EthTrcv_TransceiverInit(CtrlIdx);
}
}
/**
* @brief Mock up function for ETH Tranceiver : Initialise tranciever required
* @param ctrlIdx
* @retval Std_ReturnType
*/
Std_ReturnType EthTrcv_TransceiverInit(uint8 CtrlIdx)
{
uint16 phyStatus;
uint16 regValue;
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, PHY_SOFT_RESET);
for(volatile uint16 i=0; i <100u; i++){};
#if (STD_OFF == ETHTRCV_AUTO_FIND_ADDRESS)
PhyAddress = EthTrcv_FindConfiguredPhyAdrs(CtrlIdx);
#else
PhyAddress = EthTrcv_FindPhyAdrs(CtrlIdx);
#endif
if(PhyAddress == ETHTRCV_MAX_ADDRESS){ /* Could still not find the Phy connected */
return E_NOT_OK;
}
enum{
ETH_SPEED_10MBPS,
ETH_SPEED_100MBPS,
ETH_SPEED_1000MBPS
};
uint16 speed = ETH_SPEED_100MBPS;
Eth_ReadMii(CtrlIdx, PhyAddress, BMCR_REGISTER, ®Value);
regValue &= ~LINKSPEED_1000MBPS;
regValue &= ~LINKSPEED_100MBPS;
regValue &= ~LINKSPEED_10MBPS;
if(speed == ETH_SPEED_100MBPS) {
regValue |= LINKSPEED_100MBPS;
}
else if (speed == ETH_SPEED_1000MBPS) {
regValue |= LINKSPEED_1000MBPS;
}
else {
regValue |= LINKSPEED_10MBPS;
}
#if (ETHTRCV_AUTO_NEGOTIATE == STD_OFF)
regValue &= ~ENABLE_AUTO_NEGOTIATION; // Disable AN
#else
Eth_WriteMii( CtrlIdx,PhyAddress, 9, 0); /* Dont advertise PHY speed of 1000 Mbps */
Eth_WriteMii(CtrlIdx,PhyAddress, AUTONEG_ADVERTISE_REGISTER, 0x0100 |0x00E0); // advertise 100mbps and 10mbps
regValue = regValue | AUTONEG_RESTART | ENABLE_AUTO_NEGOTIATION; // Enable AN & Restart autoneg
#endif
#ifdef CFG_ETHTRCV_PHYLOOPBACK /* physical line test, set in build_config for use */
regValue &= ~ENABLE_AUTO_NEGOTIATION; // disable AN
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, (regValue | 0x6100)); // loopback with speed 100
#endif
Eth_WriteMii(CtrlIdx,PhyAddress,BMCR_REGISTER, regValue);
#if (ETHTRCV_AUTO_NEGOTIATE == STD_ON)
do{
// Wait for Auto-Neg complete and link status flag
Eth_ReadMii(CtrlIdx,PhyAddress,BMSR_REGISTER,&phyStatus);
}while ((phyStatus & (AUTO_NEG_COMPLETE | LINK_STATUS)) != (AUTO_NEG_COMPLETE | LINK_STATUS));
#else
do{
// Wait for link status flag
Eth_ReadMii(CtrlIdx,PhyAddress,BMSR_REGISTER,&phyStatus);
}while ((phyStatus & LINK_STATUS )!= LINK_STATUS);
#endif
linkStatus = LINK_UP;
LwIpAdp_LinkStateUpdate(LINK_UP);
return E_OK;
}
|
2301_81045437/classic-platform
|
cdd/EthTrcv/src/CDD_EthTrcv_Generic.c
|
C
|
unknown
| 6,773
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=NONE */
/** @tagSettings DEFAULT_ARCHITECTURE=RH850F1H|JACINTO6|MPC5748G */
/* This file Supports only CLAUSE 22 MDIO frame type */
/* This file Supports only one PHY access, no multiple PHY access */
#include "Eth.h"
#include "CDD_EthTrcv.h"
#if defined(CFG_JAC6)
#include "Eth_jacinto.h" /* Can directly access the ETH registers for the link status in J6 */
#endif
#include "LwIpAdp.h"
#if defined(USE_DET)
#include "Det.h"
#define DET_REPORT_ERROR(_api,_err) (void)Det_ReportError(ETH_MODULE_ID,0,(_api),(_err))
#else
#define DET_REPORT_ERROR(_api,_err)
#endif
#define BMCR_REGISTER 0u
#define BMSR_REGISTER 1u
#define PHY_IDR1 2u
#define PHY_IDR2 3u
#define AUTONEG_ADVERTISE_REGISTER 4u
#define PHY_SOFT_RESET 0x8000u
#define ENABLE_AUTO_NEGOTIATION 0x1000u
#define ENABLE_100MBPS_DUPLEX 0x2100u
#define AUTO_NEG_COMPLETE 0x0020u
#if defined(CFG_ETH_PHY_DP83848C)
#define PHY_STATUS_REGISTER 0x10u
#define PHY_STATUS_LINK 0x0001u
#define PHY_STATUS_NO_AUTO_100 0x0005u
#define PHY_STATUS_LOOPBACK 0x0008u
#elif defined (CFG_ETH_PHY_TJA1100)
#define PHY_STATUS_REGISTER 0x01u
#define PHY_EXTENDED_STATUS_REGISTER 15u
#define PHY_EXTENDED_CONTROL_REGISTER 17u
#define PHY_CONFIG_REGISTER1 18u
#define PHY_STATUS_LINK 0x0004u
#define PHY_STATUS_NO_AUTO_100 0xE600u /*100BASE-T4,100BASE-X_FD,100BASE-X_HD,100BASE-T2_FD,100BASE-T2_HD*/
#define PHY_EXTENDED_STATUS_NO_AUTO_100 0x0080u
#define PHY_CONFIG_EN_BIT (2u)
#define PHY_CONFIG_MASTER_SLAVE_BIT (15u)
#else /* CFG_ETH_PHY_DP83865 */
#define PHY_STATUS_REGISTER 0x11u
#define PHY_STATUS_LINK 0x0004u
#define PHY_STATUS_NO_AUTO_100 0x000Eu
#define PHY_STATUS_LOOPBACK 0x0040u
#define RGMII_INBAND_STATUS_EN 0x0100U
#endif
/* CLAUSE 45 access via CLAUSE 22 reserved registers */
#define PHY_MMD_ACCESS_CTRL_REG 13u
#define PHY_MMD_ACCESS_ADRS_REG 14u
/* For MMD access control register */
#define PHY_MMD_DEVAD_MASK 0x001Fu
#define PHY_MMD_FUNCTION_ADDRESS_SHIFT 14u
#define PHY_MMD_FUNCTION_ADDRESS 00u
#define PHY_MMD_FUNCTION_DATA_NO_POST_INC 01u
#define PHY_MMD_FUNCTION_DATA_POST_INC_RW 02u
#define PHY_MMD_FUNCTION_DATA_POST_INC_W 03u
/* MMD addresses */
#define PHY_MMD_RESERVED1 00u
#define PHY_MMD_PMA_PMD 01u
#define PHY_MMD_WIS 02u
#define PHY_MMD_PCS 03u
#define PHY_MMD_COM_MAC 04u /* PHY_MMD_PHY_XS */
#define PHY_MMD_DTE_XS 05u
#define PHY_MMD_TC 06u
#define PHY_MMD_AUTONEG 07u
#define PHY_MMD_CLAUSE22_EXT 29u
#define PHY_MMD_VENDOR_SPECIFIC_1 30u
#define PHY_MMD_VENDOR_SPECIFIC_2 31u
/* MMD PMA/PMD register space */
#define PHY_PMA_PMD_CONTROL1 00u
#define PHY_PMA_PMD_STATUS1 01u
#define PHY_PMA_PMD_DEV_IDENTIFIER1 02u
#define PHY_PMA_PMD_DEV_IDENTIFIER2 03u
#define PHY_PMA_PMD_100BASET1_CONTROL (0x0834)
#define PHY_PMA_PMD_100BASET1_TMODE_CONTROL (0x0836)
#define PHY_PMA_PMD_10MBPS 00u
#define PHY_PMA_PMD_100MBPS 01u
#define PHY_PMA_PMD_1000MBPS 02u
#define PHY_PMA_PMD_100BASET1_MASTER (1<<14)
#define PHY_PMA_PMD_TMODE_NORMAL_OPN (0)
/* MMD COM PORT register space */
#define PHY_COM_PORT_CONTROL_REG (0x0800)
/* MMD CONTROL register space */
#define PHY_PCS_COPPER_CONTROL 00u
#define PHY_100BASET1_STATUS1 (0x8008)
#define PHY_100BASET1_STATUS2 (0x8009)
#define PHY_POWER_DOWN (1<<11)
/* MMD AUTO NEGOTIATION space */
#define PHY_AUTONEG_CONTROL (0x0200)
#define PHY_AUTONEG_STATUS (0x0201)
#define PHY_AUTONEG_ADV_REG1 (0x0202)
#define PHY_AUTONEG_ADV_REG2 (0x0203)
#define PHY_AUTONEG_ENABLE (1u<<12)
#define PHY_RESTART_AUTONEG (1u<<9)
#define PHY_AUTO_NEG_MASTER (1<<4)
#define PHY_COMMON_CONTROL_REG (0x0000) /* Control register for device PMA/PMD and PCS */
#ifdef CFG_BRD_ZYNQ_ZC702
#define PORT_MIO_52 0xF80007D0
#define PORT_MIO_53 0xF80007D4
#endif
#if defined(CFG_JAC6)
#define GMAC_SW_MDIO_LINKSEL 0x00000080U
#define GMAC_SW_MDIO_LINKINTENB 0x00000040U
#define GMAC_SW_MDIO_PHYADDRMON_MASK 0x0000001FU
static GmacSw_HwRegType * const hwPtr = (GmacSw_HwRegType*) GMAC_SW_BASE;
#endif
/* PHY device - MARVELL-88E1111 */
#define RGMII_TXRX_CLK_DELAY 0x0030
#define ASYMMETRIC_PAUSE 0x0800
#define PAUSE 0x0400
#define LINKSPEED_1000MBPS 0x0040
#define LINKSPEED_100MBPS 0x2000
#define LINKSPEED_10MBPS 0x0000
/* Max wait cycles for actions to occur in busy wait***** */
#define ETH_MAX_BUSY_WAIT_CYCLES (uint32)1000
#define ETH_MDIO_WAIT_CYCLES 50u
/* Macro for busy waiting for a while */
#define BUSY_WAIT_A_WHILE(_regPtr, _mask, _val, _retPtr)\
*(_retPtr) = E_NOT_OK;\
for( uint32 i = 0; i < ETH_MAX_BUSY_WAIT_CYCLES; i++) {\
if( (*(_regPtr) & (_mask)) == (_val) ) {\
*(_retPtr) = E_OK;\
break;\
}\
}\
static uint8 PhyAddress = ETHTRCV_MAX_ADDRESS; /* Invalid address or Phy is not initialised in this context */
static LinkState linkStatus = NO_LINK;
static boolean bMdioClause45 = FALSE;
static Eth_ReturnType readMii45(uint8 CtrlIdx, uint8 Device, uint16 RegIdx, uint16* RegValPtr);
static Eth_ReturnType writeMii45(uint8 CtrlIdx,uint8 Device,uint16 RegIdx, uint16 RegVal);
/**
* Makes Soft reset on the required MMD
* @param CtrlIdx
* @param Device
* @return void
*/
static void softReset(uint8 CtrlIdx, uint8 Device) /* Device can be 1,3,4,7 */{
uint16 regAddr = 0x0000;
uint16 regData = 0;
if (Device == PHY_MMD_AUTONEG){
regAddr = PHY_AUTONEG_CONTROL; /* soft reset for T unit */
}else if (Device == PHY_MMD_COM_MAC){
/* soft reset outside Copper PCS , that means reset for RGMII/RMII */
regAddr = PHY_COM_PORT_CONTROL_REG;
}else{
regAddr = PHY_COMMON_CONTROL_REG; /* affects all - dev1,dev3 and dev7 */
}
(void) readMii45(CtrlIdx, Device, regAddr, ®Data);
regData = regData | PHY_SOFT_RESET; //bits 15 for reset
(void) writeMii45(CtrlIdx, Device, regAddr,regData);
(void) readMii45(CtrlIdx, Device, regAddr, ®Data);
while ((regData & PHY_SOFT_RESET) == PHY_SOFT_RESET) {
(void) readMii45(CtrlIdx, Device, regAddr, ®Data);
}
}
/**
* Reads a IEEE 803.u clause 45 compliant transceiver register via IEEE 803.u clause 22
* Clause 22 STA <------ Clause 45 MMD
* @param CtrlIdx
* @param Device
* @param RegIdx
* @param RegValPtr
*/
static Eth_ReturnType readMii45(uint8 CtrlIdx, uint8 Device, uint16 RegIdx, uint16* RegValPtr){
uint8 status;
uint16 reg = 0u;
reg = Device | (PHY_MMD_FUNCTION_ADDRESS << PHY_MMD_FUNCTION_ADDRESS_SHIFT);
status = Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_CTRL_REG, reg);
status |= Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_ADRS_REG, RegIdx);
reg = Device | (PHY_MMD_FUNCTION_DATA_NO_POST_INC << PHY_MMD_FUNCTION_ADDRESS_SHIFT);
status |= Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_CTRL_REG, reg);
status |= Eth_ReadMii (CtrlIdx,PhyAddress, PHY_MMD_ACCESS_ADRS_REG, RegValPtr);
if (status != ETH_OK) {
DET_REPORT_ERROR(ETH_GLOBAL_ID, ETH_E_READ_MII_FAIL);
}
return status;
}
/**
* Writes in to a IEEE 803.u clause 45 compliant transceiver register via IEEE 803.u clause 22
* Clause 22 STA ------> Clause 45 MMD
* @param CtrlIdx
* @param Device
* @param RegIdx
* @param RegVal
*/
static Eth_ReturnType writeMii45(uint8 CtrlIdx,uint8 Device,uint16 RegIdx, uint16 RegVal){
uint8 status;
uint16 reg = 0u;
reg = Device | (PHY_MMD_FUNCTION_ADDRESS << PHY_MMD_FUNCTION_ADDRESS_SHIFT);
status = Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_CTRL_REG, reg);
status |= Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_ADRS_REG, RegIdx);
reg = Device | (PHY_MMD_FUNCTION_DATA_NO_POST_INC << PHY_MMD_FUNCTION_ADDRESS_SHIFT);
status |= Eth_WriteMii(CtrlIdx,PhyAddress, PHY_MMD_ACCESS_CTRL_REG, reg);
status |= Eth_WriteMii (CtrlIdx,PhyAddress, PHY_MMD_ACCESS_ADRS_REG, RegVal);
if (status != ETH_OK) {
DET_REPORT_ERROR(ETH_GLOBAL_ID, ETH_E_WRITE_MII_FAIL);
}
return status;
}
/**
* Finds dynamically if the PHY is Clause 45 MDIO compliant or not
* @param CtrlIdx
* @return boolean
*/
static boolean isMdioClause45(uint8 CtrlIdx){
uint8 status;
uint16 reg1 = 0u;
uint16 reg2 = 0u;
boolean ret = TRUE;
status = Eth_ReadMii(CtrlIdx,PhyAddress, PHY_IDR1, ®1);
status |= Eth_ReadMii(CtrlIdx,PhyAddress, PHY_IDR2, ®2);
if ((status == ETH_OK) &&
(reg1 > 0x0000) && (reg1 < 0xffff) &&
(reg2 > 0x0000) && (reg2 < 0xffff)) {
ret = FALSE;
}
return ret;
/* , for clause 45 read - let it be here
status = readMii45(CtrlIdx,PHY_MMD_PMA_PMD,PHY_IDR1, ®1);
status |= readMii45(CtrlIdx,PHY_MMD_PMA_PMD,PHY_IDR2, ®2);
if ((reg1 > 0x0000) && (reg1 < 0xffff) &&
(reg2 > 0x0000) && (reg2 < 0xffff)) {
return TRUE;
}
*/
}
/**
* Fetch PHY address:: mock up function for ETH tranciever
* @param ctrlIdx
* @return phyAddr
*/
uint8 EthTrcv_FindPhyAdrs(uint8 CtrlIdx)
{
uint8 phyAddr;
for (phyAddr = 0; phyAddr < ETHTRCV_MAX_ADDRESS; phyAddr++) {
#if !defined(CFG_JAC6)
uint8 Status;
uint16 Reg1;
uint16 Reg2;
Status = Eth_ReadMii(CtrlIdx,phyAddr, PHY_IDR1, &Reg1);
Status |= Eth_ReadMii(CtrlIdx,phyAddr, PHY_IDR2, &Reg2); /* change it */
if ((Status == ETH_OK) &&
(Reg1 > 0x0000) && (Reg1 < 0xffff) &&
(Reg2 > 0x0000) && (Reg2 < 0xffff)) {
return phyAddr;
}
#else
for(uint32 i = 0; i < ETH_MDIO_WAIT_CYCLES; i++); /* Provide some time for MDIO module to find the PHYs available */
if(hwPtr->MDIO.MDIO_ALIVE & (0x1u << phyAddr)){
return phyAddr;
}
#endif
}
return phyAddr;
}
/**
* Fetch PHY address from the configuration
* @param CtrlIdx
* @return phyAddr
*/
#if (STD_OFF == ETHTRCV_AUTO_FIND_ADDRESS)
uint8 EthTrcv_FindConfiguredPhyAdrs(uint8 CtrlIdx)
{
for(uint32 i = 0; i < ETHTRCV_ADDRESS_CNT; i++){
#if !defined(CFG_JAC6)
uint8 Status;
uint16 Reg1;
uint16 Reg2;
Status = Eth_ReadMii(CtrlIdx,EthTrcvConfigSet.TrcvAdrs[i].address, 2, &Reg1);
Status |= Eth_ReadMii(CtrlIdx,EthTrcvConfigSet.TrcvAdrs[i].address, 3, &Reg2); /* change it */
if ((Status == ETH_OK) &&
(Reg1 > 0x0000) && (Reg1 < 0xffff) &&
(Reg2 > 0x0000) && (Reg2 < 0xffff)) {
return EthTrcvConfigSet.TrcvAdrs[i].address;
}
#else
for(uint32 i = 0; i < ETH_MDIO_WAIT_CYCLES; i++); /* Provide some time for MDIO module to find the PHYs available */
if(hwPtr->MDIO.MDIO_ALIVE & (0x1u << EthTrcvConfigSet.TrcvAdrs[i].address)){
return EthTrcvConfigSet.TrcvAdrs[i].address;
}
#endif
}
return ETHTRCV_MAX_ADDRESS;
}
#endif
/**
* Link Setting up - Needed to be called from a cyclic routine
* precondition - phyAddress is valid
* @param CtrlIdx
* @return
*/
void EthTrcv_TransceiverLinkUp(uint8 CtrlIdx)
{
if(PhyAddress != ETHTRCV_MAX_ADDRESS){
uint16 statusValue = 0;
#if !defined(CFG_JAC6)
uint16 regValue;
if(linkStatus == NO_LINK)
{
/* Set auto neg advert register */
(void)Eth_WriteMii(CtrlIdx,PhyAddress, AUTONEG_ADVERTISE_REGISTER, 0x01e1);
// Enable and start auto-negotiation
Eth_ReadMii(CtrlIdx,PhyAddress,BMCR_REGISTER, ®Value);
Eth_WriteMii(CtrlIdx,PhyAddress,BMCR_REGISTER, (regValue | 0x1200));
linkStatus = AUTONEGOTIATE_RESTART;
}
// Wait for Auto-Neg complete flag
Eth_ReadMii(CtrlIdx,PhyAddress,BMSR_REGISTER,&statusValue);
if((statusValue & AUTO_NEG_COMPLETE )== AUTO_NEG_COMPLETE){
linkStatus = AUTONEGOTIATE_COMPLETE;
}
Eth_ReadMii(CtrlIdx,PhyAddress,PHY_STATUS_REGISTER,&statusValue);
if((statusValue & PHY_STATUS_LINK ) != 0){
linkStatus = LINK_UP;
}else{
linkStatus = LINK_DOWN;
}
LwIpAdp_LinkStateUpdate(linkStatus);
#else
if (bMdioClause45 == FALSE){
Eth_ReadMii(CtrlIdx,PhyAddress,PHY_STATUS_REGISTER,&statusValue);
}else{
/* for Marvell 88Q1010 */
(void)readMii45(CtrlIdx,PHY_MMD_PCS,PHY_100BASET1_STATUS2, &statusValue);
}
if((statusValue & PHY_STATUS_LINK ) != 0){
linkStatus = LINK_UP;
}else{
linkStatus = LINK_DOWN;
}
LwIpAdp_LinkStateUpdate(linkStatus);
#endif
}else{
PhyAddress = EthTrcv_FindPhyAdrs(CtrlIdx);
if(PhyAddress != ETHTRCV_MAX_ADDRESS){
(void)EthTrcv_TransceiverInit(CtrlIdx);
}
}
}
/**
* @brief Mock up function for ETH Tranceiver : Initialise tranciever required
* @param ctrlIdx
* @retval Std_ReturnType
*/
Std_ReturnType EthTrcv_TransceiverInit(uint8 CtrlIdx)
{
uint16 phyStatus;
volatile uint32 timeout;
#if defined(CFG_ETH_PHY_TJA1100)
uint16 extdPhyStatus;
#endif
uint16 regValue;
#if (STD_OFF == ETHTRCV_AUTO_FIND_ADDRESS)
PhyAddress = EthTrcv_FindConfiguredPhyAdrs(CtrlIdx);
#else
PhyAddress = EthTrcv_FindPhyAdrs(CtrlIdx);
#endif
if(PhyAddress == ETHTRCV_MAX_ADDRESS){ /* Could still not find the Phy connected */
return E_NOT_OK;
}
#if defined(CFG_JAC6) /* otherwise it is always MDIO clause 22 */
bMdioClause45 = isMdioClause45(CtrlIdx);
#endif
/* Wait for completion, this is just a precaution to avoid hanging systems waiting for transceiver inits to finish. */
timeout = 100000;
/* Reset phy */
if(bMdioClause45 == FALSE){
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, PHY_SOFT_RESET);
for(volatile uint16 i=0; i <10u; i++){};
} else {
/* Init phy */
(void) writeMii45(CtrlIdx, PHY_MMD_PCS, 0xFA0C, 0x5);
(void) writeMii45(CtrlIdx, PHY_MMD_PCS, 0xFB04, 0x81);
(void) writeMii45(CtrlIdx, PHY_MMD_PCS, 0x8000, 0x201); /* PCS auto correct polarity and Disable Jabber function */
/* Soft reset */
softReset(CtrlIdx, PHY_MMD_PCS);
}
#if !defined(CFG_S32K148)
#if defined(CFG_JAC6) && (ETHTRCV_AUTO_NEGOTIATE == STD_OFF)/* ETH_NO_AUTO_NEG */
/* No link check done via these registers
hwPtr->MDIO.MDIO_USERPHYSEL0 |= GMAC_SW_MDIO_LINKSEL;
hwPtr->MDIO.MDIO_USERPHYSEL0 |= (GMAC_SW_MDIO_PHYADDRMON_MASK & PhyAddress);
*/
if(bMdioClause45 == FALSE){
(void)Eth_ReadMii (CtrlIdx,PhyAddress, BMCR_REGISTER, ®Value);
regValue &= ~ENABLE_AUTO_NEGOTIATION; // disable AN
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, (regValue | ENABLE_100MBPS_DUPLEX));
for(volatile uint16 i=0; i < ETH_MDIO_WAIT_CYCLES; i++){};
do
{
for(volatile uint16 i=0; i < ETH_MDIO_WAIT_CYCLES; i++){};
if ((timeout--) == 0) {
return E_NOT_OK;
}
Eth_ReadMii(CtrlIdx,PhyAddress, PHY_STATUS_REGISTER, &phyStatus);
#if defined (CFG_ETH_PHY_TJA1100)
Eth_ReadMii(CtrlIdx,PhyAddress, PHY_EXTENDED_STATUS_REGISTER, &extdPhyStatus);
#endif
}while
#if !defined (CFG_ETH_PHY_TJA1100)
((phyStatus & PHY_STATUS_NO_AUTO_100) != PHY_STATUS_NO_AUTO_100);
#else
(((phyStatus & PHY_STATUS_NO_AUTO_100) == 0u) && ((extdPhyStatus & PHY_EXTENDED_STATUS_NO_AUTO_100) != PHY_EXTENDED_STATUS_NO_AUTO_100));
#endif
}else{
/* for Marvell 88Q1010 */
#if (ETHTRCV_AUTO_NEGOTIATE == STD_ON)
#if 0
(void)writeMii45(CtrlIdx,PHY_MMD_AUTONEG,PHY_AUTONEG_ADV_REG2,(1 << 4)); /* not required - advertise master or use it from HW strapping */
#endif
/* Use auto negotiation */
(void)readMii45 (CtrlIdx,PHY_MMD_AUTONEG,PHY_AUTONEG_CONTROL, ®Value);
regValue |= PHY_AUTONEG_ENABLE;
(void)writeMii45(CtrlIdx,PHY_MMD_AUTONEG,PHY_AUTONEG_CONTROL, regValue);
do{
if ((timeout--) == 0) {
return E_NOT_OK;
}
if (readMii45(CtrlIdx,PHY_MMD_AUTONEG,PHY_AUTONEG_STATUS, &phyStatus) != 0) {
return E_NOT_OK;
}
if(phyStatus == 0xffff){
return E_NOT_OK;
}
}while ((phyStatus & (AUTO_NEG_COMPLETE | PHY_STATUS_LINK)) != (AUTO_NEG_COMPLETE | PHY_STATUS_LINK)); /* wait until it is complete */
/* link needs to be available */
#else
/* Configuration is from HW strapping */
/* check 3.8008 for the status of master or slave */
#endif
}
#else //CFG_JAC6 (ETH_NO_AUTO_NEG) else
/* Set auto neg advert register */
(void)Eth_WriteMii(CtrlIdx,PhyAddress, AUTONEG_ADVERTISE_REGISTER, 0x01e1);
/* enable auto-negotiation */
(void)Eth_ReadMii (CtrlIdx,PhyAddress, BMCR_REGISTER, ®Value);
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, (regValue | 0x1200));
do {
for(volatile uint16 i=0; i < 1000; i++){
}
if ((timeout--) == 0) {
return E_NOT_OK;
}
if (Eth_ReadMii(CtrlIdx,PhyAddress, BMSR_REGISTER, &phyStatus) != 0) {
return E_NOT_OK;
}
if(phyStatus == 0xffff){
return E_NOT_OK;
}
} while (!(phyStatus & AUTO_NEG_COMPLETE)); // Should be 0x786D
#endif //CFG_JAC6(ETH_NO_AUTO_NEG) end
#endif
#ifdef CFG_ETHTRCV_PHYLOOPBACK /* physical line test, set in build_config for use */
(void)Eth_ReadMii (CtrlIdx,PhyAddress, BMCR_REGISTER, ®Value);
regValue &= ~ENABLE_AUTO_NEGOTIATION; // disable AN
(void)Eth_WriteMii(CtrlIdx,PhyAddress, BMCR_REGISTER, (regValue | 0x6100)); // loopback with speed 100
do
{
for(volatile uint16 i=0; i < 1000; i++){};
if ((timeout--) == 0) {
return E_NOT_OK;
}
Eth_ReadMii(CtrlIdx,PhyAddress, PHY_STATUS_REGISTER, &phyStatus);
}while (!(phyStatus & PHY_STATUS_LOOPBACK));
#endif /* ETH_PHYLOOPBACK physical line test */
linkStatus = LINK_UP;
LwIpAdp_LinkStateUpdate(LINK_UP);
return E_OK;
}
|
2301_81045437/classic-platform
|
cdd/EthTrcv/src/CDD_EthTrcv_NonGeneric.c
|
C
|
unknown
| 19,417
|
#CDD_LinSlv
obj-$(USE_CDD_LINSLV) += CDD_LinSlv.o
obj-$(USE_CDD_LINSLV) += CDD_LinSlv_Internal.o
obj-$(USE_CDD_LINSLV) += CDD_LinSlv_Cfg.o
inc-$(USE_CDD_LINSLV) += $(ROOTDIR)/cdd/LinSlv/src/
vpath-$(USE_CDD_LINSLV) += $(ROOTDIR)/cdd/LinSlv/src
vpath-$(USE_CDD_LINSLV) += $(ROOTDIR)/cdd/LinSlv/src/$(ARCH_FAM)
|
2301_81045437/classic-platform
|
cdd/LinSlv/cdd_linslv.mod.mk
|
Makefile
|
unknown
| 314
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=4.1.2 */
/** @tagSettings DEFAULT_ARCHITECTURE=MPC5645S */
/* @req CDD_LinSlv_00001 The sum of all functionality of the module fulfills the LIN 2.1 specification */
/* @req CDD_LinSlv_00003 Supports the LinFlex hardware */
/* @req CDD_LinSlv_00008 If an error is found it will return */
/* @req CDD_LinSlv_00010 Input parameters of public functions have DET validation */
/* ----------------------------[includes]------------------------------------*/
#include "Lin.h"
#include "LinIf.h"
#include "CDD_LinSlv.h"
#include "CDD_LinSlv_Internal.h"
#include "PduR_CDD_LinSlvIf.h"
#if defined(USE_DET)
#include "Det.h"
#endif
/* ----------------------------[private define]------------------------------*/
#if defined(CFG_MPC5645S)
#define LIN_FLEX
#endif
#define LINSLV_MAX_MSG_LENGTH 8
#define NAD_IDX 0u
#define PCI_IDX 1u
#define SID_IDX 2u
#define ID_IDX 3u
#define MASK_PCI_SF_MAX (uint8)0x06u
#define MASK_GO_TO_SLEEP (uint8)0x00u
#define MASK_WILDCARD_NAD (uint8)0x7Fu
#define MASK_FUNCTIONAL_NAD (uint8)0x7E
#define MASK_BROADCAST_NAD MASK_WILDCARD_NAD
#define MASK_SID_ASSIGN_FRAME_ID_RANGE (uint8)0xB7u
#define MASK_SID_READ_BY_IDENTIFIER (uint8)0xB2u
#define WILDCARD_SUPPLIER_LSB (uint8)0xFFu
#define WILDCARD_SUPPLIER_MSB (uint8)0x7Fu
#define WILDCARD_FUNCTION_LSB (uint8)0xFFu
#define WILDCARD_FUNCTION_MSB (uint8)0xFFu
#define ID_MSB_BYTE(_x) ((uint8)(((_x) >> 8u) & 0xFFu))
#define ID_LSB_BYTE(_x) ((uint8)((_x) & 0xFFu))
#define ID_SUPPLIER_LSB_IDX 4u
#define ID_SUPPLIER_MSB_IDX 5u
#define ID_FUNCTION_LSB_IDX 6u
#define ID_FUNCTION_MSB_IDX 7u
#define AFBI_IDX_IDX 3u
#define AFBI_DONT_CARE (uint8)0xFFu
#define AFBI_MAX_NBR_ASSIGNMENTS 4u
#define AFBI_PID_START_IDX 4u
/* ----------------------------[private macro]-------------------------------*/
/* Development error macros. */
/* @req CDD_LinSlv_00009 */
#if ( LINSLV_DEV_ERROR_DETECT == STD_ON )
#define VALIDATE(_exp,_api,_err ) \
if( !(_exp) ) { \
(void)Det_ReportError(CDD_LINSLV_MODULE_ID,0,_api,_err); \
return; \
}
#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \
if( !(_exp) ) { \
(void)Det_ReportError(CDD_LINSLV_MODULE_ID,0,_api,_err); \
return (_rv); \
}
#else
#define VALIDATE(_exp,_api,_err )
#define VALIDATE_W_RV(_exp,_api,_err,_rv )
#endif
/* ----------------------------[private typedef]-----------------------------*/
typedef enum {
CONFIGURED_NAD,
FUNCTIONAL_NAD,
BROADCAST_NAD,
GO_TO_SLEEP_NAD,
INVALID_NAD
}LinSlvNadType;
typedef enum {
SID_ASSIGN_FRAME_BY_ID,
SID_READ_BY_IDENTIFIER,
SID_GO_TO_SLEEP,
SID_INVALD,
}LinSlvSidType;
/* ----------------------------[private function prototypes]-----------------*/
static void timeOutMonitor(uint8 Channel);
static void sleepCalloutCheck(uint8 Channel);
void receivedNewTpRequest(uint8 Channel, const uint8 *buffer);
void safeCopyData(uint8 Channel);
boolean handleTpRequest(uint8 Channel);
void parseTpRequest(uint8 Channel, const uint8 *tpFrame, LinSlvNadType *nadCaller, boolean *pciOk, LinSlvSidType *reqService);
Std_ReturnType handleTpReadById(uint8 Channel, const uint8 *tpFrame);
Std_ReturnType handleTpAssignFrameById(uint8 Channel, const uint8 *tpFrame);
void setSafeTpResponse(uint8 Channel, const uint8 *tpFrame);
void handleSrfTimeOut(uint8 Channel, boolean newSrfSet);
void handleWakeUpNotification(uint8 Channel);
/* ----------------------------[private variables]---------------------------*/
static LinSlv_ContainerType LinSlv_Cfg = {0}; /*lint !e910 Set all members to 0*/
static Lin_DriverStatusType LinSlvDriverStatus = LIN_UNINIT;
static boolean txConfIsExpected[LINSLV_CHANNEL_CNT] = {0};
static const LinIf_FrameType *lastTransmittedFrame[LINSLV_CHANNEL_CNT] = {0}; /*lint !e910 Set all members to 0*/
static uint8 Response_error[LINSLV_CHANNEL_CNT] = {0}; /* As named in the Lin specification */
static boolean wakeUpSet[LINSLV_CHANNEL_CNT] = {0};
static boolean wakeUpNotif[LINSLV_CHANNEL_CNT] = {0};
static boolean busActivity[LINSLV_CHANNEL_CNT] = {0};
static boolean sleepNotificationReq[LINSLV_CHANNEL_CNT] = {0};
static uint32 busTimeOutCnt[LINSLV_CHANNEL_CNT] = {0};
static boolean oldSleepNotificationReq[LINSLV_CHANNEL_CNT] = {0};
static uint32 srfTimeCnt[LINSLV_CHANNEL_CNT];
static uint32 wakeUpCnt[LINSLV_CHANNEL_CNT] = {0};
uint8 mrfBuffer[LINSLV_CHANNEL_CNT][LINSLV_MAX_MSG_LENGTH];
uint8 mrfShadowBuffer[LINSLV_CHANNEL_CNT][LINSLV_MAX_MSG_LENGTH];
uint8 srfBuffer[LINSLV_CHANNEL_CNT][LINSLV_MAX_MSG_LENGTH];
boolean mrfReceived[LINSLV_CHANNEL_CNT] = {0};
boolean srfPending[LINSLV_CHANNEL_CNT] = {0};
#if (LINSLV_TRCV_SUPPORT == STD_ON)
LinTrcv_TrcvModeType lastSetTrcvState[LINSLV_CHANNEL_CNT];
#endif
/* ----------------------------[functions]-----------------------------------*/
/**
* Initialize the Lin slave driver
* @param Config
*/
void LinSlv_Init(const LinSlv_ConfigType* Config) {
Std_ReturnType retval;
uint8 i;
VALIDATE( (LinSlvDriverStatus == LIN_UNINIT), LINSLV_INIT_SERVICE_ID, LINSLV_E_STATE_TRANSITION );
VALIDATE( ( Config != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
// Validate sub-pointers
VALIDATE( ( Config->LinSlvChannelConfig != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( Config->LinSlv_HwId2ChannelMap != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( Config->LinSlvAttrib != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( Config->LinSlvChannelFrameConfig != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( Config->LinSlvPDUFrameCollection != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( Config->LinSlvChnTrcvConfig != NULL ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER);
LinSlv_Cfg.LinSlvCfgPtr = Config;
retval = LinSlv_Internal_Init(&LinSlv_Cfg);
// Set DET error if it could not finish the initialization
VALIDATE( (retval != E_NOT_OK ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_CONFIG);
#if (LINSLV_TRCV_SUPPORT == STD_ON)
for (i = 0; i < LINSLV_CHANNEL_CNT; i++) {
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig[i].LinSlvTrcvIsConfigured) {
retval = LinSlv_Internal_SetTrcvMode(&LinSlv_Cfg, i, LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig[i].LinSlvTrcvInitState);
// Set DET error if it could not finish the initialization
VALIDATE( (retval != E_NOT_OK ), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_CONFIG);
lastSetTrcvState[i] = LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig[i].LinSlvTrcvInitState;
}
}
#endif
// Clear internal variables
for (i = 0; i < LINSLV_CHANNEL_CNT; i++) {
txConfIsExpected[i] = 0;
lastTransmittedFrame[i] = NULL;
Response_error[i] = 0;
wakeUpSet[i] = FALSE;
wakeUpNotif[i] = FALSE;
busActivity[i] = FALSE;
sleepNotificationReq[i] = FALSE;
busTimeOutCnt[i] = 0;
oldSleepNotificationReq[i] = FALSE;
srfPending[i] = FALSE;
srfTimeCnt[i] = 0;
wakeUpCnt[i] = 0;
}
if (E_OK == retval) {
LinSlvDriverStatus = LIN_INIT;
}
}
/**
* DeInit the driver.
*/
void LinSlv_DeInit(void) {
VALIDATE( (LinSlvDriverStatus == LIN_INIT), LINSLV_DEINIT_SERVICE_ID, LINSLV_E_STATE_TRANSITION );
LinSlv_Internal_Deinit(&LinSlv_Cfg);
LinSlvDriverStatus = LIN_UNINIT;
}
/**
* Set the channel in sleep.
* @param Channel
* @return
*/
Std_ReturnType LinSlv_GoToSleepInternal(uint8 Channel) {
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_GOTOSLEEPINTERNAL_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_GOTOSLEEPINTERNAL_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, E_NOT_OK);
LinSlv_Internal_GoToSleepInternal(&LinSlv_Cfg, Channel);
LinSlv_Cfg.LinSlvChannelStatus[Channel] = LIN_CH_SLEEP;
return E_OK;
}
/**
* Set the Lin channel to operational state
* @param Channel
* @return
*/
Std_ReturnType LinSlv_WakeupInternal(uint8 Channel) {
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_WAKEUPINTERNAL_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_WAKEUPINTERNAL_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, E_NOT_OK);
VALIDATE_W_RV( (LinSlv_Cfg.LinSlvChannelStatus[Channel] == LIN_CH_SLEEP), LINSLV_WAKEUPINTERNAL_SERVICE_ID, LINSLV_E_STATE_TRANSITION, E_NOT_OK);
LinSlv_Internal_WakeupInternal(&LinSlv_Cfg, Channel);
LinSlv_Cfg.LinSlvChannelStatus[Channel] = LIN_OPERATIONAL;
wakeUpSet[Channel] = FALSE;
return E_OK;
}
/**
* Generates a wake up pulse and sets the channel state to operational.
* @param Channel
* @return
*/
Std_ReturnType LinSlv_Wakeup(uint8 Channel) {
Std_ReturnType retval;
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_WAKEUP_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_WAKEUP_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, E_NOT_OK);
VALIDATE_W_RV( (LinSlv_Cfg.LinSlvChannelStatus[Channel] == LIN_CH_SLEEP), LINSLV_WAKEUP_SERVICE_ID, LINSLV_E_STATE_TRANSITION, E_NOT_OK);
retval = LinSlv_Internal_Wakeup(&LinSlv_Cfg, Channel);
if (E_OK == retval) {
LinSlv_Cfg.LinSlvChannelStatus[Channel] = LIN_OPERATIONAL;
wakeUpSet[Channel] = FALSE;
wakeUpNotif[Channel] = TRUE;
};
return retval;
}
/**
* Checks if the wakeup source have caused the wakeup. If it has it will
* call EcuM_SetWakeupEvent.
* @param WakeupSource
* @return
*/
Std_ReturnType LinSlv_CheckWakeup(EcuM_WakeupSourceType WakeupSource) {
const Lin_ChannelConfigType *chnCfg;
boolean wakeupSourceFound = FALSE;
uint8 chnCnt;
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_CHECKWAKEUP_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
for (chnCnt = 0; chnCnt < LINSLV_CHANNEL_CNT; chnCnt++) {
chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[chnCnt].LinSlvChnConfig;
if (wakeUpSet[chnCnt])
{
// Always set to false after it has been read out.
wakeUpSet[chnCnt] = FALSE;
wakeupSourceFound = TRUE;
}
#if (LINSLV_TRCV_SUPPORT == STD_ON)
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig[chnCnt].LinSlvTrcvIsConfigured) {
LinTrcv_TrcvModeType currentTrcvState;
Std_ReturnType status;
status = LinSlv_Internal_GetTrcvMode(&LinSlv_Cfg, chnCnt, ¤tTrcvState);
if ((E_OK == status) && (LINTRCV_TRCV_MODE_SLEEP == lastSetTrcvState[chnCnt]) &&
(LINTRCV_TRCV_MODE_STANDBY == currentTrcvState))
{
//Set lastSetTrcvState to standby so that no wakeup event can be reported twice
lastSetTrcvState[chnCnt] = LINTRCV_TRCV_MODE_STANDBY;
wakeupSourceFound = TRUE;
}
}
#endif
if (chnCfg->LinChannelWakeUpSupport && (chnCfg->LinChannelEcuMWakeUpSource == WakeupSource) && wakeupSourceFound) {
EcuM_SetWakeupEvent(WakeupSource);
break;
}
}
return E_OK;
}
/**
* Returns the LinSlv peripheral status.
* @param Channel
* @return
*/
Lin_StatusType LinSlv_GetStatus(uint8 Channel) {
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_GETSTATUS_SERVICE_ID, LINSLV_E_UNINIT, LIN_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_GETSTATUS_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, LIN_NOT_OK);
return LinSlv_Internal_GetStatus(&LinSlv_Cfg, Channel);
}
/**
* Receive interrupt routine. The routine is filter based and assumes that the full frame has been received.
* @param HwChannelId
*/
void LinSlv_Internal_Rx_Isr(uint8 hwChannelId) {
Std_ReturnType retval;
PduInfoType outgoingPdu;
uint8 sduBuffer[LINSLV_MAX_MSG_LENGTH];
const LinIf_FrameType *frameCfgPtr = NULL;
uint8 channel = LinSlv_Cfg.LinSlvCfgPtr->LinSlv_HwId2ChannelMap[hwChannelId];
busActivity[channel] = TRUE;
if (LIN_CH_SLEEP == LinSlv_Cfg.LinSlvChannelStatus[channel])
{
wakeUpSet[channel] = LinSlv_Internal_IsWakeUpSet(&LinSlv_Cfg, channel);
if (wakeUpSet[channel] && LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[channel].LinSlvChnConfig.LinChannelWakeUpSupport) {
/* Report wakeup to EcuM */
/* @req CDD_LinSlv_00011 */
EcuM_CheckWakeup(LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[channel].LinSlvChnConfig.LinChannelEcuMWakeUpSource);
}
return;
}
retval = LinSlv_Hw_Rx(&LinSlv_Cfg, channel, &frameCfgPtr, sduBuffer);
/* If E_NOT_OK it could not find a valid configured frame for the received identifier */
if (E_OK == retval) {
outgoingPdu.SduDataPtr = sduBuffer;
outgoingPdu.SduLength = (PduLengthType)frameCfgPtr->LinIfLength;
if (MRF == frameCfgPtr->LinIfFrameType) {
receivedNewTpRequest(channel, sduBuffer);
} else {
/* @req CDD_LinSlv_00007 */
PduR_LinSlvIfRxIndication((PduIdType)frameCfgPtr->LinIfTxTargetPduId,&outgoingPdu);
}
}
}
/**
* Parse and depending on header set response data.
* @param hwChannelId
*/
static Std_ReturnType transmitResponse(uint8 channel) {
const LinSlv_ChannelConfigType *chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[channel];
const LinIf_FrameType *frameCfgPtr = NULL;
uint8 sduBuffer[LINSLV_MAX_MSG_LENGTH];
PduInfoType outgoingPdu;
Std_ReturnType retval;
const uint8 *bufPtr;
/* Based on id in the received header, get the corresponding frame ptr */
retval = LinSlv_Hw_Tx_GetFramePtr(&LinSlv_Cfg, channel, &frameCfgPtr);
/* If E_NOT_OK it could not find a valid configured frame for the received identifier */
if (E_OK == retval) {
if (SRF == frameCfgPtr->LinIfFrameType) {
bufPtr = srfBuffer[channel];
retval = (TRUE == srfPending[channel]) ? E_OK : E_NOT_OK;
} else { /* Unconditional frame */
outgoingPdu.SduDataPtr = sduBuffer;
outgoingPdu.SduLength = (PduLengthType)frameCfgPtr->LinIfLength;
/* @req CDD_LinSlv_00007 */
retval = PduR_LinSlvIfTriggerTransmit((PduIdType)frameCfgPtr->LinIfTxTargetPduId,&outgoingPdu);
/* If it is the frame containing the signal Response error */
/* @req CDD_LinSlv_00006 */
if (chnCfg->LinSlvRespErrorFrameRef == frameCfgPtr) {
/* Clear and set the Response error */
sduBuffer[chnCfg->LinSlvRespErrByteIdx] &= ~(1u << chnCfg->LinSlvRespErrBitIdxInByte);
/*lint -e{701, 734} False positive detected, it is not signed. All types are of uint8, no loss of precision. */
sduBuffer[chnCfg->LinSlvRespErrByteIdx] |= (Response_error[channel] << chnCfg->LinSlvRespErrBitIdxInByte);
}
bufPtr = sduBuffer;
}
if (E_OK == retval) {
/* Set data for transmission */
LinSlv_Internal_SetResponse(&LinSlv_Cfg, channel, frameCfgPtr->LinIfLength, bufPtr);
lastTransmittedFrame[channel] = frameCfgPtr;
}
}
return retval;
}
/**
* Handle tx interrupts
* @param hwChannelId
*/
void LinSlv_Internal_Tx_Isr(uint8 hwChannelId) {
uint8 channel = LinSlv_Cfg.LinSlvCfgPtr->LinSlv_HwId2ChannelMap[hwChannelId];
const LinSlv_ChannelConfigType *chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[channel];
LinSlv_TxIsrSourceType source;
Std_ReturnType retval;
source = LinSlv_Hw_Tx_GetIsrSource(&LinSlv_Cfg, channel);
if (LINSLV_HEADER == source) {
retval = transmitResponse(channel);
txConfIsExpected[channel] = (E_OK == retval) ? TRUE : FALSE;
} else if ((LINSLV_TRANSMIT_DONE == source) && txConfIsExpected[channel]) {
if ((lastTransmittedFrame[channel] != NULL) && (UNCONDITIONAL == lastTransmittedFrame[channel]->LinIfFrameType)) {
/* @req CDD_LinSlv_00007 */
PduR_LinSlvIfTxConfirmation((PduIdType)lastTransmittedFrame[channel]->LinIfTxTargetPduId);
/* After successful transmit of Response error signal it shall be cleared */
/* @req CDD_LinSlv_00006 */
if (chnCfg->LinSlvRespErrorFrameRef == lastTransmittedFrame[channel]) {
Response_error[channel] = 0u;
}
} else if ((lastTransmittedFrame[channel] != NULL) && (SRF == lastTransmittedFrame[channel]->LinIfFrameType)) {
srfPending[channel] = FALSE;
} else {
;
}
txConfIsExpected[channel] = FALSE;
} else {
;
}
LinSlv_Hw_ClearTxIsrFlags(&LinSlv_Cfg, channel);
busActivity[channel] = TRUE;
}
/**
* Handle the error interrupts
* @param hwChannelId
*/
void LinSlv_Internal_Err_Isr(uint8 hwChannelId) {
uint8 channel = LinSlv_Cfg.LinSlvCfgPtr->LinSlv_HwId2ChannelMap[hwChannelId];
Std_ReturnType retval;
txConfIsExpected[channel] = FALSE;
retval = LinSlv_Hw_Err(&LinSlv_Cfg, channel);
if (E_NOT_OK == retval) {
/* @req CDD_LinSlv_00006 */
Response_error[channel] = 1u;
}
}
#if (LINSLV_VERSION_INFO_API == STD_ON)
/**
* Returns the version info of the module
* @param versioninfo
*/
void LinSlv_GetVersionInfo(Std_VersionInfoType* versioninfo)
{
VALIDATE( !(versioninfo == NULL), LINSLV_GETVERSIONINFO_SERVICE_ID, LINSLV_E_PARAM_POINTER );
versioninfo->vendorID = CDD_LINSLV_VENDOR_ID;
versioninfo->moduleID = CDD_LINSLV_MODULE_ID;
versioninfo->sw_major_version = CDD_LINSLV_SW_MAJOR_VERSION;
versioninfo->sw_minor_version = CDD_LINSLV_SW_MINOR_VERSION;
versioninfo->sw_patch_version = CDD_LINSLV_SW_PATCH_VERSION;
}
#endif
/**
* The main processing function of the LinSlv Interface
* The LinSlv_MainFunction shall be called by the environment every LinSlvTimeBase second.
*/
void LinSlv_MainFunction(void) {
boolean srfNewSet;
uint8 chnIdx;
VALIDATE( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_UNINIT);
for (chnIdx = 0; chnIdx < LINSLV_CHANNEL_CNT; chnIdx++) {
srfNewSet = FALSE;
if (LIN_OPERATIONAL == LinSlv_Cfg.LinSlvChannelStatus[chnIdx]) {
/* Check if a requested wakeup has been transmitted - send wakeup confirmation */
handleWakeUpNotification(chnIdx);
/* Check bus communication timeout */
timeOutMonitor(chnIdx);
/* Check if any new MRF frame has been received */
#if defined(LIN_FLEX)
// IMPROVEMENT add this check on the internal driver level.
// This check of driver status is important as one of the Tp services requires
// setting the peripheral into init mode for reconfiguration,
// which means that we to temporary disable frame tx/rx.
Lin_StatusType driverStatus = LinSlv_Internal_GetStatus(&LinSlv_Cfg, chnIdx);
if (mrfReceived[chnIdx] && LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib[chnIdx].LinSlvAttribIsConfigured &&
((LIN_OPERATIONAL == driverStatus) || (LIN_CH_SLEEP == driverStatus)))
{
mrfReceived[chnIdx] = FALSE;
srfNewSet = handleTpRequest(chnIdx);
}
#else
if (mrfReceived[chnIdx] && LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib[chnIdx].LinSlvAttribIsConfigured) {
mrfReceived[chnIdx] = FALSE;
srfNewSet = handleTpRequest(chnIdx);
}
#endif
/* Check if we have any pending srf and check timeout for discard */
handleSrfTimeOut(chnIdx, srfNewSet);
/* Check if busTimeOut or GoToSleep - Send sleep notification */
sleepCalloutCheck(chnIdx);
}
}
}
/**
* If no bus activity is detected the counter starts and continuous to count until the limit is reached.
* @param Channel
*/
static void timeOutMonitor(uint8 Channel) {
const LinSlv_ChannelConfigType *chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[Channel];
if (0uL < chnCfg->LinSlvBusTimeOutCnt) {
if (!busActivity[Channel]) {
if (busTimeOutCnt[Channel] < (chnCfg->LinSlvBusTimeOutCnt -1uL)) {
busTimeOutCnt[Channel]++;
} else {
/* @req CDD_LinSlv_00013 */
sleepNotificationReq[Channel] = TRUE;
}
} else {
busTimeOutCnt[Channel] = 0;
busActivity[Channel] = FALSE;
}
}
}
/**
* Calls the sleep callout functions.
* @param Channel
*/
static void sleepCalloutCheck(uint8 Channel) {
const LinSlv_ChannelConfigType *chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[Channel];
/* Only at value change will sleepNotificationRequest be evaluated*/
if (oldSleepNotificationReq[Channel] != sleepNotificationReq[Channel]) {
oldSleepNotificationReq[Channel] = sleepNotificationReq[Channel];
/* @req CDD_LinSlv_00012 */
/* @req CDD_LinSlv_00013 */
if (sleepNotificationReq[Channel] && (chnCfg->LinSlvSleepCallback != NULL)) {
//Sleep callback function.
chnCfg->LinSlvSleepCallback(LINSLV_BUS_TIMEOUT);
}
}
sleepNotificationReq[Channel] = FALSE;
}
/**
* Copy of data in interrupt to the MRF buffer
* @param Channel
* @param buffer
*/
void receivedNewTpRequest(uint8 Channel, const uint8 *buffer) {
uint8 i;
VALIDATE( ( NULL != buffer), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
for (i = 0; i <LINSLV_MAX_MSG_LENGTH; i++) {
mrfBuffer[Channel][i] = buffer[i];
}
mrfReceived[Channel] = TRUE;
}
/**
* Safe copy of MRF data to a shadow buffer to ensure data consistency
* @param Channel
*/
void safeCopyData(uint8 Channel) {
uint8 i;
LinSlv_Internal_StoreAndDisableIsr(&LinSlv_Cfg, Channel);
for (i = 0; i <LINSLV_MAX_MSG_LENGTH; i++) {
mrfShadowBuffer[Channel][i] = mrfBuffer[Channel][i];
}
LinSlv_Internal_RestoreAndEnableIsr(&LinSlv_Cfg, Channel);
}
/**
* The main function for handling and processing of TP frames.
* @param Channel
* @return Set to true if a new slave response frame was set.
*/
/* @req CDD_LinSlv_00002 */
boolean handleTpRequest(uint8 Channel) {
Std_ReturnType retval;
const uint8 *dataPtr;
LinSlvNadType nadCallType = INVALID_NAD;
LinSlvSidType reqService = SID_INVALD;
boolean pciOk = FALSE;
safeCopyData(Channel);
dataPtr = mrfShadowBuffer[Channel];
parseTpRequest(Channel, dataPtr, &nadCallType, &pciOk, &reqService);
if (((FUNCTIONAL_NAD == nadCallType) && srfPending[Channel]) || (!pciOk && (GO_TO_SLEEP_NAD != nadCallType))) {
/* Ignore the request */
return FALSE;
} else if (INVALID_NAD == nadCallType) {
/* New request on the bus, but not for this node. Still have to cancel any pending SRF we might have */
srfPending[Channel] = FALSE;
return FALSE;
} else {
// Cancel any pending SRF
srfPending[Channel] = FALSE;
}
switch(reqService) {
case SID_GO_TO_SLEEP:
/* @req CDD_LinSlv_00012 */
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvSleepCallback != NULL) {
//Sleep callback function.
LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvSleepCallback(LINSLV_GO_TO_SLEEP_REQ);
}
break;
case SID_ASSIGN_FRAME_BY_ID:
retval = handleTpAssignFrameById(Channel, dataPtr);
if (E_OK == retval) {
srfPending[Channel] = TRUE;
}
break;
case SID_READ_BY_IDENTIFIER:
retval = handleTpReadById(Channel, dataPtr);
if (E_OK == retval) {
srfPending[Channel] = TRUE;
}
break;
default:
break;
}
return srfPending[Channel];
}
/**
* Parses the NAD and SID of the MRF frame to determine node addressing type
* and requested service.
* @param Channel
* @param tpFrame
* @return
*/
void parseTpRequest(uint8 Channel, const uint8 *tpFrame, LinSlvNadType *nadCaller, boolean *pciOk, LinSlvSidType *reqService) {
VALIDATE( ( NULL != tpFrame), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( NULL != nadCaller), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( NULL != pciOk), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( ( NULL != reqService), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
/* Validate Node address */
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib[Channel].LinSlvConfiguredNad == tpFrame[NAD_IDX]) {
*nadCaller = CONFIGURED_NAD;
} else if (MASK_FUNCTIONAL_NAD == tpFrame[NAD_IDX]) {
*nadCaller = FUNCTIONAL_NAD;
} else if (MASK_BROADCAST_NAD == tpFrame[NAD_IDX]) {
*nadCaller = BROADCAST_NAD;
} else if (MASK_GO_TO_SLEEP == tpFrame[NAD_IDX]) {
*nadCaller = GO_TO_SLEEP_NAD;
} else {
*nadCaller = INVALID_NAD;
}
// A Single Frame PDU (SF) with a length value greater than six (6) bytes shall be
// ignored by the receiver.
if (MASK_PCI_SF_MAX < tpFrame[PCI_IDX]) {
*pciOk = FALSE;
} else {
*pciOk = TRUE;
}
/* Sid */
if (GO_TO_SLEEP_NAD == *nadCaller) {
*reqService = SID_GO_TO_SLEEP;
} else if (MASK_SID_ASSIGN_FRAME_ID_RANGE == tpFrame[SID_IDX]) {
*reqService = SID_ASSIGN_FRAME_BY_ID;
} else if (MASK_SID_READ_BY_IDENTIFIER == tpFrame[SID_IDX]) {
*reqService = SID_READ_BY_IDENTIFIER;
} else {
*reqService = SID_INVALD;
}
}
/**
* Handle Tp request Read By Identifier
* @param Channel
* @param tpFrame
*/
Std_ReturnType handleTpReadById(uint8 Channel, const uint8 *tpFrame) {
const LinSlv_ReadByIdentifierFrameType *readByIdCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelFrameConfig[Channel].LinSlvReadByIdFrameCfg[0];
uint8 negativResp[LINSLV_MAX_MSG_LENGTH] = {LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib->LinSlvConfiguredNad, 0x03, 0x7F, 0xB2, 0x12, 0xFF, 0xFF, 0xFF};
const uint32 nbrCfgIds = LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelFrameConfig[Channel].LinSlvChnReadByIdCnt;
const uint16 functionIdCfg = LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib->LinSlvFunctionId;
const uint16 supplierIdCfg = LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib->LinSlvSupplierId;
boolean isFuncIdValid = FALSE;
boolean isSupIdValid = FALSE;
boolean isIdValid = FALSE;
boolean isLengthValid = FALSE;
uint32 i;
uint8 *rspFrame = NULL;
uint8 rspFrameLen = 0;
VALIDATE_W_RV( ( NULL != tpFrame), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
/* Validate identifier */
for (i = 0; i < nbrCfgIds; i++) {
if (readByIdCfg[i].LinSlvIdentifier == tpFrame[ID_IDX]) {
isIdValid = TRUE;
break;
}
}
/* Validate Supplier Id */
if ((ID_LSB_BYTE(supplierIdCfg) == tpFrame[ID_SUPPLIER_LSB_IDX]) &&
(ID_MSB_BYTE(supplierIdCfg) == tpFrame[ID_SUPPLIER_MSB_IDX]))
{
isSupIdValid = TRUE;
}
else if ((WILDCARD_SUPPLIER_LSB == tpFrame[ID_SUPPLIER_LSB_IDX]) &&
(WILDCARD_SUPPLIER_MSB == tpFrame[ID_SUPPLIER_MSB_IDX]))
{
isSupIdValid = TRUE;
} else {
; // Misra compliance
}
/* Validate Function Id */
if ((ID_LSB_BYTE(functionIdCfg) == tpFrame[ID_FUNCTION_LSB_IDX]) &&
(ID_MSB_BYTE(functionIdCfg) == tpFrame[ID_FUNCTION_MSB_IDX]))
{
isFuncIdValid = TRUE;
}
else if ((WILDCARD_FUNCTION_LSB == tpFrame[ID_FUNCTION_LSB_IDX]) &&
(WILDCARD_FUNCTION_MSB == tpFrame[ID_FUNCTION_MSB_IDX]))
{
isFuncIdValid = TRUE;
} else {
; // Misra compliance
}
/* Validate PCI length and type */
if (MASK_PCI_SF_MAX == tpFrame[PCI_IDX]) {
isLengthValid = TRUE;
}
/* Set response */
if (isIdValid && isSupIdValid && isFuncIdValid && isLengthValid) {
const LinSlv_ReadByIdentifierFrameType *readByIdFrame = &readByIdCfg[i];
/* @req CDD_LinSlv_00014 */
if (NULL != readByIdFrame->LinSlvResponseCallback) {
readByIdFrame->LinSlvResponseCallback(&rspFrame, &rspFrameLen);
}
/* Validate response frame length */
if ((NULL != rspFrame) && (LINSLV_MAX_MSG_LENGTH != rspFrameLen)) {
/* Invalid request, set negative response */
setSafeTpResponse(Channel, negativResp);
}
else {
setSafeTpResponse(Channel, rspFrame);
}
} else {
/* Invalid request, set negative response */
setSafeTpResponse(Channel, negativResp);
}
return E_OK;
}
/**
* Handles the assign frame by id service.
* @param Channel
* @param tpFrame
*/
Std_ReturnType handleTpAssignFrameById(uint8 Channel, const uint8 *tpFrame) {
uint8 positiveResp[LINSLV_MAX_MSG_LENGTH] = {LinSlv_Cfg.LinSlvCfgPtr->LinSlvAttrib->LinSlvConfiguredNad, 0x01, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
uint8 chnMaxCnt = LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelFrameConfig[Channel].LinSlvUnconditionalFrameCnt;
uint8 nbrAllowedFrameReAssignments;
boolean isAssignmentInRange = TRUE;
Std_ReturnType retval = E_NOT_OK;
boolean isLengthValid = FALSE;
uint8 currentPidAssignment;
uint8 startIndex;
uint8 i;
VALIDATE_W_RV( ( NULL != tpFrame), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
/* Validate PCI length and type */
if (MASK_PCI_SF_MAX == tpFrame[PCI_IDX]) {
isLengthValid = TRUE;
}
startIndex = tpFrame[AFBI_IDX_IDX];
/* Validate if all PID (index + n) can be reconfigured */
nbrAllowedFrameReAssignments = (chnMaxCnt >= startIndex) ? (chnMaxCnt-startIndex) : (uint8)0u;
for (i = 0; i < AFBI_MAX_NBR_ASSIGNMENTS; i++) {
currentPidAssignment = tpFrame[AFBI_PID_START_IDX + i];
// Lin 2.1 specification: "frames with frame identifiers 60 (0x3C) to 63(0x3F) can not be changed"
if ((0x3Cu <= currentPidAssignment) && (0x3Fu >= currentPidAssignment)) {
isAssignmentInRange = FALSE;
}
if ((i >= nbrAllowedFrameReAssignments) && (AFBI_DONT_CARE != currentPidAssignment)) {
isAssignmentInRange = FALSE;
}
}
// The frame is valid, update filter rules and set positive response
if (isLengthValid && isAssignmentInRange) {
for (i = 0; i < AFBI_MAX_NBR_ASSIGNMENTS; i++) {
if (AFBI_DONT_CARE != tpFrame[AFBI_PID_START_IDX + i]) {
LinSlv_Internal_UpdatePid(&LinSlv_Cfg, Channel, (startIndex + i), tpFrame[AFBI_PID_START_IDX + i]);
}
}
setSafeTpResponse(Channel, positiveResp);
retval = E_OK;
}
return retval;
}
/**
* Safely copies the data to the buffer used the the interrupt routine.
* @param Channel
* @param tpFrame
*/
void setSafeTpResponse(uint8 Channel, const uint8 *tpFrame) {
uint8 i;
VALIDATE( ( NULL != tpFrame), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER);
LinSlv_Internal_StoreAndDisableIsr(&LinSlv_Cfg, Channel);
for (i = 0; i <LINSLV_MAX_MSG_LENGTH; i++) {
srfBuffer[Channel][i] = tpFrame[i];
}
LinSlv_Internal_RestoreAndEnableIsr(&LinSlv_Cfg, Channel);
}
/**
* Handles the SRF timeout
* @param Channel
* @param newSrfSet
*/
void handleSrfTimeOut(uint8 Channel, boolean newSrfSet) {
if (newSrfSet || !srfPending[Channel]) {
srfTimeCnt[Channel] = 0;
} else {
srfTimeCnt[Channel]++;
}
//Timeout, discard the response
if (srfTimeCnt[Channel] >= (LINSLV_SRF_DISCARD_CNT-1uL)) {
srfPending[Channel] = FALSE;
}
}
/**
* Checks the peripheral status if a wakeup notification shall be sent.
* @param Channel
*/
void handleWakeUpNotification(uint8 Channel) {
const LinSlv_ChannelConfigType *chnCfg;
boolean retval;
boolean forceSetFailure = FALSE;
chnCfg = &LinSlv_Cfg.LinSlvCfgPtr->LinSlvChannelConfig[Channel];
// If no wakeup notification is configured for the channel
// there is no point doing anything more in here.
if (NULL == chnCfg->LinSlvWakeupConfirmation) {
return;
}
// If a call to LinSlv_Wakeup has been done
if (wakeUpNotif[Channel]) {
retval = LinSlv_Internal_IsWakeUpDoneTransmitting(&LinSlv_Cfg, Channel);
/*lint -e{685,778} It will depend on the parameter LinSlvTimeBase */
if (wakeUpCnt[Channel] < (LINSLV_WAKEUP_TIMEOUT_CNT-1uL)) {
wakeUpCnt[Channel]++;
} else {
forceSetFailure = TRUE;
}
if (retval) {
chnCfg->LinSlvWakeupConfirmation(TRUE);
wakeUpNotif[Channel] = FALSE;
} else if (forceSetFailure) {
chnCfg->LinSlvWakeupConfirmation(FALSE);
wakeUpNotif[Channel] = FALSE;
} else {
;
}
} else {
wakeUpCnt[Channel] = 0;
}
}
#if (LINSLV_TRCV_SUPPORT == STD_ON)
/**
* Set transceiver mode for the specified channel.
* @param Channel
* @param TransceiverMode
* @return
*/
Std_ReturnType LinSlv_SetTrcvMode(uint8 Channel, LinTrcv_TrcvModeType TransceiverMode) {
Std_ReturnType retval = E_NOT_OK;
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_SETTRCVMODE_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_SETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, E_NOT_OK);
VALIDATE_W_RV( ((TransceiverMode == LINTRCV_TRCV_MODE_NORMAL) ||
(TransceiverMode == LINTRCV_TRCV_MODE_STANDBY) ||
(TransceiverMode == LINTRCV_TRCV_MODE_SLEEP)), LINSLV_SETTRCVMODE_SERVICE_ID, LINSLV_E_STATE_TRANSITION, E_NOT_OK);
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig->LinSlvTrcvIsConfigured) {
retval = LinSlv_Internal_SetTrcvMode(&LinSlv_Cfg, Channel, TransceiverMode);
if (E_OK == retval) {
lastSetTrcvState[Channel] = TransceiverMode;
}
}
return retval;
}
/**
* Returns the transceiver mode for the specified channel.
* @param Channel
* @param TransceiverModePtr
* @return
*/
Std_ReturnType LinSlv_GetTrcvMode(uint8 Channel, LinTrcv_TrcvModeType* TransceiverModePtr) {
Std_ReturnType retval = E_NOT_OK;
VALIDATE_W_RV( (LinSlvDriverStatus != LIN_UNINIT), LINSLV_GETTRCVMODE_SERVICE_ID, LINSLV_E_UNINIT, E_NOT_OK);
VALIDATE_W_RV( (Channel < LINSLV_CHANNEL_CNT) , LINSLV_GETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_CHANNEL, E_NOT_OK);
VALIDATE_W_RV( ( TransceiverModePtr != NULL ) , LINSLV_GETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
if (LinSlv_Cfg.LinSlvCfgPtr->LinSlvChnTrcvConfig->LinSlvTrcvIsConfigured) {
retval = LinSlv_Internal_GetTrcvMode(&LinSlv_Cfg, Channel, TransceiverModePtr);
}
return retval;
}
#endif
|
2301_81045437/classic-platform
|
cdd/LinSlv/src/CDD_LinSlv.c
|
C
|
unknown
| 36,964
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=4.1.2 */
/** @tagSettings DEFAULT_ARCHITECTURE=MPC5645S */
#ifndef CDD_LINSLV_H_
#define CDD_LINSLV_H_
#define CDD_LINSLV_MODULE_ID 255u
#define CDD_LINSLV_VENDOR_ID 60u
#define CDD_LINSLV_SW_MAJOR_VERSION 0u
#define CDD_LINSLV_SW_MINOR_VERSION 1u
#define CDD_LINSLV_SW_PATCH_VERSION 0u
#define CDD_LINSLV_AR_RELEASE_MAJOR_VERSION 4u
#define CDD_LINSLV_AR_RELEASE_MINOR_VERSION 1u
#define CDD_LINSLV_AR_RELEASE_PATCH_VERSION 2u
#include "Std_Types.h"
#include "Lin_GeneralTypes.h"
#include "Lin.h"
#include "LinIf_Types.h"
#include "ComStack_Types.h"
typedef enum {
LINSLV_BUS_TIMEOUT = 0,
LINSLV_GO_TO_SLEEP_REQ,
}LinSlv_SleepSrcType;
#include "CDD_LinSlv_Cfg.h"
typedef struct {
Lin_ChannelConfigType LinSlvChnConfig;
LinIf_StatusType LinSlvChannelInitState;
uint8 LinSlvRespErrByteIdx;
uint8 LinSlvRespErrBitIdxInByte;
const LinIf_FrameType *LinSlvRespErrorFrameRef;
void (*LinSlvSleepCallback)(LinSlv_SleepSrcType src);
void (*LinSlvWakeupConfirmation)(boolean success);
uint32 LinSlvBusTimeOutCnt;
}LinSlv_ChannelConfigType;
typedef struct {
boolean LinSlvAttribIsConfigured;
uint8 LinSlvConfiguredNad;
uint16 LinSlvSupplierId;
uint16 LinSlvFunctionId;
uint8 LinSlvVariant;
}LinSlv_NodeAttributesType;
typedef struct {
uint32 LinSlvTrcvEnableSource;
uint32 LinSlvTrcvRstnSource;
uint32 LinSlvTrcvTxDioSource;
uint16 LinSlvTrcvTxPortSource;
uint32 LinSlvTrcvTxLowWaitCount;
}LinSlv_TrcvDioAccessType;
typedef struct {
boolean LinSlvTrcvIsConfigured;
LinTrcv_TrcvModeType LinSlvTrcvInitState;
LinSlv_TrcvDioAccessType LinSlvTrcvDioAccess;
}LinSlv_TrcvType;
typedef struct {
uint8 LinSlvIdentifier;
void (*LinSlvResponseCallback)(const uint8 **responseFrame, uint8 *len);
}LinSlv_ReadByIdentifierFrameType;
typedef struct {
uint32 LinSlvChnlFrameCnt;
uint8 LinSlvUnconditionalFrameCnt;
const LinIf_FrameType **LinSlvChnFrameCfg;
uint32 LinSlvChnReadByIdCnt;
const LinSlv_ReadByIdentifierFrameType *LinSlvReadByIdFrameCfg;
}LinSlv_FrameSetupType;
typedef struct {
const LinSlv_ChannelConfigType *LinSlvChannelConfig;
const LinSlv_TrcvType *LinSlvChnTrcvConfig;
const uint8 *LinSlv_HwId2ChannelMap;
const LinSlv_NodeAttributesType *LinSlvAttrib;
const LinSlv_FrameSetupType *LinSlvChannelFrameConfig;
const LinIf_FrameType *LinSlvPDUFrameCollection;
} LinSlv_ConfigType;
typedef struct {
const LinSlv_ConfigType *LinSlvCfgPtr;
Lin_StatusType LinSlvChannelStatus[LINSLV_CHANNEL_CNT];
Lin_StatusType LinSlvChannelOrderedStatus[LINSLV_CHANNEL_CNT];
}LinSlv_ContainerType;
typedef enum {
LINSLV_HEADER,
LINSLV_TRANSMIT_DONE,
LINSLV_OTHER,
}LinSlv_TxIsrSourceType;
/* API ID */
#define LINSLV_INIT_SERVICE_ID 0x01u
#define LINSLV_GETVERSIONINFO_SERVICE_ID 0x02u
#define LINSLV_CHECKWAKEUP_SERVICE_ID 0x03u
#define LINSLV_GOTOSLEEPINTERNAL_SERVICE_ID 0x04u
#define LINSLV_WAKEUP_SERVICE_ID 0x05u
#define LINSLV_WAKEUPINTERNAL_SERVICE_ID 0x06u
#define LINSLV_GETSTATUS_SERVICE_ID 0x07u
#define LINSLV_SETTRCVMODE_SERVICE_ID 0x08u
#define LINSLV_GETTRCVMODE_SERVICE_ID 0x09u
#define LINSLV_MAINFUNCTION_SERVICE_ID 0x0Du
#define LINSLV_DEINIT_SERVICE_ID 0x0Eu
#define LINSLV_INTERNAL_ISR_ID 0x0Fu
/* Error codes */
#define LINSLV_E_UNINIT 0x00u
#define LINSLV_E_INVALID_CHANNEL 0x02u
#define LINSLV_E_INVALID_POINTER 0x03u
#define LINSLV_E_PARAM_POINTER 0x05u
#define LINSLV_E_STATE_TRANSITION 0x04u
#define LINSLV_E_INVALID_CONFIG 0x10u
/* Public */
void LinSlv_Init(const LinSlv_ConfigType* Config);
void LinSlv_DeInit(void);
Std_ReturnType LinSlv_GoToSleepInternal(uint8 Channel);
Std_ReturnType LinSlv_WakeupInternal(uint8 Channel);
Lin_StatusType LinSlv_GetStatus(uint8 Channel);
Std_ReturnType LinSlv_Wakeup(uint8 Channel);
Std_ReturnType LinSlv_CheckWakeup(EcuM_WakeupSourceType WakeupSource);
void LinSlv_GetVersionInfo(Std_VersionInfoType* versioninfo);
void LinSlv_MainFunction(void);
Std_ReturnType LinSlv_SetTrcvMode(uint8 Channel, LinTrcv_TrcvModeType TransceiverMode);
Std_ReturnType LinSlv_GetTrcvMode(uint8 Channel, LinTrcv_TrcvModeType* TransceiverModePtr);
/* Internal */
void LinSlv_Internal_Rx_Isr(uint8 hwChannelId);
void LinSlv_Internal_Tx_Isr(uint8 hwChannelId);
void LinSlv_Internal_Err_Isr(uint8 hwChannelId);
#endif /* CDD_LINSLV_H_ */
|
2301_81045437/classic-platform
|
cdd/LinSlv/src/CDD_LinSlv.h
|
C
|
unknown
| 5,526
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=4.1.2 */
/** @tagSettings DEFAULT_ARCHITECTURE=MPC5645S */
#ifndef CDD_LINSLV_INTERNAL_H_
#define CDD_LINSLV_INTERNAL_H_
#include "CDD_LinSlv.h"
Std_ReturnType LinSlv_Internal_Init(LinSlv_ContainerType* LinSlv_Cfg);
void LinSlv_Internal_Deinit(LinSlv_ContainerType* LinSlv_Cfg);
void LinSlv_Internal_GoToSleepInternal(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Internal_WakeupInternal(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
Std_ReturnType LinSlv_Internal_Wakeup(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
boolean LinSlv_Internal_IsWakeUpSet(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
Lin_StatusType LinSlv_Internal_GetStatus(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Internal_SetResponse(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, uint8 Length, const uint8 *Buffer);
LinSlv_TxIsrSourceType LinSlv_Hw_Tx_GetIsrSource(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Hw_ClearTxIsrFlags(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Internal_StoreAndDisableIsr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Internal_RestoreAndEnableIsr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
void LinSlv_Internal_UpdatePid(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, uint8 frameIndex, uint8 newPid);
boolean LinSlv_Internal_IsWakeUpDoneTransmitting(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
Std_ReturnType LinSlv_Internal_SetTrcvMode(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, LinTrcv_TrcvModeType TransceiverMode);
Std_ReturnType LinSlv_Internal_GetTrcvMode(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, LinTrcv_TrcvModeType *TransceiverModePtr);
Std_ReturnType LinSlv_Hw_Rx(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, const LinIf_FrameType **frameCfgPtr, uint8 *buffer);
Std_ReturnType LinSlv_Hw_Tx_GetFramePtr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, const LinIf_FrameType **frameCfgPtr);
Std_ReturnType LinSlv_Hw_Err(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel);
#endif /* CDD_LINSLV_INTERNAL_H_ */
|
2301_81045437/classic-platform
|
cdd/LinSlv/src/CDD_LinSlv_Internal.h
|
C
|
unknown
| 3,004
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/** @tagSettings DEFAULT_ARCHITECTURE=MPC5645S */
/** @reqSettings DEFAULT_SPECIFICATION_REVISION=4.1.2 */
/* ----------------------------[includes]------------------------------------*/
#include "CDD_LinSlv.h"
#include "CDD_LinSlv_Internal.h"
#include "LinFlex_Common.h"
#include "isr.h"
#include "mpc55xx.h"
#if defined(USE_DET)
#include "Det.h"
#endif
#if defined(USE_DIO)
#include "Dio.h"
#endif
#if defined(USE_PORT)
#include "Port.h"
#endif
/* ----------------------------[private define]------------------------------*/
#define UNASSING_PID (uint8)0x00u
#define MASK_IFCR_PID (uint32)0x3FuL
#define MASK_ID (uint8)0x3Fu
#define LINS_HEADER_COMP (uint32)0x7u
#define HEADER_TIMEOUT 0x2CuL
/* ----------------------------[private macro]-------------------------------*/
/* Development error macros. */
/* @req CDD_LinSlv_00009 */
#if ( LINSLV_DEV_ERROR_DETECT == STD_ON )
#define VALIDATE(_exp,_api,_err ) \
if( !(_exp) ) { \
(void)Det_ReportError(CDD_LINSLV_MODULE_ID,0,_api,_err); \
return; \
}
#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \
if( !(_exp) ) { \
(void)Det_ReportError(CDD_LINSLV_MODULE_ID,0,_api,_err); \
return (_rv); \
}
#else
#define VALIDATE(_exp,_api,_err )
#define VALIDATE_W_RV(_exp,_api,_err,_rv )
#endif
#define LINFLEX(exp) (volatile struct LINFLEX_tag *)(0xFFE40000uL + (0x4000uL * exp))
#define LINFLEXSLV(exp) (volatile struct LINFLEX_MS_tag *)(0xFFE40000uL + (0x4000uL * exp))
/* --------------------------------------------------------------------------*/
static uint32 chnIsrSetup[LINSLV_CHANNEL_CNT];
/**
*
* @param LinSlv_Cfg
* @param Channel
* @param frameCfgPtr
* @param buffer
* @return
*/
Std_ReturnType LinSlv_Hw_Rx(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, const LinIf_FrameType **frameCfgPtr, uint8 *buffer) {
volatile struct LINFLEX_tag * LINFLEXHw;
Std_ReturnType retval;
uint32 filterMatchIdx;
uint32 chnId;
VALIDATE_W_RV( (NULL != LinSlv_Cfg) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
VALIDATE_W_RV( (NULL != frameCfgPtr) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
VALIDATE_W_RV( (NULL != buffer) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
filterMatchIdx = LINFLEXHw->IFMI.R;
if (filterMatchIdx > 0) {
retval = LinFlex_Common_WriteHwRegToDataBuf(buffer, LINFLEXHw);
VALIDATE_W_RV( (retval != E_NOT_OK) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
*frameCfgPtr = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelFrameConfig[Channel].LinSlvChnFrameCfg[filterMatchIdx - 1uL];
retval = E_OK;
} else {
LINFLEXHw->LINCR2.B.DDRQ =1; /* Discard any data that caused the interrupt */
retval = E_NOT_OK;
}
/* Clear flags */
LINFLEXHw->LINSR.B.HRF = 1;
LINFLEXHw->LINSR.B.DRF = 1;
return retval;
}
/**
*
* @param LinSlv_Cfg
* @param Channel
* @param frameCfgPtr
* @return
*/
Std_ReturnType LinSlv_Hw_Tx_GetFramePtr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, const LinIf_FrameType **frameCfgPtr) {
volatile struct LINFLEX_tag * LINFLEXHw;
Std_ReturnType retval;
uint32 filterMatchIdx;
uint32 chnId;
VALIDATE_W_RV( (NULL != LinSlv_Cfg) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
VALIDATE_W_RV( (NULL != frameCfgPtr) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
filterMatchIdx = LINFLEXHw->IFMI.R;
if (filterMatchIdx > 0) {
*frameCfgPtr = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelFrameConfig[Channel].LinSlvChnFrameCfg[filterMatchIdx - 1uL];
retval = E_OK;
} else {
LINFLEXHw->LINCR2.B.DTRQ =1; /* Discard the transmission request */
retval = E_NOT_OK;
}
return retval;
}
/**
* Handles the error interrupts and returns E_NOT_OK if the Response error bit is to be set.
* @param LinSlv_Cfg
* @param Channel
* @return
*/
Std_ReturnType LinSlv_Hw_Err(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
volatile struct LINFLEX_tag * LINFLEXHw;
Std_ReturnType retval = E_OK;
boolean headerError;
boolean headerReceived = FALSE;
uint32 linsrLins;
uint32 cntOC1;
uint32 cntOC2;
uint32 csrCnt;
boolean hrf;
uint32 chnId;
VALIDATE_W_RV( (NULL != LinSlv_Cfg) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
cntOC1 = (uint32)LINFLEXHw->LINOCR.B.OC1;
cntOC2 = (uint32)LINFLEXHw->LINOCR.B.OC2;
csrCnt = (uint32)LINFLEXHw->LINTCSR.B.CNT;
hrf = (1uL == LINFLEXHw->LINSR.B.HRF) ? TRUE : FALSE;
linsrLins = (uint32)LINFLEXHw->LINSR.B.LINS;
/*lint -e{9007} No side effects, must write 1 to clear any bit in this register*/
headerError = ((LINFLEXHw->LINESR.B.SFEF > 0uL) || (LINFLEXHw->LINESR.B.BDEF > 0uL) || \
(LINFLEXHw->LINESR.B.IDPEF> 0uL) ) ? TRUE : FALSE;
/*
* Method used to detect if the header has been received or not;
* The LINS register have automatic state transitions, which becomes an issue when the
* stop bit is corrupted (it automatically goes to "break" state no matter what the previous
* state was. Therefore we also look at the OC1 time register.
* Although not written in any documentation, it appears that the base CNT starts at 0 at
* new reception, therefore we can compare the OC1 value against the header timeout value.
* If it is equal it means that we are in the state of receiving a header.
*/
if (((csrCnt < cntOC2) && (cntOC1 != HEADER_TIMEOUT) &&
(linsrLins > LINS_HEADER_COMP) && !headerError) ||
hrf)
{
headerReceived = TRUE;
}
/* Time out after the header was received */
if ((LINFLEXHw->LINESR.B.OCF == 1uL)) {
/* Must be set to init mode to clear this flag */
LINFLEXHw->LINCR1.B.INIT = 1;
LINFLEXHw->LINCR1.B.INIT = 0;
if (headerReceived) {
retval = E_NOT_OK;
}
}
/* Bit error occurred during response field transmission */
else if (LINFLEXHw->LINESR.B.BEF == 1uL){
retval = E_NOT_OK;
}
/* Checksum error */
else if (LINFLEXHw->LINESR.B.CEF == 1uL) {
retval = E_NOT_OK;
}
/* Invalid stop bit occurred during reception of response */
/* Extra check with OC1 counter to check if it is receiving header or not */
else if ((1uL == LINFLEXHw->LINESR.B.FEF) && (cntOC1 != HEADER_TIMEOUT)) {
retval = E_NOT_OK;
}
/* No error occurred that shall set the Response_error signal. */
else {
retval = E_OK;
}
/* Clear flags */
LINFLEXHw->LINESR.R=0xffffffffuL;
LINFLEXHw->LINSR.R = 0xffffffffuL;
LINFLEXHw->LINCR2.B.ABRQ =1;
LINFLEXHw->LINCR2.B.DDRQ = 1;
return retval;
}
#ifdef LINSLV_CHANNEL_0_USED
ISR(LinSlvInterruptRxA); /* Prototype definition */
ISR(LinSlvInterruptRxA){LinSlv_Internal_Rx_Isr(0);}
ISR(LinSlvInterruptTxA); /* Prototype definition */
ISR(LinSlvInterruptTxA){LinSlv_Internal_Tx_Isr(0);}
ISR(LinSlvInterruptErrA); /* Prototype definition */
ISR(LinSlvInterruptErrA){LinSlv_Internal_Err_Isr(0);}
#endif
#ifdef LINSLV_CHANNEL_1_USED
ISR(LinSlvInterruptRxB); /* Prototype definition */
ISR(LinSlvInterruptRxB){LinSlv_Internal_Rx_Isr(1);}
ISR(LinSlvInterruptTxB); /* Prototype definition */
ISR(LinSlvInterruptTxB){LinSlv_Internal_Tx_Isr(1);}
ISR(LinSlvInterruptErrB); /* Prototype definition */
ISR(LinSlvInterruptErrB){LinSlv_Internal_Err_Isr(1);}
#endif
#ifdef LINSLV_CHANNEL_2_USED
ISR(LinSlvInterruptRxC); /* Prototype definition */
ISR(LinSlvInterruptRxC){LinSlv_Internal_Rx_Isr(2);}
ISR(LinSlvInterruptTxC); /* Prototype definition */
ISR(LinSlvInterruptTxC){LinSlv_Internal_Tx_Isr(2);}
ISR(LinSlvInterruptErrC); /* Prototype definition */
ISR(LinSlvInterruptErrC){LinSlv_Internal_Err_Isr(2);}
#endif
#ifdef LINSLV_CHANNEL_3_USED
ISR(LinSlvInterruptRxD); /* Prototype definition */
ISR(LinSlvInterruptRxD){LinSlv_Internal_Rx_Isr(3);}
ISR(LinSlvInterruptTxD); /* Prototype definition */
ISR(LinSlvInterruptTxD){LinSlv_Internal_Tx_Isr(3);}
ISR(LinSlvInterruptErrD); /* Prototype definition */
ISR(LinSlvInterruptErrD){LinSlv_Internal_Err_Isr(3);}
#endif
#ifdef LINSLV_CHANNEL_4_USED
ISR(LinSlvInterruptRxE); /* Prototype definition */
ISR(LinSlvInterruptRxE){LinSlv_Internal_Rx_Isr(4);}
ISR(LinSlvInterruptTxE); /* Prototype definition */
ISR(LinSlvInterruptTxE){LinSlv_Internal_Tx_Isr(4);}
ISR(LinSlvInterruptErrE); /* Prototype definition */
ISR(LinSlvInterruptErrE){LinSlv_Internal_Err_Isr(4);}
#endif
#ifdef LINSLV_CHANNEL_5_USED
ISR(LinSlvInterruptRxF); /* Prototype definition */
ISR(LinSlvInterruptRxF){LinSlv_Internal_Rx_Isr(5);}
ISR(LinSlvInterruptTxF); /* Prototype definition */
ISR(LinSlvInterruptTxF){LinSlv_Internal_Tx_Isr(5);}
ISR(LinSlvInterruptErrF); /* Prototype definition */
ISR(LinSlvInterruptErrF){LinSlv_Internal_Err_Isr(5);}
#endif
#ifdef LINSLV_CHANNEL_6_USED
ISR(LinSlvInterruptRxG); /* Prototype definition */
ISR(LinSlvInterruptRxG){LinSlv_Internal_Rx_Isr(6);}
ISR(LinSlvInterruptTxG); /* Prototype definition */
ISR(LinSlvInterruptTxG){LinSlv_Internal_Tx_Isr(6);}
ISR(LinSlvInterruptErrG); /* Prototype definition */
ISR(LinSlvInterruptErrG){LinSlv_Internal_Err_Isr(6);}
#endif
#ifdef LINSLV_CHANNEL_7_USED
ISR(LinSlvInterruptRxH); /* Prototype definition */
ISR(LinSlvInterruptRxH){LinSlv_Internal_Rx_Isr(7);}
ISR(LinSlvInterruptTxH); /* Prototype definition */
ISR(LinSlvInterruptTxH){LinSlv_Internal_Tx_Isr(7);}
ISR(LinSlvInterruptErrH); /* Prototype definition */
ISR(LinSlvInterruptErrH){LinSlv_Internal_Err_Isr(7);}
#endif
#ifdef LINSLV_CHANNEL_14_USED
ISR(LinSlvInterruptRx14); /* Prototype definition */
ISR(LinSlvInterruptRx14){LinSlv_Internal_Rx_Isr(14);}
ISR(LinSlvInterruptTx14); /* Prototype definition */
ISR(LinSlvInterruptTx14){LinSlv_Internal_Tx_Isr(14);}
ISR(LinSlvInterruptErr14); /* Prototype definition */
ISR(LinSlvInterruptErr14){LinSlv_Internal_Err_Isr(14);}
#endif
#ifdef LINSLV_CHANNEL_15_USED
ISR(LinSlvInterruptRx15); /* Prototype definition */
ISR(LinSlvInterruptRx15){LinSlv_Internal_Rx_Isr(15);}
ISR(LinSlvInterruptTx15); /* Prototype definition */
ISR(LinSlvInterruptTx15){LinSlv_Internal_Tx_Isr(15);}
ISR(LinSlvInterruptErr15); /* Prototype definition */
ISR(LinSlvInterruptErr15){LinSlv_Internal_Err_Isr(15);}
#endif
#ifdef LINSLV_CHANNEL_16_USED
ISR(LinSlvInterruptRx16); /* Prototype definition */
ISR(LinSlvInterruptRx16){LinSlv_Internal_Rx_Isr(16);}
ISR(LinSlvInterruptTx16); /* Prototype definition */
ISR(LinSlvInterruptTx16){LinSlv_Internal_Tx_Isr(16);}
ISR(LinSlvInterruptErr16); /* Prototype definition */
ISR(LinSlvInterruptErr16){LinSlv_Internal_Err_Isr(16);}
#endif
/**
* DeInitialize the peripheral and sets channel status
* @param LinSlv_Cfg
*/
void LinSlv_Internal_Deinit(LinSlv_ContainerType* LinSlv_Cfg) {
uint8 channel;
VALIDATE( (NULL != LinSlv_Cfg), LINSLV_DEINIT_SERVICE_ID, LINSLV_E_PARAM_POINTER );
for (channel = 0; channel < LINSLV_CHANNEL_CNT; channel++) {
LinFlex_Common_DeInit(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[channel].LinSlvChnConfig);
LinSlv_Cfg->LinSlvChannelStatus[channel]=LIN_CH_UNINIT;
LinSlv_Cfg->LinSlvChannelOrderedStatus[channel]=LIN_CH_UNINIT;
}
}
/**
* Initializes the module
* @param LinSlv_Cfg
* @return
*/
Std_ReturnType LinSlv_Internal_Init(LinSlv_ContainerType* LinSlv_Cfg) {
const Lin_ChannelConfigType *chnCfg;
Std_ReturnType retval;
uint8 channel;
VALIDATE_W_RV( ( NULL != LinSlv_Cfg), LINSLV_INIT_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
#ifdef LINSLV_CHANNEL_0_USED
ISR_INSTALL_ISR2("LinSlvIsrRxA", LinSlvInterruptRxA, (int16_t)(LINFLEX_0_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxA", LinSlvInterruptTxA, (int16_t)(LINFLEX_0_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrA", LinSlvInterruptErrA, (int16_t)(LINFLEX_0_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_1_USED
ISR_INSTALL_ISR2("LinSlvIsrRxB", LinSlvInterruptRxB, (int16_t)(LINFLEX_1_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxB", LinSlvInterruptTxB, (int16_t)(LINFLEX_1_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrB", LinSlvInterruptErrB, (int16_t)(LINFLEX_1_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_2_USED
ISR_INSTALL_ISR2("LinSlvIsrRxC", LinSlvInterruptRxC, (int16_t)(LINFLEX_2_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxC", LinSlvInterruptTxC, (int16_t)(LINFLEX_2_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrC", LinSlvInterruptErrC, (int16_t)(LINFLEX_2_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_3_USED
ISR_INSTALL_ISR2("LinSlvIsrRxD", LinSlvInterruptRxD, (int16_t)(LINFLEX_3_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxD", LinSlvInterruptTxD, (int16_t)(LINFLEX_3_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrD", LinSlvInterruptErrD, (int16_t)(LINFLEX_3_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_4_USED
ISR_INSTALL_ISR2("LinSlvIsrRxE", LinSlvInterruptRxE, (int16_t)(LINFLEX_4_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxE", LinSlvInterruptTxE, (int16_t)(LINFLEX_4_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrE", LinSlvInterruptErrE, (int16_t)(LINFLEX_4_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_5_USED
ISR_INSTALL_ISR2("LinSlvIsrRxF", LinSlvInterruptRxF, (int16_t)(LINFLEX_5_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxF", LinSlvInterruptTxF, (int16_t)(LINFLEX_5_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrF", LinSlvInterruptErrF, (int16_t)(LINFLEX_5_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_6_USED
ISR_INSTALL_ISR2("LinSlvIsrRxG", LinSlvInterruptRxG, (int16_t)(LINFLEX_6_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxG", LinSlvInterruptTxG, (int16_t)(LINFLEX_6_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrG", LinSlvInterruptErrG, (int16_t)(LINFLEX_6_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_7_USED
ISR_INSTALL_ISR2("LinSlvIsrRxH", LinSlvInterruptRxH, (int16_t)(LINFLEX_7_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTxH", LinSlvInterruptTxH, (int16_t)(LINFLEX_7_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErrH", LinSlvInterruptErrH, (int16_t)(LINFLEX_7_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_14_USED
ISR_INSTALL_ISR2("LinSlvIsrRx14", LinSlvInterruptRx14, (int16_t)(LINFLEX_14_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTx14", LinSlvInterruptTx14, (int16_t)(LINFLEX_14_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErr14", LinSlvInterruptErr14, (int16_t)(LINFLEX_14_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_15_USED
ISR_INSTALL_ISR2("LinSlvIsrRx15", LinSlvInterruptRx15, (int16_t)(LINFLEX_15_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTx15", LinSlvInterruptTx15, (int16_t)(LINFLEX_15_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErr15", LinSlvInterruptErr15, (int16_t)(LINFLEX_15_ERR), 3, 0);
#endif
#ifdef LINSLV_CHANNEL_16_USED
ISR_INSTALL_ISR2("LinSlvIsrRx16", LinSlvInterruptRx16, (int16_t)(LINFLEX_16_RXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrTx16", LinSlvInterruptTx16, (int16_t)(LINFLEX_16_TXI), 3, 0);
ISR_INSTALL_ISR2("LinSlvIsrErr16", LinSlvInterruptErr16, (int16_t)(LINFLEX_16_ERR), 3, 0);
#endif
for (channel = 0; channel < LINSLV_CHANNEL_CNT; channel++) {
chnCfg = &LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[channel].LinSlvChnConfig;
retval = LinFlex_Common_Init(chnCfg, LIN_SLAVE);
if (E_NOT_OK == retval) {
return E_NOT_OK;
}
retval = LinFlex_Common_SetupSlvFilter(chnCfg, &LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelFrameConfig[channel]);
if (E_NOT_OK == retval) {
return E_NOT_OK;
}
if (LINIF_CHANNEL_SLEEP == LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[channel].LinSlvChannelInitState) {
LinFlex_Common_GoToSleepInternal(chnCfg);
LinSlv_Cfg->LinSlvChannelStatus[channel]=LIN_CH_SLEEP;
LinSlv_Cfg->LinSlvChannelOrderedStatus[channel]=LIN_CH_SLEEP;
} else {
LinSlv_Cfg->LinSlvChannelStatus[channel]=LIN_OPERATIONAL;
LinSlv_Cfg->LinSlvChannelOrderedStatus[channel]=LIN_OPERATIONAL;
}
}
return E_OK;
}
/**
* Internal functionality to enter power save mode.
* @param LinSlv_Cfg
* @param Channel
*/
void LinSlv_Internal_GoToSleepInternal(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
LinFlex_Common_GoToSleepInternal(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig);
}
/**
* Set the control to operational mode
* @param LinSlv_Cfg
* @param Channel
*/
void LinSlv_Internal_WakeupInternal(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
LinFlex_Common_WakeupInternal(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig);
}
/**
* Send wake-up on the bus
* @param LinSlv_Cfg
* @param Channel
*/
Std_ReturnType LinSlv_Internal_Wakeup(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
return LinFlex_Common_Wakeup(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig);
}
/**
* Check if the wake-up is set.
* @param LinSlv_Cfg
* @param Channel
* @return
*/
boolean LinSlv_Internal_IsWakeUpSet(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
return LinFlex_Common_IsWakeUpSet(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig);
}
/**
* Read out the peripheral status of the unit
* @param LinSlv_Cfg
* @param Channel
* @return
*/
Lin_StatusType LinSlv_Internal_GetStatus(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
return LinFlex_Common_GetPeripheralStatus(&LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig);
}
/**
* Set response data and request transmission of the response.
* @param LinSlv_Cfg
* @param Channel
* @param Length
* @param Buffer
*/
void LinSlv_Internal_SetResponse(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, uint8 Length, const uint8 *Buffer) {
volatile struct LINFLEX_tag * LINFLEXHw;
Std_ReturnType retval;
uint32 chnId;
VALIDATE( (NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
VALIDATE( (NULL != Buffer) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
retval = LinFlex_Common_WriteDataBufToHwReg(Length, Buffer, LINFLEXHw);
VALIDATE( (E_OK == retval) , LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_CONFIG);
// Trigger the data transmission
LINFLEXHw->LINCR2.B.DTRQ = 1;
}
/**
*
* @param LinSlv_Cfg
* @param Channel
* @return
*/
LinSlv_TxIsrSourceType LinSlv_Hw_Tx_GetIsrSource(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
const volatile struct LINFLEX_tag * LINFLEXHw;
LinSlv_TxIsrSourceType retval = LINSLV_OTHER;
uint32 chnId;
VALIDATE_W_RV( ( NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER, LINSLV_OTHER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
if (1uL == LINFLEXHw->LINSR.B.HRF) {
retval = LINSLV_HEADER;
} else if (1uL == LINFLEXHw->LINSR.B.DTF) {
retval = LINSLV_TRANSMIT_DONE;
} else {
retval = LINSLV_OTHER;
}
return retval;
}
/**
* Clear the flags that caused the tx isr
* @param LinSlv_Cfg
* @param Channel
*/
void LinSlv_Hw_ClearTxIsrFlags(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
volatile struct LINFLEX_tag * LINFLEXHw;
uint32 chnId;
VALIDATE( ( NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
LINFLEXHw->LINSR.B.HRF = 1;
LINFLEXHw->LINSR.B.DTF = 1;
}
/**
* Store the ISR setup of the channel and disables them.
* @param LinSlv_Cfg
* @param Channel
*/
void LinSlv_Internal_StoreAndDisableIsr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
volatile struct LINFLEX_tag * LINFLEXHw;
uint32 chnId;
VALIDATE( ( NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
chnIsrSetup[Channel] = LINFLEXHw->LINIER.R;
LINFLEXHw->LINIER.R = 0;
}
/**
* Restores the ISR setup of the channel and enables them.
* @param LinSlv_Cfg
* @param Channel
*/
void LinSlv_Internal_RestoreAndEnableIsr(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
volatile struct LINFLEX_tag * LINFLEXHw;
uint32 chnId;
VALIDATE( ( NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEX(chnId);
LINFLEXHw->LINIER.R = chnIsrSetup[Channel];
}
/**
* Update the filter rules for a frame.
* @param LinSlv_Cfg
* @param Channel
* @param frameIndex
* @param newPid
*/
void LinSlv_Internal_UpdatePid(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel, uint8 frameIndex, uint8 newPid) {
volatile struct LINFLEX_MS_tag * LINFLEXHw;
uint32 chnId;
uint32 ifcr;
uint8 id;
VALIDATE( ( NULL != LinSlv_Cfg), LINSLV_INTERNAL_ISR_ID, LINSLV_E_INVALID_POINTER);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEXSLV(chnId);
LINFLEXHw->LINCR1.B.INIT = 1; /* Go to init mode */
//Mask out parity bits
id = newPid & MASK_ID;
//Store current filter rules
ifcr = LINFLEXHw->IFCR[frameIndex].R;
ifcr &= ~(MASK_IFCR_PID);
ifcr |= (uint32)id;
LINFLEXHw->IFCR[frameIndex].R = ifcr;
if (UNASSING_PID == newPid) {
// Disable the filter
LINFLEXHw->IFER.R &= ~(1uL << frameIndex);
} else {
LINFLEXHw->IFER.R |= (1uL << frameIndex);
}
LINFLEXHw->LINCR1.B.INIT = 0;
}
/**
*
* @param LinSlv_Cfg
* @param Channel
* @return
*/
boolean LinSlv_Internal_IsWakeUpDoneTransmitting(const LinSlv_ContainerType* LinSlv_Cfg, uint8 Channel) {
const volatile struct LINFLEX_MS_tag * LINFLEXHw;
boolean retval;
uint32 chnId;
VALIDATE_W_RV( ( NULL != LinSlv_Cfg), LINSLV_MAINFUNCTION_SERVICE_ID, LINSLV_E_INVALID_POINTER, FALSE);
chnId = LinSlv_Cfg->LinSlvCfgPtr->LinSlvChannelConfig[Channel].LinSlvChnConfig.LinChannelId;
/*lint -e{923,9033} Hardware access */
LINFLEXHw = LINFLEXSLV(chnId);
retval = (0uL == LINFLEXHw->LINCR2.B.WURQ) ? TRUE : FALSE;
return retval;
}
#if (LINSLV_TRCV_SUPPORT == STD_ON)
/**
* Set the transceiver mode.
* @param LinSlv_Cfg
* @param Channel
* @param TransceiverMode
* @return
*/
Std_ReturnType LinSlv_Internal_SetTrcvMode(const LinSlv_ContainerType* LinSlv_Cfg,
uint8 Channel,
LinTrcv_TrcvModeType TransceiverMode)
{
const LinSlv_TrcvType * trcvCfg;
uint16 portTxSymbolicRef;
uint32 dioTxSymbolicRef;
uint32 dioEnableSymbolicRef;
VALIDATE_W_RV( ( NULL != LinSlv_Cfg), LINSLV_SETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
trcvCfg = &LinSlv_Cfg->LinSlvCfgPtr->LinSlvChnTrcvConfig[Channel];
portTxSymbolicRef = trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvTxPortSource;
dioTxSymbolicRef = trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvTxDioSource;
dioEnableSymbolicRef = trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvEnableSource;
if (LINTRCV_TRCV_MODE_SLEEP == TransceiverMode) {
// To set the transceiver into sleep mode the TX pin must be set low
// for 20 us. The reliable method of doing this is to temporarily reconfigure
// the pin to be a digital output set to low.
uint16 txPcrReg = PortConfigData.padConfig[portTxSymbolicRef].config;
uint16 txPcrForceDio = (~(PORT_BIT4 | PORT_BIT5)) & txPcrReg;
uint32 j;
Dio_WriteChannel(dioEnableSymbolicRef, STD_LOW);
// Set tx pin to digital output, low.
Port_SetPinMode(portTxSymbolicRef, txPcrForceDio);
Dio_WriteChannel(dioTxSymbolicRef, STD_LOW);
// Use the LowWaitCount parameter to achieve the 20us delay.
for (j = 0; j < trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvTxLowWaitCount; j++) {
;
}
// Set tx port pin config back to its original state.
Port_SetPinMode(portTxSymbolicRef, txPcrReg);
} else if (LINTRCV_TRCV_MODE_STANDBY == TransceiverMode) {
Dio_WriteChannel(dioEnableSymbolicRef, STD_LOW);
} else { /* LINTRCV_TRCV_MODE_NORMAL */
Dio_WriteChannel(dioEnableSymbolicRef, STD_HIGH);
}
return E_OK;
}
/**
* Returns the transceiver mode.
* @param LinSlv_Cfg
* @param Channel
* @param TransceiverMode
* @return
*/
Std_ReturnType LinSlv_Internal_GetTrcvMode(const LinSlv_ContainerType* LinSlv_Cfg,
uint8 Channel,
LinTrcv_TrcvModeType *TransceiverModePtr)
{
const LinSlv_TrcvType * trcvCfg;
Std_ReturnType retval = E_OK;
boolean dioEnablePin;
boolean dioRstnPin;
VALIDATE_W_RV( ( NULL != LinSlv_Cfg) , LINSLV_GETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
VALIDATE_W_RV( ( NULL != TransceiverModePtr), LINSLV_GETTRCVMODE_SERVICE_ID, LINSLV_E_INVALID_POINTER, E_NOT_OK);
trcvCfg = &LinSlv_Cfg->LinSlvCfgPtr->LinSlvChnTrcvConfig[Channel];
dioEnablePin = (STD_HIGH == Dio_ReadChannel(trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvEnableSource)) ? TRUE : FALSE;
dioRstnPin = (STD_HIGH == Dio_ReadChannel(trcvCfg->LinSlvTrcvDioAccess.LinSlvTrcvRstnSource)) ? TRUE : FALSE;
if (dioEnablePin && dioRstnPin) {
*TransceiverModePtr = LINTRCV_TRCV_MODE_NORMAL;
} else if (!dioEnablePin && dioRstnPin) {
*TransceiverModePtr = LINTRCV_TRCV_MODE_STANDBY;
} else if (!dioEnablePin && !dioRstnPin) {
*TransceiverModePtr = LINTRCV_TRCV_MODE_SLEEP;
} else {
retval = E_NOT_OK;
}
return retval;
}
#endif
|
2301_81045437/classic-platform
|
cdd/LinSlv/src/ppc/CDD_LinSlv_Internal.c
|
C
|
unknown
| 28,339
|
obj-y += CddPduR.o
obj-y += CddPduR_Cfg.o
inc-y += $(ROOTDIR)/cdd/PduR/src
vpath-y += $(ROOTDIR)/cdd/PduR/src
|
2301_81045437/classic-platform
|
cdd/PduR/mod.mk
|
Makefile
|
unknown
| 118
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "PduR.h"
#include "CddPduR.h"
#include "PduR_CddPduR.h"
#include <string.h>
#if defined(USE_DLT)
#include "Dlt.h"
#endif
typedef enum
{
BUFF_STATE_NO_BUFFER=0,
BUFF_STATE_RX_OK = 1,
BUFF_STATE_ERROOR = 2,
BUFF_STATE_FREE = 3,
BUFF_STATE_BUSY = 4
} BuffStateType;
typedef struct CddPduR_BuffInfo {
uint8 *sduDataPtr;
PduLengthType sduLength;
uint16 idx;
BuffStateType state;
/* Size of buffer provided in CddPduR_ProvideBuffer() */
uint16 buffSize;
} CddPduR_BuffInfoType;
CddPduR_BuffInfoType CddPduR_BInfo[CDDPDUR_MAX_N_IPDUS];
void CddPduR_RxIndication(PduIdType id, PduInfoType* pduInfoPtr) {
if ( (CddPduR_BInfo[id].state == BUFF_STATE_FREE) &&
(CddPduR_BInfo[id].buffSize >= pduInfoPtr->SduLength) )
{
CddPduR_BInfo[id].sduLength = pduInfoPtr->SduLength;
// Copy IPDU data
memcpy( CddPduR_BInfo[id].sduDataPtr,
pduInfoPtr->SduDataPtr,
pduInfoPtr->SduLength);
CddPduR_BInfo[id].state = BUFF_STATE_RX_OK;
#if defined(USE_DLT)
DltCom_ReceiveIndication(id,pduInfoPtr);
#endif
}
}
void CddPduR_TpRxIndication( PduIdType id, Std_ReturnType result ) {
if( result == E_OK ) {
CddPduR_BInfo[id].state = BUFF_STATE_RX_OK;
}
}
/**
* Function is called once the I-PDU have been transmitted over the network
*
* @param id
* @param result
*/
void CddPduR_TpTxConfirmation(PduIdType id, Std_ReturnType result ) {
CddPduR_BInfo[id].state = BUFF_STATE_NO_BUFFER;
}
void CddPduR_TxConfirmation(PduIdType id, Std_ReturnType result ) {
CddPduR_BInfo[id].state = BUFF_STATE_NO_BUFFER;
}
Std_ReturnType CddPduR_Send(PduIdType id, const void* dataPtr, uint16 length ) {
Std_ReturnType pduRv = E_NOT_OK;
PduInfoType info = {.SduDataPtr = (void *)dataPtr, .SduLength = length };
if( CddPduR_BInfo[id].state == BUFF_STATE_NO_BUFFER ) {
CddPduR_BInfo[id].state = BUFF_STATE_BUSY;
CddPduR_BInfo[id].sduDataPtr = (uint8_t *)dataPtr;
CddPduR_BInfo[id].sduLength = length;
CddPduR_BInfo[id].idx = 0;
/* Call the PduR function */
pduRv = PduR_CddPduRTransmit(CddPduR_PduMap[id], &info );
if(pduRv == E_NOT_OK){
CddPduR_BInfo[id].state = BUFF_STATE_NO_BUFFER;
}
}
return pduRv;
}
Std_ReturnType CddPduR_Receive( PduIdType id, void** dataPtr, uint16* length ) {
Std_ReturnType rv;
/* Return the buffer if the message is complete */
if (CddPduR_BInfo[id].state == BUFF_STATE_RX_OK) {
*dataPtr = CddPduR_BInfo[id].sduDataPtr;
*length = CddPduR_BInfo[id].sduLength;
rv = E_OK;
} else {
*length = 0;
/* Busy */
rv = E_NOT_OK;
}
return rv;
}
Std_ReturnType CddPduR_ProvideBuffer( PduIdType id, void* dataPtr, uint16 length ) {
/* Return the buffer if the message is complete */
CddPduR_BInfo[id].sduDataPtr = dataPtr;
CddPduR_BInfo[id].sduLength = 0;
CddPduR_BInfo[id].buffSize = length;
CddPduR_BInfo[id].state = BUFF_STATE_FREE;
return E_OK;
}
Std_ReturnType CddPduR_UnlockBuffer( PduIdType id ) {
CddPduR_BInfo[id].state = BUFF_STATE_NO_BUFFER;
return E_OK;
}
/**
* Copy received data.
*
* @param PduId
* @param PduInfoPtr
* @param RxBufferSizePtr
* @return
*/
BufReq_ReturnType CddPduR_CopyRxData(PduIdType id, const PduInfoType* pduInfoPtr, PduLengthType* rxBufferSizePtr) {
BufReq_ReturnType rv = BUFREQ_E_NOT_OK;
/* Copy received data to buffer */
if (CddPduR_BInfo[id].state == BUFF_STATE_BUSY)
{
if (pduInfoPtr->SduLength > 0)
{
memcpy( &CddPduR_BInfo[id].sduDataPtr[CddPduR_BInfo[id].idx],
pduInfoPtr->SduDataPtr,
pduInfoPtr->SduLength);
CddPduR_BInfo[id].idx += pduInfoPtr->SduLength;
*rxBufferSizePtr = CddPduR_BInfo[id].sduLength - CddPduR_BInfo[id].idx;
rv = BUFREQ_OK;
} else {
*rxBufferSizePtr = CddPduR_BInfo[id].sduLength - CddPduR_BInfo[id].idx;
rv = BUFREQ_OK;
}
}
return rv;
}
/**
*
* @param PduId
* @param PduInfoPtr Provides destination buffer and number for bytes to copy.
* @param RetryInfoPtr
* @param TxDataCntPtr
* @return BUFREQ_OK - : Data has been copied to the transmit buffer completely as requested
* BUFREQ_E_NOT_OK: Fail
* BUFREQ_E_BUSY: Fail
*
*/
BufReq_ReturnType CddPduR_CopyTxData( PduIdType id,
PduInfoType* pduInfoPtr,
RetryInfoType* retryInfoPtr,
PduLengthType* txDataCntPtr)
{
/* Copy from interal buffer to PduR buffer */
memcpy( pduInfoPtr->SduDataPtr,
&CddPduR_BInfo[id].sduDataPtr[CddPduR_BInfo[id].idx],
pduInfoPtr->SduLength);
CddPduR_BInfo[id].idx += pduInfoPtr->SduLength;
/* return remaining TX data */
*txDataCntPtr = CddPduR_BInfo[id].sduLength - CddPduR_BInfo[id].idx;
return BUFREQ_OK;
}
/**
* Start the reception of PduId
*
* @param PduId
* @param TpSduLength
* @param RxBufferSizePtr
* @return
*/
/**
*
* @param id The PduId
* @param infoPtr Pointer to structure containing content and length
* of FF or SF.
* NOT USED..is null
* @param tpSduLength Total length of the N-SDU to be received
* @param rxBufferSizePtr [out] Length of the available buffer
* @return BUFREQ_OK - Accept
* BUFREQ_E_NOT_OK - Reject connection
* BUFREQ_E_OVFL - Cannot supply buffer, reception abort.
*/
BufReq_ReturnType CddPduR_StartOfReception( PduIdType id,
const PduInfoType* infoPtr,
PduLengthType tpSduLength,
PduLengthType* rxBufferSizePtr)
{
BufReq_ReturnType rv;
if ( (CddPduR_BInfo[id].state == BUFF_STATE_FREE) &&
(CddPduR_BInfo[id].buffSize >= tpSduLength) )
{
/* Set available length for PduR */
*rxBufferSizePtr = CddPduR_BInfo[id].buffSize;
CddPduR_BInfo[id].sduLength = tpSduLength;
CddPduR_BInfo[id].idx = 0;
CddPduR_BInfo[id].state = BUFF_STATE_BUSY;
rv = BUFREQ_OK;
} else {
rv = BUFREQ_E_OVFL;
}
return rv;
}
|
2301_81045437/classic-platform
|
cdd/PduR/src/CddPduR.c
|
C
|
unknown
| 7,434
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef MYCDDPDUR_H_
#define MYCDDPDUR_H_
#include "Std_Types.h"
#include "ComStack_Types.h"
#include "CddPduR_Cfg.h"
/**
* Send a buffer
*
* @param id The PDU id
* @param dataPtr Pointer to the buffer to send.
* @param length The length of the buffer.
* @return E_OK : The send buffer was accepted by lower layers
* E_NOT_OK : The channel is busy
*/
Std_ReturnType CddPduR_Send(PduIdType id, const void* dataPtr, uint16 length );
/**
* Provide a Rx buffer to receive data in.
*
* @param id Pdu ID
* @param dataPtr Pointer to the buffer
* @param length THe length of buffer
* @return
*/
Std_ReturnType CddPduR_ProvideBuffer( PduIdType id, void* dataPtr, uint16 length );
/**
* Receive the
*
* @param id Pdu ID
* @param[out] dataPtrPtr Pointer to where the data is.
* This is a memory area once allocated by CddPduR_ProvideBuffer()
* @param[out] length The length of the received message.
* @return E_OK
* E_NOT_OK
*/
Std_ReturnType CddPduR_Receive( PduIdType id, void** dataPtrPtr, uint16* length );
/**
* Unlocks a buffer received by CddPduR_Receive()
*
* @param id
* @return
*/
Std_ReturnType CddPduR_UnlockBuffer( PduIdType id );
#endif /* MYCDDPDUR_H_ */
|
2301_81045437/classic-platform
|
cdd/PduR/src/CddPduR.h
|
C
|
unknown
| 2,060
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef CDDPDUR_CBK_H_
#define CDDPDUR_CBK_H_
void CddPduR_TpRxIndication(PduIdType id, Std_ReturnType result);
void CddPduR_TpTxConfirmation(PduIdType id, Std_ReturnType result);
void CddPduR_RxIndication(PduIdType id, PduInfoType* pduInfoPtr);
void CddPduR_TxConfirmation(PduIdType id, Std_ReturnType result);
BufReq_ReturnType CddPduR_CopyTxData(PduIdType id, const PduInfoType* pduInfoPtr, RetryInfoType* retryInfoPtr, PduLengthType* availableDataPtr);
BufReq_ReturnType CddPduR_CopyRxData(PduIdType id, const PduInfoType* pduInfoPtr, PduLengthType* bufferSizePtr );
BufReq_ReturnType CddPduR_StartOfReception( PduIdType id,
const PduInfoType* infoPtr,
PduLengthType tpSduLength,
PduLengthType* bufferSizePtr);
#endif /* CDDPDUR_CBK_H_ */
|
2301_81045437/classic-platform
|
cdd/PduR/src/CddPduR_Cbk.h
|
C
|
unknown
| 1,648
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef ASSERT_H_
#define ASSERT_H_
#include <stdio.h>
#include <stdlib.h>
#if defined(NDEBUG)
#define assert(_x)
#else
#define assert(_x) if (!(_x)) { \
/* printf("%s %s %s\n",#_x,__FILE__,__LINE__); */ \
while(1){}; \
}
#endif
#endif /* ASSERT_H_ */
|
2301_81045437/classic-platform
|
clib/assert.h
|
C
|
unknown
| 1,090
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef CLIB_H_
#define CLIB_H_
#include "device.h"
#endif /* CLIB_H_ */
|
2301_81045437/classic-platform
|
clib/clib.h
|
C
|
unknown
| 840
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* ----------------------------[information]----------------------------------
* Author: mahi
*
* Description:
* Implements the glue between different clibs and ArcCore "system"
*
* Implementation Notes:
* Heavily inspired by http://neptune.billgatliff.com/newlib.html
*
* If a module should be used is controlled by USE_TTY_T32, USE_TTY_WINIDEA, etc
* The console is controlled by SELECT_CONSOLE=TTY_T32|TTY_WINIDEA|RAMLOG|....
*/
/*lint -w1 Only errors in generic module used during development */
/* ----------------------------[includes]------------------------------------*/
#if defined(__GNUC__) && defined(__HIGHTEC__) && (SELECT_CLIB == CLIB_DNK )
#include <stat.h>
#include <sys/types.h>
#elif defined(__GNUC__)
#include <sys/stat.h>
#include <sys/types.h>
#endif
#include "stdio.h"
#include <errno.h>
#include <stdlib.h>
#include <string.h>
#include <stddef.h>
#include "Std_Types.h"
#if defined(USE_KERNEL)
#include "Os.h"
#endif
#include "fcntl.h"
#include "device.h"
#include "fs.h"
#include "device_serial.h"
#if defined(USE_TTY_UDE)
#include "serial_dbg_ude.h"
#endif
#if defined(USE_TTY_T32)
#include "serial_dbg_t32.h"
#endif
#if defined(USE_TTY_WINIDEA)
#include "serial_dbg_winidea.h"
#endif
#if defined(USE_TTY_CODE_COMPOSER)
#include "serial_dbg_code_composer.h"
#endif
#if defined(USE_TTY_SCI)
#include "serial_sci.h"
#endif
#include "Ramlog.h"
#if defined(__ARMCC_VERSION)
#define caddr_t char *
#endif
/* ----------------------------[private define]------------------------------*/
#if !((defined(CFG_ARM) || defined(CFG_RH850)) && defined(__GNUC__))
#define _open open
#if !defined(__HIGHTEC__)
#define _exit exit
#endif
#define _fstat fstat
#define _getpid getpid
#define _kill kill
#define _close close
#define _isatty isatty
#define _sbrk sbrk
#define _read read
#define _write write
#define _lseek lseek
#endif
/* Unify over compilers */
#ifndef EBADF
#define EBADF 9
#endif
#ifndef ESPIPE
#define ESPIPE 29
#endif
#define MAX_OPEN_FILES 5
/* Console devices...usage:
* Normally you have a console device when it's connected to a debugger. Some debuggers do not have
* a proper terminal window, then the ramlog can be used.
*
* Use cases:
* 1. SELECT_CONSOLE=TTY_T32
* 2. SELECT_CONSOLE=RAMLOG
* 3. SELECT_CONSOLE=TTY_NONE
* 4. SELECT_CONSOLE=TTY_T32 and you want to write the the RAMLOG (since it's much faster)
*
*
*
*/
#if defined(USE_TTY_T32)
#define CONSOLE_DEVICE &T32_Device.device
#elif defined(USE_TTY_UDE)
#define CONSOLE_DEVICE &UDE_Device.device
#elif defined(USE_TTY_WINIDEA)
#define CONSOLE_DEVICE &WinIdea_Device.device
#elif defined(USE_TTY_CODE_COMPOSER)
#define CONSOLE_DEVICE &CodeComposer_Device.device
#elif defined(USE_TTY_SCI)
#define CONSOLE_DEVICE &SCI_Device.device
#endif
#if !defined(CONSOLE_DEVICE) && defined(USE_RAMLOG)
#define CONSOLE_DEVICE &Ramlog_Device.device
#endif
#if !defined(CONSOLE_DEVICE)
#define CONSOLE_DEVICE &Dummy_Device.device
#endif
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
/* ----------------------------[private function prototypes]-----------------*/
/* ----------------------------[private variables]---------------------------*/
#include <clib.h>
extern FSDriverType FS_RamDevice;
DeviceSerialType Dummy_Device = { .name = "serial_Dummy", .read = NULL, .write =
NULL, .open = NULL, };
FILE openFiles[MAX_OPEN_FILES] =
{
/* stdin */
[0].devicePtr = CONSOLE_DEVICE, [0].type = DEVICE_TYPE_CONSOLE,
[0].fileNo = 0,
/* stdout */
[1].devicePtr = CONSOLE_DEVICE, [1].type = DEVICE_TYPE_CONSOLE,
[1].fileNo = 1,
/* stderr */
[2].devicePtr = CONSOLE_DEVICE, [2].type = DEVICE_TYPE_CONSOLE,
[2].fileNo = 2,
};
_EnvType __Env = {
._stdin = &openFiles[0],
._stdout = &openFiles[1],
._stderr =
&openFiles[2], };
_EnvType *_EnvPtr = &__Env;
DeviceType *deviceList[] = {
CONSOLE_DEVICE,
#if defined(USE_RAMLOG)
&Ramlog_Device.device,
#endif
#if defined(CFG_FS_RAM)
&FS_RamDevice.device,
#endif
&Dummy_Device.device };
/* Errno is made reentrant by using malloc and we don't want this. This is usually fixed
* by undef errno and declaring it as extern int. It does not work when using GCC for
* HC1X and this ifdef takes care of that.
*/
//#undef errno
#if defined(__GNUC__) && defined(CFG_HC1X)
int errno;
#elif defined(__GNUC__) && defined(__HIGHTEC__)
extern int _Errno;
#elif defined(__ARMCC_VERSION)
extern volatile int errno;
#else
extern int errno;
#endif
/* ----------------------------[private functions]---------------------------*/
static int newFileNo(void) {
int i;
/* search, but skip standard handles */
for (i = 2; i < MAX_OPEN_FILES; i++) {
if (openFiles[i].fileNo == 0) {
break;
}
}
if (i == MAX_OPEN_FILES) {
return (-1);
}
return i;
}
static int validFileNo(int fileno) {
return (fileno < MAX_OPEN_FILES) && (openFiles[fileno].fileNo != 0);
}
#if defined(CFG_FS_RAM)
int fcntl(int fd, int cmd, int arg) {
int rv = -1;
if (cmd == F_SETFL) {
/* get arg */
openFiles[fd].o_flags = arg;
rv = 0;
} else if (cmd == F_GETFL) {
rv = openFiles[fd].o_flags;
}
return rv;
}
#endif
DeviceType * findDeviceByName(const char *filepath, uint32_t filter) {
uint32_t i;
for (i = 0UL; i < sizeof(deviceList) / sizeof(deviceList[0UL]); i++) {
if (deviceList[i]->type & filter) {
if (strcmp(filepath, deviceList[i]->name) == 0) {
return deviceList[i];
}
}
}
return NULL;
}
/* ----------------------------[public functions]----------------------------*/
#if defined(CFG_FS_RAM)
FILE *fopen(const char *filename, const char * mode) {
int fileNo;
fileNo = open(filename, 0, 0);
return &openFiles[fileNo];
}
int fclose(FILE *f) {
int fd;
fd = fileno(f);
return close(fd);
}
size_t fwrite(const void *ptr, size_t size, size_t nitems, FILE *f) {
int fd;
fd = fileno(f);
return write(fd, ptr, size * nitems) / size;
}
size_t fread(void *ptr, size_t size, size_t nitems, FILE *f) {
int fd;
fd = fileno(f);
return read(fd, ptr, size * nitems);
}
int setvbuf(FILE *f, char *buf, int mode, size_t size) {
if (buf == NULL) {
if (size == 0) {
size = BUFSIZ;
}
f->data = malloc(size);
f->end = size;
f->asize = size;
}
return 0;
}
void setbuf(FILE *f, char *buf) {
setvbuf(f, buf, buf ? _IOFBF : _IONBF, BUFSIZ);
}
int fflush(FILE *f) {
(void) f;
return 0;
}
void rewind(FILE *f) {
f->pos = 0;
}
long ftell(FILE *f) {
return (long) f->pos;
}
int fseek(FILE * f, long int offset, int origin) {
int fd;
fd = fileno(f);
return lseek(fd, offset, origin);
}
#endif
/**
* Get a file number from a file
* @param file
* @return
*/
int fileno(FILE *file) {
return file->fileNo;
}
/**
* POSIX open function
*
* Should probably support some O and S flags here
* See http://pubs.opengroup.org/onlinepubs/009695399/functions/open.html
*
* @param name Name of the file to open
* @param flags O_xx flags
* @param mode S_xx modes.
* @return The file descriptor or -1 if failed to open.
*/
int _open(const char *filepath, int flags, int mode) {
int fileNo = -1;
DeviceType *devH;
devH = findDeviceByName(filepath, DEVICE_TYPE_CONSOLE);
if (devH != NULL) {
fileNo = newFileNo();
if (fileNo == (-1)) {
return (-1);
}
/* console device */
DeviceSerialType *consoleH = GetRootObject(DeviceSerialType, device,
devH);
consoleH->open(filepath, flags, mode);
openFiles[fileNo].fileNo = fileNo;
openFiles[fileNo].devicePtr = devH;
} else {
#if defined(CFG_FS_RAM)
int i;
FILE *f;
/* the fileNo must be global so allocate here */
fileNo = newFileNo();
if (fileNo == (-1)) {
return (-1);
}
f = &openFiles[fileNo];
/* Support for one filesystem only, so grab the first one we get */
for( i=0; i<sizeof(deviceList)/sizeof(deviceList[0]); i++ ) {
if (deviceList[i]->type & DEVICE_TYPE_FS ) {
FSDriverType *devPtr = GetRootObject(FSDriverType,device,deviceList[i]);
devPtr->open(devPtr,f,filepath);
/* Save global information */
f->fileNo = fileNo;
f->devicePtr = deviceList[i];
strncpy(f->filepath,filepath,MAX_FILENAME_LEN);
break;
}
}
#endif
}
return fileNo;
}
#if defined(__GNUC__)
int fstat(int file, struct stat *st) {
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
#if !((defined(CFG_ARM) && defined(__GNUC__)) || defined(CFG_RH850))
#define _getpid getpid
#endif
pid_t _getpid() {
return 1;
}
#endif
#if !(defined(CFG_ARM) && defined(__GNUC__) || defined(CFG_RH850) )
#define _kill kill
#endif
int _kill(int pid, int sig) {
(void) pid;
(void) sig;
errno = EINVAL;
return (-1);
}
/* Do nothing */
int _close(int fd) {
int rv = -1;
DeviceType * dPtr;
if (!validFileNo(fd)) {
return EBADF;
}
dPtr = openFiles[fd].devicePtr;
if (dPtr->type == DEVICE_TYPE_FS) {
FILE *f;
FSDriverType *fs = GetRootObject(FSDriverType, device, dPtr);
f = &openFiles[fd];
fs->close(fs, f);
/* Cleanup */
if ((f->flags & FLAGS_SETBUF_ALLOC) == 0) {
free(f->data);
}
f->data = NULL;
f->asize = 0;
f->end = 0;
f->pos = 0;
f->fileNo = 0;
rv = 0;
}
return rv;
}
/**
*
* @param fd
* @return 1 if connected to a terminal
*/
int _isatty(int fd) {
(void) fd;
return 1;
}
/* If we use malloc and it runs out of memory it calls sbrk()
*/
#if defined(CFG_PPC) || (defined(CFG_ARMV7_AR) && defined(__GNUC__)) || defined(CFG_RH850)
#if defined(CFG_PPC)
#define _sbrk sbrk
#endif
/* linker symbols */
extern char _heap_start[]; // incomplete array to ensure not placed in small-data
extern char _heap_end[];
void * _sbrk( ptrdiff_t incr )
{
char *prevEnd;
static char *nextAvailMemPtr = _heap_start;
if( nextAvailMemPtr + incr > _heap_end) {
write( 2, "!!!! Heap overflow !!!!\n", 25 );
errno = EAGAIN;
abort();
}
prevEnd = nextAvailMemPtr;
nextAvailMemPtr += incr;
return prevEnd;
}
#elif defined(__ARMCC_VERSION)
/* Do not have sbrk() but instead something else */
#else
extern char _end[];
//static char *curbrk = _end;
#ifndef HEAPSIZE
#define HEAPSIZE 16000
#endif
/*
* The heap sadly have alignment that depends on the pagesize that
* you compile malloc newlib with. From what I can tell from the
* code that is a pagesize of 4096.
*/
unsigned char _heap[HEAPSIZE] __attribute__((aligned (4)));
//__attribute__((section(".heap")));
void * _sbrk(ptrdiff_t incr) {
static unsigned char *heap_end;
unsigned char *prev_heap_end;
/* initialize */
if (heap_end == 0) {
heap_end = _heap;
}
prev_heap_end = heap_end;
if (heap_end + incr - _heap > HEAPSIZE) {
/* heap overflow - announce on stderr */
write(2, "!!!! Heap overflow!!!!!\n", 25);
abort();
}
heap_end += incr;
return (void *) prev_heap_end;
}
#endif
int _read(int fd, void *buf, size_t nbytes) {
int rv = 0;
int32_t cpBytes;
// if (!validFileNo(fd)) {
// return EBADF;
// }
DeviceType * dPtr = openFiles[fd].devicePtr;
if (dPtr == NULL) {
return EBADF;
}
if (dPtr->type == DEVICE_TYPE_CONSOLE) {
DeviceSerialType *devSerPtr = GetRootObject(DeviceSerialType, device,
dPtr);
/* non-blocking read */
if (openFiles[fd].o_flags & O_NONBLOCK) {
rv = devSerPtr->read(buf, nbytes);
/* Nothing to read return -1 */
if (rv == 0) {
rv = -1;
}
} else {
/* Blocking read */
cpBytes = nbytes;
while (cpBytes > 0) {
rv = devSerPtr->read(buf, cpBytes);
cpBytes -= rv;
}
rv = nbytes;
}
} else if (dPtr->type == DEVICE_TYPE_FS) {
FILE *f;
FSDriverType *fs = GetRootObject(FSDriverType, device, dPtr);
f = &openFiles[fd];
rv = fs->read(fs, f, (void *) buf, nbytes);
if (rv < 0) {
errno = -rv;
} else {
f->pos += rv;
}
}
return rv;
}
/**
* Write data to
*
* @param fd The file descriptor
* @param _buf
* @param nbytes
* @return
*/
int _write(int fd, const void *buf, size_t nbytes) {
int rv = 0;
DeviceType * dPtr;
if (!validFileNo(fd)) {
return EBADF;
}
dPtr = openFiles[fd].devicePtr;
if (dPtr->type == DEVICE_TYPE_CONSOLE) {
DeviceSerialType *devSerPtr = GetRootObject(DeviceSerialType, device,
dPtr);
rv = devSerPtr->write((void *) buf, nbytes);
} else if (dPtr->type == DEVICE_TYPE_FS) {
FILE *f;
FSDriverType *fs = GetRootObject(FSDriverType, device, dPtr);
f = &openFiles[fd];
rv = fs->write(fs, f, (void *) buf, nbytes);
if (rv < 0) {
errno = -rv;
} else {
f->pos += nbytes;
f->end = MAX(f->pos, f->end);
}
}
return rv;
}
#if 1 // defined(__GNUC__)
/**
*
* @param fd
* @param offset
* @param origin SEEK_SET - Beginning of the file
* SEEK_CUR - Current file position
* SEEK_END - End of the file
* @return
*/
int _lseek(int fd, int offset, int origin) {
int rv;
DeviceType * dPtr;
if (!validFileNo(fd)) {
return EBADF;
}
dPtr = openFiles[fd].devicePtr;
if (dPtr->type == DEVICE_TYPE_FS) {
int tot = offset;
FILE *f;
FSDriverType *fs = GetRootObject(FSDriverType, device, dPtr);
f = &openFiles[fd];
if (origin == SEEK_CUR) {
tot += f->pos;
} else if (origin == SEEK_END) {
tot += f->end;
}
rv = fs->lseek(fs, f, tot);
if (rv < 0) {
errno = -rv;
} else {
f->pos = tot;
}
rv = 0;
} else {
errno = ESPIPE;
rv = -1;
}
return rv;
}
#endif
#if defined(__GNUC__) && !defined(CFG_CXX)
void __init( void )
{
}
#endif
#if defined(__ARMCC_VERSION) || (defined(__GNUC__) && ( defined(CFG_ZYNQ) || defined(CFG_TRAVEO)))
void * memcpy( void * dest, void const * src, size_t len)
{
uint8_t* dst8 = (uint8_t*)dest;
uint8_t* src8 = (uint8_t*)src;
while (len--) {
*dst8++ = *src8++;
}
return dest;
}
#endif
#if defined(CFG_BRD_TMS570_CC)
void _exit( int status ) {
while(1);
}
#elif defined(CFG_ARM)
void _exit( int status ) {
#ifdef USE_TTY_CODE_COMPOSER
__asm(" .global C$$EXIT");
__asm("C$$EXIT: nop");
#endif
ShutdownOS( E_OS_EXIT_ABORT );
while(1);
}
#endif
#if defined(__GNUC__) && defined(CFG_RH850)
void _exit( int a ) {
ShutdownOS( E_OS_EXIT_ABORT );
while(1);
}
#endif
#if defined(__DCC__)
/* Set by atexit() in init() */
void _dcc_exit( void ) {
ShutdownOS( E_OS_EXIT_ABORT );
while(1);
}
#endif
#if defined(__CWCC__)
void exit(int a ) {
(void)a;
ShutdownOS( E_OS_EXIT_ABORT );
while(1);
}
#endif
#if defined(__HIGHTEC__)
void _exit(int a ) {
(void)a;
ShutdownOS( E_OS_EXIT_ABORT );
while(1);
}
#endif
#if defined(CFG_NEWLIB_MALLOC_LOCK)
void __malloc_lock ( struct _reent *_r )
{
DisableAllInterrupts();
return;
}
void __malloc_unlock ( struct _reent *_r )
{
EnableAllInterrupts();
return;
}
#endif
|
2301_81045437/classic-platform
|
clib/clib_port.c
|
C
|
unknown
| 17,591
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef FCNTL_H_
#define FCNTL_H_
#define O_NONBLOCK 1
#define F_SETFL 1
#define F_GETFL 2
int fcntl(int fd, int cmd, int arg );
#endif /* FS_H_ */
|
2301_81045437/classic-platform
|
clib/fcntl.h
|
C
|
unknown
| 923
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
*
* A simple implementation of all formatted xxprintf functionallity.
*
* DESIGN CRITERIA:
* - Reentrant
* - Use little stack
*
* What you normally would do is to print to a buffer of some kind and then
* call write(). However little stack indicates that we can't place buffers
* on the stack and reentrant tells us that we can't have a static buffer.
* That leaves us with printing characters as it is ready. From a speed
* point of view that is less than optimal, but that the way it's got to be.
* (Could make a 16 long char buffer?)
*
* This is just intended to be used as a replacement for newlibs implementation.
* Newlib porting interface have the following API:
* int write( int fd, char *buf, int nbytes)
*
*
* Note that puts(), putc() are still the newlib variants....
*
* printf() -> vfprintf(stdout,) -> vsnprintf(buf,)
* write()
* vprintf() -> vfprintf(stdout,) -> vsnprintf(buf,)
* write()
* sprintf(buf,) -> vsnprintf(buf,)
* snprintf(buf,) -> vsnprintf(buf,)
*
* IMPLEMENTATION NOTE:
* - If printing more than the limit, e.g. using vsnprintf() then
* the emit function will only stop printing, but not interrupted
* (The code will get more complicated that way)
* - ANSI-C and POSIX, streams and POSIX filenumbers.
* POSIX file-numbers exist in unistd.h and are only to be used by the porting
* newlib interface i.e. newlib_port.c.
*
*
* NEWLIB: File handles vs files
* This printf() family of functions does not use newlib at all.
* At this point the following can have happend:
* 1. A call to any of the file functions in newlib have been called.
* This then calls a number of functions (sbrk, __sinit(_impure_ptr), etc ).
* __sinit(_impure_ptr) initializes the standard files, stdin, stdout, stderr.
* file->_file is the actual posix file number (stdin=0, stdout=1, stderr=2)
* 2. No calls is done to newlib file functions. The impure_data is then empty and
* all fields are 0.
*
* Code for checking if the newlib have initialized (or we have explicitly called __sinit(_impure_ptr)
* if( _impure_ptr->__sdidinit == 1 ) {
* // We use the real filenumber
* arc_putchar((int)(file->_file), c);
* )
*
*
*
*
* http://ubuntuforums.org/showthread.php?t=936816
*
* What we don't want to use:
* - Terminal stuff, tcsetattr(),etc..makes everything very complicated.
* - Use of select() to set to check for keyboard hit, ie
* select(STDIN_FILENO+1..);
* Then check FD_ISSET( STDIN_FILENO, .. )
*
*
*/
/*lint -w1 Only errors in generic module used during development */
/*lint -e124 Pointer to void not allowed but commonly used in expression in va_arg */
#if defined(__IAR_SYSTEMS_ICC__)
#define STDOUT_FILENO 1
#elif defined(__GNUC__) && defined(__DCC__)
#include <unistd.h>
#endif
#include <stdio.h>
#include <stdarg.h>
#include "arc_assert.h"
#include <string.h>
#if defined(USE_NEWLIB) && defined(__GNUC__)
#include "reent.h"
#endif
#include <ctype.h>
#if defined(USE_KERNEL) /* Used by tests/benchmark/coremark */
#include "Os.h"
#endif
//#define PRINTF_HOST_TEST 1
int print(FILE *file, char **buffer, size_t n, const char *format, va_list ap);
static inline int emitChar( FILE *file, char **buf, char c, int *left );
#if !defined(SYS_CALL_write)
#define SYS_CALL_write write
#endif
int fputc( int c, FILE *file) {
int fd;
char ch=(char)c;
fd = fileno(file);
SYS_CALL_write(fd,&ch,1);
return c;
}
int fputs( const char *s, FILE *file ) {
while(*s) {
fputc(*s++,file);
}
return 0;
}
/**
* Get a character from stream. Assume for now
* that it's blocking.
*
*
* @param file
* @return
*/
int fgetc( FILE *file ) {
char c;
int fd;
fd = fileno(file);
read(fd,&c,1);
return c;
}
/**
* Read to EOF or newline
*
* @param file
* @return
*/
int fgets( char *str, int n, FILE *file ) {
int fd;
fd = fileno(file);
return read(fd,str,n);
}
int printf(const char *format, ...) {
va_list ap;
int rv;
va_start(ap, format);
rv = vfprintf(stdout, format, ap);
va_end(ap);
return rv;
}
int fprintf(FILE *file, const char *format, ...) {
va_list ap;
int rv;
va_start(ap, format);
rv = vfprintf(file, format, ap);
va_end(ap);
return rv;
}
int sprintf(char *buffer, const char *format, ...) {
va_list ap;
int rv;
va_start(ap, format);
rv = vsnprintf(buffer, ~(size_t)0, format, ap);
va_end(ap);
return rv;
}
int snprintf(char *buffer, size_t n, const char *format, ...) {
va_list ap;
int rv;
va_start(ap, format);
rv = vsnprintf(buffer, n, format, ap);
va_end(ap);
return rv;
}
int vprintf(const char *format, va_list ap) {
return vfprintf(stdout, format, ap);
}
int vsprintf(char *buffer, const char *format, va_list ap) {
return vsnprintf(buffer, ~(size_t)0, format, ap);
}
int vfprintf(FILE *file, const char *format, va_list ap) {
int rv;
/* Just print to stdout */
rv = print(file,NULL,~(size_t)0, format,ap);
return rv;
}
int vsnprintf(char *buffer, size_t n, const char *format, va_list ap) {
int rv;
rv = print(NULL, &buffer, n, format,ap);
return rv;
}
/*
* The integer only counterpart
*/
#if defined(USE_NEWLIB)
int iprintf(const char *format, ...) __attribute__ ((alias("printf")));
int fiprintf(FILE *file, const char *format, ...) __attribute__ ((alias("fprintf")));
int siprintf(char *buffer, const char *format, ...) __attribute__ ((alias("sprintf")));
int sniprintf(char *buffer, size_t n, const char *format, ...) __attribute__ ((alias("snprintf")));
int viprintf(const char *format, va_list ap) __attribute__ ((alias("vprintf")));
int vsiprintf(char *buffer, const char *format, va_list ap) __attribute__ ((alias("vsprintf")));
int vfiprintf(FILE *file, const char *format, va_list ap) __attribute__ ((alias("vfprintf")));
#endif
/**
*
* @param file The file to print to
* @param buf The buffer to print to
* @param c The char to print
* @return
*/
static inline int emitChar( FILE *file, char **buf, char c, int *left ) {
(void)file; //lint !e920 MISRA False positive. Allowed to cast pointer to void here.
if( (*left) == 1 ) {
return 1;
}
--(*left);
if( buf == NULL ) {
#if PRINTF_HOST_TEST
putc(c, stdout);
fflush(stdout);
#else
putc(c,stdout);
#endif /* PRINTF_HOST_TEST */
} else {
**buf = c;
(*buf)++;
}
return 1;
}
#if defined(PRINTF_HOST_TEST)
/**
* Convert a number to a string
*
* @param val The value to convert
* @param str Pointer to a space where to put the string
* @param base The base
* @param negative If negative or not.
*/
void xtoa( unsigned long val, char* str, int base, int negative) {
int i;
char *oStr = str;
char c;
if (negative) {
val = -val;
}
if( base < 10 && base > 16 ) {
*str = '0';
return;
}
i = 0;
do {
str[i++] = "0123456789abcdef"[ val % base ];
} while ((val /= base) > 0);
if (negative) {
str[i++] = '-';
}
str[i] = '\0';
str = &str[i]-1;
while(str > oStr) {
c = *str;
*str-- = *oStr;
*oStr++=c;
}
}
#else
extern void xtoa( unsigned long val, char* str, int base, int negative);
#endif
#define FL_NONE (0<<0)
#define FL_ZERO (1<<1)
#define FL_HASH (1<<2)
#define FL_SPACE (1<<3)
#define FL_ALIGN_LEFT (1<<4)
#define FL_TYPE_SIGNED_INT (1<<5)
#define FL_TYPE_UNSIGNED_INT (1<<6)
#define FL_TYPE_POINTER (1<<7)
static void emitString( FILE *file, char **buffer, char *string, int width, int flags, int *left) {
char pad;
char *str = string;
int i;
int strLen;
/* padding: FL_ZERO or normal ' '
* align: FL_ALIGN_LEFT (left) or normal (right)
*/
pad = (flags & FL_ZERO) ? '0' : ' ';
if( flags & FL_ALIGN_LEFT ) {
for(i=0;str[i]; i++) {
emitChar(file,buffer,str[i],left);
}
/* Pad the rest */
for(;i<width;i++) {
emitChar(file,buffer,pad,left);
}
} else {
strLen = strlen(string);
/* Pad first */
if( width > strLen ) {
for(i=0;i<(width-strLen);i++) {
emitChar(file,buffer,pad,left);
}
}
for(i=0;i<strLen; i++) {
emitChar(file,buffer,string[i],left);
}
}
}
void emitInt( FILE *file, char **buffer, int val, int base, int width, int flags, int *left )
{
char lBuf[12]; // longest is base 10, 2^32
char *str = lBuf;
if( flags & FL_TYPE_SIGNED_INT ) {
xtoa(val,str,base ,(val < 0));
} else {
xtoa((unsigned)val,str,base ,0);
}
emitString(file,buffer,str,width,flags,left);
}
#define PRINT_CHAR(_c) *buffer++= (_c);
/**
* Write formatted output to an array with a maximum number of characters.
*
* This is the mother of the formatted print family. The main goal here
* is to be very small and memory efficient.
*
* Support:
* Parameter: None
* Flags : '-' and '0'
* Width : Normal padding is supported, '*' is not.
* Precision: None
* Length : None
* C99 : None
* Type : d,u,x,s,and c
*
* @param file The file descriptor
* @param buffer A pointer to the place to store the output
* If NULL the output is instead
* @param n The maximum number of characters to write
* @param format The format string
* @param ap The va list
* @return
*/
int print(FILE *file, char **buffer, size_t n, const char *format, va_list ap)
{
char ch;
int flags;
char *str;
int width;
int left = n;
char wBuff[4];
while ( (ch = *format++) ) {
if (ch == '%') {
ch = *format++;
if( ch == '%') {
emitChar(file,buffer,ch,&left);
continue;
}
/* Find flags */
if (ch == '0')
{
flags = FL_ZERO;
}
else if (ch == ' ')
{
flags = FL_SPACE;
}
else if (ch == '-')
{
flags = FL_ALIGN_LEFT;
}
else
{
/* Not supported or no flag */
flags = FL_NONE;
format--;
}
width:
ch = *format++;
/* Width */
if( (ch >= '0') && (ch <= '9') ) {
int a = 1;
wBuff[0] = ch;
while( (*format >= '0') && (*format <= '9') ) {
wBuff[a++] = *format++;
}
wBuff[a] = '\0';
width = (int)strtoul(wBuff,NULL,10);
ch = *format++;
} else {
width = 0;
}
/* Length, "eat" length for now */
if( (ch == 'h') || (ch == 'l') || (ch == 'L') ) {
ch = *format++;
}
/* Find type */
if (ch =='c')
{
emitChar(file,buffer,(char )va_arg( ap, int ),&left);
}
else if (ch == 'd')
{
flags |= FL_TYPE_SIGNED_INT;
emitInt(file,buffer,va_arg( ap, int ),10,width,flags,&left);
}
else if (ch == 'u')
{
flags |= FL_TYPE_UNSIGNED_INT;
emitInt(file,buffer,va_arg( ap, int ),10,width,flags,&left);
}
else if (ch == 'x')
{
flags |= FL_TYPE_UNSIGNED_INT;
emitInt(file,buffer,va_arg( ap, int ),16,width,flags,&left);
}
else if (ch == 'p')
{
flags |= FL_TYPE_POINTER;
emitInt(file,buffer,va_arg( ap, int ),16,width,flags,&left);
}
else if (ch == 's')
{
str = (char *)va_arg( ap, int );
if( str == NULL ) {
str = "(null)";
}
emitString(file,buffer,str,width,flags,&left);
}
else if (ch == '.')
{
/* Precision */
/* NOT SUPPORTED, just ignore */
goto width;
} else {
/* just ignore.. either not supported or not correctly */
}
} else {
flags = FL_NONE;
emitChar(file,buffer,ch,&left);
}
}
int ret = (n-left);
// va_end(ap); // Removed, IMPROVMENT: Check the va_start/va_end handling (used in calling functions also).
if(buffer!=0) {
left = 0;
emitChar(file,buffer,'\0',&left);
}
return ret;
}
#if PRINTF_HOST_TEST
int main(void) {
char *ptr = NULL;
char buff[30];
printf("char: %c %c = a B\n", 'a', 66);
printf("string: %s = (null)\n", (char *)ptr);
printf("string: %s = foobar \n", "foobar");
printf("string: %2s = foobar \n", "foobar");
printf("string: \"%8s\" = \" foobar\" \n", "foobar");
/* Left justify */
printf("string: \"%-8s\" = \"foobar \" \n", "foobar");
printf("decimal: 23 = %d \n", 23);
printf("hex: c23 = %x \n", 0xc23);
printf("hex: 0c23 = %04x \n", 0xc23);
printf("decimal with blanks: 23 = %6d \n", 23);
printf("decimal with zero: 000023 = %06d \n", 23);
/* negative and large numbers */
printf("decimal: -23 = %d \n", -23);
printf("decimal: 4294967273 = %u \n", -23);
printf("decimal: c0000000 = %x \n", 0xc0000000);
printf("decimal: 00c000 = %06x \n", 0xc000);
fprintf(stdout, "string: %s = foobar \n", "foobar");
sprintf(buff, "string: %s = foobar \n", "foobar");
printf("%s",buff);
snprintf(buff,10, "%s\n", "12345678901234567");
printf("\"123456789\" = \"%s\"\n",buff);
snprintf(buff,12, "%s\n", "abcdefghijklmn");
printf("\"abcdefghijkl\" = \"%s\"\n",buff);
return 0;
}
#endif
|
2301_81045437/classic-platform
|
clib/printf.c
|
C
|
unknown
| 15,517
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef STDIO_H_
#define STDIO_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdarg.h>
#include <stdlib.h>
#include <clib.h>
#include "fs.h"
#if !defined(EOF)
#define EOF (-1)
#endif
#ifndef SEEK_SET
#define SEEK_SET 0
#endif
#ifndef SEEK_CUR
#define SEEK_CUR 1
#endif
#ifndef SEEK_END
#define SEEK_END 2
#endif
#define BUFSIZ 1024
#define _IOFBF 1
#define _IOLBF 2
#define _IONBF 3
/* File handles */
#define stdin (_EnvPtr->_stdin)
#define stdout (_EnvPtr->_stdout)
#define stderr (_EnvPtr->_stderr)
//lint -e527
int printf(const char *format, ...);
int fprintf(FILE *file, const char *format, ...);
int sprintf(char *buffer, const char *format, ...);
int snprintf(char *buffer, size_t n, const char *format, ...);
int vprintf(const char *format, va_list ap);
int vsprintf(char *buffer, const char *format, va_list ap);
int vfprintf(FILE *file, const char *format, va_list ap);
int vsnprintf(char *buffer, size_t n, const char *format, va_list ap);
int fileno( FILE *);
#define putc(_x,_file) fputc(_x,_file)
#define putchar(_x) fputc(_x,stdout)
int fputc(int, FILE *);
int fputs(const char *, FILE *);
int puts(const char *s);
/* Implemted by compiler */
FILE *fopen(const char *filename, const char *mode);
size_t fwrite ( const void * ptr, size_t size, size_t count, FILE * stream );
void rewind(FILE *stream);
long ftell(FILE *stream);
int fseek(FILE *stream, long offset, int whence);
size_t fread(void *ptr, size_t size, size_t nitems, FILE *stream);
int fclose(FILE *stream);
//int fflush(FILE *stream);
/* Low level file I/O */
int open(const char *name, int flags, int mode);
int close( int fd );
int read( int fd, void *buf, size_t nbytes );
int write( int fd, const void *buf, size_t nbytes);
int lseek( int fd, int offset, int whence );
#define puts(_x) fputs(_x,stdout)
#define getc(_x) fgetc(_x)
#define getchar() getc(stdin)
int fgetc(FILE *file);
#ifdef __cplusplus
}
#endif
#endif /* STDIO_H_ */
|
2301_81045437/classic-platform
|
clib/stdio.h
|
C
|
unknown
| 2,811
|
/*
* Copyright (c) 1988 Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <string.h>
char *_strtok_r( char *s, const char *delim, char **lasts, int skip_leading_delim )
{
register char *spanp;
register int c, sc;
char *tok;
if (s == NULL && (s = *lasts) == NULL)
return (NULL);
/*
* Skip (span) leading delimiters (s += strspn(s, delim), sort of).
*/
cont:
c = *s++;
for (spanp = (char *)delim; (sc = *spanp++) != 0;) {
if (c == sc) {
if (skip_leading_delim) {
goto cont;
}
else {
*lasts = s;
s[-1] = 0;
return (s - 1);
}
}
}
if (c == 0) { /* no non-delimiter characters */
*lasts = NULL;
return (NULL);
}
tok = s - 1;
/*
* Scan token (scan for delimiters: s += strcspn(s, delim), sort of).
* Note that delim must have one NUL; we stop if we see that, too.
*/
for (;;) {
c = *s++;
spanp = (char *)delim;
do {
if ((sc = *spanp++) == c) {
if (c == 0)
s = NULL;
else
s[-1] = 0;
*lasts = s;
return (tok);
}
} while (sc != 0);
}
/* NOTREACHED */
}
char *strtok_r (char *s, const char *delim, char **lasts)
{
return _strtok_r (s, delim, lasts, 1);
}
|
2301_81045437/classic-platform
|
clib/strtok_r.c
|
C
|
unknown
| 3,062
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* ----------------------------[includes]------------------------------------*/
#include "Os.h"
#include "arc.h"
#include "isr.h"
#include "timer.h"
#include "Arc_T1_Int.h"
#if defined(USE_CANIF)
#include "CanIf.h"
#include "CanIf_PBCfg.h"
#endif
#include "T1_AppInterface.h"
#include "T1_AppInterface.h"
#include "ARCCORE_T1_interface.h"
#include <string.h>
#if defined(CFG_T1_COREID_CBK)
/* Create your own Arc_T1_Cbk.h file with the callback that defines Arc_T1_GetCoreId() */
#include "Arc_T1_Cbk.h"
#else
#define Arc_T1_GetCoreId() GetCoreID()
#endif
/* ----------------------------[private define]------------------------------*/
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
/* ----------------------------[private function prototypes]-----------------*/
/* ----------------------------[private variables]---------------------------*/
static boolean initCalled = false;
static ArcT1Info_t isrInfo[OS_ISR_MAX_CNT];
/* ----------------------------[public functions]----------------------------*/
static boolean taskRunning[OS_TASK_CNT];
/**
* Arc_T1_Init, function for initializing T1
* @param
*/
void Arc_T1_Init(void) {
if (initCalled) {
return;
}
initCalled = true;
for(uint8_t i=0;i<OS_TASK_CNT;i++){
taskRunning[i] = FALSE;
}
Timer_Init();
T1_AppInit();
}
/**
* Arc_T1_GetInfoAboutIsr, function for retrieving info about installed ISRs
* @param ptr to len
*/
ArcT1Info_t * Arc_T1_GetInfoAboutIsr(uint16_t *len){
*len = Os_Arc_GetIsrCount();
for (uint16_t i = 0; i < *len; i++) {
isrInfo[i].id = i;
strncpy(isrInfo[i].name,Os_IsrVarList[i].constPtr->name,OS_ARC_PCB_NAME_SIZE);
isrInfo[i].core = Os_IsrVarList[i].constPtr->core;
isrInfo[i].priority = Os_IsrVarList[i].constPtr->priority;
isrInfo[i].vector = Os_IsrVarList[i].constPtr->vector;
isrInfo[i].type = Os_IsrVarList[i].constPtr->type;
isrInfo[i].entry = Os_IsrVarList[i].constPtr->entry;
}
return isrInfo;
}
/**
* Arc_T1_MainFunction, main function. Called periodically by BSW task
* @param
*/
void Arc_T1_MainFunction(void) {
T1_AppHandler();
}
/**
* Arc_T1_BackgroundFunction, background function, Called from Idle loop
* @param
*/
void Arc_T1_BackgroundFunction(void) {
T1_AppBackgroundHandler();
}
#if defined(USE_CANIF)
/**
* Arc_T1_Transmit, function for sending data
* @param data
*/
T1_status_t Arc_T1_Transmit(uint8 *data){
T1_status_t retVal = T1_FAILED;
Std_ReturnType status;
PduInfoType pduInfo;
pduInfo.SduLength=8UL;
pduInfo.SduDataPtr = data;
status = CanIf_Transmit( CANIF_PDU_ID_T1_TX_PDU,&pduInfo);
if (E_OK == status) {
retVal = T1_OK;
}
return retVal;
}
/**
* Arc_T1_Rx_Cbk, called when receiving data
* @param PduId, PduInfo
*/
void Arc_T1_Rx_Cbk(PduIdType id, PduInfoType *pduInfo){
(void)id;
T1_AppRxCallback( pduInfo->SduDataPtr );
}
/**
* Arc_T1_Tx_Cbk, called at successful sending
* @param
*/
void Arc_T1_Tx_Cbk(void){
}
#endif
/**
* Os_WaitEventHook, called at the suspension of a task
* @param taskId
*/
void Os_WaitEventHook(TaskType taskId){
OSTH_SUSPEND_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_ResumeEventHook, called at the resumption of a task
* @param taskId
*/
void Os_ResumeEventHook(TaskType taskId){
OSTH_RESUME_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_ReleaseEventHook, called at the release of a waiting task
* @param taskId
*/
void Os_ReleaseEventHook(TaskType taskId){
OSTH_RELEASE_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_ActivateTaskHook, called at the activation of a task
* @param taskId
*/
void Os_ActivateTaskHook(TaskType taskId){
OSTH_ACTIVATE_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_StopTaskHook, called at the end of a task
* @param taskId
*/
void Os_StopTaskHook(TaskType taskId){
taskRunning[taskId] = FALSE;
OSTH_STOP_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_StartTaskHook, called at the start of a task
* @param taskId
*/
void Os_StartTaskHook(TaskType taskId){
if(taskRunning[taskId] == FALSE){
taskRunning[taskId] = TRUE;
OSTH_START_NOSUSP(taskId, Arc_T1_GetCoreId(), Timer_GetTicks());
}
}
/**
* Os_StartStopTaskHook, called at the end of one task and start of another
* @param taskIdStop, taskIdStart
*/
void Os_StartStopTaskHook(TaskType taskIdStop, TaskType taskIdStart){
OSTH_STOP_START_NOSUSP(taskIdStop, taskIdStart, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_PreIsrHook, called at the start of an ISR. Add offset for OS_TASK_CNT since
* T1 require continues unique id task and isr
* @param isr
*/
void Os_PreIsrHook(ISRType isr) {
OSTH_START_NOSUSP(isr+OS_TASK_CNT, Arc_T1_GetCoreId(), Timer_GetTicks());
}
/**
* Os_PostIsrHook, called at the stop of an ISR. Add offset for OS_TASK_CNT since
* T1 require continues unique id task and isr
* @param isr
*/
void Os_PostIsrHook(ISRType isr) {
OSTH_STOP_NOSUSP(isr+OS_TASK_CNT, Arc_T1_GetCoreId(), Timer_GetTicks());
}
|
2301_81045437/classic-platform
|
common/Arc_T1_int.c
|
C
|
unknown
| 6,225
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*lint -w1 Warning level one in tests */
#if defined(CFG_BULLSEYE)
int printf(const char *format, ...);
#if _BullseyeCoverage
#pragma BullseyeCoverage off
#endif
#define NULL 0
#define O_CREAT 0
#define O_TRUNC 0
#define O_WRONLY 0
#define S_IRUSR 0
#define S_IWUSR 0
#define DBG
static int getpid(void)
{
return 1;
}
#if defined(CFG_BRD_LINUX)
/* Host */
#include <stdio.h>
#include <stdlib.h>
static int open(const char* path, int oflag, int mode)
{
int fd = -1;
FILE *fh;
fh = fopen((char*)path, "w");
if (fh != NULL) {
fd = (int)fh;
}
return fd;
}
static int close(int fildes)
{
return fclose((FILE *)fildes);
}
static int write(int fildes, const void* buf, unsigned nbyte)
{
int n;
if( fildes == 2 ) {
/* stderr */
n = printf("%s", (const char*)buf);
} else {
n = (int)fwrite((void*)buf, 1, nbyte, (FILE *)fildes);
if (n == 0 && nbyte != 0) {
n = -1;
}
}
return n;
}
#else
static int open(const char* path, int oflag, int mode)
{
printf("--- BullseyeCoverage begin file '%s', data begins next line ---\n", path);
return 3;
}
static int close(int fildes)
{
printf("--- BullseyeCoverage end file ---\n");
return 0;
}
static int write(int fildes, const void* buf, unsigned nbyte)
{
printf("%s", (const char*)buf);
return (int)nbyte;
}
#endif
#include "run/atomic.h"
#include "run/libcov.h"
#include "run/libcov-version.h"
#include "run/libcov-core-small.h"
#endif
|
2301_81045437/classic-platform
|
common/Bullseye_Coverage_Hooks.c
|
C
|
unknown
| 2,369
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Os.h"
#include "arc.h"
#define ENTRY(_x) [_x] = OS_STRSTR__(_x)
const char *Arc_StatusToString(StatusType err) {
static char *errToStr[] = {
ENTRY(E_OK),
/* STD OSEK */
ENTRY(E_OS_ACCESS),
ENTRY(E_OS_CALLEVEL),
ENTRY(E_OS_ID),
ENTRY(E_OS_LIMIT),
ENTRY(E_OS_NOFUNC),
ENTRY(E_OS_RESOURCE),
ENTRY(E_OS_STATE),
ENTRY(E_OS_VALUE),
/* AUTOSAR, see 7.10 */
ENTRY(E_OS_SERVICEID),
ENTRY(E_OS_RATE),
ENTRY(E_OS_ILLEGAL_ADDRESS ),
ENTRY(E_OS_MISSINGEND ),
ENTRY(E_OS_DISABLEDINT ),
ENTRY(E_OS_STACKFAULT ),
ENTRY(E_OS_PROTECTION_MEMORY ),
ENTRY(E_OS_PROTECTION_TIME ),
ENTRY(E_OS_PROTECTION_LOCKED ),
ENTRY(E_OS_PROTECTION_EXCEPTION ),
ENTRY(E_OS_PROTECTION_RATE),
/* IMPROVMENT: Move it to more appropiate place */
ENTRY(E_COM_ID),
/* Implementation specific */
ENTRY(E_NOT_OK),
};
return errToStr[err];
}
|
2301_81045437/classic-platform
|
common/arc.c
|
C
|
unknown
| 1,836
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Os.h"
/*lint --e{970} --e{818} Use of modifier or type 'char' outside of a typedef
* and Pointer parameter 'msg' these cannot be changed due to dependancy in other files */
void Arc_Assert( char *msg, const char *file, int line ) {
ShutdownOS(E_OS_ASSERT);
(void)*msg;
(void)*file;
(void)line;
}
void Arc_Config_Assert( char *msg, const char *file, int line ) {
ShutdownOS(E_OS_ASSERT);
(void)*msg;
(void)*file;
(void)line;
}
|
2301_81045437/classic-platform
|
common/arc_assert.c
|
C
|
unknown
| 1,245
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Std_Types.h"
#include "bitdef.h"
#include <stdio.h>
void Bitdef_Print(RegInfoType *regP, uint16 data) {
uint16 odata = data;
uint16 pos;
uint16 mask;
printf("reg: %2d , data:%02x\n", regP->reg, data);
for (uint16 i = 0; i < regP->defSize; i++) {
pos = regP->defPtr[i].pos;
mask = ((1u << regP->defPtr[i].size) - 1u);
//if( data & (1u<<pos) ) {
printf(" %2x %2d %s\n", ((data >> pos) & mask), pos,
regP->defPtr[i].desc);
//}
}
}
|
2301_81045437/classic-platform
|
common/bitdef.c
|
C
|
unknown
| 1,290
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
* DESCRIPTION
* A circular buffer implementation.
*
* This file implements the following versions:
* 1. CirqBuffDynXXXX
* - The size of the data is not known of compile time
* (semidynamic, since there is no free() function )
* 2. CirqBuffXXX
* - A static implementation, data is known at compile time.
* (implemented in the header file?)
*
* Implementation note:
* - CirqBuffDynXXXX, valgrind: OK
* - coverage: Not run
*
*/
//#define _TEST_CIRQ_BUFFER_DYN_
/*lint -w1 */
/*lint -w2 -e526 -e628 */
#include <stdlib.h>
#include <string.h>
#include <stdint.h>
#include "Cpu.h"
#include "cirq_buffer.h"
#include "Os.h"
#ifdef _TEST_CIRQ_BUFFER_DYN_
#include "arc_assert.h"
#endif
#if defined(__GNUC__)
#ifndef MEMCPY
#define MEMCPY(_x,_y,_z) __builtin_memcpy(_x,_y,_z)
#endif /* MEMCPY */
#else
#ifndef MEMCPY
#define MEMCPY(_x,_y,_z) memcpy(_x,_y,_z)
#endif /* MEMCPY */
#endif
#if !defined(OS_SC3)
#define OS_SC3 STD_OFF
#endif
#if !defined(OS_SC4)
#define OS_SC4 STD_OFF
#endif
#if ((OS_SC3 == STD_ON) || (OS_SC4 == STD_ON))
#define SchM_Enter_CirqBuff_EA_0() (void)SYS_CALL_SuspendOSInterrupts()
#define SchM_Exit_CirqBuff_EA_0() (void)SYS_CALL_ResumeOSInterrupts()
#else
#define SchM_Enter_CirqBuff_EA_0() SuspendOSInterrupts()
#define SchM_Exit_CirqBuff_EA_0() ResumeOSInterrupts()
#endif
/* IMPROVMENT: Make it threadsafe, add DisableAllInterrts()/EnableAllInterrupts() */
void CirqBuff_Init(CirqBufferType *cirqbuffer, void *buffer, uint32 maxCnt, uint32 dataSize) {
cirqbuffer->bufStart = buffer;
cirqbuffer->maxCnt = maxCnt;
cirqbuffer->bufEnd = (char *)cirqbuffer->bufStart + dataSize*maxCnt;
cirqbuffer->head = cirqbuffer->bufStart;
cirqbuffer->tail = cirqbuffer->bufStart;
cirqbuffer->dataSize = dataSize;
cirqbuffer->currCnt = 0;
}
/**
*
* @param buffer pointer to a buffer
* @param maxCnt Maximum number of elements of size dataSize
* @param dataSize The size of the data.
* @return
*/
CirqBufferType CirqBuffStatCreate(void *buffer, uint32 maxCnt, uint32 dataSize) {
CirqBufferType cirqbuffer;
cirqbuffer.bufStart = buffer;
cirqbuffer.maxCnt = maxCnt;
cirqbuffer.bufEnd = (char *)cirqbuffer.bufStart + dataSize*maxCnt;
cirqbuffer.head = cirqbuffer.bufStart;
cirqbuffer.tail = cirqbuffer.bufStart;
cirqbuffer.dataSize = dataSize;
cirqbuffer.currCnt = 0;
/*return whole object */
return cirqbuffer;
}
CirqBufferType *CirqBuffDynCreate( uint32 size, uint32 dataSize ) {
CirqBufferType *cPtr;
/*lint -save -e586 */
cPtr = malloc(sizeof(CirqBufferType));
/*lint -restore */
if( cPtr == NULL ) {
return NULL;
}
cPtr->maxCnt = size;
cPtr->dataSize = dataSize;
/*lint -save -e586 -e632 STANDARDIZED INTERFACE */
cPtr->bufStart = malloc(dataSize*size);
/*lint -restore */
cPtr->bufEnd = (char *)cPtr->bufStart + dataSize*size;
cPtr->head = cPtr->bufStart;
cPtr->tail = cPtr->bufStart;
cPtr->currCnt = 0;
return cPtr;
}
int CirqBuffDynDestroy(CirqBufferType *cPtr ) {
/*lint -save -e586 */
free(cPtr->bufStart);
free(cPtr);
/*lint -restore */
return 0;
}
/**
* Push an entry to the buffer.
*
* @param cPtr Pointer to the queue created with CirqBuffStatCreate, etc.
* @param dataPtr
* @return 0 - if successfully pushed.
* 1- nothing pushed (it was full)
*/
int CirqBuffPush( CirqBufferType *cPtr, void *dataPtr ) {
SchM_Enter_CirqBuff_EA_0();
if( (cPtr==NULL) || (cPtr->currCnt == cPtr->maxCnt)) {
SchM_Exit_CirqBuff_EA_0();
return 1; /* No more room */
}
/*lint -save -e632 STANDARDIZED INTERFACE */
MEMCPY(cPtr->head,dataPtr,cPtr->dataSize);
/*lint -restore */
cPtr->head = (char *)cPtr->head + cPtr->dataSize;
if( cPtr->head == cPtr->bufEnd) {
cPtr->head = cPtr->bufStart;
}
++cPtr->currCnt;
SchM_Exit_CirqBuff_EA_0();
return 0;
}
/**
* Pop an entry from the buffer.
*
* @param cPtr Pointer to the queue created with CirqBuffStatCreate, etc.
* @param dataPtr
* @return 0 - if successfully popped.
* 1- nothing popped (it was empty)
*/
int CirqBuffPop(CirqBufferType *cPtr, void *dataPtr ) {
SchM_Enter_CirqBuff_EA_0();
if((cPtr==NULL) || (cPtr->currCnt == 0) ) {
SchM_Exit_CirqBuff_EA_0();
return 1;
}
/*lint -save -e632 STANDARDIZED INTERFACE */
MEMCPY(dataPtr,cPtr->tail,cPtr->dataSize);
/*lint -restore */
cPtr->tail = (char *)cPtr->tail + cPtr->dataSize;
if( cPtr->tail == cPtr->bufEnd) {
cPtr->tail = cPtr->bufStart;
}
--cPtr->currCnt;
SchM_Exit_CirqBuff_EA_0();
return 0;
}
/**
* PushLock an entry to the buffer.
* NOTE: This must be used in combination with CirqBuff_PushRelease when the
* application has filled the buffer with data. Lock and release must be done
* in consecutive order i.e lock/release/lock/release. lock/lock/release/release is not
* allowed.
*
* @param cPtr Pointer to the queue created with CirqBuffStatCreate, etc.
* @return ptr to buffer - if successfully pushed.
* NULL - nothing pushed (it was full)
*/
void *CirqBuff_PushLock( CirqBufferType *cPtr) {
void *dataPtr;
if((cPtr==NULL) || (cPtr->currCnt == cPtr->maxCnt)) {
return NULL; /* No more room */
}
dataPtr = cPtr->head;
cPtr->head = (char *)cPtr->head + cPtr->dataSize;
if( cPtr->head == cPtr->bufEnd) {
cPtr->head = cPtr->bufStart;
}
return dataPtr;
}
/**
* PopLock an entry from the buffer.
* NOTE: This must be used in combination with CirqBuff_PopRelease when the
* application has used or copied the buffer data. Lock and release must be done
* in consecutive order i.e lock/release/lock/release. lock/lock/release/release is not
* allowed.
*
* @param cPtr Pointer to the queue created with CirqBuffStatCreate, etc.
* @return ptr to buffer - if successfully pushed.
* NULL - nothing pushed (it was full)
*/
void * CirqBuff_PopLock(CirqBufferType *cPtr ) {
void *dataPtr;
if((cPtr==NULL) || (cPtr->currCnt == 0) ) {
return NULL;
}
dataPtr = cPtr->tail;
cPtr->tail = (char *)cPtr->tail + cPtr->dataSize;
if( cPtr->tail == cPtr->bufEnd) {
cPtr->tail = cPtr->bufStart;
}
return dataPtr;
}
void *CirqBuff_Peek( CirqBufferType *cPtr, uint32 offset ){
void *dataPtr;
if( (cPtr==NULL) || (cPtr->currCnt == 0) || (offset > cPtr->currCnt) ) {
return NULL;
}
dataPtr = cPtr->tail;
for(uint32 i=0;i<offset;i++){
dataPtr = (char *)dataPtr + cPtr->dataSize;
if( dataPtr == cPtr->bufEnd) {
dataPtr = cPtr->bufStart;
}
}
return dataPtr;
}
#ifdef _TEST_CIRQ_BUFFER_DYN_
int main( void ) {
CirqBufferType *cPtr;
uint8_t *dataPtr;
int rv;
#define DATA_SIZE 4
#define QSIZE 8
cPtr = CirqBuffDynCreate(QSIZE, DATA_SIZE );
dataPtr = malloc(DATA_SIZE);
dataPtr[0] = 1;
rv = CirqBuffPush(cPtr,dataPtr);
ASSERT(rv == 0);
free(dataPtr);
dataPtr = malloc(DATA_SIZE);
dataPtr[0] = 2;
rv = CirqBuffPush(cPtr,dataPtr);
ASSERT(rv == 0);
free(dataPtr);
dataPtr = malloc(DATA_SIZE);
rv = CirqBuffPop(cPtr,dataPtr);
ASSERT( dataPtr[0] == 1);
ASSERT(rv == 0);
free(dataPtr);
dataPtr = malloc(DATA_SIZE);
rv = CirqBuffPop(cPtr,dataPtr);
ASSERT( dataPtr[0] == 2);
ASSERT(rv == 0);
free(dataPtr);
CirqBuffDynDestroy(cPtr);
}
#endif
|
2301_81045437/classic-platform
|
common/cirq_buffer.c
|
C
|
unknown
| 8,576
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* ----------------------------[includes]------------------------------------*/
/*
*
* Questions:
* - Should I use the library functions ( getc(), printf() ) to write/read
* characters from the terminal?
*
* Serial_xxx.c
* _Read(data,nbytes)
* _Write(data,nbytes)
* _Init()
*
* In the bottom of printf()...
* emitChar(....) - That should be buffered in printf.c
*
* Now is:
* arc_putchar(file,char)
*
* But should be
* - What device are we using right now... that means that somewhere in startup
* we do Console_SetDevice(device).
*
* write() will use the the fileno as "device".
*
*
* So how does it work:
* fprintf( stream , ... )
* fileNo = fileno(stream);
* write( fileNo, ... )
*
*
* Since the stream pointer is defined by each clib we must use fdopen()
* to get the proper stream pointer...
* So a mySP = fdopen(RAMLOG_FILENO, "r") will produce a stream pointer that can
* be used when later fprintf(mySP,... ). In the lower layers fileno() will get
* back the fileno/filedescriptor.
*
* Assume that we keep the existing fputs(.., FILE *)... that means write( .. )
* will be called... then write() will have to do the write depending on device.
*
* On CW you have no control over read()/write()/.... instead you have:
* UARTError WriteUARTN(const void* buf, unsigned long cnt)
* UARTError ReadUARTN(void* bytes, unsigned long length)
* UARTError ReadUART1(char* c)
*
* Soo, for CW that means...problems?
*
*
* Console <-> Vs Serial device.
* If we are on a console we can't hang on fgetc() or simular but we must
* first check for input and then read it with fgetc()/fgets()... so we need
* a system "any key hit" function.
*
* This means unless we have an "event" system that can trigger for example fgets()
* to read we need to:
* if( testchar(stdio) ) {
* c = fgetc(..);
* }
*
* Implement fgets()... this no idle CPU anymore. Shell to be periodic or event based?+
*
*
*
* fd = open("/serial/serial_t32",O_RDWR);
* write(fd, "hejsan", 5);
* file = fdopen(fd,"w");
* fputs("hello",file);
*
*
* file = fopen("serial_t32","r");
* fputs("hello",file);
*
* !! Somewhere we must map a device with a file descriptor !!
*
* Use case: Set "global" console
* Console_SetDevice("/serial/serial_t32");
* fputs("hello",stdout);
* Console_SetDevice("/ramlog");
* fputs("hello",stdout);
*
*
* Use case: Set console for a specific thing (for example telnet)
* This should set local configuration ( not global )
* Console_SetDevice("/serial/lwip");
* fputs("hello",stdout);
*
*
*
* It seems that we must assume that read() is blocking until all the characters
* are read. This means that we must check if a character is present in some way.
* There is select() but it's just to much....this leaves us having to have a
* kbhit() function that goes all the way to the driver.
*
*
* http://www.kegel.com/dkftpbench/nonblocking.html
* http://pubs.opengroup.org/onlinepubs/7908799/xsh/read.html
*
* Sooo.... read() should always support O_NONBLOCK
*
*
*/
#include "device_serial.h"
/* ----------------------------[private define]------------------------------*/
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
/* ----------------------------[private function prototypes]-----------------*/
/* ----------------------------[private variables]---------------------------*/
/* ----------------------------[private functions]---------------------------*/
/* ----------------------------[public functions]----------------------------*/
typedef struct {
uint8_t type;
} DeviceType;
typedef struct {
uint32_t defaultDevice; /* How do I set this? */
} ConsoleType;
DeviceType *devicePtr;
/* List of devices */
DeviceSerialType deviceList[] = {
&T32_Device,
NULL,
};
int Console_SetDevice( const char *device) {
DeviceSerialType *devPtr;
devPtr = Serial_FindDevice( device );
if ( devPtr != 0 ) {
Sys.ConsoleDevicePtr = devPtr;
}
}
int Console_Init( void ) {
/* Set default console device */
Console_SetDevice("serial_dbg_t32");
}
int getc( FILE *file ) {
Sys.ConsoleDevicePtr->read( )
return fgetc(file);
}
int arc_putchar( int c, FILE *file ) {
}
/**
* Write to device
*
* @param str
* @param file
* @return
*/
int fputs ( const char * str, FILE *file ) {
int h = (int)file;
deviceList[h]->write(str,strlen(str);
}
int fgetc( FILE *file ) {
int h = (int)file;
uint8_t data;
/* get character from device */
deviceList[h]->read(&data,1);
return data;
}
int Device_Add( DeviceType *devPtr ) {
}
#if defined(CFG_TTY_T32)
#include "serial_t32.h"
#endif
extern DeviceSerialType
/**
* In a common file
*/
void Serial_Register( void ) {
Serial
dev->init(dev->data);
}
int usage( void ) {
DeviceType dev;
Serial_Init( void );
#if defined(CFG_SERIAL_T32)
dev.read = T32_Read;
dev.write = T32_Write;
Console_SetDevice(dev);
#endif
#if defined(USE_SERIAL_SCI)
dev.read = Sci_Read;
dev.write = Sci_Write;
Console_SetDevice(dev);
#endif
}
|
2301_81045437/classic-platform
|
common/console.c
|
C
|
unknown
| 6,278
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
typedef void (*func_ptr)(void);
extern func_ptr _init_array_start[], _init_array_end[];
extern func_ptr _fini_array_start[], _fini_array_end[];
void _init(void)
{
for ( func_ptr* func = _init_array_start; func != _init_array_end; func++ ) {
(*func)();
}
}
|
2301_81045437/classic-platform
|
common/crtin.c
|
C
|
unknown
| 1,043
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
Methods called by IAR libraries to perform console IO:
*/
#include "Os.h"
#include "Ramlog.h"
#include "stddef.h"
#ifdef USE_TTY_WINIDEA
#define TWBUFF_SIZE 0x100
#define TRBUFF_SIZE 0x100
#define TBUFF_PTR 2
#define TWBUFF_LEN (TWBUFF_SIZE+TBUFF_PTR)
#define TRBUFF_LEN (TRBUFF_SIZE+TBUFF_PTR)
#define TWBUFF_TPTR (g_TWBuffer[TWBUFF_SIZE+0])
#define TWBUFF_CPTR (g_TWBuffer[TWBUFF_SIZE+1])
#define TWBUFF_INC(n) ((n + 1)&(TWBUFF_SIZE-1))
#define TWBUFF_FULL() (TWBUFF_TPTR==((TWBUFF_CPTR-1)&(TWBUFF_SIZE-1)))
volatile char g_TConn;
SECTION_BALIGN(0x100) volatile unsigned char g_TWBuffer[TWBUFF_LEN]; // Transmit to WinIDEA terminal
SECTION_BALIGN(0x100) volatile unsigned char g_TRBuffer[TRBUFF_LEN];
#endif
#ifdef USE_TTY_NOICE
volatile unsigned char START_VUART = 0;
_Pragma("location=0x1000")
__no_init static volatile char VUART_TX;
__no_init static volatile char VUART_RX;
#endif
size_t __write(int handle, const unsigned char *buf, size_t cnt)
{
#ifdef USE_TTY_NOICE
char *buf1 = (char *)buf;
if (START_VUART)
{
for (int i = 0; i < cnt; i++) {
char c = buf1[i];
if (c == '\n')
{
while (VUART_TX != 0)
{
}
VUART_TX = '\r';
}
while (VUART_TX != 0)
{
}
VUART_TX = c;
}
}
#endif
#ifdef USE_TTY_WINIDEA
(void)g_TRBuffer[0];
{
unsigned char nCnt,nLen;
for(nCnt = 0; nCnt < cnt; nCnt++)
{
while( TWBUFF_FULL() ) {}
nLen = TWBUFF_TPTR;
g_TWBuffer[nLen] = buf[nCnt];
nLen = TWBUFF_INC(nLen);
TWBUFF_TPTR = nLen;
}
}
#endif
#if defined(USE_RAMLOG)
{
const unsigned char *pbuf = buf;
for (int i = 0; i < cnt; i++) {
ramlog_chr (*(pbuf + i));
}
}
#endif
(void)buf;
(void)cnt;
return 0; // No error
}
int arc_putchar(int fd, int c) {
char cc = c;
__write( fd,(const unsigned char *)&cc,1);
return 0;
}
void exit(int exit ) {
(void)exit;
/* !! WARNING !! !! WARNING !! !! WARNING !!
*
* ENDING UP HERE CAN BE VERY BAD:
* 1. You got an assert() (calls exit())
* 2. For some other reason (deliberately exited main() ?)
*
* IMPROVMENT: Call reset of card?
* */
DisableAllInterrupts();
while(1){}
}
|
2301_81045437/classic-platform
|
common/iar_port.c
|
C
|
unknown
| 3,361
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
* init.c
*
* Created on: 12 dec 2013
* Author: mahi
*/
/* ----------------------------[includes]------------------------------------*/
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#if !defined(CFG_BRD_MPC5XXX_CC)
#include "Mcu.h"
#endif
#if defined(__ARMCC_VERSION)
#include "rt_heap.h"
#endif
/* ----------------------------[private define]------------------------------*/
#define TEST_DATA 0x12345
#define TEST_SDATA2 0x3344
#define BAD_LINK_FILE() /*lint -save -e527 */ for(;;) {} /*lint -restore */
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
/* ----------------------------[private function prototypes]-----------------*/
/* ----------------------------[private variables]---------------------------*/
//lint -e9003 MISRA 2012 8.9 (adv) For validation purposes, variables are defined out of block scope
//lint -e729 For validation purposes, data are not explicitly initialized
//lint -e843 For validation purposes, data not to be declared const
//lint -e970 Allow basic types (like int and char) in init file
//lint -e752 Allow not referenced symbols init file
volatile uint32 test_data = TEST_DATA;
volatile uint32 test_bss = 0;
volatile uint32 test_bss_array[3];
volatile uint32 test_data_array[3] = { TEST_DATA, TEST_DATA, TEST_DATA };
/*
* Small data validation (PPC specific)
*/
/* Note! It does not matter if the data is initialized to 0, it still sbss2 */
volatile const int test_sbss2;
/* Initialized small data */
volatile const int test_sdata2 = TEST_SDATA2;
/*
* Linker variables
*/
#if defined(__ARMCC_VERSION)
int errno = 0;
volatile int *__aeabi_errno_addr(void);
/* ARMCC scatter loading symbols */
extern int Load$$EXEC_ROM$$RW$$Base[];
extern char Image$$SRAM$$RW$$Base[];
extern char Image$$SRAM$$RW$$Limit[];
extern char Image$$SRAM$$ZI$$Base[];
extern char Image$$SRAM$$ZI$$Limit[];
extern char Image$$APP$$ZI$$Base[];
extern char Image$$APP$$ZI$$Limit[];
extern char Image$$ARM_LIB_HEAP$$ZI$$Base[];
extern char Image$$ARM_LIB_HEAP$$ZI$$Limit[];
#else
extern char __DATA_ROM[];
extern char __DATA_RAM[];
extern char __DATA_END[];
extern char __BSS_START[];
extern char __BSS_END[];
#if defined(CFG_ZYNQ) || defined (CFG_ARM_CR4) || defined (CFG_ARM_CR5)
#if defined(__GNUC__) || defined(__ghs__)
extern char _sdata[];
extern char _edata[];
extern char _sbss[];
extern char _ebss[];
extern char _sidata[];
#endif
#endif
#endif
#if defined(__DCC__)
extern void __init( void );
extern void _dcc_exit( void );
#endif
#if defined(CFG_BRD_MPC5XXX_CC)
extern void Mcu_Arc_InitZero( void );
#endif
/* ----------------------------[private functions]---------------------------*/
/* ----------------------------[public functions]----------------------------*/
//lint -esym(957, init) MISRA 2004 8.1 (req) init is called from assembly. Allow definition without prototype.
//lint -e946 -e947 MISRA 2004 17.2 (req), 17.3 (req) MISRA 2012 18.2 (req), 18.3 (req)
// Allow subtract operator and relational operators applied to pointers used in init function
/**
* NOTE
* This function will be called before BSS and DATA are initialized.
* Ensure that you do not access any global or static variables before
* BSS and DATA is initialized
*/
void init(void) {
#if !defined(CFG_BRD_MPC5XXX_CC)
Mcu_Arc_InitZero();
#endif
#if defined(CFG_ZYNQ) || defined (CFG_ARM_CR4) || defined (CFG_ARM_CR5)
#if defined(__GNUC__) || defined(__ghs__)
memcpy(_sdata, _sidata, _edata - _sdata);
memset(_sbss, 0, _ebss - _sbss);
#elif defined(__ARMCC_VERSION)
#if 0
memcpy(Image$$SRAM$$RW$$Base, Load$$EXEC_ROM$$RW$$Base, Image$$SRAM$$RW$$Limit - Image$$SRAM$$RW$$Base);
#endif
memset(Image$$SRAM$$ZI$$Base, 0, Image$$SRAM$$ZI$$Limit - Image$$SRAM$$ZI$$Base);
memset(Image$$APP$$ZI$$Base, 0, Image$$APP$$ZI$$Limit - Image$$APP$$ZI$$Base);
#endif
#elif defined(CFG_AURIX)
/* Already done */
#else
memcpy(__DATA_RAM, __DATA_ROM, __DATA_END - __DATA_RAM); //lint !e732 Allow loss of sign. Expected positive.
memset(__BSS_START, 0, __BSS_END - __BSS_START); //lint !e732 Allow loss of sign. Expected positive.
#endif
#if defined(__DCC__)
atexit(_dcc_exit);
#endif
#if defined(__ARMCC_VERSION)
errno = *__aeabi_errno_addr();
/* Setup Heap */
_init_alloc((unsigned)Image$$ARM_LIB_HEAP$$ZI$$Base,(unsigned)Image$$ARM_LIB_HEAP$$ZI$$Limit);
#endif
#if defined(USE_TTY_WINIDEA)
/* Autoconnect WINIDEA */
extern volatile char g_TConn;
g_TConn = (char)0xff;
#endif
#if defined(CFG_SHARED_BSS_DATA)
extern uint8 __OS_START_SEC_shared_bss_shared[];
extern uint8 __OS_STOP_SEC_shared_bss_shared[];
extern uint8 __OS_START_SEC_shared_data_shared[];
extern uint8 __OS_STOP_SEC_shared_data_shared[];
extern uint8 __SHARED_DATA_ROM[];
memcpy(__OS_START_SEC_shared_data_shared, __SHARED_DATA_ROM, __OS_STOP_SEC_shared_data_shared - __OS_START_SEC_shared_data_shared); //lint !e732 Allow loss of sign. Expected positive.
memset(__OS_START_SEC_shared_bss_shared, 0, __OS_STOP_SEC_shared_bss_shared - __OS_START_SEC_shared_bss_shared ); //lint !e732 Allow loss of sign. Expected positive.
#endif
/* Check link file */
/* .data */
for (int i = 0; i < 3; i++) {
if (test_data_array[i] != TEST_DATA) {
BAD_LINK_FILE();
}
}
/* .sdata */
if (TEST_DATA != test_data) {
BAD_LINK_FILE();
}
/* .bss */
for (int i = 0; i < 3; i++) {
if (test_bss_array[i] != 0) {
BAD_LINK_FILE();
}
}
/* .sbss */
if (test_bss != 0) {
BAD_LINK_FILE();
}
/* check .sdata2 (PPC)*/
if (test_sdata2 != TEST_SDATA2) {
BAD_LINK_FILE();
}
/* check .sbss (PPC)*/
if (test_sbss2 != 0) {
BAD_LINK_FILE();
}
#if defined(__DCC__)
/* Runtime init */
__init();
#endif
#if defined(CFG_TMS570)
extern void _init(void);
#if defined(CFG_GCOV)
_init();
#endif
#endif
}
|
2301_81045437/classic-platform
|
common/init.c
|
C
|
unknown
| 7,006
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* ----------------------------[includes]------------------------------------*/
#include "Std_Types.h"
#include "shell.h"
#include "timer.h"
#include <string.h>
#include <stdio.h>
#define _LOG_NAME_
#include "log.h"
#include "xtoa.h"
/* ----------------------------[private define]------------------------------*/
/* Max size of _LOG_NAME_ */
#define LOG_NAME_SIZE 10
#define LOG_LEFT (LOG_MAX_STR - LOG_NAME_SIZE)
#define LOG_POS1 LOG_NAME_SIZE
#define LOG_POS2 (LOG_NAME_SIZE + LOG_LEFT/2)
#define LOG_STR LOG_LEFT/2
#if !defined(LOG_SIZE)
#define LOG_MAX_STR 50
#endif
#if !defined(LOG_SIZE)
#define LOG_SIZE 40
#endif
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
typedef struct LogEntryS {
char str[LOG_MAX_STR];
uint32 timestamp;
} LogEntryT;
struct LogH {
uint32 cnt;
LogEntryT log[LOG_SIZE];
};
/* ----------------------------[private function prototypes]-----------------*/
/* ----------------------------[private variables]---------------------------*/
#define LOG_START_SEC_VAR_CLEARED_UNSPECIFIED
#include "MemMap.h" /*lint !e9019 OTHER [MISRA 2012 Rule 20.1, advisory] OTHER AUTOSAR specified way of using MemMap*/
struct LogH Log;
#define LOG_STOP_SEC_VAR_CLEARED_UNSPECIFIED
#include "MemMap.h" /*lint !e9019 OTHER [MISRA 2012 Rule 20.1, advisory] OTHER AUTOSAR specified way of using MemMap*/
#define LOG_START_SEC_VAR_INIT_UNSPECIFIED
#include "MemMap.h" /*lint !e9019 OTHER [MISRA 2012 Rule 20.1, advisory] OTHER AUTOSAR specified way of using MemMap*/
struct LogH *logPtr = &Log;
#define LOG_STOP_SEC_VAR_INIT_UNSPECIFIED
#include "MemMap.h" /*lint !e9019 OTHER [MISRA 2012 Rule 20.1, advisory] OTHER AUTOSAR specified way of using MemMap*/
/* ----------------------------[private functions]---------------------------*/
/* ----------------------------[public functions]----------------------------*/
/**
* strncpy that fill space from where src ends to n with space
*
* @param dst Pointer to destination
* @param src Pointer to source
* @param n How many characters to copy.
*
* @return Pointer to the destination.
*/
static char *strncpy_space(char *dst, const char *src, size_t n)
{
char *d = dst;
/* copy first part */
while (n > 0 && *src != '\0') {
*d++ = *src++;
--n;
}
/* fill with space */
while (n > 0 ) {
*d++ = ' ';
--n;
}
return dst;
}
/**
* @brief Log a string
*
* @param[in] lh handle
* @param[in] str Pointer to a string
*/
void log_s( const char *name , const char *str ) {
struct LogH *lh = logPtr;
LogEntryT *le = &lh->log[lh->cnt];
strncpy_space(le->str,name,LOG_NAME_SIZE);
strncpy_space(&le->str[LOG_POS1],str,LOG_LEFT);
le->timestamp = TIMER_TICK2US(Timer_GetTicks());
lh->cnt = (lh->cnt + 1) % LOG_SIZE;
}
/**
* @brief Log a string and a string, will use half of the buffer for string
* str and the rest for str2
*
* @param[in] lh handle
* @param[in] str Pointer to string
* @param[in] str2 Pointer to string
*/
void log_s_s( const char *name , const char *str, const char *str2 ) {
struct LogH *lh = logPtr;
LogEntryT *le = &lh->log[lh->cnt];
strncpy_space(le->str,name,LOG_NAME_SIZE);
strncpy_space(&le->str[LOG_POS1],str,LOG_STR);
strncpy_space(&le->str[LOG_POS2],str2,LOG_STR);
le->timestamp = TIMER_TICK2US(Timer_GetTicks());
lh->cnt = (lh->cnt + 1) % LOG_SIZE;
}
/**
* @brief Log a string and a uint32
*
* @param[in] lh handle
* @param[in] str Pointer to a string
* @param[in] val hex value
*/
void log_s_u32( const char *name , const char *str, uint32 val) {
struct LogH *lh = logPtr;
char _str[10] = {"0x"};
LogEntryT *le = &lh->log[lh->cnt];
strncpy_space(le->str,name,LOG_NAME_SIZE);
strncpy_space(&le->str[LOG_POS1],str,LOG_STR);
xtoa(val,&_str[2],16,0);
strncpy_space(&le->str[LOG_POS2],_str,LOG_STR);
le->timestamp = TIMER_TICK2US(Timer_GetTicks());
lh->cnt = (lh->cnt + 1) % LOG_SIZE;
}
/**
* @brief Log an u8 array
*
* @param[in] lh handle
* @param[in] str Pointer to string, 4 chars only
* @param[in] data Pointer to data
* @param[in] num Number of data in the array.
*/
void log_s_a8( const char *name , const char *str, uint8 *data, uint8 num ) {
struct LogH *lh = logPtr;
LogEntryT *le = &lh->log[lh->cnt];
uint32 j =LOG_NAME_SIZE;
uint32 off;
strncpy_space(le->str,name,LOG_NAME_SIZE);
strncpy_space(&le->str[j],str,4);
j += 4;
num = MIN(num, ((LOG_LEFT - 4)/3));
for (uint32 i=0;(i<num);i++,j+=3) {
if( data[i] < 0x10) {
le->str[j] = '0';
off = 1;
} else {
off = 0;
}
xtoa(data[i],&le->str[j+off],16,0);
le->str[j+2] = ' ';
}
le->timestamp = TIMER_TICK2US(Timer_GetTicks());
lh->cnt = (lh->cnt + 1) % LOG_SIZE;
}
void Log_Init( void ) {
#if defined(CFG_SHELL)
SHELL_AddCmd(&logCmdInfo);
#endif
}
#if defined(CFG_SHELL)
/**
* @brief Function that prints the current log to console
*
* @param argc Argument count
* @param argv Argument vector
* @return
*/
static int shellCmdLog(int argc, char *argv[] ) {
uint32 pr;
uint32 us;
uint32 us_cut;
uint32 sec;
if(argc == 1 ) {
pr = MIN(logPtr->cnt,LOG_SIZE);
for(uint32 i = 0;i<pr; i++ ) {
us = TIMER_TICK2US(logPtr->log[i].timestamp);
sec = us/1000000;
us_cut = us - (sec * 1000000);
printf("[%0d.%06d] [%03d] %s\n", sec, us_cut ,0, logPtr->log[i].str);
}
} else {
}
return 0;
}
#endif
|
2301_81045437/classic-platform
|
common/log.c
|
C
|
unknown
| 6,854
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Std_Types.h"
#include "shell.h"
#include "timer.h"
#include <string.h>
#include <stdio.h>
#define LOG_MAX_STR 20
#define LOG_SIZE 100
#ifndef MIN
#define MIN(_x,_y) (((_x) < (_y)) ? (_x) : (_y))
#endif
#if defined(CFG_SHELL)
static int shellCmdLog(int argc, char *argv[] );
#endif
#if defined(CFG_SHELL)
static ShellCmdT logCmdInfo = {
shellCmdLog,
0,1,
"log",
"log",
"Display the logs collected by the Shell logger.\n",
{ NULL,NULL}
};
#endif
typedef struct Log {
char str[LOG_MAX_STR];
uint32 logCnt;
TimerTick timestamp;
} LogType;
uint32 logCnt = 0;
LogType Log[LOG_SIZE];
void Log_Add( const char *str ) {
strncpy(Log[logCnt].str,str,LOG_MAX_STR);
Log[logCnt].timestamp = Timer_GetTicks();
Log[logCnt].logCnt = logCnt;
logCnt = (logCnt + 1) % LOG_SIZE;
}
void Log_Add2( const char *str, const char *str2 ) {
Log[logCnt].str[4] = ' ';
Log[logCnt].str[5] = ' ';
Log[logCnt].str[6] = ' ';
Log[logCnt].str[7] = ' ';
Log[logCnt].str[8] = ' ';
Log[logCnt].str[9] = ' ';
int s = strlen(str);
memcpy(Log[logCnt].str,str,s);
for(int a=s;a<LOG_MAX_STR/2;a++) {
Log[logCnt].str[a] = ' ';
}
strncpy(&Log[logCnt].str[LOG_MAX_STR/2],str2,LOG_MAX_STR/2);
Log[logCnt].timestamp = Timer_GetTicks();
Log[logCnt].logCnt = logCnt;
logCnt = (logCnt + 1) % LOG_SIZE;
}
void Log_Init( void ) {
#if defined(CFG_SHELL)
SHELL_AddCmd(&logCmdInfo);
#endif
}
#if defined(CFG_SHELL)
/**
*
* @param argc
* @param argv
* @return
*/
static int shellCmdLog(int argc, char *argv[] ) {
uint32 pr;
uint32 us;
uint32 us_cut;
uint32 sec;
if(argc == 1 ) {
pr = MIN(logCnt,LOG_SIZE);
for(uint32 i = 0;i<pr; i++ ) {
us = TIMER_TICK2US(Log[i].timestamp);
sec = us/1000000;
us_cut = us - (sec * 1000000);
printf("[%0d.%06d] [%03d] %s\n", sec, us_cut ,Log[i].logCnt, Log[i].str);
}
} else {
}
return 0;
}
#endif
|
2301_81045437/classic-platform
|
common/logger.c
|
C
|
unknown
| 2,863
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
* A message box implementation.
*
* Notes:
* - Uses heap
* - Do NOT use Arc_MBoxDestroy() call, it's there for testing purposes only.
*/
//#define _TEST_MBOX_
/*lint -save -e9045 */ /* non-hidden definition of type ..inherited from other files */
#include "mbox.h"
#include <stdlib.h>
#include <string.h>
#ifdef _TEST_MBOX_
#include <stdio.h>
#include "arc_assert.h"
#endif
Arc_MBoxType* Arc_MBoxCreate( uint32 size ) {
Arc_MBoxType *mPtr;
mPtr = malloc(sizeof(Arc_MBoxType));/*lint !e586 Intended malloc */
mPtr->cirqPtr = CirqBuffDynCreate(size,sizeof(void *)); /*lint !e613 Intended pointer usage */
return mPtr;
}
void Arc_MBoxDestroy( Arc_MBoxType *mPtr ) {
(void)CirqBuffDynDestroy(mPtr->cirqPtr);
free(mPtr); /*lint !e586 Intended free */
}
/**
* Post a message to a box, non-blocking.
*
*/
sint32 Arc_MBoxPost( const Arc_MBoxType *mPtr, void *msg ) {
sint32 rv;
sint32 status;
status = 0;
rv = CirqBuffPush(mPtr->cirqPtr,msg);
if( rv != 0) {
status = 1;
}
return status;
}
/**
*
*/
sint32 Arc_MBoxFetch(const Arc_MBoxType *mPtr, void *msg)
{
sint32 rv;
sint32 status;
status = 0;
rv = CirqBuffPop(mPtr->cirqPtr,msg);
if(rv != 0) {
status = 1;
}
return status;
}
#ifdef _TEST_MBOX_
int main( void ) {
Arc_MBoxType *myBoxes[10];
uint8_t *dataPtr;
printf("Hej\n");
myBoxes[0] = Arc_MBoxCreate(2);
myBoxes[1] = Arc_MBoxCreate(4);
dataPtr = malloc(10);
dataPtr[0] = 1;
Arc_MBoxPost(myBoxes[0],&dataPtr);
dataPtr = malloc(20);
dataPtr[0] = 2;
Arc_MBoxPost(myBoxes[0],&dataPtr);
Arc_MBoxFetch(myBoxes[0],&dataPtr);
ASSERT(dataPtr[0] == 1);
free(dataPtr);
Arc_MBoxFetch(myBoxes[0],&dataPtr);
ASSERT(dataPtr[0] == 2);
free(dataPtr);
Arc_MBoxDestroy(myBoxes[0]);
Arc_MBoxDestroy(myBoxes[1]);
return 0;
}
#endif
|
2301_81045437/classic-platform
|
common/mbox.c
|
C
|
unknown
| 2,784
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
Methods called by MW MSL libraries to perform console IO:
*/
/*lint -w1 Only errors in generic module used during development */
#include "Cpu.h"
#include "Ramlog.h"
#include "../../MSL_Common_Embedded/Include/UART.h"
#include <stddef.h>
#include <stdlib.h>
#if defined(USE_TTY_UDE)
#include "serial_dbg_ude.h"
#endif
#ifdef USE_TTY_WINIDEA
#define TWBUFF_SIZE 0x100
#define TRBUFF_SIZE 0x100
#define TBUFF_PTR 2
#define TWBUFF_LEN (TWBUFF_SIZE+TBUFF_PTR)
#define TRBUFF_LEN (TRBUFF_SIZE+TBUFF_PTR)
#define TWBUFF_TPTR (g_TWBuffer[TWBUFF_SIZE+0])
#define TWBUFF_CPTR (g_TWBuffer[TWBUFF_SIZE+1])
#define TWBUFF_INC(n) ((n + 1)&(TWBUFF_SIZE-1))
#define TWBUFF_FULL() (TWBUFF_TPTR==((TWBUFF_CPTR-1)&(TWBUFF_SIZE-1)))
volatile char g_TConn;
volatile unsigned char g_TWBuffer[TWBUFF_LEN] __attribute__ ((aligned (0x100))); // Transmit to WinIDEA terminal
volatile unsigned char g_TRBuffer[TRBUFF_LEN] __attribute__ ((aligned (0x100)));
#endif
UARTError InitializeUART(UARTBaudRate baudRate)
{
(void)baudRate;
return 0;
}
UARTError ReadUARTN(void* bytes, unsigned long length)
{
#ifdef USE_TTY_WINIDEA
(void)g_TRBuffer[0];
#endif
(void)bytes; //lint !e920 MISRA False positive. Allowed to cast pointer to void here.
(void)length;
return 0; // No error
}
UARTError ReadUART1(char* c) {
return ReadUARTN( c, 1 );
}
UARTError WriteUARTN(const void* buf, unsigned long cnt)
{
#ifdef USE_TTY_WINIDEA
{
const char *pbuf = buf;
if (g_TConn)
{
unsigned char nCnt,nLen;
for(nCnt = 0; nCnt < cnt; nCnt++)
{
while( TWBUFF_FULL() ) {}
nLen = TWBUFF_TPTR;
g_TWBuffer[nLen] = pbuf[nCnt];
nLen = TWBUFF_INC(nLen);
TWBUFF_TPTR = nLen;
}
}
}
#endif
#ifdef USE_TTY_UDE
UDE_Device.write( buf,cnt);
#endif
#if defined(USE_RAMLOG)
{
const char *pbuf = buf;
for (int i = 0; i < cnt; i++) {
ramlog_chr (*(pbuf + i));
}
}
#endif
(void)buf; //lint !e920 MISRA False positive. Allowed to cast pointer to void here.
(void)cnt;
return 0; // No error
}
int write( int fd, const void *buf, uint32 nbytes) {
(void)fd;
(void)buf; //lint !e920 MISRA False positive. Allowed to cast pointer to void here.
(void)nbytes;
/* dummy function */
return 0;
}
UARTError WriteUART1(char c) {
return WriteUARTN( &c, 1 );
}
#if 0
void __init_hardware(void)
{
}
void __flush_cache(register void *address, register unsigned int size)
{
(void)address;
(void)size;
}
void __init_user(void)
{
}
#endif
void exit(int exit ) {
(void)exit;
/* !! WARNING !! !! WARNING !! !! WARNING !!
*
* ENDING UP HERE CAN BE VERY BAD:
* 1. You got an assert() (calls exit())
* 2. For some other reason (deliberately exited main() ?)
*
* IMPROVMENT: Call reset of card?
* */
Irq_Disable();
while(1){}
}
|
2301_81045437/classic-platform
|
common/msl_port.c
|
C
|
unknown
| 3,923
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*lint -w1 Only errors in generic module used during development */
#include <unistd.h>
#include <sys/stat.h>
#include <sys/types.h>
#include <errno.h>
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include <stddef.h>
#include "Std_Types.h"
#include "Ramlog.h"
#include "Os.h"
//#if defined(CFG_ARM_CM3)
//#include "irq_types.h"
////#include "stm32f10x.h"
//#endif
#ifdef USE_TTY_TCF_STREAMS
#include "streams.h"
#endif
#if defined(USE_TTY_UDE)
#include "serial_dbg_ude.h"
#endif
/* Errno is made reentrant by using malloc and we don't want this. This is usually fixed
* by undef errno and declaring it as extern int. It does not work when using GCC for
* HC1X and this ifdef takes care of that.
*/
#undef errno
#if defined(__GNUC__) && defined(CFG_HC1X)
int errno;
#else
extern int errno;
#endif
/* Errno is made reentrant by using malloc and we don't want this. This is usually fixed
* by undef errno and declaring it as extern int. It does not work when using GCC for
* HC1X and this ifdef takes care of that.
*/
#undef errno
#if defined(__GNUC__) && defined(CFG_HC1X)
int errno;
#else
extern int errno;
#endif
#if defined(CFG_ARM)
#define open _open
#define exit _exit
#define fstat _fstat
#define getpid _getpid
#define kill _kill
#define close _close
#define isatty _isatty
#define sbrk _sbrk
#define read _read
#define write _write
#define lseek _lseek
#endif
// Operation on Winidea terminal buffer
#define TWBUFF_SIZE 0x100
#define TRBUFF_SIZE 0x100
#define TBUFF_PTR 2
#define TWBUFF_LEN (TWBUFF_SIZE+TBUFF_PTR)
#define TRBUFF_LEN (TRBUFF_SIZE+TBUFF_PTR)
#define TWBUFF_TPTR (g_TWBuffer[TWBUFF_SIZE+0])
#define TWBUFF_CPTR (g_TWBuffer[TWBUFF_SIZE+1])
#define TWBUFF_INC(n) ((n + 1)&(TWBUFF_SIZE-1))
#define TWBUFF_FULL() (TWBUFF_TPTR==((TWBUFF_CPTR-1)&(TWBUFF_SIZE-1)))
#ifdef USE_TTY_WINIDEA
#if defined(MC912DG128A)
static volatile unsigned char g_TWBuffer[TWBUFF_LEN];
static volatile unsigned char g_TRBuffer[TRBUFF_LEN];
volatile char g_TConn __attribute__ ((section (".winidea_port")));
#else
static volatile unsigned char g_TWBuffer[TWBUFF_LEN] __attribute__ ((aligned (0x100))); // Transmit to WinIDEA terminal
static volatile unsigned char g_TRBuffer[TRBUFF_LEN] __attribute__ ((aligned (0x100)));
volatile char g_TConn __attribute__ ((section (".winidea_port")));
#endif
#endif
#ifdef USE_TTY_CODE_COMPOSER
#define _DTOPEN (0xF0)
#define _DTCLOSE (0xF1)
#define _DTREAD (0xF2)
#define _DTWRITE (0xF3)
#define _DTLSEEK (0xF4)
#define _DTUNLINK (0xF5)
#define _DTGETENV (0xF6)
#define _DTRENAME (0xF7)
#define _DTGETTIME (0xF8)
#define _DTGETCLK (0xF9)
#define _DTSYNC (0xFF)
#define LOADSHORT(x,y,z) { x[(z)] = (unsigned short) (y); \
x[(z)+1] = (unsigned short) (y) >> 8; }
#define UNLOADSHORT(x,z) ((short) ( (short) x[(z)] + \
((short) x[(z)+1] << 8)))
#define PACKCHAR(val, base, byte) ( (base)[(byte)] = (val) )
#define UNPACKCHAR(base, byte) ( (base)[byte] )
static unsigned char parmbuf[8];
#define CC_BUFSIZ 512
#define CC_BUFFER_SIZE ((CC_BUFSIZ)+32)
volatile unsigned int _CIOBUF_[CC_BUFFER_SIZE] __attribute__ ((section (".cio")));
static unsigned char CIOTMPBUF[CC_BUFSIZ];
static uint16 cio_tmp_buf_index = 0;
/***************************************************************************/
/* */
/* WRITEMSG() - Sends the passed data and parameters on to the host. */
/* */
/***************************************************************************/
void writemsg(unsigned char command,
register const unsigned char *parm,
register const char *data,
unsigned int length)
{
volatile unsigned char *p = (volatile unsigned char *)(_CIOBUF_+1);
unsigned int i;
/***********************************************************************/
/* THE LENGTH IS WRITTEN AS A TARGET INT */
/***********************************************************************/
_CIOBUF_[0] = length;
/***********************************************************************/
/* THE COMMAND IS WRITTEN AS A TARGET BYTE */
/***********************************************************************/
*p++ = command;
/***********************************************************************/
/* PACK THE PARAMETERS AND DATA SO THE HOST READS IT AS BYTE STREAM */
/***********************************************************************/
for (i = 0; i < 8; i++) PACKCHAR(*parm++, p, i);
for (i = 0; i < length; i++) PACKCHAR(*data++, p, i+8);
/***********************************************************************/
/* THE BREAKPOINT THAT SIGNALS THE HOST TO DO DATA TRANSFER */
/***********************************************************************/
__asm(" .global C$$IO$$");
__asm("C$$IO$$: nop");
}
/***************************************************************************/
/* */
/* READMSG() - Reads the data and parameters passed from the host. */
/* */
/***************************************************************************/
void readmsg(register unsigned char *parm,
register char *data)
{
volatile unsigned char *p = (volatile unsigned char *)(_CIOBUF_+1);
unsigned int i;
unsigned int length;
/***********************************************************************/
/* THE LENGTH IS READ AS A TARGET INT */
/***********************************************************************/
length = _CIOBUF_[0];
/***********************************************************************/
/* UNPACK THE PARAMETERS AND DATA */
/***********************************************************************/
for (i = 0; i < 8; i++) *parm++ = UNPACKCHAR(p, i);
if (data != NULL)
for (i = 0; i < length; i++) *data++ = UNPACKCHAR(p, i+8);
}
/****************************************************************************/
/* HOSTWRITE() - Pass the write command and its arguments to the host. */
/****************************************************************************/
int HOSTwrite(int dev_fd, const char *buf, unsigned count)
{
int result;
// WARNING. Can only handle count == 1!
if (count != 1) _exit(1);
if (count > CC_BUFSIZ) count = CC_BUFSIZ;
if (cio_tmp_buf_index < CC_BUFSIZ) {
CIOTMPBUF[cio_tmp_buf_index++] = *buf;
if (*buf != 0xA) { // Only flush if newline
return 0;
}
}
LOADSHORT(parmbuf,dev_fd,0);
LOADSHORT(parmbuf,cio_tmp_buf_index,2);
writemsg(_DTWRITE,parmbuf,(char *)CIOTMPBUF,cio_tmp_buf_index);
readmsg(parmbuf,NULL);
result = UNLOADSHORT(parmbuf,0);
cio_tmp_buf_index = 0;
return result;
}
#endif
#ifdef USE_TTY_TMS570_KEIL
#include "GLCD.h"
#endif
#define FILE_RAMLOG 3
/* Location MUST match NoICE configuration */
#ifdef USE_TTY_NOICE
static volatile char VUART_TX __attribute__ ((section (".noice_port")));
static volatile char VUART_RX __attribute__ ((section (".noice_port")));
volatile unsigned char START_VUART = 0;
#endif
/*
* T32 stuff
*/
// This must be in un-cached space....
#ifdef USE_TTY_T32
static volatile char t32_outport __attribute__ ((section (".t32_outport")));
void t32_writebyte(char c)
{
/* T32 can hang here for several reasons;
* - term.view e:address.offset(v.address(t32_outport)) e:0
*/
while (t32_outport != 0 ) ; /* wait until port is free */
t32_outport = c; /* send character */
}
#endif
/*
* clib support
*/
/* Do nothing */
int close( int fd ) {
(void)fd;
return (-1);
}
char *__env[1] = { 0 };
char **environ = __env;
int execve(const char *path, char * const argv[], char * const envp[] ) {
//int execve(char *name, char **argv, char **env){
(void)path;
(void)argv;
(void)envp;
errno=ENOMEM;
return -1;
}
pid_t fork( void ) {
errno=EAGAIN;
return -1;
}
#include <sys/stat.h>
int fstat(int file, struct stat *st) {
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
/* Returns 1 if connected to a terminal. T32 can be a terminal
*/
int isatty( int fd )
{
(void)fd;
return 1;
}
/*
int fstat( int fd, struct stat *buf )
{
buf->st_mode = S_IFCHR;
buf->st_blksize = 0;
return (0);
}
*/
/* reposition read/write file offset
* We can't seek, return error.*/
off_t lseek( int fd, off_t offset,int whence)
{
(void)fd;
(void)offset;
(void)whence;
errno = ESPIPE;
return ((off_t)-1);
}
int open(const char *name, int flags, int mode){
(void)name;
(void)flags;
(void)mode;
#if defined(USE_RAMLOG)
if( strcmp(name,"ramlog") == 0 ) {
return FILE_RAMLOG;
}
#endif
return -1;
}
int read( int fd, void *buf, size_t nbytes )
{
(void)fd;
(void)buf;
(void)nbytes;
#ifdef USE_TTY_WINIDEA
(void)g_TRBuffer[0];
#endif
#ifdef USE_TTY_NOICE
// Not tested at all
int retval;
while (VUART_RX != 0)
{
}
retval = VUART_RX;
VUART_RX = 0;
#endif
/* Only support write for now, return 0 read */
return 0;
}
int write( int fd, const void *_buf, size_t nbytes)
{
//(void)fd; // Normally 0- ?, 1-stdout, 2-stderr,
// Added 3-ramlog,
if( fd <= STDERR_FILENO ) {
#ifdef USE_TTY_NOICE
char *buf1 = (char *)_buf;
if (START_VUART)
{
for (int i = 0; i < nbytes; i++) {
char c = buf1[i];
if (c == '\n')
{
while (VUART_TX != 0)
{
}
VUART_TX = '\r';
}
while (VUART_TX != 0)
{
}
VUART_TX = c;
}
}
#endif
#ifdef USE_TTY_WINIDEA
if (g_TConn)
{
char *buf = (char *)_buf;
unsigned char nCnt,nLen;
for(nCnt=0; nCnt<nbytes; nCnt++)
{
while(TWBUFF_FULL()) ;
nLen=TWBUFF_TPTR;
g_TWBuffer[nLen]=buf[nCnt];
nLen=TWBUFF_INC(nLen);
TWBUFF_TPTR=nLen;
}
}
#endif
#ifdef USE_TTY_T32
char *buf = (char *)_buf;
for (int i = 0; i < nbytes; i++) {
if (*(buf + i) == '\n') {
t32_writebyte ('\r');
// t32_writebyte ('\n');
}
t32_writebyte (*(buf + i));
}
#endif
#ifdef USE_TTY_ARM_ITM
char *buf = (char *)_buf;
for (int i = 0; i < nbytes; i++) {
ITM_SendChar(*(buf + i));
}
#endif
#ifdef USE_TTY_TCF_STREAMS
char *buf = (char *)_buf;
for (int i = 0; i < nbytes; i++) {
TCF_TTY_SendChar(*(buf + i));
}
#endif
#ifdef USE_TTY_CODE_COMPOSER
HOSTwrite(fd, _buf, nbytes);
#endif
#ifdef USE_TTY_TMS570_KEIL
for (int i = 0; i < nbytes; i++) {
GLCD_PrintChar((char *)(_buf + i));
}
#endif
#ifdef USE_TTY_UDE
UDE_write(fd,(char *)_buf,nbytes);
#endif
#if defined(USE_RAMLOG)
{
char *buf = (char *)_buf;
for (int i = 0; i < nbytes; i++) {
ramlog_chr (*(buf + i));
}
}
#endif
}
else
{
#if defined(USE_RAMLOG)
/* RAMLOG support */
if(fd == FILE_RAMLOG) {
char *buf = (char *)_buf;
for (int i = 0; i < nbytes; i++) {
ramlog_chr (*(buf + i));
}
}
#endif
}
return (nbytes);
}
int arc_putchar(int fd, int c) {
char cc = c;
write( fd,&cc,1);
return 0;
}
int stat( const char *file, struct stat *st ) {
//int stat(char *file, struct stat *st) {
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
pid_t getpid() {
return 1;
}
int kill(int pid, int sig){
(void)pid;
(void)sig;
errno=EINVAL;
return(-1);
}
/* Should not really be here, but .. */
void _fini( void )
{
}
#if defined(__GNUC__)
void __init( void )
{
}
#endif
#if defined(CFG_ARM)
void _exit( int status ) {
#ifdef USE_TTY_CODE_COMPOSER
__asm(" .global C$$EXIT");
__asm("C$$EXIT: nop");
#endif
ShutdownOS( E_OS_EXIT_ABORT );
while(1) ;
}
#endif
|
2301_81045437/classic-platform
|
common/newlib_port.c
|
C
|
unknown
| 13,912
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/* ----------------------------[includes]------------------------------------*/
#include "Os.h"
#include "timer.h"
#include "arc.h"
#if defined(CFG_SHELL)
#include "shell.h"
#endif
#include <stdio.h>
#include <string.h>
//#define USE_LDEBUG_PRINTF
#include "debug.h"
/* ----------------------------[private define]------------------------------*/
#define MAX_FUNCTION_CNT 16uL // has to be less that 255
#define MAX_NAME_CHAR_LEN 32uL
#define NO_ACTIVE_FUNCTION 0xFFu
#define MAX_VAL_INIT 0xFFFFFFFF
/* ----------------------------[private macro]-------------------------------*/
/* ----------------------------[private typedef]-----------------------------*/
#if defined CFG_PERF_FUNC
typedef struct StatTick_Type {
TickType avg;
TickType total;
TickType min;
TickType max;
}StatTickType;
#endif
typedef struct Perf_Info_S {
/* Calculated load, 0% to 100% */
uint8_t load;
/* Number of times the function have been called */
uint32_t invokedCnt;
/* Max time in us that this task/isr have executed */
TickType timeMax_us;
TickType timeMin_us;
/* The total time in us this task/isr have executed */
TickType timeTotal_us;
char name[MAX_NAME_CHAR_LEN];
// char *name;
/*
* INTERNAL
*/
TickType timePeriodTotal_us;
/* For each entry 1 is added. For each exit 1 is subtracted
* Normally this should be 0 or 1 */
int8_t called;
TickType timeStart;
#if defined CFG_PERF_FUNC
/* Active PerfFuncIdx in the Task
* Default activeFunc=0xFF -> No active Function * */
uint8_t activeFunc;
TickType invokeTime; // Tick at which Perf_Prefunction is Called
TickType prev_invokeTime; // Last time Tick at which Perf_Prefunction is Called
TickType timeActive;
uint32_t invokedcnt_trig;
StatTickType activePeriod_us; // Period between pre_func - post_func: ONLY active period (when task was running)
StatTickType invokePeriod_us; // Period between consecutive invocations of pre_func
StatTickType entryExitPeriod_us; // Period between pre_func and post_func
#endif
} Perf_InfoType;
struct Perf_Sum {
uint8_t loadIsr;
uint8_t loadTask;
uint8_t loadTotal;
uint32 idleTaskTime_us; /* Special for OS idle */
uint32 taskTime_us;
uint32 isrTime_us;
};
struct Perf_Total {
struct Perf_Sum sinceStart;
struct Perf_Sum lastPeriod;
TickType timeTotal_us; /* Total runtime of perf */
TickType timeLastPeriod_us;
};
/* ----------------------------[private function prototypes]-----------------*/
#if defined(CFG_SHELL)
static int shellCmdTop(int argc, char *argv[] );
#endif
#if defined CFG_PERF_FUNC
static int shellCmdtop_func(int argc, char *argv[] );
#endif
/* ----------------------------[private variables]---------------------------*/
Perf_InfoType Perf_TaskTimers[OS_TASK_CNT];
Perf_InfoType Perf_IsrTimers[OS_ISR_MAX_CNT];
struct Perf_Total Perf_Stats;
#if defined CFG_PERF_FUNC
Perf_InfoType Perf_FunctionTimers[MAX_FUNCTION_CNT];
uint8 PERF_FUNCTION_CNT = 0;
#endif
uint32 nesting = 0;
static boolean initCalled = false;
#if defined CFG_PERF_FUNC
static ShellCmdT top_funcCmdInfo = {
shellCmdtop_func,
0,1,
"top_func",
"Stat about Function measurements (alpha version)\n",
" (*) Use Perf_PreFunctionHook; <Function>; Perf_PostFunctionHook; \n"
" Active Time[us]: Time for which function was active (excludes time for which function is preempted) \n"
" Invoke Period[us]: Time between two consecutive invocations\n"
" Entry-Exit Period[us]: Time between function entry and function exit (includes inactive time)\n"
" Global Variable \"Perf_FunctionTimers\" for complete stats \n"
" Average and Load are calculated over trigger period, and Min,Max over entire time\n"
" Warning: No nested calls for Perf_FunctionHook\n"
" Warning: Higher CPU load\n",
" Warning: Supports functions in tasks only (no ISR)\n",
{NULL}
};
#endif
#if defined(CFG_SHELL)
static ShellCmdT topCmdInfo = {
shellCmdTop,
0,1,
"top",
"top",
"List CPU load\n"
" (*) The total will never be 100% since calculation times\n"
" are floored and time between measuring points is not\n"
" measured.\n",
{ NULL,NULL}
};
#endif
/* ----------------------------[private functions]---------------------------*/
#if defined(CFG_SHELL)
/*
*
* @param argc
* @param argv
* @return
*/
static int shellCmdTop(int argc, char *argv[] ) {
Arc_PcbType pcb;
uint32 totalPerc = 0;
if(argc == 1 ) {
puts(" load stack\n");
puts("Task name [%] invCnt max[us] [%] \n");
puts("--------------------------------------------------\n");
for (int i = 0; i < OS_TASK_CNT; i++) {
Os_Arc_GetTaskInfo(&pcb,i,OS_ARC_F_TASK_STACK);
totalPerc += Perf_TaskTimers[i].load;
printf(" %-16s %3d %8d %6d %3d\n",Perf_TaskTimers[i].name,
Perf_TaskTimers[i].load,
Perf_TaskTimers[i].invokedCnt,
Perf_TaskTimers[i].timeMax_us,
pcb.stack.usageInPercent);
}
puts("\n");
puts(" load \n");
puts("ISR name [%] invCnt max[us] \n");
puts("--------------------------------------------------\n");
for (int i = 0; i < Os_Arc_GetIsrCount(); i++) {
if( Perf_IsrTimers[i].name[0] == '\0' ) {
Os_Arc_GetIsrInfo(&pcb,i);
memcpy(Perf_IsrTimers[i].name,pcb.name,MAX_NAME_CHAR_LEN);
}
totalPerc += Perf_IsrTimers[i].load;
printf(" %-16s %3d %8d %6d\n",Perf_IsrTimers[i].name,
Perf_IsrTimers[i].load,
Perf_IsrTimers[i].invokedCnt,
Perf_IsrTimers[i].timeMax_us );
}
printf("\nTotal%%: %d (*) See help\n\n",totalPerc);
} else {
}
return 0;
}
#endif
#if defined CFG_PERF_FUNC
static int shellCmdtop_func(int argc, char *argv[] ){
if(argc == 1 ) {
puts(" Active Time[uS] | Invoke Period[uS]| Entry-Exit Period[uS] | Load \n");
puts("Function name avg min max | avg min max | avg min max | [%] \n");
puts("--------------------------------------------------------------------------------------\n");
for (int i = 0; i < PERF_FUNCTION_CNT; i++) {
printf(" %-16s %5d %5d %5d| %5d %5d %5d | %5d %5d %5d | %2d\n",Perf_FunctionTimers[i].name,
Perf_FunctionTimers[i].activePeriod_us.avg,
Perf_FunctionTimers[i].activePeriod_us.min,
Perf_FunctionTimers[i].activePeriod_us.max,
Perf_FunctionTimers[i].invokePeriod_us.avg,
Perf_FunctionTimers[i].invokePeriod_us.min,
Perf_FunctionTimers[i].invokePeriod_us.max,
Perf_FunctionTimers[i].entryExitPeriod_us.avg,
Perf_FunctionTimers[i].entryExitPeriod_us.min,
Perf_FunctionTimers[i].entryExitPeriod_us.max,
Perf_FunctionTimers[i].load);
}
} else {
}
return 0;
}
#endif
/* ----------------------------[public functions]----------------------------*/
/*
*
*/
void Perf_Init(void) {
Arc_PcbType pcb;
if (initCalled) {
return;
}
#if defined(CFG_SHELL)
SHELL_AddCmd(&topCmdInfo);
#endif
#if defined CFG_PERF_FUNC
SHELL_AddCmd(&top_funcCmdInfo);
#endif
Timer_Init();
initCalled = true;
for (int i = 0; i < OS_TASK_CNT; i++) {
Os_Arc_GetTaskInfo(&pcb,i,OS_ARC_F_TASK_ALL);
memcpy(Perf_TaskTimers[i].name,pcb.name,16);
#if defined CFG_PERF_FUNC
Perf_TaskTimers[i].activeFunc = NO_ACTIVE_FUNCTION;
PERF_FUNCTION_CNT = 0;
#endif
}
for (int i = 0; i < Os_Arc_GetIsrCount(); i++) {
Os_Arc_GetIsrInfo(&pcb,i);
memcpy(Perf_IsrTimers[i].name,pcb.name,16);
}
}
/*
*
*/
void Perf_Trigger(void) {
TickType perfDiff_us;
static TickType perfTimerLast = 0;
/* Ignore first time */
if (perfTimerLast == 0) {
perfTimerLast = Timer_GetTicks();
/* Check for late installed interrupts */
Arc_PcbType pcb;
for (int i = 0; i < Os_Arc_GetIsrCount(); i++) {
Os_Arc_GetIsrInfo(&pcb,i);
if( (Perf_IsrTimers[i].name[0] == '\0') && (pcb.name[0] != '\0') ) {
memcpy(Perf_IsrTimers[i].name,pcb.name,16);
}
}
return;
}
SuspendAllInterrupts();
/* Diff from previous run */
perfDiff_us = TIMER_TICK2US(Timer_GetTicks() - perfTimerLast);
Perf_Stats.timeTotal_us += perfDiff_us;
Perf_Stats.timeLastPeriod_us = perfDiff_us;
perfTimerLast = Timer_GetTicks();
/* Clear all the timers */
Perf_Stats.lastPeriod.taskTime_us = 0;
Perf_Stats.lastPeriod.isrTime_us = 0;
Perf_Stats.sinceStart.taskTime_us = 0;
Perf_Stats.sinceStart.isrTime_us = 0;
Perf_Stats.lastPeriod.idleTaskTime_us = Perf_TaskTimers[0].timePeriodTotal_us;
for (int i = 0; i < OS_TASK_CNT; i++) {
/* Add period time to total time */
Perf_TaskTimers[i].timeTotal_us += Perf_TaskTimers[i].timePeriodTotal_us;
Perf_TaskTimers[i].load = Perf_TaskTimers[i].timePeriodTotal_us * 100 / perfDiff_us;
/* Add the times for all tasks but the IDLE task */
if( i != 0 ) {
Perf_Stats.sinceStart.taskTime_us += Perf_TaskTimers[i].timeTotal_us;
Perf_Stats.lastPeriod.taskTime_us += Perf_TaskTimers[i].timePeriodTotal_us;
}
Perf_TaskTimers[i].timePeriodTotal_us = 0;
}
Perf_Stats.sinceStart.idleTaskTime_us = Perf_TaskTimers[0].timeTotal_us;
for (int i = 0; i < Os_Arc_GetIsrCount(); i++) {
/* Add period time to total time */
Perf_IsrTimers[i].timeTotal_us += Perf_IsrTimers[i].timePeriodTotal_us;
Perf_IsrTimers[i].load = Perf_IsrTimers[i].timePeriodTotal_us * 100 / perfDiff_us;
/* Add the times for all Isrs but the IDLE Isr */
Perf_Stats.sinceStart.isrTime_us += Perf_IsrTimers[i].timeTotal_us;
Perf_Stats.lastPeriod.isrTime_us += Perf_IsrTimers[i].timePeriodTotal_us;
Perf_IsrTimers[i].timePeriodTotal_us = 0;
}
Perf_Stats.sinceStart.loadTask = Perf_Stats.sinceStart.taskTime_us * 100 / Perf_Stats.timeTotal_us;
Perf_Stats.sinceStart.loadIsr = Perf_Stats.sinceStart.isrTime_us * 100 / Perf_Stats.timeTotal_us;
Perf_Stats.sinceStart.loadTotal = Perf_Stats.sinceStart.loadTask + Perf_Stats.sinceStart.loadIsr;
/* Update load this period */
Perf_Stats.lastPeriod.loadTask = Perf_Stats.lastPeriod.taskTime_us * 100 / Perf_Stats.timeLastPeriod_us;
Perf_Stats.lastPeriod.loadIsr = Perf_Stats.lastPeriod.isrTime_us * 100 / Perf_Stats.timeLastPeriod_us;
Perf_Stats.lastPeriod.loadTotal = Perf_Stats.lastPeriod.loadTask + Perf_Stats.lastPeriod.loadIsr;
#if defined CFG_PERF_FUNC
for (int i = 0; i < PERF_FUNCTION_CNT; i++){
Perf_FunctionTimers[i].invokePeriod_us.avg = (Perf_FunctionTimers[i].invokePeriod_us.total/
(Perf_FunctionTimers[i].invokedcnt_trig-1)); // -1 to compenset for not calculating for 1st cnt
/* Subtract number of time pre_func was called but not the post_func for
* correct number of times the period was measured*/
Perf_FunctionTimers[i].activePeriod_us.avg = Perf_FunctionTimers[i].activePeriod_us.total/
(Perf_FunctionTimers[i].invokedcnt_trig-Perf_FunctionTimers[i].called);
Perf_FunctionTimers[i].entryExitPeriod_us.avg = Perf_FunctionTimers[i].entryExitPeriod_us.total/
(Perf_FunctionTimers[i].invokedcnt_trig-Perf_FunctionTimers[i].called);
/* Load for this period */
Perf_FunctionTimers[i].load = Perf_FunctionTimers[i].activePeriod_us.total*100 / Perf_Stats.timeLastPeriod_us;
/*Clear Totals for new trigger*/
Perf_FunctionTimers[i].activePeriod_us.total = 0;
Perf_FunctionTimers[i].invokePeriod_us.total = 0;
Perf_FunctionTimers[i].entryExitPeriod_us.total = 0;
Perf_FunctionTimers[i].invokedcnt_trig = 0;
Perf_FunctionTimers[i].prev_invokeTime = 0;
Perf_FunctionTimers[i].timePeriodTotal_us=0;
Perf_FunctionTimers[i].timeActive=0;
}
#endif
ResumeAllInterrupts();
}
#if !defined(CFG_T1_ENABLE)
/*
*
* @param isr
*/
void Os_PreIsrHook(ISRType isr) {
Perf_IsrTimers[isr].invokedCnt++;
Perf_IsrTimers[isr].called++;
Perf_IsrTimers[isr].timeStart = Timer_GetTicks();
}
/*
*
* @param isr
*/
void Os_PostIsrHook(ISRType isr) {
TickType diff;
diff = TIMER_TICK2US(Timer_GetTicks() - Perf_IsrTimers[isr].timeStart);
if (diff > Perf_IsrTimers[isr].timeMax_us) {
Perf_IsrTimers[isr].timeMax_us = diff;
}
Perf_IsrTimers[isr].timePeriodTotal_us += diff;
Perf_IsrTimers[isr].called--;
}
#else
#warning Perf.c cannot trace the interrupts when T1 is used.
#endif
/*
*
*/
void PreTaskHook(void) {
TaskType task;
GetTaskID(&task);
/* Task */
Perf_TaskTimers[task].invokedCnt++;
Perf_TaskTimers[task].called++;
Perf_TaskTimers[task].timeStart = Timer_GetTicks();
#if defined CFG_PERF_FUNC
/*Perf_Func
* If switching task during execution of perf_function */
if ( Perf_TaskTimers[task].activeFunc < MAX_FUNCTION_CNT){
Perf_FunctionTimers[Perf_TaskTimers[task].activeFunc].timeStart = Timer_GetTicks();
}
#endif
}
/*
*
*/
void PostTaskHook(void) {
TaskType task;
TickType diff;
GetTaskID(&task);
Perf_TaskTimers[task].called--;
diff = TIMER_TICK2US(Timer_GetTicks() - Perf_TaskTimers[task].timeStart);
if (diff > Perf_TaskTimers[task].timeMax_us) {
Perf_TaskTimers[task].timeMax_us = diff;
}
Perf_TaskTimers[task].timePeriodTotal_us += diff;
#if defined CFG_PERF_FUNC
/*Perf_Func
* If switching task during execution of perf_function */
uint8 PerfFuncIdx;
PerfFuncIdx = Perf_TaskTimers[task].activeFunc;
if ( PerfFuncIdx < MAX_FUNCTION_CNT){
TickType diff;
/* */
diff = (Timer_GetTicks() - Perf_FunctionTimers[PerfFuncIdx].timeStart);
Perf_FunctionTimers[PerfFuncIdx].timeActive += diff; // Time since start in ticks
}
#endif
}
#if defined CFG_PERF_FUNC
/* Logic: measurement of active time in function measurements
* start timer when pre_func_hook called. reset timeActive (timeActive = active time between pre_func and post func)
* when task is preemted by another task, in posttaskhook check if there is any function measurement active.
* If function measurement is active when task is switched, then add time diff to timeActive (this is active time).
* when this task is switched back to, check if there was any active function when this was switched from.
* If there there was function active then, start time measurement for that function.
* Note: No nested function hook calls allowed.
* **/
/*
* Optional API, add a name to the Perf_InfoType for usability.
* @param PerfFuncIdx
* @param PerfNamePtr
* @param PerfNameLen
*/
void Perf_InstallFunctionName(uint8 PerfFuncIdx, char *PerfNamePtr, uint8 PerfNameLen) {
if((PerfNameLen < MAX_NAME_CHAR_LEN) &&
(PerfFuncIdx < MAX_FUNCTION_CNT))
{
for (uint8 i = 0; i < PerfNameLen; i++) {
Perf_FunctionTimers[PerfFuncIdx].name[i] = PerfNamePtr[i];
}
/*Init default min value*/
Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.min = MAX_VAL_INIT;
Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.min = MAX_VAL_INIT;
Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.min = MAX_VAL_INIT;
PERF_FUNCTION_CNT++;
}
}
/*
* Call before the functions for measurement is called.
* @param PerfFuncIdx
*/
void Perf_PreFunctionHook(uint8 PerfFuncIdx) {
TaskType task;
TickType diff;
GetTaskID(&task);
if (PerfFuncIdx < MAX_FUNCTION_CNT) {
Perf_FunctionTimers[PerfFuncIdx].invokedCnt++;
Perf_FunctionTimers[PerfFuncIdx].invokedcnt_trig++;
Perf_FunctionTimers[PerfFuncIdx].called++;
Perf_FunctionTimers[PerfFuncIdx].timeStart = Timer_GetTicks(); // Called every preFunc and preTask(if active task)
Perf_FunctionTimers[PerfFuncIdx].timeActive = 0; // Reset time spent in function active only!
/*invoked_Period */
Perf_FunctionTimers[PerfFuncIdx].invokeTime = Perf_FunctionTimers[PerfFuncIdx].timeStart; // Called at preFunc in OS_TICK
if (Perf_FunctionTimers[PerfFuncIdx].invokedcnt_trig > 1){ // dont have prev value at 1st cnt
diff= TIMER_TICK2US(Perf_FunctionTimers[PerfFuncIdx].invokeTime - Perf_FunctionTimers[PerfFuncIdx].prev_invokeTime);
Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.total += diff;
Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.min = MIN(diff,Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.min);
Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.max = MAX(diff,Perf_FunctionTimers[PerfFuncIdx].invokePeriod_us.max);
}
Perf_FunctionTimers[PerfFuncIdx].prev_invokeTime = Perf_FunctionTimers[PerfFuncIdx].invokeTime;
/* Active function*/
if (Perf_TaskTimers[task].activeFunc == NO_ACTIVE_FUNCTION){
Perf_TaskTimers[task].activeFunc = PerfFuncIdx; // Set current function as active function
}
else {
/* ERROR!!
* If already an active function -> ignore this active function. We don't support nested function*/
}
}
}
/*
* Call after the function for measurement has been executed.
* @param PerfFuncIdx
* No nested calls for perf_function
*/
void Perf_PostFunctionHook(uint8 PerfFuncIdx) {
TickType diff;
TaskType task;
GetTaskID(&task);
if (PerfFuncIdx < MAX_FUNCTION_CNT) {
/* Time spent during in function when active only. in ticks*/
Perf_FunctionTimers[PerfFuncIdx].timeActive += Timer_GetTicks() - Perf_FunctionTimers[PerfFuncIdx].timeStart;
diff = TIMER_TICK2US(Perf_FunctionTimers[PerfFuncIdx].timeActive);
Perf_FunctionTimers[PerfFuncIdx].timePeriodTotal_us += diff; //Time since Last trigger in uS
Perf_FunctionTimers[PerfFuncIdx].timeTotal_us += diff; //Time since begining in uS
Perf_FunctionTimers[PerfFuncIdx].called--;
/* time spent in function active period only*/
Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.total+= diff;
Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.min = MIN(diff, Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.min);
Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.max = MAX(diff, Perf_FunctionTimers[PerfFuncIdx].activePeriod_us.max);
/* entry_exit_period*/
diff = TIMER_TICK2US(Timer_GetTicks() - Perf_FunctionTimers[PerfFuncIdx].invokeTime);
Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.total+= diff;
Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.min = MIN(diff, Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.min);
Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.max = MAX(diff, Perf_FunctionTimers[PerfFuncIdx].entryExitPeriod_us.max);
Perf_TaskTimers[task].activeFunc = NO_ACTIVE_FUNCTION; // Clear active function from task
}
}
#endif
|
2301_81045437/classic-platform
|
common/perf.c
|
C
|
unknown
| 20,177
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/**
* A very simple ramlog.
*
* Features:
* - Prints to a ram space in section ".ramlog"
* - The size is configurable using CFG_RAMLOG_SIZE (default is 1000)
* - The ramlog section should not be cleared by the linkfile if one wants
* to have a ramlog that survives reset.
* - Session support
*
* Assumes some c-lib support:
* - The clib support should be able to open a file called "ramlog".
* - Printing to that file will print to the ramlog.
*
* HEADER
*
* The ramlog uses a very simple header.
*
* Byte 0 1 2 3
* +----+----+----+----+
* | 01 |CNT | X | |
* +----+----+----+----+
*
* Byte 0 is 01
* Byte 1 is a counter that incremented for each time the ramlog is started.
* Byte 2 is not defined yet.
* Byte 3 is 01
*
* 01 is used since it's control sign and not a printable char.
*
* STRATEGY FOR SESSION
* Cases:
* 1. The ramlog is empty, ie the header is not there at first position
* 2. The header is in first poistion
* - look for the next?
* - Use saved inforation?
*
*
*/
/*lint -w1 Only errors in generic module used during development */
#include <stdio.h>
/*lint -save -e451 */
#include <stdarg.h>
/*lint -restore */
#include "arc_assert.h"
#include "Ramlog.h"
#include "MemMap.h"
#include "device_serial.h"
#ifndef CFG_RAMLOG_SIZE
#define CFG_RAMLOG_SIZE 2000
#endif
#define RAMLOG_MAGIC 1
SECTION_RAMLOG static unsigned char ramlog[CFG_RAMLOG_SIZE];
#if defined(CFG_RAMLOG_SESSION)
SECTION_RAMLOG static unsigned ramlog_curr;
SECTION_RAMLOG static unsigned ramlog_session;
#else
static unsigned ramlog_curr = 0;
#endif
static FILE *rFile;
//#define RAMLOG_FILENO (FILE *)3
/**
* Print a char to the ramlog
* @param c
*/
void ramlog_chr( char c ) {
ramlog[ramlog_curr++] = c;
if( ramlog_curr >= CFG_RAMLOG_SIZE ) {
ramlog_curr = 0;
}
}
void ramlog_fputs(char *str) {
while (*str != 0) {
ramlog_chr(*str++);
}
}
/**
* Print a string to the ramlog
* @param str
*/
void ramlog_puts( char *str ) {
ramlog_fputs(str);
ramlog_chr('\n');
}
/**
* Formatted print for the ramlog.
*
* @param format The format string.
*/
int ramlog_printf( const char *format, ... ) {
// Fast and ugly ramlog support.
volatile int rv;
va_list args;
va_start(args,format);
ASSERT( rFile != NULL );
rv = vfprintf(rFile, format, args);
va_end(args);
return rv;
}
/**
* Initialize the ramlog. Must be called before any other ramlog functions.
*/
void ramlog_init( void )
{
rFile = (FILE*)fopen("ramlog","r");
#if defined(CFG_RAMLOG_SESSION)
char buf[32];
/* Check for existing session */
if( (ramlog[0] != RAMLOG_MAGIC) || (ramlog[3] != RAMLOG_MAGIC) ) {
ramlog_curr = 0;
ramlog_session = 0;
} else {
/* Search the ramlog */
}
ramlog_session++;
simple_sprintf(buf, "Session (%d)\n", ramlog_session);
ramlog_puts(buf);
#else
(void)ramlog[0]; /* To avoid lint warning */
ramlog_curr = 0;
#endif
}
static int Ramlog_Write( uint8_t *data, size_t nbytes)
{
for (unsigned int i = 0; i < nbytes; i++) {
ramlog_chr(*data++);
}
return nbytes;
}
static int Ramlog_Open( const char *path, int oflag, int mode ) {
(void)path; //lint !e920 MISRA False positive. Allowed to cast pointer to void here.
(void)oflag;
(void)mode;
return 0;
}
DeviceSerialType Ramlog_Device = {
.device.type = DEVICE_TYPE_CONSOLE,
.device.name = "/dev/ramlog",
.name = "ramlog",
.read = NULL,
.write = Ramlog_Write,
.open = Ramlog_Open,
};
|
2301_81045437/classic-platform
|
common/ramlog.c
|
C
|
unknown
| 4,573
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
* DESCRIPTION
* Provides functions to register and run shell commands.
*
* - Will run a cmd on either CR or LF.
* - History buffer
* - TAB completion.
* - Backspace support.
* - Supports blocking or non-blocking driver.
* - Define configured:
* SHELL_CMD_NO_ML - Define if you don't want a mainloop
* SHELL_CMDLINE_MAX - Maximum characters input for a command
* SHELL_HIST_CNT - Maximum history
* SHELL_PROMPT - The prompt
*/
/* ----------------------------[Includes]------------------------------------*/
#include <ctype.h>
#include <stdlib.h>
#include <sys/queue.h>
#include <string.h>
#include "arc_assert.h"
#include <stdio.h>
#include "shell.h"
/* ----------------------------[Private define]------------------------------*/
/* The maximum number of arguments when calling a shell function */
#define MAX_ARGS 10
#ifndef SHELL_CMDLINE_MAX
#define SHELL_CMDLINE_MAX 40
#endif
/* Number cmds in history */
#ifndef SHELL_HIST_CNT
#define SHELL_HIST_CNT 10
#endif
#ifndef SHELL_PROMPT
#define SHELL_PROMPT "[Arccore]"
#endif
/* Escape sequence */
#define ESC_H "\x1b\x5b"
/* ----------------------------[Private macro]-------------------------------*/
static inline int dec(int value, int max) {
int rv;
if( value == 0 ) {
rv = (max - 1);
} else {
rv = value - 1;
}
return rv;
}
static inline int inc(int value, int max) {
return ((value+1) % max);
}
/* ----------------------------[Private typedef]-----------------------------*/
struct shellWord {
int initialized;
TAILQ_HEAD(,ShellCmd) cmdHead;
};
typedef struct Hist {
int idx;
int viewIdx;
int num;
char buff[SHELL_HIST_CNT][SHELL_CMDLINE_MAX];
} HistType;
/* ----------------------------[Private function prototypes]-----------------*/
static int shellHelp(int argc, char *argv[] );
static int shellHistory(int argc, char *argv[] );
extern char *strtok_r(char *s1, const char *s2, char **s3);
static void doPrompt( char * );
/* ----------------------------[Private variables]---------------------------*/
struct shellWord shellWorld;
static ShellCmdT helpInfo = {
shellHelp,
0,1,
"help",
"help <cmd>",
"Show all commands all help no a specific command\n",
{NULL,NULL}
};
static ShellCmdT historyInfo = {
shellHistory,
0,1,
"history",
"history",
"Show command history\n",
{NULL,NULL}
};
static char cmdBuf[40];
HistType hist;
/* ----------------------------[Private functions]---------------------------*/
/**
* Split and string into tokens and strip the token from whitespace.
*
* @param s1 See strtok_r documentation
* @param s2 See strtok_r documentation
* @param s3 See strtok_r documentation
* @return
*/
static char *strtokAndTrim(char *s1, const char *s2, char **s3)
{
#if defined (WIN32)
char *str = strtok_s(s1, s2, s3);
#else
char *str = strtok_r(s1, s2, s3);
#endif
return str;
//return trim(str);
}
/**
* Implements the help command. Either type just "help" to list all available
* command that is registered or "help <cmd>" to get detailed help on a specific
* command.
*
* @param argc
* @param argv
* @return
*/
static int shellHelp(int argc, char *argv[] ) {
char *cmd = NULL;
ShellCmdT *iCmd;
if(argc == 1 ) {
/* display "help" */
printf("List of commands:\n");
TAILQ_FOREACH(iCmd,&shellWorld.cmdHead,cmdEntry ) {
printf("%-15s - %s\n",iCmd->cmd, iCmd->shortDesc);
}
} else {
cmd = argv[1];
/* display "help <cmd>" */
TAILQ_FOREACH(iCmd,&shellWorld.cmdHead,cmdEntry ) {
if( strcmp(cmd,iCmd->cmd) == 0 ) {
printf("%s\n",iCmd->longDesc);
}
}
}
return 0;
}
static int shellHistory(int argc, char *argv[] ) {
if(argc == 1 ) {
/* display "history" */
printf("\nHistory:\n");
if (hist.num == SHELL_HIST_CNT ) {
int j = hist.idx;
for(int i=0;i<SHELL_HIST_CNT;i++) {
printf("%3d %s\n", i, &hist.buff[j][0]);
j = inc(j,SHELL_HIST_CNT);
}
} else {
for(int i=0;i<hist.num;i++) {
printf("%3d %s\n", i, &hist.buff[i][0]);
}
}
}
return 0;
}
/* ----------------------------[Public functions]----------------------------*/
/**
*
* @return
*/
int SHELL_Init( void ) {
shellWorld.initialized = 1;
TAILQ_INIT(&shellWorld.cmdHead);
SHELL_AddCmd(&helpInfo);
SHELL_AddCmd(&historyInfo);
puts("\nArcCore Shell version: " SHELL_VERSION_STR "\n");
doPrompt("");
return 0;
}
/**
* Add a command to list of commands
* @param shellCmd
* @return
*/
int SHELL_AddCmd(ShellCmdT *shellCmd) {
if(shellWorld.initialized != 1 ) {
SHELL_Init();
}
TAILQ_INSERT_TAIL(&shellWorld.cmdHead, shellCmd, cmdEntry );
return 0;
}
/**
* Run a command from current context
*
* @param cmdArgs The command string
* @param cmdRv The return value from the command run
* @return
*/
int SHELL_RunCmd(const char *cmdArgs, int *cmdRv ) {
char *delim = " \t\n";
char *token_r;
ShellCmdT *iCmd;
size_t len;
char *cmdStr;
ShellCmdT *runCmd = NULL;
int argc = 0;
char *argv[MAX_ARGS];
char *arg;
*cmdRv = 1;
if (cmdArgs == NULL) {
return SHELL_E_CMD_IS_NULL;
}
len = strlen(cmdArgs) + 1; /* Add termination */
if (sizeof(cmdBuf) < len) {
return SHELL_E_CMD_TOO_LONG;
}
/* Copy to a buffer we can mess with so that strtok have
* something to work on */
memcpy(cmdBuf, cmdArgs, len);
cmdStr = strtokAndTrim(cmdBuf, delim, &token_r);
if (cmdStr == NULL) {
return SHELL_E_CMD_IS_NULL;
}
/* Search for the command */
TAILQ_FOREACH(iCmd,&shellWorld.cmdHead,cmdEntry ) {
if( strcmp(cmdStr,iCmd->cmd) == 0 ) {
runCmd = iCmd;
break;
}
}
/* Check arg count and deliver them into argc and argv */
if (runCmd != NULL) {
/* Add the cmd */
argv[0] = cmdStr;
argc++;
while( (arg = strtokAndTrim(NULL, delim, &token_r)) != NULL ) {
ASSERT(argc<MAX_ARGS);
argv[argc++] = arg;
}
*cmdRv = runCmd->func(argc, argv);
} else {
printf("\"%s\" : command not found\n",cmdStr);
return SHELL_E_NO_SUCH_CMD;
}
return SHELL_E_OK;
}
static void doPrompt( char *s ) {
printf( SHELL_PROMPT " $ %s",s);
}
static int getInput( void ) {
char c;
static char cmdLine[SHELL_CMDLINE_MAX];
static int lineIndex = 0;
static int cmdRv;
static int escState = 0;
c = fgetc(stdin);
// printf("Got 0x%x %d\n",c,c);
if( lineIndex >= SHELL_CMDLINE_MAX ) {
lineIndex = 0;
}
// printf("%d",lineIndex);
if( escState != 0) {
if( escState == 1 ) {
/* Check for "[" (0x5b) */
if( c == 0x5b ) {
escState = 2;
} else {
/* Ops, something is wrong return out */
escState = 0;
}
} else if( escState == 2 ) {
/* Update prompt with history. Example
* 11
* 22
* 33
* - up key will go up here
* - down key will go down
* */
if( c == 'A' ) {
/* Go back to prompt and erase to the right */
if( lineIndex != 0) {
printf(ESC_H "%dD" ESC_H "K",(lineIndex));
}
if( hist.num != 0 ) {
/* Go up one in history buffer */
hist.viewIdx = dec( hist.viewIdx, SHELL_HIST_CNT);
puts(&hist.buff[hist.viewIdx][0]);
lineIndex = strlen(&hist.buff[hist.viewIdx][0]);
memcpy(cmdLine,&hist.buff[hist.viewIdx][0],lineIndex);
}
} else if( c == 'B' ) {
if( hist.viewIdx != hist.idx) {
/* Go back to prompt and erase to the right */
if( lineIndex != 0) {
printf(ESC_H "%dD" ESC_H "K",(lineIndex));
}
hist.viewIdx = inc( hist.viewIdx, SHELL_HIST_CNT);
puts(&hist.buff[hist.viewIdx][0]);
lineIndex = strlen(&hist.buff[hist.viewIdx][0]);
memcpy(cmdLine,&hist.buff[hist.viewIdx][0],lineIndex);
}
}
escState = 0;
}
return SHELL_E_OK;
}
if( c == '\x1b' ) {
/* Escape sequence
* http://ascii-table.com/ansi-escape-sequences-vt-100.php
* http://ascii-table.com/documents/vt100/chapter3.php#S3.3.3
*/
escState = 1;
} else if( c == '\b') {
/* backspace */
if( lineIndex != 0 ) {
lineIndex--;
puts(ESC_H "D" ESC_H "K");
}
// fputs("\e\x50",stdout);
} else if( c == '\n' || c == '\r' ) {
puts("\n");
cmdLine[lineIndex++] = '\n';
cmdLine[lineIndex] = '\0';
if( lineIndex > 1 ) {
/* Copy to history buffer */
memcpy(&hist.buff[hist.idx][0],cmdLine,lineIndex);
hist.buff[hist.idx][lineIndex-1] = '\0';
hist.idx = inc(hist.idx,SHELL_HIST_CNT);
hist.num++;
hist.num = MIN(hist.num, SHELL_HIST_CNT);
/* Reset history view */
hist.viewIdx = hist.idx;
SHELL_RunCmd(cmdLine,&cmdRv);
}
/* Add prompt again */
lineIndex = 0;
doPrompt("");
} else if( c == '\t' ) {
/* tab completion */
if( lineIndex > 0 ) {
/* Find all commands that match */
ShellCmdT *itCmd; ShellCmdT *sCmd = NULL;
uint16 cnt = 0;
uint16 first = 0;
/* Search for the command */
TAILQ_FOREACH(itCmd,&shellWorld.cmdHead,cmdEntry ) {
if( strncmp(itCmd->cmd,cmdLine,lineIndex) == 0 ) {
if( sCmd == NULL ) {
/* First time, just save, no print */
sCmd = itCmd;
} else {
if (first == 0 ) {
printf("\n %s\n",sCmd->cmd);
first = 1;
}
printf(" %s\n",itCmd->cmd);
}
cnt++;
}
}
if( cnt == 0u ) {
/* We do nothing.. */
} else if( cnt == 1u ) {
/* Only one match, add to cmd line */
puts(&sCmd->cmd[lineIndex]);
lineIndex = strlen(sCmd->cmd);
strcpy(cmdLine, sCmd->cmd);
} else {
cmdLine[lineIndex] = '\0';
doPrompt(cmdLine);
}
}
} else if ( c != 0 ) {
cmdLine[lineIndex++] = c;
fputc(c,stdout);
}
return SHELL_E_OK;
}
int SHELL_Mainloop( void ) {
#if defined(SHELL_CMD_NO_ML)
getInput();
#else
for(;;) {
getInput();
}
#endif
return SHELL_E_OK;
}
|
2301_81045437/classic-platform
|
common/shell.c
|
C
|
unknown
| 12,642
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "sleep.h"
#include "Mcu.h"
#include "Os.h"
struct timeoutlist_t{
uint32_t timeout;
boolean active;
EventMaskType mask;
};
static struct timeoutlist_t timeoutlist[OS_TASK_CNT];
static uint32_t ticks = 0;
void SleepInit()
{
uint32_t i;
for(i=0;i<OS_TASK_CNT;i++)
{
timeoutlist[i].active = FALSE;
}
}
void Sleep(uint32_t nofTicks, TaskType TaskID, EventMaskType Mask )
{
SuspendOSInterrupts();
if(nofTicks == 0){
nofTicks=1;
}
if(TaskID < OS_TASK_CNT){
timeoutlist[TaskID].timeout = ticks + nofTicks;
timeoutlist[TaskID].active = TRUE;
timeoutlist[TaskID].mask = Mask;
}else{
/* Error */
ErrorHook(E_OS_LIMIT);
}
ResumeOSInterrupts();
}
void SleepTask(void)
{
uint32_t i;
for(;;) {
// Alarms every tick
WaitEvent(EVENT_MASK_SLEEP_ALARM_TASK);
ClearEvent(EVENT_MASK_SLEEP_ALARM_TASK);
ticks++;
for(i=0;i<OS_TASK_CNT;i++)
{
if((timeoutlist[i].active == TRUE) && (timeoutlist[i].timeout == ticks))
{
timeoutlist[i].active = FALSE;
SetEvent(i,timeoutlist[i].mask);
}
}
}
}
|
2301_81045437/classic-platform
|
common/sleep.c
|
C
|
unknown
| 2,052
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
/*
* strace.c
*
* Created on: 2009-apr-19
* Author: mahi
*
* System trace...
* Idea to trace
*
* Inspiration:
* http://ltt.polymtl.ca/tracingwiki/index.php/TracingBook
* http://developer.apple.com/tools/performance/optimizingwithsystemtrace.html
* http://benno.id.au/docs/lttng_data_format.pml
*/
/*
* Channel
*
* ISR
* TASK
*
*/
typedef enum {
STRACE_CH_ISR = 1,
STRACE_CH_TASK = (1<<1),
STRACE_CH_KERNEL = (1<<2),
} strace_ch_t;
typedef enum {
STRACE_EV_ISR_START,
STRACE_EV_ISR_STOP,
STRACE_EV_TASK_START,
STRACE_EV_TASK_STOP,
} strace_ev_t;
struct strace_attr_s {
strace_ch_t
/* A timestamp in some unit */
uint32_t timestamp;
};
/**
*
* @param ch channel to record
*/
void strace( strace_ev_t event) {
switch( ch ) {
case STRACE_CH_ISR:
break;
case STRACE_CH_TASK:
break;
}
}
/**
* Channels to use.
*/
void strace_init( strace_ch_t ch ) {
}
void strace_print( void ) {
}
|
2301_81045437/classic-platform
|
common/strace.c
|
C
|
unknown
| 1,821
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Tcf_Cfg.h"
//Service includes
#include "sys_monitor.h"
#include "streams.h"
const char locator_hello[] = "E\0Locator\0Hello\0[\"Locator\",\"SysMonitor\",\"AsciiStreams\",\"FileSystem\"]\0\x03\x01";
const TCF_Service_Info tcfServiceCfgList[] = {
{"Locator", handle_LocatorCommand, handle_LocatorEvent},
{"FileSystem", handle_FileSystemCommand, handle_FileSystemEvent},
{"SysMonitor", handle_SysMonCommand, handle_SysMonEvent},
{"AsciiStreams", handle_StreamsCommand, handle_StreamsEvent},
{"NULL", NULL},
};
|
2301_81045437/classic-platform
|
common/tcf/Tcf_Cfg.c
|
C
|
unknown
| 1,325
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef TCF_CFG_H_
#define TCF_CFG_H_
#include "tcf.h"
typedef struct {
char name[16];
TCF_Service_CommandHandler commandHandler;
TCF_Service_EventHandler eventHandler;
} TCF_Service_Info;
extern const TCF_Service_Info tcfServiceCfgList[];
extern const char locator_hello[];
#endif /* TCF_CFG_H_ */
|
2301_81045437/classic-platform
|
common/tcf/Tcf_Cfg.h
|
C
|
unknown
| 1,082
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Std_Types.h"
#include "streams.h"
#include "tcf.h"
#include <string.h>
#include "os_i.h"
#include "xtoa.h"
#include "cirq_buffer.h"
const char Streams_PID[] = "\"PID\":";
const char Streams_Read[] = "read";
const char Streams_Write[] = "write";
const char Streams_Subscribe[] = "subcribe";
const char Streams_Unsubscribe[] = "unsubscribe";
const char Streams_Connect[] = "connect";
const char Streams_Disconnect[] = "disconnect";
const char Streams_EndofStream[] = "eos";
const char Streams_LostSize[] = "\"lost size\":";
const char Streams_EOS[] = "\"EOS\":";
const char Streams_true[] = "true";
const char Streams_false[] = "false";
typedef struct {
char* id;
char* size;
char* data;
} TCF_Streams_Command;
#define TCF_TTY_SIZE 800
static boolean tty_initialized = FALSE;
static CirqBufferType cirqBuf;
char tty_buffer[TCF_TTY_SIZE] = "";
void init_streams()
{
cirqBuf = CirqBuffStatCreate(tty_buffer, TCF_TTY_SIZE, sizeof(char));
tty_initialized = TRUE;
}
uint8_t TCF_TTY_SendChar (uint8_t ch)
{
int rv = 1;
if(tty_initialized == TRUE){
rv = CirqBuffPush(&cirqBuf,&ch);
}
return rv;
}
uint32_t TCF_TTY_ReadString(char *str, uint16_t max_len)
{
char ch;
int rv;
int len = 0;
if(tty_initialized == TRUE){
do{
rv = CirqBuffPop(&cirqBuf,&ch);
if(rv==0){
len++;
*str++=ch;
if(ch == '\0'){
rv = 1;
}
}
}while((rv == 0) && (len < max_len));
}
return len;
}
uint16_t handle_StreamsEvent(TCF_Event* event, char* buf){
return 0;
}
static Std_ReturnType parse_read(char* msg, TCF_Streams_Command* command, uint16_t len){
char* curr = msg;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->id = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->size = curr;
return E_OK;
}
static Std_ReturnType parse_write(char* msg, TCF_Streams_Command* command, uint16_t len){
char* curr = msg;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->id = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->size = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->data = curr;
return E_OK;
}
static Std_ReturnType parse_id(char* msg, TCF_Streams_Command* command, uint16_t len){
char* curr = msg;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->id = curr;
return E_OK;
}
char tmp_stream[200] = "";
uint16_t handle_StreamsCommand(TCF_Command* command, char* buf) {
TCF_Streams_Command streams_cmd;
/* Start building return message */
start_tcf_field(buf, (char *)TCF_S_R); /* Start */
append_tcf_field(buf, command->token); /* Token */
if (strcmp(command->commandName, Streams_Read) == 0) {
/* C � <token> � Streams � read � <string: stream ID> � <int: size> � */
/* R � <token> � <string: data> � <error report> � <int: lost size> � <boolean: EOS> */
if(parse_read(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add data field */
mystrcat(buf, JSON_Stringify);
int len = TCF_TTY_ReadString(tmp_stream, 199);
if(len >= 200){
return 0;
}
tmp_stream[len] = '\0'; /* Terminate to be sure */
mystrcat(buf, tmp_stream);
mystrcat(buf, JSON_Stringify);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
//mystrcat(buf, Streams_LostSize);
ultoa(0,tmp_stream,10);
mystrcat(buf,tmp_stream);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
//mystrcat(buf, Streams_EOS);
mystrcat(buf, Streams_false);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
} else if (strcmp(command->commandName, Streams_Write) == 0) {
/* C � <token> � Streams � write � <string: stream ID> � <int: size> � <string: data> � */
/* R � <token> � <error report> */
if(parse_write(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
} else if (strcmp(command->commandName, Streams_Subscribe) == 0) {
/* R � <token> � <error report> */
if(parse_id(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
}else if (strcmp(command->commandName, Streams_Unsubscribe) == 0) {
/* R � <token> � <error report> */
if(parse_id(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
}else if (strcmp(command->commandName, Streams_Connect) == 0) {
/* R � <token> � <error report> */
if(parse_id(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
}else if (strcmp(command->commandName, Streams_Disconnect) == 0) {
/* R � <token> � <error report> */
if(parse_id(command->arguments,&streams_cmd,command->args_len) != E_OK){
return 0;
}
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
}
convert_to_tcf_message(buf);
uint16_t len = message_length(buf, TCF_MAX_FIELD_LENGTH);
return len;
}
|
2301_81045437/classic-platform
|
common/tcf/streams.c
|
C
|
unknown
| 6,978
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef STREAMS_H_
#define STREAMS_H_
#include "Std_Types.h"
#include "tcf.h"
uint8_t TCF_TTY_SendChar (uint8_t ch);
void init_streams();
uint16_t handle_StreamsCommand(TCF_Command* command, char* buf);
uint16_t handle_StreamsEvent(TCF_Event* event, char* buf);
#endif /* STREAMS_H_ */
|
2301_81045437/classic-platform
|
common/tcf/streams.h
|
C
|
unknown
| 1,053
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#include "Std_Types.h"
#include "sys_monitor.h"
#include "tcf.h"
#include <string.h>
#include "os_i.h"
#include "xtoa.h"
const char SysMon_PID[] = "\"PID\":";
const char SysMon_Prio[] = "\"Priority\":";
const char SysMon_Stackstart[] = "\"StackStart\":";
const char SysMon_Stackend[] = "\"StackEnd\":";
const char SysMon_Stackcurr[] = "\"StackCurr\":";
const char SysMon_State[] = "\"State\":";
static void AddState(char *buf, state_t state)
{
/* "RSDZTW" where
R is running,
S is sleeping in an interruptible wait,
D is waiting in uninterruptible disk sleep,
Z is zombie,
T is traced or stopped (on a signal), and
W is paging */
switch(state)
{
case ST_READY:
mystrcat(buf,"\"D\"");
break;
case ST_WAIT_EVENT:
mystrcat(buf,"\"S\"");
break;
case ST_SUSPENDED:
mystrcat(buf,"\"T\"");
break;
case ST_RUNNING:
mystrcat(buf,"\"R\"");
break;
case ST_NOT_STARTED:
mystrcat(buf,"\"T\"");
break;
}
}
uint16_t handle_SysMonEvent(TCF_Event* event, char* buf){
return 0;
}
uint16_t handle_SysMonCommand(TCF_Command* command, char* buf) {
OsTaskVarType *iterPcbPtr;
/* Start building return message */
start_tcf_field(buf, (char *)TCF_S_R); /* Start */
append_tcf_field(buf, command->token); /* Token */
if (strcmp(command->commandName, TCF_getChildren) == 0) {
boolean first = TRUE;
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
/* Add data field */
mystrcat(buf, JSON_ListStart);
TAILQ_FOREACH(iterPcbPtr,& Os_Sys.pcb_head,pcb_list) {
if(iterPcbPtr->proc_type < 4)
{
if(first){
first = FALSE;
}else{
mystrcat(buf, JSON_Separator);
}
mystrcat(buf, JSON_Stringify);
mystrcat(buf, iterPcbPtr->name);
mystrcat(buf, JSON_Stringify);
}
}
mystrcat(buf, JSON_ListEnd);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
} else if (strcmp(command->commandName, TCF_getContext) == 0) {
char tmp[20] = "";
/* Add error field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
/* Add data field */
char *arg = command->arguments + 1; /* add 1 for " */
TAILQ_FOREACH(iterPcbPtr,& Os_Sys.pcb_head,pcb_list) {
if(strncmp(arg, iterPcbPtr->name, strlen(command->arguments)-2) == 0)
{
break;
}
}
mystrcat(buf, JSON_ObjStart);
mystrcat(buf, TCF_ID);
mystrcat(buf, command->arguments);
mystrcat(buf, JSON_Separator);
mystrcat(buf, TCF_File);
mystrcat(buf, command->arguments);
mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_PID);
ultoa(iterPcbPtr->pid,tmp,10);
mystrcat(buf, tmp);
mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_Prio);
ultoa(iterPcbPtr->prio,tmp,10);
mystrcat(buf, tmp);
mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_Stackstart);
ultoa((uint32_t)iterPcbPtr->stack.top,tmp,10);
mystrcat(buf, tmp);
/* mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_Stackend);
ultoa((uint32_t)iterPcbPtr->stack.top + iterPcbPtr->stack.size,tmp,10);
mystrcat(buf, tmp);
mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_Stackcurr);
ultoa((uint32_t)iterPcbPtr->stack.curr,tmp,10);
mystrcat(buf, tmp);
*/
mystrcat(buf, JSON_Separator);
mystrcat(buf, SysMon_State);
AddState(buf,iterPcbPtr->state);
mystrcat(buf, JSON_ObjEnd);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
}
convert_to_tcf_message(buf);
uint16_t len = message_length(buf, TCF_MAX_FIELD_LENGTH);
return len;
}
|
2301_81045437/classic-platform
|
common/tcf/sys_monitor.c
|
C
|
unknown
| 4,899
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef SYSMONITOR_H_
#define SYSMONITOR_H_
#include "Std_Types.h"
#include "tcf.h"
uint16_t handle_SysMonCommand(TCF_Command* command, char* buf);
uint16_t handle_SysMonEvent(TCF_Event* event, char* buf);
#endif /* SYSMONITOR_H_ */
|
2301_81045437/classic-platform
|
common/tcf/sys_monitor.h
|
C
|
unknown
| 996
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#define USE_LDEBUG_PRINTF
#include "debug.h"
#include "Std_Types.h"
#include <string.h>
#ifdef USE_LWIP
#include "lwip/tcp.h"
#include "lwip/udp.h"
#include "tcp_handler.h"
#endif
#include "tcf.h"
#include "Tcf_Cfg.h"
#include "xtoa.h"
#include "streams.h"
#define TCF_TCP_PORT 1534
const char TCF_getChildren[] = "getChildren";
const char TCF_getContext[] = "getContext";
const char TCF_ID[] = "\"ID\":";
const char TCF_File[] = "\"File\":";
const char TCF_Service[] = "\"Service\":";
const char TCF_Code[] = "\"Code\":";
const char JSON_ObjStart[] = "{";
const char JSON_ObjEnd[] = "}";
const char JSON_null[] = "null";
const char JSON_Separator[] = ",";
const char JSON_Stringify[] = "\"";
const char JSON_ListStart[] = "[";
const char JSON_ListEnd[] = "]";
struct tcf_tcp_state
{
int num;
};
char *mystrcat(char *s1, const char *s2)
{
char *s;
for(s = s1;*s;++s)
;
while(*s2)
*s++ = *s2++;
*s = '\0';
return s1;
}
uint16_t message_length(const char* msg, uint16_t max_length) {
uint16_t i;
for (i = 0; i < max_length; ++i) {
if (msg[i] == '\x01') {
return i+1;
}
}
return max_length;
}
void start_tcf_field(char* start, char* field) {
strcpy(start, field);
mystrcat(start, TCF_S_EOFIELD_MARKER);
}
void append_tcf_field(char* start, char* field) {
mystrcat(start, field);
mystrcat(start, TCF_S_EOFIELD_MARKER);
}
void convert_to_tcf_message(char* start) {
mystrcat(start, TCF_S_EOM);
size_t length = strlen(start);
int i;
for (i = 0; i < length; ++i) {
if (start[i] == TCF_C_EOFIELD_MARKER) {
start[i] = TCF_C_EOFIELD;
}
}
}
char* get_next_tcf_field(char* chars, uint16_t maxlen) {
int i;
for(i = 0; i < maxlen; i++) {
if (chars[i] == TCF_FIELD_DELIMITER) {
return &chars[i+1];
}
}
return (char*) NULL;
}
char* get_next_tcf_msg(char* chars, uint16_t *len) {
int i;
for(i = 0; i < *len-1; i++) {
if (chars[i] == '\x03' && chars[i+1] == '\x01') {
*len -= (i + 1);
return &chars[i+2];
}
}
*len= 0;
return (char*) NULL;
}
static Std_ReturnType parse_command(char* msg, TCF_Command* command, uint16_t len){
char* curr = msg;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->token = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->serviceName = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->commandName = curr;
curr = get_next_tcf_field(curr, len);
if (curr == NULL) return E_NOT_OK;
command->arguments = curr;
command->args_len = len -((uint32_t)curr - (uint32_t)msg);
return E_OK;
}
Std_ReturnType parse_event(char* msg, TCF_Event* event){
char* curr = msg;
curr = get_next_tcf_field(curr, TCF_MAX_FIELD_LENGTH);
if (curr == NULL) return E_NOT_OK;
event->serviceName = curr;
curr = get_next_tcf_field(curr, TCF_MAX_FIELD_LENGTH);
if (curr == NULL) return E_NOT_OK;
event->eventName = curr;
curr = get_next_tcf_field(curr, TCF_MAX_FIELD_LENGTH);
if (curr == NULL) return E_NOT_OK;
event->eventData = curr;
return E_OK;
}
uint16_t handle_LocatorCommand(TCF_Command* command, char* buf) {
return 0;
}
uint16_t handle_LocatorEvent(TCF_Event* event, char* buf) {
uint16_t len = 0;
if(strcmp(event->eventName, "Hello") == 0)
{
len = message_length(locator_hello, TCF_MAX_FIELD_LENGTH);
memcpy(buf,locator_hello,len);
}else if(strcmp(event->eventName, "peerHeartBeat") == 0){
}
return len;
}
uint16_t handle_FileSystemCommand(TCF_Command* command, char* buf) {
char tmp[20] = "";
/* Start building return message */
start_tcf_field(buf, (char *)TCF_S_R); /* Start */
append_tcf_field(buf, command->token); /* Token */
/* Add error field */
mystrcat(buf, JSON_ObjStart);
mystrcat(buf, TCF_Code);
ultoa(TCF_UNSUPPORTED,tmp,10);
mystrcat(buf, tmp);
mystrcat(buf, JSON_ObjEnd);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
/* Add data field */
mystrcat(buf, JSON_null);
mystrcat(buf, TCF_S_EOFIELD_MARKER);
convert_to_tcf_message(buf);
uint16_t len = message_length(buf, TCF_MAX_FIELD_LENGTH);
return len;
}
uint16_t handle_FileSystemEvent(TCF_Event* event, char* buf) {
return 0;
}
/* Not reentrant so buffers can be static */
char outbuf[TCF_MAX_FIELD_LENGTH] = "";
static void handle_event(char *buf, uint16_t len)
{
char *msg = (char *)buf;
uint8 index;
uint16_t outlen = 0;
TCF_Event event;
if (parse_event(msg, &event) == E_OK) {
/* Find and call the requested agent */
index = 0;
while(tcfServiceCfgList[index].eventHandler != NULL){
if(strcmp(event.serviceName, tcfServiceCfgList[index].name) == 0){
outlen = tcfServiceCfgList[index].eventHandler(&event, outbuf);
break;
}
index++;
}
}
if(outlen > 0){
#ifdef USE_LWIP
TcpSendData(outbuf, outlen);
#endif
}
}
static void handle_command(char *buf, uint16_t len)
{
char *msg = (char *)buf;
uint8 index;
uint16_t outlen = 0;
TCF_Command command;
if (parse_command(msg, &command, len) == E_OK) {
//LDEBUG_PRINTF("C %s\n\r", command.token);
/* Find and call the requested agent */
index = 0;
while(tcfServiceCfgList[index].commandHandler != NULL){
if(strcmp(command.serviceName, tcfServiceCfgList[index].name) == 0){
outlen = tcfServiceCfgList[index].commandHandler(&command, outbuf);
break;
}
index++;
}
if(outlen > 0){
#ifdef USE_LWIP
//LDEBUG_PRINTF("R %s\n\r", command.token);
TcpSendData(outbuf, outlen);
#endif
}else{
LDEBUG_PRINTF("TCF: len=0:%s\n\r", command.token);
}
}else{
LDEBUG_PRINTF("TCF: Parse failed:%s\n\r", command.token);
}
}
static void handle_incoming(const void* buf, uint16_t len) {
char *msg = (char *)buf;
if(len > 0){
do{
if ((msg[0] == 'C') && (msg[1] == '\0')) {
handle_command(msg, len);
} else if ((msg[0] == 'E') && (msg[1] == '\0')) {
handle_event(msg, len);
}else{
len=0;
}
/* Check if more than one message in buffer */
if(len > 0){
msg = get_next_tcf_msg(msg, &len);
}
}while((msg != NULL) && (len > 0));
}
}
void InitTcf(void){
#ifdef USE_LWIP
CreateTcpSocket(TCF_TCP_PORT, handle_incoming);
#endif
init_streams();
}
|
2301_81045437/classic-platform
|
common/tcf/tcf.c
|
C
|
unknown
| 7,872
|
/*-------------------------------- Arctic Core ------------------------------
* Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
* Contact: <contact@arccore.com>
*
* You may ONLY use this file:
* 1)if you have a valid commercial ArcCore license and then in accordance with
* the terms contained in the written license agreement between you and ArcCore,
* or alternatively
* 2)if you follow the terms found in GNU General Public License version 2 as
* published by the Free Software Foundation and appearing in the file
* LICENSE.GPL included in the packaging of this file or here
* <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
*-------------------------------- Arctic Core -----------------------------*/
#ifndef TCF_H_
#define TCF_H_
#include "Std_Types.h"
#define TCF_C_EOFIELD '\x00'
#define TCF_C_EOFIELD_MARKER '\x04'
#define TCF_S_EOFIELD "\x00"
#define TCF_S_EOFIELD_MARKER "\x04"
#define TCF_S_R "R"
#define TCF_S_EOM "\x03\x01"
#define TCF_FIELD_DELIMITER ('\x00')
#define TCF_MAX_FIELD_LENGTH (1400)
extern const char TCF_getChildren[];
extern const char TCF_getContext[];
extern const char TCF_ID[];
extern const char TCF_File[];
extern const char TCF_Service[];
extern const char TCF_Code[];
extern const char JSON_ObjStart[];
extern const char JSON_ObjEnd[];
extern const char JSON_null[];
extern const char JSON_Separator[];
extern const char JSON_Stringify[];
extern const char JSON_ListStart[];
extern const char JSON_ListEnd[];
/* Standard error codes: */
typedef enum{
TCF_OTHER = 1,
TCF_JSON_SYNTAX = 2,
TCF_PROTOCOL = 3,
TCF_BUFFER_OVERFLOW = 4,
TCF_CHANNEL_CLOSED = 5,
TCF_COMMAND_CANCELLED = 6,
TCF_UNKNOWN_PEER = 7,
TCF_BASE64 = 8,
TCF_EOF = 9,
TCF_ALREADY_STOPPED = 10,
TCF_ALREADY_EXITED = 11,
TCF_ALREADY_RUNNING = 12,
TCF_ALREADY_ATTACHED = 13,
TCF_IS_RUNNING = 14,
TCF_INV_DATA_SIZE = 15,
TCF_INV_CONTEXT = 16,
TCF_INV_ADDRESS = 17,
TCF_INV_EXPRESSION = 18,
TCF_INV_FORMAT = 19,
TCF_INV_NUMBER = 20,
TCF_INV_DWARF = 21,
TCF_SYM_NOT_FOUND = 22,
TCF_UNSUPPORTED = 23,
TCF_INV_DATA_TYPE = 24,
TCF_INV_COMMAND = 25,
} TCF_ErrorCode_t;
typedef struct {
char* serviceName;
char* eventName;
char* eventData;
} TCF_Event;
typedef struct {
char* token;
char* serviceName;
char* commandName;
char* arguments;
uint16_t args_len;
} TCF_Command;
typedef struct {
char* token;
char* error;
char* data;
} TCF_Result;
typedef uint16_t (*TCF_Service_CommandHandler)(TCF_Command* command, char* buf);
typedef uint16_t (*TCF_Service_EventHandler)(TCF_Event* command, char* buf);
void InitTcf(void);
uint16_t message_length(const char* msg, uint16_t max_length);
char* get_next_tcf_field(char* chars, uint16_t maxlen);
void start_tcf_field(char* start, char* field);
void append_tcf_field(char* start, char* field);
void convert_to_tcf_message(char* start);
void tcf_compile_result(TCF_Result* result, char* buffer);
/* Locator and Filesystem handlers are in tcf.c file. To be moved */
uint16_t handle_LocatorCommand(TCF_Command* command, char* buf);
uint16_t handle_LocatorEvent(TCF_Event* event, char* buf);
uint16_t handle_FileSystemCommand(TCF_Command* command, char* buf);
uint16_t handle_FileSystemEvent(TCF_Event* event, char* buf);
char *mystrcat(char *s1, const char *s2);
#endif /* TCF_H_ */
|
2301_81045437/classic-platform
|
common/tcf/tcf.h
|
C
|
unknown
| 3,724
|
#TCF
obj-$(USE_TCF) += tcf.o
obj-$(USE_TCF) += Tcf_Cfg.o
obj-$(USE_TCF) += sys_monitor.o
obj-$(USE_TCF) += streams.o
inc-$(USE_TCF) += $(ROOTDIR)/common/tcf
vpath-$(USE_TCF) += $(ROOTDIR)/common/tcf
|
2301_81045437/classic-platform
|
common/tcf/tcf.mod.mk
|
Makefile
|
unknown
| 204
|