repo_id stringlengths 5 115 | size int64 590 5.01M | file_path stringlengths 4 212 | content stringlengths 590 5.01M |
|---|---|---|---|
9front/9front | 1,216 | sys/src/libc/68020/memmove.s | TEXT memmove(SB), $0
move:
MOVL n+8(FP),R0
BEQ return
BGT ok
MOVL 0, R0
ok:
MOVL s1+0(FP),A2
MOVL s2+4(FP),A1
CMPL A2,A1
BHI back
/*
* speed depends on source allignment
* destination allignment is secondary
* byte-at-a-time foreward copy to
* get source (A1) alligned.
*/
f1:
MOVL A1, R1
ANDL $3, R1
... |
9front/9front | 1,209 | sys/src/libc/68020/memcpy.s | TEXT memcpy(SB), $0
MOVL n+8(FP),R0
BEQ return
BGT ok
MOVL 0, R0
ok:
MOVL s1+0(FP),A2
MOVL s2+4(FP),A1
CMPL A2,A1
BHI back
/*
* speed depends on source allignment
* destination allignment is secondary
* byte-at-a-time foreward copy to
* get source (A1) alligned.
*/
f1:
MOVL A1, R1
ANDL $3, R1
BEQ f2... |
9front/9front | 1,476 | sys/src/libc/68000/memmove.s | TEXT memmove(SB), $0
MOVL n+8(FP), R0 /* count */
BEQ return
BGT ok
MOVL 0, R0
ok:
MOVL s1+0(FP), A2 /* dest pointer */
MOVL s2+4(FP), A1 /* source pointer */
CMPL A2,A1
BHI back
/*
* byte-at-a-time foreward copy to
* get source (A1) alligned.
*/
f1:
MOVL A1, R1
ANDL $3, R1
BEQ f2
SUBL $1, R0
BLT re... |
9front/9front | 2,033 | sys/src/libc/68000/muldivrt.s | /*
* calls _divul with
* absolute value arguments
*/
TEXT _divsl(SB), $0
MOVL R0, TOS
MOVL b+4(FP), R0
BPL y1
NEGL R0
MOVL R0, TOS
MOVL a+0(FP), R0
BPL y3
NEGL R0
MOVL R0, TOS
/* neg/neg */
JSR _divul(SB)
MOVL TOS, R0
MOVL R0, a+0(FP)
MOVL TOS, R0
NEGL R0
MOVL R0, b+4(FP)
MOVL TOS, R0
RTS
y1: M... |
9front/9front | 1,475 | sys/src/libc/68000/memcpy.s | TEXT memcpy(SB), $0
MOVL n+8(FP), R0 /* count */
BEQ return
BGT ok
MOVL 0, R0
ok:
MOVL s1+0(FP), A2 /* dest pointer */
MOVL s2+4(FP), A1 /* source pointer */
CMPL A2,A1
BHI back
/*
* byte-at-a-time foreward copy to
* get source (A1) alligned.
*/
f1:
MOVL A1, R1
ANDL $3, R1
BEQ f2
SUBL $1, R0
BLT ret... |
9front/9front | 4,194 | sys/src/libc/arm/memmove.s | TS = 0
TE = 1
FROM = 2
N = 3
TMP = 3 /* N and TMP don't overlap */
TMP1 = 4
TEXT memcpy(SB), $0
B _memmove
TEXT memmove(SB), $0
_memmove:
MOVW R(TS), to+0(FP) /* need to save for return value */
MOVW from+4(FP), R(FROM)
MOVW n+8(FP), R(N)
ADD R(N), R(TS), R(TE) /* to end pointer */
CMP R(FROM), R(TS)
BLS... |
9front/9front | 1,639 | sys/src/libc/arm/div.s | Q = 0
N = 1
D = 2
CC = 3
TMP = 11
TEXT save<>(SB), 1, $0
MOVW R(Q), 0(FP)
MOVW R(N), 4(FP)
MOVW R(D), 8(FP)
MOVW R(CC), 12(FP)
MOVW R(TMP), R(Q) /* numerator */
MOVW 20(FP), R(D) /* denominator */
CMP $0, R(D)
BNE s1
MOVW -1(R(D)), R(TMP) /* divide by zero fault */
s1: RET
TEXT rest<>(SB), 1, $0
MOVW 0(F... |
a2fpga/a2fpga_core | 2,549 | boards/a2n20v2-Enhanced/src/cardrom/cardrom.s | ; ******************************************************************************
; A2FPGA - STARTROM.S
;
; /INH ROM for A2FPGA startup
;
; This ROM code is used to initialize the A2FPGA board. It is mapped into
; the 6502 address space at $F800-$FFFF. The code is executed by the 6502
; at startup time by the A2FPGA b... |
9front/9front | 1,147 | sys/src/libc/arm64/atomic.s | #define ISH (2<<2|3)
/* get variants */
TEXT agetl+0(SB),1,$0
LDARW (R0), R0
DMB $ISH
RETURN
TEXT agetp+0(SB),1,$0
LDAR (R0), R0
DMB $ISH
RETURN
/* set variants */
TEXT aswapl+0(SB),1,$0
MOV 0x08(FP), R1
MOV R0, R2
_setl:
LDXRW (R2), R0
STXRW R1, (R2), R3
CBNZW R3, _setl
DMB $ISH
RETURN
TEXT aswapp+0(S... |
a2fpga/a2fpga_core | 5,373 | boards/a2n20v2-Enhanced/src/firmware/firmware.S | .section .init
.global main
#define STACKADDR 0x04800000 // Program stack at end of 8MB SDRAM
#define IRQSTACK 14336 // IRQ stack at end of 14KB SRAM
/* begin: custom PicoRV32 opcodes */
#define regnum_q0 0
#define regnum_q1 1
#define regnum_q2 2
#define regnum_q3 3
#define regnum_x0 0
#define regnum_x1 ... |
9front/9front | 1,214 | sys/src/libc/amd64/atom.s | TEXT ainc(SB), 1, $0 /* int ainc(int *); */
ainclp:
MOVL (RARG), AX /* exp */
MOVL AX, BX
INCL BX /* new */
LOCK; CMPXCHGL BX, (RARG)
JNZ ainclp
MOVL BX, AX
RET
TEXT adec(SB), 1, $0 /* int adec(int*); */
adeclp:
MOVL (RARG), AX
MOVL AX, BX
DECL BX
LOCK; CMPXCHGL BX, (RARG)
JNZ adeclp
MOVL BX, AX
RET
/*... |
9front/9front | 1,089 | sys/src/libc/amd64/memmove.s | TEXT memmove(SB), $0
MOVQ RARG, DI
MOVQ DI, AX /* return value */
MOVQ p2+8(FP), SI
MOVQ n+16(FP), BX
CMPQ BX, $0
JGT _ok
JEQ _return /* nothing to do if n == 0 */
MOVL $0, SI /* fault if n < 0 */
/*
* check and set for backwards:
* (p2 < p1) && ((p2+n) > p1)
*/
_ok:
CMPQ SI, DI
JGT _forward
JEQ _r... |
9front/9front | 1,088 | sys/src/libc/amd64/memcpy.s | TEXT memcpy(SB), $0
MOVQ RARG, DI
MOVQ DI, AX /* return value */
MOVQ p2+8(FP), SI
MOVQ n+16(FP), BX
CMPQ BX, $0
JGT _ok
JEQ _return /* nothing to do if n == 0 */
MOVL $0, SI /* fault if n < 0 */
/*
* check and set for backwards:
* (p2 < p1) && ((p2+n) > p1)
*/
_ok:
CMPQ SI, DI
JGT _forward
JEQ _re... |
9front/9front | 1,734 | sys/src/libc/spim/memcmp.s | TEXT memcmp(SB), $0
MOVW R1, 0(FP)
/*
* performance:
* alligned about 1.0us/call and 17.4mb/sec
* unalligned is about 3.1mb/sec
*/
MOVW n+8(FP), R3 /* R3 is count */
MOVW s1+0(FP), R4 /* R4 is pointer1 */
MOVW s2+4(FP), R5 /* R5 is pointer2 */
ADDU R3,R4, R6 /* R6 is end pointer1 */
/* TODO(mischief): ... |
9front/9front | 1,159 | sys/src/libc/power64/atomic.s | /* get variants */
TEXT agetl+0(SB),1,$0
SYNC
LWAR (RARG), RARG
CMPW RARG, RARG
BNE -1(PC)
ISYNC
RETURN
TEXT agetp+0(SB),1,$0
SYNC
LDAR (RARG), RARG
CMP RARG, RARG
BNE -1(PC)
ISYNC
RETURN
/* set variants */
TEXT aswapl+0(SB),1,$0
MOVD RARG, R4
MOVW val+8(FP), R5
SYNC
_aswapl:
LWAR (R4), RARG
STWCCC R... |
9front/9front | 1,270 | sys/src/libc/mips/memset.s | TEXT memset(SB),$12
MOVW R1, 0(FP)
/*
* performance:
* about 1us/call and 28mb/sec
*/
MOVW n+8(FP), R3 /* R3 is count */
MOVW p+0(FP), R4 /* R4 is pointer */
MOVW c+4(FP), R5 /* R5 is char */
ADDU R3,R4, R6 /* R6 is end pointer */
/*
* if not at least 4 chars,
* dont even mess around.
* 3 chars to gua... |
9front/9front | 3,481 | sys/src/libc/mips/memmove.s | TEXT memmove(SB), $0
JMP move
TEXT memcpy(SB), $0
move:
MOVW R1, s1+0(FP)
MOVW n+8(FP), R3 /* R3 is count */
MOVW R1, R4 /* R4 is to-pointer */
SGT R0, R3, R5
BEQ R5, ok
MOVW (R0), R0 /* abort if negative count */
ok:
MOVW s2+4(FP), R5 /* R5 is from-pointer */
ADDU R3,R5, R7 /* R7 is end from-pointe... |
9front/9front | 1,682 | sys/src/libc/mips/memcmp.s | TEXT memcmp(SB), $0
MOVW R1, 0(FP)
/*
* performance:
* alligned about 1.0us/call and 17.4mb/sec
* unalligned is about 3.1mb/sec
*/
MOVW n+8(FP), R3 /* R3 is count */
MOVW s1+0(FP), R4 /* R4 is pointer1 */
MOVW s2+4(FP), R5 /* R5 is pointer2 */
ADDU R3,R4, R6 /* R6 is end pointer1 */
/*
* if not at leas... |
9front/9front | 1,202 | sys/src/libc/mips/strcpy.s | TEXT strcpy(SB), $0
MOVW s2+4(FP),R2 /* R2 is from pointer */
MOVW R1, R3 /* R3 is to pointer */
/*
* align 'from' pointer
*/
l1:
AND $3, R2, R5
ADDU $1, R2
BEQ R5, l2
MOVB -1(R2), R5
ADDU $1, R3
MOVB R5, -1(R3)
BNE R5, l1
RET
/*
* test if 'to' is also alligned
*/
l2:
AND $3,R3, R5
BEQ R5, l4
/*
... |
9front/9front | 4,949 | sys/src/boot/zynq/ddr.s | #define OUTPUT_EN (3<<9)
#define DCI_EN (7<<4)
#define INP_VREF (1<<1)
#define INP_DIFF (2<<1)
TEXT ddriob(SB), $-4
WORD $(OUTPUT_EN) // DDRIOB_ADDR0
WORD $(OUTPUT_EN) // DDRIOB_ADDR1
WORD $(OUTPUT_EN | DCI_EN | INP_VREF) // DDRIOB_DATA0
WORD $(OUTPUT_EN | DCI_EN | INP_VREF) // DDRIOB_DATA1
WORD $(OUTPUT_EN | DCI... |
9front/9front | 6,004 | sys/src/boot/zynq/fsbl.s | #include "mem.h"
#define Rb R10
#define SET(R, V) MOVW $(V), R0 ; MOVW R0, (R)(Rb)
#define RMW(r, m, v) MOVW (r)(Rb), R0; BIC $(m), R0; ORR $(v), R0; MOVW R0, (r)(Rb)
TEXT _start(SB), $-4
WORD $0xea000006
MOVW $abort(SB), R15
MOVW $abort(SB), R15
MOVW $abort(SB), R15
MOVW $abort(SB), R15
MOVW $abort(SB), R15
M... |
9front/9front | 2,032 | sys/src/boot/efi/x64.s | MODE $64
TEXT start(SB), 1, $-4
/* spill arguments */
MOVQ CX, 8(SP)
MOVQ DX, 16(SP)
CALL reloc(SP)
TEXT reloc(SB), 1, $-4
MOVQ 0(SP), SI
SUBQ $reloc-IMAGEBASE(SB), SI
MOVQ $IMAGEBASE, DI
MOVQ $edata-IMAGEBASE(SB), CX
CLD
REP; MOVSB
MOVQ 16(SP), BP
MOVQ $efimain(SB), DI
MOVQ DI, (SP)
RET
TEXT eficall... |
9front/9front | 1,647 | sys/src/boot/efi/aa64.s | #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5))
#define SCTLR_EL1 SYSREG(3,0,1,0,0)
#define NSH (1<<2 | 3)
#define NSHST (1<<2 | 2)
#define SY (3<<2 | 3)
TEXT start(SB), 1, $-4
_base:
MOV R0, R3
MOV R1, R4
MOV $setSB(SB), R0
BL rebase(SB)
MOV R0, R28
MOV $argsbuf<>(SB)... |
9front/9front | 10,805 | sys/src/boot/bitsy/l.s | #include "mem.h"
/*
* Entered here from Compaq's bootldr with MMU disabled.
*/
TEXT _start(SB), $-4
MOVW $setR12(SB), R12 /* load the SB */
_main:
/* SVC mode, interrupts disabled */
MOVW $(PsrDirq|PsrDfiq|PsrMsvc), R1
MOVW R1, CPSR
/* disable the MMU */
MOVW $0x130, R1
MCR CpMMU, 0, R1, C(CpControl), C... |
9front/9front | 2,185 | sys/src/boot/bitsy/il.s | #include "mem.h"
/*
* Entered here from Compaq's bootldr. First relocate to
* the location we're linked for and then copy back the
* decompressed kernel.
*
* All
*/
TEXT _start(SB), $-4
MOVW $setR12(SB), R12 /* load the SB */
MOVW $1, R0 /* dance to make 5l think that the magic */
MOVW $1, R1 /* numbe... |
9front/9front | 4,671 | sys/src/boot/pc/l.s | #include "x16.h"
#include "mem.h"
#undef ORB
#define DATA32SEL SELECTOR(1, SELGDT, 0)
#define EXEC32SEL SELECTOR(2, SELGDT, 0)
#define DATA16SEL SELECTOR(3, SELGDT, 0)
#define EXEC16SEL SELECTOR(4, SELGDT, 0)
#define SEGSS BYTE $0x36
#define SEGES BYTE $0x26
#define FARRET BYTE $0xCB
TEXT origin(SB), $0
CLI
CLR(r... |
9front/9front | 6,234 | sys/src/boot/pc/mbr.s | /*
* Hard disc boot block. Loaded at 0x7C00, relocates to 0x0600:
* 8a mbr.s; 8l -o mbr -l -H3 -T0x0600 mbr.8
*/
#include "x16.h"
#include "mem.h"
/*#define FLOPPY 1 /* test on a floppy */
#define TRACE(C) PUSHA;\
CLR(rBX);\
MOVB $C, AL;\
LBI(0x0E, rAH);\
BIOSCALL(0x10);\
POPA
/*
* We keep data on... |
9front/9front | 5,272 | sys/src/boot/pc/pbs.s | #include "x16.h"
#include "mem.h"
#define RELOC 0x7c00
TEXT _magic(SB), $0
BYTE $0xEB; BYTE $0x58; /* jmp .+ 0x58 (_start0x5A) */
BYTE $0x90 /* nop */
TEXT _version(SB), $0
BYTE $0x00; BYTE $0x00; BYTE $0x00; BYTE $0x00;
BYTE $0x00; BYTE $0x00; BYTE $0x00; BYTE $0x00
TEXT _sectsize(SB), $0
BYTE $0x00; BYTE $... |
9front/9front | 1,092 | sys/src/boot/pc/a20.s | #include "x16.h"
#undef ORB
TEXT a20test(SB), $0
LONG $1234567
TEXT a20check(SB), $0
MOVL $10000, CX
_loop:
LEAL a20test(SB), AX
MOVL (AX), BX
ADDL $12345, BX
MOVL BX, (AX)
ORL $(1<<20), AX
MOVL (AX), AX
CMPL AX, BX
JNZ _done
LOOP _loop
RET
_done:
/* return directly to caller of a20() */
ADDL $4, SP
X... |
9front/9front | 5,369 | sys/src/libsec/386/md5block.s | /*
* rfc1321 requires that I include this. The code is new. The constants
* all come from the rfc (hence the copyright). We trade a table for the
* macros in rfc. The total size is a lot less. -- presotto
*
* Copyright (C) 1991-2, RSA Data Security, Inc. Created 1991. All
* rights reserved.
*
* License t... |
9front/9front | 3,682 | sys/src/libsec/386/sha1block.s | TEXT _sha1block+0(SB),$352
/* x = (wp[off-f] ^ wp[off-8] ^ wp[off-14] ^ wp[off-16]) <<< 1;
* wp[off] = x;
* x += A <<< 5;
* E += 0xca62c1d6 + x;
* x = FN(B,C,D);
* E += x;
* B >>> 2
*/
#define BSWAPDI BYTE $0x0f; BYTE $0xcf;
#define BODY(off,FN,V,A,B,C,D,E)\
MOVL (off-64)(BP),DI;\
XORL (off-56)(BP),DI;\
XO... |
9front/9front | 5,261 | sys/src/libsec/amd64/md5block.s | /*
* rfc1321 requires that I include this. The code is new. The constants
* all come from the rfc (hence the copyright). We trade a table for the
* macros in rfc. The total size is a lot less. -- presotto
*
* Copyright (C) 1991-2, RSA Data Security, Inc. Created 1991. All
* rights reserved.
*
* License t... |
9front/9front | 3,695 | sys/src/libsec/amd64/sha1block.s | /* x = (wp[off-f] ^ wp[off-8] ^ wp[off-14] ^ wp[off-16]) <<< 1;
* wp[off] = x;
* x += A <<< 5;
* E += 0xca62c1d6 + x;
* x = FN(B,C,D);
* E += x;
* B >>> 2
*/
#define BSWAPDI BYTE $0x0f; BYTE $0xcf;
#define BODY(off,FN,V,A,B,C,D,E)\
MOVL (off-64)(BP),DI;\
XORL (off-56)(BP),DI;\
XORL (off-32)(BP),DI;\
XORL (o... |
9front/9front | 1,285 | sys/src/libsec/amd64/chachablock.s | #define ROTATE(n, v1, v2) \
MOVO v1, v2; \
PSLLL $(n), v1; \
PSRLL $(32-n), v2; \
POR v1, v2
TEXT _chachablock(SB), 0, $0
MOVOU 0(RARG), X0
MOVOU 16(RARG), X1
MOVOU 32(RARG), X2
MOVOU 48(RARG), X3
MOVL rounds+8(FP), CX
SHRL $1, CX
_loop:
PADDL X1, X0
PXOR X0, X3
/* ROTATE(16, X3, X3) */
PSHUFLW $(1<<0... |
9front/9front | 7,022 | sys/src/libsec/amd64/aesni.s | #define AESOP(o,r1,r2) \
BYTE $0x66; \
BYTE $0x0F; \
BYTE $0x38; \
BYTE $(o); \
BYTE $(0xC0 | r2<<3 | r1)
#define AESIMC(r1,r2) AESOP(0xDB,r1,r2)
#define AESENC(r1,r2) AESOP(0xDC,r1,r2)
#define AESENCLAST(r1,r2) AESOP(0xDD,r1,r2)
#define AESDEC(r1,r2) AESOP(0xDE,r1,r2)
#define AESDECLAST(r1,r2) AESOP(0xDF,r1,r... |
9front/9front | 7,204 | sys/src/libsec/mips/md5block.s | /*
* rfc1321 requires that I include this. The code is new. The constants
* all come from the rfc (hence the copyright). We trade a table for the
* macros in rfc. The total size is a lot less. -- presotto
*
* Copyright (C) 1991-2, RSA Data Security, Inc. Created 1991. All
* rights reserved.
*
* License t... |
9front/9front | 4,143 | sys/src/libsec/mips/sha1block.s | TEXT _sha1block+0(SB),$328
/*
* wp[off] = x;
* x += A <<< 5;
* E += 0xca62c1d6 + x;
* x = FN(B,C,D);
* E += x;
* B >>> 2
*/
#define BODYX(off,FN,V,A,B,C,D,E)\
FN(B,C,D)\
ADDU TMP1,E;\
ADDU V,E;\
MOVW TMP2,off(WREG);\
ADDU TMP2,E;\
SLL $5,A,TMP3;\
SRL $27,A,TMP4;\
OR TMP3,TMP4;\
ADDU TMP4,E;\
SLL $30,... |
9front/9front | 1,233 | sys/src/libmp/power/mpvecadd.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
/*
* mpvecadd(mpdigit *a, int alen, mpdigit *b, int blen, mpdigit *sum)
*
* sum[0:alen] = a[0:alen-1] + b[0:blen-1]
*
* prereq: alen >= blen, sum has room for alen+1 digits
*
* R3 == a (first arg passed in R3)
* R4 == alen
* R5 == b
* R6 == blen
* R7 == sum
... |
9front/9front | 1,118 | sys/src/libmp/power/mpvecsub.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
/*
* mpvecsub(mpdigit *a, int alen, mpdigit *b, int blen, mpdigit *diff)
*
* diff[0:alen-1] = a[0:alen-1] - b[0:blen-1]
*
* prereq: alen >= blen, diff has room for alen digits
*
* R3 == a
* R4 == alen
* R5 == b
* R6 == blen
* R7 == diff
* R8 == temporary
*... |
9front/9front | 1,300 | sys/src/libmp/power/mpvecdigmulsub.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
#define BLT BC 0xC,0,
/*
* mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
*
* p -= b*m
*
* each step looks like:
* hi,lo = m*b[i]
* lo += oldhi + carry
* hi += carry
* p[i] += lo
* oldhi = hi
*
* the registers are:
* b = R3
* n = R4
* m = R5
... |
9front/9front | 1,105 | sys/src/libmp/power/mpvecdigmuladd.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
/*
* mpvecdigmuladd(mpdigit *b, int n, mpdigit m, mpdigit *p)
*
* p += b*m
*
* each step looks like:
* hi,lo = m*b[i]
* lo += oldhi + carry
* hi += carry
* p[i] += lo
* oldhi = hi
*
* the registers are:
* b = R3
* n = R4
* m = R5
* p = R6
* i = R7
... |
9front/9front | 1,211 | sys/src/libmp/mips/mpvecadd.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
/*
* mpvecadd(mpdigit *a, int alen, mpdigit *b, int blen, mpdigit *sum)
*
* sum[0:alen] = a[0:alen-1] + b[0:blen-1]
*
* prereq: alen >= blen, sum has room for alen+1 digits
*
* R1 == a (first arg passed in R1)
* R3 == carry
* R4 == alen
* R5 == b
* R6 == blen... |
9front/9front | 1,209 | sys/src/libmp/mips/mpvecsub.s | #define BDNZ BC 16,0,
#define BDNE BC 0,2,
/*
* mpvecadd(mpdigit *a, int alen, mpdigit *b, int blen, mpdigit *sum)
*
* sum[0:alen] = a[0:alen-1] - b[0:blen-1]
*
* prereq: alen >= blen, sum has room for alen+1 digits
*
* R1 == a (first arg passed in R1)
* R3 == carry
* R4 == alen
* R5 == b
* R6 == blen... |
9front/9front | 1,226 | sys/src/libmp/mips/mpvecdigmulsub.s | /*
* mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
*
* p -= b*m
*
* each step looks like:
* hi,lo = m*b[i]
* lo += oldhi + carry
* hi += carry
* p[i] += lo
* oldhi = hi
*
* the registers are:
* b = R1
* n = R4
* m = R5
* p = R6
* i = R7
* hi = R8 - constrained by hardware
* lo... |
9front/9front | 1,098 | sys/src/libmp/mips/mpvecdigmuladd.s | /*
* mpvecdigmuladd(mpdigit *b, int n, mpdigit m, mpdigit *p)
*
* p += b*m
*
* each step looks like:
* hi,lo = m*b[i]
* lo += oldhi + carry
* hi += carry
* p[i] += lo
* oldhi = hi
*
* the registers are:
* b = R1
* n = R4
* m = R5
* p = R6
* i = R7
* hi = R8 - constrained by hardware
* lo... |
a5632645/keil_cracker_music_stm32f103 | 9,725 | Core/Startup/startup_stm32f103c8tx.s | /**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* ... |
a1studmuffin/Cataclysm-DDA-Android | 13,216 | Android/jni/SDL2_image/external/jpeg-9/jidctfst.S | /*
* Copyright (C) 2008 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
a1studmuffin/Cataclysm-DDA-Android | 42,842 | Android/jni/SDL2_image/external/zlib-1.2.8/contrib/inflate86/inffast.S | /*
* inffast.S is a hand tuned assembler version of:
*
* inffast.c -- fast decoding
* Copyright (C) 1995-2003 Mark Adler
* For conditions of distribution and use, see copyright notice in zlib.h
*
* Copyright (C) 2003 Chris Anderson <christop@charm.net>
* Please use the copyright conditions above.
*
* This ver... |
a1studmuffin/Cataclysm-DDA-Android | 10,365 | Android/jni/SDL2_image/external/zlib-1.2.8/contrib/asm686/match.S | /* match.S -- x86 assembly version of the zlib longest_match() function.
* Optimized for the Intel 686 chips (PPro and later).
*
* Copyright (C) 1998, 2007 Brian Raiter <breadbox@muppetlabs.com>
*
* This software is provided 'as-is', without any express or implied
* warranty. In no event will the author be held ... |
a1studmuffin/Cataclysm-DDA-Android | 15,839 | Android/jni/SDL2_image/external/zlib-1.2.8/contrib/gcc_gvmat64/gvmat64.S | /*
;uInt longest_match_x64(
; deflate_state *s,
; IPos cur_match); // current match
; gvmat64.S -- Asm portion of the optimized longest_match for 32 bits x86_64
; (AMD64 on Athlon 64, Opteron, Phenom
; and Intel EM64T on Pentium 4 with EM64T, Pentium D, Core 2 Duo, Core I5/I7)
;... |
a1studmuffin/Cataclysm-DDA-Android | 12,418 | Android/jni/SDL2_image/external/zlib-1.2.8/contrib/amd64/amd64-match.S | /*
* match.S -- optimized version of longest_match()
* based on the similar work by Gilles Vollant, and Brian Raiter, written 1998
*
* This is free software; you can redistribute it and/or modify it
* under the terms of the BSD License. Use by owners of Che Guevarra
* parafernalia is prohibited, where possible, a... |
a1studmuffin/Cataclysm-DDA-Android | 7,724 | Android/jni/SDL2_image/external/libpng-1.6.2/arm/filter_neon.S |
/* filter_neon.S - NEON optimised filter functions
*
* Copyright (c) 2011 Glenn Randers-Pehrson
* Written by Mans Rullgard, 2011.
* Last changed in libpng 1.5.7 [December 15, 2011]
*
* This code is released under the libpng license.
* For conditions of distribution and use, see the disclaimer
* and license in ... |
a1studmuffin/Cataclysm-DDA-Android | 21,579 | Android/jni/SDL2_mixer/external/smpeg2-2.0.0/video/mmxidct_asm.S |
#if defined(i386) && defined(USE_MMX)
/*
* the input data is tranposed and each 16 bit element in the 8x8 matrix
* is left aligned:
* for example in 11...1110000 format
* If the iDCT is of I macroblock then 0.5 needs to be added to the;DC Component
* (element[0][0] of the matrix)
*/
/* extrn re_matrix */
.... |
a1studmuffin/Cataclysm-DDA-Android | 9,649 | Android/jni/SDL2_mixer/external/flac-1.2.1/src/libFLAC/ppc/as/lpc_asm.s | ; libFLAC - Free Lossless Audio Codec library
; Copyright (C) 2004,2005,2006,2007 Josh Coalson
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; - Redistributions of source code must retain the above copyrigh... |
a1studmuffin/Cataclysm-DDA-Android | 9,638 | Android/jni/SDL2_mixer/external/flac-1.2.1/src/libFLAC/ppc/gas/lpc_asm.s | # libFLAC - Free Lossless Audio Codec library
# Copyright (C) 2004,2005,2006,2007 Josh Coalson
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyrigh... |
a3f/bareDOOM | 1,422 | arch/sandbox/board/stickypage.S | /* SPDX-License-Identifier: GPL-2.0 */
.globl stickypage;
stickypage:
/* nvmem */ .org 0x300
.byte 0x01
/* env */ .org 0x400
.byte 0x79, 0xba, 0x8f, 0x79, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
.byte 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x69, 0x9c, 0x7f, 0x00, 0x00,... |
a3f/bareDOOM | 1,824 | arch/openrisc/lib/ashrdi3.S | /*
* (C) Copyright 2012 - Franck JULLIEN <elec4fun@gmail.com>
*
* Extracted from gcc generated assembly.
*
* Extended precision shifts.
*
* R3/R4 (MSW, LSW) has 64 bit value
* R5 has shift count
* result in R11/R12
*
* This program is free software; you can redistribute it and/or
* modify it under the te... |
a3f/bareDOOM | 1,066 | arch/openrisc/lib/setjmp.S | /* SPDX-License-Identifier: GPL-2.0-only */
#include <linux/linkage.h>
/* int setjmp (jmp_buf); */
ENTRY(setjmp)
l.sw 0(r3), r1
l.sw 4(r3), r2
l.sw 8(r3), r9
l.sw 12(r3), r10
l.sw 16(r3), r14
l.sw 20(r3), r16
l.sw 24(r3), r18
l.sw 28(r3), r20
l.sw 32(r3), r22
l.sw 36(r3), r24
l.sw 40(r3), r26
l.sw 44(r3)... |
a3f/bareDOOM | 1,174 | arch/openrisc/lib/lshrdi3.S | /*
* (C) Copyright 2011 - Franck JULLIEN <elec4fun@gmail.com>
*
* Extracted from gcc generated assembly.
*
* Extended precision shifts.
*
* R3/R4 (MSW, LSW) has 64 bit value
* R5 has shift count
* result in R11/R12
*
*/
.globl __lshrdi3
__lshrdi3:
l.sfeqi r5,0x0
l.bf out /* if count = 0, go out ... |
a3f/bareDOOM | 1,173 | arch/openrisc/lib/ashldi3.S | /*
* (C) Copyright 2011 - Franck JULLIEN <elec4fun@gmail.com>
*
* Extracted from gcc generated assembly.
*
* Extended precision shifts.
*
* R3/R4 (MSW, LSW) has 64 bit value
* R5 has shift count
* result in R11/R12
*
*/
.globl __ashldi3
__ashldi3:
l.sfeqi r5,0x0
l.bf out /* if count = 0, go out ... |
a3f/bareDOOM | 1,310 | arch/openrisc/lib/muldi3.S | /*
* (C) Copyright 2011 - Franck JULLIEN <elec4fun@gmail.com>
*
* Extracted from gcc generated assembly.
*
* Multiply two quads. Hereafter, the illustration of what is going on :
*
* | r3 | r4 |
* | r5 | r6 |
* ------... |
a3f/bareDOOM | 1,411 | arch/openrisc/cpu/barebox.lds.S | /*
* barebox - barebox.lds.S
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed i... |
a3f/bareDOOM | 6,638 | arch/openrisc/cpu/start.S | /*
* (C) Copyright 2011, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* (C) Copyright 2011, Julius Baxter <julius@opencores.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation... |
a3f/bareDOOM | 1,499 | arch/riscv/lib/barebox.lds.S | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2016 Antony Pavlov <antonynpavlov@gmail.com>
*
* This file is part of barebox.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PAR... |
a3f/bareDOOM | 2,147 | arch/riscv/lib/memcpy.S | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2013 Regents of the University of California
*/
#include <linux/linkage.h>
#include <asm/asm.h>
/* void *memcpy(void *, const void *, size_t) */
ENTRY(__memcpy)
WEAK(memcpy)
move t6, a0 /* Preserve return value */
/* Defer to byte-oriented copy for ... |
a3f/bareDOOM | 1,343 | arch/riscv/lib/memmove.S | /* SPDX-License-Identifier: GPL-2.0 */
#include <linux/linkage.h>
#include <asm/asm.h>
ENTRY(__memmove)
WEAK(memmove)
move t0, a0
move t1, a1
beq a0, a1, exit_memcpy
beqz a2, exit_memcpy
srli t2, a2, 0x2
slt t3, a0, a1
beqz t3, do_revers... |
a3f/bareDOOM | 1,433 | arch/riscv/lib/pbl.lds.S | /* SPDX-License-Identifier: GPL-2.0-or-later */
/* SPDX-FileCopyrightText: 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix */
#include <linux/sizes.h>
#include <asm-generic/barebox.lds.h>
#include <asm-generic/memory_layout.h>
OUTPUT_ARCH(riscv)
#ifdef CONFIG_64BIT
OUTPUT_FORMAT("elf64-littleriscv")
#else
OUT... |
a3f/bareDOOM | 1,276 | arch/riscv/lib/setupc.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: Copyright (c) 2021 Ahmad Fatoum, Pengutronix */
#include <linux/linkage.h>
#include <asm/sections.h>
#include <asm/asm.h>
/*
* setup_c: clear bss
*/
.section .text.setup_c
ENTRY(setup_c)
lla a0, __bss_start
li a1, 0
lla a2, __bss_stop
sub a2... |
a3f/bareDOOM | 2,363 | arch/riscv/lib/memset.S | /* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2013 Regents of the University of California
*/
#include <linux/linkage.h>
#include <asm/asm.h>
/* void *memset(void *, int, size_t) */
ENTRY(__memset)
WEAK(memset)
move t0, a0 /* Preserve return value */
/* Defer to byte-oriented fill for small si... |
a3f/bareDOOM | 1,314 | arch/arm/mach-omap/auxcr.S | /*
* Copyright (c) 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it ... |
a3f/bareDOOM | 1,541 | arch/arm/mach-ep93xx/lowlevel_init.S | /*
* Low-level initialization for EP93xx
*
* Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
*
* Copyright (C) 2006 Dominic Rath <Dominic.Rath@gmx.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by t... |
a3f/bareDOOM | 8,577 | arch/arm/mach-samsung/lowlevel-s3c24x0.S | /*
* (C) Copyright 2009
* Juergen Beisert <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later versio... |
a3f/bareDOOM | 2,241 | arch/arm/mach-pxa/sleep.S | /*
* Low-level PXA250/210 sleep/wakeUp support
*
* Initial SA1110 code:
* Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
*
* Adapted for PXA by Nicolas Pitre:
* Copyright (c) 2002 Monta Vista Software, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of ... |
a3f/bareDOOM | 13,320 | arch/arm/crypto/sha1-armv4-large.S | #define __ARM_ARCH__ __LINUX_ARM_ARCH__
@ ====================================================================
@ Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
@ project. The module is, however, dual licensed under OpenSSL and
@ CRYPTOGAMS licenses depending on where you obtain it. For further
@ detail... |
a3f/bareDOOM | 2,099 | arch/arm/lib/pbl.lds.S | /* SPDX-License-Identifier: GPL-2.0-or-later */
/* SPDX-FileCopyrightText: 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix */
#include <linux/sizes.h>
#include <asm-generic/barebox.lds.h>
#include <asm-generic/memory_layout.h>
#ifdef CONFIG_PBL_RELOCATABLE
#define BASE 0x0
#else
#define BASE (TEXT_BASE - SZ_2... |
a3f/bareDOOM | 2,463 | arch/arm/cpu/hyp.S | #include <linux/linkage.h>
#include <asm/system.h>
#include <asm/opcodes-virt.h>
#include <init.h>
.arch_extension sec
.arch_extension virt
__BARE_INIT
.data
.align 2
ENTRY(__boot_cpu_mode)
.long 0
.text
ENTRY(__hyp_install)
mrs r12, cpsr
and r12, r12, #MODE_MASK
@ Save the initial CPU state
adr r0, .L__b... |
a3f/bareDOOM | 2,775 | arch/arm/cpu/exceptions_64.S | /*
* (C) Copyright 2013
* David Feng <fenghua@phytium.com.cn>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <asm/ptrace.h>
#include <asm/assembler64.h>
#include <linux/linkage.h>
/*
* Enter Exception.
* This will save the processor state that is ELR/X0~X30
* to the stack frame.
*/
.ma... |
a3f/bareDOOM | 4,145 | arch/arm/cpu/exceptions.S | #include <config.h>
#include <linux/linkage.h>
#include <asm-generic/memory_layout.h>
/*
*************************************************************************
*
* Interrupt handling
*
*************************************************************************
*/
@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72
... |
a3f/bareDOOM | 3,665 | arch/arm/cpu/cache-armv6.S | #include <linux/linkage.h>
#include <init.h>
#define HARVARD_CACHE
#define CACHE_LINE_SIZE 32
#define D_CACHE_LINE_SIZE 32
.section .text.v6_mmu_cache_on
ENTRY(v6_mmu_cache_on)
mov r12, lr
#ifdef CONFIG_MMU
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
... |
a3f/bareDOOM | 3,032 | arch/arm/cpu/cache-armv5.S | #include <linux/linkage.h>
#include <init.h>
#define CACHE_DLINESIZE 32
.section .text.v5_mmu_cache_on
ENTRY(v5_mmu_cache_on)
mov r12, lr
#ifdef CONFIG_MMU
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
mrc p15, 0, r0, c1, c0, 0 @ read control reg
orr... |
a3f/bareDOOM | 2,288 | arch/arm/cpu/lowlevel.S | #include <linux/linkage.h>
#include <init.h>
#include <asm/system.h>
#include <asm/opcodes-virt.h>
.section ".text_bare_init_","ax"
ENTRY(arm_cpu_lowlevel_init)
/* save lr, since it may be banked away with a processor mode change */
mov r2, lr
#ifdef CONFIG_CPU_32v7
/* careful: the hyp install corrupts r0 and r1 *... |
a3f/bareDOOM | 1,471 | arch/arm/cpu/setupc_64.S | #include <linux/linkage.h>
#include <asm/sections.h>
.section .text.setupc
/*
* setup_c: clear bss
*/
ENTRY(setup_c)
mov x15, x30
ldr x0, =__bss_start
mov x1, #0
ldr x2, =__bss_stop
sub x2, x2, x0
bl memset /* clear bss */
mov x30, x15
ret
ENDPROC(setup_c)
/*
* void relocate_to_adr(unsigned long targeta... |
a3f/bareDOOM | 1,207 | arch/arm/cpu/smccc-call.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2015 Linaro Limited */
#include <linux/linkage.h>
#include <asm/unwind.h>
.arch_extension sec
.arch_extension virt
.arm
/*
* Wrap c macros in asm macros to delay expansion until after the
* SMCCC asm macro is expanded.
*/
.macro... |
a3f/bareDOOM | 1,827 | arch/arm/cpu/setupc.S | #include <linux/linkage.h>
#include <asm/sections.h>
.section .text.setupc
/*
* setup_c: copy binary to link address, clear bss and
* continue executing at new address.
*
* This function does not return to the address it is
* called from, but to the same location in the copied
* binary.
*/
ENTRY(setup_c)
push... |
a3f/bareDOOM | 4,170 | arch/arm/cpu/cache-armv8.S | /*
* (C) Copyright 2013
* David Feng <fenghua@phytium.com.cn>
*
* This file is based on sample code from ARMv8 ARM.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/linkage.h>
#include <init.h>
/*
* void v8_flush_dcache_level(level)
*
* clean and invalidate one level cache.
*
*... |
a3f/bareDOOM | 1,151 | arch/arm/cpu/smccc-call_64.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2015 Linaro Limited */
#include <linux/linkage.h>
#include <linux/arm-smccc.h>
#include <asm/asm-offsets.h>
.macro SMCCC instr
.cfi_startproc
\instr #0
ldr x4, [sp]
stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
stp x2, x3, [x4, #ARM_SMCCC_RES_X2_... |
a3f/bareDOOM | 4,084 | arch/arm/cpu/sm_as.S | #include <linux/linkage.h>
#include <asm/ptrace.h>
#include <asm-generic/memory_layout.h>
#include <asm/secure.h>
#include <asm/system.h>
.arch_extension sec
.arch_extension virt
.section ".text","ax"
.arm
.align 5
.globl secure_monitor_init_vectors
secure_monitor_init_vectors:
1: b 1b /* reset */
1: b 1b /* ... |
a3f/bareDOOM | 3,736 | arch/arm/cpu/cache-armv4.S | #include <linux/linkage.h>
#include <init.h>
#define CACHE_DLINESIZE 32
.section .text.v4_mmu_cache_on
ENTRY(v4_mmu_cache_on)
mov r12, lr
#ifdef CONFIG_MMU
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
mrc p15, 0, r0, c1, c0, 0 @ read control reg
orr... |
a3f/bareDOOM | 6,090 | arch/arm/cpu/cache-armv7.S | #include <linux/linkage.h>
#include <init.h>
.section .text.v7_mmu_cache_on
ENTRY(v7_mmu_cache_on)
stmfd sp!, {r11, lr}
mov r12, lr
#ifdef CONFIG_MMU
mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0
mov r0, #0
dsb @ drain write buffer
tst r11, #0xf @ VMSA
mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
#endif... |
a3f/bareDOOM | 1,048 | arch/arm/cpu/board-dt-2nd-aarch64.S | /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <linux/linkage.h>
#include <asm/barebox-arm64.h>
#include <asm/image.h>
#define IMAGE_FLAGS \
(ARM64_IMAGE_FLAG_PAGE_SIZE_4K << ARM64_IMAGE_FLAG_PAGE_SIZE_SHIFT) | \
(ARM64_IMAGE_FLAG_PHYS_BASE << ARM64_IMAGE_FLAG_PHYS_BASE_SHIFT)
.section .text_head_entry_st... |
a3f/bareDOOM | 1,371 | arch/arm/lib64/barebox.lds.S | /* SPDX-License-Identifier: GPL-2.0-or-later */
/* SPDX-FileCopyrightText: 2000-2004 Wolfgang Denk <wd@denx.de>, DENX Software Engineering */
#include <asm-generic/barebox.lds.h>
OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64")
OUTPUT_ARCH(aarch64)
ENTRY(start)
SECTIONS
{
#ifdef CONF... |
a3f/bareDOOM | 4,107 | arch/arm/lib64/copy_template.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2013 ARM Ltd. */
/* SPDX-FileCopyrightText: 2013 Linaro */
/*
* This code is based on glibc cortex strings work originally authored by Linaro
* and re-licensed under GPLv2 for the Linux kernel. The original code can
* be found @
*
* http://baz... |
a3f/bareDOOM | 1,246 | arch/arm/lib64/memcpy.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2013 ARM Ltd. */
/* SPDX-FileCopyrightText: 2013 Linaro */
/*
* This code is based on glibc cortex strings work originally authored by Linaro
* and re-licensed under GPLv2 for the Linux kernel. The original code can
* be found @
*
* http://baz... |
a3f/bareDOOM | 1,044 | arch/arm/lib64/setjmp.S | /* SPDX-License-Identifier: GPL-2.0+ */
/* SPDX-FileCopyrightText: 2017 Theobroma Systems Design und Consulting GmbH */
#include <config.h>
#include <linux/linkage.h>
.pushsection .text.setjmp, "ax"
ENTRY(setjmp)
/* Preserve all callee-saved registers and the SP */
stp x19, x20, [x0,#0]
stp x21, x22, [x0,#16]
s... |
a3f/bareDOOM | 4,464 | arch/arm/lib64/memset.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2013 ARM Ltd. */
/* SPDX-FileCopyrightText: 2013 Linaro */
/*
* This code is based on glibc cortex strings work originally authored by Linaro
* and re-licensed under GPLv2 for the Linux kernel. The original code can
* be found @
*
* http://baz... |
a3f/bareDOOM | 1,873 | arch/arm/lib32/barebox.lds.S | /* SPDX-License-Identifier: GPL-2.0-or-later */
/* SPDX-FileCopyrightText: 2000-2004 Wolfgang Denk <wd@denx.de>, DENX Software Engineering */
#include <asm-generic/barebox.lds.h>
#include <asm/secure.h>
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(start)
SECTIONS
{
#if... |
a3f/bareDOOM | 5,914 | arch/arm/lib32/copy_template.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2005 MontaVista Software, Inc (Nicolas Pitre)
/*
* linux/arch/arm/lib/copy_template.s
*
* Code template for optimized memory copy functions
*/
/*
* Theory of operation
* -------------------
*
* This file provides the core code for a forwar... |
a3f/bareDOOM | 1,221 | arch/arm/lib32/memcpy.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 2005 MontaVista Software, Inc (Nicolas Pitre)
/*
* linux/arch/arm/lib/memcpy.S
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#define LDR1W_SHIFT 0
#define STR1W_SHIFT 0
.macro ldr1w ptr reg abort
W(ldr) \reg, [\ptr], #4
.endm
.... |
a3f/bareDOOM | 1,458 | arch/arm/lib32/ashrdi3.S | /* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
Free Software Foundation, Inc.
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.
In... |
a3f/bareDOOM | 1,564 | arch/arm/lib32/io-writesb.S | /* SPDX-License-Identifier: GPL-2.0-only */
/* SPDX-FileCopyrightText: 1995-2000 Russell King */
/*
* linux/arch/arm/lib/io-writesb.S
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
.macro outword, rd
#ifndef __ARMEB__
strb \rd, [r0]
mov \rd, \rd, lsr #8
strb \rd, [r0]
mov \rd, \rd, lsr #8
strb... |
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