repo_id stringlengths 5 115 | size int64 590 5.01M | file_path stringlengths 4 212 | content stringlengths 590 5.01M |
|---|---|---|---|
AAAAyl0n/Lambda0 | 15,145 | 1.Hardware/Screen/1.28英寸GC9A01圆形TFT资料/代码/STM32/STM32F10x/ASM/startup_stm32f10x_hd.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Devices vector table for MDK-AR... |
AAAAyl0n/Lambda0 | 9,377 | 1.Hardware/Screen/1.28英寸GC9A01圆形TFT资料/代码/STM32/STM32F10x/ASM/stm32f10x_startup.s |
;***************************************************************************************
; Amount of memory (in bytes) allocated for Stack and Heap
; Tailor those values to your application needs
;***************************************************************************************
Stack_Size EQU 0x4... |
AAAAyl0n/Lambda0 | 15,592 | 1.Hardware/Screen/1.28英寸GC9A01圆形TFT资料/代码/STM32/STM32F10x/ASM/startup_stm32f10x_xl.s | ;******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
;* File Name : startup_stm32f10x_xl.s
;* Author : MCD Application Team
;* Version : V3.3.0
;* Date : 04/16/2010
;* Description : STM32F10x XL-Density Devices vector table for RVMDK
;* ... |
AAAAyl0n/Lambda0 | 13,347 | 1.Hardware/Screen/1.28英寸GC9A01圆形TFT资料/代码/STM32/STM32F10x/ASM/startup_stm32f10x_ld_vl.s | ;******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
;* File Name : startup_stm32f10x_ld_vl.s
;* Author : MCD Application Team
;* Version : V3.3.0
;* Date : 04/16/2010
;* Description : STM32F10x Low Density Value Line Devices vector table ... |
AAAAyl0n/Lambda0 | 29,171 | 1.Hardware/Screen/1.28英寸GC9A01圆形TFT资料/代码/STM32/STM32F407/CORE/startup_stm32f40_41xxx.s | ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
;* File Name : startup_stm32f40_41xxx.s
;* Author : MCD Application Team
;* @version : V1.4.0
;* @date : 04-August-2014
;* Description : STM32F40xxx/41xxx devices vector table for MDK-ARM ... |
AAAAyl0n/Lambda0 | 12,472 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_md.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-... |
AAAAyl0n/Lambda0 | 12,079 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_ld.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_ld.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Low Density Devices vector table for MDK-ARM... |
AAAAyl0n/Lambda0 | 13,758 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_md_vl.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md_vl.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Value Line Devices vector ... |
AAAAyl0n/Lambda0 | 15,398 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_cl.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_cl.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Connectivity line devices vector table for M... |
AAAAyl0n/Lambda0 | 15,145 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_hd.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Devices vector table for MDK-AR... |
AAAAyl0n/Lambda0 | 15,597 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_xl.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_xl.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x XL-Density Devices vector table for MDK-ARM ... |
AAAAyl0n/Lambda0 | 13,352 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_ld_vl.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_ld_vl.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Low Density Value Line Devices vector tab... |
AAAAyl0n/Lambda0 | 15,346 | 2.Firmware/stm32-SimpleFOC_keil/startup/startup_stm32f10x_hd_vl.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd_vl.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Value Line Devices vector ta... |
aanon4/HomeKit | 18,726 | src/nrf52/gcc_startup_nrf52.S | /*
Copyright (c) 2015, Nordic Semiconductor ASA
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and th... |
aanon4/HomeKit | 7,661 | src/nrf51/gcc_startup_nrf51.S | /*
Copyright (c) 2015, Nordic Semiconductor ASA
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this
list of conditions and th... |
aanon4/HomeKit | 16,139 | src/homekit/crypto/uNaCl/mul.S | .align 2
.global multiply256x256_asm
.type multiply256x256_asm, %function
multiply256x256_asm:
push {r4-r7,lr}
mov r3, r8
mov r4, r9
mov r5, r10
mov r6, r11
push {r0-r6}
mov r12, r0
mov r10, r2
mov r11, r1
mov r0,r2
ldm r0!, {r4,r5,r6,r7}
ldm r1!, {r2,r3,r6,r7}
push {r0,r1}
/////////BEGIN LOW PART ////... |
aanon4/HomeKit | 11,682 | src/homekit/crypto/uNaCl/sqr.S | .align 2
.global square256_asm
.type square256_asm, %function
square256_asm:
push {r4-r7,lr}
mov r2, r8
mov r3, r9
mov r4, r10
mov r5, r11
push {r0-r5}
mov r12, r0
mov r4, r1
ldm r4!, {r0-r3}
push {r4}
/////////BEGIN LOW PART //////////////////////
///SQR 128, in r0-r3
mov r8, r2
mov r9, r3
eor r... |
aanon4/HomeKit | 3,013 | src/homekit/crypto/uNaCl/cortex_m0_reduce25519.S | // Implementation of a partial reduction modulo 2^255 - 38.
//
// B. Haase, Endress + Hauser Conducta GmbH & Ko. KG
// public domain.
//
// gnu assembler format.
//
// Generated and tested with C++ functions in the test subdirectory and on the target.
//
.cpu cortex-m0
.fpu softvfp
.eabi_attribute 20, 1
.eabi_attr... |
aanon4/HomeKit | 3,392 | src/homekit/crypto/uNaCl/cortex_m0_mpy121666.S | // Implementation of multiplication of an fe25519 bit value with the curve constant 121666.
//
// B. Haase, Endress + Hauser Conducta GmbH & Ko. KG
// public domain.
//
// gnu assembler format.
//
// Generated and tested with C++ functions in the test subdirectory.
//
// ATTENTION:
// Not yet tested on target hardware.... |
aap/b | 14,805 | pdp10_its/ba10.s | RELOCATABLE
.INSRT B;B DEF
%"main":
.+1
OP Y,5
OP Y,23
OP2 S,36
OP2 X,%"getarg"
OP N2
OP2 A,23
OP2 X,%"args"
OP2 C,0
OP N3
OP2 IVA,22
OP2 X,%"sixch"
OP N2
OP2 A,23
OP N3
OP B1
OP2 C,0
OP B4
OP2 F,L1
L2:
OP2 S,36
OP2 X,%"error"
OP N2
OP2 VX,.+3
OP2 T,LL2
-144542315044
-170443300000
LL2:
OP N3
... |
aap/b | 1,121 | pdp10_its/printf.s | RELOCATABLE
.INSRT B;B DEF
%"printf":
.+1
OP2 S,21
OP2 VA,17
OP2 C,0
OP B1
OP2 IVA,14
OP2 VA,3
OP B1
L1:
L2:
OP2 S,21
OP2 VA,16
OP2 X,%"char"
OP N2
OP2 A,2
OP2 VA,17
OP U7
OP N3
OP B1
OP2 C,45
OP B5
OP2 F,L3
OP2 IA,16
OP2 C,0
OP B4
OP2 F,L4
OP N11
L4:
OP2 IX,%"putchar"
OP N2
OP2 A,16
OP N3... |
aap/b | 25,985 | pdp10_its/bc10.s | RELOCATABLE
.INSRT B;B DEF
%"main":
.+1
OP Y,3
OP2 S,16
OP2 X,%"getarg"
OP N2
OP2 A,3
OP2 X,%"args"
OP2 C,0
OP N3
OP2 IVA,2
OP2 X,%"sixch"
OP N2
OP2 A,3
OP N3
OP B1
OP2 C,0
OP B4
OP2 F,L1
L2:
OP2 S,16
OP2 X,%"err"
OP N2
OP2 C,33555
OP2 C,0
OP N3
OP2 IX,%"exit"
OP N2
OP2 C,1
OP N3
L1:
OP2 I... |
aap/b | 1,081 | pdp10_its/blib.s | RELOCATABLE
.INSRT B;B DEF
%"getarg":
.+1
OP2 S,7
OP2 VA,5
OP2 C,0
OP B1
L1:
OP2 IVA,6
OP2 X,%"char"
OP N2
OP2 A,3
OP2 A,4
OP N3
OP B1
OP2 C,40
OP B4
OP2 F,L2
OP2 IVA,4
OP U7
OP2 T,L1
L2:
L3:
OP2 IVA,6
OP2 X,%"char"
OP N2
OP2 A,3
OP2 VA,4
OP U7
OP N3
OP B1
OP2 C,0
OP B5
OP2 A,6
OP2 C,40
... |
aap/b | 6,295 | pdp11/bilib.s | ipc = r3
idp = r4
isp = r5
/ set frame size
.globl s
s: mov idp,isp / get current frame
add (ipc)+,isp / put sp above it
jmp *(ipc)+
/ transfer if false
.globl f
f: mov (ipc)+,r0 / get argument
mov -(isp),(isp)+ / check top of stack
bne 1f
mov r0,ipc / jump to target if == 0
1: jmp *(ipc)+
/ transfer
.globl t
t... |
aap/b | 2,546 | pdp11/libb.s | ipc = r3
idp = r4
isp = r5
.globl exit
exit: sys 1.
read: sys 3.
br sysret
write: sys 4.
br sysret
open: sys 5.
br sysret
close: sys 6.
br sysret
lseek: sys 19.
br sysret
sysret: bcc 1f
mov $-1,r0
1: rts pc
.globl _putchar
.data
_putchar: 1f
.text
1: 1f
1: mov idp,isp
cmp (isp)+,(isp)+
mov (isp)+,ch / g... |
aap/b | 2,205 | riscv64/libb.S | #define idp s0
#define isp s1
#define ipc s2
# to adjust stack, addiu isp,(2+nargs)*8,
# (2+1)*8 if no args but returns value
.globl _putchar
.data
_putchar: .dword 1f
.text
1: .dword 1f
1: addi isp,isp,24
ld t0,16(idp) # chars
la a1,ch
sd t0,(a1)
move a2,zero # num chars
1: beq t0,zero,1f
srli t0,t0,8
addi a2,... |
aap/b | 1,317 | riscv64/brt1.S | #define idp s0
#define isp s1
#define ipc s2
.macro FETCH skip=0
ld t0,\skip(ipc)
addi ipc,ipc,8+\skip
jr t0
.endm
stacksz = 1000
.data
.globl _argv
_argv: .dword 0
.bss
.align 3
stack: .space 8*stacksz
.text
.globl main, fetch
main:
la isp,stack
move idp,isp
la ipc,init
# B argc
sd a0,16(idp)
# argv, hav... |
aap/b | 6,187 | riscv64/bilib.S | #define idp s0
#define isp s1
#define ipc s2
.macro FETCH skip=0
ld t0,\skip(ipc)
addi ipc,ipc,8+\skip
jr t0
.endm
.extern fetch
# set stack
.globl s
s:
ld isp,(ipc)
add isp,isp,idp
FETCH 8
# transfer if false
.globl f
f:
ld t0,-8(isp)
beq t0,zero,t
FETCH 8
# transfer
.globl t
t:
ld ipc,(ipc)
FETCH
# ... |
aap/b | 5,831 | amd64/bilib.s | .set dp, %r13
.set sp, %r14
.set pc, %r15
.macro FETCH skip=0
add $8+\skip, pc
jmp *-8(pc)
.endm
.extern fetch
# set stack
.globl s
s:
mov dp,sp
add (pc),sp
FETCH 8
# transfer if false
.globl f
f:
cmpq $0,-8(sp)
jz t
FETCH 8
# transfer
.globl t
t:
mov (pc),pc
FETCH
# init automatic vector
.globl y
y:
... |
aap/b | 2,174 | amd64/libb.s | .set dp, %r13
.set sp, %r14
.set pc, %r15
.set a0, %rdi
.set a1, %rsi
.set a2, %rdx
.set a4, %rcx
.set a5, %r8
.set a6, %r9
.globl _putchar
.data
_putchar: .quad 1f
.text
1: .quad 1f
1: mov 16(sp),%rax
mov _fout(%rip),a0
lea ch(%rip),a1
mov %rax,(a1)
xor a2,a2
1: cmpb $0,(a1,a2,1)
je 1f
inc a2
jmp 1b
1: call wr... |
aap/b | 1,442 | amd64/brt1.s | .set dp, %r13
.set sp, %r14
.set pc, %r15
.macro FETCH skip=0
add $8+\skip, pc
jmp *-8(pc)
.endm
stacksz = 1000
.data
.globl _argv
_argv: .quad 0
.bss
.align 8
stack: .space 8*stacksz
.text
.globl main, fetch
main:
lea stack(%rip),sp
mov sp,dp
lea init(%rip),pc
mov %rdi,%r11 # argc
mov %rsi,%r12 # argv
# B... |
aap/b | 6,362 | mips32/bilib.s | .set idp,$s0
.set isp,$s1
.set ipc,$s2
.set noreorder
.macro FETCH skip=0
lw $v0,\skip(ipc)
jr $v0
addiu ipc,4+\skip
.endm
.extern fetch
# set stack
.globl s
s:
lw isp,(ipc)
addu isp,idp
FETCH 4
# transfer if false
.globl f
f:
lw $t0,-4(isp)
beq $t0,$zero,t
nop
FETCH 4
# transfer
.globl t
t:
lw ipc,(i... |
aap/b | 2,151 | mips32/libb.s | .set idp,$s0
.set isp,$s1
.set ipc,$s2
.set noreorder
# to adjust stack, addiu isp,(2+nargs)*4,
# (2+1)*4 if no args but returns value
.globl _putchar
.data
_putchar: .word 1f
.text
1: .word 1f
1: addiu isp,12
lw $t0,8(idp) # chars
la $a1,ch
sw $t0,($a1)
move $a2,$zero # num chars
1: beq $t0,$zero,1f
srl $t0,8
... |
aap/b | 1,319 | mips32/brt1.s | .set idp,$s0
.set isp,$s1
.set ipc,$s2
.set noreorder
.macro FETCH skip=0
lw $v0,\skip(ipc)
jr $v0
addiu ipc,4+\skip
.endm
stacksz = 1000
.data
.globl _argv
_argv: .word 0
.bss
.align 2
stack: .space 4*stacksz
.text
.globl main, fetch
main:
la isp,stack
move idp,isp
la ipc,init
# B argc
sw $a0,8(idp)
# a... |
aap/b | 19,506 | unix1_bdir/bc.s | jmp 9f
.globl .main
.main:
.+2
s; 4
x; .argv
c; 0
n4
c; 3
b7
f; L1
ix; .write
n2
c; 1
vx; 1f
t; 2f
1:
71101
20147
67543
67165
5164
0
2:
c; 12
n3
ix; .exit
n2
c; 1
n3
L1:
ivx; .fin
x; .open
n2
x; .argv
c; 2
n4
c; 0
n3
b1
c; 0
b7
f; L2
ix; .write
n2
c; 1
vx; 1f
t; 2f
1:
67111
72560
2... |
aap/b | 10,258 | unix1_bdir/ba.s | jmp 9f
.globl .main
.main:
.+2
y; 10
s; 42
x; .argv
c; 0
n4
c; 3
b7
f; L1
ix; .printf
n2
vx; 1f
t; 2f
1:
71101
20147
67543
67165
5164
0
2:
n3
ix; .exit
n2
c; 1
n3
L1:
ivx; .fin
x; .open
n2
x; .argv
c; 2
n4
c; 0
n3
b1
c; 0
b7
f; L2
ix; .printf
n2
vx; 1f
t; 2f
1:
60503
23556
20164
6454... |
aap/b | 1,806 | unix1_bdir/int/bl.s | / B library -- exit
.globl .exit
.exit: .+2
n10; n7
sys exit
/ B library -- write
.globl .write
.write: .+2
n10; n7
mov r4,r5
cmp (r5)+,(r5)+
mov (r5)+,r0
asl (r5)
mov (r5)+,0f
mov (r5)+,1f
sys write; 0:..; 1:..
bec 1f
mov $-1,r0
1:
mov r0,(r5)+
jmp fetch
/ B library -- open
.globl .open
.... |
aap/b | 4,035 | unix1_bdir/int/bi.s | / could optimize eae with r2
/ ac 302
/ mq 304
.globl fetch
fetch:
mov (r3)+,r0 / fetch
mov r0,mq
clr ac
mov $3,lsh
mov ac,r1
asl r1 / jump offset
asr r0
bcs const
addr:
clr ac
mov $-3,lsh
mov mq,r0 / byte address
add $core,r0 / relocate to user
jmp *tab0(r1)
const:
bit $004000,r0 / sxt constant
bne ... |
aap/b | 1,359 | unix1_bdir/olibb/ctime.s | .globl .ctime
.globl ctime
.globl n11
.ctime:
.+2
.+2
mov r4,r5
cmp (r5)+,(r5)+
mov (r5)+,r0
asl r0
mov (r0)+,-(sp)
mov (r0)+,*$mq
mov (sp)+,*$ac
mov (r5)+,r0
asl r0
clrb 17(r0)
jsr pc,ctime
jmp n11
ctime:
mov r2,-(sp)
mov r3,-(sp)
/ mov $28.,febru
cmp *$ac,yrtime
blo 2f
bhi 1f
cmp *$mq,yrtime+2
... |
aap/b | 1,101 | unix1_bdir/olibb/print.s | jmp 9f
.globl .printf
.printf:
.+2
s; 42
va; 36
c; 0
b1
iva; 30
va; 6
b1
L1:
s; 42
va; 34
x; .char
n2
a; 4
va; 36
u7
n3
b1
c; 45
b5
f; L2
ia; 34
c; 0
b4
f; L3
ix; .flush
n1
n11
L3:
ix; .putchar
n2
a; 34
n3
ix; 7f+0
n6
L2:
iva; 32
va; 30
u7
u3
b1
iva; 34
x; .char
n2
a; 4
va; ... |
aap/b | 1,304 | unix1_bdir/libb/ctime.s | .globl .ctime
.globl ctime
.globl n11
.ctime:
.+2
.+2
mov r4,r5
cmp (r5)+,(r5)+
mov (r5)+,r0
asl r0
mov (r0)+,-(sp)
mov (r0)+,mq
mov (sp)+,ac
mov (r5)+,r0
asl r0
clrb 17(r0)
jsr pc,ctime
jmp n11
ctime:
mov r2,-(sp)
mov r3,-(sp)
mov $28.,febru
cmp ac,yrtime
blo 2f
bhi 1f
cmp mq,yrtime+2
bcs 2f
1:... |
aap/pdp6 | 1,071 | code/main.s | AC0==0
AC1==1
AC2==2
PDP==17
CPA==0
PRS==4
PTP==100
EXTERN PUTC,PUTS
EXTERN GETCH,GETC
EXTERN PUTN
EXTERN PTPUT
EXTERN DTTEST
ENTRY: JRST START
PDL: BLOCK 100
SP: XWD -100,PDL-1
START: MOVE PDP,SP
;; NUMBER TEST
; MOVE AC1,[-1234]
; PUSHJ PDP,PUTN
; MOVE AC1,[1234]
; PUSHJ PDP,PUTN
;; DECTAPE TEST
; JRST DTTE... |
aappleby/metroboy | 1,152 | tests/micro_audio/audio3.s | .include "header.inc"
; Wave
; NR30 FF1A E--- ---- DAC power
; NR31 FF1B LLLL LLLL Length load (256-L)
; NR32 FF1C -VV- ---- Volume code (00=0%, 01=100%, 10=50%, 11=25%)
; NR33 FF1D FFFF FFFF Frequency LSB
; NR34 FF1E TL-- -FFF Trigger, Length enable, Frequency MSB
; DAC power
; Length
; Volume
; Frequency LSB
; Fre... |
aappleby/metroboy | 974 | tests/micro_audio/spu_env_change.s | .include "header.inc"
; Square 1
; NR10 FF10 -PPPNSSS Sweep period, negate, shift
; NR11 FF11 DDLLLLLL Duty, Length load (64-L)
; NR12 FF12 VVVVAPPP Starting volume, Envelope add mode, period
; NR13 FF13 FFFFFFFF Frequency LSB
; NR14 FF14 TL---FFF Trigger, Length enable, Frequency MSB
; FF76 - pcm12
; FF77 - pcm34
... |
aappleby/metroboy | 2,198 | tests/micro_audio/audio4.s | .include "header.inc"
; Noise
; FF1F ---- ---- Not used
; NR41 FF20 --LL LLLL Length load (64-L)
; NR42 FF21 VVVV APPP Starting volume, Envelope add mode, period
; NR43 FF22 SSSS WDDD Clock shift, Width mode of LFSR, Divisor code
; NR44 FF23 TL-- ---- Trigger, Length enable
; Noise
; FF1F ---- ---- Not us... |
aappleby/metroboy | 1,107 | tests/micro_audio/audio1.s | .include "header.inc"
; Square 1
; NR10 FF10 -PPPNSSS Sweep period, negate, shift
; NR11 FF11 DDLLLLLL Duty, Length load (64-L)
; NR12 FF12 VVVVAPPP Starting volume, Envelope add mode, period
; NR13 FF13 FFFFFFFF Frequency LSB
; NR14 FF14 TL---FFF Trigger, Length enable, Frequency MSB
; starting with sweep off then ... |
aappleby/metroboy | 1,846 | tests/cpu_instrs/source/05-op rp.s | ; Tests BC/DE/HL arithmetic
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $0B,0,0 ; DEC BC
.byte $1B,0,0 ; DEC DE
.byte $2B,0,0 ; DEC HL
.byte $03,0,0 ; INC BC
.byte $13,0,0 ; INC DE
.byte $23,0,0 ; INC HL
.b... |
aappleby/metroboy | 7,694 | tests/cpu_instrs/source/09-op r,r.s | ; Tests most register instructions.
; Takes 10 seconds.
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $00,0,0 ; NOP
.byte $2F,0,0 ; CPL
.byte $37,0,0 ; SCF
.byte $3F,0,0 ; CCF
.byte $B0,0,0 ; OR B
.byte $B1,0,0 ; OR C
.byte $B2,0,0 ;... |
aappleby/metroboy | 3,131 | tests/cpu_instrs/source/07-jr,jp,call,ret,rst.s | ; Tests branch instructions
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
; JR cond,skip
; INC A
; skip:
.byte $18,$01,$3C ; JR *+3
.byte $20,$01,$3C ; JR NZ,*+3
.byte $28,$01,$3C ; JR Z,*+3
.byte $30,$01,$3C ; JR NC,*+3
.by... |
aappleby/metroboy | 1,217 | tests/cpu_instrs/source/02-interrupts.s | ; Tests DI, EI, and HALT (STOP proved untestable)
.include "shell.inc"
main:
wreg IE,$04
set_test 2,"EI"
ei
ld bc,0
push bc
pop bc
inc b
wreg IF,$04
interrupt_addr:
dec b
jp nz,test_failed
ld hl,sp-2
ldi a,(hl)
cp <interrupt_addr
... |
aappleby/metroboy | 2,530 | tests/cpu_instrs/source/08-misc instrs.s | ; Tests miscellaneous instructions
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $F0,$91,0 ; LDH A,($91)
.byte $E0,$91,0 ; LDH ($91),A
.byte $F2,$00,0 ; LDH A,(C)
.byte $E2,$00,0 ; LDH (C),A
.byte $FA,$91,$FF ; LD A,($FF91)
.byte $EA,... |
aappleby/metroboy | 9,892 | tests/cpu_instrs/source/10-bit ops.s | ; Tests most register instructions.
; Takes 15 seconds.
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $CB,$40,0 ; BIT 0,B
.byte $CB,$41,0 ; BIT 0,C
.byte $CB,$42,0 ; BIT 0,D
.byte $CB,$43,0 ; BIT 0,E
.byte $CB,$44,0 ; BIT 0,H
.byte $CB,$45,0 ;... |
aappleby/metroboy | 1,128 | tests/cpu_instrs/source/01-special.s | ; Tests instructions that don't fit template
.include "shell.inc"
main:
set_test 2,"JR negative"
ld a,0
jp jr_neg
inc a
- inc a
inc a
cp 2
jp nz,test_failed
jp +
jr_neg:
jr -
+
set_test 3,"JR positive"
ld a,0
jr +
inc a
+ ... |
aappleby/metroboy | 4,409 | tests/cpu_instrs/source/11-op a,(hl).s | ; Tests (HL/BC/DE) instructions.
; Takes 20 seconds.
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $0A,0,0 ; LD A,(BC)
.byte $1A,0,0 ; LD A,(DE)
.byte $02,0,0 ; LD (BC),A
.byte $12,0,0 ; LD (DE),A
.byte $2A,0,0 ; LD A,(HL+)... |
aappleby/metroboy | 1,880 | tests/cpu_instrs/source/04-op r,imm.s | ; Tests immediate instructions
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $36,0,0 ; LD (HL),$00
.byte $06,0,0 ; LD B,$00
.byte $0E,0,0 ; LD C,$00
.byte $16,0,0 ; LD D,$00
.byte $1E,0,0 ; LD E,$00
.byte $26,0,0 ; LD H,$00
.byte $... |
aappleby/metroboy | 3,712 | tests/cpu_instrs/source/06-ld r,r.s | ; Tests LD r,r ($40-$7F)
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $40,0,0 ; LD B,B
.byte $41,0,0 ; LD B,C
.byte $42,0,0 ; LD B,D
.byte $43,0,0 ; LD B,E
.byte $44,0,0 ; LD B,H
.byte $45,0,0 ; LD B,L
.byte $46,0,0 ; LD B,(HL)
... |
aappleby/metroboy | 1,981 | tests/cpu_instrs/source/03-op sp,hl.s | ; Tests SP/HL instructions
;.define PRINT_CHECKSUMS 1
.include "shell.inc"
.include "instr_test.s"
instrs:
.byte $33,0,0 ; INC SP
.byte $3B,0,0 ; DEC SP
.byte $39,0,0 ; ADD HL,SP
.byte $F9,0,0 ; LD SP,HL
.byte $E8,$01,0 ; ADD SP,1
.byte $E8,$FF,0 ; ADD SP,-1
... |
aappleby/metroboy | 2,575 | tests/cpu_instrs/source/common/numbers.s | ; Printing of numeric values
; Prints value of indicated register/pair
; as 2/4 hex digits, followed by a space.
; Updates checksum with printed values.
; Preserved: AF, BC, DE, HL
print_regs:
call print_af
call print_bc
call print_de
call print_hl
call print_newline
ret
print_a:
p... |
aappleby/metroboy | 1,224 | tests/cpu_instrs/source/common/crc.s | ; CRC-32 checksum calculation
.define checksum dp+0 ; little-endian, complemented
.redefine dp dp+4
; Initializes checksum module. Might initialize tables
; in the future.
init_crc:
jr reset_crc
; Clears CRC
; Preserved: BC, DE, HL
reset_crc:
ld a,$FF
sta checksum+0
sta checksum... |
aappleby/metroboy | 1,751 | tests/cpu_instrs/source/common/checksums.s | ; Multiple checksum table handling
.define next_checksum bss+0
.redefine bss bss+2
; If PRINT_CHECKSUMS is defined, checksums are printed
; rather than compared.
; Initializes multiple checksum handler to use checksums
; table (defined by user).
; Preserved: BC, DE, HL
checksums_init:
ld a,<chec... |
aappleby/metroboy | 1,035 | tests/cpu_instrs/source/common/cpu_speed.s | ; CPU speed manipulation.
; Switches to normal speed. No effect on DMG.
; Preserved: BC, DE, HL
cpu_norm:
; Do nothing if not CGB
ld a,(gb_id)
and gb_id_cgb
ret z
lda KEY1
rlca
ret nc
jr cpu_speed_toggle
; Switches to double speed. No effect on DMG.
; Preserved: ... |
aappleby/metroboy | 1,579 | tests/cpu_instrs/source/common/crc_fast.s | ; Fast table-based CRC-32
.define crc_tables (bss+$FF)&$FF00 ; 256-byte aligned
.redefine bss crc_tables+$400
; Initializes fast CRC tables and resets checksum.
; Time: 47 msec
init_crc_fast:
ld l,0
@next:
xor a
ld c,a
ld d,a
ld e,l
ld h,8
- rra
rr c
... |
aappleby/metroboy | 3,011 | tests/cpu_instrs/source/common/testing.s | ; Diagnostic and testing utilities
.define result bss+0
.define test_name bss+1
.redefine bss bss+3
; Sets test code and optional error text
; Preserved: AF, BC, DE, HL
.macro set_test ; code[,text[,text2]]
push hl
call set_test_
jr @set_test\@
.byte \1
.if NARGS > 1
... |
aappleby/metroboy | 4,343 | tests/cpu_instrs/source/common/apu.s | ; Sound chip utilities
; Turns APU off
; Preserved: BC, DE, HL
sound_off:
wreg NR52,0
ret
; Turns APU on
; Preserved: BC, DE, HL
sound_on:
wreg NR52,$80 ; power
wreg NR51,$FF ; mono
wreg NR50,$77 ; volume
ret
; Synchronizes to APU length counter within
; tens of clocks. Uses square... |
aappleby/metroboy | 5,377 | tests/cpu_instrs/source/common/console.s | ; Scrolling text console
; Console is 20x18 characters. Buffers lines, so
; output doesn't appear until a newline or flush.
; If scrolling isn't supported (i.e. SCY is treated
; as if always zero), the first 18 lines will
; still print properly). Also works properly if
; LY isn't supported (always reads back as the sa... |
aappleby/metroboy | 1,277 | tests/cpu_instrs/source/common/build_rom.s | ; Build as GB ROM
.memoryMap
defaultSlot 0
slot 0 $0000 size $4000
slot 1 $C000 size $4000
.endMe
.romBankSize $4000 ; generates $8000 byte ROM
.romBanks 2
.cartridgeType 1 ; MBC1
.computeChecksum
.computeComplementCheck
;;;; GB ROM header
; GB header read by bootrom
.org $100
nop
... |
aappleby/metroboy | 1,941 | tests/cpu_instrs/source/common/build_gbs.s | ; Build as GBS music file
.memoryMap
defaultSlot 0
slot 0 $3000 size $1000
slot 1 $C000 size $1000
.endMe
.romBankSize $1000
.romBanks 2
;;;; GBS music file header
.byte "GBS"
.byte 1 ; vers
.byte 1 ; songs
.byte 1 ; first song
.word load_addr
.word reset
.word gbs_play
.word st... |
aappleby/metroboy | 1,783 | tests/cpu_instrs/source/common/instr_test.s | ; Framework for CPU instruction tests
; Calls test_instr with each instruction copied
; to instr, with a JP instr_done after it.
; Verifies checksum after testing instruction and
; prints opcode if it's wrong.
.include "checksums.s"
.include "cpu_speed.s"
.include "apu.s"
.include "crc_fast.s"
.define instr $DEF8
.d... |
aappleby/metroboy | 1,777 | tests/cpu_instrs/source/common/printing.s | ; Main printing routine that checksums and
; prints to output device
; Character that does equivalent of print_newline
.define newline 10
; Prints char without updating checksum
; Preserved: BC, DE, HL
.define print_char_nocrc bss
.redefine bss bss+3
; Initializes printing. HL = print routine
init_printi... |
aappleby/metroboy | 5,856 | tests/cpu_instrs/source/common/delay.s | ; Delays in cycles, milliseconds, etc.
; All routines are re-entrant (no global data). Routines never
; touch BC, DE, or HL registers. These ASSUME CPU is at normal
; speed. If running at double speed, msec/usec delays are half advertised.
; Delays n cycles, from 0 to 16777215
; Preserved: AF, BC, DE, HL
.macro delay... |
aappleby/metroboy | 2,793 | tests/cpu_instrs/source/common/runtime.s | ; Common routines and runtime
; Must be defined by target-specific runtime:
;
; init_runtime: ; target-specific inits
; std_print: ; default routine to print char A
; post_exit: ; called at end of std_exit
; report_byte: ; report A to user
.define RUNTIME_INCLUDED 1
.ifndef bss
; address ... |
aappleby/metron | 2,290 | tests/risc-v/instructions/lh.S | # See LICENSE for license details.
#*****************************************************************************
# lh.S
#-----------------------------------------------------------------------------
#
# Test lh instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#------... |
aappleby/metron | 2,597 | tests/risc-v/instructions/srai.S | # See LICENSE for license details.
#*****************************************************************************
# srai.S
#-----------------------------------------------------------------------------
#
# Test srai instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 4,022 | tests/risc-v/instructions/sra.S | # See LICENSE for license details.
#*****************************************************************************
# sra.S
#-----------------------------------------------------------------------------
#
# Test sra instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,149 | tests/risc-v/instructions/bge.S | # See LICENSE for license details.
#*****************************************************************************
# bge.S
#-----------------------------------------------------------------------------
#
# Test bge instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,680 | tests/risc-v/instructions/sw.S | # See LICENSE for license details.
#*****************************************************************************
# sw.S
#-----------------------------------------------------------------------------
#
# Test sw instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#------... |
aappleby/metron | 2,175 | tests/risc-v/instructions/slti.S | # See LICENSE for license details.
#*****************************************************************************
# slti.S
#-----------------------------------------------------------------------------
#
# Test slti instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,028 | tests/risc-v/instructions/blt.S | # See LICENSE for license details.
#*****************************************************************************
# blt.S
#-----------------------------------------------------------------------------
#
# Test blt instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,633 | tests/risc-v/instructions/and.S | # See LICENSE for license details.
#*****************************************************************************
# and.S
#-----------------------------------------------------------------------------
#
# Test and instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 1,829 | tests/risc-v/instructions/ori.S | # See LICENSE for license details.
#*****************************************************************************
# ori.S
#-----------------------------------------------------------------------------
#
# Test ori instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,538 | tests/risc-v/instructions/bgeu.S | # See LICENSE for license details.
#*****************************************************************************
# bgeu.S
#-----------------------------------------------------------------------------
#
# Test bgeu instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,949 | tests/risc-v/instructions/slt.S | # See LICENSE for license details.
#*****************************************************************************
# slt.S
#-----------------------------------------------------------------------------
#
# Test slt instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 3,452 | tests/risc-v/instructions/srl.S | # See LICENSE for license details.
#*****************************************************************************
# srl.S
#-----------------------------------------------------------------------------
#
# Test srl instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,310 | tests/risc-v/instructions/lhu.S | # See LICENSE for license details.
#*****************************************************************************
# lhu.S
#-----------------------------------------------------------------------------
#
# Test lhu instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,028 | tests/risc-v/instructions/beq.S | # See LICENSE for license details.
#*****************************************************************************
# beq.S
#-----------------------------------------------------------------------------
#
# Test beq instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,308 | tests/risc-v/instructions/lw.S | # See LICENSE for license details.
#*****************************************************************************
# lw.S
#-----------------------------------------------------------------------------
#
# Test lw instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#------... |
aappleby/metron | 2,366 | tests/risc-v/instructions/bltu.S | # See LICENSE for license details.
#*****************************************************************************
# bltu.S
#-----------------------------------------------------------------------------
#
# Test bltu instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 3,145 | tests/risc-v/instructions/add.S | # See LICENSE for license details.
#*****************************************************************************
# add.S
#-----------------------------------------------------------------------------
#
# Test add instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 1,087 | tests/risc-v/instructions/jal.S | # See LICENSE for license details.
#*****************************************************************************
# jal.S
#-----------------------------------------------------------------------------
#
# Test jal instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,623 | tests/risc-v/instructions/or.S | # See LICENSE for license details.
#*****************************************************************************
# or.S
#-----------------------------------------------------------------------------
#
# Test or instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#------... |
aappleby/metron | 2,827 | tests/risc-v/instructions/slli.S | # See LICENSE for license details.
#*****************************************************************************
# slli.S
#-----------------------------------------------------------------------------
#
# Test slli instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,176 | tests/risc-v/instructions/srli.S | # See LICENSE for license details.
#*****************************************************************************
# srli.S
#-----------------------------------------------------------------------------
#
# Test srli instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,013 | tests/risc-v/instructions/bne.S | # See LICENSE for license details.
#*****************************************************************************
# bne.S
#-----------------------------------------------------------------------------
#
# Test bne instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 4,229 | tests/risc-v/instructions/sll.S | # See LICENSE for license details.
#*****************************************************************************
# sll.S
#-----------------------------------------------------------------------------
#
# Test sll instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 1,861 | tests/risc-v/instructions/xori.S | # See LICENSE for license details.
#*****************************************************************************
# xori.S
#-----------------------------------------------------------------------------
#
# Test xori instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 1,436 | tests/risc-v/instructions/jalr.S | # See LICENSE for license details.
#*****************************************************************************
# jalr.S
#-----------------------------------------------------------------------------
#
# Test jalr instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,748 | tests/risc-v/instructions/sltu.S | # See LICENSE for license details.
#*****************************************************************************
# sltu.S
#-----------------------------------------------------------------------------
#
# Test sltu instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
aappleby/metron | 2,302 | tests/risc-v/instructions/lbu.S | # See LICENSE for license details.
#*****************************************************************************
# lbu.S
#-----------------------------------------------------------------------------
#
# Test lbu instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#----... |
aappleby/metron | 2,642 | tests/risc-v/instructions/sh.S | # See LICENSE for license details.
#*****************************************************************************
# sh.S
#-----------------------------------------------------------------------------
#
# Test sh instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#------... |
aappleby/metron | 1,680 | tests/risc-v/instructions/andi.S | # See LICENSE for license details.
#*****************************************************************************
# andi.S
#-----------------------------------------------------------------------------
#
# Test andi instruction.
#
#include "riscv_test.h"
#include "test_macros.h"
RVTEST_RV64U
RVTEST_CODE_BEGIN
#--... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.