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a2stuff/a2d
12,232
src/extras/awlaunch.system.s
;;; ************************************************************ ;;; * * ;;; * * AW51Launcher - An AppleWorks File Loader * * ;;; * * ;;; * (For Use with BASIS.SYSTEM by John Brooks) ...
a2stuff/a2d
29,306
src/disk_copy/main.s
;;; ============================================================ ;;; Disk Copy - Main Memory Segment $0800 ;;; ;;; Compiled as part of disk_copy.s ;;; ============================================================ BEGINSEG SegmentMain .scope main MLIEntry := MLIRelayImpl MGTKEntry := auxlc::MGT...
a2stuff/a2d
3,699
src/disk_copy/loader.s
;;; ============================================================ ;;; Disk Copy - $1800 - $19FF ;;; ;;; Compiled as part of disk_copy.s ;;; ============================================================ BEGINSEG Loader .scope part2 MLIEntry := MLI jmp start ;;; =============================...
a2stuff/a2d
68,179
src/disk_copy/auxlc.s
;;; ============================================================ ;;; Disk Copy - Auxiliary LC Segment $D000 ;;; ;;; Compiled as part of disk_copy.s ;;; ============================================================ BEGINSEG SegmentAuxLC .scope auxlc MGTKEntry := MGTKRelayImpl kShortcutReadDisk = res_ch...
a2stuff/a2d
1,446
src/disk_copy/disk_copy.s
.include "../config.inc" BTK_SHORT = 1 .include "apple2.inc" .include "opcodes.inc" .include "../inc/apple2.inc" .include "../inc/macros.inc" .include "../inc/prodos.inc" .include "../inc/smartport.inc" .include "../mgtk/mgtk.inc" .includ...
a2stuff/a2d
451,954
src/desktop/main.s
;;; ============================================================ ;;; Desktop - Main Memory Segment ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ .include "../disk_copy/disk_copy.inc" ;;; ============================================================ ;;; S...
a2stuff/a2d
7,799
src/desktop/loader.s
;;; ============================================================ ;;; Loader ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ ;;; This chunk is invoked at $2000 after the quit handler has been invoked ;;; and updated itself. Using the segment_*_tables below, this lo...
a2stuff/a2d
31,781
src/desktop/init.s
;;; ============================================================ ;;; DeskTop - Initialization ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ ;;; ============================================================ ;;; Segment loaded into MAIN $800-$FFF ;;; ==============...
a2stuff/a2d
31,108
src/desktop/ovl_format_erase.s
;;; ============================================================ ;;; Overlay for Format/Erase ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ BEGINSEG OverlayFormatErase .scope FormatEraseOverlay ;;; Memory Map ;;; ... ;;; $1E00 - $1FFF - unused/preserve...
a2stuff/a2d
1,621
src/desktop/ovl_file_copy.s
;;; ============================================================ ;;; Overlay for File Copy ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ BEGINSEG OverlayFileCopy .scope FileCopyOverlay .proc Run tsx stx saved_stack jsr ...
a2stuff/a2d
29,716
src/desktop/ovl_selector_pick.s
;;; ============================================================ ;;; Overlay for Selector Picker ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ ;;; See docs/Selector_List_Format.md for file format BEGINSEG OverlayShortcutPick .scope SelectorPickOverlay ...
a2stuff/a2d
23,538
src/desktop/auxmem.s
;;; ============================================================ ;;; DeskTop - Aux Memory Segment ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ ;;; ============================================================ ;;; Segment loaded into AUX $4000-$BFFF ;;; =========...
a2stuff/a2d
9,793
src/desktop/lc.s
;;; ============================================================ ;;; DeskTop - "Language Card" Segment ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ ;;; ============================================================ ;;; Segment loaded into AUX $D000-$D1FF ;;; ====...
a2stuff/a2d
10,188
src/desktop/ovl_selector_edit.s
;;; ============================================================ ;;; Overlay for Selector Edit - drives File Picker dialog ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ BEGINSEG OverlayShortcutEdit ;;; Constants specific to this dialog and used by the ...
a2stuff/a2d
76,107
src/desktop/res.s
;;; ============================================================ ;;; DeskTop - Resources ;;; ;;; Compiled as part of desktop.s ;;; ============================================================ pencopy: .byte MGTK::pencopy penXOR: .byte MGTK::penXOR notpencopy: .byte MGTK::notpencopy ;;; ======...
a2stuff/a2d
3,985
src/desktop/desktop.s
.include "../config.inc" .include "apple2.inc" .include "apple2.mac" .include "opcodes.inc" .include "../inc/apple2.inc" .include "../inc/macros.inc" .include "../inc/prodos.inc" .include "../inc/smartport.inc" .include "../mgtk/mgtk.inc" ...
a2stuff/a2d
17,750
src/toolkits/btk.s
;;; ============================================================ ;;; Button ToolKit ;;; ============================================================ .scope btk BTKEntry := * ;;; ============================================================ ;;; Zero Page usage (saved/restored around calls) zp_start := ...
a2stuff/a2d
24,654
src/toolkits/lbtk.s
;;; ============================================================ ;;; List Box ToolKit ;;; ============================================================ .scope lbtk LBTKEntry := * ;;; ============================================================ ;;; Zero Page usage (saved/restored around calls) zp_start...
a2stuff/a2d
19,987
src/toolkits/letk.s
;;; ============================================================ ;;; LineEdit ToolKit ;;; ============================================================ .scope letk LETKEntry := * ;;; ============================================================ ;;; Zero Page usage (saved/restored around calls) zp_start...
a2stuff/a2d
69,991
src/toolkits/icontk.s
;;; ============================================================ ;;; Icon ToolKit ;;; ============================================================ .scope icontk ITKEntry := * ;;; ============================================================ ;;; Zero Page usage (saved/restored around calls) zp_start :=...
a2stuff/a2d
14,245
src/toolkits/optk.s
;;; ============================================================ ;;; Option Picker ToolKit ;;; ============================================================ .scope optk OPTKEntry := * ;;; ============================================================ ;;; Zero Page usage (saved/restored around calls) zp_...
a2-4am/4cade
3,683
res/attic/callback.s
!cpu 6502 !to "callback#061000",plain *=$1000 WILDCARD = $97 BASEPAGE = $D0 lda $c08b lda $c08b ldy #$0D jsr SearchTrack !byte $BD,$10,$BF ;LDA $BF10,X !byte $8D,WILDCARD,WILDCARD ;STA $xxxx,X !byte $BD,$11,$BF ;LDA $BF...
a2-4am/4cade
1,820
res/attic/quick.s
!cpu 6502 !to "quick#061000",plain *=$1000 zpword = $0 ;and $1 zpstring= $2 ;and $3 runningscore= $4 ;and $5 startat = $6 i = $7 tmp = $8 jsr quick tax lda #0 jmp $ed24 ;hex to dec quick lda #<word sta zpword lda #>word sta zpword+1 lda #<string sta zpstring lda #>string sta zpstring+1 ldy word cpy string...
9front/9front
1,211
sys/src/ape/lib/ap/power/memset.s
TEXT memset(SB),$0 #define BDNZ BC 16,0, MOVW R3, p+0(FP) /* R3 is pointer */ /* * performance: * about 100mbytes/sec (8k blocks) on a 603/105 without L2 cache * drops to 40mbytes/sec (10k blocks) and 28mbytes/sec with 32k blocks */ MOVW n+8(FP), R4 /* R4 is count */ CMP R4, $0 BLE ret MOVW c+4(FP), R5 /...
9front/9front
2,479
sys/src/ape/lib/ap/power/memmove.s
#define BDNZ BC 16,0, TEXT memmove(SB), $0 BR move TEXT memcpy(SB), $0 move: /* * performance: * (tba) */ MOVW R3, s1+0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW R3, R10 /* R10 is to-pointer */ CMP R9, $0 BEQ ret BLT trap MOVW s2+4(FP), R11 /* R11 is from-pointer */ /* * if no more than 16 bytes...
9front/9front
1,493
sys/src/ape/lib/ap/power/memcmp.s
TEXT memcmp(SB), $0 #define BDNZ BC 16,0, MOVW R3, s1+0(FP) /* R3 is pointer1 */ /* * performance: * 67mb/sec aligned; 16mb/sec unaligned */ MOVW n+8(FP), R4 /* R4 is count */ MOVW s2+4(FP), R5 /* R5 is pointer2 */ /* * let LSW do the work for 4 characters or less; aligned and unaligned */ CMP R4, $0 B...
9front/9front
3,748
sys/src/ape/lib/ap/power/vlop.s
#define BDNZ BC 16,0, /* * 64/64 division adapted from powerpc compiler writer's handbook * * (R3:R4) = (R3:R4) / (R5:R6) (64b) = (64b / 64b) * quo dvd dvs * * Remainder is left in R7:R8 * * Code comment notation: * msw = most-significant (high-order) word, i.e. bits 0..31 * lsw = least-significant (low-orde...
9front/9front
1,282
sys/src/ape/lib/ap/sparc/memset.s
TEXT memset(SB),$0 /* * performance: * (tba) */ MOVW R7, 0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW p+0(FP), R10 /* R10 is pointer */ MOVW c+4(FP), R11 /* R11 is char */ ADD R9,R10, R12 /* R12 is end pointer */ /* * if not at least 4 chars, * dont even mess around. * 3 chars to guarantee any * rou...
9front/9front
2,430
sys/src/ape/lib/ap/sparc/memmove.s
TEXT memmove(SB), $0 JMP move TEXT memcpy(SB), $0 move: /* * performance: * (tba) */ MOVW R7, s1+0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW R7, R10 /* R10 is to-pointer */ SUBCC R0,R9, R0 BGE ok MOVW 0(R0), R0 ok: MOVW s2+4(FP), R11 /* R11 is from-pointer */ ADD R9,R11, R13 /* R13 is end from-...
9front/9front
1,715
sys/src/ape/lib/ap/sparc/memcmp.s
#define Bxx BE TEXT memcmp(SB), $0 /* * performance: * (tba) */ MOVW R7, 0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW s1+0(FP), R10 /* R10 is pointer1 */ MOVW s2+4(FP), R11 /* R11 is pointer2 */ ADD R9,R10, R12 /* R12 is end pointer1 */ /* * if not at least 4 chars, * dont even mess around. * 3 char...
9front/9front
1,115
sys/src/ape/lib/ap/sparc/strcpy.s
TEXT strcpy(SB), $0 MOVW R7, 0(FP) MOVW s1+0(FP), R9 /* R9 is to pointer */ MOVW s2+4(FP), R10 /* R10 is from pointer */ /* * test if both pointers * are similarly word aligned */ XOR R9,R10, R7 ANDCC $3,R7, R0 BNE una /* * make byte masks */ MOVW $0xff, R17 SLL $8,R17, R16 SLL $16,R17, R13 SLL $24,...
9front/9front
5,379
sys/src/ape/lib/ap/sparc/muldiv.s
/* * ulong * _udiv(ulong num, ulong den) * { * int i; * ulong quo; * * if(den == 0) * *(ulong*)-1 = 0; * quo = num; * if(quo > 1<<(32-1)) * quo = 1<<(32-1); * for(i=0; den<quo; i++) * den <<= 1; * quo = 0; * for(; i>=0; i--) { * quo <<= 1; * if(num >= den) { * num -= den; * qu...
9front/9front
2,423
sys/src/ape/lib/ap/sparc/vlop.s
TEXT _mulv(SB), $0 MOVW u1+8(FP), R8 MOVW u2+16(FP), R13 MOVW R13, R16 /* save low parts for later */ MOVW R8, R12 /* * unsigned 32x32 => 64 multiply */ CMP R13, R8 BLE mul1 MOVW R12, R13 MOVW R16, R8 mul1: MOVW R13, Y ANDNCC $0xFFF, R13, R0 BE mul_shortway ANDCC R0, R0, R9 /* zero partial product ...
9front/9front
1,216
sys/src/ape/lib/ap/68020/memmove.s
TEXT memmove(SB), $0 move: MOVL n+8(FP),R0 BEQ return BGT ok MOVL 0, R0 ok: MOVL s1+0(FP),A2 MOVL s2+4(FP),A1 CMPL A2,A1 BHI back /* * speed depends on source allignment * destination allignment is secondary * byte-at-a-time foreward copy to * get source (A1) alligned. */ f1: MOVL A1, R1 ANDL $3, R1 ...
9front/9front
1,209
sys/src/ape/lib/ap/68020/memcpy.s
TEXT memcpy(SB), $0 MOVL n+8(FP),R0 BEQ return BGT ok MOVL 0, R0 ok: MOVL s1+0(FP),A2 MOVL s2+4(FP),A1 CMPL A2,A1 BHI back /* * speed depends on source allignment * destination allignment is secondary * byte-at-a-time foreward copy to * get source (A1) alligned. */ f1: MOVL A1, R1 ANDL $3, R1 BEQ f2...
9front/9front
4,188
sys/src/ape/lib/ap/arm/memmove.s
TS = 0 TE = 1 FROM = 2 N = 3 TMP = 3 /* N and TMP don't overlap */ TMP1 = 4 TEXT memcpy(SB), 1, $-4 TEXT memmove(SB), $0 _memmove: MOVW R(TS), to+0(FP) /* need to save for return value */ MOVW from+4(FP), R(FROM) MOVW n+8(FP), R(N) ADD R(N), R(TS), R(TE) /* to end pointer */ CMP R(FROM), R(TS) BLS _forwar...
9front/9front
1,639
sys/src/ape/lib/ap/arm/div.s
Q = 0 N = 1 D = 2 CC = 3 TMP = 11 TEXT save<>(SB), 1, $0 MOVW R(Q), 0(FP) MOVW R(N), 4(FP) MOVW R(D), 8(FP) MOVW R(CC), 12(FP) MOVW R(TMP), R(Q) /* numerator */ MOVW 20(FP), R(D) /* denominator */ CMP $0, R(D) BNE s1 MOVW -1(R(D)), R(TMP) /* divide by zero fault */ s1: RET TEXT rest<>(SB), 1, $0 MOVW 0(F...
9front/9front
1,734
sys/src/ape/lib/ap/spim/memcmp.s
TEXT memcmp(SB), $0 MOVW R1, 0(FP) /* * performance: * alligned about 1.0us/call and 17.4mb/sec * unalligned is about 3.1mb/sec */ MOVW n+8(FP), R3 /* R3 is count */ MOVW s1+0(FP), R4 /* R4 is pointer1 */ MOVW s2+4(FP), R5 /* R5 is pointer2 */ ADDU R3,R4, R6 /* R6 is end pointer1 */ /* TODO(mischief): ...
9front/9front
1,270
sys/src/ape/lib/ap/mips/memset.s
TEXT memset(SB),$12 MOVW R1, 0(FP) /* * performance: * about 1us/call and 28mb/sec */ MOVW n+8(FP), R3 /* R3 is count */ MOVW p+0(FP), R4 /* R4 is pointer */ MOVW c+4(FP), R5 /* R5 is char */ ADDU R3,R4, R6 /* R6 is end pointer */ /* * if not at least 4 chars, * dont even mess around. * 3 chars to gua...
9front/9front
2,341
sys/src/ape/lib/ap/mips/memmove.s
TEXT memmove(SB), $0 JMP move TEXT memcpy(SB), $0 move: MOVW R1, s1+0(FP) MOVW n+8(FP), R3 /* R3 is count */ MOVW R1, R4 /* R4 is to-pointer */ SGT R0, R3, R5 BEQ R5, ok MOVW (R0), R0 /* abort if negative count */ ok: MOVW s2+4(FP), R5 /* R5 is from-pointer */ ADDU R3,R5, R7 /* R7 is end from-pointe...
9front/9front
1,678
sys/src/ape/lib/ap/mips/memcmp.s
TEXT memcmp(SB), $0 MOVW R1, 0(FP) /* * performance: * alligned about 1.0us/call and 17.4mb/sec * unalligned is about 3.1mb/sec */ MOVW n+8(FP), R3 /* R3 is count */ MOVW s1+0(FP), R4 /* R4 is pointer1 */ MOVW s2+4(FP), R5 /* R5 is pointer2 */ ADDU R3,R4, R6 /* R6 is end pointer1 */ /* * if not at leas...
9front/9front
1,202
sys/src/ape/lib/ap/mips/strcpy.s
TEXT strcpy(SB), $0 MOVW s2+4(FP),R2 /* R2 is from pointer */ MOVW R1, R3 /* R3 is to pointer */ /* * align 'from' pointer */ l1: AND $3, R2, R5 ADDU $1, R2 BEQ R5, l2 MOVB -1(R2), R5 ADDU $1, R3 MOVB R5, -1(R3) BNE R5, l1 RET /* * test if 'to' is also alligned */ l2: AND $3,R3, R5 BEQ R5, l4 /* ...
9front/9front
12,757
sys/src/9/omap/l.s
/* * ti omap3530 SoC machine assist * arm cortex-a8 processor * * loader uses R11 as scratch. * R9 and R10 are used for `extern register' variables. * * ARM v7 arch. ref. man. §B1.3.3 that we don't need barriers * around moves to CPSR. */ #include "arm.s" /* * MCR and MRC are counter-intuitively named. * M...
9front/9front
4,898
sys/src/9/omap/cache.v7.s
/* * cortex arm arch v7 cache flushing and invalidation * shared by l.s and rebootcode.s */ TEXT cacheiinv(SB), $-4 /* I invalidate */ MOVW $0, R0 MCR CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCACHEall /* ok on cortex */ ISB RET /* * set/way operators, passed a suitable set/way value in R0. */ TEXT cache...
9front/9front
1,298
sys/src/9/omap/lproc.s
#include "mem.h" #include "arm.h" /* * This is the first jump from kernel to user mode. * Fake a return from interrupt. * * Enter with R0 containing the user stack pointer. * UTZERO + 0x20 is always the entry point. * */ TEXT touser(SB), 1, $-4 /* store the user stack pointer into the USR_r13 */ MOVM.DB.W...
9front/9front
2,628
sys/src/9/omap/arm.s
/* * omap3530 machine assist, definitions * cortex-a8 processor * * loader uses R11 as scratch. */ #include "mem.h" #include "arm.h" #undef B /* B is for 'botch' */ #define KADDR(pa) (KZERO | ((pa) & ~KSEGM)) #define PADDR(va) (PHYSDRAM | ((va) & ~KSEGM)) #define L1X(va) (((((va))>>20) & 0x0fff)<<2) #...
9front/9front
5,909
sys/src/9/omap/lexception.s
/* * arm exception handlers */ #include "arm.s" #undef B /* B is for 'botch' */ /* * exception vectors, copied by trapinit() to somewhere useful */ TEXT vectors(SB), 1, $-4 MOVW 0x18(R15), R15 /* reset */ MOVW 0x18(R15), R15 /* undefined instr. */ MOVW 0x18(R15), R15 /* SWI & SMC */ MOVW 0x18(R15), R1...
9front/9front
4,859
sys/src/9/omap/rebootcode.s
/* * omap3530 reboot code * * must fit in 11K to avoid stepping on PTEs; see mem.h. * * R11 is used by the loader as a temporary, so avoid it. */ #include "arm.s" /* * Turn off MMU, then copy the new kernel to its correct location * in physical memory. Then jump to the start of the kernel. */ /* main(PADDR(...
9front/9front
7,822
sys/src/9/zynq/l.s
#include "mem.h" #include "io.h" #define PUTC(c) MOVW $(c), R0; MOVW R0, (R8) TEXT _start(SB), $-4 MOVW $(KTZERO-KZERO), R13 MOVW $0xE0001030, R8 PUTC('P') MOVW $0, R0 MOVW R0, R1 MOVW $(CONFADDR-KZERO), R2 _start0: MOVW.P R0, 4(R1) CMP.S R1, R2 BNE _start0 PUTC('l') MOVW $SECSZ, R0 MOVW $(MACHL1(0)-KZE...
9front/9front
1,623
sys/src/9/zynq/ltrap.s
#include "mem.h" #include "io.h" TEXT vectors(SB), $-4 MOVW $_start-KZERO(SB), R15 MOVW $_vexc(SB), R15 MOVW $_vsvc(SB), R15 MOVW $_viabt(SB), R15 MOVW $_vexc(SB), R15 MOVW $vectors(SB), R15 MOVW $_vexc(SB), R15 MOVW $_vexc(SB), R15 TEXT _viabt(SB), $-4 CPS(CPSID) CLREX DSB MOVW R14, 8(R13) MOVW SPSR, R1...
9front/9front
1,554
sys/src/9/xen/xen.s
#include "xendefs.h" #include "mem.h" #define ENTRY(X) TEXT X(SB), $0 /* * XXX there's a race in here because we can get an upcall * betwen the spllo() (in xenupcall) and the rti. This will make * handlers stack, which could lead to a blown stack. Probably * not worth fixing (but possibly worth detecting and p...
9front/9front
17,921
sys/src/9/xen/l.s
#include "xendefs.h" #include "mem.h" /* * Some machine instructions not handled by 8[al]. */ #define OP16 BYTE $0x66 #define DELAY BYTE $0xEB; BYTE $0x00 /* JMP .+2 */ #define CPUID BYTE $0x0F; BYTE $0xA2 /* CPUID, argument in AX */ #define WRMSR BYTE $0x0F; BYTE $0x30 /* WRMSR, argument in AX/DX (lo/hi) */ #de...
9front/9front
17,292
sys/src/9/kw/l.s
/* * sheevaplug machine assist * arm926ej-s processor at 1.2GHz * * loader uses R11 as scratch. * R9 and R10 are used for `extern register' variables. * * ARM v7 arch. ref. man. (I know, this is v5) §B1.3.3 that * we don't need barriers around moves to CPSR. The ARM v6 manual * seems to be silent on the subje...
9front/9front
1,298
sys/src/9/kw/lproc.s
#include "mem.h" #include "arm.h" /* * This is the first jump from kernel to user mode. * Fake a return from interrupt. * * Enter with R0 containing the user stack pointer. * UTZERO + 0x20 is always the entry point. * */ TEXT touser(SB), 1, $-4 /* store the user stack pointer into the USR_r13 */ MOVM.DB.W...
9front/9front
1,904
sys/src/9/kw/arm.s
/* * sheevaplug machine assist, definitions * arm926ej-s processor at 1.2GHz * * loader uses R11 as scratch. */ #include "mem.h" #include "arm.h" #undef B /* B is for 'botch' */ #define PADDR(a) ((a) & ~KZERO) #define KADDR(a) (KZERO|(a)) #define L1X(va) (((((va))>>20) & 0x0fff)<<2) #define MACHADDR (L1-M...
9front/9front
5,909
sys/src/9/kw/lexception.s
/* * arm exception handlers */ #include "arm.s" #undef B /* B is for 'botch' */ /* * exception vectors, copied by trapinit() to somewhere useful */ TEXT vectors(SB), 1, $-4 MOVW 0x18(R15), R15 /* reset */ MOVW 0x18(R15), R15 /* undefined instr. */ MOVW 0x18(R15), R15 /* SWI & SMC */ MOVW 0x18(R15), R1...
9front/9front
4,052
sys/src/9/kw/rebootcode.s
/* * sheevaplug reboot code * * R11 is used by the loader as a temporary, so avoid it. */ #include "arm.s" /* * Turn off MMU, then copy the new kernel to its correct location * in physical memory. Then jump to the start of the kernel. */ /* main(PADDR(entry), PADDR(code), size); */ TEXT main(SB), 1, $-4 MOVW...
9front/9front
14,584
sys/src/9/sgi/l.s
#include "mem.h" #define SP R29 #define NOOP NOR R0, R0, R0 #define WAIT NOOP; NOOP #define RETURN RET; NOOP #define CONST(i, v) MOVW $((i) & 0xffff0000), v; OR $((i) & 0xffff), v; #define GETMACH(r) CONST(MACHADDR, r) /* * R4000 instructions */ #define ERET WORD $0x42000018 #define LL(base, rt) WORD $((060<<...
9front/9front
15,295
sys/src/9/mt7688/l.s
/* * mips 24k machine assist for mt7688 */ #include "mem.h" #include "mips24k.s" #define SANITY 0x12345678 NOSCHED /* * Boot only processor */ TEXT start(SB), $-4 MOVW $setR30(SB), R30 DI(0) MOVW sanity(SB), R1 CONST(SANITY, R2) SUBU R1, R2, R2 BNE R2, insane NOP MOVW R0, M(COMPARE) EHB /* don...
9front/9front
2,167
sys/src/9/mt7688/mips24k.s
#define SP R29 #define NOOP NOR R0, R0, R0 #define NOP NOR R0, R0, R0 #define RETURN RET; NOOP #define CONST(i, v) MOVW $((i) & 0xffff0000), v; OR $((i) & 0xffff), v; #define GETMACH(r) CONST(MACHADDR, r) #define PUTC(c, r1, r2) CONST(PHYSCONS, r1); MOVW $(c), r2; MOVW r2, (r1); NOOP /* new instructions in mip...
9front/9front
13,665
sys/src/9/lx2k/l.s
#include "mem.h" #include "../arm64/sysreg.h" #undef SYSREG #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) TEXT _start(SB), 1, $-4 MOV R0, R26 /* save */ MOV $setSB-KZERO(SB), R28 BL svcmode<>(SB) /* use dedicated stack pointer per exception level */ MOVWU $1, R1 MSR R...
9front/9front
19,046
sys/src/9/teg2/l.s
/* * tegra 2 SoC machine assist * dual arm cortex-a9 processors * * ARM v7 arch. ref. man. §B1.3.3 says that we don't need barriers * around writes to CPSR. * * LDREX/STREX use an exclusive monitor, which is part of the data cache unit * for the L1 cache, so they won't work right if the L1 cache is disabled. *...
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5,687
sys/src/9/teg2/cache.v7.s
/* * cortex arm arch v7 cache flushing and invalidation * included by l.s and rebootcode.s */ TEXT cacheiinv(SB), $-4 /* I invalidate */ MOVW $0, R0 MTCP CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCACHEall /* ok on cortex */ ISB RET /* * set/way operators, passed a suitable set/way value in R0. */ TEXT ca...
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4,084
sys/src/9/teg2/arm.s
/* * nvidia tegra 2 machine assist, definitions * dual-core cortex-a9 processor * * R9 and R10 are used for `extern register' variables. * R11 is used by the loader as a temporary, so avoid it. */ #include "mem.h" #include "arm.h" #undef B /* B is for 'botch' */ #define KADDR(pa) (KZERO | ((pa) & ~KSEGM...
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8,905
sys/src/9/teg2/lexception.s
/* * arm exception handlers */ #include "arm.s" #undef B /* B is for 'botch' */ /* * exception vectors, copied by trapinit() to somewhere useful */ TEXT vectors(SB), 1, $-4 MOVW 0x18(R15), R15 /* reset */ MOVW 0x18(R15), R15 /* undefined instr. */ MOVW 0x18(R15), R15 /* SWI & SMC */ MOVW 0x18(R15), R1...
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4,750
sys/src/9/teg2/rebootcode.s
/* * arm v7 reboot code * * must fit in 11K to avoid stepping on PTEs; see mem.h. * cache parameters are at CACHECONF. */ #include "arm.s" /* * All caches but L1 should be off before calling this. * Turn off MMU, then copy the new kernel to its correct location * in physical memory. Then jump to the start of ...
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14,047
sys/src/9/imx8/l.s
#include "mem.h" #include "../arm64/sysreg.h" #undef SYSREG #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) TEXT _start(SB), 1, $-4 MOV R0, R26 /* save */ MOV $setSB-KZERO(SB), R28 BL svcmode<>(SB) /* use dedicated stack pointer per exception level */ MOVWU $1, R1 MSR R...
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27,901
sys/src/9/pc64/l.s
#include "mem.h" MODE $32 #define DELAY BYTE $0xEB; BYTE $0x00 /* JMP .+2 */ #define pFARJMP32(s, o) BYTE $0xea; /* far jump to ptr32:16 */\ LONG $o; WORD $s /* * Enter here in 32-bit protected mode. Welcome to 1982. * Make sure the GDT is set as it should be: * disable interrupts; * load the GDT with the ...
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4,008
sys/src/9/pc64/apbootstrap.s
/* * Start an Application Processor. This must be placed on a 4KB boundary * somewhere in the 1st MB of conventional memory (APBOOTSTRAP). However, * due to some shortcuts below it's restricted further to within the 1st * 64KB. The AP starts in real-mode, with * CS selector set to the startup memory address/16; ...
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2,169
sys/src/9/pc64/rebootcode.s
#include "mem.h" MODE $64 /* * Turn off MMU, then memmove the new kernel to its correct location * in physical memory. Then jumps the to start of the kernel. */ TEXT main(SB), 1, $-4 MOVL RARG, DI /* destination */ MOVL p2+8(FP), SI /* source */ MOVL n+16(FP), BX /* byte count */ /* load zero length idt ...
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13,459
sys/src/9/bcm64/l.s
#include "mem.h" #include "../arm64/sysreg.h" #undef SYSREG #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) TEXT _start(SB), 1, $-4 MOV R0, R26 /* save */ MOV $setSB-KZERO(SB), R28 BL svcmode<>(SB) /* use dedicated stack pointer per exception level */ MOVWU $1, R1 MSR R...
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19,939
sys/src/9/ppc/l.s
#include "mem.h" /* use of SPRG registers in save/restore */ #define SAVER0 SPRG0 #define SAVER1 SPRG1 #define SAVELR SPRG2 #define SAVEXX SPRG3 #ifdef ucuconf /* These only exist on the PPC 755: */ #define SAVER4 SPRG4 #define SAVER5 SPRG5 #define SAVER6 SPRG6 #define SAVER7 SPRG7 #endif /* ucuconf */ /* special in...
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7,968
sys/src/9/cycv/l.s
#include "mem.h" #include "io.h" #define PUTC(c) MOVW $(c), R0; MOVW R0, (R8) TEXT _start(SB), $-4 MOVW $(KTZERO-KZERO), R13 MOVW $(UART_BASE), R8 /* disable watchdog */ MOVW $(RESETMGR_BASE + 4*PERMODRST), R1 MOVW (R1), R0 ORR $(3<<6), R0 MOVW R0, (R1) /* disable L2 cache */ MOVW $0, R0 MOVW $(L2_BASE+...
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1,623
sys/src/9/cycv/ltrap.s
#include "mem.h" #include "io.h" TEXT vectors(SB), $-4 MOVW $_start-KZERO(SB), R15 MOVW $_vexc(SB), R15 MOVW $_vsvc(SB), R15 MOVW $_viabt(SB), R15 MOVW $_vexc(SB), R15 MOVW $vectors(SB), R15 MOVW $_vexc(SB), R15 MOVW $_vexc(SB), R15 TEXT _viabt(SB), $-4 CPS(CPSID) CLREX DSB MOVW R14, 8(R13) MOVW SPSR, R1...
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13,674
sys/src/9/arm64/l.s
#include "mem.h" #include "sysreg.h" #undef SYSREG #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) TEXT _start(SB), 1, $-4 MOV R0, R26 /* save */ MOV $setSB-KZERO(SB), R28 BL svcmode<>(SB) /* use dedicated stack pointer per exception level */ MOVWU $1, R1 MSR R1, SPSel ...
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3,232
sys/src/9/arm64/cache.v8.s
#include "../arm64/sysreg.h" #undef SYSREG #define SYSREG(op0,op1,Cn,Cm,op2) SPR(((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5)) /* * instruction cache operations */ TEXT cacheiinvse(SB), 1, $-4 MOVWU len+8(FP), R2 ADD R0, R2 MRS DAIF, R11 MSR $0x2, DAIFSet MOVWU $1, R10 MSR R10, CSSELR_EL1 ISB $SY MRS CC...
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10,597
sys/src/9/mtx/l.s
#include "mem.h" /* use of SPRG registers in save/restore */ #define SAVER0 SPRG0 #define SAVER1 SPRG1 #define SAVELR SPRG2 #define SAVEXX SPRG3 /* special instruction definitions */ #define BDNZ BC 16,0, #define BDNE BC 0,2, #define TLBIA WORD $((31<<26)|(307<<1)) #define TLBSYNC WORD $((31<<26)|(566<<1)) /* on so...
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1,476
sys/src/9/mtx/inb.s
#include "mem.h" #define BDNZ BC 16,0, #define BDNE BC 0,2, TEXT inb(SB), $0 OR $IOMEM, R3 MOVBZ (R3), R3 RETURN TEXT insb(SB), $0 MOVW v+4(FP), R4 MOVW n+8(FP), R5 MOVW R5, CTR OR $IOMEM, R3 SUB $1, R4 insb1: MOVBZ (R3), R7 MOVBU R7, 1(R4) BDNZ insb1 RETURN TEXT outb(SB), $0 MOVW v+4(FP), R4 OR $IOME...
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1,389
sys/src/9/pc/apmjump.s
/* * Far call, absolute indirect. * The argument is the offset. * We use a global structure for the jump params, * so this is *not* reentrant or thread safe. */ #include "mem.h" #define SSOVERRIDE BYTE $0x36 #define CSOVERRIDE BYTE $0x2E GLOBL apmjumpstruct+0(SB), $8 TEXT apmfarcall(SB), $0 /* * We call pus...
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30,317
sys/src/9/pc/l.s
#include "mem.h" #undef DELAY #define PADDR(a) ((a) & ~KZERO) #define KADDR(a) (KZERO|(a)) /* * Some machine instructions not handled by 8[al]. */ #define OP16 BYTE $0x66 #define DELAY BYTE $0xEB; BYTE $0x00 /* JMP .+2 */ #define CPUID BYTE $0x0F; BYTE $0xA2 /* CPUID, argument in AX */ #define WRMSR BYTE $0x0F;...
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3,134
sys/src/9/pc/apbootstrap.s
/* * Start an Application Processor. This must be placed on a 4KB boundary * somewhere in the 1st MB of conventional memory (APBOOTSTRAP). However, * due to some shortcuts below it's restricted further to within the 1st * 64KB. The AP starts in real-mode, with * CS selector set to the startup memory address/16; ...
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1,117
sys/src/9/pc/rebootcode.s
#include "mem.h" /* * Turn off MMU, then memmove the new kernel to its correct location * in physical memory. Then jumps the to start of the kernel. */ TEXT main(SB),$0 MOVL p1+0(FP), DI /* destination */ MOVL DI, AX /* entry point */ MOVL p2+4(FP), SI /* source */ MOVL n+8(FP), CX /* byte count */ /* ...
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4,910
sys/src/9/bcm/cache.v7.s
/* * cortex arm arch v7 cache flushing and invalidation * shared by l.s and rebootcode.s */ #define BPIALL MCR CpSC, 0, R0, C(CpCACHE), C(5), 6 /* branch predictor invalidate all */ TEXT cacheiinv(SB), $-4 /* I invalidate */ DSB MOVW $0, R0 MCR CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCACHEall /* ok on cor...
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1,136
sys/src/9/bcm/arm.s
/* * armv6/v7 machine assist, definitions * * loader uses R11 as scratch. */ #include "mem.h" #include "arm.h" #define PADDR(va) (PHYSDRAM | ((va) & ~KSEGM)) #define L1X(va) (((((va))>>20) & 0x0fff)<<2) /* * new instructions */ #define ISB \ MOVW $0, R0; \ MCR CpSC, 0, R0, C(CpCACHE), C(CpCACHEinvi), CpCA...
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10,515
sys/src/9/bcm/armv7.s
/* * Broadcom bcm2836 SoC, as used in Raspberry Pi 2 * 4 x Cortex-A7 processor (armv7) */ #include "arm.s" #define CACHELINESZ 64 #define ICACHELINESZ 32 #undef DSB #undef DMB #undef ISB #define DSB WORD $0xf57ff04f /* data synch. barrier; last f = SY */ #define DMB WORD $0xf57ff05f /* data mem. barrier; last f ...
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7,361
sys/src/9/bcm/lexception.s
/* * arm exception handlers */ #include "arm.s" /* * exception vectors, copied by trapinit() to somewhere useful */ TEXT vectors(SB), 1, $-4 MOVW 0x18(R15), R15 /* reset */ MOVW 0x18(R15), R15 /* undefined instr. */ MOVW 0x18(R15), R15 /* SWI & SMC */ MOVW 0x18(R15), R15 /* prefetch abort */ MOVW 0x18(R1...
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1,965
sys/src/9/bcm/rebootcode.s
/* * armv6/armv7 reboot code */ #include "arm.s" #define WFI WORD $0xe320f003 /* wait for interrupt */ #define WFE WORD $0xe320f002 /* wait for event */ TEXT main(SB), 1, $-4 MOVW $setR12(SB), R12 MOVW R0, entry+0(FP) CMP $0, R0 BEQ shutdown MOVW entry+0(FP), R8 MOVW code+4(FP), R9 MOVW size+8(FP), R6 /...
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6,227
sys/src/9/bcm/armv6.s
/* * Broadcom bcm2835 SoC, as used in Raspberry Pi * arm1176jzf-s processor (armv6) */ #include "arm.s" #define CACHELINESZ 32 TEXT armstart(SB), 1, $-4 /* * SVC mode, interrupts disabled */ MOVW $(PsrDirq|PsrDfiq|PsrMsvc), R1 MOVW R1, CPSR /* * disable the mmu and L1 caches * invalidate caches and ...
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1,130
sys/src/libc/power/atom.s
TEXT ainc(SB),$0 /* long ainc(long *); */ MOVW R3, R4 xincloop: LWAR (R4), R3 ADD $1, R3 DCBT (R4) /* fix 405 errata cpu_210 */ STWCCC R3, (R4) BNE xincloop RETURN TEXT adec(SB),$0 /* long adec(long *); */ MOVW R3, R4 xdecloop: LWAR (R4), R3 ADD $-1, R3 DCBT (R4) /* fix 405 errata cpu_210 */ STWCCC R...
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1,211
sys/src/libc/power/memset.s
TEXT memset(SB),$0 #define BDNZ BC 16,0, MOVW R3, p+0(FP) /* R3 is pointer */ /* * performance: * about 100mbytes/sec (8k blocks) on a 603/105 without L2 cache * drops to 40mbytes/sec (10k blocks) and 28mbytes/sec with 32k blocks */ MOVW n+8(FP), R4 /* R4 is count */ CMP R4, $0 BLE ret MOVW c+4(FP), R5 /...
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2,479
sys/src/libc/power/memmove.s
#define BDNZ BC 16,0, TEXT memmove(SB), $0 BR move TEXT memcpy(SB), $0 move: /* * performance: * (tba) */ MOVW R3, s1+0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW R3, R10 /* R10 is to-pointer */ CMP R9, $0 BEQ ret BLT trap MOVW s2+4(FP), R11 /* R11 is from-pointer */ /* * if no more than 16 bytes...
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1,493
sys/src/libc/power/memcmp.s
TEXT memcmp(SB), $0 #define BDNZ BC 16,0, MOVW R3, s1+0(FP) /* R3 is pointer1 */ /* * performance: * 67mb/sec aligned; 16mb/sec unaligned */ MOVW n+8(FP), R4 /* R4 is count */ MOVW s2+4(FP), R5 /* R5 is pointer2 */ /* * let LSW do the work for 4 characters or less; aligned and unaligned */ CMP R4, $0 B...
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3,748
sys/src/libc/power/vlop.s
#define BDNZ BC 16,0, /* * 64/64 division adapted from powerpc compiler writer's handbook * * (R3:R4) = (R3:R4) / (R5:R6) (64b) = (64b / 64b) * quo dvd dvs * * Remainder is left in R7:R8 * * Code comment notation: * msw = most-significant (high-order) word, i.e. bits 0..31 * lsw = least-significant (low-orde...
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1,279
sys/src/libc/386/atom.s
TEXT ainc(SB), $0 /* long ainc(long *); */ MOVL addr+0(FP), BX ainclp: MOVL (BX), AX MOVL AX, CX INCL CX LOCK BYTE $0x0F; BYTE $0xB1; BYTE $0x0B /* CMPXCHGL CX, (BX) */ JNZ ainclp MOVL CX, AX RET TEXT adec(SB), $0 /* long adec(long*); */ MOVL addr+0(FP), BX adeclp: MOVL (BX), AX MOVL AX, CX DECL CX LOCK ...
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1,282
sys/src/libc/sparc/memset.s
TEXT memset(SB),$0 /* * performance: * (tba) */ MOVW R7, 0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW p+0(FP), R10 /* R10 is pointer */ MOVW c+4(FP), R11 /* R11 is char */ ADD R9,R10, R12 /* R12 is end pointer */ /* * if not at least 4 chars, * dont even mess around. * 3 chars to guarantee any * rou...
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2,281
sys/src/libc/sparc/memmove.s
TEXT memmove(SB), $0 JMP move TEXT memcpy(SB), $0 move: /* * performance: * (tba) */ MOVW R7, s1+0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW R7, R10 /* R10 is to-pointer */ SUBCC R0,R9, R0 BGE ok MOVW 0(R0), R0 ok: MOVW s2+4(FP), R11 /* R11 is from-pointer */ ADD R9,R11, R13 /* R13 is end from-...
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1,705
sys/src/libc/sparc/memcmp.s
TEXT memcmp(SB), $0 /* * performance: * (tba) */ MOVW R7, 0(FP) MOVW n+8(FP), R9 /* R9 is count */ MOVW s1+0(FP), R10 /* R10 is pointer1 */ MOVW s2+4(FP), R11 /* R11 is pointer2 */ ADD R9,R10, R12 /* R12 is end pointer1 */ /* * if not at least 4 chars, * dont even mess around. * 3 chars to guarantee ...
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1,115
sys/src/libc/sparc/strcpy.s
TEXT strcpy(SB), $0 MOVW R7, 0(FP) MOVW s1+0(FP), R9 /* R9 is to pointer */ MOVW s2+4(FP), R10 /* R10 is from pointer */ /* * test if both pointers * are similarly word aligned */ XOR R9,R10, R7 ANDCC $3,R7, R0 BNE una /* * make byte masks */ MOVW $0xff, R17 SLL $8,R17, R16 SLL $16,R17, R13 SLL $24,...
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5,379
sys/src/libc/sparc/muldivrt.s
/* * ulong * _udiv(ulong num, ulong den) * { * int i; * ulong quo; * * if(den == 0) * *(ulong*)-1 = 0; * quo = num; * if(quo > 1<<(32-1)) * quo = 1<<(32-1); * for(i=0; den<quo; i++) * den <<= 1; * quo = 0; * for(; i>=0; i--) { * quo <<= 1; * if(num >= den) { * num -= den; * qu...
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2,422
sys/src/libc/sparc/vlop.s
TEXT _mulv(SB), $0 MOVW u1+8(FP), R8 MOVW u2+16(FP), R13 MOVW R13, R16 /* save low parts for later */ MOVW R8, R12 /* * unsigned 32x32 => 64 multiply */ CMP R13, R8 BLE mul1 MOVW R12, R13 MOVW R16, R8 mul1: MOVW R13, Y ANDNCC $0xFFF, R13, R0 BE mul_shortway ANDCC R0, R0, R9 /* zero partial product ...