repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
cheriot-rtos | github_2023 | cpp | 121 | CHERIoT-Platform | nwf-msr | @@ -291,10 +294,70 @@ static uint16_t crc16(MVM_LONG_PTR_TYPE lp, uint16_t size) {
* The `context` passed to these macros is whatever value that the host passes
* to `mvm_restore`. It can be any value that fits in a pointer.
*/
-#define MVM_CONTEXTUAL_MALLOC(size, context) ({ Timeout t = {0, 0}; heap_allocate(&t,... | https://github.com/microsoft/cheriot-rtos/blob/65cf11b8a4c07e2fddfc3bb0ba23d9490e3bdbe7/sdk/include/cheri-builtins.h#L7-L18 |
cheriot-rtos | github_2023 | cpp | 121 | CHERIoT-Platform | nwf-msr | @@ -291,10 +294,70 @@ static uint16_t crc16(MVM_LONG_PTR_TYPE lp, uint16_t size) {
* The `context` passed to these macros is whatever value that the host passes
* to `mvm_restore`. It can be any value that fits in a pointer.
*/
-#define MVM_CONTEXTUAL_MALLOC(size, context) ({ Timeout t = {0, 0}; heap_allocate(&t,... | Why `__always_inline`? Single call site? |
cheriot-rtos | github_2023 | cpp | 121 | CHERIoT-Platform | nwf-msr | @@ -291,10 +294,70 @@ static uint16_t crc16(MVM_LONG_PTR_TYPE lp, uint16_t size) {
* The `context` passed to these macros is whatever value that the host passes
* to `mvm_restore`. It can be any value that fits in a pointer.
*/
-#define MVM_CONTEXTUAL_MALLOC(size, context) ({ Timeout t = {0, 0}; heap_allocate(&t,... | I realize this hunk is just reformatting, but...
Should this tie into the "gas counter" below somehow? I know that counts in units of VM instructions, and maybe we want to consider `malloc` to be O(1) within a VM instruction, so perhaps not, but OTOH maybe we want to tell `malloc` to give up after `gas_left * rough... |
cheriot-rtos | github_2023 | cpp | 120 | CHERIoT-Platform | rmn30 | @@ -58,7 +58,11 @@ compartment_error_handler(ErrorState *frame, size_t mcause, size_t mtval)
frame->get_register_value<CHERI::RegisterNumber::CRA>()};
if (registerNumber == CHERI::RegisterNumber::CRA &&
returnCapability.address() == 0 &&
+ // Ibex currently has a bug with exception priorities and so
+ ... | ```suggestion
// reports these with the wrong error code, therefore relax the condition a bit.
``` |
cheriot-rtos | github_2023 | others | 113 | CHERIoT-Platform | nwf-msr | @@ -234,8 +242,10 @@ SECTIONS
@software_revoker_header@
- # Magic number
- LONG(0x43f6af90);
+ # Magic number.
+ # New versions of this can be generated with:
+ # head /dev/random | shasum | cut -c 0-8 | While you're adding commentary, xref `sdk/core/loader/types.h:/is_magic_valid`? |
cheriot-rtos | github_2023 | others | 106 | CHERIoT-Platform | nwf-msr | @@ -13,6 +15,10 @@
# error Memory map was not configured with a revoker device
#endif
+DECLARE_AND_DEFINE_INTERRUPT_CAPABILITY(revokerInterruptCapability,
+ RevokerInterrupt, | We expect this to come in from the `board.json`? |
cheriot-rtos | github_2023 | cpp | 106 | CHERIoT-Platform | nwf-msr | @@ -129,6 +129,65 @@ namespace
return (Capability{timeout}.is_valid() && timeout->may_block());
}
+ template<typename T = Revocation::Revoker>
+ bool wait_for_background_revoker(
+ Timeout *timeout,
+ uint32_t epoch,
+ LockGuard<decltype(lock)> &g,
+ T &r = revoker) re... | Stale comment. |
cheriot-rtos | github_2023 | cpp | 106 | CHERIoT-Platform | nwf-msr | @@ -129,6 +129,65 @@ namespace
return (Capability{timeout}.is_valid() && timeout->may_block());
}
+ template<typename T = Revocation::Revoker>
+ bool wait_for_background_revoker(
+ Timeout *timeout,
+ uint32_t epoch,
+ LockGuard<decltype(lock)> &g,
+ T &r = revoker) re... | This comment might belong on the copy above and then be referenced here? |
cheriot-rtos | github_2023 | others | 106 | CHERIoT-Platform | nwf-msr | @@ -101,12 +101,19 @@ SECTIONS
}
.scheduler_globals_end = .;
+ .allocator_sealed_objects : CAPALIGN
+ {
+ .allocator_sealed_objects = .;
+ */cherimcu.allocator.compartment(.sealed_objects)
+ }
+ .allocator_sealed_objects_end = .;
+
.allocator_globals : CAPALIGN
{
.allocator_globals = .;
*/cherimcu.all... | This change could be dropped, if desired (or kept, either way is fine). |
cheriot-rtos | github_2023 | others | 106 | CHERIoT-Platform | nwf-msr | @@ -161,6 +192,43 @@ namespace Ibex
// value because we know it will be the last value + 1.
epoch++;
}
+
+ /**
+ * Block until the revocation epoch specified by `epoch` has completed.
+ */
+ bool wait_for_completion(Timeout *timeout, uint32_t epoch)
+ {
+ uint32_t interruptValue;
+ do
+ {
+ /... | Something about this seems fishy. If it completed after our read of `*interruptFutex` above, then `futex_timed_wait` should bounce us out. So for this asynchrony to result in us missing a wakeup, it would have had to complete before that read, but we checked `has_revocation_finished` after that read. |
cheriot-rtos | github_2023 | cpp | 106 | CHERIoT-Platform | nwf-msr | @@ -129,6 +129,92 @@ namespace
return (Capability{timeout}.is_valid() && timeout->may_block());
}
+ /**
+ * Helper to reacquire the lock after sleeping. This assumes that
+ * `timeout` *was* valid but may have been freed and so checks only that it
+ * has not been invalidated across yielding. If `timeout` r... | While true at the moment, we have, in the past, discussed supporting multiple allocators. Fortunately I think it doesn't much change the story? |
cheriot-rtos | github_2023 | others | 109 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,103 @@
+#!/bin/sh
+
+# Helper script to build multiple configurations of a benchmark. Patches the
+# board description files to enable and disable different combinations of
+# hardware features. Also patches include paths to keep track of the original
+# locations.
+
+set -eo pipefail
+
+SCRIPTPATH=$(dirna... | Stale? |
cheriot-rtos | github_2023 | others | 109 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,103 @@
+#!/bin/sh
+
+# Helper script to build multiple configurations of a benchmark. Patches the
+# board description files to enable and disable different combinations of
+# hardware features. Also patches include paths to keep track of the original
+# locations.
+
+set -eo pipefail | Debian's `dash`, which it uses as `/bin/sh`, apparently doesn't like `-o pipefail`, which seems surprising. |
cheriot-rtos | github_2023 | others | 109 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,103 @@
+#!/bin/sh
+
+# Helper script to build multiple configurations of a benchmark. Patches the
+# board description files to enable and disable different combinations of
+# hardware features. Also patches include paths to keep track of the original
+# locations.
+
+set -eo pipefail
+
+SCRIPTPATH=$(dirna... | I think this also needs to probe for starting with `$`, as in `${sdk}`, which will be expanded by `xmake`?
```suggestion
jq ".driver_includes = (.driver_includes | map_values(. = if . | startswith(\"/\") or startswith(\"\$\") then . else \"${BOARDPATH}/\" + . end))" < $I.json > $I.json.fixed
``` |
cheriot-rtos | github_2023 | others | 72 | CHERIoT-Platform | nwf-msr | @@ -59,29 +75,43 @@ class FlagLock
*/
bool try_lock(Timeout *timeout)
{
- Flag old = Flag::Unlocked;
- if (flag.compare_exchange_strong(old, Flag::Locked))
+ uint32_t old = Flag::Unlocked;
+ auto threadBits = thread_id();
+ uint32_t desired = Flag::Locked | threadBits;
+ if (flag.compare_exch... | It's not particularly relevant for the PR, but remind me what race we're worried about here? |
cheriot-rtos | github_2023 | cpp | 72 | CHERIoT-Platform | nwf-msr | @@ -250,14 +250,9 @@ namespace
"allocation, sleeping",
bytes);
// Drop the lock while yielding
+ auto expected = ++freeFutex; | Again, not really part of _this_ PR, but while you're here: I not sure this dance works as expected. Consider a situation involving three threads:
* T1 makes it to the `g.unlock()` below, having incremented `freeFutex` to `1`.
* T2 performs a `free` that could satisfy `T1`, sees `freeFutex > 0`, resets it to `0`, ... |
cheriot-rtos | github_2023 | cpp | 72 | CHERIoT-Platform | nwf-msr | @@ -59,6 +59,27 @@ namespace
*/
sched::Thread *futexWaitingList;
+ /**
+ * Returns the boosted priority provided by waiters on a futex.
+ *
+ * This finds the maximum priority of all threads waiting on the futex.
+ * Callers may be about to add a new thread to that list and so another
+ * priority can be pr... | `threadID` is unused?
The comment speaks of "the futex" but this looks to compute the maximum priority of any waiting thread whose priority is boosted?
I was expecting, I think, this function to take the `futexWaitAddress` that some thread is about to block on and filter the `futexWaitingList` for just that addre... |
cheriot-rtos | github_2023 | cpp | 72 | CHERIoT-Platform | nwf-msr | @@ -553,14 +599,45 @@ int futex_timed_wait(Timeout *timeout,
return 0;
}
Thread *currentThread = Thread::current_get();
- Debug::log("{} waiting on futex {} for {} ticks",
- currentThread,
+ Debug::log("Thread {} waiting on futex {} for {} ticks",
+ currentThread->id_get(),
... | Since `*address` is not marked `volatile` (and is marked `const`), it seems like there risk the compiler could replace `blockingThreadID` with `*address` in each occurrence. I know we're running with IRQs off here but thinking about the impending DMA-capable future...
If we really need its ID, perhaps `blockingThre... |
cheriot-rtos | github_2023 | cpp | 72 | CHERIoT-Platform | nwf-msr | @@ -553,14 +599,45 @@ int futex_timed_wait(Timeout *timeout,
return 0;
}
Thread *currentThread = Thread::current_get();
- Debug::log("{} waiting on futex {} for {} ticks",
- currentThread,
+ Debug::log("Thread {} waiting on futex {} for {} ticks",
+ currentThread->id_get(),
... | 🚲🏚️ing: Maybe `owning` rather than `blocking`? Yes, that thread is blocking our progress, so I understand, but also *we're* about to block on that thread's ownership of this futex. (Naming things is _hard_!) |
cheriot-rtos | github_2023 | cpp | 72 | CHERIoT-Platform | nwf-msr | @@ -512,11 +564,25 @@ namespace sched
/// right after waking up (but before clearing the bits if
/// clearOnExit is set). 0 if it's woken up due to timer expiry.
EventBits eventWaitBits;
- /**
- * If this thread is blocked on a futex, this holds the address of
- * the futex. This is set to 0 if wok... | Ah, I realized part of my confusion above: I was sometimes reading this with subject and object switched, as the thread that's boosting us. Maybe (⚠️:🚲🏠) `futexPriorityBoostedThread` instead? |
cheriot-rtos | github_2023 | others | 108 | CHERIoT-Platform | nwf | @@ -81,6 +81,10 @@ The name is used to refer to this in software and must be a valid C identifier.
The number is the interrupt number.
The priority is the priority with which this interrupt will be configured in the interrupt controller.
+Interrupts may optionally have an `edge_triggered` property (if this is omitt... | ```suggestion
Interrupts that are edge triggered are automatically completed by the scheduler; they do not require a call to `interrupt_complete`.
``` |
cheriot-rtos | github_2023 | others | 108 | CHERIoT-Platform | nwf | @@ -361,7 +361,11 @@ rule("firmware")
local interruptConfiguration = "CHERIOT_INTERRUPT_CONFIGURATION="
for _, interrupt in ipairs(board.interrupts) do
interruptNames = interruptNames .. interrupt.name .. "=" .. math.floor(interrupt.number) .. ", "
- interruptConfiguration = interruptConfiguration .. "{... | While you're in the neighborhood, could you add a comment that these are initializers for `sched::InterruptController::Interrupt` structures? |
cheriot-rtos | github_2023 | cpp | 108 | CHERIoT-Platform | nwf | @@ -139,6 +145,10 @@ namespace sched
{
if (ConfiguredInterrupts[i].number == uint32_t(source))
{
+ if (ConfiguredInterrupts[i].isEdgeTriggered) | Is this really the right place to do this? `futex_word_for_source` is called by `interrupt_futex_get`, which is (AIUI) meant to be used in initialization, not necessarily when an interrupt has happened. Perhaps this belongs in the other caller of `futex_word_for_source`, namely `do_external_interrupt`?
Separately,... |
cheriot-rtos | github_2023 | cpp | 98 | CHERIoT-Platform | davidchisnall | @@ -523,6 +534,11 @@ namespace loader
return compartments[Allocator];
}
+ [[nodiscard]] const PrivilegedCompartment &token_server() const | Maybe add a comment here explaining what it is? I don't really like the token_server name anymore: it's not a token server, it's a helper library that does a fast path for some allocator functions. We possibly want to move `heap_can_free` and `heap_quota_remaining` it as well at some point, since these are pure funct... |
cheriot-rtos | github_2023 | cpp | 98 | CHERIoT-Platform | davidchisnall | @@ -1066,6 +1080,7 @@ extern "C" SchedulerEntryInfo loader_entry_point(const ImgHdr &imgHdr,
switcherKey.bounds() = 1;
setSealingKey(imgHdr.scheduler(), Scheduler);
setSealingKey(imgHdr.allocator(), Allocator);
+ setSealingKey(imgHdr.token_server(), Allocator); | Perhaps remove PermitSeal from this one? |
cheriot-rtos | github_2023 | others | 98 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,101 @@
+#include <compartment-macros-asm.S>
+#include <cheri-builtins.h>
+#include "../allocator/token.h"
+
+/*
+ * An in-assembler, libcall-able implementation of
+ *
+ * [[cheri::interrupt_state(disabled)]] void *__cheri_compartment("token_server") | This should be `__cheri_libcall` not `__cheri_compartment`. |
cheriot-rtos | github_2023 | others | 98 | CHERIoT-Platform | davidchisnall | @@ -37,12 +37,14 @@ echo Sources: ${SOURCES}
rm -f tidy-*.fail
# sh syntax is -c "string" [name [args ...]], so "tidy" here is the name and not included in "$@"
-echo ${HEADERS} ${SOURCES} | xargs -P${PARALLEL_JOBS} -n5 sh -c "${CLANG_TIDY} -export-fixes=\$(mktemp -p. tidy.fail-XXXX) \$@" tidy
-if [ $(find . -maxde... | What is this about? I think it might be accidentally included with this PR? |
cheriot-rtos | github_2023 | cpp | 98 | CHERIoT-Platform | davidchisnall | @@ -1066,6 +1084,11 @@ extern "C" SchedulerEntryInfo loader_entry_point(const ImgHdr &imgHdr,
switcherKey.bounds() = 1;
setSealingKey(imgHdr.scheduler(), Scheduler);
setSealingKey(imgHdr.allocator(), Allocator);
+ setSealingKey(imgHdr.object_fast_paths(), | I still don't really like this name. Object is very broad. This is the allocator fast paths library: it holds the allocator's key and adding anything that is not logically part of the allocator to it could break the security. |
cheriot-rtos | github_2023 | cpp | 98 | CHERIoT-Platform | davidchisnall | @@ -492,6 +501,8 @@ namespace loader
Scheduler,
/// The memory allocator
Allocator,
+ /// The token server
+ TokenServer, | This probably wants to be consistently named with the accessor. I'd suggest `AllocatorLibrary`. |
cheriot-rtos | github_2023 | others | 98 | CHERIoT-Platform | davidchisnall | @@ -167,6 +169,17 @@ rule("cherimcu.privileged-compartment")
target:add("defines", "CHERIOT_AVOID_CAPRELOCS")
end)
+rule("cherimcu.privileged-library")
+ add_deps("cherimcu.component")
+ on_load(function (target)
+ -- Mark this target as a CHERIoT compartment.
+ target:set("cherimcu.type", "compartment")
+ ta... | Shouldn't these be library? |
cheriot-rtos | github_2023 | others | 98 | CHERIoT-Platform | davidchisnall | @@ -188,6 +201,13 @@ target("cherimcu.allocator")
target:set('cherimcu.debug-name', "allocator")
end)
+target("cheriot.object_fast_paths")
+ add_rules("cherimcu.privileged-library", "cherimcu.component-debug")
+ add_files(path.join(coredir, "object_fast_paths/token_unseal.S"))
+ on_load(function (target)
+ targ... | Is this needed? It's used to override the compartment flag value, but we shouldn't be passing that at all when building a library. |
cheriot-rtos | github_2023 | cpp | 104 | CHERIoT-Platform | rmn30 | @@ -176,6 +177,24 @@ size_t __cheri_compartment("alloc")
*/
void __cheri_compartment("alloc") heap_quarantine_empty(void);
+/**
+ * Returns true if `object` points to a valid heap address, false otherwise.
+ * Note that this does *not* check that this is a valid pointer. This should
+ * be used in conjunction wit... | Is `address==heap_end` really on the heap? Would expect `<` there. |
cheriot-rtos | github_2023 | cpp | 90 | CHERIoT-Platform | rmn30 | @@ -183,26 +183,40 @@ namespace Revocation
* Otherwise, there are at least two words of the bitmap that need
* to be updated with the masks, and possibly some in between that
* just need to be set wholesale.
+ *
+ * We paint ranges "backwards", from highest address to lowest, so
+ * that we neve... | Could `topWordIdx` ever be `0`? |
cheriot-rtos | github_2023 | others | 96 | CHERIoT-Platform | rmn30 | @@ -405,11 +405,20 @@ rule("firmware")
"\n\t\tbootTStack = .;" ..
"\n\t\t. += " .. loader_trusted_stack_size .. ";" ..
"\n\t}\n"
+ -- Stacks must be less than this size or truncating them in compartment
+ -- switch will encounter precision errors. | ```suggestion
-- switch will encounter precision errors.
```
```suggestion
-- switch may encounter precision errors.
``` |
cheriot-rtos | github_2023 | cpp | 95 | CHERIoT-Platform | nwf-msr | @@ -39,19 +39,17 @@ EXPORT_ASSEMBLY_OFFSET(TrustedStack, mshwmb, (17 * 8) + 4)
// unwinding information, and then a single trusted stack frame used for the
// unwind state of the initial thread. (7 * 8) is the size of TrustedStackFrame | Comment wants updating, too? |
cheriot-rtos | github_2023 | others | 95 | CHERIoT-Platform | nwf-msr | @@ -31,7 +31,7 @@ riscv32-unknown-unknown
-DDEVICE_EXISTS_shadow
-DDEVICE_EXISTS_uart
-DDEVICE_EXISTS_clint
--DCHERIOT_LOADER_TRUSTED_STACK_SIZE=208
+-DCHERIOT_LOADER_TRUSTED_STACK_SIZE=192 | Please add a comment explaining how this number is calculated, if it can't be made formulaic. |
cheriot-rtos | github_2023 | others | 95 | CHERIoT-Platform | nwf-msr | @@ -639,7 +639,7 @@ target("cheriot.loader")
target:set('cherimcu.debug-name', "loader")
local config = {
-- Size in bytes of the trusted stack.
- loader_trusted_stack_size = 224,
+ loader_trusted_stack_size = 208, | Please add a comment explaining how this number is calculated, if it can't be made formulaic. |
cheriot-rtos | github_2023 | cpp | 95 | CHERIoT-Platform | nwf-msr | @@ -39,19 +39,17 @@ EXPORT_ASSEMBLY_OFFSET(TrustedStack, mshwmb, (17 * 8) + 4)
// unwinding information, and then a single trusted stack frame used for the
// unwind state of the initial thread. (7 * 8) is the size of TrustedStackFrame
// and will match the value below.
-EXPORT_ASSEMBLY_SIZE(TrustedStack, TSTACK_REG... | While here, maybe `6 * sizeof(uintptr_t)` would be more clear (and also above, if you agree). |
cheriot-rtos | github_2023 | cpp | 91 | CHERIoT-Platform | davidchisnall | @@ -1011,18 +1011,15 @@ __noinline static SealedAllocation unseal_internal(SKey rawKey, SObj obj)
return unsealed;
}
+extern "C" void *
+token_obj_unseal_internal(struct SKeyStruct *, struct SObjStruct *);
+
void *token_obj_unseal(SKey rawKey, SObj obj)
{
- LockGuard g{lock};
- auto unsealed = unseal_intern... | This wrapper is a bit unfortunate, since it now means two indirect and one direct function call to land in the right place. The right thing to do is probably to create the export table entry in assembly (ideally with some macos added to `compartment-macros.h`. |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,73 @@
+#include <cheri-builtins.h>
+#include "token.h"
+
+/*
+ * void *
+ * token_obj_unseal_internal(struct SKeyStruct *ca0, struct SObjStruct *ca1)
+ *
+ * Register allocation:
+ *
+ * - ca0 holds a sealing key, either the user's or the real deal, and is
+ * replaced with the unsealed value or NULL
+ *... | Since this isn't inline assembly, can we give labels sensible names (e.g. `.Lexit_failure`)? |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -182,6 +182,7 @@ target("cherimcu.switcher")
target("cherimcu.allocator")
add_rules("cherimcu.privileged-compartment", "cherimcu.component-debug")
add_files(path.join(coredir, "allocator/main.cc"))
+ add_files(path.join(coredir, "allocator/token_unseal.S")) | I wonder if the right thing to do is allow compartments to export library functions. I think that might actually work in the loader already. A library function exported from a compartment will have access to the compartment's PCC but not the CGP. That said, we may want to give the library function a much smaller PCC... |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,73 @@
+#include <cheri-builtins.h>
+#include "token.h"
+
+/*
+ * void *
+ * token_obj_unseal_internal(struct SKeyStruct *ca0, struct SObjStruct *ca1)
+ *
+ * Register allocation:
+ *
+ * - ca0 holds a sealing key, either the user's or the real deal, and is
+ * replaced with the unsealed value or NULL
+ *... | And the fact that we're running with interrupts disabled, so the object can't be cleared out from under us. This means that this approach can't work on multicore systems, which is a shame. |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,73 @@
+#include <cheri-builtins.h>
+#include "token.h"
+
+/*
+ * void *
+ * token_obj_unseal_internal(struct SKeyStruct *ca0, struct SObjStruct *ca1)
+ *
+ * Register allocation:
+ *
+ * - ca0 holds a sealing key, either the user's or the real deal, and is
+ * replaced with the unsealed value or NULL
+ *... | Why are we checking that the base == address? We probably could optimise for size later by providing compartments with ranges of sealing keys.
The check that we might want is that the address > 16, to make sure that it's a software key and we don't accidentally allow unsealing zeroed things. |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -31,6 +31,10 @@ SECTIONS
*/cherimcu.allocator.compartment(.compartment_export_table);
.allocator_export_table_end = .;
+ .token_server_export_table = ALIGN(8);
+ */cherimcu.token_server.compartment(.compartment_export_table); | At some point soon, I intend to do an s/cherimcu/cheriot/ in the xmake for these things. Can you do this preemptively for the new things so that we don't regress? |
cheriot-rtos | github_2023 | cpp | 91 | CHERIoT-Platform | davidchisnall | @@ -482,6 +482,15 @@ namespace loader
{
return code.start();
}
+
+ /**
+ * Privileged libraries are privileged compartments without data
+ * segments.
+ */
+ [[nodiscard]] bool is_privileged_library() const
+ {
+ return (data.start() == 0) && (data.size() == 0); | This possibly should check that the length is 0. It's possible that some memory layout will make address 0 usable memory. |
cheriot-rtos | github_2023 | others | 91 | CHERIoT-Platform | davidchisnall | @@ -37,12 +37,14 @@ echo Sources: ${SOURCES}
rm -f tidy-*.fail
# sh syntax is -c "string" [name [args ...]], so "tidy" here is the name and not included in "$@"
-echo ${HEADERS} ${SOURCES} | xargs -P${PARALLEL_JOBS} -n5 sh -c "${CLANG_TIDY} -export-fixes=\$(mktemp -p. tidy.fail-XXXX) \$@" tidy
-if [ $(find . -maxde... | What is this and where is it set? |
cheriot-rtos | github_2023 | cpp | 91 | CHERIoT-Platform | davidchisnall | @@ -38,6 +38,8 @@ __BEGIN_DECLS
*/
SKey __cheri_compartment("alloc") token_key_new(void);
+typedef __cheri_callback void *(*Token_Allocator)(Timeout *, SObj, size_t); | This is odd capitalisation. Doesn't clang-tidy tell you to remove the underscore? |
cheriot-rtos | github_2023 | cpp | 91 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,82 @@
+#include <cheri.hh>
+#include <debug.hh>
+#include <token.h>
+
+#include "../allocator/token.h"
+
+using Debug = ConditionalDebug<DEBUG_TOKEN_SERVER, "Token Server">;
+
+using namespace CHERI;
+
+/**
+ * Helper that allocates a sealed object and returns the sealed and
+ * unsealed capabilities to the ... | This chunk probably needs to run with interrupts disabled. I'm a bit nervous about this decoupling because the security of this code depends on the invariant that no unsealed pointer to the outer object exists anywhere in the system other than in the allocator / token code. Now that the allocator is untrused, it's tr... |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -89,8 +89,19 @@ start:
cspecialrw ca3, mscratchc, ca3
// ca4 still has the RW memory root; nothing to change
// The return value is SchedEntryInfo.
- cincoffset csp, csp, -16 - CONFIG_THREADS_NUM * BOOT_THREADINFO_SZ
- csetbounds ca0, csp, 16 + CONFIG_THREADS_NUM * BOOT_THREADINFO_SZ
+
+ // Calculate space ... | Assuming it's correct...
```suggestion
// scheduler. This is a `class ThreadInfo` from `loader/types.h`.
``` |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -31,8 +31,7 @@ riscv32-unknown-unknown
-DDEVICE_EXISTS_shadow
-DDEVICE_EXISTS_uart
-DDEVICE_EXISTS_clint
--DCONFIG_THREADS={{1,2,1024,5},{2,1,1024,5},{3,1,1024,5},}
--DCONFIG_THREADS_ENTRYPOINTS={LA_ABS(__export_test_runner__Z9run_testsv),LA_ABS(__export_thread_pool__Z15thread_pool_runv),LA_ABS(__export_thread_po... | You might explain why 208? This is also set to 224 down in sdk/xmake.lua? |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -352,24 +352,69 @@ rule("firmware")
add_defines(interruptConfiguration)
end
+ local loader = target:deps()['cheriot.loader'];
+ local loader_stack_size = loader:get('loader_stack_size')
+ local loader_trusted_stack_size = loader:get('loader_trusted_stack_size')
+
-- Get the threads config and prepare ... | ```suggestion
-- Build a `class ThreadConfig` for a thread
local thread_template =
``` |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -352,24 +352,69 @@ rule("firmware")
add_defines(interruptConfiguration)
end
+ local loader = target:deps()['cheriot.loader'];
+ local loader_stack_size = loader:get('loader_stack_size')
+ local loader_trusted_stack_size = loader:get('loader_trusted_stack_size')
+
-- Get the threads config and prepare ... | ```suggestion
-- Declare space and start and end symbols for a thread's C stack
local thread_stack_template =
``` |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -352,24 +352,69 @@ rule("firmware")
add_defines(interruptConfiguration)
end
+ local loader = target:deps()['cheriot.loader'];
+ local loader_stack_size = loader:get('loader_stack_size')
+ local loader_trusted_stack_size = loader:get('loader_trusted_stack_size')
+
-- Get the threads config and prepare ... | ```suggestion
-- Declare space and start and end symbols for a thread's trusted stack
local thread_trusted_stack_template =
``` |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -192,12 +193,23 @@ SECTIONS
SHORT(@library_count@);
# Number of compartment headers.
SHORT(@compartment_count@);
-
@compartment_headers@
+ }
+ # Thread configuration. This follows the compartment headers but is in a
+ # separate section to make auditing easier. | ```suggestion
# separate section to make auditing easier.
# This section holds a `class ThreadInfo` (loader/types.h)
``` |
cheriot-rtos | github_2023 | cpp | 93 | CHERIoT-Platform | nwf-msr | @@ -1004,6 +933,17 @@ extern "C" SchedulerEntryInfo loader_entry_point(const ImgHdr &imgHdr,
void *almightySeal,
void *almightyRW)
{
+ // This relies on a slightly surprising combination of two C++ featu... | Can you expand on what "This" is? I'm sure it's quite informative, but this comment (or, at least, the `SchedulerEntryInfo` type) seems unrelated to the rest of the PR? |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -89,8 +89,19 @@ start:
cspecialrw ca3, mscratchc, ca3
// ca4 still has the RW memory root; nothing to change
// The return value is SchedEntryInfo.
- cincoffset csp, csp, -16 - CONFIG_THREADS_NUM * BOOT_THREADINFO_SZ
- csetbounds ca0, csp, 16 + CONFIG_THREADS_NUM * BOOT_THREADINFO_SZ
+
+ // Calculate space ... | What's 16, here? |
cheriot-rtos | github_2023 | cpp | 93 | CHERIoT-Platform | nwf-msr | @@ -124,8 +124,10 @@ namespace sched
for (size_t i = 0; auto *threadSpace : threadSpaces)
{
+ Debug::log("Created thread for trusted stack {}",
+ info[i].trustedStack);
Thread *th = new (threadSpace)
- Thread(info[i].trustedStack, info[i].threadid, info[i].priority);
+ Thread(info[i].... | This seems a little strange to me, since it means that the small-integer thread IDs are now assigned by link order (and will eventually be assigned by the outcome of sorting stacks for capalign packing), right? If they show up in logging output, their mysterious sourcing might be unsettling? (I don't think they show ... |
cheriot-rtos | github_2023 | others | 93 | CHERIoT-Platform | nwf-msr | @@ -126,7 +136,8 @@ start:
// All other registers will be cleared in the clear-regs block
// Pass the array of threadInfos as first argument.
- csetbounds ca0, csp, CONFIG_THREADS_NUM * BOOT_THREADINFO_SZ
+ addi s1, s1, -16 | This one, too, could benefit from being an `EXPORT_ASSEMBLY_OFFSET`. |
cheriot-rtos | github_2023 | others | 89 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,220 @@
+Writing a CHERIoT Device Driver
+===============================
+
+CHERIoT aims to be small and easy to customize.
+It does not have a generic device driver interface but it does have a number of tools that make it possible to write modular device drivers.
+
+What is a device?
+-----------------
+
+... | ```suggestion
The `MMIO_CAPABILITY` macro is used to get a pointer to memory-mapped I/O devices.
``` |
cheriot-rtos | github_2023 | others | 89 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,220 @@
+Writing a CHERIoT Device Driver
+===============================
+
+CHERIoT aims to be small and easy to customize.
+It does not have a generic device driver interface but it does have a number of tools that make it possible to write modular device drivers.
+
+What is a device?
+-----------------
+
+... | I hate to nit pick but isn't it the struct that is volatile, not the pointer? |
cheriot-rtos | github_2023 | others | 89 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,220 @@
+Writing a CHERIoT Device Driver
+===============================
+
+CHERIoT aims to be small and easy to customize.
+It does not have a generic device driver interface but it does have a number of tools that make it possible to write modular device drivers.
+
+What is a device?
+-----------------
+
+... | incomplete sentence. |
cheriot-rtos | github_2023 | others | 89 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,220 @@
+Writing a CHERIoT Device Driver
+===============================
+
+CHERIoT aims to be small and easy to customize.
+It does not have a generic device driver interface but it does have a number of tools that make it possible to write modular device drivers.
+
+What is a device?
+-----------------
+
+... | We really need tooling for this. Manually interpreting binary representation of structs is not fun. |
cheriot-rtos | github_2023 | others | 89 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,220 @@
+Writing a CHERIoT Device Driver
+===============================
+
+CHERIoT aims to be small and easy to customize.
+It does not have a generic device driver interface but it does have a number of tools that make it possible to write modular device drivers.
+
+What is a device?
+-----------------
+
+... | ```suggestion
The `ethernetFutex` pointer is now a read-only capability (attempting to store through it will trap) that contains a number that is incremented every time the ethernet interrupt fires.
``` |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -52,6 +52,18 @@ namespace Revocation
shadowCap = const_cast<WordT *>(MMIO_CAPABILITY(WordT, shadow));
}
+ WordT shadow_paint_bits_above(ptraddr_t addr)
+ {
+ size_t capoffset = (addr - TCMBaseAddr) >> MallocAlignShift; | This bit of arithmetic appears four times in the patch, it would probably be good to move it to a separate helper function. |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -87,41 +99,58 @@ namespace Revocation
*/
void shadow_paint_range(ptraddr_t base, ptraddr_t top, bool fill)
{
- constexpr size_t ShadowWordAddrMask =
- (1U << (ShadowWordShift + MallocAlignShift)) - 1;
- ptraddr_t baseUp =
- (base + ShadowWordAddrMask) & ~ShadowWordAddrMask;
- ptraddr_t topDow... | These are the other two cases of the same arithmetic. |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -52,6 +52,18 @@ namespace Revocation
shadowCap = const_cast<WordT *>(MMIO_CAPABILITY(WordT, shadow));
}
+ WordT shadow_paint_bits_above(ptraddr_t addr)
+ {
+ size_t capoffset = (addr - TCMBaseAddr) >> MallocAlignShift;
+ return ~((1U << (capoffset & ShadowWordMask)) - 1); | ```suggestion
return ~shadow_paint_bits_below();
```
If I understand the logic here correctly, then these two functions must, between them, set all bits when called on the same value. I think you can make them both `constexpr` and then `static_assert` this for some values. |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -52,6 +52,18 @@ namespace Revocation
shadowCap = const_cast<WordT *>(MMIO_CAPABILITY(WordT, shadow));
}
+ WordT shadow_paint_bits_above(ptraddr_t addr) | Minor pedantry, but I don't really like the names of these two. `paint` is both a verb and a noun (and we have a style guide rule to avoid those words!) and it took me a couple of reads of the function to realise that you meant the noun and not the verb form. Maybe `shadow_bits_below_address`? |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -87,41 +99,58 @@ namespace Revocation
*/
void shadow_paint_range(ptraddr_t base, ptraddr_t top, bool fill)
{
- constexpr size_t ShadowWordAddrMask =
- (1U << (ShadowWordShift + MallocAlignShift)) - 1;
- ptraddr_t baseUp =
- (base + ShadowWordAddrMask) & ~ShadowWordAddrMask;
- ptraddr_t topDow... | ```suggestion
midWord = ~WordT(0);
```
You are currently relying on `WordT` being smaller than `int` or signed, implicitly. |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | davidchisnall | @@ -52,6 +52,18 @@ namespace Revocation
shadowCap = const_cast<WordT *>(MMIO_CAPABILITY(WordT, shadow));
}
+ WordT shadow_paint_bits_above(ptraddr_t addr)
+ {
+ size_t capoffset = (addr - TCMBaseAddr) >> MallocAlignShift;
+ return ~((1U << (capoffset & ShadowWordMask)) - 1);
+ }
+
+ WordT shadow_paint_... | ```suggestion
return (WordT(1) << (capoffset & ShadowWordMask)) - 1;
``` |
cheriot-rtos | github_2023 | cpp | 52 | CHERIoT-Platform | mjp41 | @@ -87,52 +120,69 @@ namespace Revocation
*/
void shadow_paint_range(ptraddr_t base, ptraddr_t top, bool fill)
{
- constexpr size_t ShadowWordAddrMask =
- (1U << (ShadowWordShift + MallocAlignShift)) - 1;
- ptraddr_t baseUp =
- (base + ShadowWordAddrMask) & ~ShadowWordAddrMask;
- ptraddr_t topDo... | Would it be better to make `fill` a template parameter? It is statically known at both call sites. Might increase code size, but might be neutral?
|
cheriot-rtos | github_2023 | cpp | 88 | CHERIoT-Platform | rmn30 | @@ -1223,13 +1223,24 @@ class MState
{
return nullptr;
}
- if (revoker.shadow_bit_get(address))
+ // If we don't have shadow bits, skip this check and just assume that
+ // this is the start of a capability. This mode is for benchmark | ```suggestion
// this is the start of an allocation. This mode is for benchmark
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,97 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | This might be a good place to mention the default one used by `malloc()`? Or at least foreshadow the section below.
It's a shame there isn't a good way to link to a symbol in the source tree (absent using something like Sphinx, but that's a whole world view unto itself); I guess just referring to
https://github.co... |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,97 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
We do not provide an implementation of `realloc` because it is dangerous in a single-provenance pointer model.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,97 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | (But the old delete is just fine? ;)) |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | Aside: does/should it support comments as well, a la something like hjson? (Annoyingly, hjson does not support hex numbers, which is significantly more important for our use, otherwise I'd suggest we just point people at that.) |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | This section probably needs a bit more verbiage and/or some worked examples. As a naïve reader, I don't think I'd understand what's here. Maybe something like...
If a shared heap is in use, our security guarantees depend on its backing memory being subject to the "capability load filter".
(This further re... |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | Is that not also true of `end`? |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | This is a little misnamed at the moment because it also includes data, right? (In principle we could have ((E)EP)ROM or FLASH backing instructions, RAM backing data, and RAM+shadow backing the heap, yes?) |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | Mention the "shadow" MMIO device (and maybe we should take this as motivation to rename that to something better... "heap_load_filter_bitmap"?) |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,64 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator gen... | Maybe better describe this as the preemptive scheduling quantum. We have pondered moving to tickless scheduling and could, I think, pretty readily decouple the sleep quantum from the scheduling quantum (if we haven't already?). |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | Maybe this is an American vs British English thing, but I'd prefer a split infinitive or
```suggestion
Interrupts are mapped to futexes and so it's important to understand how futexes work, first.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | ```suggestion
A futex (fast userspace mutex) is traditional but something of a misnomer on CHERIoT RTOS, where there is no kernel / userspace distinction (the scheduler is a component that is not trusted by the rest of the system for confidentiality or integrity).
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | ```suggestion
This primitive readily enables sleeping while avoiding missed wakeups.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | ```suggestion
This primitive can be used to implement locks (that yield the CPU, avoiding spin-waits).
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | ```suggestion
This mechanism allows multiple threads to wait for the same interrupt and perform different bits of processing, for example a network stack may receive an interrupt to detect that a packet needs handling and a lower-priority thread may record telemetry on the number of packet interrupts that have been re... |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | ```suggestion
Because interrupt futexes are just normal futexes, they can also be used with the [multiwaiter](../sdk/include/multiwater.h) API, for example to wait for an interrupt or a message from another thread, whichever happens first.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | Are these exposed in the linker's audit summary? (I don't think they necessarily have to be, but it could be a side-channel between compartments.) |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,53 @@
+Interrupt handling in CHERIoT RTOS
+==================================
+
+CHERIoT RTOS does not allow user code to run directly from the interrupt handler.
+The scheduler has a separate stack that is used to run interrupt handler and this then maps interrupts to scheduler events.
+This allows interrup... | This probably needs some more blinkenlights: if multiple threads wait on an interrupt, only one of them should acknowledge each firing, right? Do I need anything but the read-only count capability to call `interrupt_complete`? |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | More generally, external hardware is "state beyond the current compartment"... include "updating das blinkenlights" and "firing the missiles" in that list? |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | Maybe draw out the distinction a bit more... something like this, perhaps:
```suggestion
Dynamic software-defined capabilities are (by necessity) exposed to the allocating compartment and must be passed to other compartments (usually in response to some request).
It is often useful to be able to provide software-def... |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | ```suggestion
The simplest case for this is (allocator capabilities)[Allocator.md], which authorise allocation (and so are necessary to be able to create any dynamic software-defined capabilities!).
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | ```suggestion
These capabilities use the allocator's token mechanism and so can be unsealed only with the relevant authorising capability.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | ```suggestion
Objects created in this way are allocated outside of any compartment's global region and are accessed only via capabilities provided by the loader.
The initial contents of these objects are specified during definition, which is often located within a compartment that does not have the rights to unseal t... |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,96 @@
+Static sealed objects in CHERIoT RTOS
+=====================================
+
+CHERIoT is a capability system.
+This extends from the hardware (all memory accesses require an authorising capability in a register, provided as an operand to an instruction) up through the software abstractions in the RT... | What goes wrong if I try? Is the explosion at compile time, link time, load time, or run time? If run time, do I just see a 0 tag on the pointer value? |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,98 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
These are created by the `DECLARE_AND_DEFINE_DEFINE_ALLOCATOR_CAPABILITY` macro, which takes two arguments.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,98 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
This capability may then be accessed with the `STATIC_SEALED_VALUE` macro, which takes the name as the argument.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,98 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
The standard C/C++ interfaces do not respect this principle and so are implemented as wrappers that use a default allocator capability (see below).
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,98 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
The `contents` is a hex encoding of the contents of the allocator capability.
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,98 @@
+The CHERIoT RTOS memory allocator
+=================================
+
+The CHERIoT platform was designed to support a (safe) shared heap.
+This means that embedded systems that contain multiple mutually distrusting components do not need to pre-reserve memory and so the total SRAM requirement is the ... | ```suggestion
These functions will fail if the allocator capability does not have sufficient remaining quota to handle the allocation (or if the allocator itself is out of memory).
``` |
cheriot-rtos | github_2023 | others | 84 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,111 @@
+CHERIoT RTOS Board Descriptions
+===============================
+
+CHERIoT RTOS is intended to run on any core that implements the CHERIoT ISA.
+Our initial prototype was a modification of the Flute core, our initial production implementation is based on Ibex, and we also use a software simulator ge... | ```suggestion
Our security guarantees for the shared heap depend on the mechanism that allows the allocator to mark memory as quarantined.
``` |
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