repo_name stringlengths 1 62 | dataset stringclasses 1
value | lang stringclasses 11
values | pr_id int64 1 20.1k | owner stringlengths 2 34 | reviewer stringlengths 2 39 | diff_hunk stringlengths 15 262k | code_review_comment stringlengths 1 99.6k |
|---|---|---|---|---|---|---|---|
cheriot-rtos | github_2023 | others | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,125 @@
+Safe Configuration Management
+=============================
+
+This example shows how dynamic configuration changes can be made to compartments using the ChERIoT features of static sealed capabilities, memory claims, a futex, and a sandbox compartment for validating untrusted data.
+
+In this model ... | We try to follow a convention in Markdown of one sentence per line. It makes it easier to review diffs because changing one sentence doesn't affect the rest of the paragraph. |
cheriot-rtos | github_2023 | others | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,125 @@
+Safe Configuration Management
+=============================
+
+This example shows how dynamic configuration changes can be made to compartments using the ChERIoT features of static sealed capabilities, memory claims, a futex, and a sandbox compartment for validating untrusted data.
+
+In this model ... | Note that this still means that subscribers *are* trusted for availability. They can infinite loop in the callback and that will prevent any other notifications being delivered. You could avoid this by exposing a read-only capability to a `uint32_t` that they then did a futex wait on (for C++, using `std::atomic<uint... |
cheriot-rtos | github_2023 | others | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,125 @@
+Safe Configuration Management
+=============================
+
+This example shows how dynamic configuration changes can be made to compartments using the ChERIoT features of static sealed capabilities, memory claims, a futex, and a sandbox compartment for validating untrusted data.
+
+In this model ... | You probably don't need the error handler in the validator to do anything. If it returns `int`, errors will be reported as `-ECOMPARTMENTFAIL`. |
cheriot-rtos | github_2023 | others | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,125 @@
+Safe Configuration Management
+=============================
+
+This example shows how dynamic configuration changes can be made to compartments using the ChERIoT features of static sealed capabilities, memory claims, a futex, and a sandbox compartment for validating untrusted data.
+
+In this model ... | Both are equally easy in the auditing framework. |
cheriot-rtos | github_2023 | cpp | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,78 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+// Contributed by Configured Things Ltd
+
+#include <compartment.h>
+#include <debug.hh>
+#include <fail-simulator-on-error.h>
+#include <thread.h>
+
+// Define a sealed capability that gives this compartment
+// read... | It would be nice to have slightly more descriptive names for these. |
cheriot-rtos | github_2023 | cpp | 264 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,78 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+// Contributed by Configured Things Ltd
+
+#include <compartment.h>
+#include <debug.hh>
+#include <fail-simulator-on-error.h>
+#include <thread.h>
+
+// Define a sealed capability that gives this compartment
+// read... | Since we have a claim on this, it is probably better to use `std::unique_ptr`, which will free on assignment automatically. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | This bit of the comment might be more naturally associated with the `using ObjectRing` above? That `using` could, I think, move into the `LinkedObject` class were that to be a more natural place for it (the `Sentinel<ObjectRing>` below would have to become `Sentinel<LinkedObject::ObjectRing>`, but otherwise nothing ch... |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | This is all true, but it might skip over some steps. Perhaps something like...
`ds::linked_list`-s are circular, doubly-linked collections. While they can stand on their own as rings of objects, it is sometimes convenient to create a designated "sentinel" node that participates in the collection without being part... |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | This is a really good point and is more general than just the sentinel: don't mix heap and stack allocated objects in a `ds::linked_list` in general! All of our `cell` implementations will crash in one way or another if you try. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | `==` on pointers in CHERI C/C++ presently defaults to address-only equality. You might use `__builtin_cheri_equal_exact`, or wrap with `Capability` first (since its `operator==` uses that primitive), to be more stringent. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | ```suggestion
TEST(!objects.is_empty(), "The list is empty after adding objects.");
``` |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | More idiomatically, there's `.search()` on the `Sentinel`, though it's probably not bad to demonstrate the raw form as well. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | rmn30 | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | Aside: would be nice to have a `TEST_EQUAL` to make this pattern less repetitive. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | Speaking of `Sentinel.search`, `cell::remove` makes the claim that it can be used within if one is careful. It'd be good to both validate that that isn't a stale claim and, if all's good, demonstrate that somewhere in here, too. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | It might be worth pointing out that `middle` is, after this, still a valid handle to a valid collection of objects that have become detached from the sentinel. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | It may be worth expanding on this comment. It's typical that `T *remove(T*)` methods return the thing being removed, but `ds::linked_list::cell::remove` breaks that expectation (for reasons that I think are good reasons, but YMMV), which might be surprising to users. |
cheriot-rtos | github_2023 | cpp | 258 | CHERIoT-Platform | nwf-msr | @@ -0,0 +1,211 @@
+// Copyright Microsoft and CHERIoT Contributors.
+// SPDX-License-Identifier: MIT
+
+#define TEST_NAME "List"
+#include "tests.hh"
+#include <ds/linked_list.h>
+
+namespace
+{
+ using ObjectRing = ds::linked_list::cell::Pointer;
+
+ /**
+ * Example class we want to link into a doubly linked list.
+ ... | This might be a good place to demonstrate some of why the interface is as quirky as it is. You could showcase in-place mutation and traversal without a sentinel with something like (not compile tested, but hopefully close):
```
ds::linked_list::search(middle, [](ObjectRing &cell) {
auto l = ds::linked_list::uns... |
cheriot-rtos | github_2023 | cpp | 248 | CHERIoT-Platform | davidchisnall | @@ -143,6 +143,30 @@ void __cheri_libcall flaglock_unlock(struct FlagLockState *lock);
void __cheri_libcall
flaglock_upgrade_for_destruction(struct FlagLockState *lock);
+/**
+ * Return the thread ID of the owner of the lock.
+ *
+ * This is only available for priority inherited locks, as this is the only
+ * case ... | ```suggestion
// The lock must be held at this point for the value to be stable so do a non-atomic read.
return ((*(uint32_t*)&(lock->lockWord)) & 0x0000ffff);
``` |
cheriot-rtos | github_2023 | others | 244 | CHERIoT-Platform | nwf-msr | @@ -80,9 +80,14 @@ _Z16token_obj_unsealP10SKeyStructP10SObjStruct:
bne t0, t1, .Lexit_failure
/* Subset bounds to ->data */
+ // Get the top into t1
cgetlen t1, ca0
+ cgetbase t0, ca0
+ add t1, t1, t0
+ // Move the address to the start of the data
cincoffset ca0, ca0, T... | Removing the `addi` seemed odd on first read, but of course the as-integer access to the `incoffset`-ed `ca0` does the right thing. Maybe something like this would have avoided my confusion.
```suggestion
// Subtract the address of the data from the top to give the data length
``` |
cheriot-rtos | github_2023 | cpp | 244 | CHERIoT-Platform | nwf-msr | @@ -1093,13 +1090,20 @@ namespace
Debug::log("Underlying allocation failed for sealed object");
return {nullptr, nullptr};
}
+ obj.address() = obj.top() - (sz + ObjHdrSize);
+ // Round down the base to the heap alignment size.
+ // This ensures that the header is aligned and gives the same alignment
+ //... | This probably deserves more commentary, something like...
we're guaranteed that `obj` is still in-bounds because it is the result of `malloc_internal` for `sz + ObjHdrSize` bytes and so it is at least that big and its base must already be `MallocAlignment`-aligned, so `obj`'s address is at least its base. Moreover,... |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | Should this be `uint32_t ledColours[2]` or similar? You can then use the value of `SonataRgbLed` (0 or 1) to index into them. |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | It would be nice to document the bits here. You've done that properly with the enums below, so just a forward ref saying that these are set with the values from the control enum below would be nice. |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | What does idle mean for an LED? I vaguely remember you or Greg saying that these are surprisingly stateful devices and you're sending them update commands, but a comment to that effect would be nice. |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | ```suggestion
wait_for_idle();
ledColours[led] = static_cast<uint32_t>(blue) << 16) |
(static_cast<uint32_t>(green) << 8) |
static_cast<uint32_t>(red);
``` |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | From the existence of the `update` method, I presume that this does not actually change the colour? A comment to that effect would be nice. |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | Does this need to be called after `rgb`? What happens if you call it first (LEDs come on in some undefined colour?) |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,83 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0,
+ Led1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for setting the ... | Does this turn the LEDs off? Both of them? |
cheriot-rtos | github_2023 | others | 246 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,89 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * An enum representing each of the Sonata's RGB LEDs.
+ */
+enum class SonataRgbLed
+{
+ Led0 = 0,
+ Led1 = 1,
+};
+
+/**
+ * A driver for the Sonata's RGB LED Controller
+ */
+struct SonataRgbLedController
+{
+ /**
+ * Registers for sett... | 'Above' isn't great because the 'above' bit isn't visible in the mouse-over pop-up in IDEs (which is the main thing that we write doc comments for). If you point at another enum by name, people can refer to that. |
cheriot-rtos | github_2023 | cpp | 222 | CHERIoT-Platform | davidchisnall | @@ -247,6 +247,10 @@ namespace
HeapObject(struct SObjStruct *heapCapability, T *allocatedObject)
: pointer(allocatedObject, heapCapability)
{
+ if (__builtin_cheri_tag_get(allocatedObject) == 0) | This built in should return a bool, so comparing it against zero is confusing. |
cheriot-rtos | github_2023 | cpp | 222 | CHERIoT-Platform | davidchisnall | @@ -247,6 +247,10 @@ namespace
HeapObject(struct SObjStruct *heapCapability, T *allocatedObject)
: pointer(allocatedObject, heapCapability)
{
+ if (__builtin_cheri_tag_get(allocatedObject) == false) | Why not just ! __builtin_cheri_tag_get(allocatedObject)? |
cheriot-rtos | github_2023 | cpp | 241 | CHERIoT-Platform | davidchisnall | @@ -85,6 +85,15 @@ DEFINE_ALLOCATOR_CAPABILITY(__default_malloc_capability, MALLOC_QUOTA)
*/
#define MALLOC_CAPABILITY STATIC_SEALED_VALUE(__default_malloc_capability)
+/**
+ * Define how long a call to `malloc` and `calloc` can block to fulfil an
+ * allocation. Regardless of this value, `malloc` and `calloc` wil... | Maybe wrap this in an `#ifndef` so that users can override it? Since our malloc is always-inline, it's safe to make this a per-compilation-unit thing. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ; | Is there a reason that this and the things below aren't inside the scope of the device class? |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Missing braces. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Please make these proper sentences and doc comments. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | What is a Spc Thigh?
This kind of naming is why we avoid abbreviations in names. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | We normally name things noun-verb, so that similar things are sorted together when autocompleting or reading generated docs. Ideally avoid starting things with `set` because it ends up with a load of unrelated `set_` things in autocomplete.
My preferred style here (which we haven't done uniformly) is to have two ov... |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Is this doing the same round up thing as your helper? |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | I can't quite parse this comment. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | There's a lot of code duplication here. Would it be cleaner if you created an array of these and iterated over them? Similarly, if `timing0` to `timing4` were exposed as an array, you'd be able to set them all in the same loop.
|
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Predicates should normally include `is` or `are` in their names. This one is particularly bad. We have an explicit style rule to avoid words that are both verbs and nouns and, in this case, format and empty are *both* verbs and nouns and I don't know if this is a thing that formats an empty thing, empties a format, o... |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Missing braces. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Consider `interrupt_is_asserted`.
Avoid `const` for value parameters.
This could also do with some explanation of how these relate to interrupts in the interrupt controller. |
cheriot-rtos | github_2023 | others | 239 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,385 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+static constexpr uint32_t I2cDevClockHz = CPU_TIMER_HZ;
+
+/**
+ * Performs a 32-bit integer unsigned division, rounding up. The bottom
+ * 16 bits of the result are then returned.
+ *
+ * As usual, a divisor of 0 is still Undefined Behavior.
+... | Verb-noun again. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | Please use full words for variable and function names. Our coding guidelines to avoid abbreviations. You know what intr means but the next person looking at this file or seeing it pop up in autocomplete may not.
Same for most of the other fields and methods here. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | Please make these doc comments (three slashes). |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | What are all of these magic numbers? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | That’s fine (though please name these ‘transmit’ and ‘receive’ or similar). We probably should also have a concept covering this interface. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | What is the behaviour of this if there are not the required number of bytes? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | I don’t really like this spinning without providing an opportunity to yield. Is there not an interrupt that this can block on? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | nwf | @@ -0,0 +1,92 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's GPIO. | Copy-paste-o
```suggestion
* A Simple Driver for the Sonata's SPI.
``` |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,171 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | If the code below can use the symbolic constants then that's fine.
I would like the doc comment t explain what the arguments mean. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | Maybe a `Debug::Assert` that `Len <= 0x7ff`? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | Minor nit, but we normally use `/** */` blocks for multi-line doc comments. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | ```suggestion
/// be modified only whilst the SPI block is idle.
``` |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | This took a few attempts for me to parse. Maybe 'Writes to this begin an SPI operation'? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | ```suggestion
ConfigurationHalfClockPeriodMask = 0xffu << 0,
``` |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | What is CPHA? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | What is CPOL? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,175 @@
+#pragma once
+#include <cdefs.h>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documentation is served from:
... | ```suggestion
ControlTransmitClear = 1 << 0,
```
The abbreviations tx and rx are ubiquitous in communication literature, but not everyone reading this code will have that background.
Same comment for the next ones down. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | It looks as if we're missing the interrupt definitions in the board JSON? |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | ```suggestion
* receives data. This register can be modified only whilst the SPI block
``` |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | It would be nice to add a `clang::flag_enum` attribute here. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | Same here (`clang::flag_enum`) |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | ```suggestion
const uint16_t HalfClockPeriod) volatile
```
Can the doc comment explain the parameters too? This is the thing that pops up when you type this in an IDE, so it's nice if it can be self-contained. |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | I'm not really a fan of `const` parameters that are value types. `const` on a parameter is a contract not to mutate the object, but when mutation is not observable in the caller then it's not helpful, and making this `const` means that we then have a new `LenTruncated` rather than just having a `length` parameter that... |
cheriot-rtos | github_2023 | others | 234 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,227 @@
+#pragma once
+#include <cdefs.h>
+#include <debug.hh>
+#include <stdint.h>
+
+/**
+ * A Simple Driver for the Sonata's SPI.
+ *
+ * Documentation source can be found at:
+ * https://github.com/lowRISC/sonata-system/blob/1a59633d2515d4fe186a07d53e49ff95c18d9bbf/doc/ip/spi.md
+ *
+ * Rendered documenta... | Same comment here. |
cheriot-rtos | github_2023 | others | 220 | CHERIoT-Platform | davidchisnall | @@ -2,6 +2,15 @@
#include <cdefs.h>
#include <stdint.h>
+enum class SonataJoystick : uint8_t | It would be nice to have a doc comment for this, especially to tell me if more than one direction can be returned at once (are diagonals represented as two directions? Can it be pressed and moved in a direction)? |
cheriot-rtos | github_2023 | others | 220 | CHERIoT-Platform | davidchisnall | @@ -58,4 +67,37 @@ struct SonataGPIO
{
output = output ^ led_bit(index);
}
+
+ /**
+ * The bit index of the first GPIO pin connected to a user switch.
+ */
+ static constexpr uint32_t FirstSwitch = 5;
+ /**
+ * The bit index of the last GPIO pin connected to a user switch.
+ */
+ static constexpr uint32_t La... | Please can you add doc comments on these too? |
cheriot-rtos | github_2023 | others | 224 | CHERIoT-Platform | rmn30 | @@ -302,6 +314,16 @@ after_zero:
// ca1, used for second return value
zeroAllRegistersExcept ra, sp, gp, s0, s1, a0, a1
cret
+
+ // If the stack is too small, we don't do the call, but to avoid leaking
+ // any other state we still go through the same return path as normal. We
+ // set the return registers to -E... | Why can't we use the macro here?
|
cheriot-rtos | github_2023 | cpp | 224 | CHERIoT-Platform | rmn30 | @@ -104,6 +107,7 @@ void __cheri_compartment("test_runner") run_tests()
debug_log("Trying to print string: {}", std::string_view{testString, 13});
run_timed("All tests", []() {
+ run_timed("Stacks exhaustion in the switcher", test_stack); | I guess this was left in from testing as it also appears below?
```suggestion
``` |
cheriot-rtos | github_2023 | cpp | 224 | CHERIoT-Platform | rmn30 | @@ -72,8 +72,42 @@ namespace
debug_log("Expected to invoke the handler? {}", handlerExpected);
set_expected_behaviour(&threadStackTestFailed, handlerExpected);
}
+
+ __attribute__((used)) extern "C" int test_small_stack()
+ {
+ return test_stack_requirement();
+ }
} // namespace
+__attribute__((used)) exter... | I guess this is 2 x spills here, 2 x spills in test_small_stack and 4 x switcher spills? Would be good to be explicit. Are the spills in `test_small_stack` dependent on anything like debug level? Concerned the magic number may be a bit brittle. |
cheriot-rtos | github_2023 | others | 191 | CHERIoT-Platform | davidchisnall | @@ -13,6 +13,10 @@
.p2align 2
.type start,@function
start:
+ .rept 32
+ .word 0x0000006f
+ .endr
+ | CHERIoT doesn't use the vectored interrupts (CHERIoT Ibex doesn't support the vectored mode). Interrupts are configured by the scheduler. If Sunburst is doing something different for the interrupt controller (not the CLINT + PLIC combination that we normally use with CHERIoT Ibex) then you'll need a custom driver. |
cheriot-rtos | github_2023 | others | 191 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,32 @@
+{
+ "devices": {
+ "clint": {
+ "start": 0x2000000,
+ "length": 0x10000
+ },
+ "uart": {
+ "start": 0x81000000,
+ "length": 0x1000 | This doesn't seem to match the size of the UART device that you've added (should be 52 bytes?) |
cheriot-rtos | github_2023 | others | 191 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,70 @@
+#pragma once
+#pragma push_macro("CHERIOT_PLATFORM_CUSTOM_UART")
+#define CHERIOT_PLATFORM_CUSTOM_UART
+#include_next <platform-uart.hh>
+#pragma pop_macro("CHERIOT_PLATFORM_CUSTOM_UART")
+
+/**
+ * OpenTitan UART
+ */
+template<unsigned DefaultBaudRate = 115'200>
+class OpenTitanUart
+{
+ public:
+ u... | These should all have doc comments explaining what they do (which are for reading, which for writing, which bits are valid in each and what they mean, and so on). |
cheriot-rtos | github_2023 | others | 191 | CHERIoT-Platform | davidchisnall | @@ -0,0 +1,70 @@
+#pragma once
+#pragma push_macro("CHERIOT_PLATFORM_CUSTOM_UART")
+#define CHERIOT_PLATFORM_CUSTOM_UART
+#include_next <platform-uart.hh>
+#pragma pop_macro("CHERIOT_PLATFORM_CUSTOM_UART")
+
+/**
+ * OpenTitan UART
+ */
+template<unsigned DefaultBaudRate = 115'200>
+class OpenTitanUart
+{
+ public:
+ u... | I don't understand this comment. |
cheriot-rtos | github_2023 | cpp | 206 | CHERIoT-Platform | davidchisnall | @@ -211,6 +262,7 @@ namespace
*/
void test_ticket_lock_ordering()
{
+ counter = 0; | What is this? |
cheriot-rtos | github_2023 | cpp | 212 | CHERIoT-Platform | davidchisnall | @@ -108,3 +108,12 @@ int __cheri_libcall eventgroup_get(struct EventGroup *group, uint32_t *outBits);
*/
int __cheri_libcall eventgroup_destroy(struct SObjStruct *heapCapability,
struct EventGroup *group);
+
+/**
+ * Destroy an event group without tacking the lock.
+ *
+ * Thi... | Cleanup is a noun, you mean clean up. |
cheriot-rtos | github_2023 | others | 195 | CHERIoT-Platform | davidchisnall | @@ -741,6 +741,17 @@ class KunyanEthernet
while (transmitControl & 1) {}
// Write the frame to the transmit buffer.
auto transmitBuffer = transmit_buffer_pointer();
+ // We must check the frame pointer and its length. Although it
+ // is supplied by the firewall which is trusted, the firewall
+ // does not ... | Please can you add brackets around the < expression? |
cheriot-rtos | github_2023 | others | 199 | CHERIoT-Platform | davidchisnall | @@ -9,6 +9,7 @@ DECLARE_AND_DEFINE_INTERRUPT_CAPABILITY(RevokerInterruptEntropy,
InterruptName::EthernetReceiveInterrupt,
true,
false)
+#define REVOKER_INTERRUPT_ENTROPY STATIC_SEALED_VALUE(Revoker... | Why a define for a thing that is used only once? |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator. | ```suggestion
We previously ran the test suite in the simulator.
``` |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator.
+Let us now run it on the Arty A7 FPGA development board.
+
+We will first build the CHERIoT [small and fast FPGA emulator](https://github.com/m... | ```suggestion
We first need to reconfigure the build, and rebuild.
For this example, we'll show rebuilding the test suite, but the same set of steps should work for any CHERIoT RTOS project (try the examples!):
``` |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator.
+Let us now run it on the Arty A7 FPGA development board.
+
+We will first build the CHERIoT [small and fast FPGA emulator](https://github.com/m... | ```suggestion
This value may vary if you did not use the dev container and must be the directory containing a `bin` directory with your LLVM build in it.
``` |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator.
+Let us now run it on the Arty A7 FPGA development board.
+
+We will first build the CHERIoT [small and fast FPGA emulator](https://github.com/m... | ```suggestion
Make sure that hardware and software flow control are *off*.
On macOS, the kernel silently ignores these if they are not supported but on Linux the kernel will refuse to send data unless the flow control is in the correct state.
Unfortunately, the hardware flow control lines in the Arty A7's UART are n... |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator.
+Let us now run it on the Arty A7 FPGA development board.
+
+We will first build the CHERIoT [small and fast FPGA emulator](https://github.com/m... | ```suggestion
The "Press CTRL-A Z for help on special keys" message tells you which meta key is configured on your system.
Here, the meta key is `CTRL-A`.
The meta key varies across systems (the default on macOS is `<ESC>`) and configurations and so we refer to it as `<META>`.
``` |
cheriot-rtos | github_2023 | others | 170 | CHERIoT-Platform | davidchisnall | @@ -224,3 +224,119 @@ For Ubuntu, you can do:
# apt install xmake
```
+Running on the Arty A7
+----------------------
+
+We previously run the test suite in the simulator.
+Let us now run it on the Arty A7 FPGA development board.
+
+We will first build the CHERIoT [small and fast FPGA emulator](https://github.com/m... | ```suggestion
Minicom may block after printing a one or a small number of dots.
If it does, then it will resume if you press any key that would be sent over the serial link.
Each dot represents 1 KiB of transmitted data.
``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -57,6 +46,13 @@ namespace
{
while (true)
{
+ // Do not attempt to lock if the destruct mode
+ // flag is set
+ if ((lockWord & Flag::LockedInDestructMode) != 0) | Possibly move this down. The common case should be that the lock is not held, so we want the fast path to be the CAS. If the lock is in destruction mode then we're happy to be in a slow path. |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -136,14 +132,33 @@ namespace
lockWord.notify_all();
}
}
+
+ /**
+ * Set the destruction bit in the flag lock word and wake
+ * waiters. Assumes that the lock is hold by the caller. | ```suggestion
* waiters. Assumes that the lock is held by the caller.``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -65,6 +65,81 @@ namespace
}
}
+ /**
+ * Test that destructing a lock automatically wakes up all waiters,
+ * failing them to acquire the lock.
+ */
+ template<typename Lock>
+ void test_destruct_lock_wake_up(Lock &lock)
+ {
+ modified = false;
+
+ Timeout t{1};
+ lock.try_lock(&t);
+
+ // Create an asy... | ```suggestion
// Try to acquire the lock in a background thread
``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -65,6 +65,81 @@ namespace
}
}
+ /**
+ * Test that destructing a lock automatically wakes up all waiters,
+ * failing them to acquire the lock.
+ */
+ template<typename Lock>
+ void test_destruct_lock_wake_up(Lock &lock)
+ {
+ modified = false;
+
+ Timeout t{1};
+ lock.try_lock(&t);
+
+ // Create an asy... | ```suggestion
// When the lock is upgraded in destruction mode, `lock` will return failure.
``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -65,6 +65,81 @@ namespace
}
}
+ /**
+ * Test that destructing a lock automatically wakes up all waiters,
+ * failing them to acquire the lock.
+ */
+ template<typename Lock>
+ void test_destruct_lock_wake_up(Lock &lock)
+ {
+ modified = false;
+
+ Timeout t{1};
+ lock.try_lock(&t);
+
+ // Create an asy... | ```suggestion
// Make sure that we don't prevent the thread pool making progress if this test fails.
Timeout t{100};
TEST(lock.lock() == false, "Lock acquisition should not succeed!");
``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -65,6 +65,81 @@ namespace
}
}
+ /**
+ * Test that destructing a lock automatically wakes up all waiters,
+ * failing them to acquire the lock.
+ */
+ template<typename Lock>
+ void test_destruct_lock_wake_up(Lock &lock)
+ {
+ modified = false;
+
+ Timeout t{1};
+ lock.try_lock(&t);
+
+ // Create an asy... | We should have an assert that's triggered here if this is reached, because this is always API misuse. |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -63,6 +52,17 @@ namespace
{
return 0;
}
+
+ // Do not attempt to lock if the destruct mode
+ // flag is set. Note that the lock is in
+ // destruction mode iff it is already locked, | I don't think that's the reason: we are not setting the locked-for-destruction bit in our expected value, so the CAS will always fail if the lock-for-destruction bit is set. Being locked for destruction is unusual (it should happen exactly once for any lock) and so we don't bother to check for it unless we've failed t... |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -136,14 +136,33 @@ namespace
lockWord.notify_all();
}
}
+
+ /**
+ * Set the destruction bit in the flag lock word and wake
+ * waiters. Assumes that the lock is held by the caller.
+ *
+ * Note: This does not check that the lock is owned by the | It might be nice to have an assert that does check. There's a `Debug::Assert` variant that takes a lambda as the argument and so will not compile the check unless we've turned on lock debugging. |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -90,8 +90,8 @@ int __cheri_libcall flaglock_trylock(Timeout *timeout,
* that thread either releases the lock with `flaglock_unlock` or the timeout
* expires.
*
- * Returns 0 on success, -ETIMEDOUT if the timeout expired, or -EINVAL if the
- * arguments are invalid.
+ * Returns 0 on success, -ETIME... | ```suggestion
* arguments are invalid, or -ENOENT if the lock is set in destruction mode.
* Note: if the object is deallocated while trying to acquire the lock, then this will fault. In many cases, this is called at a compartment boundary and so this is fine. If it is not acceptable, use `heap_claim_fast` to ens... |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -123,6 +123,11 @@ flaglock_priority_inheriting_lock(struct FlagLockState *lock)
*/
void __cheri_libcall flaglock_unlock(struct FlagLockState *lock);
+/**
+ * Set a flag lock in destruction mode. | ```suggestion
* Set a flag lock in destruction mode.
* Locks in destruction mode cannot be acquired by other threads. Any threads currently attempting to acquire the lock will wake and fail to acquire the lock. This should be called before deallocating an object that contains a lock.
``` |
cheriot-rtos | github_2023 | others | 169 | CHERIoT-Platform | davidchisnall | @@ -21,10 +21,9 @@ __clang_ignored_warning_push("-Watomic-alignment");
/**
* A simple flag log, wrapping an atomic word used with the `futex` calls.
- * Threads blocked on this will be woken in priority order but this does not
- * propagate priority and so can lead to priority inversion if a low-priority
- * threa... | ```suggestion
* `IsPriorityInherited` is set, priority is inherited by waiters to avoid
``` |
cheriot-rtos | github_2023 | others | 169 | CHERIoT-Platform | davidchisnall | @@ -85,6 +84,14 @@ class FlagLockGeneric
{
flaglock_unlock(&state);
}
+
+ /**
+ * Set the lock in destruction mode. | ```suggestion
* Set the lock in destruction mode. See the documentation of `flaglock_upgrade_for_destruction` for more information.
``` |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -63,6 +52,19 @@ namespace
{
return 0;
}
+
+ // We are not setting the LockedInDestructMode
+ // bit in our expected value (`old`), so the
+ // CAS will always fail if the bit is set.
+ // Being locked for destruction is unusual (it
+ // should happen at most once for any lock) and
+ ... | ```suggestion
if ((old & Flag::LockedInDestructMode) != 0)
```
We don't need to do another atomic load, the CAS has just told us the value that was there. If it has the destruction bit set, we can abort. |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -136,14 +138,33 @@ namespace
lockWord.notify_all();
}
}
+
+ /**
+ * Set the destruction bit in the flag lock word and wake
+ * waiters. Assumes that the lock is held by the caller.
+ *
+ * Note: This does not check that the lock is owned by the
+ * calling thread.
+ */
+ void upgrade_for_de... | I think this is correct, but it might be worth a comment that explains the ordering. Importantly:
- The `lock` path always adds the waiters bit with a CAS and retries from the top in case of failure.
- We always do an atomic or to set the destruct mode bit.
- We load to check the waiters bit *after* setting it.
... |
cheriot-rtos | github_2023 | cpp | 169 | CHERIoT-Platform | davidchisnall | @@ -65,6 +65,85 @@ namespace
}
}
+ /**
+ * Test that destructing a lock automatically wakes up all waiters,
+ * failing them to acquire the lock.
+ */
+ template<typename Lock>
+ void test_destruct_lock_wake_up(Lock &lock)
+ {
+ modified = false;
+
+ Timeout t{1};
+ lock.try_lock(&t); | Doing `try_lock` and not checking the return is confusing. You probably want this to be `TEST(lock.try_lock(&t), "Failed to acquire uncontended lock");` |
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