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H: EEPROM usage in ZS-042 I have bought a realtime clock module (this one). According to the sparse data I found there is a EEPROM on it. It's called 24C32 as can be seen on this schematic I found: As I want to rebuild this schematic as a part of a custom PCB I wonder what this EEPROM is used for? What would be the implications if I just don't include it? AI: EEPROM has nothing to do with the RTC functionality directly and can be removed. However, it can be used for logging data that is time-dependent which is pretty handy.
H: 10000 pF - so many zeros Why are 10 nF capacitors sometimes (usually) specified as 10000 pF? Why are we trying so hard to avoid nF? Seems unnecessary and error prone. Note: Question also relates, of course, to 1 nF vs 1000 pF - of which there are four 1 nF ceramics on Digi-Key, versus nearly 17,000 1000 pF (though Digi-Key properly returns either in the search). The point of the question is the intentional avoidance of nF. AI: It's historical. Capacitors were difficult to make by rolling paper (long before polymer films were available). There were two categories, rolled (around a microfarad range labeled "M") and flat (around a millionth of a microfarad labeled "MM") in the old-old days (early days of radio). Capacitors have long been either "MF" (microfarad), or "MMFD" micro-microfarad (now known as picofarad). The prefixes of nano and pico (from SI standardizations of the 1960s) are long after the first capacitors were sold. Note: as you noticed, the nanofarad never really caught on as a unit of measure for some manufacturers and neither has the millifarad. 10,000 µF is a common value.
H: Digital data to digital signals with Non return to zero(NRZ) NRZ codes share the property that voltage level is constant during a bit interval. High level voltage = bit 1 and Low level voltage = bit 0. A problem arises when there is a long sequence of 0s or 1s and the voltage level is maintained at the same value for a long time. This creates a problem on the recieving end because now, the clock synchronization is lost due to lack of any transitions and hence, it is difficult to determine the exact number of 0s or 1s in this sequence. Like this at the receiver side:- My question is that clock pulse is given above there , so why clock synchronization is lost if long strings of 0's are there? For example first clock pulse we receive one zero, and second clock pulse we receive one zero and so on. We see that clock is pulsing either 0 or 1, so why synchronization is failed? N. B. -- I am a student of computer science background , I don't understand electrical engineering, I have required to understand some basics encoding scheme to understand the physical layer of computer network. So please don't use too much technical term, I just need to understand the intuition. AI: If you have the clock signal at the receiver, there is no issue. The clock continues to provide a timing reference for bits. The problem is that the receiver doesn't have the same clock as the transmitter. It has one that's approximately the same in frequency, but may drift apart from the transmitter and is not aligned in phase. For example, suppose that the system's agreed-upon clock frequency is 1 MHz, so there's a bit every microsecond. Your example waveform would ideally have transmissions at1 μs, 2 μs, 3 μs, 5 μs, and 8 μs. However, the receiver doesn't have the same 1 MHz clock. It must instead figure out the clock on its own, only from the incoming signal - this is done with the help of a clock recovery circuit. Suppose that due to imperfections/temperature/etc, the transmitter clock actually ran slow, in our example 0.015 μs error per cycle (as a numerical example). This is not unexpected, since clock signals are made by real-world oscillators with real-world imperfections. The transitions would then be at 1.015 μs, 2.03 μs, 3.045 μs, 5.075 μs, and 8.125 μs. The clock recovery circuit would detect this since it's seeing transitions later than expected, and it would adjust its local clock signal accordingly, to also run slow in sync with the transmitter clock. This is often done with a PLL (phase-locked loop) circuit. If we had too many bits without a transition, it becomes impossible to recover the clock. For example, imagine that our transmitter sent out 100 zeros in a row. Over those 100 zeros, there are no transitions, so no feedback to re-align the receiver clock with the transmitter clock. If the transmitter clock were running at 1.015 μs per cycle instead of the intended 1 μs per cycle, these 100 zeros took 101.5 μs to transmit - without any transitions to use for time-keeping, the receiver actually detects either 101 or 102 zeros, and the transmitted data has been damaged. On the other hand, if there were enough transitions during that time, then as the receiver and transmitter clocks drift apart from each other, the receiver clock can be adjusted. (note to more advanced readers: The PLL can also drift off the necessary setpoint even if we don't slip by a whole bit between two transitions; the above is a simpler conceptual example that doesn't require us to consider the performance limitations of a clock-recovery circuit, but rather show a case where even the most ideal clock recovery circuit cannot recover a clock. Also, 15000 ppm of clock error is excessive, but it's used here for a numerical example).
H: Current transformer with no load? The apartment complex I’m in is only a year old, so we’re still in the Defect period with the builders. I’m on the Committee of the Owners Corporation, so I get to see the utility areas. The builders put in private metering; those meters always show 243V (expected) but 0W. I just assumed they didn’t install the CTs. I was there when an electrician popped the panel on a switchboard with a private meter for something else, and was astonished to see that the three-phase feed did indeed have a CT installed. They just hadn’t done the final step of connecting the CT to the meter. There’s no sign of a shorting load across the contacts either. Some quick Googling confused me, because the CT was 125:0.1, so 1250x on a 240V circuit, meaning 300kV across these open contacts at peak load. Only 30kV could arc in air over 1cm, but the contacts are maybe 1mm apart in an unplugged RJ12. (Datasheet for both meter and CT: http://www.crompton-instruments.com/downloads/2015/EPP-2238-0315_Integra_DL1.pdf) OK, so it isn’t arcing. Good. That’s not actually my question. More Googling implies that the CT is now fully saturated magnetically, so useless anyway. Is that true? Are the CTs now so hopelessly compromised that simply plugging them in won’t work now? Even worse: is the existing installation dangerous, going to arc at the first dust particle the settles across the terminals? The installation instructions for the CT states “Don’t open circuit the CT while the primary is energised.” That’s ambiguous. One way to read that is that it’s the act of disconnecting the CT that’s dangerous - which I can fully imagine since it would draw an arc. But that might mean leaving it open is fine? There might be circuitry in the CT to detect open circuit? I’m going to also assume that connecting the CT to the meter while energised is also a bad idea, but perhaps slightly less so. One factor stopping the committee from finishing the private metering has always been the fact that we’d have to drop the power while CTs were being installed. A couple of minutes of no power is a lot more palatable than many hours’ worth! Although, if we’d have to replace the CTs anyway, it wouldn’t be a saving. If the CTs hadn’t been installed, then it isn’t a defect - they installed V&I meters but only wired them up for volts. But because they installed the CTs, it is a defect that they didn’t wire them up: especially since the CTs even come with the wiring. Getting the builders back to wire them up will be easy; but if the CTs don’t work anymore, getting the builders to replace them will be much harder. AI: Current transformers don't work on voltage, they work on current - they are called current transformers after all. If they have a rating of 125:0.1, or simplified, 1250:1, it means that 125A of current in building wiring will produce only 0.1A of current in the measurement coil. But only when properly loaded, not when left unconnected. To think this in terms of voltage, the primary coil is only the building wire that goes once inside the measurement coil. So it will have an extremely small voltage over the primary coil. So for all practical purposes, the primary voltage will be much less than 1 volts. If it were as large as 1 volts, it would be stepped up to 1250 volts in the secondary coil with no load. As dry air has breakdown voltage of about 3kV/mm, it should not spark even if wires were just 1mm apart.
H: What is the use case for a tantalum capacitor? I am doing some research on the different kinds of capacitors. Here is my brief understanding of the use cases for each kind of capacitor: Aluminum Electrolytic: Filtering low frequency, high current signals (such as rectified line voltage.) low ESR at low frequencies (100Hz), therefore high ripple current rating Easy to manufacture large capacitance values with high voltage ratings Aluminum Polymer: Filtering high frequency, high current signals Low ESR at high frequencies (100KHz) means high ripple current rating Easy to manufacture large capacitance values with high Ceramic: Bypass/noise filtering capacitor Low ESR and good frequency response across broad frequency range Small package sizes available Tantalum: [USE CASE] [CHARACTERISTICS OF A TANTALUM CAPACITOR THAT MAKE IT GOOD FOR THIS USE CASE] AI: Let’s start with some of the advantages of tantalum capacitors They have relatively good stability across frequency, voltage, and temperature range compared to electrolytic and ceramic capacitors They don’t have the piezoelectric properties that you’ll find in ceramic capacitors which makes them vibrate, sometimes causing audible noise. If used under proper conditions, tantalum capacitors can be highly reliable. Tantalum capacitors can have a high density of capacitance. This leads to the following four use cases: Applications that require high stability. Applications that require no buzzing or other piezoelectric artifacts from the capacitors. Applications that require high reliability. Applications that require a high capacitance in a small form factor. Tantalum capacitors are typically used where more than one of these apply. A note on number 3: Many engineers are averse to using tantalum capacitors because one of their failure modes is short circuit which can cause fires (or even in some cases explosions!). If the designer however considers this and accounts for it by reducing the stress on the capacitor both in normal function and considering the possible failure modes of other parts in the circuit, the probability of this type of failure is very small. Reducing stress includes keeping ripple currents, temperatures, and voltages well below the rated values. You may find it interesting that despite the exciting failure mode for solid tantalum capacitors, even NASA allows them to be used on their spacecraft which are supposed to be about as reliable as something can be. They do however have steep requirements on their use cases: voltage must be derated 50%, and they must have at least 0.1 ohm ESR per volt or 1 ohm, whichever is greater, for grade 2 applications (see NASA’s EEE-INST-002 “Instructions for EEE Parts Selection, Screening, Qualification, and Derating”).
H: Soldering MEMS sensor I have a problem with soldering the LIS2DH12 MEMS sensor accelerometer. I searched for soldering recommendations but I do not understand exactly how to solder. I couldn't find the needed heat and time requirements. The datasheet says: leave "Pin 1 indicator" unconnected during soldering. The datasheet refers to JEDEC J-STD-020 documents, but I couldn't understand again. I want to use solder cream for pads because a soldering stencil too expensive for me (25 dollars.) Do you any advice for soldering? You can reach datasheet and JEDEC J-STD-020 documents links below: https://www.st.com/resource/en/datasheet/lis2dh12.pdf https://file.elecfans.com/web1/M00/20/D6/ooYBAFmk2XaASEEKAAt3ul2CRuY690.pdf https://shop.ipc.org/document-numbers/ipcjedec-j-std-020 AI: Hot air gun would allow the solder on all pads to melt at the same time and hence align the part due to surface tension of the solder. If you are using a soldering iron. Solder one pin and and check that the part is aligned properly. The ends of the pads are visible from the sides, so you can check that they align with the pads on your PCB. With parts of that size you will pretty much need a microscope. With some luck and experience you might do without though. The track between pads 2 and 3 is not recommended as the space does not allow a solder mask "bridge" to prevent the solder from combining from the pads to one big ball of solder. It's not a huge problem though if it's too late to fix.
H: Component in series with digital communication lines What is the component highlighted in picture? Main IC in the picture is PCM510xA. AI: that looks like a resistor network. Basically four 33 Ohm resistors.
H: Does phantom powered audio system's ADC also works on 48v Phantom powered microphones with their preamplifier can generate signal from -48 to +48 volt (or 24 or 12), then it run through wire and maybe receiver and reaches ADC. I want to know if 48v signal is attenuated before DAC or directly (with ~48V peak) driving the ADC. I think it must not be 48v since 48 volt is a constrant of condenser microphone without prepolarization, and there is no need for such a high voltage on ADC. But from other perspective sound have high dynamic range and ADC also need high input voltage dynamic range to achive high SNR for weak signals (since weak audio signals are extremely small because of its logarithmic scale). Then what is the typical voltage P-P range that drives high-end audio ADC? Here we can see output peak voltage from classical amplifier specified by B&K with their peak voltage mentioned (though these are not phantom standard but the basics must be comply): And here we can see some of their preamps with their peak voltage mentioned: AI: Microphones generate signal from -48 to +48 volt ... No they don't. Phantom powered microphones may be powered at 48 V DC. The audio signal will be 100 mV to 1 V or so and it will be alternating. I want to know it attenuate before DAC or directly drives the ADC. You, most likely, will need to boost it for the ADC. If the ADC does not handle negative voltages you will also have to apply a positive bias to the signal to bring it up to half the ADC range. Then what is the typical voltage P-P that drives high-end audio ADC? The P-P voltage will be enough to drive the ADC adequately to maximise the signal to noise ratio without ever driving it above or below its maximum or minimum input specification.
H: Opamp - find current coming to the noninverting input - the basics In the picture there is an inverting opamp, so the equation for gain is: $$ A_{CL} =\dfrac{-R2}{R1} $$ How can I find: $$U_⊕ , U_⊖, U_{wy}$$ How can I find the current (I)? (see picture) What rules should I use? AI: First off, this is a non-inverting amplifier configuration; however, that I believe was mentioned in the comments below the question post. If you are treating this as an ideal op amp, the virtual short approximation works pretty well here. The virtual short approximation states that the voltage at the inverting and noninverting terminals are equal. Additionally, in an ideal op amp, no current flows into these terminals; thus, I is zero. Here, you can just do your favorite circuit analysis technique to determine the voltages by setting \$U_{+}\$ and \$U_{-}\$ equal to each other, and find the output voltage \$U_{wy}\$. You have an ideal gain formula, so the output voltage \$U_{wy}\$ is the input voltage times that gain. The gain for the ideal noninverting amplifier is $$ G = 1 + \frac{R_{f}}{R_{1}} $$ Where \$R_{f}\$ is your feedback resistance and \$R_{1}\$ is the resistance connecting the negative terminal to ground. Since the information here is limited, I doubt this is a basic non-ideal op amp problem. But if it was, you would have to define and determine a large resistance to model input bias currents between inverting and noninverting terminals. Furthermore, a small resistance to model output bias current. Also, you would have to determine the output gain to the difference in inverting and non-inverting terminals \$A_{0}\$. Having these three things allow you to properly find the current I and voltages listed. For the ideal case, you let \$A_{0}, r_{in}\$ approach infinity and \$r_{out}\$ approach 0. I attached a figure below from the textbook Microelectronics Circuits and Devices, 2nd ed. by Mark N. Horenstein, published in 1996 from Pearson Education Inc. The figure can be seen on page 39 in chapter 2.
H: Questions on hooking up an old cathode ray tube (CRT) I bought an 8LO29I Soviet era CRT (intended for use in oscilloscope/instrumentation): Now I'd like to get it to work. After almost endless reading up (I'm not an electrical engineer) I think I now know what to do. The CRT also came with extensive original documentation (in Russian, dare I mention it!), so that helped a lot. The function of the pins is explained as: Electrode leads: 1, 14 - heater 2 - cathode 3 - modulator 5 - the first anode 7 - signal deflecting plate Y 1 8 - signal deflecting plate Y 2 9 - second anode 10 - temporary deflecting plate X 1 11 - time deflecting plate X 2 4, 12 - connected. Pin schematic: For my use the deflection plates will not be needed. What I still don't get is what the modulator (pin 3) is supposed to do and whether I need one. Some searching came up with this: An electronic system is described for modulating the beam intensity of a cathode‐ray oscilloscope in such a manner as to reduce variations in trace brightness due to differences in writing speed. A voltage derived by a push‐pull differentiating amplifier from the vertical deflection signal is added to the instrument's intensity‐control voltage. By use of this system, improved photographs of wave forms canbe obtained. So is that what it's supposed to be, an intensity modulator? Second question: All these smallish CRTs seem to have 2 anodes, why is that? In one publication I read it described the second anode as the focusing anode. Is that correct? AI: Looks similar to US tubes like 3JP1 that I have fiddled with ages ago. There is a control grid to change the brightness of the spot. It might have to be -50V relative to the cathode to extinguish the spot (the higher the anodes and focus electrode voltages the more negative the grid voltage will have to be). Normally you'd used it to blank the retrace on an oscilloscope, for example. If you were trying to display a picture you'd also modulate the brightness during each scan line. If you power it up at nominal voltages and currents you'll burn the phosphor if you don't deflect the spot or dim it. It's intended to be scanned. On the illustrated type of CRT, there's a high voltage 3rd anode (maybe there is a connector on the side of the tube) that is fed a constant voltage in the kV range, a relatively high voltage 2nd anode (also fed a constant voltage), and a lower voltage first anode (hundreds of V) that you adjust in order to focus the spot. It should be 20-35% of the 2nd anode voltage in this particular case. See the linked datasheet. Yours does not seem to have a separate 3rd anode so more designed for slower scan speeds and probably more deflection sensitivity. 1500V constant on A2, adjustable 280-516V on A1 for focus. -67.5 to -22.5V to blank the spot. Heater is 6.3V.
H: Voltage divider formula How to find value for both R1 and R2 for Vout=1.23 volts, where Pot=5K, Vin=4.5 - 12 volts? simulate this circuit – Schematic created using CircuitLab In reality, I want to adjust lm2596 buck converter output to 4.5 volts to 12 volts with any potentiometer, by adjusting R1 and R2 value. For long time, I was using the trial and error method with a calculator to solve that problem :). Hope that someone have easier method to solve it. AI: You can use the straightforward method described in the other answer. Another approach is to observe that the total resistance of the divider is constant (ignoring the regulator bias current) and therefore the current will be proportional to the regulator output voltage, so we can say that: \$ \frac{V_{REF}}{R_2} = \frac{12}{4.5}\cdot\frac{V_{REF}}{R_2 + R_{POT}}\$ so \$R_2= \frac{5\text k \Omega}{(12V/4.5V) -1} \$ whereupon you can easily solve for R1 If this is a real project, I would suggest using an additional parallel resistor to deal with the (usually crummy) pot element tolerance and taking resistor and Vref tolerances into account, as well as selecting standard E96 (1%) or whatever values.
H: BJT collector power limit in pulsed usage? Assuming that my circuit respects the voltage, current, and thermal limits of a BJT, can the device be electrically damaged by exceeding an instantaneous collector power limit? In other words, are BJT power limits only for thermal protection, or is there some other way that power can destroy the device, assuming voltage and current limits are respected? (In theory, this question could apply to both base power and collector power. But usually the base power is already limited by low current and voltage limits on the datasheet, while the product of the collector current and voltage limits is usually a very high power by necessity). Details: I am looking to replace a BJT (Bipolar Junction Transistor) with a similar-looking one that is available this year. Both the original (MJD122G) and the replacement (MJD122-TP) are rated with sufficient VCE (100V), IC (8A), and thermal power (1.5W) for my application. However, my application requires a transistor that can handle a 20W pulse for 1ms during cold start. The original datasheet gives a Safe Operating Area curve and thermal specs both suggesting that such pulses would be OK, while the replacement datasheet does not say that 1.5W can ever be exceeded, even for an instant. But maybe I could rely on common knowledge about BJTs? AI: The second breakdown limits of the SOA curve (as opposed to the simple thermal and current limits) of an unknown device are not really predictable. The limit is caused by current crowding in the die. You are "probably" okay if the die is similar and there is plenty of margin in the original. You could consider testing to destruction to see how much margin there really is. And don't assume just one pulse is enough, do a longer term test. Having been burned by this once, very, very early in my career, I'm going to suggest ample caution in direct proportion to the consequences of failure. Personally, I would source a device that is properly specified.
H: Does coil winding impact current direction? (Lenz Law) When a magnet is moving toward a wire loop north-side first, the current goes counterclockwise according to the magnet's perspective, as shown in the image below from Wikipedia. Now, consider a solenoid where each loop is wound so that travelling counterclockwise (again, as seen from the magnet) takes you toward the magnet. If the magnet were to be moved toward this solenoid like it was moved toward the wire loop, the current would still travel counterclockwise, which, as we just stated, means that the current will also travel toward the magnet. What would happen if the solenoid was wound the other way, i.e. so that travelling counterclockwise takes you away from the magnet? Would the current travel away from the magnet if we moved the magnet toward the solenoid as we did before? I've asked my physics teacher and googled a ton of stuff related to Lenz Law but haven't found an explanation. Thanks! AI: What would happen if the solenoid was wound the other way In the second picture, I've put your first picture winding (now in red) in series with the winding from the 2nd picture (black). There is no discrepancy here at all. There is no change in the direction of currents and no cancellation and the universe remains intact. In fact this is how you would wind an inductor or coil in two layers. Current remains in the anti-clockwise direction when viewed from the axis of the magnet (as the magnet is travelling towards the coil).
H: What do OD and PP stand for in SD card frequency fOD and fPP? It seems all SD card specifications mentioned two frequencies (fOD and fPP) as used in identification and data transfer mode respectively. What do the subscripts (OD and PP) mean? AI: They mean Open Drain and Push Pull. Identification is done slowly in OD mode so all devices can be enumerated without one driving the bus into other direction than others. Data transfers can then happen with one device at a time so it can be done faster in PP mode.
H: Is choosing a high HSE frequency beneficial for the PLL CPU clock? guys. The NUCLEO-H745ZI-Q board didn't populate the high-speed external (HSE, 4-48 MHz range) oscillators and I'm planning to solder one. I want to use the PLL so that the STM32H745's CPU1 clock can reach the max value 480MHz. HSE frequencies like 8, 16, 32, etc can create 480MHz using PLL. However, what will be the pros and cons for choosing a 32 MHz HSE for doing this, compared to other HSE values? For instance, will the 32MHz HSE provide better Temperature range Better 480MHz PLL accuracy (less error than choosing 8MHz HSE?) power consumption ? Let's exclude the cost of choosing an HSE that has a higher frequency. Thanks for your help! AI: The frequency being high does not matter much, because depending on the PLL range mode setting, typically the frequency is divided down to 1-2 MHz for the PLL input. It also has a mode which can take up to 16 MHz input. So from the PLLs point of view, it really does not matter if the HSE frequency is 2 MHz or 8 MHz or 32 MHz, the PLL will get 1 or 2 MHz anyway. Everything else depends on which exact HSE you are going to use and how it is used. A ceramic resonator, a bare crystal, or an oscillator module, which could be crystal or MEMS based. The temperature stability, accuracy, power consumption, and jitter can be wildly different between different types of clock sources. Though jitter is relative, as dividing down a high frequency clock with jitter will also divide down the jitter, but usually it is not a problem anyway. So you should focus on other aspects of the clock than frequency, such as physical size and accuracy, the actual frequency is secondary, as long as you can use it with the PLL to generate the frequency you want. Alhtough having said that, it will be more difficult to find compatible higher frequency crystals with suitable parameters (load capacitance, ESR) that are guaranteed to be compatible with the HSE oscillator (gain margin), that it is to find compatible lower frequency crystals.
H: Confusion about the estimated phase angle in SRF-PLL I am working on a simple PLL Simulink model as a proof of concept: I have two problems that are causing confusion for me at the moment: What should the estimated phase angle look like? Mine is like this. I feel that something is not correct because all the references I saw the plot is different, it starts from 0 and continues as a sawtooth signal. Mine here does something weird in the beginning. Is that a tuning issue in the PI controller? What should How the Vd component of the voltage look like? Mine is stabilizing at a negative value. Is that correct? Edit: The expected estimation as found in the literature is something like this: AI: The "weird thing at the beginning" is expected. That's the startup transient, when the state of the phase detector has to catch up with the relative phase of the inputs. SPICE simulators usually let you start a circuit from a DC operating point solution that may suppress such transients. But that's not realistic, just convenient when simulating "steady state" behavior. For a "whole picture", the SPICE model should use voltage sources that ramp up at a certain rate on startup - then the startup transients will be at least somewhat representative of what a real circuit might do, for real circuits never experience "infinitely fast" power-up, as it's not physically realizable. The slew rate of power supply voltages is finite. the plot is different, it starts from 0 Remember that the plots you see in books are idealized. Startup transients are quite varied and there's no "one size fits all" representation for them. Nevertheless, EE books, especially targeting beginners, should be covering this and striving to have graphs that approximate the real world a bit better :) No physical phase detector has its output start at zero on power up, unless it's very carefully designed to act that way. For a vast majority of circuits, such ideal behavior is unnecessary. And, conversely, the remainder of the circuit should not depend on such unrealistically ideal behavior. In some cases, the startup transient needs more care, say in low circuits that switch their supply on-and-off frequently to conserve power.
H: Large series resistor to protect from shock I built a high voltage generator and want to protect myself against shocks. Would putting a large series resistor on the powering circuit be sufficient to protect me in those cases: I build a large Marx generator (large DC impulsions), and I put a 10 Mohm resistor on my main 1000V power supply? (should limit to 0.1 mA and not shock, right?) I build a Tesla coil generator (large AC generator), say 50 kHz, and I put a 10 Mohm resistor on my main power supply? (I should be protected thanks to the resistor but also thanks to the high frequency?) Would those protection allow me to make arcs safely through my body? AI: A Marx generator works by charging capacitors in parallel then discharging them in series. The output voltage and current come directly from the capacitors. The discharge current is not limited when you limit the input current. From Wikipedia: The discharge path is completely made of capacitors and the sparkgaps - the resistors have nothing to with the discharge. The output current of a Tesla coil should be limited by the input current, but I wouldn't want to count on that to keep me safe.
H: Square wave to triangle wave converter using Op-Amp not working I have built an integrator to act as a 5V 30Hz square wave to triangle wave converter. My output currently looks like this. I am unsure why. The value of the triangle wave amplitude, according to one of this posts' answer, should be 0.833, which is within the amplitude of the op-amp. There is probably something very fundamental that I am missing. If any more information is needed, please let me know. AI: It won't work without a high value feedback resistor like this: - An op-amp integrator can never approach an ideal integrator because of the need to stabilize the DC output to somewhere near mid-rail and, that is what the resistor will do. Given that you have a 100 kΩ input resistor, you'll need something like 10 MΩ or greater as your feedback resistor. The next problem is your input signal DC offset: - An integrator does what it says on the tin - it will integrate the DC level of your signal and, it sounds like you don't want this to happen. So, you have to remove that DC level either with an offset adjustment circuit or a high pass filter. Maybe try this: - Here's my simulation and note the time it takes to settle down to a reasonable DC mid-rail value. Note that I've run the AD822 from a +5 volt rail and not a +15 volt rail to make things clearer: - If you lowered the 10 MΩ feedback resistor to 1 MΩ then the output waveform settles faster but, it just starts to show some minor triangle shape distortion: - Maybe that would be OK?
H: How to prevent body from influencing electrometer reading I am setting up a lab involving a parallel plate capacitor connected to a 6V source and an electrometer. After disconnecting the voltage source from the capacitor, I attempt to find the charge stored in the plates by dividing the voltage of the capacitor by the distance between the plates. However, my electrometer reading of voltage is heavily altered by where I am standing. Is there any way I can make sure the electrometer reading is correct? AI: Good news: the reading is correct! Bad news: you cannot really change the electromagnetic properties of your body significantly (aside from rather unpleasant methods such as freeze-drying), so you'll have to live with that fact. Recommendation: 6V is very little voltage, so the charge on a plate capacitor (which is very low-capacitance for plates that are not just a few micrometers apart) is very low, and thus minor changes of electrical field due to (charged) bodies nearby make a relatively large impact. You could try to ground yourself and one plate (i.e. connect to one of the two plates, and that to a common earth, that you also measure against), to at least try and minimize charges having their own potential that might be much much higher than. Alternatively, if you can, use a much higher voltage. Since everything in electrostatics is linear (until materials aren't, but that's not the regime you're working in), the external effects don't reduce – they just become less important. The dielectric strength of (dry) air is some 3·10⁶ V/m, so if your plate gap is at least 100 µm, you can apply 300 V to the plates. Since you don't want things to be dangerous, and since you probably don't control the humidity of air in the gap, back of by a factor of ten, and start with 30 V for your minimum gap width. Of course, but I guess you're doing that already, move your measurement equipment away from where you're standing, and maximize your distance to the plate capacitor.
H: Op-amp output voltage offset Hi i wanted to ask what causes an offset for the following integrator setup: I`m no sure if its the virtual ground or another fundamental reason im not aware about since the signal should always be biased at 0V. If someone could help that would great thanks! AI: The actual issue is that LTspice assumes the wrong value for its initial conditions. You need to remember that the current in an inductor is 90° out of phase with the voltage across it (ignoring the effect of the ESR of the inductor for the moment). Therefore, when voltage across it is zero, the current will be non-zero. LTspice starts it zero, which can't be correct. In the simple case of your schematic, you can calculate when the initial current should be, and initialise the inductor current to that. Add the following to your schematic to correctly initialise the inductor current, and then it all behaves as expected. .param Iinit 1/(2 * pi * 1k)/10m .ic I(L1)={Init}
H: Exceeding guaranteed memory write cycles I have an STM32 MCU with integrated flash that has a specified endurance of 10'000 write cycles. What exactly is the risk if I exceed this number during my products lifetime? My understanding is that the 10'000 cycles are "guaranteed" by the manufacturer but what is the error rate beyond that? Can I expect to reach 20'000 in most cases or is the flash likely to fail after 11'000 cycles? AI: First, characterize how the flash fails. Yes, you yourself have to get several of those chips and run some test code on them that exercises the flash the way the product would and see what happens. Otherwise you're just guessing, and we can't answer this any better than you can by doing real work with real chips. Once the failure modes are characterized, you need to develop some data encoding that will gracefully deal with errors - at the very least it must detect errors, but it should ideally also be able to correct them. You don't need complex ECC schemes - sometimes just writing the same data in a couple of copies is enough. Your question is also very general. It all depends on how you map your data writes into the flash cells. If you spread the writes across many cells, and the amount of data saved is small - a few bytes - then at the cost of just a couple of flash pages you can get effective endurances of millions of write cycles. The question is very much incomplete without such details!
H: LDO PSRR Value Problem I am searching a LDO for my design but I have a problem. Some of the LDOs don't have PSRR value. So, I can not compare these LDOs then others for noise feature. For example here are 2 LDO. Why these LDOs don't have PSRR value? What does it mean? MCP1801T-3302I/OT AP7354-33W5-7 (doesn't have PSRR Value) AI: Both datasheets actually do have data on the power supply ripple rejection. The datasheet for the AP7354-33W5-7 doesn't list a single number in the specifications table, but it has this: Likewise, the MCP1801T-3302I/OT has this: You can get a more detailed comparison using the charts than you would get from a single line in a table.
H: How to replace diodes with MOSFETs? The circuit shown below allows clips the output to +1 and -1. How can I replace the diodes with MOSFETs that have a similar behavior? AI: Here's one with using NMOS: simulate this circuit – Schematic created using CircuitLab The diodes shown are body diodes. If you short gate and source of an NMOS, it'll turn into a diode. Remember that the forward voltage may differ from MOSFET to MOSFET. So you may need to adjust the other voltage sources. It's possible to have the same operation with using PMOS. The connection is the same but the body diodes are reversed.
H: DAC70508 connected to Arduino does not give any output I am trying to use a DAC70508 with an Arduino Mega, but I do not get any output from the DAC. I connected the SPI communication pins and the power supply pins of the DAC to the Arduino (Vio and Vdd to 5V), and I did not connect the REF pin of the DAC because I want to use the internal reference. The Arduino code is : #include<SPI.h> int CS = 32; void setup() { Serial.begin(9600); pinMode(CS, OUTPUT); digitalWrite(CS, HIGH); SPI.begin(); SPI.setDataMode(SPI_MODE1); SPI.setClockDivider(SPI_CLOCK_DIV128); } char byte1 = 0b00000110; char byte2 = 0b10101010; char byte3 = 0b01010101; void loop() { digitalWrite(CS, HIGH); delayMicroseconds(10); digitalWrite(CS, LOW); delayMicroseconds(5); SPI.transfer(byte1); SPI.transfer(byte2); SPI.transfer(byte3); delayMicroseconds(10); digitalWrite(CS, HIGH); delay(70); } And finally, I have the following graphs (2V/div vertically, 40 µS/div horizontally) : Yellow is MOSI, Red is Clock, Green is Chip select. I am trying to send the frame 0x08 0xAA 0x55 (the actual data is not important, I just want to get an output). All the default config registers should be enough to at least output a voltage if I am not mistaken. One of my hypothesis is that the Arduino outputs its data by block of 8 bits while the DAC is waiting for one block of 24 bits, but I am not sure it really is an issue. AI: I should have tested the obvious first : the component was just badly soldered, which means some pins were not connected. At least you know this code works if you are interested in doing the same thing.
H: A question about memory address in microcontroller vs PC In context of embedded C, considering the following line: *((volatile uint32_t *) 0x48000414) |= 1UL<<12; Now 0x48000414 can be a memory pointer to a hardware register of a memory mapped microcontroller. So the above code tells: Go to the register at the address 0x48000414 and treat the register as if it is 32-bit wide and perform bitwise operation. So we can say that the address 0x48000414 in this case represents the address of a hardware register. But when it comes to compiling this code for PC I cannot interpret what is happening: #include <stdio.h> #include <stdint.h> int main() { *((volatile uint32_t *) 0x48000414) |= 1UL<<12; return 0; } I use https://www.onlinegdb.com/ online C compiler and get no errors for the above code. But my question is what does 0x48000414 represent in this case? AI: what does 0x48000414 represent in this case? Why do you expect it to "represent" anything different? The compiled version of a C program is expected to run with respect to a virtual address space. Each variable in the program is stored at a unique address within that space. Some particular microcontroller hardware might understand the address 0x48000414 to refer to a certain functional register, but the compiler doesn't need to know that. The compiler only needs to emit code that will fetch and store values from and to that address. On some other hardware and operating system, that might just be a location in RAM, or it might be an invalid address, or it might be a read-only addres and the program will "segfault" when it's run. It might simply be an undefined address, where reading from it gives an unspecified value, and writing to it does nothing. Whichever it means though, the compiler doesn't know or care.
H: Noob questions about my accelerometer (ADXL345) and Arduino components in general I've just bought this accelerometer: https://www.amazon.co.uk/XTVTX-ADXL345-Digital-Acceleration-Gravity/dp/B09NRFDH5J/ref=cm_cr_arp_d_pl_foot_top?ie=UTF8 I've bought it to learn about accelerometers and practise them with my Arduino Uno. I have a few noob questions though. Are all ADXL345's the same and just sold by different companies, or are they actually manufactured differently? If they are manufactured differently, how do I find the specs for my specific one to know how much to power it with for example? Can I use Adafruit's ADXL345 libraries with the component regardless of who it was made by? The component didn't come with any coding template or instructions, so how do I learn how to code this specific one? Sorry in advance as I know these are very basic questions. Just looking to learn about these and am a bit lost with where to start :) Thanks AI: ADLX345 is a chip manufactured by Analog Devices. What you bought is a module that contains that chip, and many other manufacturers make different modules which contain the same chip, but they might have differences in the external components or other differences like onboard regulator. If you did not receive documentation from the module seller, then it is a black box you don't know anything about. Never buy anything you receive no docs, or are able to reverse-engineer it, or otherwise know what you are buying. However most modules are very simple and some people have already reverse-engineered the schematics for you. You need to know what you should connect to where, sincr some modules can require 5V or 3.3V supply, and they might use 5V or 3.3V bus voltages, and if that is compatible with your MCU. So just buying and connecting something may not just work or can damage things. Maybe. It depends on the module and the library. The chip supports both I2C and SPI buses, and it can be set to two different I2C addresses. If the library assumes bus type or address, then some modules may not be compatible. However, the library is not a black box, you have the source code and power to change it to suit your purposes, or use it as a reference to write your own. Accessing chips over a bus is not black magic, it's a basic everyday thing for an embedded programmer. Isn't that the reason you have the library? It does everything for you, it initializes the chips and provides you a black box to use the chip. Just read the library manual or examples.
H: LC filter for inverter I am designing a 1500W inverter. With 24VDC input source and 220VAC 60Hz output voltage. I currently have the topology shown in circuit 1. This results in a square wave at 60Hz. But I need the output to be a pure sinusoid at 60Hz. The M1 and M2 mosfets are driven at 60Hz by PWM and NOT_PWM. To get the output with a pure sinusoid I thought of using an LC filter as shown in circuit 2. I started by trying to calculate the values of L and C through: F=1/2*pi*sqrt(LC). However, the values I obtained for L, considering the capacitance value of 10uF and F=60Hz, did not result in a sine wave. Did I choose the wrong cutoff frequency? I know that the mosfets switching mode should be SPWM with high frequency, but I have no way to change that at the moment. I have to make this work with switching the switches at 60Hz using LC filter. simulate this circuit – Schematic created using CircuitLab simulate this circuit EDIT I would like to tell you that I managed to do my project. But it was necessary to change the project topology. I decided to use a full bridge and not a push pull. To make the sine wave I use a sinusoidal pwm signal (with duty cycle variable) and with frequency modulation at 60Hz. Results in the image below. simulate this circuit AI: The M1 and M2 mosfets are driven at 60Hz by PWM and NOT_PWM. No, it will not work very well unless the loading is constant and therefore the Q factor at resonance can be controlled so as not to cause massive reactive currents (leading to serious distortion) and also not produce massive output over-voltage due to inappropriate light loading. So, even if you got the loading correct and you successfully tailored L and C to have a low-to-moderate Q factor at 60 Hz, you'll then find that you cannot use pulse width modulation control because of the way the output drive push-pull is designed. Your signals can never be purely \$PWM\$ and \$\overline{PWM}\$ unless the duty cycle is 50% in this type of circuit regime; it has to be more sophisticated than that to ensure you don't walk the transformer core into heavy saturation. My advice to you is bite the bullet and design this properly (high frequency PWM) because trying to tune at 60 Hz (coincident with the frequency of the MOSFET control voltages) will end in lots of smoke and disappointment. This is why we use a higher frequency PWM regime; the LC filters then have a cut-off frequency that sites between 60 Hz and the switching frequency and inherently do not display the problems mentioned above.
H: How to use case for continuous assignment? I get a bunch of these errors on the following code: (VERI-1100) procedural assignment to a non-register 'nextstate' is not permitted The problem is mostly with the case statement. I am genuinely confused. My design clearly cannot be implemented using clocked registers for these signals. I've tried several versions, with assign, with and without always and can't get it to compile. // SPI Master in Mode 3 module SPIMode3( //external PHY interface cs, sclk, misoA, misoB, mosi, //internal interface spiclk, en, busy, misoA_pbus, misoB_pbus, mosi_pbus ); //PARAMS parameter SPI_BITS = 16; parameter STATE_DONE = 2'd0; parameter STATE_RUNNING = 2'd1; //PORTS //external PHY output cs; output sclk; input misoA; input misoB; output mosi; //internal interface input spiclk; //would like for spiclk=sclk directly input en; //module is active when HIGH, rising edge loads the buffers output busy; output [(SPI_BITS-1):0] misoA_pbus; output [(SPI_BITS-1):0] misoB_pbus; input [(SPI_BITS-1):0] mosi_pbus; //REG/WIRE DECLARATIONS reg [1:0] state; wire [1:0] nextstate; reg [7:0] spi_counter; wire [7:0] spi_counter_in; reg [(SPI_BITS-1):0] misoA_reg; reg [(SPI_BITS-1):0] misoB_reg; reg [(SPI_BITS-1):0] mosi_reg; //technically this is redundant, could use one of the miso reg wire [(SPI_BITS-1):0] misoA_in; wire [(SPI_BITS-1):0] misoB_in; wire [(SPI_BITS-1):0] mosi_in; //REG INPUT ASSIGNMENTS always @ * begin case (state) STATE_DONE: begin nextstate = STATE_DONE; // in DONE state, everything just stops //REG ASSIGNMENTS spi_counter_in = spi_counter; misoA_in = misoA_reg; misoB_in = misoB_reg; mosi_in = mosi_reg; //OUTPUT ASSIGNMENTS cs = 1; sclk = 1; mosi = 1; busy = 0; misoA_pbus = misoA_reg; misoB_pbus = misoB_reg; end STATE_RUNNING: begin nextstate = (spi_counter < (SPI_BITS-1))? STATE_RUNNING : STATE_DONE; //REG ASSIGNMENTS spi_counter_in = spi_counter + 1; misoA_in = {misoA_reg[(SPI_BITS-2):0], misoA}; //left shifting misoB_in = {misoB_reg[(SPI_BITS-2):0], misoB}; //left shifting mosi_in = {mosi_reg[(SPI_BITS-2):0], 1'b0}; //left shifting //OUTPUT ASSIGNMENTS cs = 0; sclk = spiclk; mosi = mosi_reg[(SPI_BITS-1)]; //MSB out first; busy = 1; misoA_pbus = misoA_reg; misoB_pbus = misoB_reg; end default: begin nextstate = STATE_DONE; // in DONE state, everything just stops //REG ASSIGNMENTS spi_counter_in = spi_counter; misoA_in = misoA_reg; misoB_in = misoB_reg; mosi_in = mosi_reg; //OUTPUT ASSIGNMENTS cs = 1; sclk = 1; mosi = 1; busy = 0; misoA_pbus = misoA_reg; misoB_pbus = misoB_reg; end endcase end always @ (posedge spiclk, negedge en) begin if(!en) begin state <= STATE_DONE; spi_counter <= 0; //will this cause a BUGGGG??? misoA_reg <= 0; misoB_reg <= 0; mosi_reg <= 0; //this may be suboptimal end else begin state <= nextstate; spi_counter <= spi_counter_in; misoA_reg <= misoA_in; misoB_reg <= misoB_in; mosi_reg <= mosi_in; end end endmodule AI: You declared nextstate as type wire. It is illegal to make a procedural assignment (within an always block) to a wire. You need to declare the signal as logic: logic [1:0] nextstate; Do this for all signals which are assigned in the always block. You must also do this for the output ports which are assigned in the always block. For example: output logic cs; These outputs did not explicitly use wire, but they default to a net type. Note: You could have used reg instead of logic (since they are synonyms in SystemVerilog), but logic is recommended.
H: Why does this BJT leak so much collector current at cutoff with high V_CE? I have some 2N4401 NPN transistors that I'm trying to use with a 12V supply. I saw some strange behavior at cutoff and reproduced it in this simplified circuit. (The base is not connected, in case the schematic is unclear.) If I'm reading the 2N4401 datasheet right, the transistor should be well-behaved in this circuit as long as I keep \$ V_{CE} < 40 \mathrm{V} \$, \$ I_C < 600 \mathrm{mA} \$, and \$ P < 625 \mathrm{mW} \$. Therefore, I expect \$ I_C \$ to be reasonably close to zero, since there's no base current and the transistor is in cutoff. However, that's not what I saw when I measured \$ V_{CE} \$ for a range of \$ V_Y \$ values from 0V to 32V (the limits of my bench power supply). Here's a graph I plotted from my measurements with three different values of \$ R_Y \$. (I calculated \$ I_C \$ from \$ V_Y \$ and \$ V_{CE} \$.) As you can see, at around \$ V_{CE} = 9 \mathrm{V} \$, \$ I_C \$ suddenly goes up and hooks around to the left, which isn't at all what I expected from a transistor in cutoff. I expected (and want) \$ I_C \$ to be close to 0 for the entire range. I never went near the absolute limits, so I don't think the transistor is damaged. My graph looks suspiciously similar to graphs I've found of collector-emitter breakdown, but the datasheet claims \$ V_{(BR)CEO} > 40 \mathrm{V} \$, and 9V is way below that. Why am I seeing this behavior? Edit: I suspect I read the pinout wrong and swapped the collector and emitter when I tested this circuit. Even in that case, I'm still curious whether this behavior has a name. AI: Sounds like you have swapped emitter and collector. You are seeing E-B breakdown. The negative resistance characteristic can actually be used to make an relaxation oscillator. It does apparently damage the transistor however, by reducing the forward beta permanently (some recovery is possible with annealing but that's not going to be possible in a plastic-packaged device).
H: Inverter DC link voltage rises when motor decelerates For a voltage-source-inverter (VSI) powered PMSM, as shown in the picture below, the DC bus voltage across the DC bus capacitor Udc normally drops frequently, which will cause no harm to the cap itself. However, when the low speed command is given, the motor will decelerate because smaller speed ref leads to a smaller Iq ref value, which means less torque is generated. In this case, the capacitor voltage could often increase to be higher than the battery voltage if the battery can't be charged, which could damage the DC cap and MOSFETs. It is especially so when deceleration is high. I found another question Regenerated current during deceleration of PMSM motors and one of the answer mentioned that during motor deceleration, the motor and the DC cap forms a boost converter that results in the increase of cap voltage. My question is Is the motor always in regenerative mode when the it decelerates? isn't it dynamic braking if we don't purposely implement regenerative braking? If it is dynamic braking, why DC cap voltage increases? I think the motor current is still in phase with its back-EMF when decelerating, only the current amplitude becomes smaller because PWM duty is smaller. Am I correct about this? AI: Is the motor always in regenerative mode when the it decelerates? The motor is only in regenerative mode if the deceleration rate is faster than the motor would decelerate if it were simply disconnected from power. In other words, if the losses in the motor and load use up all of the energy that must be taken from moving mass, there will be no regeneration. If it is dynamic braking, why DC cap voltage increases? Dynamic braking involves dissipating energy in braking resistors. If that is not taking place, it is not dynamic braking. I think the motor current is still in phase with its back-EMF when decelerating, only the current amplitude becomes smaller because PWM duty is smaller. Am I correct about this? The relationship between the motor current and voltage waveforms is whatever it needs to be consistent with the controller operation and the motor performance. If the motor is "under control," it will act as a generator if it is called upon to provide braking torque. That will result in energy being pushed back into the controller regardless of whether or not the controller can dissipate the energy or return it to the source. If the controller receives energy from the motor that it can not dissipate or push back to the source, it will put it in the capacitors. That will increase the capacitor voltage until something fails. At that point, the energy will be dissipated in the resulting explosion and in the the motor or wherever else there are conductors forced to carry fault currents.
H: How to characterize an input signal? I'm planning on doing some signal processing on my electric guitar with an MCU and I was wondering how I can characterize my input signal so I know if and what kind of pre-amp/ADC I'd need or if the MCU's ADC would be sufficient for my needs. Typically when connecting a sensor or working with a known signal, I'd have an idea of the signal's resolution and if I need to use an amplifier, but in this case, I have no clue about the max or the min of the signal and neither by how much it'd change OR how much resolution I need; all I know are the frequencies I care about. I understand that I can just hook up my guitar to an oscilloscope or the MCU's ADC and play around to figure these things out, but are there good theory-driven/best-practice approaches for characterizing (input) signals that one doesn't know much about? AI: When going into a high impedance input, expect something like 100 mV amplitude while playing normally for a modernish guitar (with sort of loud output) and up to a few Volts of spikes when hitting the strings. Typically you don't lose much fidelity if you don't capture those spikes completely. When the sound is fading away, it reaches down to mVs and below. If you instead have a guitar which is made with a "vintage" sound the pickup output could be easily down to a tenth of the above figures. A > 20-bit ADC is recommended to have a good resolution on quieter parts. You could hook it up to your computer and record a bit with some computer oscilloscope software, to get an idea of the amplitudes. But a line-input has a rather low input impedance, so it will a) load down the guitar signal and b) damp its resonance. So as a result that would show a lower signal level than when recorded using a high impedance input. If available, a dedicated microphone input would be a better choice. Or you could take your guitar signal through a buffer/booster pedal with a gain of 1 and feed that into the PC.
H: MOSFET device selection for LED dimming I am thinking of developing a controller that can adjust the brightness of 12 V, 50 A, and 600 W LED. MOSFET 1 Spec Model: NTBLS0D7N06C Datasheet: https://datasheet.lcsc.com/lcsc/2108141230_onsemi-NTBLS0D7N06C_C903210.pdf Rds(on): 0.75 mΩ MOSFET 2 Spec Model: IRFP1405PbF Datasheet: https://datasheet.lcsc.com/lcsc/1806051242_Infineon-Technologies-IRFP1405PBF_C212022.pdf Rds(on): 5.3 mΩ I made a prototyping board using MOSFET2. (below) I installed a heat sink, but the heat is worse than I thought, so I'm considering a bigger heat sink. Schematic diagram View of assembled Two SMPS for feeding power to LED I learned that Rds(on) levels must be low to reduce heat. I'm comparing and exploring the core element, MOSFET. And I found a MOSFET that looked good. (MOSFET 1) The power dissipation of MOSFET 1 is as follows. I = 50 A R = 0.75 mΩ V = 37.5 mV W = 1.875 W The power dissipation of MOSFET 2 is as follows. I = 50 A R = 5.3 mΩ V = 265 mV W = 13.25 W Calculating the power dissipation ratio of the two MOSFETsis about 7 times. Even if Rds(on) is increased due to the increase in the junction temperature, I think the dissipation can be reduced a lot compared to MOSFET 2. I'm very happy now, but I can't believe it's so magical. I'd like to ask everyone to confirm if what I understood is correct. Thanks. AI: Beware of just plucking figures like Rds(on) from datasheets because they vary a lot according to factors like Vgs and temperature. If you look at the datasheet for your MOSFET 2 you'll see the graph of Id vs Vds and I've put an orange circle where you'll be operating as the junction temperature gets up towards its maximum: As you can see, you can expect a Vds of about 450 mV and hence a power dissipation of around 22.5 W, nearly twice what you've calculated. Look at the same graph for MOSFET 1 to see the difference it will make.
H: 12V-only (and no 110V/220V) household electrical installation Power outlets are in 220V/110V in houses for historical reasons (light bulbs and other appliances probably required >100V voltage) but nowadays as: we use a USB charger 220V->5V for phones, tablets, ... we use LED bulbs which probably work on low voltage we use TV and computers that work on ~12V or ~20V after a power supply unit many people use vaccuum cleaner and other appliances (drill) with batteries are there any official standards (or drafts of future standards) for building houses with no 220V/110V outlets in bedrooms, bathrooms, etc. and only 220V/110V in kitchen and laundry room (for washing machines)? Would it be possible to have one single 12V converter in the electrical panel, and no voltage outlet > 20V in, at least, bedrooms? Note: this hypothesis is only valid in the case the house heating is not with electricity AI: There's more to consider than the voltage level needed by the devices typically connected to an outlet. Having a wall outlet implies that the devices to be plugged into aren't predetermined. E.g. you will have to operate a vacuum cleaner in every room except you live in a slaughterhouse where you can clean everything using a waterhose. A very modern vacuum cleaner could operate with only 500 W and could limit inrush currents effectively as they have inverters built in anyway. However this device needed 40 A to do its job, difficult to supply that over any user operable connection. Using such high DC currents is a bad choice, because arcing can be serious when disconnecting Voltage drop on the wiring of the house increases by a great portion. It is proportional to the current and as we saw at 1) current increases when lowering the voltage at constant power output Even if we increased the wire diameter to keep the voltage drop constant we would loose much more energy because the usable portion of the voltage of our home grid will be much smaller relatively to the voltage drop. Outwhitting that by further increasing the wire diameters will attract only copper thieves. The vacuum cleaner is only the most descriptive example. When thinking over it, you will find even more devices which have to be used at changing places demanding much power. Having rooms with 110/220 V and rooms with 12V (or other SELV) will burden you with managing and servicing two separate grids. Cost for installation and maintenance could easily double. Most likely in such homes the 110/220 V will coexist in most rooms with the 12 V grid. You may claim that if in a substantial portion of cases the safe 12 V will be used reducing the chance to get in contact with the "dangerous" 110/220 V. This may be hampered by multiple possibilites for both grids connected to each other by accident. Furthermore a rarely used system is more prone to receive bad maintenance leading to increased failure rate. Summary: The typical power consumption profile of household appliances with changing location will effectively prevent the change to an at least partially exclusive SELV-grid in homes.
H: What is the proper way to handle a status led when HardFault_Handler or any error is raised? I am trying to implement a very basic status indicator using an STM32 - Basically I would like to toggle a RED LED when a fault is triggered by the MCU. Naively I added a toggle LED function in the while loop of the HardFault_Handler function but it only run the while loop one cycle. Where should I implement such indicator?, is the function HardFault_Handler the correct one? void HardFault_Handler(void) { /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) { /* USER CODE BEGIN W1_HardFault_IRQn 0 */ HAL_GPIO_TogglePin(LED_STATUS_GPIO_Port, LED_STATUS_Pin); HAL_Delay (100); /* USER CODE END W1_HardFault_IRQn 0 */ } } To simulate a fault I am doing a simple division by zero. AI: There is no proper way, everything depends on the fault and how you want to indicate it. The HAL_Delay works by looping until the tick variable has counted enough ticks, and the ticks are incremented in a timer interrupt, which won't run because the code is in a fault handler. So the code will hang in the HAL_Delay forever. If you want to keep track of time, then use a dummy for loop or a hardware timer from which you can read the tick count.
H: Op-amp square wave to triangle wave converter not working as expected A follow-up to a similar question from yesterday since the problem I've run into has differed enough to warrant something more than an edit. I have built an integrator to act as a 5V 32Hz square wave to triangle wave converter. This is my output. We can see that the voltage is offset too high, which is strange because per my understanding of integrators, the voltage offset should be equal to the "ground" voltage, which is 2.5V. One way of changing this behavior is modifying the high value feedback resistor. This is an example of the resistor (R2) with a reduced resistance (200k). The closer the feedback resistor is to 0, the lower the offset. I am unsure why this has such an effect on the offset voltage. Since reducing the high value feedback resistor results in a more rounded triangle wave and I don't want that (I am using the triangle for modulation on a CD4046 VCO chip,) I'm trying to figure out a way to reduce the offset voltage without distorting the triangle wave. The LTspice model if anyone needs it. If more info is needed for this issue, please let me know. Edit: A close-up of the square wave. AI: On an LTSpice simulation, I was able to improve the output waveform (V_triangle) by specifying Tr (rise time) and Tf (fall time) as 1n, rather than 0. I checked the mark-space ratio of V_square with 0 for Tr and Tf: the waveform was visibly skewed to longer at 0 V than 5 V. When I changed Tr and Tf to 1n, the input waveform (V_square) changed to 50-50 mark-space. The output voltage then settled as a triangle centered on 2.5 V. EDIT Here is my result, starting at around 4 sec. (Note that the time constant of R2*C1 is 1 sec.)
H: Help identifying blown power supply line I have a "330v200" CCTV camera that died some while ago and now that I disassembled it, I discovered that the S4 diode blew up and another component is shorting out. However, I can't find a schematic for this board and am not sure which components these are. Above photo from the internet Above photo from my board Any help is greatly appreciated. AI: The left component could be a fuse, a ferrite or a chip inductor - in either of these cases it should short. The right one I think is a standard schottky diode like SD103AWS. That diode blowing up is not the cause of your board damage, just a symptom.
H: Digital voltmeter reading half the voltage measured with Fluke multimeter I recently purchased these cheap digital voltmeters from Amazon to display the output of my 2.5 kV HV supply. The HV supply has a dedicated 1/1000 output (0 - 2.5V)for monitoring, which I am trying to measure using the cheap voltmeter. The voltmeter has 3 wires: +5V power, GND, and probe. Both the HV supply and voltmeter are powered by a single 5V supply. However, the voltmeter is consistently measuring half the actual value. When I measure the 1/1000 output with a Fluke multimeter (with other voltmeter disconnected) it measures the correct value. I have tested the digital voltmeter with other benchtop supplies (5V, 12V, 15V) and it seems to work fine. Any suggestions on what I could be missing here? EDIT: The 1/1000 output shares ground with other HV supply inputs/outputs. AI: The input impedance of those modules is in the 100K range- they use a divider directly into the ADC input of a microcontroller, as opposed to multimeters which are 10M\$\Omega\$ down to maybe 1M\$\Omega\$ for some cheap handheld meters. Since it reads about half, that implies the output resistance of the HV unit is also around 100K\$\Omega\$ and you need a 10M\$\Omega\$ or higher input resistance to get an accurate reading. You can either buffer the input with an op-amp or you can get a meter module that has a 10M\$\Omega\$ input resistance. Eg. MCP601 simulate this circuit – Schematic created using CircuitLab
H: Transistor used in 3 GHz LNA I've got this 3GHz RF amplifier off ebay, and I'm trying to figure out how it works. I've took the RF shield off, but the markings on the component that I assume is the transistor, are scratched off. What transistor could have been used here? Also, how can this thing work with just one transistor? Here is a photo of my device: The underside of the PCB is just a ground pour AI: The schematic of the circuit is as follows: simulate this circuit – Schematic created using CircuitLab U1 appears to be an integrated RF amplifier, not a transistor. I imagine that any transistor in an amplifier like this would require a DC path on all 3 of its terminals, whereas pin P1 is open at DC, so a transistor would work very poorly and wouldn't really amplify much.
H: Battery with inner resistance circuit problem "Battery Ba is connected in series with resistor Ra = 2Ω. Battery Bb is connected in series with resistor Rb = 4Ω. Battery Ba has a voltage of 2V and inner resistance of 1Ω. Bb has a voltage of 1V and inner resistance of 2Ω. The two circuits are connected in parallell in a way that the polarity on Bb is switched (+ on Ba is connected to - on Bb). What is the current flowing through Bb and voltage drop of Rb?" First of all I have a bit of trouble to sketch the circuit. This is my attempt (not sure if it's correct) If it's correct. My attempt was to do node analysis on the upper (three-way node). But I'm not sure on how to take into account the inner resistance of the batteries when calculating. Could this be the correct interpretation of the problem? AI: Let's do it step-by step: Battery Ba is connected in series with resistor Ra = 2Ω. Battery Bb is connected in series with resistor Rb = 4Ω. simulate this circuit – Schematic created using CircuitLab Battery Ba has a voltage of 2V and inner resistance of 1Ω. Bb has a voltage of 1V and inner resistance of 2Ω. simulate this circuit The two circuits are connected in parallell in a way that the polarity on Bb is switched (+ on Ba is connected to - on Bb). simulate this circuit The location of the 0V reference node is arbitrary. I've put it inside the schematic just so I wouldn't need to enlarge the box the schematic is in :) What is the current flowing through Bb and voltage drop of Rb? Hint: how would you connect two AA batteries to obtain 3V? You can do DC simulation on the schematic above and check your answers and intuition, by the way!
H: How do I calculate a voltage divider with an offset I've got the following circuit: simulate this circuit – Schematic created using CircuitLab By running the simulation I can see that a signal voltage of 3.13 converts to an output of 2.14, but I'm not sure how it got that. If I simply use the voltage divider and subtract out the 1.7 reference voltage, I get: $$ 3.13 \times \frac{10}{(22+10)}-1.7 = -0.7218 $$ What am I doing wrong? Btw, software engineer not electrical engineer, so I'm sure this is a noob question. AI: There are two different problem here. The voltage divider formula applies to the voltage across the entire divider: simulate this circuit – Schematic created using CircuitLab $$ V_2 = V_{tot} \cdot \frac{R2}{R1+R2} $$ That is, Vtot is the voltage between nodes A and B. To calculate Vtot you can use LKT and you obtain that: $$ V_{tot} = V_{sine} - V_1 $$ Those expressions are valid for each instant, so you can apply them in particular to the peak sine value, that you say is 3.13. Therefore you get: \$ V_{tot(peak)} = V_{sine(peak)} - V_1 = 3.13V - 1.7V = 1.43V \$ \$ V_{2(peak)} = V_{tot(peak)} \cdot \frac{R2}{R1+R2} = 1.43V \cdot \frac{100}{100+220} = 0.45V \$ EDIT (to provide a complete solution, not only an hint) Once you get \$V_{2(peak)}\$ you can get \$V_{out(peak)}\$ by adding \$V_1\$: \$ V_{out(peak)} = V_{2(peak)} + V_1 = 0.45V + 1.7V = 2.15V \$ Which is the result you get from simulation, within approximation errors. Here is a plot of the various voltages using LTspice: which derived from this circuit:
H: Problem with determining currents in multi-source circuit I need to solve the circuit shown below: simulate this circuit – Schematic created using CircuitLab And here is my attempt. I'm sure my attempt is wrong here but I'm not really sure why. I've tried to use the mesh method to determine the currents in the cicuit. I've ended up with these equations for the currents: $$ i_A = i_1\\ i_B = i_2 - i_1\\ i_C = i_2 - i_3\\ $$ And KVL: $$ 1:\; 9V - 10k * i_A + 20k*i_B - 10V = 0\\ 2:\;10V - 20k * i_B - 30k * i_C + 12V = 0\\ 3:\;12V + 40k * i_C - 30k * i_C = 0 $$ Based on these equations: $$ i_A = -766\mu A\\ i_B = -330\mu A\\ i_C = -370\mu A $$ I've tested this cicuit in a simulator (falstad) and the current on R1 should be 420μA, which points to a really big mistake on my account. Any help or tip how to fix these equations would be welcomed. AI: You are doing the mesh method wrong, specifically the currents on it. To do it correctly: Define the current meshes. You can select on each one does it flow clockwise or counter clockwise but as a beginner it's probably the easiest to use same rotation for all of them. Now do the equations, correct ones are below. If there is another current flowing on same wire, you need to take that to account! $$ \begin{cases} 10k \cdot Ia + 20k \cdot (Ia-Ib) + 10V - 9V = 0 \\ 20k \cdot (Ib-Ia) + 30k\cdot (Ib-Ic) - 12V - 10V = 0 \\ 30k \cdot (Ic-Ib) + 40k\cdot Ic + 12V = 0 \end{cases} $$ Solve the equations with calculator (or by hand...) and you'll get the following results: $$ \begin{cases} Ia = 420μA \\ Ib = 680μA \\ Ic = 120μA \end{cases} $$ Now you can get the real currents from pic: $$ \begin{cases} IR1 = Ia = 420μA \\ IR2 = Ib - Ia = 260μA \\ IR3 = Ib - Ic = 560μA \\ IR4 = Ic = 120μA \end{cases} $$
H: Current consumption of a tachometer circuit I am trying to determine how much current this circuit will draw under rest conditions when the Ign- is at roughly 12.5V. Would current run through the blue path? Sourcing from Ign- passing through 330 and 1k ohm resistors and optocoupler to ground? If this is true it seems that the circuit would draw 12.5/(1K+330) + 12.5/(10k+12K) = 9.4mA+1mA = 10.4mA. Is this a correct assumption? optocoupler If so is there a way to limit this? Part number for zener is BZY55B5V1 RBG zener AI: It will approximately be the greater of: 12.2/12K + 11/1.33K (D204 not conducting) and 12.2/12K + (12.2-Vz)/1K Assumptions: Vf for Schottky 0.3V, Vf for IR LED 1.2V, actual zener voltage Vz. If the zener type is less than about 5.1V, it may be necessary to do a bit more work to find the actual zener reverse voltage (and that current will account for a majority of the total). Edit: Given the correct part number for the zener, the first equation is correct, so: Iq = 1mA + 8.3mA = 9.3mA. The current through the LED will be ~8.3mA (D204 does not conduct significantly, the voltage across it is 3.9V). The L1 bin optocoupler is guaranteed to work with 1.6mA, but you should allow perhaps 3:1 more for reliable operation over a wide temperature range and for aging, so using that safety factor you could reduce the current to 5mA-ish. It's not clear what benefit the optocoupler is providing since the grounds are common and you are feeding a divided signal directly into the microcontroller on another pin.
H: MOSFET's delay of off falling time I made the circuit using MOSFET. The falling time when MOSFET is off is too long. I use the resister 200kohm for test load. HA17555 output max. current is 200mA and output voltage waveform looked complete squre. Is it because I use too big resister(200kohm)? It's my circuit and waveforms. Falling time is too slow. Is it because of high reaistor load. AI: The MOSFET driving circuit appears to be OK but light on Vgs voltage. If the MOSFET is properly driven it should be turning on (low) rapidly assuming your control signal does the same. Your waveform does not appear correct. You show a slow turn on (Turn Off is your term), this is driven by the FET’s drain, The turn on (high) should have the ramp or RC curve. The only other possibility is the Vgs threshold is 4V max indicating you are under driving the MOSFET. Try raising the 5V to 6V or 7V and see if the problem goes away. You are also using a TO3 case which has more capacity then the smaller packages.
H: What is the reason for the current spike in below simulation - at the end when cap voltage drops to zero? Is the current spike at the end due to the constant power behavioral model? I have chosen an arbitrary MOSFET for the simulation. The initial current spike disappears when I add a series res to gate. AI: The voltage across the constant power load is dropping to zero, so the current could be expected to go to infinity at 0V. To prevent the singularity (which tends to muck up convergence as well as being non-physical), there is a crossover in the simulation to a smooth transition to 0W at 0V, which by default begins to occur at +/-1V. at 1V your current will be 40A, which is exactly what you are seeing. The number can be modified by changing the vprxover parameter. That's also why the V(HOLDUP) curve stops at 0V and does not go negative (or whatever you'd expect after reaching infinite amperes).
H: What would be the amplification circuit for PP02 sensor using LM324 pressure sensor? I am planning to use the PP02 Omron pressure sensor. The user manual of the sensor (Usermanual link) suggests using LMV324 type of instrumentational amplifier with four op amps within in the schematic diagram. The problem with LMV324 (datasheet)is that it is not quickly available or as cheap as the other substitute. The other substitute is LM324 (datasheet), but I am not sure how one In Amp differs from another (are they easily interchangeable?). Secondly, how would the schematic diagram need to be change? I need help with the following. Can LMV324 be substituted with LM324 without changing the rest of the circuit given in the user manual? If the circuit needs to be changed, please suggest the changes as I am not an electronics guy. Is it a good idea going for the LM324 as this project is prototyping with manufacturing in mind. AI: For prototyping and proof-of-concept, the LM358 will do in a pinch, especially since you have already ordered it. The more complex of the two circuits (circuit 1) is different in a few ways: It sinks a constant current through the bridge with a current source. If your supply voltage is stable enough, you can just use that (which is what circuit 2 does). For the sensor you have in mind, you'll need to limit the current to 100 uA with an extra resistor. Circuit 1 uses 3 opamps to form an instrumentation amplifier. A simple difference amplifier like in circuit 2 might be good enough for your purposes. The price you pay for simplicity is reduced common mode rejection and decreased input impedance (-> lower signal). This may or may not be a problem for you. Circuit 2 does not really do away with the voltage reference. It simply uses GND as reference. That seems like an a odd and fragile way to do things. EDIT: For the record, let me emphasize you will need to make some changes to the circuit such that the lower swing of the 324/358 can work. For instance, as suggested by Spehro Pefhany, in circuit 1 the bridge's output is biased to an uncomfortably high voltage. You'll want to adjust that. Your comments do suggest you are very much a beginner. If you feel uncomfortable, and don't want to waste time, don't bother, get the recommended part. If you want to learn, by all means.
H: Does a secondary battery always charge to its maximum open circuit voltage? I'm wondering if secondary batteries have a slight open loop voltage drop after multiple cycles. I found on another forum that a rechargeable battery always has the same open loop voltage after charging, even after lots of cycles, and that the voltage will only drop after the addition of a load. How is it possible that a secondary battery retains its potential? Hopefully someone can explain what is going on and what the relationship is between cycles, end of lifetime, and open loop voltage of secondary batteries. -edit- Lithium-ion for example. AI: A lithium ion battery has a voltage depending on its state of charge (SOC), and on the state of the electrodes. The terminal voltage of all cells is basically the electrochemistry of the materials, modified by the ionic concentrations in electrode and electrolyte. Unlike lead or nickel chemistries which keep a relatively constant voltage over most of their SOC range, lithium rechargable cells have a very variable voltage. Charging/discharging involves the physical movement of lithium ions into and out of the electrodes, so the open circuit voltage is strongly influenced by the ionic density in each electrode. The electrodes suffer physical degradation each time the ions move around, with increased physical degradation and irreversible chemical degradation if the low or high extremes of voltage are reached, which also contribute to a changing open circuit voltage. Note the lithium cells in satellites are charged to only 3.92 V, rather than the 4.1/4.2/4.3 V (depending on precise type of lithium cell) that commercial earthbound ones are. This gives them lifetime in the decades, necessary when replacing the cell is not an option. Why aren't normal lithiums rated for a lower charge voltage and a longer life? It seems the marketing people decided customers would prefer 500/1000 cycle lifetime with high energy density, rather than 10k cycle lifetime with a lower energy density. Personally I charge my 4.2 V rated cells in my drill to 4.1 V, to increase their cycle life, at the cost of a shorter run time.
H: Rising edge of signal missing I've simulatated this circuit with Multisim and obtained an output that seems correct: I built the same circuit on a breadboard and analyzed it with an oscilloscope: The output of the real oscilloscope is quite different: I cant't view the right side of the simulated signal (when it rises from - 5V to zero.) What is wrong? AI: Set the oscilloscope to a longer sweep time - the Multisim oscilloscope is set to 10 milliseconds per division while the real scope is set to (I think) 4 milliseconds per division. Press and release the button. Do not hold it down. The time period between the two peaks is the time you held the button down. If you hold the button too long then the oscilloscope can't get the press and release on screen at the same time. You may need to set the oscilloscope to something like 50 or 100 milliseconds per division to get both peaks visible at once. It depends on how quickly you can press and release the button.
H: What effect does a splitting an audio signal using a y-cable have on that audio signal? Given a clean instrument-level audio signal of reasonable amplitude passing from point A to point B via a TR/unbalanced cable, what effect would replacing that cable with a TR to dual TR cable running from point A to points B and C have on the signal reaching point B? Would it result in a degraded signal, either in terms of amplitude or signal quality? The purpose of the cable is to take a mono signal and duplicate it into two identical mono signals. Assume both cables are of the same length. For a more concrete version, assume that A is a guitar and that B and C are unbalanced stereo input jacks on a guitar pedal with these specifications of which I believe the important one is: Input Impedance: 2.2 M ohms AI: For a more concrete version, assume that A is a guitar and that B and C are unbalanced stereo input jacks on a guitar pedal. Input Impedance: 2.2 M ohms Guitar pick-ups are problematic: - Image from here. With an inductance of maybe up to 8 henries, at 10 kHz, that's an impedance of just over 502 kΩ and, this is why we use several MΩ input impedances on guitar pre-amp circuits. We do this to ensure that the high frequencies do not get attenuated: - So, as you should be able to see we aim to design a guitar pre-amp with an input impedance of at least 1 MΩ and, in many cases on better equipment this is around 10 MΩ. There ain't a guitarist I know of that particularly wants a dull sound to their axe. But, cable capacitance can also be a problem: - With a higher input impedance (3 MΩ) there is a distinct peaking effect seen that, to some guitarists is desirable. The above mimics a 3 metre long cable having a capacitance of 50 pF per metre. Personally, as a guitarist, I aim for short cables but, that only works when I'm sat down right next to my mixer and audio capture circuits; it doesn't work on-stage of course!! I added 100 kΩ series resistance to the pick-up coil to avoid massive and non-realistic peaking. This isn't a cheat because the 1 MΩ pots used in a guitar (for volume and tone) will inevitably have some output resistance of that sort of order. So, a 2.2 MΩ input impedance is good but, depending on how long the cables are, you might get a less-than-ideal-or-undesirable response.
H: Low Cost andd Urgent H Bridge Need? I am Creating a H Bridge for 4 x 12V 5A BDC Motor with driving ESP32 Digital Output. Do I need any Components? because I Must be Small PCB design. (Maybe I can place 1k Resistor to N Channel MOSFET Gate-Source) I am Sorry to say (BLDC) it.I Have 4 BDC Motor. and I Re Upload the Schematics. maybe I can Place the Bulk Cap(1000uF 25V) AI: The circuit you have posted will blow up, not control a BLDC motor. Things you absolutely need for your circuit to move a BLDC motor and not catch fire: You need to have independent control of each gate to avoid shoot through, or at minimum some mechanism to inject dead time (or your mosfets will just fail). A BLDC motor has 3 phases, not 2. You need another half bridge phase. You need to employ some kind of technique measure the angle of the rotor relative to the stator (this is basically the core problem of BLDC motor control). You need bypass capacitors to prevent the power supply ripple produced by the motor. Things you really should do that aren't fundamentally necessary: You probably should not use PMOS, but instead use the same NMOS transistor everywhere, and use a half bridge driver for gate management. You probably also want to make sure you put dedicated complementary PWM (if the ESP32 supports that) on each half bridge instead of just GPIO.
H: Headphone output - what is the function of these resistors going to ground between the decoupling capacitors and headphones The Korg Monotron Duo synth uses the TPA6111A2 headphone amp. The circuit they use is largely the same as the one from the datasheet - except for R78, the 470ohm resistor going to ground right after the decoupling capacitors. I'm wondering if anyone can tell me what the purpose of that resistor is. I've built the circuit on a breadboard, but under my testing conditions I can't see any change in the output. AI: The 470 ohm resistor to ground keeps the headphone output DC level biased to 0V. The amplifier chip output is biased to VDD/2 so if there resistor is removed, the both capacitor ends would measure VDD/2 volts, and plugging in headphones would charge the cap voltage only via headphone resistance, causing a large snap and could even damage the headphones with the surge of current.
H: Connecting a Panasonic EVQ-VVD00203B radial encoder to Arduino I purchased this Panasonic EVQ-VVD00203B radial encoder for an Arduino project, and am having difficulty figuring out out to wire everything up. This is the encoder: If I understand the schematic correctly, the top is 5V, the bottom left and right are signal A and B, which I should be able to connect to two separate digital ins in order to capture rotation amount and direction through phase difference between them. But the bottom center doesn't say "ground" or "-". It says "COM". I thought this meant common ground, but whenever I connect a ground to it, it shorts the arduino. Here is a screenshot of the test circuit form the wiring diagram: And here is how I currently have it wired up. I have power going to 5V, COM going to ground, bottom-left going to digital6, and botton-right going to digital7. What am I doing wrong?[ AI: The datasheet shows the two terminals on the centerline of the encoder are COM and the ones to the side are A and B. As @Justme says, the resistors, supply, etc are supposed to be provided by you. The 10k to +5V provides the pullup, the other 10k and capacitor provide some filtering since this is a mechanical encoder and some noise is to be expected. What you could do, however, is enable the internal pullups on the digital pins of your Arduino and write your program to debounce the inputs in software, no external parts necessary. Hooking up +5V to one of the COM terminals and grounding the other one may have burned out some internal connection so it's possible that one or both of your COM terminals are now unusable.
H: TI Microcontroller Programming Circuit I am working on designing a pcb that will contain a TI TM4C1231D5PZ microcontroller. I have only ever used a launchpad before for coding, so I do not know how to get my program code onto a microcontroller that is going to be on a pcb. I have looked at multiple resources, including the datasheet, and I can't find a circuit or even an understandable explanation of how to put the program code onto the microcontroller. I believe that I have all of the software complete and working, but I just need to get it on to the microcontroller. How is this process accomplished? Are there any helpful resources that explain this process? AI: It's always a good idea to add a JTAG interface for in-circuit debugging. There are various debug probes you can choose from. The XDS100v2 is fairly cheap, if you can get a hold on one (TI doesn't distribute this anymore). Another good option is the XDS110 (PDF / Product Page). You can even use the LaunchPad as debug probe. See SPMA075 (referenced below), chapter 4.6. And on the PCB you have to add a JTAG header (e.g. ARM 10-pin header): For more info, check the Application Report SPMA075: Using TM4C12x Devices Over JTAG Interface. For production, where you only need to program the TM4C, you can use the integrated Boot Loader (ROM). The TM4C1231D5PZ supports UART0, SSI0, I2C0 and USB. Check the Datasheet chapter 8.2.2.1 Boot Loader Overview. Also check the TivaWare Boot Loader User's Guide. As PC tools you can either use LM Flash Programmer or Uniflash.
H: What is the purpose of this block in UC2854 based PFC circuits? Below is a snippet from the datasheet of UC2854. Current transformer senses the input current of PFC. But Rs also does the same. What is the square block shown here? AI: Looks like a full-wave bridge rectifier which powers the controller IC. The secondary of the transformer (above the rectifier) is most likely loosely coupled to the primary which is the series inductor for the PFC circuit. It is not a current monitor. It's a method of power harvesting which minimizes cost. Note that R1 supplies voltage to the controller at power up. There is an internal 20V zener diode between VCC and ground as shown in the block diagram in chapter 8.2.
H: This is a diode related problem: Assuming the diodes used in the circuit are ideal. Find the current through the resistor I tried to solve this question but i donot know how to solve. Any one can help? Assuming the diodes used in the circuit are ideal. Find the current through the resistor. I asked in foroum and got the answers: Here total voltage=6V[since voltage is added in parallel] change in voltage(V)=6-0=6V [since earth has 0 voltage] Resistance(R) =1000 ohms now, R=V/I 1000=6/I I=6/1000 Therefore current(I) is 6mA I dont think this is right. Is'nt voltage added in series? AI: Is'nt voltage added in series? No. All the voltages in this circuit are relative to the common ground. Here total voltage=6V[since voltage is added in parallel] No. Voltage sources add when connected in series. For this to work the voltage sources must be 'isolated' from each other, ie. have no common connection. Different voltages in parallel are impossible, because you can only have one voltage between two connection points (nodes). An 'ideal' diode drops 'infinitesimal' voltage when conducting. Therefore when D3 is conducting the voltage across the resistor is (infinitesimally smaller than) 3 V. But what about the other diodes? D1 will only conduct if the voltage at its cathode (relative to ground) is less than 1 V, and D2 will only conduct if its cathode is less than 2 V. With a voltage of 3 V on their cathodes, both D1 and D2 will be reverse biased and pass no current. The diodes prevent the 1 V and 2 V supplies from 'shorting out' the 3 V supply, allowing the voltage across the resistor to become 3 V.
H: How unsafe is 220V over NEMA 5-15 really? I'm from the Philippines but the U.S. had a very large influence on our electrical standards. It is especially evident on our electrical sockets. While all of the sockets in a typical Filipino home are rated 220V, they are all NEMA 5-15 (except for outlets of air-conditioners which use NEMA 6-15.) From what I've read, this is different from the American standard wherein NEMA 5 is only used for 120V devices and NEMA 6 for 240V ones. Does the alignment of the live/neutral prongs in NEMA plugs have anything to do with the the maximum voltage it could withstand? In other words, does this mean that two colinear prongs (NEMA 6-15) could withstand higher voltages compared to two parallel prongs (NEMA 5-15)? Hypothetically, if the U.S. got rid of 120V altogether, would they still bother having different types of outlets? AI: Realistically the only reason it is dangerous is because someone might accidentally plug in a 120 V appliance in a 220 V outlet (in the US, I mean). The insulation and everything is fine. The clearances of the connectors are fine. The only reason NEMA 6-15 and 6-20 plugs have the blades in a different direction is to make sure people (in the US) cannot accidentally plug in the wrong thing. If the US got rid of 120 V, then we probably would have only one type of outlet here in the US. Just to be clear, in the US, connecting 240 or 220 V to a NEMA 5-15 or 5-20 outlet is strictly forbidden by electrical codes. The outlets are only rated for 125 V (per code). I am not trying to say people should violate the electrical code or that codes don't matter. The question is about whether it would be inherently dangerous to use a 125 V plug and outlet for 220 or 240 V.
H: Why does switching cause power dissipation? I know that switching logic values causes power dissipation but I could never understand why. Is it because transistors need to be turned on each time we want to charge/pull up a node and discharge/pull down a node? Is this power consumed by the transistor responsible for the switching multiplied by the activity factor and frequency called the dynamic power? Is power dissipation just another word for power "consumed"? AI: Why does switching cause power dissipation? Imagine you had a near-perfect switching transistor that needed no control energy to cause it to change from an open-circuit to a very-low-value "ohmic" closed circuit (or vice versa). There's no energy wasted in the driving of this transistor by definition. Then, imagine that the transistor had to discharge a node from (say) 5 volts to 0 volts - imagine also that the node possessed no self-capacitance. This would then mean that no energy was needed to change the voltage on that node from 5 volts to 0 volts. It also means that the node in question would take no energy to re-establish the 5 volts when the discharge transistor went open-circuit. But, every node does have capacitance and, initially that capacitance is charged to 5 volts so, in order to discharge that node, you need to remove energy and convert it to heat in the very-low ohmic "on" resistance of that transistor. So, you have "burnt" energy and made it into heat and, when the transistor disengages, the node capacitance re-charges to 5 volts - to do so it has to take energy from the power rails to recharge the capacitance. So, if this is repeated cyclically, you are taking energy from the power rails cyclically and converting that energy to heat. Power is energy per second. Switching therefore causes power dissipation. If you do this switching at a low frequency the power is lower; if you do it at a high frequency, the power is higher.
H: What is the practical advantage of root locus method in control system engineering? Recently I learned about the topic. Decades ago, when no computational power was available for engineers, it was surely helpful in some way. But I do not understand what the advantage is nowadays, because with any math-tool I can compute poles for a given closed loop system quickly without the need to have ~10 construction rules for loci in mind. Within seconds I can visualize the results on pole locations when I change a parameter in the control function. Additionally: it is seems only usable when there is only ONE parameter to be changed. But even in the case of a simple PID controller we have three parameters to be changed simultaneously. Note: This is not criticism, I just want to understand why the method is usually taught. It seems for me, it is more a "didactical concept" which helps to understand what's the effect of changing a parameter but not really a design tool. AI: You might find it interesting to know that the PID controller was around long before root locus. Root locus was so popular when it was first discovered because it was one of the first methods that could be used to actually design a control system without needing to play around with the parameters Controllers like a PID are what I call trial and error methods where you use a canonical approach and then guess the parameters through trial and error. Although this works in many applications, for others you could end up damaging something, and it actually takes longer than just doing a root locus design in the first place. You can do the same approach with classical controllers like a gain controller or a lead compensator by guessing the k parameter until you get something you like, but you don’t need to do this if you have the root locus. If you understand the root locus well enough, you can find the exact k value you want that gives you the proper response time and damping very easily. You can use a computer to plot the root locus and analyze it to find the right gain parameter in seconds without needing to go through trial and error. Yes root locus is really intended for single input single output designs with one control parameter, but there’s a lot of applications that need this, so I would say it’s still useful. Your university might teach you how to go through the painstaking process of plotting the root locus for the same reason they teach you how to analyze circuits even when you can use a simulator. It pays to have a fundamental knowledge of how something works when you use it.
H: Multiple Feedback Band Pass Filter Noise I designed a multiple feedback filter using the analogue devices filter wizard. I have never designed this type of filter therefore I followed up by reading about it and manually calculating the components. I used arbitrary values to learn the process. My first filter has Q of 5 and Fc at 50KHz and about 6dB of gain. I also used Ideal op-amp for simplicity. I measured the noise over a wide spectrum of 1K to 1Meg ignoring 0.1Hz to 1KHz as 1/f noise is heavily suppressed as well as I am using an ideal op-amp. I have decided to redesign the filter with a higher value for the Q. I designed for Q of 50 and fc at 50KHz and about 6dB of gain. Same as before I used ideal op-amp and the same bandwidth for noise. To my surprise, the filter with higher Q is noisier. What would be the reason for this? I measured the noise produced by R1 as it is 10s higher and the RMS value calculated by LTSpice is about the same. Therefore, the only other major difference is positive feedback. Could someone explain how this positive feedback loop works? Also why this positive feedback is not necessary for lower values of Q? AI: To my surprise, the filter with higher Q is noisier. What would be the reason for this? The noise gain in the 2nd circuit is about 20 dB higher than the first circuit. How do you measure noise-gain: - I discarded the input source and left it open circuit because the circa 100 Ω resistor was very dominant here. Strictly speaking I should have shorted the input source resistor but, on this occasion it will make very little difference to the result. The difference in noise gain is about 20 dB hence, the 2nd circuit will handle op-amp noise quite differently compared to the first circuit. And, it is almost entirely down to the use of positive feedback. Here's what the noise gains look like when the feedback is removed in the 2nd circuit: - Could someone explain how this positive feedback loop works? Also why this positive feedback is not necessary for lower values of Q? I might be able to but, you need to link to a document that describes that circuit. It's not one I've come across before so I'm a tad out-of-my-depth here but, I'm willing to run through any derivation about this if you can provide a link to a web source that describes it. Suffice to say (for now) that it is the positive feedback that creates a significantly higher op-amp noise gain.
H: Unknown SMD Component I'm trying to find the components of the PCB I have. I have a problem with a 5 pin (SOT23-5) component. Can someone help me with this? There are version1, version2 and version3 of the PCB and marking codes are AA43, AA44 and AACB respectively. There is a reset button and an error switch on the board. I measured the voltage values ​​when I pressed any of them (see schematic.) AI: The usual search from s-manuals (https://www.s-manuals.com/smd/aa) didn't bring useful results. The part looks like a low voltage op amp judging from the schematic. The right-hand side sub-circuit looks like a low-pass filtered non-inverting amplifier which converts the load current of the top-right NMOS to voltage. And the output goes to MCU (probably to ADC) through another RC low-pass filter. The other sub-circuit to the left is a buffer which gets its input from MCU/1.24V through a RC filter+divider and generates a reference/bias voltage for the amplifier stage for accurate/sensitive current measurement. So what you can do is to search single low-voltage op amps with SOT-23-5 package from Digikey, Mouser, etc. and check their markings.
H: Why does reverse recovery behavior matter for half bridge bootstrap diode? I have seen several recommendations in the past to use a schottky bootstrap diode in half bridge drivers, even if the driver integrates a Si junction diode for the purpose, because supposedly the reverse recovery of that diode would be really bad. Random reference. simulate this circuit – Schematic created using CircuitLab But why is the reverse recovery behavior of diode D1 even important? My thinking is as follows: When the switch node turns low, current flows through D1, Cboot and M4 to replenish the charge in Cboot. This is only a very short pulse, as Cboot will soon be "full" limited by the logic voltage. Then, D1 will be essentially off, having a very small forward bias. This small bias will slowly raise the bootstrap voltage a little more. Much later, the half bridge toggles. Current flows from Cboot and M2 into M1's gate. D1 doesn't take part because the bootstrap voltage is still too high for it to develop appreciable forward bias. The switch node jumps up. So when the diode becomes reverse biased, it is off already. Then from what would it even need to recover? AI: When the Switch node turns low, current flows through D1, Cboot and M4 to replenish the charge in Cboot Which stores charge in the diode junction, it's how silicon junction diodes work. This is only a very short pulse, as Cboot will soon be "full" limited by the logic voltage. Then, D1 will be essentially off, having a very small forward bias. This small bias will slowly raise the bootstrap voltage a little more. The diode stays 'on' while it has charge stored in it. The bias across the diode is still forward, and so is doing nothing to sweep charge out of the junction, in fact charge is still being injected by the forward current. Charge is also recombining slowly within the junction, so the diode will head to a new equilibrium stored charge level where the recombination equals the injection rate.But it's only started to go there, it doesn't happen instantly. In a 'fast' diode, recombination happens more quickly than in a slow one like a 1N4004. Much later, the half bridge toggles. Current flows from Cboot and M2 into M1's gate. D1 doesn't take part because the bootstrap voltage is still too high for it to develop appreciable forward bias. As far as D1 is concerned, not a lot has changed round it. This state is fairly brief. The switch node jumps up. So when the diode becomes reverse biased, it is off already. Then from what would it even need to recover ? Now finally the bias across D1 reverses. It's still on, as there's plenty of charge remaining in the junction. The remaining charge that hasn't recombined now starts to get swept out of the junction. This sends a large reverse current through the diode heating it, and dragging the voltage on Cboot down a bit. A schottky diode doesn't have this charge storage mechanism, so behaves more like the sequence in your question.
H: How do I use a 4x2 ROM to build a 16x4 ROM? I tried solving it but I'm not sure if I got it right AI: The outputs do not appear to be correct. Each pair of ROMs should have an output to each of Y0, Y1, Y2, and Y3. The first ROM should have one output to Y0, the other to Y1, the second ROM one output to Y2, the other to Y3, the third would go to Y0 and Y1, fourth to Y2 and Y3, etc. You also have to make sure that the outputs are high impedance when the ROM is disabled so they don't interfere with each other.
H: ST-Link doesn't show any data on the serial port I am working on Nucleo board programming circuits. This board programs like an Arduino, you can compile, run and show data on the serial port. Actually, you can do debugging, too. You just need a USB input for everything. PROBLEM: I designed a flight computer that has SWCLK,SWDIO,RST,RX,TX pins for programming. I thought I can combine that programming like ST-link which is on the Nucleo board, but I can't reach my goal. (I mean, I compile and run the code from Nucleo ST-link but I can't see anything on the serial port.) I can't program it like an Arduino or Nucleo board. Any idea for this problem? Normally the ST-link debugger is enough for embedded programming, but I want to use the serial port, too. Pins which I put into the PCB. Nucleo ST-link enter image description here This is the wiring which I use for programming my flight computer. AI: The Nucleo development board includes an "embedded" ST-Link MCU that is separate from, and in addition to, the target STM32 MCU that you're developing for. The embedded ST-Link MCU provides several features via the USB interface, including: A single wire debug (SWD) interface to the target STM32 MCU. A virtual COM port to one of the target STM32 MCU's UARTs. A mass storage interface (virtual drive/filesystem). The ST-LINK V2 compatible programmer device shown in your first picture supports only the SWD interface. It does not provide the virtual COM port or mass storage interface features that the Nucleo's embedded ST-Link MCU provides. If you want to use a virtual COM port with your custom board then you could use a TTL to USB serial adapter cable (such as this or this). You would need to use two different USB ports on your development system, one for the ST-LINK V2 debugger, and another for the TTL to USB serial adapter cable. Alternately, you may be able to use the embedded ST-Link MCU on the Nucleo board to both debug and provide a virtual COM port to your custom board. This would entail disconnecting the embedded ST-Link MCU from the Nucleo's target STM32 (via some jumpers), and then connecting the embedded ST-Link MCU to your custom board (via some flying wires). See sections 6.2.4 and 6.8 in the Nucleo-64 User Manual for more information.
H: Can someone explain how this code execution is happening? module test; int j; initial begin for(j=0;j<3;j=j+1) fork $display("inside fork join",j); join_none $display(j); end endmodule I am really confused about the values I see in the output. Can someone please explain how it is working. OUTPUT: # KERNEL: 3 # KERNEL: inside fork join 3 # KERNEL: inside fork join 3 # KERNEL: inside fork join 3 AI: The fork/join_none does not start any of those threads until after the parent thread blocks or terminates. In your case, it's after the initial block process terminates. By that time, the value of j is 3 after exiting the for loop`. To get your code to display 0,1, and 2 (in any order as three threads are forked off concurrently), you cannot use a single static variable for j. You need a create a copy of j for each iteration of the for loop using an automatic that gets initialized with the current value of j for each loop. module test; int j; initial begin for(j=0;j<3;j=j+1) fork automatic int i = j $display("inside fork join",i); join_none $display(j); end endmodule
H: Unknown MOSFET symbol I came across the schematic symbol shown, and I am unsure of what the symbol in the green box is. It looks like a PMOS (yellow box), but it has the line before the gate. Has anyone seen this before? AI: Those FETs are both nMOS transistors, drawn in the CMOS schematic style. This is the style that you're likely to see (both hand-drawn and printed) in a course on integrated analog CMOS design. source If this is on an integrated process, chances are the transistors are symmetric with body connections made to the shared substrate, so it's not necessarily correct to conclude that the arrow is at the source and the other side is the drain. The "line before the gate" is just an input signal, which may look weird simply because there isn't a lot of room to space out the schematic. The other end of the connection is not shown on this schematic, and is likely a control signal from some other part of the schematic, or another schematic in the same paper/document.
H: ESP-WROOM-32 unable to flash with auto-program UART I just made a custom schematic and PCB with an ESP-WROOM-32 module. The board has a USB-UART chip (CP2102) and an auto-program circuitry to flash firmware without pressing buttons, but it doesn't work: esptool.py stops with Failed to connect to ESP32: Timed out waiting for packet header Here are the relevant parts on my schematic: I tried desoldering Q1 and Q2 and put two pushbuttons (+ pullups) and I could verify that the TX/RX lines are working, as I could flash a firmware. I took the schematic from the LOLIN32 board. AI: The LOLIN32 schematic shows C6 with a too large capacity (1uF). That is important for the timing, as the auto-program circuitry needs to assert EN for the right amount of time. In the reference schematic it's just 1nF: The WEMOS D32 uses 100nF: As I had an 100nF capacitor, I used that as a replacement and the auto-circuitry finally started working.
H: In calculating the inductor for a boost converter, where does the power of the voltage source calculate in? simulate this circuit – Schematic created using CircuitLab As I am using LTspice to develop different types of dc-dc boost converter topologies and wanted to define the best inductor to use when the voltage source only produces a current of 30 μA's, I was reading these very useful equations in answer one from this link: How to design a boost converter? And how to specify the inductor and capacitor values? Everywhere I look, all formulas assume the inductor will accept nJoules/μSeconds based on what the load needs. Of course this is not true. If the source can't provide energy, then the duty cycle or frequency must slow down or the expectation has to be lowered. I'm (attempting) writing a calculator to take this into account. For my calculator I have energy in (joules) per cycle and energy required per cycle. The latter is discussed in formulas, and the first I could do through guess work, but is there an actual formula to present it? Edit. Here's an example of the formulas used: Energy in. Vin = 1.6V, Iin = 30μA Freq = 10Khz Thus E = 4.8E-09 J E = (V * I) / Freq Energy Out. Vout = 5, Iout = 10mA, Thus E = 5E-6 J Proposed Inductor: L = ?? (6.8 μH), Current in Inductor = 0.383482494 A I = sqrt((2 * Jout)/ L) Duty Cycle: V = L*di/dt thus Amps/S (0.3834 A/ .0001)=5 V/6.8 μH = 0.5% Which of course is incorrect as it doesn't take into account that the 'energy in' can't provide 383 mA in 0.5% duty cycle of 10KhZ unless I'm totally not understanding this. But, my simulations pretty much prove this. At 25% duty cycle on 20KhZ I can load a 6.8 μH Inductor to 604.35 μA's with the Voltage Source shown above. Edit for Jonk: Remember the voltage source for this? The blocking oscillator works well, but I think I can improve on it in a dc-dc boost topology. AI: To Start the Discussion I'll write up a few things from memory. Since your input is limited to \$30\:\mu\text{A}\$ and since I never start with that limitation but instead work out what I need to supply as an output, not as an input to the design, what I have to say will have to be considered with that in mind. Also, I'm keeping in mind that this is a boost application. So it must be the case that \$V_{_\text{IN}}\lt V_{_\text{OUT}}\$. Let's say that my semiconductor switching device, when on, drops \$V_{_{\text{Q}_\text{ DROP}}}=100\:\text{mV}\$ and my semiconductor flyback diode drops \$V_{_{\text{D}_\text{ FLY}}}=300\:\text{mV}\$. (I'm just picking this out of thin air, for now, to simply establish that there are some realities that have to be accepted and dealt with.) Then the applied voltage across the inductor during the on period is \$V_{_{\text{ON}}}=V_{_\text{IN}}-V_{_{\text{Q}_\text{ DROP}}}\$ and the inductor's flyback voltage during the off period is \$V_{_{\text{OFF}}}=V_{_\text{OUT}}+V_{_{\text{D}_\text{ FLY}}}-V_{_\text{IN}}\$. (I'm assuming a little something about the topology there. Hopefully, this comports with your case.) The duty cycle is then \$D=\frac{V_{_{\text{OFF}}}}{V_{_{\text{ON}}}+V_{_{\text{OFF}}}}\$ and the peak inductor current needs to be \$I_{_{\text{PEAK}}}=2 I_{_{\text{OUT}}}\frac1{1-D}\$. Since you are specifying \$30\:\mu\text{A}\$ as an input limitation, I take this to mean that \$I_{_{\text{PEAK}}}=30\:\mu\text{A}\$ as an input to the design. So this means that \$I_{_{\text{OUT}}}=\frac12\left(1-D\right)I_{_{\text{PEAK}}}\$. That's going to be your first moment of validation as to whether or not you can achieve what you want to achieve, at all. If the output current doesn't meet your requirement, you are done. You cannot do what you want to do with what you have. Box the idea up and put it on a shelf. Game over. Note that frequency and Joules haven't even entered into the above. The frequency will be proportional to the inductance, \$L\$, the peak inductor current, \$I_{_{\text{PEAK}}}\$, and inversely proportional to a concept that kind of looks like taking \$V_{_{\text{ON}}}\$ and \$V_{_{\text{OFF}}}\$ in parallel, \$\frac{V_{_{\text{ON}}}\cdot V_{_{\text{OFF}}}}{V_{_{\text{ON}}}+V_{_{\text{OFF}}}}\$. Obviously, of the above, you are missing \$L\$. So we can't speak of frequency, just yet. The inductor needs to be designed. That's the entire point, here. And now, without frequency, there's no point in talking about Joules, either. You need to fill out the details, now. If you do, I may expand this into a real answer. For now, it's here to get you to improve the question. It was more than I could consider writing as comments. Playing With Your Added Details \$V_{_\text{IN}}=1.6\:\text{V}\$ \$V_{_\text{OUT}}=5\:\text{V}\$ \$I_{_\text{IN}}=30\:\mu\text{A}\$ I've no idea what your practical switch and diode are, but I'm going to stick with the numbers I started with: \$V_{_{\text{Q}_\text{ DROP}}}=100\:\text{mV}\$ \$V_{_{\text{D}_\text{ FLY}}}=300\:\text{mV}\$ From here I find: \$V_{_{\text{ON}}}=1.6\:\text{V}-100\:\text{mV}=1.5\:\text{V}\$ \$V_{_{\text{OFF}}}=5\:\text{V}+300\:\text{mV}-1.6\:\text{V}=3.7\:\text{V}\$ \$D=\frac{3.7\:\text{V}}{1.5\:\text{V}+3.7\:\text{V}}\approx 0.712\$ Now, let's add in another specification you gave: \$I_{_\text{OUT}}=10\:\text{mA}\$ From this, I find: \$I_{_\text{PEAK}}=2\cdot 10\:\text{mA}\cdot\frac1{1-0.712}\approx 70\:\text{mA}\$ Note that this is quite a bit more than \$30\:\mu\text{A}\$. Now, if you plan to use this output supply only for very short periods of time and can spend a lot of time, beforehand, charging up an output capacitor, then perhaps there's more to discuss. In this case, we can say: \$I_{_\text{OUT}}=\frac12\cdot 30\:\mu\text{A}\cdot\left(1-0.712\right)\approx 4.3\:\mu\text{A}\$ And you may use that to help charge up a capacitor for occasional use. Unfortunately, some of the earlier assumptions made in developing those earlier relationships I wrote above (an equilibrium state, which is no longer true) also no longer apply in the same way as before. Which means developing new equations for this specific purpose, if so. I'll leave it there, for now.
H: AC adapter makes high pitched noise when a notebook is turned off or asleep When I put my notebook into sleep mode or turn it off the notebook's AC adapter starts making a high pitched noise. When the notebook is on the adapter doesn't make any noises. Could anybody explain why this happens? Is it OK or should I get another adapter? AI: It's probably caused by coils or components with piezo-electric properties (e.g. ceramic capacitors), which can produce audible noise when they are switched periodically. Power supplies like the one of your laptop typically involve a switching regulator (SMPS) and some of those SMPS vary their switching frequency based on the current required by the load. That explains why you only hear the noise when the laptop is off or in standby: the SMPS needs to provide only little current and therefore likely reduces the switching frequency to a range that you can hear. In that case, there is nothing to worry about. Actually, the reason why most PSUs don't make any audible noise is because their switching frequency is far above the range that we can hear. Btw, my Think Pad notebook's charger does the same thing.
H: Why do resistors not result in voltage drop when measuring an open circuit? I'm very new to electronics and have been trying to learn the basics of electricity as a starting point. The mental model I've developed so far is the standard water/pipes analogy. I.e. voltage is like the pressure, amperage is flow of water, and ohms is the constricting or pinching of the pipe. What I struggle with is how, if the circuit is open, the voltage would be unaffected by the resistors. As an example: In this circuit if you measure the voltage between A-D, B-D, and C-D when the circuit is open like this, the voltage is always 5V. If connected however, the voltage becomes 5V, 2.5V, 0V, respectively. Why are the open circuit voltages different? I understand that voltage represents a potential difference, but when we measure the voltage between B-D and C-D, shouldn't the resistance restrict some of that potential? It's hard for me to fit this into my mental model of water and pipes. I know that Ohm's law requires current, and maybe that has something to do with it? But how can 5V be measured with the multimeter between C-D without the resistors affecting the potential during the measurement? AI: Why are the open circuit voltages different? I understand that voltage represents a potential difference, but when we measure the voltage between B-D and C-D, shouldn't the resistance restrict some of that potential? It's hard for me to fit this into my mental model of water and pipes. The voltage drop through a resistor is given by Ohm's Law: \$V = IR\$. If \$I\$ is zero, then there is no voltage drop. Because no current can flow in an open circuit, \$I\$ is zero. I know that Ohm's law requires current, and maybe that has something to do with it? But how can 5V be measured with the multimeter between C-D without the resistors affecting the potential during the measurement? A voltmeter (or multimeter set to voltage mode) is specifically designed to measure a voltage while drawing as little current as possible. We can say that its input impedance is very large, on the order of megaohms. You may solve the following circuit and convince yourself that the voltage across C-D is approximately 5 V: (the 1 megaohm resistor represents your voltmeter's leakage, and is an under-estimate; in reality a good multimeter will be much closer to an open circuit)
H: Best way to measure microvolt potentials in an electrolyte solution? I wish to measure microvolt-level fluctuations in a small volume of electrolyte solution, currently saltwater. My existing setup works but has some strange data so I'm hoping someone with more experience can help me sort it out. Equipment I'm using an electrically-isolated voltmeter sensitive in the ~30 uV range at a 100 Hz sampling rate. The sensor wire (red) is immersed in the solution along with the BNC ground wire (also coming from the sensor) which is then split to connect with Earth ground. I've validated this setup by placing an additional wire into the solution carrying a 1 Hz sine wave produced by my sound card, which is picked up by the sensor as expected: Questions Is this circuit really doing what I expect it to? It seems to work but I don't know exactly why. Do I even need the Earth ground if everything is shielded? When I use distilled water I get roughly the same reading (!?) and can also induce the sine wave. I didn't think distilled water was at all conductive, so... how is this possible? I've tried to carefully clean all equipment, new tube, new leads, no touching the wires, etc., although I'm trusting Arrowhead that my water is actually distilled... When using saltwater, the voltage seems to increase slowly over time, even when EMF shielded (see chart.) I had expected it to be more constant on average or go down--- what might account for this behavior? Thanks! AI: I have a suggestion to debugging your setup methodically. Determine the source resistance of the configurations you need to measure. By direct measurement if at all possible. Procure a resistor or resistors of equivalent value. If you are in North America that's a next-day thing. Test with the resistor(s) in place of the electrodes and compare results. Given the relatively large voltages from electrochemical reactions, I imagine you are going to have to be very careful with the electrode composition and cleanliness (maybe identical platinum wires from the same piece), but that's just a guess. I have certainly seen leakages that could explain what you are seeing due to subcontractors using unapproved procedures. That should be caught by the module manufacturer, but..
H: What does it mean when there's a minus sign in front of a signal? What does it mean when there's a minus sign in front of a signal? For example: reg [8:0] A; reg [4:0] B; wire C; assign C = -A[4:0] <= B; What's the meaning of the -A[4:0]? AI: The unary minus operator - produces the 2-complement of the operand. That complements each bit and adds 1 to the result. If A[4:0]=5'b00011, then -A[4:0] would be 5'b11101. Note that the operand gets extended to the width based on the context of the expression it's in before the - operator gets applied. If you had declared reg [8:0] B;, then -A[4:0] in your example would result in 9'b111111101.
H: How to generate .ruc file? I am using RA2A1 MCU for my product and want to use UNIQUE ID code for security purpose and restrict the debugging without ID code. While flashing from Renesas Flash Programmer (RFP-3.09.01) we required to provide security key which should be store in .ruc file. My problems is that how to generate .ruc file. I try to save the code in simple .txt and change the file extension from .txt to .ruc. But that method is not working and showing file is not readable (Error00000302). AI: The .ruc file needs to have specific format, not only the codes. Explanation of the format and an example is provided on Renesas documentation, see pages 36-37: https://www.renesas.com/us/en/document/mat/renesas-flash-programmer-v302-flash-memory-programming-software-users-manual Have you tried using other location than OneDrive? It can sometimes cause problems. Earlier I wrote about Notepad's default encoding, UTF-8, but it shouldn't actually matter, since UTF-8 is backwards compatible with ASCII if you only use ASCII charset symbols in the file.
H: How do you determine that a MOSFET needs a gate driver as logic levels are not good for it? I'm using an IRF620 MOSFET paired with a TC4420 high speed gate driver. Just using the MOSFET by itself with the Arduino does not work properly. It works a lot better and faster with a gate driver. What I'm confused about is firstly why the MOSFET just does not work with normal logic levels. Maybe I'm getting things confused but isn't the VGS the aspect you should be looking at to determine if MOSFETs can be used by logic level components? Why then is the IRF620 sitting at 4V/0.25mA on the below datasheet but does not work when connected to a digital pin of an Arduino, but works with a 6A gate driver? Maybe I'm looking at an incorrect datasheet for the MOSFET? I'm unsure, but these are the links: IRF620 MOSFET TC4420 High-Speed Gate Driver AI: The IRF620 is not a logic-level MOSFET, it requires VGS= 10V to get a guaranteed low Rds(on) of 0.8\$\Omega\$ (not that low, but it's an older design of relatively high-voltage MOSFET). If you only need it to conduct 0.00025A with 4V drop allowed across the MOSFET, then use the 4V number. That would be a bit of a waste. You won't likely find a logic-level MOSFET rated for 200V. I don't see a gate charge specification in your linked datasheet, however the Vishay datasheet for that part number has a maximum gate charge of 14nC under specified conditions. That charge must be supplied by the driver. If you don't care how fast it switches, a high current driver is not necessary, but if you need it to switch quickly then you need to slam the gate with a lot of current in or out. Switching slow causes heating of the MOSFET during the switching, and can violate the SOA (see my linked datasheet) if the load is high current and the switching is too slow, causing immediate or eventual failure.
H: MSP430 ADC, using a different memory slot other than MEM0 I'm working with the MSP430Ware Sample Code for a basic ADC on the MSP-EXP430FR5994 development board. On the code, it uses MEM0 and the supporting infrastructure such as flag 0 to convert. The one underneath is my modification; I've used MEM2 and flag 2 to convert. #include <msp430.h> #include <stdio.h> int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop WDT // GPIO Setup P1OUT &= ~BIT0; // Clear LED to start P1DIR |= BIT0; // Set P1.0/LED to output P1SEL1 |= BIT2; // Configure P1.2 for ADC input (See p369, p88 of specific for pin config details.) P1SEL0 |= BIT2; // There are two Pin Select bits (p88 of specifics, we are given that P1.2 corresponds to A2.) // Disable the GPIO power-on default high-impedance mode to activate // previously configured port settings (p92) PM5CTL0 &= ~LOCKLPM5; // Configure ADC12 ADC12CTL0 = ADC12SHT0_2 | ADC12ON; // Sampling time, S&H=16, ADC12 on [p893, CTL0 = control 0, SHT0_2 = sample & hold time, knowledge of register value from p88_s] ADC12CTL1 = ADC12SHP; // Use sampling timer [p895, Sampler uses sampling timer (not sure what that is yet)] ADC12CTL2 |= ADC12RES_2; // 12-bit conversion results [p897, RES means resolution, _2 means 12 bits] ADC12CTL3 |= ADC12CSTARTADD_3; // Use MEM3/MCTL3 //ADC12MCTL0 |= ADC12INCH_2; ADC12MCTL3 |= ADC12INCH_2; // A2 ADC input select; Vref=AVCC [MCTL2 = Memory Control 2 (p900), INCH = input channel, 2 means channel A2] ADC12IER0 |= ADC12IE3; // Enable ADC conv complete interrupt [p903, means "interrupt enable register 0". Enables or disables the interrupt request for ADC12IFG2 bit] printf("Got here.\n"); while (1) { printf("Got there.\n"); __delay_cycles(5000); ADC12CTL0 |= ADC12ENC | ADC12SC; // Start sampling/conversion [p893, ENC = enable conversion, SC = start conversion. difference between the two = idfk, but remember to have both set] __bis_SR_register(LPM0_bits | GIE); // LPM0, ADC12_ISR will force exit // printf("Got nowhere.\n"); __no_operation(); // For debugger } } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector = ADC12_B_VECTOR __interrupt void ADC12_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(ADC12_B_VECTOR))) ADC12_ISR (void) #else #error Compiler not supported! #endif { switch(__even_in_range(ADC12IV, ADC12IV__ADC12RDYIFG)) { case ADC12IV__NONE: break; // Vector 0: No interrupt case ADC12IV__ADC12OVIFG: break; // Vector 2: ADC12MEMx Overflow case ADC12IV__ADC12TOVIFG: break; // Vector 4: Conversion time overflow case ADC12IV__ADC12HIIFG: break; // Vector 6: ADC12BHI case ADC12IV__ADC12LOIFG: break; // Vector 8: ADC12BLO case ADC12IV__ADC12INIFG: break; // Vector 10: ADC12BIN case ADC12IV__ADC12IFG0: // Vector 12: ADC12MEM0 Interrupt if (ADC12MEM0 >= 0x7ff){ // ADC12MEM0 = A1 > 0.5AVcc? P1OUT |= BIT0; // P1.0 = 1 } else{ P1OUT &= ~BIT0; // P1.0 = 0 } printf("In MEM0."); ///int memval = ADC12MEM0; // Memory stored in MEM0, because it was set from above. ///printf("%d\n", memval); // Exit from LPM0 and continue executing main __bic_SR_register_on_exit(LPM0_bits); break; case ADC12IV__ADC12IFG1: break; // Vector 14: ADC12MEM1 case ADC12IV__ADC12IFG2: break; // Vector 16: ADC12MEM2 if (ADC12MEM2 >= 0x7ff) { // ADC12MEM2 = A1 > 0.5AVcc? P1OUT |= BIT0; } // P1.0 = 1 else{ P1OUT &= ~BIT0; } // P1.0 = 0 printf("In MEM2."); int memval = ADC12MEM2; // Memory stored in MEM0, because it was set from above. printf("%d\n", memval); // Exit from LPM0 and continue executing main __bic_SR_register_on_exit(LPM0_bits); break; case ADC12IV__ADC12IFG3: break; // Vector 18: ADC12MEM3 case ADC12IV__ADC12IFG4: break; // Vector 20: ADC12MEM4 case ADC12IV__ADC12IFG5: break; // Vector 22: ADC12MEM5 case ADC12IV__ADC12IFG6: break; // Vector 24: ADC12MEM6 case ADC12IV__ADC12IFG7: break; // Vector 26: ADC12MEM7 case ADC12IV__ADC12IFG8: break; // Vector 28: ADC12MEM8 case ADC12IV__ADC12IFG9: break; // Vector 30: ADC12MEM9 case ADC12IV__ADC12IFG10: break; // Vector 32: ADC12MEM10 case ADC12IV__ADC12IFG11: break; // Vector 34: ADC12MEM11 case ADC12IV__ADC12IFG12: break; // Vector 36: ADC12MEM12 case ADC12IV__ADC12IFG13: break; // Vector 38: ADC12MEM13 case ADC12IV__ADC12IFG14: break; // Vector 40: ADC12MEM14 case ADC12IV__ADC12IFG15: break; // Vector 42: ADC12MEM15 case ADC12IV__ADC12IFG16: break; // Vector 44: ADC12MEM16 case ADC12IV__ADC12IFG17: break; // Vector 46: ADC12MEM17 case ADC12IV__ADC12IFG18: break; // Vector 48: ADC12MEM18 case ADC12IV__ADC12IFG19: break; // Vector 50: ADC12MEM19 case ADC12IV__ADC12IFG20: break; // Vector 52: ADC12MEM20 case ADC12IV__ADC12IFG21: break; // Vector 54: ADC12MEM21 case ADC12IV__ADC12IFG22: break; // Vector 56: ADC12MEM22 case ADC12IV__ADC12IFG23: break; // Vector 58: ADC12MEM23 case ADC12IV__ADC12IFG24: break; // Vector 60: ADC12MEM24 case ADC12IV__ADC12IFG25: break; // Vector 62: ADC12MEM25 case ADC12IV__ADC12IFG26: break; // Vector 64: ADC12MEM26 case ADC12IV__ADC12IFG27: break; // Vector 66: ADC12MEM27 case ADC12IV__ADC12IFG28: break; // Vector 68: ADC12MEM28 case ADC12IV__ADC12IFG29: break; // Vector 70: ADC12MEM29 case ADC12IV__ADC12IFG30: break; // Vector 72: ADC12MEM30 case ADC12IV__ADC12IFG31: break; // Vector 74: ADC12MEM31 case ADC12IV__ADC12RDYIFG: break; // Vector 76: ADC12RDY default: break; } } Testing via the terminal suggests it gets to "Got there" and then bricks itself. I am also receiving a warning on line "if (ADC12MEM2 >= 0x7ff)" stating that the code does not reach it, which is bad because that's the interrupt I need to get to (at least, that's what I think). If any more details are needed to resolve this issue please let me know. AI: The issue has been resolved. case ADC12IV__ADC12IFG2: break; // Vector 16: ADC12MEM2 if (ADC12MEM2 >= 0x7ff) { // ADC12MEM2 = A1 > 0.5AVcc? ... break; There was a break before the interrupt flag's content, which meant the interrupt would not reach the content. The correct code is now: case ADC12IV__ADC12IFG2: // Vector 16: ADC12MEM2 if (ADC12MEM2 >= 0x7ff) { // ADC12MEM2 = A1 > 0.5AVcc? ... break;
H: STM32H747 MDMA Transfer Error Address when using FreeRTOS I'm using the MDMA to communicate with an external flash over QUADSPI. I have an implementation which works great without FreeRTOS, but when I implement it using FreeRTOS I get Transfer Error Address. I have verified that the RAM address exists in AXI memory so it seems like there is something about FreeRTOS that is not allowing the MDMA to read the memory? // Write operation MDMA_Channel0->CDAR = &QUADSPI->DR; MDMA_Channel0->CSAR = pData; // pData is a uint8_t* // Read operation MDMA_Channel0->CDAR = pData; MDMA_Channel0->CSAR = &QUADSPI->DR; I've seen the issue with both read and write operations. For both read and write the MDMA_CESR_TED = 0, meaning that the error is related to a read access. This is the flow of the program: [FreeRTOS task] Perform write operation, set volatile flag indicating flash operations are busy [MDMA transfer complete interrupt] Disable MDMA [SPI transfer complete interrupt] Start polling flash status with QUADSPI [Polling match interrupt] set flag indicating flash operations are ready [FreeRTOS task] Perform read operation, set volatile flag indicating flash operations are busy [MDMA Transfer Error Interrupt] These are the MDMA registers when I enable the MDMA at step 5: These are the MDMA registers when I get the error interrupt at step 6: These are the QUADSPI registers when I enable the MDMA at step 5: These are the QUADSPI registers when I get the error interrupt at step 6: I have tried adding various delays in case it is a timing issue but to no avail. I don't understand why I get the error. AI: The issue that caused the error was MDMA_CxTBR_SBUS Changing that from 1 to 0, and it no longer crashed. The other issue I faced which is why I though this was RTOS related was that the FreeRTOS variables shared the same memory in RAM as my local variables.
H: Drain current spikes when switching on MOSFET with LT1160 driver I'm designing a control circuit meant to drive a proportional valve. I'm trying to simulate the driver and mosfet side of things in LTspice using the LT1160 half bridge driver and two readily available NMOS transistors. The problem I have is that while my setup seems to be working fine I'm noticing huge current spikes at the source of the high side MOS. At first I thought it might be because of shoot through but after checking the gate control signals they don't seem to overlap. Here are some pictures of my observation along with the circuit. The green signal is the command signal which has a frequency of 1 kHz and the blue one is the current at the source of M1. Thanks in advance, it's my first time posting here if i'm doing anything wrong please let me know :) PS: I should add that this is only a testing circuit and that the actual solution will use a full bridge to allow reverse voltage driving the Pvalve for fast current decay. AI: To fast turn on/off or not enough blanking between high side and low side fets may be the problem. Try to add something like below, experiment with Rg1 and Rg2 values adjust for your circuit.
H: Safety check - Is this Amazon PV combiner box labeled wrong? 15A Vs 32A - 500V vs 1000V I'm currently working on a solar circuit. I wanted to protect my internal systems from my panels in the event of a surge. I purchased a PV combiner box from Amazon - link to product. It claims to be a four-string box with 15A DC fuses and a 500V 63A DC circuit breaker. When the product arrived, the fuses are labeled 1000v DC 32A and the circuit breaker seems to be labeled 500V 6000A. Am I missing something or has someone dangerously mislabeled this box "VEVOR PV Combiner Box, 4 String with 15A Rated Current Fuse, 63A Circuit Breaker, Lightning Arreste Connector for On/Off Grid Solar Panel System, IP65"? AI: The 6000A rating on the circuit breaker is the maximum surge current that it is guaranteed to safely interrupt. The voltage ratings are the maximum allowable voltage, and should be higher than the actual voltage you're using in your system. And as @Ben Voigt already mentioned, the 32A rating on the fuseholder is for the fuseholder itself, the installed fuse can be anything below that.
H: How do Li-Ion batteries detect their temperatures? I know that Li-Ion batteries have specific charging temperature ranges... but how do they detect when they're too hot/cold to charge and prevent the charger from working? Secondary question: a component on the board a Li-Ion battery is connected to just blows up. The battery is now always reporting it's too hot, even though I can't feel it rising above room temperature. Why would that component blowing up suddenly make the battery think it's too hot to charge? AI: They usually have an internal NTC thermistor, connected between a separate terminal on the battery and battery negative. If the battery always indicates too hot, the internal thermistor or something in the charger is likely damaged. The battery itself really doesn't think anything. It only presents a temperature dependent resistance, that the charger will need to measure to decide whether the battery is within its acceptable charging temperature range.
H: Escape room: How how to switch between lamps? I’m building an escape room and have a little puzzle here… There is a lamp normally turned on when the people enter the room. When they solve a puzzle by putting a magnet in the correct place, I want the normal light to go off and a blacklight to come on. I’m planning to use a normally open switch that can be closed by a magnet in the puzzle. But I am not sure if it’s possible to switch the power from the normal light to the blacklight just with this? Here’s a picture of my idea: Is there something I could do in a junction box to achieve this effect? A diagram or links to parts would be really helpful. Thanks so much! This is my first question because I’m at my wits end… also, not to worry, I’ll have someone qualified check my work once I’m done. AI: Sounds like you need a single pole double throw relay. In this case it can power 1 of 2 circuits at a time: The relay will switch up or down which will power only one circuit at a time. Something like the following: So the NC (normally closed) would be on and powering the regular light, then when the circuit gets 5v on it then it would flip to the NO (Normally open) side and regular turns off & black light turns on.
H: How can I characterize this voltage source? This is my first attempt at trying to characterize a voltage source. The voltage source is a 99.8% magnesium rod (10mm diam., 160mm in length) its length wrapped by paper 1mm in thickness then its length once again wound with 4 meters 3k carbon filament. Its electrolyte is soil (moisture level: damp to touch) with heavy clay content, ph ~7. It is placed so that it stands with its full length vertically in the soil with only the top 2mm above the soil. Both its anode and cathode attached to 12 AWG insulated wire 100mm in length. Here has been my process thus far: Shorting the device and reading the current. Using the ammeter setting on my multimeter which has separate settings for μA, mA, and A. Set to μA. Positive lead attached to cathode, negative lead to anode. Result: 0.00 (possibly not sensitive enough?) *Edit: A friend has suggested this may be a high impedance source. I wonder how I might test that. Finding the open circuit voltage. Using the voltage detting with the multimeter still attached as in step 1 but leads are separated so as not to touch. Result: 1.327V and slowly rising [over an hour this will rise to 1.68V.] Attach various resistances and measure voltage. Voltage setting with multimeter still attached as above. The resistor is measured first separately, then placed in between the multimeter leads. (Voltage shorted to 1.327V prior to each test.) The resistors are carbon film except in the one instance mentioned. The voltage source has an unstable frequency measured on an oscilloscope between 2Hz and 10Hz. Results: (that make no sense!) 2.3 ohms, 1.4mV 5.1 ohms, 6.7mV 21.9 ohms, 14.5mV 99.5 ohms, 127mV rises at rate of 2mv/s. (127mV is initial reading) 150.9 ohms (wirewound resistor), 182mV* 325.8 ohms, 347mV rising *The 150.9 resistor started out at 110mV and rose at a rate of approx. 0.5mV/s for over 7 minutes, at which point I took the 182mV reading and stopped. While I recorded the readings and looked up, it had already reached into 188mV and still was rising. I didn't know what other tests to perform so I thought I'd use my multimeter and do a few other tests. Using the diode setting (to see how it would charge). Result: 1.715 rising rapidly to 2.0 at which point my multimeter went to O/L. I quickly went to μA setting and shorted the leads. still 0μA Back at voltage setting. Result: now at around 1.71V and slowly dropping until it reaches 1.35V over twenty seconds Use diode setting to 'recharge' to 2.0V. Return to voltage setting and short. Result: Immediate discharge from 1.98V to 1.35V Capacitance detting Result: Multimeter read 0.000 [indicating seeking] then eventually O/L [too large] maximum 2mF for this multimeter. AC setting: 1mV Perhaps this is enough data to characterize the voltage source. What other info might be useful to help characterize it? AI: Basically with a battery what you have is a voltage and a series resistance, knowing the open circuit voltage and load resistance you can use Ohm's Law to find the source resistance. You can calculate it with this formula: Rsource = (Vsource - Vload)/(Vload/Rload) So with the 325.8 ohm resistor it's Rsource = (1.327 - 0.347)/(0.347/325.8) = 920.1268 ohms. If you calculate it with the values you got for the 27.9 ohm resistor it will be around 1982 ohms. So clearly it's not operating in a linear fashion. Putting it in a table with with all of your readings yields this: It's hard to tell why the values are all over the place, I'm not sure what a makeshift battery buried in the ground is supposed to do, it's never really come up before. You could do more testing, try to get more accurate values and use a wider range of loads, and then put your results in a spreadsheet using the formula to calculate the values.
H: SystemVerilog ring oscillator simulation with different delays I am currently encountering issues with my ring oscillator simulation in SystemVerilog, which I cannot explain. Toolchain: ╰─○ iverilog -V Icarus Verilog version 11.0 (stable) () ╰─○ vvp -V Icarus Verilog runtime version 11.0 (stable) () ring_oscillator.sv looks as follows: module RING_OSCILLATOR #( parameter INVERTERS_PER_RING=3, parameter INVERTER_DELAY=1 ) ( input logic en, output logic out ); initial begin assert( (INVERTERS_PER_RING >= 3) && (INVERTERS_PER_RING % 2 != 0) ); end logic [INVERTERS_PER_RING-1:0] wires; assign out = wires[0]; genvar i; generate for(i=0; i<INVERTERS_PER_RING; i=i+1) begin if (i == 0) not #(INVERTER_DELAY) (wires[i], en ? wires[INVERTERS_PER_RING-1] : 0); else not #(INVERTER_DELAY) (wires[i], wires[i-1]); end endgenerate endmodule /* For INVERTERS_PER_RING = 3: wires[0] = en ? ~wires[2] : 0; wires[1] = ~wires[0]; wires[2] = ~wires[1]; */ Testbench: `timescale 1ns/1ps `include "ring_oscillator.sv" module RING_OSCILLATOR_TB(); logic en1; wire out1; RING_OSCILLATOR ro1 ( .en (en1), .out(out1) ); defparam ro1.INVERTERS_PER_RING=3; defparam ro1.INVERTER_DELAY=1; initial begin $dumpfile("ring_oscillator_tb.vcd"); $dumpvars(0, RING_OSCILLATOR_TB); #0; en1 = 0; #10; en1 = 1; #300; $finish(); end endmodule This simulation results in somewhat expected output as follows: But, when reaching a delay of 5ns per inverter, by setting: defparam ro1.INVERTER_DELAY=5 the oscillator malfunctions, as follows: The well-defined areas all have a width of 10ns, whereas the undefined areas have a width of 5ns. I'm new to SystemVerilog and hardware design in general. I would really like to understand what is actually happening here and how this may be fixed. AI: To debug this issue, you should look at the waveforms of the wires signal inside the RING_OSCILLATOR module as well. wires[0] is the output of the first not gate. At time=0, the input of that gate will be 0 since en=0, but it will take time for the 0 to propagate to the output. When INVERTER_DELAY=1, it takes 1ns for wires[0] to transition from x to 0. It takes 2ns for wires[1] to go from x to 0, and 3ns for wires[2] to go from x to 0. So, after 3ns, all wires signals will be 0. Since you wait until 10ns to enable the oscillator, all signals have had a chance to become known. However, when INVERTER_DELAY=5, it takes each not gate 5ns to clear the x, for a total of 15ns. But, you enable the oscillator at 10ns, which means all gates have not had a chance to clear the x's. To fix it, you need to wait a little more time, like 20ns. For example, change: #10; to: #20;
H: What are these types of coin cell contacts called? I am working on a low-profile product that will be powered by a coin cell. I've seen some products that use coin cell contacts that allow the battery to be beside the PCB, rather than on top of it. This saves Z height, and is desirable for my application. Note that these contacts are installed onto the PCB, not built into the coin cell itself. This means that the battery is easily replaceable. I've spent several hours looking for parts like this, but all of the battery clips I've been able to find are in a style where the battery's height is on top of the PCB's height, rather than next to it. What is the correct name for this style of battery clip? Example photos below: AI: This would go under a name such as "Ultra Low Profile" coin battery holder. Here is a similar part from Keystone that also requires a cut out in the PCB. https://www.keystone-europe.com/tag/coin-cell-holders/ Another drawing with dimensions: https://ken.keyeuro.eu/pdf/1057TR.pdf
H: I am trying to find equations for i1(t) and i2(t) using laplace transform for this step input The place that I am confused is that for \$i_1(t)\$ im trying to use the loop method to develop the first equation which is $$v(t)-L_1\frac{di}{dt}-(R_1+R_2)i_1(t)=0$$ and then use \$i_2(t)\$ for the second loop $$R_3i_2(t)+L_2\frac{di}{dt}+R_4i_2(t)=0$$ Is this the correct approach and if yes are the equations correct for \$i_1\$ and \$i_2\$ ? Thank you for any guidance. AI: It might be better to draw the currents as circular within the mesh, because it looks like you forgot that R1 and R2 use both \$i_1(t)\$ and \$i_2(t)\$: Now you can see that the equation for the first loop is: $$v_1(t)=L_1\dfrac{\text{d}i_1(t)}{\text{d}t}+(R_1+R_2)\biggr(i_1(t)-i_2(t)\biggr)$$ You should be able to continue with the second equation now.
H: What is the name for this connector socket pin configuration? Does anyone recognize this female socket pin layout as a standard design of any kind? I was looking at 5-pin CB Radio Microphone sockets, and they are similar, but not the same layout. Also, the ones I saw did not have the "sixth" connector pin in the middle hole. Does that make this a 6 pin socket? If it helps, these are vintage sockets most likely 1980s or earlier. AI: It's a bog-standard DIN connector. The thing in the middle is a rivet, not a pin. I suggest replacing it with something saner though. Any modern circular connector would perform better. Those DIN connector had one benefit: cheap and fairly low precision needed to make them, compared even to the venerable D-Sub connectors. Outside of extremely cost constrained consumer applications, I wouldn't use one. Much better connectors don't cost all that much more.
H: Need help with simulation of three-phase active rectifier on LTSPICE I have already successfully simulated a three-phase rectifier on simulink. However, I wish to implement the same on LTspice because I would have liked to see the effect of using non-ideal components. In order to make it easier and avoid whole control and feedback implementation, I imported the switching pulses datapoints from my simulink simulation into Ltspice and given them to ideal switches as shown below(for now I am starting with ideal components). However, I am not getting the expected results. I expect a steady DC output voltage of 600V as I had obtained in my simulink simulation yet I am getting something like this: Please point out what might be the possible reasons for this and how to solve this issue!! AI: Break down the problem: separately, plot each controlling source, and compare it with Simulink. When all 6 match, then you know the controls are good. Then make sure the controlling pulses are at least between 0.1 and 0.9 (the minimum range should be from vt-|vh| until vt+|vh|). Not lastly, check that the three phase sources in Simulink have the same phase shift, because what I see in your LTspice (note the spelling) is a negative sequence. If what you need is a positive sequence then you need 0, -120, and 120 degrees (or 0, 240, 120).
H: What is the result of wiring an electrolytic cap in series with a ceramic when parallel was intended? FINAL UPDATE A reassessment of my power consumption has led me to the solution to all of my problems. I picked up a 5V, 5A power supply (giving me plenty of overhead), reassembled my project, and it is now working as intended!! No flickering or dropouts. I've been testing for nearly fifteen minutes with the new power supply, and with my old setup the voltage drop normally happened in under two minutes if not just seconds. Many thanks again to all who replied. Update Thanks to all who responded. As I go more deeply into this issue, it looks like my real problem goes all the way back to bad power consumption calculations. Without going into detail, I went back to basics and realized I had a minimum 3A draw and there was no way I was providing that through a 7805. The voltage drop was the big clue to the bigger problem. For the specific issue about series caps that first answer was on point even if it wasn't my real problem, so I'll pick that as the answer. The rest is purely dummy in me, it appears. Thanks again. I been have been trying to diagnose a problem with a series of 7-segment LEDs driven by a MAX7221. My problems have ranged from random flickering to total shutdown. I blamed (variously) bad solder jointd, bad wires, bad power, and bad grounds, but none of those have solved the issue. In finally looking at my circuit board up close, I think I spotted the problem: The 7221 is supposed to be wired with a 10uF and .47 uF cap across V and GND in parallel. I believe I have discovered my board has them wired in series, which I believe results in a net decrease in capacitance. Other components not on this board but part of the same project (same power/ground) are working correctly. Could this dumb mistake cause hard-to-find electrical issues and inconsistent behaviors? EDIT: I rewired the caps as suggested, and the component no longer functions at all. More importantly, though, I'm noticing that after the project starts up, after a couple of minutes or so, my 5V source on my power board drops to about 3.6V - and that's with my problem child component disconnected. I have soldered up a board to take a 9V supply and power a Nano, then use a 7805 VR to provide 5V to my other components. Testing, I get a rock-solid 4.98V to my components, and 9.1 to my Nano. I run the 5V/Ground wires to a simple strip of headers so I can connect the other components. Is there something fundamentally wrong with what seems to me a pretty basic setup? If I see a sudden voltage drop after the project runs for a few minutes, is that indicative of ground bounce or back-current somewhere? With everything hooked up, the project draws just over 400mA, which shouldn't be taxing a 9V/500mA supply powering my VR setup. Something totally crazy is going on and I'm just not wise enough to spot it. Worse still is I'm sure it's a dumb mistake on my part. AI: If you have a 10µF capacitor in series with a 0.47µF cap, the capacitance would be a little less than that of the smallest (about 0.45µF). In addition, the 10µF cap is likely a polarized electrolytic capacitor, which does not last long when subjected to alternating current -- and being in series with that 0.47µF, likely a ceramic with negligible DC leakage, would subject the electrolytic to reverse voltage if any AC voltage is present. Yep, it seems like you found the culprit, and need to scrape off the series PCB trace and use jumpers to parallel them to correct the issue.
H: What type of connector is this and how do you safely disconnect it? While disassembling a Samsung Plasma TV, I've come across this connector labelled "High Voltage" on the power supply PCB. I'm not sure how to remove it from the PCB. It seems to have two tabs on the side, but I'm not sure how to use them (if at all) to safely remove the connector. I'm erring on the side of caution, and not just yanking out the entire connector by pulling (in case it is like a ribbon connector where you have to disengage something). Not knowing the name of the connector makes it hard to search for relevant guides online. == Update == Successfully disconnected following @transistor's answer below. Here are pictures of the connectors separated. You can see the hooks. It's hard to catch on camera but the inner wall on the section of the port where the hooks are inserted is slightly elevated giving the hooks something to catch. AI: I've never seen one of those before but try this ... Squeeze both sides at (1). It should flex at the "hinges" (2). I imagine there are concealed hooks at (3). Then pull upwards. One-hand on the connector while the other holds the board should do the trick. If that works then kick self.
H: What is the actual purpose of pad via library in Altium Designer? The Altium Designer has schematic symbol library and PCB footprint library. I understand both of these. However, there is a third one called pad via library. Pad is the exposed copper on PCB where a component is soldered. It could be a SMT pad or a through hole pad. Via on the other hand is a hole in the PCB whereby a PCB track can go from one layer to another. That is all there is to know about pad and via isn't it? Then why would anyone need to create a library of these? This is new to me. AI: Here (from here) is an illustration of several types of vias used in HDI (high density interconnect) boards, including the simple through hole via you mention: From an Altium video:
H: Why does Japan use 100V AC as opposed to 120 or 230V, and why are many of their plugs ungrounded? I don't live in Japan but I have noticed this interesting phenomenon when it comes to their electronics. I'm buying a PC-9800 and because it remained isolated in Japan its power supply is only rated at 100V. If I am to use it in 120V America or 230V Europe it would either shorten the lifespan of the supply or blow it up completely, so either I have to import or make a transformer or inverter, or replace the power supply with one that takes universal mains voltage and rewire the plugs. I did some research and found out that not only does Japan use 100V, their wall plugs are variations of the NEMA standard and a lot of them are ungrounded. Here in the US, ungrounded outlets are unlawful in buildings constructed after 1960 because of the risk of the appliance being grounded through you, which can be deadly. Yet in Japan, they're very commonplace, with grounding only being recommended relatively recently. Does every wall outlet in Japan have an isolating transformer or is every appliance a Class II double insulated apparatus? And even with grounded outlets, it oftentimes comes in the form of those with a ground screw. Super weird. AI: Why does Japan use 100V AC? Because it's all fairly arbitrary anyway. 120V and 240V aren't special in any way. Does every wall outlet in Japan have an isolating transformer Not at all. That would be extremely expensive. or is every appliance a Class II double insulated apparatus? Yes, it is, although older appliances may not necessarily pass modern high-potential insulation and/or leakage tests, and may not be compliant with modern requirements of the Class II appliance. I'm buying a PC-9800 and because it remained isolated in Japan its power supply is only rated at 100V. If I am to use it in 120V America or 230V Europe it would either shorten the lifespan of the supply or blow it up completely, so either I have to import or make a transformer or inverter, or replace the power supply with one that takes universal mains voltage and rewire the plugs. I couldn't find PC-9800 power ratings quickly. I presume the whole thing should fit under 250VA. If the PC-9800 and its monitor don't both have a worldwide-rated universal switching power supply, then all you need to do is to drop the 120V down to 100V using a so-called buck transformer. No need for an inverter - and if you had an inverter, you'd need one with adjustable output voltage, since 100VAC is hardly standard in the US. No need for an expensive power transformer rated for full power of the system either. If the power consumption of the whole PC-9800 base unit and monitor together is more than 250VA, the fuse ratings and transformer power rating will have to be scaled up by that percentage. E.g. if the load would consume 300VA, all fuses and transformer VA rating should be multiplied by a 300/250. For the fuses, choose the next larger standard value. You can probably put the whole contraption together for <$100, including the box, the piece of aluminum or stainless steel to act as the chassis plate, miscellaneous hardware, the input cord and its cable gland/strain relief, the transformer, two fuses and fuse holders, the output receptacle, the #18 hookup wire needed to wire it up, and the shrink wrap needed to insulate the connections. If you already have some supplies laying around, it'd be likely much less if you're diligent in your bargain hunting and are willing to wait for things to be shipped over from China. simulate this circuit – Schematic created using CircuitLab The triangle symbol must be ignored, it's only there to make the simulator work. V1 is the mains input. The ground (third pin, not shown) should go straight from the inlet to the outlet. VM1 is the 100V, 250VA outlet. F1 and F2 are fuses required for safety. Do not skip them! XFMR1 is a 120V to 18V transformer, rated for 40VA. You can find those on eBay, or from any electronic parts distributor like Jameco, DigiKey, etc. Any mains transformer going from 120 to 18V will have insulation adequately rated for this application, so that's not a problem. I would enclose this buck unit in a plastic box, with the transformer mounted on a metal sub-chassis attached to the box such that no metal hardware would cut through the box, for safety. Many plastic boxes have plastic stubs that will accept sheet metal screws for mounting of internal components. Some better boxes have brass inserts and accept machine screws for chassis mounting. The chassis plate would act as an adapter between the transformer's mounting hole pattern and that of the box. In a pinch you could probably forgo the chassis plate and use nylon screws to mount the transformer directly to the plastic box. In that case, make sure to use the largest diameter screws that still fit into the transformer's mounting flange holes. The chassis should be earthed (connected to the PE terminal of the inlet and outlet) for safety when performing measurements/servicing. The output voltage without load should be lower than the input voltage. If the wiring is incorrect, the output voltage will be higher than the input. If that's the case, reverse the ends of one of the transformer windings. Most mains transformers do not have polarity markings, and even if they did, you always need to verify your work. Factories make mistakes too, sometimes! Do not worry if the unloaded output voltage is not exactly 102VAC. It'll be much closer once you load the output with say a 100W light bulb. The PC-9800 should accept line voltages at least +/-5% away from 100V, likely more than that, so this buck arrangement will be sufficient for that application. You could of course use a 20VAC output transformer, but those are potentially harder to find.
H: Is there a way of converting easily binary numbers to its ASCII equivalent? I have this digital circuit design problem where we receive two two-digits numbers in ASCII, I have to convert them to binary, add them, and the result I have to encode it to ASCII again. I actually did all the ASCII to binary and the addition part easily with multipliers and adders, however, after that, I have, at the most, an 8-bit binary number that I need to convert back to its ASCII equivalent and I can't seem to find the solution easily. For example, I could do some selections if the number is bigger than 100 and some subtractions, but I don't really know how to get the tens of the number. I must use combinational circuits, so basically logic gates or CI's of logic gates like multiplexers, adders... AI: I actually did all the ASCII to binary and the addition part easily with multipliers and adders That's quite complicated. You don't need multipliers. You have a number in the BCD form, and you can easily just do the addition in BCD as well. ASCII to binary-coded-decimal (BCD) is trivial: you just leave the 4 lower bits. The addition can be done using a separate adder for each pair of digits. Decimal adjustment is done for each digit of the result - the equivalent of DAA opcode on many CPUs. The decimal adjust detection is the also the decimal carry signal. And now you got the 4 lower bits of each ASCII digit. The upper bits remain unchanged and can be passed straight from the input, so we can set them aside since their "circuit" is just straight wires from input to output. BCD adjustment is done as follows: the sum is compared to 10. Such comparison is done by subtracting 10. Instead, we add twos-complement -10 = 0110b. That also happens to be +6! So subtracting 10 and adding 6, modulo 16, are the same operation. If the sum is >9, or >15, the 6 is added to it. Since we already have the result of adding 6, we just choose between the original result of addition, and the result with the 6 added to it. The >9 or >15 condition from the BCD adjuster also is the decimal carry signal and is fed to the adder for the next digit. You can play with the simulation below by selecting any of the input digits with the mouse, so that it turns red, and pressing space to toggle it. As shown, the adder performs 99+42=141. simulate this circuit – Schematic created using CircuitLab
H: Rise time and clock frequency: when does it start biting me? I have spent quite a bit of time reading (mostly the questions and answers on here) about rise times of square waves and how they can cause transmission line effects (reflection, ringing, etc.). Everyone seems to be talking about rules of thumbs about when to worry and throwing numbers around without actually explaining where they come from. So here are a few questions that still remain in my head after all the reading: Assuming a speed of 150mm/ns (on FR-4 PCB), if I have a square wave with a rise time of 1ns, at what trace length do I have to start using terminating resistors? Do I use series or parallel termination? What about bidirectional lines? Do I have to worry about rise time and trace length when my clock frequency is say 10kHz? 1MHz? People say rise time is what matters, not the frequency. So regardless of my signal frequency, I have to worry about rise time? It's really foggy for me because people seem to talk about 1/3, 1/4, 1/5 wavelength trace lengths as limit for terminating resistors, some people say 1/10 of the electric length... So I appreciate if someone can clear it for me. AI: IMO there is no hard limit. I always series terminate my lines if the driver impedance is much lower than the trace impedance and I can't literally put sender and receiver next to each other. You can't really be sure about the rise time of your components, so it could be much shorter than advertised under some conditions. All it takes is a single cheap resistor, which is probably in the BOM anyway, so why risk unterminated lines? Now about that IF: Many IC, like ADCs actually have outputs with a rather high impedance of 50-100 Ohm, so there is no need to terminate them. Same goes for HC logic (not for LVC!). About the frequency: I would start to worry if transitions are more regular than about 1 Hz. You could push your luck and skip termination for certain status lines that toggle rarely..But again: why? Once they flip, they ring, this can harm other functions, and not only your EMC report. I have never needed parallel termination for data so far, but I have not done Gbit interfaces. Parallel termination is "cleaner" but power hungry, so should be used only if series isn't good enough.
H: Why do we say that the load impedance must be equal to the characteristic impedance to have adaptation/maximum power transfer? If impedance matching requires conjugate complex matching of the transmission line to the generator impedance (for optimal power transfer), why do we say that the load impedance must be equal to the characteristic impedance? So in order to have optimal power transfer, \$Z_{in} = Z_g^*\$, (\$Z_g\$ is the source impedance and \$Z_{in}\$ the input of the network or load). How does that equal have \$Z_g = Z_{characteristic}\$ of the transmission line? I got from class notes that in a transmission line with no losses the value of the power transmitted is constant along the line and that value depends on the load reflection coefficient given by: $$P = \frac{|V_{i2}|^2}{2Z_L}\times(1 - |K_s|^2) $$ where, \$V_{i2}\$ is the reflection component of the voltage, \$Z_L\$ is the characteristic impedance, and \$K_s\$ is the load reflection coefficient. This power can be maximized if \$K_s = 0\$, which means \$Z_L = Z_s\$. AI: The common network theorem by Thevenin says that in linear circuits every signal source can be modeled as an ideal voltage source and a series impedance. Together they are the Thevenin equivalent of the source. The equivalent is, of course, valid only at the frequency where the equivalent was calculated. As you have already caught, for max. power transmission the load impedance must be the complex conjugate of the series impedance of the source Thevenin equivalent assuming the load is the adjustable thing, not the source. A transmission line has 2 ports - the input and the output. If you insert one between the signal source and the load it cannot be handled only as an extra series impedance. The common model (by O.Heaviside in 1885) for a practical transmission line (parallel wires, coax) presents the line as a ladder where capacitance, inductance and maybe also resistance (for presenting losses in practical materials) are distributed along and between the wires. The idea and also its basic math is shown here https://en.wikipedia.org/wiki/Transmission_line Quite a tricky math (but compulsory for successful design calculations) shows how the impedance of the load is affected when its seen through a transmission line. Engineering students study to use the Smith Chart to speed up the calculations. One fact: A non-lossy tranmission line with characteristic impedance Zc shows the load as a resistor only in certain cases. The commonly used case is to have a resistive load with resistance =Zc. That's also the case when there's no wave reflection from the load. We say the load is matched. The reflection coefficient from the matched load becomes zero, if one calculates it. The total impedance of a circuit which has a lossless transmission line + a matched load is also Zc. If that load must be connected to a signal source which has a resistive series impedance A which cannot be taken off nor changed, the highest power to the load is got when Zc = A. If A can be changed, but the line+the matched load are given, the highest power to the load is got when A=0. If A=0 one can get to the matched load even higher power by feeding the line through a network which makes the voltage higher - for ex through a transformer. If an ideal voltage source with no series resistance(or at least the series resistance is other than Zc) feeds a load through a transmission line the case depends heavily on the frequency and the length and the properties of the line and what's the load. Generally it's false to say that the maximum power transmission happens when the load is a resistor =Zc. The maximum power is outputted from the source when the source sees the complex conjugate of its Thevenin equivalent series impedance. But if the line is lossy quite a big part of that power maybe doesn't reach the load. As seen from the load side the Thevenin equivalent of the transmission line + signal source define which load takes the biggest power when the line and the source cannot be changed. The load must be the complex conjugate. If the line happens to be lossless and the source has zero series resistance the power to the load can be as high as wanted by decreasing the load resistance and by cancelling the Thevenin equivalent impedance (=reactive) by inserting the opposite series reactance. Of course, there's reflections forth and back the line, but if they are not considered harmful for any practical reasons, the power to the load can be as high as wanted. In practical circuits we see matching networks for 3 reasons: Reflections are harmful. They distort modulated signals and can generate overvoltages and too high currents in practical signal sources. Power transmission must be effective enough for the purpose With weak signals like in radio receivers the noise performance must be optimized One wants the highest possible signal to noise ratio even if the power transmission becomes less than optimal.
H: Transfer function for Sallen-Key notch filter How can I find the transfer function H(s) of the following circuit by using impedance of the circuit? Should I instead do it by nodal analysis? AI: The exact "no shortcut" way (by assuming the opamp works ideally) is to replace the opamp and its feedback resistors with a controlled voltage source which outputs V5 = (V3)(R5 + R4)/(R4). That's an ideal non-inverting amp. Write the s-domain nodal equations. You do not need one for V4, it was in the removed circuit. But you write 3 of them; for nodes which have voltages V1, V2 and V3. Assume the opamp +input current =0. Then you eliminate from your (four) equations other voltages than Vi and V5. Ratio (V5/Vi) is your transfer function. Prepare to work with complex formulas if you have the parts as variables.
H: Control power through a resistive load from a DC source and achieve low current peaks I want to control the power through a resistive load from a DC source and achieve low current peaks. The use case is 0-1000VDC and 0-15kW (not for the entire voltage range). All other parameters and circuit design are changeable. Right now I am using a transistor to switch (PWM) a mostly resistive load to control the power through it. Essentially the circuit looks like this (there are more diodes, filters etc) and uses a very low switching frequency (100Hz approximately, this can be changed if it helps the design). simulate this circuit – Schematic created using CircuitLab Since this circuit is intended to be used for a very large voltage input range and with a large power span certain operation points leads to a very large current peak compared to the average current through the resistor. This means that the DC source needs to be able to supply very large currents despite having a relatively low average current output. That phenomenon severly limits the usefulness of the DC source for powering other applications at the same time since we might end up blowing a fuse despite drawing relatively low average current. The simplest idea I have had to solve this is to have a large capacitor that smoothes out the current draw and increase the switching frequency. simulate this circuit This of course introduces a plethora of other issues: possible EMC issues due to switching faster, and the fact that we have large capacitor that is not being discharged if the load is turned off for longer periods of time. These problems could of course be helped by using discharge resistors and the EMC can be helped by other design choices. Another idea is to divide the load between more resistive loads with higher individual resistance. simulate this circuit Then only using some of them and only switching one at a time while the others are either turned of or fully conducting depeneding on the use case. This a problem since we will have a way bigger system etc. But before I go down any of these tracks I would like to check if there are any other ideas of how to solve this issue. I want power control of a resistive load from a DC source with low current peaks compared to average current. All input is appreciated! AI: For high power, a big slow FET (X5) with low RdsON switches the resistor directly using slow PWM, without inductor losses. For low power, a small fast FET (X4) turns it into a buck converter. You'll need frequency above 10kHz to avoid a huge inductor though. The load is tied to Vin so it shouldn't be too hard to add an EMI filter. If you have other loads in the system, at low power you could switch the resistor in series with the source instead of drawing power from the supply
H: High side power switch IC drops 0.5V when loaded I setup a circuit shown in AP2411 data sheet on a solder-less test board and connected the output to 30 ohm resistor to ground to simulate about 100mA of current. Input voltage is 3.3V from a lab power supply and looks clean on a scope. Output voltage when the resistor is open is 3.3V. However, when the resistor is connected to ground, the output voltage is about 2.8V. Is that normal to lose almost 0.5V when using power switch IC? AI: The datasheet gives the on resistance when driven from 3.3 V as typically 90 mΩ, max 108 mΩ at 25 C, which for your 100 mA of current should give a drop in the order of 10 mV. Check your lab power supply isn't current limiting at 100 mA, use it to drive the resistor directly while measuring voltages. If the supply is OK, then either the part is broken, you're not driving enable correctly, or you're losing voltage somewhere else. Using your meter, measure the drop directly across the part, and the drop on any wires, traces and soldered or socketed joints between the supply, the part, and the load, as well as the load voltage and the supply voltage. Question - are you plugging your load resistor into a breadboard? Those boards are notorious for having poor contact resistance. If the IC is plugged in to the board as well, you have at least four (maybe 6 or 8!) lousy joints in series between your power supply and your load resistor.
H: Diode and resistor in parallel I was recently investigating a model of a circuit in which there is a resistor in parallel with a forward-biased diode. Why is the current passing through the resistor dictated solely by the forward voltage of the diode? Why doesn't the resistor 'see' the supply voltage? For reference, Resistor: 1000 ohm Diode: 0.6V forward voltage Supply voltage: 40V AI: Basic electrical knowledge: two devices in parallel always experience the same voltage drop. If you connect a diode and a resistor in parallel, their forward voltages must be the same. And since the diode has a pretty much fixed forward voltage, this is the forward voltage that they both will have. So the current through the 1 kΩ resistor will be I=U/R=0.6/1000=0.6 mA.
H: Why do some electronics have two power/ground pins? I was looking at the BMP280 temperature/pressure sensor schematics on KiCAD, and I saw that it has two power pins, and two ground pins. Why is that? Please let me know if more information is needed on this part. AI: The GND pins are largely the same, they are duplicated mostly because there is no good reason not to. The VCCIO pin supplies the digital I/O, and the VDD pin supplies the analog hardware that performs the measurement. These should be decoupled separately, so the noise introduced by the digital protocol does not disturb the measurement.
H: Why use two transistors driving LEDs when one would work? Recently received a small PCB from China with a simple LED driving setup (12v input). I spent some time probing it out and reverse engineered this schematic; I'm trying to understand why they designed it so that this uses 2 transistors (granted my understanding of transistors is still limited) while this following circuit would do the same thing if the simulation is correct. I'm sure with it being Chinese there are some omissions (some footprints weren't populated, all were parallel resistors however). But i'm mainly just hoping to learn. Tried my best to search around for answers but I couldn't find anything on here (probably don't know the proper terms to use). I've been dabbling in entry level hobby electronics for some time, micro controllers and the like. But when things get specific I often have no idea what I'm looking at. AI: It's a constant-current circuit. The current should be about 0.7/68 ~=10mA. simulate this circuit – Schematic created using CircuitLab Your circuit with one transistor would allow a highly variable current to flow through the LED(s), dependent on the supply voltage and the gain of the transistor which is not well known to begin with and will vary greatly with temperature. The way it works is that Q2 takes current away from the base of Q1 as the voltage across R2 reaches around 0.7V. The current through R2 is very close to the current through the LED(s), only different by 1% or so if hFE \$\ge\$ 100 for the transistors.
H: H-bridge gate driver for an ESP32 I used an H-bridge for 12V 10A brushless DC motor. The motor must run in both directions. ESP32 ----- Multiplexer Circuit ---- Gate Driver ---- H Bridge ---- Motor I have a few questions. Am I using too many components for a motor like this? Is the 10k resistors necessary for the P-channel MOSFETs? Are the diodes necessary? AI: Am I using too many components for an Engine like this? No, if you want to change direction you need a H-bridge. Is This 10k Necessary for P Channel? Can't say without reading driver datasheet. Is This Diode Necessary? No, the MOSFETs have an integrated body diode. That said, I'd use all NMOS with a cheap bootstrap driver like NCP5359. This has automatic dead time, so it will prevent cross-conduction which can happen in your design if the FET threshold voltages are such that both NFET and PFET conduct during switching. The drawback is that it can't do 100% duty cycle, you have to flip the PWM once in a while to recharge the bootstrap cap. For a motor, you don't want switching to be too fast due to EMI concerns, so a few hundred ohms gate resistors would be a good idea. With your design, that would worsen cross-conduction though. With a bootstrap driver, it's fine. Also you don't have enough capacitance on the power supply rail. The caps need to handle the ripple current drawn by the H-bridge, so they have to be pretty beefy. There is also the issue of rising power supply voltage if you use the motor as a brake, that can be handled by monitoring power supply voltage with your micro and activating both bottom FETs to short the motor if power supply voltage rises above the safe limit.
H: LED flasher circuit: unexpected behaviour I am a beginner so bear with me. I have attempted to design an LED flasher circuit but it gives unexpected behaviour. Diagram: When I apply the 9V DC voltage, the LED stays on for about half a second then turns off and will not turn on again until I discharge the capacitor. Do you know what is wrong with my circuit? The resistor value is correct for the LED at 9V DC. AI: This circuit will not work as a flasher circuit. Try using a 555 timer in astable mode as shown here: https://elonics.org/adjustable-led-flasher-using-555-timer/
H: Energy cost conversion If electricity costs $0.06 per kilowatt-hour and is used for electric heating with an efficiency of 100%, what is the equivalent price of natural gas per gigajoule if it can be burned with an efficiency of 80%? (A) $8.00/GJ (B) $13.30/GJ (C) $15.10/GJ (D) $21.20/GJ (E) $24.30/GJ The Book Answer: ($0.06/kWh) x (277. 8 kWh/GJ) = ($16.67/GJ) = ($ X/GJ) x (1/0.8) X = $13.30/GJ. My Answer: ($0.06/kWh) x (277. 8 kWh/GJ) = ($16.67/GJ) = ($ X/GJ) x (0.8) X = $20.833/GJ. My reasoning is: If the efficiency of the natural gas was also 100%, Then, 1 GJ of natural gas energy would cost $16.67. Since the natural gas is burned with an efficiency of 80% this requires increasing the amount of natural gas burnt to produce the same energy as 100% efficient electric heating. Therefore, at an efficiency of 80% 1 GJ of natural gas energy would cost $16.67/0.8 = $20.833/GJ AI: If I reformulate the question, it is: "what is the price of a kWh of gaz (neglecting losses) so that it cost me the same whether I use electricity of gas to heat my home". So if gas is less efficient, I need more gas to get the same heat. So if I want to pay the same amount, gas needs to be cheaper.