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H: BLDC (Brushless DC Motor) vs PMSM (Permanent Magnet Synchornous Motor)
The differences between BLDC and PMSM are very small and for what I have seen while reading about it, is not clear to many of us. Most of the articles I have read say that the main difference is that the BEMF of a BLDC motor looks more trapezoidal and the one for PMSM looks more sinusoidal, however I can't understand what is the difference on their construction; is it the wounding? their geometry?...
The main reason for my question is that I want to understand which control method should be used on each motor to have the best performance of if any control method can be used on both.
AI: In a BLDC motor, the windings are concentrated on salient poles, so producing a voltage waveform that's more trapeziodal than sinusoidal.
In a PMSM, the windings are distributed over several poles, so producing a voltage waveform that's more more sinusoidal.
These differences mean that BLDC motors are slightly cheaper to produce, but may be slightly less efficient, noisier and have more cogging, than PMSMs. |
H: Turn on/off ESP8266 by a transistor
I would like to turn off and on a circuit by another circuit. I believe that could be easily achieved by a transistor but when there is a voltage regulator and an ESP8266 with wide range of input current I'm lost.
I have the ESP8266 programmed to send a notification when it's turned on. The V1 supply has unfortunately too low current to power the ESP so I have to power it by the V2 (4xAA 1.5V batteries should be probably enough to feed the voltage regulator 3.3V + 1.1V it's dropout and some transistor dropout)
The circuit below is my amateurish attempt that can be probably all wrong.
simulate this circuit – Schematic created using CircuitLab
AI: As suggested in one of the comments, there is a simpler and more efficient way to do this using a DC-DC converter rather than a linear regulator. Here's one way to do this:
simulate this circuit – Schematic created using CircuitLab
This uses a Microchip MIC23050 high-efficiency buck regulator so you can power it directly from your 4 AA battery supply. The EN input can be driven directly from a logic output. The choice of the diode D1 is not critical -- we just need a small (~0.5V) voltage drop from the nominal +6V of the supply.
Not only is this simpler and has fewer parts, but it's also pretty inexpensive - around US $1 for everything. |
H: Receiving power from antenna (Homework)
The question:
"At a carrier frequency of 2 GHz, assuming a transmit antenna gain of 3 dBi and a receive antenna gain of 0 dBi, calculate the line-of-sight received power at a distance of 100 m from the basestation (in units of dBm). Assume 100 mW enters the transmit antenna port."
My attempt:
The equation to use
$$P_{r}=\frac{P_{t}G_{t}G_{r}\lambda^2}{(4\pi R)^2}$$
I am not sure what to do next, I think that \$G_r=0\$, hence the \$P_r\$ will be 0 since the numerator is.
EDIT:
Thanks for the help, I iwll try to solve it now:
\$\lambda=\frac{c}{f}\$,
Therefore \$\lambda=0.15\$ m
\$R=100\$ m
\$P_{t}=0.1\$ W
\$G_t=10^{0.3}=1.996\$
\$G_r=10^0=1 \$
Hence
\$P_{r}=2.844*10^{-9}\$ W \$=-55.5\$ dbm
Is this correct now?
AI: You are confusing dB with "linear" units.
To convert from mW (a linear unit) to dBm (decibels with respect to 1mW), use the equation:
Power_dBm = 10*log10(Power_mW)
As a general rule of thumb, you should always be very suspicious if you're ever multiplying two numbers in dB. Note the following property of logarithms:
log10(uv) = log10(u) + log10(v) (Note: Log base 10 shown here, but this is true for any base)
This means that if u and v are initially in linear units, and you're multiplying them together, that's equivalent to taking their logarithms and adding them together (or, converting to dB and then adding them together). Multiplying two numbers in dB has no obvious meaning that translates to linear units.
Ok, back to the original question. The equation you presented is only valid for linear units. In this case, your powers (Pr and Pt) are in mW, and your gains (Gt and Gr) are unitless - or, perhaps more precisely, they are mW per mW.
So, to use the equation correctly, you need to convert any numbers which are given in dB or dBm back to linear units, plug them in to the equation to find Pr, and then convert Pr back to dBm.
As analogsystemsrf pointed out, there is an equivalent version of the Friis formula which uses inputs in dB - note that now the terms are added together, rather than multiplied. |
H: Output impedance of STM32H743 MCU?
How do I find the output impedance of the STM32H743 (and potentially other similar devices)? I've looked through the datasheet (DS12110 Rev 5) and the reference manual (RM0433 Rev 5) however haven't found much information.
I'm mostly interested in the SPI lines, and want to match the track impedance to the output impedance using a series resistor. For now I've put in placeholders of 33R, thinking the PCB trace could be around 50R and the output impedance around 20R.
AI: Output impedance of (typically CMOS) output driver for any MCU can be calculated/estimated from VOH and VOL electrical characteristics from datasheets.
The meaning of this table is that if a 8 mA load is connected to ground and GPIO is driven HIGH, the drop between Vcc and output is 0.4 V. It means that the internal equivalent impedance of GPIO port, per Ohm's Law, 400mV/8mA = 50 Ohms.
Same calculations are valid if the load is connected to Vcc, and the pin is driven to LOW. The table says the residual voltage is no more than 400 mV. Again, it is equivalent to 400/8=50 Ohms or less.
There is one caveat however.
Most MCU have simplified GPIOs, where the impedance depends on load. In this particular case the specifications (same Table 60) says that the voltage drop is 1300 mV if the load takes 20 mA, which makes the output to have roughly 1300/20 = 65 Ohms.
In short, VOH and VOL data at specified load give you an estimation of output impedance of CMOS GPIO driver under 65 Ohms worst case (for STM32H743), and likely close to 40-50 Ohms typical.
If your track's impedance is 70-100 Ohms, you will need to add a 22-33-47 Ohm series resistor at driving side if you want a neat waveform. |
H: Multisim - How to create a 2-pin red/green LED in one part
I would like to pass the output of an LT1413CN8 op-amp through a 2-pin red/green LED (looks white when off) and back to it's inverted input.
In Multisim, there is a red/green LED option but that is a 3-pin configuration. If I drag and drop a green LED and red LED from the component menu, wire them up tail to head, and transfer the design to Ultiboard, 2 separate LEDs and their footprints appear (which is expected.)
Is there anyway to build a custom component made up of those 2 LEDs, but with only 2 pins and 1 footprint?
Or, is there a component that I am not seeing in the component menu that solves this issue?
Or, is there a recently-updated library with this part? I am using Multisim 14.1
Thank you.
AI: The 3 pin red/green is called common cathode.
A 2 pin with red OR green is a bidirectional LED e.g. Kingbright WP937EGW
Then there is an LED with both red and green in the same package e.g. Marktech Optoelectronics MT2030-HRG-A
A red green in the same package has the same model as any other LED.
If looking for a bidirectional then search for "bidirectional LED". |
H: Understand limit voltage and current
It could sounds odd but I am trying to find a switch for my inverter that is an isolator.
My batteries are 12 V and my inventer can do over 5 KW, but I found a switch at 48 V, rated 300 A.
If I use it on 12 V what would be the max rated current for it?
AI: On a 5KW inverter the max current would be:
5000W/12V = 416A
The current rating should be somewhere in the manual also. So if you really are trying to switch all the batteries at the same time, 300A may not be enough to handle the 400Amps that potentially could be run across the switch. Find a better switch. |
H: Adafruit audio FX mini and 2.5W amplifier
I am connecting Adafruit's Audio FX Mini board to a small Adafruit's amplifier. In order to save some power when the sound board is not outputting any sound, I wanted to connect ACT pin of the sound board with SD (shutdown) pin of the amp (PDF).
But if I connect directly these two pins, I seem to get completely opposite result, the background buzz (which is also normally heard) is heard when the sound is not played, and the sound goes off completely when the board is playing something.
Am I missing something? Should I invert ACT? How?
AI: If you look in the datasheet of the PAM8302 you can see that pin 1 is called SD but note that the pin is actually called S̅D̅ <= Note the overbar
The overbar means that the pin is active low, also see the drawing on page 2. You need to make S̅D̅ = 0 for shutdown.
On the PCB containing the PAM8302 SD is actually marked wrongly. I do not see a transistor on the PCB (which could invert the signal and make "SD" correct) so the SD goes straight into the chip, making it a not(SD).
So yes, you need to invert the ACT signal.
The simplest way to do that is by using an NPN or a NMOS, like so:
simulate this circuit – Schematic created using CircuitLab
You could also use a CMOS logic chip with gates that can also work as an inverter like the HEF4011. |
H: Question on MOSFET - small signal model
In the small signal model of a MOSFET, the current from the drain to the source (for an n channel MOSFET) is a function of the gate to source voltage only.
But, if a positive voltage was not applied at the drain, the current wouldn't flow in the first place.
So, why is the drain to source voltage not considered?
AI: A small-signal model is only valid around a certain operating point. Your particular model makes the assumption that the DC bias voltage on the drain is such that the model is valid, and the AC drive voltage at the gate is small enough that the gm approximation works.
As an example, the Id vs VGS characteristic for a particular FET is shown below with Vds=15V. Graphic from here. If your gate is biased at the point on the diagram where the slope of the curve is gm, then those would be the conditions around which your small-signal model would be valid.
For different DC conditions you may have different values of gm and output resistance.
You can Google all kinds of detailed explanations of how to derive a small-signal model and the assumptions made.
Here's one example: Small-signal derivation
Here's another: MOSFET Small Signal Modelling
Maybe after reviewing what you can find with Google you could post a new question with any specific doubts you have about what you find. |
H: Enhancement type MOSFET - channel formation
In an enhancement type MOSFET (an n channel one assumed here), when a positive gate to source voltage is applied, the holes of the substrate near the gate move deeper into the substrate away from the channel, and the electrons of the source and drain region accumulate near the gate to form the channel.
At the same time, the minority carriers of the substrate (electrons) should also be assisted by the electric field to accumulate in the channel region.
The book by Sedra and Smith mentions that only the source and drain electrons form the channel, while Boylestead's book states that the minority carriers of the substrate are involved in channel formation.
So, can I assume that both these mechanisms are involved in channel formation?
AI: Yes both mechanisms are involved. In my opinion Sedra and Smith is plain wrong if they claim that the channel only exists from electrons from source and drain.
That is because a MOS structure by itself (P-substrate - thin oxide - conductive polysilicon layer) so without drain/source regions, can already form a conductive channel at the edge of the P-substrate when a positive voltage is applied to the conductive layer (the gate). Like so:
When Vgb is large enough (more than Vt) a channel will form at the top of the (blue) p-type substrate. OK, it will not conduct anything to anything else but it will be there.
Perhaps in Sedra and Smith they refer to a channel of an active NMOS so where some drain current is flowing. Then indeed the electrons come from the source and travel through the channel to the drain. |
H: Pololu A4988 Decoupling Capacitors
My son (9yrs) has become interested in robotics. I did a course on it in college, but that was a LOOONG time ago and the course was much more rooted in programming than it was in electrical engineering. So, I'm learning as I go so that I can keep the project as wrinkle-free as possible.
I know that pre-built options for what I'm building already exist... but I don't learn anything having someone else do it for me!
So... I wish to build a "dual stepper motor driver" (I'm sure there's a better name for it, but that's what comes to mind), I plan to take the main power source (12V) and push it through a 5V regulator to supply the logic, to make the board as "self contained" as possible, rather than rely on the Arduino for my 5V supply.
I've already got a 100uF cap across Vmot/gnd, but there's the 5V logic Vin/gnd.... should I put a decoupling cap on that, as well, since it's coming from the same power supply?
I'm inclined to believe "it's not needed but it's a good practice", but I wanted to ask and be sure.
As I understand it the idea is to provide a "current buffer" to protect against a sudden need for power which can in turn cause harmful voltage drop or noise, and the logic really wouldn't draw much in the way of current, all while the minimum voltage I expect to see from the battery is 11.7V near empty (still exceeding minimum that the regulator would need... right?).
AI: I've already got a 100uF cap across Vmot/gnd, but there's the 5V logic
Vin/gnd.... should I put a decoupling cap on that, as well, since it's
coming from the same power supply?
The caps function like a current 'buffer', they source current when it get's too low and sink current when it get's to high to maintain a constant voltage level. In the example below L1 and R2 represent the wire, C1 is a filter capacitor and R1 is a variable load.
The reason for using capacitors is the instantaneous current switching that circuits with millions of transistors can have and the other problem is that wires have resistance and inductance. If you could measure the inductance and resistance of the wires, you could actually tell how well of a filter you've built.
But for most of us we just 'ballpark' the capacitance, because that saves time. 100uF might be a little steep, and might increase the start up time but should be fine for your application. Digital lines are an important place to put caps on due to the variable nature of the load. Motors, especially stepper motors are another good place becasue they also switch, so I'd put caps on both. |
H: STM32F103C8T6 - I2C communication with TI FuelGauge BQ78350
I am trying to establish communication between TI BQ78350 FuelGauge and STM32F103C8T6 using I2C/SMBus. The following is the I2C configuration used for the standard HAL I2C library.
static void MX_I2C1_Init(void)
{
hi2c1.Instance = I2C1;
hi2c1.Init.ClockSpeed = 100000;
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c1.Init.OwnAddress2 = 0;
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
{
_Error_Handler(__FILE__, __LINE__);
}
}
When I try to transmit something to FuelGauge, using the following code there is no proper acknowledgement and response. Only the address byte is getting transmitted.
HAL_I2C_Master_Transmit(&hi2c1,11<<1,0x09, 1, 100);
This is how the waveform looks in an oscilloscope.
On the hardware side, I am using BSS138 Mosfet to level shift between 5V fuel gauge and 3.3V STM32F103. Pull-up resistor value is 3.3k.
Any pointers to the cause of this issue would be helpful. Thank you.
AI: Aside from the voltage and level conversion issues already mentioned;
there is no problem in the transaction itself.
The MCU performs exactly what the code tells it to do.
It may not be what you want though.
It transfers one byte from MCU memory to the chip I2C address.
The data is sent from pointer that is set to point to MCU address 0x09. This address apparently holds a byte 0x00 that is sent over the bus. Most likely you want to point to a buffer or variable that holds the data to be sent - in this case you most likely want to send 0x09 which is a command to read voltage. |
H: 240v AC Circuit Breaker for 24v AC
I am essentially intending to use this Schneider Electric A9F44120 MCB as an automatic brake for my wind turbine, which has an output of 25A @ 24Vac.
Can I use the normal 240Vac MCB for 24Vac?
Will it affect the current sensing ability or switching ability of the C.B? any suggests will be highly appreciated.
Thanks
AI: Whatever amp rating is on your breaker will hold true up to its voltage limit of 240 VAC. It is sensing only AC current, not the line voltage, and it does not care what the AC source is at long as it does not exceed the 240 VAC limit.
24 VAC is a bit low but enough so the breaker contacts behave correctly. They may not conduct current if the source voltage is just a few volts AC. If you have a datasheet on the breaker it should state minimum and maximum VAC limits. |
H: How to calculate the voltage gain in this picture?
simulate this circuit – Schematic created using CircuitLab
I know that by using \$A_v=-G_mR_{out}\$, and \$G_m=\frac{I_{out}}{V_{in}}\$, we can get the voltage gain of this circuit.
After the small signal simplification, I got:
simulate this circuit
So, as node 1 is 0 volt, there is no current goes thru \$M_2\$, then \$I_{out}\approx g_{m1}V_{in}\$ ? So that \$G_m=g_{m1}\$ which is the \$g_m\$ of \$M_1\$? Also, the \$R_{out}\$ is \$R_{02}\$, and is the voltage gain of this circuit \$-g_{m1}R_{02}\$?
Thank you!!!!
-------------------------------------------------------UPDATE
simulate this circuit
What about this circuit?
After the small signal, I got:
simulate this circuit
AI: The voltage gain is 0, because \$V_{out}\$ is connected directly to a voltage source, so its voltage will never vary, no matter what signal is present at the input.
Furthermore, M2 will probably catch fire, because its gate and drain are connected directly to the Vcc supply, which will cause a large current to flow through the FET, while it also must drop the full Vcc voltage. |
H: comparator isn't behaving as it should
simulate this circuit – Schematic created using CircuitLab
The output is always outputting 5V, and I have no idea why. I have checked the inputs to the comp, I even switch them around its never hits 0 volts. Yes I am double checking that input from the OPA350 is greater than the Vrf.
AI: It seems most likely that you have either tied the \$\rm\overline{CS}\$ input high, or you left it unconnected and it randomly drifted high due to static charge or capacitive coupling to nearby objects.
With \$\rm\overline{CS}\$ high, the output goes into a high-impedance state as described on p. 16 of the datasheet, which allows R3 to pull the output high.
Edit
In comments you now confirmed you left it unconnected.
As a general rule, you should never leave CMOS inputs floating, as this can produce unpredictable circuit behavior (even oscillation and circuit self-destruction in certain worst case scenarios). If a chip has an internal pull-up or pull-down allowing a logic input to be left unconnected, it will nearly always be mentioned in the datasheet. |
H: How to measure a 100 ohm differential signal on a spectrum analyzer?
I have a pair of 1.5V PCML differential signals coming out of an Altera Cyclone V GX FPGA, terminated on the FPGA in 100 ohms with common mode voltage = 0.65V (also provided on the chip).
I need to convert the 100 ohm differential signal to a 50 ohm single-ended signal so that I can measure it on a spectrum analyzer. Apparently the best method is to use a balun transformer but I am unsure on exactly how to go about this. I have chosen a 2:1 impedance ratio, 0.25-750MHz (bandwidth is perfect) balun with no centre tap. Here is my attempt:
My main questions are:
Is the impedance ratio 2:1 correct and is this circuit going to work?
Do I need to use a balun with a centre tap so that I can provide a matching bias voltage (0.65V) or can I AC couple the signal to the balun as shown above?
Is there a quick and dirty way of doing this without a balun? E.g. Terminating one of the differential pairs to ground with a 100 ohms resistor and connecting the other signal straight to the spectrum analyzer through a 50 ohm resistor? (I only need to observe the signal on the spectrum analyzer and the data path from the FPGA will be very short)
Can this exact same configuration be used to measure an LVDS signal in the future if needed?
Any help would be greatly appreciated. Cheers.
AI: 3) The correct way to do your quick-n-dirty measurement is to terminate one lead with 50 ohms to ground, and measure the other with your 50 ohm instrument. In fact, this isn't the quick-n-dirty way, this is the most accurate way, as it avoids the signal degradation of the wound balun. |
H: USB Camera to GPU Memory Directly
There may be several points in this question which may not make sense to a knowledgeable person, so I do thank you for your understanding in advance.
For a computer vision project I wish to process images from a camera array (10s of cameras) simultaneously and we wish to jam image data to GPU memory as fast as possible, with RDMA or NVIDIA's gpuDirect. There exist cameras with SDI outputs and SDI capture pci-e cards with said direct GPU memory access, however, a setup like this may end up being quite expensive.
From the cost aspect USB cameras we are considering seem to be a solution, however, I am yet to find a USB host pci-e card that can support RDMA or gpuDirect.
(1) Have any of you seen a product that can support such direct access schemes? (Maybe something that emulates driver of the camera one end and can directly write to GPU memory via pci-e)
(2) Is what I am looking for even technologically possible?
When I contacted a USB host pci-e card manufacturer I have received the following response that I cannot even interpret:
All our USB 3 controllers follow the xHCI specification published by
Intel:
https://www.intel.com/content/www/us/en/io/universal-serial-bus/extensible-host-controler-interface-usb-xhci.html
When data is transferred from a usb device, the controller is given a
list of address/length pairs where the data should be written. The
the controller will issues a PCIe MEM_WR to the address it is given
with the data. I hope that helps you decide if you can do what you
want with our host controller
So do you guys think it is possible or not (By possible I do not mean designing my own custom usb host capable of only doing what have described but with what's available already in market)?
AI: Haven't heard of this, but looking in GPUdirect description and developer site, it seems like it is needed that the device driver for the 3rd party device, should be capable of assign GPU address to the device, in order to perform DMA operations (sections 1.2 and 1.3).
I am not used to PCIe, but I guess that as you plan to use USB cameras, they will be communicating with the USB driver in your system. So 2 options I see are:
The one you stated, build your own USB host with RDMA capabilities, or
modify/create a USB driver for your cameras including Nvidia Kernel driver features, to allow these features to be used from a CUDA program. |
H: What is a mask on a PCB?
I have an Arduino project that is mostly working on a solderless breadboard and I’m starting to plan on making it semi-permanent by soldering the components in place and mounting it into a project box.
I am thinking about using this Adafruit Perma-Proto Half-sized Breadboard PCB. Part of the description says (emphasis added):
The bottom has the 5-hole pad design that matches a classic breadboard, with 4 power bus lines on the sides, and no mask so you can easily cut traces when necessary.
Front:
Back:
What does the part about no mask mean?
I think cutting traces means using a knife to scratch off the connection lines on the back so you can “split” one or more columns and gain more functionality. For example, assume I have a fictional micro-controller whose width would allow it’s pins to fit on this board’s rows E and F (straddling the middle) and its length would use pins 1-10 If I cut the connections horizontally from 1-10 between rows D and C and H and G, that would allow me to use additional components for rows A-C and H-J and columns 1-10 that I would not have been able to use without the cut. Is this correct?
ETA: Some of my questions here have been received poorly, so I took the time to make sure I added links and relevant pictures and quotes. Hope this helps.
AI: Mask in this context means solder mask. An insulating paint that protects the traces from oxidation, dirt and shorts when soldering.
The bottom side shows you the raw material without the soldermask. The top side has white soldermask with black silkscreen (the text). |
H: reflow oven issues with RO4003 PCB
Im trying to reflow some RF pcbs in a legit reflow oven. The PCBs material is "Rogers RO4003 305 Um" and 3 layer. (Its a very thin pcb)
If temperature is high enough to reflow the paste, the pcb changes color , and gets a little burned, degrading its usability.
paste type : CIF Sn96 5Ag3Cu0.5 no lead
oven: CIF FT 03 (its a 2 heating element: quartz tube)
please suggest some hints to improve soldering process.
AI: Yeah, these non-pro ovens have a pretty nasty rep. There may be a "sweet spot" in the oven somewhere. I do pretty good by doing small batches in a toaster oven that I retrofitted with a heat-ramp-soak controller from Omega, and putting a thermocouple directly on the board. especially after insulating the walls of the oven.
If there's a way to move the temp sensor to be in direct contact with the board, do it.
Other than that, all of these non-pro solutions, my retrofit included, take some hours of cycling through while measuring, to tweak out the ramp-soak profiles. Ya gets what ya payz for.
Also, if I may, you don't use an oven like this for real quantity. Therefor, if you don't need to use lead-free, don't!! You have less of a chance of burning up your board at a lower temperature. In addition, you might think of this as a prototyping step. Use your oven to inexpensively knock out prototypes, test them, then ship off board assembly to folks with the right gear. |
H: RF layout bend over Component
We lay out the RF trace for below model.
GSM 900MHz
RF trace maintain at 50Ω impedance. As I know, the RF trace needs to be as short as possible for better signal. Do we need to bend RF trace when tuning component comes in between? See attached image for a better understanding of my question.
Do I need to follow curved traces at interaction of L3 and C67?
AI: Yes, a smooth bend would be better for signal integrity than the square corner. All other things being equal, that corner sticking out represents an unnecessary impedance "bump" in the transmission line. Although in this case, the dimensions are so short that you'd probably never be able to measure the difference. The solder fillets on the nearby components also create impedance changes of about the same order of magnitude. And making the turn within a component pad makes the question moot anyway. |
H: Diode OR circuit drive current
Why is there no drive current available from the circuit below when R is connected to 0V?
The last sentance in this extract from wikipedia states that
If R is connected to 0 volts it will have no drive current available to drive the next circuit; practical diodes need a bias current.
If diode A had +6V at the input, R was 1k and connected to ground; then A would be forward bias ("fully on" as +6v >> 0.7V required) leaving B and C in reverse bias. Providing the +6V rail was capable of supplying more than the (6mA) required for the resistor I would have thought that there would be current left over to drive the next circuit?
AI: It's not a problem with the OR gate itself. Think about what happens if the OR gate output is connected to a diode-based AND gate. What happens at the output of the AND gate? |
H: Short-circuit protection, reverse polarity automotive
I am designing a power circuit and would like to integrate the ic VN5160S to protect it, but I have doubts about the position of it.
Would the ic VN5160S be before the DC / DC converter in my circuit?
I am feeding a microcontroller, canbus, bluetooth and rf.
the power input is 12v and passes DC / DC converter to 5v and 3.3v.
The circuit I did is correct for me or something wrong?
AI: You want it before the DC-DC converters. Your schematic looks correct to me. |
H: PIR HC-SR501 and TIP122 - TIP 127 heating problem
I'm having a problem with a circuit commanded by a PIR.
I managed to ring a chinese doorbell when someone pass in front of the PIR but the main problem is the two transistors become very hot and I don't understand why.
The doorbell is a chinese model like this:
This is the circuit:
When the button is pushed it connect the positive from an LR23A battery to the circuit and send the radio signal to the receiver so I use the PIR and the two transistors to close the circuit when the PIR detect a presence.
The battery can provide 55mAh so the circuit has a very low power consumption compared to the TIP122 and TIP127 capacity.
What's wrong with this circuit?
Thanks in advance for your attention.
AI: The resistor below TIP127 is miswired, instead of acting as a current limiter from 12V to the emitter of TIP127, it's a a (non-functional) shunt from 12V to the base of TIP127, as a result both transistors short the 12V load.
You need to place it in series from 12V to the emitter terminal of the TIP127.
With 2200 ohms and 12V you have about 5mA of current through your indicator LED. |
H: Two 9 V batteries in parallel
I don't know where else to ask this question and I think this is the best place so I'll ask here.
I'm making a remote controlled boat that uses two DC motor controlled by a L293D motor driver chip. It takes power for driving the motors from 4.5 to 36 V. To supply this, I'm planning on using two 9 V batteries in parallel. Would this be fine, or is there a better option like 4 AA batteries in a series?
I don't know much about batteries and the like, so there might be something that would make this not a good idea that I don't know about, so that's why I'm asking here. Thanks.
AI: In terms of longevity, the 4xAA solution would be better you have more amp-hours.
I don't know what your motor current load is, but for arguments' sake 100mA. At that discharge rate a typical 9V alkaline will yield about 400mAH, so you have about 800mAH of capacity. An AA battery on the other hand has about 2500mA hours (since it's in series, you don't x4).
The bigger problem with using 9V batteries at higher loads is that internally they are just a stack of 1.5V cells, so the internal resistance is a bit worse because there are 6 of them to get the 9V. The only upside is you have a little more margin on the voltage, but at a really high penalty especially on price.
My personal preference would be to use a AA rechargeable system (NiMH), the capacity is almost as good as the alkalines, and you will save money. Energizer charger/battery packs sell for literally the same price as the rechargeable batteries, so you can buy a couple to swap out if you're running a long time. You can also add one or two more AA batteries in series if you have the room to give you some margin on voltage.
Just an addendum:
In terms of battery chemistry/technology it depends on what you want your operating cost to be. Generally I find alkalines to be ridiculously overpriced especially "ultimate lithium" types which are -not- the same technology as Lithium-ion (which is what generally most people are familiar with).
Lithium ion -is- a good alternative, if you can find a good RC hobby shop they should be able to get something set up for you, but one word of caution- Lithium batteries have very high energy density so make sure you don't get an electrical short. |
H: Are there any reasons I shouldn’t use a nodemcu’s 3.3v pin with this component?
I have this Hydrogen Sulfide gas sensor and the datasheet says the supply voltage requires a regulated voltage with a min of 2.6v and max of 3.6v
I can’t find any datasheet for the nodemcu v3 (spent hours looking, but none mention anything relevant) that’s says whether or not the power output of the 3.3 pin is regulated (how can I tell?) but others have said an Arduino Uno’s 5v and 3.3v pins are regulated. Assuming it is regulated (I know what they say about assumptions), are there any reasons why I should be concerned about using the 3.3 pin?
What about using the aforementioned Arduino Uno, whose power pins are regulated?
This sensor is kinda pricey and I don’t want to burn it out due to stupidity.
AI: The 3v3 rails of both NodeMCU and Arduino boards should indeed be regulated.
The more meaningful question is how much current they are able to safely provide to external devices. On Arduino boards where the MCU runs at 5v, the 3v3 rails are often produced by an on-chip regulator in the USB interface and don't have much current to spare.
In the NodeMCU case, the ESP8266 (or ESP32) is itself running off 3v3 so typically a SOT223 or SOT23-5 regulator is used. These generally have higher current capacity.
The data sheet for your device implies it draws 4 mA from the supply. Almost any discrete regulator would be chosen with enough margin to be able to supply that along with the on-board loads. It's fairly likely even the USB-chip's weak 3v3 supply as found in an Arduino could handle this, as long as you were not adding additional things as well.
It may be that using a separate regulator or various LC filtering approaches would yield a quieter sensor reading, but it would be worth seeing what you get in the easy case before worrying about that. |
H: What if V+ = V- with an OpAmp?
In the two simulations below, Vout is almost the same (to GND) in both while the OpAmp sees the same differences in potential at its inputs, so actually, the second output should be 1V lower. How is that possible?
simulate this circuit – Schematic created using CircuitLab
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. OP's schematic redrawn with more realistic power supplies.
In the two simulations below, Vout is almost the same (to GND) in both while the OpAmp sees the same differences in potential at its inputs, so actually, the second output should be 1V lower. How is that possible?
You have two big problems with your schematics:
The supply voltages are way too low - particularly for a TL081. You will see this in the datasheet.
You have no feedback on your circuit so the op-amp output will be the "open-loop gain" (> 1,000,000) times the difference between the two inputs. You have shorted them together and you are probably expecting a zero output as a result. Real op-amps aren't perfect, however, so the very slight differences between the two inputs - known as the input offset voltage - will cause the output to swing as hard as it can towards one supply rail or the other depending on the polarity of the difference.
With such low supply voltages the output will probably get stuck at about half-supply voltage.
Note that simulation results will vary with the quality of the simulator. Some will give realistic simulation of details like input offset voltage and various other non-ideal characteristics. Operation at very slow supply voltages may be one of the conditions that may not be simulated well. |
H: Motorization of a Shaft
I know this is an awkward one, but need some answers. Is it a good practice to fix/lock the shaft of a motor, and consequently the body of motor shall start rotating?
Essentially, there is a shaft which has a hollow diameter. I have to mount the motor inside the shaft (the outer diameter of the motor shall be equal to the hollow diameter of the shaft), and rotate the shaft as my final product?
Any recommendations about suitable motors, or any suggestions are much appreciated.
Thanks.
AI: In industrial applications, the type of motor described is called an "outer-rotor" or "inside-out" motor. Brushless DC motors of that type used for model airplanes and small drones are called "out runners." Various manufacturers of industrial motors supply custom-designed stators and rotors to machine manufacturers for incorporation in driven equipment. It may be possible to purchase standard motors and modify them to fit your requirements, but that is likely to be very challenging. You may not find a standard motor that can be modified to suit your needs. |
H: Open switch that will turn on an LED without power drain
I'm sewing a purse and I would like to put some LEDs inside of the bag that only draw on the battery and turn on when the bag is open.
The "switch" that I'm using are the metal snaps on the bag.
I have figured out how to make this work, but it slowly draws power all of the time. Is there a way to do that without that happening?
AI: The other answers provide electrical solutions. A simpler solution is mechanical. A reed switch and magnet, so that the connection breaks when the magnet is near is one solution. Another is a simple normally closed switch, that will be open when pressed. You would have to sew it on in a way that the closed purse pushes the switch. Micro switches (with or without a lever) are ideal for this. Both of these are 100% battery drain free (aside from self drain of course.) |
H: How to determine bandwidth available at USB ports
I am considering a mini-itx single board computer for a project that makes heavy use of USB. I want to ensure that certain USB devices have enough bandwidth. For example I have a data acquisition board that uses a bulk input but those transfer frames do not have guaranteed bandwidth. By placing this on a dedicated controller then I believe 80-90% of the high-speed bandwidth will be available as 10-20% is allocated for control endpoints. In other words, and if I understand this correctly, there will be enough free frames to support the bandwidth needed by my board.
But I'm looking at block diagrams that show physical USB ports going back to the Intel processor and it's not clear to me how these are tied together internally. There is the ICH that appears to contain EHCIs that will support high-speed. How can I know if my data acquisition board is sharing the bus controller with other devices?
AI: Starting from 6-th generation of Intel processors (Skylake-KabyLake, and some mobile SoC as Braswell), the EHCI (legacy USB 2.0 controller) has been eliminated from Intel platforms. The USB 2.0 service now comes totally over the xHCI USB 3.x controller using "native USB 2.0 support".
The USB 2.0 support over xHCI comes with one very positive improvement: the USB 2.0 HS(High Speed) bandwidth is no longer shared between root ports, so several HS bandwidth-demanding devices can co-exist on a system without starving and sharing. Here are some more info on the subject.
So you shouldn't worry about eating your bandwidth by someone else as long as your device is connected to USB root port and not over USB hubs - the hubs have only standard sharing architecture. |
H: In 4 Layer PCB - which internal layer has to be consider to calculate Microstrip characteristic Independence for bottom layer
4-layer PCB stack-up as shown in attached figure - In case of bottom layer; which internal layer has to be considered to calculate characteristic impedance for microstrip line on that layer. Is it power plane or ground plane?
AI: The layer containing the nearest unbroken plane.
Ideally that would be the next one, because any layers in between cannot be used, or you create an impedance mismatch. |
H: MAX485 suddenly drawing too much current and output voltage levels are not right
I have two PCB that I designed and they are made by a PCB manufacturer (so they are identical). They use a MAX485CSA to communicate but suddenly one of them is drawing too much current, on a normal operation the circuit draws around 5mA and now It's drawing 73mA from my bench power supply (I get the reading from the power supply display). I know that the culprit is the 485 transceiver because if I disable the sender pin and enable the receiver (both pins are tied together as you can see in the schematic so this is how it works) the current drops again to normal levels (5mA), I've also noticed:
When transmitting: channel A is 2.84V when high state while in B channel is 4.54V when high state. In the healthy PCB, both are around 4.5-5V when high state.
When not transmitting: channel A is 2.84V (when it should be 4.5-5V) and channel B is 0V as it should be.
If the circuit is connected to the power supply powered ON with its output OFF A and B are connected to the receiver (in this case the receiver is an Arduino using a MAX485CPA, same setup as the sender circuit), the receiver gets an endless train of garbage (random 0s and 255s), this doesn't happen with the healthy sender.
If the circuit is connected to the power supply powered OFF or is not connected to the power supply at all I don't get any garbage.
Things that solved the garbage problem under any circumstance: joining the circuit's common ground with the power supply's ground (Earth), joining both sender and receiver GNDs, adding pull-up and pull-down resistors to channels A, B at the receiver's end.
Note that even with the voltage levels being wrong I can get the data right if I turn on the circuit before the receiver (so the receiver's buffer won't get filled with garbage)
I'm pretty sure that if I replace the MAX485 on the sender the problem will be gone but I'd like to know what's going on and how can I protect the transceiver to prevent this from happening again before I send the circuit to repair.
I attach below the part of the schematic that shows how the transceiver is connected if you wonder about termination and pull-up pull-down resistors:
I'm sending data through a very short distance, like 5-10 meters and low bitrate (9600bps) so I've not added termination resistors, plus a termination resistor would draw additional current.
I have played around a lot with 485 transceivers in very messy setups like breadboards and such and I've never needed pull-up/pull-down resistors so that's why I have not added them to the design.
EDIT1:
I'm going to keep common ground as Jeroen suggested but there's still something bothering me. I've been checking the receiver's side controlled by the Arduino and I noticed a transient in the non-inverting channel when the Arduino's USB is plugged-in (being USB the only PS), it stays at 4V for like 3 seconds, then it drops to 288mV. The signal also goes up and down some millivolts as I plug-unplug other USB devices and the monitor. This 4V to 288mV transient is causing current spikes in the sender's end of the same magnitude as I'm experiencing now continuously in the defective circuit ¿someone knows what does this mean?
EDIT2:
The 485 transceiver was damaged after all, It has been replaced and the problem with the excessive current is gone and voltage levels in the output are right this time. I'm also not getting garbage from the powered off circuit,with or without common ground.
Reasons for this to happen remain unkwnon even though there are some potential culprits:
Not keeping common-mode within spec due to the lack of common ground as Jeroen pointed out.
Max485 transceiver failure after frequent transients from the receiver's end when connecting/disconnecting the USB cable which caused current spikes on the circuit.
For now I'll be performing tests on the circuit using common ground and see how it performs. I'm also powering the Arduino from the power jack so I won't get those ominous transients each time I plug in the USB cable.
AI: They use a MAX485CSA to communicate but suddenly one of them is drawing too much current
That sound like latch-up. It's what you get when a pin goes outside it's supply rails.
Things that solved the garbage problem under any circumstance: joining the circuit's common ground with the power supply's ground (Earth), joining both sender and receiver GNDs, adding pull-up and pull-down resistors to channels A,B at the receiver's end.
You should already be doing this.
RS-485 is differential signal, but it still requires signal ground to keep the common mode voltage within spec.
I think this is going wrong here. |
H: LED's brightness difference in these 2 circuits
I have past exam's problem as follows. Suppose there are circuit A (left image) and B (right image). The question is why LED in circuit A is brighter than in B. The solution states that the Low-level output current (20 mA) is much higher than High-level output current (1 mA). Hence, the LED in A is supplied with proper current. What I do not understand is how one can arrive at this conclusion using Kirchhoff's law and determine the brightness using voltage drop. I also want to know better about these current parameters by doing so.
simulate this circuit – Schematic created using CircuitLab
AI: It would depend on the device used as the inverting gate.
As the answer states:
The Low-level output current (20 mA) is much higher than High-level output current (1 mA)
One can deduce the inverting gate IC can sink 20mA to GND but can only source 1mA on its "high" state, thus limiting the current on the LED.
It is fairly common for chip to be able to sink more current than sourcing, due to transistor configuration.
Overall this is totally depends of the IC chosen, and there is no part number given. |
H: what is the good antena length for 433Mhz modules used for low distance domestic usage?
I want to use a low cost 433Mhz module for low distance domestic usage, but I need to solder an antenna , (there is a place for that on the reception module), to get a better signal across my walls. how to choose its length ?
I guess a simple wire of X% of wave length ?? or another calculation ?
or is this more complex & I need something more like an old radio antenna ?
AI: I guess a simple wire of X% of wave length ?? or another calculation ?
or is this more complex & I need something more like an old radio
antenna ?
Start with a quarter wave wire (circa 17 cm long) and if you get adequate reception you may experiment by shortening it a little bit but you'll find certain things if you shorten it too much: -
The signal level received rapidly falls away with moderate shortenings from one-quarter wavelength
The impedance becomes capacitive and this can be somewhat alleviated with base loading with an inductor to series tune out the capacitance.
You will start to make an antenna that is more optimized for higher frequencies and these may overload your receiver circuit if they are present in your area. |
H: Why it is necessary to put two 120 ohm termination resistors at each end of CAN transmission line respectively?
Why it is necessary to put two 120 ohm termination resistors at each end of CAN transmission line respectively? Does it make an equivalent resistance of 60 ohm? (parallel resistors). Is it OK to put only a single resistor at any end or in middle of this transmission line?
AI: If you want to avoid data reflections from either end of the cable you'll need to terminate those open ends in the characteristic impedance of the cable. As far as reflections are concerned the two impedances are not in parallel. At DC they are but at data transmission edge speeds they are not. |
H: Voltage sequencing on power up
I'm pretty new to PCB design, so my question may be obvious for some of you.
I am wiring the layout of an LCD screen on a PCB using KiCad. When I came to powering up, the datasheet of the AT070TN92 suggests applying DVDD voltage before AVDD. I know I can use voltage regulators to gain power.
The question is, how can I ensure one voltage is applied before another? How can I make sure of the delay between DVDD and AVDD?
AI: Many regulators have an Enable pin. You can connect the output of DVDD's regulator to AVDD's Enable to ensure it powers up afterwards. The data sheet of the regulators will indicate at what voltage (at Enable) the regulator will turn on. You can use this info to time their power up. If the timing of their power up is not satisfactory using DVDD directly, you can modify the timing of the voltage at Enable using something like a voltage divider or a capacitor. |
H: Plot of a mixed signal in matlab
I have the following signal
xa=4000.*sin(2*pi*f1*t)+1000.*sin(2*pi*f2*t)+ 500.*sin(2*pi*f3*t);
and the values of f1,f2 and f3 are
f1=50000;
f2=500000;
f3=2500000;
and with the above information I have to find a figure like
in MATLAB. I am using the following code but not getting a figure like this.
close all;
clc;
%subplot(2,1,1)
t=0:0.0005:1;
f1=50000;
f2=500000;
f3=2500000;
xa=4000.*sin(2*pi*f1*t)+1000.*sin(2*pi*f2*t)+ 500.*sin(2*pi*f3*t);
% xa=cos(2*pi*f*t);
plot(t,xa)
I also tried with the different time intervals t but not getting the required figure.
AI: What does your plot look like? I think your t interval is WAY off. The time span in the plot is 100us. Try with t=0:0.00000005:0.0001 or something like that |
H: Memory choices for lack of arduino speed
I'm designing a system which reads values from a microphone and feeds it to the Arduino to calculate a few sound parameters. The measuring happens during a couple of milliseconds. The problem is that it's way faster than the processing speed of the Arduino.
So I was wondering if it was a good idea to first feed all the data to a memory and then the Arduino would get it at its pace?
What kind of memories do you recommend to this application?
AI: SRAM will do the trick.
It wastes minimal amount of power and it's easy to interface (just SPI);
Unlimited writes/rewrites
Fast
Getting a chip that has 256 kB (keep in mind in most places such chips are labelled by the number of bits, so 256kB will be labelled as 2 MBit) and still retains the easy-to-use SPI interface might be more challenging, but I bet it exists. I managed to find a 1MBit one (23LC1024) in a local shop.
Keep in mind that "Arduino" has become a vague term which is more about the framework, not really about the chip. There are Arduino-compatible boards that use an ARM microcontroller inside, whose computing speed should be enough to get you computation done without the need of intermediate cache SRAM. It depends on what's most convenient and what you are actually trying to achieve. |
H: How do eradicate pad to pad clearance with-in the component in Eagle Tool?
I tried clearing the error by defining Rules and net Class, but that does not happen. How to do this?
AI: The last version of EAGLE I used has a sticky 'accept' button when running the DRC, after that further DRC runs will ignore them.
I can't tell what your dimensions are, but as far as the DRC rules settings, the pads would would be in the clearance dialog with the pad / pad row/column setting make sure you are using the correct units.
That being said those inter-pad distances look really tight (no scale to compare to, but given the labels I'm thinking 2.54mm or 1.27mm spacing). Don't forget that even if the board house can make a 3mil spacing board, the fact that you may have to solder pins in and accidentally bridge them during the process may create difficulties. |
H: SPI: Receiving bytes from slave
For a couple of days I have been learning about SPI and decided to give it a go with 2 small devices.
DEVICE 1: Atmega328p (MASTER)
DEVICE 2: MFRC522 (SLAVE)
As far as I understand:
master sets SS pin low
master moves data to SPDR
as soon as data gets in to SPDR clock starts transmitting and data shift out
at the same time SLAVE shift data out too
so by the end of 8 clock pulses SLAVE received 1 byte and master received 1 byte too
SS pin goes high again
Scenario #1
I am sending the address byte to MFRC522 from Atmega328p, and expecting a reply. According to the documentation, the first response from SLAVE is "X" I take it as 0x00.
On the next byte sent to the SLAVE, I receive the response from the first byte I sent, and so on until the end.
Since it has some kind of offset would I need to send 0x00 to the slave to read that last byte of information?
AI: Table 6 on p.11 of the datasheet is pretty explicit:
Yes, to receive the Nth data byte, you need to transmit 00 in the (N+1)th transfer. |
H: Are standard USB connectors (Standard / Mini / Micro) Impedance controlled?
Are standard USB connectors Impedance controlled? Do they follow differential characteristic impedance of 90 Ohm for DM & DP lines?
Does standard Type A, Mini / Micro - USB Type follow same impedance match from PCB? Or Characteristic impedance changes at connector pins?
If they follow, how they manage to do so? As there is no ground / reference plane on USB connector to get this impedance.
AI: The spec is not exactly 90Ω for connectors, but has a more loose requirement for impedance. Connectors that are built to the USB spec will have an impedance of the standard. The data lines inside of USB are twisted (or should be) which also makes an transmission line.
The way the manufacturers probably keep the impedance within spec is by modeling the parasitics and making a simple circuit. The pins to shell would form a capacitor and the pins have resistance and a small amount of inductance. If you do have a termination (like a connector, it is important to match closely but it doesn't have to be exactly matched, the goal is to minimize reflections and if you have an impedance close to 90Ω then that will be sufficient to maintain signal integrity.
The USB spec calls for a mated connector impedance of 75Ω to 105Ω:
Universal Serial Bus 3.1 Legacy Connectors and Cable Assemblies
Compliance Document
Mated Connector Impedance (Differential)
75 Ω minimum, 105 Ω maximum. 50ps (20-80%) rise time of a differential
TDR. (Mated connector includes cable termination areas). SuperSpeed
pairs only.
Source: https://www.usb.org/sites/default/files/CabConn_Legacy_3_1_Compliance_Rev_1_1.pdf |
H: Determine the value of a constant for which the system is marginally stable
So I have the following transfer function
$$G(s)=\frac{s^2+0.1s}{10s^3 + 1.1s^2 + 0.01s + 2K}$$
Now I'm trying to determine the value of K so that I have a marginally stable system. I'm not supposed to use the Routh-Hurwitz method. I'm thinking hard but I seem to get to nowhere. I know that for the system to be marginally stable I will need a real pole in the left complex plane and two complex conjugate pure imaginary poles. But how can I determine the exact value of K that will provide me with those 3 specific poles?
AI: I guess the simplest way of making sure the roots are located correctly is:
A polynomial with one real root and 2 imaginary roots generally looks as follows:
$$
A\cdot (s+a)\cdot (s^2 + b)
$$
This needs to match the denominator, so
$$\begin{align}
10\cdot (s + a)\cdot (s^2 + b) &= 10\cdot s^3 + (10a) \cdot s^2 + (10b)\cdot s + (10\cdot a\cdot b) \\
&= 10\cdot s^3 + 1.1 \cdot s^2 + 0.01\cdot s + 2K
\end{align}$$
From this it immediately follows that
$$\begin{align}
a &= \frac{1.1}{10} = 0.11\\
b &= \frac{0.01}{10} = 0.001\\
K &= \frac{10\cdot a\cdot b}{2} = \frac{0.11\cdot 0.001}{2} = 55\cdot 10^{-5}
\end{align}$$ |
H: SMPS and PCB layers
I am trying to design a ultra low noise SMPS with 20 W output (85 V to 220 V) and need to make a choice between a 4-layer and a 6-layer PCB.
On the 4 layers we plan on having components on both sides and two ground layers. Is this a good idea on the high voltage (250 V DC) side? Should I use a component layer, ground layer, power layer, component instead?
On the 5 V (secondary side) same question, should I use 2 ground layers and components (top and bottom)?
At least, 6 layers could be made better: 1 components, 2 ground, 3 power, 4 hi-speed, 5 ground, 6 components.
What's your advice in order to achieve lowest noise?
AI: Henry Ott recommends a 6 layer stackup like this:
Most six-layer boards consist of four signal routing layers and two
planes. From an EMC perspective a six-layer board is usually
preferred over a four-layer board.
One stack-up NOT to use on a six-layer board is the one shown in
Figure 5. The planes provide no shielding for the signal layers, and
two of the signal layers (1 and 6) are not adjacent to a plane. The
only time this arrangement works even moderately well is if all the
high frequency signals are routed on layers 2 and 5 and only very low
frequency signals, or better yet no signals at all (just mounting
pads), are routed on layers 1 and 6. If used, any unused area on
layers 1 and 6 should be provided with "ground fill" and tied into the
primary ground plane, with vias, at as many locations as possible.
Source: http://www.hottconsultants.com/techtips/pcb-stack-up-3.html
I think the goal with an SMPS would be to put the high frequency signals in the middle, you may not need to use 2 planes and may be able to use one for power or another ground. It might be advantageous to sandwich the high speed signals between two grounds as that would reduce cross plane capacitance and crosstalk onto a power plane. The power planes that are switching will also be noisy so it may be good to also sandwich the high speed and switching power planes between two grounds to reduce those planes radiating/EMI.
Remember you have creepage and clearance requirements with high voltages. |
H: Differential Amplifier with active load
I came across this example in Razavi's Analogue CMOS IC Design book
The solution says that the for differential output, Vn does not change. Why not? Is it because any voltage drop across any of the resistors is essentially accounted for at either X or Y?
AI: Say you apply some differential signal \$V_{in}\$.
Due to the differential gain of the amplifier, \$V_X\$ may now be,
$$ V_X = V_N + \Delta $$
Similarly,
$$ V_Y = V_N - \Delta $$
Since \$R_1\$ = \$ R_2 \$, the voltage diver formed between \$V_X\$ and \$V_Y\$ yields \$V_n\$.
Due to the symmetry of the differential amplifier, \$V_N\$ appears as an AC ground. |
H: 8PST switches, do they exist? (not 8SPST DIP Switch)
I'm looking for a switch that can connect/disconnect 8 signals at a time with one button/lever/slide whatever. Power requirements are very low. I do not want to use analog switches due to interference with my measurements, which are in the nanoamp range.
I would prefer something that is through-hole or surface mount instead of solder lugs. Does such a switch exist?
AI: Figure 1. Various "wafer" rotary switches."
The common forms of these wafer rotary switches have 30° detents and one or more "wipers" contacts which switch between the twelve contacts. The wipers and contacts can be arranged in
12-way, 1-pole
6-way, 2-pole
4-way, 3-pole
3-way, 4-pole
2-way, 6-pole
Usually a stop ring can be added to restrict the number of switchable positions. Wafers can be stacked if more poles are required.
For your application two 2-way, 6-pole wafers should suffice as you only require eight poles. |
H: Four-terminal resistor pinout?
Anyone can tell me (or preferably, point me to a source that explicitly shows) the pinout of the 4-pin current-sense resistors?
I'm seeing the datasheets for three different models (including Rideon's FHR 4-2321, the Powertron FHR 4-2321,and the PBV-R005-F1-0.5) and I simply cannot believe that neither one of them shows the actual pinout !!! (the Powertron datasheet does say "Standard Contact S", but a Google search for that shows nothing concrete)
This page gives a very good explanation of the intended use. Except that they talk about terminal 1, 2, 3, and 4. They do not explicitly relate T1,T2,T3,T4 to pin numbers (and their drawing doesn't look like Terminal N maps to pin N --- in any case, if we read the pins 1,2,3,4 from left to right)
AI: If you look at lab current shunts like this one
you see that the current and sense terminals are on the same termination block of the resistor, the 4 point feature being that the connection resistance of the current path screw doesn't affect the voltage measured across the sense terminals. I'd suspect that these shunts are similar in construction, in that the two leads at each side are part of a single leadframe that the resistor element is bonded to, and the fatter of the two pins is the designated current terminal.
Here is an Ohmite data sheet that shows explicitly which pin is which. |
H: How to protect against a short circuit fail in 12VDC X capacitor?
When adding an X capacitor for simple line filtering in a 12V DC electronics project, how would you add protection against an unlikely short circuit failure in that capacitor?
Is it as simple as a fuse or something more interesting?
AI: You should not need any protection for X caps, they are designed not to short. If you have a concern, use an X1 instead of the more common X2. They are made to an even higher standard.
However, using a fuse will protect from other failures that are much more likely. |
H: Wireless LAN standard
I'm taking a module on wireless design and we were told that the IEEE 802.11b standard has a band of 2.4 to 2.4835 GHz and that it is divided into 13 channels. Now, my question is, does that mean that it can only support 13 devices at once? I couldn't find any explanation of this online.
I know it's kind of a vague question.
AI: The 802.11 family of standards is (generally) based on CSMA/CA - Carrier sense, multiple access with collision avoidance. This means that multiple devices can use the same channel (radio frequency range in the case of 802.11) and communicate with each other. Each device has a MAC address, and there are addresses allocated to broadcast packets. |
H: Using narrower DDR RAM than controller
I have some ARM processor that have 72-bit width (8 for ECC) RAM controller.
Can I buy eg. two 32bit chips and combine them? If yes then how?
Can I buy just one 32bit and pull down rest of data pins on processor?
Processor brief if needed: https://docs.broadcom.com/docs/1211168571391
AI: Can I buy eg. two 32bit chips and combine them?
I imagine so. The product brief describes ECC as "optional", which indicates to me that it can operate with non-ECC memory:
The memory system supports the latest DDR4 memories in addition to DDR3 and DDR3L. Optional ECC support is provided as well.
In practice, though, this part appears to be designed to operate with very large quantities of memory. (For instance, it advertises "address space beyond 4 GB".) Using it with the bare minimum of memory seems like it'd be a waste of its capabilities.
If yes then how?
Contact the vendor for a full datasheet. Keep in mind that Broadcom typically only works with large customers; if you just have a few of these parts from a gray-market source, you are probably out of luck.
Can I buy just one 32bit and pull down rest of data pins on processor?
You'd have to ask the vendor, but it seems unlikely. |
H: Wrongly documented TI LM324 unity-gain bandwidth?
I was reading the datasheet of the LM324 from TI (http://www.ti.com/lit/ds/symlink/lm324.pdf).
They specify a generic GBW of 1.2MHz. This is usually done with no output applied, from what I understand.
Then there is the \$ A_{vd} \$ which is max 100K (100 V/mV). This is the open-loop gain measured with a load, so taking into account loading effects, if I get it right.
Is this gain really reducing by a factor of 10 with few \$ k \Omega \$ on the output?
To understand this better, I read the SLOA11 from TI. They mention \$ B_1 \$ to be the bandwidth at unity-gain with a load specified under the \$ A_{vd} \$ measurement, which should result in a BW of 100kHz. Making it different from the GBP measurement with no load (resulting in unity BW of 1.2 MHz). But in the LM324 datasheet, \$ B_1 = 1.2MHz\$ instead of \$ 100kHz \$. So I am not sure here what are the correct terms and how to use them.
AI: I would reckon that the 100k figure is the gain at DC. Now if the dominant pole is at 12 Hz, then the GBW product above this frequency will be approximately 1.2 MHz. The output impedance of an opamp is normally of the order of 100 ohm so a load of a few k is not significant. |
H: WolframAlpha results for logic statement input
I was trying to simplify the following Boolean logic equation using wolframalpha.com.
(not (A) and B and C) or (A and (not(B)) and C) or (A and B and not (C)) or (A and B and C)
When I entered it into the box, it spat out the following.
Image is a link.
After showing me some simplifications of the logical statement, Wolf showed me something called truth density, which I am guessing is the ratio of true outputs to false inputs. I am mostly confused with the last two categories/results. What is a Boolean operator number, and why does the number 232 match my equation?
AI: There are only 256 possible boolean operations with three inputs, because there are only 256 different ways you can put T's and F's in the result column of the truth table.
If you look at your truth table, and consider the result column. Instead of T and F, write the results as 1 and 0. Now consider that column of numbers as a binary number. It's value is
128 + 64 + 32 + 8 = 232 |
H: Purpose of Buffers in this Circuit
The schematic below is an H-bridge , the high and low mosfets are internal to the two ICs on the right side, their datasheet is here.
What is the purpose of the part on the left, which I googled to be a buffer IC, datasheet here.
Is it for the sake of circuit protection?
My understanding of using a buffer is limited, I have always assumed they where used in cases where something could not source enough current to drive something else, so you use a buffer with higher current sourcing capability. Is this correct and is this the case here?
AI: It is a buffer and used because the drive source current at hdr P3 is not known. This buffer has almost no load on its inputs but can source +/- 8 mA per pin, even though the package has a wattage limit, depending on if you get a SOIC package or a DIP package. Maximum total current is limited to 50 mA.
That is more than enough to drive the H-bridge drivers. Speed limit for U1 is about 20 MHZ though 50 MHZ is possible with just 15 pF loads. Plenty fast for PWM if you are using that. |
H: Using an LIS3DH at LiPo Voltages
The LIS3DH 3-axis accelerometer specifies that it's supply voltage should be between 1.71 V and 3.6 V. For most applications, this just means you are using either 1.8 V or 3.3 V as your main rail. However, page 12 of the datasheet also mentions that the absolute maximum for the supply voltage is -0.3 V to 4.8 V. Given that it includes a negative voltage, I'm going to assume that this rating is the safe voltage range that can be applied to the VDD pins.
It does specifically mention that "functional operation of the device under these conditions is not implied", but could I safely operate this device directly and exclusively from a LiPo battery? 2.7 V to 4.2 V is well within the absolute ratings, but what exactly am I risking at this point? I'm also not the first one to be using these kinds of voltages (ST Forums Thread).
Before you ask, using an LDO doesn't make a lot of sense for my application due to the extra circuitry to facilitate a multi-voltage I2C bus and limited PCB real-estate. I didn't feel like it was strictly necessary to include detailed info about my application for my specific questions, but I'd be happy to provide it if needed.
LIS3DH Datasheet
AI: The absolute maximum ratings are the limits at which the device may be damaged. The manufacturer makes no claim about the device operating correctly between the max rated supply and the absolute max supply. You won’t damage the device permanently but it may not give accurate readings.
You can probably drop the voltage into a good range by putting a diode in the supply path. |
H: Impossible to find the energy stored in an inductor without resistance and given a constant DC current source?
Here's my circuit:
simulate this circuit – Schematic created using CircuitLab
After doing some series and parallel inductor combining I get the value $$L_{eq}=20.8 mH$$
My question is, how would you go about getting the energy stored in any one of the inductors, given the information in this post (no initial conditions or functions of t for the source current)
Here are some fundamental equations:
$$W_L(t)={1\over2}Li^2_L(t)\;\;\;\;\;\;\;V_L(t)=L{{di_L(t)\over dt}}\;\;\;\;\;\;I_L(t)={1\over L}{\int^t_{t_0}V_L(t)dt+I_L(t_0)}$$
If I try to find the voltage using my equivalent inductance, then I will get zero since the derivative of a constant is zero, thus my energy anywhere will be zero.
I'm just curious to see if this is possible, thanks!
AI: After doing some series and parallel inductor combining I get the value
Leq=20.8mH
You have miscalculated. All the inductors except L1 and L2 are shorted out, so the equivalent inductance is 16 mH.
how would you go about getting the energy stored in any one of the inductors, given the information in this post (no initial conditions or functions of t for the source current)
You can use the well-known formula
$$E = \frac{1}{2}LI^2$$
Since you have an ideal current source, there's no need to worry about the history of how the current reached this state; you know the current through each of the non-shorted inductors is 10 A.
So the energy stored in the 6 mH inductor is 0.3 J, and the energy stored in the 10 mH inductor is 0.5 J.
Now, in the absolute ideal of circuit theory, if these are perfect ideal inductors, it's possible for any amount of current to be circulating through the other (shorted out) inductors without affecting L1, L2, or the current source, and thus any amount of energy might be stored in them. You don't have any information to find out how much this energy is.
But really in circuit theory when we say we have an ideal inductor with "zero" resistance, we actually mean the resistance is too low to significantly affect any time constants or dynamic behavior in our circuit. But we know there is actually a non-zero resistance and so if this circuit is left to run for any appreciable amount of time, the small parasitic resistances of the inductors will absorb any energy in the shorted inductors, and they will have 0 current flowing.
On the other hand if this circuit was obtained by considering what happens when a switch is closed at some time \$t_0\$, you might be expected to use the configuration of the switch prior to the switch closing to determine the current through some of the shorted inductors. |
H: Why does this microswitch datasheet specify a minimum load current?
The Omron VX series datasheet mentions on page 6 that "Using a model for ordinary loads to open or close the contact of a micro load circuit may result in faulty contact.", and shows that their micro load models even still require a minimum of 1mA @ 5V. Their D3V datasheet goes further and explicitly marks the low end as being an "inoperable range". But neither datasheet explains why a microswitch would have a problem with a low load condition. Why is this, and what would happen if a microswitch was operated at loads lower than the minimum operating range?
AI: The switch is available in Gold (Au) and Silver (Ag) alloy.
Gold allows switching of low voltage and current signals, such as measurements.
Silver allows switching of high voltage and current, such as power and coils.
This difference is because the contact material degrades over time and per switching action, and a low voltage might not be able to get any current though the high resistance oxidation layer on the contacts.
This why gold plated contacts exist. (Au)
However, high current arcing destroys the gold plating, which is why Silver Nickel + Gold plating exist (AgNi + Au) to get the best of both.
When using low current, the gold remains intact, but when switching high current the gold is destroyed and the properties of a Silver Nickel contact apply.
See also the Fundamentals of Relay Technology. |
H: What is the use of series resistor in VBAT line of CAN transceiver?
In the application diagram CAN Transceiver TJA1043 (Page – 19), there is a series resistor in the VBAT line.
What is the use of this resistor? How to select the value for this resistor?
AI: It forms a filter with the capacitor right next to it, making sure that any noise on the Vbat line does not get inside the chip and out again through the signal lines that Vbat is used for (INH and WAKE).
Since Vbat is not used (AFAIK) for power, the resistor sees low current.
You should use an RC couple such as the cutoff frequency is well below the potentially problematic frequencies of your circuit (Power supply, microcontroller clock, CAN bus, etc.) |
H: At both posedge and negedge in Verilog?
In Verilog, I can use an always block and make it trigger on a positive or negative edge.
Is it possible to trigger the block on both the positive and negative edge, and thus have it basically clocked at twice the rate?
If so, does it incur a resource penalty? Does the compiler need to duplicate the circuit, and generate one that triggers on the positive edge, and one that triggers on the negative?
AI: You can in simulation but the construct can not be synthesized.
For double edge clocking you need to build a circuit yourself from individual rising and falling edge FF's.
Does the compiler need to duplicate the circuit,
No, there is no (at last not yet) automatic conversion to hardware for a double edge clocked construct.
...So I could duplicate the construct manually, and have things running at double speed?
No, if it would be that easy everybody would do it.
The maximum operating frequency of a synchronous circuit is determined by the time it takes for a signal to leave a register, transfers through the logic and then still meet the set-up time of the next register.
If you use the rising and falling clock edge that time has just halved and the amount of logic you can use between registers also halves. The total circuit will not run faster.
Another a pitfall: it halves only if your clock has a perfect 50/50 duty cycle. Which is difficult to achieve so logic designers prefer to use one clock edge only. |
H: How can I find out which resistor is short-circuited and can be ignored?
I don't understand how the current flows in the circuit below. How do I deal with the wire between nodes c and a, a and b, g and d. Why is the 5 Ω resistor shorted out? I am having a little trouble understanding what results from short circuiting.
AI: I believe that you're mistaken about "nodes a, b and c" and how you deal with the wires between them. They are actually all the same node because they are connected by a wire, and so they also have the same voltage.
This is how you should name your nodes: |
H: Mos amplifier numerical
Can anyone please explain how do I get this variation of Ix vs Vx curve?How do I determine whether the current will be in positive region or negetive?
AI: Using KCL in the output node, you find that
$$I_X = i_{DS1} - i_{DS2}$$
(I'm using positive quantities for the PMOS here).
You can see that the current is negative if \$i_{DS1} < i_{DS2}\$. Otherwise, the current is positive. When is this the case?
For small \$V_X\$, M1 will not conduct a lot of current because of the small \$v_{DS}\$ applied. If \$V_X < v_{GS1} - V_{TH1}\$ then M1 is in the triode region.
For large \$V_X\$ we have the same situation for M2. It is in the triode region.
If \$V_{DD}\$ is large enough for one or both of the transistors to go into saturation, then the situation can change a little bit.
M1 in saturation, M2 in triode
M1 will behave like a current source, while M2 can be better approximated by a resistor. So the slope will be somewhat linear, but M1 will add a relatively constant current to \$I_X\$.
M1 in triode, M1 in saturation
The situation is identical, but the slope will be somewhat linear while M2 will subtract a constant current.
M1 and M2 are both in saturation
Both transistors act more or less like a current source, so the net current \$I_X\$ will be pretty much constant. However, because both transistor currents are slightly dependent on \$v_{DS}\$ (ie. output impedance), \$I_X\$ will not be perfectly constant. |
H: Replacing a capacitor
I have an electronic device that I have had for a good few years meaning that it's no longer in warranty. Recently it has developed a fault where the device will turn itself off when more power is being used. After looking online, I found that the cause was more likely a failing capicitor.
My question is what exactly do I look at when replacing a capacitor? When looking at the spec sheet of the original capicitor (https://www.maxcap.com.my/ht.html ) there are plenty of options. (The one I need to replace is rated 35V @ 47µF)
Would I be right to assume that I need to try and match it like for like? E.g, same voltage, working temprature, load life, capacitance?
I can't seem to find the original capacitor being sold online on RS Components or Farnell. I'd appreciate any advice on which capacitor(s) I can use to replace it and why (if it's not like for like).
AI: The capacitor in your datasheet is a low-leakage type with 0.002CV leakage maximum. That's about 10:1 or 20:1 less than typical electrolytic caps, and really is a red flag to my eyes that this is a coupling capacitor and not some kind of power supply part. The other oddball spec is the 125°C rating, which is either specified because the part is exposed to high temperatures or to get a long life (in theory, anyway since life is supposed to double for every 10°C below rated).
Of course we can't tell from the part datasheet whether low leakage is an actual requirement, but it would be prudent to try to find a low leakage part. Nichicon has a good range of such parts.
For example, check out UKL1H470MPDANA, UKL1J470MPD1AA, UKL1V470MPDANA, UKL1V470KPDANA etc. Unfortunately, none of those parts has a higher rating than 105°C. So you may have to make a judgment as to whether life or high temperature operation is actually a requirement unless you can find one that is same or better in all specifications.
Other than that, it has to physically fit, have the same capacitance, same or better tolerance and same or higher voltage rating. ESR should be similar or less. |
H: Arduino and USB, how it works?
After purchasing an Arduino board (UNO) I decided not to use Arduino IDE as it lacked some features and all libraries are written in C++. I am coding with C. One thing that I really do miss is a serial interface that allowed my Arduino to talk to PC it is connected to.
So far I am familiar with SPI protocol, and thought to use USB-SPI converter chips, but since I already have USB implemented on the board I decided to seek information about how it is done and what USB consist of.
So far I found that it is UART that talks to a chip on Arduino board, and that chip is responsible for communication with PC.
But can somebody explain to me what actually happens on that board? And point me in the right direction please.
AI: On "ordinary" Arduino boards like the Uno, the AVR microcontroller's serial UART is used to communicate with a PC.
Because modern PC's no longer tend to have serial ports, the 9-pin serial connector and level translators found on the earliest Arduino boards have long since been replaced with an on-board USB<>Serial bridge chip. Originally this was an FT232R, but from the Uno it has been a different Atmel MCU such as the ATmega8u2 or 16u2 running a firmware which provides similar functionality.
Essentially, the Arduino's main processor needs to have its hardware UART configured to output debug messages or program data at a chosen baud rate, using logic level asynchronous serial signaling. If the USB port is connected to a computer running appropriate CDC ACM drivers, the USB bridge chip will be commanded to batch the data received and forward it to the host computer, where it can be claimed from serial APIs just as if it came from a traditional serial port.
To communicate in the other direction, a program on the PC sends data through serial APIs, this is batched into USB packets and sent to the bridge chip, which turns it into asynchronous serial data and sends it to the main MCU. A program running on the Arduino itself would need to be written to collect this data form the UART, typically using interrupts (or optionally frequent polling) and then interpret it.
The bootloader used on the Arduino performs both of these operations on its own behalf while running - briefly after each reset, longer if it sees traffic related to a bootloader. But that capability is irrelevant to the main program (aka "sketch") which must re-implement the logic to interact with the UART itself. Worth noting that you can use the Arduino bootloader without using the IDE or writing Arduino-style programs.
If you look around online, you'll probably find many code examples for using the ATmega UART in a C program, vs. a C++ or Arduino one.
Some other Arduino boards work differently; for example the Leonardo uses an ATmega32u4 chip as its main processor, which can directly speak USB. In that case there is no extra bridge needed. But instead of simple UART configuration, the program on the main MCU must now include much more complex logic for dealing with the USB hardware itself, including interrupts that must run fairly frequently. This is much harder to implement in a from-scratch project, though it does mean a lower parts count and a little more flexibility since the USB port can be used for purposes beyond channeling a virtual serial stream. |
H: Signal Strength to ADC quantisation levels
According to the excellent site of AB4OJ, the Icom 7300 in summary has a 14bit analogue to digital converter with a 1.5 volt peak to peak input (LTC2208-14). I make this to be 91.5uV per quantisation level. There is a 20db gain amplifier (LTC6401-20) ahead of the ADC so best case this would give 9.1uV per quantisation level.
Wikipedia gives for HF a S5 signal to be 3.2uV (rms relative to 50R). Equivalently this is 9.1uV peak to peak, resulting at best in a S5 signal at most only changing the Least Significant Bit of the ADC. Not much can be hoped to demodulate from this surely?
By the same logic, S9 would only move between 15 levels. Again how much can be demodulated from this strong signal?
As the 7300 works very well, clearly I am missing something but I
don’t know what. Can anyone fill me in?
AI: You are missing that a correctly dithered quantiser is LINEAR, and that there is more then enough uncorrelated noise in the ADC input bandwidth to correctly dither the quantiser.
You are not digitising just the signal you care about, you are digitising a whole bands worth of mostly uncorrelated stuff, and then reducing the bandwidth in the digital domain. The bandwidth reduction strips off noise outside the range of interest, but that noise includes quantisation noise.
Every time you halve the bandwidth you gain 3dB on the signal to (total) noise ratio, so that every time you drop the bandwidth by a factor of 4 you gain an effective extra bit.
If the ADC is running at say 125MHz and you are downconverting to an 8KHz sample rate for the baseband processing then that gains you an effective 8 bits of extra meaningful word length if you do it right, putting the noise floor at about 20 bits or so (The number you want for the ADC is the ENOB, not the output word length).
If the thing basically follows the HPSDR architecture there is probably also a 1:2 (voltage ratio) transformer feeding the preamp, so another 3dB on the voltage there (But obviously no power gain). |
H: Simple way to create a disturbance on DC power
First of all, i must say that I am a software engineer, with very-low to no experience in circuits designs, and a very rudimentary understanding of electrical engineering and circuits. 101 really.
For a software project I am playing with I have built a small physical gauge simulator using some ready-made cheap 7-LED and old needle voltage and amp gauges.
They are all powered from a standard DC 24v 3A power supply and I am using a potentiiometer to make the values change manually when i need to change them.
My challenge is the following :
Is there a simple way, without special components / devices (NOR MCU arduino/pi to make the gauges "jump" automatically and basically mimic the operation of me fiddling with thee potentiate ? Basically some kind of a DC oscillator - but random jumps are ok.
I do not have an the option (time-wise) to buy special components but I do have a lot of standard ones, ranging from capacitors, to resistors, DC power converters, diodes, LED's, Fuses, transistors (PNP,NPN, mosfet), coils, magnets photoresistors, humidity sensors etc.
On the device level I have some low-voltage motors, steppers and solenoids.
There is a bit of everything in the very-basic range of stuff.
Is there a simple circuit that can help me achieve this "jump" in the power without any code ? ( funny question for a coder - I know. but there IS a logic behind the project :- )
EDIT I :
Here is a picture for better understanding .
EDIT II :
I ended up using a combination of 2 solutions :
A - I took a solenoid that was producing heat and connected it to a relay via and NTC ( PTC would work the same I assume ). The NTC got heaat from the solenoid and functioned like a "gate" for the relay, which also started a small fan to cool the solenoid again. The solenoid operation also made the amp jumps .
B - I Friend brought me an ne555 which I connected to relay. ( but that's an oscillator - which was a few days later )
Although these primitive methods work, I would still like to hear other advice on how to achieve that in some other way .
AI: To me, the simplest option would be a simple 2-transistor oscillator, as illustrated in this answer.
Choose resistor and capacitor values that give a sufficiently slow oscillation. |
H: 12V Relay Actuation Depending on PWM or Constant DCV Input
I am looking to actuate a 12V SPDT relay depending on weather or not a 12V PWM signal is received or not. Headlamps use a reduced power PWM signal for daytime running lamps. I want to be able to detect that signal separate from a 12VDC source (normal headlamp operation) and actuate a relay based on it to relocate that daytime running lamp to another location. I am an ME by trait but have limited experiences with circuits.
I have been able to use a simple RC circuit to turn that PWM into a lower constant voltage. Trouble is, I don't know how to compare the full 12V and the reduced voltage and also still carry enough amperage to control a relay coil.
Looking for something as simple as possible. Some have suggested using a using a 555 as a retrig monostable missing pulse detector or an RC circuit with a comparator. I don't know if either of these would work or how to specifically design them. Any help would be greatly appreciated!
AI: I'd recommend breaking your design into two stages:
1 - Detect the state of your PWM signal,
2 - Drive your relay coil accordingly
For the first stage, I'd recommend an op-amp comparator to determine the state of the PWM signal. Converting the PWM signal to a DC level is a good start towards accomplishing this. Basically, you want your comparator to give a 'high' output if the PWM signal is above some threshold, or a 'low' state if it's below the threshold. You can set the threshold voltage using a simple 2-resistor voltage divider from your 12V supply.
For the second stage, I'd recommend an N-type FET to serve as a low-side switch for the relay coil. When the output of the comparator goes 'high', the NFET conducts, and current flows through the relay coil to activate it. When the comparator goes 'low', the NFET stops conducting, and the relay is deactivated. |
H: I have an idea/invention and look for a real investor/industry to take it to the next level?
I checked many online resources/websites and all of them asked me to pay thousands of dollars to make it real! I couldn't find any one that says you don't have to pay and we will take it from here once we hear about your invention and decide that we like it!!!
Do you know/heard of any reliable willing investors or industries that welcome new inventions or ideas within the electronics field?
Thanks
AI: That's because ideas are ten a pennny, and real engineering is extremely expensive once you have to pay professional engineers and contract manufacturers. If you can, produce a working prototype of your invention, then look for a venture capital company. You also need a NDA form for them to sign, plus a detailed business case for the invention. Just getting the paperwork together is probably going to take you a few weeks of effort. |
H: Questions related to the calibration of a VNA?
I am seeking answers to these two questions related to the calibration of the VNA.
(1) What type of VNA calibration is required to measure the reflection, transmission, and phase of an attenuator?
[My Answer] Full two-port calibration, that is, TOSM type utilizing a calibration kit: "through", "Open", "Short", and "Match". Am I thinking right?
(2) Now instead of an attenuator, I have a termination. Then, what type of calibration would I need to measure reflection and phase?
[My Answer] one-port calibration, like, OSM type utilizing a calibration kit: "Open", "Short", and "Match". Am I thinking right?
Thank you in advance.
AI: Yes, you are right. You need T (through) when you want to know transmission/scattering parameter S12. This is independent of „phase“, because VNA will give you Sxy scattering parameters which include phase information. |
H: LED light bulbs in low atmospheric pressure
I have these (https://www.amazon.co.uk/gp/product/B01DBOKZVK/ref=oh_aui_detailpage_o09_s00?ie=UTF8&psc=1) LED lightbulbs. Can I use them in a pressure of ~30kPa (21" Hg vacuum)?
AI: Yes. The plastic outer globes are not sealed. |
H: Reduce battery voltage.
I have grip warmers on a bike. basically just heat tape. I would like to reduce the supply voltage from lithium battery from 18 vdc to 12 vdc. My goal is to reduce warmer element temperature and increase battery life. What is the simplest way to do this? thanks!
AI: A resistor dropping 18 down to 12V wastes \$1\over3\$ of the energy.
A DC-DC buck converter can be about 90 percent efficient, but the cheap ones typically get about 85% - wasting about \$ 1\over 6\$, but PWM can improve on that by removing the inductor and capacitor losses inherent in DC-DC converters.
Look for a PWM dimmer module that meets your requirements or build one from one of the many designs available on-line.
for heating applications a lower modulation speed can be used than is used for lighting, but lighting modules are more common.
If you don't need that last fraction of the available energy you can just go with a cheap DC-DC converter, the cheap XL4015 modules run well at up-to 2A and the good ones will go higher. |
H: Analog logic circuit with adjustable threshold
I have a logic circuit currently consisting a few few AND gates and it's working fine (simulating) with if i use logic levels as the inputs. However my input levels might change in amplitude and I'd like to be able to control the logic threshold with something else (like and DAC or something). What would be the simplest way to do this?
if it helps, my inputs are very short pulses, that should have the same amplitude, although the amplitude may very from time to time.
AI: Bring your input signals into suitably fast comparators. Run each input signal to the '+' input of a comparator, and run a reference voltage from a DAC output (or a good old fashioned potentiometer with a knob) to the '-' inputs of all the comparators. |
H: Parametric Equalizer with State Variable Filter
I'm new to this forum but hope to get some answers to a project I'm working on.
I'm trying to build an parametric equalizer with several bands (5 Bass-Bands, 3 Middle-Bands, 3 High-Bands). In the first picture below you can see the Middle-Band. I use a state variable filter design. It's based on the Urei 545 parametric equalizer.
I would like to connect all the bands parallel to each other. I tried but in the simulation I get a loss of cut and boost, almost 5dB. Is this the right way to connect those two filters parallel together (see second picture)? Why do I loose the cut and boost? Thanks in advance for your help.
And in general I think my impedance level is to high. I think I need to lower the values of the resistors in order to reduce noise, is that right?
Thanks for your help.
Ian
Here I'm connecting the two middle-bands parallel.
AI: Parallel circuits are loads to each other. Such attempt should be based on math, not on guessing.
If you want to continue on the experimental route, at least have a proper summing amp for the parallel output signals. Otherwise the outputs fight against each other. They are designed to see only an opamp input.
ADD: Fast transfer function calculations showed that your idea - altough realizable with proper summing, leads easily to stability problems without precise component values and math based design. You want a filter, not an oscillator. In addition the adjustments of the bands would surely interact, you want independent bands.
If you can understand the following formula Uout=-Uin(1+2(1-A)F)/(1-2AF) where F is the complex transfer function of a 3 opamp state variable section and A is a real number between 0 and 1 (=cut/boost position parameter) you should see that the denominator should not be zero. How do you can be sure of it? Answer: Only with math based design or by having some incredible luck.
See TimWescott's answer. He's right. Two band filtering is achieved by feeding the same signal through two cascaded filters. In decibels their effect is summed. The cascaded filters are designed to have 0dB gain when the frequency is not near the adjusted center freq.
BTW. Multiband graphic equalizers are not cascaded filters, but resemble a little your idea. Too many cascaded sections detoriate the signal useless due the non-idealty of opamps. I haven't seen multiband parametric EQs which are like those fixed band graphic equalizers (=have parallel circuits), only cascaded ones. |
H: Does this wiring pattern for a DB9 cable exist as a standard cable?
I have a scientific instrument that uses a DB9 cable to connect to the standard RS232 port on a computer for communication. I've deconstructed one of the cables as I needed to make another one but I am wondering if this wiring pattern is a standard wiring variation seen with DB9 cables or if it is completely proprietary. I don't want to have to make these cables if I don't have to.
AI: That is a standard null modem cable with handshake also known as crossover.
It is used to connect two DCE devices or two DTE devices together.
DCE (data circuit-terminating equipment) .... example: modem
DTE (data terminal equipment) .................... example: computer
TXD - transmit data
RXD - receive data
RTS - request to send
CTS - clear to send
DTR - data terminal ready
DSR - data set ready |
H: Q: MOSFET not providing correct supply voltage
I dont work much with mosfets so I dont really know how to go about this.
simulate this circuit – Schematic created using CircuitLab
So pretty much I have the circuit above, What's happening is that the Source of the mosfet is outputing around 3.3V and not close to 5V. I understand there will be resistance as RDS(on) however its 0.200ohms. Shouldn't make it 3.3V.
EDIT:
simulate this circuit
So I tried this configuration, what happens now is that:
I am still not getting ~5V at the Drain
The mosfet gets real hot
Now the gate voltage is not even 5V, but once I take out the mosfet, 5V returns back at the output of the comparator.
AI: In order to turn on fully, the gate to source voltage as to be above some threshold. When you have an enhancement-mode MOSFET wired as a source follower (like that one), the source will have to be below the gate.
You could get the effect that I think you want by using a P-channel FET and reversing the sense of the MCP6548. |
H: What are these low voltage connectors?
Can anyone help me identify the kind of connectors in the pics below? Both the male and the female version. In case it helps, these are used in an LED fixture, to connect the (DC) output of the LED driver to the LEDs themselves. They are relatively small, roughly 15mm by 5mm by 2mm.
AI: Molex econolatch connectors. See part number molex 1501781020 for the 2 pin female. |
H: What is optocoupler and how it is used?
Im curious about optocoupler.
What is optocoupler,why and how it is used in electronic circuits ?
AI: an optocoupler is a device used when you want to electrically isolate a circuit from another circuit that you want to send an electric signal
when you turn on the led it sends photons to the phototransistor, these phototransistor which is like a normal transistor but its "base current" is the light emitted by the led, in this way you can use it as an isolated switch between two circuits
using an optocoupler to control a 12v load with a 3v3 signal |
H: What is this small unconnected solder blob on this PCB?
There's a small solder blob in the middle of this one-sided PCB (a switch-mode power supply), surrounded by unmasked board. The blob is 1.5mm in diameter, and the non-masked area is 4mm in diameter. There's nothing on the other side of the board, and there is no hole.
What's the purpose of this blob? My guess is some kind of manufacturing artifact, but I'm not sure exactly.
AI: It's most likely a type of fiducial marker, used by a pick-and-place machine to correctly place the SMD parts on the copper side of the board. |
H: What does [WEAK] mean in STM32 startup assembly code?
I was reading the STM32F407 startup file in Keil software to gather some information. I faced this problem: What is the [WEAK] symbol used for?
A part of the code that this symbol has been used in is:
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
END
AI: It says the implementation of the function should be weakly linked (as opposed to strongly linked, which is the usual).
This allows providing a "fallback" implementation of a function, in case no other (strongly linked) is found.
This is often used for default interrupt handlers in bare-metal MCU frameworks. This way, when you implement an interrupt, you just have to write your function, without having to remove the default one from the sources, and the linker does the job.
See https://en.wikipedia.org/wiki/Weak_symbol |
H: In what way VBW and trace averaging are different in spectrum analyzer?
We know both VBW and trace averaging intends to smooth the fluctuations of a spectrum.
But how do they differ from each other?
AI: Without getting into DSP and filter theory:
Video bandwidth works by 'smoothing' based on frequency points at higher and lower frequencies within the same sweep - It limits how 'sharp' peaks can be.
Trace averaging works by averaging a frequency point with previous versions of the same frequency point from different sweeps. This means it doesn't care about the samples at other frequencies, but you need more than one sweep to be able to do it. |
H: Instantaneous power consumption value
If, for a large motor, you are given cumulative kWh values at 5-minute increments, how would you determine an instantaneous power consumption value?
AI: You can determine average power consumption (kW) because it is kWh divided by hours.
Instantaneous power varies wih the cyclic nature of the voltage (v) and current (i) waveforms and, the instantaneous product of v and i is "averaged" in order to determine average power from which kWh is derived.
Note also that for many AC systems, the phase angle between v and i is important to consider: -
But, you can't assume the load is purely linear and, because of this, the instantaneous power may be very much higher in certain places than the average power value would imply. |
H: If we have four grounded nodes in a circuit, can we connect two of them together and forget that those two were grounds?
Refer to the image attached. I personally think the answer is no because it is not necessary for the currents through both the grounded capacitors to be the same in the upper circuit, but that is not the case for the bottom one.
AI: I personally think the answer is no (...)
What you are thinking is correct. In order to have an equivalent circuit, you will need to connect all ground nodes together. Just 2 out of 4 will not work because you are changing Kirchoff's Current Law in the ground node, and so influencing the solution of the circuit.
Only if you know that it won't influence Kirchoff's Current Law, you can remove the ground reference. For example:
simulate this circuit – Schematic created using CircuitLab
Due to symmetry reasons, you can already see by inspection that the middle voltage is always 0V, so the GND-connection is not really necessary.
But it is not a general property. |
H: Can an electrical wiring system carry enough current to create an EMP?
I'm writing a spy story of sorts and I demand realism in my writing. In one of the chapters an agent, working with remote hacking assistance, enters a datacenter to steal digital certificates. When armed police arrive to storm the place and enter the building the remote hackers hack external electrical systems supplying the datacenter with power and send a surge of electrical energy through the datacenter's electrical wiring, creating an EMP throughout the datacenter which knocks out the police's electronic equipment. I was just wondering if this is realistic.
Questions...
Could the average datacenter's electrical wiring carry enough current to create an EMP?
Would circuit breakers or fuses preclude the surge's EMP effects?
Would the electrical power surge damage the electrical wiring and electronic devices commonly found in an average datacenter?
AI: Interesting concept. I don't know how familiar you are with electrical engineering, so forgive me for perhaps being too simplified. I have been told (anecdotal) that modern systems are much more resilient against actual EMPs because of the smaller sizes internally.
I would imagine that the average datacenter has extensive surge protection (to survive things like lightning).
In addition, I would imagine that Police forces have gear that is resilient against such attacks, precisely to avoid being vulnerable to this type of attack.
Now as to your questions:
Could the average datacenter electrical wiring carry enough current to create an EMP?
The current carrying capacity is not what matters here. In order to generate an EMP, you need to be able to create a sudden surge/pulse of massive size. Every circuit has a certain inductance - the inductance is a measure of how much a circuit resists sudden changes in current. This inductance is what could prevent this from working.
Would circuit breakers or fuses preclude the surge's EMP effects?
A datacenter would have surge arrestors to prevent surges damaging their equipment. They do this to protect against sudden spikes in the network due to faults, lighting, etc.
Would the electrical power surge damage the electrical wiring and electronic devices commonly found in an average datacenter?
Without protection, indeed they would be damaged. However, as already mentioned, datacenters have to be able to take direct lightning strikes without issue. If they can take that without being absolutely destroyed, I doubt anything short of a nuclear EMP would be able to damage them. Same holds for the police equipment - their stuff should be able to handle such surges as they would have to function after an attack or disaster that causes an EMP. |
H: 16 bit DAC microcontroller
I'm currently working on a audio project where I need to play a 16 bit depth signal with a speaker.
Right now I'm using an atmega328 for prototyping, two 8 bit shift registers (controlled by the MCU) and an R-2R DAC (and an LM386).
Given that the setup is not so simple, I was wondering if an MCU with a 16 bit DAC exists. Searching on Google, 12 bit is the maximum DAC resolution that I can find for an MCU so far.
So my question is: does such a device exist? Or is there a simpler alternative?
Thanks
AI: It's possible that what you want is made, but most DACs you will find built into an MCU would not have more than 12-bit resolution.
In fact simple static DACs of 16 bit resolution are not all the commonly built or used, and are unnecessary for audio. Instead, more complex technique such as Sigma Delta modulation are typically used.
The classic solution of your problem would be an MCU with an I2S interface (or generic synchronous serial implementation able to interoperate with I2S) feeding an external sigma delta audio DAC. Many the STM32 series (and likely other lines as well) have such an interface, and its typically something you can select for when using a distributor's online catalog matrix tool. You may also want to consider making sure you can find code examples for a chip which are adaptable to your need, as figuring out how to operate a peripheral (especially one you would probably want to feed via DMA) from scratch can be a bit of a project.
If your needs are not particularly strict, you might also simply be able to use a PWM output from an MCU timer and an analog lowpass filter.
And yes, there are some parts with 12-bit DACs that you might be able to time modulate to squeeze out another bit or two.
Something you will discover is that it is by no means trivial to design the power and surrounding circuitry in a way that is quiet and linear enough for the limitations of a 16-bit representation to become apparent - it can be done, but a first attempt is unlikely to result in that performance.
A request to identify specific chips would be an off-topic "shopping question" not permitted here. |
H: Step-up (boost) voltage regulator
I recently purchased a step-up converter, the specifications state that it can boost 5 V to 30 V with varying input voltages.
The reason I purchased it was because the charger for my handheld vacuum cleaner stopped working, and the charger has very specific specifications that are hard to replace: 27 VDC 85 mA.
I'm currently using 12 VDC 1000 mA as an input and stepping it up to 27 V, my question is is this safe, and will it work correctly?
TLDR: I have a step-up voltage converter/regulator that works within 5-30 V, I have a 12 VDC 1000 mA power supply that I want to step-up (boost) to 27 VDC 85 mA and I'm wondering if it will work correctly.
PS: I have a higher current 12 VDC power supplies at 2000 mA, and one have a 19 VDC 2000 mA also. Would they be better to use instead?
PS2: This is the one I purchased: https://www.amazon.de/gp/product/B075SXMXN9/ref=oh_aui_detailpage_o01_s00?ie=UTF8&psc=1
AI: Will it work correctly?
Maybe. There's three parts to your question.
Will the approach work? -- Maybe, maybe not. There's a possibility that they designed that wall-wart to feed straight into the battery pack with no other management. This scheme would work if the thing has NiCd or lead-acid batteries.
Are the parts you've selected of sufficient quality? -- Maybe, maybe not. I'm going to put aside my prejudices against no-name boost converters bought off the Internet for this one.
Assuming that the answers to 1 and 2 are "yes", here goes:
The way you do these calculations with switching regulators (like your step-up converter) is to remember that power out = power in - losses. It's safe to assume that even a crappy no-name eBay special converter will be 80% efficient (although there's always surprises out there). If you do the math, this works out to power in = power out / efficiency.
So, you need 27V @ 85mA, which works out to something a bit over 2W, certainly less than 2.5 (I'm doing the arithmetic in my head -- feel free to check my work). You have a power brick that'll do 12V @ 1000mA, or 12W. Even given my in-the-head calculations, you're fine.
Is it safe?
Probably -- see my prejudices against no-name Internet purchases. There's a slight possibility (especially if the thing's got a really lame charging system that just goes straight from the wall-wart to the batteries) that you'll toast the batteries. However, this would Simply Not Be Done with LiPo cells, and NiCd, NiMH or lead-acid cells won't burst into flame -- they'll just quietly die. |
H: Error (10028): Can't resolve multiple constant drivers for net "rf[7][XX]" at registerfile8x32.v
Hello Im making a register file 8x32 in verilog, the sim looks good but when I compile on quartus it makes
Error (10028): Can't resolve multiple constant drivers for net "rf[7][31]" at registerfile8x32.v(21)
Error (10029): Constant driver at registerfile8x32.v(32)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][30]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][29]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][28]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][27]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][26]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][25]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][24]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][23]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][22]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][21]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][20]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][19]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][18]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][17]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][16]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][15]" at registerfile8x32.v(21)
Error (10028): Can't resolve multiple constant drivers for net "rf[7][14]" at registerfile8x32.v(21)
Error: Can't elaborate top-level user hierarchy
Error: Quartus II Analysis & Synthesis was unsuccessful. 21 errors, 4 warnings
Error: Peak virtual memory: 300 megabytes
Error: Processing ended: Sat Oct 27 19:20:08 2018
Error: Elapsed time: 00:00:01
Error: Total CPU time (on all processors): 00:00:01
Error: Quartus II Full Compilation was unsuccessful. 23 errors, 4 warnings
// Defino todos los parametros, entradas, salidas, regs,etc.
module registerfile8x32(addrsrc1_i,addrsrc2_i,addrdest_i,dest_i,
src1_o,src2_o,clk_i,rst_n_i,wr_i);
input [2:0] addrsrc1_i;
input [2:0] addrsrc2_i;
input [2:0] addrdest_i;
input [31:0] dest_i;
input clk_i,rst_n_i,wr_i;
output [31:0]src1_o;
output [31:0]src2_o;
reg [31:0] rf[7:0];
reg [31:0]src1_o;
reg [31:0]src2_o;
integer i; //Necesito este iterador para el bucle for, con el que lleno todos los reg de 0s.
// Esta parte de codigo es ASINCRONA, lo primero que miro es el reset, si esta a 0 reseteo todos
// los registros.
always@(negedge rst_n_i)
begin
if (rst_n_i == 0) // Miro si el reset esta a 0
begin
for(i=0; i<8; i=i+1) // Si lo está, lleno los registros de 0s.
rf[i]<= 32'b0;
end
end
// Positive edge clock y write enable.
// Esta parte del codigo es nuestra parte SINCRONA, con el reloj y el write enable.
always@(posedge clk_i or wr_i)
begin
if (wr_i) // Si write enable esta a 1
begin
rf[addrdest_i] <= dest_i; // Escribo en el registro de destino.
end
else if (!wr_i) // Si WE no esta activo, el registo mantiene el valor que ya tenia.
begin
rf[addrdest_i] <= rf[addrdest_i];
end
end
// Esta parte del codigo vuelve a ser ASINCRONA mira las direcciones de lectura
always@(addrsrc2_i or addrsrc1_i)
begin
src1_o <= rf[addrsrc1_i];
src2_o <= rf[addrsrc2_i];
end
endmodule
AI: You can't make assignments to a signal (such as rf[]) in more than one always block. |
H: Why do I Have 800 pixels in PAL video line
I have a DCMI peripheral (STM32H7) that receives video data from TVP5150 with discrete VSYNC/HSYNC.
I have 306 (it should be 305, but there is a chance that this is because of the way I count number of interrupts) active video full line interrupts in one frame, with one line duration of 64 us.
It's all sounds good but it's seems that I have 800 Y values received during one line (monochrome video).
That's seems odd to me, Is there any explanation why it is that way?
AI: That's what you get when you capture everything except for the HSYNC pulse itself using a standard 13.5 MHz sample rate — back porch (5.7 µs = 77 pixels) + active video (700 pixels) + front porch (1.65 µs = 23 pixels) = 800 pixels total.
The HSYNC pulse is 4.7 µs = 64 pixels, giving you the total of 864 pixels for the line period. |
H: Uses for 49.9Ω resistors?
It seems that both 49.9Ω and 50Ω resistors are a thing:
https://www.mouser.co.uk/Passive-Components/Resistors//N-5g9n?P=1z0wnltZ1z0wljo
https://www.mouser.co.uk/Passive-Components/Resistors//N-5g9n?P=1z0wljoZ1z0x8f8
Given that they're typically 1% tolerance, why have both? In particular, why even bother with 49.9Ω?
AI: If you need a 1% resistor, \$50\Omega\$ resistors are not a standard 1% value. The nearest standard 1% value is \$49.9\Omega\$. See http://www.rfcafe.com/references/electrical/resistor-values.htm for standard values and some explanation of how they're derived.
The equation for standard 1% resistors is: $$ R = 10^{d + \frac{i}{96}}$$ where \$d\$ is the (integer) decade number, \$1 <= d < 6\$, and \$0 <= i < 96\$.
It's the same for other precisions, except that instead of 96 for 1%, we use 48 for 2%, 24 for 5% and 12 for 10%. |
H: Can power transformers be used with higher voltages?
I purchased a Japanese transformer for a project I’m doing. It runs on 100VAC, not 120V, something I overlooked. Doing a quick search, Japan seems to use both 50/60Hz, based on the region.
It’s 30 years old and there’s no information about frequencies on it. I haven’t plugged it into anything yet.
How exactly will it respond to 120V? Here are some possible outcomes I’ve thought of with my limited knowledge.
It will initially work for a few minutes/seconds, then it will get fried and become useless
The output voltages/current will become stronger
Nothing will happen, and then it will get fried and become useless
Here’s a part of the schematic I’m using it for. It’s supposed to output +15V, -15V, and +5V.
AI: It seems that the device was intended to run on two nominal voltages. It can be clearly seen that primary transformer has two taps: connecting terminals 11 and 12. I suggest you to remove the bridge between 13 and 12 and make a new connection to 13-11.
Then you connect to the mains and measure the AC voltage between 14 and 12. If it's nearly 100VAC, then you're done.
You can do also in opposite way. Disconnect the electronics part, connect the mains supply as is from schematics with a bridge 13-12, 14-15. You would get a step-up voltage between 14-11. If the tap at position 12 is designed for 100VAC and tap 11 for 120VAC, now when tap 11 is supplied with 120VAC you should get 144VAC on tap 12. That would be a proof that connecting 120VAC on tap 12 makes no difference for secondary voltage.
As user Charles said, if the transformer is designed for 100VAC/50Hz and you connect to 120VAC/60Hz, the flux denisty is still nominal. But the secondary voltages are going to increase for 20%. |
H: VGA to composite circuit. Does it work?
I found a VGA to composite passive converter circuit online, and was wondering if it would work, if the VGA timings were modified to match the timing of composite.
Here is a relevant schematic:
AI: Yes, it works — at a very basic level. But no, it cannot adjust the signal timing, which must be correct to begin with.
All this circuit is doing is combining the five VGA signals (R, G, B, H and V) into a crude approximation of a monochrome RS-170 signal. The resistors at the top do a rough weighting of the three color channels to approximate how the eye responds to intensity, and the two resistors at the bottom add a combined sync signal to the mix.
It isn't great, but it should produce something usable on a reasonably forgiving display. It will not be in color, however. |
H: Output Impedance of Passive Circuit
I have a circuit with resistors, capacitors and inductances. I need to plot the output impedance of this circuit for different values of two components in this network. Do you know a program (either freeware or matlab) which I can use to do this?
Thanks in advance.
AI: You can write the closed form equation for Z using the (complex) numbers for impedance of R, C and L in MATLAB. Plot the complex impedance in whatever form is appropriate (perhaps magnitude and phase).
Then check by "cheating" and using LTspice. |
H: How to turn off 555 Timer for a period of time after Vout signal passes through
I have a single-shot 555 Timer. After triggering, output goes high for a period of time.
What I would like to do now: After Vout goes high and then low again, I want to disable the 555 timer for a period of 10 seconds. During this period, if trigeer signal is activated, it would not set Vouth high.
My theoretical idea is to delay a trig signal for a length of anticipated Vout (50ms-100ms). This delayed trig signal would go to Trig pin of another 555 Timer. This timer would generate Vout2 10s long. Then, I would add a MOSFET - Drain to Reset pin of first 555 Timer, Source to GND. Vout2 would be connected to gate, and on activation it would pull Reset of first 555 Timer to GND and disable the circuit for 10s.
Problem with circuit: How to delay trigger signal?
Other suggestions also welcomed.
Thanks.
Thanks!
AI: Use two 555 chips. The falling edge of the first one's output triggers the second one to hold the first one in reset for 10 seconds.
simulate this circuit – Schematic created using CircuitLab |
H: Hardware implementations for a low-cost ADC array project
I wonder what would be the best hardware platform or architecture for implementing and building a lowish-cost system to sample audio capture over a large array of microphones or sensors? say, 300 or 500 audio channels simultaneously, and be able to transmit the information either via USB or Ethernet
AI: There is no such thing as a "lowish cost system" when you are talking about data acquisition of 300 to 500 audio-bandwidth signals. This is out of scope for an Arduino or even a Beaglebone. You probably have to start looking into some serious hardware with an FPGA in it (e.g., a Zynq board).
For starters, data transfer bandwidth is an issue. At a minimum nyquist frequency for a <10KHz bandwidth signal you have 300 channels * 16 bits * 20000 S/s = 96Mb/s. That will require Gb ethernet and will saturate PC USB ports without a dedicated software driver (forget about the serial drivers used by Arduino boards, for example, I saturate those with just 2Mb/s).
Then, as you are considering a beam-forming application, you would have to seriously consider simultaneous sampling. That is, all of your ADC channels synchronized and sampling at the same time, otherwise you would need additional signal processing. That makes finding the proper ADCs and dividing the problem into multiple low-channel count modules more difficult (e.g., 10 BeagleBone boards at 30 channels each).
Next, is the data acquisition front-end and signal conditioning. You can find 8-channel simultaneously sampling ADCs with some specific signal conditioning relatively easily, but if you need to add conditioning circuitry to each individual channel you are talking about a lot of passives. Also, you would be hard-pressed to drive two of these ADCs out of a single simple serial port such as SPI, you would need faster interfaces and, very likely, multiple individual communication channels.
And last, but not least, comes the software to handle all those channels in real time. Modern-day PCs can do it, but they will struggle (forget about Matlab, Python or other similar languages, you need C#/C++/Swift or other languages that compile as close to bare metal as possible).
My advise, divide the problem into separate low-channel count modules (e.g., 16 to 64) that can be replicated easily. Design a controller board that can drive multiple modules at the same time. Use Ethernet, USB's master-slave architecture makes it problematic, Ethernet drivers are designed for speed. |
H: Circuit analysis for RC circuit
I have this circuit and want to calculate the voltage at v2 when t>0. v1 has a 6 volt step at t=0. I tried to do nodal analysis and came to 2 equations for the 2 unknown nodes, but did not know what to do from there. In order to solve this could I simply use v+(v0-v)*e^(-t/RC), with R being the two resistors in series?
AI: The schematic is:
simulate this circuit – Schematic created using CircuitLab
Before I get into the nodal analysis, it might help to know that the capacitor, \$C\$, will have a current in it that follows the equation: \$I_\text{C}=C\frac{\text{d}V_\text{C}}{\text{d}t}\$.
Using nodal analysis, outflowing currents on the left and inflowing currents on the right, I get these two simultaneous equations from the two unknown nodes, \$V_1\$ and \$V_2\$:
$$\begin{align*}
\frac{V_1}{R_1}+C\frac{\text{d}V_1}{\text{d}t}&=\frac{V_0}{R_1}+C\frac{\text{d}V_2}{\text{d}t}\\\\
\frac{V_2}{R_2}+C\frac{\text{d}V_2}{\text{d}t}&=C\frac{\text{d}V_1}{\text{d}t}
\end{align*}$$
It's very convenient at this point to define \$V_\text{C}=V_1-V_2\$. The following will show why. I'm placing the first equation on the left side and the second equation on the right side, as I develop them further here:
$$\begin{align*}
\frac{V_1}{R_1}+C\frac{\text{d}V_1}{\text{d}t}&=\frac{V_0}{R_1}+C\frac{\text{d}V_2}{\text{d}t}
\quad& \quad
\frac{V_2}{R_2}+C\frac{\text{d}V_2}{\text{d}t}&=C\frac{\text{d}V_1}{\text{d}t}\\\\
\frac{V_1}{R_1}+C\frac{\text{d}\left(V_1-V_2\right)}{\text{d}t}&=\frac{V_0}{R_1}
\quad& \quad \frac{V_2}{R_2}&=C\frac{\text{d}\left(V_1-V_2\right)}{\text{d}t}\\\\
\frac{V_1}{R_1}+C\frac{\text{d}V_\text{C}}{\text{d}t}&=\frac{V_0}{R_1}
\quad& \quad \frac{V_2}{R_2}&=C\frac{\text{d}V_\text{C}}{\text{d}t}\\\\
V_1+R_1 C\frac{\text{d}V_\text{C}}{\text{d}t}&=V_0
\quad& \quad V_2-R_2 C\frac{\text{d}V_\text{C}}{\text{d}t}&=0
\end{align*}$$
Now subtract the right equation from the left:
$$\begin{align*}
V_1+R_1 C\frac{\text{d}V_\text{C}}{\text{d}t}-V_2+R_2 C\frac{\text{d}V_\text{C}}{\text{d}t}&=V_0\\\\
\left(V_1-V_2\right)+R_1 C\frac{\text{d}V_\text{C}}{\text{d}t}+R_2 C\frac{\text{d}V_\text{C}}{\text{d}t}&=V_0\\\\
V_\text{C}+\left(R_1+R_2\right) C\frac{\text{d}V_\text{C}}{\text{d}t}&=V_0
\end{align*}$$
Which in standard form would look like:
$$\frac{\text{d}V_\text{C}}{\text{d}t}+\frac{1}{\left(R_1+R_2\right) C} V_\text{C}=\frac{V_0}{\left(R_1+R_2\right) C}$$
(You might also notice that the values of \$R_1\$ and \$R_2\$ have been added, as you might expect to see happen in a series circuit like this. Nothing shocking about that fact.)
I think you can see how to solve that. It's just a first order linear ordinary diff-eq that can be solved in a variety of well-known ways.
To keep this a little simpler, set \$\tau=\left(R_1+R_2\right) C\$. Then for example, use the integrating factor method setting \$P_t=\frac{1}{\tau}\$ and \$Q_t=\frac{V_0}{\tau}\$. The integrating factor is then \$\mu=e^{\int P_t \:\text{d}t}=e^\frac{t}{\tau}\$ and the solution is:
$$\begin{align*}
V_\text{C}&=\frac{1}{\mu}\int \mu \:Q_t\:\text{d}t=\frac{1}{\mu}\frac{V_0}{\tau}\int \mu \:\text{d}t=\frac{1}{\mu}\frac{V_0}{\tau}\bigg[\tau \mu + A_0\bigg]\\\\
&=V_0 + \frac{1}{\mu}\frac{V_0}{\tau}A_0
\end{align*}$$
To meet the initial condition (assumed) of \$V_\text{C}=0\:\text{V}\$ at \$t=0\$, (when \$\mu=1\$), it must be the case that the constant of integration is \$A_0=-\tau\$.
So the final result of all this is:
$$\begin{align*}
V_\text{C}&=V_0 - \frac{1}{\mu} V_0=V_0\left(1-e^\frac{-t}{\tau}\right)
\end{align*}$$
At this point, you still haven't arrived at an answer to your question. The above does not solve for \$V_2\$ as a function of time. It winds up solving the capacitor's voltage as a function of time. However, that is useful to know and you can use that solution to compute the current as a function of time. Knowing the current as a function of time, you've got the voltage drop of \$R_2\$ as a trivial output.
$$I_\text{C}=C\frac{\text{d}V_\text{C}}{\text{d}t}=C\left[\frac{V_0}{\tau}e^\frac{-t}{\tau}\right]=\frac{V_0}{R_1+R_2}\cdot e^\frac{-t}{\tau}$$
Therefore:
$$V_2=R_2\cdot I_\text{C}=V_0\frac{R_2}{R_1+R_2}\cdot e^\frac{-t}{\tau}$$
The voltage divider factor stands out like a sore-thumb here.
The simple approach would have been to treat this as a simple RC decay, where \$R=R_1+R_2\$. You wouldn't work as hard, that way. But then, it only gets you one answer rather than learning how to fish for answers, I suppose.
Or you could simultaneously solve the initial pairs of equations; either through substitution and solution or else by sorting out the homogeneous and steady state solutions.
I suppose it depends on what you feel like, at the time? |
H: Type A female USB port
I ordered a Type A USB port because I thought all Type A USB ports were the same, come to find out after taking the laptop completely apart that the 4 prong 2.0 USB port I ordered was way different than the type A 2.0 USB I needed for the laptop, So I took apart a flash drive and that's also way different than the other 2
The one I order on amazon is the same size as the one I needed for the laptop, but the very end of the new one where the prongs are isn't recessed to go half way into the logic board
Does anyone know where I can find laptop Type A USB ports for a HP G7
you can probably tell that the one i need is the one closest to you and the one i ordered is the one furthest away
AI: There are several types of Type-A receptacles that differ in mounting options, even with through-hole pins. In addition to the "standard type" (which you got, "through-hole right angle"), there are several other options: "board edge-mounting", "board edge with cutout", two types of "vertical mount", and, very important, "reverse mount". Your part looks like a "board edge with cut-out", normal mount, but I am not sure. Check with Mouser or Digi-key (or Arrow/Vertical/Avnet/etc) who offer genuine brand connectors, and never use Amazon/eBay/aliexpress - they likely sell some bootleg parts that use bad plating, bad contact springs, may have bad dimension tolerance, and use bad (melting) plastics. |
H: Application of offset voltage to non-inverting input of the op amp
When we analize the effects of the offset voltage at the outlet of an amplifier configuration, we consider that this voltage is applied to the non-inverting input. At least it appears so in all the books I have reviewed so far. Is there any particual reason for this?
Thanks for your help
AI: There is only one simple reason: The calculation of the resulting output DC offset is easier in case of non-inverting configuration. In this case, we just have to multiply the input offset with the "noise gain" which is the inverse of the feedback factor (and identical with the non-inv. gain factor).
However, you also can add the input DC offset in form of a DC voltage source at the inverting input. In this case, the calculation is a bit more involved - however, the result is the same (except the sign).
Why is the calculation more involved? The offset voltage is measured (specified) as a DC voltage directly at the opamp input against ground. In the non-inv. configuration we, therefore, can replace the "normal" signal input voltage by the offset voltage Voff - and the result is known (noise gain). However, in the inverting configuration this is not possible (the inv. input terminal does not receive the signal input). First, we have to recalculate the influence of the known DC offset Voff and place the resulting voltage source (taking the feedback network into account) in series to the input resistor.
However, please note that the input offset voltage Voff is specified for the special case Vout=0. That means: Voff is identical to an externally applied DC Voltage at the non-inv. input that brings the DC output to zero! In this context, the sign of Voff is fixed. |
H: Analysis of voltage regulator circuit
I have found out the output voltage to be 9V.
To find power, we need \$I_CV_{CE}\$
We can find \$I_E\$ from the output circuit.
\$ I_E=\frac{6}{24k}+\frac{9}{10} \$
But can we find \$I_C\$? Or do we have to approximate \$I_C\$ approximately equal to \$I_E\$?
Will increase of \$ V_{in}\$ by 20% anyway impact the transistor currents?
AI: For this theoretical circuit, the output voltage will be around:
$$V_O = 6V \cdot (1 + \frac{12\textrm{k}\Omega}{24\textrm{k}\Omega}) = 9V$$
Hence the output current is: \$I_O = \frac{9V}{10\Omega} = 0.9A\$
The power dissipation is \$P \approx (V_{IN} - V_O) \cdot I_O = 5.4W\$
I assumed that \$I_C \approx I_E\$ because \$\frac{I_C}{I_E} = \frac{I_C}{I_B+I_C} = \frac{ \beta I_B}{I_B +\beta I_B} = \frac{ \beta I_B}{(\beta +1) I_B} =\frac{ \beta}{\beta +1} \$
So if the beta is large we can assume that \$I_C \approx I_E\$
And now you should be able to calculate the power dissipated in the transistor after voltage increases. |
H: LC circuit powered by MOSFET generates not stable
Sorry for poor English.
I have a transformer from an old TV and try to generate HV discharge. I've added a capacitor (C1 on the scheme) to get resonant frequency around 17kHz. Used coil 5-6 for feedback for the transistor T1 (IRF3808) and protected the gate with 5k potentiometer RV1.
Sometimes the circuit works, sometimes not. I have tried to switch pins 5 and 6 of the transformer. Moved the tap of RV1 both directions. Checked that the transistor works. Everything looks fine, but the circuit does not work most of the time.
What is wrong with the circuit?
AI: Q1 probably needs to have a little bit of DC bias in order for it to start oscillating so, I suggest that pin 6 of the transformer (as shown in your diagram) is raised by a small DC voltage in order to take a few tens of milli amps through Q1's drain. Try using a potential divider - maybe 10 kohm and 680 ohm. The 10k would connect to 30 volts and pin 6 and the 680 ohm from pin 6 to ground.
Bear in mind that these are approximate values and not calculated. I would also urge you to use a simulator to try and get it working with the "better" values. You might also consider reducing the amount of AC fed back to the gate because, when it is optimized, given the same turns are used on both primary coils, there will be too much positive feedback.
See also this question and answer regarding a tuned collector oscillator and fixing it to produce a cleaner sine wave - it's very similar to your set-up so it will help you understand the importance of restricting the positive feedback levels in order to produce a decent sine wave. |
H: The meaning and role of the phase in antenna measurements with VNA
VNA measurements of an antenna return Z, RL, Xs, Rs... and also phase. I usually check Z=50 and Xs=0 to reach the max Return Loss and the lowest SWR 1.0:1, without having care of phase values.
However I noticed that in some cases even if Z and Xs are 50 snd 0 the SWR is high (even 6:1... 10:1) becouse of a particular high value of phase.
What's the best value of phase I have to reach for a perfect matching?
Do I need to have always care of the phase like Z and Xs?
AI: VNA measurement results are just complex numbers. Complex numbers can be expressed in either "magnitude (Z) + phase (P)" or "resistance (Rs) + reactance (Xs)".
You don't want to mix these complementary notations of complex numbers. So Z=50 and Xs=0 is not what you are looking for.
For SWR=1 with a load of Rl=50 Ohms you need Z=50,P=0 or Rs=50,Xs=0, which is the same. |
H: Antenna polarization and antenna directivity are the same?
I'm working on an RFID project, and looking for information about the antennas that I have to use, I have the following doubt: Antenna polarization and antenna directiivity are the same? Thanks!
AI: No.
Polarization refers to the relative angles of the electric and magnetic fields along the path of propagation.
Directivity refers to the gain of the antenna at various angles relative to its own axis. |
H: Newbie question: C programing for AVR
The following lines which works exactly opposite to what i'm expecting, would appreciate correcting my understaing:
Button connected with Pin D2 & Led B2:
if (PIND & (1 << PD2) )
{
(PORTB ^= (1 << PB2));
_delay_ms(500);
}
else
PORTB |= (1 << PB2);
As far as i understand so far:
when Button pressed [PD2 will high value (1)] which when and'd with the mask (wich is another 1 in location of PD2) then we should get true for the if condition and the LED will keep switching based on the delay value specified.
HOWEVER, what i get is the exact opposite: as lonh as i'm pressing the button Led goes constantly one, when no button pressed the switching behavior occurs.
i'm kind of lost where i'm wrong
AI: The behavior you describe most likely indicates that the switch closure is causing the port bit to read low, not high.
This would be quite normal, as it is fairly traditional to use a pull-up resistor to put a deterministic state on an input when the connected switch is open, and have the switch closure override this by connecting to ground.
While some other microcontrollers can be configured with either an internal pull-up or an internal pull-down, the AVR offers only internal pull-up resistors. To do things the other way around, with a button that signalled high when the contacts were closed, you would need to use an external pull-down resistor. |
H: 74193 stops working after compilation on another PC (QUARTUS)
I got a Quartus project with a mod 22 counter using 74193 from a friend. It works just fine when I run a simulation before a compilation on my PC, but after I compile it on my PC, it stops working correctly. Is it possible to check what settings are different during compilation?
Before compilation
After compilation on my PC
AI: The difference between the two is not that compilation broke your design, but rather the first case is an RTL simulation (i.e. everything is ideal), whereas the second case is a Gate-Level simulation, which factors in the propagation delays estimated for the actual real implementation.
Your circuit design works in the ideal case, however once you factor in real propagation delays within the circuit, race conditions and logic hazards become a major problem. The same would be the case if you were to build the circuit from actual physical logic ICs.
When designing for FPGA, and even if building out of logic ICs, you need to be very careful in how you design your circuitry - especially when those designs start including asynchronous reset paths. Mixing asynchronous and synchronous logic within the same data path can cause you major headaches like you are seeing. |
H: Can a Single Supply Powered Op-Amp Handle Negative Input Voltage?
I have an input sine wave at 300mV peak to peak. I want to filter this sine wave to eliminate noise and distortion.
I am planning to use the LMx58-N op-amp family, powered using a single supply: 3V to 32V.
Circuitry proposed will be based on the Multiple-Feedback Topology, as shown:
Considering the input signal to be at 100kHz +-10%, I want the filter to work adequately and without any damage to the op-amp. I also want to adhere to good electronic design principles.
Can I pass the signal directly into the above circuit, or should I bias the input signal ?
Any tips and/or suggestions would be greatly appreciated.
AI: The bias is signposted already as Vcc/2 (mid-rail supply). In the quiescent state VOUT will be at Vcc too so you may need a DC-blocking capacitor on the output too.
R1 and R2 are a potential divider and form an input attenuator.
Read the datasheet carefully to understand what the maximum output voltage swing can be when operating at low voltage at the load resistance value you are proposing.
Figure 1. Internals of the ancient 741 opamp. Source: Wikipedia.
From the internal schematic of the 741 op-amp it should be clear that the output can source current from the \$ V_{S+} \$ rail via Q14 or sink current to the \$ V_{S-} \$ rail via Q20. The arrangement of the output transistors determines how close to the supply rails it can get. The 741 is an ancient op-amp and is of very low quality by today's standards. It couldn't get within 2 V or more of the supply rails and would be totally unsuited to low voltage operation.
Are you referring to the voltage gain that can be achieved when operating at the proposed voltage and load resistance?
So, I'm not referring to the voltage gain, but rather the voltage swing at the output. The maximum input signal it could tolerate would be \$ V_{IN} = \frac {V_{OUT}}{GAIN} \$. For example, let's say your op-amp is able to swing 3 V from output minimum to output maximum and the gain is 10 then the maximum input signal before clipping would be 0.3 V. |
H: Let two LEDs blink with Raspberry Pi
I have written a simple Python program which runs on a RPi to make an LED blink. For that I connected my RPi using GPIO 23 with the anode of the LED, and before going back to ground, I added a resistor with 220 ohm. So far, this works.
Now I would like to make two LEDs blink, so I just thought to add a second LED and put them in series. Unfortunately, exactly nothing happened. So I have a number of questions:
Why does nothing happen? Are the 3.3 volts of the RPi too little for two LEDs and a 220 ohm resistor?
Is it even correct to put the LEDs one after the other, or would I need to put them in parallel?
How do I calculate the correct resistor, if I don't know the data of the LEDs? What would happen if I simply remove the resistor? Would I risk damaging the RPi?
AI: To answer your first question, yes. 3.3V is not enough to forward-bias two LEDs, which typically need somewhere around 2V each for red LEDs and more for other colors.
For the second question, putting them in series is entirely reasonable, and often preferred as it prevents current crowding (where one LED with a slightly lower forward voltage "hogs all the current").
As for the third question: You'd have to measure the forward voltage of the LED. Many, if not most, multimeters can measure the forward voltage of a diode, but few (at least that I've seen) can measure voltages as high as most LEDs. Not using a resistor will damage your LED, your rpi, or both, and is not recommended.
To measure the LED forward voltage, try the following circuit:
simulate this circuit – Schematic created using CircuitLab
This will give you an idea of the LED forward voltage. If you hook up this circuit and the LED doesn't visibly turn on (which may happen for high-current blue or white LEDs), try changing to a 100Ω resistor.
A better circuit would involve an active current source, but this one is probably good enough for your purposes. |
H: (Reasonably) accurate 1Hz clock generator
I would like your advice on components before I purchase anything.
I am going to make a digital 24hr clock using probably JK flip flops/multiplexors with 7 segment displays. But it must be battery-operated.
Is using a 32kHz quartz crystal, a good way of producing a 1Hz clock signal for my FF's? I know I will have to do some frequency division (2^15) with FF's.
If so, is there an IC I can buy that produces a 1Hz output signal? If anyone knows any part numbers off the top of your head, it would be good if you could share them.
Does the quartz crystal require any other circuitry to operate?
I haven't used the mentioned component before, sorry if the questions are silly.
Thanks
AI: Is using a quartz crystal 32kHz a good way of producing a 1Hz clock signal for my FF's
Yes, that is the way to do that. You probably haven't met the 4060 CMOS logic chip yet because it can do most of what you need.
Look at page 8 for how it can use a Crystal as the input clock. It will divide down that clock with a series of flip-flops by \$2^{14}\$ so you'll get 2 Hz form a 32768 Hz (watch) crystal. So add another divide-by-2 and you're done. |
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