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H: QUCS simulation of simple capacitor/resistor circuit - strange results.
Hi I have just started to learn electronics. In order to understand the RC constant I have built the following very simple circuit in QUCS simulator.
According to the formula
RC time constant = R x C = 2,000,000 ohms x 0.000015 farads = 30 seconds
I would expect the graph of voltage on capacitor C1 rise steadily till it reaches 2/3 of 1.5 after 30 secs . However as it can be seen the the simulation shows straight graphs of both current and capacitor's voltage without any difference in time.
Can someone explain these results
AI: The circuit simulator is solving for the steady-state initial condition before running the transient sim.
To get your desired behaviour you have to explicitly tell the simulator you want zero volts across the cap at t=0. To do this, double click on the part and set the initial voltage to zero - I've highlighted the line you need to change in the dialog below. |
H: Engineering a voltage signal with an asymmetric power spectral density
My question is as follows. I know that classically speaking, if you have some time varying signal X(t) its power spectral density S_X(f) will be symmetric around f=0 as the signal is real. This is why your spectrum analyzer only shows the positive part, the negative part is redundant.
But if one has a complex signal (such as often encountered in quantum mechanics) the PSD can be asymmetric around 0. This for example leads to the asymmetry between absorption and emission in atoms: atoms have spontaneous emission (emission in the absence of photons in the environment) but not spontaneous absorption.
What I am interested in is if there is a way to physically make such a complex signal with asymmetric PSD. I would specifically think about a voltage signal, ideally generated with some arbitrary waveform generator. Maybe this can be done by using two channels that output the signal with some phase difference? I've tried looking for some source material on this but I have not been successful.
AI: First think about this picture: -
This is Euler's equation and is all about single rotating vector (\$e^{ix}\$) that moves in and out of both real and imaginery planes. Next consider what a sine or cosine is: -
In other words each are composed of a positive rotating vector and a negative rotating vector. However, as a sum of rotating vectors they only occupy a fixed position - the two rotating parts that make either are contra rotating and this makes sine or cosine fixed and free from rotation.
Here is what they look like: -
Cos(x) exists on the real axis and iSin(x) exists on the imaginery axis.
I think what you are asking for is a method of creating an imaginery voltage like the path taken by the red line: - |
H: Changing terminal leads on a live battery
So somewhere along the line I made an idiots mistake that I'd like to avoid making again. I have a large 51.2V battery that's wrapped in shrink wrap and has wire leads soldered into a charging circuit that is soldered onto the terminals. The connections recently got crushed past being usable because one of our team members wasn't paying attention to where he was putting things. I thought that I would be safe if I only touched one terminal (i.e. one wire lead) of the battery at a time, but when I went to clip off the crushed positive connection I got a shower of sparks and a small heart attack. Thankfully I didn't get shocked, but I'd really like to figure out why it sparked so badly and what's going on.
We very carefully cut off the shrink wrap to take some pictures. Here's a folder of the pictures we took. Battery2.JPG is a picture of how each individual cell is hooked to the next one. The little red wire leads back to the charging circuit and connects as shown in Battery3.JPG. Battery4.JPG is an image of the battery as a whole. I suspect the spark shower has something to do with the charging circuit but I'm really not sure. Does anyone know how I can change the connections without killing myself?
AI: Looking at those connections, I do not know if this will be practicable.
First, you need to know what current will be flowing. Then you need a switch which is rated at that current and that voltage for DC currents. The rating is important because you do not want the switch contacts welded together. When looking for one, you will notice that the DC rating for switches is much less than the AC rating: an AC arc will self-extinguish as the voltage goes to zero.
1) Switch the switch to the "off" position.
2) Wire the switch in parallel with the connection you want to break. Use insulated wire rated correctly for the current.
3) Switch it on.
4) Break the connection without interrupting the switch connections.
5) Switch the switch off.
6) Remove the switch and its wiring.
Reverse the sequence to reconnect.
The idea is to have the current switched by a device which can do so safely. |
H: VHDL define range as previously defined range + offset
Is there some way in VHDL to define a range as a previously defined range plus some offset? Below is an example of what I would like to do but I can't figure out the correct way of going about it. In this example the FIFO's din/dout are 47 downto 0.
constant X_DEPTH : integer := 8;
constant Y_DEPTH : integer := 8;
-- Expected range 7 downto 0
subtype X_MAX_RANGE is natural range (X_DEPTH-1 downto 0);
-- Expected range 15 downto 8
subtype X_MIN_RANGE is natural range X_MAX_RANGE + X_DEPTH;
-- Expected range 23 downto 16
subtype Y_MAX_RANGE is natural range X_MIN_RANGE + Y_DEPTH;
-- Expected range 31 downto 24
subtype Y_MIN_RANGE is natural range Y_MAX_RANGE + Y_DEPTH;
-- Remaining bits (Expected 47 downto 32)
subtype REMAINDER is natural range 47 downto ???; -- Y_MIN_RANGE max + 1
signal dummy1,dummy2 : std_logic_vector(REMAINDER);
begin
FIFO_inst : entity work.FIFO
PORT MAP
(
clk => CLK,
srst => RESET,
din(REMAINDER) => dummy1,
din(Y_MIN_RANGE) => y_min,
din(Y_MAX_RANGE) => y_max,
din(X_MIN_RANGE) => x_min,
din(X_MAX_RANGE) => x_max,
wr_en => wr_en,
rd_en => rd_en,
dout(REMAINDER) => dummy2,
dout(Y_MIN_RANGE) => y_min_out,
dout(Y_MAX_RANGE) => y_max_out,
dout(X_MIN_RANGE) => x_min_out,
dout(X_MAX_RANGE) => x_max_out,
full => full,
empty => empty,
valid => valid
);
AI: You can use attributes as 'right, 'left, 'low and 'high to generate one range from another :
For example :
subtype X_MIN_RANGE is natural range X_MAX_RANGE'low TO X_MAX_RANGE'high + X_DEPTH;
For more elaborate operations, you can also define functions (with integer parameters) that will be evaluated during synthesis as long as inputs are constants:
FUNCTION tweak(v : natural) RETURN natural IS
BEGIN
RETURN 2*v + X_DEPTH;
END FUNCTION;
subtype Y_MAX_RANGE is natural range X_MIN_RANGE'low TO tweak(X_MIN_RANGE'high);
Alas, VHDL is not "functional" enough to allow returning generated types or ranges fron functions. |
H: What is the (most likely) technical reason behind temperature specifications?
Im talking about electronic devices, which may be handheld or similar, so nothing exposed to "artificial" temperature (welding, soldering, cooling with liquid gas). Devices designed to be operated by ("unprotected") humans, indoors or outdoors, such is the temperature range.
My question is: What are the especially temperature sensitive parts? I guess Im interested in the lower end (0°C and below). Are the batteries sensitive? What is also likey to fail when it gets too cold? - Which in turn also mean: which part must be kept warm if one has to attempt to operate such device in too cold a enviroment?
Example: I have recently bought a laser distance meassure, a UNI-T UT391A+. The specified operating temperature range: 0°C to 40°C. Many similar devices (even the UT391A, without +) specify -10°C or lower as their lowest. Why is that? The most obvious difference between UT391A+ and others is that the former has integrated bubble levels. Could that be what bumps the temperature tolerance by 10°?
AI: Usually the semiconductors are the least temperature sensitive devices at low temperatures, a far as functionality goes. They may be rated for 0-70°C (commercial temperature range) but in fact many will operate fairly well down to liquid nitrogen temperatures (77K).
Capacitors (especially electrolytic and many ceramic types) will drop in value, sometimes precipitously or the internal resistance will increase greatly.
Batteries often perform very poorly at only moderately low temperatures- internal resistance increases and capacity shrinks. LCD displays can have problems with speed and temperature compensation.
Aside from the ceramic caps, some of which are just very temperature sensitive, most of these devices have liquid contained within them.
There is not a lot of reason to specify devices over a very wide range (and test them with margin to ensure that) if they are not going to be used in an automotive or military environment, and the testing and spec'ing allows the semi makers to segment the market and charge quite a bit more money for wide range devices. Many commercial semis will typically operate over a much wider range with relaxed specs- for example if you clock the chip at 250MHz rather than 300MHz. |
H: LT1528 adjustable operation
Below is a schematic for adjustable voltage of the LT1528. The documentation did not mention whether there should be a small valued capacitor on input, nor did it mention what approximate value the output capacitor should be. Does anyone have any recommendations?
AI: Input capacitor:
The documentation did not mention whether there should be a small valued capacitor on input
Actually, hidden in the datasheet, is a hint. On page 6, the transient response graphs include the specific conditions which were used to produce those graphs. Look in the top corners:
[Transient response for a 1A step change in load]
[Transient response for a 2A step change in load]
As you see, the conditions for both graphs include \$C_{IN} = 3.3\;\mu\textrm{F}\$.
Also note that on page 7 it says for pin 5 (\$V_{IN}\$):
The input pin should be bypassed to ground if the device is more than six inches away from the main input filter capacitor.
Therefore my conclusions from the datasheet are:
an input capacitor is not always required; however...
an input capacitor should be used if this regulator is >6 ins (150mm) from the main input capacitor;
to get the transient response shown on the graphs in the datasheet, you would need to duplicate the test conditions, which include having the given value for \$C_{IN}\$ (and for \$C_{OUT}\$)
Output capacitor:
nor did it mention what approximate value the output capacitor should be.
This is addressed on page 9 under "Output Capacitance and Transient Performance" and "Microprocessor Applications". The answer depends on the load current and acceptable transient response for whatever is being powered by the regulator. The minimum value is given in the datasheet:
The minimum recommended value is 3.3μF with an ESR of 2Ω or less.
Here is one of the examples from the datasheet, which highlights that the value of the output capacitor is dependent on the requirements of the load: |
H: Why can you not combine resistors in series when there is a voltage or current source between them?
Combining resistors in series with a voltage source in between
The answer says no, but I don't understand how it alters the circuit at all. If there is a current source between two circuits, the end result is current flowing and a voltage difference encompassing the three elements.
AI: The simple answer is it depends on whether you need to know anything about the original nodes between the components.
If you don't need to analyse specific nodes within the series circuit, then you can lump them together. For example if you look at the left three components in the linked question (R+L+source), and you are only interested in the voltage between the right hand node of both the resistor and inductor, then yes you can combine them. The order of components in a series circuit is irrelevant to its operation.
However, if you want to know the voltage at each node in the original circuit, then you cannot rearrange them because although the circuit remains functionally identical, you lose the information about specific nodes in the original circuit. |
H: How to model PCB Trace with RLC?
I have a PCB board with the stackup shown below. I want to calculate what would be the impedance (and capacitance too?) of a 5" PCB trace on the L1 layer.
How to calculate it?
For example, I am trying to use this calculator (https://www.eeweb.com/toolbox/microstrip-impedance/), what should be the value of the fields?
AI: trying to figure out how I can replace a 4" trace with an equivalent RLC Circuit.
First choice: Don't. Use the 'tline' element in LTSpice instead.
Second choice: You can model a transmission line with a sequence of pi or T sections. If you use a different transmission line calculator, for example the Saturn PCB one, or this online one, they will output capacitance and inductance per unit length in addition to the characteristic impedance.
Say your calculator says the capacitance is 1.7 pF per inch and the inductance is 12.2 nH per inch. Then you can break up your 4" trace into as many sections as you want. Each section of length L (for example L=0.4" if you break your 4" trace into 10 sections) will have 1.7 \$\times\$ L pF and 12.2 \$\times\$ L nH, arranged in either a pi or T circuit.
Keep solving your circuit with this set-up, increasing the number of sections each time, until your results stop changing (this step is why it's easier to just use a built-in model than to try to make an LC model yourself). The higher the frequencies present in your circuit are, the more sections you'll need to achieve an accurate model. |
H: Is solder mask expansion overlap legal?
I used the component wizard in Altium to automatically create a footprint but it decided to overlap the solder mask expansion with neighboring pads. Is this ok or should I change it such that there is a gap between each pad.
AI: The overlap is not a problem as far as having the PCB green-board made. There will just be no soldermask everywhere you see the purple.
This could be a problem when you have the boards populated, because solder bridging is more likely.
The real answer here is that you should work with your board house and determine what the solder mask expansion and minimum sliver size should be (the smallest sliver between pads).
Also, check your part to make sure the rule isn't overridden: |
H: Page table - I don't understand how this table has been made
CPU has generated this sequence of logic addresses (in decimal):
777, 2047, 1199, 1100, 546, 129, 3201
page size is 512 Byte, CPU generates logic addresses, 12 Bit length, main memory has 4 pages.
I understand the following table: We just converted the decimal addresses to binary. The total address length is 12 Bit. From task we know that page size is 512 Byte, so 2^9 Byte = 9 Bit for offset. 12 Bit - 9 Bit = 3 Bit for page. So first 3 Bits are page and the other remaining 9 Bit are offset. Easy so far.
But here comes the second part of the task and I don't understand how the table was made...
Make a table that illustrates the content of the table above (called MMU) after each finished memory access in the same order shown above. You only need to specify the necessary entries (so if there is same page twice, ignore the duplicate). At the beginning, all page frames are unassigned and they are used with an ascending page number. If all page frames are in use, the LRU replacement takes place.
Here is the solution of the table but I don't understand... That's my question, how was this table created? I don't get the logic.
Edit: For second table I can see task said 4 pages. So we have 00, 01, 10, 11(so in decimal 0, 1, 2, 3) but why they did it in that order in the table? That's what I don't understand.
Edit: I don't understand the order of the second table. Why did we start with 11, then 00, then 10 etc. It doesn't make sense for me...
Here is how I would have filled the table:
What do you think?
AI: You have four physical pages of memory and eight virtual pages. All of the physical pages start out unallocated for any particular purpose. The virtual table of eight entries starts out with all the virtual pages being invalid.
That's the starting situation. One more detail may be useful here -- defining HOW new physical pages will be allocated. Given the results, I think it's clear that the allocation method starts out by allocating physical page 0, first. Then physical page 1. Etc. Once all the physical pages have been allocated at least once, this is when the LRU (least recently used) algorithm comes into play.
So that sets up the process.
One more thing might be useful to consider adding. This is how the LRU itself gets handled. Think of this as a stack of eaight cards. One card representing each virtual page. So let's call the cards: 0, 1, 2, 3, etc., for obvious reasons. The deck always has eight cards in it. Initially, the deck starts out as 01234567 (or any other order you like.) When allocating a new page, we always take the top card (which will be the left-most digit here) from the deck, use whatever physical page it indicates, and then place that card back at the bottom of the deck. So, for example, if we were to need a new physical page we'd go to this initial deck of "0123", pull the top card (which is "0"), allocate that physical page, then place that card back into the deck at the bottom. So the new deck would be "1230" after we were done with this step. Every time a physical page is accessed, we find its card in this deck and move it to the bottom, too.
To summarize the LRU deck: When we need a new physical page, we always take the top card and use whatever page is indicated by the value there and then move that card to the bottom of the deck. Whenever we access a physical page, we always find the card associated with that page and move it to the bottom of the deck.
That's it. I'll show the deck along with each step taken.
Now all you have to do is "act like the computer" and do the work by hand, running down the list of successive addresses in order. It's just simple hand work.
Each virtual address has a page and an offset. The offset value is the low-order 9 bits of the virtual address and the page is the upper 3 bits of the virtual address. The logic is as follows:
If the virtual table entry is invalid, then allocate a page from a list of free physical pages. But if there are no free physical pages left, then from a search of valid virtual table entries allocate the physical page from the virtual table entry holding the least recently used page. Also, in this case, mark the found virtual table entry as invalid because the physical page it owns is being re-allocated now. Then take this physical page and place it into the current virtual table entry and mark it as valid. Finally, pull this virtual table entry to the top of the LRU list, indicating it is very recently used.
If the virtual table entry is marked as valid, then pull this virtual table entry to the top of the LRU list, again indicating it is very recently used.
The above algorithm is repeated over and over for each of your virtual addresses, in sequence order. It ignores the details of forming the full 11-bit physical memory address. But I don't need to worry about that part of it, because your question isn't about that but instead about how that table got into the condition it was in. So I'm neglecting that detail to avoid excess detail here.
Here are the steps with your addresses, in order:
$$
\begin{array}{lrllll}
\underline{\textrm{Step}} & {\underline{~~~~~~~~~~~~~~~~~~~~\textrm{Action}~~}} & \underline{\textrm{Free}} & \underline{\textrm{LRU}} & \underline{\textrm{Valid}~~~~~~~~~~~} & \underline{\textrm{Frame}~~~~} \\
& & 0123 & & \textrm{FFFFFFFF} & \textrm{oooooooo} \\
& \textbf{new address 1:265} & & & & \\
(1) & alloc = free & 123 & & \textrm{FFFFFFFF} & \textrm{oooooooo} \\
(2) & frame_1 = alloc & 123 & & \textrm{FFFFFFFF} & \textrm{o0oooooo} \\
(3) & valid_1 = true & 123 & & \textrm{FTFFFFFF} & \textrm{o0oooooo} \\
(4) & LRU(1) & 123 & 1 & \textrm{FTFFFFFF} & \textrm{o0oooooo} \\
& \textbf{new address 3:511} & & & & \\
(1) & alloc = free & 23 & 1 & \textrm{FTFFFFFF} & \textrm{o0oooooo} \\
(2) & frame_3 = alloc & 23 & 1 & \textrm{FTFFFFFF} & \textrm{o0o1oooo} \\
(3) & valid_3 = true & 23 & 1 & \textrm{FTFTFFFF} & \textrm{o0o1oooo} \\
(4) & LRU(3) & 23 & 31 & \textrm{FTFTFFFF} & \textrm{o0o1oooo} \\
& \textbf{new address 2:175} & & & & \\
(1) & alloc = free & 3 & 31 & \textrm{FTFTFFFF} & \textrm{o0o1oooo} \\
(2) & frame_2 = alloc & 3 & 31 & \textrm{FTFTFFFF} & \textrm{o021oooo} \\
(3) & valid_2 = true & 3 & 31 & \textrm{FTTTFFFF} & \textrm{o021oooo} \\
(4) & LRU(2) & 3 & 231 & \textrm{FTTTFFFF} & \textrm{o021oooo} \\
& \textbf{new address 2:76} & & & & \\
(4) & LRU(2) & 3 & 231 & \textrm{FTTTFFFF} & \textrm{o021oooo} \\
& \textbf{new address 1:34} & & & & \\
(4) & LRU(1) & 3 & 123 & \textrm{FTTTFFFF} & \textrm{o021oooo} \\
& \textbf{new address 0:129} & & & & \\
(1) & alloc = free & & 123 & \textrm{FTTTFFFF} & \textrm{o0o1oooo} \\
(2) & frame_0 = alloc & & 123 & \textrm{FTTTFFFF} & \textrm{3021oooo} \\
(3) & valid_0 = true & & 123 & \textrm{TTTTFFFF} & \textrm{3021oooo} \\
(4) & LRU(0) & & 0123 & \textrm{TTTTFFFF} & \textrm{3021oooo} \\
& \textbf{new address 6:129} & & & & \\
(1) & alloc = frame_{LRU} & & 012 & \textrm{TTTFFFFF} & \textrm{3021oooo} \\
(2) & frame_6 = alloc & & 012 & \textrm{TTTFFFFF} & \textrm{3021oo1o} \\
(3) & valid_6 = true & & 012 & \textrm{TTTFFFTF} & \textrm{3021oo1o} \\
(4) & LRU(6) & & 6012 & \textrm{TTTFFFTF} & \textrm{3021oo1o} \\
\end{array}
$$
You should be able to match up the last entry above with your table, I think. The only trick here is to note that the LRU virtual table entry is '3' but the physical page owned by that virtual table entry is physical page '1'. The virtual table entry for '3' is marked false, but the alloc variable is set to 1, since that is the physical page that was assigned there.
EDIT: To your question:
I don't understand the order of the second table. Why did we start
with 11, then 00, then 10 etc. It doesn't make sense for me...
We didn't start with 11. That column is the physical page number. Clearly, we didn't allocate the physical page 3 (11 binary) right off the bat. Instead, it just turns out that when address 0:129 came along, there was only one free physical page left -- page 3. But that goes into virtual page table row 0, of course! Because the virtual page referenced by 0:129 is row 0 in the virtual table. But the physical page (frame) is 3. So 3 is stored there (11 binary.) |
H: Replace one Voltage Regulator by two coexisting regulators (NOT in "parallel")
First of all, I know that I cannot simply parallel two voltage regulators to double my output power. At least not without actions to keep the two regulators "balanced" as was discussed here:
2 Voltage regulator wired together to produce higher amperage possible?
Also, I want to use a synchronous step-down converter with integrated FETs, so I know no way of adding such a "balancing circuit" because there is no easy way of sensing the currents ofthe two ICs.
Now to my question: Suppose (just an example) that I need 5 amps at 3.3V, is there any flaw with just using 2 regulators with 2 x 2.5A that are NOT in parallel, but only with the same GND connection supplying different 3V3 regions on the target PCB? So the idea is, power the core components like processor and near peripherals with the rails of one of the regulators and the rest of the 3V3 peripherals with the rail of the second regulator.
Of course, then there is the case that e.g. peripheral A and the processor are powered from two "different" power rails, which could have a few percent of difference in there nominal output voltage. But even though, I don´t think that there is a problem with "crossing currents".
My thoughts so far:
Example 1: Processor is supplied with 3.3V and its pin drives an input of peripheral 2 which is supplied with only 3.2V. There is no problem with this as long as peripheral 2 can accept input voltages that are 0.1V higher than the supply (which most devices accept! Of course the tolaerance level has to be greater because both rails have some ripple...)
Can you tell me if there is any flaw in this thought and am I missing something else to be considered?
AI: ...I need 5 amps at 3.3V, is there any flaw with just using 2 regulators with 2 x 2.5A that are NOT in parallel, but only with the same GND connection supplying different 3V3 regions on the target PCB?
Yes, that is possible. But don't "see" it as 2 regulators supplying 5 A bit see it as 2 regulators each supplying up to 2.5 A, because that's what it is. As long as you do not exceed the 2.5 A per supply domain you will be fine. This is what is done on many PC motherboards. Count the number of inductors near the CPU, each one is supplying a different supply domain.
If you keep the supply voltages roughly the same value (less than 100 mV difference) then I would expect no problems on the domain crossings.
On a PC motherboard the domains will have different voltages and then levelshifters are needed, most of these are present on the CPU but some can be external as well. |
H: How to compute acceleration from accelerometer raw data
I'm working on a project based on NXP accelerometer MMA8653.
This is a I2C, 3-axial accelerometer with 10-bit resolution.
Actually I can read the accelerometer registers and I'm able to configure it.
I configured the accelerometer with full scale equal to 2G and the sensitivity associated to this full scale is 256 conts/g
Reading the register I obtain three 16bit signed variables that correspond to each axis.
Which is the formula to compute the acceleration on the three axis?
My MCU has not a floating point unit, so I want to avoid divisions. It's possible to obtain acceleration in mg (millig - 1^10-3 g)?
Thanks for the help!
AI: As far as I understand, you will get the acceleration in [g] on each axis by dividing each of the 3 values you obtained by 256 (because your sensitivity is 256 counts/g).
To avoid any problems with the division of integer numbers, I suggest you to do in this order, for each value:
Convert the number into a signed long, to avoid any overflow in the future
Multiply the value by 1000
Divide the value by 256: you will then obtain the acceleration value in milli-g, rounded to the lowest mg.
Tip: if you want to round it to the nearest mg (instead of the lowest), you can add 128 (half the number of count / mg) before you divide the value, but after you multiplied it by 1000.
Tip 2: as you mentioned in your comment, you can use a bitshift of 8 instead of the division by 256 to improve the efficiency of the calculation (there is a chance that your compiler would optimise the code by automatically doing it anyway) |
H: Reduce using Boolean Algebra
How to reduce \$(\bar B.C + B)\$ to \$(B + C)\$?
Idempotent Law
A * A = A
A + A = A
Associative Law
(A * B) * C = A * (B * C)
(A + B) + C = A + (B + C)
Commutative Law
A * B = B * A
A + B = B + A
Distributive Law
A * (B + C) = A * B + A * C
A + (B * C) = (A + B) * (A + C)
Identity Law
A * 0 = 0 A * 1 = A
A + 1 = 1 A + 0 = A
Complement Law
A * ~A = 0
A + ~A = 1
Involution Law
~(~A) = A
DeMorgan's Law
~(A * B) = ~A + ~B
~(A + B) = ~A * ~B
AI: Sometimes the best thing to do is to look at the truth table for the expression you are given.
\$(\bar BC + B)\$ gives this truth table.
Now, I am quite confident that you can see from this table why the \$\bar B\$ can be removed. Just think about it.
Alternatively, if you expand the original equation (otherwise know as applying Distributive Law), you get \$(\bar B+B).(C+B)\$, geddit yet? |
H: Differential input voltage necessary for maximum slew rate in operational amplifiers
Today I ran into a problem with op-amp slew rate when playing with a design where an op-amp spends a lot of time in saturation, only to occasionally "come down" and regulate the output.
(I'm simulating this using LTspice, and the op-amps are somewhat arbitrarily chosen but it should not affect the question.)
Background
I wanted to increase the slew rate to minimize the time it spent from exiting from the saturation and enter the active mode, but when I replaced the slower LT1013 with a model of the TL074, the slew rate of my signal did not increase substantially. Even when the positive and negative inputs of the TL074 were clearly at least 50 mV apart, it did not reach the full speed. This is much more than the maximum input voltage difference. I also checked that it was not limited by the output current, but nothing there.
Solution?
After a lot of head-scratching I realize that this is because the inputs are not far enough apart. Never having seen this effect before, or at least not thought about it too much, I assumed that as long as the inputs are reasonably different, the operational amplifier will try its best to change the output.
I also remember reading something about this in The Art of Electronics, and when I looked it up, this is pretty much all it has to say about the subject:
5.8.1 Slew rate: general considerations
...
A second consequence is best explained with the help of a graph of slew rate versus differential-input signal (Figure 5.12). The point to be made here is that a circuit that demands a substantial slew rate must operate with a substantial voltage error across the op-amp's input terminals.
Figure 5.12. A substantial differential-input voltage is required to produce the full op-amp slew rate, as shown in these measured data. For BJT-input op-amps it takes ∼60 mV to reach full slew rate; for JFETs and MOSFETs it's more like a volt.
Bingo. TL074 is a JFET-input op-amp. I adjusted my circuits to get a higher differential voltage, and that solved the immediate problem. A separate simulation gave me results similar to this figure, showing that the models in LTspice are at least reasonably true to reality.
However, the increased differential voltage causes other problems, which I would like to avoid.
Question
... or several related questions. I'm not necessarily looking for answers to each of them, but perhaps more of a general explanation.
Does this effect depend on anything else than the JFET/BJT input stage?
Are there input stages where an even lower differential input voltage leads to the maximum slew rate? Perhaps some sort of hybrid?
Even if there are only two types, do different op-amps of the same type (say, BJT) have different levels?
... if so, is this possible to figure out from the datasheet?
I could not find anything about this on the TL074 datasheet, but that's of course only a single sample.
Somewhat related, is there a common solution, or is this where I would start looking at comparators instead? I might go with a comparator of sorts in the final design, but I still find this problem interesting.
AI: Does this effect depend on anything else than the JFET/BJT input
stage?
Slewing can happen in any stage of an OpAmp, it can happen in the input stage, the output stage and any of the intermediary stages. It occurs whenever a capacitor is driven by a fixed current source. For a given configuration one stage sets the limit and determines the slew-rate often this is in fact the input stage.
A typical input stage consists of a differential pair with a tail current source. In equilibrium the current of the tail current source splits equally and when driven hard on transistor takes the whole current. The required voltage to turn one of the transistors (almost) off determines the onset of slewing. It's a fixed voltage for BJTs and a variable voltage for FETs.
If slewing happens in the output stage and the output stage is not symmetrical (e.g. class A) it is possible to have different slew-rates for falling and rising edges.
Are there input stages where an even lower differential input voltage
leads to the maximum slew rate? Perhaps some sort of hybrid?
I don't know of any off-the-shelf devices that do this, but certainly there are adaptively biased OpAmps that increase the current through the input stage to improve the slewing behavior.
Even if there are only two types, do different op-amps of the same
type (say, BJT) have different levels?
BJTs have a fixed level, unless emitter degeneration is used and FETs can have different levels. |
H: Can a 240V 3 phase input battery charger be somehow used with only 240V single phase?
I was wondering if a battery charger rated at 240V 60 Hz 3 phase input can be somehow made to work properly if I only have 240V 60 Hz single phase available. I know there are expensive phase converters available on the market but I want to try to avoid those because of cost reasons. So would 240V single phase possibly damage a device designed for 3 phase input?
The requirement on the input side is up to 11A at 240V (3 phase) but the charger is also rated at up to 13A at 208V. I might be able to get a 3 phase feed from my local power company but as of right now, I only have split phase 120V which means I can easily get 240V.
The purpose of this very high output charger is for just that, rapidly charging a large battery bank that can handle it. My existing other chargers are quite slow so I wanted to possibly use this one instead.
AI: A simple (e.g., no power factor correction) 3-phase charger or power supply generally has a 6-diode bridge as the first item (perhaps after some filtering components) on the input side to create an internal DC bus. You'll want to verify this before proceeding.
If you connect a single-phase source (of the appropriate phase-to-phase voltage) to two of the input terminals, you will be using just 4 of the diodes. This should work just fine, as long as you keep the load to 2/3 of the 3-phase rating, so as not to exceed the capabilities of the diodes.
If the charger is a modern one with power factor correction, the input circuit will have 6 MOSFETs (or maybe IGBTs) instead of the diodes. In this case, you'll have to ask the manufacturer about single-phase operation. Depending on how they sense the currents and voltages for the PFC function, it may or may not be possible. |
H: Arduino: Reliable and practical way to connect an I²C device (1 m away)
This is a combined mechanical/electrical question. It is mainly about getting the I²C connection reliable; this question does not concern itself with the software side (i.e., how to handle an I²C fault on the microcontroller).
I have an Arduino (Pro Micro) and an I²C slave device (an MPU 6050 sensor). The Arduino is already there (happily doing other stuff, connected to a PC via USB) and around 1 m away from where the slave will be placed. The slave is the usual small board similar to https://www.sparkfun.com/products/11028. It provides some capacitors and 10k I²C pull-up resistors.
So far, so good. In the good old "get'er done" spirit, I have hacked everything together with some RJ45 connectors and a 1 m Cat 5 cable I had lying around (carrying VCC, GND, INT, I²C). It kind of works, until it does not. The I²C communication breaks down regularly (after a few hundred or sometimes thousand transactions).
I admit that I still have to figure out who exactly the culprit is; i.e., I will connect the slave directly to the PCB and see if it still happens (that would rule out the cable connection). The software side is probably fine; said problem happens with several different firmware, even the most trivial ones. I have played around with the pull-up resistors (i.e., with/without the additional Arduino pull-up resistors; and with extra external 4.7 Ω resistors), and that did not change anything. The environment is not particularly noisy, I think. I unfortunately have no equipment to measure what goes on on the lines.
Meanwhile: Can you suggest a practical and reliable way to do such a connection? What I thought about:
The "easiest" one would be to get a second Arduino, place it right next to the slave, connect it with USB directly to the PC; that would eliminate the whole problem, but I would really prefer not to do that if I can avoid it.
Try to split the SCL/SCA lines into differential pairs; I don't see how that would work with the I²C open-drain protocol though. I don't want to stick with I²C necessarily; there is no need to fix that if there is an easier alternative.
P82B715PN line buffers
Something like CAN or RS-485 would likely force me to add at least two more chips, or even more per side (for protocol conversion and drivers).
Is there a practical (for a hobbyist), simple, go-to solution for this kind of problem (which seems to crop up once in a while...)? I'm really open to anything here.
I checked my cables... I previously had (INT+nothing), (SCL+nothing), (SDA+nothing), and (VCC+GND). I have added the GND to all pairs, so it's now (INT+GND), (SCL+GND), (SDA+GND), and (VCC+GND) as per @FiddyOhm 's answer. Unfortunately, no change whatsoever :( That wasn't it.
AI: Your 1 meter connection should work fine if you take the following precautions for your particular situation.
A. A good ground connection between the two boards is essential. You may be able to fulfill this requirement with your CAT-5 cable. If you run into problems after trying all of the following, run an extra 20 AWG wire along side the CAT-5 cable ( tie wrap it in one or two places.
B. It is best that you use one source of Vcc ( I assume this is 5 volts in your application). You imply this in your description with the inclusion of "Vcc" in the CAT-5 wiring description. The worst thing you can do in this respect is to tie two separate sources of Vcc together with the cable. Indeed, this may be your whole problem to begin with. Voltage drop across the 1 meter cable carrying the Vcc could be an issue. You will need to test this with a DVM at the load end of the cable to make sure it is in range of your peripheral device.
C. DO NOT twist I2C Clock and Data lines together! Twist each with a ground wire, but not with each other. In other words, choose the twisted pairs within your CAT-5 cable carefully. Allow the ground wires to serve double duty as additional power grounds as well - i.e. connect them to GND on the respective boards at both ends. (If problems persist, try clipping these lines one-by-one.)
D. DO twist Vcc and GND wires together. If you have two extra pairs after doing "C" above, use two twisted pairs of Vcc & GND and connect them in parallel at both ends ( i.e. on the respective PCBs. )
E. Use the smallest pull-up resistors possible. This is likely 1.0 K. If you have an O-Scope, you can perform a simple test to determine the lowest practical resistor for your specific application. Scope the signals as the app is running and decrease the resistor value until the signal shows signs of being loaded down below acceptable logic levels ( approx. 3.2 volts for a 5 volt system). You may find that CLK and DATA will tolerate different values of resistors, this is OK.
F. If communication speed is not an issue, run the I2C link at as low a frequency which is practical for your application. 100 KHz clock is generally the "low" frequency for I2C, but it can run at any speed because it is a synchronous protocol. I have run I2C at 1 KHz in some circumstances.
G. Make sure you have adequate Vcc-to-Gnd bypass caps at both ends of the cable. One 4.7 tantalum and one 0.1 or 0.01 mfd at least on the load end is about right. If worst comes to worst, repeat these caps at the supply end of the cable.
H. If all of this doesn't work, as a last Act of Desperation, slice open the CAT-5 cable and separate the various twisted pairs from each other about 1 inch. Don't untwist the wires, just separate the pairs. Hold them apart with masking tape or similar. If this works, you are dealing with some sort of inter-pair coupling problem (not likely in my experience with this length of cable). In this case you will need to shield the Data and Clock twisted pairs (each twisted pair within its own shield - e.g. braid you scavenge from a coax cable or microphone cable). Ground the shields only at one end, preferably the Arduino end.
If these points don't solve the problem, I'd guess there's something unusual about your set-up, or something you are not knowledable enough to recognize as a problem, and are therefore not describing in your otherwise excellent description of your set-up and problem. |
H: How does IF remain constant in a heterodyne receiver after mixing?
Below is an illustration about heterodyne principle:
I can see the motivation behind heterodyning. I read that it is basically done to obtain a "fixed" frequency for the amplifiers at different incoming tuned RF carriers. But look at for instance the above illustration. The mixer produces a beat freq. which is |f2-f1|. But how can that be fixed for different carrier frequencies? I mean if oscillator has a fixed freq. f2, how can f2-f1 be fixed when f1 changes?
I really couldn't find an answer by googling this. Am I missing a point here?
AI: The point is that if you want to tune to a new frequency (radio channel) then you move the local oscillator frequency to keep the intermediate frequency precisely the same as it was. Then and only then will the IF filters amplify the new channel and largely reject close by channels.
So if your IF is 455 kHz and your LO is 1500 kHz then this tunes in a radio station having a frequency of 1045 kHz. If you want to tune in a radio station at 1000 kHz, the LO needs to drop to 1455 kHz to maintain the IF at 455 kHz.
To help the OP understand this a bit more here's a block diagram of ganged capacitor tuning to operate the antenna filter and local oscillator together: -
Sometimes three ganged variable capacitor are used: -
Sometimes dual IFs are used for extra image rejection: -
Pictures courtesy of this site
Triple ganged tuning capacitor for AM broadcast bands: -
And one last attempt to make this clear: -
The top picture shows a typical AM spectrum with several channels occupying the range 530 kHz to 1600 kHz. The middle picture has all those channels (mainly in red) reversed and shifted down because of the mixer and LO (1355 kHz). Note the position of the 1600 kHz channel (green) has reversed through 0 Hz and so I've shown it dotted along with the other channels that mirror then reverse through 0 Hz.
Note the desired channel (in gold) at 900 kHz has effectively moved down to 455 kHz (1355 kHz - 900 kHz). In the final picture the I.F. filters get rid of all the channels apart from the gold one. |
H: Need help with circuit task
I just began digital technology in my school and im struggling with one task my teacher gave me. Since I have holidays right now I cant ask my teacher (living in Germany). So I hope I'm at the right spot here!
This is the task he gave me:
Create a circuit (functional block diagram) which only has a permanent output signal K2 if the input S1 was temporary activated. If the input S1 is temporary activated again the ouput K2 should go off.
Please note: The output K2 should not flicker if S1 is permanently activated.
I also have to create a functional equation. Dont know if mine is actually correct:
Thanks for any help!
AI: What you want can be achieved by what is termed a toggling latch or toggling flipflop.
These are electronic devices which input a "clock" signal and change state once per clock cycle. They often have two outputs which can be considred to be
"high" or "low" or
1 or 0 or
true or false.
So a two output flipflop has outputs either in state 0/1 or 1/0.
Clock signals may be designed to trigger the change of state on the rising edge or the falling edge or in some cases the clock level (0 or 1) latches or unlatches the latch. This is important when a data line is also involved - a complication bot relevant in this case.
You can compare the above description to your requirement and the many circuits referenced above and should be able to use this information to design a simple low cost solution.
Here are some typical examples
I am not suggesting that any of these is the best solution or even a suitable one in your case - but they show what is typically involved.
uses two transistors and quite a few other parts. It has set and clear and toggle inputs, making it quite versatile.
Uses a "D flipflop" to make a very simple toggle. If you end up using something like this you absolutely must do enough research to understand how and why it works. Just serving up yur prof the fbd will get you in deep trouble if you cannot explaimn it.
Is similar to 1. but with a somewhat subtle and major difference in operation. Understanding how 1 & 3 works will greatly advance your analog electronics understanding.
Uses a JK flipflop. It looks like 2. and is BUT there are also major differences. If you end up being able to explain D & JK flipflops and how to toggle them and the differences you will have done well. If not DO NOT submit them to your prof or else!
## |
H: how the capacitor equation can be modified?
I have a 500 mF capacitor with a charge of 1 V and connect an 1 ohm resistor in series.
What will be the maximum current flowing through the resistor? It may be 1A, right?
But the max capacity of this capacitor at 1 V is 500 mC, so how can we say that in our circuit the max current that will flow is 1 A from equation:
$$I = I_{max} \cdot e ^ {-{{t}\over{RC}}}$$
$$I_{max} = {{Q_{max}}\over{RC}}$$
AI: When t=0, you get I=I(max) * e^0
e^0 == 1, because any number to the power of 0 equals 1.
So you get I_0 = Imax * 1 = Imax = Q/RC = 0.5/(1 * 0.5) = V/R = 1A, of course the current falls as the cap discharges (captured by the e^-t/rc terms as t increases), but at t=0, current is clearly 1A.
I see no problem here. |
H: What's this yellowish stuff on this PCB?
I took this op-amp IC out of an electronics kit. It's on a PCB and soldered to some longer leads. There's some yellow/brown goo on the back of the board, and I'm not sure what it is.
You can see it in a stripe through the middle, and partially covering some solder joints:
I can scratch it with my fingernail, and it feels kind of like rubbery plastic, much like hardened glue.
What is it? Will it interfere with soldering/desoldering?
AI: I'd guess it's quite heavy flux residue.
It should not interfere with soldering or desoldering (it helps there in the first place), but it can interfere with the operation of the circuit. Especially if you try to build some low power / high impedance circuits...
Clean it with some ethanol or isopropanol.
Based on the comments it seems to be glue, so in that case:
It will interfere with soldering or desoldering. It will likely burn (or boil) and create some toxic fumes. It can also attack the tip of your iron and make it unusable because the tin won't wet it anymore (maybe you can clean the residues off, but if you are unlucky you need a new iron).
In this case you should definitely try to clean it off before doing soldering near that stuff. Hardened glue might need some special treatment to come off though. Some require heating (up to 150°C) and then you can wipe them off, others will come off with some solvent. |
H: Missing Code - Different DNL definitions
According to IEEE Standard 1241-2010 for Terminology and
Test Methods for Analog-to-Digital Converters you have a missing code if the following inequation is true (page 44):
\$ DNL[k] \leq -0.9 \$
But according to the book: Analog-to-Digital Conversion by Pelgrom(Second Edition) you have got a missing code when DNL = -1.
From my point of understanding the second definition should be the right one because once a step has got twice the size of a normal LSB, a code is missing.
So here is my question:
Which one of these two definitions is the right one or are both valid?
AI: You are right, in order for a code to be completely missing the DNL has to be equal to -1.
The IEEE standard is just a little bit stricter, it requires that the bin have a minimum width, such that the DNL is smaller than or equal to -0.9.
So, technically for an DNL between -1 and -0.9 the code is there, but according to the IEEE standard such a performance no longer qualifies as "no missing code" in the sense of the standard. It's just a definition.
IEEE Standard 1057 is a little bit clearer:
DNL is the difference between a specified code bin width and the average code bin width, divided by the average code bin width. When given as one number without a code bin specification, it is the maximum DNL of the entire range. A code is generally defined to be a missing code if the DNL for
the code is less than −0.9. |
H: Testing changing sheet resistance with impurities
I have a chemical film, and I'm trying to detect the presence of impurities on the film. They should change the resistance. Assuming it does, how do I measure it? I believe the four point probe method might be right, but as far as I can tell that method is for uniform sheets without impurities. Will I be able to detect a particle on one side of the film even if my probes touch on another side? How does an impurity somewhere far away on the sheet affect the resistance close to the probes?
AI: Assuming the chemical film is mainly an insulator, trying to measure purity with an ohmmeter method may imply high voltage or extremely low currents.
I have found the best dielectric impurity testing measures the discharge of contaminants as they are excited with sufficient electric field either AC (preferred) or DC hitting a conductor surface.
This is often calibrated and measured in picocoulombs , but I have done it successfully in volts from a simple current loop around the source wire connected to coax terminated by 50 Ohms into a high speed scope. The scope can be replaced with a high speed charge amp or peak detector to detect the concentration of contaminants. There will be a threshold for 1 pulse per minute which then rapidly increases in rate above this threshold.
The effect of HV excitation is a migration of the charged particle which has a different property than the dielectric medium and the mobility in the fluid and its velocity under the E field determines the discharge rate like a geiger counter or a Unijunction relaxation oscillator.
In my case I was using transformer oil with a 50kV/mm ideal threshold and and a supplied rating of 25kV/mm with an actual case of these Partial Discharge (PD) events starting around 16kV/mm which were caused by silicate iron contaminants that were invisible to the naked eye.
A laser particle reflector may be useful to identify in a glass container, contaminant particles and there are Omega ion insulation ohmmeters but I found my test method to be most effective for empirical measurements.
What chemicals are involved? |
H: Which voltage source to use in PSpice?
I'm relatively new to using PSpice. I'm trying to copy over a circuit from an example I have in order to figure out the values across the resistors. I cannot figure out how to place a voltage point(without ground) on top of the circuit, with the ground on the bottom of the circuit. Which voltage component do I need to place on the top for this to work?
AI: As far as I know, you have to attach a ground connection to the back of the voltage source. PSpice hates it when you leave floating connections. If you just attach a ground to the back of whatever voltage source you want it will simulate it just the same as if it was just a voltage source at the top. I'm assuming you are using DC, so type in VDC in part search to get the generic DC voltage source. |
H: How to calculate the values of \$R\$ and \$C\$?
Greetings, it is asked given the next circuit
so that it can be calculated the values of the components \$R_1\$, \$R_2\$ and \$C\$.
Ok, Im given the next data and question (besides the values !):
\$iR_1(0^+)=20mA\$ ;
\$V_C(\infty)=76.73V\$ ;
\$PR_2(\infty)=588.8mW\$;
\$V(t)=94u_1(t)V\$ (94*unit step volts)
This says the problem, I'm writing down if this helps, don't pretend to have a question of questions. =)
How much time does it take to \$R_1\$ to reach \$6.64mA\$?
Make a graph for \$V_C(t)\$ if \$V(t)=10δ(t)\$.
Lets says the most interesting part to me is calculating the values of the elements, so the first thing done its to get the mathematical model of the system, taking the variable of \$V_C%\$, it yields as
\$V(t)=CR_1\displaystyle\frac{dV_C}{dt}+\displaystyle\frac{R_1+R_2}{R_2}V_C\$
and rewriting
\$\displaystyle\frac{V(t)}{CR_1}=\displaystyle\frac{dV_C}{dt}+\displaystyle\frac{R_1+R_2}{CR_1R_2}V_C\$
Neat!
Next to obtain the total response of the system using the Laplace transform yields:
\$V(t)=\displaystyle\frac{94R_2}{R_1+R_2}-\displaystyle\frac{-94R_2}{R_1+R_2}e^{-\displaystyle\frac{R_1R_2}{CR_1R_2}(t)}\$
and the impulse response
\$h(t)=\displaystyle\frac{94R_1R_2^2}{C(R_1^2R_2+R_1R_2^2)}e^{-\displaystyle\frac{R_1R_2}{CR_1R_2}(t)}\$
But after that, I have no right idea what to do, so taking the \$V_C\$ value as steady state then \$V_C=VR_2\$ and \$V_R1=V(t)-V_C=94-76.73=17.27V\$ and from the step response taking the permanent part can it say that
\$\displaystyle\frac{94}{R_1}=76.73\$ then \$R_1=1.225Ω\$
; to know \$IR_2\$ it is used the power form of \$P=IV\$ then \$IR_2=\displaystyle\frac{588.8mW}{76.73V}=0.007673A\$
and \$R_2=\displaystyle\frac{76.73V}{0.007673A}=10000Ω\$
But then I dont get how to get the C value.
What am I missing?
Update: Step response
- \$\displaystyle\frac{V(t)}{CR_1}=\displaystyle\frac{dV_C}{dt}+\displaystyle\frac{R_1+R_2}{CR_1R_2}V_C\$ ;
aplying the Laplace transform to the equation and the input:
- \$\displaystyle\frac{94}{SCR_1}=SV_C(S)-V_C(0)+\displaystyle\frac{R_1+R_2}{CR_1R_2}V_C(S)\$ ;
grouping:
\$\displaystyle\frac{\frac{94}{CR_1}}{S(S+\frac{R_1+R_2}{CR_1R_2})}=V_C(S)\$ ;
Using partial fractions
\$\frac{94}{CR_1}=\frac{A}{S}+\frac{B}{S+\frac{R_1+R_2}{CR_1R2}}\$ ;
\$A=\frac{R_2}{R_1+R_2}\$ and \$B=\frac{-R_2}{R_1+R_2}\$
giving the finally
$$v_c(t)=\frac{94R_2}{R_1+R_2}-\frac{94R_2}{R_1+R_2}e^{-\frac{R_1+R_2}{CR_1R_2}t} $$
OK! im refreshing the values!
AI: You are on the right track but your solution to the differential equation is not quite right. I solved it using Wolfram Alpha and this is what I get:
$$v_c(t)=\frac{R_2V}{R_1+R_2}-\frac{R_2V}{R_1+R_2}e^{-\frac{R_1+R_2}{CR_1R_2}t} $$
Or
$$v_c(t)=\frac{R_2V}{R_1+R_2}\bigg(1-e^{-\dfrac{t}{\tau}}\bigg) $$
*Where \$V\$ is the voltage from the source (94V).
Which makes sense because when \$t\rightarrow\infty\$ (capacitor is charged) all you have is a voltage divider formed by the two resistors.
Since when the step voltage is applied, the capacitor is a short, \$R_2\$ gets shorted out and all the the current has to flow through \$R_1\$ at that instant. That's why you are given \$i_{R_1}(0^+)\$. Then
$$ R_1 =\frac{V}{i_{R_1}(0^+)}$$
Where \$V\$ is the voltage from the source (94V). (@Transistor answered this in his answer)
You are also given the power on \$R_2\$ when steady state. You got this one right.
Now, in order to find \$C\$, it would be helpful to use the time constant \$\tau\$, which is the time it takes the capacitor to reach 63.2% of its final value.
$$ \tau=\frac{CR_1R_2}{R_1+R_2}$$
And
$$ C=\bigg(\frac{R_1+R_2}{R_1R_2}\bigg)\tau$$
You already have the values for \$R_1\$ and \$R_2\$, and the only unknown is \$\tau\$. From the original question I can't see anything that would force \$C\$ to be a specific value, that is, there is no given constraint on the time constant, other than \$\tau>0\$ so that the problem is nontrivial. No constraint for \$\tau\$ means no constraint for \$C\$. So any value of \$C\$ does the job.
Edit:
Answering the OP question in from the comments.
If you let \$t=\tau\$ then you should get a value for \$v_c(t)\$ equal to 63.2% of it final value. So at \$t=\tau\$:
$$ v_c(\tau)=\frac{R_2V}{R_1+R_2}(1-e^{-1})$$
Or
$$ v_c(\tau)=\frac{R_2V}{R_1+R_2}(0.632)$$
Whatever that gives you won't help you in finding a value for \$C\$. As you can see when you let \$t=\tau\$, the \$C\$ term isn't there anymore (it's embedded in \$\tau\$) so can't solve for \$C\$ from there.
The only place to solve for \$C\$ is in the \$\tau\$ equation. |
H: Relays to control both directions on tubular motor using Raspberry
I'm using a Raspberry to control a tubular motor for a window blind and I have an issue whent testing it, the relays used to operate the motor got "stuck" and stopped working after a few direction changes.
The motor has 4 cables. 1 neutral, 1 ground, 2 for each direcction. And work with 220V AC power.
I use a relay board to control the current flow to each direction.
Here is a picture of the relay board:
https://www.openhacks.com/uploadsproductos/are00108sl_1.jpg
I cound't find the direct specs of it but the relay used is:
SRD-05VDC-SL-C
https://www.ghielectronics.com/downloads/man/20084141716341001RelayX1.pdf
Here is the motor specs:
alsidoor.com/pdf/NICE/Nice-ERA-M-adapatadores-persiana.pdf
Model E M 3017
So I use 2 relays to control both directions of the motor.
And I made a software to activate one relay, and deactivate the other so I will change direction.
And it works.. but after a few changes one of the relay got stuck and didn't work anymore. I tried with another and the same happend after a while.
In the specs it says that the relay can handle up to 10A of current.. and the motor only uses 1.1 A.. so it shouldn't have any problem to handle it.
What I think it's happening is that when the change is made, the tubular motor has some inertia and consumes a boost of power to change the direction and there is where it get stuck.
My question is.. is there any way to avoid this when changing the direction?
I can make a pause between each change.. but eventually for any problem it may harm the relay anyway, so I would like a more elegant solution.
I don't really have an electronic background.. I'm a software developer so I don't know much about the specs of the pieces, I just connect the cables, but tha's why I'm asking if putting some resistence or change the relays I can fix this issue.
Any ideas?
Thanks.
AI: The Songle SRD-05VDC-SL-C data sheet found here lists the form C inductive load rating as 3A 120VAC. No inductive load rating is given for 240VAC and no mention is made of motor duty. Relays used for motor control must be capable of switching the motor starting or locked-rotor current which can be much higher than the normal running current. Because of that, relays that are designed to control motors usually have a motor power rating.
Applying a derating factor to the relay's resistive current rating is not the best way to select a relay for controlling a motor. The inductive rating that you have in this case does not necessarily apply to motor control use. If you are using the relay at 120 volts, it might be ok, but if you have tried it and are having problems, that probably proves it is not ok. If your voltage is 240 volts, it would not be at all surprising that the relay is failing.
I'm asking if putting some resistence or change the relays I can fix this issue.
Adding resistance will not help. You need to find relays that are rated for a 240 volt, 250W motor or have an inductive load contact rating that is at least several amps at 240 volts.
What you probably need is Songle SLA-05VDC-SC-A (Data Sheet) Note that this has one normally-open contact. That is all you need if you just need to connect one lead for one direction and the other load for the opposite direction. It is available mounted on a board with a driver circuit for example, here. Also note that the 120 volt HP rating is listed as 0.25 HP on the data sheet but 1 HP on the relay case. I think the data sheet is correct. Note that the motor that you have requires 250 watts input, so the output is probably not much more than half of that (1/6 HP). |
H: How can i make a circuit such that output voltage is reduced by golden ratio, using feedback
I want output voltage to equal input voltage divided by phi. Is there a way to use feedback such that i get an exact result? I don't want use numerical convergence with resisters but rather use feedback so as to create the Fibonacci pattern in electronic design.
AI: Well the golden ratio is 1.61803398875 and if you take the reciprocal and add one you get the same number so maybe you could consider using an analogue multiplier to generate the reciprocal of a voltage (call it Vx) such as this: -
Then add 1 volt to the output using a summing op-amp amp circuit (it will also convert the undesired negative output of the divider circuit to a positive value).
Finally, use negative feedback (another op-amp) to force Vx and Vout+1 to be the same value ergo you have generated the golden ratio but it's analogue so be prepared for errors.
You could, on the other hand just pick resistors that pot a voltage reference down to the precise voltage but where's the fun in that! |
H: Programmatically verifying EEPROM pins connected
I can't find really much about it online, but am curious if there is any bit-fiddling like tricks to verify all pins on a EEPROM are properly soldered/connected (particularly address pins on a parallel chip). I don't believe writing to a specific address and reading from the specific address would reveal any sort of error as within both functions a specific address pin would always be left low if disconnected (i.e. due to lack of solder, bridging, etc). I looked through the EEPROM documentation and there is no special routine in the chip to pull all address bits high to then check them all... is there any other way to check programmatically? Thanks.
AI: Put a unique pattern at the start of every \$2^x\$ block before the EEPROM is installed. This should test your address and data pins if you plan it right.
Alternatively, you can write a value to each block start (one at a time), then read all other bytes for each test and see if it shows up somewhere else. |
H: Latching Relay Driver
I've selected a potential latching relay for use in a project (switching mains power), but - having been away from electronics for a while - I'm still trying to wrap my head around a couple things. Here's the relay in question:
http://www.digikey.com/product-detail/en/te-connectivity-potter-brumfield-relays/7-1393239-7/PB2014-ND/4925213
1) It says it's rated to 3V. Will 3.3v (my microcontroller (ESP8266) voltage) hurt it?
2) There's no way my microcontorller can source (or sink) enough power to drive this. It needs a 30ms pulse (minimum) at 3V with 21Ω of resistance. If it was NOT a latching relay, I could simply set up a transistor and call it a day - however, I'm not sure how to configure it for this. I know that I'll have to hook up two IO, and drive one HIGH and one LOW (A to HIGH, B to LOW or B to HIGH, A to LOW) for the duration of the pulse in order to switch the "latch" of the relay. Seeing as the IO pins themselves can't source or sink enough power, how do I configure transistors to turn HIGH or LOW depending on the IO? Goodness, I feel like I'm missing something super obvious.
3) Does anybody spot any immediate problems with my idea to use this to switch a mains power line?
Thanks!
AI: 3V is the coil voltage. You need to put a resistor in series with a coil to get the correct voltage. Use coil resistance and voltage divider equation to find the resistor value.
Here's a typical circuit for driving a latching relay:
Obviously, ensure that the transistors are only turned on for a short amount of time, as they will sink reasonable current.
The relay contact is rated for mains voltage, so no problem. |
H: PCB with no analog and ac current and capacitor question
I'm a beginner in EE. Lastly I read a lot about this field and I want to jump in.
I think of a toy PCB design, to experiment essentially.
I picked the different hardware so that all the components have digital outputs, which is what I want to stick with (less complex, no type mixing, less costly). As well, the power source is an AC to DC adapter. So no AC in the circuit, apparently.
I get that current is not perfect in the real world. So a capacitor near a Vcc pin of an IC is needed to smooth input current and limit its own impedance.
Given these elements:
Is it still needed to put a decoupling capacitor to each ground on this DC circuit? Isn't it useful to filter high frequencies (AC) only? Do we really care about the noise a ground may have?
would an ethernet PHY really need a decoupling capacitor in this circuit? Do they generate so much spikes by themselves?
I keep seeing decoupling capacitors in the schematics I read (Raspberry Pi, Arduino, and others). But their constraints are different, I guess.
AI: @Larry you think that because this is a DC circuit then there is no need for decoupling caps. But if you have outputs that are going to do something useful then they have to switch on/off. Each time that an IC switches it creates a momentary increase in the current consumed by the IC, which in turn creates a small voltage spike on the Vcc pin of the IC. The decoupling cap is there to filter out this spike before it gets to the Vcc pin of another IC and perhaps cause it to false trigger.
The same decoupling cap on the Vcc pin of an IC filters out some of the voltage spikes (noise) that inevitably get onto the Vcc supply. Generally, decoupling caps are a very basic but essential part of electronics design. As a starting point, use the values suggested by the IC manufacturer. |
H: Questions about modelling a typical crystal radio and simulating in LTspice
This might look like an awkward question but I'm trying to model and simulate an early typical simple crystal radio in LTspice. The first reason doing this was to add a variable resistor in series to the typical crystal circuit to adjust the Q-factor for different resonance frequencies.
Here I will try to explain what I was trying to do step by step to make my questions clearer.
One can tune an R series LC tank circuit to a particular resonance frequency to select a specific bandwidth. But the Q-factor hence the sharpness of the band-pass frequency response is directly related to the resistor value R. I will try to expound on this by using the below circuit and its values:
Here are some MATLAB plot for such circuit response in different resonance frequencies (plots are Vout versus frequency plots where Vin=1V sinusoid):
Below shows the results when the tuning capacitor is set to 500pF (R=27k):
And here below plot shows the results when the tuning capacitor is set to 200pF (R=27k):
As you can see on the above plots, when the capacitor is set to 500p for 503kHz station the bandwidth becomes 12kHz which is quite good for an AM radio signals since AM needs between 5kHz to 10kHz bandwidth. But in the second plot when the capacitor is set to 200p for 796kHz station the bandwidth now becomes 30kHz which is too large for an AM band. And I thought as a remedy a variable series resistor could be used to adjust the Q-factor hence the bandwidth. And I set the resistor to 66k for again 200p capacitor and 796kHz station. Here is the result:
As you see the bandwidth issue improved. But of course this could cause some power loss if the crystal earphone is 20k and I add a series resistor to it.
So my motivation was to implement a typical crystal radio by using a variable series resistor as shown in the above diagram.
But the first thing I noticed that the crystal radio circuits I found were not like in my first figure besides the diode of course. Here are some typical circuit diagrams for the crystal radio from some google search:
As you see these circuits do not look like R series LC circuit but they are just RLC parallel circuits. So I simulated parallel RLC circuit with a diode to model a crystal radio in LTspice not my first circuit. The impedance of a crystal earphone is about 20 kohm so I modelled is as a 20k resistor. For the sake of simplicity I chosed an ordinary diode in LTspice and the modelled the antenna as an AC voltage source with 5V amplitude.
But as you might guess since this is a parallel RLC circuit the voltage across R will always be the same with the voltage source. And below is the frequency response in LTspice:
My questions are:
1-) What is wrong here? Crystal radio circuits are RLC paralel circuits? I modelled the antenna as a "voltage source" and this doesn't look like a tuning circuit in LTspice. Was that the problem?
2-) Does my "adding a variable resistor in series to adjust Q-factor" to the first circuit to improve its selectivity make sense?
AI: No, your source voltage doesn't connect across your tuned circuit.
You need to model the antenna as a short monopole of maybe 0.025 wavelengths. Now it will have a capacitive reactance of about 1000 ohms and the voltage generator will be in series with this impedance back to 0V: -
Picture taken from here.
This voltage source is in series with the capacitor (impedance ~1000 ohms reactive) at your operating frequency. Say you operate at 1 MHz (nominally), 1000 ohms is represented by 159 pF.
You should get good tuning with this but not brilliant because the headphones are still taking energy from the tuned circuit and lowering its Q factor. |
H: Need to create -5.5/+5.5 and 25.5VDC from 12VDC wall wart
I'm looking for a cost efficient way to create +/- 5.5v and 25.6v from a 12VDC wall wart supply. The product I'm working on will probably use a DC wall wart so I need a solution that will work with that.
I need these voltages to drive the GWTS80MNFG1E by Solomon goldentek display. The 5.5v is supplied for the display driver chip while the 25.6v is used to drive the backlight. There is also 3.3v and gnd to be connected but I already have those on the dev kit I'm using along with 12v and 5v.
According to the datasheet max current draw should be 80mA for the 5.5v supply and the backlight current should be around 75mA at 25.6v. Max current draw for the 3.3v supply is listed as 50mA.
Ideally I'd like to breadboard the solution so I can test the display before designing a board.
Thanks for helping!
B
EDIT: I decided on the TPS65132 by TI which I'll power using the 5V on my board. For the LED driver I'm going to try using FAN5333 (not sure yet if I will be able to drive the 3 strings of 8 LEDs each with each string wired in parallel to the other one...)
AI: As other stated, there are thousands of solutions out there. You also do not mention how much current you require, so making the assumption here that yours is a relatively low current (circa 2A) requirement.
One such possibility is to use the LT1941 from Linear Technology. This is a triple monolithic switching regulator. To quote the data sheet:
"Two of the regulators are step-down converters with 3A and 2A power switches. The third regulator can be configured as a boost, inverter
or SEPIC converter and has a 1.5A power switch"
Here's the link for more info: LT1941 Triple Monolithic Switching Regulator. On the down side, you really do need to prototype on PCB given the nature of the application and the relatively high switching frequency (1.1MHz).
Another possibility is the ti LM5001 regulator. Here's a good design resource for using the LM5001 in different topologies. You can use the LM5001 in a fly-back configuration to obtain your three desired. More design resources can be found on both Linear Technologies and Texas Instruments sites. As far as cost goes, the LM5001 is also slightly cheaper than the LT1941, but do consider that the LT1941 packs a lot more features on-chip. |
H: How do I use Circuit Lab to show me Voltage and current information on this circuit?
I have a bunch of red LEDs, I don't have their data sheet and I am trying to figure out a safe resistor to use to lower the current across them safely.
My current setup is as follows:
simulate this circuit – Schematic created using CircuitLab
I figured a 100 Ohm resistor and 68 ohm resistor in series because, assuming a forward voltage of the led of 3 volts, and a desired current of 20mA (which I assume is ok?) I get:
R=V/I
R=3.3/0.02
R=165 Ohms.
So, I pop that into the circuit lab as shown below, click run, then click DC simulation, but then it just throws an error saying : "unable to get solution"
How do I use this tool to allow me to inspect various values at various points in the circuit? Have I got this wrong somehow?!
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. Add a GND to the schematic so the simulator has a zero volt reference.
Figure 2. Add nodes at the points you want to monitor. Rename them to suit your purposes. Run the DC solver.
Figure 3. Click each named node to add it to the DC solver tab.
Figure 4. Click on a wire to monitor the current. |
H: Filter design for piezoelectric transducer
I'd like to use a piezoelectric transducer at one of its resonant frequency (4500 Hz). In order to get a clearer signal, I would like to use a band-pass filter.
First of all I calculated the impedance of the piezoelectric transducer. To achieve that, I put a variable resistor at the output of the transducer:
simulate this circuit – Schematic created using CircuitLab
Then I generated an audio signal with a frequency of 4500 Hz, and measured for two different values of Ri the amplitude of the voltage V across the variable resistance.
For both values, I used the formulaRi/(Ri+Z)=V/V1, which allowed me to calculate Z (I found 12 kOhms). Is the method correct?
Now my problem is: I'd like to apply a band-pass filter, with a centre frequency of 4500 Hz, and a band-width of a few hundreds Hz. But according to the formulas I've found for RLC band-pass filters, it seems that I will need an inductance definitely too big to reach such a BW. What would be the best way to implement the band pass filter, preferably with passive components? Thanks!
AI: I would use this basic circuit with rail to rail Op Amp single supply but move all the grounds to Vbat/2 with split R's ,
then use a trimpot for the output divider to change Q
Q = f/BW. you indicate few hundred Hz or a Q=15
then choose input R > 15k to 100k
easy formula exist for this active BPF.
Choose a low noise Op Amp with low current .
wide range of supply voltage options are available
any questions?
Yes LC BPF will need large inductors, not feasible or accurate due to large tolerances.
If you want wide bandwidth but steeper out of band rejection and high sensitivity, you can use two stages cascaded with any gain that you want.
This site has an auto-design input.
1% values can be selected to the nearest part or changed on the linked site. But again for a single supply, dc gnd must be changed to Vbat/2. |
H: Is this transistor switch circuit designed correctly?
I am making a little home made electronics project.
The plan is to turn on a Red LED when a SCART input is sending an RGB signal. Pin 16 on a SCART cable is 1-3V when the input is carrying an RGB signal (according to wikipedia - in my case it actually sends 4.5V so I figure this is quite a flexible spec).
The circuit I have designed works....but I don't know if it is safe, or done correctly! Please see the schematic below:
simulate this circuit – Schematic created using CircuitLab
I have 2 main questions:
I don't seem to need the 1k Ohm resistor leading to the base of the transistor. I assume any voltage applied to the 2N3904 base will switch the circuit on...so this is just keeping a low current to prolong the life of the transistor?
The circuit doesn't work unless I cannot Pin 21 of the SCART input up to the ground of the main circuit. I don't know if this is safe, or the correct way to make this circuit work, can you validate my decision here.
AI: 1) The 1k ohm resistor IS necessary. The base - emitter junction of a transistor is a diode, and the voltage drop of a silicon diode is ~0.7 V. The transistor will allow as much current to pass as it need to to clamp that voltage to less than 0.7 V. This will interfere with the signal, as the RGB signal is indicated to the receiving device as a signal greater than 1V (1-3 V according to wikipedia: https://en.wikipedia.org/wiki/SCART).
In order to keep interference to a minimum, I would probably use an analog buffer (https://en.wikipedia.org/wiki/Buffer_amplifier#Voltage_buffer_examples) instead of a transistor to turn on the LED, but if you find it doesn't interfere, there isn't much reason to change it.
2) If you find that pin 21 works as a ground for you, it shouldn't cause any damage. Looking at the pinout on that same wikipedia page, I would go with pin 18 instead. Pin 18 is specifically a ground for the signal on pin 16. Either way, a common ground is necessary for the signal to be able to turn on the transistor. |
H: Amplifier impedance compatibility
Amplifier ICs always list the maximum load the amplifier is stable with. For example, a class AB amplifier is listed as 8 ohm capable.
Is that amplifier suitable to drive a 32 ohm load?
Are there any attributes that make an amplifier better suited to drive a lighter load vs a heavier load?
If a similar amplifier is 4 ohm capable, is it less suited to drive a 32 ohm load?
AI: A really good audio amplifier will have an internal driving impedance very near zero ohms. For light loads, like your 32 ohm example, less audio current is required of the amplifier compared to a load of 8 ohms. That 32 ohm load will receive very close to the same voltage as the 8 ohm load. With less current, the 32-ohm speaker will receive less power than the 8 ohm speaker, and all other things being equal, will sound less loud.
The amplifier designer may guarantee that ten watts can be delivered to an 8-ohm load. He/she ensures that enough current can be delivered with low distortion (specified in the spec sheet). That same amplifier cannot deliver ten watts to a 32-ohm speaker - it could easily deliver the (smaller) current, but cannot deliver the larger voltage without distortion - the top and bottom peaks will clip.
Some amplifiers have enough current capability to drive 4-ohm speakers. In many cases, the internal DC supplies that feed the amplifier will sag, so that you don't quite get twice the power compared to a 8-ohm speaker. Such amplifiers will state how much power can be delivered to a 4-ohm load, within a distortion spec. Less-capable amplifiers cannot deliver the current required by a 4-ohm load, and may overheat, blow a fuse, or distort excessively.
10W into various loads:
32 ohm 1.58 A (p-p) 50.6 V(p-p)
16 ohm 2.24 A (p-p) 35.8 V(p-p)
8 ohm 3.16 A (p-p) 25.3 V(p-p)
4 ohm 4.47 A (p-p) 17.89 V(p-p)
A class AB amplifier is driven by a DC power supply that is usually designed to output a fixed voltage - enough to deliver the peak-to-peak voltage of a sine wave without clipping. For an 8-ohm speaker, the DC supply would be somewhat higher than 26 volts. If that power supply is "beefy" enough to deliver excess current, and if the amplifier transistors (and heat sink) have excess current capability, then it will likely be able to drive a 4-ohm load, delivering more than ten watts. |
H: H Bridge not working with two DC motors on paralell -- Arduino
I've done a simple H Bridge with 5V relays and 2N2222A transistors using Arduino Nano, just like this one:
A 6V 4A battery supplies the Arduino (on Vin). Relays are supplied with 5V of the Arduino, but the Normally Open Contacts are connected to 6V.
When I connect just one DC motor, the H Bridge works fine. But If I want to connect two motors in parallel to the Common Pins, the relay I'm activating sounds, but the motors don't move, then, after some seconds, the Arduino restarts itself (because the Bluetooth module that I'm using disconnects itself and the LED of the Arduino blinks like when you reset it).
Also, if I connect the second motor in parallel while the first one is moving, it works fine, but then, if I try to invert direction, it happens what I said before: Arduino restarts itself.
AI: The torque output of an electric motor is directly proportional to the motor current, and the current (I) is roughly equal to
Where V is the motor supply voltage, R is the winding resistance and ε is the back-electromotive force (back EMF).
The back EMF is the voltage that would be present at the motor terminals without anything being connected. It is produced by the motor acting as a generator, if you will, and it's proportional to the rotation speed.
If you connect an unloaded motor to a power supply, it will speed up until the back EMF exactly cancels out the supply voltage and then spin at a constant speed. If torque is demanded from the motor (even just the slight friction of spinning), it reaches a speed where the winding resistance lets just enough current to flow to balance any torque.
When you first switch your motor on, the speed is zero. This means that the back EMF is also zero, so the only things limiting the motor current are the winding resistance and the supply voltage. A motor which is rated for 500 mA and draws 50 mA without any load at 6 V might very briefly draw several amps of current when first switched on.
Apparently your setup somehow manages to supply this inrush current of one motor, but two motors starting at the same time draw so much current that the supply voltage drops below the level required by the arduino to function, causing it to reset and release the relay.
You need to limit the current draw of your motor when it first starts up so that the voltage stays stable. There are several ways to do this:
The simplest method is to add a current limiting resistor in series with the two parallel motors. For example, a 10 ohm resistor would limit the current to a maximum of 600 mA, assuming a 6 V supply. The resistor has to be a 3.6 W (or better rated) power resistor. The drawback is that you are wasting power in the resistor, and your maximum torque at speed will be severely limited.
You can use a current limiting resistor in combination with an extra relay, so that you can remove the resistor from the circuit after the motors have reached their full speed.
The optimum way is to use a semiconductor motor driver. They are more complicated to control, but they allow control over the average motor voltage (via pulse width modulation) and thus of the motor speed. By slowly ramping up the voltage from zero, you can keep the difference between the motor voltage and back EMF ("speed induced voltage") low, and consequently keep the current low. |
H: Is it noticeable if audio is inverted?
I'm looking at the LM4881 headphone amplifier. The amplifier uses an inverting OpAmp style set up.
What is the effect when audio gets inverted?
Will a difference be noticed or do we hear inverted audio all the time and never notice?
Should there be a second inverting stage to keep the audio the same?
AI: No, there's absolutely no difference if the audio signal is inverted or not.
You only get in trouble if you try to combine sources where one is inverted and the other is not, for example if you connect one speaker in reverse in a stereo system. Then the audio waves will cancel. This is usually immediately obvious. |
H: Fuse link system for LED bulbs?
I recently learned how incandescent Christmas bulbs can be modified to continue conducting electricity after burning out thanks to a fuse link that bridges the two leads at the base of the bulb.
When the filament burns out and stops conducting, the entire circuit voltage is briefly across the fuse link. This voltage is greater than the breakdown voltage of the insulator on the fuse link, which causes the insulation to break down and turns the fuse link into the new direct path.
I was curious about how something similar could be accomplished with LED bulbs. If it would use the same system, where in the LED would the fuse be placed?
Side note: I'm new. If my terminology is wrong, please let me know so I can do better research in the future!
AI: Yes, such a protection device exists for LEDs. It's based on a circuit that triggers an SCR when there's more than normal LED forward voltage across it:
LED shunt protector |
H: Half bridge galvonic gate drive with deadtime
I'm a Tesla enthusiast and build Tesla coils now and then. One thing I have always wondered, a lot of designs (some very popular) utilize a transformer to drive a N-MOS half bridge (see image below). My concern with this, and simulations have shown it to be true, shouldn't this type of a design result in a high amount of shoot though since there is no dead time incorporated?
With that being said, I would love to get away from bootstrapping my driver and forcing it to be sitting on the high voltage rails (debugging and inspection with a scope gets much easier). My problem is I do not see an easy way to incorporate dead time.
The only method I see to add dead time and have galvanic gate drives would be to use a full bridge driver to sink and source current to two independent drive transformers and hackishly bypassing the bootstrap drive tying it to vcc.
So my questions are:
Do you agree with my assessment that for switching at 200khz, the design illustrated should have the bulk of its power losses due to shoot though?
Does anyone see a way with to easily employ dead time with galvanic isolation without using a full bridge driver as explained above?
AI: No. The two 1n4148 diodes ensure that when the gate drive transformer secondaries start to reverse their polarities, the currently conducting IGBT turns off faster than the currently blocking IGBT, creating a very bried period where both are off (the dead time). This is because the parasitic gate capacitance of the IGBT to be turned on has to be charged trough the 6.8 ohm resistor, while the gate charge of the opposite IGBT can bypass the resistor by flowing trough the diode.
Fully isolated MOSFET/IGBT drivers for this purpose do exist, if you need more control over the transistors and/or if you want even faster switching. Digikey lists over a thousand isolated gate drivers, e.g. ucc21520 |
H: What is symmetrical output voltage swing?
what does it mean by symmetrical output voltage swing (Amplifier)? Vcc = 10V.
It is a basic, but i can't find any reasonable answer for this question. I am almost a beginner in electronics.
AI: The voltage swing is a term that describes how much the output of an OpAmp can swing around its equilibrium state. It is also measure of how close the output of an OpAmp can move to either one the supply rails.
If the output can move the same amount to higher and lower voltages the swing is said to be symmetrical.
E.g. for a +10/-10V supply the swing could be from -9 to 9V, with 0V at the output when the signal is zero. Another possibility would be to have a +10/0V supply and a swing around 5V, for example from 1V to 9V. |
H: What is the difference between power inductors and decoupling inductors?
I am trying to pick an inductor for use with switching regulator with switching frequency of 500KHz.
I looked at single inductor manufacturer which has two line up. One saying "Inductors for Decoupling Circuits", and the other saying "Inductors for Power Circuits."
The links to datasheets are below.
[Datasheet] Inductors for Decoupling Circuits
[Datasheet] Inductors for Power Circuits
What are the difference between the two other than the current capacity?
May I use any of them if both fits my current budget?
AI: Those two data sheets make it difficult to compare like with like, as the power inductors have two rated currents (inductance and thermal), whereas the decoupling inductors have a single rated current, and a minimum Q.
In my designs, I have two different applications, both of which require things called inductors. They both require a certain current to be supported while maintaining a minimum inductance.
The first application is in a power supply filter network, where some degree of dissipation in the ferrite at high frequency is positively beneficial. It damps down resonances between components, and absorbs RF signals that I don't want crawling between one module and another. Even those inductors look a bit 'lively' for my tastes, and I usually end up using 'impeders', which have a specified loss at RF.
The second application is energy storage, in dc-dc converters for instance. Here, any power dissipation in the ferrite is a bad thing, it all contributes to overall inefficiency in a converter design.
You can't really optimise designs for either of these applications from a brief datasheet alone. You need a detailed data sheet, and then investigation on a bench with the appropriate test gear. Though using components from the manufacturer's suggested range is a good start. |
H: Why does a longer fiber optic cable result in lower attenuation?
I just carried out an experiment in my college to study the attenuation of fibre optic cable versus length and type of cable.
This experiment was carried out with an LED light source and a power meter connected at the other end.
The wavelength is set to 1300nm and the results obtained as follows:
Single Mode (1meter) = -36.14 dBm
Single Mode (10meter) = -36.12dBm
Multimode (1meter) = -35.94dBm
Multimode (10meter) = -18.48dBm
Anyone could explain to me why as the cable gets longer, the received power gets higher and also why multimode fiber optic cable has higher received power than single mode cable?
AI: This is where the measurement scientist has to go into full sceptical and investigative mode.
First thing. Fibre, as a passive material, is lossy. It absorbs power. Therefore the power arriving at the end of a length of fibre will be less than was launched. Period. No arguments. We don't do over-unity here.
So what causes your observations?
Single mode, 1m -36.14dBm, 10m -36.12dBm
How repeatable are your measurements? Break down and rebuild the connections, and measure again, several times (min 3, but 5 or 10 would be better). Only then can you see whether 0.02dBm is a significant physical effect or whether it's a lucky coincidence.
Measure 20m, and 30m. Is 0dB +/- 0.1dB a reasonable absorption level for 10m of fibre? I don't know, that's what you are measuring. You can be assured that the fibre loss in dB will be additive for longer lengths (for single mode, if there are multiple modes propagating this may not be true for the total power, but it's still true for each mode), so (once you're in single mode operation) you should be able to draw a linear graph of fibre length against dB loss. Remember, 2 points makes a very statistically poor graph.
And finally, I used the phrases 'arriving at the end' and 'the power that was launched'. The power in the fibre isn't necessarily the same as in the test gear. The interfaces will create uncertainty, they lose power. The power losses depend on axial alignment, the gap, the fibre face surface finish (so how well it was prepared). I would be completely unfazed by a measurement showing that a short length of fibre had a lower loss than just the source directly into the receiver, because it's about optical coupling efficiency.
Further to the repeatability measurements I asked you to make above, that's not just several repeat assemblings of the same components (which is measuring your variability), but also doing it again for different samples of nominally the same components (the variability of the system and whether the tools and methods you are provided with work repeatably). So make 3 or more samples of 1m fibre, and compare them.
Single mode 1m 36.14dBm, multimode 1m 35.94dBm
Again, characterise your repeatablity, before you jump to any conclusions on whether a measured difference of 0.2dB is significant.
Single and multi mode fibres might have different optical apertures, so have different coupling losses, quite independent of their transmission losses. Prepare some 'zero length' fibres, or as near zero as the apparatus allows, and measure those. And do 10m, 20m, 30m plots for both. Then you can start saying that there is a significant difference between them.
Multimode 1m -35.94, 10m -18.48dBm
No. Given your other measurements above, something's wrong. You've spilt coffee on the apparatus, or someone's adjusted something while your back was turned, for a laugh. Measure again.
So you thought making measurements and drawing conclusions was easy? No. Test any difference you see against your experimental repeatability. Vary one factor at a time. Consider all possible factors and control for them all. Remember, if a difference is real, it will persist as you make repeated measurements. If you just see something one time, is it the effect, is it you, is it something you hadn't thought of? |
H: Measurement of a signal at microcontroller's output pin
I have a control board with a microcontroller in BGA package.
I need now to measure a signal on some microcprocessor's
output pin. The problem is that there is no test point around
the microcontroller on the PCB. Does it exist any possibility
how to get to the output pin without a test point? Thanks for
any advice.
AI: Does the control board have JTAG? JTAG offers "boundary scan", a way of determining each and every input and output pin on the chip - plus the values of internal registers and all sorts of other things. Of course, it means you need it connected to the JTAG chain, and a JTAG connector, and a JTAG probe, and software to drive it.
Otherwise, @ScottSeidman is right: you're out of luck. |
H: Switch off on overvoltage
How is it possible to modify this reverse polarity protection circuit, to switch off when more than 5.5V will be applied.
I was thinking about voltage divider, and zener diodes, or voltage comparator linked to gate of MOSFET, but I'm not sure which way is better one.
I have DDS generator which requires 5V , 100mA and I'd like to avoid using voltage regulator due to voltage drop. So I could power it up from 5V and in the same way it will switch off if reverse polarity connected or more than 5V was provided.
Thank you
AI: One way to do it is as shown below.
D1 provides reverse voltage protection and U2 is used to generate the shutdown signal for Q1.
In use, VIN is set to zero volts, R1 is set to maximum resistance, and the load (R5) is connected.
Then, VIN is increased until VOUT rises to the desired trip point voltage.
R1 is now decreased until VOUT falls abruptly to zero volts and, finally, VIN is rocked back and forth around the trip point while monitoring VOUT, just to make sure there are no problems.
The plot was made using LTspice, setting R1 to 12.7k, R2 to 1k, and varying VIN between -6 and +6 volts.
The image can be viewed full-screen by left-clicking the image, and the LTspice circuit list follows the plot just in case you want to play with the circuit.
Version 4
SHEET 1 1252 680
WIRE 192 0 160 0
WIRE 224 0 192 0
WIRE 336 0 288 0
WIRE 496 0 336 0
WIRE 608 0 496 0
WIRE 768 0 704 0
WIRE 800 0 768 0
WIRE 336 96 336 0
WIRE 496 128 496 0
WIRE 528 128 496 128
WIRE 656 128 656 64
WIRE 656 128 608 128
WIRE 656 176 656 128
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WIRE 160 208 160 0
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WIRE 336 288 336 176
WIRE 416 288 336 288
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WIRE 336 464 160 464
WIRE 496 464 496 416
WIRE 496 464 336 464
WIRE 800 464 800 256
WIRE 800 464 496 464
WIRE 160 528 160 464
FLAG 160 528 0
FLAG 192 0 VIN
FLAG 768 0 VOUT
SYMBOL res 784 160 R0
SYMATTR InstName R5
SYMATTR Value 50
SYMBOL voltage 160 192 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(-6 6 0 1 1 .1)
SYMBOL res 320 80 R0
WINDOW 0 -54 33 Left 2
WINDOW 3 -71 65 Left 2
SYMATTR InstName R1
SYMATTR Value 12.7k
SYMBOL res 320 320 R0
WINDOW 0 -49 39 Left 2
WINDOW 3 -57 67 Left 2
SYMATTR InstName R2
SYMATTR Value 1.0k
SYMBOL schottky 224 16 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value 1N5817
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL pnp 704 64 M270
WINDOW 0 50 62 VLeft 2
WINDOW 3 77 90 VLeft 2
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL res 640 160 R0
SYMATTR InstName R4
SYMATTR Value 1k
SYMBOL res 624 112 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL Comparators\\LT6703-3 496 304 R0
SYMATTR InstName U2
TEXT 184 488 Left 2 !.tran 2.1 |
H: thyristor equation
I know how does an I-V curve of a thyristor look like, but is there any thyristor equation that can represent the curve?
AI: Each straight line can be characterised by an equation based on 2 transistors.
The breakover or trigger voltage is the same as any power transistor, Vbe and current gain for trigger current,
the foldback negative resistance depends on gm in two transistors and resulting saturation voltages plus 1 diode drop and Rs or ESR.
The follow-on positive resistance depends on the power rating and junction size - the Rs or ESR is proportional to Pd power rating of the device. e.g. Rs=k/Pd where k is approximately = 1
( the same applies to all diodes and LED's ) with a wide tolerance
the reverse characteristics are likely similar to transistor PIV breakdown. |
H: LM741 not amplifying
I used LM386 to amplify but its minimum 20x gain is to much for me use because my signal is maximum +-0.5v ac , riding 1V dc .
this is my circuit.
I am seeing a signal on scope but I cant hear anything when I connect the speaker [I am measuring without it].
Moreover the scope image is the same as the input image ,no gain !
I can't see what I missed here
AI: You haven't asked a question. Am assuming that your question is: why is no audio heard from the 8-ohm speaker?
Although JimDearden has given a decent proposal, here you'll find why your's may have failed...
The LM741 spec sheet from Texas Instruments has a key spec: internal current limiters allow no more than 25 mA to flow in or out of the pin 6 output pin. This puts a severe limit on how much signal can be delivered to that very small 8-ohm load. If your input signal is riding on a 1v DC signal, then the 741 output will try to amplify this 1v to yield -5v at the output pin. Such a large output will invoke the internal current limiter to put a steady 0.2v DC across that 8-ohm load.
Even if you were to reduce that DC offset to zero volts, for any input signal voltages larger than +/- 40 mV, those same current limiters will kick in. The result will be rather low-amplitude output from the 741 - you might be able to hear it, but not easily except in a very quiet room. If you turn up the amplitude, the current limiters will clip, causing annoying distortion. Some op-amps can deliver more current, but they're generally not designed for this kind of service into such low-impedance loads. |
H: AVR Pointer Atomicity
On the AVR XMEGA, or any AVR, is it safe to do pointer operations, like passing by reference and accessing pointers while interrupts are on? I keep feeling like I need to wrap each pointer operation into an ATOMIC_BLOCK() macro. Is this necessary? Also, I need to copy a structure with like 30 bytes of data, should this be in an ATOMIC_BLOCK()?
The AVR address bus is 16 bits, and takes two cycles to access a pointer, correct?
AI: Why are you worried about pointers in particular? They are really just variables like any other.
The key issue with concurrency, such as between non-interrupt code and interrupt code, is when you have two concurrent threads that access, or more importantly, modify the same variable (whether it is a pointer or not). It is those shared variables that you need to consider protecting, especially if the operations on them are not intrinsically atomic.
Operations on non-shared variables (or pointers, or structures) do not need any special treatment.
If you do share a pointer between concurrent threads, keep in mind that any data that the pointer points to also needs to be considered "shared data" and needs to be given the same considerations. |
H: Why is the signal sawtooth shaped?
I am currently working with interfacing a stepper motor (4-pin bipolar), and providing it the propper input signal, such that it accelelrate and decellerate correctly.
In recently also across an application note by atmel (link), which adresses this issue, and also provides the code for programming a timer to do so which is available on github (github).. (Perfect)
Since i already have the driver, i don't need to provide it a 4 pin signal (A+,A-,B-,B+) but only a pulse modulated signal, with a increasing and decreasing the frequency for a given amount of steps.
I changed the ISR routine, as it seemed to be where the step signal seemed to be generated, and changed it to toggle the state of the step_pin everytime an interrupt occured, thus recreating a PWM signal. Problem is though that signal doesn't resemble that, and if i remove the Serial.print() become the signal a sawtooth shaped signal.
ISR(TIMER1_COMPA_vect)
{
// Holds next delay period.
unsigned int new_step_delay;
// Remember the last step delay used when accelrating.
static int last_accel_delay;
// Counting steps when moving.
static unsigned int step_count = 0;
// Keep track of remainder from new_step-delay calculation to incrase accurancy
static unsigned int rest = 0;
OCR1A = profile.step_delay;
Serial.print('\n');
Serial.print("step_delay: ");
Serial.println(profile.step_delay);
Serial.print('\n');
switch (profile.run_state)
{
case STOP:
step_count = 0;
rest = 0;
TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); // Stop the timer, No clock source
break;
case ACCEL:
digitalWrite(step_pin,!digitalRead(step_pin));
//delay(1);
//digitalWrite(step_pin,LOW);
step_count++;
profile.accel_count++;
new_step_delay = profile.step_delay - (((2 * (long)profile.step_delay) + rest) / (4 * profile.accel_count + 1));
rest = ((2 * (long)profile.step_delay) + rest) % (4 * profile.accel_count + 1);
// Chech if we should start decelration.
if (step_count >= profile.decel_start)
{
profile.accel_count = profile.decel_val;
profile.run_state = DECEL;
}
// Chech if we hitted max speed.
else if (new_step_delay <= profile.min_time_delay)
{
last_accel_delay = new_step_delay;
new_step_delay = profile.min_time_delay;
rest = 0;
profile.run_state = RUN;
}
break;
case RUN:
digitalWrite(step_pin,!digitalRead(step_pin));
//delay(1);
//digitalWrite(step_pin,LOW);
step_count++;
new_step_delay = profile.min_time_delay;
// Chech if we should start decelration.
if (step_count >= profile.decel_start)
{
profile.accel_count = profile.decel_val;
// Start decelration with same delay as accel ended with.
new_step_delay = last_accel_delay;
profile.run_state = DECEL;
}
break;
case DECEL:
digitalWrite(step_pin,!digitalRead(step_pin));
step_count++;
profile.accel_count++;
new_step_delay = profile.step_delay - (((2 * (long)profile.step_delay) + rest)/(4 * profile.accel_count + 1));
rest = ((2 * (long)profile.step_delay)+rest)%(4 * profile.accel_count + 1);
// Check if we at last step
if(profile.accel_count >= 0)
{
profile.run_state = STOP;
}
break;
}
profile.step_delay = new_step_delay;
}
The ISR routine is here..
ISR(TIMER1_COMPA_vect)
{
// Holds next delay period.
unsigned int new_step_delay;
// Remember the last step delay used when accelrating.
static int last_accel_delay;
// Counting steps when moving.
static unsigned int step_count = 0;
// Keep track of remainder from new_step-delay calculation to incrase accurancy
static unsigned int rest = 0;
OCR1A = profile.step_delay;
Serial.print('\n');
Serial.print("step_delay: ");
Serial.println(profile.step_delay);
Serial.print('\n');
switch (profile.run_state)
{
case STOP:
step_count = 0;
rest = 0;
TCCR1B &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); // Stop the timer, No clock source
break;
case ACCEL:
digitalWrite(step_pin,!digitalRead(step_pin));
//delay(1);
//digitalWrite(step_pin,LOW);
step_count++;
profile.accel_count++;
new_step_delay = profile.step_delay - (((2 * (long)profile.step_delay) + rest) / (4 * profile.accel_count + 1));
rest = ((2 * (long)profile.step_delay) + rest) % (4 * profile.accel_count + 1);
// Chech if we should start decelration.
if (step_count >= profile.decel_start)
{
profile.accel_count = profile.decel_val;
profile.run_state = DECEL;
}
// Chech if we hitted max speed.
else if (new_step_delay <= profile.min_time_delay)
{
last_accel_delay = new_step_delay;
new_step_delay = profile.min_time_delay;
rest = 0;
profile.run_state = RUN;
}
break;
case RUN:
digitalWrite(step_pin,!digitalRead(step_pin));
//delay(1);
//digitalWrite(step_pin,LOW);
step_count++;
new_step_delay = profile.min_time_delay;
// Chech if we should start decelration.
if (step_count >= profile.decel_start)
{
profile.accel_count = profile.decel_val;
// Start decelration with same delay as accel ended with.
new_step_delay = last_accel_delay;
profile.run_state = DECEL;
}
break;
case DECEL:
digitalWrite(step_pin,!digitalRead(step_pin));
step_count++;
profile.accel_count++;
new_step_delay = profile.step_delay - (((2 * (long)profile.step_delay) + rest)/(4 * profile.accel_count + 1));
rest = ((2 * (long)profile.step_delay)+rest)%(4 * profile.accel_count + 1);
// Check if we at last step
if(profile.accel_count >= 0)
{
profile.run_state = STOP;
}
break;
}
profile.step_delay = new_step_delay;
}
main
#include "speed_profile.h"
void setup() {
// put your setup code here, to run once:
cli();
Serial.begin(230400);
output_pin_setup();
timer1_setup();
sei();
}
void loop()
{
// put your main code here, to run repeatedly:
Serial.print("start");
Serial.print('\n');
int motor_steps = 10000;
// Accelration to use.
int motor_acceleration = 10;
// Deceleration to use.
int motor_deceleration = 10;
// Speed to use.
int motor_speed = 500;
compute_speed_profile(motor_steps, motor_acceleration, motor_deceleration, motor_speed);
Serial.print("NewRound");
Serial.print('\n');
}
output_pin_setup();
void output_pin_setup()
{
pinMode(en_pin,OUTPUT);
pinMode(dir_pin,OUTPUT);
pinMode(step_pin,OUTPUT);
}
The rest if the code is the same as before, and available on github.
I know i am doing something wrong here? but how do i create the desired signal?
here is the schematic of the setup:
Edit - Setup output_pins()
I use the function setup_output_pins()
To setup the output pins, i did though read somewhere that wasn't a good idea as the arduino need some time to settle or something?
AI: Since this question was regarding why i am getting a sawtooth signal rather than a square signal, will this answer "close" this question.
@Marko Buršič mentioned that the issue might have been that the Pins were floating, seemed to have been the case. initiliazing them in the setup routine fixed the issue I had and provided me with the desired square shaped signal. |
H: Do high-temperature rated coin cells exist?
I'm currently working on a project that will implement a coin cell as its primary power source. My PCB will likely be exposed to high temperatures ranging from 100C upwards. Now I realize that I will likely need a proper enclosure along with other cooling capabilities, however, I would still like to select the highest temperature rated coin cell possible.
So I'm curious if anyone is aware of coin cells that possess high temperature ratings. Also, what would determine whether or not a coin cell possesses high temperature rating? Would it primarily be based upon battery type (alkaline, lithium, etc.), or would it depend primarily on how the battery was manufactured?
Thanks!
AI: Lithium thionyl chloride primary cells have been rated up to 150degC, but you will need to consult the manufacturer with regards to cell size and actual temperature rating. |
H: Getting more volts out of 3.7v battery
I have a 3.7v 12A rechargable battery I'm using in my electric cigarette. I noticed that the cigarette can go up to 75W. I want to turn 3.7 into 9v to give more voltage to my motor, what component can I use to do this? Thanks!
AI: Not a single component, but a boost converter is what you're after. |
H: How does shift register works as I/O multiplexer
I was checking on eBay for a CNC controller. I came across this unit, which provides 64 buttons. The micro is a 28pin PIC chip but there are 8x LS165A IC's on it. I am guessing there is some sort of multiplexing is going on, since the 28 pin PIC can not provide that much of I/O. But I cant figure out what exactly is going on here, I would appreciate if someone can explain a little bit.
Here is the bottom view. There are not much traces going to the PIC chip that makes me even wonder more!
AI: Study how a shift register works.
What's happening here is that the microcontroller sends out a serial bit stream where each bit position corresponds to one particular shift register output. The micro sends the clock and data out to the shift register chain, then issues the Strobe pulse which sends the data to the output latches.
This isn't multiplexing. The data at each output of the shift register is stable and remains stable until changed by the controller. |
H: Difference between reading data from fifo and the register
I am currently working on a hardware design as a part of my project in verilog.
I am fully aware that we usually use the registers to break the datapath which in turn helps us achieve timing closure. However I am not really sure if reading data from the fifo has the same effect.
So basically if I am reading data directly from the fifo and sending it some other module, do I need to register the data to break the datapath or fifo will take care of this ?
Thanks.
AI: It does break the timing path the same way a register does (presuming the FIFO is proerly designed), but you also have to take the setup and hold times of the FIFO itself into consideration. Usually the setup, hold, and clock-to-output times of standard flip-flops are much better than for the block RAM modules usually used to build FIFOs. This means that you may still have timing issues if, say, the clock-to-output delay of the block RAM in the FIFO is large. You may still need to add flip-flops to the input and/or output of the FIFO module to improve the timing performance. |
H: Determining state-of-charge of a lead acid battery under load
I am trying to implement an extremely simple lead acid battery state-of-charge (SOC) estimation calculation. The following values are known:
\$V_F\$ for SOC=100%: Open circuit voltage of the battery when full
\$V_E\$ for SOC=0%: Open circuit voltage of the battery when empty
\$V\$: The real-time terminal voltage
\$I\$: The real-time load current
Using \$V_F\$ and \$V_E\$, if you know the present \$V_{OC}\$ (open circuit voltage), you can calculate the SOC using this simple formula:
$$
SOC = \frac{V_{OC}-V_E}{V_F-V_E}
$$
A common issue, and my problem, is that I can't afford to stop using the battery long enough (up to 12 hours according to some of the literature) to get a stable read on \$V_{OC}\$.
So, can I use the load current and terminal voltage to approximate \$V_{OC}\$, and then calculate the SOC?
I'm fine with a rough estimate (80% accurate or so), and possibly some method which calibrates periodically whenever I know (by some other means) that the battery is full or empty.
AI: A typical profile for a battery is shown below:
As you can see, say from 10% to 90% state of charge (SOC), the open circuit voltage, \$V_{oc}\$, pretty much behaves linearly. Note that the profile depends on whether you are charging or discharging, but the behavior is about the same.
Say your battery has a capacity called \$C_{nom}\$ in units of Ampere-hour. Then, the state of charge (\$soc\$) (a unitless quantity) is:
$$soc=\frac{Q}{C_{nom}}$$
Where \$Q\$ is the charge on the battery at time \$t\$. Now, if you know the current that you are drawing from the battery, you can determine \$Q\$ since
$$\frac{dQ}{dt}=-i_{bat}(t) $$ or equivalently,
$$Q(t)=-\int{i_{bat}(t)dt} $$
The negative sign because the battery is being depleted. If you were charging the battery, this sign is positive. You could now re-write the state of charge as follows:
$$soc=-\frac{1}{C_{nom}}\int{i_{bat}(t)dt} $$
If you look closely, the state of charge remains a unitless quantity, as it should, since \$C_{nom}\$ is in Ah and so will be the integral of the current (For sure, Amps times some unit of time).
To better show what I am modeling here, look at the following circuit:
simulate this circuit – Schematic created using CircuitLab
You could easily derive what I did from that circuit, notice that I haven't added the typical loss resistor in series with \$V_{oc}(soc)\$, which I am guessing you want to omit.
As you see that \$V_{oc}\$ is a function of the \$soc\$ as expected. One caveat though, is that you need to guess an initial state. Say, you suspect the battery was initially 100% charged and measure that voltage. Then you could find the \$soc\$ with the equation provided above.
You need an estimate for the initial charge because of the constant of integration that you would get when you integrate the current. That is,
$$soc=-\frac{1}{C_{nom}}\int{i_{bat}(t)dt} + soc(0) $$
I am just explicitly showing the constant of integration which you would need to guess at the beginning of the experiment. I would start at a point which I presume the battery to be 100% charged and measure the \$V_{oc}\$ and it is also necessary to know \$V_{oc}\$ when the battery is presumed to be discharged. You may not get accurate results because both ends of the \$V_{oc}\$ vs \$soc\$ plot (less than 10% \$soc\$ and more than 90% \$soc\$) are very nonlinear.
But since you already have the values for \$V_F\$ and \$V_E\$, you can simply map the value of the \$soc\$ you find through the equation I provided to a value for \$V_{oc}\$.
So you could estimate the state of charge, if you know the current being drawn, by integrating. And the state of charge will linearly map to a value of \$V_{oc}\$ \$\in[V_E,V_F]\$, which are values you already have for the ends of the state of charge spectrum.
One last thing is the sign of the integral, the negative sign comes from discharging the battery. If you were charging the battery, the sign in front the integral would be positive.
I hope this is helpful! |
H: Some questions on optimizing a Schmitt trigger to eliminate possible glitches
Above is a Schmitt trigger circuit using a LM2903 open collector comparator. On the left side the incoming pulses are mixed with noise. Before the noise the desired clean 5Hz incoming pulse train looks like:
After adding up to the incoming pulse the 5000Hz noise itself is 3V and looks like:
And at the non-inverting input the noisy signal becomes as:
The noisy output pulse train becomes:
And here is when we zoom a "rising edge" you can see the glitches:
I have used similar easier circuits before but there are some points to optimize and improve this circuit.
My question is:
To eliminate the glitches at the output, it seems to me there are two options here. A low-pass filter which blocks above lets say 500Hz freq. or a higher hysteresis which is 5V between upper and lower threshold.
1-) But if the noise is not known and is a "possible noise" what would be the safe improvement to this circuit to eliminate possible glitches from a better design perspective? A low pass filter? A higher hysteresis? Or both? Is C1 already forming a lowpass filer?
2-) Although I know the hysteresis concept and its benefits I'm unable to see that in simulation. How can I see the upper and lower thresholds of the hysteresis in simulation? Can it bee seen by looking at the voltages at point X or Y? But X is the non-inverting input and Y looks like fixed by voltage dividers. How can I increase the hysteresis and see the actual lower and higher thresholds? I tried playing with R1 and R4 values and couldn't succeed.
edit:
I attempted to create noise with a concerned citizen's suggestion. But I guess I didn't get it all right since I get the following error when trying to simulate:
AI: You cannot just ignorantly apply a comparator.
First, you need to have an approximate description of what your input signal looks like and what range of behavior it may have. If this is supposed to be a digital input that switches between \$0\:\textrm{V}\$ to \$18\:\textrm{V}\$, but that you have noise on this that is \$V_{PP(RMS)}=2\:\textrm{V}\$, centered on your signal, then you should be able to infer from those facts that you will see even larger excursions (because RMS just means that there's a 63% chance that you'll see noise within \$\pm1\:\textrm{V}\$ excursion, but this also means that there is a 37% chance it will be larger than that and you cannot ignore 37% of your possible input signal.) So you might decide that you need \$5\sigma\$. If so, in this case you'd need hysteresis large enough to cover \$V_{PP(RMS)}=10\:\textrm{V}\$.
There is a limit to your hysteresis. Obviously, you can't make hysteresis cover the entire voltage supply range.
Let's say you want to center this at the rough midpoint, \$+12V\:\textrm{V}\$. Let's also say that you want to use up \$\tfrac{1}{3}\$rd of your input range for hystersis -- an aggressive stance. Then you want your hysteresis band to be \$12 \pm 3\:\textrm{V}\$.
Let's first set up the schematic without hysteresis where the output inverts the input:
simulate this circuit – Schematic created using CircuitLab
I think you can see the midpoint there. It's just a voltage divider. It's Thevenin resistance is \$5\:\textrm{k}\Omega\$. Your output can drive LOW quickly (active, open-collector), but cannot drive HIGH quickly (\$R_3\$.) So here, again, you have another decision to make. What do you need for \$R_3\$ in order to meet other needs (capacitive loading, etc.) In this case, I've ignorantly decided on \$10\:\textrm{k}\Omega\$. But the point here is that you need to decide this not ignorantly. You need to know what you need here.
You can now consider how to add hysteresis. To achieve that, you use positive feedback. Input is applied to the (-) input, so the output will be oppositely arranged. But doing it this way means it is very easy to visualize how the output can contribute and modify the input threshold as positive feedback.
So, when the output is HIGH (because the input is LOW) you want the divider voltage to be higher than the midpoint so that the input needs to move further away from ground before the next transition. Similarly, you want the threshold to be lower than the midpoint when the output is LOW (because the input is HIGH) so that the input needs to move further away from the positive rail before the next transition.
This is very easily done by adding a resistor from the output to your midpoint divider voltage:
simulate this circuit
Note that I've removed the values here. There is a reason. You need to solve the resistor values.
The first thing to do is to look at the datasheet for the LM2903 (I'm picking that one) to check its output capability. It's given as about \$6\:\textrm{mA}\$, typical. Note that it also adds this is with \$V_{OL}=1.5\:\textrm{V}\$! It is pretty weak. (It shows \$80\:\mu\textrm{A}\$ as the base drive current.) So this really isn't a high output current device. Rather the opposite. I think I'd like to go for sinking \$1\:\textrm{mA}\$ when LOW. Since I need to sink current for both the pull-up as well as whatever I'm doing to the biasing pair via the positive feedback resistor, I'll figure on dividing that out as 90% for the pull-up and 10% for the feedback resistor to work with. (The more we reserve for the pull-up, the closer to \$24\:\textrm{V}\$ the output can get.)
I can now compute the values for \$R_3\$ and \$R_4\$ (I'll show standard values here):
$$\begin{align*}
R_3 &= \frac{24\:\textrm{V}}{90\% \cdot 1\:\textrm{mA}} \approx 27\:\textrm{k}\Omega \\
\\
R_4 &= \frac{9V}{10\% \cdot 1\:\textrm{mA}} \approx 91\:\textrm{k}\Omega
\end{align*}$$
Now, given the two estimated thresholds, we know the following should be approximately correct:
$$\begin{align*}
V_{TH} - R_{TH}\cdot \left(10\% \cdot 1\:\textrm{mA}\right) &= 9\:\textrm{V} \\
\\
V_{TH} + R_{TH}\cdot\left(\frac{24\:\textrm{V}-15\:\textrm{V}}{R_3+R_4}\right) &= 15\:\textrm{V}
\end{align*}$$
This solves out as:
$$\begin{align*}
V_{TH} &\approx 12.404\:\textrm{V}\\
\\
R_{TH} &\approx 34.04\:\textrm{k}\Omega
\end{align*}$$
Yielding the following standard values for \$R_1\$ and \$R_2\$:
$$\begin{align*}
R_1 &=R_{TH}\left(\frac{24\:\textrm{V}}{V_{TH}}\right) \approx 68\:\textrm{k}\Omega \\
\\
R_2&=\frac{R_1\cdot R_{TH}}{R_1-R_{TH}} \approx 68\:\textrm{k}\Omega
\end{align*}$$
So here is the resulting schematic:
simulate this circuit
That should about do it. The only remaining problem is that your output voltage won't actually reach the \$24\:\textrm{V}\$ rail, as the feedback and biasing pair load it down a bit. But it will get close (within about \$2\:\textrm{V}\$) and you are well within the operating parameters for the LM2903, as well, which will be sinking only \$1\:\textrm{mA}\$ and should get close to 0 V, then.
I also have no idea what is being driven by this. It's possible that you need more drive than this circuit can provide. It's not able to drive much of a load, as it is. But there's no spec. So I'm free to do this, I suppose.
This comparator inverts your input, though. I wanted to start simple and build on that and it was easier that way.
EDIT:
Here's a case where the output doesn't invert the input. Rather than load down the input side, I'll just add an inverting BJT:
simulate this circuit
The way I figured the above circuit wasn't hard. I already knew from the prior analysis that I needed approximately \$27\:\textrm{k}\Omega\$ for the pull-up. I left most of that in \$R_3\$, as re-dedicated to supplying \$Q_1\$'s base current. I picked \$22\:\textrm{k}\Omega\$ very quickly, just by estimating \$22\:\textrm{V}\$ across it with \$1\:\textrm{mA}\$ through it. So the resistor just fell out of that thinking. It's really \$900\:\mu\textrm{A}\$ from the original design. But I didn't care enough to mess with it further. That left the remaining \$5\:\textrm{k}\Omega\$. I put that into \$R_6\$ and rounded up because I had used \$1\:\textrm{mA}\$ and should have used \$900\:\mu\textrm{A}\$. That's it.
From basic Silicon physics, I know that the BJT's base will drop about \$26\:\textrm{mV}\cdot ln\left(\tfrac{1\:\textrm{mA}}{18\:\textrm{fA}}\right)\approx 643\:\textrm{mV}\$ when active. So \$R_6\$ will only pull away about \$115\:\mu\textrm{A}\$, leaving plenty of drive current for the BJT.
That should do it. Now the output will get close to \$24\:\textrm{V}\$ and to \$0\:\textrm{V}\$.
EDIT:
Try the following as your reed relay input to the (-) input of the opamp from the above schematic.
simulate this circuit
You can add additional components to filter and otherwise condition the signal. I added a resistor and capacitor there as a simple filter. You could use it, or remove it, and see how it goes. But the hysteresis is huge in the above opamp circuit. So I don't think there will be problems. But I really don't know what you are actually dealing with in practice and there are no promises, of course. (Also, keep in mind I'm just a hobbyist. I'm NOT an EE. Not even close.)
So here is the final diagram from my end. You can add your own mods.
simulate this circuit
Better to just do this by limiting the input range, feeding the input into your micro as a digital input, and doing the debouncing in software. Lots less hardware to worry over. This is the most Rube Goldberg design imaginable for handling nothing more than a reed relay switch. (I've no idea why 24V, either. But there it is. Oh, well.) |
H: I need some help with finding out how to power LED's (And how "power" works in circuits in general)
Ok, I am new to electronics, but I am getting a general idea. I need some questions answered to secure my knowledge:
If I have a device that consumes 5V and 600mA, will a source with more than 600mA work? If it does, explain to me how this works. Is it because the whole entire circuit just consumes the amount of current what it needs inherently?
How would the Voltage, Amperage, and Resistance work out if I had 2 LED strips in parallel, each taking 5V and 600mA? Please explain the math.
When making a circuit in general, what values need to balance out to make it stable? (Is it open and all you need to limit is voltage for components? What roles do amperage and resistance do to make a circuit work?)
I know I am asking the wrong things or have an incorrect knowledge, so please be patient with me and point me in the right direction. Any help is appreciated, thanks!
AI: A constant voltage power supply (the most common type) will deliver a fixed voltage at any current up to its rated maximum. The actual current delivered will be determined by the load (assuming the load is designed to work from the supply's voltage).
If you have two LED strips in parallel, each requiring 5 volts at 600 mA, you would need a 5 volt power supply capable of delivering at least 1200 mA (1.2 Amp). |
H: What is the purpose of this solder jumper?
I've been studying the schematic of an audio modem, which takes/sends data as audio signal over an audio jack via FSK encoding:
Does anyone know what the solder jumper SJ1 is supposed to do? My reading is that it's a 3-way jumper, but shorting all 3 pads would effectively short the MJ-2135's pins 1 and 4. Shorting SJ1's middle and bottom pads effectively produce nothing more since MJ-2135's pin 4 is already in parallel with R5.
Am I missing something?
AI: This arduino FSK library and modem interface can operate either in full-duplex or half duplex mode:
In a full duplex connection, the signal to be received by the device is carried by one communication channel, while the signal transmitted by the device is carried by a second, independent channel. In this case the device is the arduino, and the two channels are two conductors in an audio cable (outgoing (TX): microphone, incoming (RX): left audio channel). These audio cables aren't standardized, but that modem interface apparently assumes the rightmost style:
The advantage of full duplex is that the arduino can both receive and transmit data at the same time since the two signals are independent.
In a half duplex connection both incoming and outgoing signals are carried by the same communication channel. Since the arduino just receives its own outgoing data if it tries to transmit while receiving, the two devices have to take turns transmitting and receiving. The advantage of half duplex is that just a single channel is sufficient.
The solder jumper in that schematic is for selecting if the arduino operates as a full duplex or half duplex modem. Notice how the jumper just shorts the outgoing and incoming channels together, creating a half duplex connection.
If the analog interface is set to operate as half duplex, you must take care to not transmit while receiving data from the other end, as the library doesn't include any kind of "protocol" or flow control to arbitrate which device transmits or receives at any given time.
As Ignacio already stated, half duplex also allows the modem library to test itself: Any data you transmit is also be received by the modem and will end up in the receive buffer. Be aware that for some arcane reason there appears to be no way of disabling reception while transmitting data (so the receive buffer will always fill up whenever you transmit) and the flush() function (which should clear the receive buffer) isn't implemented. This migth change if the library is updated. |
H: Signal that changes (depending on different key presses) is not working
I am writing a code for my FPGA that sends a signal 10 us wide every 2 ms. The code is working great, and now I am trying to implement some new code that will allow me to change the pulse width and delay using 4 different buttons on the FPGA. What I have seems to work when using modelsim, but not in testing on the FPGA with an oscilloscope. Here is the code:
library ieee;
use ieee.std_logic_1164.all;
entity GPIO_Voltage_Test is
port(
CLOCK_50:in std_logic;
GPIO_1 :out std_logic_vector(35 downto 0);
KEY :IN STD_LOGIC_VECTOR(3 DOWNTO 0)
);
end GPIO_Voltage_Test;
architecture arch of GPIO_Voltage_Test is
shared variable PhaseShift :integer := 0;
shared variable Period :integer := 100000; -- *20 ns, Period is 2 ms
shared variable PulseWidth :integer := 500; -- *20 ns, PulseWidth is 10 us
shared variable count :integer := 0; -- one count for every rising edge of 50 MHz clock (20 ns)
signal KEYPRESS :std_logic;
begin
KEYPRESS <= KEY(0) or KEY(1) or KEY(2) or KEY(3);
process(KEYPRESS)
begin
if (rising_edge(KEYPRESS))then
if (KEY(0)='1')then
PhaseShift := PhaseShift+500; -- Increase PhaseShift by 500*20 ns
PulseWidth := PulseWidth+1000;-- Increase PulseWidth by 1000*20 ns
elsif (KEY(1)='1')then
PhaseShift := PhaseShift+250; -- and so on
PulseWidth := PulseWidth+500;
elsif (KEY(2)='1')then
PhaseShift := PhaseShift-250;
PulseWidth := PulseWidth-500;
elsif (KEY(3)='1')then
PhaseShift := PhaseShift-500;
PulseWidth := PulseWidth-1000;
end if;
end if;
end process;
process(Clock_50)
begin
if (rising_edge(Clock_50))then
-- Begin by setting the output pulse to 1
if (count=0)then
GPIO_1(16) <= '1';
GPIO_1(17) <= '1';
GPIO_1(18) <= '1';
GPIO_1(19) <= '1';
end if;
-- Increase the count by one every time there is a rising edge on the 50MHz clock
count := count+1;
-- Each pin is triggered once the count reaches a certain time delay, set by PhaseShift
if(count=1+PhaseShift)then
GPIO_1(16) <= '0';
GPIO_1(17) <= '0';
GPIO_1(18) <= '0';
GPIO_1(19) <= '0';
end if;
-- Once the pulse has reached a set amount of time PulseWidth, the pulse is then turned back to 1.
if(count=1+PhaseShift+PulseWidth)then
GPIO_1(16) <= '1';
GPIO_1(17) <= '1';
GPIO_1(18) <= '1';
GPIO_1(19) <= '1';
end if;
-- Once the pulse has finished its period, the count is reset and the process begins again.
if(count=Period)then
count := 0;
end if;
end if;
end process;
end arch;
There is a little more code after, but it isn't necessary.
Like I said before, this code runs properly in modelsim, but nothing seems to work when I press any of the keys on the board. I've rewritten the first process several different ways, but to no avail. I have gotten it to work with one button, where process(KEY) is the sensitivity list and the if condition is if (rising_edge(KEY(0))), but there will always be an error if I have multiple rising edges from the different keys.
Am I just going about this the wrong way? What would be the proper way to change the variables using 4 different keys on the FPGA?
AI: By using the key press signal in an if risingedge check you are treating it as a clock, and making registers for all of the signals inside the if statement that depend on that clock. The key press signal however does not have the perfect clock transitions that you expect, for instance the buttons that drive it have some bounce to them which will trigger multiple executions of the hardware inside the if statement. Also it is very bad practice to use a signal as a clock that is not on the special FPGA clock network.
I understand that you want to perform this key press action once every key press. For this you will need 2 things: something to debounce each individual key press so that each press has a clean on off transition and something to make a pulse for one clock cycle when the debounced key press transitions from on to off.
Here are some resources:
Debouncing buttons:
https://youtu.be/8ISfNm9zv18
Single clock pulse:
https://youtu.be/GHheNH1-S1Y |
H: Is this the correct connector to receive and split out an S-Video cable
I am looking for the correct connector to receive and give me access to each of the 4 signals on an S-Video cable. I have found this:
http://uk.farnell.com/pro-signal/psg01568/socket-mini-din-4pole/dp/1280741
and also this :
http://uk.farnell.com/schurter/4850-241/socket-mini-din-pcb-4pole/dp/152212
But it is hard for me to know if these parts are 'exactly' correct since they don't seem to mention S-Video and the Wikipedia page for the S-Video socket doesn't explain the technical name for this type of socket other than Mini din : S-Video wikipedia page
AI: The S-Video standard uses the German standardized Mini-Din-4 connector, which the Wikipedia article glosses over and does not name with the accurate technical name of the connector. There are 7 standardized Mini-Din variants, and many non-standard connectors that mate with some Mini-Din standard connectors. Calling it a four pin Mini-Din is like saying a 3 pin audio connector or a barrel connector. It's not explicitly clear, as even the Wikipedia article for Mini-Din shows.
But yes, those connectors are the proper ones for S-Video. |
H: STM32F042 failed hardware reset?
Background
I am working on a school project where I have designed a prototype PCB with the core being a STM32F042K6T6 microcontroller. I am using the ST-Link from a Nucleo STM32F401RE card to program it.
Problem
When programming the device with some simple code to light an LED, the LED wouldn't light up. While troubleshooting, I accidentally realized that the LED would light up after a fresh "power on" (without changing code or reprogramming the MCU), simply pulling the power supply and then reconnecting it.
This lead me to believe something was wrong with the reseting of the device after the programming. To test this I started from a shining LED after power-on, and then pressing the reset button for a hardware reset. As suspected the LED would go dark and then not light up again. Then when I disconnect the power and reconnect it again it lights up.
Further observations I reckon might get asked.
The voltage levels of the device seems good, decoupling is placed according to data sheet.
Reset is implemented with external pull up with a 10k resistor to 3.3V and then a button for shorting to ground on reset and a parallel cap of 100 nF down to ground. (This is connected to the NRST pin on the MCU as well as the NRST pin on the programming connector).
The LED is a simple SMD led with a 180 ohms series resistance put on GPIO PB5. (Actually have 3 different status LEDs on the board, and can start them all in code
I have probed the "analog" signal of the reset pin, and to me the signal seems fine, dropping low when I click/hold the reset button. And as the LED turns off when clicking the reset button, I believe it starts to restart the program. However it doesn't seem to fully reinitialize and start executing code from the start of 'main()`? As the code actually works to light the LED after a power-on reset. Therefore the correct instructions seems to have been uploaded to the program memory, but the resets (both while programming and on clicking the reset button) seems to somehow fail to reinitialize the .
Any assistance would be greatly appreciated.
AI: My bet is on boot0; Check that you've got it pulled low.
The boot0 pin selects where the MCU will start executing code from when it boots up, ie. comes out of reset. If boot0 is low, it'll execute your code from flash, but if it's high, it'll execute the internal bootloader from the system memory.
My guess is that you have left boot0 floating, and when you're doing a cold boot (ie. disconnecting and reconnecting power), it'll be close to zero, so the MCU will boot your code from flash, but when you do a warm boot with the reset signal, the pin will have floated to a higher value, is read as high, and the MCU will boot to the internal bootloader from system memory instead of your code.
This explanation assumes you haven't touched the boot-related option bytes, which would change the behaviour. Also, in case you'll be working with different STM32 MCUs at some point, please note that they can have slightly different behaviour. Some have different boot-related option bytes. All I've seen so far have had a boot0 pin which behaves identically, but some also have a boot1 pin (which might be shared with a gpio pin) that you might also have to set correctly. In the MCUs I remember seeing, though, boot1 is only relevant if you want to be able to boot from system memory or SRAM. |
H: What instruction on the STM32 consumes the least amount of power?
The ADC module of the STM32 is used in my application which is very sensitive to power consumption.
In this application, the ADC is required to work only at 20 samples per second. Using the DMA uses more power than I expected. I decided to make it work in single-sample mode by having a task (FreeRTOS) trigger a convert and wait for the convert to be done every 50 ms.
Here is my code:
u16 i;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
ADC_Cmd(ADC1, ENABLE);
for(i=0;i<sizeof(ADC_Channel_Table)/sizeof(u8);i++)
{
ADC_RegularChannelConfig(ADC1, ADC_Channel_Table[i], 1, ADC_SampleTime_71Cycles5);
ADC_SoftwareStartConvCmd(ADC1, ENABLE);
while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC))
{
}
ADCConvertedValue[i] = ADC_GetConversionValue(ADC1);
}
ADC_Cmd(ADC1, DISABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, DISABLE);
Where "sizeof(ADC_Channel_Table)" is 5 because 5 channels are sampled.
The sample time is ADC_SampleTime_239Cycles5 (actually 256 cycles where the convert time is included). 5 channels therefore requires about 1500 cycles. ADC clock is 12 MHz and 1500 cycles is about 120 µs.
And look at the code:
while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC))
{
}
This means the CPU keeps busy-waiting for the convert to be done, and the wait time is 120 µs in total.
120 µs is big as the CPU must wait for such a long time and this wasted the power, but this level of time is too small for the RTOS. The RTOS is unable to use up such a small time.
So I want to insert some "power-saving" instructions to the wait loop.
For example:
while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC))
{
__ASM("NOP");__ASM("NOP");__ASM("NOP");__ASM("NOP");
}
But NOP consumes the same amount of power as any other instruction I have tried.
What instruction can I insert in my while loop that would consume the least amount of power?
AI: If you want power-saving, put the MCU to sleep. The relevant instructions are WFI and WFE: wait-for-interrupt and wait-for-event, respectively.
WFI is kind of self-explanatory: it wakes up when you get an interrupt. (The interrupt must be enabled, though!)
WFE might merit a bit more explanation. To use it, it's probably enough to know that if you set SEVONPEND, an interrupt that's not enabled in the NVIC qualifies as an event. So if you enable the ADC interrupt in the peripheral but not in the NVIC, you can then wait for it to complete with WFE. Do still use the loop with the flag check, as there might be other events that wake up the MCU. (Just replace the NOPs with a WFE) As usual, for more detailed information, see the reference manual.
You'll probably also want to select how deep sleep you want to go to, but how that's done might depend on the specific STM32 MCU that you're using. At least on one model, the relevant flags were PDDS, LPDS and SLEEPDEEP. You'll certainly want to read the relevant section of the reference manual in any case. |
H: Gain of an Operational Amplifier
This is a question I found in one of the textbooks I have. The textbook didnt explain thoroughly about the concept or theory of the op-amp, and that left me confused. So please correct me if I'm wrong. I was just wondering if the voltage of the noninverting pin of the op-amp is zero, as shown in the picture. Does that mean the gain is infinity? (Assuming that the op-amp is ideal.) Or how can we find its gain? Any help is greatly appreciated.
AI: There are Three gains involved in your diagram (I'm assuming you mean the DC gain).
The gain of the circuit with respect to the V1 input, the gain of the circuit with respect to the V2 input, and the gain of the op-amp itself.
From that diagram, if we assume the gain of the op-amp to be infinite, then we assume the + and - opamp inputs will be the same voltage, and we can calcuate the circuit gains as R/R1 and R/R2.
We cannot calculate the opamp gain from that circuit, there is not enough information, which is why we assume it to be infinite.
If we have more information, like the part number, say TL071, then we can look up in the datasheet, where it says gain is typically 200V/mV, or a minimum of 25V/mV, depending on loading and type.
Obviously having a finite gain means that the inputs will not be at the same voltage, if there's an output voltage. 1v output would typically need a few uV across the input to support it. Given that there could be several mV across the inputs due to input offset voltage, the contribution from finite gain is irrelevant.
Having a finite gain also means the calculated gains will be lower. If the ideal (infinite opamp gain) circuit gain is 10.00000, then the gain with a real opamp would be 9.999....whatever, you figure the exact number of 9s! With 1% resistors, the gain could be anywhere from 9.8 to 10.2, so the error from finite opamp gain is irrelevant.
That's why for most purposes, we assume infinite opamp gain. |
H: SD cards electrical specification
I designed a -very simple- circuit powered by a 12V battery.
I would like to add a sd card connector (its type is of no importance right now) on that circuit.
But I am concerned by the datasheets I find on the net:
first. No operation voltage?
second. How could I possibly feed a huge 250VAC RMS with my circuit?
third. 100 VAC max is approx 70V DC (100 * 2sq2). Way too much as well.
fourth. According to Ohm's law, I could put a 24 ohms resistor and be good.
I am pretty sure I miss something because one find those in every SoCs.
Could we make those fit my circuit anyway? (how?)
AI: I get the feeling that you do not understand these datesheets.
That 250 VAC is what the connector can survive without getting damaged. It does not mean that it needs 250 VAC to work !
Not even going into your 70V remark (too irrelevant).
An SD card connector takes an SD card and connects it to a chip (that could be a SoC) with an SD card interface. That's it. You need to think about what a connector does. It connects, that is it.
So just pick a connector that fits your needs (size wise and price wise), ignore the electrical specs as it does not matter. |
H: Stacking high voltage and low voltage PCBs
I am working on a project which involves micro-controller and switches (triacs and EM relays). Due to size constraint, I need to stack one over the other. Here is unfinished relay and triac board which will go on top of micro-controller board of the same size:
PCB description: 220V to 5V offline switcher on the left. It has a switching frequency of 65 kHz. Two transistor driven electro-mechanical relays in between and 6 optically isolated triacs on the right. There are a few connectors for optional sensors.
I have given 4 holes in corners so that I can use spacers and nut bolts to put the two PCBs together. Electrical connection between the two will be made using either a cable or header pins (yet to be decided).
As such what should be the minimum distance between the two PCBs so that high voltage or whatever noise is there in ac lines don't disturb the delicate electronics below?
Is there something which I should use in between to provide added safety to my micro-controller board?
I was thinking of some plastic sheet the same size of PCB or two plastic sheets with a thin metal foil sandwiched between them but I am not sure whether they will have any impact or not.
Any suggestions regarding this will be much appreciated.
Thanks
AI: Apart from the comment from winny you also have to make sure to respect the safety of the mains side 220 V. and the rest of the circuit. If you remain in doubt you could enclose the mains side on both side of the print in a metal box. This way you could kill two birds with one stone. Safety against accidental touching and less influence from noise. |
H: Power supply ground connection
Which is the right way to do it?
or
AI: The top is probably better, although depending on circumstances, you might want to use the bottom. If the 5 V supply is isolated, then the top scheme is required.
The reason I prefer the top scheme (assuming non-isolated supply) is due to regulation. The power supply will regulate the voltage between its power and ground output on the 5 V side. Even though the ground output there is tied to the ground input, it won't be at exactly the same voltage. Whatever current the supply is drawing causes a voltage drop across its ground input lead, and there can be small internal voltage drops and noise added. The only place you are guaranteed all the specs of the power supply output is between the two terminals in the right side of the supply in your top diagram. |
H: Reading from EEPROM problem
I write a structure into EEPRM as follows
typedef struct
{
fract32 AmpF; // amplitude fundamental
fract32 AmpH; // amplitude harmonic
UINT32 b;
UINT16 d;
UINT16 crc;
}CoilBoardAmp_T;
// mechanic angles and salt water angles of coil stored in coil-eeprom
typedef struct
{
ChannelData_T channel[NUM_CHANNELS];
CoilBoard_T coilboard;
CoilBoardAmp_T coil_h;
CoilBoardAmp_T coil_d;
// UINT32 gCoilSerialNumber;
// UINT32 gInversSerialNumber;
} Coil_Eeprom_Data_T;
I set that data by a software, which writes to that structure.
The problem is when reading that structure at the first time without writing to it, I read false data.
I need to detect that point. How would I know If the data that is read is false, or how would I know that I read the data without the software.
AI: Add checksum or crc in Coil_Eeprom_Data_T structure. And verify it after reading the data from EEPROM. |
H: What is this electronic symbol?
I am trying to repurpose a scavenged motor, however the wiring diagram that's on it has a schematic symbol I have never seen and could not find on the Internet.
Anyone know what this is and what it means?
For more context, here's a reproduction of the entire schematic:
Update:
The symbol is for a thermal switch/contact. This particular kind is normally closed and opens on temperature rise (http://www.industrial-electronics.com/Electricity-Refrigeration-Heating-Air-Conditioning_5b.html)
AI: It's a thermal contact (Normally closed - thermal trip).
If OP Googles "contact switch symbols" and jumps to the Images, he/she can find a lot of symbol tables. Here's one OP could see: ibiblio.org/kuphaldt/electricCircuits/Ref/01053.png |
H: npn switching an pnp with dual led
im trying to use a 0-7V control signal to switch an NPN controlling a LED but then using collector of the NPN to switch a PNP. So when control V is low NPN LED is on and PNP LED is off and when control V is High NPN LED is off and PNP LED is on. Is the below circuit a good way of doing this? i have imagined this circuit in my head and cant find anything similar, maybe for good reason?
AI: Your circuit will turn both LEDs on or both LEDs off.
This will solve that:
simulate this circuit – Schematic created using CircuitLab |
H: multiple MCP4131 potentionmeters with common Slave Select line
I fiddle with a digital potentiometer MCP4131 which communicates via the SPI protocol. I've seen several tutorials in which multiple SPI devices are connected to a common Slave Select line and the bits of information overflow from the first Slave device to the second, etc.
I wonder weather would be possible to connect two MCP4131 potentiometers with a common Slave Select line, due to the fact that they have a common MISO/MOSI pin.
So, shouldn't MISO/MOSI be in different pins, thus connect MISO of the first device to the MOSI of the second one?
I am a bit confused, so any thought would be appreciated. The following articles didn't help me understand much.
MCP4131: How to know what value resistors to use on the multiplexed SPI IO?
MCP4131 resistor on SDI/SDO multiplexed pin?
AI: Unlike other digipots that DO have separate MOSI and MISO pins, this part cannot be simply daisy chained to save on IO pins. |
H: IR emitter LED with jack 3.5
Currently I'm using an IR LED connected directly to a PCB where an Arduino UNO is connected. When I send a command with the Arduino, the LED sends what I want to an IR receiver.
Now I'm thinking to change a bit this solution, because I want to extend the IR emitter, but not with some loose wires, I want to use a jack 3.5 cable.
Can I just use a mono cable, connecting the two wires to the PCB, and at the other end connect the male plug to a female 3.5 mono plug, where the LED will be soldered? I don't need to have much power because the emitter and the receiver will be very close to each other.
So, my ultimate doubt is if it'll work with a mono cable or do I need a stereo one?
AI: Yes, you can use a mono cable without any problems. As was mentioned, you only have an anode and cathode which needs to be connected to, so using a stereo one would leave you with an unused terminal. |
H: Common mode choke vs individual inductors for offline flyback smps
I am working on Viper22a based offline switcher and I was going through similar app notes by ON semi and ST. I found two different implementations of noise filtering on incoming mains.
This one uses individual inductors (each of value 1 mH):
And this one uses a common mode choke (2.2 mH):
Is there any benefits of using a common mode choke over inductors?
AI: Two isolated chokes only work in differential mode, while the Cm choke raises the CM impedance which is essential due to the imbalanced differentical impedance of both a switched load to ground and transient line impulses.
But CM impedance creates a high Z series path , which with shunt caps creates also a differential LPF . This is for attenutating large CM noise internal AND external but with the two shunt caps to ground creates a high a Z attenuation ratio , resulting in differential reduction of noise.
So the two coils MUST be tightly coupled and large in value (mH) for low frequency noise 50/60Hz line. For even better line filters low value CM (10uH) choke is cascaded in series for higher switching noise attenuation back to conducted line noise required for CE and FCC qualification. |
H: Does the separation of the differential pair shielding of a SATA cable matter?
Basically I want to replace a consumer grade SATA cable with something a bit more tolerant to high temps and other environmental stresses.
The general cross section of a SATA cable looks like this:
And the cable I want to use looks like this:
My Question is
Does the gap in the SATA cable provide a noticeable difference in speed/reliability compared to a cable that has its differential pair shielding in contact with each other?
AI: Yes the conductor width to gnd gap and gap to adjacent pair is critical as this determines both incremental capacitance and inductance but the L/C ratio affects the controlled impedance which in turn affects return loss, and amount of cross talk.
The SATA 6GHz cables were stiffened in design to improve DC to 6GHz controlled impedance variations due to bending and retain these critical dimensions of conductor thickness to gap ratio and dielectric constant of the insulation, as well as loss tangent of the dielectric at GHz frequencies. The connector is also equally important in geometry. |
H: 50Hz hum on oscilloscope probe only when using clip
Background:
I was just trying to track down some noise in a gadget I built.
There's a DC signal that represents the level of ambient RF, and I am interested in very small changes in that level. These work out to changes of less than 100µVolts in the DC signal.
Right now I'm trying to be certain where the noise I see actually is coming from - whether it is in response to the ambient RF, or whether it (or some of it) is produced by my circuit.
Now for the actual question:
While making measurements, I switched from holding the probe to using a clip to hold the probe in place.
When I clipped the probe in place, the scope started showing a 50Hz hum at about 300µVolts peak to peak. What's more, the level is sensitive to where I stand. If I move closer the hum gets weaker. The further away I am, the stronger the hum.
I took the clip out and laid the probe in place to measure the signal I was looking at, and the hum went away. The signal was just like when I was holding the probe, with no hum (or at least so little hum that it got lost in the real noise I was trying to track.)
Why would using the clip cause the probe to become so sensitive to 50Hz hum?
I can obviously get around the problem just by carefully placing the probe or holding the probe while making measurements, but I can't undestand why the clip makes such a difference at such a low frequency. If this were RF then this kind of thing wouldn't surprise me, but why is the clip such a problem at 50Hz?
Here are some pictures of my setup:
No hum, probe carefully laid out to make contact with the point I'm trying to measure:
That's about 150µVolts of noise, but the hum is lost in the noise.
Same setup, same point being measured, but using a clip:
That's about 300 to 400µVolts of hum. It gets worse when I get further away.
Probe and the clip that is causing me problems:
That's Testec C3000 from Conrad. I know they are cheap, but I'm not using them on RF. Most of what I do is low frequency stuff (my scope is only good up to 15MHz, or less than 1MHz when using the 100µV per centimeter range.)
I measured the resistance from the clip to the bnc end of the probe. It is the same as from the probe tip to the bnc. Its about 400 Ohms.
I don't think it is a ground loop. I wouldn't expect a ground loop to care whether the probe is clipped into the circuit or just carefully balanced to make contact.
Another point against a ground loop is that I disconnected all power to the circuit (power supplies unplugged from board and outlet) and disconnected the antenna (well, LNB) from the board. The only ground connection was to the scope. The hum still shows up.
Based on the answer from Tony Stewart, I made a few experiments based just on length of the unshielded loop.
I found that a piece of wire the same length as the clip barrel causes about the same amount of hum to be measured. A much longer wire caused way lots more hum.
I wouldn't have thought it would be that noticeable at 50Hz, but it seems that a simple loop of wire can readily pick up 50Hz hum.
Experiments:
Circuit powered off and all external connections removed. Only the scope probe and ground are connected. I changed the range to 500µVolts per centimeter.
No wire, just the probe:
Short wire and probe, wire about as long as the clip:
Long wire, about twice as long as the clip:
So, the hum is stronger with a longer loop.
I really didn't expect that much of difference at 50Hz.
It wasn't the clip, it was just the longer length of unshielded wire.
AI: The ground wire on the probe with a 10M 10:1 probe still creates a loop antenna. To reduce the area of the loop, use two test pins <1cm apart and remove probe "antenna" ground wire and only use the tip and ground barrel for measurements.
If the noise still exists when you probe the ground, twist the scope cable to raise CM impedance and better, use a large ferrite choke around the probe cable. For even better results , calibrate two probes , twist both together, keep at right angles to stray current paths, remove ground and probe tips and calibrated to match perfectly ona scope test square wave then use Ch2 Invert and add Ch1&2 to get a perfect flat line, then verify probing ground near noisy source with barrel grounded to same ground pin and use large ferrite torroid or clamshell choke around both cables
This is the best you can do without more expensive active diff probes.
when using Ch 1 Invert, ensure both channels have calibrated gain in desired gain range and do not saturate either channel when using a Differential Probe method of scoping, other difference errors result.
when you have imbalanced probe high Z , within high voltage E fields, your body can and does absorb stray E field (high V but low power) and shunt to ground,, thus you can improve apparent readings. |
H: Standard way for novice to prevent small round plug from rolling away while soldering wires to it
This very trivial task is to solder wires to the terminals of a small round 3.5 mm audio plug.
I can do this myself, but I need to show to others and this is one of the first times they're trying any kind of soldering.
The problem is the connector rolling away during the process of soldering. Students use one hand to hold the wire and another hand to hold the soldering iron. The plug itself lies on the table and rolls away after being touched.
Is there a standard, widely accepted way to do this kind of soldering easily? Do I need to provide some kind of vise for them, or there is some simpler approach?
The problem does not require soldering with one hand, using both hands is ok and preferred.
AI: A wooden clothes peg (clothes pin in American English) works very well:
it won't suffer from solder drops or brief touches with the iron, and has more friction than many other sprung solutions so is less likely to ping at the wrong moment. You can always rest a book on the handle end to add more weight. If you're equipping a classroom, they cost next to nothing.
I used to keep a couple with my portable iron in a travelling toolkit; the soldering parts of that were mainly for cables/connectors. |
H: Calculating Resistance of Unknown resistor, total current and voltage across each resistor
simulate this circuit – Schematic created using CircuitLab
The circuit above has total power dissipation of 60 watts. I need to calculate:
- Resistance of R2
Since it is given that total power is 60 watts, and the series circuit
has 120v, then we can calculate total resistance to be RT =
(120*120)/60 = 240 ohms
We know we currently have a total known resistance of R1 + R3 = 180
ohms. So R2 = 240 - 180 = 60 Ohms
- Current in the circuit
If we calculated resistance of R2 correctly, then we know RT =
R1+R2+R3 = 240 ohms
We know voltage gain VT = 120 Volts.
So total current: IT = VT/RT = 120/240 = 0.5 Amps
- Voltage across each resistor
Voltage across R1 = V1 = (0.5 A) * (80 ohms) = 40 Volts
Voltage across R2 = V1 = (0.5 A) * (60 ohms) = 30 Volts
Voltage across R3 = V1 = (0.5 A) * (100 ohms) = 50 Volts
To check if our answer is correct we total the voltages 40+30+50 =
120 Volts which is our total voltage.
Are my answers correct?
AI: Your answers look correct.
As a cross check, you are given the voltage (120V) and the total power (60W). From that you can calculate the current directly.
P=EI, so 60W=120V*I.
I therefore has to be .5A, which matches your other results. |
H: How can I plot the voltage across any component by Matlab?
I want to ask how can I plot the voltage across any component by Matlab?
I have a simple RLC circuit and I want to plot the voltage across the 3 components and I didn't use Matlab before. I found the transfer function here in the site but still can't plot the voltage.
And the voltage source I will use is cosine source but I can't find it in the simulink also.
So this is what I made:
>> L = 0.047;
>> R = 220;
>> C = 0.000001;
>> Num = 1 ;
>> Denum = [L*C R*C 1 ];
>> G = tf(Num , Denum)
AI: What you can do in MATLAB is the following:
Make a Bode plot like this:
L = 0.047; R = 220; C = 0.000001;
Num = 1 ;
Denum = [L*C R*C 1 ];
G = tf(Num , Denum);
bode(G); grid on
Or get a time-domain response like that:
omega = 4e3;
t = linspace(0, 3*2*pi/omega)
u = sin(omega * t);
lsim(G,u,t); grid on
For everything else (voltages and currents for each component) you are better off with Spice. There is also a toolbox for Simulink called SimElectronics, but I'd still prefer Spice. |
H: What is the ADP option on a digital multimeter used for?
What is the ADP option/range on a digital multimeter used for?
I've tried to find the answer by searching the net, but I couldn't find any explanation.
AI: Figure 1. A multimeter manual with an ADP setting.
It's to allow use of an ADaPtor. In the example it's a current probe adaptor.
simulate this circuit – Schematic created using CircuitLab
Figure 2. A current probe connected to the ADP input. In this case there would be a shunt resistor to convert the current into a voltage to feed into the ADP input. The ADP input should probably scale the input voltage into "amps" or whatever the probe is measuring. |
H: Is the main purpose of cascoding is to increase gain in FETs?
In my recent studies, I have come across the concept of cascoded amplifier using Common Source and Common Gate Configuration. What exactly is the reason of cascoding?
AI: It is mainly done to increase the output resistance and or reduce the Miller effect.
An example of increasing output resistance is the cascode current mirror.
An example of Miller effect mitigation is a normal cascode amplifier. Of course this also increases the output resistance, but a driving reason is to mitigate Miller effect.
The gain does not increase (although the bandwidth due to mitigated Miller effect does go up) because the first transistor has no voltage gain (voltage gain of 1) but provides a current gain. The next transistor provides the voltage gain. If you do the math it ends up (ignoring parasitics and making approximations) matching the gain of the regular common-emitter or common-source amplifier: \$R_L/R_{ee} \$ |
H: Is there a professional field/classification for people who do test-engineering?
Through my career so far, I have always done work involving developing software to test electronics. This has involved writing diagnostics in embedded C/C++ for ARM controller, and even such high level stuff as writing C# code to test devices connected by RS-232, USB, and Ethernet. However, in every case it always revolved around electrical-engineering. Or, developing software for test/instrumentation of electrically-engineered products. Most commonly some sort of test/instrumentation equipment needing automated tests developed, and data/result logging capabilities. I have known quite a few of these types of engineers, but we really have no idea how to describe what we actually do.
Is there a professional classification for this kind of work? Are there any known groups or communities for this kind of engineering work?
AI: Although I paid dues for a PEng license for over 30 yrs as an EE, (with zero benefit) we never had sub-classifications for TE's even though I consider myself one after doing R&D for 10yrs then later Manufacturing, Design, Test, Management etc.
Now many jobs for TE's exist and no affiliations or associative Titles are needed.
Just relevant experience is needed in the technology being tested.
For example in 1983, Burroughs hired me as an HDD 5.25" specialist Test Engineer and I knew nothing about hard disk drives or the specialized test equipment. But I knew everything about the sub-circuits (servos, PLL, data separators, and high tech measurement methods common to many technologies)
Don't worry about affiliations, just look at job requirements and skills you are learning or can learn quickly.
Just remember a Test Engineer is invaluable because "if you cannot specify it or measure it, ** you cannot control it**.". Thus TE's learn or know what QA and Design Engineers must know to ensure a product will work. They know many software tools, hardware issues, EMI, statistics and how to use Object Oriented block diagrams to design quickly high level testers or. modify scripts to automate test vectors and work in both analog, digital, time and frequency domains whenever required. They also know how to demand Design Specs up front before designing a Test and how to document in a Heirarchichal Input, Process Output or HIPO method with categories for external stresses (environmental) and Functional requirements and have a good graphical or statistical skill to report the results.
Although "Software" Test Engineers need to know less about the hardware, it is helpful. |
H: how to use interrupt service routine without interrupt.h file in avr?
In avr microcontroller, when using interrupt service routine ,you write the function :
ISR(Int_Vect){
}
To use this function you must include < avr/interrupt.h>. so now , i don't want to use the interrupt.h file because i am trying to write my driver.
how to use interrupt service routine without interrupt.h file?
AI: avr/interrupt.h is actually pretty simple as far as interrupt headers go. Looking through it, I don't see anything you wouldn't need to keep in order to make interrupts work. There's very little extraneous fluff. It'd be helpful to take the time to get to where interrupt.h is understandable before you try to write your own replacement for it. I'd say that if you look at the define macros that you need (i.e. don't look at ISR_ALIAS unless you need to alias ISRs). Of those portions you are looking at, I'd say 90-100% of it is essential to handling interrupts. The only thing that might be optional is that you can avoid using variadic macros and __VA_ARGS__ if you are willing to rewrite that code every time rather than using a macro.
Interrupts are very compiler dependent and very processor dependent. You can look in your manual for the processor to find exactly what parts of memory to write to to enable interrupts, and then you can make your driver do that. However, you will have to use all of the flags which interrupt.h puts on your functions to make sure they are compatible with being called as an interrupt (or write your own interrupt handler in assembly). |
H: How do gamepad buttons interact with the PCB?
How do the buttons (like A, B, X, Y, and D-Pad) on game pads (such as the Xbox controller) interact with the PCB? If my question sounds vague, refer to the pictures below:
Are A/B the same as C/D? In game, the D-Pad (left) shows up as "Axis", while the buttons (right) just show up as "button".
What are A/B/C/D called, and what are they made of? It all looks and feels like rubber, but if that were the case then it wouldn't have any effect on the electrical properties of the PCB in that area (right?).
How does the logic of A/B and C/D work? How does B pressing on A (or D pressing on C) send a signal to the computer saying "button X has been pressed"/"D-Pad UP has been pressed"?
For reference, I know how a push-button works; it makes and breaks physical connections, which in turn impedes or allows electrical current to flow. But I can't see how that happens in this picture.
Also, here's a picture of the other side of the PCB (it might help).
AI: using carbon conductive polymer material contact with a conductive carbon print, you get a reliable switch useful for many operations (100k)
consider that a 10k switch can be acceptable for a logic interface with a 100k pullup .
implementation values can vary widely with pullup up to 1M practical, but more sensitive to stray fields. |
H: why biasing an emitter follower with a transistor will cause the following transistor falling into active region?
My textbook says Q2 is not in the saturation region. I just think the Q2 transistor can be in the saturation region as long as R3 is small enough to provide the saturation current.
The author explained that is "because the signal on Q1's collector is always within the range of the power supplies, Q2's base will be between Vcc and ground, and therefore Q2 is in the active region(neither cut off nor saturated), with its base-emitter diode in conduction and its collector at least a few tenths of a volt more positive than its emitter." The book didn't include any values for the resistors, the transistors, and the power supplies. No matter what value these components have, Q2 will always stay in the active region.
I am doing self-study and hope someone could help me with this question. This is on page 83' upper right corner of the book named "Art of Electronics Third Edition".
simulate this circuit – Schematic created using CircuitLab
AI: You know that driving enough base current will fall the transistor in saturation region.
But recall that for an NPN transistor, if \$V_C < V_B > V_E\$ --or simply, if \$V_B\$ is greater than both \$V_C\$ and \$V_E\$-- then the transistor will be in saturation region.
Let's test this in your circuit:
\$V_{C_{Q2}} = V_{CC} \$
Even if Q1 is saturated, \$V_{C_{Q1}}\$ will be between \$0\$ and \$V_{CC}\$. Because, as you can see, there's a voltage divider formed by R1, R2 and C-E resistance of Q1.
\$V_{B_{Q2}}=V_{C_{Q1}}\$, thus
\$0 < V_{B_{Q2}} < V_{CC} \$ which means \$V_{B_{Q2}} < V_{C_{Q2}}\$.
\$V_{B_{Q2}}\$ will never be greater than \$V_{C_{Q2}}\$ so Q2 cannot be in saturation region. |
H: Pebbles in potted electronics
I was recently taking a look at a failed power supply for 12V halogen lighting and noticed an unusual texture in the potting compound. I tried chipping some of it away with a screwdriver and got a nice surprise:
Yes, pebbles. But why? Are they special pebbles or just normal ones?
AI: Thermal conductivity is indeed better for stones than for epoxy. Wikipedia gives 2.8W/(K m²) for granite vs. 0.2W/(K m²) for epoxy.
Thermal conductivity can be increased by adding some material, but a potting compound should not be electrically conductive, which prohibits metals, graphite etc.
Most insulating casting compound of this kind have a value around 0.8W/(K m²), but I also found a silicone based compound with 5.0W/(K m²).
However, I think the price plays a big role, too. Even normal epoxy costs some money, the heat conductive stuff more, and that 5.0W/(K m²) is for sure very expensive. In contrast, I guess the pebbles in that picture cost less than a cent. |
H: Is this a safe way to create a single OFF switch for multiple loads?
Here is an example of a scenario that describe the question using a car electrical wiring harnest as the complete and complex system unit overall. The tail lights, brake lights and reverse lights are each seperately wired using different fuse ratings individually. To create a "kill switch" that can turn off and disable all three lights simultaneously, i wonder if the following approach would work. First, i would identify and consolidate negative wires of each circuit and terminating it to a common grounding point after connecting a simple SPST switch between the connection. This switch can allow the ground connection to be disconnected off all three circuits and reconnected it back on simultaneously. If the wiring connection are done correctly and soundly, will this method (disconnecting and reconnecting ground connection of multiple circuit from a single point using only a switch) create any potential harm to the components, bettery or the overall system such as the ECU? If it does, i would like to know how and if there is a better way to tackle this.
AI: There are a couple of problems with this approach:
You will find that the main part of lamp holders are metal and connect directly to the chassis and are shared between the tail, brake, reversing and directional indicator lights. Isolating the negative will be a problem.
You will find that you create backfeeds. e.g., If you open the ground connection on all lamps and press the brake pedal you will feed out through the brake lamps to the now floating ground plate of the tail lights, back through the indicator lamps and light up the dashboard indicators for example. You will also backfeed the flasher unit (but this is unlikely to cause trouble).
It would be much better to add series switches / relay contacts on each circuit.
Figure 1. Image from SaabNet. Ignore the auxiliary ground wire but note the common negative around the edge of the assembly.
If you have ever seen a vehicle whose tail lights vary in brightness when the indicators are turned on then you are witnessing a similar phenomena due to poor earth connection. |
H: Simple way to determine I/Q phase difference (positive or negative) without using FFT
I have a Doppler sensor with I/Q channels for detecting moving object. I need to also detect the moving direction of the object. Due to the limited power and flash memory of my MCU, I cannot afford FFT() or atan() or sqrt() functions.
In order to determine the moving direction of the object, phase difference between I and Q need to be determined (positive or negative). And the following methods are the ones I'm aware of:
FFT
x-correlation
atan(I/Q)
search posive slope of I and Q signal and determine the phase shift
The first 3 methods, I cannot afford them due to MCU limit. The last one is very sensitive to noise.
Is there other simple ways to determine the phase difference between I/Q is negative or positive ?
AI: '... the last one is very sensitive to noise'
They are all sensitive to noise, filtering reduces the noise. Some methods have filtering 'hidden' in them. For instance FFT processes a large amount of data, and then you use just one frequency bin, which is an implicit filter. If you use filtered data for your slope search estimation, then you will be more robust against noise.
Consider this. When the slope on one channel has the same polarity as the value of the other, the rotation will be in one direction, and when they are opposite polarity, the other.
How do you determine whether two values have the same polarity? Multiply them. A positive result and they are both + or both -, and vice versa. Or do XOR logic on their signs, whichever is quickest for the hardware instructions you have to hand.
So try this. Compute I slope at In by (In-1 - In+1), multiply by Q value Qn, and accumulate the answer. Repeat for subsequent ns as many times as required to reduce your noise to reasonable levels. The sign of the accumulated number indicates the polarity of the rotation. |
H: What's the relationship between capacitor and resistance in a fading LED circuit with a 555 timer?
I followed the instructions in this video to make a fading LED circuit with a 555 timer:
https://www.youtube.com/watch?v=qLAi7hkDuYw
...apparently loosely following the schematics here:
Note that the guy in the video uses different values for both resistors, the capacitor and the voltage source, and only one LED. And so do I. I use a 6V voltage (4xAA), a 130Ω resistor in series with two 3,4V LEDs in parallel, as the "high" resistor I use a potensiometer, and I use a 470µF capacitor. All is good and the circuit appears to work as it should.
1) Now, what I don't understand is the relationship between the capacitor and the high resistor (potensiometer). In the video instructions the guy said to use a 1000µF capacitor, which I tried. The comments below the video said a much smaller capacitor was all that was needed. I found that there seemed to be a linear-ish relationship between the capacitor and resistance. I could choose different values of capacitors, adjust the potensiometer, and the circuit behaved the same. Can someone explain this to me, and whether I'm tinkering with this in the right way?
2) Is the 130Ω resistor in series with the two LEDs (in parallel) an adequate value?
Thanks for your help.
AI: Break the circuit into its functional blocks and it all becomes very obvious how this circuit works.
The transistors are simply emitter followers - they follow the voltage across the capacitor. By using NPN and PNP BJTs they act in antiphase - as the voltage increases (wrt 0V) the NPN side LED increases and the PNP side decreases.
The LED resistor is not a critical value (it sets the maximum brightness) so changing it to 130R at a lower operating voltage is fine.
The capacitor voltage changes between 1/3rd and 2/3rds of the supply. This is set by the internal comparators of the 555 chip. When the output (pin 3) of the 555 goes HIGH the capacitor is charged through the 20k. The voltage rises to 2/3rds supply voltage and switches the output pin LOW. The capacitor then discharges through the 20k until it gets to 1/3rd supply voltage and then switches the output HIGH.
The timing is controlled by the product of C and R. (larger values, longer time). i.e. A 1000uF and 10k would have the same time constant as 500uF and 20K and produce the same flash rate. |
H: Analog Stick Wiring
I am making an accessible computer interface device with an arduino at the core. For mouse control, I am using an analog stick, and ordered the Omter OM200B (http://www.omter-tyxn.com/2-axis-potentiometer-joystick-OM200B-M3.html). It has 3 leads on each on 2 sides (6 total), and I assume that this is power, ground, and data for x and y axis. Unfortunately, these are not marked, and I am hesitant to guess for fear of frying the analog stick, my arduino, or both.
If I were to hazard a guess, it would be power, data, ground...but that is just a guess.
Is there a particular pattern that these analog sticks need wired? Is there a standard layout to analog sticks?
AI: There are several models. The lowest resistance one appears to contain potentiometers that are 5K total resistance. If we use V = I x R and assume you are using a 5 volt Arduino, we see the total current flowing through the potentiometers is:
V = I x R
5 = I x 5,000
I = 5 / 5,000
I = 1mA
So the potentiometer needs to get rid of only a small amount of wattage:
W = V x I
W = 5 x 1mA
W = 5mA
A potentiometer is normally a 3 terminal device with the wiper normally connected to the center terminal.
So what is normally done is what you stated above. Connect 5 volts to one side, the ADC pin to the center and ground to the other side. |
H: What is reducing the NOISE when probes are connected to a circuit?
When the oscilloscope probes aren't connected to anything, the following waveform is observed:
The oscillations are more then 1.5mV.
When the probes are connected to measure the voltage on a 27Ohm resistor with 30uA current flowing:
the big oscillations are gone and the new ones don't oscillate more than 200uV. Given that the probes are physically in the same location, and the circuit is battery powered (no earth grounding), what reduces the big oscillations?
Motivation
I came to this problem while trying to understand how much noise in the second graph is due to the probes. Wasn't expecting to get a larger error.
AI: An ideal voltage measurement device will have infinite impedance. This is impossible as all voltage measurement devices need a small amount of power when making the voltage measurement. Common oscilloscope probes have an impedance of 10 million ohms. There are variations available.
In a normal room wired for main (120 volt AC service) there is a good amount of associated electrical noise. This noise can induce a small current in any conductive material. How much that effects a voltage measurement depends on the impedance of what is being measured. We can use ohms law to find out how much current is needed for your 6mV peak to peak oscilloscope measurement above (assuming you are using 10Mohm ohm probes):
V = I x R
6mV = I x 10Mohm
I = 6E-3 / 10E6
I = 6E-10
I = 60nA
As you can see, only a very small amount of current is needed to deflect the oscilloscope trace 6mV.
To find out how much this noise will effect your voltage reading while connected to your 27 ohm resistor we first need to find the over all resistance:
1/R(over-all) = 1/10E6 + 1/27
R = 26.9999271
Then we can find the expected additional voltage due to the noise we measured:
V = I x R
V = 60nA x 26.9999271
V = 1.62uV
The second scope trace is set to a little more than 1/10th volt per division. So it is unlikely a deflection of 1.62uV will be observable. |
H: How large current is needed to get a voltage change over a capacitor?
First off, this is question from my homework.
I'm not sure I understand the question, wouldn't the needed current be > 0?
AI: Two equations to consider with Capacitors
Q = CV
\$I = C\frac{\Delta V}{\Delta t}\$
Likewise
Q = It
For there to be a voltage across a capacitor which was initially 0V, there must be a charge flow. How much voltage in a given time would dictate the current required. |
H: USB powered IR emitter for night vision webcam
I had a spare webcam which i turned it into a night vision camera. I have to use IR emitters to be able to see with it ( http://www.instructables.com/id/Night-Vision-Webcam/?ALLSTEPS ) and i don't want to use a tv remote for that. I was wondering if i could power the emitters (4 emitters actually) with the usb port and cable of the webcam? Could you tell me how or give me a suggestion or a link or something? Thanks!
(Btw, i can do some basic soldering and stuff too)
AI: Your best bet is to buy these IR LEDs with 1.1 watts/sr @100mA @1.5V and use a string if 3 LEDS using 0.5V drop from 5V across a 5 Ohm 1/8W resistor. (verify current with a meter from V drop)
If you can supply 200mA use two strings of 3 LEDs each with a 5 Ohm R.
we call this an array of 3S2P.
If not, then use slightly higher R. So buy a bunch of different R's like 5-10 Ohms or use 10's in combinations to make 7.5 Ohms and a dozen or more LEDs (cheap) .
If you use the HDD connector 5V, you can add a switch to enable as many IR LED strings as you want and put them in a bundle to make a super strong 6 deg IR LED spotlight.
LED angles are always full angle while IR LEDs historically were half angle, but recently some disti's show full angle to avoid newbie confusion. So this LED is technically a 3 deg half angle and your bundle may spread this depending on alignment.
doubling the angle will reduce the peak intensity in half approx. (except for lens loss with narrower angles)
then intensity drops inverse squared with distance.
warning , do not stare at the bundle up close |
H: Problem with arduino controlled constant current supply with MOSFET/NPN
I am building a lamp using 5 1-Watt LEDs, an 18V DC power supply and an Arduino for dimming/controlling it. Im using a simple design (below) for the constant current driver (as was used here for example). The MOSFET I have is not logic level (it's a FQP50N06) but it opens enough at 5V to pass the 350mA that feed the series of 5 LEDs.
This circuit works fine when the Arduino is On; my problem is when the MC is turned Off, and the PWM pin is (I guess) floating, the LEDs are still powered (though slightly dimmer). I am looking for a way to modify this circuit so that M1 shuts down when the MC is Off. (Assuming that the power supply V1 is still On.)
Any idea? thanks!
simulate this circuit – Schematic created using CircuitLab
AI: You should add a resistor (say 100K) from the left side of R1 to ground. That way it will not divide down your already too-low gate voltage.
If you are actually removing the supply voltage from the Arduino this will not work if you are breaking the ground connection. If you break the 5V connection the internal protection network on the ATMega chip will supply a few volts. Only break the +5V side, if you must break something. |
H: What is the 'continuous standard load' of a battery?
I'm currently integrating a coin cell power design into an electronics project. I am trying to verify my understanding of the 'continuous standard load' rating given for a battery (datasheet)
When looking through coin cell data sheets, I am typically looking at the mAh rating. This is a a measure of how much current can be supplied for a given time period (sort of). Now, I also understand that this number is typically provided given that you operate at some spec'd current. That is, if you decide to draw more current than the spec'd current, the battery will not be able to last as long as the mAh rating suggests.
So my question: Is the 'continuous standard load' the coin cell current that will provide the spec'd mAh rating? Furthermore, if I run above this current, will that translate to a much lower mAh rating?
The reason I'm confused is due to the fact that the 'continuous standard load' is such a small number in the datasheet I'm referencing. When looking at the CR2032 coin cell in the datasheet, it has a mAh of 225, but it only has a continuous standard load of 0.2mA. If I operate at say 10mA, will that translate to something much lower than 225mAh?
Thanks!
AI: If I operate at say 10mA, will that translate to something much lower than 225mAh?
Certainly, yes. I'd even say you should find a different battery for your application, as CR2032 is not suitable for such high currents.
Take a look at the following graph from your datasheet:
Even at 1.5mA, you're going to lose between 12 and 33% of nominal capacity. The cell wasn't characterized at 10mA, but extrapolating the graph I'd say you'd be lucky to get 30-50% of usable capacity in the optimistic case. Realistically, the cell may simply fail from overcurrent after a few hours of continuous 10mA load. |
H: Why there is welding on some iron transformers' core?
(This photo isn't mine!)
Why there is welding on some iron transformers' core?
is it only for holding the laminations together?
edit
can we repair or rewind this kind of transformers?
AI: This is done on all MOT's (Microwave Oven Tfmr )to keep the kitchen quiet... as in tech terms reduce acoustic noise from vibration from magnetic forces on the grain oriented silicate coated thin laminations of high permeability steel and partial noises from some magnetostiction forces in the magnetic particles at the expense of some efficiency losses. |
H: Ways to lay this cyrstal out without increasing the PCB footprint?
I am trying to follow the best practises in laying out a crystal.
Namely:
1. Keep traces short and direct
2. Keep it as close to the pins
3. Keep-out region under the crystal
4. No vias
5. Isolate the crystal
However I cannot fit my bypass caps near the pins.
Before I change the footprint of the PCB to accommodate the requirement, is there anything I can do to make my current design work?
[update]
The MCU is ATMEGA34U4. Crystals is this
Matching capacitors are 18pF (as per the datasheet in the link).
[Update #2]
The following is what I came up with. Thank you all for your eyes on this!
AI: Your layout looks almost perfect already. If you had place, you could place everything a little bit better, but the influence is so tiny, you will never spot the difference.
Remember, you can built this circuit with THT components on a breadboard and it still works. 16 MHz is not really a lot on a PCB. Trace lengths and length matching are not that important at these frequencies. In any case, make sure that the ground connection is good all around the crystal.
What I would do:
move the component right above the crystal to the right
move one capacitor in the now free space, leave the other where it is. |
H: Night light, schematic and functioning
I recently bought an el-cheapo night light for $1 just to see how they manage to get the costs so low. I expected to meet an el-cheapo voltage regulator at best or even a bridge rectifier but alas! None exist here. I just can't figure out how or why the circuit here works with mains (240V) voltage. It does get warm during operation but I wasn't going to use it anyways so it is just a learning prop for me. I have no idea what the SOT part labelled "J6" is and if it's a transistor, what kind. Please help me figure out how it works and what that "J6" could be.
edit: R2 is the LDR, the other resistors are SMD resistors and the capacitor is an electrolytic cap.
The board looks like this:
and I've drawn the schematic as is:
simulate this circuit – Schematic created using CircuitLab
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. Redraw of the OP's reverse engineering.
If your circuit is correct then we can see three voltage dropping resistors, R3, 4 and 5, and a half-wave rectifier, D4. At 240 V the current through the resistors will be \$ I = \frac {240}{8k2 + 8k2+8k2} = 10~mA \$ but with the rectifier it will average half that.
It's not clear from your schematic but I suspect that R2 is the light sensor - an LDR. When light is sensed the resistance will drop and Q2 will turn on. This will "shunt" the DC on C1 to ground and turn the LEDs off. This will give comfort to the user giving the impression that the unit is not wasting power when, in fact, it is running constant power whether it's on or off. It would make no difference to power consumption if R1, 2 and Q2 were omitted!
Power dissipated in each of the resistors will be \$P = I^2R = (5m)^2 \cdot 8k2 = 205~mW \$ which may be a bit on the high side for those SMD resistors. |
H: STM32: avoiding DMA & CPU collisions
Section 13.4 of the STM32 Reference Manual (for my STM32F303RE board) states:
The DMA controller performs direct memory transfer by sharing the system bus with the
Cortex-M4 ® F core. The DMA request may stop the CPU access to the system bus for some
bus cycles, when the CPU and DMA are targeting the same destination (memory or
peripheral).
My question is: when exactly are 2 memory destinations the same in this context? Is it only when the 2 actually overlap (e.g. CPU accesses 4 bytes @ A with one instruction - thus accessing A,A+1,A+2,A+3 - and DMA 1 byte @ A+2) or is the memory split into larger regions and the 2 collide when they're accessing the same region?
If it is the latter, how big are those regions?
AI: What this means is that if the DMA and CPU are both targeting RAM, depending on whose turn it is in the bus matrix scheduler, the CPU may be forced to wait for the DMA's turn to be finished.
e.g. If the DMA is doing a ram-ram copy and the CPU is reading/writing to a peripheral register, then they are using two separate bus channels and no waiting happens.
e.g. If the DMA is doing a ram-ram copy and the CPU is reading/writing to ram, then the Busmatrix arbitrates access to the ram. Sometimes DMA will wait, sometimes CPU will wait.
See manual section 3.1 for the busmatrix stuff.
I don't think you'll be able to place your buffers in a memory where the CPU might not compete with the DMA. |
H: Difference between Power System Contingency analysis and Power Network Loading study
I was reading through some research papers on Power system contingency analysis but it seems like the researcher is talking more about network loading. I searched on the internet about the difference but I just couldn't get something that can make me understand.
AI: For power distribution there are a lot of networks for redundant delivery but risk and load factors must be analyzed for capacity load leveling and service due to failure.
Now graphical methods are used to illustrate the severity of risk and exposure to power availability in case of component failures.
In contrast to contingency severity information, power system
element vulnerability describes ... in terms of their
post-contingency load factors.
Hence,the primary focus here is on the violated element itself, with the different categories of visualizations showing sequentially more detail about
the contingencies which cause violations on the element.
three different categories are presented: overview, middle-level, and detail in this report |
H: Which Ampere range and precision does my amperometer need to monitor a current of 220V between 50W and 300W
I need to measure the evolution of the electric power at the level of the electric plug of a computer in function of its CPU usage percentage.
The voltage is 220V and the wattage between 50W and 300W.
For this, I plan to plug a amperometer in series and take at least 20 measures as the CPU consumption curve increases.
I don't have access to expensive material such as oscilloscopes. I need to purchase a amperometer but cannot figure it out which model would fit, in particular
What precision should my amperometer have
What range should my amperometer have
AI: An ammeter (amp-meter) will not give you all the details you require for your project.
The power calculation is simple for DC - you just multiply the voltage by the current. The problem with AC is that the voltage and current may not be in-phase so you would have to know the power-factor to make a proper calculation.
Figure 1. Poor power-factor due to current pulses on switched-mode power supply. Read more on Wikipedia's Power-factor, non-linear loads.
Another factor is that you will have fixed load such as the power supply fan (if there is one), any hard-drives, indicator lamps, network cards, USB power, etc.
You have two choices:
Measure the current and voltage to the motherboard at the DC level. This will be easy to do with a multimeter.
Use a power or watt-meter on the mains side of the power-supply. This will eliminate any power-factor errors.
Figure 1. A watt-meter complete with Swiss socket for you. |
H: How do computers calculate sin values?
How does a computer calculate a sin value? Logically, when I think about it the only apparent way is to put many sin values into memory, and when a sin value needs to be "calculated" it would just pull data from a specific memory address.(ex. sin(x) would pull data from the memory address containing the value of sin(x) )That seems like the only possible way to do it. Or is there a function which can be used to calculate the sin of a value? I'm really trying to ask how a computer calculates sin on a base level. Is there a way to approximate sin values using a different function composed of more "basic" operations, and the ALU would be able to do multiple "basic" operations to approximate the sin value, or is it just pulling values from memory?
AI: Typically high resolution sin(x) functions would be implemented with a CORDIC (COrdiate Rotation DIgital Computer) algorithm, which can be accomplished with a small number of iterations using only shifts and add/subtract and a small lookup table. The original paper The CORDIC Computing Technique by Jack Volder is from 1959. It also works nicely when implemented with hardware in an FPGA (and a similar algorithm would be implemented in a hardware FPU for those micros that have an FPU).
For lower resolution, for example to create synthesized sine wave for an inverter or motor VFD (Variable Frequency Drive), a lookup table (LUT) with or without interpolation works well. It's only necessary to store the values for one quadrant of the sine wave because of symmetry.
As @Temlib points out, the algorithms used inside modern FPUs use range reduction followed by an evaluation using something like the Remez algorithm to limit the maximum absolute error. More can be found in this Intel paper Formal verification of floating point
trigonometric functions. |
H: Op Amp CMRR problem
I'm studying on my own for an exam. I bumped into this problem that really got me. My answer just doesn't match.
Find the CMRR of the operational amplifier above, consider Ad = 1000000 (Answer CMRR= 100000)
From the theory I know that CMRR = 20*log(Ad/Acm) where Ad is the gain in differential mode and Acm is the gain in common mode.
I notice that the answer doesn't seem to be in dBs so I assume the answer is given by simply CMRR = Ad/Acm
Why do they give me Ad? since I can get it from a circuit analysis.
I got from the picture that Vo/ΔVi = 1/100, so if Vo/ΔVi = Ad my Ad doesn't match with the given Ad
How can I get Acm, I think this data is inherent of the op-amp and have to be given information.
I think there's something wrong with the problem, but since I don't have a way to confirm it I think I am missing something. Any help will be appreciated.
The source pdf (ES) Page 6, number 4.
AI: I think the 100 ohm resistor should be 100K. The differential gain is thus very close to 10. The CMRR of the op-amp is 10^5 and the open-loop gain of the op-amp is 10^6.
You then calculate the CMRR of the differential amplifier, assuming perfectly accurate resistors, and I get the suggested answer. |
H: Will 802.3af device work on 24v passive poe?
I have seen a lot of questions and answers all over SE about using a passive POE device on an 802.3af network. But can you use an 802.3af device on a passive POE network?
In particular, I have this POE injector that outputs 24V @ 0.5A (12 W?), and a Mitel 5320e IP phone that uses 4.3 W. The phone is 802.3af-compliant, which means it is expecting 48V, but is it reasonable to assume that it would still work on 24V? Or could I expect do damage the device by undervolting it?
It sounds like some people have tried this and it worked OK, but were they just lucky?
What about for the general case: if you have a passive POE injector that outputs 48V, would most 802.3af devices still work on it?
From what I understand, the handshake between the 802.3af POE injector and the device only determines if power will be sent; the device has to adjust the voltage to its needs. Once a 802.3af injector determines the device wants POE, it sends 48V, no matter what. This makes it sounds like 802.3af is just to protect non-POE devices. If that is correct, than a passive injector is only dangerous to non-POE devices; it shouldn't be dangerous to POE devices, even if they use a different standard. Is that correct?
More details on what I'm trying to do here
AI: The standard leaves that open, basically.
The regular negotiation process will fail for a compliant device, at which point the device either falls back on some builtin support for dumb injectors, or disables PoE completely, in which case it is expected to not draw any power. It may optionally retry after some time.
Most devices use a lower internal voltage anyway, so they have a step-down converter, most likely behind a set of protection diodes or a full rectifier. As long as the voltage minus the voltage drop in the cable and the forward voltage of the diodes is still enough for the regulator to work at a duty cycle within its design specifications, the device can accept the power. As the voltage drop in the cable is likely to be significant, there is usually quite some headroom.
The other question is whether the device will accept a dumb injector that doesn't speak the protocol. That is fully device-dependent, and may be different between different revisions of the same device model. The only guarantee you can get is from the device's datasheet.
That said, I'd go for a standards-compliant injector or a manageable switch with (equally standards-compliant) PoE ports for any serious installation, simply because the cautious startup sequence will protect you if broken devices are connected. |
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