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H: Send float with Serial Port
I'm trying to send float temperature data from stm32f103c8t6 to qt application. When I try tosee value with Keil I can. But When I try to transmit to App I got some error about convering uint8_t to float. How can I send Float data to app with serial port?
//variables
uint16_t readValue;
float tCelsius;
while (1)
{ HAL_ADC_PollForConversion(&hadc1,1000);
readValue = HAL_ADC_GetValue(&hadc1);
tCelsius = 357.558 - 0.187364 * readValue;
HAL_UART_Transmit(&huart1, (uint8_t *)tCelsius, 16, 500);
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
AI: Use sprintf to convert to char, however sprintf can take considerable microprocessor resources on smaller micros such as the 100 series, it would be better to send it as a float and convert it in qt. |
H: Boost voltage without switching
What I am doing: I am making a wearable device which will use Li-po battery/ies to operate. I am measuring small currents (meaning I want to avoid buck/boost converters). My design draws a current of ~56mA.
What I want to achieve: I need 5V on the device, which should be as voltage-ripple-free as possible. so the way I think of it, using Li-po batteries as power source, I have two options:
Use two Li-po batteries in series, so I always have a voltage of at least 7V, and use Op-amp to output always 5V to my circuit. This way, I do not need to use a buck converter. Like this:
simulate this circuit – Schematic created using CircuitLab
The above option has the disadvantage that I need two batteries to operate the whole circuit.
The option I do not want to use, is to have only one battery and use a boost converter to boost the voltage to 5V. I want to avoid that since it will introduce switching to my circuit.
simulate this circuit
And my question is: is there a way to pump/boost voltage to a higher voltage, without introducing noise like a boost converter would? (The reverse with downscaling using op-amp in my first option). I think there might be a way using Op-amps, which I do not know of.
AI: is there a way to pump/boost voltage to a higher voltage, without introducing noise like a boost converter would?
No, it's not possible to boost voltage with reasonable efficiency without a switching converter. Basically you need something to "pump" energy to a higher voltage, and that has to switch. It can be a boost converter or a charge pump, but it will switch.
That said, some boost chips make less noise than others. Layout is very important, and a synchronous boost will usually give a better layout than one with a diode. Using a high switching frequency makes ripple easier to filter (the LC components become smaller, and ripple amplitude is smaller) but it produces more HF harmonics, so it's a tradeoff.
You should define what kind of noise your circuit can tolerate on its supply first. |
H: Use of multiple earthings for single installation
For a home electrical wiring, is it acceptable to have to multiple earth rods on different (reasonably apart from each other) locations?
In good practice, to keep earth resistance low, we use multiple earth rods with a distance to maximize efficiency and connect them together. But I'm asking if we keep two earth rods across the installation area and if they connected to the circuit from (diferent) two points is there any risk?
Is there a possibility on lightning or other high voltage surge, two distance earth rods cause potential difference across them and damage?
This question is not about ELCB or RCCB devices. This is explicitly about having multiple earthings with reasonable distance and HV surges like lightning strikes
AI: Lightning will cause a potential gradient in the earth that can cause high voltage differences over even a short distance, this is called "step voltage" and is what can kill you in a nearby strike, your feet are far enough apart that there can be hundreds or even thousands of volts difference between them. You need to take this into account when designing a ground system.
Two ground rods spaced apart can have a very high difference in potential, if they are connected to equipment through different paths that voltage will cause high current to pass through the equipment. You would need to have the equipment connected to the grounding system by only one path. Then you need to worry about touch voltage, which will be the potential difference between the equipment and the floor/ground or anything else close enough that a person could touch both at the same time.
You can get an idea of the voltages involved from this document. |
H: How to convert European 230V circuit to US standard 120V circuit?
Suppose I have a house in Europe. The house is of course wired with 230V, which means it won't work directly with US plugs.
If I acquired US outlets, how would I convert a single European 230V circuit to the US standard 120V as easy as possible?
I don't want external devices/transformers after the outlet. I want actual US 120V outlets that power US devices.
Let's assume 230V/50Hz to standard 120V/60Hz.
I'm looking to install permanent US outlets into a European house. I won't be converting the whole house, just a few outlets.
I know this isn't just plug and play. I want to install the wiring to make it just like the US.
Again I'm talking about house wiring. Rewiring part of the house to use 120V. Not "adding" adapters, UPS backups, transformers, etc after the electrical outlet. No. Make part of the actual house wiring native 120V.
Native US-style 120V outlet wiring.
How can I make it so a US wall outlet can be installed in the wall and US devices can be plugged in normally with US plugs (no device adapters)?
Local Regulations are not important, I am asking for the technical aspect.
AI: Without a transformer, you can't.
Houses in Europe get either single phase or three phase 230VAC.
Houses in the US get single phase 240V that is split into two phases of 120VAC by the transformer outside the house.
The only way to get 120VAC from a European outlet is to use a transformer.
If you want to install a bunch of 120VAC outlets in your house you'll have to install a large transformer then run wires to all of your 120VAC outlets.
That probably won't meet the standards for electrical wiring in European countries.
Don't bother. Use European 230VAC appliances connected to normal 230VAC outlets.
A transformer won't do anything for the line frequency. With a transformer you'd get 120VAC at 50Hz.
You'd need something to convert the frequency and the voltage.
That'd be a UPS kind of setup that takes in 230VAC at 50Hz and puts out 120VAC at 60Hz - I don't think anybody makes such a beast.
You could use a transformer to get 120VAC, then use a variable frequency drive to convert the 50Hz to 60 Hz. Again, it would be odd to find one that takes in 120VAC at 50Hz.
You could import a photovoltaic system made for the US, one with a local battery storage.
You'd have to have one made to not connect to the power grid. Normal systems are made to synchronize with the grid - that won't work for a 60Hz PV system anc a 50Hz grid.
Just get 230VAC appliances like everybody else in Europe and get on with your life.
I can't think of a single advantage to using 120VAC equipment that would make it worth the hassle. |
H: Why do we see one, unified memory address space in ARM Cortex-M core based MCUs even though they have Harvard architecture?
Most of the ARM Cortex-M core based MCUs have Harvard architecture (except for Cortex-M0 and M0+.)
The thing I do not understand is that why we see only one memory address space. For example, in tge STM32F4 we see only a unified memory address space:
If ARM Cortex-M based MCUs have Harvard architecture (in most cases,) why do we not see two separate memory address spaces - one for data and one for code instructions - instead of one?
AI: When you pick a STM32F4 chip at random and look at the datasheet, in section 2.2 we see a block diagram of the chip.
We see that the CPU has three (!) buses - labeled I-BUS, D-BUS and S-BUS. All of them go to the "AHB bus matrix" and the D-BUS also goes to some "CCM data RAM".
I searched for "Cortex-M4 S-bus" and found this page from ARM describing the buses which describes the difference between the buses: For addresses lower than 0x20000000, the D-Bus is used for data access and the I-Bus is used for instruction accesses. For addresses 0x20000000 or higher, the S-Bus is used for both instruction and data accesses.
So the processor acts as a Harvard architecture below 0x20000000 and von Neumann above that.
However, if we go back to the chip datasheet, in section 2.2.7 (after the page break) we see a diagram of the AHB bus matrix which interconnects the different buses to different memory components on the chip. We see that the I-Bus and D-Bus have access to the same memory components: Flash memory (via ACCEL), SRAM1, and FSMC Static MemCtl. So by taking a Harvard architecture and then connecting the I and D buses to the same memory, we turn it into what may as well be called a von Neumann architecture. We can assume that each memory region has the same address on all buses where it can be accessed, because otherwise the datasheet would say otherwise. It's convenient that each piece of memory only has one address. It would be possible to connect the processor so that the instruction at 0x00000000 is different from the data at 0x00000000, but the designers of the STM32F405xx did not do that.
There is a slight difference: the "data CCM" memory cannot be used for instructions as it's only attached to the D-bus. Your memory map does not show "data CCM" below 0x20000000 so I guess on your chip this difference does not exist. However there may be other differences between the I-bus and D-bus. |
H: Is it normal that an analog voltmeter has about 7K ohm input impedance?
I have bought 10V 6c2 DC analog voltmeter, and I have tested it with a regulated DC power supply and it measured pretty accurately different voltages, however when I tried measuring the voltages in a simple circuit like KVL (30V DC source, 3 resistors: 10K, 22K, 33K) I got a quite high deviation from what I should have, for example I got only about 0.5V across the 10K resistor instead 1.5V.
I measured the input resistance of the voltmeter and I found it to be 7K!, shouldn't be with mega ohm's range?
AI: Why would it be MΩ? It is an analog meter.
Specifically (from image):
DC, Permanent Magnet Moving Coil (D'Arsonval Meter Movement), 1.5% error on full-scale reading, vertical mounting, difficult to see test voltage.
Source: Symbols in Analog Measuring Meter & meaning of it
Source: D’Arsonval Movement
Meter is based upon D'Arsonval Moving Coil Meter Movement. Meter works on motor principle, where current flowing through coil moves needle proportional to current. The coil has resistance and current which will cause full-scale deflection. Typically, 1mA. Full scale 10V should cause full-scale deflection current. 1mA at 500Ω = 0.5V.
Source: D’Arsonval Movement Meter
To extend range, a resistor is placed in series with the meter movement. This resistor drops most of the voltage only allowing <0.5V across the meter movement.
This series resistor converts a meter which measures current into a voltmeter.
If you measure voltages for a circuit with small ohms (<1kΩ), your answers will be closer to theoretical values.
Corruption occurs when the resistance of the meter is less than or close to resistance being measured. Or when meter current is close to circuit current. It's because the meter steals the current to make it work. Your measured 7kΩ is less than 10kΩ (smallest), so all readings would be off.
From meter image: 6C2 GB/T7676
From: 6L2 dial instrument [& 6C2]
Summary:
This series of meters is suitable for various electric quantity control equipment and scientific research departments to test metering instruments, power stations, power grids and other power system distribution board to measure the power consumption, can work normally in damp and hot environment. The instrument performance indicators meet the requirements of GB/T7676.1 ~ 9 standard.
This is a panel meter meant to monitor up to a 10V rail for industrial applications and ships. Not what you are looking for. It will read source voltages (1.5% error). |
H: Why did the CS resistor explode in this circuit?
I implemented the following PFC boost converter as shown in the second image and plugged it into 220V with the no-load condition but it exploded at the plug-in. The explosion happened in the sense resistor (R9 R10) the bridge rectifier is burned out and I think also the MOSFET. I have to mention that I didn't use the NTC in the circuit. What is my mistake? Is the problem the absence of the NTC?
AI: The inrush current through T1 and D1 to charge C6 will cause T1 to saturate. If the converter tries to start with the saturated inductor, it's essentially a short and large current will flow into the FET and CS resistor.
This is mitigated by adding a diode to provide a path around the inductor during the inrush:
From the app note linked in the comments, see D1:
Having said that, your construction technique isn't suitable for power conversion so there could be a bunch of other things going on as well.
Also from the app note:
Layout hints:
The layout of any converter is a very important phase in the design process that sometimes
does not have enough attention from the engineers. Even if it the layout phase sometimes
looks time-consuming, a good layout does save time during the functional debugging and
the qualification phases. Additionally, a power supply circuit with a correct layout needs
smaller EMI filters or less filter stages which allows consistent cost savings.
The L6562A does not need any special attention to the layout, just the general layout rules
for any power converter have to be carefully applied. Basic rules are listed below, using the
EVL6562A-400W schematic as a reference. They can be used for other PFC circuits having
any power level, working either in FOT or TM control.
Keep power and signal RTNs separated. Connect the return pins of componentcarrying high currents such as C4, C5 (input filter), sense resistors, and C6, C7 (output
capacitors) as close as possible. This point is the RTN star point. A downstream
converter must be connected to this return point.
Minimize the length of the traces relevant to L3, boost inductor L4, boost rectifier D4
and output capacitor C6 and C7.
Keep signal components as close as possible to each L6562A relevant pin. Specifically,
keep the tracks relevant to pin #1 (INV) net as short as possible. Components and
traces relevant to the error amplifier have to be placed far from traces and connections
carrying signals with high dv/dt like the MOSFET drains (Q1 and Q2).
Connect heat sinks to power GND.
Add an external shield to the boost inductor and connect it to power GND.
Connect a ceramic capacitor (100 ÷ 470 uF) to pin #8 (Vcc) and to pin #6 (GND) and
close to the L6562A. Connect pin #6 (GND) to the RTN star point (see 1) |
H: 5V or 3.3V supply voltage for rail-to-rail OpAmp with 0-3.3V output
I have a 0-5V signal that I want to quantize using an ADC with a 0-3.3V input range.
I want to lower the signal maximum amplitude with the following arrangement:
Is it better to power the second opamp with 5V or 3.3V?
Advantages I see for 3.3V:
The output can never exceed the maximum input of the ADC (act as a protection).
Advantages I see for 5V:
Can buy a dual opamp chip and use a single supply for both (both opamps can have better matching if this is useful for anything).
AI: Shouldn't need opamps at all.
Output impedance of c12880ma is low, 150 ohms, and ADC's is high, 1M.
A simple resistor divider with impedances in the 10-100K range will reduce the level to 0-3.3V and provide enough sources resistance to limit current just in case 3.3V is exceeded.
(I see Vladimir suggested same thing as I was prepping this answer, so it must be right :) |
H: Designing GPS matching network with TESEO and chip antenna
I am new to designing for RF and have a question regarding the design of the matching network for a GPS module I am working on.
The datasheet of the chip antenna ANT161575ST-1202A1 recommends a frequency tuning inductor of 1.2nH
and the application notes recommend a range from 0.5nH to 4.3nH, with a sweet spot seeming to be around 2nH.
However, the TESEO design guide recommends a 5.6nH inductor, and also recommends the two 120pF capacitors, which I have circled in red below. I assume these are for blocking DC signals.
I don't know how to calculate these values myself and so I am at the mercy of two competing datasheet recommendations with no idea what is best. Any help you can give to make a good decision here would be much appreciated.
AI: Since you're using the LNA and SAW filter, you need to include the series capacitors, but they don't play a role in impedance matching. Why? The reactance of a 120 pf capacitor at 1.5 GHz is less than 1 ohm, not of significance in a 50 ohm antenna/transmission line system.
The inductor should be the one recommended in the chip manufacturer's application note. Its purpose is to cancel out the capacitive reactance of the antenna, at frequencies lower than the resonant frequency of the antenna. Unless you have a VNA and can select a value experimentally once your board is built, you're best off choosing the mid-range value of 2 nH. Your actual VSWR may not be zero, but for a receiver circuit you'll see very little degradation in performance. Minimizing VSWR is more important in a transmitting circuit, where high reflected power could damage a power amplifier. |
H: Home automation: Turn on 5V DC 200mA power when cat approaches
Junior's got a drinking problem.
Junior's my cat, and he only drinks from running water.
Pet water fountain pumps are USB power driven (good), but noisy (30db w/ wavering pitch almost, not quite, at C3) and the noise is irritating. So, I want a Junior-detector that completes a 5VDC circuit to deliver 200mA to the pump only when Junior (8 lb house cat) approaches within 12" of the fountain.
The proximity detector should use infrared (I think) so there's no problem with noise Junior could hear, so the device should include an IR LED to illuminate Junior.
Decades ago, I'd pull something out of a Lafayette Radio or Radio Shack catalog and breadboard it, but the former is long gone, and the latter wants to sell me an Arduino-based solution, which is spendy overkill.
A web search found this 5VDC infrared light-sensor-switch combination with 80cm range, but it only passes 100mA, and I need 200mA to drive the water fountain pump.
Is there some better way to simply do this? I really like the idea of one component to handle the illumination, detection, and switching, but it must switch 200mA at 5VDC from that USB wall wart which powers the fountain pump.
AI: Use the sensor you found, and drive a small relay with a coil current of under 100 mA (basically any common small relay), to turn on the device/pump.
Alternatively use any number of PIR motion sensing modules with a built in relay. Reduce false triggering by adding a tube around the sensor to narrow the field of view. Or skip the middle man, a usb pir motion sensor that has usb connectors on both sides. |
H: How is power consumed by an induction motor calculated based on speed (from a VFD) and torque induced by the rotor shaft?
I've been tasked with carrying out some design improvements on my company's production floor.
There is a flat belt conveyor assembly line, whose movement forward movement is controlled by a single phase induction motor. Previously the induction motor was directly supplied with single phase/wall outlet AC voltage.
As part of the design improvement, the single phase signal will be supplied to a variable frequency drive, whose output will be fed into the induction motor. The idea is to control speed by changing frequency using VFD as opposed to a constant 60 Hz frequency previously.
My question is with how to estimate the power being consumed by the induction motor. At any time, if the conveyor belt has many items moving through it, this means greater load and the motor has to induce more torque, thus more power consumed?
What I am trying to do is, is to minimize the power consumption of the motor. If the conveyor has few items on it, this means a smaller load on the motor, so the frequency input to the motor will be smaller causing lower motor RPM speed, and this is efficient power wise. Is this correct?
Similarly, if the conveyor has many items moving through it, this is a greater load on the motor, so the frequency input to the motor will be higher causing higher RPM speed. Is this also efficient power-wise?
FYI I'll be controlling the frequency output of the VFD using a microcontroller and I already have that figured out.
I just wanted to know if I have the right idea, and to help understand better how the rotating speed of the shaft and the torque produced due to load, influence the power consumption of the motor.
AI: How is power consumed by an induction motor calculated based on speed (from a VFD) and torque induced by the rotor shaft?
The mechanical power is torque multiplied by rotational speed. If the torque is given in newton-meters and the speed in radians per second, that is all there is to it. If some other units are used, the result must be multiplied by a constant determined by the units.
The electric power required is the mechanical output power delivered to the mechanical load multiplied by the efficiency of the motor and by the efficiency to the VFD. Both the motor and the VFD will likely have published efficiency ratings for operation at rated speed and load. In addition, the motor efficiency rating will be based on direct connection to a sine-wave AC source. Adjustment factors will need to be used to account for actual operating conditions. The VFD manufacturer may have adjustment factors to be used for estimating purposes.
The idea that energy can be saved by reducing the speed of the conveyor to the minimum required for the process is generally correct. However, you are moving the same total mass over the same distance, against the same frictional force. You need to think about energy rather than power. The aerodynamic drag will be less, but that may not be very significant.
Changing the motor to a 3-phase motor will result in increased efficiency, but the added losses of a VFD will reduce that increase. The most efficient operation may be to let the load accumulate with the conveyer shut off then move a batch at full speed.
A project like this requires carefully analyzing all of the details. What is the most efficient operation of the entire assembly line both in terms of energy and in terms of human labor? |
H: Antenna feed trace keep it short or long?
I am designing a GPS module but am quite new to RF design. I have seen a number of people say to keep your antenna feed line as short as possible. But in the design guide of the GPS module I am using, it says for chip antennas, which I am using, keep the module a minimum of 2 cm away from the antenna.
Also, the datasheet for the chip antenna I am using shows a long winding trace for the feed line.
I have several components in between the feed point and the RF IN pin on the GPS module, such as blocking capacitors, LNA, SAW filter, and frequency tuning inductor. I have placed the GPS module about 7 cm away from the antenna, placing all the components in between like this.
Which design rule should I obey more closely? Trying to keep the GPS module at least 2 cm away from the chip antenna? Or keeping the RF traces as short as possible? Also I would welcome any other comments or criticisms of my design.
AI: Optimize positioning of the antenna on the PCB: it should be at the upper right corner, not halfway up the right edge.
Minimize bends and jogs in the microstrip transmission line. Every discontinuity is a potential source of reflections and loss. Just one bend at the lower right corner should be sufficient.
The LNA/SAW components should be as close as possible to the antenna so that transmission line losses don't degrade the noise figure.
Move all the power and digital headers to the far left end of the PCB
Rotate the GPS chip so the antenna output emerges at the lower right corner and can connect directly to the transmission line. Moving it to about the middle of the board will provide sufficient isolation from the antenna while leaving room to keep the DC/signal headers all on the left end. |
H: How can one pass values to a bus in Verilog without first making a wrapper bus?
I have just defined an SR flip flop, and I need to now define a D flip flop. I am going about this by using an SR flip flop within my D flip flop. However, because I used a bus for my S and R inputs on the SR ff, I don't know how to get D and D' into this bus (sr[1:0]).
I know that I could do this by creating another empty bus/array, but I am asking to see if this can be done more efficiently such as passing [d, ~d] to the constructor of the SR ff.
Current code:
module sr(q, qb, sr, rst, clk);
input [1:0] sr;
input rst, clk;
output q, qb;
reg q, qb;
always @(posedge clk) begin
if(rst==1) begin
q=0;
qb=1;
end else case(sr)
2'b00: begin q=q; qb=qb; end
2'b01: begin q=0; qb=1; end
2'b10: begin q=1; qb=0; end
2'b11: begin q=1'bx; qb=1'bx; end
default: begin end
endcase
end
endmodule
module df(q, qb, d, rst, clk);
input d, rst, clk;
output q, qb;
always @(posedge clk) begin
sr sr1(q, qb, [d, ~d], rst, clk);
end
endmodule
AI: You are looking for the concatenation operator, which is expressed like this: { , }.
Only a small modification is needed to make your code work:
sr sr1(q, qb, {d, ~d}, rst, clk); |
H: Why do the leads of some resistors have holes?
Why do the leads of some resistors have holes?
Is it to:
Run a wire through it before soldering? If so, what is the best technique?
Run a tiny screw through it for connecting a tiny lug?
Provide a barrier against conductive heat transfer between the body and the tip (by both the hole and the flattening, soldering the tip only)?
Example (the undeformed part of lead diameter is 2.5mm in his case; the hole diameter is 1.8mm):
AI: It's called a solder lug terminal. Or a pierced terminal.
You want to use a short j hook, a 90 degree bend, or a zig-zag z hook depending on your application and solder it.
https://workmanship.nasa.gov/lib/insp/2%20books/links/sections/613%20Terminals.html
It is not made for a screw lug, the same model high wattage resistors do come with threaded nut and bolt variations for lugs instead. These tend to be 50 to 100 watts or higher models, off the shelf anyway.
https://cdn11.bigcommerce.com/s-h1jjeo/products/67092/images/306727/T66974%252520%25282%2529__26242.1438139758.500.750.jpg?c=2
Yes you could use a tiny nut and bolt (not a screw!). That's not the intended application but it will work if you use precaution. Make sure it's tight and use threadlocker. Vibration and thermal cycling could cause it to unscrew.
And the size and shape is for convenience of attaching a properly sized wire. At 25 Watts 8 ohms 3 amps, you are not connecting a thin little 22awg wire where a bare lead is enough. |
H: How to control/remove "quiescent current" of UniversalOpamp2
In the circuit below, I get a quiescent current (entering positive supply and leaving negative supply of the op amp) of about 497 µA, while the load current is only 5 µA. I am aware that this purported quiescent current has no real-world significance, but my issue is that it is a nuisance when simulating low-power circuits.
It was the same for all levels of the UniversalOpamp in this circuit, with the exception of levels 1 and 4, which displayed no supply current at all (not modeled).
In other circuits, the quiescent current turned out to have different values.
Does this follow any logic ? I had guessed that the UniversalOpamp2 would have no quiescent current, but it seems like it takes a random amount which I cannot really control. So is there a way to either prevent the quiescent current or - even better - set it to a specific value ?
AI: [Opamps]/UniversalOpamp[2,3a,3b] use VCSW as the output stage, and the quiescent current is directly related to the values of Ron/Roff, since the switch has a resistance that depends on the logarithm of the conduction. The solution is to change these values so that they match your preferences. For example, here's how it looks like when varying Ron, for this equivalent circuit (as far as the output stage is concerned):
Stepping Roff while keeping Ron=1 will show the exact same currents. So, if your application is for very low power, you can assume both a higher Ron and Roff, so you could make them Ron=100 Roff=1T, which will give you a 1.2 μA. The ratio will be less than the recommended maximum of 1e12, to avoid numerical issues.
To modify Ron/Roff open up the Documents/LTspiceXVII/lib/sub/UniversalOpAmp[2,3a,3b].sub and look for this line:
.model Q SW( ... ) |
H: Op Amp rails to negative supply when supply voltage is +-5V. However, supplying +-12V "overcomes" this railing, and the op amp begins to properly work
The op amp rails to the negative supply rail with +-5V power supply. If I turn up the voltage supply to +-12V, the op amp begins to work properly. When I turn the voltage back down to +-5V without turning off power, the circuit continues to work properly. However, if I touch a probe to IN- after I've raised and lowered the voltage again, the op amp goes back to railing near the -5V rail.
Here is the circuit I am using. I am using an LT6236 (datasheet here). Power supply is only "allowed" to be +-5V, not +-12V according to the datasheet. However, I cannot overcome this negative railing without turning up the voltage. The railing was true before I turned up the supply voltage, so that has not damaged it so far. I have also tested on different pcbs, and get the same effect, so i dont believe it is a component failure. Any advice on what I am missing would be greatly appreciated.
AI: Even if you acquired this device from a reputable source, after applying almost twice the maximum voltage informed at the datasheet, it is not expected that it should continue to work normally:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Edit regarding the comments about the strong feedbacks. Even considering an ideal opamp (except for output limitation), there should not be a DC stable point: |
H: Output resolution of PWM H bridge drivers such as L298N
I am working on a project which require a high resolution of the output signal of L298N or similar driver. Is it possible to control the output signal with a 1% resolution or better? What is the typical resolution of such drivers?
AI: A resolution of 1% is 1 in 100 or less than 7 bits of PWM. This is not particularly ‘high’ resolution. Most microcontrollers should be able to generate such resolution at well over 20kHz.
As far as the L298 is concerned, it has a finite switching time and voltage drop. At higher PWM frequencies, the L298 switching time might cause significant error otherwise it can be ignored. It also has a voltage drop dependent on current. This would be another source of error.
You’d normally use a L298 to control a DC motor. If you wanted accuracy, then you’d have a means to sense motor speed/load and the control loop would seek to minimize the error. So unless you’ve controlling something really strange, the L298 as a source of error can be discounted. |
H: How to fill flip flop clock truth table?
I have this truth table that I want to fill, however, I have no idea how to read the flip-flops on the left. Can anyone provide me a minimal example of how to approach this problem?
EDIT: drawing this table as something like this ... will be helpful for newbies.
AI: Can anyone provide me a minimal example of how to approach this problem?
NB: as @Tony Stewart EE75 pointed, you need "understand" the JK datasheet and "functions" tables of JK device block.
See this for informations about "truth" and "excitation" tables (a little "error", JK changes to RS ?).
For reference, EE&O, did not verify tables.
NB: Qn at the very left of the next picture ( Karnaugh map) should be Qn+1!
Making a simulation will help a little, and help fill the table.
This is a "shortcut", for the "first time".
Remember that only the falling edge of the clock is meaningful.
All simulations must begins with a "clear"...
Two simulations are made. See only the first part (Q1,Q2) for starting.
The first with "ideal" FF (Q1,Q2 : no delay=DO_EFF),
the second with "real" FF (Q3,Q4 : SN7476).
This will make the difference between the "ideal" world and the "real" world. |
H: How to connect to camera interface on OVM7251-EAAR-AA0A?
There's a weird connector on the OVM7251-EAAR-AA0A board from Omnivision:
It seems to be 40 pin and 2 cm wide, and from the sensor documentation it's supposed to be a 1-lane mipi / lvds interface.
Does anyone know how to connect with this from any computer?
AI: There's a weird connector
Not so weird. My Connector Identification Utility identified it as a Samtec Q strip QTE-020-01-F-D-A.
{Image source: Digikey}
Edit: however, knowing the connector tells you nothing of the port (the protocol interface). |
H: What are these battery power connectors called?
I'm trying to source some battery contact connectors for sliding straight metal strips into. They're the sort of thing that are used in power tool batteries, but I want to use them for a different project.
Can anyone tell me what these are called and any example part numbers / links? I've tried searching for things like "battery contact", "power tool battery contact" and a few similar terms, but have drawn a blank so far.
For reference, the ones in the photo came from a Makita Battery Case Kit that you can buy to make DIY power tool batteries.
AI: They are "spring leaf socket PCB terminals". The ones in your pictures are custom made. You can buy similar ones off-the-shelf:
https://www.aliexpress.com/item/1005003287167688.html?gatewayAdapt=glo2fra
{AliExpress} |
H: Is there any difference between Silicone and RTV
I've used silicone RTV that's intended for use on PCBs and have also used 100% silicone purchased from the hardware store to use on PCBs. I was not able to tell a difference between the two. Everything looked and smelled exactly the same. I know there could still be differences, but I'm wondering if they're just selling it specifically for electronics so they can charge a premium. The cost of RTV for electronics is around $30 while the stuff at the hardware store is $6.
Obviously not all silicone/caulk from the hardware store is the same as silicone RTV. The question is if some of it is and if people are wasting money on silicone RTV.
AI: Cheap silicone is acidic (like vinegar) while GE's Room Temperature Vulcanizing (RTV) is not, and is suitable for electronic anti-corrosive insulation on metals. The main features are thermal insulation and high voltage insulation in addition to the expected dust & water HV protection.
However, the application is only as good as the cleanliness of the contact surfaces, to avoid creepage effects. |
H: Effect on sampling time on BER
Just for some background context:
A digital signal has jitter present on it. In this situation there is
only random jitter (RJ), which is unbounded and normally distributed.
When the digital signal is sent to a receiver, there is a bit error
rate (BER). Let's say the BER is 1E-12, that means that 1 in every
1E12 bits is an error.
I was told that when measuring bit errors, there is a difference between sampling for errors 10 times for 1 minute each time, and 1 time for 10 minutes. I have trouble understanding why this is the case. I'm thinking that a bit error will occur because the instantaneous jitter is high enough to move the data edge to "miss" the sampling time. I.e. would be a transition in the middle of the eye opening.
I ran some MATLAB code to try to see this, but it seems like my results are agreeing with my intuition.
clc
clear
% compare the amount of normally distrubuted (mu = 0, sigma = 1)
% random values with magnitude greater than 3 for two cases:
%
% case 1: 100 runs of 1000000 samples
% case 2: 1 run of 100000000 samples
%
%
test_count = 100;
sample_count = 1000000;
counter_1 = 0;
for test_num = 1:test_count
samples = normrnd(0, 1, 1, sample_count);
for ind = 1:length(samples)
if abs(samples(ind)) > 3
counter_1 = counter_1 + 1;
end
end
end
counter_2 = 0;
samples = normrnd(0, 1, 1, sample_count*test_count);
for ind = 1:length(samples)
if abs(samples(ind)) > 3
counter_2 = counter_2 + 1;
end
end
disp("Case 1: " + sample_count + " samples " + test_count + " times: " + counter_1)
disp("Case 2: " + (sample_count * test_count) + " samples " + 1 + " times: " + counter_2)
The results are:
Case 1: 1000000 samples 100 times: 270540
Case 2: 100000000 samples 1 times: 271171
According to a z-score table, there is a 0.27% chance of getting a sample 3 sigma out, which my test agrees with. So unless I'm missing something, shouldn't 1 minute of BER testing ten times be equivalent to 10 minutes once?
AI: It makes no difference. Assuming the jitter is uncorrelated from bit to bit, the number of bit errors observed in a given interval of time (1 minute or 10 minutes) is governed by the Poisson distribution.
In probability theory and statistics, the Poisson distribution is a discrete probability distribution that expresses the probability of a given number of events occurring in a fixed interval of time or space if these events occur with a known constant mean rate and independently of the time since the last event. [Wikipedia]
The probability distribution function for a Poisson process is given by
$$\!f(k; \lambda)= \Pr(X{=}k)= \frac{\lambda^k e^{-\lambda}}{k!}$$
where \$\lambda\$ is a parameter that is both the mean and the variance of the distibution. If \$r\$ is the rate of the event occuring (\$10^{-12}\times B\$ if we're counting errors occuring in a bit stream with bit rate \$B\$ and BER of \$10^{-12}\$), then for observation over a time interval \$T\$, \$\lambda=rT\$.
In order to show that the probability of some number \$n\$ of errors occuring in a given interval is the same as a total of \$n\$ occurring in two intervals of half the duration, we have to consider the possibility that, 0 errors occur in the first interval, but \$n\$ occur in the second interval; 1 error occurs in the first interval and \$n-1\$ occur in the second interval, and so on. So we have to show
$$\sum_{k=0}^n f(k;\lambda/2) f(n-k;\lambda/2) = f(n; \lambda)$$
or
$$\sum_{k=0}^n \frac{(\frac{\lambda}{2})^k e^{\lambda/2}}{k!}\frac{(\frac{\lambda}{2})^{n-k} e^{\lambda/2}}{(n-k)!} = \frac{\lambda^n e^{-\lambda}}{n!}$$
The left hand side can be rewritten as
$$(\frac{\lambda}{2})^n e^{-\lambda}\sum_{k=0}^n\frac{1}{k!(n-k)!}$$
or, from the definition of the binomial coefficient \$\binom{n}{k}\$,
$$(\frac{\lambda}{2})^n e^{-\lambda}\sum_{k=0}^n\binom{n}{k}\frac{1}{n!}$$
Moving the \$frac{1}{n!}\$ term outside the sum and applying the binomial theorem, this is
$$(\frac{\lambda}{2})^n e^{-\lambda}\frac{1}{n!}(1+1)^n$$
Cancelling factors of \$2^n\$ in the numerator and denominator we have
$$\frac{\lambda^n e^{-\lambda}}{n!}$$
which is just what we were trying to get to.
From this we can generalize to the case of breaking up our test interval into any number of smaller intervals that total to the same time, and we will get the same probability distribution for the number of errors observed. |
H: Effect of Ethernet PHY interface on the speed of Ethernet
I have been working on this new project where I need to include Ethernet.
But the microcontroller of my project doesn't have any Ethernet PHY included (no MII, RMII, GMII, etc.)
So, I am instead using SPI to interface my Ethernet controller with my microcontroller, thus effectively making SPI as my Ethernet PHY.
Now, my question is,
SPI is one of the low speed interfaces in the arena which may be used up to 100 Mbit/s at the most (stretching it too far).
Ethernet, on the other hand, is one of the high-speed interfaces starting from 1 Gbit/s, 10 Gbit/s, 100 Gbit/s, etc.
Won't the speed of Ethernet be limited in such a case? (I think it should.)
But the datasheet claims otherwise. In spite of the SPI interface, it claims Gbit/s and Gbit/s speeds.
AI: The chip can connect at 10 Mbps and 100 Mbps Ethernet link speeds, and it has a maximum SPI bus speed of 40 MHz.
So yes, even if it can communicate with 100 Mbps link speed, it won't achieve 100 Mbps throughput as it it is limited by the SPI bit rate, and so even slow microcontrollers with slow SPI bit rates can still work with this chip, as there are packet buffers and FIFOs inside the chip. |
H: 74HC74D initial output value after power up
I use a touch sensor (Active Low) to light up a light bulb. here I've used a 74HC74D D flip flop to turn on an off the bulb with the sensor pulse (sensor output is active low which is then converted to a active high with a PNP transistor to make the flip flop work)
my problem is that at the power up the state of the output is not determined. Is there a way to make the output zero at the startup to ensure an powered off bulb at the start up the circuit?
AI: One solution is to use the CLR pin of the flipflop. Place a capacitor to GND and a resistor pulled up to Vcc on the pin. This will create a delayed low level on that pin at power up to clear the flop.
The RC time constant needed will depend a lot on the rise time of the Vcc at power up. |
H: What explains this bulb/motor behavior?
My son was building circuits with a hobby kit. He tried connecting a small DC motor and incandescent bulb in series with two batteries. The motor is not marked, probably is rated at no more than 6V. The lamp is marked 3V.
The motor shaft spun, but the bulb did not illuminate. When he added a fan blade to the motor, we were both surprised to see that the lamp turned on.
I know that neither the lamp nor the motor can be explained with Ohm's law, but beyond wildly guessing that the motor increases the circuit's current as it has to work harder I couldn't get very far.
We are both happy to figure this out on our own but need a nod in the right direction. I have a multimeter and a good selection of resistors if that would help us. What kind of an experiment or demonstration could we try to help us understand?
AI: For an ideal motor, speed and voltage are proportional to each other, as are current and torque.
A small low voltage motor will be far from ideal, but the general relationship still holds.
With no load on the shaft, the torque and hence current will be very low (zero in an ideal motor), with little voltage dropped across the bulb, and a high voltage across the motor, reflecting its high speed.
As you increase the load on the shaft, the current increases as the torque output increases.
As you slow the motor down, the voltage across the motor decreases, resulting in more voltage across the bulb, which increases the current.
If you stall the motor, safe to do as you have a current-limiting bulb in series, the voltage across the motor will be small (zero in an ideal motor), and the current through it high. |
H: Can I replace a P labeled SMD fuse with a K labeled one?
I am fixing an "old" laptop and I needed to replace a broken screen. While disconecting and reconnecting the ribbon cable, I probably shorted something. Now the back light on both the broken and the new screen doesn't turn on.
After some googling and probing I noticed that a P labeled SMD fuse is not conducting. People online usually just short the fuse and call it a day. I would like to be safe and add some protection. The problem is I have no P fuses laying around but I found some K labeled ones in a scrap laptop.
As far as I know the P labeled one is rated for 3A at 32V and the K one is rated for 1.5A at 64V, so the power at which it triggers is about the same.
Can I do the replacement?
AI: A fuse doesn't trigger on power, but on current flowing through it. So, no, you can't. |
H: What's the difference between these two logic diagrams?
I have these two xor logic diagrams, they seem to work the same on inputs which are not even, but what is the difference between them? What is the purpose of it and which one would be faster?
AI: There does not appear to be any logical difference.
The second will be faster, because there are only two XOR-gate delays between inputs and outputs, as opposed to three. |
H: KiCad: Ground plane won't connect to pads
I am currently running into a problem in KiCad where the ground plane won't connect to some pads.
KiCad even tells me to connect them but doesn't seem to make the connection automatically.
AI: I just checked the settings of the plane and realized that pad connections were turned off. I placed another pad and KiCad turned connections on automatically. It was just a dumb mistake on my part; I thought they were enabled by default.
Thanks for the comments as they made me double-check the settings. |
H: What is the purpose of the capacitor and diode in this fan driver circuit?
I have an FPGA dev board with a fan PWM circuit so that you can hook it up to a fan + heatsink. I happen to like this as we put a common heatsink together for the hottest components, and I drive it from the FPGA based on the FPGA's internal temp.
Now we're looking to build the first iteration of our own PCB. I have made a "highlights" schematic showing basic connectivity and some of the support circuits for elements outside the FPGA. I will soon be handing this schematic to our real electrical engineer. The fan PWM support circuit is one on my "quasischematic," and I basically had to reproduce it from the dev board's schematic. Shown here:
I think I understand most of this. R8, R9, R10, and Q1 are there to take the relatively small CMOS 3.3V signal of the FPGA (FanPWM) and turn it into something high enough current to drive the power MOSFET. R7 is a current limiting resistor, preventing a 100% duty cycle from letting the fan draw more current than it can handle. Q2 is the power MOSFET that acts like the "on-off" switch that sits between the fan and the ground.
Here's the part I am confused about. What is the reason for the Schottky rectifier and the polarized capacitor? I only have one idea about the diode, which seems odd to me. The capacitor I have two ideas, but neither seems right.
Diode Idea: ESD
So I thought that maybe the diode was for some static protection between 12V and the other stuff. But that seems odd because, without it, the fan should act as a large inductor any instantaneous spike due to ESD or inrush current when the 12V supply is connected should be stopped by the fan, and frankly, anything not blocked by the fan will bypass the diode anyways.
Capacitor Idea 1: Power Supply Filtering
This idea seems unlikely because the capacitor is polarized, has a relatively large value, and is not in parallel with at least one other cap. The other power supply filtering capacitor arrangements I see elsewhere are frequently 10uF in parallel with 0.1uF or 2.2uF with 10nF. Here we might have low frequency covered but not high frequency, and the polarization is odd. Further, this is not between 12V and ground.
Capacitor Idea 2: Energy Storage / Pulse Smoothing
I thought maybe a large capacitor like that might be storing energy to "smooth out" the sharp pulse edges. But that seems odd to me as this is on the ground side of the fan.
So my question is: what is the purpose of the diode and capacitor in this circuit?
AI: Motors are inductive loads. When you apply PWM to a motor, it generates high voltage spikes. The purpose of the diode is to shunt the energy from these spikes back to the supply instead of the transistor. The diode is called shunt diode or free wheeling diode.
The capacitor helps absorbing some of the energy and slow down the transients. |
H: Odd results from mesh current analysis in a circuit with a diode
I have this circuit:
simulate this circuit – Schematic created using CircuitLab
The reverse saturation current of the diode is 10^-6 A.
I use mesh current analysis to find the current inside the diode:
And putting this into WolphramAlpha gives I2 = 0.99...A so the current inside the diode is 0.
But I dont get it why this is happening.
Also if R1 becomes 100Ω there isnt a real solution to the system of the equation from mesh current analysis.Where am I wrong?
AI: You have the wrong sign for the voltage across the diode. You should be adding instead of subracting here:
(Also I'm not sure where the "+1" term comes from...If it's from inverting the Shockley diode equation, then you have it in the wrong place and forgot to multiply it by \$I_s\$, but you can probably ignore it and get an answer that's close enough to correct) |
H: Conditions in Timers (STM32F103C6)
I am developing a project on STM32F103C6 and am new to it. I've implemented a timer with interrupt, which checks the temperature value measured by a sensor(LM35) every second, and if it is more than 38 degrees, the system triggers a buzzer.
The system triggers the buzzer as expected but the system cannot read temperature value from the sensor anymore. That is to say, it stucks in the timer.
Here is the piece of code which performs this part:
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
if(htim == &htim2){
char temp_string[2];
sprintf(temp_string,"%d",temperature);
if(strcmp(temp_string,"38")>0){
HAL_GPIO_WritePin(GPIOB,GPIO_PIN_3,GPIO_PIN_SET);
}
else{
HAL_GPIO_WritePin(GPIOB,GPIO_PIN_3,GPIO_PIN_RESET);
}
}
}
What can be the reason for the problem?
Any help is appreciated.
AI: The first error is not having enough room for the string. You need at least 3 characters to hold two characters and the terminating null character. Basically, if the temperature is larger than 9 degrees, it won't fit and trashes your stack.
The next error is trying to convert the number into string in interrupt context. Depending on what other things you are doing, it may not work. If you are sure that your sprintf() is re-entrant then go ahead, but in general, you just don't do conversions to stringa and comparing strings in interrupts.
The string conversion step is useless extra step anyway, as you can just compare the temperature with an integer and achieve the same result faster. |
H: Unidirectional level shifter 1.8-5V -> 3.3V
I'm looking for a circuit/IC to shift logic levels between 1.8/3.3/5V and 3.3V.
This is to connect various devices via UART to the ESP8266. As such, I only need unidirectional translation - the ESP8266 TXD operates at 3.3V and should be shifted to 1.8/3.3/5V according to a reference voltage. Likewise, the data coming into the ESP8266 RXD port will have to be shifted from 1.8/3.3/5V to 3.3V. The device will likely operate at 115200 baud, but it would be nice if the translation worked up to 128000 baud. Most translation ICs I've found have the condition that VCCA<=VCCB, which doesn't work for my use case, as the shifter should work both in "step-up" and "step-down" mode, depending on the reference voltage. Could this problem be solved by using 2 BJT inverters like in the image? Would 2N2222 transistors work? I'm also open to the idea of using a dedicated IC, as various sources have led me to believe it could be a more power efficient and reliable solution. The only problem is finding a suitable IC. Would a SN74LVC1T45 work?
AI: I don't see why you wouldn't use a single part designed for the task such as 74LVC1T45.
(I would avoid using parts without a DIR input- the so-called automatic type).
The switching characteristics are specifically guaranteed for your requirements (pages 6 and 7 on the linked Diodes Inc datasheet) and are impressively high performance. Below is assuming Vcc(A) is the ESP8266 power supply, but the reverse is also guaranteed in all relevant cases.
The only downside I see is that the SC-70 packaged parts are not easy to source at the moment, but various other packages are easily sourced. |
H: Why does Altium not permit changing net names from schematic view?
Here is a short snippet from the schematic view showing the righ click menu from a net and the net properties:
Altium shows Physical name and Net name for the net. However, there is no way to modify them in here. This is quite puzzling. This brings me to these questions:
What is the difference between the Physical name and Net name for this net?
How do I modify the net name to an arbitrary value from the schematic window?
Note: I am using Altium 22.
AI: The logical net names are local to a schematic so they can vary from physical if you are using a hierarchical design.
To modify the net name, drop a net label onto the wire. Some folks like to give a sensible name to every single distinct net in a design. |
H: How to unplug these connectors on 80's amp/receiver
I'm trying to unplug these connectors to get access to the lcd display.
Do I need a special tool? I tried but to no avail. The little ones seem fragile. What is the name of these connectors?
AI: I have seen ribbon cable connectors like that before. They were originally very common on imported electronics. They are connectors but but not in the sense as most people would think, they do not unplug. They made it easy to connect ribbon type cable to a PCB. If you look on the bottom they will be soldered to the PCB with no way to release the wire from them. The only way to remove them is to unsolder them from the PCB. The PCB board shown in the picture is relatively fragile and will not take much abuse desoldering. If you are not experienced in desoldering through hole components consider if you can afford to lose the unit or have a friend do it for you. |
H: Does a demultiplexer affects as a PWM would do?
I'm designing a circuit which has to display 8 numbers. I pretend to do it with 7-segments displays. I dont have enough pins in my MCU to control every single display independently, thus, I will use a demultiplexer.
The thing is, using a demux, only 1 display can be "on" per instant of time (i.e. if I want to show numbers from 1 to 8. In one instant of time I will send the data to show the "1" to the first display, and in the next instant of time I will send the data to the show the "2" in the second display, and so on). Obviously this change is going to be so fast that It will seems that every display is on all the time, but my question is, the luminosity will be 1/8 of the total? (As each display is "on" only 1 instant of time and there are 8). I think about it as a PWM with a duty cycle of 1/8 (12.5%). I would like to have all the displays with the max luminosity.
Any help is appreciated.
AI: As you have surmised, the multiplexing affects the display brightness. The common solution is to use a higher peak current, but there is a limit to how much you can do this - refer to the datasheet of your led displays to determine the peak current the display will tolerate.
if you decide to use a higher peak current, then ensure your drive circuitry can provide this. If using the GPIO of a microcontroller to drive the displays directly, then it is possible you can exceed the available current. In which case you need extra driver circuitry.
Note that there are chips that do all the work for you like the ICM/MAX7219 and others. |
H: Stand-alone ESC v.s. BLDC driver ICs, what's the difference?
I am designing a customized miniature drone for research and would like to embed the ESC for BLDC motor directly on board to save space and weight. I have searched a lot for ESC design online and can understand the basics to the point that I think I can implement a trapezoidal commutation algorithm using microcontrollers.
As I understand it, it only takes a periodically changing signal (with PWM modulation) in sync with the Back-EMF to control the motor. But there are a number of dedicated control firmware like BLHeli out there which are rather complicated, and there are also ICs like MCT8316A from TI that can do the commutation/control for me. Furthermore, it seems that almost all stand-alone ESCs are using MCUs with BLHeli firmware + gate driver + FETs design instead of ICs with everything included.
So my question is, what's the difference between:
A simple commutation algorithm executing on my own controller.
Stand-alone ESCs with MCUs with BLHeli firmware.
ICs with the control algorithm built-in.
Are there any fundamental differences between these three solutions? What's the difference between them in the aspect of power efficiency? Why don't people use ICs with everything built-in in stand-alone ESCs?
Thanks a lot!
Some additional information:
In my application, the main concern is power efficiency and the simplicity of hardware/software, and higher prices can be tolerated.
The motor I would be using is similar to this motor and draws <5A current.
A quick follow-up question: I see there are ICs and algorithms for FOC control that provides higher power efficiency. But are they suitable for high-speed operating multi-pole motors used in drones?
AI: So my question is, what's the difference between:
A simple commutation algorithm executing on my own controller.
Impracticable. It won't work well, if at all.
Stand-alone ESCs with MCUs with BLHeli firmware.
A proven solution. Their design has been perfected over many years, and will be a good match your motor. Another advantage of stand-alone ESCs is that they are easy to replace if they burn out.
ICs with the control algorithm built-in.
'All in one' ICs suitable for high power brushless motors have only become available recently. Some may work OK with the right 'tuning', but that would be your responsibility (expect a lot of trial and error, a lot of crashes, and burned ICs).
The MCT8316A requires 4.5 V minimum, which might be a problem depending on what battery you want to use.
A quick follow-up question: I see there are ICs and algorithms for FOC
control that provides higher power efficiency. But are they suitable
for high-speed operating multi-pole motors used in drones?
Drone motors are usually designed for trapezoid drive, and don't need precise control at low speed. What they do need is fast acceleration, high power output and high peak current handling. The tiny motor you are looking at also needs high operating speed, which is easier to achieve with 6 step commutation. |
H: Buck converter bias supply
I am using an MP2325 buck converter (datasheet) to drop a 24v supply down to 5v to supply a Raspberry Pi.
The datasheet above details Pin 7 as VCC a "Bias Supply" (page 7) and mentions nothing else about that pin in the datasheet.
I have found this app note from TI: Benefits Using a Buck Converter's External Vcc Bias Pin which says:
Several DC/DC converters on the market have an additional pin that accepts an externally applied voltage.... An external bias voltage, also called a split-bias rail
voltage, above the internal LDO's output voltage will override the internal LDO and enhance the efficiency of the
converter by eliminating its power loss. The VCC current will be supplied from the external bias instead of the
internal LDO.
However all of the example schematics from Monolitic in their datasheet show VCC just tied to GND and the PG output.
Is the VCC pin on the MP2325 a "bias supply" as TI describe it? What is this VCC pin doing in relation to PG?
AI: The \$V_{CC}\$ pin on the MP2325 is brought-out for the externally applied smoothing capacitors. Up to 5 mA can also be drawn from \$V_{CC}\$ for (say) the PG pin: -
The red-lines in the image above are my addition.
Is the VCC pin on the MP2325 a "bias supply" as TI describe it?
No, it is not a pin that should be used this way. \$V_{CC}\$ is generated and used internally by the chip and, it needs external capacitors to smooth it.
What is this VCC pin doing in relation to PG? |
H: Antenna: three element array, Balanis problem 6.3
I am trying to solve the below Problem (only question (a)), where I am mainly stuck on figuring out how to read this z/y drawing of the magnitude and phases.
The problem has to do with 3 antennas called "three-element array of isotropic sources". We always assume far-field observations.
The problem is from Balanis' Book: Antenna Theory - Analysis and Design, Balanis (Wiley, 2016)
A three-element array of isotropic sources has the phase and magnitude relationships shown. The spacing between the elements is \$ d = λ∕2 \$
Here is how I attempted to solve it.
First of all, it does not strictly define whose "magnitude" it gives me. So I suppose these -1, -j and +1 are the phase and magnitude of the Array factor of each element (antenna). Now, there are two functions to calculate the array factor: \$ AF= \sum_{n=1}^{N} a_{n}e^{j*(n-1)*(k*d*\cos(θ)+β)} \$ and \$ AF_{(n)}=\cos[\dfrac{1}{2}*(k*d*\cos(θ)+β)]\$.
Since the data it gives me include complex numbers, I will use the first function.
Where \$ N = 3 \$ the total number of elements,
\$ a_{n} \$ is the excitation coefficient of each element,
\$ k=\dfrac{2π}{λ} \$ is the wave-number,
\$ d = \dfrac{λ}{2} \$ is already known/given, its the distance between the elements,
and \$ β \$ is the difference in phase excitation between the elements.
The only things are not known, are \$ a_{n} \$ , \$ β \$ and \$ θ \$.
I name \$ ψ = (k*d*\cos(θ)+β) \$ and I do:
\$ AF = a_{1}*e^{j(1-1)*ψ} + a_{2}*e^{j(2-1)*ψ} + a_{3}*e^{j(3-1)*ψ} \$
\$a_{1,2,3} \$ should be \$ 0,-1,1 \$ respectively, according to the drawing.
So it becomes:
\$ AF = 0*e^{j(0)*ψ} -1*e^{j(1)*ψ} + 1*e^{j(2)*ψ} \$
\$ \boxed{AF = -1*e^{j(1)*ψ} + 1*e^{j(2)*ψ} }(1)\$
Note1: Isnt't weird that element \$ \#1 (a_{1}) \$ does not contribute to the AF magnitude?
Now, lets calculate ψ.
\$ ψ = (k*d*\cos(θ)+β) = \dfrac{2π}{λ}*\dfrac{λ}{2}*\cos(θ)+β = π*\cos(θ)+β\$
I am pretty much stuck here. I think θ is where I should put the phases the drawing show me, but I do not know how can I convert them to degrees. The drawing gives me:
\$ 0 - j \$ for the #1 element,
\$ -1 + 0j \$ for the #2 element,
\$ +1 +0j \$ for the #3 element.
If I use a calculator for complex numbers and get their degrees?
Note2: I could also see each complex number as a point in X/Y plane and get its degree based on its slope. For example 0-j is point A(0,-1) , which on X/Y plane is 270°.
I get 90° for #1, 180° for #2 and 0° for #3.
So:
\$ ψ_{1}=π*\cos(90)+β = β \$
\$ ψ_{2}=π*\cos(180)+β =β-π\$
\$ ψ_{3}=π*\cos(0) +β =β+π\$
Now, using \$(1)\$: \$ AF = -1*e^{j(1)*ψ_{2}} + 1*e^{j(2)*ψ_{3}} =
-e^{j*(β-π)} + e^{j*2*(β+π)}\$
There is so much uncertainty solving this, like the Note1 and Note2.
Another question: I also think \$ β \$ could be the angles I calculated (90, 180, 0) degrees, since \$ β \$ is called " difference in phase excitation between the elements ". But I used these angles on \$ θ \$ instead.
AI: I think you are probably misinterpreting the drawing and the number of the elements compared to the array factor expression. Here's what I end up with:
$$AF(\theta)=\sum_{n=1}^3 a_n e^{jkz_n\cos\theta}$$
Where \$k=\frac{2\pi}{\lambda}\$ so
$$AF(\theta)=\sum_{n=1}^3 a_n e^{j\frac{2\pi}{\lambda}z_n\cos\theta}$$
From the figure the array element numbering is not in increasing order, but has the first element in the middle so \$z_1=0\$, \$z_2=d\$, and \$z_3=-d\$, with corresponding element excitations \$a_1=-j\$, \$a_2=-1\$, and \$a_3=1\$.
$$AF(\theta)= a_1 e^{j\frac{2\pi}{\lambda}z_1\cos\theta} + a_2 e^{j\frac{2\pi}{\lambda}z_2\cos\theta} + a_3 e^{j\frac{2\pi}{\lambda}z_3\cos\theta}$$
$$AF(\theta)= a_1 e^{j\frac{2\pi}{\lambda}0\cos\theta} + a_2 e^{j\frac{2\pi}{\lambda}d\cos\theta} + a_3 e^{j\frac{2\pi}{\lambda}(-d)\cos\theta}$$
$$AF(\theta)= a_1 + a_2 e^{j\frac{2\pi}{\lambda}d\cos\theta} + a_3 e^{-j\frac{2\pi}{\lambda}d\cos\theta}$$
Using the definition \$d=\frac{\lambda}{2}\$
$$AF(\theta)= a_1 + a_2 e^{j\frac{2\pi}{\lambda}\frac{\lambda}{2}\cos\theta} + a_3 e^{-j\frac{2\pi}{\lambda}\frac{\lambda}{2}\cos\theta}$$
$$AF(\theta)= a_1 + a_2 e^{j\pi\cos\theta} + a_3 e^{-j\pi\cos\theta}$$
Inserting the element excitations
$$AF(\theta)= -j + (-1) e^{j\pi\cos\theta} + (1) e^{-j\pi\cos\theta}$$
$$AF(\theta)= -j - e^{j\pi\cos\theta} + e^{-j\pi\cos\theta}$$
You should be able now to convert this into whatever form you'd want the answer. |
H: Is possible to overwrite a Serial NOR Flash sector without high memory usage?
Introduction
I am developing a high level library to read and write for winbond W25Q512JV and ATmega32U4 mcu.
From the flash datasheet:
The Page Program instruction allows from one byte to 256 bytes (a page) of data to be programmed at
previously erased (FFh) memory locations.
Additionally the smaller amount you can erase are 4kB (a sector).
Problem
To overwrite data on the flash device the process it seems like I must:
Read sector involved
Erase sector
Write whole sector
However when reading the sector that can be up to 4k length which is quite huge to keep on the memory stack. What is the best approach for this cases?
AI: It is certainly possible if that is your question, how to do it is more complex.
There is no single answer, and there can be no best case as you don't say how you will use the memory, as what is best case depends on how the memory will be used.
But you need a wear leveling algorithm of some sorts, or a file system of some sorts that can handle it, and can handle the physical storage with logical level.
A very crude approach is to just copy data temporarily to another sector, erase the original sector, and write back the data with the modified parts. You can use as small blocks to copy the data as necessary.
A slightly better way is to copy the old data sector to new data sector with the required modifications and have some kind of list to map logical sectors to physical sectors and update the list accordingly.
One approach might be to keep track of which pages are marked for erasing and erase a full sector when all or enough pages of a sector need erasing.
So it all depends how you need to read, modify and write data that is in the memory.
Many MCU or compiler manufacturers might already provide a flash file system for you to use so you don't have to re-invent the wheel. |
H: Kelvin connections in PCB
in the following webinar from youtube, a recommendation is presented about the kelvin connection at the 41st minute of the video. but I couldn't get it. (second language)
https://www.youtube.com/watch?v=gq-0ZpcGm8E
why those vias are placed? where is the other end of those vias connected? and what do those added circles around the vias do? (you may say the answers are in figures but I don't know what is the "internal plane"? why is this placed "by default"? how do those circles ensure the accuracy of measurement? are they conductive?)
AI: The circles represent the fact that the vias do not connect to the ground plane, despite the fact that they belong to the ground net.
The vias in this case are just necessary because the Kelvin trace is routed in an internal layer. If it was on the top layer, you would not need them.
The Kelvin connection is used to measure the potential across the current sense resistor. That potential is very small (sometimes just a few tens of mV), so you want to ensure that almost no current flows through the trace. This is because the trace has some resistance too, and any stray current through it could easily develop another few mV of potential (Ohm's law), which would cause a significant measurement error.
For that reason the Kelvin connection is routed from inside the resistor footprint to avoid the high current parts of the resistor pads.
For the same reason, when one side of the resistor is grounded you want to ensure that the Kelvin trace remains a "dead end" so that no stray current can flow through it, and so that it remains unaffected by any potential difference that can develop across the ground plane. So, even though it's technically GND, you want to keep it separate from the GND plane.
Another way to do this is to use a special 4-terminal sense resistor footprint, which lets you use a different net name for the Kelvin sense ground. Then the vias will naturally not connect to the ground plane. |
H: Do circuits with pull up resistors waste more electricity than circuits with pull down resistors?
A pull up resistor provides a constant voltage (and therefore some current) to an input pin on arduino.
https://learn.sparkfun.com/tutorials/pull-up-resistors/all
A pull down resistor connects an arduino pin to to ground so no current should be flowing through the pin.
When a button is used in a pull up circuit (see ref above) current flows through it only when the button is pressed resulting in a decreased voltage at the arduino pin. When the button is in its native state, the arduino pin sees 5v so more current is flowing through the pin of the arduino. I am simplifying an arduino and thinking of it as a resistor .
Since a button is normally in the open state and spends most of it time this way, if it is used in a pull up circuit, then current is always flowing through the arduino.
A button used in a pull down circuit allows voltage at the arduino pin only when it is pressed, so this seems less wasteful. But apparently, pull up circuits are much more common. why this desire to waste electricity?
AI: Let's look at a simplified cmos input and an analogy. While the atmega in an arduino uses a more complicated non-inverting Schmitt trigger for the input circuit, the same would still apply.
It's a complementary pair of fets. One p-channel at the top one n-channel at the bottom. And they experience leakage through their gates just like any mosfet.
When you have a pull up, the input is at VDD, turns off the p-channel and turns on the n-channel. Current flows through the n-fet.
And of course the opposite happens when pulled to ground. Top fet is turned on and bottom is off.
Of course these are mosfets, so current barely flows unless you are switching the state, and where leakage occurs in different ways, drain-source leakage, gate and body leakage.
Generally, this means the pull up and the pull down will result in the same amount of leakage for a modern cmos input. |
H: Help troubleshooting an unstable 595 shift register
Summary
I am looking for help troubleshooting a couple of shift registers that seem to be unstable in a digital wall clock that I've built back when I was active in this stack, back in 2014.
More than fixing the clock, I'd like to learn how to troubleshoot and identify problems with shift registers when they show signs of instability, preferably using an oscilloscope.
The Device Under Test (DUT)
The clock being troubleshot is this one below.
In the picture above, it's displaying the right time and date - 16:22 (4:22PM) on 23/04/22 (04/23/22) - at the time the picture was taken, obviously :D
It used to work fine until the two first digits (the ones displaying the hour above - 16) started to flicker like in the animated GIF below.
The (sub-optimal, noob level) Design
For reasons, I didn't want to multiplex the digits, so I designed the clock so that every segment on every digit was driven by a separate port on a shift register. Each 7-segment display digit is driven by a combination of a 595 shift register and a Darlington pair from a ULN2003. The registers are then daisy-chained together in a total of 10 "modules" to drive all 10 digits. The whole clock is controlled by an ATMega328P-PU MCU.
Below are the schematics of the three boards that make up the design (one controller and two digit driver boards). Please bear in mind that it is a very sub-optimized design made by a hobbyist with archaic (pre-1950) building capabilities, who thought himself electronics (mostly from this very own stack!!). It's not designed to be mass produced or even to exist beyond this single prototype.
The schematics above is for the control board. It contains the microcontroller and other modules (like a serial RS-232 driver, the real-time clock IC and battery cell, a 434MHz radio signal receiver for the remote control etc.). This is connected to two other boards that contain the shift registers and Darlington pair ICs. They are connected through connectors JP1 and JP2, which have short cables connecting them. Their schematics are below.
The schematic above is used to control the 4 larger 7-segment digits that display the time of day, and are placed on top of the clock. There's another similar board that controls the lower 6 digits, that show the date (similar schematics, which I don't have, just with 2 extra digit driver modules.)
More details about the desing:
The 7-segment display digits are 12V commom-cathode (CC). They are connected to VIN and their low side is driven through ULN2003, which in turn are driven by the 595 shift registers; The digits are connected to the pairs of connectors on the top of the 2nd schematics, through connectors SV1+SV2 (digit 1), SV3+SV4 (digit 2), and so on...
There's a 5V rail (converted down from the 12V rail using an LM7805 linear voltage regulator) to power the control board and its various ICs (MCU, RTC, radio receiver etc) and the display drivers (shift registers); Not much current is drawn from the LM7805, so there's no heating issues that I could foresee;
All ten 595's are daisy-chained (the ones glitching are the last ones in the chain). They are all driven by the same MCU pair of ports: clock and latch;
each board has its own serial in, 5V rail and enable signals; the latter are connected to PWM ports to control segment intensity;
All 595's have their decoupling ceramic 100nF cap (famous 104 cap) placed near their VCC pin (GND pin is on the other side of the package, unfortunatelly);
The Boards
Below are some pictures of all the boards.
Troubleshooting So Far
The problem, as seen in the short film above, is a glitch on two of the digits, namely, those driven by IC5+IC6+SV5+SV6 and IC7+IC8+SV7+SV8, on the second schematics. Those are the last ones in the shift register chain.
I do own a 70MHz Agilent entry level oscilloscope, but I don't know exactly what to probe to find the problem. I looked at all the signals (serial in/out, clock, enable, latch) and rails (GND, 5V, 12V), but no luck. Everything seems to be ok, except for a large ripple (500mV) that I detected on the 5V rail near the shift register VCC pins. They spikes are in sync with the clock (or latch, I don't remember, sorry).
Not being able to determine what is causing the problem, I've tried the following specific fixes to the boards, without any results:
I replaced the glitching 595 and ULN2003, to no avail;
I replaced the LM7805 voltage regulator and both of its capacitors;
I switched the order of the 2 daughter boards to check if the problem was with the last registers in the chain. This messed up the digits displayed, but the same digits (two upper left ones) continued to glitch regardless of the order in the register chain;
Replaced the decoupling cap on IC7 and moved it closer to VCC, because it was farther away from it originally;
The Questions
My main question is whether there's a way to generically troubleshoot a chain of shift registers to fix these kinds of glitches. Where should I put the scope probes on? Is a 500mV ripple on the 5V rail powering the registers too much?
Second question is how to fix my specific problem, described above. What else should I try? Where else should I probe, to check for problems? If you want me to probe any particular points in the boards, I can edit the question and include scope shots if that would help.
Third and last question, could it be that the clock and latch signals are exceeding the fan out of the respective MCU ports? Could this be the problem? How do I check with a scope? Should I break them down to control two sets of five digits separately?
It's really nice to get back here after so many years and meet some friends again. I hope to hear from you really soon.
Thanks for reading!!!
AI: Without specific knowledge of your circuit and especially how your setup was to determine 500 mV ripple, this number caught my attention.
If you have a very large area formed by your ground lead from your probe going somewhere else on the board, several cm away, this may just be an artifact from bad probing. If you on the other hand have very good setup, this is a very high figure of 10 % ripple.
While 4.5 V is not enough to put your circuits out of Vcc spec, you will have a plethora of other effects which will degrade your signal integrity. For a clocked system, this is even worse.
I do see in your schematic that you have ceramic decoupling capacitors for some of your ICs, but no value stated in the schematic. Ideally, you want at least 100 nF as close to the Vcc and GND pins of each IC as possible. To make matters worse, a two layer board with lots of though holes for your components will degrade your ground plane a lot due to less capacitance and more inductance.
As a first step, add more decoupling, at least one 100 nF for each IC.
Ideally, move to SMD components in order to not penetrate the ground plane. Even better would be a four layer design with an unbroken ground layer.
Here is an example I borrowed from https://www.reddit.com/r/AskElectronics/comments/ttbcg2/question_about_decoupling_capacitor_with_ic/?utm_source=share&utm_medium=ios_app&utm_name=iossmf:
The vias will connect to a ground plane below the top layer. |
H: Term similar to "gain" for voltage dividers
In amplifiers, the magnitude of amplification is called "gain". Is there an equivalent for that on how much a voltage divider divides? Like how a voltage divider with a 100k and 39k resistor has a "divide" of 0.2806.
I wasn't able to google any results so I've come here. Please let me know if the answer is glaringly obvious.
AI: The word you may be looking for is "attenuation" or "attenuate".
A voltage divider attenuates the input to produce an output that is smaller than the input so, with your 39 kΩ and 100 kΩ resistors, the attenuation is: -
$$\dfrac{39+100}{39} = 3.5641$$
In other words, the output is 3.5641 times smaller than the input. Or, the output is attenuated by 3.5641 compared to the input.
In gain terms, the gain is the reciprocal of 3.5641 i.e. 0.2806. In other words the output is 0.2806 times the input. So, you can still use the term "gain" but it has a value less than 1 for a voltage divider. Nothing wrong in doing that in fact sometimes, it is slightly less ambiguous to use fractional gain values. |
H: Flux in V/Hz to actual motor constant Ke?
I have some trouble to calculate the motor constant Ke in V/krpm from a known flux constant of the motor. The motor has a rated flux of 0.249V/Hz and 2 PP (pole pairs).
I already know, that Ke is 9.8V/krpm, but I do not see, how I can calculate this from the above rated flux?
The flux seems to be the electrical frequency and not the mechanical frequency of the motor and when I divide the flux by the number of PP, i come up with 0.1245V/Hz for the BEMF, but this seems to be false, since when I multiply this by 1000/60 i get only 2.075V/krpm, far from the specified value. I don't know, if the flux is in RMS or peak and also I do not know, if the flux is for line-neutral or line-line, which makes it even more difficult. What I know is, that the flux is directly used for BEMF compensation by multiplying it with the electrical angular speed in field oriented control.
AI: \$\phi=\dfrac{E_b}{K_\omega ~\omega}\$
\$ \phi \$ = flux [V⋅s]
\$E_b=\$ back EMF [V]peak
\$K_v=\dfrac{1}K_e\$ RPM/Vpk ratio with no load
Sometimes \$K_e\$ is given in SI units volt–seconds per radian (V⋅s/rad)
Other non-std units used in USA
May have more time later... |
H: Using an oscillator instead of a crystal on W5500
I am designing a circuit I am planning to have fabricated that uses the W5500 Ethernet IC. I am quite new when with this and I've heard of a number of people having problems with the crystal (bad tuning, no start, etc.) that goes with the W5500.
I need to get this circuit working on the first try (not enough time to iterate) so I was wondering if I could use an oscillator in it's place to avoid potential problems. My understanding is that they are pretty much guaranteed to work albeit at a higher cost.
How would an oscillator be connected to the W5500? Should I just connect the oscillator output to CLKIN? Does the oscillator replace the crystal and capacitors or also the 1M resistor (R14)?
These are the W5500 crystal requirements:
Would this oscillator be good for the W5500? Is its output compatible with the levels expected by W5500's CLKIN?
I am an idiot, just got the answer for the first question from the W5500 datasheet:
The oscillator I referenced seems to have a CMOS output instead of TTL output so I suppose it won't work.
Can I use a CMOS oscillator with a device that expects TTL clock in?
EDIT: Would this TTL/CMOS compatible oscillator work with the W5500?
AI: The CMOS/TTL part you showed is expected to work, as long as you run it on 3.3V Vcc. |
H: Water level indicator using CMOS inverter
I want to build the below circuit. The circuit has three levels to indicate water. low->o/p LED. Medium->O/P LED. High->O/P LED + Buzzer. Each level has two types of MOSFET; they work as CMOS inverters.
What to use for the N-mos and P-mos? If you could give me names; I want something that I can simulate on OrCAD and build in real life. Also, I am not sure about the high level. Should I connect the other terminal of the source (9v) to the tank or not (the black wire)?
AI: As previously stated by previous answers, I also think there are a couple of errors on your circuit, mainly the fact that you don't consider the conductance of water, thus the transistors may not saturate; this conductance better be measured on practice for the 3 water levels you are searching for.
I would like to share a simple circuit, I think a simple N-channel mosfet should be enough:
In this circuit, let Rw be the resistance of a specific water level, resistors R1 R2 are part of the design and the load may be a LED or LED/BUZZER. This circuit should be easy to simulate.
As part of your homework and design, you should ask yourself: should R2 be lower or higher than Rw? What if I add a resistor such that Rw = Rw' + R3? What should be the ratio between R1 and Rgs to saturate the transistor?
These questions are a bit extensive and depend on your electronic device and application.
I really hope this helps and good luck. |
H: Can simple DC/DC linear regulators be used in parallel?
Can linear regulators such as the L7805CV (Rated at 5V output, 1A max) be used in parallel? I need to create 5V from 12V, but I need more than 1A, so a single regulator won't do. Can they just be wired up in parallel to achieve a higher maximum current?
simulate this circuit – Schematic created using CircuitLab
I know there are more efficient alternatives than linear regulators, but this shall be a cheap backup solution if the primary DC/DC converter fails.
AI: Can simple DC/DC linear regulators be used in parallel?
No, they cannot (at least not directly, as detailed in the question). To increase the maximum current an external transistor can be used, as shown in the datasheets of different manufacturers (which recommend the same solution):
ST:
TI:
Trying to improve, as requested in the comments:
Note 1: disregard the actual values as they depend on models and resistor values (the purpose is just to show the operation of Q1 an Q2).
Note 2: this is not what will happen in a real circuit as the output current increases with time because the simulation doesn't take the IC thermal protection into account (this is merely an operating point analysis).
To be clear without requiring the reading of all the comments: this is not a recommended solution for many situations. It is very unlikely that this circuit (at least the power transistor) would survive a prolonged short-circuit. |
H: Is stall current generally equal to inrush current?
I haven't been able to find a clear or definitive answer on this, and I've been wondering about it for some time now:
Does the peak inrush current of an electric motor equal the peak stall current of the same motor?
In my mind, it would make sense if they're the same since, for a brief instant, the two are kinematically identical (non-rotating shaft). Is this a relatively fair assumption to make?
For example, if I don't have specifications for a motor and can determine the stall current (but don't have an oscilloscope), can I assume that the maximum inrush current will be approximately the same magnitude as the current at stall, under the same voltage? (At least in the first few seconds, before thermal effects start to complicate things, that is.)
Also, is there a rule of thumb to guess at the inrush/operating current ratio? I've heard that inrush can be up to 150% or up to 1000% of the operating current. What's the right answer? Is there one?
AI: The initial value of motor starting current is about the same as stall current for most types that are started by simply connecting directly to the power supply. Motor starting current is generally defined as the current drawn between the time that it is energized and the time that it reaches a steady operating speed. So starting really includes energization and acceleration. The starting current for an AC motor is not generally expressed as a peak current but as an RMS current variation in sub-cycle peak currents experienced during starting are generally not considered.
For a DC motor, the armature resistance determines the stall current. If 10% of the supply voltage is dropped across the armature resistance at rated load, the stall current will be 1/0.01 or 100 times the rated current. That is likely to be too much current for the commutator, so additional resistance would be inserted in series with the armature during starting. Electronically-controlled DC motors are most often limited to 150% of rated current.
Three-phase induction motors are expected to require about 600% of rated current when starting. The nameplate may be marked with a code letter to indicate the expected starting current. Starting methods that limit the current are often used for motors driving large fans and centrifugal pumps. Those methods are generally not suitable for loads that require higher starting torque. When starting current is limited, that is done to avoid causing the supply voltage to sag due to the high current. The motors are generally designed to withstand high starting current.
Motor starting current is limited for most electronically-controlled motors of all types to limit controller cost. In many cases that can be done while still providing plenty of starting torque. |
H: 0 current in a circuit using tunnel diode
Suppose we have a diode with negative differential resistance of -40 ohm in the region of 0.3-0.5 V and we put it in parallel with a 40 ohm resistor:
simulate this circuit – Schematic created using CircuitLab
Now Rt = R1*R2/R1+R2 = -1600/0 = infinity. So no current should flow. Is that correct?
AI: Current will flow, but small changes in V1 will not change that current by much.
Differential resistance \$\ne\$ resistance.
Edit: See below for a representation of the tunnel diode transfer function (from here):
The negative differential resistance is the negative slope between Ip and Iv. But you may notice that I is always positive. In addition to that positive current through the tunnel diode we also have the 10mA going into the 40\$\Omega\$ resistor. |
H: How is the winding cross-induction of a 3 phases motor magnetically interact from one winding to the next?
Considering a Squirrel Cage 3 phases motor. A multi-switch receive the 3 lines of the 3Ø power L1 L2 L3 and distribute the voltage to 6 wires. The multi-switch has 3 position, Speed 1 , OFF , Speed 2, or Low , OFF , Fast.
Schematically, there are 6 coils but each coil is built with 3 winding, hence a total of 18 physical winding . Each coil is calculated to be identical DC resistance of 30 ohms. Each coil are connected in series like in an hexagon (schematically speaking). The 6 coils are electrically accessible via 6 wires. After careful testing and analysis it is established that the multi-switch when positioned for Speed 2, will short 3 of the 6 wires such that the connection configuration becomes Star (see images below), if the switch is set to Speed 1 the configuration is Delta. Switch position OFF disconnect all wires from power.
In the case of Speed 1 (Slow), there are 3 coils (let’s call them Ua , Va , Wa) that are shorted together, which imply that when in Star configuration, the magnetic polarity of those 3 coils is reverse compare to the Delta configuration, while that 3 other coils ( Uv , Vb , Wb) remain with the same magnetic polarity.
Below is an image to represent the physical distribution of 6 of the 18 winding involved. It is clear that each coil will produce a magnetic field and that the sum of all 18 magnetic field will result in one magnetic field that will turn 360 degrees per cycle. That is the basic principle of an induction motor.
I have much difficulty wrapping my mind around the fact that reversing the polarity of 3 coils (9 winding) would not interact with the 3 other coils (again 9 winding) and produce a counter induction that would create heat just as it would happen if one was to connect in parallel the output of two transformer with wrong polarity and or phase. At one point some of the induced magnetic of each coil would induce a voltage in the next adjacent coil, creating some sort of counter-current, producing a loss of energy into heat.
Furthermore, how is it that by distributing the same voltage into 6 series connected coils would induce double the speed of the other case where now the 6 coils are turned into 3 coils ( 3 times two coils in parallel) . Such configuration would “pull” more current, intuitively resulting into an increase speed, instead the speed is lowered.
The Questions:
1- How are multiple winding energized with voltage of different phases and polarity not induce heat ? Basically I am trying to understand what exactly is magnetically happening in this Speed 1 configuration.
2- Why is it that when connecting in parallel two winding would result in a lower speed instead of a higher speed ? ( I guess if I would understand what’s happening from question 1, then question 2 would be answered).
Any WEB source of theoretical explanation is more than welcome. Cheers
AI: The connection diagram seems like it may match the one shown below. With the star connection, the windings are connected in parallel forming a 4 poles with each winding receiving 231 volts. Withe the delta connection the windings are connected in series forming 2 poles with each winding receiving 200 volts.
A motor like this has a constant power rating, so the rated torque multiplied by the rated speed is constant. The rated torque for low speed operation is about twice the rated torque for high speed operation. The motor is designed to drive something like the spindle for a cutting tool. When a large cutting tool is mounted, it is driven at a lower speed and requires a higher torque compared to a smaller cutting tool driven at the higher speed.
Note that the lower voltage per coil for the high-speed connection reduces the torque capability for a given slip and the rated slip is 11.3% vs. 8% for the low-speed connection.
Image from Smeaton (Ed), Motor Application and Maintenance Handbook, Paul J. Dobbins, Ch 6, AC Three Phase Motors
This scheme is commonly called a Dahlander connection in recognition of US Patent 725415A granted on April 14, 1903 to Robert Dahlander and Karl Arvid Lindstroem. The diagram and explanation provided there may be of interest. However, I am having difficulty with both the diagrams in the question and those in the patent. I will try to find something that satisfies me, but I can't predict whether or not it might satisfy others.
The secret to this scheme is apparently that, for the usual winding scheme, poles are formed only in the center of each coil. Reversing the current direction in adjacent coils causes additional poles to be formed between the coils. The diagram below shows 8 poles in (a) with poles both in the centers of the coils and in the spaces between the coils. In (b) poles are formed only in the centers of the coils to provide just 4 poles. With winding shown for all three phases, the windings may be overlapped. At a given instant, the strength of the magnetic field of each phase would need to be considered. Apparently, the motor can be designed such that the same result as shown for one phase can be achieved.
Image from Puchstein, Lloyd, Conrad, Alternating Current Machines.
For the 3-phase, 2/4-pole, 18-coil motor in question, I would use just coils 1 and 2 from the diagram above, but say that represents one phase and that there are 3 coils and 3 phases per pole arranged as shown below. That represents Six groups of 3 coils each for a total of 18 coils. The diagram is for the connection with half of the six groups of coils connected with so that the current flows in the opposite direction to the other six groups providing magnetic poles both inside and between the coils. The pole markings assume that the magnetic poles exist in the location shown at the instant the phase producing that pole is dominant. The picture is more complex when the net effect of the three phases is considered. |
H: 240V Mains - Current draw and when to use Solder vs Welding
No specific application, just for interest - I opened up a multiplug/multiboard and noticed that all the contacts for welded (i.e. no solder). I was just wondering if this had anything to do with current draw, and (if so) what's the upper 'safe limit' for solder - and when should you be thinking about using welds instead ?
AI: There is not going to be some specific number here because it depends a lot on other aspects of the design besides just the solder joint.
The upper safe limit for a solder joint really depends on several factors.
The geometry of the joint (length and cross section), which determines dissipated wattage at a specific current level. Making the joint wider or shorter will reduce wattage and allow you to carry more current.
The melting point of the solder.
What paths the heat has to get out of the joint.
Typically solder joints have resistances in the range of micro-ohms and melting points of hundreds of degrees C.
For example, Lead Free Solder Sn96 (SAC 305) has a resistivity of 13 micro-ohm-cm.
A joint made from this solder with a 100 mils x 100 mils cross section and thickness of 20 mils would have a resistance of only 10 micro ohms.
You would have to run 100A through it to generate even 0.1W of heat. |
H: Synchronized two frequency source seems to have phase drift
I have two arbitrary waveform generators which are synchronized at the external but shared 10 MHz clock. My research experiment importantly uses phase-sensitive signals.
The problem I observed is that even if they are set the same nominated frequency (for example, 30 MHz), there exist a frequency offset which makes a very slow phase shift.
I want to maintain the same phase (no phase drift) for days and weeks, but I realize it fundamentally difficult.
To avoid this problem via synthesizing all the signal in the same instruments, I needs 3 channels for I/Q and local oscillator. However, my arbitrary waveform generator has only two channels so that I am using two synchronized AWG.
The speed of phase drift is 10 degree for an hour, which corresponds to 8 uHz.
I am not sure I can compensate this frequency difference by nominating the frequency to be above or below.
The AWGs used are (1) AWG : Agilent 81150A, (2) AFG : Tektronix AFG1062. I/Q are generated in AWG, and the baseband LO from AFG. Frequencies are both in 30 MHz.
AI: The problem is that AWGs are often, well usually, binary based internally.
The attitude of many AWG manufacturers is that once you can approximate your desired frequency to the nearest μHz, it's 'close enough', and that nobody will notice the error. This is reasonable for standalone operation, but as you've found out, no good when you try to synchronise two generators that are built differently.
Unfortunately, some get down to whole Hz before they give up and use a binary fraction below that, some stop at kHz, some go down to nHz, some just divide their 100 MHz timebase all the way down in binary. This means that any two arbitrary AWGs are unlikely to synchronise when running from the same external standard. It may not be obvious from the data sheet what the internal structure of any particular one is.
One way to get round the problem is to use AWGs of the same part number from the same manufacturer. Then there's an excellent chance that they will use the same hardware, with the same approximations.
If you can't source another AWG and you're not committed to any specific frequency, then experiment with different settings. Some may well be exact. You would need some inkling of the factors used in the different AWGs for this to be practical, the search space of possible settings would be prohibitive to do it blind. The data sheets might hint at what factors they use.
RF signal generators will often be exact decimal rather than binary. If you can figure out whether either of your AWGs is producing an exact frequency, then use this one against an RF sig gen.
It's not impossible to make a decimal based AWG, it just requires more thought, and a little more hardware, than a binary based one. For instance, one binary ASIC based fractional-N synthesiser that I worked on had a 1.6777216 MHz reference clock to get 0.1 Hz exact resolution. It was made by a 104.8576 MHz oscillator fracN locked to the 10 MHz reference, fractionally divided by 62.5. Too much like hard work! Its successor used an FPGA to implement a fully decimal fracN, so back to sensible reference frequencies. I bought a cheap DDS/AWG (FY6800) recently which appears to be fully binary all the way down from a 250 MHz top clock. |
H: How to reverse voltage 12-24VDC to use a peltier element for heating and cooling
I'd like to use a standard peltier element as a heater and a cooler. The specs should be something around 12VDC, 30W. Electromechanical relays are not an option, the peltier should be used to regulate a temperature for many months. The hardware should be designed to withstand switching several times per minute.
The answer of @tobalt helped me. I'll simply use a H-Bridge, as you can find here on amazon. I knew those H-Bridges from controlling stepper motors but these are also exactly what I need to control Peltier-Elements.
AI: Build an H-Bridge switching at >20 kHz, ideally >100 kHz. Pass the output through LC lowpass filtering. This will create a smooth DC current through the Peltiert, which can flow in both directions (hear or cool).
You can control the bridge duty cycle in a feedback loop to stabilize a certain temperature. For this you need a temperature sensor reading the Peltier temperature obviously. |
H: How to disable the Temperature Sensor Si705x
Is it possible disable Digital Temperature Sensor — Silicon Labs Si705x by software? I want save energy.
AI: Reading the datasheet, I’m observing that the chip comes out of standby only when processing an I2C command or doing a temperature measurement, as commanded via I2C. If you simply don’t send it any I2C commands, it stays in standby and draws only 60nA (typical).
In fact, the front page specifies an average current draw of 195nA when sampling once per second. |
H: Can a bipolar capacitor in an AC circuit store even a tiny amount of energy?
I've been reading (some Q&As on here and other bits on the web) about the behaviour of bipolar capacitors in AC circuits.
I understand that a polarised capacitor cannot work and will likely explode in an AC circuit due to the voltage going negative for half of the AC cycle. Only a bipolar cap can be used with AC.
So let's say we have a simple AC circuit consisting of a 230V AC power source (pure sine wave) with a bipolar capacitor and a resistive load connected in parallel. I understand that, in this scenario, if source power is removed, the cap cannot be relied upon (at least in practise) to work like a battery as it would in a DC circuit and if it were polarised. It can "store" the AC voltage value at the particular instant that source power is removed, the value at the particular point of the the AC sinusoidal wave.
But what I can't seem to find the answer to yet, maybe because I just don't get something fundamental: if source power is removed, and the wave is at some point in the positive half of the cycle at that instant, can there be any energy left in the cap at all, even a tiny amount, which is then released into the circuit after source power disconnection? Assuming 50Hz with each cycle taking 20ms, if the wave happened to be at +230V, does that mean there could be 10ms of "run time" left in the circuit after source power is removed?
Thanks for reading.
AI: A capacitor does not magically work differently in AC. It tries to maintain a steady voltage, causing a current flow to do so. This has some interesting effects when the source is AC (such as leading current, and reactive power) but the mechanism is not different.
So yes, if the AC source is disconnected, the capacitor will try to maintain the voltage it has. That's just what a capacitor does. It does that all the time, not just when disconnected from an AC source. If the voltage happens to be +230V then it will try to maintain +230V. Whether this is useful for your circuit is a different matter.
A capacitor in parallel with an AC source is most likely not a useful way to store power because, as you already noticed, the voltage could be 0V when the AC source is disconnected. If you need energy storage then you should look at other solutions. If your circuit converts AC to DC then it is much more sensible to use a capacitor in the DC part of the circuit. If your circuit involves rotating parts it might be more useful to use a flywheel. |
H: Ethernet Switch configuration mode
I'm trying to understand the Ethernet Switch product.
On page 54,55, we can see that, the MAC signals, Like for MII and RMII interface, we can understand that the digital MAC port 3, can be configured as either in MAC mode or PHY mode.
But for RGMII interface, there are no 2 separate tables where we can configure as either in MAC or PHY mode?
Why is that?
AI: The answer is on page 44:
4.5.2 MAC INTERFACE CLOCKS
The MII interface is clocked asymmetrically, with the PHY device driving both the RX_CLKx receive clock and the TX_- CLKx transmit clock to the MAC device (...)
The RMII interface uses a single 50MHz clock. This REFCLK may be sourced either from the KSZ9893R or from the connected device (...)
The RGMII interface employs source synchronous clocking, so it is symmetrical and does not require a mode selection. An output clock is generated on the RX_CLK pin, while an input clock is received on the TX_CLK pin (...)
It's all related to who provides the clock(s). In MII or RMII mode one of the two devices provides the single clock used for both TX and RX, so you need to pick which one. In RGMII there's one clock for each direction, so you don't have to device who is providing the clock. |
H: Collector resistor value affects the delay in this simple turn-off delay circuit. Why?
Here's my simulated circuit:
As you can see, when plotting the output voltage, the smaller the collector resistor value is, the shorter is the delay.
But why? What BJT graph predicts this behavior?
Thanks in advance.
AI: The lower the load resistance the larger base current is needed to keep the transistor in saturation.
For example for RL = 1K and Vcc = 9V we have Ic_max = 9V/1kΩ = 9mA
Thus, to keep BJT in saturation we need Ib_min > Ic_max /Hfe ≈ 9mA/100 ≈ 90µA.
So the minimum capacitor voltage needed to sustain saturation in this case is equal to:
Vc_min = Vbe_sat + Ib_min*Rb = 0.8V + 90µA x 20kΩ = 2.6V.
Therefore, the discharge time will be equal to around:
\$T_D = RC \times ln \left(\frac{V_{init} - V_{BE}}{V_{Cmin} - V_{BE}} \right) = 20k\Omega\; 100\mu F \times ln\left(\frac{8.4V}{2V} \right) = 2s \times 1.51 \approx 2.9s \$
These are ballpark calculations (a very rough approximation). |
H: Fault impedance type?
Usually fault impedances are resistive type. But is it possible to have a mix of resistive and reactive component in fault impedances? Looking at many simulation tools, they give the possibility to apply a reactive component to the fault impedance, therefore I think the answer is yes, but are there practical fault examples? (I'm really interested in single phase to ground examples) (For sure all the impedances have a small reactance due to non ideal conditions/materials, I don't mean this case, I mean the case in which the reactive component is not negligible).
AI: We don’t normally apply faults that include capacitive or inductive reactance in short-circuit studies. But, you can sometimes conveniently include them to “lump in” other elements.
For example, if you want to model a ground fault on load side of phase reactors but the reactors are not in your short circuit model. So your phase-to-ground fault would include the \$X_L\$ of the phase reactor.
Another example, if you want to model a grounded-wye capacitor bank for nearby ground faults (it is a path for zero sequence current flow) you could simply apply it as a three-phase-to-ground fault with capacitive reactance (negative X)…and then go apply your ground fault. You would do this if you want to see the zero-sequence current flowing in the bank during the external ground fault. A common backup protection on grounded-wye capacitor banks is zero-sequence time-overcurrent supervised with bus zero-sequence voltage (to block the time-overcurrent from operating during system ground faults with large \$V_0\$ present).
You could also model an imbalanced capacitor bank with two simultaneous faults. A phase-phase-ground fault with "normal" cap bank \$-X_C\$ as the fault impedance and zero for the ground fault portion. Then a phase-ground fault with \$-nX_C\$ where n is some number from 0-1 representing part of that phase of the capacitor bank shorted out (assuming fuseless capacitors which fail shorted). From this you can see the maximum \$V_0\$ you could expect for this condition and set your supervisor above this (for the backup zero-sequence time-overcurrent I mention in previous paragraph).
Etc. etc. |
H: PSRR of an amp + ADC input stage
I have an input stage that consists of an amplifier then an ADC. The op-amp and ADC are powered by Buck voltage regulators.
I want to measure the PSRR of this stage, so I am planning on breaking the power line and adding a 200mVpp AC signal in series and see the effect of this signal on the recording relative to the PSRR ratio.
*By recording, I mean the ADC data analyzed in a certain interface
My questions are the following:
First, is this the correct way to measure PSRR?
Would using the line regulation of the regulators be a more accurate way to check how the output reacts to the AC noise?
If this way is correct how do I calculate the overall PSRR of the stage since the op-amp and the ADC each have their own PSRR value.
AI: First, is this the correct way to measure PSRR?
It is a method of measuring PSRR but, if you are trying to find the PSRR of an amplifier under extended conditions you will come unstuck. This is because you need to use the amplifier's data sheet and look at the graphs for +PSRR and -PSRR.
If you tested one unit and it looks good that doesn't mean the next unit will look anything like as good. Hence, you do a design study on what you might expect under typical to worst-case conditions
Would using the line regulation of the regulators be a more accurate
way to check how the output reacts to the AC noise?
I would probably start at this point and examine the data sheets of the regulators then, knowing what input voltage perturbations are likely, I would estimate the type of level and frequency range I might see at the output. Then I'd use the data sheet of the amplifier to see what effect the regulator's output voltage fluctuations have on the amplifier's output signal.
If this way is correct how do I calculate the overall PSRR of the
stage since the op-amp and the ADC each have their own PSRR value.
The problem you face with multiple stages of amplification or signal processing is that sometimes you might get opposing PSRRs from each stage that might give a false impression of high-quality. And, of course, the data sheets will not tell you if that might happen.
However, in an amplifier chain, it's usually the front-end chip that is handling the lowest level signal so, analysis of the front-end circuit may be enough to give you confidence in future real performance. |
H: How to use panel-mount connectors where the nut goes on the inside of the panel
Some panel-mount controls have the nut on the outside of the panel, like this:
Other panel-mount controls have the nut on the inside of the panel, like this:
With the nut on the outside, I first solder everything while it is outside of the project box. That gives me plenty of working room. Then I insert the PCB into the box and mount the controls into the project box, then tighten the nuts on the outside of the panel.
But when the nut is on the inside, the panel-mount control must enter from the outside, so I cannot solder it to the PCB. I am stuck soldering while the parts are inside of the project box. Either that, or any connector I solder to it must be smaller than the control itself so it can fit through the hole.
Is there something I am missing here? It seems to me that the only realistic way to use these is to solder something small like a JST connector to the control, and pass that through. This adds clutter and work. Is there a better way?
AI: For this application, where you don't have a lot of room to attach a connector (or want to drop $300 on a crimper), there's a category of connectors called wire-to-board, which is exactly what it sounds like (image from Digikey):
You strip your wires coming from the connector, add a ferrule if you want, put them into the rectangular holes, and tighten the screws. There are lots of different configurations like spring loaded or lever locks. |
H: Why can't current change instantaneously in a given inductor?
I know the mathematical reason behind this. Given the inductor I-V characteristic we know that:
I understand mathematically that a function which is differentiable must be continuous, but what is the physical reason behind this?
We know that current creates magnetic field and that the energy stored in that magnetic field is:
I guess it is pretty much related to the energy somehow, but then what's next, and what is the explanation for this?
The same question applies to the voltage of capacitor and energy stored in the electric field in case of a capacitor.
AI: Here's the real reason.
A moving charge (current) produces a magnetic field.
When a current is applied to an inductor (coils of wire), there is a magnetic field that builds up within the inductor.
The change in magnetic field (flux) produces an EMF across the inductor. The EMF opposes the change in current through the inductor.
So you have an EMF fighting the change in current.
The higher the rate of change in current, the higher the EMF across the inductor opposing it.
That's why the current doesn't change instantaneously.
Key point to remember is that the energy storage mechanism of an inductor is a magnetic field.
The magnetic field (energy) also can't change instantaneously. It's physically impossible to instantaneously change the energy in an inductor (or capacitor).
The fields build up or collapse with respect to time.
Have a look at Lenz's and Faraday's laws.
https://en.m.wikipedia.org/wiki/Lenz's_law
https://en.m.wikipedia.org/wiki/Faraday's_law_of_induction
One important equation is this:
EMF = -N*dΦ/dt
Look at the EMF equation in terms of magnetic flux.
See that EMF is proportional to the rate of change in flux?
Looks similar to the equation in terms of current doesn't it :-)
Here are some more examples along with a simple picture:
https://andropoide.blogspot.com/2017/02/inductor-lenz-law.html?m=1
Hope this helps. |
H: What would it mean if a circuit board all of a sudden works after it doesn’t work for some time?
Sorry for my noob question. I am very new to debugging hardware circuit boards.
A circuit board was not working. After measuring a voltage rail it was jumping from 12V to 0V, and back to 12, etc. what kind of behavior does this typically indicate?
The board randomly worked by not doing anything besides probing a few areas with a multimeter (it wasn’t working for a few days). How is that possible?
AI: It could be an intermittent connection of some kind, something like a bad solder joint or a hairline crack in the board or a lifted pad on a single-side PCB. You can troubleshoot many of that kind of fault with copious quantities of light and close visual inspection at various angles.
Of course if it got wet, then there are other possibilities. If you know what the history of the intermittent board is you have a better chance of being able to fix it.
Cold solder joints may work for a while after being disturbed until corrosion once again pays them a visit and they cease working. Hence the occasional success of "percussive maintenance" (giving the device a whack).
The general rule is that things that suddenly start to work will suddenly stop again at some later (and often inconvenient) date.
As @mkeith suggests, thermal shutdown can play a role (perhaps a regulator is overloaded or a cooling fan has failed so an IC goes into protection mode and then recovers once the die temperature drops sufficiently).
Open circuits in particular can be affected by temperature. Sometimes there is a fault inside an IC package or other component that will come and go with temperature changes.
Some CMOS circuits can undergo non-destructive latch-up where they stop working until the power has been cycled following some kind of probing or short. More modern designs are usually pretty resistant to that mode of failure, at least from external-to-PCB sources, and usually have enough power supply current to fry the latched-up chip dead, should it ever occur, so that's less common soft failure these days.
Crummy cheap reset circuits and lack of proper watchdog timer strategies can cause microcontrollers to appear to fail upon partial power cycling or some kind of upset (lightning, probing, cosmic rays, firmware memory leak or timing-related issue), only to start working again upon a full power cycle. |
H: Help Understanding Opamp Topology (Infinite Gain Multiple feedback with Resistor to Gnd?)
I ran across the following band-pass circuit and I'm not entirely sure what R14 is doing here. The following is a screenshot:
For some context, the supply is a dual rail +/- 3V3 and the input is a 100 mV peak-peak, zero-centered sine wave (called "X in act" here). The input comes from a an opamp differential-in-single-ended-out, unity-gain buffer stage. The frequency of interest is centered at 20 kHz.
For the most part it looks to me like an "infinite gain multiple feedback" bandpass topology but there's an extra resistor R14 in there that's throwing me off.
Can somebody please explain what the purpose of that might be and how I might go about analyzing it? Is it something practical I'm missing?
Let me know if there's anything I missed or can add for reference. Otherwise, thanks in advance!
AI: Antonio shows that varying R14 can shift resonant frequency. Look closely, resonant bandwidth changes.
As frequency drops with higher values of R14, Q is lower.
If you want frequency to remain constant and Q to remain constant too, then the parallel combination of R13 || R14 should remain constant. You can vary gain by varying their ratio, and still keep R13 || R14 constant (5170 ohms).
When R13 is set to 5170 ohms, R14 becomes infinite, and disappears.
Here are three versions, all having same resonant frequency, and same resonant bandwidth. Gain varies up to a maximum of nearly 5.5 when R13 = 5170. You can have any gain less than 5.5 by including R14 and adjusting R13 || R14 to 5170: |
H: LTspice AC analysis extracting only the phase shift value at a certain frequency
I am trying to extract the phase-shift value at a certain frequency in AC-analysis mode in LTspice.
.meas AC Ph_Shift FIND (V(out)/V(in)) WHEN FREQ=50
With the command above LTspice gives the answer line below in the log file:
ph_shift: (v(out)/v(in))=(-0.408776dB,-17.4406°) at 50
What I need is only to extract the -17.4406° value inside an 'X' variable parameter, because I want to use it in another mathematical expression.
Is there a way to do this?
AI: The results of .meas scripts come out as a compact notation, so you can't separate them, at least not within LTspice. You can use the error log with external software and extract the needed values, but then you will still need to manually (or with a batch processing of sorts) edit your schematic, afterwards, because the .meas scripts are all run after the simulation. So you have three steps, at a minimum: run schematic, extract values, re-edit the schematic. |
H: Which of two Verilog lines is preferred?
If we want a modulus 10 counter (counts from 0 to 9), we can write this:
reg [3:0] cnt = 0;
always @(posedge clk) cnt <= (cnt==9) ? 0 : cnt+1;
optimization is available if we realize that we don't actually need to compare all the 4 bits of the counter to 9. The code below uses only bit 0 and bit 3 in the comparison.
always @(posedge clk) cnt <= ((cnt & 9)==9) ? 0 : cnt+1;
Why is the second line of code preferred? Why is it not neccessery to define reg [3:0] cnt = 0 ?
AI: Why is the second line of code preferred?
It's not. It's harder to read, more error-prone for the programmer and has no advantages whatsoever, because conversion of statements like cnt==9 into logic implementation is what a synthesizer is for.
I.e., unless something goes catastrophically wrong, the first variant is functionally and hardware-wise identical, but much much easier to read.
optimization is available if we realize that we don't actually need to compare all the 4 bits of the counter to 9.
Ah you probably mean that your counter can theoretically take values 0 to 15, but due to the implemented logic will only take values 0-9.
So, well, a) modern synthesizers recognize that, so that optimization happens automatically, and b) this fact is only useful if you target platform gains anything from this knowledge - but an FPGA has LUTs with which it would do this, and I don't see how that optimization would actually reduce anything; you'd always need the same number of LUTs to compare a 4 bit number to 9, far as I can tell.
In case of an FPGA target:
If you have 4-bit LUTs (or anything larger, as for example the 6-bit LUTs in modern Xilinx FPGAs), you need exactly 1 LUT to do this comparison, no matter how you program it in HDL
If you have slices with 3-bit LUTs, you need exactly 2
I'm not aware of any FPGA architecture with 2-LUTs, as that just screams "bad routing vs LUT complexity tradeoff"
In case of a standard cell / ASIC target:
again, hopefully your synthesizer recognizes cnt never exceeds 9, but even if it didn't (cnt&9)==9 has to compare a 4-bit number to a 4-bit number for ==, so there's nothing to be won here, as far as I can tell. |
H: Trace to Pin connection
I am having the issue of connecting my voltage regulator to the trace. The trace must be thick but the pins are too small.
What is the best solution? I am using proteus. Does making a solder Paste shape work?
Thank you!
AI: A trace's resistance increases with length, and decreases with thickness. So the thickness is the more important the longer the trace is.
For a very short segment of the trace, the thickness does not change the total resistance by a noticeable amount. (Connections to through-hole pads are often deliberately made thinner to increase the thermal resistance; see Does adding thermal relief on PCB increase electrical resistance?)
So the shape of the connection does not really matter. The best solution is to not worry about it. |
H: Finding DC saturation behavior of clamp ferrites
While some chip ferrite datasheets specify maximum current and DC saturation behavior, it seems like many clamp ferrites omit both maximum current specification (which arguably is less critical) but also any notion of the DC saturation behavior.
In my case, I'm looking to attenuate noise on a power LED driver output cable carrying up to a couple of amps and would like to know if the clamp ferrite could saturate. Spontaneously, given only one cable pass and relatively low current I have hard time imagining that the ferrite would saturate or that the impedance curve would be significantly affected (Example ferrites as reference: 74271142S, ESD-SR-100). But, generally speaking:
Is there a way to estimate the saturation behavior of clamp ferrites if no relevant information is provided in the datasheet?
Are there any rules of thumb?
AI: In my case, I'm looking to attenuate noise on a power LED driver
output cable carrying up to a couple of amps and would like to know if
the clamp ferrite could saturate.
A ferrite clamp is used to clamp a cable that carries forward and return currents. So, in these situations the magneto motive forces from forward and return currents cancel out and saturation does not occur.
Should you not be using it as intended i.e. you are only passing either forward or return current through it then, you should find an alternative component where the data is available for this type of application. |
H: How to safely protect input sensing AC Line Voltage
I'd like to detect the presence of AC line-level voltages in my PCB project, and I'd like to follow best-practice for doing this. I'm a controls engineer so I'm happy with dealing with mains with chunky discrete components, and I've done a bit of DC electronics and PCB design, but never combined the two so I want to do this as safely as possible.
The input signal might be AC mains across a very small motor, but could also a signal from a motor controller so could be up to a few kHz, with a DC offset from ground of up to 200V (hence why I've labelled the terminals as L1 & L2).
This is my proposed schematic:
All the AC voltage stuff will be in a separate area of the board from the DC, with no ground plane in that area, and a milled slot under the opto-isolator.
Questions:
Anything you'd add? Is this overkill?
Capacitor - That's to stop spurious noise, either generated by a controller, motor or noise conducted into the unit. Any suggestions on sizing? Is there a better place to put it?
Fuse - what kind to use? My understanding is that it's mainly to stop you getting a short if the MOV fails closed. Is is OK to use a resettable fuse?
Thanks in advance.
AI: Anything you'd add? Is this overkill?
You don't say what part of the world this is going to be in, but the mains are very nasty in many places. For better reliability I'd do something like divide the resistor into two and put a bidirectional TVS device at the junction of the two resistors with a breakdown that will clamp before the max current of the opto. The MOV will absorb energy from the large spikes but the clamping voltage is pretty high. A TVS will have a better controlled clamping characteristic.
Capacitor - That's to stop spurious noise, either generated by a controller, motor or noise conducted into the unit. Any suggestions on sizing? Is there a better place to put it?
If you put it across the line as shown, you should use an X-rated capacitor. You could try 0.1uF or a bit larger. There's no magic formula to pick the value.
Fuse - what kind to use? My understanding is that it's mainly to stop you getting a short if the MOV fails closed. Is is OK to use a resettable fuse?
If the MOV shorts the resettable fuse won't do you much good. Maybe for transient overloads it might help, but you have to do the calculations to make sure it will actuate in the time required before damaging anything. I'd use a fast-blow conventional fuse.
Be sure to observe creepage and clearance distances for the high voltage side, the milled slot will help in that regard. |
H: What happens if you connect an AC generator to an AC motor?
An AC generator (or alternator) converts mechanical energy into electrical energy. An AC motor does the reverse.
What would happen if we connect the two in such a way that the output rotational kinetic energy of the motor becomes the input of the AC generator and the output electrical energy of the AC generator becomes the input of the AC motor. Of course, some external work needs to be done initially in order to rotate the shaft of the generator.
Is this even possible? If possible, what are the energy losses involved?
According to me, this should function for some time before eventually stopping.
AI: ...they should power each other...
You seem to be imagining that a "generator" only converts mechanical energy to electrical energy, and a "motor" only does the opposite. The reality is that both machines, in principle, are capable of doing either thing. Instead of saying "motor" and "generator," it would be more accurate to say, "two electrical machines, electrically connected in parallel, and mechanically connected to a common shaft."
When you look at it that way, you'll realize that the whole assembly will behave like one electrical machine that isn't mechanically or electrically connected to anything.
So, supposing you have a motor (which also is a generator), and it isn't connected to anything, and you give its shaft a good spin. What would you expect it to do?
According to me, this should function for some time before eventually stopping.
If "function" means, "continue spinning," then I agree with you.
P.S., Let's say, for the sake of argument, that they both are DC machines, and you reverse the connection of the wires.
Q: What happens then?
A: You'll find it difficult to turn the shaft, but if you crank it really hard then; (a) You'll discover that the two machines and the wires connecting them start to get kind of warm, and (b) As soon as you stop cranking, it will come to a stop.
Congratulations! You have just built a somewhat-overly-complicated magnetic brake. |
H: Phase of type 3 compensator
I was supposed to simulate a type3 compensator but i got different result from PSPICE and HSPICE.I have no idea why??:(
PSPICE:
HSPICE: shape of gain is the same with PSPICE,but shape of phase changes like below.(I dont have the simulation result pic but just like this)
AI: Shape of phase are the same.
Just limited to +180°/-180° (with wrap around).
Here is what I get with microcap v12 |
H: LTspice and op-amp strange behavior
I noticed a strange behavior using TL074 and I made this simplified block to verify my feeling. Opposite to what I see on a breadboard, I think the output(s) are totally wrong, but I cannot believe a so dramatic result, so I assume I am terribly wrong somewhere.
On the breadboard, I have a double supply for +15 and -15 V as well as a 10K pot between the rails, so it can feed -15 to +15V to the inputs. With the exclusion of a very little range near 0V where I see intermediate, the output of the real TL074 is banging to +13 or -13V, depending on the differential between the two inputs and I assume that is the correct behavior of a dual rail op-amp.
Of course, in LTspice I also replaced the TL074 with some other dual rail OP Amps with almost the same result.
Regarding the included image, the green plot is the output of V3, the violet one is U1/4 and the red is U2/4.
Where am I wrong?
Thanks!
AI: You're powering the op-amp from 0V. Run a DC analysis and check the voltages on the power pins :) |
H: How to determine phase sequence of the unbalanced three phase grid?
Let's say I have three phase voltage grid which is unbalanced (three phase utility grid). The phase voltages are sampled by the adc (suppose that the analog channel is properly designed from the hw point of view and the sampling period is set properly) and I would like to determine the phase sequence of the grid in C language software i.e. I would like to determine the order in which the individual phases achieve their amplitudes.
One idea which I have is to use the Synchronous Frame Phase Locked Loop (SFPLL) i.e. following system
and exploit its output i.e. the phase of the space vector of the grid voltage for construction of an artificial three phase voltage grid consisting of clean sinewaves with unity amplitude. Then I would detect the zero-crossing instants (based on sign change of a signal) on these clean sinewaves. From the zero-crossings order I should be able to determine the phase sequence.
Here is a block diagram describing the main idea
Nevertheless I have doubts regarding the robustness of the aforementioned solution. Does anybody know some robust approach for determining of the phase sequence of a three phase unbalanced grid?
Maybe it would be sufficient to inspect the phase \$\theta\$ at the output of the SFPLL:
\$\theta > 0\$ corresponds to the positive phase sequence (\$a\rightarrow b\rightarrow c\$), \$\theta < 0\$ corresponds to the negative phase sequence (\$a\rightarrow c\rightarrow b\$).
AI: I would recommend you use a DFT and once you have the 3 phase voltages, calculate the positive and negative sequence voltages. If your assumed rotation (e.g. A-B-C) is correct then the positive sequence will be large and the negative sequence will be relatively small.
e.g. Measured values arbitrarily assigned to \$V_A\$, \$V_B\$, and \$V_C\$:
$$V_A=67\angle0° V$$
$$V_B=63\angle-119° V$$
$$V_C=60\angle124° V$$
Calculate positive and negative assuming A-B-C rotation (\$a=1\angle120°\$):
$$V_1=\frac{1}{3}(V_A+aV_B+a^2V_C)=63.3 V $$
$$V_2=\frac{1}{3}(V_A+a^2V_B+aV_C)=2.8 V$$
If our A-B-C assumption was wrong these values would be swapped.
Another clever way to do this would be to follow this method to directly calculate the positive and negative waveform samples. It would then be easy enough to see which of the two had highest amplitude over 1 cycle. This would avoid the DFT calculation. |
H: Electrical circuit with 3 voltage sources and a current dependent voltage source
I have this exercise where I need to say if the circuit is possible to be connected.
I'm in doubt cause we can't connect different voltage sources in parallel, but this current dependent voltage source and the current source is bugging me. Then, if this circuit is possible, i need to find the electrical power in the current source.
If you guys can help i appreciate it.
AI: The analysis of this circuit is pretty straightforward, since you directly know what iΔ is (-25A). Then you can see what the dependent voltage source is (-150V), and you can see that the polarity is flipped, so the voltage on the left adds up to 200V, which is the same as the voltage on the right, so this circuit can exist.
Then you should be able to figure out what the power in the current source is (hint: P=I*something, and Kirchhoff's voltage law) |
H: Bandpass filter doesn't work when implementing PCB
I have been trying to make a 5th-order Chebyshev filter going from 500 MHz - 570 MHz and a 3rd-order Chebyshev filter going from 500 MHz - 540 MHz. This is my first time making a filter into a PCB.
No matter what I do, my physical implementation of it doesn't match my calculations and PSpice simulations.
I realize this circuit doesn't have the most perfect geometry and the parts have tolerances (I chose tolerances that should still work) but it should still be close enough. Why is the pass band so far off? The span on the spectrum analyzer screen is from 1 MHz to 1 GHz. The peak is seen at 350 MHz instead of 535 MHz which it should be.
I'm at my wits end. I have been stuck on this for a month now, please help.
Here is the board geometry. I have confirmed that the values are correct and should work even with their tolerances.
AI: Each track has both inductance, capacitance and resistance and thus a characteristic impedance from Z^2=L/C
I believe you only have trace inductance. That will not work.
There are ways that do work. I have always relied on coaxial resonators and SAW filters or coaxial 1/4 shorted notch filters.
REF
Note the Q's in this filter > 1000 and the quality of the return loss.
https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8502815 |
H: How can I adjust the imported 3d body in Altium designer?
I've downloaded and imported the following SMPS transformer 3d model into Altium designer but it doesn't fit my footprint how can I adjust it by changing scales and moving pins?
AI: Imported models cannot be scaled. And also subsets (bobbin, pins, core etc.) cannot be edited individually because Altium treats the whole model as a single object. What you can do is only transformation (move and rotate).
You should import scaled and adjusted models. |
H: SR latch circuit with ESP8266
I want to keep some state during a deep sleep of an ESP8266. To do this I used the following SR latch circuit:
It works well. The only change I made is that I used 2N2222 transistors.
The only problem is that this circuit uses S1 and S2 switches to change the state. On the breadboard I recreated this with some buttons.
Now I want to replace the buttons with a signal from the ESP.
I just started dabbling in the world of electronics and sending out HIGH signals is no problem for me, but I can't for the life of me figure out how to send this 'ground' signal from the ESP. It feels like I'm overlooking something very easy.
AI: Just set the relevant output pin low combined with a resistor (10k) wired from GPIO to the base. It’s working against a 10k pull-up so should easily switch off the corresponding transistor. |
H: What is a suitable battery to power five servos?
I have five Futaba S3003 servo motors. I want to run them simultaneously. What battery should I use?
The datasheet says:
Current drain (4.8V): 7.2mA/idle
Current drain (6.0V): 8mA/idle
I'm not sure if the ampere value is right. I think it is too low.
Can someone tell me what power source I should use?
AI: I would go for 7.2 Volt Lithium battery or 2 x 3.7V lithium cells in series additional 1.2 volts wont cause any harm. purely for servos. Secondly 8 milli amperes is listed as idle current which is fine. these servos draw around 250ma at peak load so 5x250 = 1.25 amps for all 5 motors , that is your minimum current you need to run these for an hour. depending on your needs of how long you want them to run on battery , you will need to choose your battery capacity. you could also go for 6V lead battery if you are ok with the size. |
H: The output of PI controller using opamp is not working
I am designing a closed loop system for dc-dc converter for that I am using error amplifier and pi controller. For error amplifier and PI controller I am using OP177A opamp. The error amplifier output is coming exactly as per requirement and gain setting. But the PI controller output is not changing properly based on the error amplifier input. That is the output of PI controller showing fixed value. I want the PI output to change with the error amplifier output..
AI: Your simulation implements no feedback. Therefore, your regulator (more precisely, the Integral component) saturates.
You can observe the trend to saturation if you "skip initial operation point solution" in the .tran command (or append uic to it). |
H: KSZ8081 PHY address configuration
I'm using this KSZ8081 PHY transceiver.
I'm unable to understand how to configure the PHYAD[0:2] pin and the B-CAST_OFF pin.
As far as I read, the PHY Broadcast address will always be "0" and the unique address of the PHY can never be "0".
So, when I pull down the pins of PHYAD[0:2], won't the address of the PHY become 0?
I'm stuck to understand these pins and the concept of broadcast address with respect to PHY. Can someone please check and clarify this.
AI: The answer to your question is, yes, pulling address config pins low will result the PHY address being 0.
Datasheet says it is configurable to any value between 0 and 7. |
H: Disturbance in AC adapter
I'm studying AC adapters, and to check about waveforms while changing parameters I did a simulation of this circuit:
simulate this circuit – Schematic created using CircuitLab
Then I wanted to plot also the rectified waveform, so I added a second diode and a big resistance (sorry if this circuit doesn't use the internal CAD, but I was unable to find how to insert two schematics: if I tried to insert a second one, the first was deleted):
so on the 1G resistance there should be the rectified voltage, and the resistance should be big enough to not influence the circuit.
It seems to work, but what I don't understand is that there seem to be a disturbance on the secondary of the transformer, and on the rectified waveform (green on the left graph is the primary of the transformer):
So the secondary voltage has the positive part of the wave distorted, and the negative which is thicker, like there was some very rapid oscillation; and the rectified wave has the same distortion.
I tried experimenting with the simulation, and it seems to be due to the capacitor, since if I delete it the waveforms are a non distorted sines and the rectified waveform with no distortion; I'm not sure if this is something real, or an error of the simulator.
As for the diode, there is a parameter I don't know ("Current At Above Voltage"), but their model as given in the simulator is:
saturation current: 171 nA
forward voltage: 806 mV (but the distortion are the same with 0)
current at above voltage: 1 A
emission coefficient: 2
Are those distortions something to be expected? If so, why?
As simulator I used Circuit JS.
AI: Are those distortions something to be expected? If so, why?
The disturbance at the top of the positive peak is fundamental to any practical rectifier and smoothing capacitor. Once the capacitor has charged to a significant voltage, the diode won't conduct to inject more charge into the capacitor until the diode's anode voltage has reached slightly above the charged capacitor voltage. At that point, a sudden injection of current occurs and this can be quite high in peak value.
The net result is that the impulse of current causes significant volt-drops in the transformer and diode resulting in the waveform distortion you see. If you also plotted diode current you would see what I mean.
I expect that the high frequency artefacts you get are as a result of the simulator although, there will be some ringing due to parasitic inductance in a real circuit - maybe you have a bit of both - it all depends entirely on your models. |
H: What does it mean to assign a conductor?
I am reading about SATA power here.
They say the following:
The power cables for the SATA interface are of similar construction as
the signal cables, but have 15 conductors. They supply power to the
hard or optical drive at the voltage levels of 3.3, 5 and 12 volts.
Each voltage has three conductors assigned to it because the wires and
connecting pins are too small to be able to handle the full current
required by the drive. Three ground wires between each two voltage
levels make up the balance of the 15 conductors. The SATA power cables
connect the computer power supply to the drives.
I understand a conductor is a metal and that you can mix different metals in the wire to achieve different electrical properties but it is unclear to me what they mean by assigning a conductor. Does this mean that three are three different metals in each wire?
AI: "Each voltage had three conductors assigned to it" means the same as "for each voltage, the designers chose three pins on the connector to carry that voltage from the power supply to the disk". Three pins were used to carry 3.3 V, another three were used for 5 V, another three for 12 V, and the remaining six were used for ground.
The wires are likely identical aside from insulation color. The connector pins are slightly different in shape/size - the ground pins are longer so they make contact first. |
H: Hamming code error correction multiple bits
If we send a message from a sender and the noisy channel produces 2 bits with error can we detect both bits using hamming code or is it just for 1 bit?
AI: The decision to "only detect" or trying to "correct" the errors changes what you can do with 100% coverage:
if error correction is implemented, the code can correct (identify which bit flipped) all 1 bit errors
if only error detection is implemented, the code can detect all 1 bit and 2 bits errors, without being able to identify which one(s) flipped
The behavior is the same regardless if the error results in a bit '1' or a bit '0'.
As @BenVoigt noted in the comments, if you add a single parity bit to the message (taking all the data bits and Hamming Code bits as inputs) you can correct all 1 bit errors and detect all 2 bits errors. |
H: Can the polarity of a 12V brushless CPU fan be reversed?
Can the polarity of standard CPU 12VDC brushless fan be reversed? For my application it is fine if the fan is not broken afterwards. Please see the image of the fan below:
AI: Can the polarity of a 12V brushless CPU fan be reversed?
For a simple fan such as you show in the question the answer is probably YES.
It all depends on the type of controller being used to drive the fan.
Some simple two wire fans use a circuit somewhat like this:
Notice here that there is a series diode in the circuit, so this could sustain a reverse voltage without damage (though obviously it won't spin).
Other fans may or may not sustain reverse polarity without damage. If the fan has an rpm indicator or has speed control then the inbuilt controller is much more complex.
You could set up a test for the different fan types to find out the capability, or try to find the schematic to assure yourself of the capability.
Here is one datasheet for a two wire fan I found which clearly specifies it has reverse voltage protection. |
H: LM317... Do we need resistors?
In the circuit below, I replaced LM1117 with LM317. Do I need to add resistors at the output terminal? and how can I calculate the output voltage in this case?
AI: LM317 needs resistors to set the output voltage, so yes, you need resistors.
The method of calculating resistor values are in the LM317 datasheet, you seem to just need 5V output. |
H: How does this PNP transistor improve the switching performance of MOSFET?
My guess is PNP transistor might ensure fast turn off by shunting the gate capacitance (ie, when diode is reverse biased and the PNP is on.)
Additional questions:
Why is the gate current limiting resistance not present?
What is the role of R1 in Fig 2.7?
Ref: https://toshiba.semicon-storage.com/info/docget.jsp?did=59460
AI: My guess is PNP transistor might ensure fast turn off by shunting the
gate capacitance (ie, when diode is reverse biased and PNP is on)
That is correct.
Not sure why is the gate current limiting resistance not present?
It's not always needed. With a transformer drive, there will be significant resistance (a few ohms) in the transformer.
Also what is the role of R1 in Fig 2.7?
It's always a good idea to have a resistor that can discharge the gate especially with a transformer drive; if the drive becomes inactive (possibly due to transformer driver malfunction), something is needed to discharge any residual drain-to-gate currents that might inadvertently cause the MOSFET to start conducting.
Extra information from TI that's worth a read.
Fundamentals of MOSFET and IGBT Gate Driver Circuits |
H: TEC cold side temperature decreases, then increases rapidly
first post to this stack exchange.
Self teaching on TEC circuits. I bought a diymore TEC1-12706 12V 60W 6A. Note no heat sink installed on the TEC. To test the TEC I put together a series circuit as follows: battery 12V/8AH/10A max discharge, 100(Ohm) resistor and then the TEC. I placed a temp probe on the cold side, and another temp probe to measure ambient air temp.
First run went ok. Connected the positive battery lead and the TEC cold side temp decreased and stabilized to about 77deg(F) compared to ambient air temp of 80deg(F).
Second run, I desired to see if I could get a lower temp out of the TEC. So I removed the 100(Ohm) resistor. I connected the positive battery lead, and the TEC cold side temp immediately started to decrease, in about 6sec reaching about 65deg(F). Then I noticed the TEC cold side temp started to increase. After several seconds the temp climbed past 100deg(F) and by the time I disconnected the battery, the TEC cold side temp had reached about 130deg(F).
I decided stand down since obviously I'm doing something wrong. I guess my first question is what was happening in the TEC to produce this temperature reversal?
My second question is do I need to think more carefully about the circuit design for a TEC? Do I need a some type of voltage or current regulator inline between the battery and the TEC? Maybe I should install a heat sink on the hot side before any further experimentation? Any suggestions on a good TEC cooling circuit welcome.
Thanks in advance!
AI: Peltier units are extremely inefficient. This means that for every watt of heat you move, you generate several more watts of heat in the unit.
The hot and cold side are physically coupled together. Heat can migrate through the substrate.
Because of the above, you will never get the cold side more than about 30 F below the temperature of the hot side. When you try, you end up generating so much heat within the unit that you will warm the cold side.
This is a very common pitfall that people new to TECs run into. What you need to do is cool the hot side. This often takes the form of a heatsink and fan.
Due to the inefficiency, you will never be able to move a large amount of heat uphill.
As for the driving circuitry, you typically want a current-controlled drive. Lots of designs use PWM on a voltage source, but this is even less effecient. |
H: Can an opamp have a negative gain?
I have a school excercise which I don't fully understand. The excercise is that you build an opamp circuit with a negative gain, -40 and a bandwidth of 100KHz. The gain-bandwidth product is 1000 000.
If I calculate the GBP -40 * 100Khz = -4000 000, so I have to split my opamp up into two opamps. One opamp with a gain of 10 and one of -4 to have a gain of -40. If I enter the circuit in Multisim I don't get an attenuated signal, the signal is just amplified.
Am I doing something wrong here or is it correct? I just don't really understand it. The gains for each amplifier should be correct.
AI: The term "negative gain" can be ambiguous. It could mean "attenuation", and it could also mean amplification but with reversal of polarity.
If a gain is given the units of decibels, then, almost certainly, a negative gain, in this case means attenuation.
If the gain is given as a simple muliplicative factor, then a negative gain is most probably an amplification with a reversal of polarity.
When you describe the gain as a combination of a gain of 10 (note: no decibels mentioned!) combined with a gain of -4 (again no mention of decibels), then what is most certainly meant is an amplification of the signal with a reversal of polarity. That is why your circuit gives an amplified and not an attenuated signal as output. |
H: Optocoupler necessary when grounds already common?
I have a 24V solenoid device, that is able to push and pull a small pin, that I would like to control with a 5V micro controller.
The solenoid has a reed switch connected to 24V that indicates whether the pin is currently out or in. In order to read this with the micro controller, I can either use a voltage divider to get it down to a safe 5V, or I could use an optocoupler and completely separate the solenoid and mcu.
The optocoupler sounds like the most safe option, but here's the thing: I'm already controlling the solenoid with the mcu using a mosfet. So there is already a common ground between solenoid and mcu.
So my question is: Is there any reason to use the optocoupler instead of a simple voltage divider in this case, where we already have a common ground?
AI: My experience is that optocoupler does make sense only when using isolated grounds. If not, a simple voltage divider should be fine. |
H: RF high power amp bias scheme
I am using the TGA2237-SM for the TX side in a front end design. I am trying to figure out an analog method for doing the bias up and bias down procedures.
Bias up
Set gate to Vg=-5V
Increase Vg till Id=360mA (drain current), Vg~-2.6V
Apply RF
Bias down
Turn off RF
Decrease Vg to -5V
Turn off supplies
I was thinking of using a current sense amplifier similar to the LT6106, where my load would be the drain of my RF amp and the Vout of the LT6106 would be the gate of the RF amp. See image below.
I need the Vout to start at a voltage and then increase based on the load current increase. This sort of analog design is not my wheelhouse, but I feel like this should be easy, but something is eluding me.
AI: Here is my proposed solution. Please revise and let me know if you have any concerns or point to details I may have forgotten. |
H: Basic IR circuit question
I'm creating a basic IR circuit and trying to get a better understanding of its working.
What is the purpose of R2? and how would I calculate a new value for it if I was using a higher voltage supply instead?
AI: In the absence of R2, all the current flowing through D2 would pass into the base of Q1. The resistor keeps Q1 switched off until D2 starts to conduct a little, which ensures that D1 is off in ‘dark’ conditions. It also ensures a quick switch-off when D2 stops being illuminated. |
H: Power Supply Module Internal Trimmer circuit / Remote Programming Resistor Value?
I am looking to incorporate a 45V supply into a design. These PFE1000-48V supplies have a trimming ability to get +/- 20%, based on +/- 20% variable resistor. I am trying to confirm what this resistor value should be. If 45V is 93.75% of 48V. So the resistor value should be 93.75% of the base, correct?
Per the manual, you have this:
This suggests that R2 should be 18k and that VR should be 46.875k. However, I am unsure how that works based on the internal circuits here.
I'm assuming the resistor to S+ is the line resistance to the output of the supply. Given that I do not see how the Trim voltage changes at all based on VR value. Shouldn't it change based on the R2 Value?
AI: It changes the R2/R1 voltage divider and therefore the voltage at the non-inverting input of the error amp. TDK actually will forward requests to their engineers if you contact customer service; here's some additional info I got from them. Emphasis theirs for my specific question about raising output voltage; you'll need Ra. FYI, they prefer applying an external voltage to the TRM pin to adjust output voltage. |
H: Help with identifying SMD ccomponents
Can someone help me identify a couple ofSMD components?
Both are from analog circuits.
The first package marking is 50W.
I'm assuming that it is a JFET, but I'm not sure.
The second one is marked A6. I'm assuming that this is BAS16 diode, but the package looks not so usual to me.
AI: According to the same website (https://embedeo.org/smd_codes/), the diode can be either UMA6N, FMA6A, BAS216, BAS316 or MMBD4148 ... but when looking at packages it looks like BAS216 from NXperia is our best match :) |
H: What are the names of screens used in "Basic calculators"?
I was trying to power a basic calculator that day with a power source and I started from 0V going up to 1.5 v I noticed the calculator screen turning out to show a "0", but I could not do any calculations. I also, noticed that powering the screen did not even pull 1mA which is the minimum I can see from my power source.
Do those screens have a name? it would be cool to use them in Ultra low power applications.
AI: Liquid Crystal Displays, or LCDs, use a material (the ‘liquid crystal’) which can be polarized in segments by an applied voltage.
The display glass is made up of several layers and mirror on the back. When a segment is de-energized (polarized), it is in opposite polarity with the filter, blocking the light and making the segment appear dark. Energize the segment, it stops being polarized and light passes through.
This type used in a calculator is called a ‘Twisted Nematic’, or TN display. The TN display polarizing voltage uses almost no current, so indeed these displays are very low power.
More here: https://electrosome.com/lcd-display-fundamentals/
There are a wide variety of pre-made LCD modules on the market, which include driver ICs. You can also get custom-made LCDs for a price.
You need to check what voltage the calculator controller actually needs. It may be that it needs more than 1.5V to operate. |
H: Can I power an external stepper motor driver while stepper motor is disconnected from driver?
I am building a laser cutter and I am using external stepper drivers to power stepper motors. I have a driver for an optional stepper motor for a rotary attachment. I would only disconnect or connect the optional motor when the machine is powered off. Can I power the external stepper driver without the stepper motor connected, as long as I don't connect/disconnect the motor while it is powered?
This is the driver I am using https://cohesion3d.com/shop/peripherals/external-stepper-driver-4-amp/
AI: I see no reason for stress using any half or full-bridge Stepper drivers with no load.
If you have the unit powered off and move the stepper motors connected, it will create enough back EMF to get rectified by the body diodes and power up any micro cooling fans on the same supply. I've done that before but I'm not recommending it.
other
I also have a 3-axis stepper driver 1.1m square gantry with 3rd axis for the laser and have run it disconnected when I loaned my laser to a buddy ... hmm who still has it. But I used a 2A CNC shield on an UNO card but very fast optimized using Gcode Panel over on Windows.
If you burn too slow you may as well go single or 1/2 step. You need lots of laser power to burn anything more than wood fast. Like 100W. I only had 10W to burn 1/4 million pixels in softwood in 3 hrs.
You will need lots of power for cutting foam and a toxic fume extractor. A hot wire cutter might be cheaper and faster with 300W. |
H: DIY Multiplexing circuit to drive 7-Segment displays like they did in the 1970's
My old CMOS cook-book shows a generic block diagram for a MUX circuit to drive many 7-segment LEDs.
It's assumed the reader will use an off-the-shelf MUX chip to drive the displays, but I don't want to.
I want to build my own circuit using 7400-series chips. Any hints? So far, I'm using shift-registers to move data from the counting circuit to the 7-segment decoding circuit. It feels like it's going to work, but just feels a bit messy with a high chip count.
Any ideas from the 1970 and 80's?
AI: Why the 7400 chips? :) The MC14000 / CD4000 family was available back then. Most designs that didn't use CPUs wouldn't multiplex since the displays were driven by parallel outputs from counters typically, or from parallel latches. The multiplexing for parallel latches was done on the bus side, naturally - each latch was an addressable write port. The decade counters would be, well, used for counting, so no multiplexing involved - they were just chained into a long chain of decade counters, as many as there were digits. Then either a counter would have a 7-segment decoder and a parallel latch built in, or there'd be a separate latch/decoder.
I'm using shift-registers to move data from the counting circuit to the 7-segment decoding circuit.
Why? The decade counters can drive the digits directly. You're in the 1970s. LED displays are dim. Nowhere near as bright as those you can get today - at least an order of magnitude worse in terms of energy conversion efficiency. They also didn't take much heat before degrading, and were generally fragile compared to modern LEDs.
In the 1970s, you'd most likely not want to multiplex LEDs, since they'd be too dim. Especially in applications where you'd want a range of usable brightness, e.g. a brightness adjustment for the display, like in avionics etc., no multiplexing of the display was involved. The bus linking the digital signal source to the display could be multiplexed, but the displays would be driven statically at 100% duty cycle. Optional brightness adjustment could then either reduce this duty cycle, or decrease the effective voltage seen by the segments. This would be typically done not by lowering the supply to the driver chips, but by raising the common cathode voltage, or lowering the common anode voltage. |
H: Should I use heat shrink tubing on solder connectors?
I learned soldering after IPC-J-STD-001 E during my apprenticeship 10 years ago and my instructor told me that you don't use heat shrink tubing on connectors, but recently I've seen a lot of this and some of my colleagues say that you should do it.
Let's say you have a connector like this:
Should I use heat shrink tubing on each pin or not and why?
AI: Generally, when doing things by the book/IPC, then shrink tube should not be necessary on DB9 solder cups, because the need for them implicitly means that the solder job was botched somehow.
Common problems would be: peeled the insulation too far or melted it, used too much solder, placed the wires at bad angles, got solder wetting on the outside of the cup etc etc.
However, these are a classic example of connectors that the majority who haven't gotten professional IPC soldering certification will definitely mess up. And then shrink tubing can be used for damage control purposes. Note: shrink tubing will rarely cause any harm!
This is how you formally solder DB9 and similar solder cup connectors:
Use AWG26 wire with multiple strands.
Peel the wires in advance at a fixed length equal to the depth of the solder cup.
Gather the strands gently with your fingers - don't twist them together with force, they should follow the natural twist they had before you peeled.
Pre-solder the wires by covering the exposed wire with solder. Easiest way to do this without melting the insulation is to start with the tip close to it, then move the tip outwards towards the cut.
Fixate the DB9 with a vise or similar.
Cut off a bit of your ~0.5mm solder and leave it inside each cup.
Heat the cups from the outside while inserting the prepared wire. Wire straight along the cup, obviously, with no space in between.
There should be no solder leaking out or wetting on the outside of the cup, or touching the iron tip etc.
If everything is correct, the plastic insulation of the wire now ends exactly where the cup begins, no part of the peeled wire is exposed, the insulation isn't melted and of course there needs to be proper wetting in the joint itself.
This would be as per the highest IPC requirement for solder certification, military use and the like. Very few people solder DB9 this carefully!
I certainly don't when I just need some quick & dirty lab cable assembly done, rather than spending some 30 minutes on a single DB9. And that's when the shrink tube comes in - to hide away your quick & dirty solder job...
Also these solder cup connectors are a pretty horrible invention in my opinion, since you often get mechanical strain at the solder joints. Shrink tube could help slightly in catching that blow, though if doing things by the book, then some proper external strain relief mechanism should of course be used. I would generally recommend to forget all about solder cup DB9 if possible and use IDC versions instead, they are far more rugged and reliable. |
H: Bigger NTC = better protection?
A 2.5 ohm NTC is used in the following PFC booster. I've got a 20 ohm one. Can I use it instead of 2.5ohm one? Does it provide better protection or does it disturb the normal operation of the circuit?
AI: A bigger resistance NTC thermistor will reduce the inrush current on power up (its intended use) but, it will also waste power when normally operating and, this may be completely undesirable. It may also cause the higher resistance NTC thermistor to overheat and fail.
The 2.5 ohm version is readily available in the UK: -
Hence, why risk using the wrong part when the right part is commonly available (at least in the UK). |
H: Does the input offset voltage of an opamp remain same after each power up?
If we have an opamp and we know the input output relation we can obtain a linear function even though there is input offset voltage.
In the above situation as long as we know Vio, and since resistors are fixed we can derive a transfer function between Vin and Vout of the opamp.
What I don't know is whether Vio is a fixed quantity or an unreliable one changing at each power up. I am trying to amplify a DAC output but I am worried about the effect of this offset voltage.
Does it vary with time or supply voltage, or anything else?
AI: In general offset voltage will vary with everything to some degree.
Op-amps that are auto-zero (zero drift) tend to have a relatively low (often negligible) drift with temperature and time (aging) but have other disadvantages.
There are a very few op-amps that do an auto-zero cycle only at power-up which adds an extra element of risk and uncertainty to the power cycling. I would avoid those entirely in pretty much any situation.
None-auto-zero op-amps age to some degree (typically some kind of drift that decreases as time goes on but never really stops) and have Vos changes due to ambient temperature that can be relatively large (say >5uV/°C) or relatively small (perhaps 0.2uV/°C) for the best designs. As always, beware of how the datasheets actually specify drift (it's not a guarantee of the slope over a narrow range, rather, it is typically a 'box' specification over a wide temperature range. Even if you have stable ambient temperature and turn it off for some time, even if the offset voltage does not change with time, there will be a warm-up time while the junction temperature rises to near the steady-state value. If you draw a great deal of current from the output the junction temperature and therefore offset voltage will change as a result of that (you can consider that a kind of low-frequency distortion).
Offset voltage effectively changes with common-mode voltage, which is the CMRR.
In particular if they are rail-to-rail input they often have a significant and nonlinear shift in offset voltage with common mode voltage as the two front ends transition. If you can avoid that region, that kind of op-amp can be no worse than a non-RR-input op-amp.
Since those characteristics vary wildly between op-amp designs you need to pick one that meets your detailed requirements. The resistors won't directly affect offset voltage, though they will affect gain drift. If you're concerned with microvolts then you need to consider a lot of other details.
Here is a typical high-precision op-amp (an AD8599) showing Vos change with Vcm, from the relevant datasheet:
And, from the Analog Devices OP07 datasheet, a typical precision amplifier, typical drift with time:
The first hour or day of operation is typically specifically excluded so some burn-in is assumed to get those typical results.
From the LT1028 datasheet:
You can see the (relatively small in this case) warm-up drift, typical aging, drift with temperature. Keep in mind that the actual numbers shown in this datasheet are for one of the very best of breed product and a jellybean op-amp may be orders of magnitude worse.
Changes in bias current will also affect the output offset voltage of your circuit.
Non-precision non-auto-zero op-amps will behave similarly to the above, but often much, much worse. They just don't bother providing the figures because they assume you don't care about 100uV or a few mV here and there.
In conclusion, other than the rare exception I mentioned in the second paragraph above, offset voltage will typically return to the previous value very closely following a power cycle (after a suitable warm-up time has elapsed). |
H: Why is the output voltage in my second op amp not the same as for the first op amp?
I saw this tutorial on a website.
From that, I designed these circuits:
In my circuits the voltage source is 12 volts.
The tutorial says the output gain should be 2. In my second circuit the gain is 2 but in the first one that is designed with transistors it does not give me 24 volts like the second one.
Why is the output voltage in the first circuit not the same as from the second circuit?
AI: When making expectations of what an op-amp can or cannot do, one of the first things you learn is that the output voltage of the op-amp cannot be beyond the power rails applied to the circuit or device.
So you have an op-amp (made from transistors) that has a gain of 2 and then you apply an input of 12 volts (RV1 at maximum) and your expectation is that the op-amp output should be 24 volts. Well, this cannot happen. |
H: bi-directional motor using SPDT relay and diodes
I have a bi-directional motor that I am trying to control using an SPDT relay. It is only working in one direction when I remove the circuit for the opposite direction, and it is either shorting or just not starting no matter what I try. Below is my circuit. Any ideas on how to improve this so it works?
EDIT: I realize the diodes are drawn backwards here, but I did put them in the correct direction
AI: Unfortunately this can't possibly work. The battery is basically shorted out on the bottom side of the motor.
The only way something like it could possibly work is if you get the other side of the motor to stay at half the battery voltage, without shorting it out. That's possible, but you'll only get half the motor's speed, and you'd have to either waste tons of power (wasting the battery really quickly) with a voltage divider, or make a more complicated circuit that's more complicated than getting a DPDT relay.
(noting that the diodes are actually the opposite way to how they're drawn in the picture) The diodes do not prevent current from flowing backwards to the battery. I don't understand what you mean by that. The diodes allow the current to flow in the same direction that it wants to flow anyway - i.e. from one side of the battery to the other - so they don't make any meaningful difference. If you turn either diode around it will block all the current and nothing at all will happen. |
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