text
stringlengths
83
79.5k
H: When to employ RF shield cover on PCBA? During reparations and teardowns I have frequently come across PCB-mounted RF shields and covers. While I don't typically work with GHz processors or design RF modules I wonder if such covers could be a way to efficiently avoid EMI issues in projects where unit cost is not a significant concern. What type of designs scream "We should look into getting a RF shield cover!"? What type of circuitry is not well suited for RF shield covers? (Heat dissipation? EMI peaks in sub-100 MHz range?) Is it common to add such a cover from the start or is this typically a measure to combat EMI in later stages of a design project? AI: Usually these designs are tested with a spectrum analyzer or at a lab, if the processor is radiating beyond the FCC limits it gets a shield. Some designers might opt to add a shield from the beginning just to be safe or from previous experience. Shielding can also happen at the enclosure level, but if the enclosure isn't conductive or passes RF then it may be necessary to add the shield on the PCB. Is it common to add such a cover from the start or is this typically a measure to combat EMI in later stages of a design project? Since shields add cost to a project, most designers would not want to add them to a project unless necessary. With many shields (especially SMT shields) you can design them into the PCB and then test for radiation. If the PCB and/or chip is radiating more than the requirements (FCC or if you have radio interference), shielding will be needed. If you don't need it then you can leave it off of the bill of materials. In many cases a near field wand and spectrum analyzer can be used for pretesting
H: Wire in hole for pins with hole in them? Looking at two of the three barrel jacks in the graphic, two of them (the upper ones) have holes in their "pins" or "terminals". When soldering to this terminal, should I place the wire through the hole? Or should I line up the wire colinear and parallel to the terminal and solder it that way? Essentially, I mean if the terminal is running vertically, should I also place my unjacketed length of wire vertically? If the wire should indeed gothrough the hole, do I just place enough wire (a mm or so) into the hole or do I perhaps place in lets say 5 cm, and bend the additional wire back against itself? That is, the unjacketed portion against the jacketed portion? AI: You're meant to put the wire through the hole and generally you bend a little hook or a zig-zag in it for mechanical strength. See this link for some terminal soldering guidelines from NASA.
H: Can I replace a 12 V 40 W heating element with several 12 V 7 W elements? Here is the environment: An RV fridge has a heat exchanger for cooling, looks like what you would stick on an IC chip, only 12" square. It has heater stuck on the back of it that is activated for the defrost cycle. This heater is 12 V, 40 W, 3.6 ohms, and is protected with a 7.5 A fuse. Here is the problem: The heating element failed, they are no longer made, and they are sold out everywhere, I have contacted the OEM, no parts. What I want to do: Toss the original part and replace it with something(s) that will look like the original to the diagnostics (3.6 ohms - I think is the test). I found some elements - 12 V 7 W ? ohms. I was thinking that I could put 6 of them in parallel and end up with 42 W. My Motivation: If the handyman looking through a salvage yard right now finds one, he will sell it to me for $250 plus $80 to drive out here and another $80 to install it. Those elements I mention will cost me about $40 and I can install them myself. Will the extra 2 W burn out the power board or is that a trivial amount of extra power? And, of course, is there a better, smarter way to solve this problem, besides continuing to search for a more exact fit? AI: The heater you found has 7 W at 12 V. Five in parallel give 35 W. Two in series deliver 3.5 W, if we combine both, we get 38.5 W using 7 heaters. simulate this circuit – Schematic created using CircuitLab
H: Difference vcc and vc, vbb and vb, vee and ve? As far as I know, potential difference (voltage), that's mean it needs two point to measure it. Then what does vc or ve only or vb only? If vce means potential between vc and ve? And what does ve only means or vc only means? AI: From this website: - Double letters (cc) refer to power supply voltages. For example, Vee refers to the "emitter" voltage. In CMOS logic, Vss refers to the "source" voltage, and Vdd is the "drain" voltage. Single letters refer to the voltage relative to ground; for example, Vc is the "collector" voltage relative to ground. Two different letters indicate the voltage between two terminals; for example: Vbe is the "base" to "emitter" voltage drop, while Vce is the "collector" to "emitter" voltage. I mean, I could have used my own words but the website puts it succinctly.
H: Building a simple USB notification light I successfully used an Arduino with the FastLED library to operate my WS2812 Ring Light. For my next project, I want to create a notification light for my PC. Instead of using an arduino, I picked up a USB 2.0 Male Adapter Dupont Extender Cable and connected the USB to my PC and connected the dupont wires to my other Ring Light. Now, I can successfully power the light, but I am absolutely clueless on how to get my Arduino sketch/C++ code to execute on it. All I want to do at this point is flicker the colors from Red to Green. How can I transmit this color change on the white dupont wire? Edit: I know this is no longer an arduino project, and I may need to use a different technology. AI: The cable is just that... a cable. The ring light doesn't have a USB interface. The Arduino's role was to interface between USB and the light. You need to keep either some Arduino, or another microcontroller that has USB. You potentially could use a bare FTDI USB interface chip, since those can be used to "bit-bang" almost any data out their pins in the "bit blasting" mode (as opposed to the default serial UART mode). But either way, you'll be using some sort of an active, complex device as an interface between USB and the light.
H: Why can't USB-C receivers be as small as their USB-A counterparts? We're all familiar with the USB-A 2.4 GHz receivers from companies like Logitech that are absurdly small and barely protrude from the port. But when looking at available USB-C equivalents, they are quite a lot larger even after accounting for the fact the width of the port is reduced. Why is this, and can they actually get any smaller? USB-A Example: USB-C Example: AI: Usb thumbnail sized adapters take advantage of the larger size plastic support of the usb A connector. It goes from this: To this: They take the 2.25 mm of plastic support and replace it with a double sided pcb. But Usb C is tiny. Smaller in width and height and depth. The female side connector floats in the shell, and is double sided. The male side connector has spring pins on both sides taking up 1mm each of the 2.6mm connector. It's almost paper thin shell and has no room for a normal fr4 pcb. Frankly there is no space to replace the connector with a pcb and parts. https://fccid.io/HQX-R07BT/Internal-Photos/Internal-Photos-2286089 https://www.mouser.mx/blog/usb-type-c-explained?cm_mmc=PressRelease-PR-_-Molex-_-USB_Type_C_Solutions-_-2016-04-13
H: Can a memory backup supercap hold on for more than 2 weeks? Most RTC chips have a VBATT input for backup power supply; besides a battery, you can use a supercap there, e.g. using the following scheme: simulate this circuit – Schematic created using CircuitLab How much time would the cap provide for your RTC while the main power is not available is of course function of the RTC's current, C1's capacitance, and the various leakage currents. D1's leakage is in the order of 20nA and can be ignored (see below) My RTC consumes 365 nA, can can work with Vbatt down to 2.0V, so a 0.22F cap is enough for 18 days, if C1 was a perfect 0.22F cap. The C1's leakage current is, I believe, the biggest contributor, at 0.5 to more than 10µA The leakage currents of supercaps seem to be not well characterized; in fact, a lot of datasheets omit that value at all, so it's likely nothing to write home about (20-100 or more µA). Of the few models that actually list something, for example Ohmite LM055224A: 0.22F, 0.5 to 10µA. AVX SCMR14C474MRBA0: 0.47F, 6µA others, which are again 8-10+ µA for 0.2-1F, and more for larger capacitances, it can be computed that they are unlikely to last more than a week in RTC backup operation. Their leakage is just too high. Questions Is it possible to deal with this imperfection? Is a supercap suitable for this design at all? Can more than 1 week of autonomy be achieved? I'll be happy with at least two weeks; How is leakage defined? -- most of the time, manufacturers don't specify what do they mean by leakage current and in what conditions do they measure it. Might be they measure worst-case leakage (high ambient temperature, capacitor close to 5.5V, ...), while the average case at 3V and 25°C is an order of magnitude better. Not a shopping question I'm not searching for a specific cap model that would fit the bill; I've pored through a lot of datasheets, and haven't found any. I think I may be mistaken to use a supercap there in the first place, as per question #1 above. AI: Is it possible to deal with this imperfection? Is a supercap suitable for this design at all? The only way to really answer this for yourself is to let the rubber hit the road: you have to do some experiments and qualify the supercaps for your use. You'll be able to quantify their parameter spreads, the leakage vs. temperature dependency, etc. That's basically how engineering is done when you want to get most of the parts. You have to almost understand them better than the manufacturer does, focusing on your particular need. Can more than 1 week of autonomy be achieved? I'll be happy with at least two weeks Your experiments will give you the answer. Nobody else can answer it for you in general terms, because there's so much variation in parts, that you might be selling yourself short on nothing but someone else's word. It will also help you a lot to really understand these parts, and nothing can do this as well as good old lab work. How is leakage defined? In whichever way generates most sales generally speaking :). Customers tend to read what they like to see, and not necessarily the grim (-ish) reality. Plenty of products get marketed with nothing much but putting a prototype together at room temperature and calling it a day as soon as some measurements let you extrapolate to "good enough for Australia". That's why HP equipment, for example, was as good as it was: they did the very opposite. They did test all products across the operating temperature range, including aging effects where applicable. D1's leakage is in the order of 20nA and can be ignored. It is at room temperature, and then is it typical or maximum leakage? Since you have to qualify the supercaps for your application anyway - no way around that - you should characterize the diode for this use at the same time. You'll be sticking the thing in a small thermal chamber anyway, so you get to characterize the diode leakage, PCB leakage, RTC leakage, and everything else at the same time. Good deal, if you ask me. [Anything else?] Yes. You'll need to qualify each lot of parts you get for this application, until you understand the level of inter-lot variation, in order to relax the level of incoming component testing. The alternative is not sleeping well at night and/or having to occasionally turn into a firefighter and extinguish figurative fires in the production department. If you want to do this job once and not have to repeat it later under stressful conditions, it's best to have all these procedures defined ahead of time, so that when the product is on the market, you'll get clear indicators from incoming test and statistical QC that something is wrong, before it would get more costly. Skimping on a memory backup mode that is not a normal operating mode where you'll get instant field failure reports or end-of-line test failures as soon as a problem occurs is... unwise. It's easy to unknowingly ship junk, primed to fail later. Not a good place to be in... Thus I highly encourage doing everything you can to put a lot of due diligence between yourself and such a precarious position :)
H: Unknown amplifier circuit Analysis Does anyone know what this kind of amplifier circuit is? I am trying to analyze it by calculating its gain, cut-off frequency, and frequency response. I am not sure how to break this circuit into different parts by working on transfer function or general amplifier analysis, as part of the RC circuit is in the loop of the amplifier and it really looks like a second-order active low pass filter but with one extra capacitor which may greatly change the functionality. I am also new to simulating any circuit on the computer. What are the effective tools people use nowadays? The analysis may be less handy with using some simulators. simulate this circuit – Schematic created using CircuitLab AI: Theory What are the effective tools people use nowadays? The first, most effective, and primary tool to use is your brain. I first see is a high-pass passive RC filter leading into an active filter. But on reflection, this is really just a DC-blocking filter with a necessary galvanic connection to ground on the other side of the capacitor. Assuming for a moment that the impedance of \$Z_{C_{13}}\ll R_{12}\$ (by at least a factor of 10), I find that anything above about \$16\:\text{Hz}\$ is passed through this filter. I then see what is probably a 2nd order low-pass filter, but that includes a stabilizing capacitor across the feedback resistor, \$R_{20}\$. If that's correct, then I expect to find that the time constant formed by \$C_{19}\$ and \$R_{20}\$ will be somewhat shorter than what is implied from the 2nd order \$\omega_{_0}\$. I then see a low-pass passive RC filter at the output of the active filter. I expect to see the time constant formed by \$C_{1}\$ and \$R_{14}\$ will be a factor of 10 longer than the 2nd order \$\omega_{_0}\$ of the active filter preceding it. I've no idea how this works out in practice. But that is what I'd expect to see, should I imagine a "rational designer" created the circuit. Let's see. Input stage: Passive RC high-pass The time constant is \$1\:\text{s}\$, which implies \$f\approx 160\:\text{mHz}\$. Given the following \$R_{12}=10\:\text{k}\Omega\$, and expecting that the impedance from \$C_{13}\$ is less than \$\frac1{10}\$th of that, From this, I find that everything near, or more than, about \$160\:\text{Hz}\$ is readily passed through to the active filter. Here, \$R_{16}\$ is just a necessary galvanic connection for the opposite end of \$C_{13}\$, which must have a discharge/charge path available to it. There will be some loss for lower frequencies. Say, starting at about \$16\:\text{Hz}\$ and below that. Middle stage: Active 2nd order? The time constant for \$C_{19}\$ and \$R_{20}\$ is \$100\:\mu\text{s}\$. (Or, about \$1.6\:\text{kHz}\$.) Setting this aside for a moment, and treating the active stage as 2nd order, I find \$\omega_{_0}\approx 960 \:\frac{\text{rad}}{\text{s}}\$ or \$f_{_0}\approx 153\:\text{Hz}\$. So this implies that \$C_{19}\$ is only there for stabilization and can be ignored in analysis. The middle stage really is a 2nd order stage that loads the input source at about \$10\:\text{k}\Omega\$. Final stage: Passive RC low-pass The time constant is \$1.65\:\text{ms}\$, which implies \$f\approx 100\:\text{Hz}\$ Summary At a guess, I'd say that this filter system has a roll-off at about \$100\:\text{Hz}\$, at about 3 times \$20\:\text{dB}\$ per decade, or around \$60\:\text{dB}\$ per decade on the high end. You can see that there was a rational designer operating here. The first stage is a high-pass starting with frequencies about an order of magnitude lower than the middle stage's low-pass roll-off and the final stage's low-pass roll-off is about an order of magnitude lower than the middle stage's roll-off. It's pretty much something one might do "off the cuff," so to speak. You have a mild band-pass formed by the 1st and last passive stages, with a much sharper high-end roll-off contributed by the 2nd order middle stage's active low-pass. The middle stage is active, not passive, and doesn't load the 1st stage (much) while also providing voltage gain. The added \$C_{19}\$ ensures, without otherwise much interfering with the main purposes of the middle stage, that the noise gain is reduced. The analysis may be less handy with using some simulators. There's no need, in this case anyway, for a simulator to perform the analysis for you. It can be done on paper. (Besides, it's better to be able to do things, yourself, and not depend upon tools that you may not have available when you need to be able to think about something.) That said, here's what LTspice suggests: That's surprisingly close to prediction from theory. The gain is as expected: \$1+\frac{R_{20}}{R_9}\approx 13.2\$ or \$\approx 22.5\:\text{dB}\$.
H: iCE40LP1K FPGA - Performing an analog to digital function (Power monitoring) without an ADC I'm using iCE40LP1K FPGA and I wanted to create a block that is responsible for doing a fast power down of all devices on the platform when the 12V is shut down due to powercut. Whcih means, when 12V is OFF, we want the FPGA to perform a fast reaction to turn off all the "Enables" signals for DC-DC's, LDO's, and other devices on platform. Although the FPGA is supplied from 3.3V which is created from the 12V_Main, there is still a lot of capacitors on platform that need to discharge until the 3.3V gets affected from 12V shutdown. here is the Lattice FPGA Schematic Design My question is, how can I tell FPGA, using VHDL code to perform a certain function when the 12V goes below a specific logical value? It looks like that I need to find out what is the ViH and VoL for the FPGA IO's. I have added two resistors where the voltage at PIN 84 would be around 3.3V, and I thought that If 12V goes down, then 3.3V will be smaller and that would be logical "0" for the FPGA. but I did that assuming that for example 3.29 is considered 0V which is wrong. what is right value of resistors I need to make such a function based on the IO's operation voltage range? Note: I know such function be achieved better by using ADC. but this FPGA doesn't have one and we want to achieve this goal by simpler means. AI: One way would be to use a digital pin and a resistor divider, a schmidtt trigger or other buffer would be good to clean up the signal (a schmidtt trigger is either low or high) before you send it into the FPGA. If this isn't done you could introduce metastablity into the FPGA as FPGA signals need to either be low or high, not in the middle which makes both transistors turn on at the same time). A resistor bridge can give you voltages that are in the threshold range and not low or high and should be avoided piping in their voltages straight into FPGA's. Make sure you also mind the voltage levels as the inputs can be selected on FPGA's (never used ice40 so I can't elaborate on this). Another way would be to use the built in comparators, have one tied to below 3.3V and the other tied to a resistor divider on the 12V. Source: https://www.latticesemi.com/-/media/LatticeSemi/Documents/ProductBrochures/AM/CommonAnalogFunctionsUsinganiCE40FPGA.ashx?document_id=45822
H: Two devices sharing the same coaxial cable, what frequency channel should I chose? The 2-stories house is equipped with a coaxial cable that has wall plugs in 1st and 2nd floors (it's also connected to the antenna on the roof). Our IAP installed a modem for Internet (Arris CM820C) which frequency ranges are, according to the manual RF downstream: 108-1002 MHz RF upstream: 5-65 MHz The modem is on the 1st floor. Wifi is not powerful enough to reach the 2nd floor from the 1st, and a PLC test was not fully satisfactory. So the next device "on trial" is a MoCA 2.5 Network Adapter for Ethernet Over Coax (Hitron). The "TV" plug would be for the modem the other one goes to the wall (first floor) then the other Hitron device would be connected to the 2nd floor coax socket, delivering Internet from the 1st floor. The frequency range is 1175 to 1625 MHz according to the MoCA 2.5 specs page 12 (2.1.4 MoCA 2.5 Extended Band D Frequency Plan), range divided into several channels. Based on that, is there a risk of interference between the IAP modem and the MoCA 2.5 Hitron? is there a channel to choose preferably on the Hitron? (Not sure it is possible to change the IAP modem channel) AI: So as I understand it: existing house coax is two downfeeds from the roof antenna (probably RG59 cable), from a splitter, one feed for each floor cable modem has new RG6 feed installed from the service on the first floor So I am going to assume there is no physical connection between house coax and the IAP (service provider) feed. This is normal practice; if you require additional feeds they will generally install new RG6 for them. With that all said, what you do depends on your system goals. I'm going to assume that like most people you probably don't care about cable TV and only want internet (if you did, the service provider would have installed new feeds.) If that isn't the case, make them come back and do it because, hey, free RG6. On the other hand, you may want to use that rooftop antenna to receive free-to-air TV. Can you use MoCA? MoCA can coexist with cable or over-the-air TV, no need to worry about channel selection, they use a higher band than TV and cable modem. MoCA can even work over RG59 if the runs are not too long, but it might work better if you upgrade your house coax to RG6 which has lower losses at high frequency. You can try it and see. MoCA is pretty robust though. MoCA signals pass through splitters, but you may want to upgrade those too. If you wish to keep your rooftop antenna you will need to install a MoCA blocking filter between the antenna and the house wiring so that you're not transmitting your MoCA to the neighborhood. Your adapter may come with one, if not, they're easy to order. Otherwise, disconnect your rooftop antenna. I've used MoCA together with wifi range extenders / access points and it works, but it was somewhat complex to maintain (and at the time my day job was designing that stuff, as well as DVRs.) So, yes, the Hitron MoCA bridge can work with the access point of your choice. You could also consider installing a hard-line Ethernet cable from the modem to the second floor. Then you don't need to install MoCA adapters at all. This is easier to maintain and more reliable in my opinion.
H: Charging inductor flashes an LED I'm experimenting with how inductors store and release energy into a circuit. I made the following circuit (I'm not sure of the actual inductance value because I'm using a "Snap Circuits" electromagnet part without the optional "iron core" inserted. I understand why the LED flashes when I open the switch. What confuses me is that the LED flashes very weakly also immediately each time I close the switch. I don't understand what is causing this. Can anyone help me? simulate this circuit – Schematic created using CircuitLab AI: The switch "bounces" a little. The particular phenomenon is complex and include little sparks, vibrations and sometimes chemical processed over the switch contact surfaces. So, it is never "off" and then simply "on". It is "off", then the current starts flowing in pulses that leave less and less pauses and at some moment it is finally "on". The whole process happens in a miliseconds timescale (when the switch is sane), but it has enough on-off transitions in order to power the LED. The whole "bouncing" business is quite a hassle when one deals with switches. A modern CPU can run thousands of instructions while e.g. the switch under the keyboard button "bounces". There is a separate term "debouncing" that deals with sanitizing a signal from a mechanical switch. On the other hand, the same "bouncing" accelerates the degradation of contacts switching a significant electrical power (e.g. in power relays). Having an inductance in the circuit makes the problem worse. In some cases, additional elements (diodes, capacitors, etc...) are used to protect the mechanical contact.
H: Sensor - Use level shifter or not? I try to design an electronics with a VL53L1CXV0FY/1 ToF sensor. The uC has a logic level of 3.3V and the ToF sensor seems to have different logic levels, but I'm not sure what I should choose. Operating Conditions according to the datasheet: The default level seems to be 1.8VDC for IOVDD, that would mean I need a 3.3V, 2.8V and 1.8V LDO, that makes not a lot of sense to me. Now my question would be, what would happen if I directly set IOVDD to 2.8V as it is done for the evaluation board. It seems, that I first need to drive the hardware with the 1.8V and then repogramm it, that is definitely not what I want to do. Also it seems, that the voltage is directly 3.3V compatible (MAX 3.5V), so theoretically I should be able to have only the 3.3V LDO and no level shifter at all, but only when I get a pregrogrammed sensor or do I miss something important here? Datasheet: https://mouser.com/datasheet/2/389/dm00452094-1799360.pdf Evaluation Board: https://www.st.com/resource/en/data_brief/vl53l1x-satel.pdf Nucleo Example: https://eu.mouser.com/datasheet/2/389/x-nucleo-53l1a1-1848808.pdf AI: I agree it's a confusing. I found a related question on the ST forums. The way I understand the answer given there is that the I2C interface will still work with 2.8 V when configured for 1.8 V. Its detection threshold for high/low transitions will be a bit too low (eg. 0.9 V instead of 1.4 V), so it will more susceptible to noise, but it will work. As for running directly on 3.3 V, you might have higher power consumption but otherwise that seems to be allowed by the recommended operating conditions. If you think this is too close to the maximum, you could consider running the whole bus at 2.8 V or 3.0 V, if the other devices and the master support it.
H: IR LED current not adding up I'm trying to power 8 IR LEDs in series with a resistor at 12V. The forward current is 100mA, forward voltage is 1.2V-1.6V. $$R=\dfrac{12V-8\cdot1.2V}{100mA}=8\Omega$$ So my resistor should be around 8ohms. When I'm measuring my current, I'm getting around 30mA. When I increased the voltage to around 15V, I was able to get to 100mA. But I need it running at 12V. Why is it so low? How can I get the current to be at least 80mA at 12V? https://media.digikey.com/pdf/Data%20Sheets/Lite-On%20PDFs/LTE-5208A.pdf AI: The forward voltage of 1.2V is typical when at a forward current of 20mA: The forward current determines the forward voltage, especially at higher currents. From the datasheet, you can see the typical 1.2V forward voltage at the specified forward current of 20mA. Estimating the behavior of the diode, it looks like above 20mA, internal resistance dominates the forward current. The internal resistance (again, estimating) looks like about 6.6Ω. For a forward current of 100mA, that's maybe a 1.73V forward drop each. Putting 8 of these things in series is probably equivalent of 53 Ohms in series... on top of your 8 Ohm resistor. Things will move around as they heat up, but I don't think you're going to get 100mA through 8 in series - you'll probably have to break it in to 2 or more strings in parallel. A quick sanity check of numbers: $$ 8\cdot1.73+8\Omega\cdot100mA=14.7V$$
H: With a transistor (as a switch), does the order of the parts matter? I've wired up my project(s) similar to how they're laid out in A to control whether or not an LED is on or off. It works fine (as far as I know), but I've seen lots of examples online of circuits laid out in a B formation (including this SparkFun transistor tutorial). Is this just a convention, or is there a reason why you'd prefer B over A? Power comes in from the top and feeds out to Gnd at the bottom, and a pin connected to an Arduino of some kind connected to the base: simulate this circuit – Schematic created using CircuitLab AI: Short answer: Use configuration B (almost certainly, although we don't know the rest of the circuit). Longer answer: Depending upon the rest of the circuit, changing the order of the switching transistor and the load may change the voltage which you need to apply to the base. If you use an NPN transistor and the emitter is grounded, you have a common emitter configuration. The base voltage when the transistor is "on" needs to be between 0.6 and 0.8 volts (or thereabouts). If it goes much higher, there is a chance you will burn out your transistor. The off voltage should be between 0 and say 0.5 volts. If you use the NPN transistor and the collector is connected to Vcc, you have what is called an emitter follower configuration. When the transistor is "on", the voltage at the emitter will be about 0.6 to 0.65 volts below the voltage at the base. Thus to get full power through your transistor switch, the voltage at the base needs to be close to Vcc (perhaps above). To turn the transistor off, the base voltage needs to be close to 0.5 volts or less. Because the emitter follower configuration requires a much greater voltage swing at the base, for switching circuits, the common emitter configuration is usually preferred. Note, that if you use a PNP transistor instead of the NPN in your schematic, the common emitter configuration will have the transistor's emitter connected to Vcc, and the emitter follower will have the collector connected to ground. Again, the common emitter configuration is usually preferred. If the transistor is between the ground and the load, the configuration is called a low side switch. If the transistor is between the load and Vcc, the configuration is called a high side switch. From the discussion above, whether you want a low side switch or a high side switch, usually will depend upon the polarity of your transistor (NPN or PNP). Further note, that similar, but not exactly the same, considerations apply if you are using a MOSFET instead of a bipolar transistor. A low side switch is usually associated with an N-channel MOSFET. In the case of a high side switch, sometimes an N-channel MOSFET is used, requiring relatively more complicated driving circuitry, and sometimes a P-channel MOSFET is used. The reason for this is that for the same price, an N-channel MOSFET will typically have significantly better characteristics than a P-channel MOSFET. Put another way, to get a P-channel MOSFET with equivalent characteristics, but opposite polarity, to an N-channel MOSFET, will generally cost more, often significantly more.
H: Does anyone know how this type of power supply works? I bought it with the intention to convert 110V to 120V AC to 2.8V with the current being adjusted. I am not sure which is the input and which is the output terminals. Also, I am not sure what all the terminals do/represent. Is there anything else about this power supply I should be aware of? AI: Terminals 6 & 7 (L and N) are line and neutral from the mains. Terminal 5 is protective earth. Terminals 1 & 2 are the positive output of the supply, presumably +2.8 V. Terminals 3 & 4 are the negative or output ground reference for the 2.8 V. As Marcus Müller points out, you may want to get some help from an experienced person to be sure you hook this up safely.
H: Transformer humming after replacing halogen bulbs with LEDs I replaced the IKEA 10W G4 halogen bulbs in my under-cabinet lights with 1.5W G4 disc LEDs and the 120-12V AC transformer started buzzing, but not if I kept one halogen bulb in. I recall reading somewhere (but can't find the link), IIRC, it's because the transformer is designed for a resistive load and the LEDs are a capacitive (?) load, and they aren't drawing enough power. if I put a resistor across one of the terminals (the power supply has 6 of which 3 are free), will it stop the buzzing? If so, how many ohms? can I just replace it with a 12V DC power supply without worrying about polarity if the LEDs are 12V AC/DC? Thanks! AI: Most likely it’s because the LEDs don’t behave the way halogens do. Halogen lamps are more or less resistive so the current increases more or less linearly with voltage on each mains half-cycle, so the loading varies gently. The LEDs will draw almost no current while the voltage is low (below about 12V but will then start to draw current relatively abruptly towards the peak of each mains half-cycle. It’s probably this that’s causing the transformer to hum, and there will be harmonics well into the audible range so it will be more noticeable than just a 50Hz hum. The load is much less than a halogen lamp, so adding just one halogen makes this abrupt change far less apparent.
H: Are large decoupling capacitors necessary for USB hub plugs At the bottom of this data sheet: https://datasheet.lcsc.com/lcsc/1811151645_CoreChips-SL2-1A_C192893.pdf the reference circuit diagram shows huge 100uf decoupling capacitors connected to the USB plugs. My circuit board is tiny and I am hoping to use a 0402 or even 0603 part, can I get away with 10uf (0402), or say 47uf (0603) caps instead? The hub is for a very specific use, I will be connecting two wireless keyboard dongles to it (semi-permanently), it is not going to be used as a general purpose hub. AI: According to Table 7.7 of the USB 2.0 Specification any compliant USB hub must include at least 120uF of bypass capacitance to prevent droop when a device is plugged into one of the downstream ports. Note that this is "per hub" rather than per port. All of the electrical requirements are found in section 7 of the USB 2.0 specification. But in your case, you're not designing a compliant hub, so you don't need to worry about droop during attachment. In that case its certainly possible to use much less capacitance.
H: Role of feedback capacitor in nanoamp current source I am designing a nano-amp current source to drive a capacitive load, which can vary from about 50 pF - 200 pF. Analog Devices has a helpful application circuit in a datasheet (page 14) for the LT6082C op amp, copied below: My question: What is the role and importance of the 0.01 uF capacitor and 100\$\Omega\$ resistor in the feedback path of the top amplifier? The bottom two amplifiers form a differential amplifier that applies the voltage difference across the 10 M\$\Omega\$ sense resistor to the input of the 1k resistor at the negative input terminal of the top amplifier. At very low frequencies, the 0.01 uF cap acts as an open circuit, and so that feedback path is not active. At higher frequencies, is this capacitor, along with the 100\$\Omega\$ resistor there for stability? If so, is it reasonably easy to explain how those elements increase the stability? AI: At DC, the top op-amp’s feedback is provided by the differential amplifier. At higher frequencies, the feedback becomes local, bypassing the diff amp, and the gain is reduced to 1.1. The diff-amp is too slow to close the feedback loop around the top op-amp at higher frequencies. So the top has no phase margin left and will oscillate. By rerouting the feedback, at AC the top op-amp acts like an “almost” voltage follower and is thus stable.
H: Actual Line-to-Line voltage from per unit value In this question, I am able to find the per unit phase voltages using the symmetrical components. Taking the base MVA and base voltage to be the same as that of the alternator, \$ (I_a)_1 = \frac{E_a}{Z_1 + Z_2 + Z_0} \$ where \$ Z_1 \$, \$ Z_2 \$ and \$ Z_0 \$ are the positive negative and zero sequence components respectively. Given that the fault occurs on phase 'a', \$ V_a = 0 \$. Using the equations to find \$ (V_a)_1 \$, \$ (V_a)_2 \$ and \$ (V_a)_0 \$ and further finding the phase voltages, I get: $$ V_a = 0 $$ $$ V_b = -0.2143-j0.9898 $$ and $$ V_c = -0.2143+j0.9898 $$ To find Line-to-Line voltages, \$ (V_{ab})_{pu} = V_a - V_b\$ has to be evaluated. Thus, the actual value of the line voltage will be given by: $$ (V_{ab})_{actual} = ((V_{ab})_{pu}).(13.2) kV $$ But the solution in the book says: I don't understand why \$ 13.2 kV \$ is divided by \$ \sqrt{3} \$, as it only yields the base phase voltage. Is the solution wrong or am I missing something? AI: By definition the symmetrical component method uses line-neutral voltage. Symmetrical component circuits are single-phase. So, per unit voltages must be multiplied by the line-neutral voltage base to find their actual values. In your example, $$ V_b = (-0.2143-j0.9898)\times \frac{13.2\text{kV}}{\sqrt3}=7,718\angle-102.2° \text{V} $$ and $$ V_c = (-0.2143+j0.9898)\times \frac{13.2\text{kV}}{\sqrt3}=7,718\angle102.2° $$ Now do your subtractions to find your line-line voltages. That magic \$\sqrt3\$ business only shows up for balanced conditions when line-neutral voltage magnitudes are equal and phase angles 120° apart. p.s. Recheck your calculation on \$Vc\$. \$Vb\$ is correct.
H: MCU working at 3.3V and RS485 driver at 5V - how does this circuit work? I was looking for a "quick and dirty" solution in order to work with MAX487 (5V) and my ESP32 MCU. I know that Maxim integrated produces the MAX3485 and MAX3483 that are specifically designed to work with 3.3V, but I have a bunch of MAX487 (almost 100 pieces) and I don't want to throw them in the garbage. Buried in a old thread of TI support forum, I've seen this image: It seems that adding a Schottky diode (BAS40SL) on R line it will "clamp" the 5V signal to 3.3V and the MCU can work without any issue with the 5V MAX487. The only "issue" I can see is that the diode will add some capacitance, and then at high baudrates it can generate some timing issue. This is not a real problem if you have "slow" devices like 115200 baud. Will this really work? Has anyone tried out this solution? Does it have any drawbacks or can I use it without any issues? AI: It should work, but depends on exactly what the ESP defines as a "valid low." The MAX487 states a \$V_{OL}\$ of 0.4V @4mA. So when driving a 4mA load, the pin will be 0.4V. But you have 3.3V/1.8k = 1.8mA instead of 4mA, so this will be lower, perhaps 0.2V or so. The BAS40SL states a \$V_F\$ of 0.38V @1mA, so this will be a little higher (due to 1.8mA.) So say, 0.45V + 0.2V = 0.65V, that's about what the ESP32 will "see" when R goes low. Check your particular ESP32 datasheet for "maximum low input" or similar and as long as this value is over 0.65V, a low will be read properly. If it is 0.5V, then this low (0.65V) will not be read at all, or read intermittently and unreliably. Note, that the 1.8k pull-up essentially becomes the "high" to the ESP32. This will limit the rise-time of that input (since it can only supply 3.3V/1.8k = 1.833mA) to pull the line high. This will also fight against the (small, 5pF) junction capacitance of the Schottky. For low speeds this won't matter at all. But at the highest serial speeds, the diode capacitance (even parasitic trace capacitance) will delay the transition of this pin slightly. If this is a concern (must support 115.2kbaud) then keep this trace short and run it well clear of others to reduce it's parasitic capacitance.
H: What is the difference between these two IC suffixes: EUKG and IUKG? I am wondering what is the difference between these two ICs: LTC3886EUKG-1 LTC3886IUKG-1 I looked at the datasheet and the following page, but I have no clues... https://www.analog.com/en/products/ltc3886.html#product-discussions Where should I look for this kind of information? AI: The "I" is guaranteed over the full -40C to +125C range, while the "E" variant is guaranteed only from 0C to 85C.
H: How can I adjust the size of an integrated signal? I want to test whether I have solved my differential equation correctly. I have this block wiring diagram. But after the signal passed through the integrator, the amplitude is much smaller than I would have expected. If the block wiring diagram represents the mathematical equation, I would have expected the amplitude to be as shown in the picture. Does somebody maybe know how to adjust the amplitude of the signal after it went through the integrator, or why it is reduced at all? I am very grateful for any help. AI: The output has the correct amplitude, since the integral's amplitude is frequency-dependent: $$ \int \sin(2\pi f t){\,\rm d}t = -\frac{1}{2\pi f} \cos(2\pi f t) + c $$ Note the integral's amplitude \$1/(2\pi f)\$: that's the scaling you observed. To get a unity output, the frequency must be \$ f=1/2\pi \$: $$ \int \sin \left(2\pi \frac{1}{2\pi} t \right){\,\rm d}t = -\cos(t) + c $$ Also note that the integrator is free to add an arbitrary offset voltage to the output. We can simulate this using CircuitLab simulator built into this site (!): simulate this circuit – Schematic created using CircuitLab We can observe that the resulting \$ c=1 \$: How can I adjust the size of an integrated signal? If you want to normalize the output amplitude to be equal to the input amplitude, must multiply the integrator's output by the \$ 2\pi f \$ factor: $$ H(s) = \frac{2 \pi f}{s}. $$ We may as well remove the DC offset, which is equal to the amplitude of the sine wave: simulate this circuit I highly suggest playing with CircuitLab - for such simple exploration, it's entirely adequate and you don't need Simulink. It is also very flexible, since most of its functions support variables, so e.g. you can set up the frequency and amplitude as variables, and use them in all kinds of sources, Laplace block polynomials, passive component parameters, active component model parameters, etc. The variables \$f\$ and \$A\$ are interactively adjustable, and the transient response time domain simulation is already set up, so it's very easy to play with those circuits.
H: What is the correct way to use "forked" DIP sockets? In the dark depths of my parts bin I found a pair of connectors that appear to be some kind of DIP chip sockets, they look similar to these... (Image source: Farnell - Aries 14-600-10 14-way DIP Header) To my mind they appear to be an alternative to "normal" press-fit IC sockets or turned-pin sockets. How does one correctly use this kind of device? Are the IC pins intended to be soldered to the forks? Or is it friction fit? Is this something else entirely? AI: This is a plug for building your own 'IC' that can plug into an IC socket. You can string leaded components like resistors, capacitors, diodes, transistors by dropping the lead into the fork and soldering. This is much less likely to accidentally short to the next pin than winding the wire round a pin. They were very useful when every design started with a field of DIP sockets, but are almost unheard of now. I once built a 4P4T 'switch' by using two of these plugged into two sockets, their orientations and positions changing the connectivity of the socket pins.
H: What happens if the pins of two different usb thumb drives touch each other? What happens if the pins of two different usb thumb drives touch each other? Can the data get corrupted? Can the data move from one drive to another? Can the circuits get damaged? AI: Absolutely nothing happens if two otherwise unpowered USB drives touch one another. As with all electronics, one needs to have voltage applied with some current flowing for the device to function. If there's no power, nothing happens.
H: How can I change tracks with a button/switch? I am working on a school project. I want to change tracks/signals but am struggling to find a solution for it. What I want to do is have say 6 input signals/tracks which are then shifted between 12 outputs with a push button or a switch. I can then go between the breadboards without plugging and unplugging the wires I made this diagram here: I was doing some research and saw these multiplexers. You can control them with high/low and so on but with multiplexers it says it can only have 1 output so not sure if it will work. That is how far I have gotten. I am at a road block so came here for some help. AI: You want a 2:1 multiplexer or demultiplexer or analog switch with 6 channels. It may be easier to use 2 "quad"/4 channel switches as those are plentiful. Just tie the enable/switch pins together. A pair of TS3A5018 modules would do nicely. (Image source: Ebay - "SPDT Development Board SPDT Analog Switch Replacement Multipurpose Accuracy For") (Image source: TI E2E Forum - TS3A5018: Can this device be used for PCIe reference clock 100MHz differential?) Obviously if you are making your own board you can source a 6 or 8 channel one from say TI or Onsemi or whatever brand semiconductor manufacturer has one. This is assuming you are switching simple signals and not power lines. Keep in mind any analog switch or multiplexer has limits on the power and bandwidth of the lines they are switching. Otherwise you may need mechanical relays or complicated transistor/mosfet circuits for high power switching.
H: Why are three inductors and one capacitor needed to bias this transisor (radio frequency)? Below is the circuit. I don't understand its purpose. AI: The inductors do not affect the DC "bias", the resistors do. The inductors are used to filter high frequencies, (RFC = Radio frequency chokes). The RFC inductors control the entry (or exit) of high frequency signals from certain points in the circuit. R1 an R2 form a DC voltage divider that biases the base of the transistor. Re helps to determine the DC emitter current, Rc helps to determine the DC voltage at the collector The capacitor does just what the caption says, "a bypassed emitter resistor". Higher frequency signals will pass through the capacitor and "bypass" the resistor Re.
H: What does INH as an IC pin label mean? While using a CAD model for a 74HC4051D multiplexer which I downloaded from SnapEDA I noticed that pin 6 is labelled INH rather than E bar (or Enable) as I anticipated from the datasheet. What does INH stand for? [] AI: They are representing that signal as active-high Inhibit (INH), which is logically equivalent to active-low Enable (EN#).
H: Does each IC need its own bypass capacitor when there are multiple ICs in the same circuit? I am working on a circuit to measure the current drain of six hobby servos for a robotics application. I'm aiming to use six ACS712 current sensor ICs. The ACS712 data sheet shows a typical application circuit diagram with 0.1uF (100nF) bypass capacitors. I am planning to scale up that design. My initial thought is to replicate the typical design six times as shown below, with the bypass capacitors placed on the PCB as close as possible to the ACS712 power pins. I am aware that the six parallel bypass capacitors combine to 600nF between the power rails. Some reading makes me hopeful I'm on the right track. Is six bypass capacitors as shown the right approach, or are more (or less) required? AI: Yes, each IC should have its own decoupling capacitor. There should also be some bulk capacitance if the power supply is not relatively close or already on the same PCB. Think of each capacitor as providing a low impedance high frequency bypass to ground for noise or current spikes generated by the devices. Hence you put them as close as possible with as small as possible a loop area between the positive and ground pins. Omitting one would mean that no such low impedance path existed and noise from one IC could negatively impact the others.
H: Help resoldering SMD capacitor I was cleaning my 1080 and installing new thermal pads when I accidently broke off a capacitor during disassembly. Does anyone have experience resoldering SMD capacitors on GPUs and if so what solder do you use and what type of hot tweezers work best?  In the picture I've attached you can see there is some copper showing so I think my best bet would be to remove the older solder with copper wicking, tin the copper contacts and then resolder the capacitor. Any advice for resoldering SMD components would be appreciated. AI: I would do it that way: get a chisel tip for your soldering iron. if it's adjustable, set it on about 350°C and wait until it's really hot, not just "hot enough to start melting solder". I would not remove the existing solder because it's already making a nice capacitor-sized bed that fits the part. put the capacitor in place and practice holding it down firmly but gently with a thin piece of wood or some strong thin cardboard with your non-dominant hand. Rotate the board so it feels comfortable. collect a blob of solder about 1 mm deep on the tip of the iron touch the solder to one side of the capacitor and hold it for up to 2 seconds. remove the iron, but keep holding the capacitor down another five seconds. repeat for the other side. You should not need to hold down the capacitor this time. Check for shorts. Be careful to not touch the neighbouring parts with the iron while doing this. And don't aim for perfection -- stop when the two solder joints look continuous, even if they're not the most beautiful shape or if the capacitor is a little tilted ;)
H: Voltage drop over open circuit I am still learning the basics of electronics and this confused me: I have a simple LED circuit like this (5V voltage source): The LED has a specified voltage drop of 3V, and is rated for currents of 20mA at maximum, so I put a 330Ω resistor in series. When I measure the voltage drop over the resistor and LED, I get 1.9V and 2.8V, respectively, and a current draw of 5.5mA which is within bounds of what I expected. Here is what confuses me: There is a switch in series after the LED, and when it is open, I measure a voltage drop of around 2.6V across it. The same reading is at 0V when the circuit is closed. How is this possible? How can there be a voltage drop over an open circuit when there is none when the circuit is closed? AI: The meter has some high resistance across its terminals (in the megaohm range for a DMM, about 10k to 50k for an analog meter type) so a slight current will flow through it, the LED and the resistor. While that tiny meter current doesn’t have any appreciable drop across the resistor, the LED still has its forward bias voltage drop even with that small current. However, note that the LED forward drop is less (just 2.4V) than when the switch is closed (2.8V) because the current is so much lower. There will be a knee point current where the forward drop will begin to fall rapidly; as the meter resistance approaches infinity, the diode forward drop goes to zero. Read more about diode I/V characteristics here: https://www.tutorialspoint.com/semiconductor_devices/semiconductor_devices_diode_characteristics.htm
H: Shouldn’t the Zener diode be not in active state here? I thought the Zener diode (break down voltage = 6V) will not be active here. That is it will not start acting as voltage regulator here since potential difference across 4 kΩ is 4 V if not in connected with diode in parallel. So after connecting in parallel it should still not be acting as 6 V, it will remain 4 V and current flowing through circuit will be 10/1000 = 0.01 A. 0.01A? (Answer given was using active state (10 - 6) V / 6 kΩ = 0.667 mA.) AI: You are correct except for ... and current flowing through circuit will be 10/1000 = 0.01 A. The resistance is 10 kΩ so \$ I = \frac {10}{10k} = 1 \ \text{mA}\$.
H: What PWM frequency should be used for a solid state relay (SSR) I am planning to use an SSR (see product here) to PID control the temperature of a heat bath. According to the SSR40-DA the response time is < 10ms so I would go for a PWM frequency that is well above, i.e. 10Hz or even 1Hz. Can an SSR be used continuously for years at a PWM frequency of 1-10Hz? AI: Most PWM controllers allow 1024 (10-bit) or 256 (8-bit) different levels. So, if you are using 1Hz update frequency and 1% duty cycle or less (10/1024) or (2/256), you'll be on for a period less, your switching may be a bit messed up. Even up to 10% duty cycle, a lot of your on cycle will be muffled by switching. Same for duty cycles above 90%. You could use software to avoid switching inside of these windows. I'd use even longer, like 0.1Hz and bit-bang the PWM if your microcontroller doesn't allow hardware PWM frequencies that low. Or just give up PWM and use some fuzzy logic in place of the PID. Temp control is pretty easy in thermostat mode (on/off). You can also estimate time to full power to make a 1°C change and integrate that into your fuzzy logic. Keep updating the controllers estimate of how long it take to make a 1°C change as water evaporates from the bath (or refilled).
H: PID controller for a heater using a Raspberry Pi, SSR and Python I would like to PID control the temperature of a water bath using a RaspberryPi4, a solid state relay (SSR) and a heater (200W, 230VAC) using Python. The IVMech library seems a good starting point. As well as Simple-PID I went for IVMech since I saw it quoted in other projects. I can control my actuator by pulling my SSR low one of the RPI-GPIO pins. Currently, I'm stuck with reducing the test_pid.py test code to the bare minimum required. Please see my code sample below. Is it fine to just use the output of the PID calculation as the time to turn the heating element on? In my case I don't want to cycle the ppwer so many times (sample time around 1-2s) since my application should last > 1year and I'm not sure if the SSR that uses a photodiode to for galvanic isolation can be cycled indefinitely. I read that the SSR supports around 100MIO cycles. For a switching frequency of 1Hz that would correspond to a lifetime of around 3years. import PID import time import numpy as np from scipy.interpolate import BSpline, make_interp_spline # Switched to BSpline import RPi.GPIO as GPIO GPIO.setmode(GPIO.BCM) HEATER = 17 GPIO.setup(HEATER,GPIO.OUT) P = 0.2 I = 0.0 D = 0.0 L = 0 sampletime = 2.0 def measure_Temp: temp = 20.0 return temp while True: pid = PID.PID(P, I, D) pid.SetPoint=25.0 pid.setSampleTime(sampletime) END = L feedback = measure_Temp() pid.update(feedback) output = pid.output GPIO.output(HEATER, False) time.sleep(output) GPIO.output(HEATER, True) AI: Sleeping for a duration proportional to the output isn't the best way. The controller is "blind" while sleeping and you may overshoot. To achieve what you want, simply sleep for 2 seconds after every measure / control cycle. Turn on the heater if the output is greater than 0, turn it off otherwise. If you require a particularly high regulation accuracy, I recommend reading up more on how to achieve that, it is not a trivial problem but it has been well-researched.
H: Ensuring full power from a battery I'm trying to put together a breadboard solution involving an 18650 cell (routed through a LiPo charging board) that powers both an ATTiny85 and two NeoPixel sticks. Two buttons trigger interrupts that sequentially light up or turn off the individual LEDs on the sticks. (I'm a software guy, that was the easy part!) Trouble is, if only one or two LEDs are on, all 16 LEDs go berserk, flashing various random colors and flickering. I measure the voltage at the GND and 5v pins going into the first stick and was surprised to see roughly 3.3v, not ~4.0v (which is what the battery supplies directly if I measure the voltage right on the battery terminals). On a whim I put the multimeter inline to measure the current and found that when it was flickering it was drawing nearly 100ma. I'm guessing that the boards aren't getting enough voltage and the laws of physics are compensating by drawing more current. It could also be my breadboard, potentially, because when I fiddle around with either the battery leads going into the power rails or with the data line, the flicker goes away and the current drops to something like 4ma (for just a single LED). video demonstrating the issue First question then - is that a plausible analysis of the problem (that the strip is flickering because of low voltage/high current)? The NeoPixel docs state that you can power a strip directly from a LiPo cell. (In addition to the docs I found I had to drop a small, like 100ohm or less, resistor directly on the ground line for the strip or all three diodes on each LED would turn on full brightness.) Second question if the first is plausible: is it possible that because the ATTiny85 outputs 3.3v and the strip is sharing a ground with the ATTiny, the strip is only receiving that 3.3v? Third question if the second is true: how can I ensure that the strips get the full 3.7+ volts from the battery rather than the 3.3v or less from the MCU? Is it simply a matter of breaking out a dedicated ground line from the battery right into the strip? Do I need to isolate just the ground or both the ground and positive signals? Edit - might have solved it I went back to some of the docs around using a Raspberry Pi which I thought might be helpful since it's another 3.3v system. Those docs recommended powering the Neos via 5v directly (though other docs on Adafruit's site say you can use a 3.7v LiPo and just have to work around the 3.3v data signal) and warn that very likely you can't just plug it in and have it run; you need either a 74AHCT125 level converter or a 1N4001 diode. I don't have any level converters laying around but I do have a few 1N4007s and so I ripped out all the resistors and put the diode on the battery+ line. Instant relief! As soon as the system gets power, the first pixel lights like it should with no flicker. I also went back and looked at the stick closer - they already supplied a 475ohm resistor right on the data line. If I put another resistor on the data line I ended up getting the same flickering happening on the first LED. So for now, I'm just using the diode on its own, with the power and ground running right from the battery before going anywhere else, and no extra resistors anywhere. So to the first question, I think the answer might be that the flickering was caused by the data signal voltage being out of range for the sticks unless most of the 16 were lit up enough to drop the voltage to the point where the data signal was back in range? The docs say it needs to be around \$0.7 * Vcc\$, and I imagine by adding the diode I lowered the voltage enough that the signal was more to the liking of the LEDs. Does that make sense? Am I thinking about this right? AI: I'll just address one point: you can't have a resistor on the ground line. This will seriously confuse the controllers in the LEDs by causing the LED ground to rise above microcontroller ground. This will also cause hiccuping as the LEDs starve themselves of voltage every time they draw current. I think this is what you're observing! Remove that resistor first, then debug your original problem. As an exercise, use Ohm's law to calculate the voltage across the LED strip + and - terminals when 50 mA is going through that 100 Ohm resistor :)
H: What happens when we increase the voltage beyond breakdown in a Zener diode? In the presence of a resistor, we can reason that the voltage difference between the given battery voltage and breakdown will be given to resistor. My question is without any other devices just only a battery whose voltage can increase or decrease connected to a Zener diode in reverse bias mode. What will happen if the voltage is increased above tgebreakdown limit? Where will the extra voltage drop go? Will the diode be damaged? AI: With no resistor, a voltage source and zener diode is an invalid circuit. There is no extra voltage drop, and the zener will break. Sometimes, if there is a fuse in the circuit, the zener could be used as an overvoltage protection device which breaks the fuse when voltage rises above zener voltage.
H: Transistor as a switch driven by a square wave I'm trying to understand how to use a transistor as a switch. I'm sure I am not doing this right. The input signal is a simple 30 kHz square wave, 3.3 V amplitude. There is a second gate signal which is also a square wave with 3.3 V amplitude. When the gate signal is HIGH (3.3 V), I want it to turn the transistor on and allow the input signal through. When the gate is LOW (0 V), I want it to shut the transistor off and not allow the input signal to pass. Here is my circuit: The first problem I see is that when the gate signal is HIGH, the output signal is distorted. It seems to spike to 3.3 V, then drop to 2.9 V for the duration of the ON cycle. Then when the gate signal is LOW, the output signal is chattering below zero volts: I am sure I am misunderstanding how transistors work. Just a note: When I select the default NPN transistor in LTspice, the circuit works 100% as intended. When I select any other transistor from the 'Pick New Transistor' menu, the circuit malfunctions as described. AI: The “default” LTspice transistor is idealized. Real ones aren’t that good :) Bipolar transistors are called “switches” but they are not literal switches like a toggle switch is – they are not mechanical contacts. Perhaps inadvertently, you have set up the transistor as a common-base switch, and that has a chance of working acceptably – you just need some load, the output can’t float. simulate this circuit – Schematic created using CircuitLab The component values do depend on the parameters of the transistor, and have to be adjusted in practice. It's not the best way to implement a switch, but it certainly works well enough to be useful for something. The general idea for common-base switches is having ample amplitude of base drive. Ideally, the base drive would be a current source. Below are the input, output and control waveforms of the circuit above. The control waveform's amplitude is scaled down 50% to make it fit better in the plot. The non-linear distortion is about 0.5%. The input, output and distortion residue waveforms are plotted below. The output isolation at 1kHz in the off state is beyond the fidelity of CircuitLab, presumably better than -70dB - this can depend a lot on the transistor used as well. Another way to achieve a switching action would be to short a high-impedance source. For example: simulate this circuit The output swings to 0V when it's turned off: The isolation when OFF is about -66dB, or about 1-in-2000. A more dependable way to implement a bipolar switch would be to convert the input signal to a current, then switch the current between two resistors, and take the output from one resistor only. simulate this circuit The switching action is clean: The distortion residuals are <0.1%: A practical realization of the switch circuit requires a voltage-current converter (V->I), and a source of bias currents, shown below. simulate this circuit The various currents are derived from a 100uA reference. The current mirror used is an improved 4-transistor Wilson mirror. The additional transistor buffers the base currents and allows paralleling of multiple current output stages in one mirror. An LM334 could generate the reference cut rent. Another option would be REF200, but it costs an order of magnitude more. The V->I converter uses a unipolar output op-amp to maintain 3V at the emitter of Q23. R8 loads the input voltage using 3V as the reference, converting it into current. The current passes through Q23. Perhaps there could be a cascode transistor behind Q23 to increase the accuracy without slowing down the response, but at 5V there’s not much voltage drop to work with – it’d need to be an inverted cascode. Q23 and the cascode, if any, would benefit from base current compensation, to improve gain accuracy. Q23 could also be a high transconductance low voltage mosfet. The current then gets subtracted from the 300uA reference, and enters the Q1-Q2 current steering pair. When the switch is turned on, Q2 conducts and passes the current through the output load resistor R5. The current steering could also be done by mosfets, bringing the gain back to 1.000 if combined with a mosfet Q23. The voltage gain of the switch is about 0.983. Both the input and output impedance are 10 kOhm. The switching action waveforms are below. Distortion is under 0.1%. As shown below, it is about 0.06% at 1kHz. OFF isolation at 1kHz is -90dB according to CircuitLab. In practice I'd expect -80dB at least with careful layout. Given the relatively high output impedance, the output would need a buffer stage. Lower distortion can be achieved by running the switch at a lower gain, say 0.2, and having the buffer stage add the gain back. The V->I converter could be done with an op-amp Howland current pump, but that would take good resistors and a good op-amp to be better than the discrete circuit. At 30kHz, you'd need an op-amp with GBW to 10MHz to maintain reasonable distortion, if you care about that. An op-amp could provide the gain and buffering of the switch output, of course. Getting a transistor acting as a good switch takes a bit of work by the surrounding circuitry :)
H: AC voltage and frequency as complex number? For some software I am writing, I coded classes of electrical systems that receive a voltage and return the current response. For the DC case that's easy: I pass a real number as argument, the voltage, and return another real number, the current. Now I need to extend this to the AC case and I need to pass the AC voltage and frequency and return the current and phase. I was thinking of using complex numbers for this. Is there any common representation of voltage and frequency as a complex number? I couldn't find anything. AI: Is there any common representation of voltage and frequency as a complex number? You shouldn't do this. First, as others have pointed out, complex numbers are often used to represent the magnitude and phase of AC voltage and current signals, so using a complex number to represent magnitude and frequency would be confusing. Second, you may find you want to find your circuit's response to voltage inputs with different phases (for example, if the input to this circuit is the output of another circuit), and then you will want to use a complex value (representing voltage and phase) for the input of your circuit. Third, if your circuit is linear (and if it isn't, you will have other problems with your approach), then the frequency of every voltage and current signal in the circuit is the same. So there's no point storing the frequency value over and over again for each variable in the circuit. Keep it in one variable that applies to the whole circuit. (Very likely you'll soon want to sweep this variable and get a different solution for a range of frequencies the circuit might be operated at). Fourth, there's no value in it. When we use complex numbers to represent magnitude and phase of signals, we can also use the rules of complex math (for example, when two complex numbers are multiplied, the phase of the result is equal to the sum of the phases of the operands). This allows us to extend the concept of resistance into the complex domain as impedance and treat inductors and capacitors very simply when analyzing linear AC circuits. There's no such benefit if we use a complex number to represent magnitude and frequency (indeed, we are left with the problem of how to represent the phase of our signal).
H: Is possible using SPI without SPI.h library with just using digitalWrite function? I was trying understanding how SPI protocol works. Basically they are just bunch of 1's and 0's serially for every its pins. I wonder if I can send and receive data from SPI slave device without using SPI.h library. The problem I need to consider is about SCK pin which it's about frequency and timing. How can I oscilate specify frequency in SCK pin? AI: I will try: You ask what is SPI? SPI (Serial Peripheral Interface) it is a synchronous communication bus standard. Data is synchronous to keep transfers short and fast. SPI communication is a master to slave configuration, where a single master can choose between one or more slaves via the CS chip Select function of the devices. Developed by Motorola around 1985. SPI, basically a synchronous shift register is simple to implementation and fast data transfer capability. Originally SPI was part of the hardware of the MC68HC05 and MC68HC11 families of microprocessors. This allowed inexpensive I/O expansion for use such as sensors, camera lens control, communications, and data storage on SD cards etc. This allowed simple logic ICs to be connected to the processor such as shift registers (serial in parallel out and parallel in serial out). Originally it was generally used for 8 bit devices which became a defector standard but it is not limited to such. There are four connections required. They are MISO (Master In Slave Out), MOSI (Master Out Slave In) CLK, and CS\ Chip Select. The default size of the shift registers is 8 bits (the HC05 and HC11 are 8 bitters) but there is no limit, it can be as many or as few a bits the user wants to implement. You have three pins on each device that are paralleled to all devices as a simple 3 wire bus. The forth wire CS or chip select is required on each of the slaves, the master has to select which slave it wants to communicate with. Therefore the master has to generate a CS for each part it communicates with. Communications is normally done but not required on a 1 to 1 basis. It is bi direction in the fact that each time a bit is clocked out a bit is also clocked in. Exact interface is defined b the polarity (CPOL) and Phase CPHA) of the clocks relationship to the data. Most of the material talking about SPI defines it as a 4 wire bus, that is not exactly true as the chip selects and configuration change that number. You can use only serial in parallel out or parallel in serial out and need one less line as you are using it as a single direction device. The primary connections are: First: SCLK: (Serial Clock) the signal which is always generated by the master. This clock synchronizes the data transfer. Its clock edge determines the actual data transfer. Second: MISO: (Master In Serial Out) This is the input to the master. The MOSI of the slave connects to this pin transferring date to the master; the slave’s shiftregister data out goes to this pin. Third: MOSI: (Master Out Serial In) This is the output from the master which would normally go to the data in pin on the shift register. Fourth: CS/SS: (Chip Select/Slave Select) this pin selects the slave it wants to talk to. There is only one data out from the master, it connects to the data in of all of the appropriate slaves. Conversely the data in to the master connects to all of the data outs of the slaves. This will form a bus contention which the CS resolves. It selects normally only one device, the others ignore all of the signals. Each slave needs a chip select, the master can use eternal logic such as a 74C138 to generate multiple slave selects minimizing the pin retirement on the master. CPOL: (Clock Polarity) This defines the initial clock state. CPHA: (Clock Phase) This defines the relationship between data and clock transitions. As originally defined by Motorola the clock transitions govern the shifting and sampling of data. SPI has four modes (0,1,2,3) that correspond to the four possible clocking modes. Communications starts when the slave-select line is driven low (slave select is typically an active-low signal). Note the relationship between the slave-select, data, and clock lines depends on how the clock polarity (CPOL) and clock phase (CPHA) are configured. Note: With non-inverted clock polarity (i.e., the clock is at logic low when slave select transitions to logic low): Mode 0: Clock phase is configured such that data is sampled on the rising edge of the clock pulse and shifted out on the falling edge of the clock pulse. Data including settling time must be available before the rising edge of the clock. Mode 1: Clock phase is configured such that data is sampled on the falling edge of the clock pulse and shifted out on the rising edge of the clock pulse. Note: With the inverted clock polarity (i.e. the clock is at logic high when slave select transitions to logic low): Mode 2: Clock phase is configured such that data is sampled on the falling edge of the clock pulse and shifted out on the rising edge of the clock pulse. Note: that data must be available before the first falling edge of the clock. Mode 3: Clock phase is configured such that data is sampled on the rising edge of the clock pulse and shifted out on the falling edge of the clock pulse.
H: How to compute component values for current-controlled 555-based oscillator? I am building a project where I plan to have a current controlled oscillator based on a 555. The oscillator is controlled using current source I1 (a current mirror) charging capacitor C2 in lieu of the usual charging resistor. The current provided by I1 varies depending on some other parts of the circuitry and is supposed to affect the frequency of oscillation at the 555's output. My questions are: Is this circuit correct and suitable for building a current controlled oscillator? I am also interested in better circuits if any. How can I compute the frequency and duty cycle depending on the current delivered by I1 and the values of R1 and C2? simulate this circuit – Schematic created using CircuitLab AI: Move R1 here so that I1 does not flow through R1 (and potentially C1 depending on chosen values)and influence the discharge. Then from \$Q=CV\$ and \$Q=IT\$ you can produce \$CV=IT\$ which becomes: \$t_{\textit{charge}} = \frac{C_2V_{2/3}}{I_1}\$ \$t_{\textit{discharge}} = R_1 C_2 \$ can be used for the discharge time as normal. From these two times you can get frequency and duty cycle: \$\textit{Duty} = \frac{t_{\textit{charge}}}{t_{\textit{charge}}+t_{\textit{discharge}}}\$ \$f = \frac{1}{t_{\textit{charge}}+t_{\textit{discharge}}}\$
H: how to calculate the output voltage of specific circuit using superposition law Hi, How to calculate the output voltage of the circuit is shown below. Using the superposition principle is the best or the one that you recommend. I'm using strain gauges based on the Wheatstone bridge, which brings me here. I calculated Thevenin resistive load and voltage source(302ohm, 0.7v). If I had Wheatstone bridge resistor values R1, R2, R3, R4, 350ohm, 350, 350, and 200, what is the voltage across a voltmeter? AI: Using the superposition principle is the best or the one that you recommend. Millman's theorem seems the most appropriate: - Image from here.
H: LTSpice voltage source understanding I came across this Short Video on Youtube by MicroType Engineering, link here. His simulation on LTSpice was the below: I tried the simulation on LTSpice myself. However I am curious as to what the voltage means. I entered the following values: Does this mean the voltage source is a DC voltage of 12V with a 1V AC ripple on it? AI: No. Your top plot is in the frequency domain and is called a frequency Bode plot. Notice the axes. X is frequency in decades, and Y is output voltage ( somewhere on top of C1) relative to 1V in decibels. That's calculated as:- $$ \text{dB} = 20 \log_{10} \big( \frac{V_{out}}{V_{in}} \big) $$ The 1V you entered into the small signal analysis box is the amplitude of a test signal applied across source V1. That's fed into the circuit, and the plot is the output frequency response. The 12V isn't used in a .ac analysis as the frequency of a DC voltage is 0 Hz. By entering specifically 1V as the test signal, the decibel calculation makes for real world sense as Spice assumes that the dB loss is relative to 1V. It's kinda a convention for such analysis and typically works. So as the frequency of the test signal increases, the amplitude of the output signal drops due to L1, R1 and C1 forming a low pass filter.
H: MAX31865AAP+ PT100 Excitation Current Problem I have a PT100 and I'm using MAX31865AAP+ for RTD-to-Digital Converter. But I have a problem and I don't understand why this is. I use 400R REF resistor for PT100 and the reference resistor current is almost 3mA. The reference resistor current also flows through the RTD. But, most excitation currents should be kept lower than 1 mA because of self heating. Because there is current running through the RTD, the RTD itself will dissipate power through heat. 3 is not suitable for me and I don't understand why MAX31865AAP+ giving 3mA and how can I solve this problem? AI: The MAX31865 can shut down the excitation bias current to the reference resistor (and RTD) during periods when the chip is not enabled thus, the average current into the RTD is very much lower than the 2.5 mA that you say is flowing. This means the self-heating of the RTD is also typically negligible. Of course, if you choose the have the MAX31865 chip-enabled all the time, then you should aim to use a higher value of reference resistor to keep the RTD current below the point where self-heating errors could be significant. I don't understand why MAX31865AAP+ giving 2.5mA The bias voltage is 2 volts and your reference resistor is 400 Ω hence the instantaneous current is typically 5 mA but, you are probably operating at a chip enable duty cycle of about 50% hence, you measure 2.5 mA. Try operating at an even lower duty cycle or, increase the reference resistor value to suit.
H: Operating above maximum characteristic supply voltage, but below absolute maximum voltage I'm using an Alliance parallel SRAM IC, and under the Electrical Characteristics table, it says VCC can be min 3.0 V, max 5.5 V. In the Absolute Maximum Characteristics table, it says terminal voltage must be no more than 7 V with respect to VSS (GND in my case). What happens when operating in the no-man's-land between 5.5 V and 7 V, say, around 6 V supply to VCC? AI: No one can tell for sure in general, except the manufacturer. Providing those two sets of values is industry standard. The rationale behind is that beyond absolute maximum ratings the manufacturer makes absolutely no guarantee about the device: it can break, it can malfunction, who knows! Its behavior also depends on how much you go beyond those max ratings. Below those values, but outside the normal operating conditions ("no-man's land") the manufacturer also makes no promise, except one: you can stay in "no-man's land" for as long as you want and when you return into normal operating range, the device will behave as specified. This means that the manufacturer guarantees that the device won't be damaged or degraded. However, be careful with that promise: that promise is made assuming the device is connected to almost nothing and the external world is "benevolent". If you drive the device in no-man's land and it starts acting weird, in a real scenario other devices connected to the misbehaving chip could in turn damage the device or other part of the circuit indirectly. For example, imagine a power supervisor chip driven outside its operating range. It could go a little crazy and mess up the power sequencing of a board, activating power lines in the wrong sequence. This could lead to PN-junctions turning on that never meant to be turned on, causing short circuits in the system. As another example, consider an opamp with supply lines slightly above the normal operating conditions (but not above the max). Maybe the offset voltage rises dramatically and this causes a major error in the output signal. Perhaps this opamp is part of a PID controller and because of that unexpected rise of offset voltage a motor goes out of control, making a robotic arm acting erratically. In both cases the fact that the device is not damaged when it is driven back into normal operating conditions is irrelevant, since the system has already been damaged by its crazy behavior. Bottom line: never design a circuit where in normal operation a device could be driven outside normal operating conditions. Pro tip Sometimes manufacturers are very conservative about what is specified in the publicly available datasheet. After all, testing a device for every possible condition is expensive, so corner cases are often neglected. By testing a device yourself you could determine that a device could be able to work reliably outside what is specified in the datasheet. In this case you could contact the manufacturer and ask for official confirmation of your findings and even ask for a better characterized device (at a cost, of course). However, even if you do in-house testing, never rely only on those. The results may be applicable only to the specific batch of devices you own, and a small process variation in manufacturing could make all your test results wrong for another batch. Always ask the manufacturer!
H: Power path sharing with LTC4416 I am struggling with the LTC4416 datasheet. My need is a 4-cell Li-Po battery (13.6..17.2V) used as the device battery and an optional external power supply (18..24V). When the external power is applied, it is used. Otherwise, the battery will be used. As I need to prevent external power to charge the battery and the battery voltage flow in the external power connector. I need to power path with MOSFETs. I found the LTC4416 which looks good. My application is clearly "V1 is Greater Than V2", but I don't understand the datasheet. Here is the application schema with the sentence that confuses me. As nE2 is shortened to GND, G2 will be always powered. So Q3 is useless. I think that I am misunderstanding how this IC works. G2 should be somehow disabled, but I don't understand how. V1 is the external power supply. V2 is the battery. The block diagram isn't that clear because the two "Analog Controller" take both EN1 and EN2. How is Q3 disabled when Q1 and Q2 are enabled? AI: As nE2 is shortened to GND, G2 will be always powered. That is incorrect. Page 5 of DS: - \$\overline{E2}\$ (Pin 4): LTC4416 Comparator Enable Input. A low signal less than VREF will enable the V2 path. The ideal diode action will then determine if the V2 path should turn on by controlling any PFET(s) connected to the G2 pin. "It" enables "the path" but, it only enables G2 if the other logic allows it. That other logic allows this to happen when the primary supply drops below 12 volts. If you look at your 2nd picture, EN1 has an input into the 2nd analogue controller and, if high, it will disable G2.
H: Non-rechargeable 9V battery with diode between 12V car battery I have a microcontroller which is powered by a car battery, voltage is stepped down to 3.3V using a voltage regulator. However if someone cuts the cord to the car battery the microcontroller has a local 9V battery inside its control box that is tied to the same header as the 12V battery. This can power the board for a few days.. Obviously I cannot directly connect the 9V battery+ terminal to the 12V+ terminal, and because I never want to use the 9V battery unless I have no access to the 12V I have opted for the following circuit. I am curious if this is dangerous though, I don't want to start any fires and this will be hooked up for months at a time.. AI: I have a microcontroller which is powered by a car battery, voltage is stepped down to 3.3V using a voltage regulator. If that is a linear regulator then, using PMEG3050 Schottky diodes on the 9 volt battery feed should/could be avoided i.e. swapped for a regular silicon diode. Schottky diodes ought to be avoided because of their leakage current because, there is a slight chance that the 12 volt can trickle several tens of mA into the 9 volt battery at higher ambient temperatures. This may by fine but it may also be problematic depending on the details in the data sheet for the 9 volt battery. Schottky diode leakage current graph: - I would also put the fuse on the 12 volts straight after J103 rather than after D103 as this minimizes the risk of any component failing (such as J102), shorting out and, causing a fire. In fact, I'd probably consider an in-line fuse from the battery before it connects into J103. This may also be necessary on the 9 volt line but, if it's one of those little PP3 batteries, it won't be necessary.
H: Chip antenna ANT161575ST-1202A1 layout question I am designing a GPS module using the following chip antenna: https://product.tdk.com/en/system/files?file=dam/doc/product/rf/rf/antenna/catalog/rf_ant_ant161575st-1202a1_summary_en.pdf The datasheet recommends routing the antenna like this: The long "L" shaped trace coming out of the antenna is connected to GND. What I don't understand is the vias. The datasheet says the antenna is to be placed over an area 5mm x 6mm with no copper beneath it. So what I don't understand is: Where are those vias going? How am I supposed to connect it to GND if I don't have any copper beneath it? Unfortunately the datasheet doesn't provide much info and I am a total noob at designing for RF. I am pretty sure all the other vias you see on the image are part of a large GND pour, which are surrounding the feed trace from the antenna. I guess that is to shield the feed trace? Any help anyone can give here to help me understand how to get this design right the first time would be greatly appreciated. AI: The L-shaped trace coming from the "Radiator Electrode" pad of the ANT161575ST should not be grounded. In fact, I'd consider that trace to be the antenna, and the chip itself to be mostly a matching network. The datasheet isn't great on details, but the VIAs suggest to me that there is an L-shaped trace on the PCB back that matches the L-shaped design on the front. The gray area is the "antenna keep-out" meaning no other traces or ground planes in that 6 x 5 mm area. I believe in their "Evaluation Board" the entire back side, except for the keep-out area, is to be copper pour used as a ground plane. Their antenna pattern measurements are only accurate for an 80 x 10 x 1 mm PCB. If your PCB has a different profile, expect the pattern to change, but if it's at least a quarter-wavelength long (about 50 mm) your antenna should work acceptably but with reduced efficiency.
H: Wire resistivity / heat generation How to calculate the volts/amps of a battery which is connected to a simple wire for heat generation? That is, how to use: known wire length, diameter/area, resistivity to calculate the required volts/amps to heat the wire to 30 degrees Celsius? the surrounding medium is air, the ambient temperature is 10 degrees Celsius. There is no movement of air. The wire is more or less in a straight line. The wire is not insulated. AI: Step 1 is to figure out how much power the wire will dissipate when it is at 30 C. That is not electrical engineering. It is thermal engineering. It depends very critically on the ambient temperature and airflow conditions. So I am not going to explain how to do that. You have to figure it out some other way. But I will caution you that any change in airflow or ambient temperature will lead to a change in the required power. So if you need to maintain the wire at 30 C, you probably need to use temperature sensing and feedback rather than a fixed voltage and current. Let's assume you have solved for 'Pdis', the power dissipation of the wire. You can calculate the resistance of the wire as follows: R = rho * L / A where R is the resistance of the wire, rho is the resistivity of the wire material (in Ohm-meters) L is the length of the wire (in meters), and A is the cross sectional area of the wire (in square meters). Please note that for many conductors, rho is very sensitive to temperature (4% increase every 10 degrees). So if you are using copper or aluminum or steel or stainless steel, you may need to allow for this by using the corrected rho. Now we have Pdis and R. The easiest thing to do is solve for voltage first. Start with the formula for power dissipation: Pdis = V2 / R Solve for V. V = sqrt(Pdis * R) That is the voltage needed to keep your wire at the desired temperature. If you want to solve for current, you can just use Ohm's law, re-arranged to solve for current: I = V / R
H: Working on breadboard but not on PCB I want to check what's going wrong. The circuit controls fan speed, based on temperature, with an Arduino Nano. First, I've created te following circuit: Gate resistor: 1K Mosfet pulldown resistor: 47K Then I noticed I actually created a voltage divider (R2 and R3) that's messing with the Mosfet's Gate. So I tried to 'solve' it by "hacky" soldering (notice connection between R2 and R3): Problem: But the Mosfet doesn't behave like the on the breadboard. More drawings of PCB; PCB front: PCB bottom: I am not sure what's wrong: Did my "hacky" soldering not work out? Did the soldering break the MOSFET? Something else? I assume the circuit drawing should be like this (revised): (but I don't know at this point) Can someone help me getting on the right track? Is my assumption correct? AI: Yes you have it. D1 is correct on both drawings. D1 is not needed with the MOSFET you picked, it is an avalanche rated device. On the second drawing try using a 50K for R3 and a 27 Ohm for R2. Even though it is a logic level device it needs just shy of 9V Vgs to be fully enhanced to achieve the lowest RDSon at temperature. At 4V Vgs it will switch over 50A. Looking at the SOA of the MOSFET and some rough assumptions of circuit impedance it should support that capacitance as the surge is a pulse. If you are using the PWM capability of pin 9, which I think you are, you need to lose the capacitors, maybe one small one to control noise. From what I can see the soldering looks good. If you have a noise or control problem with the fan you need a different fan. I used the IR PD-94831 data sheet for a reference.
H: 2-bit charge redistribution DAC output So here is the circuit: And here is the output: I presume answer c) is the output when there's a transition from phase 1 to phase 2. What about the transition from phase 2 to phase 1? Vout will be equal to 0 because of the non inverting input being a virtual ground, why is this case ignored? 0 is being sampled, that makes non sense in a dac AI: What about the transition from phase 2 to phase 1? Vout will be equal to 0 because of the non inverting input being a virtual ground, why is this case ignored? 0 is being sampled, that makes non sense in a dac. You are correct about returning to zero during this phase. This might seem like non-sense, but as you progress on sampled data systems, you will find it's quite common to have return to zero data format like this. As an example, in a pipeline ADC, the multiplying DAC is often return to zero, and the system alternates on half phases of the sample clock. So only half the DAC output is necessary each half cycle. You can force the output to be held by adding a switch at the output.
H: What is the correct approach to creating library of similar parts? When coming to components like LEDs, resistors, capacitors e.t.c there are throngs of manufacturers and suppliers that provide parts that are very similar from PCB design perspective i.e the schematic symbol and footprint. What approach then does one take when designing parts libraries? Lets take an example, lets say I have a 0805 SMD resistor. Its schematic symbol will be the same regardless of the actual resistor resistance value. There are throngs of manufacturers that manufacture this type of resistor and the physical dimensions of the part and the pad to solder it onto, are going to be almost identical or be so similar that a single footprint can be used for all the parts regardless of who manufactures it. Now from library design perspective, do we create a different schematic symbol for each manufacturer part number which can change based on the value of resistance and then also create a whole lot of foot prints to match the dimensions of every single manufacturer, or take a simpler approach? If so, what is the simpler approach going to be? Here are some LEDs that I need to put into my Altium library for the project. They are all in 1206 package. How do I go about creating the library for these? inolux LED AMBER CLEAR 1206 SMD (IN-S126ATA) LED GREEN CLEAR 1206 SMD (IN-S126ATG) LED RED CLEAR 1206 SMD (IN-S126ATR) visual-communications-company-vcc LED GREEN DIFFUSED 1206 SMD (CMD15-21VGD-TR8) LED RED CLEAR 1206 SMD (CMD11-21VRC-TR8) LED YELLOW DIFFUSED 1206 SMD (CMD15-21VYD-TR8) lumex-opto-components-inc LED RED CLEAR 1206 SMD (SML-LX1206SIC-TR) LED GREEN CLEAR 1206 SMD (SML-LX1206GC-TR) (specs) bivar-inc LED YELLOW CLEAR 1206 SMD (SM1206NYC-IL) LED GREEN CLEAR 1206 SMD (SM1206GC-IL) AI: The answer to this question comes down to personal preference, so I am not sure how good of a question it is for this board. That being said, I am aware of at least a few approaches in industry. At some companies the libraries are completely generic and the library only contains components such as "RESISTOR 0402". It is then up to the designer to populate the parameter fields with information such as value, tolerance, part number, etc. One potential issue here is that the designer has to spend time finding an appropriate part number and populating the parameters. Alternatively, some companies have library components for specific combinations of parameters, but still do not specify the final part number. For example "RESISTOR 0402 4.7k 1% 1/4 W". There are, of course, many part numbers that satisfy those parameters but there is enough detail to defer the effort of actually selecting the final part number to another team. In this case, the designer has to do less work. Finally, I have also seen discrete parts for every unique part number. This has the most up-front cost but requires no additional effort once the parts have been entered into the library. For hobbyists or individual users, I would recommend one of the first two solutions. You will save a lot of time entering new components that you will likely never use again. EDIT: Just saw the edit to the original question. Of course, this is only a suggestion, but if I were you I would probably separate the library components by landing pattern and color, but not necessarily by part number or manufacturer. For example, I would probably make: LED SMD 1206 RED LED SMD 1206 YELLOW LED SMD 1206 GREEN etc... You can optionally also add components to differentiate between clear/diffused
H: What does location actually mean in the Altium part providers preferences? Please see the option inside the red box: I am unable to find what exactly is meant by "Location" for a part. Is this: Location of manufacture Location where it is stocked Create by an organisation that is head office in that country Something else ... ? And why is this relevant here? AI: Defining Part Provider Preferences for Altium Designer According to Altium, "Part Provider" describes suppliers such as Mouser, Digi-Key, etc... So the location seems to describe the country in which the provider is located. I don't think it has anything to do with where the component is manufactured, since this can vary even for a single part. If you are located in country X you may want to only buy from suppliers located in country X, since the shipping costs and lead times may be longer for suppliers in other countries...
H: Ferrite bead selection and simulations for a 2.4 GHz ESP32 3V3 power line I want to be able to filter the 3V3 power line going out of the ESP32 MCU. Since this "may" have a frequency around 2.4GHz (Wifi or Bluetooth antenna). This may then affect other components that also need the 3V3 power from the same net. I have implemented the below circuit thus far: I then simulated this on LTSpice: I first choose a general ferrite bead with the below specs: The results of the simulation are below: My questions: Am I using the correct approach to simulate the ferrite bead? From the results the attenuation is not sufficient, is there a way to calculate the values for the inductance, capacitance, and resistance so I can manually enter these values for the ferrite bead? Edit 1: I realized the frequency to attenuate was 2.4GHz and not 2.4MHz Here is the simulation with the 2.4GHz frequency. This Ferrite bead seems to be doing the job (I just need to confirm the current). Edit 2: Simulation results with modeling the capacitor with ESR and series inductance. Edit 3: Capacitors used: 22pF:C0201C220K8GACTU (ESR=0.149, ESL=28.1p) 0.1uF: C1206C104J3GACTU (ESR=0.0089, ESL=19.8p) 1uF: C1206C105K3RACTU (ESR=0.0124, ESL=0.3p) AI: I want to be able to filter the 3V3 power line going out of the ESP32 MCU Well, it seems to me that you have your ferrite bead in the wrong position; it should either be to the right of the 3 parallel capacitors or, form a Pi filter with another set of 3 capacitors to the far left. If forming a Pi filter then it works bidirectionally of course. But also, you didn't run the AC response up to and beyond 2.4 GHz to see the effect of the ferrite bead (a limited effect I might point out): - Simulated circuit: - Whether the effect of the dip brings anything to the party I very much doubt. It seems to me that with the capacitors you have, the attenuation would be about 120 dB anyway. However, if you need a better answer, you should model the capacitors including their self-inductance and resistance. You should also watch out for strong (and undesirable) resonance effects in the low to mid MHz. You should also model the effective loading on the lines in terms of resistance because this will affect the Q factor of resonant peaks (possibly causing device over-stress and maybe failure).
H: Why does it take 4-5 hours to charge a small hearing aid? Can a larger NFC coil shorten charging time? Oticon makes hearing aids with wireless charging. For one of their models they use a size 13 Lithium-ion battery which corresponds to 270-320mAh. They claim that it takes 4-5 hours to charge this battery using an NFC coil. A quick Google search on Lithium-ion charging time yields: It takes approximately 150 minutes to charge a new li-ion battery to 100% 1,400mAh. I'm not sure about the validity of this source but the difference in charging time is large. Why does it take so long to charge a small hearing aid? Question: Are there things that I could do to achieve faster charging rates. Would it be possible for me to design a faster charger? Would a larger NFC coil yield a faster charging time for the battery inside the hearing aid? Is there any other way to speed up the charging time. Would contact charging be the best way to go? AI: It is a design decision. In the product specification phase, they literally put down on “paper” a full charge time. It’s arbitrary, but you have to choose a number, and shorter isn’t always better for various reasons. Faster charging puts more stress on the power path, produces more heat in a product intended to be very small, with very limited heat dissipation capability, decreases battery life due to higher charge temperature and faster rate of reactions that degrade the cell, increases the weight and size of a product intended to be miniature, adds BOM pressures that may limit part availability, etc. In other words: someone decided it to be so not because they couldn’t make charging faster, but because it likely wouldn’t make a better product overall. We have to remember that a lot of product specifications are not limited because the engineers couldn’t reach a better number. Engineers are usually thrilled if given a chance to “improve the numbers”. I’m almost sure the team putting the product together could have made a hearing aid just a bit larger and heavier but with vastly better “numbers”. Engineers like the “no holds barred, we have to get to the Moon” projects. Except the product would be unaffordable, the company would go out of business, and they’d have to go job hunting. Engineers would rather engineer than job hunt. Ergo, they stick to the trade off and keep the job :)
H: Placement of a decoupling capacitor I am using the CD4046, and trying to put a decoupling capacitor on it. However, the power pin is on the literal opposite side of the power pin, like so. As you can see, I have a decoupling capacitor, that is meant to connect the ground pin (VSS, pin 8) with the power pin (VDD, pin 16). I was wondering whether I could do this. Per my understanding, decoupling capacitors work by isolating parts of the circuit from noise of power. So far, I think this would work because the capacitors would still charge and discharge under power disruptions. Please let me know if more info is needed, or if the answer is glaringly obvious. Edit: I am using a 4-layer PCB with a designated ground plane. AI: Putting a capacitor with both ends connected to ground does nothing, the capacitor is shorted out. Is this a two or a four layer board? For two layer, a common thing to do is to put the capacitor on the backside halfway between the pins or to put it along the top next to the VDD and run a trace under the chip (all on one side). For four layer with a ground plane under the chip, just put it next to the VDD pin with a via to the ground plane. Since this chip only has one power pin, and is an ancient through-hole part, it probably is ok with any of these options and does not require extremely low impedance decoupling.
H: What does the circle with the “X” and the cross mean? I am taking a look at a DSP block for a the Xilinx ZCU111 FPGA and I am getting held up on a simple question. I come from physics so I am not too used to looking at block diagrams yet, but what do the highlighted components in the block indicate within the fine mixer? AI: They are mixers and summing amplifiers. (Image source: Microwave Journal - Complex RF Mixers, Zero IF Architecture, and Advanced Algorithms: The Black Magic in Next-Generation SDR Transceivers, Figure 3. Basic architecture of a complex transmitter)
H: Drawing a very simple component in KiCad without the model I am designing a PCB in KiCad that includes the 328ST160 and 328SR160 transducer pair. I have been unable to find a PCB symbol for the two. The physical component I have is just two pins, like so: I was wondering whether I could just draw a resistor on the PCB schematic editor, like so, and then edit the size of the resistor pins, or whether there's something in KiCad I missed that would make this approach invalid. AI: While it is a good idea to get used to making your own symbols, for generic things like transducers that usually isn't necessary because KiCad comes with a lot of included symbols: In this case, using the stock "Speaker_Ultrasound" as the symbol would probably make it more clear than something you drew yourself.
H: Calculating optimal resistor values for an ATtiny84A circuit and NPN transistor vs MOSFET I am starting my first project in electronics and I am having a hard time understanding the information available in the 84A's datasheet (pg. 179, Electrical Characteristics) While drawing the schematic to my project I've not really been able to understand how to calculate the various resistor values for a couple of different situations. A side, but very important question: is the output current on a pin only defined by what's "ahead" of it? Can I "hurt" the MCU if too much current is being drawn due to low resistor value with a LED like the image below? With the exception of calculating the resistor for LED case (2V drop and 12.5mA) I don't really know how to approach the remaining ones. Resistors before input pins Online, I've seen people using (with 5V supplies) between 4.7k to 10k Ohms in series with the pushbutton connected to the MCU pin but why? If the pull up is activated isn't already a 50k Ohm resistor in series? Adding a 10k one wouldn't just up the total resistance to 60k? Resistors for NPN transistor use How do I chose the values for my base and collector resistors having in consideration current consumption? Are there guidelines to find a balance? Should I use a MOSFET instead of the NPN transistor? AI: There are a few things to address here: You seem to have a misunderstanding about current flow, evidenced by asking things like "what's ahead of the pin" and "resistors before pins." Imagine you have a battery, a resistor, and an LED. It does not matter if the resistor is on the positive or negative side; it will limit current either way. Electrical current only flows when a complete circuit exists, so it is better to refer to the position of components relative to others using positive/negative, or in this case, source/sink. If the microcontroller is more positive than the thing being driven (the LED), then the pin of the microcontroller is said to be sourcing current. The resistor could be between the MCU and LED, or between the LED and ground, and it does not matter. Conversely, if the LED and resistor were connected to positive voltage and the microcontroller providing the path to ground, then it would be sinking current. Again, the serial position of resistor and LED do not matter. Components can be damaged when too much current or voltage is applied. (These are intrinsically linked: voltage causes current to flow, and current creates heat which damages materials). The absolute maximum ratings section of the datasheet shows: What this is telling you is that on any input/output (I/O) pin, a maximum of 40 mA is possible before damage may occur. Equally important, the total current may not exceed 200 mA. It's a little confusing how they've written it here, by describing it as "VCC and GND Pins" but it effectively means in total. Thus if you have six pins each operating at 40 mA, resulting in a combined 240 mA total, you will be exceeding the microcontroller rating. Now that you know the current limitations of the MCU, you have some guidelines for selecting remaining components. Driving the LED with an MCU pin depends on: The supply voltage The maximum current the microcontroller can sink or source The forward voltage drop of the LED The maximum current of the LED How bright you want the LED to be Values chosen will have to fall within the constraints of the above limitations. Your supply voltage is 5 V, the maximum current sourced by the MCU is 40 mA. I don't know the characteristics of the LED, but you've alluded to it with a 2 volt drop. (Red and green LEDs typically have a ~2 VF while blue and white are often ~3+.) If you are supplying 5 V and the LED forward voltage is 2 V, then you'll have 3 V remaining across the resistor. If you wish to limit the current to 12.5 mA, you use Ohm's Law to calculate the resistor value (R = E/I, 3/0.0125 = 240 Ω). As you can see, you've correctly calculated the resistor value for your current-limiting resistor on PB0. You shouldn't consider the 240 Ω resistor to be a "low" value; "low" and "high" are relative. Consider this: with a 2 VF LED, a 5 V supply, and 20 mA limit on the LED (yes, less than the MCU pin maximum), 240 Ω is practically a "middle" value. 150 Ω could be used for 20 mA, while 3 kΩ could be used for 1 mA. In other words, maybe you are comparing the 240 Ω resistor value to other, larger values used in the circuit, and thinking that it is too low by comparison. However, that comparison should not be made because the resistors are doing different jobs with different components. Now we finally get to your question #1. You didn't provide a schematic of the example you gave, but I'll presume it is roughly: simulate this circuit – Schematic created using CircuitLab You wrote: If the pull up is activated isn't already a 50k Ohm resistor in series? Adding a 10k one wouldn't just up the total resistance to 60k? When you configure an MCU pin to be an input, you can specify if it should be pulled high or not; here's the relevant text from the datasheet (§10.1.1): The DDxn bit in the DDRx Register selects the direction of this pin. If DDxn is written logic one, Pxn is configured as an output pin. If DDxn is written logic zero, Pxn is configured as an input pin. If PORTxn is written logic one when the pin is configured as an input pin, the pull-up resistor is activated. To switch the pull-up resistor off, PORTxn has to be written logic zero or the pin has to be configured as an output pin. The internal pull-up resistor is between 20 and 50 kΩ (according to the datasheet), so you are correct in that adding an additional external resistor simply increases the resistance to the sum. However, consider what happens when you accidentally configure the pin as an output pin and connect it to VCC, even temporarily. Without the external resistor, you would have a short circuit and the resulting current would release the magic smoke in your MCU. Also consider cases such as what is the default state of pins before you program the MCU? Or when a bug occurs and changes pin states unpredictably? Your question #2: How do I chose the values for my base and collector resistors having in consideration current consumption? Are there guidelines to find a balance? BJT NPN transistors work by having a current from base to emitter. There is far more detail than I can possibly cover here, so you should research transistor operation. Essentially you need to provide a small current (from base to emitter) in order for the transistor to pass a larger current (from collector to emitter). The "guidelines" are going to depend again on supply voltage, microcontroller limitations, the current you wish to switch, and the specifications of the transistor. With a 50 kΩ resistor, and treating the transistor BE junction as having a 0.7 V drop, you should expect roughly (4.3 / 50k) 86 µA. DC current gain of a BC337 is somewhere between 100 and 630, so optimistically that would work out to pass a CE current of 54 mA. Skipping to your last question: Should I use a MOSFET instead of the NPN transistor? Perhaps, depending on what you're trying to do. A MOSFET may be much simpler to implement if all you want to do is switch a relay on and off. But it's not clear what you're trying to do from your schematic, which I'll address in the last part of this monstrous answer... Looking at your schematic, let's examine what's happening with R8, D2, and K1. (As Marla pointed out in comments, D2 is backward from what you probably want.) Consider 5 volts applied at R8; ignore the connection to Q1. Current then flows both to D2 and K1's coil to ground. The diode is forward-biased (meaning its anode is more positive than its cathode) and conducts, but has a forward voltage drop of ~0.7 V. The coil of K1 will have some resistance, let's say 178 Ω (based on a random relay datasheet). Very roughly, this means about 2.8 mA of current flows through the diode while 3.5 mA flows through the relay coil. (I just quickly simulated this using Falstad to get these values.) Whether that's enough current to operate the relay is not important; what I'm trying to show is that as-depicted, the relay will have some current flowing all the time. When the transistor is switched on, it provides a third path to ground which will do little more than draw additional current from the power supply and not affect the relay at all (unless the power supply can't deliver current, and... that's well beyond the scope of this answer). Without making this answer even longer, I recommend you research how to drive a relay with a microcontroller. In particular, also research freewheeling or flyback diodes, because that's what D2 is probably meant to be. I would expect you probably want something like this: simulate this circuit Hopefully this helps to clarify some of the things you're asking about and some of the concepts you're confused about. Here is a collection of other questions that may interest or help you as well: When is a MOSFET more appropriate as a switch than a BJT? Selecting a MOSFET for driving load from logic Which resistor for NPN transistor base? How does the current know how much to flow, before having seen the resistor? Why drive a relay with a transistor switch? Does a BJT controlled relay need protection diodes? Why is there a diode connected in parallel to a relay coil?
H: How to control a 12V relay from variable voltage source of a LED? I'm new to electronics and need your help. I have retrofitted a Chromecast to my car and have powered it using a cigarette lighter power adapter to USB. Currently the power adapter is hidden and powered from the cigarette lighter power source itself - hardwired. It takes about 1+ minute for the Chromecast to power up after I switch the key to 1st position. I would like to power it up somehow prior to turning the key to 1st position. The vehicle is a MY2015 Mercedes W222 and has ambient lighting which always lights up once I unlock it. It is controlled by the SAM Module which gets a wake up signal from the electronic ignition switch. simulate this circuit – Schematic created using CircuitLab I was wondering if I can use it somehow to power a 12V relay which will supply power to the adapter before I enter the vehicle - this way it will be ready to cast once I'm in or at least faster. Today I measured up the voltage at one of the ambient lighting lamps, which has 3 wires for the LEDs and one common GND. The ambient lighting can be any one of 6 different colors, so the voltage to the LEDs will be different in every color. Today I measured it in one color and one of the LEDs had 9V and other had less than 3V. I know there are 9V, 5V and 3V relays, but I'm not sure what will happen if I connect a 3V relay and all of a sudden there are 9V because the color has changed. It would be great if somebody here has an idea how I can use the LEDs as a power source (not consuming energy in standby) so that I can power a 12V relay with them and use it to power the Chromecast power adapter. Another important thing is that the cables to the led are pretty thin - as per the wiring diagram of the vehicle - 0,18mm^2. There are a couple of lamps connected to one splitter, and between the splitter and the control module the cables are a bit thicker - 0,35mm^2. I don't know how much amps are going through these wires too. I have amper clamps but I'm not sure if they will capture the low LED consumption. Also, this "prestart" circuit should leave the job to the cigarette lighter power source, once the key is in 1st position, so that the relay don't stay energized on a long trip. AI: You could try something like that: D1,D2 take some power, either from the LED lamps or from the cigarette lighter. If you want more inputs, add more diodes. R2,C1 form a lowpass filter to get rid of the PWM that will probably be used to dim the LEDs, and turn that into DC. Q1 flips the polarity to drive the MOSFET X1, turning it on, and it powers the DC-DC converter that feeds the chromecast. D3 is a 12V zener to protect the MOSFET gate in case of transient overvoltage on the 12V line. With a MOSFET, there's no need for a relay, this will consume about 0.5mA as base current for Q1 when it's on, and zero when it's off. The MOSFET should be a PMOS, say 40V Vds, with suitably low RdsON, depending on how much current the load draws. Basically, set the search criteria to 40V, RdsON<0.1 ohm, easy to solder package, and sort by price. Do not forget the fuse
H: What does "M" value mean for ceramic capacitors like: 226M 473M 107M? For example: 22uF 16V 226M 47uF 10V 476K What does this last specification mean? AI: what means that M value for ceramic capacitors like: 226M 473M 107M This might help: - Image from here. Or maybe this: - Image from here.
H: Correct connection to F3 type battery terminals Looking for deep-cycle lead acid batteries, I come across several models which feature what they call an "F3" type terminal, like this: Basically a vertical metal tab with a hole in it. I suppose I could use a faston ring connector, like this: And then secure the ring to the metal tab by using the appropriate nut and bolt (in this particular case, M5). I have a couple of questions regarding it: Are washers needed in this application? Is the material of the bolt important, or regular steel will do the job fine? Is it ok to connect two rings to the same terminal, for the purpose of connecting multiple batteries in series or in parallel? AI: The general outline of that ring-terminal-shaped-object is good, but for higher currents and more reliability if there is vibration etc. you might want a brazed or seamless barrel construction, perhaps of copper. You can add shrink tubing to insulate the barrel. It's not a "Faston"(tm) by the way, those are spade terminals. Image from Grainger.ca I would do: Nut->lockwasher->flat washer (optional)-> Lug -> terminal -> bolt and torque to recommended for the bolt you are using. Two or three terminals together are fine. Material of the bolt is unimportant, just strength, you can use stainless steel to avoid rust.
H: For a mathematical operation in CPU, could power consumption depend on the operands? Obviously, the number of operations affect a CPU's power consumption, but does it solely depend on the operations themselves? For example, adding 0 and 1 involves setting one single bit, but adding 0xFF and 1 requires clearing 8 bits and setting one bit. This might be evident in a simple adder circuit with e.g. a 74283 IC, but does the same logic apply to a more complicated CPU? For example, if I was given a task to roughly estimate the power-consumption of an embedded microcontroller for a number of integer adding/subtracting operations, do I need to take into account which numbers may be involved? AI: In general, power consumption in a modern CMOS CPU is dependent on the number of signals changing state (that is, dynamic power) plus leakage (static power). Dynamic power thus varies based on the operands being processed and the operation being applied to them, as these influence the number of signal toggles. A machine with a parallel multiplier is going to activate a lot of signals to perform that operation, more so than an add/subtract, and both in turn more than logic op or move instructions. Your intuition is correct about the operands themselves: certain combinations with certain operations will cause a lot of toggles, which use more power than others.
H: What kind of wire terminator is this for computer power supply fan? Trying to determine the style of wire-terminator used here so I can buy a few. What is this called? It's on the wires for a three-wire fan used in a desktop's power supply. AI: Molex KK 254 Crimp Terminals :) Molex Link Digi-Key Link #1 Digi-Key Link #2
H: Interfacing LCD via SPI Problem: I am trying to figure out how to interface an LCD via SPI. What is known: It is 80x32 dot matrix. There are 23 pins on a flex cable. The pinout. I'll put it below. The LCD is marked with red on image. I've been told that the controller is sbn1661g. LCD is from Motorola advisor pager, but I want to use it with esp8266. Any suggestions and critique counts since I am not a professional. Thanks a lot. LCD pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SPEAKER ON DISP_A0 DISP_E1 DISP_E2 DB 0 DB 1 DB 2 DB 3 DB 4 DB 5 DB 6 DB 7 VDD V5 V3 V2 V4 V1 BACKPLANE AI: The LCD has no SPI compatible interface to connect to. Consider a GPIO expander with SPI or I2C bus to interface it, or maybe something more basic like serial to parallel shift register.
H: Finding the electric field due to a "point" dipole in different locations I'm currently taking a course in Electrical fields and circuits and came across this example problem from the course book. I am having trouble figuring out how to solve it. Below you will find my attempt. From the textbook about point-dipoles An interesting result occurs if we take the dipole to be “very small.” Here we mean that the dipole has a spatial size, l, that is negligible compared with the distance r to the point P where the field of the dipole is observed. Source My attempt: I will be using the following formula to solve the sub-questions a-e. According to my textbook, the electric field due to a "point" dipole is given by $$\bar{E}(\bar{r})=k_{e}\left[\frac{(3\bar{r} \cdot \bar{p})\bar{r}}{r^5} - \frac{\bar{p}}{r^3}\right]. $$ a. Along the positive x-axis, $$\bar{r} = \text{unit vector }\hat{x}$$ $$\bar{p} = p_{0}\hat{y}$$ $$r=0.01 \text{ m}$$ $$ \bar{E}(\bar{r}) = k_{e}\left[\frac{(3\bar{x} \cdot \bar{p})\bar{x}}{r^5} - \frac{\bar{p}}{r^3}\right] = k_{e}\left[\frac{(3p_{0} \cdot \hat{x}\hat{y})\hat{x}}{r^5} - \frac{p_{0}\hat{y}}{r^3}\right] \stackrel{\hat{x}\hat{y}=0}{=} k_{e}\left[-\frac{10^{-15}}{0.01^3} \right] = -9\hat{y}\text{ N/C}.$$ So far, so good according to the key I have available. Our answers match up. Doing the same for c. yields the same result as above and also matches with the key. Though, when I try to do the same process for b. and d. something goes wrong and I get a completely different answer than the key. b. Along the positive y-axis, $$\bar{r} = \text{unit vector } \hat{y} $$ $$\bar{p} \text{ and } r \text{ are the same as before.}$$ $$ \bar{E}(\bar{r}) = k_{e}\left[\frac{(3\bar{y} \cdot \bar{p})\bar{y}}{r^5} - \frac{\bar{p}}{r^3}\right] = k_{e}\left[\frac{(3p_{0} \cdot \hat{y}\hat{y})\hat{y}}{r^5} - \frac{p_{0}\hat{y}}{r^3}\right] \stackrel{\hat{y}\hat{y}=1}{=} k_{e}\left[\frac{3p_{0}\hat{y}}{r^5} - \frac{p_{0}\hat{y}}{r^3}\right] = k_{e}\left(\frac{3p_{0}}{r^5} - \frac{p_{0}}{r^3}\right)\hat{y} = 269691\hat{y}\text{ N/C} $$ This is completely incorrect, the key says it should be $$18\hat{y}\text{ N/C}$$ and it's the same for d.. Where am I going wrong? d. I've tried doing the same process above but with $$\bar{r} = cos(45^{\circ})\hat{x} + sin(45^{\circ})\hat{y}$$ but I end up with the incorrect answer. EDIT 1: I have been trying to figure out how the formula I am using above actually works by trying to derive it but I can't seem to do it. In the textbook the following drawing is presented and give a short explanation as to where the formula of the Electric Field Due to a Dipole comes from from which they then show the formula for Electric Field due to a "Point" Dipole. Say we have a dipole and we want to know the electric field due to the dipole at some arbitrary point P around the dipole. The electric field due to a charge is given by $$ \bar{E}(\bar{r}) = \frac{k_{e}Q}{R^2}\hat{R},\text{ where } \hat{R}=\frac{\bar{R}}{R} $$ The position vector from the origin to the point where we wish to know the field we define as $$ \bar{r} = \bar{r}_{Q} + \bar{R}$$ The electric field due to the dipole at some point of interest from the dipole is given by the sum of the individual contributions from the charges, that is $$ \bar{E}(\bar{r}) = \bar{E}_{+} + \bar{E}_{-} $$ The displacement vector for the positive charge according to above definitions is $$ \bar{R} = \bar{r} + \bar{r}_{q_{+}} $$ and as such the electric field due to the positive charge is $$ \bar{E}_{+}(\bar{r}) = \frac{k_{e}q_{+}}{R^2}\hat{R} = \frac{k_{e}q_{+}}{|\bar{R} - \bar{R}_{q_{+}}|^{3}}\bar{R} - d/2 $$ Note that: $$\bar{R}_{q_{+}} = d/2 $$ where d (depicted as l in figure) is the distance between the charges in the dipole. For the negative charge we get basically the same but slightly different. $$ \bar{E}_{+}(\bar{r}) = -\frac{k_{e}q_{+}}{R^2}\hat{R} = -\frac{k_{e}q_{+}}{|\bar{R} + \bar{R}_{q_{+}}|^{3}}\bar{R} + d/2 $$ The displacement vector from the negative charge to the point of interest is slightly different, we see a + instead of a - because it has to travel an extra d/2 distance to get to the origin and then to the point. Now if we add these together we end up with $$ \bar{E}(\bar{r}) = \frac{k_{e}q_{+}}{|\bar{R} - d/2|^{3}}\bar{R} - d/2 + \frac{k_{e}q_{+}}{|\bar{R} + d/2|^{3}}\bar{R} + d/2 $$ $$ \bar{E}(\bar{r}) = k_{e}q\left[ \frac{\bar{R} - d/2}{|\bar{R} - d/2|^{3}} - \frac{\bar{R} + d/2}{|\bar{R} + d/2|^{3}} \right] $$ Now supposedly according to the textbook An interesting result occurs if we take the dipole to be “very small.” Here we mean that the dipole has a spatial size, l, that is negligible compared with the distance r to the point P where the field of the dipole is observed. The result is that the field at P due to the point dipole at the origin is well-approximated by: $$ \bar{E}(\bar{r}) = k_{e}\left[ \frac{(3\bar{r} \cdot \bar{p})\bar{r}}{r^5} - \frac{\bar{p}}{r^3} \right] $$ which is the formula I am trying to use, but I have no idea how they got here. No deriving is done from their part. How did they get the last formula??? EDIT 2: On request from @jonk I uploaded the following drawing of how I understand the situation as posed by sub-problem b. AI: Overview Note: I've added some Glowscript/VPython code to help illustrate the value of using software programming tools. We have so much available to us, provided by many contributors to whom we owe much. Learn well to use the gifts we've been handed by these wonderful people. Here is what I imagine for the dipole of \$\left(1\times10^{-15}\: C\!\cdot\! m\right)\hat{y}\$. (This might be \$3\frac13\:\text{pC}\$ separated by \$300\:\mu\text{m}\$ to represent your dipole moment, for example.) (I drew that with Microsoft Paint.) The field at any point around the above dipole will be the superposition (sum) of the effects of both charges. So: $$\begin{align*} \vec{E}&=\vec{E}_++\vec{E}_-\\\\&=\frac1{4\pi\epsilon_{_0}}\frac{q_+}{\mid\vec{r}_+\mid^2}\hat{r}_+ + \frac1{4\pi\epsilon_{_0}}\frac{q_-}{\mid\vec{r}_-\mid^2}\hat{r}_-\\\\&=k_e\left[\frac{q_+}{\mid\vec{r}_+\mid^2}\hat{r}_+ + \frac{q_-}{\mid\vec{r}_-\mid^2}\hat{r}_-\right], \text{where }k_e=\frac1{4\pi\epsilon_{_0}}\approx 9\times10^9\:\frac{N\cdot m^2}{C^2} \end{align*}$$ (More exactly, \$k_e\approx 8.98755179\times10^9\:\frac{N\cdot m^2}{C^2}\$) It's pretty simple. Python -- Learn to Use It Before I dig into your specific questions, this is a good place to make a case for learning to use Python. It's just too handy to ignore. Let's express the above knowledge in VPython (I'll be using GlowScript 3.1 VPython): ke = 8.98755179e9 # eqivalent for 1/(4*pi*e0) in SI units. # Dipole charge and separation. q = 5e-12 / 1.5 # 3 1/3 pC s = 300e-6 # 300 microns # Dipole moment. p = q * s # Computes E-field for a charge, as seen from any given point around it. def E( qm, qp ) : return def ( p ) : return ke * qm * norm(p-qp) / mag(p-qp)**2 # E-field functions for the positive and negative charges. ep = E( q, vector( 0, s/2, 0 ) ) en = E( -q, vector( 0, -s/2, 0 ) ) print( "Dipole moment: ", p, "C m") That prints out: Dipole moment: 1e-15 C m I added a little extra code above because I'll be using this code, later, and will need the extra bits then. You can check this out on your own by using this link. Case (a) I'd draw it up this way: At a point \$10\:\text{cm}\$ along the positive x-axis, the magnitudes due to the two charges along \$\hat{x}\$ cancel out, leaving only that caused along \$\hat{y}\$, as shown above in the image. These residuals (are shown in their associated color and direction and they) will add together and point downward, according to the usual conventions. So pointing as \$-\hat{y}\$, or \$\langle 0,-1,0\rangle\$. That's my qualitative expectation. \$\vec{r}_+=\langle x, 0, 0\rangle-\langle 0, \frac{s}2, 0\rangle=\langle x,-\frac{s}{2},0\rangle\$ and \$\vec{r}_-=\langle x, 0, 0\rangle-\langle 0, -\frac{s}2, 0\rangle=\langle x,\frac{s}{2},0\rangle\$. \$\hat{r}_+=\frac{\vec{r}_+}{\mid \vec{r}_+\mid}=\frac{\langle x,\,-\frac{s}{2},\,0\rangle}{\sqrt{x^2+\left(-\frac{s}2\right)^2}}=\frac{\langle x,\,-\frac{s}{2},\,0\rangle}{\sqrt{x^2+\left(\frac{s}2\right)^2}}\$ and \$\hat{r}_-=\frac{\vec{r}_-}{\mid \vec{r}_-\mid}=\frac{\langle x,\,\frac{s}{2},\,0\rangle}{\sqrt{x^2+\left(\frac{s}2\right)^2}}\$. Let's now prove a result: $$\begin{align*} \vec{E}_\bot&=\vec{E}_++\vec{E}_- \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\frac{q}{\left[x^2+\left(\frac{s}2\right)^2\right]}\cdot\frac{\langle x,-\frac{s}2,0\rangle}{\sqrt{x^2+\left(\frac{s}2\right)^2}} + \frac1{4\pi\epsilon_{_0}}\cdot\frac{-q}{\left[x^2+\left(\frac{s}2\right)^2\right]}\cdot\frac{\langle x,\frac{s}2,0\rangle}{\sqrt{x^2+\left(\frac{s}2\right)^2}} \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\frac{q}{\left[x^2+\left(\frac{s}2\right)^2\right]^\frac32}\cdot\langle x-x,-\frac{s}2-\frac{s}2,0-0\rangle \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\frac{q}{\left[x^2+\left(\frac{s}2\right)^2\right]^\frac32}\cdot\langle 0,-s,0\rangle \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\frac{q s}{\left[x^2+\left(\frac{s}2\right)^2\right]^\frac32}\cdot\langle 0,-1,0\rangle \end{align*}$$ There is no information given about the separation \$s\$ of the charges. Only the dipole moment of \$p=q s\$ is given. So, the dipole approximation with \$r=x=10\:\text{cm}\$ leaves you only with: $$\begin{align*} \mid \vec{E}_\bot\mid&=\left[\frac1{4\pi\epsilon_{_0}}\right]\cdot\frac{q s}{x^3}=\left[9\times10^9\frac{N\cdot m^2}{C^2}\right]\cdot \frac{p}{r^3} \end{align*}$$ And you computed the result correctly as \$9\:\frac{N}{C}\langle 0,-1,0\rangle\$ or \$-9\:\frac{N}{C}\langle 0,1,0\rangle\$. Let's check back in with that GlowScript, again. Adding the following code: # Magnitude of distance from dipole. r = 10e-3 # 1 cm # Perpendicular position: pp = r * vector( 1, 0, 0 ) # Net field. eppnet = ep( pp ) + en( pp ) print( "Perpendicular: ", mag( eppnet ), "N/C", norm( eppnet ) ) We now get: Dipole moment: 1e-15 C m Perpendicular: 8.98452 N/C < 0, -1, 0 > Not bad. Easy to use and understand, too. Case (b) I'd draw it up this way: At a point \$10\:\text{cm}\$ along the positive y-axis, the magnitudes due to the two charges along \$\hat{x}\$ are zero and those along \$\hat{y}\$ are shown in the image. (One is larger in magnitude than the other.) \$\vec{r}_+=\langle 0, y, 0\rangle-\langle 0, \frac{s}2, 0\rangle=\langle 0,y-\frac{s}{2},0\rangle\$ and \$\vec{r}_-=\langle 0, y, 0\rangle-\langle 0, -\frac{s}2, 0\rangle=\langle 0,y+\frac{s}{2},0\rangle\$. \$\hat{r}_+=\frac{\vec{r}_+}{\mid \vec{r}_+\mid}=\frac{\langle 0,\,y-\frac{s}{2},\,0\rangle}{\sqrt{0^2+\left(y-\frac{s}{2}\right)^2}}=\langle 0,\,1,\,0\rangle\$ and \$\hat{r}_-=\frac{\vec{r}_-}{\mid \vec{r}_-\mid}=\frac{\langle 0,\,y+\frac{s}{2},\,0\rangle}{\sqrt{0^2+\left(y+\frac{s}{2}\right)^2}}=\langle 0,\,1,\,0\rangle\$. Let's again prove a result: $$\begin{align*} \vec{E}_\text{on axis}&=\vec{E}_++\vec{E}_- \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\frac{q}{\left[\left(y-\frac{s}2\right)^2\right]}\cdot\langle 0,1,0\rangle + \frac1{4\pi\epsilon_{_0}}\cdot\frac{-q}{\left[\left(y+\frac{s}2\right)^2\right]}\cdot\langle 0,1,0\rangle \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot q\left[\frac{1}{\left[\left(y-\frac{s}2\right)^2\right]} + \frac{-1}{\left[\left(y+\frac{s}2\right)^2\right]}\right]\cdot\langle 0,1,0\rangle \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot q\left[\frac{\left(y+\frac{s}2\right)^2-\left(y-\frac{s}2\right)^2}{\left[\left(y-\frac{s}2\right)^2\right]\left[\left(y+\frac{s}2\right)^2\right]}\right]\cdot\langle 0,1,0\rangle \\\\ &=\frac1{4\pi\epsilon_{_0}}\cdot\left[\frac{2 q s y}{\left[\left(y-\frac{s}2\right)^2\right]\left[\left(y+\frac{s}2\right)^2\right]}\right]\cdot\langle 0,1,0\rangle \end{align*}$$ Again, there is no information given about the separation \$s\$ of the charges. Only the dipole moment of \$p=q s\$ is given. So, the dipole approximation with \$r=y=10\:\text{cm}\$ leaves you only with: $$\begin{align*} \mid \vec{E}_\text{on axis}\mid&=\left[\frac1{4\pi\epsilon_{_0}}\right]\cdot\frac{2 q s y}{y^4}=\left[9\times10^9\frac{N\cdot m^2}{C^2}\right]\cdot \frac{2 p}{r^3} \end{align*}$$ Which should be twice as large, in magnitude, as for case (a). But in this case the sign is positive. Let's check back in with GlowScript. Adding the following code: # On-axis position. onaxisp = r * vector( 0, 1, 0 ) # Net field, again. eonaxisnet = ep( onaxisp ) + en( onaxisp ) print( "On axis: ", mag( eonaxisnet ), "N/C", norm( eonaxisnet ) We now get: Dipole moment: 1e-15 C m Perpendicular: 8.98452 N/C < 0, -1, 0 > On axis: 17.9832 N/C < 0, 1, 0 > Again, not bad. Case (e) I thought I'd add a little bit towards this case: $$ \begin{align*} \begin{array}{rl} {\vec{r}_+} &= \vphantom{\langle \frac{r}{\sqrt{2}}, \frac{r}{\sqrt{2}}, 0\rangle-\langle 0, \frac{s}2, 0\rangle}\\\\ &= \vphantom{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}-\frac{s}{2},0\rangle}\\\\ {\hat{r}_+} &= \vphantom{\frac{\vec{r}_+}{\mid \vec{r}_+\mid}}\\\\ &= \vphantom{\frac{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}-\frac{s}{2},0\rangle}{\sqrt{\left(\frac{r}{\sqrt{2}}\right)^2+\left(\frac{r}{\sqrt{2}}-\frac{s}{2}\right)^2}}} \end{array} && { \begin{array}{l} \langle \frac{r}{\sqrt{2}}, \frac{r}{\sqrt{2}}, 0\rangle-\langle 0, \frac{s}2, 0\rangle\\\\ \langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}-\frac{s}{2},0\rangle\\\\ \frac{\vec{r}_+}{\mid \vec{r}_+\mid}\\\\ \frac{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}-\frac{s}{2},0\rangle}{\sqrt{\left(\frac{r}{\sqrt{2}}\right)^2+\left(\frac{r}{\sqrt{2}}-\frac{s}{2}\right)^2}} \end{array} } &&&& \begin{array}{rl} {\vec{r}_-} &= \vphantom{\langle \frac{r}{\sqrt{2}}, \frac{r}{\sqrt{2}}, 0\rangle-\langle 0, -\frac{s}2, 0\rangle}\\\\ &= \vphantom{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}+\frac{s}{2},0\rangle}\\\\ {\hat{r}_-} &= \vphantom{\frac{\vec{r}_-}{\mid \vec{r}_-\mid}}\\\\ &= \vphantom{\frac{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}+\frac{s}{2},0\rangle}{\sqrt{\left(\frac{r}{\sqrt{2}}\right)^2+\left(\frac{r}{\sqrt{2}}+\frac{s}{2}\right)^2}}} \end{array} & { \begin{array}{l} \langle \frac{r}{\sqrt{2}}, \frac{r}{\sqrt{2}}, 0\rangle-\langle 0, -\frac{s}2, 0\rangle\\\\ \langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}+\frac{s}{2},0\rangle\\\\ \frac{\vec{r}_-}{\mid \vec{r}_-\mid}\\\\ \frac{\langle \frac{r}{\sqrt{2}},\frac{r}{\sqrt{2}}+\frac{s}{2},0\rangle}{\sqrt{\left(\frac{r}{\sqrt{2}}\right)^2+\left(\frac{r}{\sqrt{2}}+\frac{s}{2}\right)^2}} \end{array} } \end{align*} $$ Once again, $$\begin{align*} \vec{E}_{45^\circ}&=\vec{E}_++\vec{E}_-=\frac1{4\pi\epsilon_{_0}}\frac{q_+}{\mid\vec{r}_+\mid^2}\hat{r}_+ + \frac1{4\pi\epsilon_{_0}}\frac{q_-}{\mid\vec{r}_-\mid^2}\hat{r}_- \end{align*}$$ If you follow through, you may also find (for \$r\gg s\$): \$\vec{E}_{45^\circ}=\left[\frac1{4\pi\epsilon_{_0}}\right]\cdot \frac{p}{r^3}\cdot\langle \frac32,\frac12,0\rangle\$. So I get \$\approx 14.23\:\frac{N}{C}\:\angle 18.435^\circ\$. Returning to Glowscript and adding this code: # 45-degree, quadrant 1 position. ap = r * vector( cos( pi/4 ), sin( pi/4 ), 0 ) # Net field, yet again. eanet = ep( ap ) + en( ap ) print( "45 degree: ", mag( eanet ), "N/C", norm( eanet ) ) I get: Dipole moment: 1e-15 C m Perpendicular: 8.98452 N/C < 0, -1, 0 > On axis: 17.9832 N/C < 0, 1, 0 > 45 degree: 14.2107 N/C < 0.948762, 0.315993, 0 > (Note that it computes a normal that has a hypotenuse of 1. I had to do that, too. But didn't want to write the expression that way, preferring to use an unnormalized vector, instead. The magnitude results are the same, either way.) I also did a quick visual simulation using Glowscript (see code here, for example.) Using \$3\frac13\:\text{pC}\$, separated by \$300\:\mu\text{m}\$, made the dipole pretty small in the image: (That result was achieved using \$9\times 10^9\$ rounded figure and not the more exact figure used in earlier simulations.) But it gets the point across. I also performed a computation using Python and displayed the value at the bottom. (The arrow with the little red 'star' at its tip is this vector at \$45^\circ\$.) Matches with my expectations, above. Summary That's as far as I want to go, here. I feel it is sufficient to show how to reach case (b) and that you should be able to translate the above into the context of your own book (which I do not have), in order to produce the remaining results. Finally, with VPython, the above could have been done slightly differently: ke = 8.98755179e9 # eqivalent for 1/(4*pi*e0) in SI units. class StaticCharge: def __init__( self, charge, position ): self.charge = charge self.position = position def q( self ) : return self.charge def pos( self ) : return self.position # Coulomb’s law (stationary charges -- breaks down in relativistic cases.) def E( self, pos ) : return ke * self.charge / mag2(pos-self.position) * hat(pos-self.position) class Dipole: def __init__( self, charge, separation, axis ): self.charge = charge self.axis = axis self.separation = separation self.moment = charge * separation self.positive = StaticCharge( charge, separation/2 * axis ) self.negative = StaticCharge( -charge, -separation/2 * axis ) def posp( self ) : return self.positive.pos() def posn( self ) : return self.negative.pos() def sep( self ) : return self.separation def p( self ) : return self.moment def E( self, pos ) : return self.positive.E( pos ) + self.negative.E( pos ) def D( self, pos ) : efield = self.E( pos ) return f"{mag( efield )} N/C {hat( efield )}" # Input: dipole moment and charge. p = 1e-15 # dipole momentum q = 10e-12 / 3 # 3 1/3 pC # Input: radial distance. r = 10e-3 # 1 cm # My dipole: has charge q, separation p/q, and aligned on the y-axis. mydipole = Dipole( q, p/q, vector( 0, 1, 0 ) ) # Three points of interest around the dipole. perpendicular = r * vector( 1, 0, 0 ) onaxis = r * vector( 0, 1, 0 ) fortyfive = r * vector( cos( pi/4 ), sin( pi/4 ), 0 ) # Display the E-field at these three points around the dipole. print( "Perpendicular: ", mydipole.D( perpendicular ) ) print( "On axis: ", mydipole.D( onaxis ) ) print( "45 degrees: ", mydipole.D( fortyfive ) ) # Create graphical balls for the dipole. ballp = sphere( pos = mydipole.posp(), radius = mydipole.sep()/2, color = color.red ) balln = sphere( pos = mydipole.posn(), radius = -mydipole.sep()/2, color = color.cyan ) # Perform a loop generating 64 vectors in a circle around the dipole. N = 64 theta = 0 dtheta = 2*pi / N while theta < 2*pi: ro = r * vector( cos(theta), sin(theta), 0 ) arrow( pos = ro, axis = 2e-4*mydipole.E( ro ), color = color.green ) theta = theta + dtheta For the above code see here. This outputs: Pretty nice and easy. An Added Diversion The above results ignore the z-axis, so it's really a 2D situation being displayed. However, in 3D the results are symmetrical about the z-axis. Use your imagination for that. But given the above Python code, it might be fun to investigate a highly simplified capacitor approximated by a simple row of dipoles to see what happens in 2D. The code is here and the results are: This is not an accurate reflection of how charges distribute themselves on a parallel plate capacitor, as there must be an increasing charge density when approaching the edges, and the above model doesn't accommodate this fact. Instead, it spreads them out completely evenly. Also, the plates are infinitely thin in this example and in reality they are not. (Finite thickness conducting plates must have charge on their outer faces because the line integral of the electrostatic field around any closed path must vanish.) But it is still interesting. An exaggerated but also illustrative example would be more like this: For more information on this topic, see "Electric field outside a parallel plate capacitor," by G. W. Parker, 2002, American Journal of Physics, 70(5), 502-507, doi:10.1119/1.1463738. The point I'd also like to emphasize is the power of using VPython and Glowscript Trinket (tikz stuff) for physics modeling. In fact, there's a book on the topic of Python generally for physics called, "Essential Python for the Physicist," by Giovanni Moruzzi, 2020.
H: Microcontroller is being powered by the UART connection I have a custom ARM Cortex M3 board that communicates with a Raspberry Pi 4 via UART. Only three wires connect the Pi to the MCU: Tx,Rx,GND. When the MCU power supply is turned off the device does not power down but draws 17mA from the Rx pin and is able to bring the 3.3V rail up to 1.7V which is enough to keep the MCU running, or at least prevent it resetting. Presumably this is via the protection diodes when the 3.3V supply is powered off. The Pi and MCU run off independent power supplies but are mounted in the same chassis and share a ground. The UART cable is only 10cm long between them. What is the correct way to isolate power between these devices while allowing UART communication? I don't require galvanic isolation, I just want to prevent the power supply backflow. Any suggestions? I currently have 1kΩ resistors in series with the Rx and Tx lines which is keeps the MCU from powering from the Pi, however there is still current flowing to the 3.3V bus and I don't know if this will adversely affect serial data. (Edit: I want to emphasize the general nature of this question. It is common to have push-pull interconnects between devices with interfaces like SPI, UART, or just GPIO bits. These all have the potential to feed power to an unpowered device via the protection diodes.) AI: There are buffers that will fix this (search term: "ioff partial power down"). As long as the buffer is powered from the custom Arm board VCC, it will block current when VCC is absent. But you can also fix it with two transistors, a PMOS such as the BSS84 and an NMOS such as the BSS138. See schematic below. Use VCC on your custom Arm board to turn on the BSS138. This will, in turn, turn on the BSS84 so the signal can get through. But when VCC is not present, the BSS138 will turn off, and then the BSS84 will also turn off, and no current can flow from PI_TX to PI_TX_SW. R2 is probably not needed. There is probably something already in between VCC and GND that will cause VCC to collapse. This is the concise version of the answer because I am judging that your experience level is pretty advanced already. However, please feel free to request elaboration or clarification in the comment section if desired. If it is not necessary to be frugal with power on the PI side, you can change R1 to 10 kohm or so. simulate this circuit – Schematic created using CircuitLab
H: Interpolating a Discrete-Time High Pass Filter I am currently working on a project on MATLAB, and I need to use interpolation and decimation on various low pass, band pass and high pass filters with sampling frequencies of 10kHz. There was no problem with interpolating my LP and BP filters. But trying to interpolate a HP filter by a factor of 4 gave me a resulting filter whose response is similar to that of a band pass filter. The figures below show my filters' response by using the freqz(.) command. I used an anti-imaging filter in the form of an 8th order Chebyshev Type I filter, but I feel like I need to use another type of filter. But I don't know what to do. My code pieces are as following. function [interp, y] = Interpolation(x, L) len = length(x); y = zeros(1,len*L); y((0:len-1)*L+1) = x; % Spreading the values of x [n, d] = cheby1(8, 0.5, 1/L); % Anti-imaging filter interp = filter(n, d, y); end Code to run in the command window: [int, y] = Interpolation(fltH, 4); freqz(y, 1, 512) figure freqz(fltH, 1, 512) Any help is appreciated. AI: Interpolation means inserting zeroes every other samples, which is what you're doing with the y(...)=x line. After that you're appplying a lowpass filtering, which is why you get a bandpass from a highpass. But that's not needed, since the interpolation process doesn't add high frequency content, it preserves all the information of the original filter. So all you need to do is the equivalent of this: M = 20; wc = 0.37; N = 4; k = [-M:M]; h = -wc*sinc(wc*k); h(M + 1) = 1 - wc; g = zeros(1,(2*M + 1)*N); g([0:2*M]*N + 1) = h; plot(20*log10(abs(fft(h, 1024))(1:512)), "", 20*log10(abs(fft(g, 1024))(1:512))) Where I used some arbitrary highpass, and this is what it plots: If what you expected was to have a flat passband all the way to Nyquist, you can't, since that's what the interpolation does: it shrinks the spectrum relative to the original response, and comes with frequency folding. Your filtering removed the higher image, but it can't restore the passband (it doesn't make sense to filter it out and expect a miracle restoration). The only solution is to recalculate the filter, because that would imply the Nyquist is just like the original, which means the impulse response needs to be calculated relative to the Nyquist, which means a new wc can only be given by a new sinc(). And for that you'll need to use wc/N and a range from [-M*N:M*N], thus a length 4x as much. If that's too much, try an IFIR, which will reduce the total order, but will add a bit more delay.
H: How to get the parameters of a ferrite bead I have been simulating a ferrite bead on LTSPice, however, I so far have been using the LTSpice database to select the Ferrite bead, I now want to use a ferrite that is not on the database. However, how do I get the parameters needed to simulate the ferrite bead? For example for the following ferrite bead on the database we have the following values: But all that is given in the datasheet found,here is: How do I calculate those parameters using that graph or do I need more information? AI: From an answer to an earlier question you asked is this circuit: - The values for R1, R2, L1 and C1 were taken from this ferrite bead table: - But, if all you have is the graph shown below, you can calculate L1 using XL (20 Ω) at 1 MHz and, you'll get \$L_1 = \frac{X_L}{2\pi 10^6}\$ = 3.18 μH. However, in your original question, you had stated (or rather LTSpice appeared to state) that L1 was 3.2 nH and that now seems a flawed value. Clearly the ferrite beads are the same part number and also, the maximum impedance does not occur at 2.683 GHz but occurs at 100 MHz. So, something is awry with the values in that question you posed earlier. Clearly, maximum impedance occurs at around 100 MHz (not 2.683 GHz) and, I trust this graph rather than LTSpice: - So, accepting that the inductance L1 is 3.2 μH, the capacitance can be found using the maximum impedance frequency of 100 MHz (the graph above shows that) and the value of L1: - $$\text{100 MHz} = \dfrac{1}{2\pi\sqrt{L_1C}}$$ I get C1 = 0.792 pF. For R2, the clue is in the part number's last three digits 621 and in the table on page 12 of the data sheet. R1 is stated as being 0.1 Ω.
H: Why use external compensation on a buck IC? The AP64200, with block diagram of says about loop compensation that The goal of loop compensation design is to achieve: High DC Gain Gain Margin less than -10dB Phase Margin greater than 45° Loop Bandwidth Crossover Frequency (fC) less than 10% of fSW but the specsheet also says that the COMP pin can simply be grounded. What is the consequence to grounding the COMP pin for the behaviour of the regulator? Said another way, how does the designer balance the space and component costs of adding R5/C5 external compensation passives with the benefit of enabling external compensation, whatever that may be? AI: Compensation can be used to optimize the performance of the DCDC. Following the goals listed (except DC gain), having performance better than the minimum can improve transient response (so saving on the output capacitor), avoid ringing on the output. Just using 'default' compensation may keep the circuit stable, but optimizing and tuning it for the particular component selection used may give better performance.
H: Which flux type to use when soldering stranded wires that will be conformal coated? I am doing a hobby project where I am weaving stranded wire through vias on the PCB. There is a matching copper trace and solder mask under the stranded wire. The stranded wire is soldered onto the exposed copper trace. I do this to allow high amperage on the board which is only 1 oz copper weight. (Can't use another copper weight because of the PCB manufactorer) I will also be adding conformal coating to this board, so then the question becomes: Which type of flux should I be using? Because flux residue should be cleaned when adding conformal coating, I was first considering a water soluble flux. But the data sheet says that stranded wire should not be used, which makes sense: Flux residue could be trapped inside the stranded wire. So now I am considering to use a no-clean flux instead, because this flux residue should be OK to leave inside the stranded wire. It still needs to be cleaned on the surface however, to allow the conformal coating to bind. The downside is that cleanining it will be harder and nastier than a water soluble one. What is my best option in this case? AI: https://www.chemtronics.com/essential-guide-to-flux-for-soldering-electronics Don't use fluxes with additives that are corrosive if it is hard to clean. If not corrosive consider a dab of PU around the base for stress relief and also as a conformal coat. It is found used in all power supplies to bond heavy parts from vibration solder cracks. I suggest ROL0 flux with low viscosity for a wire dip and manual solder process. RO stands for rosin, the L is for low activity and the number 0 is for no detectable halides. a halide-free, rosin-based solder paste with low activity is categorized as ROL0. Hopefully, you used Saturn PCB to compute the required track widths for current use. Add some margin as the conformal coating acts as thermal insulation as well.
H: Difference between Electric Energy and Electric Signal Gas lighter and phonograph are two applications of direct piezoelectricity. In the first one, we have electric energy as an output and in the second we get electric signal as an output. But, what's the difference between Electric Energy and Electric Signal? Reference: https://www.researchgate.net/publication/323934001_An_Introduction_to_PiezoelectricMaterials_and_Components AI: The way I would interpret this is: output: electric energy The output is used to power something that consumes (significant amount of) energy (to heat the gas to ignite it in that case). Piezo crystal is used as a power source. output: electric signal The output is read by some device to get information and is not meant to provide (significant amount of) power to anything. Piezo crystal is used as a sensor.
H: Switch contact ratings Inside an enclosure, a device is powered by an SMPS as follows: The device operates under 12 VDC and sinks 6 A from the SMPS. The SMPS is wired to AC by an IEC inlet. Now I want to install an emergency stop switch either at point X or Y above. Here are the contact ratings of this button: My questions are: Does that mean this switch should not be installed at point Y since it passes 6 A at 12 VDC? What should be the max current rating at 12 VDC for this button? What is meant by Monitor Contact? Can you give an example situation where it is used? AI: Correct. It is clear the switch is only rated for 2A at DC for a resistive load. We do not know if your ‘device’ is resistive or reactive. The monitor contact can be used to activate an indicator or notify the control system that the emergency stop switch has been activated. Possible solutions are to select a more suitable switch or add a relay to switch the load.
H: Why do we need a pull-up resitor and not directly tie the pin to 5V (Arduino)? I'm not very good at analog circuits. So the question is: Besides the floating pin problem, why do we need a pull-up resistor? Why can't we tie the pin directly to 5V? I'm reading up on it and am getting mixed answers. One website said that it's to limit the current flow when the button is pressed so that it doesn't fry the board. On a different forum, someone said that the current isn't the problem since the input resistance of the pin is high enough that it shouldn't matter. Which one of these is correct? I feel like there's a gap in my understanding somewhere. AI: Without the pull up resistor, the 5V supply will be shorted to ground when either of the input switch "a" and "b" are closed. This can result in damage to 5V supply or the 5V supply will be turned off if over current protection feature is used in 5V supply.
H: How can I calculate the values of the four resistors in a Wheatstone bridge? I measured black-red = 400ohm, green-white = 350ohm in a 5kg loadcell. How can I calculate the resistor values? AI: Many strain gauges have gain calibration resistors in the excitation leads such as here: - Image from RS, Tedea Huntleigh Wire Lead Load Cell. And, this means that the excitation leads measure a higher resistance than the output leads. Given also that 350 Ω is pretty commonplace for a strain gauge, it's likely that the measurement of 400 Ω is because of the 350 Ω gauges plus 25 Ω in each excitation lead. Resistance between A and C should be 287.5 Ω nominal Resistance between A and D should be 287.5 Ω nominal Resistance between F and C should be 287.5 Ω nominal Resistance between F and D should be 287.5 Ω nominal $$R_{AC} = 25 + 350 || 1050$$
H: Is this op amp circuit a promising idea to measure 300VAC? I need to measure 300VAC. I am using the following circuit and it is working good. In the circuit, I am using 2mA/2mA current transformer. More details about this transformer are available here. However, I want to use only one power source of 3.3V to reduce my PCB size and cost. Is the following circuit good? If it is not a workable solution, pelase suggest me what would be the better solution. EDIT: The transformer is a current transformer with 1:1 relation of 2mA/2mA. Also, there is a limit of secondary resistance. The secondary resistance should be less than 100 ohms. It is not a problem to short circuit the secondary. More details are available at the following link. https://www.micro-transformer.com/2ma-2ma-voltage-transformer-ZMPT101C.html If I use a voltage divider (solution suggested by Kuba hasn't forgotten Monica) as shown in the following circuit, the voltage swing at the output is little and hence, I cannot use the complete range of a microcontroller. So, I suppose the use of an operational amplifier is required. Edit 2: Thanks to Kuba hasn't forgotten Monica, I understood several other mistakes in my previous circuits. Upon including Kuba's suggestions, I have the following circuit suggestion. Is it good to use a instrumentation amplifier to take full advantage of the microprocessor's ADC? Edit 3: I came up with another circuit which seems to work fine. Please give a look at it. Edit 4: Solution: Finally I am able to solve it. The following circuit is working good. simulate this circuit – Schematic created using CircuitLab AI: Re. Circuit #1 The op-amp is incorrectly biased. Re. Circuit #2 Add a fuse! Assume that the rest of the circuit can fail shorted. Accommodate the +10% high line condition by increasing the V-I resistor R1 to 165k ohm. The gain is too high and the op-amp's output attempts to swing close to the rails. Recall that the full transformer output current flows into the op-amp output. After all, that's the only destination it can flow into! The op-amp won't be able to drive close to the rails at such a current. According to the datasheet, with a 2mA load the output can swing to about +/-0.4V away from the rails, i.e. between 0.35V and 2.95V: The gain has to be decreased to lower the output voltage swing, i.e. the feedback resistor value has to be increased. Add transient protection to the transformer secondary. Disconnecting the input will create an inductive kick that will overstress any load, be it an op-amp or an MCU. Re. Circuit 3 The transformer is used as a current transformer, so the output current is exactly the input current. With a 150k V-I resistor at the input, the output current will be exactly 2mA across the recommended 50 ohm load. That's only 100mV RMS. The "+/-141mA peak" annotation is incorrect: the secondary current is 2mA RMS, maximum. The voltage divider as shown further divides this small signal by half. At the very least, you'd want to move the divider to bias the winding, so that no amplitude would be lost: simulate this circuit – Schematic created using CircuitLab The output looks as follows: Discrete Current Source I-V Converter If you can accommodate a slightly smaller output voltage range than the full 0 to 3.3V, then a current mirror would be another cheap solution for an I-V converter. The circuit below presents <100 Ohm load impedance to the transformer secondary. The output voltage at nominal line is 1.8Vpp. simulate this circuit The output is shown below. At volume, this probably costs <$0.25. Cheap Op-Amp I-V Converter As for an op-amp: The good old LM358 and LM324 work with input and output down to ground, and will do the job straight from 24V supply, and is cheap. LM324 and LM358 have stock levels in millions. simulate this circuit For filtering the supply to the op-amp, it’s OK to use a simple RC filter. The op-amp drives about 10Vpp through the 3k feedback resistor: that's 2mA RMS into the transformer secondary. The output is then scaled down to fit into the 0.2-3.1V output range at nominal line voltage. The op-amp can be any jellybean part not worse than LM358, ie. TL071, TL081, LM324, etc. With LM358 as shown, you have a second op-amp you could do something with. The output impedance of this circuit is about 1.35k ohm. The fault condition output current into the MCU pin would be 3mA peak if the output of the op-amp suddenly saturates at 20V. This fault current has a transient character, since the coupling is capacitive. So the op-amp failing with output shorted to either rail will not damage the MCU.
H: Transformer inductive kick? Could someone help me understand the behavior in this DC circuit: simulate this circuit – Schematic created using CircuitLab When I press SW1 and hold it down briefly, the green LED flashes and goes out (while I'm still holding down SW1.) Then when I release SW1, the red LED flashes and goes out. This repeats every time I press and release SW1. I think I understand that when I press and hold SW1, the change in current through the primary coil from 0A to some higher value induces a very brief voltage/current in the secondary coil and this causes the green LED to flash. Please correct me if this is wrong. I have three questions: Why does the red LED flash when I release SW1? Why is the secondary coil current counter-clockwise when I press SW1? Why is the secondary coil current clockwise when I release SW1? AI: Your questions are valid because, with the dot notation shown on your windings, what you describe as happening, should never happen. Hence, I suspect that you have the transformer wired like this (my dots are in red): - When you activate SW1 current ramps-up in the primary winding. This induces a secondary voltage that is positive at the secondary dot. This forces current into the green LED and illuminates it. Green will only stay illuminated for a short time because, an indefinite ramping current is not available from V1 and so, after a short time, the secondary induced voltage falls to zero. At this point, the core is magnetized by the primary current and, when SW1 opens, the flux tails-off and a positive secondary voltage is now seen on the undotted secondary wire. This forces current into the red LED. Of course, if your LEDs are wired backwards then the dots (as you originally showed them) are OK.
H: One of four MOSFET in parallel heating too much I am doing an electronic load project in which I need to work with four MOSFETs in parallel working in the ohmic region (not switching). I have a good heat sink. Furthermore, only one of the four MOSFETs is heating to the point that is impossible to touch it, while the other MOSFETs are cold. The schematic is the following: While the load is drawing 200 mA from the DUT, this MOSFET is barely warm. But when I increase the current, I can hear a little snap from the MOSFET and it starts overheating. Before it was diagnosed as a MOSFET defect, I have to say that I'd already substituted the MOSFET for an equal one. But the problem is the same, it persists, and (again) it's in a single MOSFET. The power MOSFETs that I'm using are the IRF3205. The power resistors are 20W 0.5 Ohms. The voltage range I want to test with this load goes from 5v to 12v and the max current it needs to support is 20 A at any voltage. Some hint? AI: You need to use an opamp for each MOSFET to ensure balancing. Each MOSFET should have an independent sense resistor feeding its own opamp for feedback. The opamps would all be driven from the filtered PWM control voltage in parallel. There is too much difference between the threshold voltages of individual devices to use your current approach. When driving them with a common gate voltage one device may be hardly conducting while at the same time another may be conducting heavily due to the device differences. Here is an example with two control MOSFETs where each one has its own current sense resistor and feedback amplifier. This can be extended to more devices for higher currents by adding MOSFETs and opamps. Note: R3 - R6 and C1 - C2 are typical values of compensation components that may be needed to avoid instability due to the large input capacitance of the MOSFETs. They may require adjustment for the specific design and components. Be aware of the difficulties of running power MOSFETs in linear mode as described by Andy Aka in his answer. I recommend you read his answer and the linked articles. simulate this circuit – Schematic created using CircuitLab
H: Help with capacitive touch button output configuration Can someone help me with the basic working of this capacitive touch switch? I know it isn't very complicated but I just can't get over my brain block of what actually triggers when the button is pressed. Transistors have always been a frustratingly confusing topic for me, and I'm having trouble figuring out how the NPN output wire works. What I do get: Connecting the LEDs to ground allows current to flow across, those make sense to me. Pressing the button causes the control unit to change the voltage it is outputting to the transistor base. This either causes current to flow or not flow. Looks like I would add a load across the NPN and V+ wires. I'm guessing the purpose of this is to measure the current, which is what triggers from a button press, but about here is where I get shaky. AI: It's a bit confusing because it says NPN but they actually have a MOSFET in there and list drain to source resistance in the electrical characteristics. NPN is a quasi-generic term for a switching element between the output terminal and ground that is activated by the device. This usually requires a pull-up resistor and, given the characteristics of the switching element (BJT or MOSFET), allows the output to be adjusted to a range of voltages. The datasheet tells you that the resistance across the MOSFET in the on state is <1 ohm. It also tells you that the voltage range is 5-24V and the maximum current through the switch is 1A. So you might hook it up like the following circuit, with R1 chosen so that V1/R1 (you can ignore the 1 ohm on-resistance of the MOSFET since your resistor will have a tolerance in excess of this) is less than 1A. For interfacing with logic, you can make the resistance 10s of kohm and so reduce the amount of power wasted in R1. The output of this circuit will be high when the button is not pressed and low when it is. simulate this circuit – Schematic created using CircuitLab
H: Why aren't smoothing capacitors used in smoothing the output of fully controlled bridge rectifiers? I was wondering why smoothing capacitors are not used in smoothing the output of fully controlled bridge rectifiers, like it is used in the uncontrolled bridge rectifiers. AI: Capacitive load to SCR rectifier is begging troubles. Thyristors and triacs cannot stand too quickly growing current. See, they have max di/dt spec. Too fast growing current kills them. So, only those applications work which have an inductor between the SCR and the possible smoothing capacitor. I have seen such 3-phase rectifiers. The triggering angle of the thyristors was controlled by the output DC voltage stabilization circuit. To be more exact, the fatality of the fast growing inrush peak to the capacitor through a triggered SCR is not the only reason to leave the capacitor off or to use an LC filter instead of plain capacitor. If one calculates how much energy is wasted in losses during the current peak, he finds that the amount is substantial and it can cause intolerable amount of heat in high power systems - in those which pay off to be designed with SCRs. Charging the cap through an inductor like in buck switching regulators is much more efficient. Finally, as already said by others in a comment, motors can work well with less smoothed voltage. And some high power industrial processes (welding, arc furnance, electroplating) need sustaining DC current. A series inductor can stabilize it well enough.
H: How to minimize the effect on DNL error from this opamp circuit? By using the following single LM324 circuit, I create amplified bipolar outputs from a 16-bit 0-3.3V DAC output as follows: My aim is to minimize extra DC error due to the above LM324 circuit especially not to increase the DNL at the final output. Now for Vp I guess I can use a precision 3.3V voltage reference(?). But for the rest I'm not experienced enough to proceed. How important in this case the supply/rail voltage stability? And how can we quatify the drift due to LM324? edit for an answer: edit: AI: You should use the same reference for Vp as is used for the DAC, and it should be low noise and stable, preferably not a digital supply voltage. If you have to use a DAC that has no option other than to use the supply voltage as a reference, you can create a dedicated supply voltage just for the DAC and Vp. DC nonlinearity is not greatly affected by your circuit, though you might want to switch up the inputs on your differential amplifier (DAC goes to the inverting input) since it has relatively high gain. That will essentially eliminate common-mode voltage rejection errors. Of course a precision op-amp would tend to yield better results all told. Crossover distortion is quite noticeable for AC signals on the LM324 type output stage at frequencies as low as tens of Hz.
H: What causes the output of the flip-flop to be LOW in 555 timer monostable circuit? Before pressing the button, the external capacitor isn't charging because of the short circuit applied across it, but the short circuit is happening because discharge transistor is ON because the \$\overline{Q}\$ output is HIGH, so my question here "What causes the \$Q\$ output to be LOW"? AI: I think calling it a short circuit across the capacitor is a bit misleading: The voltage below R1 is about 0.1 V because that's the transistor's saturation voltage. C1 charges to about 0.1 V and then acts as an open circuit - neither charges nor discharges. So I think it would be right to call C1 an open circuit. (A capacitor is a short circuit to fast switching current, but notice that in this case the circuit is stable at a DC state with an Active transistor, and so the capacitor achieves and maintains an open circuit voltage of 0.1 V - the voltage at the transistor's Collector). To your question about why Q isn't high: let's say it were High, and the button not pressed. The transistor would have been cutoff. C1 in turn would have charged until the Reset Op Amp (the one on the top) turned to High output. With that the Flip flop's reset would have triggered. The reset of the flip flop would have turned Q low and !Q high. The transistor would have then Activated again, drawing current out of C1 until it's down to 0.1 V or so, at which point C1 is back to being an open circuit. Along the way as the transistor is Active and C1 discharges, the Reset op amp would turn low again, resulting in the flip flop's input going back to zero & zero. But the flip flop remembers its state and Q (before the inverter) is stable at Low. (A button press could turn Q high, but it won't do so in of itself). A good idea would be to try this on the Falstad circuit simulator (you can Google this free simulator). With a little patience a replica of the circuit above can be produced (in fact some 555 examples are available pre-made and can selected from the top menu of the simulator).
H: What is this oscilloscope accessory? I have access to a FLUKE 190-504 SCOPEMETER oscilloscope. The following picture shows one of its probes. I don't know the circled accessory in the above picture. I looked for it on Fluke's website and found that its part number is FLUKE-RS400. The following links have more information about it. Website: https://www.fluke.com/en-us/product/accessories/probes/fluke-rs400 Datasheet: https://www.fluke.com/en-us/product/accessories/probes/fluke-rs400/ds However, I still don't understand What is it called? How is it useful? If someone knows about it, please inform me. AI: That's an attachment used when taking high frequency measurements. It minimizes the distance between the probe and ground. The little finger is your ground. Here is a similar attachment: https://probemaster.com/4983hg-high-frequency-ground/
H: Is a 12V 20amp switch too much for a pc? So u got this switch for my pc and it is a 12V 20amp momentary switch will that damage the pc? AI: As a power, or reset, switch connected to the main board headers it will be fine. The signals there are a few thousandths of an amp and 3 to 5 volts. Excess volts or amps in a switch (when the switch is much stronger than the signal it switches) are just unused capacity, it is not any sort of hazard.
H: How to know if an opamp can drive capacitive loads? There has been a lot of questions about how to stablise opamp circuits driving capacitive loads. However, I know there are some op amps that are designed to drive capacitive loads but I am struggling to find the search filter criteria to narrow down which opamps would be good at driving capacitive loads. These are the categories found on the analog website. Similarly, TI below. None of the categories specify capacitive driving capabilities as a filter. What are some of the specification of op amps that can help in determining whether or not an opamp will be able to drive a capacitive load? AI: No op-amp is really good at driving capacitive loads. The usual advice, in case a capacitive load cannot be avoided, is to de-couple the capacitive load from the feedback, by connecting a significant resistance in series with the op-amp output. This does affect the design of the feedback network, the frequency response, and the phase response. Remember, for stability, you need to avoid inverting the feedback phase, so for all frequencies where gain is >1V/V, the total amount of phase shift needs to be no more than about 120 degrees (for 60 degree phase margin). A capacitive load chews up 90 degrees of that phase budget, leaving only 30 degrees for the op-amp and the feedback network. This is generally bad practice. So, an op-amp with poor output characteristics (modeled as a relatively high internal output resistance), would be able to tolerate driving a small capacitive load without the need to connect an additional external series resistor, because in that case the op-amp's internal source resistance is high enough. I don't think anyone deliberately designs an op-amp to have poor output characteristics, especially when it's easy to increase the effective output resistance just by adding a resistor in series. Putting it in marketing terms rather than engineering terms, what you want is probably something in the "precision op-amp" category. These favor low input offset voltage, as you can see from the fact that they advertise the entire category in terms of Vos and its temperature coefficient. The tradeoff is that gain-bandwidth product and settling time may be worse. You may also need to consider further isolating the capacitive load using a transistor in emitter-follower configuration. Another marketing term to look into is "line driver"; something that is intended to drive a big load without using any feedback. The application these are designed for is driving long lengths of cable in an industrial setting, so the capacitive load is unavoidable. These sacrifice the ability to precisely regulate the voltage on the load, but if all you want to do is drive some digital on/off keying through a mile of twisted-pair cable, that's what to look for.
H: Capacitor discharging after power supply is turned off I am actually a computer engineer trying to get a feet into the embedded world starting by learning basic circuit stuff using 5 V or 3.3 V provided by Elegoo power supply. I built the following circuit, hoping that the LED would remain bright for a few seconds when I turn the power off. However, the LED immediately goes off and a multi-meter also shows an immediate decrease of voltage. simulate this circuit – Schematic created using CircuitLab I noticed that the LED actually remains bright for many seconds if I open the circuit before power off. simulate this circuit I don't understand this behavior. What am I missing? Thanks EDIT: According to SamGibson's answer adding a diode solved my technically my problem but I have two more questions. I noticed that the higher the resistance, the slower the discharging of the capacitor. It makes sense as the current flow decreases. Am I right to say that when the power supply is off it acts as a wire without resistance? Before I started experimenting with a capacitor I calculated 330 ohm as a resistance for the LED. However, using 330 ohm the capacitor discharges also (almost?) immediately. Using 100 kohm the LED is not very bright but noticeable bright. Is there any way to put 15 mA on the LED and still using a capacitor? AI: What am I missing? The capacitor is discharging quickly into the power supply, if the power supply is turned off while it is still connected. That is why... I noticed that the LED actually remains bright for many seconds if I open the circuit before power off. Exactly - with the power supply disconnected, the capacitor cannot discharge back into that, so its charge can supply the LED. The solution is to add a small diode in series with the power supply to your circuit, like this: simulate this circuit – Schematic created using CircuitLab Any diode will work as D1. A schottky diode would have a lower forward voltage drop, but greater leakage (though I doubt that will make a difference here). You show R1 as 100 kΩ but that will only result in something like 2 uA LED current. So since you say the LED is bright, I guess that value is a placeholder for a lower actual value.
H: Does a grid-connected induction generator create phase difference between the grid voltage and generated current? I saw an answer to another question that stated: "An ordinary induction generator connected to a power grid will draw lagging reactive volt-amperes from the grid and supply real power to the grid. It is simultaneously a lagging power-factor load and a unity power factor supply." I believe they are saying that a grid-connected induction generator takes a -90 degree phase shifted magnetization current from the grid and produces an output current through a load in phase with the grid voltage. Is this correct? If this is correct, I am a little confused. I thought an induction motor ran above synchronous speed worked as a generator because above synchronous speed the rotor cuts the stator flux in the opposite direction as below synchronous speed, therefore inducing currents in an opposite direction and a magnetic field of opposite polarity as before in the rotor. I assumed the rotor field would align with the stator field and would therefore induce currents in those stator windings with the most current and therefore the strongest magnetic field. This may be an invalid assumption. But the current producing the stator magnetic field is the magnetizing current, -90 degrees out of phase with the grid voltage. So this means that the current induced by the rotor field is in phase with the stator magnetizing current. Yet this cannot be true if this current is supposed to be in phase with the source voltage, as the above answer suggested. I suspect I am fundamentally misunderstanding the working principles of induction generators. Please correct my errors in thinking. Thanks. AI: I believe they are saying that a grid-connected induction generator takes a -90 degree phase shifted magnetization current from the grid and produces an output current through a load in phase with the grid voltage. Is this correct? Yes, that is what I said. I thought an induction motor ran above synchronous speed worked as a generator because above synchronous speed the rotor cuts the stator flux in the opposite direction as below synchronous speed, therefore inducing currents in an opposite direction and a magnetic field of opposite polarity as before in the rotor. I am not sure what that means. I assumed the rotor field would align with the stator field and would therefore induce currents in those stator windings with the most current and therefore the strongest magnetic field. This may be an invalid assumption. Yes, the rotor field is aligned with the stator field. However as the two fields rotate, they not directly aligned, there is an angle between them called the torque angle. The torque is proportional to the sine of the angle. If the stator field leads the rotor field, the angle and the torque are positive. If the rotor field leads the stator field, the angle and the sine are negative. Positive torque means the machine is acting as a motor and negative torque means it is operating as a generator. The current that the motor produces as a generator is produced in the rotor and passed to the stator by transformer action. It he equivalent circuit, the current is produced by a negative resistance in the rotor circuit. Look at my answer to Can someone verify my understanding of induction motors? and the three links in that answer. Note that the motor slip "s" is negative when the motor is acting as a generator.
H: Why does this LED have three PCB pads in the data sheet? Please see this datasheet here for QBLP615 LED. The LED part top and side views are contained on page 3. The recommended PCB footprint is shown on page 9. Why is there a middle pad in the footprint and what is its purpose? How should the third pad be put into the schematic part creation in Altium designer since it has no matching pin in the actual device? AI: it's a leveling pad to support the lens part of the LED to make sure the led lays on its side at 90 degrees instead of leaning downwards towards the PCB. As there's a possibility of this pad touching the exposed substrate pad of the LED assembly and the datasheet doesn't say which terminal that will be, leave them unconnected If you're ok with the leds sitting slightly crooked you can omit this pad.
H: What are the recommended differential trace characteristics for Power over Ethernet input section? I've been looking through a few application notes for Power over Ethernet front ends such as Microchip AN3468 and Skyworks AN1130. I can't figure out what the characteristic impedance of the differential pairsets should be. In particular, I'm interested in the input section from the RJ45 to the discrete magnetics that separate the power from the data for PoE. If anyone could shed some light I'd love to find out more. AI: Ethernet differential impedance is 100 ohms. Adding PoE into the mix does not change that in any way, and since PoE is an add-on feature to Ethernet, this is the reason why the documents you linked to talk only about how to implement PoE, not how to implement Ethernet.
H: Is a pull-up on open drain required when output is not used? On a LTC3886-1 I can read this: I see that all open-drain outputs are tied to VDD on the following application schematics: Is there a reason why pull-ups seem required when the output is not used? AI: Well for one, there is a statement on the description of the pin itself (emphasis mine): SYNC (Pin 13): External Clock Synchronization Input and Open-Drain Output Pin. If an external clock is present at this pin, the switching frequency will be synchronized to the external clock. If clock master mode is enabled, this pin will pull low at the switching frequency with a 500ns pulse width to ground. A resistor pull-up to 3.3V is required in the application. The pin can act as output and input. Based on that description leaving the pin floating might cause it to pick up noise and try to synchronize to that noise. The LTC3886 will automatically accept an external SYNC input, disabling its own SYNC drive if necessary. Whether configured to drive SYNC or not, the LTC3886 can continue PWM operation using its own internal oscillator if an external clock signal is subsequently lost. The device can also be programmed to always require an external oscillator for PWM operation by setting bit 4 of MFR_CONFIG_ALL_LTC3886. The status of the SYNC driver circuit is indicated by bit 10 of MFR_PADS. So leaving it open sounds like it might cause some hick-ups in operation.
H: RX_ER peripheral not used in RMII I'm using this PHY and MAC in this Controller The Controller does not have the ENET_RX_ER peripherals in the 100 pin package. In that case, can we handle the RX_ER in RMII interface using a GPIO port in the controller(taken care in firmware)? Or can we actually not use the RX_ER signal if it is not mandatory/required? AI: Your PHY datasheet says RXER is optional. It is also so fast signal that there is no way it can be detected with GPIO.
H: Decoding VGA Signals on a microcontroller design concerns I have a microblometer sensor that outputs a VGA signal with resolution 640 * 480 pixels. Lets say I want 30 FPS.. I would like to know what would be the easiest way to convert that video signal into digital to be processed on a uC then outputs the result after doing some operations into an LCD. I know the design specs, I can provide an MCU with good memory > 1MBytes of RAM. I also don't want to work on FPGAs, it would be trivial to do. Signal diagram: AI: Although VGA is really obsolete tech, there's still a lot of dedicated digitization ICs out there – especially because for two decades, TFT screens needed to support analog input. So, maybe go with that. Alternatively, since your bolometer doesn't give RGB, but only intensity values (i.e., not actually VGA at all, don't know why it's called VGA), it's likely you'd be happier with just a sufficeintly fast ADC being triggered on the PSYNC clock. Technically, many ADCs can do that, being triggered by an external clock, but you'll have to make sure you consume the samples they generate at the same rate. That's really FPGA terrain you're entering there, not microcontroller stuff. Doesn't need to be a complex, expensive FPGA; realistically, at these low resolutions, all you need to have is maybe a few lines of buffer and a trigger on VSYNC to switch between these, as well as one on PSYNC delayed by the ADC's conversion latency. For a back-of-envelope calculation: with a row being 640 px, and assuming you use a 10 bit ADC (which ADC you use will depend on your system's needs and noise – no need for quantisation noise much lower than system noise, you don't gain anything that way), that's 6400 bits per row. You should buffer enough rows to allow the processor plenty of time to fetch the rows asynchronously, e.g. using QSPI, at rather loosely varying intervals. Note, because I don't think you realize: for a 10 bit ADC giving you 640x480 px 30 times a second, you need to sustain nearly 100 Mb/s interface rate; it's not that clear that you'll find a MCU that will do that. "I can provide an MCU with > 1 MB of RAM" does not spark confidence that you realize this might be too much for most MCUs and might be deep into DSP territory, or only be done using things that usually fare as application processors. (1 MB barely covers one third of a frame, so it seems you've not even done a back-of-envelope calculation!) Most probably, whatever you need to do to convert your data to something that can be displayed will also be done on the FPGA, or on a smartphone or laptop-class CPU. I also don't want to work on FPGAs, it would be trivial to do. It's an FPGA's job; do it on an FPGA. Congratulations that you think working with an FPGA is trivial! I would not think so, but I only worked with large FPGAs for a couple of months. A microcontroller is not well-suited for this timing-centric, low-complexity, hight-throughput kind of work. You still will use a microcontroller to read the rows from the FPGA's buffer and compute what you display on the LCD. (Alternatively: you could try to do the sampling in the MCU itself, but MCU ADC's are probably not what you want, noise-wise, if you're processing something coming from a bolometer, plus, you'd have a hard time finding a MCU with an internal, externally trigerrable ca 10 MS/s ADC, or able to trigger something at 20 MS/s as necessary if you do not sync. So, no, there's really no way to do this without some external logic controlling the ADC, far as I can tell.)
H: Increase the voltage in a simple NPN circuit I'm building the circuit described here, but I need to tweak it a little. I need a stronger magnetic field from the coil to move a bigger 'swing'. So I want to increase the number of turns on the coil, but then I'd also need to increase the voltage in this circuit. I want to use 12V instead of 5V. I'm confused if this would blow up the transistors (and LED, obviously). All the datasheets from transistors I can find, say the maximum base-emitter voltage is 5 to 6V. Will it ever reach this voltage however? Since the capacitor will activate Q2 when it reaches 0.7V... Do I need other transistors, or will it keep working? Not sure if I understand transistors at all anymore! Haha... Any help is appreciated. AI: The B-E voltage limit is the reverse voltage limit. In the forward direction, the B-E junction is just a diode, and it clamps the voltage around 0.65V. You could increase the number of turns without increasing the voltage - it all depends on the parameters of the coil. Or you could use a stronger magnet.
H: Tiny inductors and capacitors connected in parallel to a DC motor terminals Why would you connect tiny resistors and capacitors in parallel to a DC motor as shown in the picture? Why would two of the resistors be connected to the outer shell of the motor? I checked the resistors and thy are around 0.5ohm or less and capacitors are 0.1uF. I'd be grateful for approachable explanation as I know electronics only next to nothing. AI: You wouldn't connect resistors. And they are not resistors. And they are not in parallel. They are inductors and they are in series with the motor. That is an LC filter to keep high frequency electromagnetic interference caused by the motor commutation from conducting back to power supply via wired or radiating via the wires and causing interference with nearby devices. There are no resistors connected to metal shell, they are capacitors. The motor metallic shell has no connection to any voltage so the metal is a high impedance floating node. Floating nodes can act as antennas for the electromagnetic interference, as there are stray capacitances between metal chassis and structures inside the motor, so commutation noise may couple on to the metal shell. Capacitors are low impedance at high frequencies, so they shunt the AC signal so while the chassis still floats at DC, the capacitors act as short circuits to high frequency AC signals so it does not float at RF frequencies that radiate electromagnetic interference.
H: Switching step-down voltage regulator gives lower output-current than input current I'm currently trying to build a photovolatik cell -> DC Converter -> Battery-management-System. In the early stages of the build I was trying to use the adjustable voltage regulator alongside of a potentiometer. I plugged in a solar cell with about 12 V inputvoltage and the outload was a battery pack (don't worry; just discharged NiMH-batteries, shouldn't be an issue if I slightly overcharge them. Adjusting the potentiometer (R2) to get closer to the Maximum Power Point, I achieved an input current of 157 mA, while the output-current was just 150 mA. Input voltage was about 8V, while output voltage was never higher than 5V. Where do I lose the current? Here are the components I used: C_in = C_out = 330 muF C_ff = 100 muF L1 = 330 muH R1 = 1kOhm R2 = 0....200kOhm D1 = SB160 (Schottky-diode) Where is the error in my build? I'm thankful for every answer! Kind regards AI: Input: 8V, 157 mA Output: 5V, 150 mA Efficiency: 60% This is not surprising. You're using a very old DC-DC chip with a high idle current (5-10mA), a BJT switch, and it is not a synchronous buck. The bipolar switch transistor saturation voltage is specified at 1.16V typical, so you're already losing 14.5% of your input voltage and efficiency there. The diode should have about 0.5V on it, which is another 10% efficiency loss. The idle current will consume up to 5% of input power. So we're starting with a theoretical maximum of about 70%, and we haven't even added the losses in the inductor and capacitors yet. If the caps are general purpose high-ESR models, then another 10% loss is not surprising, and the 60% efficiency checks out. The problem here is that input voltage is close to output voltage, so the switch conducts at a high duty cycle, which means its high saturation voltage really hurts. Also, output voltage is pretty low, so the diode's voltage drop also hurts. If you want higher efficiency, you need a more modern chip, a synchronous buck with two MOSFET switches, low-ESR caps, and the inductor has to be updated accordingly.
H: Ethernet Switch IC I'd like to understand a little more on the Ethernet switches. Consider this Ethernet Switch which is a 3 port switch. Like, it has 2 copper ports and one digital (MAC side interface) port. It is mentioned as Gigabit ethernet switch port. In that case, when the 2 Cu ports have 1Gbps input data coming, (so total 2Gbps of data), will the output MAC port also be able to provide the data at 2Gbps or 1Gbps? What is the purpose of a switch in case if it can provide only 1Gbps MAC data output when 2 Cu ports have 2Gbps input data but the MAC side or the switch can only transmit data at only 1Gbps speed? I understood about the Non-blocking term from my previous question. But in this case, if the switch can provide only 1Gbps MAC output, does it really make any sense to say the switch is non blocking? AI: It is a switch and that is how Ethernet works, it is a packet switched network, so the purpose of the switch chip is to switch packets between interfaces. All three ports are gigabit, and if it says non-blocking, it means it can route packets between them as fast as it can long as the bandwidth fits through the ports. So obviously you can't send 1Gbps traffic from two ports simultaneously to one 1Gbps port because it would require 2Gbps which does not fit through a 1Gbps port. And yes it makes sense to say switch chip is non-blocking because it is non-blocking if it can switch 1Gbps from port 1 to port 2 and another 1Gbps from port 2 to port 1 so two ports having full bandwidth in both directions. So it means that the switching fabric between interfaces can handle everything that fits through the 1Gbps ports.
H: How do you go from gate level to transistor level? Is there a good method to go from circuit at gate level or truth table to transistor level, other than trial and error? I have an example here to illustate what I am asking. We have the function \$X=((A*B)+C)'\$ and the equivalent gate level circuit looks something like this Now how would I go about converting this to transistor level using NMOS? The solution looks like this What I tried doing is making a truth table for the gate level circuit. From this truth table we can see that when C is 0 then the circuit behaves as a standard NAND gate, and when its on the circuit is always 0, which you could then easily figure out the transistor level circuit, but looking at the truth table like this seems more like it was just luck and won't really work for more complex circuits. Another idea I had was that an AND gate is the same thing as two back to back NAND gates, and from there you could figure it out but that seems to result in overly complex circuits. How do go solve these types of problems? And or is there a method for doing this? AI: I am having trouble remembering the exact details from this college course I took a few years ago, but we had a unit about combinational logic and creating custom gates using CMOS. I believe the way it was explained was that first you needed a boolean expression in "sum of products form." In your case, you have $$Y = \overline{AB + C}$$ (The inversion here actually simplifies your actual circuit since the logic is typically inverting, and if you did not have the inversion you would have to add an inversion stage) The resulting logic circuit has a pull-up network and a pull-down network. You can go straight from the boolean expression to your circuit. For the pull-down network, the product terms become series elements, and summation manifests as parallel elements. So the bottom part of your gate looks like this: It is called complimentary logic because of how the pull-up network is formed. Product terms become parallel elements and summation becomes series elements. So the corresponding pull-up network is: For fully NMOS logic, if I remember correctly, you forego the active pull-up network for a passive one, where you have a resistor or depletion-mode NMOS (or a PMOS if using pseudo-nmos) to pull the output high when the pull-down network is not active. I took this course a while ago so I may be glossing over some details or gotchas, but iirc this is how you go from boolean expressions to gates procedurally.
H: How can I pass serial data through a Raspberry Pi Pico from USB to GPIO pins to be read in another Pi Pico? I read that the Pi Pico/RP2040 has 2 UARTs. If I want to send data from a computer to a Pi Pico, how should I create a UART that uses USB? Micropython expects pin numbers to create a UART. If I use one UART to receive from the PC and one to transmit to the other Pico via wires,will repl still work? Does it also not use UART/serial? In CircuitPython, the serial/UART is directly available as UART = usb_cdc.data. What happens if I print some stuff in Python code? Is it mixed with UART data? I want to basically use the Pico as a USB to TTL adapter, but I am confused about how to read data sent from the PC to USB. AI: The Pico has built-in USB, so the serial connection from the PC does not use the UART hardware. I'm not familiar with MicroPython, but there will be a method to read characters from USB serial somewhere. This will be distinct from the UART data.
H: Are inrush thermistors thermally insulated? Vaguely related to this question but with some different questions and a different component. For an inrush-limiting NTC thermistor such as the Ametherm SL series: It seems purposefully designed to run hot when at the steady-state current, and this heat is necessary to minimize the working resistance. But I wonder about this "body temperature". Will that 112C be exposed to the surface of the component? If so, I would be worried about the following: risk to human skin (until it's enclosed in a box) ambient heating through air or the PCB that could degrade other component performance, particularly in this application since the cooling will be passive risk to some polymer materials whose maximum rated temperature is well below 112C, such as PVC - care would need to be taken to secure wires etc. away from this component Is it assumed that these are the typical risks incurred when using inrush thermistors? It's not like a heatsink can be added, because that would fight the purpose of the NTC. AI: Yes, the body temperature is (or nearly is) the surface temperature of the device, and it can be a burn hazard. Most regulations require the user accessible parts of a device be at a safe temperature so that would require a box or frame around the thermistor to keep a user from being burned. Inrush thermistors are often through-hole mounted with the body above and away from other components that could be impacted. If surface mounted, the necessary thermal design has to be done to make sure it doesn't impact the PCB or other components.
H: Level translator as digital buffer In the datasheet of the C12880MA (Mini-spectrometer) they recommend using a digital buffer on pins to and from the module (CLK, ST, EOS, TRG): I'm not sure why. In my case, I need level translation anyway. Would a bidirectional level translator like the LSF0204 act as the "Digital buffer"? AI: The LSF0204 (datasheet) can act as a level shifter but it is not a buffer and does not increase the driving capability of the signal. It requires pull-ups on the output side. Since you do not need bidirectional capability I would recommend a different type of device. An TXU0101 (datasheet) can actively translate and buffer between voltages in the range 1.1V to 5V. There are other family members with multiple devices in the same package. There are two supply voltage pins to set the input and output logic voltage levels.
H: How does Altium designer decide the size of the solder mask? Here is a footprint I created using the footprint wizard in Altium designer. The red is top layer pad. The purple is the top solder mask. Whenever I change the top copper pad size, the solder mask pad size changes with it. It is not possible change the two independantly. Why is it not possible to change the size of the solder mask independantly from the copper pad? How does Altium decide how big to make the solder mask from the copper pad? AI: You can change the sizes in the Pad Properties panel under Solder (and Paste) Mask Expansion. There are two options: Rule based Manual If you choose rules based (default), then the design rules affect the expansion: For more information consult the official documentation.
H: How is current the derivative of charge If electric current is the time rate of CHANGE of charge. Then if I have a DC fixed current flowing into a resistor, same amount of charge is always flowing to that resistor, hence the derivative of charge is 0, so current is 0? Or does the book mean that the electric current is the time rate of change of charge TRANSFERRED - in that case, the total q transferred will always be increasing, hence it is possible to have a fixed current? AI: Current flows through things. Even a capacitor that stores up charge will have the same amount of current coming out of one terminal that's going into the other. So the current through a wire is defined as the amount of charge that passes by a point in the wire at a given time.