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H: Infrared LED, color cover/dome interactions? Might not be the best forum, but sort of at a loss of where else to try... I'm trying to find a cover/dome for an IR LED project that I'm working on. The only thing I've found so far is: http://www.goldmine-elec-products.com/prodinfo.asp?number=G15340 ...which is a clear green acrylic dome. My question is, would the green color block/interact with the LED signal in a negative way? If anyone else has any links to a similar dome/cover for IR LEDS, that would be an acceptable answer as well. :-) THANKS! AI: The colour of a cover will not tell you anything about the IR properties you are looking for. There are black covers which allow IR transmission and you can find clear covers which will block IR transmission. What you have to look for is: wavelength of your LED transmission of that wavelength of the cover you want to use Now, you can hope that they have not modified the transmission of acrylic outside of the visible spectrum while tinting it green and use a sample of a PMMA transmission curve, which will look something like this: Source As you can see it has a wide transmission range from 350 nm to 1600 nm - which should cover your IR LED (usually around 950 nm). The green will have an effect in the range from 390 nm to 700 nm (visible spectrum) but not necessarily in the IR range. For example there is this: Source Which starts to transmit really only after 800 nm, which means it is black (maybe you can see it as very dark red in bright enough light) but IR will still pass through. And when guessing the question remains, is it even acrylic to begin with or did they just label it that way...
H: What does "1.2 psrms integrated jitter" mean? What does "1.2 psrms integrated jitter" mean? What is "psrm" as a unit for jitter? and how is it calculated? and does a unit interval differ from circuit to circuit? AI: 1.2 ps rms jitter can be considered the standard deviation of random noise for some sample size. This can be converted to +/- peak jitter , if you choose a sample size. This can also be translated into the frequency domain as some noise below the peak carrier power off center frequency in a 1 Hz band or dBc/√Hz. This will show you how. So if your clock has a jitter of 1.2ps rms then over a sample of 10^9 transitions this is equivalent to a peak jitter of 7x or 8.44 ps. Then adding this to the data jitter, you can correlate this to a bit error rate curve (BER) in [ps per decade] in some other question for yourself, when you understand all the variables for bit rate, clock rate BW , SNR, Peak jitter, decoder gain and noise spectrum. salam.
H: Simple BrainTeaser: Running an AC current between two independent amplifiers I'm working on a project using an ultrasound method for identifying objects in water. For example, such a device could be used to locate bodies on the floor of an ocean bed after a plane crash. Our technique relies on moving charge between two wireless, independent amplifiers, each powered by their own LiPos. I have a set-up like this: On the left side there's a circuit powered by a DC single-supply battery. On the right side there's a second circuit powered by a DC single-supply battery. The two circuits are oscillators. A signal communicated wirelessly from a host device (not pictured) to each amplifier is non-invertingly amplified at A, while the signal is invertingly amplified at B. When there's a high voltage relative to the first LiPo's ground at point A, there's a low voltage relative to the second LiPo's ground at point B. Each circuit has a "contact point" against a central load, R, which is a big body of water. The (theoretically) injected charge makes it easier for our product to locate bodies in the water. The two circuits aren't connected aside from a single contact point on each side. When I use my oscilloscope, there's no voltage difference between points A and B, even when point A has an objectively positive charge, and B may have an objectively negative charge relative to A. When I use my ammeter, no current is running over the load. (Why is this?) Does this have something to do with the output impedance of the op-amp amplifiers that I am using to amplify the charge? Are the op-amps unable to take in current and move it to ground? Is there a specific op-amp or amplifier that might allow this? Does it have to do with the way the oscilloscope or amplifier measures these values? Is current actually moving, just not measurable by these tools? I've noticed when I add two more contact points, C and D, the oscilloscope/ammeter produces more expected readings. However, I don't know whether current is running downwards (R1, R3), or across the load (R2, R4). Because battery life (and prior investment in design considerations) has been accounted for current only running across the load (and only two contact points), I would really like to find a way to not have to add contact points C and D. This would also ensure current was running solely across the load, and not down along its sides. First of all, why doesn't current run when there are only two contact points? Would I need to connect the circuits with a wire to complete the movement of charge? Secondly, how can I test whether current is running downwards (R1 to R3) or across the load? I need current to move across the body of water. I would really like to build two auxiliary wireless devices that don't need a wire connecting them. But I also need current to move across the body of water, not downward along its sides, ideally with two contact points. Is it similar to the way charge doesn't move when batteries are connected in series? Is there any workaround? AI: Current flows in complete loops. Charge is the time integral of current. If a current was flowing, the charge of one device would be increasing and the other would be decreasing, creating an electric field to oppose that current. You can try using the capacitance to ground/self capacitance as the return path but beware a tank of water has a much higher self capacitance than your device can, so very little of the current will flow through the other device. This is similar to how capacitive touchscreens work.
H: Total current used by a brushless DC motor Is it correct to say that 'the current' drawn by a BLDC motor is the same as the current from any single phase at a given time (assuming they are all balanced/equal in magnitude)? I came across this diagram describing the characteristic shape of a BLDC current waveform: From this diagram, it seems that the current is roughly flowing through one phase at a time, with only a tiny amount of overlap. What this doesn't look like is three sinusoidal waveforms 120° out of phase - a situation where the total current is more easily understood and calculated. What is convention here? AI: Motor line current is just the peak of any individual phase's current. Notice that in any of the six commutation steps, one phase always has no current, while the other phases have equal and opposite current (well, they should, the rounded leading edges in your diagram are wrong). This makes sense, as the phases are Y-connected so the current must always flow into one phase and out of another (in BLDC motors, one phase is always idle).
H: Using BJT NPN to drive relay coil sometimes work sometimes not I am just a hobbyist and I have a typical schematic I've always used to switch on/off relay coils. This has always worked the last 3-4 times I've used it (without R1 and C1) But this time, I can't turn the relay on at all (the transistor collector doesn't drop to GND (~200mV). If I measure the collector voltage, it starts at 5V then after some seconds it drops to 3.5V-4.5V. I'm pretty sure the few times I've used this in the past (without R1 and C1, the base is connected to a GPIO pin instead) it managed to switch the relay on when transistor is on. The only things I have changed (I think) is the introduction of R1 and C1 and Vcc 3V instead of just sending GPIO HIGH/LOW to the 1K base. I've also tried various values for R1 and C1 that I have with me. I'd like to stop guessing what R1 and C1 values I should have. Ideally I would like the relay to switch 5-10 seconds after I connect R1 to Vcc. Currently, R1 & C1 are set to 100Kohm & 220uF to give about 5 seconds. Note: Transistor is S9011 I think. Or 9013. Relay is an 8 pin 5V relay (2 for coil, 3 one side and 3 another side) - come to think of it, I've never used this kind of relay before - I've always used the 5 pin one, but this 8 pin one is the only one I have around this house. So this is also another thing has changed from my prior experience. Thanks for reading. AI: You can follow the RC circuit with an emitter follower. I'm not suggesting this is the best way, or even a good way, to get a delay of that magnitude, but it's probably the minimum change you can make without requiring a large capacitor. simulate this circuit – Schematic created using CircuitLab Disadvantages include sluggish turn-on of the relay, reducing life, temperature sensitivity (due to beta changes mostly) and poor initial accuracy. A much better way would be to drive R1 with an 8-pin micro such as PIC12F629 which will give you +/-1% accuracy without external timing components (and with power-on reset for repeatable timing regardless of off or on times). The down side is that you have to learn how to use it and buy a programmer.
H: Full Wave Bridge Rectifier vs.centre tap rectifier Why does the DC output in bridge rectifier higher than centre tap rectifier. AI: simulate this circuit – Schematic created using CircuitLab Figure 1. (a) A single winding with full-wave bridge rectifier. (b) A centre-tapped transformer with rectifier diodes. I am assuming that the centre-tapped transformer has twice the number of turns as the single-winding transformer. e.g., If (a) is a 0 - 12 V transformer then (b) will be a 12 - 0 - 12 V transformer. If you trace the current flow in (a) when the dot end is positive you will see that the current will flow through D2, out to the load via V+, back on V- and through D3 back to the secondary. Each diode will create a voltage drop of 0.7 V so the voltage out will be down about 1.4 V. You can see in (b) that when the dot end is positive that D5 will conduct and the return will be straight to the centre-tap. The voltage drop will be 0.7 V approx. The centre-tapped version is more efficient but probably more expensive to make. Note that the XFMR2 wire gauge can be lighter than XFMR1 as it only carries current on alternate half-cycles. Total weight of copper will be about the same.
H: Can someone explain how this switched circuit charges and discharges the capacitor? The switched circuit is above. I am trying to understand how the switch causes the capacitor to charge and discharge. Most of the examples I can find involve using a switch to connect a capacitor to a voltage source, charging it up until the voltage across the capacitor equals the source. Then a switch is used to isolate the capacitor from the source, discharging the capacitor. This circuit is much more complicated than that. Does closing the switch cause the current to bypass the capacitor, discharging it? AI: Closing the switch drops the voltage above R3 causing the voltage across it and the cap C1 to drop to zero, when the switch opens the cap begins charging again. The resistor R3 simply limits the current that can flow in and out of the capacitor for a slower discharge/charge. The R1 and R2 form a resistive divider to divide the voltage of V1 at point D, but R1 also limits the current from the source when the switch is closed so it's not a direct short across the source when the switch is closed
H: Can I high current charge port transfer data at the same time? I was reading about USB charging ports and how a host can tell the device what current it may draw: How do USB charging and "smart" charging ports (e.g. Anker's PowerIQ) work? Do all these "identifier" techniques occupy the data lines all the time? Is there no data transfer possible while the host is identified as a "charger"? Or is there also a solution to tell the device it can draw a higher current only at the beginning of the connection and then the data lines are freed up to transfer data? AI: USB charging ports are supplementary to basic USB 2.0 specifications. In official (USB "sponsored") Battery Charging Specifications (BC1.2) the advertising of port power capabilities occurs BEFORE any connect event occurs, so the levels of initial BC1.2 handshake are chosen to be BELOW normal initial USB signaling levels, such that the USB part of front-end transceiver won't be confused. After the BC1.2 protocol completes and VBUS capability is communicated to device, the D+/D- lines are free from the "charging signature", and can operate in accord with standard USB protocol. This is how the "CDP", Charging Downstream Port is defined, the advertising handshake happens, and then it is gone. I am not aware of any definition of "CDP" (host data ports) with proprietary charging methods/signatures, all the methods are typically meant for stand-alone chargers. At least for QC ver.2 this TI document implies that if D+ doesn't hold its special value on device side, the power interface drops down to default 5-V level. So you can't maintain QC and free D+/D- for data communication. How things are with Qc v3.0 and v.4.0 is unclear. However, if a host port supports USB 3.0+ communication, methods other than BC can be implemented, since USB 2.0 communication is secondary to USB 3.0 connection. Same goes for Type-C connector standard, which is/was quite open to possibility to have proprietary charging signatures even when Type-C has its own means to advertise its basic charging capability (at 5V level).
H: Powering Stepper Motors Using Drivers I am working on a project involving several stepper motors, I have chosen the L298N as the driver - and my system supply is a switching power supply 12V 15A. My question is, how can I connect the 12V 15A supply to the L298N? I do understand the wiring and schematics but do not understand the power input to the driver itself. I considered a buck converter but because I have 6x L298N's, I am struggling to understand how I can connect the 6x L298N's with 12V 15A Supply. It is clear 12V input is fine but 15A isn't? Any guidance would be appreciated. The data sheets are here if needed: https://www.sparkfun.com/datasheets/Robotics/L298_H_Bridge.pdf https://docs-emea.rs-online.com/webdocs/157a/0900766b8157a734.pdf AI: You are creating a problem that does not exist. You are confusing current consumed with available current that can be consumed. The IC and motors will only draw the current they need. The motors are rated to operate at 2.5 amps maximum current, so your power supply has plenty of current to spare. Its 15 amp rating is how much it can supply if all six motors 'request' that much current at the same time, which totals 15 amps (6 * 2.5). What you should do for safety reasons is put a 5 amp fast-blow fuse or a 3 amp MDL slow-blow fuse in series with each ICs power input. This way a stalled motor or shorted circuit will blow the fuse instead of burning up in a bad way, and shut down only one motor. EDIT: If you really need current limiting then: Each motor driver IC has a current sense pin which has a resistor to ground. The voltage at that pin tells you the current drawn by that motor. To avoid using a MPU and complex software, just buy a LM339 quad comparator and set its trip point for 1.5 amps (I do not know what voltage that will be, as it is determined by your sense resistor). Use a P-channel MOSFET on the power input of the IC so the LM339 can shut it off by letting the gate-source voltage drop to zero. A current sense resistor of 1.00 ohms 3 watts will give a voltage of 1 volt per amp, or 1.5 volts per 1.5 amps. The power per each IC goes through the fuse first, then the P-channel MOSFET which drives the +Vs connection in figure 6 of your data sheet. Set the LM339 to have the output go 'high' if (+) input is greater than 1.5 volts. Use a trim pot to put 1.5 volts on the inverting (-) pins. The motor control IC can be driven by any MPU with a few pins to spare.
H: How to plot dy/dx versus x of a given y=f(x) plot in LTspice? Below is a plot of a sweep which shows how Vo changes versus Vi in LTspice: How can I plot the "derivative of Vo" i.e dVo/dVi versus Vi? How can I plot the "integral of Vo" versus Vi? Edit: I was trying to see how the voltage gain for a transistor changes with input. I tried to plot -dVout/dVin versus Vin below which is the plot of voltage gain: For 10mV change in Vin causes very different gain in the middle of active region. "Change in Vin" must be around 1mV or less for a stable gain. AI: Oh, cripes. It's not so hard: Then just plot the formulas you already seem to have known about: From the above pair of curves, you can see that when the collector voltage is near halfway between the rails, that the voltage gain is about 200. Given that \$I_C=\frac{6\:\text{V}}{1\:\text{k}\Omega}\approx 6\:\text{mA}\$ and that \$A_V=R_C\cdot g_m=1\:\text{k}\Omega\cdot\frac{6\:\text{mA}}{26\:\text{mV}}\approx 230\$, there's no real shock here. Also notice the sudden demise of the voltage gain when the collector voltage plummets and the BJT enters into saturation. No matter where you position your operating point on this gain curve, with a large enough input signal you will experience an output signal that is a distorted result of that input signal because of the significant gain variations. (Temperature and part variations will also dramatically shift that operating point around, by the way.) This grounded emitter amplifier is a case where either local or global NFB is pretty much required.
H: Dealing with multiple types in VHDL I'm trying to implement this formula : $$ output = \sum_{i=0}^{N-1} (input[i] ~~ \text{xor} ~~ input[N - i - 1]) ~~ \times ~~ 2^i $$ The input has \$ N \$ bits and the output has \$ S = N/2 \$ bits. This is what I have: library IEEE; use ieee.numeric_std.all; use IEEE.STD_LOGIC_1164.all; use ieee.std_logic_unsigned.all; entity eq is generic ( N : positive := 4; S : positive := 2 ); port ( I : in std_logic_vector(N-1 downto 0); O : out std_logic_vector(S-1 downto 0) ); end eq; architecture arch of eq is begin process (I) variable total : integer; variable temp : std_logic_vector(S-1 downto 0); variable zeros : std_logic_vector(0 to S-2) := (others => '0'); begin for k in 0 to N-1 loop -- do the xor operation first and store the bit at the end of an std_logic_vector of total length S temp := zeros & (I(k) xor I(N-k-1)); -- multiply the above std_logic vector by 2^i, convert to integer and add to the total total := total + to_integer(unsigned(shift_left(unsigned(temp),k))); end loop; O <= std_logic_vector(to_unsigned(total,S)); end process; end arch; I keep getting type conversion messages. It throws this on the line with total := total + ...: Error: Near std_logic_vector ; type conversion expression type cannot be determined uniquely When I try to fix a particular type conversion, another one pops up. AI: Variables are used like constants in c, not for actual signals. Stick with integer, signed, unsigned and std_logic_vector. If you do need to translate between them then here are the functions to do that: Source: http://www.lothar-miller.de/s9y/categories/16-Numeric_Std
H: Why the place where I clear TMR0IF changes the behavior of the program? I'm programming a PIC16F877A microcontroller in C, compiling with Microchip XC8 1.44. I have set up a TMR0 interrupt for every 800 microseconds that scans through a LED matrix, lighting each 8 LED column at a time using the settings as follows: OPTION_REG = 0x04; // TMR0 prescaler (1:32) GIE = 1; TMR0IE = 1; And this is my ISR: void interrupt isr() { static const uint16_t divs[4] = { 1000, 100, 10, 1 }; if (TMR0IF) { PORTB = 0x00; // PORTB is the 8 LED column if (i) { PORTAbits.RA0 = 1; // pin that clocks CD4017 for next column __nop(); // give a brief delay just for good measure PORTAbits.RA0 = 0; } else { PORTAbits.RA1 = 1; // pin that resets CD4017 to first column __nop(); PORTAbits.RA1 = 0; } // pattern to be displayed PORTB = font[i % 8U + 8U * ((c / divs[i / 8U]) % 10U)]; i = (i + 1U) % 31U; // increment i for next iteration TMR0 = TMR0_OFFSET; // 240 for 4MHz crystal for 800us delay according to my calculations (I am bad at calculations) TMR0IF = 0; } } Basically c (for 'counter') will hold a number between 0 and 9999, and the 31 column LED matrix displays it using the data in font to draw the numbers. Now, this code works just right. But if I move TMR0IF = 0; to the beginning of the block, something strange happens: The program seems to become slow, as if the clock dropped by a factor of 100 or more, and the main program loop crashes and because of that I stop receiving the external signals that I use to increment or reset the value of c, only the ISR remains being called and keep the LED matrix lit, but flickering due to the clock drop. If I move TMR0IF = 0; to the end like in the code above though, everything seems to work normally and the world is perfect. But why? Everywhere I see code reference for Timer 0 interrupt usage people set TMR0IF = 0; right away, why is it causing all that hassle in my code? AI: The basic problem is that your interrupt code is taking longer to execute than the time between interrupts. This probably due to one of two problems: The interrupt period isn't what you think it is. The interrupt condition is actually being triggered more often than intended. You are taking too many cycles in the interrupt routine. The reason it appears to work when you clear the interrupt condition at the end of the ISR is that there is then some time for the foreground code to run before the next interrupt. However, that is NOT a solution to the problem. When you move the clearing of the interrupt condition to the start of the ISR where it should be, the ISR takes so long that the next interrupt is taken immediately when the ISR ends. No, this does not overflow the stack as another answer claims. However, it does lock out the foreground code from getting cycles. Always clear the interrupt condition right at the beginning of the interrupt routine. If using timer 0 for the interrupt period DO NOT set TMR0 to a fixed value each interrupt. Instead, add the appropriate quantity each interrupt. That way you don't lose time based on interrupt jitter latency. Also, don't use the prescaler when adding a offset into the timer. If using timer 0, either set add a offset each interrupt to get a specific period with the prescaler 1, or use only the resulting free-running period with non-unity prescaler. If you want more arbitrary interrupt periods, use timer 2. That's what it's for. I notice that you wrote your interrupt routine in C. I've seen some pretty horrible code bloat due to the C compiler not knowing what really needed to be saved, and therefore saving lots of stuff. Personally, I write PIC 16 interrupt routines in assembler. It also makes it easier to figure out what is going on in cases like this, because there is no compiler between you and the hardware. I just scanned your ISR code. You are doing divides in the ISR! No wonder it's taking longer than intended. This is a great example of why on small microcontrollers like this, compilers should never be used as a substitute for understanding the machine at the instruction level. The compiler must only be a shortcut for creating a bunch of code for you, but you still need to have a basic understanding of what that code is and what the machine has to do to implement what you ask. Put another way, you have to architect the code while thinking of the machine's raw capabilities. Once you do that, using a compiler to generate some of the actual code for you can be a legitimate shortcut. Even then, the ISR is the one routine you want to most consider writing in assembler. Go write this interrupt routine in assembler. That's not because it necessarily needs to be in assembler, but because you need to learn the machine. You have no business being here without understanding the instruction set and the other low level capabilities of the hardware. You never would have tried to do division in a ISR if you really understood the instruction set.
H: Step voltage down safely for a LED I have a 127VAC -> 24VAC transformer to power a project and I want a LED to light when my electronics is ON. I rectify it and pass through a smooth 2200uF capacitor and get a good 32VDC. I don't have the ratings for my transformer, so I don't know the max current it can output. I used some online math I found to estimate it as 1A. How is the best and safest way to get it down so I can power a single LED? I know voltage divider, but I don't know how and if I have to worry about current and if I may fry my resistors. I'm also not sure about my transformer max current, so if it is less than 1A, I'd have to do something different? Thanks. AI: Simple - assume no voltage at the LED (false, but safe) choose a resistor that will run less than the rated current of the LED at 32 volts. For an indicator, "Much less" is often fine. i.e. 20mA is almost always safe and visible. So 1600 ohms, more or less would probably be fine. (32 V / 0.020A) Check your actual part for real numbers and try to stay away from running at the limits if you want long life. Now, at 32 Volts you'd (again, making the safe but wrong assumption of 0V across the LED) be burning 0.64W (32V X 0.020 A) in that resistor, so you'd need a 1W resistor to be safe. You could either reduce the current further, which is fine so long as it's "bright enough" to your taste, or you could use 4 800 Ohm resistors in series, where 1/4W resistors would be happy. Per Dave Tweed's comments you might want to change that to 5 mA, 6400 Ohms (in my safe assumption model), and less than 1/4 W (but more than 1/8W) Either way it should have minimal impact on the supply output current, which you estimate as 1000 mA From which we are stealing 20, 5 or "less than 5" if you find that 10KΩ or 20KΩ gives you enough light. Also as commented, this needs to be across the supply, not as drawn. When running from a lower voltage supply (32 is a lot of headroom) it becomes more of an error to assume 0V across the LED, and you start to need to look at its data sheet and subtract its typical (or minimum) operating voltage from the supply voltage to get the voltage to compute the resistors for this purpose. Or, you may change to a constant-current drive scheme - but neither is really needed in this example, as the error will be fairly minor for any typical LED.
H: Relay protection when proper TVS at load cannot be implemented I'm currently developing a product which has a simple SPDT relay that can be controlled by an operator. To the end-user, only the common, normally open and normally closed contacts are available. The relay is driven by circuitry in our device, which has a proper flyback diode. Recently we had a problem with one of our prototype units where a technician connected the relay directly to an inductive load, without any sort of transient voltage suppression, which resulted in our wireless comms getting knocked out due to EMI, and probably also resulted in contact arching. After making sure the problem was due to inductive spiking, it was quickly solved by connecting a proper flyback diode to the load. While in this situation we had control over the loads we were connecting, this made me realize that I cannot trust that our end-users will actually install proper transient voltage suppression devices when using our product with inductive loads, no matter the amount of warnings and typical applications schematics that we may offer. Now, obviously there are many solutions to inductive spiking, but the particular set of situations in which this device must work is making it very tricky to implement TVS: 1) The relay is a general purpose SPDT relay rated for 250VAC/120VAC @ 10A or 30VDC 8A. This means that the TVS circuitry must be able to handle both AC (mains or not) and DC, and currents up to 10A. This makes it impossible to find a PTC fuse, since most will not handle mains voltage, specially not at 10A. 2) The device will be installed in places where it will be impossible to replace anything, and safety is a major concern for us. If the client does not install a fuse and the relay fails shorted (which is rare, but can happen), they will most probably blame us. This also means I cannot use MOVs, gas discharge tubes, or any other TVS device with limited lifetime. 3) Any TVS devices must never fail shorted, and if they do, I must make sure to protect the load against a short like that. I've tried a simulation of a RC snubber network, but these alone will do nothing with big enough inductive loads. Also, using bigger capacitors means more losses when working with AC. Ideally, 1nF would give enough impedance (above 1Mohm @ 50/60Hz) to make any losses insignificant. Here are the results of a simulation with a big inductive load. Changing resistor and capacitor values only affects the time that the oscillations take to settle down and not peak voltage, which will surely kill any resistor or capacitors, or arc the contacts. Back-to-back zeners together with a RC snubber network effectively limit the voltage spike, but since they have to block mains voltage, they'd have to block more than aprox. 350V (mains peak voltage) until they would start conducting, and I fear this is still a high enough peak to kill any wireless comms nearby with EMI. So, am I completely hopeless in this situation? Are there other TVS devices / techniques I can use in such a situation? If so, can I guarantee that they will not fail shorted, or at least that I will be able to protect against a shorted TVS device? Or is just a RC snubber actually a good solution to this problem? If so, why? And how can I select appropriate parts for this? Please remember that I do not have access to the actual load, and I cannot make any assumptions about how a user might connect the load. AI: I spent the last 15 years in the TVSS industry. You go by what UL and ISO standards call for and add labels to warn the customer that neglect or abuse can result in a voided warranty. Having said all of that, for the ratings you gave, I would ship it with a 40mm MOV which has at least a 10 kA or 20 kA 275 VAC rating, across both N.O. and N.C. connections (2 MOV's total). It will hard-clamp at 420 VAC/DC or so. A very expensive solution is to use giant sidacs, and they have a sharp roll-off at the maximum allowed voltage. 275 VAC/DC means just that, but they can cost $40 USD each. I would consider protection from the relay coil 'kickback' as well, but a diode or 20mm MOV will work ok. There are thermally protected MOV's out there (TPMOV), but not for OTC sales. Getting a third-party vendor for surge suppression would be very costly, as these products have a high labor cost. I would try the 40mm 275 VAC/DC MOV's first. They can take 15 20 kA 'hits' (over 2 hours) and still pass the 1 mA test. SNUBBERS: RC snubbers on AC circuits are not a good idea, as they allow a small amount of AC current to bypass the relay even if it is OFF. Not knowing if the end user is going to be using AC or DC means play it safe and avoid them. They cannot do what an MOV or Sidac does. NOTES: The MOVs and Sidacs only see the kickback, or surge current which is a brief spike of 20 uS or so. They do not see the normal run current as they are in a very high resistance mode. Only the relay contacts see the 'run' current. If 'inrush' current is welding the contacts, then you need a relay with a higher contact current rating. Add a 50% safety margin for long life. Use a moisture-tight relay if possible. Plants that process citric products such as orange juice have an acidic atmosphere that corrodes steel and copper quickly. Fusing: I should add that proper fusing for a 40mm MOV or large Sidac is a 30 amp 600 volt 200 kA rated fuse. They come in a box of ten for about $50 USD. they are not cheap fuses, as they are made with a hole-punched platinum strip, specific to blow on severe surges quickly, but tolerate motor start currents. You can use in-line locking fuse holders. These meet UL1449 editons 3 and 4 specs for fusing 40 mm MOVs. A link to the correct fuses: http://www.cooperindustries.com/content/dam/public/bussmann/Electrical/Resources/product-datasheets-b/Bus_Ele_DS_1023_LP-CC.pdf
H: Is there a better way to jumper 3 terminals together? I can't find terminal block jumpers for sets of 3 and 5 terminals, just 10 and 2. So I took some 2-terminal jumpers and tried to accomplish what I needed to do but it looks unsightly and seems likely to fail due to the torque induced on adjacent blocks. Is there a better way to gang three and five terminal blocks together? See picture below: AI: I always use DIN-Rail terminal blocks that have a bussing feature across the top so that I don't have to double up on the wire entry connections. Different manufacturers have both pluggable and screw down bussing arrangements. As an alternative to what you show in your photo, you can buy a comb bussbar that joins more than two at a time. Buy a 10-position bussbar and then cut to length for less than 10.
H: Operational amplifier bandwidth - why does manufacturer tell it's DC when it is not I've been working with op amp datasheets lately and i noticed strange thing with RF amplifiers specifications. I will provide one example, but there quit more of them with this manufacturer. HMC625BLP5E http://www.analog.com/media/en/technical-documentation/data-sheets/HMC625B.pdf So the description says it's "VARIABLE GAIN AMPLIFIER, DC - 5 GHz" But application schematic's show that DC blocking capacitor is required at the input of the amplifier So my questions are: 1) Why would they say it's DC when it's effectively not. 2) What would happen if i would not put that capacitor on the input? AI: This isn't an opamp (operational amplifier). It isn't even a differential amplifier. This is a radio frequency attenuator and amplifier on a chip. Why would they say it's DC when it's effectively not. Because the inputs of the amplifier and attenuator are DC coupled to the respective outputs. It could theoretically be used for amplifying a signal with a DC component, although in most (probably all) applications you wouldn't want to. The schematic you posted is just a hint, showing a typical application of the chip, it's not the only way to use it. What would happen if i would not put that capacitor on the input? It depends wholly on what you connect to the inputs and outputs. To pass the DC component in the first place you'd have to DC couple AMPOUT too (as well as ATTIN and ATTOUT if you wish to use the attenuator at DC, probably those decoupling pins of the attenuator too). Good luck doing that without messing up all the internal biasing of the amplifier, however. I doubt that it could be done, nor that this is the right tool for the job. I agree that the manufacturers are misleading here. It can't really do actual DC under practical terms, but even 1 MHz is functionally DC when compared to 6 GHz.
H: CORDIC algorithm using Verilog Here is my code to compute the sine and cosine of the input angle using the CORDIC algorithm: Design code : `define K 32'h26dd3b6a // = 0.6072529350088814 `define BETA_0 32'h3243f6a9 // = atan 2^0 = 0.7853981633974483 `define BETA_1 32'h1dac6705 // = atan 2^(-1) = 0.4636476090008061 `define BETA_2 32'h0fadbafd // = atan 2^(-2) = 0.24497866312686414 `define BETA_3 32'h07f56ea7 // = atan 2^(-3) = 0.12435499454676144 `define BETA_4 32'h03feab77 // = atan 2^(-4) = 0.06241880999595735 `define BETA_5 32'h01ffd55c // = atan 2^(-5) = 0.031239833430268277 `define BETA_6 32'h00fffaab // = atan 2^(-6) = 0.015623728620476831 `define BETA_7 32'h007fff55 // = atan 2^(-7) = 0.007812341060101111 `define BETA_8 32'h003fffeb // = atan 2^(-8) = 0.0039062301319669718 `define BETA_9 32'h001ffffd // = atan 2^(-9) = 0.0019531225164788188 `define BETA_10 32'h00100000 // = atan 2^(-10) = 0.0009765621895593195 `define BETA_11 32'h00080000 // = atan 2^(-11) = 0.0004882812111948983 `define BETA_12 32'h00040000 // = atan 2^(-12) = 0.00024414062014936177 `define BETA_13 32'h00020000 // = atan 2^(-13) = 0.00012207031189367021 `define BETA_14 32'h00010000 // = atan 2^(-14) = 6.103515617420877e-05 `define BETA_15 32'h00008000 // = atan 2^(-15) = 3.0517578115526096e-05 `define BETA_16 32'h00004000 // = atan 2^(-16) = 1.5258789061315762e-05 `define BETA_17 32'h00002000 // = atan 2^(-17) = 7.62939453110197e-06 `define BETA_18 32'h00001000 // = atan 2^(-18) = 3.814697265606496e-06 `define BETA_19 32'h00000800 // = atan 2^(-19) = 1.907348632810187e-06 `define BETA_20 32'h00000400 // = atan 2^(-20) = 9.536743164059608e-07 `define BETA_21 32'h00000200 // = atan 2^(-21) = 4.7683715820308884e-07 `define BETA_22 32'h00000100 // = atan 2^(-22) = 2.3841857910155797e-07 `define BETA_23 32'h00000080 // = atan 2^(-23) = 1.1920928955078068e-07 `define BETA_24 32'h00000040 // = atan 2^(-24) = 5.960464477539055e-08 `define BETA_25 32'h00000020 // = atan 2^(-25) = 2.9802322387695303e-08 `define BETA_26 32'h00000010 // = atan 2^(-26) = 1.4901161193847655e-08 `define BETA_27 32'h00000008 // = atan 2^(-27) = 7.450580596923828e-09 `define BETA_28 32'h00000004 // = atan 2^(-28) = 3.725290298461914e-09 `define BETA_29 32'h00000002 // = atan 2^(-29) = 1.862645149230957e-09 `define BETA_30 32'h00000001 // = atan 2^(-30) = 9.313225746154785e-10 `define BETA_31 32'h00000000 // = atan 2^(-31) = 4.656612873077393e-10 module cordic( angle, clock, // Master clock reset, // Master asynchronous reset (active-high) start, // An input signal that the user of this module should set to high when computation should begin angle_in, // Input angle cos_out, // Output value for cosine of angle sin_out // Output value for sine of angle ); input clock; input reset; input start; input [31:0] angle_in; output [31:0] cos_out; output [31:0] sin_out; wire [31:0] cos_out = cos; wire [31:0] sin_out = sin; reg [31:0] cos; reg [31:0] sin; reg [31:0] angle; reg [4:0] count; reg state; reg [31:0] cos_next; reg [31:0] sin_next; reg [31:0] angle_next; reg [4:0] count_next; reg state_next; always @(posedge clock or posedge reset) begin if (reset) begin cos <= 0; sin <= 0; angle <= 0; count <= 0; state <= 0; end else begin cos <= cos_next; sin <= sin_next; angle <= angle_next; count <= count_next; state <= state_next; end end always @* begin // Set all logic regs to a value to prevent any of them holding the value // from last tick and hence being misinterpreted as hardware registers. cos_next = cos; sin_next = sin; angle_next = angle; count_next = count; state_next = state; if (state) begin // Compute mode. cos_next = cos + (direction_negative ? sin_shr : -sin_shr); sin_next = sin + (direction_negative ? -cos_shr : cos_shr); angle_next = angle + (direction_negative ? beta : -beta); count_next = count + 1; if (count == 31) begin // If this is the last iteration, go back to the idle state. state_next = 0; end end else begin // Idle mode. if (start) begin cos_next = `K; // Set up initial value for cos. sin_next = 0; // Set up initial value for sin. angle_next = angle_in; // Latch input angle into the angle register. count_next = 0; // Set up counter. state_next = 1; // Go to compute mode. end end end wire [31:0] cos_signbits = {32{cos[31]}}; wire [31:0] sin_signbits = {32{sin[31]}}; wire [31:0] cos_shr = {cos_signbits, cos} >> count; wire [31:0] sin_shr = {sin_signbits, sin} >> count; wire direction_negative = angle[31]; wire [31:0] beta_lut [0:31]; assign beta_lut[0] = `BETA_0; assign beta_lut[1] = `BETA_1; assign beta_lut[2] = `BETA_2; assign beta_lut[3] = `BETA_3; assign beta_lut[4] = `BETA_4; assign beta_lut[5] = `BETA_5; assign beta_lut[6] = `BETA_6; assign beta_lut[7] = `BETA_7; assign beta_lut[8] = `BETA_8; assign beta_lut[9] = `BETA_9; assign beta_lut[10] = `BETA_10; assign beta_lut[11] = `BETA_11; assign beta_lut[12] = `BETA_12; assign beta_lut[13] = `BETA_13; assign beta_lut[14] = `BETA_14; assign beta_lut[15] = `BETA_15; assign beta_lut[16] = `BETA_16; assign beta_lut[17] = `BETA_17; assign beta_lut[18] = `BETA_18; assign beta_lut[19] = `BETA_19; assign beta_lut[20] = `BETA_20; assign beta_lut[21] = `BETA_21; assign beta_lut[22] = `BETA_22; assign beta_lut[23] = `BETA_23; assign beta_lut[24] = `BETA_24; assign beta_lut[25] = `BETA_25; assign beta_lut[26] = `BETA_26; assign beta_lut[27] = `BETA_27; assign beta_lut[28] = `BETA_28; assign beta_lut[29] = `BETA_29; assign beta_lut[30] = `BETA_30; assign beta_lut[31] = `BETA_31; wire [31:0] beta = beta_lut[count]; endmodule Simulation Code/Test Bench: module cordic_tb(); reg clock = 0; reg reset = 0; reg start = 0; wire [31:0] cos_out; wire [31:0] sin_out; wire [31:0] angle; cordic sub_method( .angle(angle), .clock(clock), .reset(reset), .start(start), .angle_in(32'hc0000000), .cos_out(cos_out), .sin_out(sin_out) ); always #5 clock = ~clock; initial begin $display("c r s cos sin"); $display("- - - -------- --------"); $monitor("%b %b %b %h %h %h", clock, reset, start, cos_out, sin_out, angle); #12 reset = 1; #15 reset = 0; #20 start = 1; #10 start = 0; #330 $finish; end endmodule The error when I simulate the Verilog code in Vivado 2014 is: angle is not a port failed synthesis Can anyone point out the cause of the error? AI: You forgot to assign a port direction to angle: module cordic( angle, // <<<<<<<<<<<<< !!!!!! clock, // Master clock reset, // Master asynchronous reset (active-high) start, // An input signal ... angle_in, // Input angle cos_out, // Output value for cosine of angle sin_out // Output value for sine of angle ); // Where is angle ?????? input clock; input reset; input start; input [31:0] angle_in; output [31:0] cos_out; output [31:0] sin_out;
H: Running DC DC converter at max. rated amperage I purchased a board to run an old laptop LCD screen. The description on ebay says I need a 12 V 3 A input source. I only have 12 V 2.5 A and an old laptop powersupply at 14 V and 4.74 A. I thought about using a DC DC (LM2596) converter which is rated at max. 3 A to get the laptop power supply down to 12 V. This feels like a hacked solution instead of purchasing a 3A power supply. But as I wanted to save money with this project and already have the converter I figured this maybe a solution as well. Are there any safety issues with this solution I should consider? Any reasons one should never ever do that? AI: You should not use the 12 V, 2.5 A supply as it cannot be expected to deliver 12 V at 3A reliably. Sure it might work for a while but there is a change it will slowly deteriorate (damage) when you constantly overload it like that. Indeed the LM2596 is rated for a 3 A maximum output current but loading it with 3 A also means that there is no margin. In engineering, that's always a bad thing. And here it is easily solved, get a 5 A DCDC converter. However converting 14 V to 12 V at 3 A is on the edge of what most DCDC converters can do, the voltage difference is quite small. I would examine the board which needs this 12 V, 3A and see if it has any on-board regulators. If it does I would use a couple of diodes in series to drop the 2 Volts. You will need a lot of diodes though or a few "beefy" ones as they would need to drop 2 V at 3 A which is 6 Watt. Also 12 V 3A is 36 W, which is a lot of power. The board might actually use a lot less power but you would have to measure that to confirm.
H: Can Crystal Oscillators fail? I am building a MCP2200 breakout circuit getting reference from the guide by Microchip itself MCP2200 Breakout Board and I tried with two MCP2200 ICs but it doesn't get detected by the PC. I salvaged a 12MHz Oscillator from an old Arduino Mega board using CH340G IC which didn't work for some reason. I checked out this post MCP2200 doesn't work everytime and tried to increase the capacitor values across the oscillator pins but still no luck. So my assumption is the oscillator is not working. Could it really be? As a crystal oscillator is a simple circuit as follows; I tried measuring the voltage values across osc pins and they were 0.17 V. Could overheating with hot air damage the crystal? AI: First what you show is just a quartz crystal and not an oscillator - an oscillator is a complete circuit which you supply with some voltage and which will give you a clock output on another pin. A quartz crystal is also not a simple circuit, what you have shown is the equivalent circuit used to simulate and describe crystal properties. It is a piezo-crystal, depending on the type it is either a ceramic or quartz crystal. Usually a ceramic one will be labeled ceramic resonator. Both of them will be a mechanical beam or some other form and resonate at the specified frequency. Piezo materials will loose their property when heated beyond the Curie temperature of the material, so overheating is one form to make crystals fail. Piezo materials usually also are brittle so they are susceptible to mechanical shocks which can break them. If you have in fact just a crystal and not a complete oscillator, then the layout of the circuit plays a critical role as well. Parasitic capacitance can influence the circuit in such a way that it won't start oscillating. Selecting the correct load capacitance can be a bit of a hassle. Measuring with a multimeter is completely pointless as you cannot see anything of the oscillation. You also can't judge the amplitude as typical multimeters measure maybe up to 100 kHz or something and not 12 MHz. You need to use an oscilloscope. Measuring without low capacitance probes (< 1 pF) will change the circuit so dramatically that you measure something completely different when you put your probe there. With normal probes you can just measure the output of the buffer - but that is commonly internal of the chip. Do you even have load capacitors? On ceramic resonators they are often built in (3 pin devices) on quartz crystals they are often not (2 pin devices) if you don't have them, it won't work.
H: Buck converter stops working with higher power I'm developing a buck converter. I need to to change its supply from 9 V to 12 V. I also need to get more power in it (up to 10 A). I do it by reducing the load resistor. Here is my circuit: Note: the low-side mosfet does not have an active role here, but I need it for later development. My problem is that when I try to gradually increase the voltage from 9 to 12, everything stops working at around 10 V. By stops working, I mean no PWM anymore, a lot of noise, and then no voltage at all at my probes. Here is a picture of the voltage at the gate of the high-side mosfet (yellow) and source of the high-side mosfet (pink) at 9 V, when everything is still more or less working. Theoretically, all my components are able to handle a voltage of 12 V. Here are the datasheets: Mosfets Capacitor Inductor I tried varying the output capacitor value, but it didn't seem to have any impact at all on my problem. When I decrease the load to smaller values, on the other hand, the circuit stops working with smaller voltage already. That's the reason I think it's less an issue of too high a voltage and more a problem of too high a power. I searched for stability checks and calculation for buck converters, but all I found is literature about the stability of the converter in a feedback control. I do not have such a thing yet, my PWM is fixed. Plus, my output capacitance is pretty high, specifically to avoid problems with So, here is my question: Why does my buck converter stops working when I try to transfer more power through it, although all elements are supposed to be able to handle it, and I shouldn't have a stability problem per lack of feedback? Edit: I also wasn't able to reproduce the problem in LTSpice AI: I suspect that your inductor's core is saturating. You have an inductance of 1 mH and a switching frequency of 100 kHz and this tells me that you might be at the point when all the energy put into the inductor is not being delvered to the load per switching cycle i.e. you operate in CCM (continuous current mode). Operating in this mode is fine but as you increase your supply voltage the average current in your inductor can rapidly increase and saturation of the core follows. When this happens the inductance falls to a very low value and creates the likely problems you see. Another point; operating the MOSFET as a source follower DOES NOT make a very efficient buck regulator and that MOSFET will get hot and the whole point of a buck regulator is that it is an efficient design on load. Look at the pink trace - you are only getting a peak of 5 volts coming from the source - a decent design would be close to Vin or 9 volts as per the scope picture.
H: Power supply architecture for energy metering IC (HLW8012) HLW8012 datasheet (mostly Chinese) Website with english info I am developing a product which requires energy measurement of two different phases. I am planning to use HLW8012 energy metering IC which has this application circuit: In this circuit, GND is referenced to 220 VAC on 1 milliohm shunt resistor. Since GND is referenced to 220 VAC, the circuit uses NEUTRAL line on V2P for sensing voltage. Q1) Can I reverse these two things? - I want to use GND referenced to NEUTRAL and use LIVE (220 VAC) line on V2P for sensing voltage. (please refer to the circuit below): Q2) As mentioned earlier, I need to measure energy on two different phases (neutral line is common for them). I want to keep total circuit size small. Can I use same power circuit to power both circuits as shown below: Details - Power supply circuit will be non isolated type with neutral connected to GND. Note: R8 (1K) is my shunt resistor. Actual value will be 1-2 milliohms. Note: R17 (1K) is my shunt resistor. Actual value will be 1-2 milliohms. AI: The important thing to remember in this design is that "live" (the hot wire) is also ground to the circuit: - Live directly connects to the shunt resistor and this means that live is also GND (0 volt reference) for the chip. You can swap incoming live and neutral connections and it will still work but now neutral becomes the 0 volt reference for the chip. So, providing you design the "power supply" section to respect the reference 0 volts for the circuit you are fine. If you choose neutral as the reference you can utilize this design to measure power in two (or more) phases providing you connect the current shunts to a star point at neutral. You should also be able to use a common "power supply" section but, because I don't read Chinese, I have some doubts about chips input common-mode range for the shunt differential inputs. I would be cautious here.
H: Swapping Components and Reversing Polarity I am having 2 DC motor, 2 Positive terminals & their negative Terminals. I want to build a circuit with 2 toggle switch so that when I toggle Both... It swaps the Motor and Change their polarity. That means Before Toggle, Motor-1 Left: +ve1 Right: -ve1 Motor-2 Left: -ve2 Right: +ve2 After Toggle, Motor-1 Left: -ve2 Right: +ve2 Motor-2 Left: +ve1 Right: -ve1 I added an example so that it is easy for others to understand what I want. I tried to build the circuit but failed. Please Help. AI: Strange and confusing set of requirements, but whatever, that is not for me to judge. You can do it with two break-before-make 2P2T toggle switches simply enough. simulate this circuit – Schematic created using CircuitLab
H: Dangers of ESD wrist wrap / mat / ground Plug Adapter in an Apartment building? I would like to know if there are any dangers when we are using a wrist wrap connected to an ESD mat that is connected to ground on the wall socket in an apartment building. Lets imagine that in your above neighbor something shorts and releases all the current to the ground cable, and between him and the earth is my flat and the socket that I am using with my ESD mat..... or even, other scenario, like a thunderstorm and some lightning hits a roof rod and all that charge goes down the building and once again I am somehow in the middle.... Is this even possible to happen? Should I worry? Is there anything I can do about it? AI: Yes, you are potentially in danger whenever your body is connected through a low impedance path to earth ground. They key point is low impedance. You should check that your wrist strap includes an high value resistor (1 Mohm, typically). There are models which don't include that resistor: they are made to be used in environments where the high impedance is provided by another part of the grounding system, and they are not to be connected directly to earth ground wires. See this other thread (@AlmostDone has posted it as a comment, but it is better to include the reference in this answer, so that it doesn't get lost). In particular see my answer in that thread and browse the references I made there.
H: How does a DC generator vary power output to suit load I am working on an project where I intend to install a bicycle DC generator to power a set of LED strip lights. The specific product I will be using is the Pedal-A-Watt permanent magnet generator which is capable of output around 400 W of power. For the sake of my question let's assume that I will have 100 W of lighting load with additional an 50 W lighting load being switch on by a relay if a certain condition is met. My setup will be as follows: DC Generator -> 12 VDC Voltage Regulator -> 12 VDC /120VAC Inverter -> LED Driver/Power Supply -> LED Strip Lights. My concern is that the the motor can output significantly more current than the lights will require. I realize the load dictates the current being drawn from the generator, but if someone is pedaling hard and determined to max out the generator, will they be able to overcome to counter torque cause by the magnetic fields inside the motor and fry the lights, inverter, and/or power supply? If no, why not? I should add that my field of expertise is not electronics and thus I would like to use off the shelf products as much as possible. Thank you in advance. AI: My concern is that the the motor can output significantly more current than the lights will require. I realize the load dictates the current being drawn from the generator, but if someone is pedaling hard and determined to max out the generator, will they be able to overcome to counter torque cause by the magnetic fields inside the motor and fry the lights, inverter, and/or power supply? If no, why not? If you realize that then you already know the answer. Rather than speaking in riddles I'll give you the answer black on white. A DC acting as a generator is not a current source. It is a voltage source. Here's the difference: See what happens when I increase the resistance of the load. For the current source it goes bad (imagine if there was no resistor => you'd see sparks across the terminals of a DC motor), perhaps in a way you think. With a voltage source the current is lowered. To, as you were saying, dictating the current being drawn. The DC generator can't force current into the load because it is a voltage source. Like a battery (with a very noisy output). If you can buy that your load will work with batteries, then it will work with a DC generator. Here's some extra information for you, if you take a DC motor and short its terminals and try to rotate its shaft, then you will feel that it's harder to rotate than if the terminals wouldn't have been connected at all. Let's take the pedaling in different angles for an example with the same gear. If you are pedaling up-hill, you are putting in much energy to push yourself forward. If you however are pedaling on a straight ground or even tilted down-hill then you will feel that you won't have to put as much energy into the pedaling. It gets much easier to pedal right? The same thing happens for the DC motor if you put a load across it vs no load at all. Same thing happens in a car, there's a generator there as well. Let's say you're using a custom 10 W amplifier for listening on radio non-stop. Then the generator will drain 10 W mechanical power + losses. To quote you which is the correct answer, the load dictates the current being drawn from the generator.
H: Gain not containg the output, non ideal, resistor I was working a mathematical model of a non ideal op-amp circuit and I saw a slide in the following presentation: The question I have is the following: Why does the close-loop gain \$\frac{\text{V}_\text{o}}{\text{V}_\text{i}}\$ not contain de resistor \$\text{R}_\text{o}\$? AI: Why does the close-loop gain Vo/Vi not contain the resistor Ro? For this reason: - The only problem Rout gives is the ability for the op-amp to deliver current to a connected load. An op-amp might internally have 100 ohm resistance built into its output stage in order to protect it from extracting too much current and overheating it yet, we do not need to consider that internal resistance. What is the difference here - the open loop gain is still determined by R2 and R1 and even under light/moderate loads it will be the same.
H: Inverting buffer - simple circuit, weird problem i want to make a unity gain inverting buffer. It's usually done by placing 2 equal resistors - in this case R1 = R2 = 47k. I wanted to simulate it in LTSpice and something is definitely wrong. Is this simple circuit designed bad? thanks AI: The LT1115 is not intended for unity gain (+ or - gains) and will oscillate when used this way. Luckily the sim model responded as the real device does. Read the following extract from the data sheet on page 7 under applications information: - The LT1115 is a very high performance op amp, but not necessarily one which is optimized for universal application. Because of very low voltage noise and the resulting high gain-bandwidth product, the device is most applicable to relatively high gain applications. Thus, while the LT1115 will provide notably superior performance to the 5534 in most applications, the device may require circuit modifications to be used at very low noise gains. The part is not generally applicable for unity gain followers or inverters. Note also the phase margin falling to zero (oscillatory condition) before open-loop gain drops to unity: -
H: supply power factor of a residential transformer A transformer winding is generally more inductive than resistive thus there is a considerable phase difference between voltage and current, so wouldn't the supply power factor be very very poor in case of residential transformers where no means for power factor corrections are used? AI: Unloaded transformers look like inductors. However, a resistive load on the secondary makes the primary look more resistive too. For any decent transformer, the primary looks mostly resistive when the secondary is loaded with a resistance near the power limit of the transformer. So the power factor is very poor when a transformer is drawing little power, and gets better as the power increases. Fortunately, you care more about the power factor at high power levels. All that said, the grid does generally look partially inductive. Large industrial motors generally present a more inductive power factor than that added by typical transformers. Large electric customers that pay extra for a low power factor usually have a system of compensating for the inductive power factor. This is usually banks of capacitors that are switched across the power line to cancel out the inductance.
H: Do I need a Schottky diode as a flyback diode with PWM @ 30khz? I use a regular diode (1N4007) as a flyback diode for a 250ma 5v fan. My transistor is a 2N 3904 and the PWM generator is an attiny85: I use this one because originally I was switching the PWM signal at low frequency (<1000hz). I was able to ear a high pitch noise because the PWM signal was in the audible range. I decided to raise the PWM signal to 30khz. It seems to be working fine, I don't have a good scope to see the signal and most importantly, I can't hear the high pitch switching sound anymore. But after watching the video from afrotechmods (https://www.youtube.com/watch?v=LXGtE3X2k7Y) he says that we need a Schottky diode when we are switching at >1khz. Should I de-solder my diode and replace it with a 1N 5817? Thank you AI: Yes, you should really use a diode with fast reverse recovery. A Schottky is a obvious choice at this low voltage. Schottkys have effectively instant reverse recovery for your purpose. The lower forward voltage of the Schottky will also cause less backwards EMF on the inductance during the off time, making the overall system more efficient. I see there is some discussion about comparing the PWM period with the reverse recovery time. This is not really relevant since with fast enough PWM the diode is forward-conducting during the whole off interval. The recovery time issue occurs at the start of the on time. Until the diode turns off, it looks like a short across the load. This is bad for the switching transistor, bad for the diode, and wastes a lot of power. I saw a case once where the switching transistor got blown out because a slow recovery diode was accidentally installed in a motor driving application.
H: reluctance of the transformer windings are the reluctance of both the transformer winding same? if that's so ? how ? because reluctance = effective length of wire/ (permeability X area ) , so is this ratio in both the sides always the same? AI: I've altered this answer because it was getting down voted and the only reason I can summize is that the embedded picture was too small to read so I've taken the main points and re-written them below. Windings don't have reluctance - the magnetic core that a transformer (or inductor) is made from has magnetic reluctance. It's a bit like ohms law but for magnetics. Ohms law is resistance = volts/amp whereas for a magnetic core, Reluctance = ampere-turn/weber So if you have 1 amp passing through ten turns producing 1 weber of magnetic flux you have a reluctance of 10 turns per henry. Yes ampere-turns per weber reduce to turns per henry. because reluctance = effective length of wire/ (permeability X area ) Reluctance is also the length of the core divided by magnetic permeability and area of the core. The only consideration of wire length comes when you make turns
H: Shim to make PCB section thicker For my latest product, I have designed a USB ESP8266 dev kit for hobbyists (http://rxtx.weebly.com). The theory is that it fits into a USB-A plug directly through the PCB - hence why I am gold plating the traces. But I noticed in several other posts that the PCB needs to be at least 2.0mm thick, but PCB houses charge a lot for that thickness - thus why I am sticking to 1.6mm. To compensate for this 0.4mm thickness, what kind of shim would I need - I only need it to cover an area of 10mm by 8mm and it won't be in contact with any rails - plastic, but which kind? Where could I source it cheaply? The PCB material is FR-4 (ShengYi Tg140). Also, can you advise me on what glue type to use as I am new to adhesives? Thanks in advance! AI: This is an XY, but I'll still attempt to address the question itself. To increase the thickness of a 1.6mm board to 2.0mm required by USB (although it probably doesn't need it) in prototype-scale, attach a PVC shim to the underside of the board. Use McMaster 87875K72 and a guillotine-style paper cutter to cut strips, then cut further into squares. Fasten them to the underside of the PCB with CA glue. An alignment jig will help, and the whole process will take easily under an hour. I can see you hitting upwards of 10 boards/min once the jig is set up.
H: Why the current entering and leaving the battery in an electric circuit needs to be same? When somebody applies Kirchhoff Laws to the circuit consisting more than two batteries, the current leaving the battery is as same as entering the battery. I have no problem understanding the circuit consisting of only one battery due to charge conservation. But if there are more than one battery, the current entering and leaving the battery doesn't need to be same. Total charge could be divided in a such way that more charge ends up in one, less charge in other. But the total charge could be conserved again. For example, the image applies Kirchhoff law in which the leaving and entering current for each battery is the same. One example here: http://www.physicsandmathstutor.com/a-level-physics/finding-current-circuit-using-kirchhoffs-laws/ AI: There's the usual, droll electronic laws answer. But I'll take a different perspective that I think gets the point across more deeply. Take a capacitor. You know that it can store charge, right? So, given your thinking process, you might then imagine that the current on one of the terminals can be different from the current at the other terminal of the capacitor. And you might ask, why must it always be that the current goes through the capacitor instead of having current X leaving the left terminal of the capacitor and current Y entering the right terminal of the capacitor, where \$X \ne Y\$. Right? I mean, you would think this could possibly happen? Not usually. Just possibly? Or, perhaps, that we might set up two capacitors in series (like your batteries) and where you would imagine that one of them could have a different current in it than the other one. One could "build up charge" so to speak, you might argue. Yes? No. Sometimes, it is very hard for people to realize this. But the force acting between two charges is huge. Not just big. Not humongous. But unimaginably huge. The effect is that matter in nature is essentially neutral. At all times. Ionization does occur. But it is ever only for very small numbers of charges. Let's take your two batteries. They are separated, let's say, by a distance of \$10\:\text{cm}\$. They are each \$10\:\text{cm}\$ wide, too. So the mean distance between their centers is \$20\:\text{cm}\$. Let's say that the current leaving and entering one of these batteries is \$1\:\text{A}\$ and the current leaving and entering the other one (in series, as you say) is \$2\:\text{A}\$. Then it must be the case that a charge differential is building up between them, based up the missing \$1\:\text{A}\$ that is accumulating into one of these batteries. (Keep in mind we are assuming magic batteries here that can actually manage to keep and hold a lot of charge.) How long might you wait until the force acting between these two batteries is 2000 lbs, or one ton!! Well, it's \$20\:\text{cm}\cdot\sqrt{\frac{8900\:\text{N}}{k_e}}\approx 200\:\mu\text{C}\$. At the differential rate of \$1\:\text{A}\$, this would take about \$200\:\mu\text{s}\$. In that short time, assuming magic batteries here, you'd already have an incredible force acting between those batteries. In reality, that of course does not happen. There can be moments when things are not exactly in balance. But these are for very short moments while charges redistribute. The universe needs pretty much everything in it to be relatively neutral. Gravity on the other hand is pathetically weak. You can accumulate a lot of mass before any serious force occurs. But with electric charges?? WoW! No way. Everything stays pretty much neutral pretty much all the time. At least, on Earth. So why do all the currents summing into a node have to equal all the currents exiting the same node?? Because if that didn't happen, it would take no time at all for the circuit to be literally attracting nearby planets towards us.. or perhaps repelling the Earth from the sun at a fast pace. It would be cool, I suppose. That kind of power would be nifty to possess. Rocket ships would be trivial to launch. Just turn on the current for a little bit and whoosh!! Up into space they'd go. Life would be so much different. But then we'd probably not be here, either.
H: How i can use the same audio jack for input line and headphone output I have an audio circuit that can record and play audio (saw schematic). I have a DAC and a class D amplifier for playing audio through headphone but i wanted to try to use the same audio jack for record audio from smartphone or PC. Just, i don't know really I can use the same audio jack for output (when playing record) and input (when i want to record) ... Can I connect headphone output to the class D amplifier and the same line on the ADC input but I need to protect the class D amplifier during recording ? If i put some diode this is ok ? Or maybe, i can create a switch with some resistor for protecting the amplifier ? Do you have some ideas where i can start looking ? simulate this circuit – Schematic created using CircuitLab Thank you all ! AI: You can, just make sure that the input to your ADC (or whatever) is compatible with the impedance of the amplifier. If not you could use a relay or other switch, and switch the audio lines of the connector from your amp to your ADC. Like this circuit, but one could be your ADC for input and the other part of the switch for your amp. Source: Kbarret Another way is to probably use a 4 line audio jack and a splitter
H: Acceptable Silk to Solder Mask Clearence I am running DRC in Altium Designer and Im getting tons of "Silk to Solder Mask Clearence" Errors. I searched for acceptable values, but without luck. Altium is set to 10mil. I have most values around 7.5mil. Sometimes its even not possible to reduce, for example with an LQFP100 package. What would you suggest me? AI: Allowed clearance between silkscreen and soldermask is usually not an issue, but when it is it's determined by the capabilities of your manufacturer. Ultimately the goal is to keep silkscreen ink off of the pads. I generally set my clearance to 0 mil but specify in the fabrication notes that there cannot be any ink on any land, and the supplier may remove conflicting silkscreen at their discretion. Specifying 0.005" (0.127mm) will probably be more than good enough. 0.010" (2.54mm) is ridiculous for a lot of boards, and can be dropped down significantly.
H: What are the part numbers for PCI-E 8-pin and 6-pin power connectors? https://upload.wikimedia.org/wikipedia/commons/a/af/PCI_Express_Power_Supply_Connector-female_PNr%C2%B00438.jpg I believe they are Molex Mini-Fit series but I can't find the exact match. Thanks. Found an old thread. It points to some no-name connector, which is nice but I need a part I can specify in a design... AI: The 6-pin versions are: 45558-0003 - (*) Molex Mini-Fit JR, PCIe Applications, Right-Angle, 6-pin Header 45718-0002 - Molex Mini-Fit JR, PCIe Applications, Vertical, 6-pin Header 45559-0002 - Molex Mini-Fit JR, PCIe Applications, 6-pin Receptacle The 8-pin versions are: 45586-0005 - Molex Mini-Fit JR, PCIe Applications, Right-Angle, 8-pin Header with polarisation link. Vertical header part numbers unknown. 45587-0004 - Molex Mini-Fit JR, PCIe Applications, 8-pin Receptacle with polarisation link. (*) The original part number was 45558-0002 part has been superseded by 45558-0003.
H: Formula for ohms in speaker chain What is the formula to calculate how many ohms your speakers will put on a power amp? For example two 8 ohm speakers daisey chained together AI: Series connection: \$ R_{total} = R_1 + R_2 \$. Two 8 Ω speakers in series -> 16 Ω. Parallel connection: \$ R_{total} = \frac {R_1 \cdot R_2}{R_1 + R_2} \$. Two 8 Ω speakers in parallel -> 4 Ω.
H: What is "recovery time" on CY74FCT191T datasheet Looking through TI's CY74FCT191T datasheet I found this line : \$t_{rec}\$ recovery time | #PL after CLK↑ | 4.5 ns I hesitate between two interpretations of this line, #PL loading data during it's falling transition : #PL shouldn't fall counting 4.5 ns from the CLK rising edge #PL shouldn't be low counting 4.5 ns the CLK rising edge How to interpret this datasheet line ? Or in general, what does recovery time means in IC's datasheet (not diode reverse recovery time) AI: What does recovery time mean in ICs datasheet? In this case we are talking about data latches that latch data on the rise or falling edge of the CLK for that section. They indicate that /PL will only function if those time boundaries are met. /PL stands for Parallel Load, which is asynchronous to the clock 'CP'.They indicate the time for rising /PL recovers to allow a new CP, or clock pulse. That is /PL must be high for Trec time before a new clock pulse, or data output is unknown. Also a data change when clock is changing could result in ambiguous data, a 'metastable state', so they are giving you the 'window' width in nS in which /PL will not work correctly. They are actually telling you not to do a parallel load during this window when the CP clk might also be changing the count value. It is in effect a 'keep-out' window. Do not use CP inside this window of 'n' ns when /PL is low. HINT: This IC counts on the rising edge of the clock 'CP', so you can use the falling edge to enable the /PL signal. This way they will not collide at the same time. A simple OR gate would work. By the way, the /PL signal overrides the CP clk, so it is up to you to decide which function is most important while the clock is running.
H: Convert 4.11 (integer.fraction) to float32 Im getting a value from a register (SRCx_RATIO) from a SHARC DSP, the datasheet says: I'm using the following code to convert the value: // Convert the sample rate ratio to a float from 4.11 format. int_part = (((src_reg >> 14) & BIT_0) * TWO_POW_3) + (((src_reg >> 13) & BIT_0) * TWO_POW_2) + (((src_reg >> 12) & BIT_0) * TWO_POW_1) + (((src_reg >> 11) & BIT_0) * TWO_POW_0); frac_part = (((src_reg >> 10) & BIT_0) * TWO_POW_MINUS1) + (((src_reg >> 9) & BIT_0) * TWO_POW_MINUS2) + (((src_reg >> 8) & BIT_0) * TWO_POW_MINUS3) + (((src_reg >> 7) & BIT_0) * TWO_POW_MINUS4) + (((src_reg >> 6) & BIT_0) * TWO_POW_MINUS5) + (((src_reg >> 5) & BIT_0) * TWO_POW_MINUS6) + (((src_reg >> 4) & BIT_0) * TWO_POW_MINUS7) + (((src_reg >> 3) & BIT_0) * TWO_POW_MINUS8) + (((src_reg >> 2) & BIT_0) * TWO_POW_MINUS9) + (((src_reg >> 1) & BIT_0) * TWO_POW_MINUS10) + ((src_reg & BIT_0) * TWO_POW_MINUS11); // Return the value to be used. *ratio = (int_part + frac_part); The defines are: // Power of 2 converstion used with 4.11 to float conversion. #define TWO_POW_0 1.0F // (2^0) #define TWO_POW_1 2.0F // (2^1) #define TWO_POW_2 4.0F // (2^2) #define TWO_POW_3 8.0F // (2^3) #define TWO_POW_MINUS1 0.5F // (2^-1) #define TWO_POW_MINUS2 0.25F // (2^-2) #define TWO_POW_MINUS3 0.125F // (2^-3) #define TWO_POW_MINUS4 0.0625F // (2^-4) #define TWO_POW_MINUS5 0.03125 // (2^-5) #define TWO_POW_MINUS6 0.015625F // (2^-6) #define TWO_POW_MINUS7 0.0078125F // (2^-7) #define TWO_POW_MINUS8 0.00390625F // (2^-8) #define TWO_POW_MINUS9 0.001953125F // (2^-9) #define TWO_POW_MINUS10 0.000976563F // (2^-10) #define TWO_POW_MINUS11 0.000488281F // (2^-11) #define BIT_0 (1 << 0) Anyone knows a better way to get this value? AI: The other answers already showed how to do it by hand. The C math library on the other hand has an obsure and rarely used function to do just what you need: float convert (uint32_t register_value) { // extract field from register: uint32_t ratio = register_value & 0x7fff; // interpret as float with the exponent -11 applied: return ldexpf (ratio, -11); }
H: Driving a 6V relay from an 3.3v GIO pin of Raspberry PI3 I want to drive this 6v relay (RT314F06) from a 3.3v output gate of an GIO pin of a R-PI3. --edit-- There is already this answer on SO, but it is incomplete in the way that it does not tell which discrete components to use. I my case this is important since I'm too novice to decide which components to choose myself. --edit-- Given that I have also a 6v power-supply, what component should I use to upshift the 3.3v to 6v? The relay requires 6V and has an internal resistance of 55 Ohm. So, if I am correct, the driver needs to be capable of driving about 100mA. Can I use a converter like this? I think it can shift only to 6v and I can't find how much current it can drive. Thanks for the advice. AI: The item you linked in your question is a logic level converter and so this would probably be unsuitable as it wouldn't be designed to work with currents around 100 mA. The simplest implementation I can think of is this: - It shows a 5 volt supply and relay but this will work with a 6 volt supply and relay. D1 is there to "catch" back emfs from the relay coil when you turn it off (MCU out = 0). Choosing the base resistor at 1 kohm ensures that the transistor properly turns on when the collector load is only 49.5 ohms (55 ohm - 10%). The 2N2222 has a current gain guaranteed to be 100 at a collector current of 150 mA hence, with about 2.5 mA flowing into the base, the collector could deliver 260 mA should the load be much lower resistance. In this configuration I would expect the transistor to fully turn on to less than 0.5 volts and properly operate the relay. Short story: You need to drive the BJT's base with enough current and choose a transistor that is rated for a decent hFE at currents in excess of 100 mA.
H: The reason of ripple on output of isolation amplifier You can find schematic below. I have seen ripple (apapproximately 184mv) on output of isolation amplifier so I can not read output voltage of amplifier on my ADC. What is the purpose of ripple on output of isolation amplifier? Do you have any advice for it? By the way, I added 1k resistor to schematic. It's for high voltage. This situation has no effect on the problem. You can find datasheet of AMC1301 in here: http://www.ti.com/product/AMC1301 AI: I have seen ripple (apapproximately 184mv) on output of isolation amplifier so I can not read output voltage of amplifier on my ADC. If the voltage input of the isolation amplifier has differential ripple then this will be seen at the output. Alternatively, if the input has a common-mode voltage ripple (affecting Vin+ and Vin- equally) then you might see this on the output Vout+ and Vout- equally however, you are not using Vout- in your circuit so you cannot subtract the ripple from the signal. It is recommended that you use a differential measurement on the output of this isolation amplifier. Read the data sheet; it shows that the isolation barrier is likely performed by capacitors and these will pass common-mode AC frequencies through to the output: - All the recommended application circuits show a differential output connection like so: -
H: Safety with wireless MCUs with internal ROM I read that the ESP32, as long as other MCUs like CC3200, they have an internal ROM not user accessible and usually not open source, used to initialize the device, if I am correct. This means that mine code starts after the ROM initialized everything and give the control to the bootloader+application in flash (external or internal to the device). Now, if one get really paranoid, is there a threat in using a communication system with some software that is not known? How can one be sure that there is no spy software or not documented backdoor, like it was to be the case in some HDD in the past, from the NSA scandal? I also know that this apply to any non open source system, so any phone or computer could have such issue in a way greater order of magnitude. I would like to know just out of curiosity, and I am not at all a security expert. AI: Well, you can't. Simply too many places to hide it. What you can do is look at its external communications and see if there's anything unexpected there. Maybe take a look at your supply chain. It's possible, but expensive, to dismantle a unit and reverse-engineer its ROM contents to look for suspicious programs. Or entire other hidden processors. But that only tells you about the one you dismantled.
H: Cant get a grasp on how a full bridge on IR2104 works I'm trying to build a full bridge DC motor driver on two IR2401 using an Arduino Motor Driver Shield as a reference. It is recommended (if i understand right) to drive this kind of circuit as follows: put a HIGH at [!SD] to enable the circuit and PWM at [IN], where PWM duty cycle will set the duty cycle of upper or lower FET in a half-bridge. Now when I try to combine it to form a full bridge - here comes trouble. If I understand right, there will be a moment in circuit's operation, when the opposite direction FETs will be toggled, so my motor will basically be braking a certain percentage of time. The bridge is powered by booster circuit, so FETs don't need bootstrapping. For example, if I want to turn the engine ON to 20% of power I will send a 20% PWM to the upper IR2104 and 80% PWM to the lower, this way it will open corresponding FETs (Q6 and Q7), but at the other PWM's half-period there will be Q5 and Q8 opened, effectively setting the motor to a counter-rotation mode. Is there any logic in this opearation mode for this circuit or I'm misleaded in some way? Pic 1: Normal operation, simple logic LOW on the "B" side, PWM to control power on the "A" side. EDIT: Added an explanation of my concern, added a note about the booster circuit Pic 2: Motor winding short circuit when PWM goes to negative half-period. AI: If you operate the H bridge as you describe then yes, your motor will be reversing. The sensible approach is to use one half of the H bridge for PWM and the other half with logic levels that switch either the top or bottom MOSFET on for the duration of rotation in the direction you wish to go. In my innocence on this subject of PWM switching I raised this question (a few years ago) that you may find useful to read. If you still want to have full PWM on both halves, you have to consider that the 50% PWM scenario is the "motor-stopped" situation.
H: arduino/raspberry based current and voltage monitoring using Rogowski coil I am working on a project to build a current and voltage monitoring device (3 phase) using rogowski coils as sensors. It seems that usually CT are used with raspberry or arduino so I would like to have your opinions: using Rogowski coils, what kind of ADC/integrator (or integrating ADC) do I need (are there different types)? Concerning ADC: can I make/program one myself or is it best to buy one? Thanks in advance! cheers AI: I need the R-coils to measure current in buildings, so I need to be able to just clip them around the phases without removing the cables So, why not use a CT with that clip-on clip-off facility. They are made and available: - I would like to have your opinions: using Rogowski coils, what kind of ADC/integrator (or integrating ADC) do I need (are there different types)? I think that given a regular CT should be considered, this question is now irrelevant. There are plenty of ADCs but, if you really want to use a R-coil then you will need a linear integrating circuit like this: - Choose R1 to be bigger than 330 kohm to ensure that it doesn't have an effect at 50 Hz - possibly 3.3 Mohm. Or make C1 something like 100 nF.
H: Does the output voltage depend on the resistor? If I have the function for the output voltage between node 1 and node 2 that is dependent on the input voltage, does R2 play a role in the function or is the output voltage just the Voltage over L1? Don't mind the actual values of the parts, it's a general question Thanks. simulate this circuit – Schematic created using CircuitLab AI: If there is an open loop between node1 and node2, no current flows through R2 resistor so there will not be a voltage drop across it and the voltage between the nodes is equal to the voltage across L1. For instance, most of the voltmeters do not conduct current and form an open loop due to their high resistance. But if there is a current flowing between the node 1 and 2 then there will be a voltage drop on R2 resistor and the output voltage is not equal to the voltage across L1.
H: Does ST have a separate Cortex M4F series or are its M4 parts essentially M4Fs? ST's website does not use the term M4F. Also there is no filter for Hardware Floating Point Unit in parametric search so I guess ST includes floating point unit in all M4 parts. AI: Yes all Cortex M4 from ST include a floating point unit and are thus essentially Cortex M4F. Other manufacturers do this differently. Like pointed out in the comments there is Microchip with the SAM4C has a dual core implementation where one has a FPU and one has not. So keep looking when you change to a different manufacturer.
H: Isolation capacitor I am creating a 24V switched source. The GND of the transformer primary must be isolated from the GND of the transformer secondary, I read that a capacitor must be used to isolate the GND's. Does anyone know how I can calculate the capacitance value for this capacitor? AI: A floating secondary with high CM noise from leakage capacitance across the transformer can interfere with high impedance circuits or long transmission lines (ethernet). So one method of reducing this noise and still avoid ground fault line voltages is to determine a shunt capacitor to bypass coupling capacitance leakage from primary to secondary. The IEC/UL limit on safety leakage current ~ 0.21mA (including Line filter*) at line volt/freq. using L=N to Gnd measurements at line voltage. You want to shunt the CM noise at >SMPS f + harmonics so the transformer coupling capacitance* must be low in order to minimize the shunt cap to gnd yet give high CMRR. So effectively line voltage is isolated but RF noise on secondary DC Common Mode(CM) is shunted to earth ground. Can you compute this? What do you get? *make some assumptions There is a simple method for a "ballpark value". (hint) Ohm's Law for Caps. I(f)=V(f)/Zc(f) simulate this circuit – Schematic created using CircuitLab
H: Estimating the frequency at which your microcontroller is running I have recently started programming an ATtiny85 microcontroller, which as per the datasheet runs at 10Mhz given 3v3 supply. So, to experiment, I have created a small program, as shown below. #include <avr/io.h> int main(void) { DDRB |= 8; while(1) { for(int i = 0; i < 1000; i++) for(int j = 0; j < 1000; j++) asm volatile("nop"); PORTB ^= 8; } } As per documentation, each nop will take exactly one clock cycle to complete. Now, I have compiled this program using Atmel-Studio-7, and programmed the tiny using a usbasp clone and avrdude. As a side-note, the power supply jumper on usbasp is set to 3v3. The programming worked fine, and I started looking at the blinking LED at pin-2 and it looked quite slow to me. When I measured the delay between LED toggles using a stop-watch, I could measure it to be exactly 5 seconds. As per my code, each time, 1000000 nops are executed before each toggle. By a simple calculation, it looks like my tiny could execute only 200000 nops per second, meaning it is running at 200Khz, which does not make any sense. What could be the contributing factors to this error? How to estimate any microcontroller's clock speed by its output? AI: Take a look at the compiler output here https://godbolt.org/g/TxZSgt. Notice that the inner for loop and the asm("nop") lines correspond to 3 assembly instructions, two of which (sbiw and brne) take two cycles (for brne when taken). So instead of taking one cycle per inner loop like you predicted, it takes 5. And actually, if you multiply your measured clock frequency by 5, it comes out to 1MHz, which is the ATTiny default clock speed as per the datasheet. The device is shipped with CKSEL = “0010”, SUT = “10”, and CKDIV8 programmed. The default clock source setting is therefore the Internal RC Oscillator running at 8 MHz with longest start-up time and an initial system clock prescaling of 8, resulting in 1.0 MHz system clock
H: What component allows DIP to be connected with Dupont style jumper wires? (sorry for the n00b/cringey question!) I've order an ADC chip and I realized upon receiving it that standard Dupont style jumper wires don't fit on standard integrated chips pins. I was wondering if an IC to jumper wire connector/socket even exists and if so, then what it's called. Basically, what I'm aiming for is a single component that combines a DIP socket (at least 2x8 pins) and Dupont style jump wire header pins so that I can push my IC in that socket and connect jumper wires without any soldering. The closest I could find is this guy who made himself a couple ones with breadboard, but does that exist as a single standard component? Thx AI: You might look into wire wrap sockets which look like this Or you could use a breadboard: If you are ok with using jumper cables with one end having a male pin, you can push your IC into the breadboard and use your jumpers to connect to it. Breadboards are pretty standard for electronics prototyping, and typically people plug their components into them and use short jumpers to make connections where required.
H: How I can get a high level with this circuit? simulate this circuit – Schematic created using CircuitLab I have this circuit. The MCU on the right select speaker output if I have a low level and if i want audio jack output, i need a high level. The datasheet give me that exact circuit so by default, if I put nothing on the left side of the circuit, i get low level and i get speaker output. I want to detect headphone, so with 3 pins (stereo), I can get a switch ... but i don't know i need to add (resistor, capacitor, alim) with this switch to get when a put an audio jack, a HIGH level on the MCU... I rewrite all my question ... was bad question ! Can you help me ? This is the datasheet with the same schema : HP/SPK AI: i need a high level The circuit diagram from the datasheet is wrong. As shown, the schematic always shorts that input signal (\$\small HP/\overline{SPK}\$ pin 10 on the IC) to ground and it is impossible for that signal to be "high". If you supply a link to the datasheet, it might be possible to figure out what circuit they intended to show. [see update below] I suspect the "fix" may simply be to remove the connection shown from that node to ground. Update: You didn't specify the IC, but after some searching I've found this datasheet mistake matches the PAM8019 Audio Amplifier from Diodes Inc. (link to datasheet). It is not an MCU / microcontroller as you stated. That incorrect statement may have confused & frustrated some readers. Since this mistake is shown in the current public version of the datasheet, I suggest that you contact the manufacturer to find out what they intended to show instead. Update: Just to add some extra help - I found this schematic (extract shown below) which uses the PAM8019. It confirms that the \$\small HP/\overline{SPK}\$ signal is just a digital input (switching thresholds are shown in the datasheet). We can see that this signal is being switched by a small MOSFET Q1, with a pull-up resistor R26, depending on whether a headphone jack is inserted or not: Link to the full schematic for Odroid Stereo Boom Bonnet
H: Using an op amp as a switch for audio (Dual supply +-12V) I'm wondering if the below circuit would be a reliable bipolar analog swtich. I'd like to be able to disable signals from certain circuits and I'd rather not have to bias and normalize the signal in order to use a typical analog switch. What issues might arise and how could they be corrected? The op amp is a modern rail to rail jfet input device. Note: cost is of critical concern, I'm trying to keep cost below $2 per complete setup @1000 units, also assume at least a quad channel op amp, need to control all signals at the same time, ie a quad signal from a set of audio inputs and assume another circuit would be used for another set of signals. Signals are line level. One more edit: voltage input is line level, but I would like the flexibility to go higher if necessary Edit: The output doesn't need to go high impedance, but it would be better if it did. Assume V_out will be feeding into a resistor of at least 2kOhms before connecting to other parts of the design. AI: simulate this circuit – Schematic created using CircuitLab Choose package R from 1 to 23 Ohms depending on avail. Ground could be Vcc/2.
H: use atmega328p-pu to flash atmel 90usb162 I have an ATMEGA328p-pu from an Arduino that was going to be used in a company product. We switched to a PCB that uses ATMELs 90USB162. I would like to make a circuit board that uses the ATMEGA to store the bootloader and eeprom data for the 90usb162 so that on button press, the bootloader and eeprom is read from the atmega and written to the 90usb162. This is desired as we currently have approx 100 90usb162 needing to be flashed with the correct bootloader and eeprom data. Am I going about this the correct way, or is there a better way to mass flash ICs? Project edit: to make this project easier, i'm going to switch to the omega onion to flash the 90USB162. The omega is a full Linux box with it's own file system where i can use C++, node js and other programming languages I'm familiar with, making this whole project easier. If this works out, I'll post as an answer. AI: Adafruit has a project for a standalone AVR programmer. Theirs is Arduino-based, but since the Uno uses a '328P it should be easy enough to adapt to your needs.
H: Altium Design Rules: Short-Circuit and Clearance I am using an older version of Altium (14.1) and I cannot stop the short-circuit errors from being flagged. I am trying to route an eMMC BGA that has many pads that are NC (internally not electrically connected) and I need to trace over some of them to escape the signal. When I try to use interactive routing, unless I use the Ignore Obstacles mode, I cannot trace over them. That is not the main issue however. My main issue is how do I get the rules check to ignore the short-circuit errors and/or the clearance violations that I am getting? I do not know which rule to set nor how to setup the query to properly handle this issue. Any help would be greatly appreciated. AI: Running traces over NC pins is still very poor practice, and I do not recommend doing this. It would be VERY unprofessional. I suggest finding a way to avoid the pads, even if it means adding another layer to your board and putting in some vias. That would be the correct way to do it. That being said, if you absolutely MUST trace over pads, you will need to add the NC pins to the schematic symbol and in the schematic assign them the same net as the track that you intend to lay over them. They will appear in the PCB design as a required connection point, so select your nets and place the tracks wisely.
H: Connecting one circuit to another via a transistor as a switch I'm a software engineer, and know very little about electronics. I'm learning slowly, so appreciate your patience and kindness :) I will gladly return the favour someday. I'm trying to build a circuit to release the shutter of a DSLR from a raspberry pi. Releasing the shutter is as easy as closing a circuit, the circuit is entirely contained within the camera. So, I have a camera, with two wires from a disassembled shutter release cable sticking out of it. When I touch those two wires together, the shutter fires. Great, now to do it electronically. The schematic on the left is what I prototyped using an LED and the on the right is the same (?, we'll get to that) connected to the camera in place of the LED. The LED scenario worked fine, which was exciting, the camera... did not, regardless of the value of R4 - I started with a resistor I believed to be correctly calculated (2.6MΩ) and worked down in resistance until I was using no resistor, the shutter never fired. I've tested all the components and swapped them around diligently checking they all work and are connected correctly. There are two major differences I can think of, if you understand these and can help confirm and explain, that'd be great. If you spot something else that is the cause of my problems, that's great too. I can think of: 1) The grounds on the RHS aren't actually the same, one is the camera and the other is the pi. So I'm essentially connecting two circuits via the transistor, whereas on the LHS, I used the pi's + and gnd pins to create power the LED circuit, meaning this is a common ground? Does this make a difference? What should I be doing to connect two circuits in such a way? 2) The current in the camera circuit is very low, 68μA, maybe this isn't enough to cross the transistor C to E (way out of my depth here :) )? Details on the camera circuit can be found here: http://www.doc-diy.net/photo/eos_wired_remote/ AI: I take it that you used an ammeter to measure the current when you shorted the wires to make the camera shutter operate? In any case, I'd recommend the use of a small reed relay. If you want this to be very small, anyway. These come in tiny glass ampules and require a small coil wound around them. When you apply a current, the magnetic field closes the relay. It would work perfectly in this situation. Here's a picture of one: Reed relays come in enclosed modules, as well. These include the wound coil and detailed specifications, as well. They will be larger. So which you use will depend on your needs. These modules come in a variety of shapes, so I won't include an array of pictures here. You can look them up. I have a box full of the glass ampule types and have no problems winding "magnet wire" around them to make a complete unit that does the job. So that's the way I'd go here. Driving the coil would be trivial for the MCU you have, as well. What surprises me a little, though, is that there are lots of people posting up various ways to trigger the shutter for cameras. The above method I just mentioned is sufficiently general that it will work with any such camera. Also, I'm not particularly liking the idea of an opto-isolator method. These work well in many cases. And I'm certain that there are lots of people using them for camera shutters with MCUs. But these are semiconductor devices and have some unique properties, quite different from a simple relay switch as shown above, that in some cases may require added attention to make work well. So that's partly why I'd recommend keeping to a reed relay approach. It's bullet proof and quite general purpose and will serve you not only for this camera but for almost any other such camera shutter trigger without ever worrying later on. It just works. Period.
H: using ADC on the current output of a sensor My project uses a LEM LAH 50-P current sensor. Current will vary between +/- 22 Amps. The project uses a Texas Instruments TMS320F28027 MCU which operates at 3.3 V. The output of the sensor is a current equal the sensed current / 2000; the output will vary between +/- 0.011 A. I'm trying to implement the resistor network by following this post which describes a summing amplifier. The post describes the input as a voltage source with all resistors of the same value. Also a comment to the post notes that the attenuation resistors can be incorporated into the circuit thereby saving on parts. Would the following design work? How to design for V1, R1, and R2? simulate this circuit – Schematic created using CircuitLab AI: I've studied the LEM datasheet and had a quick look at the referenced answer so I may have missed some detail but I think you can simplify it. Figure 1. Extract from the LEM datasheet showing the maximum \$ R_M \$ the device can drive under various conditions. Let's go with 100 Ω for now. You can increase it if it suits. This will drop 1.1 V at 11 mA which is good for our application - but bear in mind that a current spike or surge could raise this beyond your ADC's maximum. simulate this circuit – Schematic created using CircuitLab Figure 2. Biasing the \$ R_M \$ voltage reading to mid-ADC range. Fortunately for what we want to do next \$ R_M \$ is a low value and the ADC has (he said without checking) a high input impedance. If \$ V_M \$ (measured voltage on \$ R_M \$ = 0 then we want half supply voltage on the input. We can do this with a 1:1 potential divider. We'll pick 47k resistors as these are not so high as to introduce noise susceptibility but 500 times higer than \$ R_M \$ and so should introduce a measurement error of less than 0.2%. If \$ V_M \$ were to rise to 3.3 V the ADC input would also be 3.3 V. (This would be 33 mA output.) If \$ V_M \$ were to fall to -3.3V the ADC input would be held at the midpoint of +3.3 and -3.3 V = 0 V. At \$ V_M \$ = 0 the ADC input will be 1.65 V. At +11 mA the ADC input will go up 1/3 of the way from midpoint to +3V3. At -11 mA the input will go down 1/3 of the way from midpoint to 0 V. You'll need to work out if this gives you adequate resolution and balance the trade-off between sensitivity and overload headroom. It might be a good idea to add protection diodes to the ADC input - one from ground up to the input and another from the input to V+.
H: Shut off a low-current circuit beneath a certain voltage I have a circuit that requires only 2mA of current. I need to turn it off when my LiPo drops below 3.5V. The LiPo is not at risk of overcharging, because the charging circuit is separate from this circuit. What's the best way to turn off this half of the circuit when the supply voltage drops below 3.5V? Can I just use any old diode? AI: This is just an idea. I've not tested it. But it gets a simple idea across, I think. And it only uses parts you'd truly expect to find in a junk box of parts: simulate this circuit – Schematic created using CircuitLab The basic idea is to turn \$Q_1\$ into a comparator without using a zener. It's base is one input and is presented with a voltage divider made up of \$R_1\$ and \$R_2\$. It's emitter is the other input to the comparator. But instead of a zener, it just uses a common diode. \$C_1\$ isn't strictly necessary, especially with \$R_5\$ added for hysteresis (discussed later), but just a little bit goes a long way in reducing noise at the emitter of \$Q_1\$. Some feedback is applied from the output (on/off state) at the collector of \$Q_2\$ via \$R_5\$, so that there is a tiny bit of hysteresis in the circuit. You can adjust the divider, \$R_1\$ and \$R_2\$, until it triggered approximately in the right place for you. But \$R_5\$ arranges things so that the turn-off point and the turn-on points are slightly separated from each other to give it a nice "snap" response that ignores some noise. You can reduce the value of \$R_5\$ for more noise immunity. But there is a trade-off, so adjust it in small steps. It's pretty simple, so I'm fairly sure it will work. I arranged this with the idea of your load's current. But it should be fine over a reasonable range. Trevor makes a great point about excess current through the \$R_3\$, \$Q_1\$, and \$D_1\$ path, just to run a \$2\:\text{mA}\$ load. He's right. My goal above was to use nothing but junk box parts. And in my past, NFET and PFET devices with low thresholds were NOT junk box parts (for me.) But they certainly may be, today. And besides, he is quite right about the excess current in the above circuit. If you have, or can get a BSS84 or something similar, regarding thresholds, then the following circuit is much lighter on your battery source: simulate this circuit I did say that the first circuit was conceptual, only. But Trevor is dead right about using a PFET for \$Q_2\$ as a better choice in a circuit like this. So if you have one of these, feel free to modify the idea as just shown. You can also use \$R_3\$ in the circuit to adjust the exact threshold. Making it smaller or larger will change the load on the divider and move the threshold around a bit.
H: Measuring mains voltage and powering a raspberry pi from the same adapter I'm looking to measure AC voltage (just the voltage, not the phase etc.) and power a raspberry pi 3 with a lora concentrator (so there would be a power draw up to 2A @ 5V) from the same ac-ac adaptor, like in the schematic: The main reason I don't want to use a separate power supply and sense adapter is installation inconvenience. Would this work, if I chose a beefed up enough wall wart? I'm thinking that a 12V 24VA should be more than sufficient. And since it's using a transformer, the voltage at the adc divider should be linearly proportional to the mains. The required resolution is 1V, so using a 10bit should be sufficient. 1V @ 240V translates to 12.5mV @ 3V and the ADC has a resolution of 3.2mV @ 3.3VRef Edit: The 5V regulator before the raspi would most probably be a switching one AI: Yes using any calibrated “instrument transformer” can measure primary AC voltage with known verified ratio. You may or not be interested in doing all types of measurements, peak and average then convert both to rms for a sine wave. This depends on signal conditioning in both cases for bandwidth and then sample rate. You can also use S&H and trigger events that exceed a preset threshold or a a ratio differenc and then choose to compress sampled data with statistics such as % of time below -10% of nominal. Just a few ideas
H: Why is it necessary to know a state of a system? In a system why is necessary ? why cant we use a simple transfer funtion in an S or Z domain ,to get an input output relation , or as we already know our input and measure our outputs through sensors ? AI: If the system has memory, you need to know what state the memory is in. For example: a system with a low pass filter of a resistor and a capacitor will respond differently if the capacitor is fully charged or if the capacitor starts with zero voltage. The system will respond differently depending on the initial conditions or state It isn't simply enough to know how a system will respond, but you also need to know what state it is in now to determine it's future behavior Another example of this is useful for analyzing the circuit. If you zero out the state and only consider the input this is called "Zero-State" analysis. Conversely, if you zero out the input and supply a state, it's called "Zero-Input" analysis. Source: Dummies Find the response
H: why output of RC low pass filter is ramping up when square wave is applied? Why am I getting ramping-up voltage at the output of the given circuit below? I should be getting saw-tooth waves right. What am I missing? Output waveforms are like these in LTSpice! Did I chose a wrong value or set wrong transition period? AI: Initially the voltage across the capacitor is 0V. During the 20ms 3V pulse the voltage across the capacitor is close to 3V. Hence a current of 3/200e3 A will flow into the capacitor and charge it a bit. Voltage across the capacitor rises a bit. During the remaining 80ms 0V pulse the voltage across the capacitor is rather small. Therefore only a very small current will flow out of the capacitor and discharge it. This discharge is smaller than what you put into the capacitor during the charge phase. The voltage across the capacitor drops, but just a tiny bit. Therefore over time the voltage slowly rises and you get your staircase pattern. It's more zig-zag really. Extend the simulation time to 12 seconds and you'll see the typical decay that you might expect: If you don't put a limit on the number of pulses and let the simulation run again you'll see that the voltage averages out at roughly 660mV. This is the low-pass filtered result of your 20% duty cycled square wave. Note that ideally the voltage should be 600mV. The 10% difference come from the non zero rise- and fall time of your square wave.
H: Control a dosing pump with raspberry pi zero w Hi i have a few "Peristaltic Pump Dosing Pump 6V DC Motor" with the following specs: DC: 6V Non-load current: 100mA So the idea was to control it with a L293D using the following scheme Image source: https://business.tutsplus.com/tutorials/controlling-dc-motors-using-python-with-a-raspberry-pi--cms-20051 But replacing the batteries with the following battery eliminator: Adjustable output voltage: 3-12 V (DC) 600 mA output at 3/4,5/5 V 500 mA output at 6 V 480 mA output at 7,5 V 400 mA output at 9 V 300 mA output at 12 V Would that work or do i need to add some additional components? Also what V output do i need to set the battery eliminator to? AI: This will be fine. 4x AA batteries is 6 V, so set your power pack accordingly. There's plenty you can do to make this better, but this will get you started. One caution, double check your +6 V is not connected to the Pi, it is likely to damage or destroy it.
H: Two sensors to one ADC pin I'm working on a project using the MBED 1768, where I would like to connect two different externally powered sensors to one ADC pin on the microcontroller. Since they are externally powered, I need a way to switch between the input signals in such a way that only one sensor is connected to the input at a time, and this switching has to somehow be triggered electrically by the microcontroller. How would I go about doing this, preferably in a cheap way? AI: Use a 2:1 analogue multiplexer like the 74LVC1G3157 or many others that are readily available. The devil is in the detail and you need to work out what specific multiplexer suits your needs in terms of voltage levels coming in and what power supplies you have available.
H: CE BJT amplifier phase shift I built simple CE amplifier in Multisim: and make AC analysis, the phase are: What is the reverse near 10 kHz? I make the identical circuit in LTSpice but there is no any equal to Multisim on phase output created with LTSpice. What is it? May be it's a difference in behaviour of AC analysis in Multisim in comparing to LTSpice? In Multisim I set v_out/v_in for an output graph but in LTSpice there is no manual settings I found, only ac analysis without output options exists. May be I see any other variable in LTSpice in output graph in comparing to Multisim? AI: What is the reverse near 10 kHz? Try rescaling your Y axis to centre it around -180 degrees. There is nothing anomalous if you consider that the transition changes from -180 degrees to +180 degrees. It's just multisim thinking that the lower display boundary is getting a bit too close and rescaling -180 degrees to +180 degrees so it can adequately display the phase change at frequencies higher than 10 kHz.
H: STP16CP05MTR output voltage This is a LED driver IC. It says it can deliver 20V output, but what does that mean? That the output pin will have 20V in respect to GND? I am asking, because the max supply voltage is 7V, so does it have an amplifier inside? Link to datasheet: http://www.farnell.com/datasheets/1837098.pdf?_ga=2.60289641.55768663.1518169214-1262566742.1517153785 AI: It's not delivering 20V, this is where you are getting confused. It's a constant current sink device which means that current will flow into the device and you can fix how much current will flow into the device (between 5mA to 100mA per output in the case of this part). I do see how this is a little difficult at first. It can almost seem like it's an input rather than an output at first glance. Now, the voltage at each output pin can be up to 20V. So, after the volt drop across each LED in the chain from the supply voltage to the pin of the output, you can have up to an absolute maximum of 20V on the pin before you would damage the device. In the diagram it shows a typical application. If you drop 2V across an LED, and you had a VL of 22V, you'd have 20V on the output pin. In practice, you would chose a much smaller VL if you only had one LED per output. However, it does give you the opportunity to have lots of LEDs in series on some strings and fewer on another. Also, please bear in mind that the larger the voltage at the output pin, the bigger the power dissipated in the package; you have to be really aware of how much you are dissipating per output and what the absolute overall maximum power dissipation is for the part. Just because you can sink up to 100mA and have a voltage of up to 20V, does not mean you can necessarily have both at the same time!
H: Beginner Question about the logic behind Ohm's Law? In all the physics i learned and practiced many subjects But understanding Ohm's law used to be a big problem for me... Here is what i mean : We have a 5 volt battery. And a 3 volt/ 20 mA led. So general approach to this schema is i learned: The led needs 3 volts. So we should control 5-3 = 2 volt with a resistor . V = I*R & R = V/I Here as i assume : R = 2 V / 0.02 mA = 100 ohm resistor we need .. I hope this is correct.. But in this formula we use the voltage that resistor will control : 2 volts .. Since this voltage is resisted against; 3 volts will reach the Led. But we find the current in formula using the voltage resistor will control and what it has to do with the LED's required Current ? Cause only 2 volts reaching to LED. I really do not understand the logic behind this ; connection this two unrelated values.. Usually tutorials uses Pipes analogy.. Even with pipe analogy i can not clarify this .. Example : In a pipe system , If a narrow pipe is stopping 2/3 of water ; the water tribune placed after this will receive 1/3 of the water. So no way to use 2/3 water to calculate anything about the water tribune and no effect on this tribune at all. Is there any logical explanation of this ? Thanks in advance from confused person.. AI: The calculation you're using is an approximation, but it's a good one. It assumes that the voltage across an LED is constant, no matter what the current is. This is not actually true, but it's close, because LEDs are diodes, and thus exhibit a characteristic diode IV curve (ignore reverse voltage for now): Notice that as the voltage increases, the current increases very quickly. For reasonable currents, from the minimum operating current to the maximum current before the LED breaks, the voltage will remain pretty constant, +/-10%. If you have a constant voltage power supply, that means that the voltage across your resistor will also be constant, no matter the current, due to kirchoffs voltage law: simulate this circuit – Schematic created using CircuitLab You can see here that as we change the resistance, the voltage across the LED stays the same, so the voltage across the resistor stays the same. The current increases as we decrease the resistor.
H: How to calculate how long a supercap can provide power What's the formula to calculate how many seconds a supercapacitor can provide power when employing a buck/boost converter? Also, how different would that calculation be when using a pair of supercaps in serie (eg. 2x 2.7V @ 1F) Example data: Supercap: 5.5V, 1F; Panasonic EEC-S5R5V105 http://www.mouser.com/ds/2/315/ABC0000C22-947554.pdf Buck/Boost (5V out): XL6009, 94% efficiency; are there other relevant specs? https://www.pollin.de/productdownloads/D351434D.PDF Load: 5V, 250mA (Raspberry Pi) (intended application: to provide a few seconds to save settings at power loss for an embedded RasPi) AI: Hold up time is T= \$\frac{C(V_s - V_f)}{I}\$ where I is the current, C is the capacitance, Vs is initial voltage on the capacitor, Vf is final voltage on the capacitor (perhaps the minimum voltage at which the system will work). That's for an ideal capacitor. If the capacitor has significant internal resistance the voltage will drop an additional amount I*R, so the hold up time will be reduced. For a non-ideal capacitor, also adjust I to add the internal leakage current. If you're trying to hold up a RPi long enough for an orderly shutdown I think you're going to require a very large supercapacitor with low internal resistance or a battery.
H: What's the impact of a crystal's frequency stability, ESR and load capacitance on micro-controllers? I'm choosing a crystal for MK20DX256VLH7, but I can't seem to find enough information in MK20's datasheet for the oscillator. So, what I'm interested in knowing is: What is the impact of crystals' frequency stability, ESR, and load capacitance on the performance of the MCU? Would it be acceptable to use 20 ppm, 150 Ohm, and 8 pF values? The other question on my mind is: By what margin I can deviate from these specs without affecting the performance of the MCU? Can I choose 18 or 15 ppm? Can I reduce the ESR down to 40 Ohms? Can I select load capacitance of 4 pF? AI: The crystal in combination with the circuit on the microcontroller forms a crystal oscillator. The function of this circuit is to provide a clock for the microcontroller. You could also use Spehro's Suggestion and use an external crystal oscillator. That combines a crystal and a circuit containing everything that's needed to make that clock signal. It might be slightly cheaper to use a crystal instead of the crystal oscillator. However, you should follow the recommendations of the microcontroller's datasheet regarding that crystal, there mainly frequency is important. You should also follow the recommendations of the crystal manufacturer's datasheet, there the load capacitance is important. It is not difficult to get this "right" but get it wrong and it just won't work and that will be a pain. Also a parameter like the 20ppm accuracy is often irrelevant as crystals are by themselves already very accurate. Also the microcontroller itself doesn't care about accuracy, it would still work even if the clock is extremely inaccurate and varying over temperature and whatnot.
H: drawing current from multiple sources in parallel I'm working on a project which consists of repurposed training bike to generate electricity. We have 8 bikes connected in parallel to a battery. The bikes are equiped with AC motors and a diode bridge to convert to DC and produce a tension around 24v. I would like to measure the current produced by each bike separately. I already did it with one bike, but I wonder if it is posible to do the same with multiple DC sources in parallel. Won't I read basically the same measurement on each source ? AI: In order to do what you are thinking each bike would need it's own current harvester circuit, something like is shown below. simulate this circuit – Schematic created using CircuitLab NOTE: The above is concept only and not intended to be a functional design. Each bike would have it's own rectifier and a switched inductor. The MOSFET builds current in the inductor when turned on, and when it turns off the voltage on the right side of the inductor rises to a diode drop over whatever voltage is stored on C1 feeding current to the capacitor and charging it up. The comparator on the right is some sort of control circuit intended to shut off the clock when the voltage on C1 exceeds some maximum value. You then can use whatever charge is stored on the capacitor to drive a buck-boost regulator to create your final desired voltage. You can then use individual current meters on each bike and each bike will contribute to the total power available. Note however, the load on the riders will drop off markedly when the voltage on C1 exceeds the limit. This will happen if the electrical load on the output is small. That may be a rather dangerous shock to the riders muscles.
H: HF signal in a null experiment. What is the exact mechanism? Since I've tried to experiment with electronics, I am faced with the problem of HF noise and signals bypassing almost anything I try to stop them. This begun with my attempts to filter the noise of a simple ATX PSU, and this occurred once more recently with my attempts to rectify a 5MHz modulated signal at 1khz. Regarding switching PSU, in 9.6.8 D, the "Art of electronics" says "The switching noise can be heavily bypassed at one point, but just put your scope probe a few inches away and they're back." Later (9.9), he also quotes James Bryant in answer to the question "How can I prevent switching-mode power supply noise from devastating my circuit performance?", Answer: "With great difficulty - but this can be done". For them, the problem is that switching PSU are full of noise at a very wide range of frequencies, that occurs in a variety of ways (see end of 9.6.8 D). In my opinion, and as I will try to show below, the problem is much more fundamental and its interpretation is not so easily found, if ever it has been processed. But let see what you say about that, guys ! This time, I've realised what Douglas C. Smith calls a null experiment, in a way that can be easily reproduced and should help to rule out many incorrect interpretations. Here is the experiment: Around the coil of a grid dip emitting at 5MHz, are rolled 2-3 turns of electrical wire. (see 2 pictures below). Notice that one extremity of the wire is left opened. The other extremity of the wire (at about 1.5 m) is brought near the two joined extremities of the scope probe. The probe is set at x10, and the scope at 1mV/div, 1ms/div. As expected, nothing occurs but some weak background noise (picture below). Now, without moving anything, the two joined extremities of the probe are in contact with the extremity of the wire. In the first picture below, the grid dip is set in continuous wave modulation (CW), and in the second picture, it is set to modulate the carrier wave at 1kHz (MOD). This leaves no doubts that the grid dip is generating a signal in the scope. As can be seen, the scope is now indicating a signal of about 2mV, that is 20mV (since the probe is x10). The question is: by what exact mechanism is a signal generated by the grid dip in the probe? Moreover, I add: like for switching PSU, it is very difficult to "stop" or rectify this signal or more precisely, to know with the scope whether or not it has been stopped: after all, this null experiment says that you have no hope to learn anything with the scope no? the orientation of the loop formed by the probe does not matter at all in this experiment: this may prove that there is no magnetic influence through air. Only a contact with the wire produces the effect. Note: A grid dip is not necessary to perform a similar experiment, but it is a good choice because it emits at a relatively narrow bandwidth. If this condition is relaxed, the same can be done with a noisy ATX PSU switching in the MHz range like this one: AI: This hasn't got anything to do with antenna effects as far as I can see; it's just the capacitive coupling of signal to a shortish wire and then connecting the end of that wire through a small value inductor back to ground. The small value of inductor is the scope-probe earth wire and the voltage measured by the scope is the voltage across that small value inductor due to the wire injecting current through it: - A 3 inch diameter coil can be made like so: - And if you go to this calculator and estimate the inductance for a single turn you get about 170 nH. But, the inductance between these two points (in blue).... ... will be about 100 nH so, if you inject a 5 MHz signal at the joined end of the probe, it will see a ground wire impedance of about 3 ohms and, the resulting current will (pretty much) flow through the reactive 3 ohms and produce a signal volt drop that the o-scope measures. Try using a real 3 ohm resistor and this type of probe measurement across the resistor to cut-down on the loop inductance of the earth wire: -
H: Can I wire a USB Type B connector to a Micro-B connector? I'm looking into wiring a Raspberry Pi Zero (USB Micro-B) to my 3D printer (USB Type B). I can easily do this using some adaptors (Micro-B → Type A → Type B), but I would prefer to just connect them directly with a footprint as small as possible. Looking into this I found these tables at Wikipedia: Host and device interface receptacles, USB - Wikipedia which seems to illustrate that such connections are not possible (or maybe just that they're not standard). Would a directly wired connection between the Type B connector and the Micro B connector work? AI: The micro B connector (Strictly speaking, it should be a micro-AB port that can accept a micro-A connector, but I don't know if the RPZ has this) must be wired as an OTG cable for this to work. This requires a "sense" pin in the connector to be tied to the ground (it floats on normal cables). The simplest way would be to use an existing OTG cable (I believe you can actually buy OTG cables with a full-sized B connector on the other end, which wouldn't require any modification) rather than attempt to mess with the wiring inside the plug.
H: How does a hobby ESC drive a BLDC motor? Background: I'm an aerospace engineer modeling the electrical systems of a standard quadcopter. I came across a lot of technically-inadequate or incorrect material while researching the humble yet technically-rich electronic speed controller (ESC), so I thought I'd collect my newfound knowledge for posterity and further corrections by the community. Thank you, Bruce Abbott, for your clear explanations. I hope I didn't misunderstand them! Questions: How does a hobby aircraft ESC drive a BLDC motor? Does it use PWM? How does the ESC measure back-EMF to calculate speed? AI: Disclaimers This post assumes the reader is roughly familiar with how the electromagnet and phase energization inside BLDC motors generates motion. I use the term "phase" rather interchangeably. The actual control algorithm for sensorless control is beyond the scope of this post. I don't have a firm understanding of that yet. Note regarding "AC" vs "DC" motors: technically, all motors are AC motors because an alternating current is required to switch the polarity of the electromagnets inside the motor and pull/push the rotor magnets to generate torque. A "brushed DC" motor is the only motor that will run when connected directly to DC power because a mechanical apparatus called a commutator will passively switch the direction of the current inside the magnet. The battery still sees a DC current (aka commutation). The dark/light blue rings in this gif are commutators. Every other motor, including brushless "DC" motors (BLDC), are now enemies of the Republic will not run when connected directly to a DC source as they require active commutation and some sort of speed or position feedback to control the commutation. Overview: The drive train of a hobby aircraft typically consists of a battery (DC power source), an ESC (motor driver), and a brushless "DC" motor, aka BLDC motor (2-phase AC motor). The ESC provides two functions: DC/AC inversion: six switches serve as PWM inverters that convert the DC power supplied by the battery into AC voltage for a motor. Position sensing: 9 resistors (detailed paper) sense per-phase voltages (and indirectly rotor position & speed) for the control algorithm. Below is a diagram of the 6 switches (excluding zero-detection elements) that perform the core function of PWM inversion in an ESC: PWM inversion and position sensing enable an ESC to correctly energize 2/3 phases of a BLDC motor to generate torque while using the 3rd phase for position and speed feedback without the use of an external sensor. Key motor property: Back-EMF. The following model describes a BLDC motor's response to an applied voltage (\$V_a\$): $$V_{a} = 2I_{a}R_{a} + E_{line-to-line} = 2I_{a}R_{a} + k_{e}\omega$$ Where voltage and current are per-phase peak values, \$[k_{e}] = V/\frac{rad}{s}\$, \$R_{a}\$ is the resistance of a single phase, and \$\omega\$ is the angular speed of the rotor in rad/s. As a motor spins faster, an increasingly greater "back-voltage" builds up inside the motor. This reverse potential is called back-EMF (E), and generators rely on this potential to convert mechanical energy into electrical energy. The speed at which \$E = V_a\$ defines the maximum electrical speed of the motor since the power source has lost the high ground can no longer force more voltage down the line. This electrical speed limit is typically above the mechanical speed limit from bearings, mechanical stresses, etc. Nevertheless, I think direct-drive torquers (see here for motors with \$k_e\$ > 2 N*m/A!) are actually limited by electrical speed since they have such large \$k_e\$ values (\$k_e = k_t = 1/k_v\$ with the right units). BLDC ESCs "massage" rotor speed and position information out of the back-EMF voltage without the need of an external sensor for position feedback. This saves weight, power, and mechanical complexity. PWM inversion: Depending on the user's throttle ratio (\$d\$), the ESC will use pulse-width-modulation (PWM) to generate a trapezoidal driving voltage of varying peak value (\$V_p = dV_{dc}\$) for the motor. This output PWM power signal (f is in the kHz) is completely different from the PWM (aka pulse "position" modulation) control signal (f = 50 Hz) that handles RC communication (more info on the latter). The PWM signals between the ESC and motor are much more fascinating. Depending on the phase combination to be energized, the power PWM signal will: "ramp up" the peak line-to-line voltage seen by the motor using ever-higher ON-times for the base pulses. This corresponds to the up-slope of the trapezoidal drive voltage. "hold" the peak voltage steady at the desired throttle setting (\$V_p = dV_{dc}\$). This corresponds to the flat-top of the drive trapezoid. "ramp down" the peak voltage. This corresponds to the down-slope. See my rough annotation below (original image courtesy of this Q&A on Robotics SE), and how gates will hold HI for increasingly longer periods of time (ramp up), hold HI for a long period (flat-top), and hold HI for decreasingly lower periods of time (ramp down). Negative energization just corresponds to different phase pairs. Note, the duration of the flat-top region will increase/decrease as the motor speed decreases/increases because the ESC must energize pairs less/more frequently. In context of the PWM deep dive I cited earlier, this frequency change corresponds to a change in the PWM control frequency, not the more basic triangle wave frequency. The humble hobby ESC is a variable frequency drive! Position sensing: Recall the back-EMF (E) generated by spinning motors. E "crawls back up all pipes" While the ESC energizes 2/3 phases. The instantaneous value of E depends on the rotor's position relative to an activated phase. If the rotor is instantaneously directly aligned with a phase, then e(t) is actually zero (no magnetic interactions). If a phase isn't energized by the ESC's applied voltage, such as the 3rd phase or the other 2 phases when their drive circuits are open (OFF-time of PWM), then E is an opposing potential on those phases. If we measure E, then we can watch for when E crosses 0V. This zero-crossing corresponds to when the rotor passes a currently energized phase which indicates that the next set of electromagnets/phase combination should be energized (see gif). However, there is a problem: the typical "wye" (Y) connection used in BLDC motors (pic below) doesn't have a neutral point, so what does the ESC actually measure back-EMF with respect to? The Y-midpoint isn't an output on most motors... The solution is to create 3 "virtual center taps" with another set of wye-resistors for each pair of opposing MOSFETs on the ESC as pictured below. These virtual grounds can serve as reference points for measuring E because the sum of line-to-line voltages in a proper wye connection is always zero (see how the traffic doesn't stop in this nifty gif). Now the ESC actually has a meaningful method with which to measure EMF and sense the position and speed of the rotor.
H: LTspice gives wrong AC analysis I have multiple issues with LTspice. Take this trivial example: XU1 N002 N001 vcc 0 N001 N003 ADA4807 V1 vcc 0 5 V2 N002 0 PULSE(0 1 0 0 0 0.5m 1m) AC 1 R1 N003 vcc 1k C1 out 0 1p R2 out N001 1 ;tran 2m .ac dec 1 100 1000Meg .lib ADI.lib .backanno .end tran works fine: But ac gives me bogus results - like -47 dB "gain": AI: As mentioned by just about everyone in the comments, your op amp doesn't work because your DC bias point is 0V and the op amp will only work for inputs between its rails (0V and 5V). Your options are either: 1) Use positive and negative op amp rails, or 2) Bias the input AC voltage to between the two rails, e.g. 2.5VDC. As seen below, with the DC bias point set at 0, I get similar broken behavior (although its a bit different since I used a different op amp) If I add a 2.5V DC offset to the AC input, I get the expected behavior: EDIT: See also The Photon's answer describing why the minimum output voltage limits you in this case.
H: why there are two capacitors in half H-bridge motor driver circuit? I am confused with this and the image shown below given about half H-bridge circuits! Why are there are two capacitors connected if DC gets blocked?(roughly, I am assuming that, to prevent short from Vcc to ground.) Please Help me to understand this! EDIT: Consider a dc motor instead of L1 AI: Vcc is DC. You should provide a link and/or reference to the source document to help people help you. You should have a good idea that Vcc is DC from the context in which you found the diagram. The two capacitors act similarly to two switches. Current flows alternately in either direction through them, so that their net DC current is zero - so they pass alternating current. It is best but not necessary to assume C1 fully discharge and C2 fully charged, as will be the case at the start of the cycle below. If desired you can start with C1-C2 centre point at V22/2 which is the starting condition. Q1 on. Current flows Vcc-Q1-L1-C1-ground. C1 charges and C2 discharges (as its voltage decreases) so C1-C2 centre point voltage rises towards Vcc. When V C1-C2 approaches Vcc the 1/2 cycle is complete. Now: Q1 off. Q2 on Current flows Vcc-C2-L1-Q2-ground. Thge C1-C2 centre point falls towards ground. Current passes through L1 in the opposite direction to the previous cycle. QED Note that as Andy says in his answer, C1 & C2 may be sized such that the center point voltage vary little over a half cycle. You still get bidirectional AC current in L1 - which is the object.
H: BNC Male to Cable Connector Proper Method I've recently bought some cheap RG58/59/6 BNC male-to-cable connectors for DIY work. The connector qnd its guts look like this: I couldn't find a proper name for this connector type, even worse, I couldn't find any assembly procedure either (there are videos for crimp and twist on etc. types). Can anyone explain (supporting visuals will be appreciated :) ) how should a RG6 coaxial cable be mounted to this connector? (the part with 4 teeth ruined the shielding foil) AI: This TV coax illustration is the closest I could find but illustrates the method. Source: Electronics 2000. ... the part with 4 teeth ruined the shielding foil. The teeth clamp the folded-back screen and insulation. They don't bite the foil. Insert the cable through the teeth end.
H: How much does it cost to prototype an analog IC? There are many paper I see on IEEE website that claims they build their custom designed circuit on a CMOS process. Examples are 5.9GHz ring oscillator and 32-Gb/s serial link equalizer. I know that IC fabrication can cost hugely based on chip area and have already seen this question which is very broad and targetting mostly digital world. So I wonder how much it cost for an analog circuit prototyping run on 90nm or 45nm CMOS process. AI: The cheapest way to get a small number of ICs is to use an Multi Project Wafer (MPW). For this contact Mosis or Europractice, there might be other organisation as well. These organisations collect the projects and take care of "running" the MPW at a Foundry. Prices for CMOS, BiCMOS, 45nm and 90 nm can vary wildly. I am unsure if there is any BiCMOS process with 45 nm CMOS. I do believe there is a BiCMOS process with 90 nm CMOS, this used to be a process from IBM but this has been taken over by Globalfoundries. I expect prices still to be above USD 10000, actual pricing depends on the process you choose, the process options you want and the size of your design. But think at least USD 10000 but with "bells and whistles" up to and beyond USD 100000. And then you might still have less than 100 actual dies. Yes, custom IC design is expensive. The reason for this is mainly the cost of the masks needed to actually make the ICs.
H: FPGA Bank Power On-Off Separately Specifically the MAX 10 FPGAs are being looked at. The IO banks are powered through their own power pins. I've already know that the bank 1 and 8 need to be powered up with the core so that the configuration can be loaded. The question is, for all the other banks, bank 2 to 7, is it safe to power them up and down separately? By separately it also means at random times that the logic will determine based on its internal design. AI: I've already know that the bank 1 and 8 need to be powered up with the core Under these circumstances FPGA exits power-on-reset and starts configuring, see here page 2-26. But it is a good question if it will function properly in user mode. The question is, for all the other banks, bank 2 to 7, is it safe to power them up and down separately? There were a number of questions related to shutting down I/O voltages, for example this one, there's even Altera's answer to related question for Stratix IV FPGA. However, for MAX 10, if you would look at page 6 of the datasheet for MAX 10 family, you will see in the footer (2) VCCIO for all I/O banks must be powered up during user mode because VCCIO I/O banks are used for the ADC and I/O functionalities Thus in general if you do not use I/O pins, there will be tiny power saving from powering down their respective VCCIO, however you risk to catch issue when this power is used for something else inside the chip. The best, from my point of view, is to follow manufacturer's guidelines. Or you can file a support incident with them, but I bet they will refer you to the documentation and will not seriously spend a minute on this incident.
H: Schematics: If I turn off light in room 1 the light in room 2 turns on and vice versa? I need something like this: If I turn off light in room 1 the light in room 2 will turn on and vice versa (if I turn off light in room 2 the light in room 1 will turn on). Also I don't know how can I then turn off both lights (maybe add some extra switches for that?). How will look like schematics of this using only power source, lamps (or leds) and switches? AI: simulate this circuit – Schematic created using CircuitLab Figure 1. A solution using using only switches. Switch 1 is a single-pole, double-throw switch. Switch 2 is a double-pole, double-throw switch. Switch 3 is a single-pole, single-throw (regular) switch and will turn off both lights.
H: Shifting a 2.7V digital signal to Arduino logical levels? I'm pretty much a beginner in electronics and I'm currently working on a personal project, where I have a device, that is putting out a digital signal (square wave) that goes from 0V - 2.7V and I need to read that signal with my Arduino. That, unfortunatelly, isn't enough for the Arduino Mega 2560 since the minimum voltage to turn the digital pin high is at least 3V. I've been doing some "research" and came across the MC14504B hex level shifter which seemed like the perfect solution for my problem. However... I'm having some trouble interpreting the datasheet... TL;DR: I need to level shift my 2.7V signal to at least 3V or more. This is the logic diagram of the level shifter: And this are the characteristics: I'm not exactly sure how to interpret these numbers. I plan to use the TTL-CMOS mode. From what I can tell, as long as input is considered 1 (high) my voltage at output will be ~5V if Vdd is 5V, which is perfect. Would a 3.3V Vdd be okay since Arduino needs at least 3V to turn a pin high? Now to my real question... I don't get the Vcc and Vin (Vol, Voh) part. From the table, we can see, that if Vcc is 5V and Vdd is 10V, the Vin will be a logical 0 if the voltage applied to the input is <= 0.8V, same goes for if Vcc is 5V and Vdd is 15V. Now, from what I can tell, the input will be considered high if at least 2V or more is applied to the input when Vcc = 5V and Vdd = 10V/15V, but both the Voh and Vol change depending on the Vdd? What does this mean for my use case? What if I use 5V for Vcc and Vdd both? What if I use 3.3V for Vcc and Vdd both? What if I use 3.3V for Vcc and 5V for Vdd and vice-versa. What happens in these scenarios? Could someone explain this in a very simple way please? I seem to be missing something here as my interpretation doesn't make sense to me. Thank you! AI: TL;DR: Use Vcc = 5V, Vdd = 5V, TTL-CMOS mode, and you should be fine. "From what I can tell, as long as input is considered 1 (high) my voltage at output will be ~5V if Vdd is 5V, which is perfect. Would a 3.3V Vdd be okay since Arduino needs at least 3V to turn a pin high?" Correct, you will get ~5V output if you use Vdd = 5V. However, in TTL-CMOS mode, Vdd and Vcc must both be at least 5V (Figure 4 of the datasheet). Since the input logic switchpoint is 1.5V for Vcc = Vdd = 5V, that will work totally fine with your 2.7V logic input. "Now to my real question... I don't get the Vcc and Vin (Vol, Voh) part." This datasheet lists its data in a pretty odd way, and it's not actually totally clear what it means. My interpretation is that "VOL = 1.0VDC" means when operating in this condition, the output voltage is guaranteed to be less than 1VDC. Fortunately, I don't think it's really an issue for your application. "input will be considered high if at least 2V or more is applied to the input when Vcc = 5V and Vdd = 10V/15V, but both the Voh and Vol change depending on the Vdd? What does this mean for my use case?" Yes, you are interpreting this correctly. For your use case, ignore the "Voh and Vol" numbers in the "Input Voltage" section and instead pay more attention to the top-most section labelled "Output voltage", which just says that if you use Vdd = 5V you'll get ~5V output. "What if I use 5V for Vcc and Vdd both? What if I use 3.3V for Vcc and Vdd both? What if I use 3.3V for Vcc and 5V for Vdd and vice-versa." Again, see Figure 4. In TTL-CMOS mode, you need to use 5V for Vcc and Vdd. I would say using 5V for both is the correct solution for your application.
H: Ringing NOT at crossover frequency Assume I have a system with open-loop gain G = (s+1)^2/s^3. This system has a negative feedback with feedback factor 1. I plot the open-loop gain by Bode and see that the phase margin Pm = 21.3877 at frequency 1.4656Hz. Next I calculate closed-loop gain Acl = G/(1+G) and then check the step response of this closed-loop function. The plot in matlab shows that it rings at 0.21Hz NOT 1.4656Hz. It really made me confused. Why the ringing frequency is 0.21Hz not at the crossover frequency 1.4656Hz? AI: Your bode plot uses angular frequency \$\omega = 2 \pi f\$. 1.47 rad/s = 0.23 Hz
H: How to bias a voltage for an ADC I am part of a project that is implementing a power storage system. The storage device voltage must be monitored in order to direct power. The storage device voltage should remain between 12 and 36 V. The project uses a TI TMS320F28027 MCU which operates at 3.3 V. How can the 12 to 36 V be mapped onto 0 to 3.3 V for the MCU. I posted a similar question here but it specified that the voltage would range from 0 to 60 V. The difference for this question is how to bias the voltage appropriately. I also posted another question about biasing the output of a current sensor for an ADC, but it involved biasing a balanced voltage around 0 V. I am having trouble adapting the answer to this problem. Diagram from answer: Figure 1. Diagram from previous answer An attempt to emulate the design methodology would be: 24 V maps to 1.65 V 38 V maps to 3.3 V 10 V maps to 0 V The most basic circuit model: How to design the bias? AI: Rearranging: 38 V maps to 3.3 V 24 V maps to 1.65 V 10 V maps to 0 V simulate this circuit – Schematic created using CircuitLab Figure 1. An 11.5:1 potential divider. The simplest solution is to use a potential divider with a ratio of 38:3.3 or 11.5:1. This would result in: 38 V maps to 3.3 V 24 V maps to 2.08 V 10 V maps to 0.868 V The 0.868 V offset can be removed in software. Again, you lose a little resolution with this approach. If a negative voltage supply is available then the offset can be removed. simulate this circuit Figure 2. With a negative rail available the offset at minimum input voltage can be removed. How: The span is 38 - 10 = 28 V. This has to be scaled to 3.3 V so a divider ratio of 28 / 3.3 = 8.5:1. Let's use 7.5k and 1k to give us the required ratio. Now we need to figure out the negative reference voltage. At 10 V in Vout will be 0 V. With the 8.5:1 ratio we will need to hold Vref at \$ - \frac {1}{8.5} 10 = -1.18 V \$. So, R1 = 7.5k, R2 = 1k, Vref = -1.18 V should do the trick. I'll leave it to you to work out how to create the reference voltage.
H: How to block low voltages in a very low current circuit I have a circuit circuit fed by a 48V nominal lithium battery source. I'm using a few simple resistors to divide the voltage down to a suitable range to drive a p-channel mosfet gate. When the battery goes into BMS cutoff, I expected 0V and open circuit would be the conditions, and for that set of conditions, my circuit works perfect in bench tests. But it turns out the BMS manufacturer delivers 6V during BMS cutoff, and they don't provide any info about the exact nature of that source. They even called the 6V "fake volts", whatever that means. So the end result is that I want to block those low voltages so my circuit behaves like an open circuit below some threshold voltage, say 39V. A zener diode seems like the answer, but they have a minimum current of about 1-3mA needed to go into breakdown, and my circuit requires low power consumption, so it normally only uses 350 uA. I really don't want to waste more power to solve this problem. Is there any other simple way to block low voltages (< 10V), or only allow high voltages (> 39V) to pass? Key word is simple, and with 250-500 uA power consumption. If it just won't work this way, I'll redesign the whole thing using a voltage comparator or op-amp, etc, but I'd much rather use my existing circuit. It's very stable, has very low current consumption, has a test function, an LED indicator, and allows for a separate power source to deliver the output signal of + 12V which I use to shut down alternator charging. Any help is greatly appreciated. The only thing I need to know is how to block low voltages or create an open circuit condition below some set threshold voltage without wasting a lot of power. UPDATE: Here's a schematic of just the core circuit without the LED indicator on Vout and the pushbutton tester that I use to short the output of R1 to ground. Please note Vstarter and Vhouse share a common ground. The p-FET is rated for 30V so that it can handle a gate voltage of 16.3V to 24.5V from the divider depending on the output of a 48V nominal battery (40V to 60V). The 12V nominal source can be as high as 15V, so I wanted the gate voltage to be higher when the battery is operational. I was told by another helpful person on this forum that was important. I think he said the FET could be damaged otherwise, but maybe it was only to keep the gate switched off. I was able to briefly test during a BMS cutoff and the 6V output will power an LED directly, so it does deliver some amount of mA. My circuit also appears to work under that condition. I get the expected 12V at Vout. But is the p-FET okay with 2.4V on the gate input and 12V (can be up to 15V) on the source? I thought @nanofarad explained that having the source voltage higher than the gate was a problem. Is that only for normal operation, but for my case a good thing since I actually want the p-FET to be conducting when the voltage is significantly lower, like the 2.4V it gets during this odd 6V BMS cutoff output? AI: it turns out the BMS ...delivers 6V during BMS cutoff... They even called the 6V "fake volts", whatever that means. The voltage may be caused by leakage through some device, most likely a transistor. They call it "fake" because it has a very high impedance source. It may be picked up by an oscilloscope, or a high impedance voltmeter, or the gate of a mosfet. Or the voltage may be residual voltage from a charged capacitor. However, with any significant load, the voltage will drop to near zero. One solution to such problems is to use a pull down resistor. However, as you wish to limit the lost current, both when the supply voltage is low, and when it is quite high, some sort of constant current sink might be more appropriate. However, this solution may not be satisfactory if the "fake" voltage turns out to be "not so fake". An alternative solution involves a series switch and a Zener diode. For example: simulate this circuit – Schematic created using CircuitLab You objected to the use of a Zener diode stating: A zener diode seems like the answer, but they have a minimum current of about 1-3mA needed to go into breakdown, and my circuit requires low power consumption, so it normally only uses 350 uA. It may be the case that when the current through a Zener is small, it's behavior is not well documented. However, according to the 1N5363B datasheet, the 1N5363B has a maximum reverse leakage current of 0.5uA. I thus suspect that even if it misses it's nominal breakdown voltage, it will breakdown somewhere near where you want it. As I do not know the current requirements from your nominal 48V supply, you will need to choose the series MOSFET in this circuit, and depending upon the max Vgs of your choice, you may need to choose a different Zener diode. But since there is lots of space between your minimum 39V on voltage and 6V that appears when the supply is "off", you should be able to find values that switch off your series mosfet within that range. Now here is a shunt circuit that may solve your problems. The circuit could definitely be improved. simulate this circuit Here is what the current drawn by the circuit is for various voltages.
H: How do I create a split component with shared pins between symbol parts on altium? I'm trying to create a symbol for a dual op-amp on Altium designer, I want to have the symbols be the classic 5 pin representation of an op amp with both inputs, an output and the power pins. But when I place the pins on both symbols the pin is repeated on the list, is this how it's supposed to work or do I need to do some special process to share those pins between parts? AI: I think what you're looking for is a property called "Part Number" in the schematic pin properties. It's a bit convoluted as this field has a special meaning in some contexts. You should start by reading and understanding the section on the "Part Number" field in the pin documentation here: https://www.altium.com/documentation/altium-designer/sch-dlg-schcomponentpinspropertiesformcomponent-pin-editor-ad The TL;DR is that for multi-symbol parts, you can set the pin's "sub-part" association by setting the "Part Number" field. If you set it to zero, it's a single pin that appears in all sub-parts. It's best to play around with it to get a good feel for how it works...
H: Automatic Fence Lighting with Alarm The circuit below has a BC557 transistor (Q1). Is this transistor functioned as a switch? AI: U1 acts more as the switch, since it is running at maximum open-loop gain, which is greater than about 20,000. It is unlikely that U1's output voltage will be found near the mid-way point of the 9V DC supply: it will either be saturated near ground, or up near +9V when LDR1 is illuminated. Q1 has no voltage gain - it is acting more as a buffer, and it also adds a small DC offset, so that the LED is off while the LDR1 is illuminated.
H: How can I get a full guide to choosing the right IC package? I often find a variety of IC packages options for one chip. I select among them randomly according to the availability, despite my concern about the vibration and shock reliability I googled everywhere but still have not found a satisfying book or tutorial. AI: Vibration and shock mechanical issues are common on new reflow solder joints when the thermal profile and solder process is not optimized. These skills and whoever is assembling the board determine which package you choose for experience on “almost opens” and almost shorted from solder balls. If you are choosing an u known or u qualified design and PCB contract Mfg source, then repetitive shocks applied to the board with random or periodic bumps within a industry standard spec such as 5g for ground or 15g or more for aerospace. In my case it was once 100g shock 10ms for rocket instrumentation. For automotive applications conformal coating is often used to reduce solder joint stress and reduce contamination effects.
H: Need help to bypass the momentary switch in this latching ciircuit (but keep using it.) I’m using this circuit to turn on and off an Attiny167 and an LED driver with the push of a micro switch. My circuit is powered by an 8.4V battery. In the “load” part of the circuit there’s a voltage regulator to 5V, the LED driver and the Attiny. It works pretty well, and with a HIGH signal from the MCU I can also shut down the circuit without needing to press the button. I’d like to be able to, by using another output pin on the MCU, keep this latching circuit always ON, and keep it ON no matter if the button is pressed or not, until I choose to. What should I change in this circuit (if possible) to be able to do that? AI: I see it now, thanks. You could add a second NFET in parallel with the first one, but with the gate driven by the processor. This would keep the PFET conducting even with the first NFET momentarily turned off.
H: High-side NMOS for buck converter? I'm working on designing a buck converter, and I've been using LTspice to simulate the circuits. However, it seems that I'm misunderstanding something. My understanding is that one should not use an N-channel MOSFET for high-side switching, but when I was researching buck converter design, I came across two separate videos that used schematics with high-side N-channel MOSFETs. Below are the links to these videos with embedded time stamps to the schematics I'm referencing (no need to watch the entire videos): https://youtu.be/uI7OWTCDc6M?t=10 https://youtu.be/IpoI6ERn5zM?t=240 I wasn't convinced that this should work, so I whipped up a schematic in LTspice to model this. But lo and behold, it seems that an NMOS on the high side is indeed resulting in buck conversion. What's more, when I replaced the NMOS with a PMOS, the voltage wasn't bucking at all. I feel like I'm losing my marbles. What's going on here? AI: NMOS devices require a positive Vgs to turn on - that means the gate voltage must be higher than the source voltage. In your circuit you are driving the gate with a 0-3.3V signal, which means the source voltage, and hence output voltage, can never be more than 3.3V (less the threshold voltage to have any significant current flow), otherwise the MOSFET turns off again. To do high-side switching with an NMOS device, you need a floating gate drive circuit - your 0-3.3V signal needs to be shifted to track the source node rather than ground. This is typically accomplished using a floating power supply (bootstrap circuit, or isolated DC/DC), in combination with a signal isolator (opto-coupler, digital isolator, etc.).
H: Sequence Impedance/Zero Sequence Impedance of lines I am trying to calculate the Sequence Impedance/Zero Sequence Impedance of couple of lines, but Im not sure if the calculation are right, and besides there are some tricky things on the data provided. Tower (in meters) • PS30 • Nominal voltage 34.5 kV • Circuits 1 • Conductors p/phase 1 • 60 Hz • terrain resistivity 100Ohm/m • Ground wires No • ACSR, 266.8 KCM, 26/7 • MGR/ 6.61416 mm=0.260400141inch=0.021700001ft • rac 0.23426 Ohm/km (0.350ohm/mi) • wk=0.12134 Then in the calculations \$ \large{}D_{e}=2160\sqrt{\frac{\rho}{f}}=2160\sqrt{\frac{100}{60Hz}}=2788.5480ft \$ \$ \textbf{$r_{ac}=0.23426\Omega/km=0.37692434\Omega/mi$} \$ At 60Hz \$r_{d}=0.09528\Omega/mi;\omega k=0.12134\$ Distance between wires \$ D_{ab}=3.76804ft D_{ac}=6.10236ft D_{bc}=3.76804ft D_{abc}=4.42493ft \$ Mutual inductances \$Z_{aa}=Z_{bb}=Z_{cc}\$\$=r_{a}+r_{d}+j\omega kln\frac{D_{e}}{D_{s}}\$ \$=(0.37692+0.09528)+j(0.12134)ln\frac{2788.5480}{0.0217}\$ \$0.4722+j1.427409\Omega/mi\$ \$Z_{ab}=r_{d}+j\omega kln\frac{D_{e}}{D_{ab}}\$ \$0.09528+j(0.12134)ln\frac{2788.5480}{3.76804}\$ \$0.09528+j0.8016595\Omega/mi\$ \$Z_{ac}=0.09528+j(0.12134)ln\frac{2788.5480}{6.10236}\Omega/mi\$ \$0.09528+j0.743159\Omega*mi\$ \$Z_{bc}=Z_{ab}=0.4722+j1.427409\Omega/mi\$ \$Z_{abc}\$=\begin{array}{ccc} 0.4722+j1.427409 & 0.09528+j0.8016595 & 0.09528+j0.743159\\ 0.09528+j0.8016595 & 0.4722+j1.427409 & 0.09528+j0.8016595\\ 0.09528+j0.743159 & 0.09528+j0.8016595 & 0.4722+1.427409 \end{array} $ My questions are *if this is correct since in the data provided the value of \$ rac =0.23426 Ohm/km\$ was used (converted to Ohms/miles) or should it be used the tables value of 0.350Ohm/mile. then how can be calculated the zero sequence? Does it need to be transposed and apply \$[A]^{-1} [Zabc] [A]\$. Note: I am using the book of Anderson, Analysis of Faulted Power Systems, but if there is another way to do so please tell it. The main concern is if the values are ok, since the notation sometimes are referred in different way. AI: Yes, once you have calculated the impedance matrix for the line, \$Z_{abc}\$, you need to pre-multiply it with \$A^{-1}\$ and post-multiply it with \$A\$. $$Z_{012}=\begin{pmatrix}Z_{00} & Z_{01} & Z_{02} \\\ Z_{10} & Z_{11} & Z_{12} \\\ Z_{20} & Z_{21} & Z_{22} \end{pmatrix} =A^{-1}Z_{abc}A$$ Turan Gönen called this equation the "similarity transformation" in his excellent text, Electric Power Transmission System Engineering: Analysis and Design. If your line is perfectly transposed you will find the resulting matrix \$Z_{012}\$ will be a square diagonal matrix (no coupling between the sequence networks). But, since your line is not transposed, their will be off-diagonal terms. This means that their will be coupling between the sequence networks (e.g. zero-sequence current flow could/would produce positive and negative sequence voltage etc.). Yes, use the \$rac\$ presented as input data. Why wouldn't you? You can verify your calculations with commercial programs like this one or free ones like ATP or OpenDSS.
H: Interpreting LED light strip data sheet I'm trying to understand data sheets for flexible LED light strips. I'm looking at https://www.inspiredled.com/wp-content/uploads/2018/03/12V-SB-White-Flex-Spec-2.2.pdf, for example. It says: To be installed in accordance with NEC, using Class 2 12V power supply only! At the bottom of the subsequent table, it says: Power Source Max Length 150W Transformer 1046.5” (135W) Questions Is a class 2 power supply limited to 100VA? I've mostly dealt with DC, so I've forgotten a lot about VAs, but I'm roughly equating VA to Watt. Have I forgotten something important? Wouldn't a 150W transformer power source violate the limits of Class 2? Do strips like this do their own rectification so that they can be powered directly from a transformer? Is using a switch-mode power supply rated 12V ⎓ 10A Class 2? Is it more efficient than a transformer? Does a Class 2 power supply require a UL or other NRTL symbol to be used in the US? AI: Here's a piece of the puzzle... from http://escventura.com/manuals/sola_introNECclass2_rg.pdf This table, "Table 11(b)", is for DC power supplies. Table 11(a) has the requirements for AC transformers. From that same tech note, "Not inherently limited" means... an additional protection device (usually a mechanical circuit breaker or fuse) protects against overload within a defined time. The additional protection device must be installed within or closely connected to the power source, so that it can be regarded as one unit. and "inherently limited" means: that the power source itself limits the output current (e.g.: using a electronic or magnetic circuitry). It would seem that the limits on the "Not inherently limited" kind refer to the power supply + additional protection device operating together.
H: In a CPU, how are LU inputs/outputs controlled and fed back to registers? Basic problem: CPU instruction chooses which register to feed into a LU (such as an ALU), which then outputs a number somewhere and fed back into a register. But sometimes you want to feed the answer back into the same register. An example is Add RA and RB and store the answer in RA. So trying to imagine that in my head just gets me stuck in an infinite feedback loop. So I searched around online for a relatively long time, but only got irrelevant stuff about what's inside an ALU. I've done 4-bit and 8-bit adders before, even got the carry bit working. That's not what I'm looking for here. I'm looking for the architecture outside the LU that controls the inputs and outputs, and feeds it back to the registers. As far as I'm concerned, right now the LUs can be black boxes. I decided to try to draw my own diagram and see how far I can get. (Click for higher resolution.) In this example, I have four 4-bit registers, and four LUs. One of the LUs does only unary operations, so only takes one register as an input. The other three LUs do binary operations so they take two registers as inputs. LU1 has one multiplexer guarding the input. 2 control bits choose which register to feed in. The other LUs have two multiplexers guarding their inputs. (Note that means you can "copy" one register into both inputs, so e.g., use Reg A and Reg A in LU2.) The LU processes the inputs and generates an output. In fact, all LUs output their answer into another multiplexer, which has 2 control bits choosing which value to send to the final thing, which is a plus-shaped demultiplexer. 2 control bits choose which register to send that value to. So finally we get to the problem. Storing the answer in Reg A, when Reg A was used as an input in the first place, is going to cause problems. Wildly varying states that might settle, might not. You could call this a racing condition. Now I know "the obvious answer" is to use a clock to slow down the transmissions. But I don't know how to use it. Which parts need a clock? The MUXs? The LUs? The DEMUX? The Regs themselves? All of the above? I also know there is a thing called the three-state buffer, but as far as I can tell it just uses impedance to "disconnect" a line, as if it's cut in half, so that the MUX or DEMUX is no longer driving (determining) the voltage state of the line. I'm sorry this problem took many paragraphs to write out. I thought it was simpler to explain, but can't think of good ways to condense it. Hopefully someone can enlighten my architecture, or at least a link to a good diagram with control parts displayed and explained. I feel like I'm just missing one small critical piece that will make everything click. AI: Registers are normally made from D flip-flops, which transfer and hold data on the rising (or falling) clock edge. Assuming the data hold time of the flip flops is less than the propagation delay through the LUs etc., these D flip flops are all you need to prevent a race condition. The rest can all be combinatorial logic that lets the signals flow through. In operation you would set the MUXs so the output of the source register(s) is connected to the LU and then back into the registers. After waiting for a time long enough for the signals to propagate through the logic you then clock the destination register, which stores the 'answer'. The clock forces the circuit to operate at a lower speed than it could do if you let everything happen as fast as possible, which sounds bad. But it greatly simplifies the design and improves reliability because the signals just have to be stable before the next clock, whereas with unclocked logic you would have to carefully adjust the propagation delays so the signals arrive at the correct times. Varying temperature and voltage could cause different parts of the CPU to work at varying speeds, upsetting the timing and making it misoperate. Bottom line? You need a clock - not just for this circuit but other parts of the CPU as well. Some operations might have to be done in several steps with temporary registers holding intermediate results. To get the proper sequencing and account for delays you might need several consecutive clocks per machine cycle, which could be done by using both edges, having several synchronous clock inputs with skewed phases, or clocking a ring counter.
H: why EDA industry has moved on from vhdl to verilog/system verilog? And is there a chance of re-emergence of VHDL in commercial VLSI/EDA professions as an in demand skill? AI: Simply put: it hasn't, not for the implementation at least. sv has become more popular as the verification framework, and conversely as the top-level integration language, because it's easier to use UVM in sv. Also, VHDL is a horrible verification language. That doesn't mean that large parts of the actual designs are not still written in VHDL, most digital designs I've worked on in the last few years have been 50-50 verilog and VHDL. Pretty much the same as I've seen in the last few decades. FPGA projects tend to lean more towards VHDL, ASICs more towards verilog, but the differences are small in my experience. So the increase in demand for SystemVerilog you see is (almost) purely for verification, not design and implementation.
H: Why does a 2nd capacitor and coil smooth this signal? I came, more or less accidentally, across this image here: I understand all circuits and their resulting signal output, except for the last/lowest one. Shouldn't it look like this with one capacitor already? How has the coil to be understood physically/technically? AI: No, the waveforms should not look identical. The added inductor and capacitor form an LC filter which filters out AC ripples and passes DC.
H: Why pull down and pull up resistors are necessary? I just started building some logic circuits for gaining some experience in the summer while waiting for the next semester and I learnt about the concept of pull-up and pull-down resistors. The concept is understandable; for the case of pull-down resistors, they are for connecting a logic gate to the LOW state without causing the HIGH state to short to the ground and damaging the circuit when the logic circuit is switched to HIGH state with a switch. What I don't understand is: why instead of connecting the logic gate to the ground permanently to get a LOW state and switching the HIGH state ON and OFF to change its state, why aren't we using an SPDT switch to switch between LOW and HIGH states without needing any resistor? Such comparison below: AI: If this is a break before make switch, in the very short period while the switch is changing from one side to the other the input will be floating and can rapidly change state several times. In some instances this would be undesirable. As pointed out in the comments below, even with a non-floating input, switch bounce can still occur. Depending on the type of switch, this can also cause a period of rapid state changes when the switch is operated. There are numerous answers covering ways of overcoming switch bounce on this site.
H: Laplace transform problem Can you help me with these laplace problems ? I'm having trouble understanding how to do it. ( u(t) is heaviside step function ) AI: Apply the definition of Laplace (see the limits of integration) and write down the formulas. Think that Laplace is property additive ? You can therefore write Laplace formulas for each term for the first one : a) and c). For the b), think a little about after writing down the formula cos with complex exponentials. When done, poles and zeros appears clearly. What is ROC ? (google it with Laplace) https://www.tutorialspoint.com/signals_and_systems/region_of_convergence.htm If I made no errors ... Here are my answers to help ... my old "Maple" sheet. Something strange. Perhaps a bug. Are you sure that in the first line, it is ...*u(-t) ? Ok. Verification done. see link above. Theory is not always related to "physical phenomena".
H: What is the difference between buck and step-down converter I always thought "buck" and "step-down" are synonyms. But now I'm looking at two datasheets: CAT4201 CAV4201 They seem very similar, but the first is described as "350 mA High Efficiency Step Down LED Driver", the second as "LED Driver, 350 mA, Step-Down Converter". Though, most of the pages of the datasheet are identical. What is the difference between the two drivers? AI: They're the same, it's just a matter of terminology and whoever happened to write the datasheet at the time. The difference between those two components is that the CAV is automotive AEC and PPAP qualified, while the CAT is not, which explains the price difference.
H: FTDI FT230X Fails to enumerate I've been trying to get a UART made with an FTDI chip - this one to be specific: https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT230X.pdf I've wired it up to be USB bus powered, as per section 6.1 of the manual above. However, when I plug into Linux I get this: [20552.129143] usb 2-7: new full-speed USB device number 11 using xhci_hcd [20552.129267] usb 2-7: Device not responding to setup address. [20552.341260] usb 2-7: Device not responding to setup address. [20552.549140] usb 2-7: device not accepting address 11, error -71 [20552.549178] usb usb2-port7: unable to enumerate USB device I'm not sure where I've gone wrong. Here is how I've setup the FTDI chip: And here is the USB end: Does anyone have any ideas at all please? I'm wondering if the reset pin might be the cause, or possibly something with the 5 and 3.3V going on, but as far as I can see, this matches the datasheet exactly. Cheers! Ben AI: Try removing C28 and C29. I could only get mine working properly without those values.
H: What is the difference between register and memory? I am currently studying the difference between microprocessors and microcontrollers and one of them says that: Microprocessors have less number of registers, so more operations are memory based. Microcontrollers have more number of registers and hence more operations are register based. What I don't understand is, isn't memory and register the same ? I thought that register is just a memory location with a name. AI: Some differences: In a lot of cases accessing registers is a lot faster than accessing memory. The memory elements for registers is always found on the processor chip. Addressable memory can be external to the processor chip. It can also be found on the chip and you can have addressable memory both on the chip and external to it. A memory address can be several bytes long (depending on the architeture). By comparison a register number is usually very small. So instructions which refer to memory addresses are generally longer than those which only refer to registers. Longer instructions take up more program memory and can take longer to process. When you come across a statement like: Microprocessors have less number of registers, so more operations are memory based. Microcontrollers have more number of registers and hence more operations are register based. they are most likely referring the early 8-bit microprocessors. Modern CPUs (like the ones found in your laptop) have large register files available to them. Memory itself in a computer system is very hierarchical. A good exposition of this is paper What Every Programmer Should Know About Memory - especially the section on caches.
H: What does mean if there is P+ and Q-? If in a circuit there is real power positive and reactive power negative, what does mean in terms of power flow? I undestand that the real power is produced in the generator/source and goes to the charge and the reactive goes backwards from the charge to the generator. UPDATE I have read both answers, but this makes me wonder the meaning of equal real and reactive power. What does it mean? AI: Real power flow is controlled primarily by angular differences, flowing from leading angles toward lagging. Reactive power is controlled by voltage magnitudes, flowing from higher voltage toward lower. This assumes a system where all bus voltages are reasonably near 1 p.u. and relatively small angles. This is the basis of a decoupled load flow by the way. Referring to the circuit above (with \$X=X_G+X_S\$) the power flow equations are, $$P = \frac{EVsin\theta}{X}$$ $$Q = \frac{E^2-EVcos\theta}{X}$$ So, looking at \$P\$ we can see that in a system where the bus voltages are near 1 p.u. varying the angle \$\theta\$ will be the primary way to control real power flow. Looking at \$Q\$ we can see that for normal angular differences (few degrees) between buses the reactive power flow is controlled by varying the bus voltages. e.g. \$cos(5°)= 0.9996\$ is not dominant when compared to \$E=1.1\$ and \$V=1.05\$. Ignoring \$cos(5°)\$ the numerator is \$0.055\$. Including \$cos(5°)\$ the numerator becomes \$0.059\$, only a 7% change. So, for example, if a generator is not producing enough reactive to satisfy the \$I^2X\$ var drop in it's step-up transformer, then you will see reactive power coming into the HV side of the transformer from the system. We add capacitors at some load buses to provide \$I^2X_C\$ reactive power at the load point. So, this reduces the reactive power coming from the source and reduces the real power loss on the line (which is proportional to \$I^2R_{Line}\$). You will see a corresponding rise on the load bus voltage when the caps are online. UPDATE: To answer OP question - "What is the meaning of equal real and reactive power?" We look at P,Q quantities on an x-y coordinate system where the x-axis is the real (P) axis and the y-axis is the imaginary (Q) axis. So, with \$|P|=|Q|\$ and \$P\$ positive and \$Q\$ negative we have the plot below. Note that by definition \$P\$ and \$Q\$ are always in quadrature (separated by ±90°). From this we can draw the power triangle and determine power factor, apparent power (\$S\$) etc. The power factor angle, \$\theta\$, is the angle between the real (\$P\$) axis and the hypotenuse (\$S\$). Power factor is the cosine of this angle \$\theta\$. So, when \$P\$ and \$Q\$ have equal magnitudes with \$P\$ positive and \$Q\$ negative we find, $$\theta=tan^{-1}\frac{P}{-Q}={-45°}$$ and $$power factor = cos({\theta}) = \frac{1}{\sqrt{2}}=0.707$$
H: How can I show that there is no current over resistor I made a contest question regarding find the entire current provide from voltage source 45V connected between a-c terminals. Follow the picture below: Original circuit My resolution I can made it but i have some issues about the decimal number and hard work to the numerical solution (sucks). In fact, my curiosity appears and i decide to simulate on Everycircuit and bingo. I realize that the resistor between point d and b doesn't consume any current. But i cant figure out why this situation happen. Any suggestion to visualize this? tips? Thank u! AI: simulate this circuit – Schematic created using CircuitLab The 9 ohm (A-D, D-C) and 6 ohm (A-B, B-C) resistors each form a voltage divider with 22.5V at their midpoints. Since the 9 ohm resistor between B-D has the same voltage at both ends, no current flows through it.
H: Capacitor voltage function How would you find the mathematical function of the voltage discharge curve for a capacitor considering the following circuit and conditions: When time t=0, the capacitor is fully charged with the voltage V. The current through resistor R is not negligible. The constant current source is "powerful" enough to bring down the voltage of that node. If the exact function cannot be determined, maybe at least some individual points could be found. I tried to apply Kirchhoff's law: which means: and after integrating At this point I don't know what to do since I cannot integrate an unknown function: Uc(t) (which is also the function I want to find). Any ideas or different approaches? Thanks! AI: After you get to this point: you have to solve a first order differential equation: https://www.mathsisfun.com/calculus/differential-equations-first-order-linear.html
H: Framing Error in STM32G4 LPUART I have built a discrete buck charger circuit which is controlled by an STM32G4. The G4 is simultaneously measuring voltages, regulating currents, temperatures and communicates to a BMS via UART. Now I have the problem that the G4 states that there is a framing error in the UART communication, but a sniffer board I made states that everything is correct. Moreover I measured the baud rate with an oscilloscope and everything is correct there as well. There is also no distortion or noise visible. My assumption now is that maybe the G4 is at the limit of its calculation capacity and the UART interrupts are not processed in time. Is this a valid assumption and if so, how am I able to prove it? Are there any other reasons why a framing error could be generated? AI: The only reason for a framing error is when an UART frame is received with an invalid stop bit. The invalid stop bit may be invalid due to noise or too large difference in the baud rates.
H: Reference layer for stripline / microstrip I have a question. I read everywhere in manuals that for a stripline (or microstrip), the reference layer can be not only the ground plane, but also the power plane. Actually, I had a couple of questions: Do I understand correctly that these layers must have good capacitive coupling in the entire frequency spectrum of the signal, at least in the places of the transmitter and receiver? Power decoupling capacitors often provide this coupling. If the first is true, then for conventional MLCC capacitors, which are put by the power supply, the series self-resonant lies in the range of 10-300MHz (depending on the type-size and rating) and then for the conditional signal in 1GHz, the power plane will no longer be the reference layer ? And there are exceptions, because there is a capacitive connection at the board level, but it is not so easy to evaluate this connection for frequent (without modeling), and therefore, cannot refer on the power plane for high hrequncy Am I reasoning correctly? Or are there serious flaws in the reasoning? AI: It is important to choose high SRF caps with low ESR for the spectrum being used when the power plane is used as a reference. This can include very thin laminate between the two planes. These caps tend to have a width greater than the length. Standard MLCC caps are 2:1 ratio in aspect ratio like 805 603 402 while the best microwave caps reduce the inductive length to width ratio <1. 10 pF NP0 caps for 1 GHz and 3 pF for 5 GHz is common. I found this reading Link for reference. But normally you wouldn’t choose the power plane for an AC reference for GHz + wavelengths unless you had to.
H: How much gain/bandwidth can I practically get out of the OPA1692? I've built an Electret Microphone preamp based on this application note from the OPA1692 datasheet (page 27): The circuit seems to work fantastic, but I've realized that I'd ideally need a bit more gain than the proposed 24.8 (~28 dB). Ideally I'd like to aim at something around 40 dB gain. The problem I'm facing now is that I'm not quite certain what gain the OPA1692 can sustain. In the data sheet it says that it has a GBW of 5.1 MHz. 40 dB would equal to a gain of 100, which would narrow my bandwidth down to 50 kHz. I obviously only need 40 dB for 20 kHz, but I've heard things about not going too close to the amplifiers limits. So how far is too far? How much headroom do I have to consider? Oh and one more thing: The 2.2nF capacitor in the circuit limits the gain of the amplifier to a corner frequency of ~20 kHz. I've realized too late that I should have better selected a corner frequency higher than that so that my passband (20 kHz) actually has a reasonably flat response (do they really not consider this when designing these circuits or am I missing something?). I could simply reduce the capacitor size to fix that, but since I'd be already close to my amplifiers limits, would the extra amplification outside the audio band cause any problems? PS: Sadly I've already built this circuit on a PCB. Changing components would be a trivial thing, but before I redo the board I'd rather just live with not enough gain. AI: The closed loop gain of an amplifier rolls off at high frequencies due to its GBW limitation. You have calculated correctly that with a GBW of 5.1MHz and a gain of 100 (40dB) the amplifier's bandwidth would be limited to about 50kHz. The bandwidth of an amplifier follows the roll-off response of a single pole RC low pass filter and so at 50kHz (the cut-off frequency) the amplifier gain will be down 3dB (0.707) of its midband gain. Beyond this frequency of 50kHz the gain rolls off at -6dB/octave - the gain halves for every doubling of frequency. If you were to leave out completely the parallel feedback capacitor (2.2nF) and rely on the natural rolloff of the amplifier then, because the gain is down to 0.707 at 50kHz, I estimate that the gain will be down to approximately 0.9 of its mid-band gain at 20kHz - I would say a fairly reasonable response. The following resistor values give a mid-band gain of approx 100 (40dB). The 2.2uF cap (in conjunction with the resistors) in the original circuit gave a lower cut-off frequency of about 30Hz - The gain was down to 0.707 (-3dB) of mid-band gain at 30Hz. I wasn't sure how to calculate this and so I simulated it in Circuit Wizard. To achieve a similar lower cut-off freq with the new resistor values (actually 20Hz) you need to replace this cap with a 10uF cap. This cap should be non-polarised despite being shown as polarised in my circuit diagram. You'll need to test the circuit once modified but hopefully running the circuit without a parallel feedback cap (2.2nF) won't give any stability issues. Increasing the closed loop gain reduces the feedback fraction (beta) which has a reducing effect on the loop gain (B.Aol). This in turn increases phase margin which will hopefully result in an overall stability increasing effect on the amplifier.
H: PWM motor control, MOSFET getting very hot I have problem driving a high current DC motor (RS-775 24V-12V 80W), the MOSFET getting very hot when I use PWM signal. I'm using Raspberry Pi 3 b+ to generate PWM signal at (pin 8) which connected to MOSFET gate through 1 kΩ resistor as the schematic shows: simulate this circuit – Schematic created using CircuitLab Notes: The threshold voltage of IRF3205 is between 2-4 V and the Raspberry Pi gives signal of 3.3 V that will be fine (i thought...) The datasheet shows that the MOSFET can handle Id = 110 A Rds =8 mΩ Tests : Without load every thing works good, motor spin very fast with current < 2A, no heat at MOSFET. When I tried to run the motor with load at 6 V it consumes about 8.6 A and there was the problem MOSFET and Flyback diode goes very hot!! First I tried to use 3.3 to 5 V converter to amplify the PWM signal to 5 V but this made things worst the MOSFET getting hot faster than before. 3.3 V to 5V logic level converter photo: As a test I removed the PWM signal wire from gate and use the V+= 5 V instead , the motor spins and the MOSFET has a reasonable amount of heat. Here is the schematic: simulate this circuit Conclusion : The reason of the heat is the PWM itself, the ON/OFF effect is the reason of the heat. This is my opinion, and any one have other explanation or solution to the heat I hope he answers. Thanks. AI: The threshold Voltage of IRF3205 is between 2V-4V and the Raspberry Pi gives signal of 3.3v that will be fine No. Gate threshold is where the MOSFET barely starts conducting. So if it varies between 2-4V and you are applying 3.3V you are at best barely turning it on and at worst you aren't turning it on at all. You use at least the Vgs listed to get the rated RDson in the datasheet. You should be applying a Vgs of at least 10V. Ignore Vgsth when using MOSFETs as a switch. You also need a gate driver which does three things: Supplies more current than your GPIO Supplies more voltage than your GPIO if the MOSFET gate source requires it Allows your low-voltage, low-current GPIO to control the two above. Your GPIO can't sink or source enough current to charge/discharge the gate-source capacitance fast enough so what is happening is that your MOSFET is spending too long in the inefficient transition region between conducting and blocking where it acts as a moderate value resistor. When blocking, there is lots of voltage across the MOSFET but no current so no heat. When conducting there is lots of current through the MOSFET but little voltage across it so little heat. During the transition region there is moderate/lots of current through the MOSFET and moderate/lots of voltage across the MOSFET so LOTS of heat. If you just switch the MOSFET on and off occasionally, you can get away with direct drive from GPIO (if the MOSFET is logic level, yours is not) since time spent in the transition region is very small fraction of the overall operating time and there is plenty of time to cool down. But when you're PWMing you're switching thousands of times per second you are entering the transition region just as often. You can buy gate driver ICs or you can make your own from discrete transistors in push-pull or totem-pole configurations if you choose to use MOSFETs in the level shifter they need to be logic level or else you will obviously run into the same problem you are trying to solve as drawn below, the PMOS must have |Vgs max| > 10 or 15V since that is what it will be when its gate is pulled LO by the GPIO. Otherwise zeners and resistors to clamp the PMOS Vgs to tolerable levels need to be added. You want these MOSFETs to be small so they have low gate-source capacitance and can respond quickly to the weak GPIO. CORRECTION FOR SCHEMATIC ABOVE: 1MOhm resistor on gate driver input should be pull-up, not pull-down. Website has glitched out and I can no longer edit the schematic. In the level-shifter, a current source or active pull-up (made of transistors) will be faster than a pull-up resistor since no RC time constant which will in turn switch your gate driver MOSFETs more quickly (if you are using MOSFETs in the gate driver stage). The 5 Ohm resistors are there to limit shoot-through since both gate driver transistors are being driven by the same control signal so there is no guarantee they won't both be moderately conducting as one turns off and the other turns on. Depending on the details of the transistor you are using and how the drive for them exactly turns out, you might be able to remove the 5 Ohm resistors and just tolerate the shoot-through current if it is small and fast enough. Another way to deal with shoot-through (when using MOSFETs in the gate driver at least) is to use diodes to route the gate current paths through different components during gate-source capacitance charge and discharge so that the turn off time is faster than the turn on time. This doesn't work with BJTs whose control depends more on base-emitter currents than base-emitter voltage. By the way, this approach works for power MOSFETs in half-bridges and H-bridges as well where you can't use any other shoot-through handling methods mentioned in this answer which rely on throttling power (makes too much heat for high powered circuits). My opinion is you should just use independently controlled gate signals in that case, but for gate drivers no one wants that extra complexity. simulate this circuit – Schematic created using CircuitLab You can also swap the positions of the NMOS/NPN and PMOS/PNP of the gate driver stage for a configuration with no shoot-through. This makes them act as source/emitter followers, more like amplifiers with a controlled crossover rather than switches. This then allows you to remove the 5 Ohm resistors which are only there to limit shoot-through currents which prevents them from limiting the current charging/discharging your power MOSFET gate-source capacitance. But the price you pay for this is that they won't reach the rail voltage as closely, but without those resistors they will traverse the middle region more quickly. simulate this circuit