repo_id stringlengths 5 115 | size int64 590 5.01M | file_path stringlengths 4 212 | content stringlengths 590 5.01M |
|---|---|---|---|
abforce/xposed_art_n | 5,218 | runtime/interpreter/mterp/mips/footer.S | /*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
.text
.align 2
/*
* We've detected a condition that will result in an exception, but the exception
* has not ye... |
abforce/xposed_art_n | 1,507 | runtime/interpreter/mterp/mips/op_cmp_long.S | /*
* Compare two 64-bit values
* x = y return 0
* x < y return -1
* x > y return 1
*
* I think I can improve on the ARM code by the following observation
* slt t0, x.hi, y.hi; # (x.hi < y.hi) ? 1:0
* sgt t1, x.hi, y.hi; # (y.hi... |
abforce/xposed_art_n | 1,479 | runtime/interpreter/mterp/mips/op_aget.S | %default { "load":"lw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
/*
* Array get, 32 bits or less. vAA <- vBB[vCC].
*
* Note: using the usual FETCH/and/shift stuff, this fits in exactly 17
* instructions. We use a pair of FETCH_Bs instead.
*
* for: aget, aget-boolea... |
abforce/xposed_art_n | 1,559 | runtime/interpreter/mterp/mips/binop.S | %default {"preinstr":"", "result":"a0", "chkzero":"0"}
/*
* Generic 32-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0 op a1".
* This could be a MIPS instruction or a function call. (If the result
* comes back in a register other than a0... |
abforce/xposed_art_n | 1,482 | runtime/interpreter/mterp/mips/op_shl_long.S | /*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
* distance) is 32-bit. Also, Dalvik requires us to mask off the low
* 6 bits of the shift distance.
*/
/* shl-long vAA, vBB, vCC */
FETCH(a0, 1) ... |
abforce/xposed_art_n | 2,216 | runtime/interpreter/mterp/mips/entry.S | /*
* Copyright (C) 2016 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,335 | runtime/interpreter/mterp/mips/binop2addr.S | %default {"preinstr":"", "result":"a0", "chkzero":"0"}
/*
* Generic 32-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
* This could be an MIPS instruction or a function call.
*
* If "chkzero" is set to 1, we perform ... |
abforce/xposed_art_n | 14,836 | runtime/interpreter/mterp/mips/header.S | /*
* Copyright (C) 2016 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,378 | runtime/interpreter/mterp/mips/op_aput.S | %default { "store":"sw", "shift":"2", "data_offset":"MIRROR_INT_ARRAY_DATA_OFFSET" }
/*
* Array put, 32 bits or less. vBB[vCC] <- vAA.
*
* for: aput, aput-boolean, aput-byte, aput-char, aput-short
*
* NOTE: this assumes data offset for arrays is the same for all non-wide types.
* If ... |
abforce/xposed_art_n | 1,268 | runtime/interpreter/mterp/mips/op_shr_long_2addr.S | /*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
*/
/* shr-long/2addr vA, vB */
GET_OPA4(t2) # t2 <- A+
GET_OPB(a3) # a3 <- B
GET_VREG(a2, a3) # a2 <- vB
... |
abforce/xposed_art_n | 1,349 | runtime/interpreter/mterp/mips/zcmp.S | /*
* Generic one-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
* for "if-le" you would use "gt".
*
* for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez
*/
/* if-cmp vAA, +BBBB */
GET_OPA(a0) ... |
abforce/xposed_art_n | 1,108 | runtime/interpreter/mterp/mips/op_iget.S | %default { "is_object":"0", "helper":"artGet32InstanceFromCode"}
/*
* General instance field get.
*
* for: iget, iget-object, iget-boolean, iget-byte, iget-char, iget-short
*/
EXPORT_PC()
FETCH(a0, 1) # a0 <- field ref CCCC
GET_OPB(a1) ... |
abforce/xposed_art_n | 1,639 | runtime/interpreter/mterp/mips/op_goto.S | /*
* Unconditional branch, 8-bit offset.
*
* The branch distance is a signed code-unit offset, which we need to
* double to get a byte offset.
*/
/* goto +AA */
#if MTERP_PROFILE_BRANCHES
sll a0, rINST, 16 # a0 <- AAxx0000
sra rINST, a0, 24 ... |
abforce/xposed_art_n | 1,211 | runtime/interpreter/mterp/mips/op_ushr_long_2addr.S | /*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
*/
/* ushr-long/2addr vA, vB */
GET_OPA4(t3) # t3 <- A+
GET_OPB(a3) # a3 <- B
GET_VREG(a2, a3) # a2 <- vB
... |
abforce/xposed_art_n | 1,055 | runtime/interpreter/mterp/mips/unopNarrower.S | %default {"load":"LOAD64_F(fa0, fa0f, a3)"}
/*
* Generic 64bit-to-32bit unary operation. Provide an "instr" line
* that specifies an instruction that performs "result = op a0/a1", where
* "result" is a 32-bit quantity in a0.
*
* For: long-to-float, double-to-int, double-to-float
* If ... |
abforce/xposed_art_n | 2,496 | runtime/interpreter/mterp/mips/op_packed_switch.S | %default { "func":"MterpDoPackedSwitch" }
/*
* Handle a packed-switch or sparse-switch instruction. In both cases
* we decode it and hand it off to a helper function.
*
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them her... |
abforce/xposed_art_n | 1,847 | runtime/interpreter/mterp/mips/op_goto_32.S | /*
* Unconditional branch, 32-bit offset.
*
* The branch distance is a signed code-unit offset, which we need to
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
* our "backward branch" test must be "<=0" instead of "<0".
*/
... |
abforce/xposed_art_n | 1,546 | runtime/interpreter/mterp/mips/binopLit8.S | %default {"preinstr":"", "result":"a0", "chkzero":"0"}
/*
* Generic 32-bit "lit8" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
* This could be an MIPS instruction or a function call. (If the result
* comes back in a register other... |
abforce/xposed_art_n | 1,213 | runtime/interpreter/mterp/mips/op_float_to_int.S | %include "mips/funop.S" {"instr":"b f2i_doconv"}
%break
/*
* Not an entry point as it is used only once !!
*/
f2i_doconv:
#ifdef MIPS32REVGE6
l.s fa1, .LFLOAT_TO_INT_max
cmp.ule.s ft2, fa1, fa0
l.s fv0, .LFLOAT_TO_INT_ret_max
bc1nez ft2, .L${opcode}_set_vreg_f
l.s fa1, .LFLO... |
abforce/xposed_art_n | 1,616 | runtime/interpreter/mterp/mips/op_double_to_int.S | %include "mips/unopNarrower.S" {"instr":"b d2i_doconv"}
/*
* Convert the double in a0/a1 to an int in a0.
*
* We have to clip values to int min/max per the specification. The
* expected common case is a "reasonable" value that converts directly
* to modest integer. The EABI convert function isn't doing this for ... |
abforce/xposed_art_n | 1,450 | runtime/interpreter/mterp/mips/binopLit16.S | %default {"preinstr":"", "result":"a0", "chkzero":"0"}
/*
* Generic 32-bit "lit16" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0 op a1".
* This could be an MIPS instruction or a function call. (If the result
* comes back in a register othe... |
abforce/xposed_art_n | 1,219 | runtime/interpreter/mterp/mips/op_shl_long_2addr.S | /*
* Long integer shift, 2addr version. vA is 64-bit value/result, vB is
* 32-bit shift distance.
*/
/* shl-long/2addr vA, vB */
GET_OPA4(rOBJ) # rOBJ <- A+
GET_OPB(a3) # a3 <- B
GET_VREG(a2, a3) # a2 <- vB
... |
abforce/xposed_art_n | 1,064 | runtime/interpreter/mterp/mips/fbinopWide.S | /*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
* This could be an MIPS instruction or a function call.
*
* for: add-double, sub-double, mul-double, div-double,
* rem-double
*
*/
... |
abforce/xposed_art_n | 1,079 | runtime/interpreter/mterp/mips/op_aget_wide.S | /*
* Array get, 64 bits. vAA <- vBB[vCC].
*
* Arrays of long/double are 64-bit aligned.
*/
/* aget-wide vAA, vBB, vCC */
FETCH(a0, 1) # a0 <- CCBB
GET_OPA(rOBJ) # rOBJ <- AA
and a2, a0, 255 # a2 <- BB
... |
abforce/xposed_art_n | 1,657 | runtime/interpreter/mterp/mips/op_double_to_long.S | %include "mips/funopWide.S" {"instr":"b d2l_doconv", "st_result":"SET_VREG64(rRESULT0, rRESULT1, rOBJ)"}
%break
d2l_doconv:
#ifdef MIPS32REVGE6
la t0, .LDOUBLE_TO_LONG_max
LOAD64_F(fa1, fa1f, t0)
cmp.ule.d ft2, fa1, fa0
la t0, .LDOUBLE_TO_LONG_ret_max
LOAD64(rRESULT0, rRESULT1, t0)
... |
abforce/xposed_art_n | 1,731 | runtime/interpreter/mterp/mips/binopWide2addr.S | %default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
/*
* Generic 64-bit "/2addr" binary operation. Provide an "instr" line
* that specifies an instruction that performs "result = a0-a1 op a2-a3".
* This could be a MIPS instructi... |
abforce/xposed_art_n | 1,784 | runtime/interpreter/mterp/mips/binopWide.S | %default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
/*
* Generic 64-bit binary operation. Provide an "instr" line that
* specifies an instruction that performs "result = a0-a1 op a2-a3".
* This could be a MIPS instruction or a f... |
abforce/xposed_art_n | 1,219 | runtime/interpreter/mterp/mips/op_float_to_long.S | %include "mips/funopWider.S" {"instr":"b f2l_doconv", "st_result":"SET_VREG64(rRESULT0, rRESULT1, rOBJ)"}
%break
f2l_doconv:
#ifdef MIPS32REVGE6
l.s fa1, .LLONG_TO_max
cmp.ule.s ft2, fa1, fa0
li rRESULT0, ~0
li rRESULT1, ~0x80000000
bc1nez ft2, .L${opcode}_set_vreg
l.s ... |
abforce/xposed_art_n | 1,497 | runtime/interpreter/mterp/mips/bincmp.S | /*
* Generic two-operand compare-and-branch operation. Provide a "revcmp"
* fragment that specifies the *reverse* comparison to perform, e.g.
* for "if-le" you would use "gt".
*
* For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le
*/
/* if-cmp vA, vB, +CCCC */
GET_OPA4(a0) ... |
abforce/xposed_art_n | 1,739 | runtime/interpreter/mterp/mips/op_cmpl_double.S | %default { "naninst":"li rTEMP, -1" }
/*
* Compare two floating-point values. Puts 0(==), 1(>), or -1(<)
* into the destination register (rTEMP) based on the comparison results.
*
* Provide a "naninst" instruction that puts 1 or -1 into rTEMP depending
* on what value we'd like to return wh... |
abforce/xposed_art_n | 1,295 | runtime/interpreter/mterp/mips/op_aput_wide.S | /*
* Array put, 64 bits. vBB[vCC] <- vAA.
*
* Arrays of long/double are 64-bit aligned, so it's okay to use STRD.
*/
/* aput-wide vAA, vBB, vCC */
FETCH(a0, 1) # a0 <- CCBB
GET_OPA(t0) # t0 <- AA
and a2, a0, 255 ... |
abforce/xposed_art_n | 1,537 | runtime/interpreter/mterp/mips/op_mul_long.S | /*
* Signed 64-bit integer multiply.
* a1 a0
* x a3 a2
* -------------
* a2a1 a2a0
* a3a0
* a3a1 (<= unused)
* ---------------
* v1 v0
*/
/* mul-long vAA, vBB, vCC */
FETCH(a0, 1) # a0 <-... |
abforce/xposed_art_n | 1,455 | runtime/interpreter/mterp/mips/op_goto_16.S | /*
* Unconditional branch, 16-bit offset.
*
* The branch distance is a signed code-unit offset, which we need to
* double to get a byte offset.
*/
/* goto/16 +AAAA */
#if MTERP_PROFILE_BRANCHES
FETCH_S(rINST, 1) # rINST <- ssssAAAA (sign-extended)
EXPORT_PC... |
abforce/xposed_art_n | 1,188 | runtime/interpreter/mterp/mips/op_mul_long_2addr.S | /*
* See op_mul_long.S for more details
*/
/* mul-long/2addr vA, vB */
GET_OPA4(rOBJ) # rOBJ <- A+
EAS2(t0, rFP, rOBJ) # t0 <- &fp[A]
LOAD64(a0, a1, t0) # vAA.low / high
GET_OPB(t1) # t1 <- ... |
abforce/xposed_art_n | 1,478 | runtime/interpreter/mterp/mips/op_ushr_long.S | /*
* Long integer shift. This is different from the generic 32/64-bit
* binary operations because vAA/vBB are 64-bit but vCC (the shift
* distance) is 32-bit. Also, Dalvik requires us to mask off the low
* 6 bits of the shift distance.
*/
/* ushr-long vAA, vBB, vCC */
FETCH(a0, 1)... |
abforce/xposed_art_n | 2,387 | runtime/arch/mips64/jni_entrypoints_mips64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 3,070 | runtime/arch/mips64/asm_support_mips64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 73,844 | runtime/arch/mips64/quick_entrypoints_mips64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,251 | runtime/arch/mips64/memcmp16_mips64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,743 | runtime/arch/arm/jni_entrypoints_arm.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,524 | runtime/arch/arm/instruction_set_features_assembly_tests.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 6,811 | runtime/arch/arm/memcmp16_arm.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 4,805 | runtime/arch/arm/asm_support_arm.S | /*
* Copyright (C) 2013 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 79,927 | runtime/arch/arm/quick_entrypoints_arm.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,829 | runtime/arch/arm64/asm_support_arm64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,667 | runtime/arch/arm64/jni_entrypoints_arm64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 4,283 | runtime/arch/arm64/memcmp16_arm64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 83,959 | runtime/arch/arm64/quick_entrypoints_arm64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 5,818 | runtime/arch/x86/asm_support_x86.S | /*
* Copyright (C) 2013 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 82,315 | runtime/arch/x86/quick_entrypoints_x86.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,344 | runtime/arch/x86/jni_entrypoints_x86.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 24,766 | runtime/arch/x86/memcmp16_x86.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 5,219 | runtime/arch/x86_64/asm_support_x86_64.S | /*
* Copyright (C) 2013 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 2,389 | runtime/arch/x86_64/jni_entrypoints_x86_64.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 29,915 | runtime/arch/x86_64/memcmp16_x86_64.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 76,862 | runtime/arch/x86_64/quick_entrypoints_x86_64.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,939 | runtime/arch/mips/jni_entrypoints_mips.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 79,949 | runtime/arch/mips/quick_entrypoints_mips.S | /*
* Copyright (C) 2012 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 1,170 | runtime/arch/mips/memcmp16_mips.S | /*
* Copyright (C) 2014 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abforce/xposed_art_n | 4,430 | runtime/arch/mips/asm_support_mips.S | /*
* Copyright (C) 2013 The Android Open Source Project
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by app... |
abhra0897/stm32_tiny_monitor | 3,997 | libopencm3/ld/linker.ld.S | /*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by... |
abmfy/cod23-grp04 | 151,859 | asm/rv32i.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
.zero 68
reset_vector:
li ra,0
li sp,0
li gp,0
li tp,0
li t0,0
li t1,0
li t2,0
li s0,0
li s1,0
li a0,0
li a1,0
li a2,0
li a3,0
li a4,0
li a5,0
li a6,0
li a7,0
li s2,0
li s3,0
li s4,0
li s5,0
li s6,0
li s7,0
li s8,0
li s9,0
li s10,0
li s11,0
li t3,0
li t4,0
li t... |
abmfy/cod23-grp04 | 1,376 | asm/exception.s | _start:
beq x0, x0, test
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
... |
abmfy/cod23-grp04 | 1,966 | asm/zicsr.s | _start:
beq x0, x0, test
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, test_timer
nop
nop
nop
test:
l... |
abmfy/cod23-grp04 | 1,041 | asm/lab6.s | addi t0, zero, 0 # loop variable
addi t1, zero, 100 # loop upper bound
addi t2, zero, 0 # sum
loop:
addi t0, t0, 1
add t2, t0, t2
beq t0, t1, next # i == 100?
beq zero, zero, loop
next:
# store result
lui t0, 0x80000 # base ram address
sw t2, 0x100(t0)
lui t0,... |
abmfy/cod23-grp04 | 62,296 | asm/test19.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,771 | asm/rv32i/lhu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 2,832 | asm/rv32i/xori.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 1,354 | asm/rv32i/fence_i.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 2,802 | asm/rv32i/sltiu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 2,784 | asm/rv32i/slti.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 4,644 | asm/rv32i/slt.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,559 | asm/rv32i/srai.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 4,756 | asm/rv32i/sub.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 6,530 | asm/rv32i/sh.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 6,142 | asm/rv32i/sra.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 4,166 | asm/rv32i/bgeu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 5,912 | asm/rv32i/srl.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,506 | asm/rv32i/lh.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,051 | asm/rv32i/lbu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 4,683 | asm/rv32i/sltu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 5,451 | asm/rv32i/sll.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,139 | asm/rv32i/blt.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,544 | asm/rv32i/bge.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abmfy/cod23-grp04 | 3,773 | asm/rv32i/bltu.s | _start:
beq x0, x0, reset_vector
loop:
beq x0, x0, loop
fail:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, fail
addi a0, zero, 'F'
sb a0, 0(t0)
beq x0, x0, loop
pass:
lui t0, 0x10000
lb t1, 5(t0)
andi t1, t1, 0x20
beq t1, zero, pass
addi a0, zero, 'P'
sb a0, 0(t0)
beq x0, x0, loop
nop
nop
nop
reset... |
abnoname/iceZ0mb1e | 2,655 | firmware/crt0/crt0.s | ;--------------------------------------------------------------------------
; crt0.s - Generic crt0.s for a Z80
;
; Copyright (C) 2000, Michael Hope
; Modified for iceZ0mb1e - FPGA 8-Bit TV80 SoC (C) 2018, Franz Neumann
;
; This library is free software; you can redistribute it and/or modify it
; under the terms o... |
AbsInt/CompCert | 5,864 | runtime/aarch64/vararg.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, Collège de France and INRIA Paris
//
// Copyright (c) Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and bi... |
AbsInt/CompCert | 2,896 | runtime/powerpc64/i64_dtou.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and binary ... |
AbsInt/CompCert | 3,072 | runtime/powerpc64/i64_stof.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and binary ... |
AbsInt/CompCert | 3,447 | runtime/powerpc64/i64_utod.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and binary ... |
AbsInt/CompCert | 6,886 | runtime/powerpc64/vararg.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and binary ... |
AbsInt/CompCert | 2,952 | runtime/powerpc64/i64_utof.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
//
// Redistribution and use in source and binary ... |
AbsInt/CompCert | 3,489 | runtime/riscV/vararg.S | // *****************************************************************
//
// The Compcert verified compiler
//
// Xavier Leroy, INRIA Paris-Rocquencourt
// Prashanth Mundkur, SRI International
//
// Copyright (c) 2013 Institut National de Recherche en Informatique et
// en Automatique.
... |
AbsInt/CompCert | 2,788 | runtime/arm/i64_umulh.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris
@
@ Copyright (c) 2016 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, with or without
... |
AbsInt/CompCert | 2,108 | runtime/arm/i64_shr.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
AbsInt/CompCert | 2,166 | runtime/arm/i64_umod.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
AbsInt/CompCert | 3,392 | runtime/arm/i64_dtou.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
AbsInt/CompCert | 3,380 | runtime/arm/i64_stof.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
AbsInt/CompCert | 2,584 | runtime/arm/i64_utod.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
AbsInt/CompCert | 3,888 | runtime/arm/vararg.S | @ *****************************************************************
@
@ The Compcert verified compiler
@
@ Xavier Leroy, INRIA Paris-Rocquencourt
@
@ Copyright (c) 2013 Institut National de Recherche en Informatique et
@ en Automatique.
@
@ Redistribution and use in source and binary forms, wit... |
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