repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
tactcomplabs/xbgas-binutils-gdb | 3,813 | gas/testsuite/gas/aarch64/armv8_4-a.s | # Print a 4 operand instruction
.macro print_gen4reg op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, w , pw1=, pw2=
.ifnb \d
\op \pd1\d\()\pd2, \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
.else
.ifnb \n
\op \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
.else
\op \pm1\m\()\pm2, \pw1\w\()\pw2
.endif
.endif
... |
tactcomplabs/xbgas-binutils-gdb | 1,110 | gas/testsuite/gas/aarch64/system.s | .text
drps
//
// HINTS
//
nop
yield
wfe
wfi
sev
sevl
.macro all_hints from=0, to=127
hint \from
.if \to-\from
all_hints "(\from+1)", \to
.endif
.endm
all_hints from=0, to=63
all_hints from=64, to=127
//
// SYSL
//
sysl x7, #3, C15, C7, #7
//
// BARRIERS
//
.macro all_barriers op, from... |
tactcomplabs/xbgas-binutils-gdb | 3,543 | gas/testsuite/gas/aarch64/shifted.s | /* shifted.s Test file for AArch64 add-substract (extended reg.) and
add-substract (shifted reg.) instructions.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of ... |
tactcomplabs/xbgas-binutils-gdb | 6,553 | gas/testsuite/gas/aarch64/sysreg-1.s | /* sysreg-1.s Test file for AArch64 system registers.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free So... |
tactcomplabs/xbgas-binutils-gdb | 3,583 | gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.s | # Print a 4 operand instruction
.macro print_gen4reg op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, w , pw1=, pw2=
.ifnb \d
\op \pd1\d\()\pd2, \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
.else
.ifnb \n
\op \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
.else
\op \pm1\m\()\pm2, \pw1\w\()\pw2
.endif
.endif
... |
tactcomplabs/xbgas-binutils-gdb | 35,779 | gas/testsuite/gas/aarch64/sve-invalid.s | // Instructions in this file are invalid unless explicitly marked "OK".
// Other files provide more extensive testing of valid instructions;
// the only purpose of the valid instructions in this file is to show
// that the general form of the operands is correct.
fmov z1, z2
fmov z1, #1.0
fmov z1, #0.0
not z0.s,p... |
tactcomplabs/xbgas-binutils-gdb | 2,107 | gas/testsuite/gas/aarch64/sme-5-illegal.s | /* Scalable Matrix Extension (SME). */
ld1b {za0h.b[w11, 0]}, p0/z, [x0]
ld1h {za0h.h[w16, 0]}, p0/z, [x0]
ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #3]
ld1w {za3v.s[w15, 3]}, p7/z, [sp, lsl #2]
ld1d {za0h.d[w12, 0]}, p0/z, [sp, x0, lsl #12]
ld1q {za0v.q[w12]}, p0/z, [x0, x0, lsl #2]
ld1b {za1h.b[w12, 0]}, p0/z, [x0]
... |
tactcomplabs/xbgas-binutils-gdb | 1,840 | gas/testsuite/gas/aarch64/bfloat16.s | /* The instructions with non-zero register numbers are there to ensure we have
the correct argument positioning (i.e. check that the first argument is at
the end of the word etc).
The instructions with all-zero register numbers are to ensure the previous
encoding didn't just "happen" to fit -- so that if we... |
tactcomplabs/xbgas-binutils-gdb | 1,171 | gas/testsuite/gas/aarch64/verbose-error.s | // verbose-error.s Test file for -mverbose-error
.text
strb w7, [x30, x0, lsl]
ubfm w0, x1, 8, 31
bfm w0, w1, 8, 43
strb w7, [x30, x0, lsl #1]
st2 {v4.2d,v5.2d},[x3,#3]
fmov v1.D[0],x0
ld1r {v1.4s, v2.4s, v3.4s}, [x3], x4
svc
add v0.4s, v1.4s, v2.2s
urecpe v0.1d,v7.1d
adds w0, wsp, x0, uxtx #1
fmov d0, s0
... |
tactcomplabs/xbgas-binutils-gdb | 3,885 | gas/testsuite/gas/aarch64/bitfield-bfm.s | /* bitfield-bfm.s Test file for AArch64 bitfield instructions
sbfm, bfm and ubfm mnemonics.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Publ... |
tactcomplabs/xbgas-binutils-gdb | 2,246 | gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.s | /* ldst-reg-unscaled-imm.s Test file for AArch64
load-store reg. (unscaled imm.) instructions.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General ... |
tactcomplabs/xbgas-binutils-gdb | 2,579 | gas/testsuite/gas/aarch64/ldst-reg-pair.s | /* ldst-reg-pair.s Test file for AArch64 load-store reg.pair instructions.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as publis... |
tactcomplabs/xbgas-binutils-gdb | 1,704 | gas/testsuite/gas/aarch64/sme-6-illegal.s | /* Scalable Matrix Extension (SME). */
st1b {za0h.b[w11, 0]}, p0, [x0]
st1h {za0h.h[w16, 0]}, p0, [x0]
st1h {za0v.h[w12, 0]}, p0, [x0, x0, lsl #3]
st1w {za3v.s[w15, 3]}, p7, [sp, lsl #2]
st1d {za0h.d[w12, 0]}, p0, [sp, x0, lsl #12]
st1q {za0v.q[w12]}, p0, [x0, x0, lsl #2]
st1b {za1h.b[w12, 0]}, p0, [x0]
st1b {za1v.b[... |
tactcomplabs/xbgas-binutils-gdb | 3,639 | gas/testsuite/gas/aarch64/sve-add.s | add z0.b, z0.b, #-255
add z0.b, z0.b, #-129
add z0.b, z0.b, #-128
add z0.b, z0.b, #-127
add z0.b, z0.b, #-1
add z0.b, z0.b, #0
add z0.b, z0.b, #1
add z0.b, z0.b, #127
add z0.b, z0.b, #128
add z0.b, z0.b, #255
add z0.h, z0.h, #-65536
add z0.h, z0.h, #-65535
add z0.h, z0.h, #-65536 + 127
add z0.h, z0.h, #-... |
tactcomplabs/xbgas-binutils-gdb | 2,433 | gas/testsuite/gas/aarch64/bitfield-alias.s | /* bitfield-alias.s Test file for AArch64 bitfield instructions
alias mnemonics.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License ... |
tactcomplabs/xbgas-binutils-gdb | 6,813 | gas/testsuite/gas/aarch64/etm.s | /* ETMv4 system registers. */
/* Read from system register. */
mrs x0, trcacatr0
mrs x0, trcacatr1
mrs x0, trcacatr2
mrs x0, trcacatr3
mrs x0, trcacatr4
mrs x0, trcacatr5
mrs x0, trcacatr6
mrs x0, trcacatr7
mrs x0, trcacatr8
mrs x0, trcacatr9
mrs x0, trcacatr10
mrs x0, trcacatr11
mrs x0, trcacatr12
mrs x0, trcacatr... |
tactcomplabs/xbgas-binutils-gdb | 1,061 | gas/testsuite/gas/aarch64/undefined_by_elem_sz_l.s | # Generates tests to see if setting bit 22 (sz) and 21 (L) together correctly
# marks the instruction as undefined. This pattern can't be created by the
# assembler so instead manually encode it.
.macro gen_insns opc
.inst \opc
.inst (\opc | 0x600000)
.endm
# fmul s0, s0, v16.s[0]
gen_insns 0x5f909000
# fmla s0,... |
tactcomplabs/xbgas-binutils-gdb | 4,198 | gas/testsuite/gas/aarch64/sve1-extended-sve2.s | /*
Those instructions from the sve2.s file that share mnemonics with
instructions in SVE.
Created with the below command
`grep -E '^(ext|ldnt1b|ldnt1d|ldnt1h|ldnt1w|mla|mls|mul|smulh|splice|sqadd|sqsub|stnt1b|stnt1d|stnt1h|stnt1w|tbl|umulh|uqadd|uqsub)\b' sve2.s`
This test file is here to ensure those inst... |
tactcomplabs/xbgas-binutils-gdb | 1,378 | gas/testsuite/gas/aarch64/sysreg-2.s | /* sysreg-2.s Test file for ARMv8.2 system registers. */
.macro rw_sys_reg sys_reg xreg r w
.ifc \w, 1
msr \sys_reg, \xreg
.endif
.ifc \r, 1
mrs \xreg, \sys_reg
.endif
.endm
.text
rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0
rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0
/* RAS extension. ... |
tactcomplabs/xbgas-binutils-gdb | 1,947 | gas/testsuite/gas/aarch64/armv8_5-a-memtag.s | func:
# OP x[0,30], x[0,30], x[0,30]
.macro expand_3_reg op
\op x0, x0, x0
\op x27, x0, x0
\op x0, x27, x0
\op x0, x0, x27
\op x27, x27, x27
.endm
# OP x[0,30], x[0,30], #[0,30], #[0,14]
.macro expand_2_reg op
\op x0, x0, #0, #0
\op x27, x0, #0, #0
\op x0, x27, #0, #0
\op x27, x27, #0, #0
.endm
.macro... |
tactcomplabs/xbgas-binutils-gdb | 3,034 | gas/testsuite/gas/aarch64/sme-illegal.s | /* Scalable Matrix Extension (SME). */
/* ADDHA 32-bit variant. */
addha za4.s, p0/m, p1/m, z1.s
addha za15.s, p2/m, p3/m, z2.s
addha za0.s, p2/m, p3/m, z2.d
/* ADDHA 64-bit variant. */
addha za8.d, p0/m, p1/m, z1.d
addha za15.d, p2/m, p3/m, z2.d
addha za0.d, p2/m, p3/m, z2.s
/* ADDVA 32-bit variant. */
addva za... |
tactcomplabs/xbgas-binutils-gdb | 5,190 | gas/testsuite/gas/aarch64/addsub.s | /* addsub.s Test file for AArch64 add-subtract instructions.
Copyright (C) 2012-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the ... |
tactcomplabs/xbgas-binutils-gdb | 2,279 | gas/testsuite/gas/aarch64/brbe.s | /* Branch Record Buffer Extension system registers. */
/* Read from BRBE system registers. */
mrs x0, brbcr_el1
mrs x0, brbcr_el12
mrs x0, brbfcr_el1
mrs x0, brbts_el1
mrs x0, brbinfinj_el1
mrs x0, brbsrcinj_el1
mrs x0, brbtgtinj_el1
mrs x0, brbidr0_el1
mrs x0, brbcr_el2
mrs x0, brbsrc0_el1
mrs x0, brbsrc10_el1
mrs ... |
tactcomplabs/xbgas-binutils-gdb | 1,280,904 | gas/testsuite/gas/aarch64/sve.s | .equ z0, 1
.equ z0.b, 1
.equ z0.h, 1
.equ z0.s, 1
.equ z0.d, 1
.equ p0, 1
.equ p0.b, 1
.equ p0.h, 1
.equ p0.s, 1
.equ p0.d, 1
.equ b0, 1
.equ h0, 1
.equ s0, 1
.equ d0, 1
.equ w0, 1
.equ x0, 1
fmov z0.h, #2.0000000000
FMOV Z0.H, #2.0000000000
fmov z1.h, #2.0000000000
FMOV Z1.H, #... |
tactcomplabs/xbgas-binutils-gdb | 14,164 | gas/testsuite/gas/aarch64/illegal.s | /* illegal.s Test file for AArch64 instructions that should be rejected
by the assembler.
Copyright (C) 2011-2022 Free Software Foundation, Inc. Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public L... |
tactcomplabs/xbgas-binutils-gdb | 2,866 | gas/testsuite/gas/aarch64/fp_cvt_int.s | /* fp_cvt_ins.s Test file for AArch64 floating-point<->fixed-point
conversion and floating-point<->integer conversion instructions.
Copyright (C) 2011-2022 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GAS.
GAS is free software; you can redistribute it and/or modify
it... |
tactcomplabs/xbgas-binutils-gdb | 1,140 | gas/testsuite/gas/aarch64/pac-feat.s | /* ARMv8.3 Pointer authentication instructions. */
.arch armv8-a+pauth
/* Basic instructions. */
pacia x3, x4
pacia x5, sp
pacib x3, x4
pacib x5, sp
pacda x3, x4
pacda x5, sp
pacdb x3, x4
pacdb x5, sp
autia x3, x4
autia x5, sp
autib x3, x4
autib x5, sp
autda x3, x4
autda x5, sp
autdb x3, x4
autdb... |
tactcomplabs/xbgas-binutils-gdb | 2,056 | gas/testsuite/gas/aarch64/brbe-invalid.s | /* Write to read-only BRBE system registers. */
msr brbidr0_el1, x0
msr brbsrc0_el1, x0
msr brbsrc1_el1, x0
msr brbsrc2_el1, x0
msr brbsrc3_el1, x0
msr brbsrc4_el1, x0
msr brbsrc5_el1, x0
msr brbsrc6_el1, x0
msr brbsrc7_el1, x0
msr brbsrc8_el1, x0
msr brbsrc9_el1, x0
msr brbsrc10_el1, x0
msr brbsrc11_el1, x0
msr brbs... |
tactcomplabs/xbgas-binutils-gdb | 1,678 | gas/testsuite/gas/aarch64/sme-9.s | /* SVE2 instructions added to support SME. */
psel p1, p15, p3.b[w15, 0]
psel p2, p14, p5.b[w15, 0]
psel p3, p13, p7.b[w15, 7]
psel p5, p12, p9.b[w15, 15]
psel p8, p11, p15.h[w14, 0]
psel p13, p10, p1.h[w14, 0]
psel p15, p9, p0.h[w14, 3]
psel p1, p8, p6.h[w14, 7]
psel p2, p7, p15.s[w13, 0]
psel p3, p6, p15.s[w13, 0... |
tactcomplabs/xbgas-binutils-gdb | 558,492 | gas/testsuite/gas/tilegx/t_insns.s | target:
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
{ fdouble_sub_flags r5, r6, r7 ; bnezt r15, target }
{ fdouble_sub_flags r5, r6, r7 ; bnez r15, target }
{ fdouble_a... |
tactcomplabs/xbgas-binutils-gdb | 1,449 | gas/testsuite/gas/or1k/reloc-1.s | l.movhi r3,hi(x)
l.ori r3,r4,hi(x)
l.addi r3,r4,hi(x)
l.lwz r3,hi(x)(r4)
l.movhi r3,lo(x)
l.ori r3,r4,lo(x)
l.addi r3,r4,lo(x)
l.lwz r3,lo(x)(r4)
l.lws r3,lo(x)(r4)
l.lhz r3,lo(x)(r4)
l.lhs r3,lo(x)(r4)
l.lbz r3,lo(x)(r4)
l.lbs r3,lo(x)(r4)
l.lwa r3,lo(x)(r4)
l.sw lo(x)(r4),r3
l.sh lo(x)(r4),r3
l.sb l... |
tactcomplabs/xbgas-binutils-gdb | 10,694 | gas/testsuite/gas/or1k/allinsn.s | .data
localdata:
.word 42
.text
localtext:
l.nop
.data
.global globaldata
globaldata:
.word 43
.text
.global globaltext
globaltext:
l.nop
l_j:
l.j -4
l.j 4
l.j 0
l.j localtext
l.j localdata
l.j globaltext
l.j globaldata
l.j l_j
l.j l_jal
.text
l_jal:
l.jal -4
l.jal 4
l.jal 0
l.jal localtext
l.... |
tactcomplabs/xbgas-binutils-gdb | 12,136 | gas/testsuite/gas/arc/nps400-11.s | .text
; cp16/cp32 xa
cp16.na [cm:r1],[xa:r2]
cp16 [cm:r1],[xa:r2]
cp32.na [cm:r1],[xa:r2]
cp32 [cm:r1],[xa:r2]
cp16.na [cm:r1],[xa:r2,r1]
cp16 [cm:r1],[xa:r2,r1]
cp32.na [cm:r1],[xa:r2,r1]
cp32 [cm:r1],[xa:r2,r1]
... |
tactcomplabs/xbgas-binutils-gdb | 3,845 | gas/testsuite/gas/arc/taux.s | lr r5, [lp_start]
lr r5, [lp_end]
lr r5, [identity]
lr r5, [debug]
lr r5, [pc]
lr r5, [status32]
lr r5, [ic_ivic]
lr r5, [ic_ctrl]
lr r5, [ic_ivil]
lr r5, [ic_ram_address]
lr r5, [ic_tag]
lr r5, [ic_wp]
lr r5, [ic_data]
lr r5, [count0]
lr r5, [control0]
lr r5, [limit0]
lr r5, [dc_ivdc]
lr r5, [dc_ctrl... |
tactcomplabs/xbgas-binutils-gdb | 2,044 | gas/testsuite/gas/arc/nps400-8.s | .text
;; bdalc / sbdalc
bdalc r0,[cm:r0],r0,r0
bdalc r1,[cm:r2],r2,r3
bdalc r0,[cm:r0],r0,0,1
bdalc r2,[cm:r3],r3,1,1
bdalc r3,[cm:r4],r4,1,8
sbdalc r0, r0, 0
sbdalc r3, r4, 1
;; bdfre / sbdfre
bdfre 0,[cm:r0],r0,r0
bdfre ... |
tactcomplabs/xbgas-binutils-gdb | 1,827 | gas/testsuite/gas/arc/pseudos.s | # Test pseudo instructions generation.
push r0
pop r1
.L1:
brgt r0, r1, @.L1 ; Encode as BRLT<.d> c,b,s9
brgt r0, -1, @.L1 ; Encode as BRGE<.d> b,u6+1,s9
brgt r0, 0x3F, @.L1 ; Encode as BRLT limm,b,s9
brgt r0, -2, @.L1 ; Encode as BRLT limm,b,s9
brgt -2, r0, @.L1 ; Encode as BRLT c,limm,s9
brgt -2, -1, @.L1 ; E... |
tactcomplabs/xbgas-binutils-gdb | 1,185 | gas/testsuite/gas/arc/textinsn3op.s | # Insn 3op .extInstruction test
.extInstruction myinsn, 0x07, 0x30, SUFFIX_FLAG|SUFFIX_COND, SYNTAX_3OP
myinsn r0,r1,r2
myinsn r26,fp,sp
myinsn ilink1,ilink2,blink
myinsn r0,r1,0
myinsn r0,0,r2
myinsn 0,r1,r2
myinsn r0,r1,-1
myinsn r0,-1,r2
myinsn r0,r1,255
myinsn r0,255,r2
myinsn r0,r1,-256
myinsn r0,-2... |
tactcomplabs/xbgas-binutils-gdb | 1,338 | gas/testsuite/gas/arc/ext3op.s | # 3 operand insn test
dsp_fp_div r0,r1,r2
dsp_fp_div gp,fp,sp
dsp_fp_div ilink,ilink,blink
dsp_fp_div r0,r1,0
dsp_fp_div r0,0,r2
dsp_fp_div 0,r1,r2
dsp_fp_div r0,r1,-1
dsp_fp_div r0,-1,r2
dsp_fp_div r0,r1,255
dsp_fp_div r0,255,r2
dsp_fp_div r0,r1,-256
dsp_fp_div r0,-256,r2
dsp_fp_div r1,r1,256
dsp_fp_... |
tactcomplabs/xbgas-binutils-gdb | 1,321 | gas/testsuite/gas/arc/nps400-7.s | .text
;; mrgb
mrgb r0,r0,r1,4,5,3,8,6,2
mrgb.cl r2,r2,r1,4,5,3,8,6,2
;; mov2b
mov2b r1,r1,r2,4,3,2,8,1,6
mov2b.cl r1,r2,4,3,2,8,1,6
;; ext4b
ext4b r3,r3,r12,28,5,10,30,31
ext4b.cl r2,r13,28,5,10,30,31
;; ins4b
ins4b ... |
tactcomplabs/xbgas-binutils-gdb | 2,004 | gas/testsuite/gas/arc/nps400-1.s | .text
movb r0, r0, r1, 4, 5, 6
movb r0, r0, r12, 4, 5, 6
movb r15, r15, r12, 4, 5, 6
movb.cl r0, r1, 4, 5, 6
movb.cl r0, r14, 4, 5, 6
movb.cl r13, r1, 4, 5, 6
movh r0, r0, 1234
movh r3, r3, 0xffff
movh.cl r0, 1234
movh.cl ... |
tactcomplabs/xbgas-binutils-gdb | 1,633 | gas/testsuite/gas/arc/dsp.s | #Test if disassembler correctly prints DSP instructions.
vmac2hnfr r0,r2,r4
abssh r0,r2
aslacc r0
aslsacc r0
asrsr r0,r2,r4
cbflyhf0r r0,r2,r4
cbflyhf1r r0,r2
cmacchfr r0,r2,r4
cmacchnfr r0,r2,r4
cmachfr r0,r2,r4
cmachnfr r0,r2,r4
cmpychfr r0,r2,r4
cmpychnfr r0,r2,r4
cmpyhfmr r0,r2,r4
cmpyhfr r0,r2... |
tactcomplabs/xbgas-binutils-gdb | 1,915 | gas/testsuite/gas/arc/nps400-12.s | .text
; Miscellaneous
; whash
whash r2,[cm:r0],r1
whash r5,[cm:r3],r14
whash 0,[cm:r0],r1
whash 0,[cm:r3],r14
whash r2,[cm:r0],7
whash 0,[cm:r0],7
whash r2,[cm:r0],64
whash 0,[cm:r0],64
... |
tactcomplabs/xbgas-binutils-gdb | 1,428 | gas/testsuite/gas/arc/nps400-9.s | .text
;; dcmac
dcmac r0,[cm:r0],[cm:r0],r0
dcmac r2,[cm:r4],[cm:r4],r7
dcmac r31,[cm:r31],[cm:r31],r31
dcmac r0,[cm:r0],[cm:0x0],r0
dcmac r2,[cm:r4],[cm:0x1234],r7
dcmac r31,[cm:r31],[cm:0xffff],r31
dcmac r0,[cm:0x0],[cm:r0],r0
dcmac r2,... |
tactcomplabs/xbgas-binutils-gdb | 6,388 | gas/testsuite/gas/arc/nps400-6.s | .text
.macro addb_like_test mnem
\mnem r0,r0,r1,0,8,2
\mnem\().f r0,r0,r1,16,8,2
\mnem\().f.sx r0,r0,r1,8,24,6
.endm
.macro andb_like_test mnem, size
\mnem r0,r0,r1,0,8,\size
\mnem\().f r0,r0,r1,16,8,\size
.endm
.macro notb_... |
tactcomplabs/xbgas-binutils-gdb | 3,644 | gas/testsuite/gas/msp430/msp430x.s | .text
.global foo
foo:
adc r4 ; MSP430 instruction for comparison purposes.
adcx r4
adcx.a bar
adcx.b r6
adcx.w r7
addcx r8, r9
addcx.a #0x12345, r10
addcx.b r11, r12
addcx.w r13, r14
ADDX @R9, PC
ADDX R9, PC
ADDX.A #FE000h, PC
ADDX.A &EDE, PC
ADDX.A @R9+, PC
ADDX.A EDE, PC
addx.b r1, r... |
tactcomplabs/xbgas-binutils-gdb | 1,279 | gas/testsuite/gas/msp430/nop-int.s | .text
;;; Test some common instruction patterns for disabling/enabling interrupts.
;;; "MOV &FOO,r10" is used as an artbitrary statement which isn't a NOP, to
;;; break up the instructions being tested.
fn1:
;;; 1: Test EINT
;; 430 ISA: NOP *not* required before *or* after EINT
;; 430x ISA: NOP *is* required before... |
tactcomplabs/xbgas-binutils-gdb | 20,650 | gas/testsuite/gas/xstormy16/allinsn.s | .data
foodata: .word 42
.text
footext:
.text
.global movlmemimm
movlmemimm:
mov.b 0,#0
mov.w 255,#65535
mov.w 128,#32768
mov.b 127,#32767
mov.w 1,#1
mov.w 81,#64681
mov.w 247,#42230
mov.b 84,#16647
.text
.global movhmemimm
movhmemimm:
mov.b 0x7f00+0,#0
mov.w 0x7f00+255,#65535
mov.w 0x7f00+128,#32768
m... |
tactcomplabs/xbgas-binutils-gdb | 2,145 | gas/testsuite/gas/wasm32/allinsn.s | block[]
br 0
br_if 0
br_table 1 1 1
call 0
call_indirect 0 0
drop
else
end
f32.abs
f32.add
f32.ceil
f32.const 3.14159
f32.convert_s/i32
f32.convert_s/i64
f32.convert_u/i32
f32.convert_u/i64
f32.copysign
f32.demote/f64
f32.div
f32.eq
f32.floor
f32.ge
f32.gt
f32.le
f32.load a=0 0
f32.lt
f32.ma... |
tactcomplabs/xbgas-binutils-gdb | 1,247 | gas/testsuite/gas/hppa/reloc/reduce2.s | .SPACE $PRIVATE$
.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
.SPACE $TEXT$
.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
.IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
; gcc_compiled.:
.SPACE $TEXT$
.SUBSPA $LIT$
.... |
tactcomplabs/xbgas-binutils-gdb | 2,882 | gas/testsuite/gas/hppa/reloc/funcrelocbug.s | .code
.align 4
.EXPORT g,CODE
.EXPORT g,ENTRY,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,RTNVAL=GR
g:
.PROC
.CALLINFO FRAME=128,CALLS,SAVE_RP,SAVE_SP,ENTRY_GR=3
.ENTRY
stw %r2,-20(%r30)
copy %r3,%r1
copy %r30,%r3
stwm %r1,128(%r30)
stw %r26,-36(%r3)
stw %r25,-40(%r3)
stw %r24,-44(%r3)
ldw -36(%r3),%r26
ldw -... |
tactcomplabs/xbgas-binutils-gdb | 2,026 | gas/testsuite/gas/hppa/reloc/applybug.s | .IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
; gcc_compiled.:
.data
.align 4
tab___2:
.word L$0002
.word L$0003
.word L$0004
.code
.align 4
.EXPORT execute,CODE
.EXPORT execute,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR
execute:
.PROC
.CALLINFO FRAME=0,NO_CALLS
.ENTRY
addil L'buf-$global$,%r27
ldo R'buf... |
tactcomplabs/xbgas-binutils-gdb | 106,210 | gas/testsuite/gas/hppa/unsorted/brlenbug.s | .IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
; gcc_compiled.:
.data
.align 4
done___2
.word 0
.IMPORT memset,CODE
.EXPORT re_syntax_options,DATA
.align 4
re_syntax_options
.word 0
.align 4
re_error_msg
.word 0
.word L$C0000
.word L$C0001
.word L$C0002
.word L$C0003
.word L$C0004
.word L$C0005
.... |
tactcomplabs/xbgas-binutils-gdb | 1,143 | gas/testsuite/gas/hppa/basic/fmemLRbug.s | .code
.export f
f:
.proc
.callinfo frame=0,no_calls
.entry
fstws %fr6R,0(%r26)
fstws %fr6L,4(%r26)
fstws %fr6,8(%r26)
fstds %fr6L,4(%r26)
fstds %fr6,8(%r26)
fldws 0(%r26),%fr6R
fldws 4(%r26),%fr6L
fldws 8(%r26),%fr6
fldds 4(%r26),%fr6L
fldds 8(%r26),%fr6
fstws %fr6R,0(%sr0,%r26)
fstws ... |
tactcomplabs/xbgas-binutils-gdb | 2,409 | gas/testsuite/gas/hppa/basic/add2.s | .LEVEL 2.0
.code
.align 4
; Basic add/sh?add instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
add,* %r4,%r5,%r6
add,*= %r4,%r5,%r6
add,*< %r4,%r5,%r6
add,*<=... |
tactcomplabs/xbgas-binutils-gdb | 1,085 | gas/testsuite/gas/hppa/basic/extract3.s | .LEVEL 2.0
.code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
extrd,u,* %r4,10,5,%r6
extrd,u,*= %r4,10,5,%r6
extrd,u,*< %r4,10,5,%... |
tactcomplabs/xbgas-binutils-gdb | 1,732 | gas/testsuite/gas/hppa/basic/deposit2.s | .code
.align 4
; Deposit instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
depw,z %r4,5,10,%r6
depw,z,= %r4,5,10,%r6
depw,z,< %r4,5,10,%r6
depw,z,od %r4,5,10,%r6
... |
tactcomplabs/xbgas-binutils-gdb | 5,704 | gas/testsuite/gas/hppa/basic/branch.s | .level 1.1
.code
.align 4
; More branching instructions than you ever knew what to do with.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
branch_tests:
bl branch_tests,%r2
bl,n br... |
tactcomplabs/xbgas-binutils-gdb | 3,568 | gas/testsuite/gas/hppa/basic/add.s | .level 1.1
.code
.align 4
; Basic add/sh?add instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
add %r4,%r5,%r6
add,= %r4,%r5,%r6
add,< %r4,%r5,%r6
add,<= %r4... |
tactcomplabs/xbgas-binutils-gdb | 2,815 | gas/testsuite/gas/hppa/basic/sub2.s | .LEVEL 2.0
.code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
sub,* %r4,%r5,%r6
sub,*= %r4,%r5,%r6
sub,*< %r4,%r5,%r6
sub,*<= %r4... |
tactcomplabs/xbgas-binutils-gdb | 1,418 | gas/testsuite/gas/hppa/basic/sh3add.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
sh3add %r4,%r5,%r6
sh3add,= %r4,%r5,%r6
sh3add,< %r4,%r5,%r6
sh3add,<= %r4,... |
tactcomplabs/xbgas-binutils-gdb | 1,418 | gas/testsuite/gas/hppa/basic/sh2add.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
sh2add %r4,%r5,%r6
sh2add,= %r4,%r5,%r6
sh2add,< %r4,%r5,%r6
sh2add,<= %r4,... |
tactcomplabs/xbgas-binutils-gdb | 1,037 | gas/testsuite/gas/hppa/basic/extract2.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
extrw,u %r4,5,10,%r6
extrw,u,= %r4,5,10,%r6
extrw,u,< %r4,5,10,%r6
extrw,u,od %... |
tactcomplabs/xbgas-binutils-gdb | 1,183 | gas/testsuite/gas/hppa/basic/fmem.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
fldwx %r4(%sr0,%r5),%fr6
fldwx,s %r4(%sr0,%r5),%fr6
fldwx,m %r4(%sr0,%r5),%fr6
... |
tactcomplabs/xbgas-binutils-gdb | 1,039 | gas/testsuite/gas/hppa/basic/logical.s | .level 1.1
.code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
or %r4,%r5,%r6
or,= %r4,%r5,%r6
or,< %r4,%r5,%r6
or,<= %r4,%r5,%r6
... |
tactcomplabs/xbgas-binutils-gdb | 2,161 | gas/testsuite/gas/hppa/basic/imem.s | .code
.align 4
.EXPORT integer_memory_tests,CODE
.EXPORT integer_indexing_load,CODE
.EXPORT integer_load_short_memory,CODE
.EXPORT integer_store_short_memory,CODE
.EXPORT main,CODE
.EXPORT main,ENTRY,PRIV_LEV=3,RTNVAL=GR
; Basic integer memory tests which also test the various
; addressing modes and completers... |
tactcomplabs/xbgas-binutils-gdb | 1,517 | gas/testsuite/gas/hppa/basic/deposit.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
zdep %r4,5,10,%r6
zdep,= %r4,5,10,%r6
zdep,< %r4,5,10,%r6
zdep,od %r4,5,10,%r6
... |
tactcomplabs/xbgas-binutils-gdb | 1,318 | gas/testsuite/gas/hppa/basic/subi.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
subi 123,%r5,%r6
subi,= 123,%r5,%r6
subi,< 123,%r5,%r6
subi,<= 123,%r5,%r6
sub... |
tactcomplabs/xbgas-binutils-gdb | 1,711 | gas/testsuite/gas/hppa/basic/fp_comp.s | .level 1.1
.code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
fcpy,sgl %fr5,%fr10
fcpy,dbl %fr5,%fr10
fcpy,quad %fr5,%fr10
fcpy,s... |
tactcomplabs/xbgas-binutils-gdb | 4,210 | gas/testsuite/gas/hppa/basic/sub.s | .level 1.1
.code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
sub %r4,%r5,%r6
sub,= %r4,%r5,%r6
sub,< %r4,%r5,%r6
sub,<= %r4,%r5,... |
tactcomplabs/xbgas-binutils-gdb | 4,422 | gas/testsuite/gas/hppa/basic/shladd2.s | .LEVEL 2.0
.code
.align 4
; PA2.0 shladd instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
shladd,* %r4,1,%r5,%r6
shladd,*= %r4,1,%r5,%r6
shladd,*< %r4,1,%r5,%... |
tactcomplabs/xbgas-binutils-gdb | 2,985 | gas/testsuite/gas/hppa/basic/addi.s | .code
.align 4
; Basic add immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
addi 123,%r5,%r6
addi,= 123,%r5,%r6
addi,< 123,%r5,%r6
addi,<= 123,%r5,... |
tactcomplabs/xbgas-binutils-gdb | 1,256 | gas/testsuite/gas/hppa/basic/coprmem.s | .code
.align 4
; Basic copr memory tests which also test the various
; addressing modes and completers.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
;
copr_indexing_load:
cldwx,4... |
tactcomplabs/xbgas-binutils-gdb | 2,551 | gas/testsuite/gas/hppa/basic/fp_fcmp.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
fcmp,sgl,false? %fr4,%fr5
fcmp,sgl,false %fr4,%fr5
fcmp,sgl,? %fr4,%fr5
fcmp,sg... |
tactcomplabs/xbgas-binutils-gdb | 1,823 | gas/testsuite/gas/hppa/basic/deposit3.s | .LEVEL 2.0
.code
.align 4
; PA 2.0 Deposit instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
depd,z,* %r4,10,5,%r6
depd,z,*= %r4,10,5,%r6
depd,z,*< %r4,10,5,%r6
... |
tactcomplabs/xbgas-binutils-gdb | 2,287 | gas/testsuite/gas/hppa/basic/fp_conv.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
fcnvff,sgl,sgl %fr5,%fr10
fcnvff,sgl,dbl %fr5,%fr10
fcnvff,sgl,quad %fr5,%fr10
... |
tactcomplabs/xbgas-binutils-gdb | 1,418 | gas/testsuite/gas/hppa/basic/sh1add.s | .code
.align 4
; Basic immediate instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
sh1add %r4,%r5,%r6
sh1add,= %r4,%r5,%r6
sh1add,< %r4,%r5,%r6
sh1add,<= %r4,... |
tactcomplabs/xbgas-binutils-gdb | 1,272 | gas/testsuite/gas/hppa/basic/unit.s | .level 1.1
.code
.align 4
; Basic unit instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
uxor %r4,%r5,%r6
uxor,sbz %r4,%r5,%r6
uxor,shz %r4,%r5,%r6
uxor,tr %r4,... |
tactcomplabs/xbgas-binutils-gdb | 4,269 | gas/testsuite/gas/hppa/basic/shladd.s | .level 1.1
.code
.align 4
; Basic shladd instruction tests.
;
; We could/should test some of the corner cases for register and
; immediate fields. We should also check the assorted field
; selectors to make sure they're handled correctly.
shladd %r4,1,%r5,%r6
shladd,= %r4,1,%r5,%r6
shladd,< %r4,1,%r5,%r6
... |
tactcomplabs/xbgas-binutils-gdb | 41,373 | gas/testsuite/gas/hppa/basic/weird.s | .stabs "weird.c",0x64,0,0,Label0
Label0:
.stabs "inttype:t1=bu4;0;32;",0x80,0,0,0
.stabs "sym32: !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{|}~",0x80,0,0,0
.stabs "type32:t32= !#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[]^_`abcdefghijklmnopqrstuvwxyz{... |
tactcomplabs/xbgas-binutils-gdb | 3,215 | gas/testsuite/gas/hppa/parse/calldatabug.s | .code
.align 4
LC$0000:
.STRING "%d %lf %d\x0a\x00"
.align 4
.EXPORT error__3AAAiidi
.EXPORT error__3AAAiidi,PRIV_LEV=3,ARGW0=GR,ARGW1=GR,ARGW2=GR,ARGW3=FR,ARGW4=FU,RTNVAL=GR
error__3AAAiidi:
.PROC
.CALLINFO FRAME=128,CALLS,SAVE_RP
.ENTRY
stw %r2,-20(%r30)
copy %r4,%r1
copy %r30,%r4
stwm %r1,128(%r30)
stw... |
tactcomplabs/xbgas-binutils-gdb | 110,003 | gas/testsuite/gas/hppa/parse/fixup7bug.s | .IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
.code
.align 4
.EXPORT alloc_type,CODE
.EXPORT alloc_type,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR
alloc_type:
.PROC
.CALLINFO FRAME=192,CALLS,SAVE_RP
.ENTRY
stw %r2,-20(%r30)
copy %r4,%r1
copy %r30,%r4
stwm %r1,192(%r30)
stw %r7,32(%r4)
stw %r6,36(%r4)
stw ... |
tactcomplabs/xbgas-binutils-gdb | 24,561 | gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh4-nommu-nofpu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-o... |
tactcomplabs/xbgas-binutils-gdb | 35,839 | gas/testsuite/gas/sh/arch/sh-dsp.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh-dsp but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | pe... |
tactcomplabs/xbgas-binutils-gdb | 28,125 | gas/testsuite/gas/sh/arch/sh3e.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh3e but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl... |
tactcomplabs/xbgas-binutils-gdb | 25,376 | gas/testsuite/gas/sh/arch/sh2e.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2e but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl... |
tactcomplabs/xbgas-binutils-gdb | 20,277 | gas/testsuite/gas/sh/arch/sh2.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2 but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl ... |
tactcomplabs/xbgas-binutils-gdb | 29,623 | gas/testsuite/gas/sh/arch/sh2a-nofpu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a-nofpu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h ... |
tactcomplabs/xbgas-binutils-gdb | 39,786 | gas/testsuite/gas/sh/arch/sh2a.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl... |
tactcomplabs/xbgas-binutils-gdb | 20,848 | gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a-nofpu-or-sh4-nommu-nofpu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../.... |
tactcomplabs/xbgas-binutils-gdb | 24,687 | gas/testsuite/gas/sh/arch/sh4-nofpu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh4-nofpu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h |... |
tactcomplabs/xbgas-binutils-gdb | 26,032 | gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a-or-sh3e but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.... |
tactcomplabs/xbgas-binutils-gdb | 22,754 | gas/testsuite/gas/sh/arch/sh3-nommu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh3-nommu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h |... |
tactcomplabs/xbgas-binutils-gdb | 22,870 | gas/testsuite/gas/sh/arch/sh3.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh3 but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl ... |
tactcomplabs/xbgas-binutils-gdb | 20,806 | gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a-nofpu-or-sh3-nommu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opco... |
tactcomplabs/xbgas-binutils-gdb | 25,681 | gas/testsuite/gas/sh/arch/sh4a-nofpu.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh4a-nofpu but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h ... |
tactcomplabs/xbgas-binutils-gdb | 35,808 | gas/testsuite/gas/sh/arch/sh4a.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh4a but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl... |
tactcomplabs/xbgas-binutils-gdb | 18,809 | gas/testsuite/gas/sh/arch/sh.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl s... |
tactcomplabs/xbgas-binutils-gdb | 38,442 | gas/testsuite/gas/sh/arch/sh3-dsp.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh3-dsp but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | p... |
tactcomplabs/xbgas-binutils-gdb | 34,684 | gas/testsuite/gas/sh/arch/sh4.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh4 but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h | perl ... |
tactcomplabs/xbgas-binutils-gdb | 30,134 | gas/testsuite/gas/sh/arch/sh2a-or-sh4.s | ! Generated file. DO NOT EDIT.
!
! This file was generated by gas/testsuite/gas/sh/arch/sh-opc-gen-as.pl .
! This file should contain every instruction valid on
! architecture sh2a-or-sh4 but no more.
! If the tests are failing because the expected results have changed then run
! 'cat ../../../../../opcodes/sh-opc.h... |
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