repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
tactcomplabs/xbgas-binutils-gdb | 1,482 | gas/testsuite/gas/arm/branch-reloc.s | @ Check that non-local branches with and without mode switching
@ produce the right relocations with appropriate in-place addends.
.syntax unified
.text
.arm
.global arm_glob_sym1
.global arm_glob_sym2
.global thumb_glob_sym1
.global thumb_glob_sym2
nop
.type arm_glob_sym1, %function
arm_glob_sym1:
bl thumb... |
tactcomplabs/xbgas-binutils-gdb | 1,606 | gas/testsuite/gas/arm/mve-vcvt-bad.s | .macro cond1
.irp cond, eq, ne, gt, ge, lt, le
it \cond
vcvt\().f16.s16 q0, q1, #1
.endr
.endm
.syntax unified
.thumb
vcvt.f16.s16 q0, q1, #0
vcvt.f16.s16 q0, q1, #17
vcvt.f16.u16 q0, q1, #0
vcvt.f16.u16 q0, q1, #17
vcvt.s16.f16 q0, q1, #0
vcvt.s16.f16 q0, q1, #17
vcvt.u16.f16 q0, q1, #0
vcvt.u16.f16 q0, q1, #17
vcvt... |
tactcomplabs/xbgas-binutils-gdb | 1,079 | gas/testsuite/gas/arm/neon-addressing-bad.s | .syntax unified
VLD1.8 {d0}, 1f
1:
VLD1.8 {D0}, R0
VLD1.8 {Q1}, R0
VLD1.8 {D0}, [PC]
VLD1.8 {D0}, [PC, #0]
VST1.8 {D0}, R0
VST1.8 {Q1}, R0
VST1.8 {D0}, [PC]
VST1.8 {D0}, [PC, #0]
VST1.8 {D0[]}, [R0]
VST2.8 {D0[], D2[]}, [R0]
VST3.16 {D0[], D1[], D2[]}, [R0]
VST4.32 {D0[], D1[], D2[], D3[]}, [R0]
VLD1.8 {Q0}, [R0, #8]
... |
tactcomplabs/xbgas-binutils-gdb | 4,907 | gas/testsuite/gas/arm/armv8-2-fp16-simd.s | .macro f16_dq_ifsu reg0 reg1 reg2
.irp op, vabd.f16, vmax.f16, vmin.f16
\op d\reg0, d\reg1, d\reg2
\op q\reg0, q\reg1, q\reg2
.endr
.endm
.macro f16_q_ifsu reg0 reg1 reg2
.irp op, vabdq.f16, vmaxq.f16, vminq.f16
\op q\reg0, q\reg1, q\reg2
.endr
.endm
.macro f16_dq_abs_neg reg0 reg1
.irp op, vabs.f16, ... |
tactcomplabs/xbgas-binutils-gdb | 1,202 | gas/testsuite/gas/arm/vfma1.s |
.eabi_attribute Tag_Advanced_SIMD_arch, 2
.eabi_attribute Tag_VFP_arch, 6
@VMLA
.inst 0xee000a00 @ VFP vmla.f32 s0,s0,s0
.inst 0xee000b00 @ VFP vmla.f64 d0,d0,d0
.inst 0xf2000d10 @ NEON vmla.f32 d0,d0,d0
.inst 0xf2000d50 @ NEON vmla.f32 q0,q0,q0
@VFMA new
.inst 0xeea00a00 @ VFP vfma.f32 s0,s0,s0
.inst ... |
tactcomplabs/xbgas-binutils-gdb | 3,646 | gas/testsuite/gas/arm/inst.s | @ Test file for ARM/GAS -- basic instructions
.text
.align
mov r0, #0
mov r1, r2
mov r3, r4, lsl #3
mov r5, r6, lsr r7
mov r8, r9, asr r10
mov r11, r12, asl r13
mov r14, r15, rrx
moval a2, a3
moveq a3, a4
movne v1, v2
movlt v3, v4
movge v5, v6
movle v7, v8
movgt ip, sp
movcc r1, r2
movcs r1, r3
movmi ... |
tactcomplabs/xbgas-binutils-gdb | 1,159 | gas/testsuite/gas/arm/mve-vaddsub.s | .syntax unified
.thumb
.macro all_qqq op
.irp op1, q0, q1, q2, q4, q7
.irp op2, q0, q1, q2, q4, q7
.irp op3, q0, q1, q2, q4, q7
\op \op1, \op2, \op3
.endr
.endr
.endr
.endm
.macro all_qqr op
.irp op1, q0, q1, q2, q4, q7
.irp op2, q0, q1, q2, q4, q7
.irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
\op \op1, \op2, \op3
.... |
tactcomplabs/xbgas-binutils-gdb | 1,179 | gas/testsuite/gas/arm/cde-mve.s | .syntax unified
vcx1 p0, q0, #0
vcx1 p0, q0, #2048
vcx1 p0, q0, #1920
vcx1 p0, q0, #64
vcx1 p0, q0, #63
vcx1 p7, q0, #0
vcx1 p0, q7, #0
vcx1a p0, q0, #0
vcx1a p0, q0, #2048
vcx1a p0, q0, #1920
vcx1a p0, q0, #64
vcx1a p0, q0, #63
vcx1a p7, q0, #0
vcx1a p0, q7, #0
vptt.i8 eq, q0, q0
vcx1t p0, q0, #0
vcx1at p0, q0, #0
... |
tactcomplabs/xbgas-binutils-gdb | 1,725 | gas/testsuite/gas/arm/mve-vqdmladh.s | .syntax unified
.thumb
.irp data, s8, s16
.irp op1, q0, q1, q2, q4, q7
.irp op2, q0, q1, q2, q4, q7
.irp op3, q0, q1, q2, q4, q7
vqdmladh.\data \op1, \op2, \op3
vqdmladhx.\data \op1, \op2, \op3
vqrdmladh.\data \op1, \op2, \op3
vqrdmladhx.\data \op1, \op2, \op3
.endr
.endr
.endr
.endr
.irp op2, q1, q2, q4, q7
.irp op3... |
tactcomplabs/xbgas-binutils-gdb | 1,687 | gas/testsuite/gas/arm/armv8-ar+simd.s | .syntax unified
.arch_extension simd
.arm
vmaxnm.f32 d0, d0, d0
vmaxnm.f32 d16, d16, d16
vmaxnm.f32 d15, d15, d15
vmaxnm.f32 d31, d31, d31
vmaxnm.f32 q0, q0, q0
vmaxnm.f32 q8, q8, q8
vmaxnm.f32 q7, q7, q7
vmaxnm.f32 q15, q15, q15
vminnm.f32 d0, d0, d0
vminnm.f32 d16, d16, d16
vminnm.f32 d15, d15, d15
vm... |
tactcomplabs/xbgas-binutils-gdb | 4,056 | gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.s | @ LDC group relocation tests that are supposed to fail during encoding.
.text
@ LDC/LDCL/LDC2/LDC2L/STC/STCL/STC2/STC2L
.macro ldctest load store cst
\load 0, c0, [r0, #:pc_g0:(f + \cst)]
\load 0, c0, [r0, #:pc_g1:(f + \cst)]
\load 0, c0, [r0, #:pc_g2:(f + \cst)]
\load 0, c0, [r0, #:sb_g0:(f + \cst)]
\load ... |
tactcomplabs/xbgas-binutils-gdb | 2,348 | gas/testsuite/gas/arm/armv8-2-fp16-scalar-bad.s | .macro f16_sss_arithmetic reg0, reg1, reg2
.irp op, vdiv, vfma, vfms, vfnma, vfnms, vmla, vmls, vmul, vnmla, vnmls, vnmul, vsub
.irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
\op\cond s\reg0, s\reg1, s\reg2
.endr
.endr
.endm
.macro f16_ss_arithmetic reg0, reg1
.irp op, vabs, vadd, vsqrt, vneg
... |
tactcomplabs/xbgas-binutils-gdb | 1,892 | gas/testsuite/gas/arm/neon-omit.s | @ test omitted optional arguments
.text
.arm
.syntax unified
vabd.u8 q1,q3
vhadd.s32 q14, q3
vrhadd.s32 q1,q2
vhsub.s32 q5,q7
vshl.u16 q3,q4
vqshl.u32 q5,q6
vand.64 q7,q8
veor.64 q7,q8
vceq.i16 q5,#0
vceq.i16 q5,q5
vclt.s16 q5,#0
vabs.s16 q5,q6
vneg.s16 d7,d8
vabs.f d7,d8
vneg.f q9,q10
vpmax.s32 d1... |
tactcomplabs/xbgas-binutils-gdb | 1,028 | gas/testsuite/gas/arm/req.s | .text
.global test_dot_req_and_unreq
test_dot_req_and_unreq:
# Check that builtin register alias 'r0' works.
add r0, r0, r0
# Create an alias for r0.
foo .req r0
# Check that it works.
add foo, foo, foo
# Now remove the alias.
.unreq foo
# And make sure that it no longer works.
add foo, foo, foo... |
tactcomplabs/xbgas-binutils-gdb | 11,472 | gas/testsuite/gas/arm/cde-warnings.s | .syntax unified
# cx1{a}
# Immediate out of range.
# Each register out of range.
# r13 => constrained unpredictable
# itblock => constrained unpredictable
# Error given when using coprocessor number not enabled on command line.
# Too many arguments
# Too little arguments
# r15 instead of APSR_nzcv
cx1 p0, r0, #8192
cx... |
tactcomplabs/xbgas-binutils-gdb | 1,435 | gas/testsuite/gas/arm/mve-vrmlaldavh.s | .syntax unified
.thumb
.irp op1, r0, r2, r4, r8, r10, r12, r14
.irp op2, r1, r3, r5, r7, r9, r11
.irp op3, q0, q1, q2, q4, q7
.irp op4, q0, q1, q2, q4, q7
.irp data, s32, u32
vrmlaldavh.\data \op1, \op2, \op3, \op4
vrmlaldavha.\data \op1, \op2, \op3, \op4
vrmlalvh.\data \op1, \op2, \op3, \op4
vrmlalvha.\data \op1, \op2... |
tactcomplabs/xbgas-binutils-gdb | 1,115 | gas/testsuite/gas/arm/mve-vqdmull.s | .syntax unified
.thumb
.irp op1, q0, q1, q2, q4, q7
.irp op2, q0, q1, q2, q4, q7
.irp op3, r0, r1, r2, r4, r7, r8, r10, r12, r14
vqdmullt.s16 \op1, \op2, \op3
vqdmullb.s16 \op1, \op2, \op3
.endr
.endr
.endr
.irp op2, q1, q2, q4, q7
.irp op3, r0, r2, r4, r7, r8, r10, r12, r14
vqdmullt.s32 q0, \op2, \op3
vqdmullb.s32 q... |
tactcomplabs/xbgas-binutils-gdb | 3,702 | gas/testsuite/gas/cris/branch.s | ;
; Test that branches work: 8- and 16-bit all insns, relaxing to
; 32-bit, forward and backward. No need to check the border
; cases for *all* insns.
;
.text
start_original:
nop
startm32: ; start start2 start3
nop
.space 32750-(256-21*2+20)-(21*2+10*2+21*4)-12,0
startm16:
nop
; The size of a bunch ... |
tactcomplabs/xbgas-binutils-gdb | 1,091 | gas/testsuite/gas/cris/tls-err-2.s | ; Like tls-err-1.s but for PIC TLS suffixes.
; { dg-do assemble }
; { dg-options "--pic --no-underscore --em=criself" }
.syntax no_register_prefix
.text
start:
move.b extsym:GDGOTREL16,r4 ; { dg-error "PIC relocation size does not match" "" { xfail *-*-* } }
move.b extsym12:GDGOTREL,r5 ; { dg-error "PIC relocatio... |
tactcomplabs/xbgas-binutils-gdb | 1,486 | gas/testsuite/gas/cris/rd-pcrel2.s | ; Test border-cases for relaxation of pc-relative expressions.
.macro relaxcode
.endm
.text
.syntax no_register_prefix
; Region of relaxation is after insn, same segment
z:
move.d [pc-(x1-x+128-4)],r8 ; 4
move.d [pc-(x2-x+129-8)],r8 ; 6
move.d [pc+x3-x+127-14],r8 ; 4
move.d [pc+x4-x+128-18],r8 ; 6
move.d [p... |
tactcomplabs/xbgas-binutils-gdb | 2,171 | gas/testsuite/gas/cris/brokw-3.s | ; Tests the broken-word function, one more word than fits in a
; single branch.
.syntax no_register_prefix
start: moveq 0,r0
; Take the opportunity to (rudimentally) test case-recognition,
; as the diassembler gets overly confused by the table.
subs.b 87,r0
bound.b 41,r0
adds.w [pc+r0.w],pc
sym2:
.word sym1 - sy... |
tactcomplabs/xbgas-binutils-gdb | 2,809 | gas/testsuite/gas/cris/binop-segref.s | ; This used to be part of the binop test; differences broke when the
; broken-dot-word handling was broke and were moved here.
.text
.syntax no_register_prefix
.byte 56,43,42 ; Make sure we don't start at zero.
; Some differences we want to see computed right, giving the right
; size of the operands.
;
.globl back... |
tactcomplabs/xbgas-binutils-gdb | 2,005 | gas/testsuite/gas/cris/bwtest-err-1.s | ; File bwtest-err-1.s
; { dg-do assemble { target cris-*-* } }
; A variant of exbwtest.s. This is an example of invalid use of the broken-
; dot-word function. The nearest label occurs about 32 kbytes after the primary
; jump table so the secondary jump table can't be reached by word displace-
; ments and the brok... |
tactcomplabs/xbgas-binutils-gdb | 1,176 | gas/testsuite/gas/cris/pic-err-1.s | ; Check that invalid PIC reloc and instruction size combinations are
; recognized. Note that sizes of byte operands are not error-checked for
; not being in 16-bit range, so no error is recognized for a 16-bit operand.
; { dg-do assemble { target cris-*-* } }
; { dg-options "--pic --no-underscore --em=criself" }
.s... |
tactcomplabs/xbgas-binutils-gdb | 1,944 | gas/testsuite/gas/cris/brokw-3b.s | ; Tests the broken-word function with a real switch table. CRISv32 version.
start: moveq 0,r0
subs.b 87,r0
bound.b 41,r0
lapc sym2,acr
addi r0.w,acr
adds.w [acr],acr
jump acr
nop
sym2:
.word sym1 - .
.word sym3 - .
.word sym4 - .
.word sym5 - .
.word sym6 - .
.word sym7 - .
.word sym8 - .
.word sym9 -... |
tactcomplabs/xbgas-binutils-gdb | 1,260 | gas/testsuite/gas/cris/mulbug-err-1.s | ; Test error message for mul insns at locations likely to trig
; a hardware bug.
; { dg-do assemble { target cris-*-* } }
; { dg-options "--em=criself" }
; First, .text isn't dword-aligned by default.
.text
muls.w $r1,$r4 ; { dg-error "align" }
nop
muls.b $r1,$r4 ; { dg-error "align" }
mulu.d $r1,$r4 ; { dg-e... |
tactcomplabs/xbgas-binutils-gdb | 11,537 | gas/testsuite/gas/cris/unop.s | ; @OC@ test
; Generic unary operations supporting all sizes and their various
; addressing modes.
; Some fairly big pseudorandom numbers we don't want to compute
; as differences in actual data or code.
.set const_int_32, 0x1b94452b
.set const_int_m32, -3513208907
.set two701867, 2701867
; Other constants that ar... |
tactcomplabs/xbgas-binutils-gdb | 4,273 | gas/testsuite/gas/cris/range-err-1.s | ; Test error cases for constant ranges.
; { dg-do assemble { target cris-*-* } }
.set two701867, 2701867
.set mtwo701867, -2701867
.set const_int_32, 0x1b94452b
.set const_int_m32, -3513208907
.set three2767, 32767
.text
.syntax no_register_prefix
start:
moveq 32,r0 ; { dg-error "Immediate value not in 6 bi... |
tactcomplabs/xbgas-binutils-gdb | 2,621 | gas/testsuite/gas/cris/prefix.s | ; See that prefix insns are assembled right.
.text
.syntax no_register_prefix
start:
;
; bdap (8-bit signed offset).
;
bdap 0,r0
move.b [r5],r4
bdap 0,r3
move.w [r6+],r4
bdap -1,r1
move.b [r5],r4
bdap -1,r0
move.w [r6+],r4
bdap -128,r1
move.b [r5],r4
bdap -128,r7
move.w [r6+],r4
bdap 127,r1
move.... |
tactcomplabs/xbgas-binutils-gdb | 1,246 | gas/testsuite/gas/cris/regprefix-err-1.s | ; Test that we get errors when we require a register prefix.
; { dg-do assemble }
.syntax register_prefix
start:
; Some simple tests that we indeed require a register prefix, and some
; that should not be flagged as syntax errors.
push srp ; { dg-error "(Illegal|Invalid) operands" }
push r3 ; { dg-error "(Ill... |
tactcomplabs/xbgas-binutils-gdb | 1,264 | gas/testsuite/gas/cris/rd-v32s-4.s | ; Check special registers specified as pN.
.text
here:
move $r3,$p0
move $r5,$p1
move $r6,$p2
move $r7,$p3
move $r8,$p4
move $r9,$p5
move $r5,$p6
move $r6,$p7
move $r7,$p8
move $r2,$p9
move $r4,$p10
move $r0,$p11
move $r6,$p12
move $r10,$p13
move $r12,$p14
move $r13,$p15
move $p0,$r3
move $p1,$r5
... |
tactcomplabs/xbgas-binutils-gdb | 1,330 | gas/testsuite/gas/cris/ccr.s | ; Flag settings; clearf, setf
.text
.syntax no_register_prefix
start:
nop ; So we get it tested too -- and it makes the
; size of the code a 32-bit multiple, so
; the end of disassembly does not show zeros.
ax
setf deixnzvc ; old names
clearf deixnzvc ; old names
ei
di
setf dxnc ; old names
clearf d... |
tactcomplabs/xbgas-binutils-gdb | 2,085 | gas/testsuite/gas/cris/pushpop.s | ; Check the push and pop builtin "macros".
.text
.syntax no_register_prefix
start:
push r1
push r0
push r4
; Check that there is no recognition of invalid offsets.
move.b r5,[sp=sp-8]
move.w r5,[sp=sp-8]
move.d r5,[sp=sp-8]
move.b r5,[sp=sp-5]
move.w r5,[sp=sp-5]
move.d r5,[sp=sp-5]
move.w r5,[sp=sp-4]
... |
tactcomplabs/xbgas-binutils-gdb | 17,891 | gas/testsuite/gas/cris/binop.s | ; @OC@ test
; Generic binary operations supporting all sizes and their various
; addressing modes.
; Some fairly big pseudorandom numbers we don't want to compute
; as differences in actual data or code.
.set const_int_32, 0x1b94452b
.set const_int_m32, -3513208907
.set two701867, 2701867
; Other constants that a... |
tactcomplabs/xbgas-binutils-gdb | 2,570 | gas/testsuite/gas/cris/operand-err-1.s | ; Error cases for invalid operands.
; { dg-do assemble { target cris-*-* } }
.text
.syntax no_register_prefix
start:
add.w r3,r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
add.w 42,r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
add.w [r3],r4,r5 ; Not an error: [r3] implies [r3+0].
add.w r3,[r3],r4 ; { dg-... |
tactcomplabs/xbgas-binutils-gdb | 1,217 | gas/testsuite/gas/cris/fragtest.s | ; File fragtest.s
;
; Tests frag handling
ba l1 ; 2, 254 = 0xFE
nop
.space 124,0
ba l2 ; 2, 226 = 0xE2
nop
.space 124,0
l1:
.space 100,0
l2:
ba l3 ; 4, 256 = 0x0100
nop
.space 124,0
ba... |
tactcomplabs/xbgas-binutils-gdb | 5,260 | gas/testsuite/gas/cris/v32-err-1.s | ; { dg-do assemble }
; { dg-options "--march=v0_v10" }
; Check that valid v32-specific mnemonics and operands are not
; recognized for v10. (Also used elsewhere to check that valid
; v32-specific insns and operands are recognized at assembly and
; disassembly for v32.)
.text
here:
move.d [$acr],$r3 ; No error - $... |
tactcomplabs/xbgas-binutils-gdb | 1,381 | gas/testsuite/gas/ia64/reloc-bad.s | .psr abi64
.global esym
.section .rodata, "a", @progbits
.text
_start:
adds r1 = @gprel(esym), r0
adds r1 = @ltoff(esym), r0
.xdata4 .rodata, @ltoff(esym)
.xdata8 .rodata, @ltoff(esym)
adds r1 = @pltoff(esym), r0
.xdata4 .rodata, @pltoff(esym)
adds r1 = @fptr(esym), r0
mov r2 = @fptr(esym)
adds r... |
tactcomplabs/xbgas-binutils-gdb | 22,687 | gas/testsuite/gas/ia64/opc-m.s | .text
.type _start,@function
_start:
ld1 r4 = [r5]
ld1 r4 = [r5], r6
ld1 r4 = [r5], -256
ld1.nt1 r4 = [r5]
ld1.nt1 r4 = [r5], r6
ld1.nt1 r4 = [r5], -243
ld1.nta r4 = [r5]
ld1.nta r4 = [r5], r6
ld1.nta r4 = [r5], -230
ld1.s r4 = [r5]
ld1.s r4 = [r5], r6
ld1.s r4 = [r5], -217
ld1.s.nt1 r4 = [r5]
ld1.s.nt1... |
tactcomplabs/xbgas-binutils-gdb | 1,741 | gas/testsuite/gas/ia64/unwind-bad.s | .text
.proc full1
full1:
.prologue
.spill 0
.save.g 0
nop 0
.save.g 0x10
nop 0
.save.g -1
nop 0
.save.g 0x3
nop 0
.save.g 0x4
nop 0
.save.g 0x1
nop 0
.save.f 0
nop 0
.save.f 0x100000
nop 0
.save.f -1
nop 0
.save.f 0x3
nop 0
.save.f 0x4
nop 0
.save.f 0x1
nop 0
.save.b 0
nop 0
.save.b 0x20
no... |
tactcomplabs/xbgas-binutils-gdb | 1,260 | gas/testsuite/gas/ia64/xdata.s | // Note that most of the section names used here aren't legal as operands
// to either .section or .xdata/.xreal/.xstring (quoted strings aren't in
// general), but since generic code accepts them for .section we also test
// this here for our target specific directives. This could be viewed as a
// shortcut of a pair ... |
tactcomplabs/xbgas-binutils-gdb | 9,948 | gas/testsuite/gas/ia64/opc-a.s | .text
.type _start,@function
_start:
add r101 = r102, r103
(p1) add r104 = r105, r106
add r107 = r108, r109, 1
(p2) add r110 = r111, r112, 1
adds r20 = 0, r10
(p1) adds r21 = 1, r10
adds r22 = -1, r10
adds r23 = -0x2000, r10
(p2) adds r24 = 0x1FFF, r10
addl r30 = 0, r1
addl r31 = 1, r1
(p1) addl r32 = -1, r1... |
tactcomplabs/xbgas-binutils-gdb | 4,746 | gas/testsuite/gas/ia64/opc-i.s | .text
.type _start,@function
_start:
pmpyshr2 r4 = r5, r6, 0
pmpyshr2.u r4 = r5, r6, 16
pmpy2.r r4 = r5, r6
pmpy2.l r4 = r5, r6
mix1.r r4 = r5, r6
mix2.r r4 = r5, r6
mix4.r r4 = r5, r6
mix1.l r4 = r5, r6
mix2.l r4 = r5, r6
mix4.l r4 = r5, r6
pack2.uss r4 = r5, r6
pack2.sss r4 = r5, r6
pack4.sss r4 = r... |
tactcomplabs/xbgas-binutils-gdb | 29,325 | gas/testsuite/gas/ia64/psn.s |
lfetch.count [r2], 1, 64
lfetch.count.d0 [r22], 5, -64
lfetch.count.nt1 [r23], 9, 1024-64
lfetch.count.d1 [r122], 12, -1024
lfetch.count.nt2 [r5], 16, 0x80
lfetch.count.d2 [r15], 20, -0x100
lfetch.count.nta [r125], 24, 512
lfetch.count.d3 [r8], 29, 960
... |
tactcomplabs/xbgas-binutils-gdb | 1,704 | gas/testsuite/gas/ia64/reloc.s | .global esym
.section .rodata.4, "a", @progbits
.section .rodata.8, "a", @progbits
.text
_start:
adds r1 = esym, r0
mov r2 = esym
movl r3 = esym
.xdata4 .rodata.4, esym
.xdata8 .rodata.8, esym
mov r2 = @gprel(esym)
movl r3 = @gprel(esym)
.xdata4 .rodata.4, @gprel(esym)
.xdata8 .rodata.8, @gprel(esym)... |
tactcomplabs/xbgas-binutils-gdb | 13,085 | gas/testsuite/gas/ia64/opc-f.s | .text
.type _start,@function
_start:
fma f4 = f5, f6, f7
fma.s0 f4 = f5, f6, f7
fma.s1 f4 = f5, f6, f7
fma.s2 f4 = f5, f6, f7
fma.s3 f4 = f5, f6, f7
fma.s f4 = f5, f6, f7
fma.s.s0 f4 = f5, f6, f7
fma.s.s1 f4 = f5, f6, f7
fma.s.s2 f4 = f5, f6, f7
fma.s.s3 f4 = f5, f6, f7
fma.d f4 = f5, f6, f7
fma.d.s0 f4... |
tactcomplabs/xbgas-binutils-gdb | 3,699 | gas/testsuite/gas/ia64/unwind-ok.s | .text
.proc personality
personality:
br.ret.sptk rp
.endp personality
.proc full1
full1:
.prologue
.spill 0
.save.g 0x1
nop 0
.save.f 0x1
nop 0
.save.b 0x01
nop 0
.save.g 0x8
nop 0
.save.f 0x8
nop 0
.save.b 0x10
nop 0
.altrp b7
nop 0
.unwabi @svr4, 0
nop 0
.body
.spillreg r4, r2
nop 0
.spillreg.p ... |
tactcomplabs/xbgas-binutils-gdb | 2,474 | gas/testsuite/gas/ia64/invalid-ar.s | // AR 0 to AR 47 can be accessed only by M unit.
mov.i r1 = ar0
mov.i r1 = ar1
mov.i r1 = ar2
mov.i r1 = ar3
mov.i r1 = ar4
mov.i r1 = ar5
mov.i r1 = ar6
mov.i r1 = ar7
mov.i r1 = ar8
mov.i r1 = ar9
mov.i r1 = ar10
mov.i r1 = ar11
mov.i r1 = ar12
mov.i r1 = ar13
mov.i r1 = ar14
mov.i r1 = ar15
mov.i r1... |
tactcomplabs/xbgas-binutils-gdb | 7,828 | gas/testsuite/gas/ia64/dv-waw-err.s | //
// Detect WAW violations. Cases taken from DV tables.
//
.text
.explicit
// AR[BSP]
mov ar.bsp = r0
mov ar.bsp = r1
;;
// AR[BSPSTORE]
mov ar.bspstore = r2
mov ar.bspstore = r3
;;
// AR[CCV]
mov ar.ccv = r4
mov ar.ccv = r4
;;
// AR[EC]
br.wtop.sptk L
mov ar.ec = r0
;;
// AR[FPSR].sf0.controls ... |
tactcomplabs/xbgas-binutils-gdb | 1,153 | gas/testsuite/gas/ia64/tls.s | .section ".tdata", "awT", @progbits
.align 16
.global x#, y#, z#, a#, b#, c#
.protected a#, b#, c#
.type x#,@object
.size x#,4
x: data4 1
.type y#,@object
.size y#,4
y: data4 2
.type z#,@object
.size z#,4
z: data4 3
.align 8
.type a#,@object
.size a#,8
a: data8 4
.type b#,@object
.size b#,8
b: data8 5
.... |
tactcomplabs/xbgas-binutils-gdb | 18,157 | gas/testsuite/gas/ia64/opc-b.s | .L0:
{ .bbb; nop.b 0
(p2) br.cond.sptk .L1
br.cond.sptk .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.clr .L1
br.cond.sptk.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.few .L1
br.cond.sptk.few .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.sptk.few.clr .L1
br.cond.sptk.few.clr .L0
;; }
{ .bbb; nop.b 0
(p2) br.cond.... |
tactcomplabs/xbgas-binutils-gdb | 7,884 | gas/testsuite/gas/ia64/dv-raw-err.s | //
// Detect RAW violations. Cases taken from DV tables.
// This test is by no means complete but tries to hit the things that are
// likely to be missed.
//
.text
.explicit
// AR[BSP]
mov ar.bspstore = r0
mov r1 = ar.bsp
;;
// AR[BSPSTORE]
mov ar.bspstore = r2
mov r3 = ar.bspstore
;;
// AR[CCV]
mov ar.... |
tactcomplabs/xbgas-binutils-gdb | 39,967 | gas/testsuite/gas/ia64/regs.s | .text
.type _start,@function
_start:
// Fixed and stacked integer registers.
{ .mii; mov r1 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r2 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r3 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r4 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r5 = r0; nop.i 0; nop.i 0;; }
{ .mii; mov r6 = r0; nop.... |
tactcomplabs/xbgas-binutils-gdb | 2,451 | gas/testsuite/gas/loongarch/fix_op.s | clo.w $r4,$r5
clz.w $r4,$r5
cto.w $r4,$r5
ctz.w $r4,$r5
clo.d $r4,$r5
clz.d $r4,$r5
cto.d $r4,$r5
ctz.d $r4,$r5
revb.2h $r4,$r5
revb.4h $r4,$r5
revb.2w $r4,$r5
revb.d $r4,$r5
revh.2w $r4,$r5
revh.d $r4,$r5
bitrev.4b $r4,$r5
bitrev.8b $r4,$r5
bitrev.w $r4,$r5
bitrev.d $r4,$r5
ext.w.h $r4,$r5
ext.w.b ... |
tactcomplabs/xbgas-binutils-gdb | 3,572 | gas/testsuite/gas/loongarch/load_store_op.s | ll.w $r4,$r5,0
ll.w $r4,$r5,0x3ffc
sc.w $r4,$r5,0
sc.w $r4,$r5,0x3ffc
ll.d $r4,$r5,0
ll.d $r4,$r5,0x3ffc
sc.d $r4,$r5,0
sc.d $r4,$r5,0x3ffc
ldptr.w $r4,$r5,0
ldptr.w $r4,$r5,0x3ffc
stptr.w $r4,$r5,0
stptr.w $r4,$r5,0x3ffc
ldptr.d $r4,$r5,0
ldptr.d $r4,$r5,0x3ffc
stptr.d $r4,$r5,0
stptr.d $r4,$r5,0x3ffc
... |
tactcomplabs/xbgas-binutils-gdb | 1,600 | gas/testsuite/gas/loongarch/4opt_op.s | fmadd.s $f0,$f1,$f2,$f3
fmadd.d $f0,$f1,$f2,$f3
fmsub.s $f0,$f1,$f2,$f3
fmsub.d $f0,$f1,$f2,$f3
fnmadd.s $f0,$f1,$f2,$f3
fnmadd.d $f0,$f1,$f2,$f3
fnmsub.s $f0,$f1,$f2,$f3
fnmsub.d $f0,$f1,$f2,$f3
fcmp.caf.s $fcc0,$f1,$f2
fcmp.saf.s $fcc0,$f1,$f2
fcmp.clt.s $fcc0,$f1,$f2
fcmp.slt.s $fcc0,$f1,$f2
fcmp.sgt.s ... |
tactcomplabs/xbgas-binutils-gdb | 1,496 | gas/testsuite/gas/loongarch/float_op.s | fadd.s $f0,$f1,$f2
fadd.d $f0,$f1,$f2
fsub.s $f0,$f1,$f2
fsub.d $f0,$f1,$f2
fmul.s $f0,$f1,$f2
fmul.d $f0,$f1,$f2
fdiv.s $f0,$f1,$f2
fdiv.d $f0,$f1,$f2
fmax.s $f0,$f1,$f2
fmax.d $f0,$f1,$f2
fmin.s $f0,$f1,$f2
fmin.d $f0,$f1,$f2
fmaxa.s $f0,$f1,$f2
fmaxa.d $f0,$f1,$f2
fmina.s $f0,$f1,$f2
fmina.d $f0,$f1,... |
tactcomplabs/xbgas-binutils-gdb | 3,479 | gas/testsuite/gas/s390/zarch-arch13.s | .text
foo:
ncrk %r6,%r9,%r11
ncgrk %r6,%r9,%r11
mvcrl 4000(%r6),4000(%r9)
nnrk %r6,%r9,%r11
nngrk %r6,%r9,%r11
nork %r6,%r9,%r11
nogrk %r6,%r9,%r11
nxrk %r6,%r9,%r11
nxgrk %r6,%r9,%r11
ocrk %r6,%r9,%r11
ocgrk %r6,%r9,%r11
popcnt %r6,%r9
popcnt %r6,%r9,13
selr %r6,%r9,%r11,13
selro %r6,%r9,%r11
selrh %r6... |
tactcomplabs/xbgas-binutils-gdb | 1,288 | gas/testsuite/gas/s390/zarch-z9-109.s | .text
foo:
afi %r6,-2147483648
agfi %r6,-2147483648
alfi %r6,4294967295
algfi %r6,4294967295
nihf %r6,4294967295
nilf %r6,4294967295
cfi %r6,-2147483648
cgfi %r6,-2147483648
clfi %r6,4294967295
clgfi %r6,4294967295
xihf %r6,4294967295
xilf %r6,4294967295
iihf %r6,4294967295
iilf %r6,4294967295
flogr %r6,... |
tactcomplabs/xbgas-binutils-gdb | 1,207 | gas/testsuite/gas/s390/zarch-zEC12.s | .text
foo:
etnd %r6
ntstg %r6,-5555(%r7,%r8)
tabort 4000(%r6)
tbegin 4000(%r6),65000
tbeginc 4000(%r6),65000
tend
bpp 10,.,4000(%r6)
bprp 10,.,.+24
niai 10,13
lat %r6,-5555(%r7,%r8)
lgat %r6,-5555(%r7,%r8)
lfhat %r6,-5555(%r7,%r8)
llgfat %r6,-5555(%r7,%r8)
llgtat %r6,-5555(%r7,%r8)
clt %r6,10,-5555(%r7)... |
tactcomplabs/xbgas-binutils-gdb | 3,296 | gas/testsuite/gas/s390/zarch-z990.s | .text
foo:
ag %r6,-524288(%r5,%r10)
agf %r6,-524288(%r5,%r10)
ahy %r6,-524288(%r5,%r10)
alc %r6,-524288(%r5,%r10)
alcg %r6,-524288(%r5,%r10)
alg %r6,-524288(%r5,%r10)
algf %r6,-524288(%r5,%r10)
aly %r6,-524288(%r5,%r10)
ay %r6,-524288(%r5,%r10)
bctg %r6,-524288(%r5)
bxhg %r6,%r9,-524288(%r5)
bxleg %r6,%r9,-... |
tactcomplabs/xbgas-binutils-gdb | 8,392 | gas/testsuite/gas/s390/esa-g5.s | .text
foo:
a %r6,4095(%r5,%r10)
ad %f6,4095(%r5,%r10)
adb %f6,4095(%r5,%r10)
adbr %f6,%f9
adr %f6,%f9
ae %f6,4095(%r5,%r10)
aeb %f6,4095(%r5,%r10)
aebr %f6,%f9
aer %f6,%f9
ah %r6,4095(%r5,%r10)
ahi %r6,-32767
al %r6,4095(%r5,%r10)
alr %r6,%r9
ap 4095(6,%r5),4095(9,%r10)
ar %r6,%r9
au %f6,4095(%r5,%r10)
... |
tactcomplabs/xbgas-binutils-gdb | 2,724 | gas/testsuite/gas/s390/zarch-z900.s | .text
foo:
ag %r9,4095(%r5,%r10)
agf %r9,4095(%r5,%r10)
agfr %r9,%r6
aghi %r9,-32767
agr %r9,%r6
alcg %r9,4095(%r5,%r10)
alcgr %r9,%r6
alg %r9,4095(%r5,%r10)
algf %r9,4095(%r5,%r10)
algfr %r9,%r6
algr %r9,%r6
bctg %r9,4095(%r5,%r10)
bctgr %r9,%r6
brctg %r9,.
jctg %r6,.
brxhg %r9,%r6,.
jxhg %r6,%r9,.
b... |
tactcomplabs/xbgas-binutils-gdb | 4,787 | gas/testsuite/gas/s390/zarch-arch12.s | .text
foo:
vbperm %v15,%v17,%v20
vllezlf %v15,4000(%r6,%r9)
vmsl %v15,%v17,%v20,%v24,13,12
vmslg %v15,%v17,%v20,%v24,13
vnx %v15,%v17,%v20
vnn %v15,%v17,%v20
voc %v15,%v17,%v20
vpopctb %v15,%v17
vpopcth %v15,%v17
vpopctf %v15,%v17
vpopctg %v15,%v17
vfasb %v15,%v17,%v20
wfasb %v15,%v17,%v20
wfaxb %v15,%v17... |
tactcomplabs/xbgas-binutils-gdb | 1,329 | gas/testsuite/gas/s390/zarch-z9-ec.s | .text
foo:
lpdfr %f6,%f2
lndfr %f6,%f2
cpsdr %f6,%f1,%f2
lcdfr %f6,%f2
ldgr %f6,%r2
lgdr %r2,%f6
adtr %f6,%f2,%f4
axtr %f8,%f9,%f4
cdtr %f6,%f2
cxtr %f1,%f0
kdtr %f6,%f2
kxtr %f6,%f2
cedtr %f6,%f2
cextr %f1,%f0
cdgtr %f6,%r2
cxgtr %f1,%r2
cdstr %f6,%r2
cxstr %f6,%r2
cdutr %f6,%r2
cxutr %f1,%r2
cgdt... |
tactcomplabs/xbgas-binutils-gdb | 7,642 | gas/testsuite/gas/s390/zarch-z10.s | .text
foo:
asi 5555(%r6),-42
agsi 5555(%r6),-42
alsi 5555(%r6),-42
algsi 5555(%r6),-42
crl %r6,.
cgrl %r6,.
cgfrl %r6,.
crb %r6,%r7,10,1111(%r8)
crbh %r6,%r7,1111(%r8)
crbnle %r6,%r7,1111(%r8)
crbl %r6,%r7,1111(%r8)
crbnhe %r6,%r7,1111(%r8)
crblh %r6,%r7,1111(%r8)
crbne %r6,%r7,1111(%r8)
crbe %r6,%r7,111... |
tactcomplabs/xbgas-binutils-gdb | 5,178 | gas/testsuite/gas/s390/zarch-z196.s | .text
foo:
ahhhr %r6,%r7,%r8
ahhlr %r6,%r7,%r8
aih %r6,-65000
alhhhr %r6,%r7,%r8
alhhlr %r6,%r7,%r8
alsih %r6,65000
alsihn %r6,65000
brcth %r6,.
chhr %r6,%r7
chlr %r6,%r7
chf %r6,5555(%r7,%r8)
cih %r6,65000
clhhr %r6,%r7
clhlr %r6,%r7
clhf %r6,5555(%r7,%r8)
clih %r6,650000
clih %r9,4000000000
lbh %r6,... |
tactcomplabs/xbgas-binutils-gdb | 15,787 | gas/testsuite/gas/s390/zarch-z13.s | .text
foo:
lcbb %r6,4000(%r9,%r11),13
vgef %v15,4000(%r6,%r9),13
vgeg %v15,4000(%r6,%r9),13
vgbm %v15,65533
vzero %v15
vone %v15
vgm %v15,253,252,11
vgmb %v15,253,252
vgmh %v15,253,252
vgmf %v15,253,252
vgmg %v15,253,252
vlr %v15,%v17
vlrep %v15,4000(%r6,%r9),13
vlrepb %v15,4000(%r6,%r9)
vlreph %v15,4000... |
tactcomplabs/xbgas-binutils-gdb | 12,646 | gas/testsuite/gas/tic4x/addressing.s | ;;
;; test all addressing modes and register constraints
;; (types/classes is read from include/opcodes/tic4x.h)
;;
.text
start:
;;
;; Type B - infix condition branch
;;
Type_BI:bu Type_BI ; Unconditional branch (00000)
bc Type... |
tactcomplabs/xbgas-binutils-gdb | 1,549 | gas/testsuite/gas/tic4x/registers.s | ;; test all register names c3x
.text
;; Test the base names
.ifdef TEST_ALL
start: ldi R0,R0
ldi R0,R1
ldi R0,R2
ldi R0,R3
ldi R0,R4
ldi R0,R5
ldi R0,R6
ldi R0,R7
ldi R0,AR0
ldi ... |
tactcomplabs/xbgas-binutils-gdb | 178,320 | gas/testsuite/gas/tic4x/opcodes.s | ; File is autogenerated from allopcodes.S - do not edit
; Please use ./rebuild.sh to rebuild this file
;;;
;;; Test all opcodes and argument permuation
;;; To make our job a lot simpler, we define a couple of
;;; insn classes, that we use to generate the proper
;;; test output.
;;;
;;; To rebuild this file you... |
tactcomplabs/xbgas-binutils-gdb | 9,316 | gas/testsuite/gas/tic4x/allopcodes.S | ;;;
;;; Test all opcodes and argument permuation
;;; To make our job a lot simpler, we define a couple of
;;; insn classes, that we use to generate the proper
;;; test output.
;;;
;;; To rebuild this file you must use
;;; ./rebuild.sh
;;;
;;; These definitions are used within this file:
;;; TEST_C3X E... |
tactcomplabs/xbgas-binutils-gdb | 23,409 | gas/testsuite/gas/alpha/elf-reloc-8.s | .set noat
.set noreorder
.set nomacro
.arch ev6
.section .init.data,"aw",@progbits
.align 2
.type mount_initrd, @object
.size mount_initrd, 4
mount_initrd:
.long 0
.globl root_mountflags
.section .sdata,"aw",@progbits
.align 2
.type root_mountflags, @object
.size root_mountflags, 4
root_mountflags:
.long... |
tactcomplabs/xbgas-binutils-gdb | 6,114 | gas/testsuite/gas/iq2000/allinsn.s | .data
foodata: .word 42
.text
footext:
.text
.global add
add:
add %0,%0,%0
.text
.global addi
addi:
addi %0,%0,-4
.text
.global addiu
addiu:
addiu %0,%0,4
.text
.global addu
addu:
addu %0,%0,%0
.text
.global ado16
ado16:
ado16 %0,%0,%0
.text
.global and
and:
and %0,%0,%0
.text
.global andi
andi:
... |
tactcomplabs/xbgas-binutils-gdb | 1,540 | gas/testsuite/gas/iq2000/yield0.s | # This test case includes a single case of a yield instruction
# (e.g. SLEEP) appearing in the branch delay slot. We expect
# the assembler to issue a warning about this!
.text
# yield insn in the branch delay slot.
beq %0,%0,foo
cfc2 %1, %1
# likewise for the rest.
beq %0,%0,foo
cfc3 %1, %1
beq %0,%0,foo
... |
tactcomplabs/xbgas-binutils-gdb | 3,716 | gas/testsuite/gas/tic6x/unwind-1.s | .cfi_sections .c6xabi.exidx
# standard layout
.p2align 8
f0:
.cfi_startproc
stw .d2t2 B3, *B15--(16)
.cfi_def_cfa_offset 16
.cfi_offset 19, 0
stw .d2t1 A11, *+B15(12)
.cfi_offset 11, -4
nop 4
.cfi_endproc
.endp
# standard layout (pr0)
.p2align 8
f1:
.cfi_startproc
.cfi_def_cfa_offset 8
stw .d2t1 A11, *+B15(8)
.cfi_of... |
tactcomplabs/xbgas-binutils-gdb | 3,750 | gas/testsuite/gas/tic6x/insns16-s-unit.s | ; Test C64x+ S-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
s3_nosat_op_0:
.short 0x000a
.short 0x201b
.short 0x512a
.short 0x713b
.short 0x824a
.short 0xa25b
.short 0xd36a
.short 0xf37b
.short 0xe28a
s3_nosat_op_1:
.short 0x0a9b
.short 0x39aa
.short 0x59bb
.short 0x68ca
.short ... |
tactcomplabs/xbgas-binutils-gdb | 3,716 | gas/testsuite/gas/tic6x/unwind-2.s | .cfi_sections .c6xabi.exidx
# standard layout
.p2align 8
f0:
.cfi_startproc
stw .d2t2 B3, *B15--(16)
.cfi_def_cfa_offset 16
.cfi_offset 19, 0
stw .d2t1 A11, *+B15(12)
.cfi_offset 11, -4
nop 4
.cfi_endproc
.endp
# standard layout (pr0)
.p2align 8
f1:
.cfi_startproc
.cfi_def_cfa_offset 8
stw .d2t1 A11, *+B15(8)
.cfi_of... |
tactcomplabs/xbgas-binutils-gdb | 2,174 | gas/testsuite/gas/tic6x/reloc-bad-3.s | # Test relocation overflow and insufficiently divisible values. Note
# that divisibility checks for constant values are only applicable to
# load and store offsets, not ADDA, because constant values are
# encoded literally for ADDA, and divisbility checks for offsets from
# symbols are only applicable with REL relocat... |
tactcomplabs/xbgas-binutils-gdb | 1,040 | gas/testsuite/gas/tic6x/predicate-bad-2.s | # Test predicates allowed or disallowed depending on the architecture.
.text
.globl f
f:
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
[!B0] nop
[!B1] nop
[!B2] nop
.arch c64x
[A0] nop
[A1] nop
[A2] nop
[B0] nop
[B1] nop
[B2] nop
[!A0] nop
[!A1] nop
[!A2] nop
... |
tactcomplabs/xbgas-binutils-gdb | 2,453 | gas/testsuite/gas/tic6x/insns16-doff4.s | ; Test C64x+ 16 bits instructions - doff4 format
.text
.nocmp
doff4:
nop
.align 16
nop
.align 16
.short 0x0004
.short 0x1004
.short 0x0204
.short 0x000c
.short 0x0005
.short 0x1005
.short 0x0205
.short 0x000d
.short 0x1005
.short 0x0205
.short 0x120d
.short 0x2a0d
.short 0x3a1d
.short 0x221d
... |
tactcomplabs/xbgas-binutils-gdb | 2,380 | gas/testsuite/gas/tic6x/insns16-dinc.s | ; Test C64x+ dinc compact instruction format
.text
dinc:
nop
.align 16
nop
.align 16
.short 0x0c04
.short 0x1c04
.short 0x0e04
.short 0x0c0c
.short 0x0c05
.short 0x1c05
.short 0x0e05
.short 0x0c0d
.short 0x1c05
.short 0x0c05
.short 0x1e0d
.short 0x2e0d
.short 0x3e1d
.short 0x2e1d
.word 0xefe00000
... |
tactcomplabs/xbgas-binutils-gdb | 1,745 | gas/testsuite/gas/tic6x/insns16-d-unit.s | ; Test C64x+ D-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
dstk: ; op = 0 | STW (.unit) src, *B15[ucst5]
; op = 1 | LDW (.unit)*B15[ucst5], dst
.short 0x8c05
.short 0x9c05
.short 0x8c05
.short 0x9c05
.short 0xcc35
.short 0xfc05
.short 0xdcf5
.short 0x8c0d
.short 0x9c0d
.shor... |
tactcomplabs/xbgas-binutils-gdb | 2,448 | gas/testsuite/gas/tic6x/insns16-dind.s | ; Test C64x+ dind compact instruction format
.text
.nocmp
dind:
nop
.align 16
nop
.align 16
.short 0x0404
.short 0x1404
.short 0x0604
.short 0x040c
.short 0x0405
.short 0x1405
.short 0x0605
.short 0x040d
.short 0x1405
.short 0x0405
.short 0x160d
.short 0x260d
.short 0x361d
.short 0x261d
.word... |
tactcomplabs/xbgas-binutils-gdb | 2,865 | gas/testsuite/gas/tic6x/insns-c674x-reloc.s | # Test C674x instructions generating relocations.
.data
w1:
.word 1
w2:
.word 2
.text
.nocmp
.globl ext1
.globl ext2
.globl ext3
.globl a1
.globl b1
.globl f
f:
addab .D1X b14,ext1,a5
addab .D2 b15,(ext2+7),b7
addab .D1X b14,(a1),a20
addab .D2 b14,(b1),b30
addab .D1X b14,w2-w1,a15
addab .D2 b14,w4-w3,b16
addah... |
tactcomplabs/xbgas-binutils-gdb | 1,990 | gas/testsuite/gas/tic6x/unwind-bad-2.s | .cfi_sections .c6xabi.exidx
.cfi_startproc
# stack pointer offset too large for personality routine
.cfi_def_cfa_offset 0x3f8
.cfi_endproc
.personalityindex 3
.endp
.cfi_startproc
.cfi_def_cfa_offset 8
stw .d2t1 A11, *+B15(8)
.cfi_offset 11, -0
stw .d2t1 A10, *+B15(4)
.cfi_offset 10, -4
nop 4
.cfi_endproc
# stack fra... |
tactcomplabs/xbgas-binutils-gdb | 5,445 | gas/testsuite/gas/tic6x/reloc-bad-2.s | # Test expressions not representable by relocations.
.globl a
.globl b
.data
d:
.word $DSBT_INDEX(__c6xabi_DSBT_BASE)
.word $got(b)
.word $dpr_got(a)
.word $dpr_byte(b)
.word $dpr_hword(a)
.word $dpr_word(b)
.word $pcr_offset(b,f)
.text
.nocmp
.globl f
f:
addab .D1X b14,$dsbt_index(__c6xabi_DSBT_BASE),a5
addab... |
tactcomplabs/xbgas-binutils-gdb | 38,810 | gas/testsuite/gas/tic6x/insns-c674x.s | # Test C674x instructions.
.text
.nocmp
.globl f
f:
abs .L1 a5,a7
abs .L1X b11,a14
[a1] abs .L2 b16,b19
[!b2] abs .L2X a7,b31
[b1] abs .L1 a11:a10,a19:a18
abs .L2 b13:b12,b1:b0
abs2 .L1 a9,a10
[a2] abs2 .L1X b23,a5
abs2 .L2 b3,b14
abs2 .L2X a28,b25
.word 0x0c180b20
absdp .S1 a7:a6,a25:a24
[a0] absdp .S2 b3... |
tactcomplabs/xbgas-binutils-gdb | 2,380 | gas/testsuite/gas/tic6x/insns16-ddec.s | ; Test C64x+ ddec compact instruction format
.text
ddec:
nop
.align 16
nop
.align 16
.short 0x4c04
.short 0x5c04
.short 0x4e04
.short 0x4c0c
.short 0x4c05
.short 0x5c05
.short 0x4e05
.short 0x4c0d
.short 0x5c05
.short 0x4c05
.short 0x5e0d
.short 0x6e0d
.short 0x7e1d
.short 0x6e1d
.word 0xefe00000
... |
tactcomplabs/xbgas-binutils-gdb | 3,732 | gas/testsuite/gas/tic6x/reloc-bad-6.s | # Test relocation overflow and insufficiently divisible values for
# PC-relative operands.
.text
.nocmp
f7_0:
nop
nop
nop
nop
nop
nop
nop
f7_28:
nop
f7_32:
.space 256
f7_288:
addkpc .S2 f7_32,b1,0
addkpc .S2 f7_28,b1,0
addkpc .S2 f7_32,b1,0
addkpc .S2 f7_0,b1,0
addkpc .S2 f7_544,b1,0
addkpc .S2 f7_540,b1... |
tactcomplabs/xbgas-binutils-gdb | 1,099 | gas/testsuite/gas/tic6x/insns16-m-unit.s | ; Test C64x+ M-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
m3_op_00:
.short 0x231e
.short 0x469f
.short 0x799e
.short 0x9c1f
.short 0xa71e
.short 0xca9f
.short 0xfd9e
m3_op_01:
.short 0x213e
.short 0x46bf
.short 0x7bbe
.short 0x9c3f
.short 0xa53e
.short 0xcabf
.short 0xffbe
.w... |
tactcomplabs/xbgas-binutils-gdb | 2,751 | gas/testsuite/gas/tic6x/insns16-l-unit.s | ; Test C64x+ L-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
l3_nosat_l:
.short 0x0010
.short 0x2120
.short 0x4230
.short 0x6340
.short 0x8050
.short 0xa160
.short 0xc270
.short 0xeb80
.short 0x0890
.short 0x29a0
.short 0x4ab0
.short 0x6bc0
.short 0x88d0
.short 0xa9e0
.word 0xe... |
tactcomplabs/xbgas-binutils-gdb | 28,021 | gas/testsuite/gas/tic6x/insns-bad-1.s | # Test bad instructions and operands.
.text
.globl f
f:
nonesuch foo bar
nop nonconst
nop 2,
nop 2,3
nop 2 , 4
nop 2 4
nop 0
nop -1
nop 10000
nop 10
nop 15
abs .L1 a1,
abs .L1 a1
abs .S1 a1,a2
abs .L1 foo,bar
abs .L1X foo,bar
abs .L1 A0,A00
abs .L1 A32,A1
abs .L1 B1,A1
abs .L1 A1,B1
abs .L1X A1,A1
... |
tactcomplabs/xbgas-binutils-gdb | 1,151 | gas/testsuite/gas/tic6x/insns-c674x-sploop.s | # Test C674x SPLOOP instructions. The present tests are placeholders
# to verify encoding that may not be valid when the full set of checks
# for invalid input are implemented and may need changing to valid
# code at that point.
.text
.nocmp
.globl f
f:
spmask
spmask l1
spmask L2
spmask s1
spmask S2
spmask D1
s... |
tactcomplabs/xbgas-binutils-gdb | 1,317 | gas/testsuite/gas/tic6x/insns16-s-unit-pcrel.s | ; Test C64x+ S-unit pcrel compact instruction formats
.text
nop
.align 16
nop
.align 16
sbs7:
.short 0x000a
.short 0x004a
.short 0x214b
.short 0x428a
.short 0x63cb
.short 0x840a
.short 0xa54b
.short 0x868a
.short 0x77cb
.short 0x580a
.short 0x394b
.short 0x1a8a
.short 0x3bcb
.short 0x5c0a
.word 0xe... |
tactcomplabs/xbgas-binutils-gdb | 2,636 | gas/testsuite/gas/tic6x/insns-c674x-pcrel.s | # Test C674x instructions generating PC-relative relocations.
.text
.nocmp
.globl ext1
.globl ext2
.globl ext3
.globl a1
.globl b1
.globl irp
.globl nrp
f:
nop
nop
nop
nop
nop
nop
nop
addkpc .S2 f,b1,3
[a2] addkpc .S2 f+4,b3,7
addkpc .S2 g,b4,0
addkpc .S2 ext1+8,b5,4
g:
nop
nop
nop
nop
nop
f2:
nop
nop... |
tactcomplabs/xbgas-binutils-gdb | 1,536 | gas/testsuite/gas/tic6x/insns16-lsd-unit.s | ; Test C64x+ L, S or D-unit compact instruction formats
.text
nop
.align 16
nop
.align 16
lsdmvto:
.short 0x0006
.short 0x000f
.short 0x0016
.short 0x0017
.short 0x000e
.short 0x0007
.short 0x0006
.short 0x100f
... |
tactcomplabs/xbgas-binutils-gdb | 10,680 | gas/testsuite/gas/z8k/inout.s | .text
in r1,#0x4444
inb rh3,#0x123
in r8,@r0
in r9,@r1
in r10,@r2
in r11,@r3
in r12,@r4
in r13,@r5
in r14,@r6
in r15,@r7
in r0,@r8
in r1,@r9
in r2,@r10
in r3,@r11
in r4,@r12
in r5,@r13
in r6,@r14
in r7,@r15
inb rh0,@r0
inb rh1,@r1
inb rh2,@r2
inb rh3,@r3
inb rh4,@r4
inb rh5,@r5
inb rh6,@r6
... |
tactcomplabs/xbgas-binutils-gdb | 4,001 | gas/testsuite/gas/z8k/reglabel.s | ! labels starting with a valid register name
.text
sp_label: lda r0,sp_label
r0_label: lda r0,r0_label
r1_label: lda r0,r1_label
r2_label: lda r0,r2_label
r3_label: lda r0,r3_label
r4_label: lda r0,r4_label
r5_label: lda r0,r5_label
r6_label: lda r0,r6_label
r7_label: lda r0,r7_label
r8_label: lda r0,r8_label
r9_lab... |
tactcomplabs/xbgas-binutils-gdb | 2,266 | gas/testsuite/gas/xgate/all_insns.s | # Example of XGATE instructions
.sect .text
_start:
L0: adc r1, r2, r3
L1: bcc END_CODE
L2: add r4, r5, r6
L3: add r7 , #225
L4: addh r1, 255
L5: addl r2, #255
L6: add r4, 8004
L7: and r3, r4, r5
L8: and r1, #0x8004
L9: add r5, END_CODE
L10: and r7, END_CODE
L11: and r4, #65281
L12: andl r3, #01
L13: andh ... |
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