repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
chyyuu/arceos-for-starry | 2,747 | modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
chyyuu/arceos-for-starry | 2,544 | tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
chyyuu/oscamp_tour | 4,857 | tour/h_1_0/src/guest.S |
/// Enter the guest given in `VmCpuRegisters` from `a0`
.global _run_guest
_run_guest:
/* Save hypervisor state */
/* Save hypervisor GPRs (except T0-T6 and a0, which is GuestInfo and stashed in sscratch) */
sd ra, ({hyp_ra})(a0)
sd gp, ({hyp_gp})(a0)
sd tp, ({hyp_tp})(a0)
sd s0, ({hyp... |
chyyuu/arceos-starry-axvisor-all | 668 | axvisor/src/utils/arch/aarch64/cache.S | // void cache_invalidate_d(u64 start, u64 length);
.global cache_invalidate_d
cache_invalidate_d:
add x2, x0, x1 /* calculate the end address */
bic x0, x0, #(64 - 1) /* align the start with a cache line */
1:
dc ivac, x0 /* invalidate cache to PoC by VA */
add x0, x0, #64
cmp x0, x2
blt 1b
mov x0, xzr
dsb sy
... |
chyyuu/arceos-starry-axvisor-all | 1,868 | axvisor/scripts/lds/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
.rodata : ALIGN(4K) {
_srodata = .;
*(.ro... |
chyyuu/arceos-starry-axvisor-all | 171 | starry-next/apps/nimbos/c/lib/arch/riscv/crt.S | .text
.globl _start
_start:
.option push
.option norelax
lla gp, __global_pointer$
.option pop
mv a0, sp
and sp, sp, -16
tail __start_main
|
chyyuu/arceos-starry-axvisor-all | 511 | starry-next/apps/nimbos/c/lib/arch/riscv/clone.S | // __clone(func, arg, stack)
// a0, a1, a2
// syscall(SYS_clone, stack)
// a7, a0
.global __clone
.hidden __clone
__clone:
andi a2, a2, -16
addi a2, a2, -16
sd a0, 0(a2)
sd a1, 8(a2)
// syscall(SYSCALL_CLONE, newsp)
mv a0, a2
li a7, 56... |
chyyuu/arceos-starry-axvisor-all | 117 | starry-next/apps/nimbos/c/lib/arch/aarch64/crt.S | .text
.globl _start
_start:
mov x29, #0
mov x30, #0
mov x0, sp
and sp, x0, #-16
b __start_main
|
chyyuu/arceos-starry-axvisor-all | 434 | starry-next/apps/nimbos/c/lib/arch/aarch64/clone.S | // __clone(func, arg, stack)
// x0, x1, x2
// syscall(SYS_clone, stack)
// x8, x0
.global __clone
.hidden __clone
__clone:
and x2, x2, #-16
stp x0, x1, [x2, #-16]!
// syscall(SYSCALL_CLONE, newsp)
mov x0, x2
mov x8, #56
svc #0
cbz x0, 1f
// parent
ret
... |
chyyuu/arceos-starry-axvisor-all | 198 | starry-next/apps/nimbos/c/lib/arch/loongarch64/crt.S | .section .text.entry
.globl _start
_start:
move $fp, $zero
move $a0, $sp
.weak _DYNAMIC
.hidden _DYNAMIC
la.local $a1, _DYNAMIC
bstrins.d $sp, $zero, 3, 0
b __start_main
|
chyyuu/arceos-starry-axvisor-all | 961 | starry-next/apps/nimbos/c/lib/arch/loongarch64/clone.S | #__clone(func, stack, flags, arg, ptid, tls, ctid)
# a0, a1, a2, a3, a4, a5, a6
# sys_clone(flags, stack, ptid, ctid, tls)
# a0, a1, a2, a3, a4
.global __clone
.hidden __clone
.type __clone,@function
__clone:
bstrins.d $a1, $zero, 3, 0 #stack to 16 align
# Save function poin... |
chyyuu/arceos-starry-axvisor-all | 2,095 | starry-next/arceos/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
chyyuu/arceos-starry-axvisor-all | 2,358 | starry-next/arceos/modules/axhal/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
chyyuu/arceos-starry-axvisor-all | 2,989 | starry-next/arceos/modules/axhal/src/arch/aarch64/trap.S | .macro SAVE_REGS
sub sp, sp, {trapframe_size}
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
stp x10, x11, [sp, 10 * 8]
stp x12, x13, [sp, 12 * 8]
stp x14, x15, [sp, 14 * 8]
stp ... |
chyyuu/arceos-starry-axvisor-all | 1,791 | starry-next/arceos/modules/axhal/src/arch/loongarch64/trap.S | .macro SAVE_REGS, from_user
move $t0, $sp
.if \from_user == 1
csrrd $sp, KSAVE_KSP // restore kernel sp
addi.d $sp, $sp, -{trapframe_size}
STD $tp, $sp, 2
STD $r21, $sp, 21
csrrd $tp, KSAVE_TP
csrrd $r21, KSAVE_R21
.else
addi.d $sp, $sp, -{trap... |
chyyuu/arceos-starry-axvisor-all | 1,965 | starry-next/arceos/modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
chyyuu/arceos-starry-axvisor-all | 4,325 | starry-next/arceos/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
chyyuu/arceos-starry-axvisor-all | 2,544 | starry-next/arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
chyyuu/arceos-starry-axvisor-all | 2,001 | arceos/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
chyyuu/arceos-starry-axvisor-all | 1,839 | arceos/modules/axhal/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
chyyuu/arceos-starry-axvisor-all | 2,616 | arceos/modules/axhal/src/arch/aarch64/trap.S | .macro SAVE_REGS
sub sp, sp, 34 * 8
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
stp x10, x11, [sp, 10 * 8]
stp x12, x13, [sp, 12 * 8]
stp x14, x15, [sp, 14 * 8]
stp x16, x... |
chyyuu/arceos-starry-axvisor-all | 1,705 | arceos/modules/axhal/src/arch/loongarch64/trap.S | .macro SAVE_REGS, from_user
move $t0, $sp
.if \from_user == 1
csrrd $sp, KSAVE_KSP // restore kernel sp
addi.d $sp, $sp, -{trapframe_size}
STD $tp, $sp, 2
STD $r21, $sp, 21
csrrd $tp, KSAVE_TP
csrrd $r21, KSAVE_R21
.else
addi.d $sp, $sp, -{trap... |
chyyuu/arceos-starry-axvisor-all | 1,965 | arceos/modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
chyyuu/arceos-starry-axvisor-all | 4,325 | arceos/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
chyyuu/arceos-starry-axvisor-all | 2,544 | arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
chyyuu/starry-mix | 2,747 | arceos/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
chyyuu/starry-mix | 2,544 | arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
chyyuu/starry-next-all | 171 | apps/nimbos/c/lib/arch/riscv/crt.S | .text
.globl _start
_start:
.option push
.option norelax
lla gp, __global_pointer$
.option pop
mv a0, sp
and sp, sp, -16
tail __start_main
|
chyyuu/starry-next-all | 511 | apps/nimbos/c/lib/arch/riscv/clone.S | // __clone(func, arg, stack)
// a0, a1, a2
// syscall(SYS_clone, stack)
// a7, a0
.global __clone
.hidden __clone
__clone:
andi a2, a2, -16
addi a2, a2, -16
sd a0, 0(a2)
sd a1, 8(a2)
// syscall(SYSCALL_CLONE, newsp)
mv a0, a2
li a7, 56... |
chyyuu/starry-next-all | 117 | apps/nimbos/c/lib/arch/aarch64/crt.S | .text
.globl _start
_start:
mov x29, #0
mov x30, #0
mov x0, sp
and sp, x0, #-16
b __start_main
|
chyyuu/starry-next-all | 434 | apps/nimbos/c/lib/arch/aarch64/clone.S | // __clone(func, arg, stack)
// x0, x1, x2
// syscall(SYS_clone, stack)
// x8, x0
.global __clone
.hidden __clone
__clone:
and x2, x2, #-16
stp x0, x1, [x2, #-16]!
// syscall(SYSCALL_CLONE, newsp)
mov x0, x2
mov x8, #56
svc #0
cbz x0, 1f
// parent
ret
... |
chyyuu/starry-next-all | 121 | apps/nimbos/c/lib/arch/x86_64/crt.S | .text
.globl _start
_start:
xor %rbp, %rbp
mov %rsp, %rdi
andq $-16, %rsp
call __start_main
|
chyyuu/starry-next-all | 574 | apps/nimbos/c/lib/arch/x86_64/clone.S | // __clone(func, arg, stack)
// rdi, rsi, rdx
// syscall(SYS_clone, stack)
// rax, rdi
.global __clone
.hidden __clone
__clone:
// push arg (%rsi) to stack, set func (%rdi) to %r9
and $-16, %rdx
sub $8, %rdx
mov %rsi, (%rdx)
mov %rdi, %r9
// syscall(SYSCALL_CLONE, n... |
chyyuu/starry-next-all | 198 | apps/nimbos/c/lib/arch/loongarch64/crt.S | .section .text.entry
.globl _start
_start:
move $fp, $zero
move $a0, $sp
.weak _DYNAMIC
.hidden _DYNAMIC
la.local $a1, _DYNAMIC
bstrins.d $sp, $zero, 3, 0
b __start_main
|
chyyuu/starry-next-all | 961 | apps/nimbos/c/lib/arch/loongarch64/clone.S | #__clone(func, stack, flags, arg, ptid, tls, ctid)
# a0, a1, a2, a3, a4, a5, a6
# sys_clone(flags, stack, ptid, ctid, tls)
# a0, a1, a2, a3, a4
.global __clone
.hidden __clone
.type __clone,@function
__clone:
bstrins.d $a1, $zero, 3, 0 #stack to 16 align
# Save function poin... |
chyyuu/starry-next-all | 2,095 | arceos/modules/axhal/linker.lds.S | OUTPUT_ARCH(%ARCH%)
BASE_ADDRESS = %KERNEL_BASE%;
ENTRY(_start)
SECTIONS
{
. = BASE_ADDRESS;
_skernel = .;
.text : ALIGN(4K) {
_stext = .;
*(.text.boot)
*(.text .text.*)
. = ALIGN(4K);
_etext = .;
}
_srodata = .;
.rodata : ALIGN(4K) {
*(.rodata... |
chyyuu/starry-next-all | 2,358 | arceos/modules/axhal/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
chyyuu/starry-next-all | 2,989 | arceos/modules/axhal/src/arch/aarch64/trap.S | .macro SAVE_REGS
sub sp, sp, {trapframe_size}
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
stp x10, x11, [sp, 10 * 8]
stp x12, x13, [sp, 12 * 8]
stp x14, x15, [sp, 14 * 8]
stp ... |
chyyuu/starry-next-all | 1,397 | arceos/modules/axhal/src/arch/x86_64/syscall.S | .section .text
.code64
syscall_entry:
swapgs // switch to kernel gs
mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp // save user rsp
mov rsp, gs:[offset __PERCPU_TSS + {tss_rsp0_offset}] // switch to kernel stack
sub rsp, 8 ... |
chyyuu/starry-next-all | 1,627 | arceos/modules/axhal/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
chyyuu/starry-next-all | 1,791 | arceos/modules/axhal/src/arch/loongarch64/trap.S | .macro SAVE_REGS, from_user
move $t0, $sp
.if \from_user == 1
csrrd $sp, KSAVE_KSP // restore kernel sp
addi.d $sp, $sp, -{trapframe_size}
STD $tp, $sp, 2
STD $r21, $sp, 21
csrrd $tp, KSAVE_TP
csrrd $r21, KSAVE_R21
.else
addi.d $sp, $sp, -{trap... |
chyyuu/starry-next-all | 1,965 | arceos/modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
chyyuu/starry-next-all | 4,325 | arceos/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
chyyuu/starry-next-all | 2,544 | arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
cics-syslab/umass-os-class-materials | 1,412 | assignments-complete/02/src/entry.S | /*
qemu -kernel loads the kernel at 0x80000000
and causes each hart (i.e. CPU) to jump there.
kernel.ld causes the following code to
be placed at 0x80000000.
*/
.section .text
/*
Make the entry label (memory location) visible to ld.
This is necessary so it can put entry at 0x80000000.
*/
.global entry
/*
This reserves ... |
cics-syslab/umass-os-class-materials | 1,321 | assignments-complete/03/src/entry.S | /*
qemu -kernel loads the kernel at 0x80000000
and causes each hart (i.e. CPU) to jump there.
kernel.ld causes the following code to
be placed at 0x80000000.
*/
.section .text
/*
Make the entry label (memory location) visible to ld.
This is necessary so it can put entry at 0x80000000.
*/
.global entry
/*
This reserves ... |
cics-syslab/umass-os-class-materials | 1,788 | assignments-complete/03/src/machinevec.S | #
# interrupts and exceptions while in machine
# mode come here.
#
.global machinevec
.align 4
machinevec:
# make room to save registers.
addi sp, sp, -256
# save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
sd gp, 16(sp)
sd tp, 24(sp)
sd t0, 32(sp)
... |
cics-syslab/umass-os-class-materials | 1,321 | assignments-complete/05/src/entry.S | /*
qemu -kernel loads the kernel at 0x80000000
and causes each hart (i.e. CPU) to jump there.
kernel.ld causes the following code to
be placed at 0x80000000.
*/
.section .text
/*
Make the entry label (memory location) visible to ld.
This is necessary so it can put entry at 0x80000000.
*/
.global entry
/*
This reserves ... |
cics-syslab/umass-os-class-materials | 3,657 | assignments-complete/05/src/uservec.S | #
# low-level code to handle traps from user space into
# the kernel, and returns from kernel to user.
#
.align 4
.globl uservec
uservec:
#
# trap_usertrap_return sets mtvec to point here, so
# traps from user space start here,
# in machine mode
#
# mscratch holds a pointer to proc.kernel_con... |
cics-syslab/umass-os-class-materials | 726 | assignments-complete/05/src/switch.S | .global switch_to_process
# Context switch
#
# void switch_to_process(struct proc_register_set *old, struct proc_register_set *new);
#
# Save current registers in old. Load from new.
switch_to_process:
sd ra, 0(a0)
sd sp, 8(a0)
sd s0, 16(a0)
sd s1, 24(a0)
sd s2, 32(a0)
sd s3, 40(a0)
sd ... |
cics-syslab/umass-os-class-materials | 1,791 | assignments-complete/05/src/machinevec.S | #
# interrupts and exceptions while in machine
# mode come here.
#
.global machinevec
.align 4
machinevec:
# make room to save registers.
addi sp, sp, -256
# save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
sd gp, 16(sp)
sd tp, 24(sp)
sd t0, 32(sp)
... |
cics-syslab/umass-os-class-materials | 3,016 | assignments-complete/01/src/entry.S | /*
qemu -kernel loads the kernel at 0x80000000
and causes each hart (i.e. CPU) to jump there.
kernel.ld causes the following code to
be placed at 0x80000000.
*/
.section .text
/*
Make the entry label (memory location) visible to ld.
This is necessary so it can put entry at 0x80000000.
*/
.global entry
entry:
/*
Load ... |
cics-syslab/umass-os-class-materials | 6,155 | assignments-complete/01/src/uart.S | .section .text
/* TODO: Expose uart_init, uart_read, uart_write, and uart_print_prompt */
/* BEGIN DELETE BLOCK */
.global uart_init, uart_read, uart_write, uart_print_prompt
/* END DELETE BLOCK */
/*
Always add documentation (especially in assembly).
Initialize the UART, which is placed at 0x10000000 by qemu.
paramte... |
cics-syslab/umass-os-class-materials | 1,321 | assignments-complete/04/src/entry.S | /*
qemu -kernel loads the kernel at 0x80000000
and causes each hart (i.e. CPU) to jump there.
kernel.ld causes the following code to
be placed at 0x80000000.
*/
.section .text
/*
Make the entry label (memory location) visible to ld.
This is necessary so it can put entry at 0x80000000.
*/
.global entry
/*
This reserves ... |
cics-syslab/umass-os-class-materials | 768 | assignments-complete/04/src/switch.S | .global switch_to_process
# Context switch
#
# void switch_to_process(struct proc_register_set *old, struct proc_register_set *new);
#
# Save current registers in old. Load from new.
switch_to_process:
sd ra, 0(a0)
sd sp, 8(a0)
sd s0, 16(a0)
sd s1, 24(a0)
sd s2, 32(a0)
sd s3, 40(a0)
sd ... |
cics-syslab/umass-os-class-materials | 1,788 | assignments-complete/04/src/machinevec.S | #
# interrupts and exceptions while in machine
# mode come here.
#
.global machinevec
.align 4
machinevec:
# make room to save registers.
addi sp, sp, -256
# save the registers.
sd ra, 0(sp)
sd sp, 8(sp)
sd gp, 16(sp)
sd tp, 24(sp)
sd t0, 32(sp)
... |
civil-king/rCore-2024s | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
civil-king/rCore-2024s | 1,488 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->kernel stack, sscratch->user stack
# allocate a TrapContext on kernel stack
addi sp, s... |
CJacob314/rust-hypervisor | 324 | guest.S | # Assembly for the guest to run
.code16 # 16-bit code
.text
.globl _start
_start:
xor %ax, %ax # Clear ax to 0
mov $10, %cx # Set loop counter to 10
loop_start:
inc %ax # Increment ax
dec %cx # Decrement cx
jnz loop_start # Jump back if cx != 0
nop
hlt # Halt the ... |
cjsjz/final-rcore-os | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
cjsjz/final-rcore-os | 1,640 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
cjsjz/rrrcore | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
cjsjz/rrrcore | 2,218 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_k
.globl __restore_k
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch... |
cjsjz/hhh | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
cjsjz/hhh | 2,218 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_k
.globl __restore_k
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch... |
cjsjz/rcore-os-new | 676 | os/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
cjsjz/rcore-os-new | 2,218 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.globl __alltraps_k
.globl __restore_k
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch... |
clairechingching/sbpf-asm-debugger | 148 | test_file/hello.s | .globl e
e:
lddw r1, message
lddw r2, 14
call sol_log_
exit
.extern sol_log_
.section .rodata
message:
.ascii "Hello, Solana!"
|
clairechingching/sbpf-asm-debugger | 30 | test_file/noop.s | .globl entry
entry:
exit
|
clairechingching/sbpf-asm-debugger | 1,027 | test_file/fib.s | .globl e
e:
// Grab the Fibonacci sequence target from our instruction data
ldxb r8, [r1+8+8+80+10240+8+8] // 8 accounts length + 8 flags + 80 account data + 10240 realloc padding + 8 padding + 8 ix length
mov64 r6, 0
mov64 r7, 1 // Skip first sequence and return 0 if n<1
jgt r8, 93, overflow // handle... |
cleve82s/solana_smartcontract | 980 | transfer-lamports/asm/main.s | .globl entrypoint
entrypoint:
ldxdw r2, [r1 + 0] # get number of accounts
jne r2, 2, error # error if not 2 accounts
ldxb r2, [r1 + 8] # get first account
jne r2, 0xff, error # shouldn't be a duplicate, but check
ldxdw r2, [r1 + 8 + 8 + 32 + 32] # get source lamports
ldxdw r3, [r1 + 8 + 8 + 32 + 32 + 8] # get ac... |
cleve82s/solana_smartcontract | 125 | helloworld/asm/main.s | .globl entrypoint
entrypoint:
lddw r1, .message
mov64 r2, 12
call sol_log_
exit
.rodata
message: .ascii "Hello world!"
|
cleverfox/ch32v-rt | 3,133 | asm.S | # define STORE sw
# define LOAD lw
# define LOG_REGBYTES 2
#define REGBYTES (1 << LOG_REGBYTES)
/*
Entry point of all programs (_start).
It initializes DWARF call frame information, the stack pointer, the
frame pointer (needed for closures to work in start_rust) and the global
pointer. Then it ... |
cloudgamingrage/copysh-v86-precompiled | 1,319 | tests/qemu/test-i386-code16.S | .code16
.globl code16_start
.globl code16_end
CS_SEG = 0xf
code16_start:
.globl code16_func1
/* basic test */
code16_func1 = . - code16_start
mov $1, %eax
data32 lret
/* test push/pop in 16 bit mode */
.globl code16_func2
code16_func2 = . - code16_sta... |
cloudgamingrage/copysh-v86-precompiled | 1,816 | tests/qemu/test-i386-vm86.S | .code16
.globl vm86_code_start
.globl vm86_code_end
#define GET_OFFSET(x) ((x) - vm86_code_start + 0x100)
vm86_code_start:
movw $GET_OFFSET(hello_world), %dx
movb $0x09, %ah
int $0x21
/* prepare int 0x90 vector */
xorw %ax, %ax
movw %ax, %es
... |
cloudgamingrage/copysh-v86-precompiled | 3,647 | tests/kvm-unit-tests/x86/cstart.S |
#include "apic-defs.h"
.globl boot_idt
boot_idt = 0
ipi_vector = 0x20
max_cpus = 64
.bss
. = . + 4096 * max_cpus
.align 16
stacktop:
. = . + 4096
.align 16
ring0stacktop:
.data
.align 4096
pt:
i = 0
.rept 1024
.long 0x1e7 | (i << 22)
i = i + 1
.endr
.globl gdt32
gdt32:
.qu... |
cloudgamingrage/copysh-v86-precompiled | 4,163 | tests/kvm-unit-tests/x86/cstart64.S |
#include "apic-defs.h"
.globl boot_idt
boot_idt = 0
.globl idt_descr
.globl tss_descr
.globl gdt64_desc
ipi_vector = 0x20
max_cpus = 64
.bss
. = . + 4096 * max_cpus
.align 16
stacktop:
. = . + 4096
.align 16
ring0stacktop:
.data
.align 4096
.globl ptl2
ptl2:
i = 0
.rept 512 * 4
.quad 0x1e7 | (i << 21)
... |
cloudgamingrage/copysh-v86-precompiled | 512 | tests/kvm-unit-tests/lib/x86/setjmp32.S | .globl setjmp
setjmp:
mov (%esp), %ecx // get return EIP
mov 4(%esp), %eax // get jmp_buf
mov %ecx, (%eax)
mov %esp, 4(%eax)
mov %ebp, 8(%eax)
mov %ebx, 12(%eax)
mov %esi, 16(%eax)
mov %edi, 20(%eax)
xor %eax, %eax
ret
.globl longjmp
longjmp:
mov 8(%esp), %eax // get return value
mov 4(%esp), %ecx // get j... |
cloudgamingrage/copysh-v86-precompiled | 467 | tests/kvm-unit-tests/lib/x86/setjmp64.S | .globl setjmp
setjmp:
mov (%rsp), %rsi
mov %rsi, (%rdi)
mov %rsp, 0x8(%rdi)
mov %rbp, 0x10(%rdi)
mov %rbx, 0x18(%rdi)
mov %r12, 0x20(%rdi)
mov %r13, 0x28(%rdi)
mov %r14, 0x30(%rdi)
mov %r15, 0x38(%rdi)
xor %eax, %eax
ret
.globl longjmp
longjmp:
mov %esi, %eax
mov 0x38(%rdi), %r15
mov 0x30(%rdi), %r14
mo... |
clstatham/kados-ng | 437 | crates/chainloader/src/start.S | .section ".text.boot"
.global _start
_start:
mov x20, x0
mov x21, x1
mov x22, x2
mov x23, x3
ldr x1, =_stack_top
mov sp, x1
mrs x1, mpidr_el1
and x1, x1, #3
cbnz x1, hang
ldr x1, =LOAD_ADDR
mov x0, x1
ldr x2, =_start
mov sp, x2
ldr w3, =__loader_size
1:
ldr... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 726 | src/trusted_kernel/src/arch/riscv64/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# Step 1
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# Step 2
# save kernel s... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 837 | src/trusted_kernel/src/arch/aarch64/switch.S | .altmacro
.macro SAVE_XN n
str x\n, [x0, (\n+1)*8]
.endm
.macro LOAD_XN n
ldr x\n, [x1, (\n+1)*8]
.endm
.section .text
.globl __switch
__switch:
// step [1]
// __switch(
// current_task_cx_ptr: *mut TaskContext (x0),
// next_task_cx_ptr: *const TaskContext (x1)
// )
//... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 5,146 | src/trusted_kernel/src/arch/riscv64/boot/entry.S | #include "timer.h"
#include "page.h"
#include "intr.h"
.altmacro
# load large 64 bit imm
.macro LA_FAR, reg, imm
lui \reg, %hi(\imm)
addi \reg, \reg, %lo(\imm)
.endm
# initialize an empty well aligned pagetable
# sign-extended lui, msb of the first word should be 1
.macro DEFINE_PT, name
.align PAGE_SHIFT
\n... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 498 | src/trusted_kernel/src/arch/riscv64/boot/m_trap.S | #include "bits.h"
#include "intr.h"
.option norvc
.section .text.head
.global m_trap_vector
.align 4
m_trap_vector:
csrrw sp, mscratch, sp
STORE a0, 10*REGBYTES(sp)
STORE a1, 11*REGBYTES(sp)
STORE a2, 12*REGBYTES(sp)
# clint cmp addr
ld a0, 3*REGBYTES(sp)
ld a1, 4*REGBYTES(sp)
ld a2, 0(a0)
add a2, a2... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 2,709 | src/trusted_kernel/src/arch/riscv64/boot/s_trap.S | #include "bits.h"
.attribute arch, "rv64gc"
.altmacro
# load general purpose register
.macro LOAD_GR n
LOAD x\n, \n*REGBYTES(sp)
.endm
.macro SAVE_GR n
STORE x\n, \n*REGBYTES(sp)
.endm
# load floating point register
.macro LOAD_FR n
fld f\n, (\n + 37)*REGBYTES(sp) # Offset adjusted for floating-point register are... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 3,882 | src/trusted_kernel/src/arch/aarch64/boot/entry.S | #include "page.h"
.altmacro
.macro PT_MAP pt_addr, vaddr, paddr, lvl, flags
mov x0, \vaddr
lsr x0, x0, (PAGE_SHIFT + BITS_PER_LEVEL * (\lvl - 1))
and x0, x0, (1 << BITS_PER_LEVEL) - 1
lsl x0, x0, #3
mov x1, \paddr
mov x2, \flags
orr x1, x1, x2
orr x1, x1, #(1 << 8)
orr x1, x1, #(1 ... |
Clxxx1819/https-github.com-KLoCSD-safeL4-kernel-tree-toolchain-upgrade | 3,167 | src/trusted_kernel/src/arch/aarch64/boot/trap.S | .section .text
.global __alltraps
__alltraps:
# x30 and x0 are saved in __vectors
# x0 is trap num now
# skip __reversed
str x29, [sp, #-16]!
stp x27, x28, [sp, #-16]!
stp x25, x26, [sp, #-16]!
stp x23, x24, [sp, #-16]!
stp x21, x22, [sp, #-16]!
stp x19, x20,... |
cncf-hacks/atlanticode | 7,219 | smpc/islet/rmm/src/exception/vectors.s | .equ VCPU_GP_REGS, 0
.equ VCPU_SYS_REGS, 264
.equ VCPU_FP_REGS, 472
.macro save_volatile_to_stack
stp x29, x30, [SP, #-16]!
stp x17, x18, [SP, #-(8*12)]!
stp x15, x16, [SP, #-16]!
stp x13, x14, [SP, #-16]!
stp x11, x12, [SP, #-16]!
stp x9, x10, [SP, #-16]!
stp x7, x8, [SP, #-16]!
stp x5, x6, [SP, #-16]!
stp x... |
cndoit18/rCore-Tutorial | 1,588 | os/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->kernel stack, sscratch->user stack
# allocate a TrapContext on kernel stack
addi sp, s... |
cocobricko/usb_device_01 | 524 | Firmware-Development/Rust/tock-bootloader-master/legacy/src/jumpfunc.s |
.syntax unified
.section .text.jumpfunc
.global jump_into_user_code
.thumb_func
jump_into_user_code:
ldr r0, =0x10000 //The address of the payload's .vectors
ldr r1, =0xe000ed08 //The address of the VTOR register (0xE000E000(SCS) + 0xD00(SCB) + 0x8(VTOR))
str r0, [r1] //Move the payload's V... |
codygunton/openvm | 8,423 | crates/toolchain/openvm/src/memset.s | // This is musl-libc memset commit 37e18b7bf307fa4a8c745feebfcba54a0ba74f30:
//
// src/string/memset.c
//
// This was compiled into assembly with:
//
// clang-14 -target riscv32 -march=rv32im -O3 -S memset.c -nostdlib -fno-builtin -funroll-loops
//
// and labels manually updated to not conflict.
//
// musl as a whole i... |
codygunton/openvm | 11,828 | crates/toolchain/openvm/src/memcpy.s | // This is musl-libc commit 37e18b7bf307fa4a8c745feebfcba54a0ba74f30:
//
// src/string/memcpy.c
//
// This was compiled into assembly with:
//
// clang-14 -target riscv32 -march=rv32im -O3 -S memcpy.c -nostdlib -fno-builtin -funroll-loops
//
// and labels manually updated to not conflict.
//
// musl as a whole is licen... |
codygunton/openvm | 312 | crates/toolchain/tests/tests/data/fib.S | .text
.global _start
_start:
li a0, 15
li a1, 0
li a2, 1
jal x1, loop
loop:
beq a0, zero, exit
addi a0, a0, -1
add a3, a1, a2
add a1, zero, a2
add a2, zero, a3
jal x1, loop
exit:
# Exit program
.insn i 0x0b, 0, x0, x0, 0
|
codygunton/openvm | 593 | crates/toolchain/tests/tests/data/intrin.S | #define CUSTOM_0 0x0b
#define CUSTOM_1 0x2b
.macro addmod_1 rd, rs1, rs2
.insn r CUSTOM_1, 0, 0, \rd, \rs1, \rs2
.endm
.macro submod_1 rd, rs1, rs2
.insn r CUSTOM_1, 0, 1, \rd, \rs1, \rs2
.endm
.macro mulmod_1 rd, rs1, rs2
.insn r CUSTOM_1, 0, 2, \rd, \rs1, \rs2
.endm
.macro iseqmod_1 rd, rs1, rs2
.insn r CUSTO... |
codygunton/openvm | 355 | crates/toolchain/tests/tests/data/terminate.S | #define CUSTOM_0 0x0b
#define CUSTOM_1 0x2b
.macro addmod_1 rd, rs1, rs2
.insn r CUSTOM_1, 0, 0, \rd, \rs1, \rs2
.endm
.macro addmod_2 rd, rs1, rs2
.insn r CUSTOM_1, 0, 4, \rd, \rs1, \rs2
.endm
.macro terminate ec
.insn i CUSTOM_0, 0, x0, x0, \ec
.endm
.global _start
_start:
li zero, 1
add a0, a0, zero
bne a... |
codygunton/openvm | 337 | crates/toolchain/tests/tests/data/exp.S | .global _start
_start:
li a0, 57
li a2, 10007
addi a1, a2, -2
li a4, 1
loop:
beqz a1, finish
andi t3, a1, 1
srli a1, a1, 1
beqz t3, tmp
mul a4, a4, a0
rem a4, a4, a2
tmp:
mul a0, a0, a0
rem a0, a0, a2
jal t4, loop
finish:
li a0, 57
mul a0, a0, a4
rem a0, a0, a2
li a1, 1
bne a0, a1, 228
.insn i 0x... |
CommanderCortex/CortexARM_OS | 715 | src/boot.s | .section .text._start
.global _start
.type _start, @function
_start:
adr x7, {} // stack start
mov x8, {} // stack size
add x7, x7, x8 // stack end
mov sp, x7 // set stack pointer
//Enable floating pointer:
mrs x7, cpacr_el1 // Read CPACR_EL1
... |
comsec-group/milesan-meta | 459 | pocs/milesan/init/init-mds.S | # User mode initialization for MDS.
#
# Perform some operations in user mode to make sure that microarchitectural
# buffers are filled with valid entries before we run the test case.
# This page should not be touched by the rest of the program.
#define FORBIDDEN_ADDR 0x8000C000
.section .u_text , "ax"
init_uarch:
... |
comsec-group/milesan-meta | 5,124 | pocs/milesan/init/init.S | /* PMP configuration */
#define PMP_R 0x01
#define PMP_W 0x02
#define PMP_X 0x04
#define PMP_A 0x18
#define PMP_A_TOR 0x08
#define PMP_A_NA4 0x10
#define PMP_A_NAPOT 0x18
#define PMP_L 0x80
#define CSR_CYCLE ... |
comsec-group/milesan-meta | 424 | pocs/milesan/boot/bootrom.S | #define BOOTADDR_REG 0x4000
#define DRAM_BASE 0x0000000
.section .text.start, "ax", @progbits
.globl _start
_start:
auipc t0,0x0
li t0, DRAM_BASE
jr t0
.section .text.hang, "ax", @progbits
.globl _hang
_hang: // reset vector
auipc t0,0x0
li t0, DRAM_BASE
jr t0
.section .text.hang80, "ax... |
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