repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
vllogic/vllink_zynq7ext | 3,689 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/asm_vectors.S | ;/******************************************************************************
;* Copyright (c) 2020 - 2021 Xilinx, Inc. All rights reserved.
;*
;* SPDX-License-Identifier: MIT
;*
;******************************************************************************/
;/******************************************************... |
vllogic/vllink_zynq7ext | 1,403 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/xil-crt0.S | ;/******************************************************************************
;* Copyright (c) 2020 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/*******************************************************************... |
vllogic/vllink_zynq7ext | 1,401 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/cpu_init.S | ;/******************************************************************************
;* Copyright (c) 2020 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 4,131 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/iccarm/asm_vectors.s | ;******************************************************************************
; Copyright (c) 2017 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************/
;*****************************************************************... |
vllogic/vllink_zynq7ext | 8,976 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/iccarm/boot.s | ;******************************************************************************
; Copyright (c) 2014 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
; *****************************************************************************/
; ***************************************************************... |
vllogic/vllink_zynq7ext | 13,665 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/boot.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,753 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,120 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/xil-crt0.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,359 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/cpu_init.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 9,225 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/boot.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,011 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,156 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/xil-crt0.S | /******************************************************************************
* Copyright (c) 2015 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,374 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/cpu_init.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 5,658 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/platform/ZynqMP/translation_table.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 11,341 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/armclang/boot.S | ;/******************************************************************************
;* Copyright (c) 2019 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 8,201 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/armclang/asm_vectors.S | ;/******************************************************************************
;* Copyright (c) 2019 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 1,679 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/xpvxenconsole/hypercall.S | /*
Copyright DornerWorks 2016
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
following disclaimer.
THIS SOFTWARE IS... |
vllogic/vllink_zynq7ext | 17,091 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/boot.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* Copyright (c) 2022 - 2023 Advanced Micro Devices, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT
********************************************************************... |
vllogic/vllink_zynq7ext | 8,881 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,386 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/xil-crt0.S | /******************************************************************************
* Copyright (C) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 15,453 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/versal/armclang/translation_table.S | /******************************************************************************
* Copyright (C) 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/************************************************************************... |
vllogic/vllink_zynq7ext | 28,270 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/versal/gcc/translation_table.S | /******************************************************************************
* Copyright (C) 2018 - 2022 Xilinx, Inc. All rights reserved.
* Copyright (c) 2022 - 2023 Advanced Micro Devices, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT
********************************************************************... |
vllogic/vllink_zynq7ext | 8,548 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/ZynqMP/armclang/translation_table.S | ;/******************************************************************************
;* Copyright (c) 2018 - 2020 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 8,360 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/ZynqMP/gcc/translation_table.S | /******************************************************************************
* Copyright (c) 2014 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 17,124 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/boot.S | /******************************************************************************
* Copyright (c) 2010 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,892 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/asm_vectors.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 8,023 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/translation_table.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,153 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/xil-crt0.S | /******************************************************************************
* Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,555 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/cpu_init.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,044 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_icache.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,198 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_init_dcache_range.S | /******************************************************************************
* Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,428 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_cache_ext.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,488 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_dcache_range.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,555 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_interrupts.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 5,784 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_scrub.S | /******************************************************************************
* Copyright (c) 2012 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,075 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_dcache.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,540 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_dcache_range.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,200 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_init_icache_range.S | /******************************************************************************
* Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 32,372 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_selftest.S | /******************************************************************************
* Copyright (c) 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/***********************************************************************... |
vllogic/vllink_zynq7ext | 2,385 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_icache.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,575 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_interrupts.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,550 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_update_dcache.S | /******************************************************************************
* Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,815 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_dcache.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,676 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_dcache.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,555 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_update_icache.S | /******************************************************************************
* Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 26,672 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/hw_exception_handler.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,879 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_icache_range.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,482 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_cache_ext_range.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,396 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_cache_ext.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,365 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_dcache.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,070 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_icache.S | /******************************************************************************
* Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,519 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_cache_ext_range.S | /******************************************************************************
* Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,765 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/asm_vectors.s | ;******************************************************************************
; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 4,764 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/translation_table.s | ;******************************************************************************
; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 14,970 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/boot.s | ;******************************************************************************
; Copyright (c) 2009 - 2022 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 17,124 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/boot.S | /******************************************************************************
* Copyright (c) 2010 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,892 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 8,023 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/translation_table.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,153 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/xil-crt0.S | /******************************************************************************
* Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,555 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/cpu_init.S | /******************************************************************************
* Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,043 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/asm_vectors.s | ;******************************************************************************
; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 15,378 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/boot.S | ;******************************************************************************
; Copyright (c) 2009 - 2022 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 4,612 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/translation_table.s | ;******************************************************************************
; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************
;******************************************************************... |
vllogic/vllink_zynq7ext | 8,033 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/boot.S | ;/******************************************************************************
;* Copyright (c) 2020 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/*******************************************************************... |
vllogic/vllink_zynq7ext | 3,689 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/asm_vectors.S | ;/******************************************************************************
;* Copyright (c) 2020 - 2021 Xilinx, Inc. All rights reserved.
;*
;* SPDX-License-Identifier: MIT
;*
;******************************************************************************/
;/******************************************************... |
vllogic/vllink_zynq7ext | 1,403 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/xil-crt0.S | ;/******************************************************************************
;* Copyright (c) 2020 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/*******************************************************************... |
vllogic/vllink_zynq7ext | 1,401 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/cpu_init.S | ;/******************************************************************************
;* Copyright (c) 2020 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 4,131 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/iccarm/asm_vectors.s | ;******************************************************************************
; Copyright (c) 2017 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
;*****************************************************************************/
;*****************************************************************... |
vllogic/vllink_zynq7ext | 8,976 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/iccarm/boot.s | ;******************************************************************************
; Copyright (c) 2014 - 2020 Xilinx, Inc. All rights reserved.
; SPDX-License-Identifier: MIT
; *****************************************************************************/
; ***************************************************************... |
vllogic/vllink_zynq7ext | 13,665 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/boot.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,753 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,120 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/xil-crt0.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,359 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/gcc/cpu_init.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 9,225 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/boot.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,011 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 2,156 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/xil-crt0.S | /******************************************************************************
* Copyright (c) 2015 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 1,374 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/gcc/cpu_init.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 5,658 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/32bit/platform/ZynqMP/translation_table.S | /******************************************************************************
* Copyright (c) 2015 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 11,341 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/armclang/boot.S | ;/******************************************************************************
;* Copyright (c) 2019 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 8,201 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/armclang/asm_vectors.S | ;/******************************************************************************
;* Copyright (c) 2019 - 2021 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 1,679 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/xpvxenconsole/hypercall.S | /*
Copyright DornerWorks 2016
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the
following disclaimer.
THIS SOFTWARE IS... |
vllogic/vllink_zynq7ext | 17,091 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/boot.S | /******************************************************************************
* Copyright (c) 2014 - 2022 Xilinx, Inc. All rights reserved.
* Copyright (c) 2022 - 2023 Advanced Micro Devices, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT
********************************************************************... |
vllogic/vllink_zynq7ext | 8,881 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/asm_vectors.S | /******************************************************************************
* Copyright (c) 2014 - 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 4,386 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/gcc/xil-crt0.S | /******************************************************************************
* Copyright (C) 2014 - 2022 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 15,453 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/versal/armclang/translation_table.S | /******************************************************************************
* Copyright (C) 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/************************************************************************... |
vllogic/vllink_zynq7ext | 28,270 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/versal/gcc/translation_table.S | /******************************************************************************
* Copyright (C) 2018 - 2022 Xilinx, Inc. All rights reserved.
* Copyright (c) 2022 - 2023 Advanced Micro Devices, Inc. All Rights Reserved.
* SPDX-License-Identifier: MIT
********************************************************************... |
vllogic/vllink_zynq7ext | 8,548 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/ZynqMP/armclang/translation_table.S | ;/******************************************************************************
;* Copyright (c) 2018 - 2020 Xilinx, Inc. All rights reserved.
;* SPDX-License-Identifier: MIT
;******************************************************************************/
;/************************************************************... |
vllogic/vllink_zynq7ext | 8,360 | board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/zynq_fsbl_bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/ARMv8/64bit/platform/ZynqMP/gcc/translation_table.S | /******************************************************************************
* Copyright (c) 2014 - 2020 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/*****************************************************************... |
vllogic/vllink_zynq7ext | 3,474 | board_zynq7ext/test/03_ddr3_uart/vitis/ddr3/src/translation_table.s | /******************************************************************************
* Copyright (c) 2021 Xilinx, Inc. All rights reserved.
* SPDX-License-Identifier: MIT
******************************************************************************/
/**********************************************************************... |
vlsi-lab/len5 | 4,002 | sw/device/crt/vectors.S | /* based on the work from ETH Zurich and University of Bologna */
/*
* Copyright 2019 ETH Zürich and University of Bologna
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.a... |
vlsi-lab/len5 | 2,330 | sw/device/crt/crt0.S | # Copyright 2022 Politecnico di Torino.
# Copyright and related rights are licensed under the Solderpad Hardware
# License, Version 2.0 (the "License"); you may not use this file except in
# compliance with the License. You may obtain a copy of the License at
# http://solderpad.org/licenses/SHL-2.0. Unless required by ... |
vmartinv/nek | 6,803 | kernel/arch/x86/generic/init/tables.s | [GLOBAL gdt_flush]
gdt_flush:
mov eax, [esp+4]
lgdt [eax]
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
jmp 0x08:.flush
.flush:
ret
[global idt_flush]
[extern idt_ptr]
idt_flush:
lidt [idt_ptr]
ret
[GLOBAL tss_flush] ; Allows our C code to call tss_flus... |
vmangos/core | 12,033 | dep/src/libseh/os/windows/arch/x86/seh.s |
/*******************************************************************************
* *
* seh.s - Platform specific SEH functions for i486+ (32-bit) *
* ... |
vmsplit/IceVMM | 2,858 | src/vcpu.S | #include "asm_utils.h"
.extern handle_trap
.extern handle_irq
.macro save_regs
sub sp, sp, #(34 * 8)
stp x0, x1, [sp, #(0 * 16)]
stp x2, x3, [sp, #(1 * 16)]
stp x4, x5, [sp, #(2 * 16)]
stp x6, x7, [sp, #(3 * 16)]
stp x8, x9, [sp, #(4 * 16)]
stp x10, x11, [sp, #(... |
vmsplit/IceVMM | 1,742 | src/sysregs.S | #include "asm_utils.h"
.globl get_el
get_el:
mrs x0, CurrentEL
lsr x0, x0, #2
ret
.globl __read_vbar_el2
__read_vbar_el2:
mrs x0, vbar_el2
ret
.globl __write_vbar_el2
__write_vbar_el2:
msr vbar_el2, x0
ret
.globl __read_hcr_el2
__read_hcr_el2:
mrs x0, hcr_el2
ret
.gl... |
vmsplit/IceVMM | 1,621 | src/boot.S | .section ".text.boot"
##
## declare the global entrypoint symbol, as specified
## in the linker script
##
.globl _start
_start:
##
## find out which core we are
##
## the MPIDR_EL1 reg holds the multi-processor
## affinity register. the lower bits are the core ID
##
mrs x0, mpidr_el1
... |
vmsplit/IceVMM | 1,466 | src/exception.S | #include "asm_utils.h"
.section ".text.exceptions"
.align 11 // 2^11 = 2048-byte alignment for the vector table
.globl __exception_vectors
__exception_vectors:
// Exception from current EL with SP0
.align 7
b handle_sync_exception
.align 7
b handle_irq
.align 7
b . // FIQ
.align 7
... |
vmrp/vmrp | 44,221 | mrc/asm/cfunction.ext.s | code: 0x80000 - 0x180000
mr_table: 0x80000
mr_c_function: 0x80004
stack: 0x280000 - 0x180000 向下生长
bridge: 0x280000 - 0x281000
*mr_table:[0x280000]
*mr_c_function:[0x280248]
*mrc_extChunk:[0x28025c]
endAddress:[0x280290]
heap: 0x281000 - 0x381000 向上生长
mr_helper函数： 0x80550
8: e92d403... |
vmware-archive/cascade | 1,669 | share/cascade/test/benchmark/mips32/src/bubble.s | ### CONSTANTS
xor $15, $15, $15
addi $15, $15, 128 # $15 (size) = The number of words in memory
xor $14, $14, $14
addi $14, $14, 127 # $14 = size - 1
xor $11, $11, $11
addi $11, $11, 1024 # $11 (iterations) = The number of times to sort the input
### OUTER-MOST LOOP
xor $10, $10, $10
outer:
### INITIALIZE MEMORY
... |
vmware-archive/node-replicated-kernel | 5,782 | kernel/src/arch/x86_64/isr.S | // Copyright © 2021 VMware, Inc. All Rights Reserved.
// SPDX-License-Identifier: Apache-2.0 OR MIT
.text
.extern handle_generic_exception
/**
* Generates isr_handlerXX service routines that save the context in
* the KCB and then call `handle_generic_exception`.
*
* This routine excepts that an initialized KCB is... |
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