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hasankursun
/
github-code-2025-language-split

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virtualsecureplatform/TFHEpp
8,013
thirdparties/spqlios/spqlios-ifft-fma.s
.file "spqlios-ifft-avx.s" #if !__APPLE__ .section .note.GNU-stack,"",%progbits #endif .text .p2align 4 #if !__APPLE__ .globl ifft .type ifft, @function ifft: #else .globl _ifft _ifft: #endif //typedef struct { // uint64_t n; // double* trig_tables; //} IFFT_PRECOMP; /* void _ifft(const void *tables, do...
vishapoberon/compiler
1,578
src/test/confidence/hello/old.cygwin.ILP32.gcc.s
55 pushl %ebp 89E5 movl %esp, %ebp 83EC10 subl $16, %esp C745FC00 movl $0, -4(%ebp) 8B55FC movl -4(%ebp), %edx 8B4508 movl 8(%ebp), %eax 01D0 addl %edx, %eax 0FB600 movzbl (%eax), %eax 8845FB movb %al, -5(%ebp) 8B55FC movl -4(%ebp), %edx 8B450C movl 12(%ebp), %eax 01D0 ...
vishapoberon/compiler
10,763
src/test/confidence/signal/old.cygwin.ILP32.gcc.s
55 pushl %ebp 89E5 movl %esp, %ebp 83EC10 subl $16, %esp C745FC00 movl $0, -4(%ebp) 8B55FC movl -4(%ebp), %edx 8B4508 movl 8(%ebp), %eax 01D0 addl %edx, %eax 0FB600 movzbl (%eax), %eax 8845FB movb %al, -5(%ebp) 8B55FC movl -4(%ebp), %edx 8B450C movl 12(%ebp), %eax 01D0 ...
vishapoberon/compiler
15,247
src/test/confidence/language/old.cygwin.ILP32.gcc.s
55 pushl %ebp 89E5 movl %esp, %ebp 83EC10 subl $16, %esp C745FC00 movl $0, -4(%ebp) 8B55FC movl -4(%ebp), %edx 8B4508 movl 8(%ebp), %eax 01D0 addl %edx, %eax 0FB600 movzbl (%eax), %eax 8845FB movb %al, -5(%ebp) 8B55FC movl -4(%ebp), %edx 8B450C movl 12(%ebp), %eax 01D0 ...
vishapoberon/compiler
5,757
src/test/confidence/arrayassignment/old.cygwin.ILP32.gcc.s
55 pushl %ebp 89E5 movl %esp, %ebp 83EC10 subl $16, %esp C745FC00 movl $0, -4(%ebp) 8B55FC movl -4(%ebp), %edx 8B4508 movl 8(%ebp), %eax 01D0 addl %edx, %eax 0FB600 movzbl (%eax), %eax 8845FB movb %al, -5(%ebp) 8B55FC movl -4(%ebp), %edx 8B450C movl 12(%ebp), %eax 01D0 ...
vishapoberon/compiler
2,736
src/test/confidence/lola/old.cygwin.ILP32.gcc.s
55 pushl %ebp 89E5 movl %esp, %ebp 83EC10 subl $16, %esp C745FC00 movl $0, -4(%ebp) 8B55FC movl -4(%ebp), %edx 8B4508 movl 8(%ebp), %eax 01D0 addl %edx, %eax 0FB600 movzbl (%eax), %eax 8845FB movb %al, -5(%ebp) 8B55FC movl -4(%ebp), %edx 8B450C movl 12(%ebp), %eax 01D0 ...
visionmedia/node-jscoverage
4,377
js/lock_SunOS.s
! ! ***** BEGIN LICENSE BLOCK ***** ! Version: MPL 1.1/GPL 2.0/LGPL 2.1 ! ! The contents of this file are subject to the Mozilla Public License Version ! 1.1 (the "License"); you may not use this file except in compliance with ! the License. You may obtain a copy of the License at ! http://www.mozilla.org/MPL/ ! ! Sof...
VisorFolks/cyancore
1,466
src/arch/riscv/32/i/terravisor/asm.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : asm.S * Description : This file consists of all the function written in asm * like ISR, context management, zero_reg and panic handler * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cyancore Core-Te...
VisorFolks/cyancore
1,892
src/arch/riscv/32/i/terravisor/entry.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : entry.S * Description : This file consists of entry point of the framework. * After the reset of system, program in this file gets * executed. * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cya...
VisorFolks/cyancore
2,566
src/arch/avr/8/common_5x_6/terravisor/asm.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : asm.S * Description : This file consists of all the function written in asm * like ISR, context management, zero_reg and panic handler * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cyancore Core-Te...
VisorFolks/cyancore
1,087
src/arch/avr/8/common_5x_6/terravisor/entry.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : entry.S * Description : This file consists of entry point of the framework. * After the reset of system, program in this file gets * executed. * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cya...
VisorFolks/cyancore
2,342
src/arch/avr/8/common_5x_6/terravisor/spinlock.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : spinlock.S * Description : This file consists of sources of spinlock in asm * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cyancore Core-Team */ #include <asm.inc> #include <plat_arch.h> /** * spinlo...
VisorFolks/cyancore
1,221
src/platform/mega_avr/common/hal/wdt/wdt_util.S
/* * CYANCORE LICENSE * Copyrights (C) 2019, Cyancore Team * * File Name : wdt_util.S * Description : This file contains wdt HAL driver utilities * Primary Author : Akash Kollipara [akashkollipara@gmail.com] * Organisation : Cyancore Core-Team */ #include <asm.inc> #include <plat_arch.h> #include "wdt_priva...
visrealm/pico9918
101,164
src/gpu/thumb9900_m33.S
/* * Project: pico9918 * * This code is licensed under the MIT license * * https://github.com/visrealm/pico9918 * * Purpose: TMS9900 GPU core (RP2350) * * Author: JasonACT (AtariAge) * */ .syntax unified // ARM unified syntax .thumb_func // Code uses Thumb instructions .section .data // In RAM Pleas...
visrealm/pico9918
96,209
src/gpu/thumb9900_m0.S
/* * Project: pico9918 * * This code is licensed under the MIT license * * https://github.com/visrealm/pico9918 * * Purpose: TMS9900 GPU core (rp2040) * * Author: JasonACT (AtariAge) * */ .syntax unified // ARM unified syntax .thumb_func // Code uses Thumb instructions .section .data // In RAM Pleas...
viterin/vek
253,791
internal/functions/accel_avx2_amd64.s
// Code generated by command: go run gen.go -out ../internal/functions/accel_avx2_amd64.s -stubs ../internal/functions/accel_avx2_amd64.go -pkg functions. DO NOT EDIT. #include "textflag.h" // func Add_AVX2_F64(x []float64, y []float64) // Requires: AVX TEXT ·Add_AVX2_F64(SB), NOSPLIT, $0-48 MOVQ x_base+0(FP), DI ...
viterin/vek
159,250
asm/_avx2/special.s
Sqrt_F64_V(double*, unsigned long): # @Sqrt_F64_V(double*, unsigned long) testq %rsi, %rsi je .LBB0_7 cmpq $4, %rsi jae .LBB0_3 xorl %eax, %eax jmp .LBB0_6 .LBB0_3: movq %rsi, %rax andq $-4, %rax xorl...
viterin/vek
35,783
asm/_avx2/matrix.s
Mat4Mul_F64_V(double*, double*, double*): # @Mat4Mul_F64_V(double*, double*, double*) vbroadcastsd (%rsi), %ymm0 vmovupd (%rdx), %ymm1 vmovupd 32(%rdx), %ymm2 vmovupd 64(%rdx), %ymm3 vmovupd 96(%rdx), %ymm4 vmulpd %ymm0, %ymm1, %ymm0 vbroadcasts...
viterin/vek
11,852
asm/_avx2/min.s
.LCPI0_0: .quad 0x7fefffffffffffff # double 1.7976931348623157E+308 Min_F64_D(double*, unsigned long): # @Min_F64_D(double*, unsigned long) testq %rsi, %rsi je .LBB0_1 cmpq $16, %rsi jae .LBB0_4 vmovsd .LCPI0_0(%rip), %...
viterin/vek
19,468
asm/_avx2/boolean.s
.LCPI0_0: .zero 32,1 .LCPI0_1: .zero 16,1 Not_V(bool*, unsigned long): # @Not_V(bool*, unsigned long) testq %rsi, %rsi je .LBB0_17 cmpq $16, %rsi jae .LBB0_3 xorl %eax, %eax jmp .LBB0_16 .LBB0_3: ...
viterin/vek
69,253
asm/_avx2/comparison.s
.LCPI0_0: .byte 1 # 0x1 .byte 1 # 0x1 .byte 1 # 0x1 .byte 1 # 0x1 .zero 1 .zero 1 .zero 1 .zero 1 .zero 1 ...
viterin/vek
15,837
asm/_avx2/aggregates.s
Sum_F64_D(double*, unsigned long): # @Sum_F64_D(double*, unsigned long) testq %rsi, %rsi je .LBB0_1 cmpq $16, %rsi jae .LBB0_4 vxorpd %xmm0, %xmm0, %xmm0 xorl %eax, %eax jmp .LBB0_11 .LBB0_1: vxorps %xmm0, %xmm...
viterin/vek
42,668
asm/_avx2/arithmetic.s
Add_F64_V(double*, double*, unsigned long): # @Add_F64_V(double*, double*, unsigned long) testq %rdx, %rdx je .LBB0_7 cmpq $16, %rdx jae .LBB0_3 xorl %eax, %eax jmp .LBB0_6 .LBB0_3: movq %rdx, %rax andq $-16,...
viterin/vek
68,531
asm/_avx2/construct.s
Repeat_F64_V(double*, double, unsigned long): # @Repeat_F64_V(double*, double, unsigned long) testq %rsi, %rsi je .LBB0_12 cmpq $16, %rsi jae .LBB0_3 xorl %eax, %eax jmp .LBB0_11 .LBB0_3: movq %rsi, %rax andq $-...
viterin/vek
12,331
asm/_avx2/max.s
.LCPI0_0: .quad 0xffefffffffffffff # double -1.7976931348623157E+308 Max_F64(double*, unsigned long): # @Max_F64(double*, unsigned long) testq %rsi, %rsi je .LBB0_1 cmpq $16, %rsi jae .LBB0_4 vmovsd .LCPI0_0(%rip), %x...
viterin/vek
2,548
asm/_avx2/find.s
Find_F64(double*, double, unsigned long): # @Find_F64(double*, double, unsigned long) movq %rsi, %rcx andq $-8, %rcx je .LBB0_1 vpbroadcastq %xmm0, %ymm1 xorl %eax, %eax .LBB0_7: # =>This Inner Loop Header: De...
viterin/vek
32,436
asm/_avx2/distance.s
Dot_F64_D(double*, double*, unsigned long): # @Dot_F64_D(double*, double*, unsigned long) testq %rdx, %rdx je .LBB0_1 cmpq $16, %rdx jae .LBB0_4 vxorpd %xmm0, %xmm0, %xmm0 xorl %eax, %eax jmp .LBB0_7 .LBB0_1: vxor...
vittorioromeo/vittorioromeo.com
207,702
extra/zeroalloc_continuations/3strip.s
ret movq (%rdi), %rax jmp *8(%rax) addl $1, 88(%rdi) ret rep ret rep ret movq (%rdi), %rax ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret movq 16(%rdi), %rdi testq %rdi, %rdi movq (%rdi), %rax jmp *8(%rax) rep ret xorl %ea...
vittorioromeo/vittorioromeo.com
15,561
extra/zeroalloc_continuations/stack_22_strip.s
rep ret xorl %eax, %eax ret movq %fs:(%rax), %rax movq 16(%rax), %rdx movq (%rax), %rcx movq (%rdx), %rsi movq 24(%rax), %rdx movq 8(%rax), %rax movq 8(%rcx), %rdi movq (%rdx), %rdx addq (%rax), %rdi movq (%rcx), %rax testb $1, %al movq (%rdi), %rcx movq -1(%rcx,%rax), %rax jmp *%rax movq (%rdi), %rax...
vittorioromeo/vittorioromeo.com
1,926,487
extra/zeroalloc_continuations/4_continuations.cpp.s
.file "4_continuations.cpp" .section .rodata._ZNK5boost12bad_weak_ptr4whatEv.str1.1,"aMS",@progbits,1 .LC0: .string "tr1::bad_weak_ptr" .section .text._ZNK5boost12bad_weak_ptr4whatEv,"axG",@progbits,_ZNK5boost12bad_weak_ptr4whatEv,comdat .align 2 .p2align 4,,15 .weak _ZNK5boost12bad_weak_ptr4whatEv .type _ZNK5b...
vittorioromeo/vittorioromeo.com
1,559,569
extra/zeroalloc_continuations/0_continuations.cpp.s
.file "0_continuations.cpp" .section .rodata._ZNK5boost12bad_weak_ptr4whatEv.str1.1,"aMS",@progbits,1 .LC0: .string "tr1::bad_weak_ptr" .section .text._ZNK5boost12bad_weak_ptr4whatEv,"axG",@progbits,_ZNK5boost12bad_weak_ptr4whatEv,comdat .align 2 .p2align 4,,15 .weak _ZNK5boost12bad_weak_ptr4whatEv .type _ZNK5b...
vittorioromeo/vittorioromeo.com
186,394
extra/zeroalloc_continuations/1strip.s
ret movq (%rdi), %rax jmp *8(%rax) addl $1, 88(%rdi) ret rep ret rep ret movq (%rdi), %rax ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret movq 16(%rdi), %rdi testq %rdi, %rdi movq (%rdi), %rax jmp *8(%rax) rep ret xorl %eax, %eax ret xorl %eax, %eax ret ...
vittorioromeo/vittorioromeo.com
219,198
extra/zeroalloc_continuations/4strip.s
ret movq (%rdi), %rax jmp *8(%rax) addl $1, 88(%rdi) ret rep ret rep ret movq (%rdi), %rax ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret movq 16(%rdi), %rdi testq %rdi, %rdi movq (%rdi), %rax jmp *8(%rax) ...
vittorioromeo/vittorioromeo.com
1,756,204
extra/zeroalloc_continuations/2_continuations.cpp.s
.file "2_continuations.cpp" .section .rodata._ZNK5boost12bad_weak_ptr4whatEv.str1.1,"aMS",@progbits,1 .LC0: .string "tr1::bad_weak_ptr" .section .text._ZNK5boost12bad_weak_ptr4whatEv,"axG",@progbits,_ZNK5boost12bad_weak_ptr4whatEv,comdat .align 2 .p2align 4,,15 .weak _ZNK5boost12bad_weak_ptr4whatEv .type _ZNK5b...
vittorioromeo/vittorioromeo.com
1,672,805
extra/zeroalloc_continuations/1_continuations.cpp.s
.file "1_continuations.cpp" .section .rodata._ZNK5boost12bad_weak_ptr4whatEv.str1.1,"aMS",@progbits,1 .LC0: .string "tr1::bad_weak_ptr" .section .text._ZNK5boost12bad_weak_ptr4whatEv,"axG",@progbits,_ZNK5boost12bad_weak_ptr4whatEv,comdat .align 2 .p2align 4,,15 .weak _ZNK5boost12bad_weak_ptr4whatEv .type _ZNK5b...
vittorioromeo/vittorioromeo.com
15,560
extra/zeroalloc_continuations/stack_2_strip.s
rep ret xorl %eax, %eax ret movq %fs:(%rax), %rax movq 16(%rax), %rdx movq (%rax), %rcx movq (%rdx), %rsi movq 24(%rax), %rdx movq 8(%rax), %rax movq 8(%rcx), %rdi movq (%rdx), %rdx addq (%rax), %rdi movq (%rcx), %rax testb $1, %al movq (%rdi), %rcx movq -1(%rcx,%rax), %rax jmp *%rax movq (%rdi), %rax...
vittorioromeo/vittorioromeo.com
108,281
extra/zeroalloc_continuations/stack_2_continuations.cpp.s
.file "stack_2_continuations.cpp" .section .text._ZNSt13__future_base13_State_baseV217_M_complete_asyncEv,"axG",@progbits,_ZNSt13__future_base13_State_baseV217_M_complete_asyncEv,comdat .align 2 .p2align 4,,15 .weak _ZNSt13__future_base13_State_baseV217_M_complete_asyncEv .type _ZNSt13__future_base13_State_baseV2...
vittorioromeo/vittorioromeo.com
1,840,086
extra/zeroalloc_continuations/3_continuations.cpp.s
.file "3_continuations.cpp" .section .rodata._ZNK5boost12bad_weak_ptr4whatEv.str1.1,"aMS",@progbits,1 .LC0: .string "tr1::bad_weak_ptr" .section .text._ZNK5boost12bad_weak_ptr4whatEv,"axG",@progbits,_ZNK5boost12bad_weak_ptr4whatEv,comdat .align 2 .p2align 4,,15 .weak _ZNK5boost12bad_weak_ptr4whatEv .type _ZNK5b...
vittorioromeo/vittorioromeo.com
171,937
extra/zeroalloc_continuations/0strip.s
ret movq (%rdi), %rax jmp *8(%rax) addl $1, 88(%rdi) ret rep ret rep ret movq (%rdi), %rax ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret movq 16(%rdi), %rdi testq %rdi, %rdi movq (%rdi), %rax jmp *8(%rax) rep ret xorl %eax, %eax ret xorl %eax, %eax ret xorl %eax, %eax r...
vittorioromeo/vittorioromeo.com
197,476
extra/zeroalloc_continuations/2strip.s
ret movq (%rdi), %rax jmp *8(%rax) addl $1, 88(%rdi) ret rep ret rep ret movq (%rdi), %rax ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret rep ret movq 16(%rdi), %rdi testq %rdi, %rdi movq (%rdi), %rax jmp *8(%rax) rep ret xorl %eax, %eax ret xorl...
vittorioromeo/vittorioromeo.com
266,057
extra/zeroalloc_continuations/stack_22_continuations.cpp.s
.file "stack_22_continuations.cpp" .section .text._ZNSt13__future_base13_State_baseV217_M_complete_asyncEv,"axG",@progbits,_ZNSt13__future_base13_State_baseV217_M_complete_asyncEv,comdat .align 2 .p2align 4,,15 .weak _ZNSt13__future_base13_State_baseV217_M_complete_asyncEv .type _ZNSt13__future_base13_State_baseV...
vittorioromeo/vittorioromeo.com
10,704
extra/passing_functions_to_functions/old/wip/a0.s
.file "a0_main.cpp" .section .gnu.lto_.profile.5af294f9ce1c2997,"e",@progbits .string "x\234cc```\001bF\006!v" .string "" .string "\243" .ascii "%" .text .section .gnu.lto_.icf.5af294f9ce1c2997,"e",@progbits .string "x\234cc``\340c@" .string "&\206\327\007\277\256bcl\375r\3546+\003" .ascii "3\001\006\210" ....
vivint/infectious
5,826
addmul_amd64.s
// The MIT License (MIT) // // Copyright (C) 2016-2017 Vivint, Inc. // Copyright (c) 2015 Klaus Post // Copyright (c) 2015 Backblaze // // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software with...
VKCOM/kphp
2,238
common/ucontext/linux/x86_64/setcontext.S
// Modified by LLC «V Kontakte», 2024 November 1 // // This file is part of the GNU C Library. // Copyright (C) 2002-2024 Free Software Foundation, Inc. // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Softw...
VKCOM/kphp
2,496
common/ucontext/linux/x86_64/getcontext.S
// Modified by LLC «V Kontakte», 2024 November 1 // // This file is part of the GNU C Library. // Copyright (C) 2002-2024 Free Software Foundation, Inc. // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Softw...
VKCOM/kphp
3,374
common/ucontext/linux/x86_64/swapcontext.S
// Modified by LLC «V Kontakte», 2024 November 1 // // This file is part of the GNU C Library. // Copyright (C) 2002-2024 Free Software Foundation, Inc. // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Softw...
VKCOM/kphp
1,932
common/ucontext/linux/x86_64/startcontext.S
// Modified by LLC «V Kontakte», 2024 November 1 // // This file is part of the GNU C Library. // Copyright (C) 2002-2024 Free Software Foundation, Inc. // This program is free software: you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Softw...
vkrasnov/avx_qsort
8,381
qsort_AVX2_HSW_256bit_ptrs.s
.set pivotALU, %rcx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set A5, %ymm5 .set A6, %ymm6 .set M0, %ymm7 .set M1, %ymm8 .set M2, %ymm9 .set M3, %ymm10 .set M4, %ymm11 .set M5, %ymm12 .set M6, %ymm13 .set T, %ymm14 .set PIVOT, %ymm15 .set r0, %r8 .set r1, %r9 .set r2, %r10 .set r...
vkrasnov/avx_qsort
7,844
qsort_AVX2_HSW_256bit_long.s
.set pivotALU, %rcx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set A5, %ymm5 .set A6, %ymm6 .set M0, %ymm7 .set M1, %ymm8 .set M2, %ymm9 .set M3, %ymm10 .set M4, %ymm11 .set M5, %ymm12 .set M6, %ymm13 .set T, %ymm14 .set PIVOT, %ymm15 .set r0, %r8 .set r1, %r9 .set r2, %r10 .set r...
vkrasnov/avx_qsort
6,125
qsort_AVX2_HSW_256bit_doublequad.s
.set pivotALU, %rcx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set G0, %ymm4 .set G1, %ymm5 .set G2, %ymm6 .set G3, %ymm7 .set G0_xmm, %xmm4 .set G1_xmm, %xmm5 .set G2_xmm, %xmm6 .set G3_xmm, %xmm7 .set E0, %ymm8 .set E1, %ymm9 .set E2, %ymm10 .set E3, %ymm11 .set E0_xmm, %xmm8 .set E1_xmm, %xmm...
vkrasnov/avx_qsort
21,555
qsort_AVX2_HSW_256bit_int.s
.set pivotALU, %ecx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set M0, %ymm5 .set M1, %ymm6 .set M2, %ymm7 .set M3, %ymm8 .set M4, %ymm9 .set S0, %ymm10 .set S1, %ymm11 .set S2, %ymm12 .set S3, %ymm13 .set S4, %ymm14 .set A5, %ymm10 .set A6, %ymm11 .set M5, %ymm12 .set M6, %ymm13 ...
vkrasnov/avx_qsort
10,338
qsort_AVX2_HSW_256bit_double.s
.set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set A5, %ymm5 .set A6, %ymm6 .set M0, %ymm7 .set M1, %ymm8 .set M2, %ymm9 .set M3, %ymm10 .set M4, %ymm11 .set M5, %ymm12 .set M6, %ymm13 .set T, %ymm14 .set PIVOT, %ymm15 .set r0, %r8 .set r1, %r9 .set r2, %r10 .set r3, %r11 .set r4, %r15 ...
vkrasnov/avx_qsort
21,631
qsort_AVX2_HSW_256bit_float.s
.set pivotALU, %ecx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set M0, %ymm5 .set M1, %ymm6 .set M2, %ymm7 .set M3, %ymm8 .set M4, %ymm9 .set S0, %ymm10 .set S1, %ymm11 .set S2, %ymm12 .set S3, %ymm13 .set S4, %ymm14 .set A5, %ymm10 .set A6, %ymm11 .set M5, %ymm12 .set M6, %ymm13 ...
vkrasnov/avx_qsort
6,924
qsort_AVX3_SKL_512bit_long.s
.set pivotALU, %rcx .set A0, %ymm0 .set A1, %ymm1 .set A2, %ymm2 .set A3, %ymm3 .set A4, %ymm4 .set A5, %ymm5 .set A6, %ymm6 .set M0, %ymm7 .set M1, %ymm8 .set M2, %ymm9 .set M3, %ymm10 .set M4, %ymm11 .set M5, %ymm12 .set M6, %ymm13 .set T, %ymm14 .set PIVOT, %ymm15 .set r0, %r8 .set r1, %r9 .set r2, %r10 .set r...
vlang/vinix
1,431
kernel/asm/int_thunks_asm.S
.altmacro .macro THUNK num .global interrupt_thunk_\num interrupt_thunk_\num: .if \num != 8 && \num != 10 && \num != 11 && \num != 12 && \num != 13 && \num != 14 && \num != 17 && \num != 30 push $0 .endif cmpq $0x43, 16(%rsp) // if user jne 1f swapgs 1: push %r15 push %r14 push %r13 p...
vllogic/vllink_lite
11,418
vsf/vsf/utilities/3rd-party/PLOOC/raw/example/project/mdk/RTE/Device/CMSDK_CM3/startup_CMSDK_CM3.s
;/**************************************************************************//** ; * @file startup_CMSDK_CM3.s ; * @brief CMSIS Core Device Startup File for ; * CMSDK_CM3 Device ; * @version V3.05 ; * @date 09. November 2016 ; ***********************************************************************...
vllogic/vllink_lite
5,313
vsf/vsf/utilities/compiler/arm/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
;/* ---------------------------------------------------------------------- ; * Project: CMSIS DSP Library ; * Title: arm_bitreversal2.S ; * Description: arm_bitreversal_32 function done in assembly for maximum speed. ; * Called after doing an fft to reorder the output. ; * The f...
vllogic/vllink_lite
6,165
vsf/vsf/hal/arch/arm/arm9/startup/app/asm/iar/entry.S
/***************************************************************************** * Copyright(C)2009-2019 by VSF Team * * * * Licensed under the Apache License, Version 2.0 (the "License"); * * ...
vllogic/vllink_lite
10,385
vsf/vsf/component/3rd-party/segger_rtt/raw/RTT/SEGGER_RTT_ASM_ARMv7M.S
/********************************************************************* * (c) SEGGER Microcontroller GmbH * * The Embedded Experts * * www.segger.com * ************************************...
vllogic/vllink_zynq7ext
5,201
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/zynq_fsbl/fsbl_handoff.S
/****************************************************************************** * * Copyright (c) 2012 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /***************************************************************...
vllogic/vllink_zynq7ext
17,124
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/boot.S
/****************************************************************************** * Copyright (c) 2010 - 2022 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
4,892
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/asm_vectors.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
8,023
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/translation_table.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
3,153
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/xil-crt0.S
/****************************************************************************** * Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,555
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/cpu_init.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,044
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_icache.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,198
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_init_dcache_range.S
/****************************************************************************** * Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,428
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_cache_ext.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
3,488
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_dcache_range.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,555
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_interrupts.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
5,784
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_scrub.S
/****************************************************************************** * Copyright (c) 2012 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,075
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_dcache.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
3,540
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_dcache_range.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,200
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_init_icache_range.S
/****************************************************************************** * Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
32,372
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_selftest.S
/****************************************************************************** * Copyright (c) 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /***********************************************************************...
vllogic/vllink_zynq7ext
2,385
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_icache.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,575
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_interrupts.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,550
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_update_dcache.S
/****************************************************************************** * Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,815
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_dcache.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,676
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_disable_dcache.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,555
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_update_icache.S
/****************************************************************************** * Copyright (c) 2006 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
26,672
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/hw_exception_handler.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,879
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_icache_range.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,482
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_cache_ext_range.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,396
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_flush_cache_ext.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
2,365
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_dcache.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,070
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_enable_icache.S
/****************************************************************************** * Copyright (c) 2004 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,519
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/microblaze/microblaze_invalidate_cache_ext_range.S
/****************************************************************************** * Copyright (c) 2008 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
3,765
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/asm_vectors.s
;****************************************************************************** ; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
4,764
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/translation_table.s
;****************************************************************************** ; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
14,970
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/iccarm/boot.s
;****************************************************************************** ; Copyright (c) 2009 - 2022 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
17,124
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/boot.S
/****************************************************************************** * Copyright (c) 2010 - 2022 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
4,892
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/asm_vectors.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
8,023
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/translation_table.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
3,153
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/xil-crt0.S
/****************************************************************************** * Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
1,555
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/gcc/cpu_init.S
/****************************************************************************** * Copyright (c) 2009 - 2021 Xilinx, Inc. All rights reserved. * SPDX-License-Identifier: MIT ******************************************************************************/ /*****************************************************************...
vllogic/vllink_zynq7ext
4,043
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/asm_vectors.s
;****************************************************************************** ; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
15,378
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/boot.S
;****************************************************************************** ; Copyright (c) 2009 - 2022 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
4,612
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexa9/armcc/translation_table.s
;****************************************************************************** ; Copyright (c) 2009 - 2020 Xilinx, Inc. All rights reserved. ; SPDX-License-Identifier: MIT ;***************************************************************************** ;******************************************************************...
vllogic/vllink_zynq7ext
8,033
board_zynq7ext/test/03_ddr3_uart/vitis/system_wrapper/ps7_cortexa9_0/standalone_ps7_cortexa9_0/bsp/ps7_cortexa9_0/libsrc/standalone_v8_1/src/arm/cortexr5/armclang/boot.S
;/****************************************************************************** ;* Copyright (c) 2020 Xilinx, Inc. All rights reserved. ;* SPDX-License-Identifier: MIT ;******************************************************************************/ ;/*******************************************************************...