sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15 values |
|---|---|---|---|---|---|
// Demangled: inline_test(int*, int)
Function : _Z11inline_testPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R5.reuse, UR6, RZ &req={0} ?trans1;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 ?trans2;
LDG.E R7, desc[UR4][R4.64] &req={2} &wr=0x2 ?trans4;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: inline_test(int*, int)
_Z11inline_testPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s2, v0
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_clause 0x1
global_load_b32 v1, v[1:2], off
global_load_b32 v2, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| inline_test | 388 | 338 | stackv2-00000-of-00015 |
// Demangled: UpdateVisit(node1*, int*, int*, int*)
Function : _Z11UpdateVisitP5node1PiS1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
LDG.E R5, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R11, R11, UR6, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R10, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R8, R0, 0x8, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R13, R10, PT &req={3} ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans2;
@!P0 LDG.E R10, desc[UR4][R6.64] &req={0} &wr=0x2 ?trans2;
@!P0 IADD3 R15, PT, PT, R10, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R15 &rd=0x0 ?trans4;
@!P0 LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR4][R8.64+0x4], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R8.64], R13 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={0} ?trans5;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: UpdateVisit(node1*, int*, int*, int*)
_Z11UpdateVisitP5node1PiS1_S1_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x2c
s_add_u32 s0, s0, 32
s_addc_u32 s1, s1, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s3, s[6:7], 0x0
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB1_5
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v3, 0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 3, v[1:2]
v_add_co_u32 v0, vcc_lo, v4, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, v0, 4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v2, vcc_lo
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s0, s2
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[2:3], 3
.LBB1_2:
global_load_b32 v0, v3, s[8:9]
global_load_b32 v2, v[4:5], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v0, 1, v0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e64 v2, v0
s_cbranch_execz .LBB1_4
global_load_b32 v0, v3, s[10:11]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, 1, v0
global_store_b32 v3, v0, s[10:11]
global_load_b32 v2, v[4:5], off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
global_store_b64 v[4:5], v[2:3], off offset:-4
global_load_b32 v0, v3, s[6:7]
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, s0, v4, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v0
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB1_2
.LBB1_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| UpdateVisit | 939 | 1,103 | stackv2-00000-of-00015 |
// Demangled: Updatenextlevel(int*, int*, int*, node1*, int*)
Function : _Z15UpdatenextlevelPiS_S_P5node1S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x0 ?trans1;
MOV R9, R3 ?trans1;
IMAD R13, R13, UR6, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x398] &req={0} &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R2, R0, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x360 ?trans1;
ISETP.NE.AND P0, PT, R2, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x350 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?trans2;
LEA R6, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R7, R0, UR7, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R6.64] &wr=0x2 ?trans4;
LDG.E R3, desc[UR4][R6.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R2, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x350 ?trans5;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x330 ?trans1;
MOV R15, R2 ?trans1;
MOV R12, R3 ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE R2, R15, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans2;
IMAD.WIDE R8, R3, 0x8, R10 &req={2,0} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR4][R8.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B2, 0x300 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R14, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x2f0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans2;
IADD3 R17, PT, PT, R2, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+0x4], R17 &rd=0x0 ?trans4;
LDG.E R12, desc[UR4][R6.64+0x4] &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
ISETP.GE.AND P0, PT, R15, R12, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x220 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R9, desc[UR4][R2.64] &req={1,0} &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x3a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Updatenextlevel(int*, int*, int*, node1*, int*)
_Z15UpdatenextlevelPiS_S_P5node1S_:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s6, s[0:1], 0x34
s_add_u32 s4, s0, 40
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s12, s[2:3], 0x0
s_and_b32 s13, s6, 0xffff
s_mov_b32 s6, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB0_11
s_load_b32 s14, s[4:5], 0x0
s_load_b256 s[4:11], s[0:1], 0x0
v_mov_b32_e32 v6, s12
v_mov_b32_e32 v0, 0
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s14, s13
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_add_co_u32 v3, vcc_lo, s10, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v0, s[8:9]
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e64 v3, v4
s_cbranch_execz .LBB0_10
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b64 v[4:5], v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v4, v5
s_cbranch_execz .LBB0_9
v_ashrrev_i32_e32 v7, 31, v4
v_mov_b32_e32 v6, v4
s_mov_b32 s15, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
.LBB0_5:
global_load_b32 v8, v[6:7], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_add_co_u32 v8, vcc_lo, s10, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
global_load_b32 v10, v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e32 -1, v10
s_cbranch_execz .LBB0_7
global_load_b32 v5, v0, s[8:9]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 1, v5
global_store_b32 v[8:9], v5, off offset:4
global_load_b32 v5, v[2:3], off offset:4
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v4, 1, v4
v_add_co_u32 v6, s0, v6, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v4, v5
s_or_b32 s15, vcc_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB0_5
s_or_b32 exec_lo, exec_lo, s15
global_load_b32 v6, v0, s[2:3]
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s14
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v1, s1, v1
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v6
s_or_b32 s12, vcc_lo, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Updatenextlevel | 1,541 | 1,682 | stackv2-00000-of-00015 |
// Demangled: mean_filter_gpu(unsigned char*, int, int, unsigned char*, int)
Function : _Z15mean_filter_gpuPhiiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.Y &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R2, UR5, R5 &req={2} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, R8, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x1aa0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={0} ?WAIT4_END_GROUP;
ULEA.HI UR4, UR4, UR4, URZ, 0x1 ?WAIT4_END_GROUP;
USHF.R.S32.HI UR4, URZ, 0x1, UR4 ?WAIT6_END_GROUP;
IADD3 R5, PT, PT, R3.reuse, UR4, RZ ?trans1;
ISETP.GE.AND P1, PT, R3.reuse, UR4, PT ?trans1;
IADD3 R4, PT, PT, R3, -UR4, RZ ?trans2;
IADD3 R2, PT, PT, R0.reuse, UR4, RZ ?trans2;
IADD3 R7, PT, PT, R0, -UR4, RZ ?trans1;
ISETP.GE.AND P2, PT, R5, R8, PT ?trans1;
SEL R4, R4, RZ, P1 ?trans1;
ISETP.GE.AND P0, PT, R2, R9, PT ?trans1;
ISETP.GE.AND P1, PT, R0, UR4, PT ?WAIT5_END_GROUP;
SEL R7, R7, RZ, P1 ?WAIT5_END_GROUP;
@P2 IADD3 R5, PT, PT, R8, -0x1, RZ ?trans2;
@P0 IADD3 R2, PT, PT, R9, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P2, PT, R5, R4, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x1a90 &req={2,1} ?trans5;
VIMNMX.S32 R11, R0, UR4, !PT ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R11.reuse, UR4, R2 ?trans2;
IADD3 R11, PT, PT, R11, -UR4, RZ ?trans2;
IADD3 R12, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R12.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R12, 0xf, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, R9, -0x1, RZ ?trans2;
IADD3 R10, PT, PT, R8, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R13, 0x3, PT ?trans1;
LOP3.LUT R13, R12, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
ISETP.GE.U32.AND P0, PT, R10, 0x7, PT ?trans1;
MOV R10, R4 ?trans1;
LOP3.LUT R12, R12, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT9_END_GROUP;
ISETP.GE.AND P2, PT, R2, R7, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1a60 ?WAIT12_END_GROUP;
@!P2 BRA 0x1a50 &req={4,3,2,1,0} ?trans5;
ISETP.GE.U32.AND P3, PT, R6, 0xf, PT ?trans1;
BSSY.RECONVERGENT B2, 0xf10 ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
MOV R15, R7 ?WAIT10_END_GROUP;
@!P3 BRA 0xf00 ?trans5;
LDCU UR5, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R22, R13 ?trans1;
MOV R15, R7 ?trans1;
IMAD R14, R10, UR5, R11 &req={0} ?WAIT7_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R14 ?trans1;
MOV R16, R14 ?WAIT5_END_GROUP;
IADD.64 R16, R16, UR8 ?WAIT6_END_GROUP;
LDG.E.U8 R23, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.U8 R37, desc[UR6][R16.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R35, desc[UR6][R16.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R33, desc[UR6][R16.64+0x3] &wr=0x5 ?trans4;
LDG.E.U8 R32, desc[UR6][R16.64+0x4] &wr=0x3 ?trans4;
LDG.E.U8 R31, desc[UR6][R16.64+0x5] &wr=0x3 ?trans4;
LDG.E.U8 R30, desc[UR6][R16.64+0x6] &wr=0x3 ?trans4;
LDG.E.U8 R29, desc[UR6][R16.64+0x7] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR6][R16.64+0x8] &wr=0x3 ?trans4;
LDG.E.U8 R27, desc[UR6][R16.64+0x9] &wr=0x3 ?trans4;
LDG.E.U8 R26, desc[UR6][R16.64+0xa] &wr=0x3 ?trans4;
LDG.E.U8 R25, desc[UR6][R16.64+0xb] &wr=0x3 ?trans4;
LDG.E.U8 R24, desc[UR6][R16.64+0xc] &wr=0x3 ?trans4;
LDG.E.U8 R34, desc[UR6][R16.64+0xe] &wr=0x3 ?trans4;
LDG.E.U8 R36, desc[UR6][R16.64+0xf] &wr=0x3 ?trans1;
I2F.F64.U16 R20, R23 &req={2} &rd=0x0 &wr=0x1 ?trans3;
LDG.E.U8 R23, desc[UR6][R16.64+0xd] &req={0} &rd=0x0 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={1} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R37 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R35 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x5 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R33 &req={5} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R32 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R31 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R30 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R16, R29 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R18, R16 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R28 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R27 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
IADD3 R22, PT, PT, R22, 0x10, RZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R26 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
ISETP.NE.AND P3, PT, R22, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R25 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
IADD3 R15, PT, PT, R15, 0x10, RZ ?trans2;
IADD3 R14, PT, PT, R14, 0x10, RZ ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R24 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x2 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R23 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R34, R34 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R34 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R36, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R16, R36 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P3 BRA 0x3c0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
BSSY.RECONVERGENT B2, 0x1500 ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT3_END_GROUP;
@!P0 BRA 0x14f0 ?trans10;
LDCU UR5, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R24, R10, UR5, R15 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R24, UR10 &req={1} ?WAIT6_END_GROUP;
LDG.E.U8 R26, desc[UR6][R24.64] &wr=0x2 ?trans4;
LDG.E.U8 R27, desc[UR6][R24.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR6][R24.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R23, desc[UR6][R24.64+0x3] &wr=0x5 ?trans4;
LDG.E.U8 R22, desc[UR6][R24.64+0x4] &wr=0x3 ?trans4;
LDG.E.U8 R14, desc[UR6][R24.64+0x5] &wr=0x3 ?trans4;
LDG.E.U8 R16, desc[UR6][R24.64+0x6] &wr=0x3 ?trans4;
LDG.E.U8 R17, desc[UR6][R24.64+0x7] &wr=0x3 ?trans1;
IADD3 R15, PT, PT, R15, 0x8, RZ ?trans1;
I2F.F64.U16 R20, R26 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R18, R20 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R27 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={0} &rd=0x4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R28 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R23 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R22 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R14 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R16 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R17 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
BSSY.RECONVERGENT B2, 0x1830 ?trans1;
ISETP.NE.AND P2, PT, R12, RZ, PT ?WAIT3_END_GROUP;
@!P1 BRA 0x1820 ?trans10;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R16, R10, UR5, R15 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R16, UR10 &req={3} ?WAIT6_END_GROUP;
LDG.E.U8 R14, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.U8 R22, desc[UR6][R16.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R23, desc[UR6][R16.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R24, desc[UR6][R16.64+0x3] &wr=0x5 ?trans1;
IADD3 R15, PT, PT, R15, 0x4, RZ ?trans1;
I2F.F64.U16 R20, R14 &req={2,0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R18, R20 &req={1,0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R22 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={0} &rd=0x4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R23 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R24 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x2 &wr=0x3 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
LDCU UR5, c[0x0][0x388] &wr=0x4 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R14, R10, UR5, R15 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R16, R14, UR10 &req={5} ?WAIT6_END_GROUP;
LDG.E.U8 R14, desc[UR6][R16.64] &wr=0x4 ?trans1;
ISETP.NE.AND P2, PT, R12, 0x1, PT ?trans1;
I2F.F64.U16 R14, R14 &req={4} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R14 &req={4,3,1} &rd=0x4 &wr=0x1 ?trans2;
@!P2 BRA 0x1a50 &req={4,1} ?trans5;
LDG.E.U8 R20, desc[UR6][R16.64+0x1] &req={2,0} &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R12, 0x2, PT ?WAIT13_END_GROUP;
@P2 LDG.E.U8 R21, desc[UR6][R16.64+0x2] &wr=0x3 ?trans1;
I2F.F64.U16 R14, R20 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R14 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 I2F.F64.U16 R14, R21 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 DADD R18, R18, R14 &req={0} &rd=0x4 &wr=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.GE.AND P2, PT, R10.reuse, R5, PT ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT12_END_GROUP;
@!P2 BRA 0x300 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R4, PT, PT, R5, 0x1, -R4 ?trans1;
BSSY.RECONVERGENT B0, 0x1e40 ?trans1;
IADD3 R7, PT, PT, -R7, R2, RZ ?trans1;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={3,1,0} ?WAIT4_END_GROUP;
IMAD R7, R4, R7, R4 ?trans1;
MOV R4, 0x1 ?WAIT5_END_GROUP;
I2F.F64 R6, R7 &wr=0x0 ?trans2;
MUFU.RCP64H R5, R7 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R4, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R8, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R8 &req={0} &wr=0x0 ?trans2;
FFMA R2, RZ, R7, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R2|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1e30 ?trans5;
MOV R8, R18 ?trans1;
MOV R9, R19 ?trans1;
MOV R2, 0x1e10 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1ec0 &req={4,2} ?trans5;
MOV R4, R12 ?trans1;
MOV R5, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR8, c[0x0][0x388] &wr=0x0 ?trans1;
F2I.U32.F64.TRUNC R5, R4 &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R2, R3, UR8, R0 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={3} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R12, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x26a0 ?trans1;
LOP3.LUT R21, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R13, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R4, R7, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R12, R21, PT ?trans1;
MOV R10, R8 ?trans1;
LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R11, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R18, RZ ?trans1;
MOV R4, R6 ?trans1;
MOV R20, R12 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R12, R11, PT ?trans1;
SEL R11, R13.reuse, 0x63400000, !P1 ?trans1;
MOV R14, 0x1 ?trans1;
@!P0 DMUL R4, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
@!P2 SEL R19, R13, 0x63400000, !P3 ?trans1;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?trans1;
MUFU.RCP64H R15, R5 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R21, R5, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R23, PT, PT, R21, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R19, R19, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R18 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R20, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R4, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x2550 &req={1,0} ?trans5;
LOP3.LUT R9, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R12.reuse, -R9.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R12, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R13, R13, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R13, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R16, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R12, R14, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2690 ?trans5;
DFMA R4, R14, -R4, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R5, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R7, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x2690 ?trans5;
IADD3 R5, PT, PT, -R16, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
DMUL.RP R8, R14, R8 &wr=0x0 ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R12, -R4, R14 &wr=0x0 ?trans2;
IADD3 R4, PT, PT, -R16, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R5|, R4, PT ?WAIT5_END_GROUP;
FSEL R12, R8, R12, !P0 ?trans1;
FSEL R13, R7, R13, !P0 ?trans1;
BRA 0x2690 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x2670 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x2640 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R20, R21, PT ?trans1;
MOV.64 R12, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x2690 ?trans5;
ISETP.NE.AND P0, PT, R20, 0x7ff00000, PT ?trans1;
LOP3.LUT R13, R9, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R21, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R4, R13, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R12, RZ ?trans1;
@P0 MOV R12, RZ ?WAIT3_END_GROUP;
@P0 MOV R13, R4 ?trans1;
BRA 0x2690 ?trans6;
LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R6 ?trans1;
BRA 0x2690 ?trans6;
LOP3.LUT R13, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R4, R2 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x26d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mean_filter_gpu(unsigned char*, int, int, unsigned char*, int)
_Z15mean_filter_gpuPhiiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x8
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v1
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_10
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s8, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshr_b32 s3, s2, 31
s_add_i32 s2, s2, s3
s_add_i32 s3, s4, -1
s_ashr_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v5, s2, v1
v_add_nc_u32_e32 v3, s2, v0
v_subrev_nc_u32_e32 v2, s2, v0
v_subrev_nc_u32_e32 v4, s2, v1
s_add_i32 s2, s5, -1
v_cmp_gt_i32_e32 vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_max_i32_e32 v8, 0, v2
v_max_i32_e32 v2, 0, v4
v_cndmask_b32_e32 v9, s3, v3, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s5, v5
s_mov_b32 s5, exec_lo
v_cndmask_b32_e32 v10, s2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmpx_ge_i32_e64 v9, v8
s_cbranch_execz .LBB0_9
s_load_b64 s[6:7], s[0:1], 0x0
v_mad_u64_u32 v[5:6], null, s4, v8, v[2:3]
v_cmp_ge_i32_e32 vcc_lo, v10, v2
v_dual_mov_b32 v12, v8 :: v_dual_add_nc_u32 v11, -1, v2
.LBB0_3:
s_and_saveexec_b32 s9, vcc_lo
s_cbranch_execz .LBB0_7
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v5
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, s2, s6, v5
v_mov_b32_e32 v13, v11
s_mov_b32 s10, 0
v_add_co_ci_u32_e64 v7, s2, s7, v7, s2
.LBB0_5:
global_load_u8 v14, v[6:7], off
v_add_nc_u32_e32 v13, 1, v13
v_add_co_u32 v6, s3, v6, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s3, 0, v7, s3
v_cmp_ge_i32_e64 s2, v13, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 s10, s2, s10
s_waitcnt vmcnt(0)
v_cvt_f64_u32_e32 v[14:15], v14
v_add_f64 v[3:4], v[3:4], v[14:15]
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB0_5
s_or_b32 exec_lo, exec_lo, s10
.LBB0_7:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v6, 1, v12
v_cmp_ge_i32_e64 s2, v12, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v12, v6 :: v_dual_add_nc_u32 v5, s4, v5
s_or_b32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s8
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_or_b32 exec_lo, exec_lo, s5
v_sub_nc_u32_e32 v2, v10, v2
v_sub_nc_u32_e32 v7, v9, v8
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 1, v2
v_mad_u64_u32 v[5:6], null, v2, v7, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[5:6], v5
v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[9:10], v[7:8]
s_waitcnt_depctr 0xfff
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
v_div_scale_f64 v[11:12], vcc_lo, v[3:4], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[13:14], v[11:12], v[9:10]
v_fma_f64 v[7:8], -v[7:8], v[13:14], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
v_div_fixup_f64 v[2:3], v[7:8], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_i32_f64_e32 v4, v[2:3]
v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
v_ashrrev_i32_e32 v1, 31, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b8 v[0:1], v4, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mean_filter_gpu | 11,517 | 2,567 | stackv2-00000-of-00015 |
// Demangled: calculation(int*, int*, int*, int, int)
Function : _Z11calculationPiS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculation(int*, int*, int*, int, int)
_Z11calculationPiS_S_ii:
s_endpgm
| calculation | 97 | 17 | stackv2-00000-of-00015 |
// Demangled: void reduce6<512u>(double*, double*, unsigned int)
Function : _Z7reduce6ILj512EEvPdS0_j
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
S2R R0, SR_CTAID.X &wr=0x4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans5;
LEA R2, R3, UR4, 0x3 &req={2} ?trans1;
IMAD.SHL.U32 R4, R0, 0x400, RZ &req={4} ?WAIT4_END_GROUP;
STS.64 [R2], RZ &rd=0x2 ?trans1;
LOP3.LUT R6, R4, R3, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, UR5, PT &req={1} ?WAIT13_END_GROUP;
@P0 BRA 0x240 &req={3,2,0} ?trans5;
LDC R14, c[0x0][0x370] &wr=0x0 ?trans1;
MOV.64 R4, RZ ?trans2;
BSSY.RECONVERGENT B1, 0x230 ?trans1;
MOV R15, R6 ?WAIT4_END_GROUP;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans3;
IADD3 R9, PT, PT, R15.reuse, 0x200, RZ ?trans1;
IMAD.WIDE.U32 R6, R15, 0x8, R12 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x8, R12 ?trans2;
LDG.E.64 R6, desc[UR6][R6.64] &wr=0x2 ?trans4;
LDG.E.64 R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD R15, R14, 0x400, R15 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R15, UR5, PT ?trans1;
DADD R10, R6, R8 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R10, R4 &req={0} &rd=0x2 &wr=0x3 ?trans2;
@!P0 BRA 0x140 &req={3,2} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
STS.64 [R2], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3.reuse, 0xff, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R3.reuse, 0x7f, PT ?trans1;
ISETP.NE.AND P2, PT, R3, RZ, PT ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0x6a0 ?trans8;
@!P0 LDS.64 R4, [R2+0x800] &req={0} ?trans4;
@!P0 LDS.64 R6, [R2] &wr=0x0 ?trans2;
@!P0 DADD R4, R4, R6 &req={0} &wr=0x0 ?trans2;
@!P0 STS.64 [R2], R4 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x3f, PT ?WAIT5_END_GROUP;
@!P1 LDS.64 R6, [R2+0x400] ?trans4;
@!P1 LDS.64 R8, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R6, R6, R8 &req={0} &wr=0x0 ?trans2;
@!P1 STS.64 [R2], R6 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1f, PT ?WAIT5_END_GROUP;
@!P0 LDS.64 R8, [R2+0x200] ?trans4;
@!P0 LDS.64 R10, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R8, R8, R10 &req={0} &wr=0x0 ?trans2;
@!P0 STS.64 [R2], R8 &req={0} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x690 ?trans5;
LDS.64 R4, [R2+0x100] ?trans4;
LDS.64 R6, [R2] &wr=0x1 ?trans2;
DADD R4, R4, R6 &req={1} &wr=0x1 ?trans2;
STS.64 [R2], R4 &req={1} ?trans4;
LDS.64 R6, [R2+0x80] ?trans4;
LDS.64 R8, [R2] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R8 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R6 &req={0} ?trans4;
LDS.64 R8, [R2+0x40] ?trans4;
LDS.64 R10, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R10 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R8 &req={0} ?trans4;
LDS.64 R10, [R2+0x20] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R10 &req={0} ?trans4;
LDS.64 R4, [R2+0x10] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R4 &req={0} ?trans4;
LDS.64 R6, [R2+0x8] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R6 &req={0} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 EXIT ?trans5;
LDS.64 R2, [UR4] &req={1,0} &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x710;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduce6<512u>(double*, double*, unsigned int)
_Z7reduce6ILj512EEvPdS0_j:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_mov_b32 s2, s15
v_lshl_add_u32 v5, v0, 3, 0
v_lshl_or_b32 v1, s2, 10, v0
s_mov_b32 s9, 0
v_mov_b32_e32 v3, v2
v_mov_b32_e32 v4, v2
s_mov_b32 s8, exec_lo
ds_store_b64 v5, v[3:4]
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_4
s_load_b32 s0, s[0:1], 0x18
v_mov_b32_e32 v3, 0
v_mov_b32_e32 v4, 0
s_waitcnt lgkmcnt(0)
s_lshl_b32 s0, s0, 10
.LBB0_2:
v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v6, 0x200, v1
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s0, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_add_co_u32 v8, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s3, v1
s_clause 0x1
global_load_b64 v[8:9], v[8:9], off
global_load_b64 v[6:7], v[6:7], off
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[6:7]
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s9
ds_store_b64 v5, v[3:4]
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 0x100, v0
s_cbranch_execz .LBB0_6
ds_load_b64 v[1:2], v5 offset:2048
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 0x80, v0
s_cbranch_execz .LBB0_8
ds_load_b64 v[1:2], v5 offset:1024
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 64, v0
s_cbranch_execz .LBB0_10
ds_load_b64 v[1:2], v5 offset:512
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB0_12
v_add_nc_u32_e32 v1, 0x100, v5
v_cmp_ne_u32_e64 s0, -1, v5
s_mov_b64 s[4:5], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v1
v_cndmask_b32_e64 v2, 0, s5, s0
v_cndmask_b32_e32 v3, 0, v1, vcc_lo
v_cndmask_b32_e64 v4, 0, s5, vcc_lo
v_cndmask_b32_e64 v1, 0, v5, s0
flat_load_b64 v[3:4], v[3:4] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 0x80, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 64, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 32, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 16, v5
v_add_nc_u32_e32 v5, 8, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_cndmask_b32_e64 v6, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[5:6], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[5:6]
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_14
v_mov_b32_e32 v2, 0
s_lshl_b64 s[0:1], s[2:3], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
ds_load_b64 v[0:1], v2
s_waitcnt lgkmcnt(0)
global_store_b64 v2, v[0:1], s[0:1]
.LBB0_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_reduce6_512u_ | 2,367 | 3,121 | stackv2-00000-of-00015 |
// Demangled: process_kernel2(float*, float*, int)
Function : _Z15process_kernel2PfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Z ?trans1;
S2R R0, SR_TID.Z &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x4 ?trans4;
S2UR UR7, SR_CTAID.Y &wr=0x4 ?trans1;
S2R R5, SR_TID.X &wr=0x5 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x5 ?trans1;
LDCU UR10, c[0x0][0x364] &wr=0x3 ?trans5;
S2UR UR8, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x368] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR6, UR7 &req={4} ?WAIT4_END_GROUP;
UIMAD UR4, UR4, UR5, UR8 &req={2} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans5;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR10, R3 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R0, UR9, R5 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 1.5048828125, 33.21875 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?trans1;
FSETP.GEU.AND P0, PT, R0, 1.175494350822287508e-38, PT &req={2} ?WAIT13_END_GROUP;
@!P0 FMUL R0, R0, 8388608 ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R0.reuse, -0x3f2aaaab, RZ ?trans1;
FSETP.NEU.AND P1, PT, R0, RZ, PT ?WAIT3_END_GROUP;
LOP3.LUT R7, R4, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R0, -R7.reuse, RZ ?trans2;
I2FP.F32.S32 R7, R7 ?WAIT3_END_GROUP;
FADD R6, R4, -1 ?trans1;
FSEL R4, RZ, -23, P0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f7fffff, PT ?trans2;
FFMA R9, R6.reuse, -R9, 0.14084610342979431152 ?trans2;
FFMA R4, R7, 1.1920928955078125e-07, R4 ?trans1;
MOV R7, 0x7f800000 ?trans1;
FFMA R9, R6, R9, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.5 ?WAIT4_END_GROUP;
FMUL R9, R6, R9 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, R6 ?WAIT4_END_GROUP;
FFMA R4, R4, 0.69314718246459960938, R9 ?trans1;
@P0 FFMA R4, R0, R7, +INF ?WAIT5_END_GROUP;
FSEL R5, R4, -INF , P1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x360;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: process_kernel2(float*, float*, int)
_Z15process_kernel2PfS_i:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x24
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s14
s_mul_i32 s2, s3, s2
s_and_b32 s3, s5, 0xffff
s_add_i32 s2, s2, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
v_bfe_u32 v1, v0, 10, 10
s_load_b32 s2, s[0:1], 0x10
s_lshr_b32 s3, s4, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
v_and_b32_e32 v2, 0x3ff, v0
s_and_b32 s3, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB1_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
v_mul_f32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_log_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x3f317217, v2
v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
v_fma_f32 v4, 0x3f317217, v2, -v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v4, v2, 0x3377d1cf, v4
v_add_f32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v2, v2, v3, s0
v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_sub_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| process_kernel2 | 1,546 | 1,222 | stackv2-00000-of-00015 |
// Demangled: process_kernel3(float*, float*, int)
Function : _Z15process_kernel3PfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Z ?trans1;
S2R R0, SR_TID.Z &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x4 ?trans4;
S2UR UR7, SR_CTAID.Y &wr=0x4 ?trans1;
S2R R5, SR_TID.X &wr=0x5 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x5 ?trans1;
LDCU UR10, c[0x0][0x364] &wr=0x3 ?trans5;
S2UR UR8, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x368] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR6, UR7 &req={4} ?WAIT4_END_GROUP;
UIMAD UR4, UR4, UR5, UR8 &req={2} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans5;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR10, R3 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R0, UR9, R5 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
IADD3 R4, PT, PT, R0, -0xd000000, RZ &req={2} ?trans1;
MUFU.RSQ R7, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x200 &req={0} ?trans5;
MOV R9, 0x1f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x290 &req={1} ?trans5;
BRA 0x240 ?trans5;
FMUL.FTZ R3, R0, R7 &req={1} ?trans1;
FMUL.FTZ R7, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R0 ?WAIT4_END_GROUP;
FFMA R7, R0, R7, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x3c0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x3c0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x3c0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R4, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R8, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R6, -R4, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R4, R6, R3 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R8, R4 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R7, R2 ?trans1;
MOV R2, R9 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: process_kernel3(float*, float*, int)
_Z15process_kernel3PfS_i:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x24
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s14
s_mul_i32 s2, s3, s2
s_and_b32 s3, s5, 0xffff
s_add_i32 s2, s2, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
v_bfe_u32 v1, v0, 10, 10
s_load_b32 s2, s[0:1], 0x10
s_lshr_b32 s3, s4, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
v_and_b32_e32 v2, 0x3ff, v0
s_and_b32 s3, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB2_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x4f800000, v2
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v4, -1, v3
v_add_nc_u32_e32 v5, 1, v3
v_fma_f32 v6, -v4, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v7, -v5, v3, v2
v_cmp_ge_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s0
v_cmp_lt_f32_e64 s0, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v3, v3, v5, s0
v_mul_f32_e32 v4, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v3, v3, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
v_cndmask_b32_e32 v2, v3, v2, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| process_kernel3 | 1,551 | 1,338 | stackv2-00000-of-00015 |
// Demangled: curfil::gpu::generate_uniform_kernel(curandStateXORWOW*, unsigned int*)
Function : _ZN6curfil3gpu23generate_uniform_kernelEP17curandStateXORWOWPj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x30, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R2.64+0x20] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x28] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R12, desc[UR4][R2.64+0x8] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R10, desc[UR4][R2.64+0x10] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x18] &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R18, -RZ, RZ, 0, 0 ?trans1;
MOV R14, RZ ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R0 ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R4, 0x161f14, RZ &req={2,1,0} ?WAIT7_END_GROUP;
SHF.R.U32.HI R20, RZ, 0x2, R5 ?trans1;
IMAD.SHL.U32 R22, R11, 0x10, RZ &req={5} ?trans1;
SHF.R.U32.HI R19, RZ, 0x2, R12 ?trans2;
LOP3.LUT R20, R20, R5, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R12, R19, R12, RZ, 0x3c, !PT ?trans2;
SHF.R.U32.HI R23, RZ, 0x2, R10 ?trans2;
IADD3 R5, PT, PT, R20, R20, RZ ?WAIT2_END_GROUP;
SHF.R.U32.HI R24, RZ, 0x2, R11 ?trans2;
IADD3 R25, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R18, PT, PT, R18, 0x8, RZ ?trans2;
LOP3.LUT R5, R11, R22, R5, 0x96, !PT ?trans2;
SHF.R.U32.HI R22, RZ, 0x2, R13 ?trans2;
LOP3.LUT R19, R5, R20, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
IADD3 R5, PT, PT, R12, R12, RZ ?trans2;
LOP3.LUT R22, R22, R13, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R20, R19, 0x10, RZ ?trans1;
LOP3.LUT R24, R24, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R19, R20, R5, 0x96, !PT ?trans1;
MOV R20, 0x2f800000 ?WAIT3_END_GROUP;
LOP3.LUT R13, R5, R12, RZ, 0x3c, !PT ?trans2;
IADD3 R5, PT, PT, R22, R22, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R12, R13, 0x10, RZ ?WAIT5_END_GROUP;
LOP3.LUT R21, R13, R12, R5, 0x96, !PT ?trans2;
LOP3.LUT R12, R23, R10, RZ, 0x3c, !PT ?trans2;
IADD3 R5, PT, PT, R16.reuse, -0x10974f, R19 ?trans2;
LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT ?trans2;
IADD3 R10, PT, PT, R16, -0xb0f8a, R13 ?trans2;
I2FP.F32.U32 R5, R5 ?WAIT2_END_GROUP;
I2FP.F32.U32 R23, R10 ?trans1;
IMAD.SHL.U32 R10, R21, 0x10, RZ ?trans1;
IADD3 R22, PT, PT, R12, R12, RZ ?trans1;
FFMA R5, R5, R20.reuse, 1.1641532182693481445e-10 ?trans2;
FFMA R23, R23, R20, 1.1641532182693481445e-10 ?trans1;
LOP3.LUT R11, R21, R10, R22, 0x96, !PT ?trans2;
FSETP.GT.AND P0, PT, R5, 0.5, PT ?trans1;
IADD3 R10, PT, PT, R16, -0x587c5, R21 ?trans2;
LOP3.LUT R5, R11, R12, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
I2FP.F32.U32 R11, R10 ?trans2;
IADD3 R12, PT, PT, R24, R24, RZ ?trans1;
IMAD.SHL.U32 R10, R5, 0x10, RZ ?trans1;
FSETP.GT.AND P1, PT, R23, 0.5, PT ?trans1;
SHF.R.U32.HI R22, RZ, 0x2, R19 ?trans1;
FFMA R11, R11, R20, 1.1641532182693481445e-10 ?trans2;
LOP3.LUT R23, R5.reuse, R10, R12, 0x96, !PT ?trans2;
IADD3 R10, PT, PT, R5, R16, RZ ?WAIT2_END_GROUP;
LOP3.LUT R22, R22, R19, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R12, R23, R24, RZ, 0x3c, !PT ?trans2;
@!P0 IADD3 R25, PT, PT, R14, RZ, RZ ?trans1;
FSETP.GT.AND P0, PT, R11, 0.5, PT ?trans1;
I2FP.F32.U32 R19, R10 ?trans1;
IMAD.SHL.U32 R11, R12, 0x10, RZ ?trans1;
IADD3 R10, PT, PT, R22, R22, RZ ?trans2;
SHF.R.U32.HI R14, RZ, 0x2, R13 ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R23, PT, PT, R25, 0x1, RZ ?WAIT2_END_GROUP;
LOP3.LUT R11, R12, R11, R10, 0x96, !PT ?trans2;
LOP3.LUT R14, R14, R13, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R13, R11, R22, RZ, 0x3c, !PT ?trans2;
@!P1 IADD3 R23, PT, PT, R25, RZ, RZ ?trans1;
FSETP.GT.AND P1, PT, R19, 0.5, PT ?trans1;
IADD3 R19, PT, PT, R16, 0x587c5, R12 ?trans1;
IMAD.SHL.U32 R10, R13, 0x10, RZ ?trans1;
IADD3 R11, PT, PT, R14, R14, RZ ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R16, 0xb0f8a, R13 ?trans2;
I2FP.F32.U32 R19, R19 ?trans2;
LOP3.LUT R11, R13, R10, R11, 0x96, !PT ?trans2;
SHF.R.U32.HI R10, RZ, 0x2, R21 ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R24, PT, PT, R23.reuse, 0x1, RZ ?trans2;
@!P0 IADD3 R24, PT, PT, R23, RZ, RZ ?WAIT2_END_GROUP;
LOP3.LUT R21, R10, R21, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R10, R11, R14, RZ, 0x3c, !PT ?trans2;
I2FP.F32.U32 R23, R22 ?trans1;
FSETP.GT.AND P0, PT, R19, 0.5, PT ?trans1;
IADD3 R19, PT, PT, R16, 0x10974f, R10 ?trans1;
IMAD.SHL.U32 R11, R10, 0x10, RZ ?trans1;
IADD3 R14, PT, PT, R21, R21, RZ ?trans1;
FFMA R23, R23, R20, 1.1641532182693481445e-10 ?trans1;
I2FP.F32.U32 R19, R19 ?WAIT2_END_GROUP;
IADD3 R25, PT, PT, R24.reuse, 0x1, RZ ?trans2;
@!P1 IADD3 R25, PT, PT, R24, RZ, RZ ?trans2;
LOP3.LUT R14, R10, R11, R14, 0x96, !PT ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
FSETP.GT.AND P1, PT, R23, 0.5, PT ?trans1;
IADD3 R22, PT, PT, R25.reuse, 0x1, RZ ?trans2;
LOP3.LUT R11, R14, R21, RZ, 0x3c, !PT ?trans2;
@!P0 IADD3 R22, PT, PT, R25, RZ, RZ ?trans1;
FSETP.GT.AND P0, PT, R19, 0.5, PT ?trans1;
IADD3 R14, PT, PT, R16, 0x161f14, R11 ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R16, 0x2c3e28, RZ ?trans2;
IADD3 R21, PT, PT, R22.reuse, 0x1, RZ ?trans2;
I2FP.F32.U32 R19, R14 ?trans2;
@!P1 IADD3 R21, PT, PT, R22, RZ, RZ ?WAIT3_END_GROUP;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R20, PT, PT, R21.reuse, 0x1, RZ ?trans2;
@!P0 IADD3 R20, PT, PT, R21, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R18, 0x2710, PT ?trans1;
FSETP.GT.AND P1, PT, R19, 0.5, PT ?trans2;
IADD3 R14, PT, PT, R20, 0x1, RZ ?WAIT11_END_GROUP;
@!P1 IADD3 R14, PT, PT, R20, RZ, RZ ?trans1;
@P0 BRA 0x120 ?trans6;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R4, -0x27f880b0, RZ ?trans1;
STG.E.64 desc[UR4][R2.64+0x8], R12 ?trans4;
STG.E.64 desc[UR4][R2.64+0x10], R10 ?trans4;
STG.E.64 desc[UR4][R2.64+0x18], R8 ?trans4;
STG.E.64 desc[UR4][R2.64+0x28], R6 ?trans1;
LEA R16, P0, R0, UR6, 0x2 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0x20], R15 ?trans1;
LEA.HI.X R17, R0, UR7, R17, 0x2, P0 ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R2.64], R4 ?trans4;
LDG.E R19, desc[UR4][R16.64] &wr=0x2 ?trans2;
IADD3 R19, PT, PT, R14, R19, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R16.64], R19 ?trans1;
EXIT ?trans5;
BRA 0x850;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: curfil::gpu::generate_uniform_kernel(hiprandState*, unsigned int*)
_ZN6curfil3gpu23generate_uniform_kernelEP12hiprandStatePj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v12, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, s15, s4, v[0:1]
v_mad_i64_i32 v[8:9], null, v10, 48, s[0:1]
v_ashrrev_i32_e32 v11, 31, v10
s_movk_i32 s0, 0x2710
s_clause 0x2
global_load_b32 v7, v[8:9], off
global_load_b128 v[0:3], v[8:9], off offset:24
global_load_b32 v13, v[8:9], off offset:40
s_waitcnt vmcnt(2)
v_add_nc_u32_e32 v14, 0x587c5, v7
.LBB1_1:
s_waitcnt vmcnt(1)
v_lshrrev_b32_e32 v4, 2, v0
s_waitcnt vmcnt(0)
v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v3, v13
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
s_cmp_eq_u32 s0, 0
v_xor_b32_e32 v0, v4, v0
v_lshlrev_b32_e32 v4, 4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v5, 1, v0
v_xor_b32_e32 v4, v4, v5
v_mov_b32_e32 v5, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor3_b32 v13, v4, v3, v0
v_mov_b32_e32 v4, v1
v_add_nc_u32_e32 v0, v14, v13
v_add_nc_u32_e32 v14, 0x587c5, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cvt_f32_u32_e32 v2, v0
v_mov_b32_e32 v0, v1
v_mov_b32_e32 v1, v5
v_dual_fmaak_f32 v15, 0x2f800000, v2, 0x2f800000 :: v_dual_mov_b32 v2, v6
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f32_e32 vcc_lo, 0.5, v15
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
s_cbranch_scc0 .LBB1_1
v_lshlrev_b64 v[0:1], 2, v[10:11]
v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v2, 0xd8077f50, v7
s_clause 0x2
global_store_b32 v[8:9], v2, off
global_store_b128 v[8:9], v[4:7], off offset:24
global_store_b32 v[8:9], v13, off offset:40
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v2, v12
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| curfil__gpu__generate_uniform_kernel | 3,959 | 1,178 | stackv2-00000-of-00015 |
// Demangled: curfil::gpu::setup_kernel(int, curandStateXORWOW*)
Function : _ZN6curfil3gpu12setup_kernelEiP17curandStateXORWOW
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R3, -RZ, RZ, -178.125, -3742 ?trans1;
BSSY.RECONVERGENT B0, 0xee0 ?trans5;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC R8, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x4 ?trans1;
ISETP.GT.AND P0, PT, R0.reuse, -0x1, PT &req={2} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
SEL R3, R3, 0x8bf16996, P0 ?trans1;
IMAD R0, R0, 0x4182bed5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
IADD3 R4, PT, PT, R3.reuse, 0x64f0c9, R0 ?trans2;
LOP3.LUT R10, R0, 0x159a55e5, RZ, 0x3c, !PT ?trans1;
IMAD R8, R8, UR6, R9 &req={1} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={4} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans1;
@!P0 BRA 0xed0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe60 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe50 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x300 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x290 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x250 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: curfil::gpu::setup_kernel(int, hiprandState*)
_ZN6curfil3gpu12setup_kernelEiP12hiprandState:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x1
s_load_b32 s4, s[2:3], 0x1c
s_load_b32 s5, s[2:3], 0x0
s_mov_b32 s6, 0x8a5d614f
v_bfe_u32 v2, v0, 10, 10
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_and_b32 s4, s4, 0xffff
s_xor_b32 s7, s5, 0x2c7f967f
s_cmp_gt_i32 s5, -1
s_mul_i32 s7, s7, 0x493c4aa1
s_cselect_b32 s6, s6, 0xfa091aa4
s_add_i32 s8, s7, 0x583f19
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_dual_mov_b32 v4, s8 :: v_dual_and_b32 v1, 0x3ff, v0
s_mul_i32 s0, s0, s1
v_bfe_u32 v0, v0, 20, 10
v_mul_u32_u24_e32 v2, s1, v2
v_mul_lo_u32 v3, s0, v1
s_add_i32 s0, s7, 0x75bcd15
s_xor_b32 s1, s7, 0x159a55e5
s_xor_b32 s5, s6, 0x5491333
v_mad_u64_u32 v[5:6], null, s15, s4, v[1:2]
s_add_i32 s4, s6, 0x1f123bb5
s_add_i32 s6, s7, s6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v2, v3, v2, v0
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_add_i32 s0, s6, 0x64f0c9
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v8, v2, 48
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
v_mov_b32_e32 v7, s0
s_mov_b32 s7, 0
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x8
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| curfil__gpu__setup_kernel | 7,960 | 3,111 | stackv2-00000-of-00015 |
// Demangled: prefix_scan_device(float*, float*, int)
Function : _Z18prefix_scan_devicePfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: prefix_scan_device(float*, float*, int)
_ZL18prefix_scan_devicePfS_i:
s_endpgm
| prefix_scan_device | 97 | 18 | stackv2-00000-of-00015 |
// Demangled: k_interpolate_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z17k_interpolate_gpuiiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R10, UR5, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R0, R0, R11, RZ ?trans2;
IMAD R3, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R7, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R2, R2, UR4, RZ &req={1} ?trans1;
ISETP.GT.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x180 &req={2} ?trans5;
LDC.64 R6, c[0x0][0x3b0] &wr=0x0 ?trans2;
IMAD.WIDE R4, R3, 0x4, R6 &req={0} ?trans1;
IADD3 R3, PT, PT, R2, R3, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x120 &req={1} ?trans5;
EXIT ?trans5;
LDCU UR4, c[0x0][0x384] &wr=0x0 ?trans1;
LOP3.LUT R4, R7.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R6, R10, R11, RZ ?trans1;
LOP3.LUT R8, R7.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR12, c[0x0][0x398] &wr=0x1 ?trans1;
LOP3.LUT R7, R7, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ?trans1;
IMAD R5, R10, UR4, RZ &req={0} ?WAIT12_END_GROUP;
LDC R10, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IABS R9, R6 ?trans1;
CS2R R26, SRZ &req={4,3,2} ?WAIT3_END_GROUP;
I2F.RP R16, R9 &wr=0x2 ?trans2;
MUFU.RCP R16, R16 &req={2} &wr=0x2 ?trans1;
IABS R11, R10 &req={0} ?WAIT4_END_GROUP;
I2F.RP R17, R11 &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R16, 0xffffffe, RZ &req={2} ?trans2;
IABS R16, R3 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x3 ?trans1;
MUFU.RCP R17, R17 &req={0} &wr=0x0 ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R18, PT, PT, RZ, -R13, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R19, R18, R9, RZ ?trans1;
IABS R18, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R13, R19, R12 ?trans1;
IADD3 R14, PT, PT, R17, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R13, PT, PT, RZ, -R18, RZ ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R15, R14 &rd=0x0 &wr=0x2 ?trans2;
MOV R14, RZ &req={0} ?trans1;
IADD3 R20, PT, PT, RZ, -R15, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R17, R20, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R15, R15, R17, R14 ?WAIT4_END_GROUP;
IMAD.HI.U32 R14, R12, R16, RZ ?WAIT4_END_GROUP;
IMAD R12, R14, R13, R16 ?trans2;
IMAD.HI.U32 R15, R15, R16, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R9, R12, PT ?trans2;
IADD3 R13, PT, PT, -R15, RZ, RZ ?WAIT5_END_GROUP;
IMAD R16, R11, R13, R16 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R11, R16, PT ?trans1;
@!P2 IADD3 R12, PT, PT, R12, -R9, RZ ?trans2;
@!P2 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P4, PT, R12, R9, PT ?trans1;
LOP3.LUT R9, R3, R6, RZ, 0x3c, !PT ?trans1;
LDC.64 R12, c[0x0][0x3b0] &wr=0x0 ?trans4;
ISETP.GE.AND P2, PT, R9, RZ, PT ?trans1;
@!P3 IADD3 R16, PT, PT, R16, -R11.reuse, RZ ?trans2;
@!P3 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
LDC R9, c[0x0][0x390] &wr=0x2 ?trans2;
ISETP.GE.U32.AND P1, PT, R16, R11, PT ?trans1;
LOP3.LUT R11, R3, R10, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P4 IADD3 R14, PT, PT, R14, 0x1, RZ ?trans1;
ISETP.NE.AND P4, PT, R6, RZ, PT ?trans2;
ISETP.GE.AND P3, PT, R11, RZ, PT ?trans1;
@!P2 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT6_END_GROUP;
@P1 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
IMAD.WIDE R12, R3, 0x4, R12 &req={0} ?trans1;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans2;
@!P4 LOP3.LUT R14, RZ, R6, RZ, 0x33, !PT ?trans2;
STG.E desc[UR6][R12.64], RZ &rd=0x0 ?trans1;
MOV R16, R15 ?trans1;
ISETP.GE.U32.AND P2, PT, R9, 0x8, PT &req={2} ?trans1;
IMAD R14, R5, R14, RZ ?WAIT3_END_GROUP;
@!P3 IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT3_END_GROUP;
@!P1 LOP3.LUT R16, RZ, R10, RZ, 0x33, !PT ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans2;
IADD3 R11, PT, PT, -R16.reuse, RZ, RZ ?trans1;
IMAD R16, R16, R9, RZ ?WAIT4_END_GROUP;
IMAD R11, R10, R11, R3 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans1;
@!P2 BRA 0xbf0 &req={0} ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R21, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R20, R16, 0x4, RZ ?trans1;
CS2R R26, SRZ ?trans1;
MOV R30, R8 ?WAIT3_END_GROUP;
IADD.64 R18, R20.reuse, UR8 &req={0} ?trans2;
IADD.64 R20, R20, UR10 ?trans2;
IADD.64 R18, R18, 0x10 ?trans2;
IADD.64 R20, R20, 0x10 ?WAIT8_END_GROUP;
LDG.E R24, desc[UR6][R18.64+-0x10] &req={2} &wr=0x2 ?trans2;
IMAD R24, R24, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R14, R24 ?WAIT5_END_GROUP;
LEA R22, P2, R24, UR12, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R23, R24, UR13, R25, 0x2, P2 ?trans2;
LDG.E R24, desc[UR6][R20.64+-0x10] &wr=0x2 ?trans4;
LDG.E R22, desc[UR6][R22.64] &wr=0x2 ?trans2;
FFMA R27, R24, R22, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R28, desc[UR6][R18.64+-0xc] &wr=0x2 ?trans2;
IMAD R28, R28, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R29, RZ, 0x1f, R28 ?WAIT5_END_GROUP;
IADD.64 R28, R14, R28 ?WAIT5_END_GROUP;
LEA R24, P2, R28, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R28, UR13, R29, 0x2, P2 ?trans2;
LDG.E R28, desc[UR6][R20.64+-0xc] &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x2 ?trans2;
FFMA R31, R28, R24, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R18.64+-0x8] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+-0x8] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans2;
FFMA R27, R22, R28, R31 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R18.64+-0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+-0x4] &wr=0x1 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x1 ?trans2;
FFMA R31, R22, R24, R27 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R18.64] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans2;
FFMA R27, R22, R28, R31 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R18.64+0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x1 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x1 ?trans2;
FFMA R31, R22, R24, R27 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x2 ?trans4;
LDG.E R22, desc[UR6][R18.64+0x8] &wr=0x3 ?trans2;
IMAD R22, R22, R10, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x3 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x3 ?trans2;
FFMA R33, R22, R28, R31 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R33 &rd=0x2 ?trans4;
LDG.E R22, desc[UR6][R18.64+0xc] &wr=0x3 ?trans2;
IMAD R22, R22, R10, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0xc] &rd=0x1 &wr=0x0 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x0 ?trans1;
IADD3 R30, PT, PT, R30, 0x8, RZ ?trans1;
IADD.64 R18, R18, 0x20 ?WAIT3_END_GROUP;
IADD3 R26, PT, PT, R26, 0x8, RZ ?trans1;
ISETP.NE.AND P2, PT, R30, RZ, PT ?trans1;
IADD.64 R20, R20, 0x20 &req={1} ?trans2;
FFMA R27, R22, R24, R33 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x2 ?trans5;
@P2 BRA 0x690 ?trans5;
@!P1 BRA 0x12a0 ?trans5;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
@!P0 BRA 0xf40 ?WAIT12_END_GROUP;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x3 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R25, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R24, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R24, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R20.64] &wr=0x4 ?trans1;
IADD.64 R24, R24, UR10 ?trans2;
IMAD R22, R22, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R18, P2, R22, UR4, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R19, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R18.64] &wr=0x3 ?trans2;
FFMA R27, R22, R18, R27 &req={3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0x4] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x2 ?trans2;
FFMA R31, R22, R28, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x3 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R18, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R19, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0x8] &wr=0x2 ?trans4;
LDG.E R18, desc[UR6][R18.64] &wr=0x2 ?trans2;
FFMA R33, R22, R18, R31 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R33 &rd=0x3 ?trans4;
LDG.E R22, desc[UR6][R20.64+0xc] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0xc] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans1;
IADD3 R26, PT, PT, R26, 0x4, RZ ?trans1;
FFMA R27, R22, R28, R33 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x3 ?trans2;
@!P1 BRA 0x12a0 ?trans5;
ISETP.NE.AND P1, PT, R7, 0x1, PT ?trans1;
LOP3.LUT P2, RZ, R9, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P1 BRA 0x1160 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x4 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R23, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R22, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R22, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R24, desc[UR6][R18.64] &wr=0x5 ?trans1;
IADD.64 R22, R22, UR10 ?trans2;
IMAD R24, R24, R10, R11 &req={5} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R14, R24 ?WAIT5_END_GROUP;
LEA R20, P1, R24, UR4, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R21, R24, UR5, R25, 0x2, P1 ?trans2;
LDG.E R24, desc[UR6][R22.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R20.64] &wr=0x4 ?trans2;
FFMA R9, R24, R20, R27 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R9 &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R18.64+0x4] &wr=0x4 ?trans2;
IMAD R24, R18, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R28, R14, R24 ?WAIT5_END_GROUP;
LEA R24, P1, R28, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R28, UR5, R29, 0x2, P1 ?trans2;
LDG.E R28, desc[UR6][R22.64+0x4] &wr=0x4 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x4 ?trans1;
IADD3 R26, PT, PT, R26, 0x2, RZ ?trans1;
FFMA R27, R28, R24, R9 &req={4,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans2;
@!P2 BRA 0x12a0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x4 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x5 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R17, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R16, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R16, UR8 &req={4} ?WAIT7_END_GROUP;
LDG.E R18, desc[UR6][R18.64] &wr=0x4 ?trans1;
IADD.64 R16, R16, UR10 ?WAIT7_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &req={2} &wr=0x2 ?trans1;
IMAD R10, R18, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?WAIT5_END_GROUP;
IADD.64 R10, R14, R10 ?WAIT5_END_GROUP;
LEA R14, P1, R10, UR4, 0x2 &req={5} ?WAIT4_END_GROUP;
LEA.HI.X R15, R10, UR5, R11, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R27, R16, R14, R27 &req={3,2,0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x4 ?trans2;
IADD3 R3, PT, PT, R2, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x220 ?trans5;
EXIT &req={1} ?trans5;
BRA 0x12e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_interpolate_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
_Z17k_interpolate_gpuiiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s21, s4, 0xffff
s_mul_i32 s4, s19, s18
v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB3_6
s_load_b32 s13, s[0:1], 0x10
s_load_b32 s3, s[2:3], 0x0
v_mov_b32_e32 v9, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s13, 0
s_mul_i32 s3, s3, s21
s_cselect_b32 s14, -1, 0
s_ashr_i32 s15, s4, 31
s_ashr_i32 s16, s18, 31
s_add_i32 s4, s4, s15
s_add_i32 s5, s18, s16
s_xor_b32 s19, s4, s15
s_xor_b32 s20, s5, s16
v_cvt_f32_u32_e32 v0, s19
v_cvt_f32_u32_e32 v2, s20
s_sub_i32 s2, 0, s19
s_sub_i32 s4, 0, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s2, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x18
s_mul_i32 s1, s18, s17
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v10, v0, v3
v_add_nc_u32_e32 v11, v2, v4
.LBB3_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s10, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s14
global_store_b32 v[3:4], v9, off
s_cbranch_vccnz .LBB3_5
v_add_nc_u32_e32 v0, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_mul_hi_u32 v5, v0, v10
v_mul_hi_u32 v6, v0, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v7, v5, s19
v_mul_lo_u32 v8, v6, s20
v_add_nc_u32_e32 v12, 1, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v7, v0, v7
v_sub_nc_u32_e32 v0, v0, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_subrev_nc_u32_e32 v13, s19, v7
v_cmp_le_u32_e32 vcc_lo, s19, v7
v_add_nc_u32_e32 v8, 1, v6
v_cmp_le_u32_e64 s0, s20, v0
v_cndmask_b32_e32 v5, v5, v12, vcc_lo
v_subrev_nc_u32_e32 v12, s20, v0
v_cndmask_b32_e32 v7, v7, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e64 v6, v6, v8, s0
v_xor_b32_e32 v13, s15, v2
v_add_nc_u32_e32 v8, 1, v5
v_cndmask_b32_e64 v0, v0, v12, s0
v_cmp_le_u32_e32 vcc_lo, s19, v7
v_add_nc_u32_e32 v12, 1, v6
v_xor_b32_e32 v2, s16, v2
s_mov_b32 s0, s13
v_cndmask_b32_e32 v5, v5, v8, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s20, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v5, v5, v13
v_cndmask_b32_e32 v0, v6, v12, vcc_lo
v_sub_nc_u32_e32 v5, v5, v13
v_mov_b32_e32 v13, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v0, v0, v2
v_mul_lo_u32 v5, s1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v0, v2
v_mul_lo_u32 v7, v0, s13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_mul_lo_u32 v0, v0, s18
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v8, 31, v7
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v5
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s8, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
.LBB3_4:
global_load_b32 v16, v[5:6], off
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s0, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[14:15], null, v16, s18, v[0:1]
v_ashrrev_i32_e32 v15, 31, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[14:15], 2, v[14:15]
v_add_co_u32 v14, vcc_lo, v2, v14
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v15, vcc_lo, v12, v15, vcc_lo
v_add_co_u32 v5, vcc_lo, v5, 4
global_load_b32 v16, v[7:8], off
global_load_b32 v14, v[14:15], off
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
v_add_co_u32 v7, vcc_lo, v7, 4
v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v13, v16, v14
global_store_b32 v[3:4], v13, off
s_cbranch_scc0 .LBB3_4
.LBB3_5:
v_add_nc_u32_e32 v1, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s2, vcc_lo, s2
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB3_2
.LBB3_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k_interpolate_gpu | 8,184 | 3,074 | stackv2-00000-of-00015 |
// Demangled: k_interpolate_grad_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z22k_interpolate_grad_gpuiiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x388] &wr=0x3 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R3, R6, UR6, R3 &req={1} ?WAIT5_END_GROUP;
IMAD R0, R7, UR4, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x390] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LOP3.LUT R5, R2.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R4, R7, UR5, RZ ?trans1;
LOP3.LUT R2, R2, 0x7, RZ, 0xc0, !PT ?trans1;
LDCU UR8, c[0x0][0x38c] &wr=0x1 ?trans1;
IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x3b0] &wr=0x3 ?trans1;
IMAD R6, R6, UR4, RZ &req={0} ?trans2;
IMAD R7, R7, UR8, RZ &req={1} ?WAIT7_END_GROUP;
LDC R8, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IABS R9, R4 &req={1} ?trans2;
IABS R19, R3 ?trans2;
I2F.RP R15, R9 &wr=0x1 ?trans2;
MUFU.RCP R15, R15 &req={1} &wr=0x1 ?trans1;
IABS R14, R8 &req={0} ?WAIT4_END_GROUP;
I2F.RP R16, R14 &wr=0x0 ?trans1;
IADD3 R10, PT, PT, R15, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &req={4} &rd=0x1 &wr=0x4 ?trans1;
MUFU.RCP R16, R16 &req={0} &wr=0x0 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R18, PT, PT, RZ, -R11, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R15, R18, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R11, R15, R10 ?trans1;
IADD3 R12, PT, PT, R16, 0xffffffe, RZ &req={0} ?trans2;
IABS R16, R4 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x0 &wr=0x1 ?trans2;
IADD3 R15, PT, PT, RZ, -R16, RZ ?trans1;
MOV R12, RZ &req={0} ?trans1;
IADD3 R17, PT, PT, RZ, -R13, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R17, R17, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R13, R17, R12 ?trans1;
MOV R13, R19 ?trans2;
LDC.64 R18, c[0x0][0x398] &wr=0x0 ?trans3;
IMAD.HI.U32 R10, R10, R13, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R12, R13, RZ ?WAIT4_END_GROUP;
IMAD R12, R10, R15, R13 ?trans1;
IADD3 R15, PT, PT, -R11, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, R12, PT ?trans1;
IMAD R13, R14, R15, R13 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R13, PT ?trans1;
IMAD.WIDE R18, R3, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, -R9, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P3, PT, R12, R9, PT ?trans1;
LOP3.LUT R9, R3, R4, RZ, 0x3c, !PT ?trans2;
@!P2 IADD3 R13, PT, PT, R13, -R14, RZ ?trans2;
LOP3.LUT R12, R3, R8, RZ, 0x3c, !PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?trans1;
@!P2 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R13, R14, PT ?trans1;
ISETP.GE.AND P2, PT, R12, RZ, PT ?WAIT3_END_GROUP;
@P3 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R4, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT3_END_GROUP;
@P0 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT3_END_GROUP;
@!P2 IADD3 R11, PT, PT, -R11, RZ, RZ ?trans2;
@!P3 LOP3.LUT R10, RZ, R4, RZ, 0x33, !PT ?trans1;
ISETP.GE.U32.AND P1, PT, R9, 0x8, PT &req={0} ?WAIT4_END_GROUP;
IMAD R12, R7, R10, RZ ?trans2;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
@!P0 LOP3.LUT R11, RZ, R8, RZ, 0x33, !PT ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?trans2;
IADD3 R15, PT, PT, -R11.reuse, RZ, RZ ?trans1;
IMAD R14, R11, R9, RZ ?WAIT4_END_GROUP;
IMAD R11, R8, R15, R3 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
@!P1 BRA 0xb40 ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R17, R14.reuse, 0x2, R15 ?trans1;
IMAD.SHL.U32 R16, R14, 0x4, RZ ?trans1;
MOV R10, RZ ?trans1;
MOV R28, R5 ?WAIT3_END_GROUP;
IADD.64 R20, R16.reuse, UR10 &req={0} ?trans2;
IADD.64 R16, R16, UR8 ?trans2;
IADD.64 R20, R20, 0x10 ?trans2;
IADD.64 R16, R16, 0x10 ?WAIT8_END_GROUP;
LDG.E R22, desc[UR6][R16.64+-0x10] &req={2} &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R20.64+-0x10] &req={0} &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R24, R25 &req={4} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0xc] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+-0xc] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64+-0x8] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+-0x4] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+0x4] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64+0x8] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+0xc] &rd=0x2 &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R20.64+0xc] &rd=0x4 &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x5 ?trans1;
IADD3 R28, PT, PT, R28, 0x8, RZ ?trans1;
IADD.64 R16, R16, 0x20 &req={2} ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R10, 0x8, RZ ?trans1;
IADD.64 R20, R20, 0x20 &req={4} ?trans2;
IMAD R22, R22, R8, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={5} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?trans1;
ISETP.NE.AND P1, PT, R28, RZ, PT ?WAIT4_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x0 ?trans9;
@P1 BRA 0x5e0 ?trans5;
@!P0 BRA 0x1220 ?trans5;
IADD3 R16, PT, PT, R2, -0x1, RZ ?trans2;
LOP3.LUT P0, R28, R9, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R16, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xeb0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R27, desc[UR6][R18.64] &req={2,0} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R17, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R16, UR8 &req={1} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R20.64] &wr=0x4 ?trans1;
IADD.64 R16, R16, UR10 ?WAIT6_END_GROUP;
LDG.E R26, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD R22, R22, R8, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR4, 0x2 &req={0} ?trans1;
FMUL R29, R26, R27 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R16.64+0x4] &wr=0x4 ?trans4;
LDG.E R31, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR4, 0x2 ?trans1;
FMUL R31, R30, R31 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R16.64+0x8] &req={0} &wr=0x4 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR4, 0x2 ?trans1;
FMUL R29, R29, R30 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &rd=0x4 ?trans4;
LDG.E R22, desc[UR6][R20.64+0xc] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R16.64+0xc] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x5 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR4, 0x2 ?trans1;
FMUL R31, R30, R31 &req={5} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R31 &rd=0x4 ?trans1;
IADD3 R10, PT, PT, R10, 0x4, RZ ?WAIT7_END_GROUP;
@!P0 BRA 0x1220 ?trans5;
ISETP.NE.AND P0, PT, R28, 0x1, PT ?trans1;
LOP3.LUT R9, R9, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R9, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x10e0 ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R26, desc[UR6][R18.64] &req={4,2,0} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R21, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R20, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R16, R20, UR8 &req={1} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R16.64] &wr=0x4 ?trans1;
IADD.64 R20, R20, UR10 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R20.64] &wr=0x2 ?trans1;
IMAD R22, R22, R8, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P0, R22, UR4, 0x2 &req={0} ?trans1;
FMUL R9, R9, R26 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R9 &rd=0x1 ?trans4;
LDG.E R16, desc[UR6][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R20.64+0x4] &wr=0x4 ?trans4;
LDG.E R29, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R16, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P0, R22, UR4, 0x2 ?trans1;
FMUL R29, R28, R29 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x1 ?trans1;
IADD3 R10, PT, PT, R10, 0x2, RZ ?WAIT7_END_GROUP;
@P1 BRA 0x1220 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x5 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R19, desc[UR6][R18.64] &req={2} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R15, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R14, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R16, R14, UR8 &req={5} ?WAIT7_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &wr=0x5 ?trans1;
IADD.64 R14, R14, UR10 ?WAIT7_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
IMAD R8, R16, R8, R11 &req={5} ?WAIT5_END_GROUP;
SHF.R.S32.HI R9, RZ, 0x1f, R8 &req={1} ?WAIT5_END_GROUP;
IADD.64 R8, R12, R8 ?WAIT5_END_GROUP;
LEA R10, P0, R8, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, UR5, R9, 0x2, P0 ?trans1;
FMUL R9, R14, R19 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R10.64], R9 &rd=0x0 ?trans3;
IADD3 R3, PT, PT, R6, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x180 ?trans5;
EXIT &req={3,2} ?trans5;
BRA 0x1260;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_interpolate_grad_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
_Z22k_interpolate_grad_gpuiiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s21, s4, 0xffff
s_mul_i32 s4, s18, s17
v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB4_8
s_load_b32 s13, s[0:1], 0x10
s_load_b32 s3, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s13, 0
s_mul_i32 s3, s3, s21
s_cselect_b32 s14, -1, 0
s_ashr_i32 s15, s4, 31
s_ashr_i32 s16, s18, 31
s_add_i32 s4, s4, s15
s_add_i32 s5, s18, s16
s_xor_b32 s17, s4, s15
s_xor_b32 s20, s5, s16
v_cvt_f32_u32_e32 v0, s17
v_cvt_f32_u32_e32 v2, s20
s_sub_i32 s2, 0, s17
s_sub_i32 s4, 0, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s2, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x18
s_mul_i32 s2, s19, s18
s_mov_b32 s1, 0
s_mov_b32 s19, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v8, v0, v3
v_add_nc_u32_e32 v9, v2, v4
.LBB4_2:
s_and_not1_b32 vcc_lo, exec_lo, s14
s_cbranch_vccnz .LBB4_7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v2
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v8
v_mul_hi_u32 v4, v0, v9
v_mul_lo_u32 v5, v3, s17
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v6, v4, s20
v_add_nc_u32_e32 v7, 1, v3
v_sub_nc_u32_e32 v5, v0, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v0, v0, v6
v_subrev_nc_u32_e32 v10, s17, v5
v_cmp_le_u32_e32 vcc_lo, s17, v5
v_add_nc_u32_e32 v6, 1, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_le_u32_e64 s0, s20, v0
v_cndmask_b32_e32 v5, v5, v10, vcc_lo
v_cndmask_b32_e32 v3, v3, v7, vcc_lo
v_subrev_nc_u32_e32 v7, s20, v0
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e64 v4, v4, v6, s0
v_xor_b32_e32 v10, s15, v2
v_cmp_le_u32_e32 vcc_lo, s17, v5
v_add_nc_u32_e32 v6, 1, v3
v_cndmask_b32_e64 v0, v0, v7, s0
v_add_nc_u32_e32 v7, 1, v4
v_xor_b32_e32 v5, s16, v2
s_mov_b32 s0, 0
v_cndmask_b32_e32 v3, v3, v6, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s20, v0
v_cndmask_b32_e32 v0, v4, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v3, v10
v_xor_b32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v3, v10
v_lshlrev_b64 v[10:11], 2, v[1:2]
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mul_lo_u32 v5, v0, s13
v_mul_lo_u32 v0, v0, s18
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[12:13], 2, v[3:4]
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_add_co_u32 v10, vcc_lo, s10, v12
v_add_co_ci_u32_e32 v11, vcc_lo, s11, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v12, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v14, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v15, vcc_lo, s9, v5, vcc_lo
.LBB4_4:
s_lshl_b64 s[22:23], s[0:1], 2
s_mov_b32 s21, 0
v_add_co_u32 v4, vcc_lo, v12, s22
v_add_co_ci_u32_e32 v5, vcc_lo, s23, v13, vcc_lo
global_load_b32 v6, v[4:5], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[4:5], null, v6, s18, v[0:1]
v_add_co_u32 v6, vcc_lo, v14, s22
v_add_co_ci_u32_e32 v7, vcc_lo, s23, v15, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
global_load_b32 v6, v[6:7], off
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, v10, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
global_load_b32 v16, v[2:3], off
global_load_b32 v7, v[4:5], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v16, v6, v16
.LBB4_5:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v6, v7, v16
global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v6, v7
v_mov_b32_e32 v7, v6
s_or_b32 s21, vcc_lo, s21
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s21
s_cbranch_execnz .LBB4_5
s_or_b32 exec_lo, exec_lo, s21
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, s13
s_cbranch_scc0 .LBB4_4
.LBB4_7:
v_add_nc_u32_e32 v1, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s19, vcc_lo, s19
s_and_not1_b32 exec_lo, exec_lo, s19
s_cbranch_execnz .LBB4_2
.LBB4_8:
s_endpgm
| k_interpolate_grad_gpu | 8,182 | 3,214 | stackv2-00000-of-00015 |
// Demangled: three_interpolate_gpu(int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z21three_interpolate_gpuiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R25, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R24, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R8, UR5, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R0, R0, R9, RZ ?trans2;
IMAD R25, R24, UR4, R25 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R25, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IMAD R18, R8.reuse, R9, RZ ?trans1;
LDC R20, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x384] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
LOP3.LUT R22, RZ, R8, RZ, 0x33, !PT ?trans2;
IABS R19, R18 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans2;
LDC.64 R6, c[0x0][0x398] &wr=0x3 ?trans1;
I2F.RP R9, R19 &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R23, R8, UR5, RZ &req={1} ?trans1;
MUFU.RCP R9, R9 &req={4} &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x3a8] &wr=0x4 ?trans1;
IMAD R24, R24, UR4, RZ &req={2} ?trans1;
IADD3 R10, PT, PT, R9, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R10, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R12, PT, PT, RZ, -R11, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R12, R19, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R21, R11, R21, R10 &req={3,0} ?WAIT7_END_GROUP;
IABS R11, R20 ?trans2;
IABS R12, R25 ?trans2;
I2F.RP R10, R11 &req={0} &wr=0x0 ?trans2;
MUFU.RCP R10, R10 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IADD3 R14, PT, PT, RZ, -R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R14, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R13, R8 ?trans1;
LOP3.LUT R8, R25, R20, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R9, R12, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R11, R10, R12 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R11, R10, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R10, PT, PT, R10, -R11.reuse, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R10, R11, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
SEL R13, R22, R9, !P0 ?WAIT5_END_GROUP;
IMAD R27, R13, 0x3, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R8, R27, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR6][R8.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R8.64+0x8] &rd=0x0 &wr=0x5 ?trans1;
IABS R10, R18 ?WAIT4_END_GROUP;
IADD3 R29, PT, PT, RZ, -R10, RZ ?trans1;
IMAD.HI.U32 R10, R21, R12, RZ ?trans1;
LOP3.LUT R8, R25, R18, RZ, 0x3c, !PT &req={0} ?WAIT3_END_GROUP;
IMAD R12, R10, R29, R12 ?trans1;
IABS R29, R18 ?trans2;
IADD3 R9, PT, PT, -R13, RZ, RZ ?trans2;
ISETP.GT.U32.AND P1, PT, R19, R12, PT ?WAIT3_END_GROUP;
IMAD R9, R20, R9, R25 ?WAIT10_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, -R29, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R12, R19, PT ?WAIT13_END_GROUP;
@P2 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R18, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT10_END_GROUP;
@!P2 LOP3.LUT R10, RZ, R18, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R14, R23, R10, RZ ?trans2;
IMAD R8, R15, R20, R9 &req={2} ?WAIT3_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
IMAD R10, R11, R20.reuse, R9.reuse &req={3} ?trans2;
IMAD R16, R17, R20, R9 &req={5} ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans2;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?trans2;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans1;
IADD.64 R8, R14.reuse, R8 ?trans2;
IADD.64 R10, R14, R10 ?WAIT2_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT3_END_GROUP;
LEA R12, P2, R8, UR8, 0x2 ?trans2;
LEA R14, P1, R10, UR8, 0x2 ?trans2;
LEA.HI.X R13, R8, UR9, R9, 0x2, P2 ?trans1;
IMAD.WIDE R8, R27, 0x4, R4 ?trans1;
LEA.HI.X R15, R10, UR9, R11, 0x2, P1 ?trans2;
LEA R10, P1, R16.reuse, UR8, 0x2 ?trans2;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R26, desc[UR6][R8.64+0x4] &wr=0x2 ?trans1;
LEA.HI.X R11, R16, UR9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R15, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R27, desc[UR6][R8.64+0x8] &wr=0x5 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans1;
FMUL R17, R26, R13 &req={2} ?WAIT4_END_GROUP;
FFMA R26, R16, R15, R17 &req={3} ?trans1;
IMAD.WIDE R16, R25, 0x4, R2 &req={4} ?trans1;
IADD3 R25, PT, PT, R24, R25, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R25, R0, PT ?trans1;
FFMA R27, R27, R10, R26 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R27 &rd=0x0 ?trans7;
@!P1 BRA 0x210 ?trans5;
EXIT ?trans5;
BRA 0x6e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_interpolate_gpu(int, int, int, int, float const*, int const*, float const*, float*)
_Z21three_interpolate_gpuiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s20, s4, 0xffff
s_mul_i32 s4, s19, s18
v_mad_u64_u32 v[1:2], null, s15, s20, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB1_3
s_ashr_i32 s13, s4, 31
s_ashr_i32 s14, s18, 31
s_add_i32 s4, s4, s13
s_add_i32 s5, s18, s14
s_xor_b32 s15, s4, s13
s_xor_b32 s16, s5, s14
v_cvt_f32_u32_e32 v0, s15
v_cvt_f32_u32_e32 v2, s16
s_load_b32 s2, s[2:3], 0x0
s_sub_i32 s3, 0, s15
s_sub_i32 s4, 0, s16
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s3, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x10
s_mul_i32 s1, s18, s17
s_mov_b32 s3, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
.LBB1_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v1, v2
v_xor_b32_e32 v11, s14, v2
v_xor_b32_e32 v9, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v9, v3
v_mul_hi_u32 v10, v9, v0
v_mul_lo_u32 v5, v4, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v13, v10, s15
v_sub_nc_u32_e32 v5, v9, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v9, v9, v13
v_add_nc_u32_e32 v13, 1, v10
v_subrev_nc_u32_e32 v7, s16, v5
v_cmp_le_u32_e32 vcc_lo, s16, v5
v_add_nc_u32_e32 v6, 1, v4
v_subrev_nc_u32_e32 v14, s15, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
v_cmp_le_u32_e32 vcc_lo, s16, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, 1, v4
v_cndmask_b32_e32 v4, v4, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v12, v4, v11
v_sub_nc_u32_e32 v4, v12, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v4, v4, 1, v4
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v8, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s15, v9
global_load_b96 v[4:6], v[4:5], off
v_dual_cndmask_b32 v10, v10, v13 :: v_dual_cndmask_b32 v9, v9, v14
v_xor_b32_e32 v14, s13, v2
v_add_nc_u32_e32 v13, 1, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s15, v9
v_cndmask_b32_e32 v9, v10, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v9, v9, v14
v_sub_nc_u32_e32 v9, v9, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v9, s1, v9
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, v5, v11
v_add_nc_u32_e32 v4, v4, v11
v_add_nc_u32_e32 v6, v6, v11
v_sub_nc_u32_e32 v13, v5, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v14, v4, v12
v_mad_u64_u32 v[4:5], null, s18, v13, v[1:2]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v5, v6, v12
v_mad_u64_u32 v[11:12], null, s18, v14, v[1:2]
v_add_co_u32 v6, vcc_lo, s8, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[13:14], null, s18, v5, v[1:2]
v_ashrrev_i32_e32 v5, 31, v4
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v8, vcc_lo
v_ashrrev_i32_e32 v12, 31, v11
v_add_co_u32 v15, vcc_lo, s4, v9
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[8:9], 2, v[11:12]
v_ashrrev_i32_e32 v14, 31, v13
v_add_co_u32 v10, vcc_lo, v15, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v11, vcc_lo, v16, v5, vcc_lo
v_add_co_u32 v8, vcc_lo, v15, v8
s_delay_alu instid0(VALU_DEP_4)
v_lshlrev_b64 v[12:13], 2, v[13:14]
v_add_co_ci_u32_e32 v9, vcc_lo, v16, v9, vcc_lo
global_load_b96 v[4:6], v[6:7], off
s_clause 0x1
global_load_b32 v10, v[10:11], off
global_load_b32 v9, v[8:9], off
v_add_co_u32 v7, vcc_lo, v15, v12
v_add_co_ci_u32_e32 v8, vcc_lo, v16, v13, vcc_lo
global_load_b32 v11, v[7:8], off
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s3, vcc_lo, s3
s_waitcnt vmcnt(2)
v_mul_f32_e32 v10, v5, v10
s_waitcnt vmcnt(1)
v_fmac_f32_e32 v10, v4, v9
v_add_co_u32 v4, s0, s10, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s11, v8, s0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v10, v6, v11
global_store_b32 v[4:5], v10, off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| three_interpolate_gpu | 2,934 | 3,359 | stackv2-00000-of-00015 |
// Demangled: three_interpolate_grad_gpu(int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z26three_interpolate_grad_gpuiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R27, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R26, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R24, c[0x0][0x388] &wr=0x3 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R27, R26, UR6, R27 &req={1} ?WAIT5_END_GROUP;
IMAD R0, R24, UR4, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IMAD R20, R24.reuse, UR5, RZ ?trans1;
LDC R22, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R24.reuse, RZ, PT ?trans1;
LOP3.LUT R25, RZ, R24, RZ, 0x33, !PT ?trans2;
IABS R21, R20 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans2;
LDC.64 R6, c[0x0][0x3a0] &wr=0x3 ?trans1;
I2F.RP R10, R21 &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R24, R24, UR5, RZ &req={1} ?trans1;
MUFU.RCP R10, R10 &req={4} &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x398] &wr=0x4 ?trans1;
IMAD R26, R26, UR4, RZ &req={2} ?trans1;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R10, PT, PT, RZ, -R9, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R23, R10, R21, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R23, R9, R23, R8 &req={3,0} ?WAIT7_END_GROUP;
IABS R11, R22 ?trans2;
IABS R14, R27 ?trans2;
I2F.RP R10, R11 &req={0} &wr=0x0 ?trans2;
MUFU.RCP R10, R10 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IADD3 R12, PT, PT, RZ, -R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R12, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R13, R8 ?trans1;
LOP3.LUT R8, R27, R22, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R9, R14, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R11, R10, R14 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R11, R10, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R10, PT, PT, R10, -R11.reuse, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R10, R11, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R25, R9, !P0 ?WAIT5_END_GROUP;
IMAD R13, R17, 0x3, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R8, R13, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R27, 0x4, R4 ?trans1;
IABS R15, R20.reuse ?trans2;
IABS R19, R20 ?trans1;
IMAD.WIDE R12, R13, 0x4, R6 ?trans1;
LDG.E R28, desc[UR6][R10.64] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R12.64] &wr=0x3 ?trans1;
IADD3 R18, PT, PT, RZ, -R15, RZ ?trans1;
IMAD.HI.U32 R15, R23, R14, RZ ?trans1;
IADD3 R29, PT, PT, -R17, RZ, RZ ?trans1;
LDG.E R30, desc[UR6][R8.64+0x4] &wr=0x4 ?trans2;
IMAD R14, R15, R18, R14 ?WAIT2_END_GROUP;
IMAD R29, R22, R29, R27 ?trans1;
LDG.E R32, desc[UR6][R8.64+0x8] &wr=0x5 ?trans2;
ISETP.GT.U32.AND P1, PT, R21, R14, PT ?trans2;
LDG.E R33, desc[UR6][R12.64+0x4] &wr=0x4 ?trans11;
@!P1 IADD3 R14, PT, PT, R14, -R19, RZ ?WAIT2_END_GROUP;
@!P1 IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R14, R21, PT ?trans1;
LOP3.LUT R14, R27, R20, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@P2 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R20, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R15, PT, PT, -R15, RZ, RZ ?WAIT8_END_GROUP;
@!P2 LOP3.LUT R15, RZ, R20, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R14, R24, R15, RZ ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
IMAD R16, R16, R22, R29 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16.reuse, UR8, 0x2 ?trans1;
FMUL R35, R31, R28 &req={3} ?trans2;
LDG.E R28, desc[UR6][R12.64+0x8] &wr=0x2 ?trans1;
LEA.HI.X R19, R16, UR9, R17, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R18.64], R35 &rd=0x0 ?trans4;
LDG.E R34, desc[UR6][R10.64] &wr=0x3 ?trans1;
IMAD R16, R30, R22, R29 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
LEA R30, P1, R16, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R31, R16, UR9, R17, 0x2, P1 ?trans1;
IMAD R32, R32, R22, R29 &req={5} ?trans2;
FMUL R17, R33, R34 &req={3} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R30.64], R17 &rd=0x0 ?trans4;
LDG.E R37, desc[UR6][R10.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R33, RZ, 0x1f, R32 ?WAIT5_END_GROUP;
IADD.64 R14, R14, R32 ?WAIT3_END_GROUP;
IADD3 R27, PT, PT, R26, R27, RZ ?trans2;
LEA R8, P1, R14, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R14, UR9, R15, 0x2, P1 ?trans1;
ISETP.GE.AND P1, PT, R27, R0, PT ?trans1;
FMUL R37, R28, R37 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R8.64], R37 &rd=0x0 ?trans7;
@!P1 BRA 0x210 ?trans5;
EXIT ?trans5;
BRA 0x700;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_interpolate_grad_gpu(int, int, int, int, float const*, int const*, float const*, float*)
_Z26three_interpolate_grad_gpuiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[8:11], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s4, 0xffff
s_mul_i32 s4, s10, s9
v_mad_u64_u32 v[6:7], null, s15, s16, v[0:1]
s_mul_i32 s8, s4, s8
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s8, v6
s_cbranch_execz .LBB2_9
s_ashr_i32 s9, s4, 31
s_ashr_i32 s12, s10, 31
s_add_i32 s4, s4, s9
s_add_i32 s5, s10, s12
s_xor_b32 s13, s4, s9
s_xor_b32 s14, s5, s12
v_cvt_f32_u32_e32 v0, s13
v_cvt_f32_u32_e32 v1, s14
s_load_b32 s15, s[2:3], 0x0
s_sub_i32 s2, 0, s13
s_sub_i32 s3, 0, s14
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v1, v1
s_mul_i32 s11, s11, s10
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v1, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s15, s15, s16
s_mov_b32 s16, 0
v_mul_lo_u32 v2, s2, v0
v_mul_lo_u32 v3, s3, v1
s_load_b256 s[0:7], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v2, v0, v2
v_mul_hi_u32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v14, v0, v2
v_add_nc_u32_e32 v15, v1, v3
.LBB2_2:
v_ashrrev_i32_e32 v7, 31, v6
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v6, v7
v_xor_b32_e32 v5, v0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v0, v5, v15
v_mul_hi_u32 v9, v5, v14
v_mul_lo_u32 v1, v0, s14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v10, v9, s13
v_sub_nc_u32_e32 v1, v5, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v5, v5, v10
v_add_nc_u32_e32 v10, 1, v9
v_subrev_nc_u32_e32 v3, s14, v1
v_cmp_le_u32_e32 vcc_lo, s14, v1
v_add_nc_u32_e32 v2, 1, v0
v_subrev_nc_u32_e32 v11, s13, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
v_xor_b32_e32 v3, s12, v7
v_cmp_le_u32_e32 vcc_lo, s14, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 1, v0
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v3
v_sub_nc_u32_e32 v8, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, v8, 1, v8
v_mul_lo_u32 v8, v8, s10
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s13, v5
global_load_b96 v[0:2], v[0:1], off
v_cndmask_b32_e32 v9, v9, v10, vcc_lo
v_cndmask_b32_e32 v5, v5, v11, vcc_lo
v_xor_b32_e32 v11, s9, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v10, 1, v9
v_cmp_le_u32_e32 vcc_lo, s13, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v5, v9, v10, vcc_lo
v_sub_nc_u32_e32 v9, v6, v8
v_lshlrev_b64 v[7:8], 2, v[6:7]
v_xor_b32_e32 v5, v5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s0, v7
v_sub_nc_u32_e32 v5, v5, v11
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_mul_lo_u32 v10, s11, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b96 v[3:5], v[3:4], off
v_ashrrev_i32_e32 v11, 31, v10
s_waitcnt vmcnt(1)
v_mad_u64_u32 v[12:13], null, v0, s10, v[9:10]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[10:11]
v_add_co_u32 v16, vcc_lo, s6, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v13, 31, v12
v_add_co_ci_u32_e32 v17, vcc_lo, s7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v10, vcc_lo, v16, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, v17, v13, vcc_lo
global_load_b32 v0, v[7:8], off
global_load_b32 v13, v[10:11], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v0, v3, v0
.LBB2_3:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v12, v13, v0
global_atomic_cmpswap_b32 v3, v[10:11], v[12:13], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v3, v13
v_mov_b32_e32 v13, v3
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_3
s_or_b32 exec_lo, exec_lo, s17
v_mad_u64_u32 v[10:11], null, v1, s10, v[9:10]
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[0:1], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v17, v1, vcc_lo
global_load_b32 v3, v[7:8], off
global_load_b32 v11, v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v3, v4, v3
.LBB2_5:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v10, v11, v3
global_atomic_cmpswap_b32 v4, v[0:1], v[10:11], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v4, v11
v_mov_b32_e32 v11, v4
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_5
s_or_b32 exec_lo, exec_lo, s17
v_mad_u64_u32 v[0:1], null, v2, s10, v[9:10]
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v17, v1, vcc_lo
global_load_b32 v2, v[7:8], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v5, v2
.LBB2_7:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_7
s_or_b32 exec_lo, exec_lo, s17
v_add_nc_u32_e32 v6, s15, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s8, v6
s_or_b32 s16, vcc_lo, s16
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB2_2
.LBB2_9:
s_endpgm
| three_interpolate_grad_gpu | 3,057 | 3,877 | stackv2-00000-of-00015 |
// Demangled: three_nn_gpu(int, int, int, float const*, float const*, float*, int*)
Function : _Z12three_nn_gpuiiiPKfS0_PfPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R27, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R26, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R27, R26, UR6, R27 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R24, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x3a0] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x3a8] &wr=0x4 ?trans1;
IMAD R26, R26, UR5, RZ &req={1} ?trans1;
ISETP.GT.AND P0, PT, R24, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1f0 &req={3,2} ?trans5;
IMAD R5, R27, 0x3, RZ &req={0} ?trans1;
MOV R11, 0x7f800000 ?trans1;
IADD3 R27, PT, PT, R26, R27, RZ ?trans2;
IMAD.WIDE R2, R5, 0x4, R6 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?trans1;
IMAD.WIDE R4, R5, 0x4, R8 &req={4} ?trans1;
STG.E desc[UR6][R2.64], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x4], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x8], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64], RZ &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64+0x4], RZ &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64+0x8], RZ &rd=0x0 ?trans1;
@!P0 BRA 0x110 ?trans5;
EXIT ?trans5;
LOP3.LUT R31, R24.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R25, R24.reuse, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R24, R24, 0x3, RZ ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x384] &req={0} &wr=0x0 ?trans1;
IMAD R23, R27, 0x3, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IABS R7, R6 &req={0} ?WAIT4_END_GROUP;
I2F.RP R0, R7 &wr=0x0 ?trans1;
IMAD.WIDE R2, R23, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R22, desc[UR6][R2.64] &req={5} &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R2.64+0x4] &wr=0x5 ?trans1;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans3;
LDG.E R20, desc[UR6][R2.64+0x8] &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R30, -RZ, RZ, 0, 0 ?trans1;
MOV R33, RZ ?trans1;
CS2R R28, SRZ ?trans1;
IABS R2, R27 &req={1} ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R5, RZ &req={4,1} ?WAIT5_END_GROUP;
IMAD R3, R8, R7, RZ ?trans1;
MOV.64 R8, 0x483d6329f1c35ca5 ?WAIT3_END_GROUP;
IMAD.HI.U32 R5, R5, R3, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R2, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R7.reuse, R0, R2 ?trans2;
LDC R2, c[0x0][0x388] &wr=0x0 ?trans3;
ISETP.GT.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R7, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, R7, PT ?trans1;
LOP3.LUT R0, R27, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R23 ?WAIT6_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R2, 0x4, PT &req={0} ?WAIT7_END_GROUP;
@!P1 LOP3.LUT R5, RZ, R6, RZ, 0x33, !PT ?trans1;
MOV.64 R6, 0x483d6329f1c35ca5 ?WAIT4_END_GROUP;
IMAD R2, R24, R5, RZ ?trans1;
MOV.64 R4, 0x483d6329f1c35ca5 ?WAIT4_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
@!P0 BRA 0xfa0 ?trans6;
MOV.64 R4, 0x483d6329f1c35ca5 ?trans2;
MOV R32, RZ ?trans1;
CS2R R28, SRZ ?trans1;
MOV R30, RZ ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R12, R32, 0x3, RZ ?trans2;
HFMA2 R13, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R14, R2, R12 ?WAIT5_END_GROUP;
LEA R18, P0, R14, R10, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R14, R11, R15, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R18.64+0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R18.64] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R18.64+0x8] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R18.64+0xc] &req={5} &rd=0x0 &wr=0x5 ?trans4;
LDG.E R34, desc[UR6][R18.64+0x10] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R18.64+0x14] &rd=0x0 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x7e0 ?trans1;
MOV R33, R32 ?trans1;
FADD R14, -R21, R14 &req={2} ?trans1;
FADD R15, -R22, R15 &req={3} ?WAIT3_END_GROUP;
FMUL R14, R14, R14 ?trans1;
FADD R17, -R20, R17 &req={4} ?WAIT3_END_GROUP;
FFMA R14, R15, R15, R14 ?WAIT4_END_GROUP;
FFMA R17, R17, R17, R14 ?WAIT6_END_GROUP;
F2F.F64.F32 R16, R17 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R16, PT &req={1} &wr=0x1 ?trans1;
MOV.64 R14, R16 ?trans2;
@P0 BRA 0x7d0 &req={1,0} ?trans6;
DSETP.GT.AND P1, PT, R6, R16, PT &wr=0x0 ?trans1;
MOV.64 R14, R8 ?trans2;
MOV.64 R8, R16 ?trans2;
MOV R33, R29 ?trans1;
MOV R29, R32 ?trans1;
@!P1 MOV.64 R8, R6 &req={0} ?trans2;
@!P1 MOV R29, R30 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R4, R16, PT &wr=0x0 ?trans2;
@!P1 FSEL R4, R16, R4, P0 &req={0} ?trans1;
@!P1 FSEL R5, R17, R5, P0 ?trans1;
@!P1 SEL R16, R32, R28, P0 ?WAIT3_END_GROUP;
@!P1 MOV R6, R4 ?trans1;
@!P1 MOV R7, R5 ?trans1;
@!P1 MOV R30, R16 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FADD R34, -R21, R34 &req={5} ?trans1;
FADD R35, -R22, R35 ?trans1;
FADD R37, -R20, R37 ?trans1;
IADD3 R16, PT, PT, R12, 0x6, RZ ?trans1;
FMUL R34, R34, R34 ?trans1;
MOV R17, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xa40 ?trans2;
FFMA R34, R35, R35, R34 ?trans1;
IADD3 R35, PT, PT, R32, 0x1, RZ ?trans1;
IADD.64 R16, R2, R16 ?WAIT2_END_GROUP;
FFMA R18, R37, R37, R34 ?trans2;
MOV R28, R35 ?WAIT4_END_GROUP;
F2F.F64.F32 R18, R18 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R14, R18, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R4, R18 ?trans2;
@P0 BRA 0xa30 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R8, R18, PT &wr=0x0 ?trans1;
MOV.64 R4, R14 ?trans2;
MOV.64 R14, R18 ?trans2;
MOV R28, R33 ?trans1;
MOV R33, R35 ?trans1;
@!P1 MOV.64 R14, R8 &req={0} ?trans2;
@!P1 MOV R33, R29 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R6, R18, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R18, R6, P0 &req={0} ?trans1;
@!P1 FSEL R7, R19, R7, P0 ?trans1;
@!P1 SEL R18, R35, R30, P0 ?WAIT3_END_GROUP;
@!P1 MOV R8, R6 ?trans1;
@!P1 MOV R9, R7 ?trans1;
@!P1 MOV R29, R18 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R12, 0x9, RZ ?trans1;
MOV R13, RZ ?trans1;
LEA R6, P0, R16, R10, 0x2 ?WAIT4_END_GROUP;
IADD.64 R12, R2, R12 ?WAIT3_END_GROUP;
LEA.HI.X R7, R16, R11, R17, 0x2, P0 ?trans2;
LEA R10, P0, R12, R10, 0x2 ?WAIT3_END_GROUP;
LDG.E R16, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
LEA.HI.X R11, R12, R11, R13, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R6.64] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x4] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R10.64+0x8] &wr=0x3 ?trans4;
LDG.E R19, desc[UR6][R6.64+0x8] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xdf0 ?trans1;
FADD R16, -R21.reuse, R16 &req={2} ?trans1;
FADD R18, -R21, R18 &req={4} ?trans1;
FADD R35, -R22, R35 &req={5} ?WAIT3_END_GROUP;
FMUL R18, R18, R18 ?trans1;
FADD R17, -R22, R17 &req={3} ?trans1;
FADD R37, -R20, R37 ?trans2;
FFMA R18, R35, R35, R18 ?trans1;
FMUL R16, R16, R16 ?WAIT3_END_GROUP;
FFMA R10, R37, R37, R18 ?trans1;
FFMA R16, R17, R17, R16 ?trans1;
FADD R19, -R20, R19 ?WAIT4_END_GROUP;
FFMA R12, R19, R19, R16 ?trans1;
F2F.F64.F32 R10, R10 ?trans1;
IADD3 R16, PT, PT, R32.reuse, 0x2, RZ ?trans2;
IADD3 R18, PT, PT, R32, 0x3, RZ ?WAIT3_END_GROUP;
MOV R30, R16 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R4, R12, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R6, R12 ?trans2;
@P0 BRA 0xde0 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R14, R12, PT &wr=0x0 ?trans1;
MOV R30, R28 ?trans1;
MOV R28, R16 ?trans1;
MOV.64 R6, R4 ?trans2;
MOV.64 R4, R12 ?trans2;
@!P1 MOV.64 R4, R14 &req={0} ?trans2;
@!P1 MOV R28, R33 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R8, R12, PT &wr=0x0 ?trans2;
@!P1 SEL R16, R16, R29, P0 &req={0} ?trans1;
@!P1 FSEL R8, R12, R8, P0 ?trans1;
@!P1 FSEL R9, R13, R9, P0 ?WAIT3_END_GROUP;
@!P1 MOV R33, R16 ?trans1;
@!P1 MOV R14, R8 ?trans1;
@!P1 MOV R15, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
DSETP.GT.AND P0, PT, R6, R10, PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xf60 ?trans1;
MOV.64 R8, R10 ?trans2;
MOV R29, R18 ?trans1;
@P0 BRA 0xf50 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R4, R10, PT &wr=0x0 ?trans1;
MOV.64 R8, R6 ?trans2;
MOV.64 R6, R10 ?trans2;
MOV R29, R30 ?trans1;
MOV R30, R18 ?trans1;
@!P1 MOV.64 R6, R4 &req={0} ?trans2;
@!P1 MOV R30, R28 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R14, R10, PT &wr=0x0 ?trans2;
@!P1 SEL R12, R18, R33, P0 &req={0} ?trans1;
@!P1 FSEL R10, R10, R14, P0 ?trans1;
@!P1 FSEL R11, R11, R15, P0 ?WAIT3_END_GROUP;
@!P1 MOV R28, R12 ?trans1;
@!P1 MOV R4, R10 ?trans1;
@!P1 MOV R5, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R32, PT, PT, R32, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R32, R25, PT ?WAIT13_END_GROUP;
@P0 BRA 0x500 ?trans5;
MOV R33, R25 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R31, RZ, PT ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R6 ?trans2;
MOV.64 R12, R4 ?trans2;
MOV R35, R29 ?trans1;
MOV R34, R30 ?trans1;
MOV R32, R28 ?WAIT4_END_GROUP;
@!P0 BRA 0x1930 ?trans5;
LDC.64 R14, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R16, R33, 0x3, RZ ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R12, R2, R16 ?WAIT5_END_GROUP;
LEA R10, P0, R12, R14, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R12, R15, R13, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R12, desc[UR6][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R13, desc[UR6][R10.64] &wr=0x3 ?trans4;
LDG.E R19, desc[UR6][R10.64+0x8] &rd=0x0 &wr=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x12d0 ?trans1;
MOV R35, R33 ?trans1;
MOV R34, R29 ?trans1;
MOV R32, R30 ?trans1;
MOV.64 R10, R8 &req={0} ?WAIT2_END_GROUP;
FADD R12, -R21, R12 &req={5,2} ?trans1;
FADD R13, -R22, R13 &req={3} ?WAIT3_END_GROUP;
FMUL R12, R12, R12 ?trans1;
FADD R19, -R20, R19 &req={4} ?WAIT3_END_GROUP;
FFMA R12, R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R36, R19, R19, R12 ?trans1;
MOV.64 R12, R6 ?WAIT3_END_GROUP;
F2F.F64.F32 R18, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R18, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x12c0 &req={0} ?trans5;
DSETP.GT.AND P1, PT, R6, R18, PT &wr=0x0 ?trans1;
MOV.64 R10, R18 ?trans2;
@!P1 MOV.64 R10, R6 &req={0} ?trans2;
MOV R34, R33 ?trans1;
@!P1 MOV R34, R30 ?trans1;
MOV R35, R29 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R4, R18, PT &wr=0x0 ?trans2;
@!P1 FSEL R12, R18, R4, P0 &req={0} ?trans1;
@!P1 FSEL R13, R19, R5, P0 ?trans1;
MOV.64 R18, R8 ?trans2;
@!P1 SEL R32, R33, R28, P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x1, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1930 ?WAIT12_END_GROUP;
@!P0 BRA 0x1920 ?trans5;
IADD3 R4, PT, PT, R16, 0x3, RZ ?trans1;
MOV R5, RZ ?WAIT5_END_GROUP;
IADD.64 R6, R2, R4 ?WAIT5_END_GROUP;
LEA R4, P0, R6, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R5, R6, R15, R7, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R4.64+0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR6][R4.64] &wr=0x3 ?trans4;
LDG.E R9, desc[UR6][R4.64+0x8] &rd=0x0 &wr=0x4 ?trans1;
BSSY.RECONVERGENT B1, 0x15a0 ?trans1;
IADD3 R30, PT, PT, R33, 0x1, RZ ?trans1;
MOV R28, R35 ?trans1;
MOV R29, R34 ?trans1;
MOV.64 R4, R18 &req={0} ?WAIT2_END_GROUP;
FADD R6, -R21, R6 &req={2} ?trans1;
FADD R7, -R22, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R6, R6, R6 ?trans1;
FADD R9, -R20, R9 &req={4} ?WAIT3_END_GROUP;
FFMA R6, R7, R7, R6 ?WAIT4_END_GROUP;
FFMA R36, R9, R9, R6 ?trans1;
MOV.64 R6, R10 ?WAIT3_END_GROUP;
F2F.F64.F32 R8, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R18, R8, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1590 &req={0} ?trans5;
DSETP.GT.AND P1, PT, R10, R8, PT &wr=0x0 ?trans1;
MOV.64 R4, R8 ?trans2;
@!P1 MOV.64 R4, R10 &req={0} ?trans2;
MOV R28, R30 ?trans1;
@!P1 MOV R28, R34 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R12, R8, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R8, R12, P0 &req={0} ?trans1;
@!P1 FSEL R7, R9, R13, P0 ?trans1;
MOV.64 R8, R18 ?trans2;
@!P1 SEL R29, R30, R32, P0 ?trans1;
MOV R30, R35 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x2, PT ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R4 ?trans2;
MOV.64 R12, R6 ?trans2;
MOV R35, R30 ?trans1;
MOV R34, R28 ?trans1;
MOV R32, R29 ?WAIT4_END_GROUP;
@!P0 BRA 0x1920 ?trans5;
IADD3 R16, PT, PT, R16, 0x6, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R16 ?WAIT5_END_GROUP;
LEA R14, P0, R2, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R2, R15, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR6][R14.64+0x4] &wr=0x2 ?trans4;
LDG.E R3, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R11, desc[UR6][R14.64+0x8] &wr=0x4 ?trans1;
IADD3 R16, PT, PT, R33, 0x2, RZ ?trans1;
MOV.64 R12, R4 ?WAIT2_END_GROUP;
MOV R34, R30 ?trans1;
MOV R32, R28 ?trans1;
MOV R35, R16 ?trans1;
FADD R2, -R21, R2 &req={2} ?trans1;
FADD R3, -R22, R3 &req={3} ?WAIT3_END_GROUP;
FMUL R2, R2, R2 ?trans1;
FADD R11, -R20, R11 &req={4} ?WAIT3_END_GROUP;
FFMA R2, R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R11, R11, R2 ?trans1;
MOV.64 R10, R8 ?WAIT5_END_GROUP;
F2F.F64.F32 R2, R2 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R2, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R18, R2 ?trans2;
@P0 BRA 0x1920 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R4, R2, PT &wr=0x0 ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R2 ?trans2;
@!P1 MOV.64 R18, R8 &req={0} ?trans2;
@!P1 MOV.64 R10, R4.reuse ?trans2;
MOV.64 R12, R4 ?trans2;
MOV R35, R30 ?trans1;
MOV R34, R16 ?trans1;
MOV R32, R28 ?trans1;
@!P1 MOV R35, R30 ?trans1;
@!P1 MOV R34, R28 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R6, R2, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R2, R6, P0 &req={0} ?trans1;
@!P1 FSEL R7, R3, R7, P0 ?trans1;
@!P1 SEL R32, R16, R29, P0 ?WAIT3_END_GROUP;
@!P1 MOV R12, R6 ?trans1;
@!P1 MOV R13, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R3, R23.reuse, 0x2, R0 ?trans1;
IMAD.SHL.U32 R2, R23, 0x4, RZ ?trans1;
F2F.F32.F64 R19, R18 &wr=0x1 ?trans1;
IADD3 R27, PT, PT, R26, R27, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?trans1;
IADD.64 R4, R2.reuse, UR8 &req={0} ?trans2;
IADD.64 R2, R2, UR10 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R19 &req={1} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R11, R10 &wr=0x1 ?trans2;
STG.E desc[UR6][R4.64+0x4], R11 &req={1} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R13, R12 &wr=0x1 ?trans2;
STG.E desc[UR6][R4.64+0x8], R13 &req={1} &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64], R35 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x4], R34 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x8], R32 &rd=0x0 ?trans1;
@!P0 BRA 0x220 ?trans5;
EXIT ?trans5;
BRA 0x1ac0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_nn_gpu(int, int, int, float const*, float const*, float*, int*)
_Z12three_nn_gpuiiiPKfS0_PfPi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s19, s4, 0xffff
s_mul_i32 s12, s17, s16
v_mad_u64_u32 v[6:7], null, s15, s19, v[0:1]
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v6
s_cbranch_execz .LBB0_13
s_cmp_gt_i32 s18, 0
s_mov_b32 s16, 0
s_cselect_b32 s13, -1, 0
s_ashr_i32 s14, s17, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s4, s17, s14
s_load_b32 s17, s[2:3], 0x0
s_xor_b32 s15, s4, s14
s_load_b256 s[4:11], s[0:1], 0x10
v_cvt_f32_u32_e32 v0, s15
s_sub_i32 s2, 0, s15
s_mul_i32 s1, s18, 3
s_delay_alu instid0(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s17, s17, s19
s_add_u32 s6, s6, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
s_addc_u32 s7, s7, 0
v_mul_lo_u32 v1, s2, v0
s_mov_b32 s2, 0xf1c35ca5
s_mov_b32 s3, 0x483d6329
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v1, v0, v1
v_add_nc_u32_e32 v19, v0, v1
.LBB0_2:
v_lshl_add_u32 v3, v6, 1, v6
v_mov_b32_e32 v12, s3
v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v9, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v11, s2
v_lshlrev_b64 v[7:8], 2, v[3:4]
s_and_not1_b32 vcc_lo, exec_lo, s13
s_cbranch_vccnz .LBB0_12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v8, vcc_lo
s_mov_b32 s0, 0
v_mov_b32_e32 v20, 0
v_mov_b32_e32 v18, s3
global_load_b96 v[3:5], v[0:1], off
v_ashrrev_i32_e32 v0, 31, v6
v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v12, s3
v_mov_b32_e32 v11, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v6, v0
v_xor_b32_e32 v1, v1, v0
v_xor_b32_e32 v0, s14, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v1, v19
v_mul_lo_u32 v9, v2, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v1, v1, v9
v_add_nc_u32_e32 v9, 1, v2
v_subrev_nc_u32_e32 v10, s15, v1
v_cmp_le_u32_e32 vcc_lo, s15, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v2, v2, v9 :: v_dual_cndmask_b32 v1, v1, v10
v_add_nc_u32_e32 v9, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s15, v1
v_dual_cndmask_b32 v1, v2, v9 :: v_dual_mov_b32 v10, s3
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v9, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v1, v1, v0
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, s1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v13, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v1, vcc_lo
v_mov_b32_e32 v1, v20
.LBB0_4:
global_load_b96 v[21:23], v[13:14], off offset:-4
s_mov_b32 s19, exec_lo
s_waitcnt vmcnt(0)
v_dual_sub_f32 v0, v22, v4 :: v_dual_sub_f32 v15, v21, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v0
v_fmac_f32_e32 v0, v15, v15
v_sub_f32_e32 v15, v23, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v0, v15, v15
v_cvt_f64_f32_e32 v[15:16], v0
v_mov_b32_e32 v0, s0
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_ngt_f64_e32 v[11:12], v[15:16]
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v21, s0
s_mov_b32 s20, exec_lo
v_cmpx_ngt_f64_e32 v[9:10], v[15:16]
s_cbranch_execz .LBB0_9
s_mov_b32 s21, exec_lo
v_cmpx_gt_f64_e32 v[17:18], v[15:16]
v_mov_b32_e32 v18, v16
v_dual_mov_b32 v20, s0 :: v_dual_mov_b32 v17, v15
s_or_b32 exec_lo, exec_lo, s21
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_mov_b32 v21, v2 :: v_dual_mov_b32 v2, v20
v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
v_dual_mov_b32 v9, v17 :: v_dual_mov_b32 v10, v18
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_dual_mov_b32 v18, v16 :: v_dual_mov_b32 v17, v15
v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
v_mov_b32_e32 v0, v1
v_mov_b32_e32 v1, v21
v_dual_mov_b32 v11, v17 :: v_dual_mov_b32 v12, v18
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s19
v_add_co_u32 v13, vcc_lo, v13, 12
v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s18, s0
s_cbranch_scc1 .LBB0_12
v_mov_b32_e32 v20, v2
v_mov_b32_e32 v2, v1
v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v17, v9
v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v10, v12
v_mov_b32_e32 v11, v15
v_mov_b32_e32 v1, v0
v_mov_b32_e32 v12, v16
s_branch .LBB0_4
.LBB0_12:
v_cvt_f32_f64_e32 v3, v[15:16]
v_cvt_f32_f64_e32 v4, v[11:12]
v_cvt_f32_f64_e32 v5, v[9:10]
v_add_nc_u32_e32 v6, s17, v6
v_add_co_u32 v9, vcc_lo, s8, v7
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s12, v6
v_add_co_u32 v7, s0, s10, v7
v_add_co_ci_u32_e64 v8, s0, s11, v8, s0
s_or_b32 s16, vcc_lo, s16
global_store_b96 v[9:10], v[3:5], off
global_store_b96 v[7:8], v[0:2], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB0_2
.LBB0_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| three_nn_gpu | 8,923 | 3,294 | stackv2-00000-of-00015 |
// Demangled: MatrixMul(int*, int*, int*, int)
Function : _Z9MatrixMulPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R12, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
IMAD.WIDE R10, R6, R11, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans1;
MOV R23, 0x4 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6.reuse, R9, UR24 ?trans1;
LDG.E R14, desc[UR16][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, R19, UR14 ?WAIT4_END_GROUP;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R16, desc[UR16][R8.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0x8] &wr=0x5 ?trans1;
IMAD.WIDE R20, R6, R25, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R11, 0x4 &req={1} ?trans1;
IMAD.WIDE R8, R6.reuse, R25, UR8 &req={4} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R6, R11, UR6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR16][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R30, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
IMAD R12, R12, R13, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R12, R15, R14, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R17, R17, R16, R12 &req={5} ?WAIT4_END_GROUP;
IMAD R17, R24, R18, R17 ?WAIT4_END_GROUP;
IMAD R17, R26, R22, R17 &req={4} ?WAIT4_END_GROUP;
IMAD R17, R28, R20, R17 ?WAIT4_END_GROUP;
IMAD R8, R30, R8, R17 ?WAIT4_END_GROUP;
IMAD R0, R19, R10, R8 ?trans1;
@P0 BRA 0x210 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7e0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 IMAD R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 IMAD R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 IMAD R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xad0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMul(int*, int*, int*, int)
_Z9MatrixMulPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMul | 4,508 | 1,245 | stackv2-00000-of-00015 |
// Demangled: hello_kernel(char*, int)
Function : _Z12hello_kernelPci
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans2;
IADD3 R1, PT, PT, R1, -0x1e0, RZ &req={0} ?trans1;
HFMA2 R8, -RZ, RZ, 0.00853729248046875, 0.008056640625 ?trans1;
MOV R11, 0xa202020 ?trans1;
HFMA2 R9, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R10, 0x20202020 ?trans2;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
HFMA2 R4, -RZ, RZ, 0.01393890380859375, 0.01393890380859375 ?trans1;
MOV R5, 0x23232323 ?trans1;
HFMA2 R6, -RZ, RZ, 0.01393890380859375, 0.01393890380859375 ?trans1;
STL.128 [R1+0x40], R8 &rd=0x1 ?trans1;
MOV R7, 0x23232323 ?trans1;
HFMA2 R17, -RZ, RZ, 0.00018727779388427734375, 0.01393890380859375 ?trans1;
MOV R18, 0x205f2020 ?trans1;
HFMA2 R19, -RZ, RZ, 456, 0.008056640625 ?trans1;
MOV R16, 0x23232323 ?trans1;
STL.128 [R1], R4 ?trans1;
MOV R12, 0x7c207c20 ?trans1;
HFMA2 R13, -RZ, RZ, 0.008758544921875, 0.008056640625 ?trans1;
MOV R14, 0x2020207c ?trans1;
STL.128 [R1+0x10], R4 &rd=0x2 ?trans1;
HFMA2 R15, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R26, 0x7c207c20 ?trans1;
HFMA2 R24, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
STL.128 [R1+0x20], R16 &rd=0x3 ?trans1;
MOV R25, 0x20202020 ?trans1;
MOV R8, 0x7c207c5f &req={1} ?trans1;
HFMA2 R9, -RZ, RZ, 471.75, 456 ?trans1;
MOV R10, 0x5f5f2020 ?trans1;
HFMA2 R11, -RZ, RZ, 0.000186920166015625, 0.00853729248046875 ?trans1;
STL.128 [R1+0x50], R12 ?trans1;
HFMA2 R27, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R29, 0xa202020 ?trans1;
HFMA2 R31, -RZ, RZ, 0.008758544921875, 471.75 ?trans1;
STL.128 [R1+0x90], R8 &rd=0x1 ?trans1;
MOV R28, 0x20202020 ?trans1;
HFMA2 R4, -RZ, RZ, 471.75, 0.008758544921875 &req={2} ?trans1;
MOV R5, 0x205f205f ?trans1;
HFMA2 R6, -RZ, RZ, 0.008056640625, 471.75 ?trans1;
MOV R7, 0x205f5f20 ?trans1;
MOV R30, 0x7c207c20 ?trans1;
MOV R16, 0x20207c20 &req={3} ?trans1;
HFMA2 R17, -RZ, RZ, 0.008056640625, 471.75 ?trans1;
MOV R18, 0x5f202f7c ?trans1;
STL.128 [R1+0x80], R4 &rd=0x2 ?trans1;
HFMA2 R19, -RZ, RZ, 0.02783203125, 264 ?trans1;
MOV R20, 0x205c205f ?trans1;
HFMA2 R21, -RZ, RZ, 559.5, 0.00817108154296875 ?trans1;
MOV R23, 0x205f202f ?trans1;
MOV R22, 0x7c207c20 ?trans1;
S2R R9, SR_TID.X &req={1} &wr=0x0 ?trans1;
LDC R8, c[0x0][0x360] &wr=0x0 ?trans1;
HFMA2 R12, -RZ, RZ, 456, 0.114990234375 ?trans1;
MOV R13, 0xa205c20 ?trans1;
HFMA2 R15, -RZ, RZ, 0.008758544921875, 0.008056640625 ?trans1;
MOV R14, 0x7c207c20 ?trans1;
STL.128 [R1+0x60], R24 &rd=0x1 ?trans1;
HFMA2 R33, -RZ, RZ, 471.75, 479 ?trans1;
MOV R34, 0x2020202f ?trans1;
HFMA2 R32, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R5, 0x7c202f5f &req={2} ?trans1;
HFMA2 R4, -RZ, RZ, 456, 0.008758544921875 ?trans1;
MOV R7, 0x7c5f2820 ?trans1;
MOV R6, 0x7c207c20 ?trans1;
STL.128 [R1+0x70], R28 &rd=0x2 ?trans1;
MOV R35, 0x20202020 ?WAIT3_END_GROUP;
STL.128 [R1+0xa0], R16 &rd=0x3 ?trans4;
STL.128 [R1+0xb0], R20 &rd=0x4 ?trans1;
MOV R24, 0x7c5f7c20 &req={1} ?trans1;
HFMA2 R25, -RZ, RZ, 479, 0.008056640625 ?trans1;
MOV R26, 0x5f5f5c7c ?trans1;
STL.128 [R1+0xc0], R12 &rd=0x1 ?trans1;
MOV R27, 0x7c5f7c5f ?WAIT3_END_GROUP;
STL.128 [R1+0xd0], R4 &rd=0x5 ?trans1;
HFMA2 R29, -RZ, RZ, 471.75, 0.008056640625 &req={2} ?trans2;
IMAD R8, R8, UR4, R9 &req={0} ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R30, 0x5f20202f ?trans1;
HFMA2 R31, -RZ, RZ, 0.000186920166015625, 0.11517333984375 ?trans1;
MOV R28, 0x7c207c20 ?trans1;
HFMA2 R17, -RZ, RZ, 0.06829833984375, 471 &req={3} ?trans1;
MOV R18, 0x7c5f7c20 ?trans1;
HFMA2 R19, -RZ, RZ, 471.75, 471 ?trans1;
MOV R16, 0x7c5f7c20 ?trans1;
HFMA2 R23, -RZ, RZ, 0.11517333984375, 456 &req={4} ?trans1;
MOV R20, 0x20202020 ?trans1;
HFMA2 R21, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R22, 0x20202020 ?trans1;
HFMA2 R12, -RZ, RZ, 0.008056640625, 0.008056640625 &req={1} ?trans1;
MOV R5, 0xa207c5f &req={5} ?trans1;
HFMA2 R4, -RZ, RZ, 471.75, 287 ?trans1;
MOV R7, 0x20202020 ?trans1;
HFMA2 R6, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R13, 0x20202020 ?trans1;
ISETP.GE.AND P0, PT, R8, UR4, PT &req={0} ?trans1;
HFMA2 R14, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R15, 0x20202020 ?trans1;
STL.128 [R1+0xe0], R28 &rd=0x0 ?trans4;
STL.128 [R1+0xf0], R24 &rd=0x1 ?trans4;
STL.128 [R1+0x100], R16 &rd=0x2 ?trans4;
STL.128 [R1+0x110], R4 &rd=0x3 ?trans4;
STL.128 [R1+0x120], R20 &rd=0x4 ?trans1;
MOV R28, 0x20207c20 &req={0} ?trans1;
HFMA2 R29, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R30, 0x20202020 ?trans1;
STL.128 [R1+0x30], R12 ?trans1;
HFMA2 R31, -RZ, RZ, 0.000186920166015625, 0.008056640625 ?trans1;
MOV R24, 0x3a3a3a3a &req={1} ?trans1;
HFMA2 R25, -RZ, RZ, 0.0001900196075439453125, 0.7783203125 ?trans1;
STL.128 [R1+0x140], R12 &rd=0x0 ?trans1;
HFMA2 R16, -RZ, RZ, 0.055999755859375, 0.055999755859375 &req={2} ?trans1;
MOV R17, 0x2b2b2b2b ?trans1;
HFMA2 R18, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R5, 0x3a3a3a3a &req={3} ?trans1;
HFMA2 R4, -RZ, RZ, 0.7783203125, 0.7783203125 ?trans1;
MOV R6, 0x3a3a3a3a ?trans1;
HFMA2 R7, -RZ, RZ, 0.7783203125, 0.7783203125 ?trans1;
MOV R22, 0x2b2b2b2b &req={4} ?trans1;
HFMA2 R23, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R21, 0xa202020 ?trans1;
MOV R19, 0x2b2b2b2b ?trans1;
CS2R R26, SRZ ?trans1;
STL.128 [R1+0x130], R28 &rd=0x1 ?trans1;
HFMA2 R15, -RZ, RZ, 0.00018823146820068359375, 0.055999755859375 &req={0} ?trans1;
MOV R12, 0x2b2b2b2b ?trans1;
HFMA2 R13, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R14, 0x2b2b2b2b ?trans1;
STL.128 [R1+0x150], R32 &rd=0x1 ?trans4;
STL.128 [R1+0x190], R4 &rd=0x1 ?trans4;
STL.128 [R1+0x160], R20 &rd=0x1 ?trans4;
STL.128 [R1+0x170], R16 &rd=0x1 ?trans4;
STL.128 [R1+0x180], R12 &rd=0x1 ?trans4;
STL.128 [R1+0x1b0], R24 &rd=0x1 ?trans4;
STL.128 [R1+0x1a0], R4 &rd=0x1 ?trans4;
STL.128 [R1+0x1c0], RZ &rd=0x1 ?trans4;
STL.128 [R1+0x1d0], RZ &rd=0x1 ?trans1;
@P0 EXIT ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R2, R1 ?trans1;
MOV R3, RZ ?WAIT5_END_GROUP;
IADD.64 R2, R2, R8 ?WAIT7_END_GROUP;
LDL.U8 R3, [R2] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IADD.64 R8, R8, UR6 &req={0} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR4][R8.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x930;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: hello_kernel(char*, int)
_Z12hello_kernelPci:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
v_ashrrev_i32_e32 v4, 31, v1
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, __const._Z12hello_kernelPci.hello_str@rel32@lo+4
s_addc_u32 s3, s3, __const._Z12hello_kernelPci.hello_str@rel32@hi+12
v_add_co_u32 v2, vcc_lo, v1, s2
s_load_b64 s[0:1], s[0:1], 0x0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
global_load_u8 v2, v[2:3], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
s_waitcnt vmcnt(0)
global_store_b8 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| hello_kernel | 4,507 | 475 | stackv2-00000-of-00015 |
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