sass stringlengths 231 30.8k | rdna stringlengths 69 28.4k | function_name stringlengths 1 85 | sass_tokens int64 90 14.4k ⌀ | rdna_tokens int64 11 14.5k ⌀ | source stringclasses 15 values |
|---|---|---|---|---|---|
// Demangled: inline_test(int*, int)
Function : _Z11inline_testPii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R5.reuse, UR6, RZ &req={0} ?trans1;
IMAD.WIDE.U32 R4, R5, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 ?trans2;
LDG.E R7, desc[UR4][R4.64] &req={2} &wr=0x2 ?trans4;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
IADD3 R7, PT, PT, R2, R7, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: inline_test(int*, int)
_Z11inline_testPii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x8
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s2, v0
v_lshlrev_b32_e32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[1:2]
v_add_co_u32 v1, vcc_lo, s0, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
s_clause 0x1
global_load_b32 v1, v[1:2], off
global_load_b32 v2, v0, s[0:1]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v2, v1
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| inline_test | 388 | 338 | stackv2-00000-of-00015 |
// Demangled: UpdateVisit(node1*, int*, int*, int*)
Function : _Z11UpdateVisitP5node1PiS1_S1_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
LDG.E R5, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IMAD R11, R11, UR6, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R10, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R8, R0, 0x8, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R13, R10, PT &req={3} ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x398] &wr=0x0 ?trans2;
@!P0 LDG.E R10, desc[UR4][R6.64] &req={0} &wr=0x2 ?trans2;
@!P0 IADD3 R15, PT, PT, R10, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R6.64], R15 &rd=0x0 ?trans4;
@!P0 LDG.E R13, desc[UR4][R8.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR4][R8.64+0x4], RZ &rd=0x0 ?trans4;
STG.E desc[UR4][R8.64], R13 &req={2} &rd=0x0 ?trans4;
LDG.E R17, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R17, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 &req={0} ?trans5;
EXIT ?trans5;
BRA 0x1f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: UpdateVisit(node1*, int*, int*, int*)
_Z11UpdateVisitP5node1PiS1_S1_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x2c
s_add_u32 s0, s0, 32
s_addc_u32 s1, s1, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s3, s[6:7], 0x0
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s3, v1
s_and_saveexec_b32 s3, vcc_lo
s_cbranch_execz .LBB1_5
s_load_b32 s0, s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v3, 0
s_mov_b32 s1, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 3, v[1:2]
v_add_co_u32 v0, vcc_lo, v4, s4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v2, vcc_lo, s5, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, v0, 4
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v2, vcc_lo
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s0, s2
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[4:5], s[2:3], 3
.LBB1_2:
global_load_b32 v0, v3, s[8:9]
global_load_b32 v2, v[4:5], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v0, 1, v0
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e64 v2, v0
s_cbranch_execz .LBB1_4
global_load_b32 v0, v3, s[10:11]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, 1, v0
global_store_b32 v3, v0, s[10:11]
global_load_b32 v2, v[4:5], off
.LBB1_4:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
global_store_b64 v[4:5], v[2:3], off offset:-4
global_load_b32 v0, v3, s[6:7]
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v4, s0, v4, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v0
s_or_b32 s1, vcc_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB1_2
.LBB1_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| UpdateVisit | 939 | 1,103 | stackv2-00000-of-00015 |
// Demangled: Updatenextlevel(int*, int*, int*, node1*, int*)
Function : _Z15UpdatenextlevelPiS_S_P5node1S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R3, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R13, UR6, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x370] &wr=0x0 ?trans1;
MOV R9, R3 ?trans1;
IMAD R13, R13, UR6, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x398] &req={0} &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans2;
LDG.E R5, desc[UR4][R4.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R2, R0, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x360 ?trans1;
ISETP.NE.AND P0, PT, R2, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x350 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R0 ?trans2;
LEA R6, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R7, R0, UR7, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R6.64] &wr=0x2 ?trans4;
LDG.E R3, desc[UR4][R6.64+0x4] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R2, R3, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x350 ?trans5;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x330 ?trans1;
MOV R15, R2 ?trans1;
MOV R12, R3 ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans2;
IMAD.WIDE R2, R15, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans2;
IMAD.WIDE R8, R3, 0x8, R10 &req={2,0} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR4][R8.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B2, 0x300 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R14, -0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x2f0 ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans2;
IADD3 R17, PT, PT, R2, 0x1, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64+0x4], R17 &rd=0x0 ?trans4;
LDG.E R12, desc[UR4][R6.64+0x4] &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
ISETP.GE.AND P0, PT, R15, R12, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0x220 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R2, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R9, desc[UR4][R2.64] &req={1,0} &rd=0x0 &wr=0x5 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R0, PT, PT, R13, R0, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT &req={5} ?WAIT13_END_GROUP;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x3a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Updatenextlevel(int*, int*, int*, node1*, int*)
_Z15UpdatenextlevelPiS_S_P5node1S_:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s6, s[0:1], 0x34
s_add_u32 s4, s0, 40
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_load_b32 s12, s[2:3], 0x0
s_and_b32 s13, s6, 0xffff
s_mov_b32 s6, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB0_11
s_load_b32 s14, s[4:5], 0x0
s_load_b256 s[4:11], s[0:1], 0x0
v_mov_b32_e32 v6, s12
v_mov_b32_e32 v0, 0
s_mov_b32 s12, 0
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s14, s13
.LBB0_2:
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_add_co_u32 v3, vcc_lo, s10, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
global_load_b32 v3, v[3:4], off
global_load_b32 v4, v0, s[8:9]
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e64 v3, v4
s_cbranch_execz .LBB0_10
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_mov_b32 s14, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b64 v[4:5], v[2:3], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e64 v4, v5
s_cbranch_execz .LBB0_9
v_ashrrev_i32_e32 v7, 31, v4
v_mov_b32_e32 v6, v4
s_mov_b32 s15, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
.LBB0_5:
global_load_b32 v8, v[6:7], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 3, v[8:9]
v_add_co_u32 v8, vcc_lo, s10, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
global_load_b32 v10, v[8:9], off
s_waitcnt vmcnt(0)
v_cmpx_eq_u32_e32 -1, v10
s_cbranch_execz .LBB0_7
global_load_b32 v5, v0, s[8:9]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, 1, v5
global_store_b32 v[8:9], v5, off offset:4
global_load_b32 v5, v[2:3], off offset:4
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v4, 1, v4
v_add_co_u32 v6, s0, v6, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s0, 0, v7, s0
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v4, v5
s_or_b32 s15, vcc_lo, s15
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB0_5
s_or_b32 exec_lo, exec_lo, s15
global_load_b32 v6, v0, s[2:3]
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s14
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s13
v_add_nc_u32_e32 v1, s1, v1
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, v1, v6
s_or_b32 s12, vcc_lo, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s12
s_cbranch_execnz .LBB0_2
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| Updatenextlevel | 1,541 | 1,682 | stackv2-00000-of-00015 |
// Demangled: mean_filter_gpu(unsigned char*, int, int, unsigned char*, int)
Function : _Z15mean_filter_gpuPhiiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
S2R R5, SR_TID.Y &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R2, UR5, R5 &req={2} ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, R8, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x1aa0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x1, URZ &req={0} ?WAIT4_END_GROUP;
ULEA.HI UR4, UR4, UR4, URZ, 0x1 ?WAIT4_END_GROUP;
USHF.R.S32.HI UR4, URZ, 0x1, UR4 ?WAIT6_END_GROUP;
IADD3 R5, PT, PT, R3.reuse, UR4, RZ ?trans1;
ISETP.GE.AND P1, PT, R3.reuse, UR4, PT ?trans1;
IADD3 R4, PT, PT, R3, -UR4, RZ ?trans2;
IADD3 R2, PT, PT, R0.reuse, UR4, RZ ?trans2;
IADD3 R7, PT, PT, R0, -UR4, RZ ?trans1;
ISETP.GE.AND P2, PT, R5, R8, PT ?trans1;
SEL R4, R4, RZ, P1 ?trans1;
ISETP.GE.AND P0, PT, R2, R9, PT ?trans1;
ISETP.GE.AND P1, PT, R0, UR4, PT ?WAIT5_END_GROUP;
SEL R7, R7, RZ, P1 ?WAIT5_END_GROUP;
@P2 IADD3 R5, PT, PT, R8, -0x1, RZ ?trans2;
@P0 IADD3 R2, PT, PT, R9, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.AND P2, PT, R5, R4, PT ?WAIT13_END_GROUP;
@!P2 BRA 0x1a90 &req={2,1} ?trans5;
VIMNMX.S32 R11, R0, UR4, !PT ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R11.reuse, UR4, R2 ?trans2;
IADD3 R11, PT, PT, R11, -UR4, RZ ?trans2;
IADD3 R12, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT R9, R12.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R8, R12, 0xf, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, R9, -0x1, RZ ?trans2;
IADD3 R10, PT, PT, R8, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R13, 0x3, PT ?trans1;
LOP3.LUT R13, R12, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
ISETP.GE.U32.AND P0, PT, R10, 0x7, PT ?trans1;
MOV R10, R4 ?trans1;
LOP3.LUT R12, R12, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT9_END_GROUP;
ISETP.GE.AND P2, PT, R2, R7, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1a60 ?WAIT12_END_GROUP;
@!P2 BRA 0x1a50 &req={4,3,2,1,0} ?trans5;
ISETP.GE.U32.AND P3, PT, R6, 0xf, PT ?trans1;
BSSY.RECONVERGENT B2, 0xf10 ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
MOV R15, R7 ?WAIT10_END_GROUP;
@!P3 BRA 0xf00 ?trans5;
LDCU UR5, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R22, R13 ?trans1;
MOV R15, R7 ?trans1;
IMAD R14, R10, UR5, R11 &req={0} ?WAIT7_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R14 ?trans1;
MOV R16, R14 ?WAIT5_END_GROUP;
IADD.64 R16, R16, UR8 ?WAIT6_END_GROUP;
LDG.E.U8 R23, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.U8 R37, desc[UR6][R16.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R35, desc[UR6][R16.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R33, desc[UR6][R16.64+0x3] &wr=0x5 ?trans4;
LDG.E.U8 R32, desc[UR6][R16.64+0x4] &wr=0x3 ?trans4;
LDG.E.U8 R31, desc[UR6][R16.64+0x5] &wr=0x3 ?trans4;
LDG.E.U8 R30, desc[UR6][R16.64+0x6] &wr=0x3 ?trans4;
LDG.E.U8 R29, desc[UR6][R16.64+0x7] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR6][R16.64+0x8] &wr=0x3 ?trans4;
LDG.E.U8 R27, desc[UR6][R16.64+0x9] &wr=0x3 ?trans4;
LDG.E.U8 R26, desc[UR6][R16.64+0xa] &wr=0x3 ?trans4;
LDG.E.U8 R25, desc[UR6][R16.64+0xb] &wr=0x3 ?trans4;
LDG.E.U8 R24, desc[UR6][R16.64+0xc] &wr=0x3 ?trans4;
LDG.E.U8 R34, desc[UR6][R16.64+0xe] &wr=0x3 ?trans4;
LDG.E.U8 R36, desc[UR6][R16.64+0xf] &wr=0x3 ?trans1;
I2F.F64.U16 R20, R23 &req={2} &rd=0x0 &wr=0x1 ?trans3;
LDG.E.U8 R23, desc[UR6][R16.64+0xd] &req={0} &rd=0x0 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={1} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R37 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x4 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R35 &req={4} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x5 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R33 &req={5} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R32 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R31 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &rd=0x1 &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R30 &req={1} &wr=0x3 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R16, R29 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R18, R16 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R28 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R27 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
IADD3 R22, PT, PT, R22, 0x10, RZ ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R26 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
ISETP.NE.AND P3, PT, R22, RZ, PT ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R25 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x0 &wr=0x1 ?trans1;
IADD3 R15, PT, PT, R15, 0x10, RZ ?trans2;
IADD3 R14, PT, PT, R14, 0x10, RZ ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R24 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={1} &rd=0x2 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R23 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R34, R34 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R16, R16, R34 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R36, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R16, R36 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P3 BRA 0x3c0 &req={1,0} ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
BSSY.RECONVERGENT B2, 0x1500 ?trans1;
ISETP.NE.AND P2, PT, R9, RZ, PT ?WAIT3_END_GROUP;
@!P0 BRA 0x14f0 ?trans10;
LDCU UR5, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R24, R10, UR5, R15 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R24, UR10 &req={1} ?WAIT6_END_GROUP;
LDG.E.U8 R26, desc[UR6][R24.64] &wr=0x2 ?trans4;
LDG.E.U8 R27, desc[UR6][R24.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R28, desc[UR6][R24.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R23, desc[UR6][R24.64+0x3] &wr=0x5 ?trans4;
LDG.E.U8 R22, desc[UR6][R24.64+0x4] &wr=0x3 ?trans4;
LDG.E.U8 R14, desc[UR6][R24.64+0x5] &wr=0x3 ?trans4;
LDG.E.U8 R16, desc[UR6][R24.64+0x6] &wr=0x3 ?trans4;
LDG.E.U8 R17, desc[UR6][R24.64+0x7] &wr=0x3 ?trans1;
IADD3 R15, PT, PT, R15, 0x8, RZ ?trans1;
I2F.F64.U16 R20, R26 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R18, R20 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R27 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={0} &rd=0x4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R28 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R23 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R22 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R14 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R16 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R17 &req={0} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={1} &rd=0x0 &wr=0x1 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
BSSY.RECONVERGENT B2, 0x1830 ?trans1;
ISETP.NE.AND P2, PT, R12, RZ, PT ?WAIT3_END_GROUP;
@!P1 BRA 0x1820 ?trans10;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R16, R10, UR5, R15 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R16, UR10 &req={3} ?WAIT6_END_GROUP;
LDG.E.U8 R14, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.U8 R22, desc[UR6][R16.64+0x1] &wr=0x3 ?trans4;
LDG.E.U8 R23, desc[UR6][R16.64+0x2] &wr=0x4 ?trans4;
LDG.E.U8 R24, desc[UR6][R16.64+0x3] &wr=0x5 ?trans1;
IADD3 R15, PT, PT, R15, 0x4, RZ ?trans1;
I2F.F64.U16 R20, R14 &req={2,0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R20, R18, R20 &req={1,0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R18, R22 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R20, R18 &req={0} &rd=0x4 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R23 &req={4} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x5 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64.U16 R20, R24 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R20 &req={0} &rd=0x2 &wr=0x3 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
@!P2 BRA 0x1a50 ?trans5;
LDCU UR5, c[0x0][0x388] &wr=0x4 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x5 ?trans1;
IMAD R14, R10, UR5, R15 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R16, R14, UR10 &req={5} ?WAIT6_END_GROUP;
LDG.E.U8 R14, desc[UR6][R16.64] &wr=0x4 ?trans1;
ISETP.NE.AND P2, PT, R12, 0x1, PT ?trans1;
I2F.F64.U16 R14, R14 &req={4} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R14 &req={4,3,1} &rd=0x4 &wr=0x1 ?trans2;
@!P2 BRA 0x1a50 &req={4,1} ?trans5;
LDG.E.U8 R20, desc[UR6][R16.64+0x1] &req={2,0} &wr=0x2 ?trans1;
ISETP.NE.AND P2, PT, R12, 0x2, PT ?WAIT13_END_GROUP;
@P2 LDG.E.U8 R21, desc[UR6][R16.64+0x2] &wr=0x3 ?trans1;
I2F.F64.U16 R14, R20 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R18, R18, R14 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 I2F.F64.U16 R14, R21 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@P2 DADD R18, R18, R14 &req={0} &rd=0x4 &wr=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.GE.AND P2, PT, R10.reuse, R5, PT ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT12_END_GROUP;
@!P2 BRA 0x300 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R4, PT, PT, R5, 0x1, -R4 ?trans1;
BSSY.RECONVERGENT B0, 0x1e40 ?trans1;
IADD3 R7, PT, PT, -R7, R2, RZ ?trans1;
FSETP.GEU.AND P1, PT, |R19|, 6.5827683646048100446e-37, PT &req={3,1,0} ?WAIT4_END_GROUP;
IMAD R7, R4, R7, R4 ?trans1;
MOV R4, 0x1 ?WAIT5_END_GROUP;
I2F.F64 R6, R7 &wr=0x0 ?trans2;
MUFU.RCP64H R5, R7 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R6, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R6, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R4, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R6, R8, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R10, R8 &req={0} &wr=0x0 ?trans2;
FFMA R2, RZ, R7, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R2|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1e30 ?trans5;
MOV R8, R18 ?trans1;
MOV R9, R19 ?trans1;
MOV R2, 0x1e10 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1ec0 &req={4,2} ?trans5;
MOV R4, R12 ?trans1;
MOV R5, R13 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR8, c[0x0][0x388] &wr=0x0 ?trans1;
F2I.U32.F64.TRUNC R5, R4 &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R2, R3, UR8, R0 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR4 &req={3} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR6][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R12, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x26a0 ?trans1;
LOP3.LUT R21, R7.reuse, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R13, 0x1ca00000 ?trans1;
FSETP.GEU.AND P0, PT, |R7|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R4, R7, 0x800fffff, RZ, 0xc0, !PT ?trans2;
ISETP.GE.U32.AND P1, PT, R12, R21, PT ?trans1;
MOV R10, R8 ?trans1;
LOP3.LUT R5, R4, 0x3ff00000, RZ, 0xfc, !PT ?WAIT3_END_GROUP;
@!P2 LOP3.LUT R11, R7, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P2 MOV R18, RZ ?trans1;
MOV R4, R6 ?trans1;
MOV R20, R12 ?trans2;
@!P2 ISETP.GE.U32.AND P3, PT, R12, R11, PT ?trans1;
SEL R11, R13.reuse, 0x63400000, !P1 ?trans1;
MOV R14, 0x1 ?trans1;
@!P0 DMUL R4, R6, 8.98846567431157953865e+307 &wr=0x0 ?trans2;
@!P2 SEL R19, R13, 0x63400000, !P3 ?trans1;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?trans1;
MUFU.RCP64H R15, R5 &req={0} &wr=0x0 ?trans1;
@!P0 LOP3.LUT R21, R5, 0x7ff00000, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
@!P2 LOP3.LUT R19, R19, 0x80000000, R9, 0xf8, !PT ?trans2;
IADD3 R23, PT, PT, R21, -0x1, RZ ?trans2;
@!P2 LOP3.LUT R19, R19, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT8_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R18 &wr=0x1 ?trans2;
@!P2 LOP3.LUT R20, R11, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R20, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R16, R16, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R16, R14, R16, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, -R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R16, R14, R16 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R14, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R4, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x2550 &req={1,0} ?trans5;
LOP3.LUT R9, R7, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R12.reuse, -R9.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R12, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R13, R13, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R16, PT, PT, -R13, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R16, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R12, R14, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R13|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x2690 ?trans5;
DFMA R4, R14, -R4, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R5.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R7, R5, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R7, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x2690 ?trans5;
IADD3 R5, PT, PT, -R16, RZ, RZ ?trans1;
MOV R4, RZ ?trans1;
DMUL.RP R8, R14, R8 &wr=0x0 ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R12, -R4, R14 &wr=0x0 ?trans2;
IADD3 R4, PT, PT, -R16, -0x43300000, RZ &req={0} ?WAIT5_END_GROUP;
FSETP.NEU.AND P0, PT, |R5|, R4, PT ?WAIT5_END_GROUP;
FSEL R12, R8, R12, !P0 ?trans1;
FSEL R13, R7, R13, !P0 ?trans1;
BRA 0x2690 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x2670 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R6, R6, PT &wr=0x0 ?trans2;
@P0 BRA 0x2640 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R20, R21, PT ?trans1;
MOV.64 R12, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x2690 ?trans5;
ISETP.NE.AND P0, PT, R20, 0x7ff00000, PT ?trans1;
LOP3.LUT R13, R9, 0x80000000, R7, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R21, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R4, R13, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R12, RZ ?trans1;
@P0 MOV R12, RZ ?WAIT3_END_GROUP;
@P0 MOV R13, R4 ?trans1;
BRA 0x2690 ?trans6;
LOP3.LUT R13, R7, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R6 ?trans1;
BRA 0x2690 ?trans6;
LOP3.LUT R13, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R12, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R4, R2 ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x26d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mean_filter_gpu(unsigned char*, int, int, unsigned char*, int)
_Z15mean_filter_gpuPhiiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x8
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
v_cmp_gt_i32_e32 vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s5, v1
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_10
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s8, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s2, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshr_b32 s3, s2, 31
s_add_i32 s2, s2, s3
s_add_i32 s3, s4, -1
s_ashr_i32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v5, s2, v1
v_add_nc_u32_e32 v3, s2, v0
v_subrev_nc_u32_e32 v2, s2, v0
v_subrev_nc_u32_e32 v4, s2, v1
s_add_i32 s2, s5, -1
v_cmp_gt_i32_e32 vcc_lo, s4, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_max_i32_e32 v8, 0, v2
v_max_i32_e32 v2, 0, v4
v_cndmask_b32_e32 v9, s3, v3, vcc_lo
v_cmp_gt_i32_e32 vcc_lo, s5, v5
s_mov_b32 s5, exec_lo
v_cndmask_b32_e32 v10, s2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmpx_ge_i32_e64 v9, v8
s_cbranch_execz .LBB0_9
s_load_b64 s[6:7], s[0:1], 0x0
v_mad_u64_u32 v[5:6], null, s4, v8, v[2:3]
v_cmp_ge_i32_e32 vcc_lo, v10, v2
v_dual_mov_b32 v12, v8 :: v_dual_add_nc_u32 v11, -1, v2
.LBB0_3:
s_and_saveexec_b32 s9, vcc_lo
s_cbranch_execz .LBB0_7
s_delay_alu instid0(VALU_DEP_1)
v_ashrrev_i32_e32 v7, 31, v5
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, s2, s6, v5
v_mov_b32_e32 v13, v11
s_mov_b32 s10, 0
v_add_co_ci_u32_e64 v7, s2, s7, v7, s2
.LBB0_5:
global_load_u8 v14, v[6:7], off
v_add_nc_u32_e32 v13, 1, v13
v_add_co_u32 v6, s3, v6, 1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s3, 0, v7, s3
v_cmp_ge_i32_e64 s2, v13, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 s10, s2, s10
s_waitcnt vmcnt(0)
v_cvt_f64_u32_e32 v[14:15], v14
v_add_f64 v[3:4], v[3:4], v[14:15]
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB0_5
s_or_b32 exec_lo, exec_lo, s10
.LBB0_7:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v6, 1, v12
v_cmp_ge_i32_e64 s2, v12, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_dual_mov_b32 v12, v6 :: v_dual_add_nc_u32 v5, s4, v5
s_or_b32 s8, s2, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s8
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_or_b32 exec_lo, exec_lo, s5
v_sub_nc_u32_e32 v2, v10, v2
v_sub_nc_u32_e32 v7, v9, v8
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 1, v2
v_mad_u64_u32 v[5:6], null, v2, v7, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f64_i32_e32 v[5:6], v5
v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[9:10], v[7:8]
s_waitcnt_depctr 0xfff
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
v_div_scale_f64 v[11:12], vcc_lo, v[3:4], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[13:14], v[11:12], v[9:10]
v_fma_f64 v[7:8], -v[7:8], v[13:14], v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
v_div_fixup_f64 v[2:3], v[7:8], v[5:6], v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_i32_f64_e32 v4, v[2:3]
v_mad_u64_u32 v[2:3], null, v0, s4, v[1:2]
v_ashrrev_i32_e32 v1, 31, v2
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b8 v[0:1], v4, off
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mean_filter_gpu | 11,517 | 2,567 | stackv2-00000-of-00015 |
// Demangled: calculation(int*, int*, int*, int, int)
Function : _Z11calculationPiS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculation(int*, int*, int*, int, int)
_Z11calculationPiS_S_ii:
s_endpgm
| calculation | 97 | 17 | stackv2-00000-of-00015 |
// Demangled: void reduce6<512u>(double*, double*, unsigned int)
Function : _Z7reduce6ILj512EEvPdS0_j
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR5, SR_CgaCtaId &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x2 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
S2R R0, SR_CTAID.X &wr=0x4 ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={1} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans5;
LEA R2, R3, UR4, 0x3 &req={2} ?trans1;
IMAD.SHL.U32 R4, R0, 0x400, RZ &req={4} ?WAIT4_END_GROUP;
STS.64 [R2], RZ &rd=0x2 ?trans1;
LOP3.LUT R6, R4, R3, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R6, UR5, PT &req={1} ?WAIT13_END_GROUP;
@P0 BRA 0x240 &req={3,2,0} ?trans5;
LDC R14, c[0x0][0x370] &wr=0x0 ?trans1;
MOV.64 R4, RZ ?trans2;
BSSY.RECONVERGENT B1, 0x230 ?trans1;
MOV R15, R6 ?WAIT4_END_GROUP;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans3;
IADD3 R9, PT, PT, R15.reuse, 0x200, RZ ?trans1;
IMAD.WIDE.U32 R6, R15, 0x8, R12 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R9, 0x8, R12 ?trans2;
LDG.E.64 R6, desc[UR6][R6.64] &wr=0x2 ?trans4;
LDG.E.64 R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD R15, R14, 0x400, R15 &req={0} ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R15, UR5, PT ?trans1;
DADD R10, R6, R8 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R10, R4 &req={0} &rd=0x2 &wr=0x3 ?trans2;
@!P0 BRA 0x140 &req={3,2} ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
STS.64 [R2], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3.reuse, 0xff, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R3.reuse, 0x7f, PT ?trans1;
ISETP.NE.AND P2, PT, R3, RZ, PT ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0x6a0 ?trans8;
@!P0 LDS.64 R4, [R2+0x800] &req={0} ?trans4;
@!P0 LDS.64 R6, [R2] &wr=0x0 ?trans2;
@!P0 DADD R4, R4, R6 &req={0} &wr=0x0 ?trans2;
@!P0 STS.64 [R2], R4 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R3, 0x3f, PT ?WAIT5_END_GROUP;
@!P1 LDS.64 R6, [R2+0x400] ?trans4;
@!P1 LDS.64 R8, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DADD R6, R6, R8 &req={0} &wr=0x0 ?trans2;
@!P1 STS.64 [R2], R6 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P1, PT, R3, 0x1f, PT ?WAIT5_END_GROUP;
@!P0 LDS.64 R8, [R2+0x200] ?trans4;
@!P0 LDS.64 R10, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P0 DADD R8, R8, R10 &req={0} &wr=0x0 ?trans2;
@!P0 STS.64 [R2], R8 &req={0} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x690 ?trans5;
LDS.64 R4, [R2+0x100] ?trans4;
LDS.64 R6, [R2] &wr=0x1 ?trans2;
DADD R4, R4, R6 &req={1} &wr=0x1 ?trans2;
STS.64 [R2], R4 &req={1} ?trans4;
LDS.64 R6, [R2+0x80] ?trans4;
LDS.64 R8, [R2] &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R8 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R6 &req={0} ?trans4;
LDS.64 R8, [R2+0x40] ?trans4;
LDS.64 R10, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R8, R8, R10 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R8 &req={0} ?trans4;
LDS.64 R10, [R2+0x20] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R10, R10, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R10 &req={0} ?trans4;
LDS.64 R4, [R2+0x10] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R4, R4, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R4 &req={0} ?trans4;
LDS.64 R6, [R2+0x8] ?trans4;
LDS.64 R12, [R2] &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT9_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DADD R6, R6, R12 &req={0} &wr=0x0 ?trans2;
STS.64 [R2], R6 &req={0} &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P2 EXIT ?trans5;
LDS.64 R2, [UR4] &req={1,0} &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD.WIDE.U32 R4, R0, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R4.64], R2 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x710;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: void reduce6<512u>(double*, double*, unsigned int)
_Z7reduce6ILj512EEvPdS0_j:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_mov_b32 s2, s15
v_lshl_add_u32 v5, v0, 3, 0
v_lshl_or_b32 v1, s2, 10, v0
s_mov_b32 s9, 0
v_mov_b32_e32 v3, v2
v_mov_b32_e32 v4, v2
s_mov_b32 s8, exec_lo
ds_store_b64 v5, v[3:4]
s_waitcnt lgkmcnt(0)
v_cmpx_gt_u32_e64 s3, v1
s_cbranch_execz .LBB0_4
s_load_b32 s0, s[0:1], 0x18
v_mov_b32_e32 v3, 0
v_mov_b32_e32 v4, 0
s_waitcnt lgkmcnt(0)
s_lshl_b32 s0, s0, 10
.LBB0_2:
v_dual_mov_b32 v7, v2 :: v_dual_add_nc_u32 v6, 0x200, v1
v_lshlrev_b64 v[8:9], 3, v[1:2]
v_add_nc_u32_e32 v1, s0, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 3, v[6:7]
v_add_co_u32 v8, vcc_lo, s4, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s3, v1
s_clause 0x1
global_load_b64 v[8:9], v[8:9], off
global_load_b64 v[6:7], v[6:7], off
s_or_b32 s9, vcc_lo, s9
s_waitcnt vmcnt(0)
v_add_f64 v[6:7], v[8:9], v[6:7]
s_delay_alu instid0(VALU_DEP_1)
v_add_f64 v[3:4], v[3:4], v[6:7]
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_2
s_or_b32 exec_lo, exec_lo, s9
ds_store_b64 v5, v[3:4]
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 0x100, v0
s_cbranch_execz .LBB0_6
ds_load_b64 v[1:2], v5 offset:2048
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 0x80, v0
s_cbranch_execz .LBB0_8
ds_load_b64 v[1:2], v5 offset:1024
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s0, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 64, v0
s_cbranch_execz .LBB0_10
ds_load_b64 v[1:2], v5 offset:512
ds_load_b64 v[3:4], v5
s_waitcnt lgkmcnt(0)
v_add_f64 v[1:2], v[1:2], v[3:4]
ds_store_b64 v5, v[1:2]
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e32 32, v0
s_cbranch_execz .LBB0_12
v_add_nc_u32_e32 v1, 0x100, v5
v_cmp_ne_u32_e64 s0, -1, v5
s_mov_b64 s[4:5], src_shared_base
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ne_u32_e32 vcc_lo, -1, v1
v_cndmask_b32_e64 v2, 0, s5, s0
v_cndmask_b32_e32 v3, 0, v1, vcc_lo
v_cndmask_b32_e64 v4, 0, s5, vcc_lo
v_cndmask_b32_e64 v1, 0, v5, s0
flat_load_b64 v[3:4], v[3:4] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 0x80, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 64, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 32, v5
s_delay_alu instid0(VALU_DEP_1)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_add_nc_u32_e32 v6, 16, v5
v_add_nc_u32_e32 v5, 8, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_cmp_ne_u32_e32 vcc_lo, -1, v6
v_cndmask_b32_e32 v6, 0, v6, vcc_lo
v_cndmask_b32_e64 v7, 0, s5, vcc_lo
v_cmp_ne_u32_e32 vcc_lo, -1, v5
v_cndmask_b32_e32 v5, 0, v5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[6:7] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[6:7], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[6:7]
v_cndmask_b32_e64 v6, 0, s5, vcc_lo
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
flat_load_b64 v[3:4], v[5:6] glc dlc
s_waitcnt vmcnt(0)
flat_load_b64 v[5:6], v[1:2] glc dlc
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_f64 v[3:4], v[3:4], v[5:6]
flat_store_b64 v[1:2], v[3:4] dlc
s_waitcnt_vscnt null, 0x0
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s1
s_mov_b32 s3, 0
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_14
v_mov_b32_e32 v2, 0
s_lshl_b64 s[0:1], s[2:3], 3
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s0, s6, s0
s_addc_u32 s1, s7, s1
ds_load_b64 v[0:1], v2
s_waitcnt lgkmcnt(0)
global_store_b64 v2, v[0:1], s[0:1]
.LBB0_14:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| void_reduce6_512u_ | 2,367 | 3,121 | stackv2-00000-of-00015 |
// Demangled: process_kernel2(float*, float*, int)
Function : _Z15process_kernel2PfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Z ?trans1;
S2R R0, SR_TID.Z &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x4 ?trans4;
S2UR UR7, SR_CTAID.Y &wr=0x4 ?trans1;
S2R R5, SR_TID.X &wr=0x5 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x5 ?trans1;
LDCU UR10, c[0x0][0x364] &wr=0x3 ?trans5;
S2UR UR8, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x368] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR6, UR7 &req={4} ?WAIT4_END_GROUP;
UIMAD UR4, UR4, UR5, UR8 &req={2} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans5;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR10, R3 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R0, UR9, R5 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &rd=0x0 &wr=0x2 ?trans1;
HFMA2 R9, -RZ, RZ, 1.5048828125, 33.21875 ?trans1;
LDC.64 R2, c[0x0][0x388] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?trans1;
FSETP.GEU.AND P0, PT, R0, 1.175494350822287508e-38, PT &req={2} ?WAIT13_END_GROUP;
@!P0 FMUL R0, R0, 8388608 ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, R0.reuse, -0x3f2aaaab, RZ ?trans1;
FSETP.NEU.AND P1, PT, R0, RZ, PT ?WAIT3_END_GROUP;
LOP3.LUT R7, R4, 0xff800000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R0, -R7.reuse, RZ ?trans2;
I2FP.F32.S32 R7, R7 ?WAIT3_END_GROUP;
FADD R6, R4, -1 ?trans1;
FSEL R4, RZ, -23, P0 ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x7f7fffff, PT ?trans2;
FFMA R9, R6.reuse, -R9, 0.14084610342979431152 ?trans2;
FFMA R4, R7, 1.1920928955078125e-07, R4 ?trans1;
MOV R7, 0x7f800000 ?trans1;
FFMA R9, R6, R9, -0.12148627638816833496 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.13980610668659210205 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.16684235632419586182 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.20012299716472625732 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.24999669194221496582 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, 0.33333182334899902344 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, -0.5 ?WAIT4_END_GROUP;
FMUL R9, R6, R9 ?WAIT4_END_GROUP;
FFMA R9, R6, R9, R6 ?WAIT4_END_GROUP;
FFMA R4, R4, 0.69314718246459960938, R9 ?trans1;
@P0 FFMA R4, R0, R7, +INF ?WAIT5_END_GROUP;
FSEL R5, R4, -INF , P1 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x360;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: process_kernel2(float*, float*, int)
_Z15process_kernel2PfS_i:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x24
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s14
s_mul_i32 s2, s3, s2
s_and_b32 s3, s5, 0xffff
s_add_i32 s2, s2, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
v_bfe_u32 v1, v0, 10, 10
s_load_b32 s2, s[0:1], 0x10
s_lshr_b32 s3, s4, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
v_and_b32_e32 v2, 0x3ff, v0
s_and_b32 s3, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB1_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e32 vcc_lo, 0x800000, v2
v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
v_mul_f32_e32 v2, v2, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_log_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v3, 0x3f317217, v2
v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
v_fma_f32 v4, 0x3f317217, v2, -v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmamk_f32 v4, v2, 0x3377d1cf, v4
v_add_f32_e32 v3, v3, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v2, v2, v3, s0
v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_sub_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| process_kernel2 | 1,546 | 1,222 | stackv2-00000-of-00015 |
// Demangled: process_kernel3(float*, float*, int)
Function : _Z15process_kernel3PfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
S2UR UR4, SR_CTAID.Z ?trans1;
S2R R0, SR_TID.Z &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans1;
S2R R3, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR6, c[0x0][0x374] &wr=0x4 ?trans4;
S2UR UR7, SR_CTAID.Y &wr=0x4 ?trans1;
S2R R5, SR_TID.X &wr=0x5 ?trans1;
LDCU UR9, c[0x0][0x360] &wr=0x5 ?trans1;
LDCU UR10, c[0x0][0x364] &wr=0x3 ?trans5;
S2UR UR8, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x368] &wr=0x1 ?trans1;
UIMAD UR4, UR4, UR6, UR7 &req={4} ?WAIT4_END_GROUP;
UIMAD UR4, UR4, UR5, UR8 &req={2} ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans5;
IMAD R0, R7, UR4, R0 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, UR10, R3 &req={3} ?WAIT4_END_GROUP;
IMAD R5, R0, UR9, R5 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
IADD3 R4, PT, PT, R0, -0xd000000, RZ &req={2} ?trans1;
MUFU.RSQ R7, R0 &rd=0x0 &wr=0x1 ?trans4;
ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x200 &req={0} ?trans5;
MOV R9, 0x1f0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x290 &req={1} ?trans5;
BRA 0x240 ?trans5;
FMUL.FTZ R3, R0, R7 &req={1} ?trans1;
FMUL.FTZ R7, R7, 0.5 ?WAIT3_END_GROUP;
FFMA R0, -R3, R3, R0 ?WAIT4_END_GROUP;
FFMA R7, R0, R7, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R7 ?trans1;
EXIT ?trans5;
LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 MOV R2, R0 ?trans1;
@!P0 BRA 0x3c0 ?trans6;
FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 MOV R2, 0x7fffffff ?trans1;
@!P0 BRA 0x3c0 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FADD.FTZ R2, R0, 1 ?trans1;
@P0 BRA 0x3c0 ?trans6;
FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?WAIT4_END_GROUP;
@P0 MUFU.RSQ R2, R3 &wr=0x0 ?trans2;
@P0 FMUL.FTZ R4, R3, R2 &req={0} ?trans1;
@P0 FMUL.FTZ R8, R2, 0.5 ?trans1;
@!P0 MOV R2, R0 ?trans2;
@P0 FADD.FTZ R6, -R4, -RZ ?WAIT4_END_GROUP;
@P0 FFMA R7, R4, R6, R3 ?WAIT4_END_GROUP;
@P0 FFMA R7, R7, R8, R4 ?WAIT4_END_GROUP;
@P0 FMUL.FTZ R2, R7, 2.3283064365386962891e-10 ?WAIT7_END_GROUP;
MOV R7, R2 ?trans1;
MOV R2, R9 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R2 0x0 ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: process_kernel3(float*, float*, int)
_Z15process_kernel3PfS_i:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b64 s[4:5], s[0:1], 0x24
v_bfe_u32 v1, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s3, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s3, s14
s_mul_i32 s2, s3, s2
s_and_b32 s3, s5, 0xffff
s_add_i32 s2, s2, s13
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[2:3], null, s2, s3, v[1:2]
v_bfe_u32 v1, v0, 10, 10
s_load_b32 s2, s[0:1], 0x10
s_lshr_b32 s3, s4, 16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, s3, v[1:2]
v_and_b32_e32 v2, 0x3ff, v0
s_and_b32 s3, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB2_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, 0x4f800000, v2
v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
v_cndmask_b32_e32 v2, v2, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_sqrt_f32_e32 v3, v2
s_waitcnt_depctr 0xfff
v_add_nc_u32_e32 v4, -1, v3
v_add_nc_u32_e32 v5, 1, v3
v_fma_f32 v6, -v4, v3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_fma_f32 v7, -v5, v3, v2
v_cmp_ge_f32_e64 s0, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e64 v3, v3, v4, s0
v_cmp_lt_f32_e64 s0, 0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v3, v3, v5, s0
v_mul_f32_e32 v4, 0x37800000, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cndmask_b32_e32 v3, v3, v4, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
v_cmp_class_f32_e64 vcc_lo, v2, 0x260
v_cndmask_b32_e32 v2, v3, v2, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| process_kernel3 | 1,551 | 1,338 | stackv2-00000-of-00015 |
// Demangled: curfil::gpu::generate_uniform_kernel(curandStateXORWOW*, unsigned int*)
Function : _ZN6curfil3gpu23generate_uniform_kernelEP17curandStateXORWOWPj
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R0, UR6, R5 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x30, R2 &req={3} ?WAIT5_END_GROUP;
LDG.E.64 R4, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R2.64+0x20] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R6, desc[UR4][R2.64+0x28] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R12, desc[UR4][R2.64+0x8] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R10, desc[UR4][R2.64+0x10] &rd=0x1 &wr=0x5 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x18] &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R18, -RZ, RZ, 0, 0 ?trans1;
MOV R14, RZ ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R0 ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R4, 0x161f14, RZ &req={2,1,0} ?WAIT7_END_GROUP;
SHF.R.U32.HI R20, RZ, 0x2, R5 ?trans1;
IMAD.SHL.U32 R22, R11, 0x10, RZ &req={5} ?trans1;
SHF.R.U32.HI R19, RZ, 0x2, R12 ?trans2;
LOP3.LUT R20, R20, R5, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R12, R19, R12, RZ, 0x3c, !PT ?trans2;
SHF.R.U32.HI R23, RZ, 0x2, R10 ?trans2;
IADD3 R5, PT, PT, R20, R20, RZ ?WAIT2_END_GROUP;
SHF.R.U32.HI R24, RZ, 0x2, R11 ?trans2;
IADD3 R25, PT, PT, R14, 0x1, RZ ?trans2;
IADD3 R18, PT, PT, R18, 0x8, RZ ?trans2;
LOP3.LUT R5, R11, R22, R5, 0x96, !PT ?trans2;
SHF.R.U32.HI R22, RZ, 0x2, R13 ?trans2;
LOP3.LUT R19, R5, R20, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
IADD3 R5, PT, PT, R12, R12, RZ ?trans2;
LOP3.LUT R22, R22, R13, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R20, R19, 0x10, RZ ?trans1;
LOP3.LUT R24, R24, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R19, R20, R5, 0x96, !PT ?trans1;
MOV R20, 0x2f800000 ?WAIT3_END_GROUP;
LOP3.LUT R13, R5, R12, RZ, 0x3c, !PT ?trans2;
IADD3 R5, PT, PT, R22, R22, RZ ?WAIT3_END_GROUP;
IMAD.SHL.U32 R12, R13, 0x10, RZ ?WAIT5_END_GROUP;
LOP3.LUT R21, R13, R12, R5, 0x96, !PT ?trans2;
LOP3.LUT R12, R23, R10, RZ, 0x3c, !PT ?trans2;
IADD3 R5, PT, PT, R16.reuse, -0x10974f, R19 ?trans2;
LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT ?trans2;
IADD3 R10, PT, PT, R16, -0xb0f8a, R13 ?trans2;
I2FP.F32.U32 R5, R5 ?WAIT2_END_GROUP;
I2FP.F32.U32 R23, R10 ?trans1;
IMAD.SHL.U32 R10, R21, 0x10, RZ ?trans1;
IADD3 R22, PT, PT, R12, R12, RZ ?trans1;
FFMA R5, R5, R20.reuse, 1.1641532182693481445e-10 ?trans2;
FFMA R23, R23, R20, 1.1641532182693481445e-10 ?trans1;
LOP3.LUT R11, R21, R10, R22, 0x96, !PT ?trans2;
FSETP.GT.AND P0, PT, R5, 0.5, PT ?trans1;
IADD3 R10, PT, PT, R16, -0x587c5, R21 ?trans2;
LOP3.LUT R5, R11, R12, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
I2FP.F32.U32 R11, R10 ?trans2;
IADD3 R12, PT, PT, R24, R24, RZ ?trans1;
IMAD.SHL.U32 R10, R5, 0x10, RZ ?trans1;
FSETP.GT.AND P1, PT, R23, 0.5, PT ?trans1;
SHF.R.U32.HI R22, RZ, 0x2, R19 ?trans1;
FFMA R11, R11, R20, 1.1641532182693481445e-10 ?trans2;
LOP3.LUT R23, R5.reuse, R10, R12, 0x96, !PT ?trans2;
IADD3 R10, PT, PT, R5, R16, RZ ?WAIT2_END_GROUP;
LOP3.LUT R22, R22, R19, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R12, R23, R24, RZ, 0x3c, !PT ?trans2;
@!P0 IADD3 R25, PT, PT, R14, RZ, RZ ?trans1;
FSETP.GT.AND P0, PT, R11, 0.5, PT ?trans1;
I2FP.F32.U32 R19, R10 ?trans1;
IMAD.SHL.U32 R11, R12, 0x10, RZ ?trans1;
IADD3 R10, PT, PT, R22, R22, RZ ?trans2;
SHF.R.U32.HI R14, RZ, 0x2, R13 ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R23, PT, PT, R25, 0x1, RZ ?WAIT2_END_GROUP;
LOP3.LUT R11, R12, R11, R10, 0x96, !PT ?trans2;
LOP3.LUT R14, R14, R13, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R13, R11, R22, RZ, 0x3c, !PT ?trans2;
@!P1 IADD3 R23, PT, PT, R25, RZ, RZ ?trans1;
FSETP.GT.AND P1, PT, R19, 0.5, PT ?trans1;
IADD3 R19, PT, PT, R16, 0x587c5, R12 ?trans1;
IMAD.SHL.U32 R10, R13, 0x10, RZ ?trans1;
IADD3 R11, PT, PT, R14, R14, RZ ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R16, 0xb0f8a, R13 ?trans2;
I2FP.F32.U32 R19, R19 ?trans2;
LOP3.LUT R11, R13, R10, R11, 0x96, !PT ?trans2;
SHF.R.U32.HI R10, RZ, 0x2, R21 ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R24, PT, PT, R23.reuse, 0x1, RZ ?trans2;
@!P0 IADD3 R24, PT, PT, R23, RZ, RZ ?WAIT2_END_GROUP;
LOP3.LUT R21, R10, R21, RZ, 0x3c, !PT ?trans2;
LOP3.LUT R10, R11, R14, RZ, 0x3c, !PT ?trans2;
I2FP.F32.U32 R23, R22 ?trans1;
FSETP.GT.AND P0, PT, R19, 0.5, PT ?trans1;
IADD3 R19, PT, PT, R16, 0x10974f, R10 ?trans1;
IMAD.SHL.U32 R11, R10, 0x10, RZ ?trans1;
IADD3 R14, PT, PT, R21, R21, RZ ?trans1;
FFMA R23, R23, R20, 1.1641532182693481445e-10 ?trans1;
I2FP.F32.U32 R19, R19 ?WAIT2_END_GROUP;
IADD3 R25, PT, PT, R24.reuse, 0x1, RZ ?trans2;
@!P1 IADD3 R25, PT, PT, R24, RZ, RZ ?trans2;
LOP3.LUT R14, R10, R11, R14, 0x96, !PT ?trans1;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
FSETP.GT.AND P1, PT, R23, 0.5, PT ?trans1;
IADD3 R22, PT, PT, R25.reuse, 0x1, RZ ?trans2;
LOP3.LUT R11, R14, R21, RZ, 0x3c, !PT ?trans2;
@!P0 IADD3 R22, PT, PT, R25, RZ, RZ ?trans1;
FSETP.GT.AND P0, PT, R19, 0.5, PT ?trans1;
IADD3 R14, PT, PT, R16, 0x161f14, R11 ?WAIT2_END_GROUP;
IADD3 R16, PT, PT, R16, 0x2c3e28, RZ ?trans2;
IADD3 R21, PT, PT, R22.reuse, 0x1, RZ ?trans2;
I2FP.F32.U32 R19, R14 ?trans2;
@!P1 IADD3 R21, PT, PT, R22, RZ, RZ ?WAIT3_END_GROUP;
FFMA R19, R19, R20, 1.1641532182693481445e-10 ?trans1;
IADD3 R20, PT, PT, R21.reuse, 0x1, RZ ?trans2;
@!P0 IADD3 R20, PT, PT, R21, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R18, 0x2710, PT ?trans1;
FSETP.GT.AND P1, PT, R19, 0.5, PT ?trans2;
IADD3 R14, PT, PT, R20, 0x1, RZ ?WAIT11_END_GROUP;
@!P1 IADD3 R14, PT, PT, R20, RZ, RZ ?trans1;
@P0 BRA 0x120 ?trans6;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R4, PT, PT, R4, -0x27f880b0, RZ ?trans1;
STG.E.64 desc[UR4][R2.64+0x8], R12 ?trans4;
STG.E.64 desc[UR4][R2.64+0x10], R10 ?trans4;
STG.E.64 desc[UR4][R2.64+0x18], R8 ?trans4;
STG.E.64 desc[UR4][R2.64+0x28], R6 ?trans1;
LEA R16, P0, R0, UR6, 0x2 &req={0} ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0x20], R15 ?trans1;
LEA.HI.X R17, R0, UR7, R17, 0x2, P0 ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R2.64], R4 ?trans4;
LDG.E R19, desc[UR4][R16.64] &wr=0x2 ?trans2;
IADD3 R19, PT, PT, R14, R19, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R16.64], R19 ?trans1;
EXIT ?trans5;
BRA 0x850;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: curfil::gpu::generate_uniform_kernel(hiprandState*, unsigned int*)
_ZN6curfil3gpu23generate_uniform_kernelEP12hiprandStatePj:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v12, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[10:11], null, s15, s4, v[0:1]
v_mad_i64_i32 v[8:9], null, v10, 48, s[0:1]
v_ashrrev_i32_e32 v11, 31, v10
s_movk_i32 s0, 0x2710
s_clause 0x2
global_load_b32 v7, v[8:9], off
global_load_b128 v[0:3], v[8:9], off offset:24
global_load_b32 v13, v[8:9], off offset:40
s_waitcnt vmcnt(2)
v_add_nc_u32_e32 v14, 0x587c5, v7
.LBB1_1:
s_waitcnt vmcnt(1)
v_lshrrev_b32_e32 v4, 2, v0
s_waitcnt vmcnt(0)
v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v3, v13
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
s_cmp_eq_u32 s0, 0
v_xor_b32_e32 v0, v4, v0
v_lshlrev_b32_e32 v4, 4, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b32_e32 v5, 1, v0
v_xor_b32_e32 v4, v4, v5
v_mov_b32_e32 v5, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor3_b32 v13, v4, v3, v0
v_mov_b32_e32 v4, v1
v_add_nc_u32_e32 v0, v14, v13
v_add_nc_u32_e32 v14, 0x587c5, v14
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cvt_f32_u32_e32 v2, v0
v_mov_b32_e32 v0, v1
v_mov_b32_e32 v1, v5
v_dual_fmaak_f32 v15, 0x2f800000, v2, 0x2f800000 :: v_dual_mov_b32 v2, v6
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_f32_e32 vcc_lo, 0.5, v15
v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
s_cbranch_scc0 .LBB1_1
v_lshlrev_b64 v[0:1], 2, v[10:11]
v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v2, 0xd8077f50, v7
s_clause 0x2
global_store_b32 v[8:9], v2, off
global_store_b128 v[8:9], v[4:7], off offset:24
global_store_b32 v[8:9], v13, off offset:40
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v2, v12
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| curfil__gpu__generate_uniform_kernel | 3,959 | 1,178 | stackv2-00000-of-00015 |
// Demangled: curfil::gpu::setup_kernel(int, curandStateXORWOW*)
Function : _ZN6curfil3gpu12setup_kernelEiP17curandStateXORWOW
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_TID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R3, -RZ, RZ, -178.125, -3742 ?trans1;
BSSY.RECONVERGENT B0, 0xee0 ?trans5;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC R8, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x4 ?trans1;
ISETP.GT.AND P0, PT, R0.reuse, -0x1, PT &req={2} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
SEL R3, R3, 0x8bf16996, P0 ?trans1;
IMAD R0, R0, 0x4182bed5, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
IADD3 R5, PT, PT, R0.reuse, 0x75bcd15, RZ ?trans2;
IADD3 R4, PT, PT, R3.reuse, 0x64f0c9, R0 ?trans2;
LOP3.LUT R10, R0, 0x159a55e5, RZ, 0x3c, !PT ?trans1;
IMAD R8, R8, UR6, R9 &req={1} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={4} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R6.64], R4 &req={3} &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &rd=0x1 ?trans4;
STG.E.64 desc[UR4][R6.64+0x10], R12 &rd=0x1 ?trans1;
@!P0 BRA 0xed0 &req={0} ?trans5;
IADD.64 R10, R6, 0x4 &req={1} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xe60 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xe50 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR4][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR4][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR4][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR4][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR4][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR4][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR4][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR4][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR4][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR4][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR4][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR4][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR4][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR4][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR4][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR4][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR4][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR4][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR4][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR4][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR4][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR4][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR4][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR4][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR4][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR4][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR4][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR4][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR4][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR4][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR4][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR4][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR4][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR4][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR4][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR4][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR4][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR4][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR4][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR4][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR4][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR4][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR4][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR4][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR4][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR4][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR4][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR4][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR4][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR4][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR4][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR4][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR4][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR4][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR4][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR4][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR4][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR4][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR4][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR4][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR4][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR4][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR4][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR4][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR4][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR4][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR4][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR4][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR4][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR4][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR4][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR4][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR4][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x300 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x290 ?trans5;
STG.E.64 desc[UR4][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR4][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x250 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x1d0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR4][R6.64+0x18], RZ ?trans4;
STG.E desc[UR4][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR4][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: curfil::gpu::setup_kernel(int, hiprandState*)
_ZN6curfil3gpu12setup_kernelEiP12hiprandState:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x1
s_load_b32 s4, s[2:3], 0x1c
s_load_b32 s5, s[2:3], 0x0
s_mov_b32 s6, 0x8a5d614f
v_bfe_u32 v2, v0, 10, 10
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_and_b32 s4, s4, 0xffff
s_xor_b32 s7, s5, 0x2c7f967f
s_cmp_gt_i32 s5, -1
s_mul_i32 s7, s7, 0x493c4aa1
s_cselect_b32 s6, s6, 0xfa091aa4
s_add_i32 s8, s7, 0x583f19
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_dual_mov_b32 v4, s8 :: v_dual_and_b32 v1, 0x3ff, v0
s_mul_i32 s0, s0, s1
v_bfe_u32 v0, v0, 20, 10
v_mul_u32_u24_e32 v2, s1, v2
v_mul_lo_u32 v3, s0, v1
s_add_i32 s0, s7, 0x75bcd15
s_xor_b32 s1, s7, 0x159a55e5
s_xor_b32 s5, s6, 0x5491333
v_mad_u64_u32 v[5:6], null, s15, s4, v[1:2]
s_add_i32 s4, s6, 0x1f123bb5
s_add_i32 s6, s7, s6
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v2, v3, v2, v0
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
s_add_i32 s0, s6, 0x64f0c9
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_3)
v_mul_lo_u32 v8, v2, 48
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
v_mov_b32_e32 v7, s0
s_mov_b32 s7, 0
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v7, v4 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x8
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| curfil__gpu__setup_kernel | 7,960 | 3,111 | stackv2-00000-of-00015 |
// Demangled: prefix_scan_device(float*, float*, int)
Function : _Z18prefix_scan_devicePfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: prefix_scan_device(float*, float*, int)
_ZL18prefix_scan_devicePfS_i:
s_endpgm
| prefix_scan_device | 97 | 18 | stackv2-00000-of-00015 |
// Demangled: k_interpolate_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z17k_interpolate_gpuiiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R10, UR5, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R0, R0, R11, RZ ?trans2;
IMAD R3, R2, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R7, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
IMAD R2, R2, UR4, RZ &req={1} ?trans1;
ISETP.GT.AND P0, PT, R7, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x180 &req={2} ?trans5;
LDC.64 R6, c[0x0][0x3b0] &wr=0x0 ?trans2;
IMAD.WIDE R4, R3, 0x4, R6 &req={0} ?trans1;
IADD3 R3, PT, PT, R2, R3, RZ ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], RZ &rd=0x1 ?trans1;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x120 &req={1} ?trans5;
EXIT ?trans5;
LDCU UR4, c[0x0][0x384] &wr=0x0 ?trans1;
LOP3.LUT R4, R7.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
IMAD R6, R10, R11, RZ ?trans1;
LOP3.LUT R8, R7.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR12, c[0x0][0x398] &wr=0x1 ?trans1;
LOP3.LUT R7, R7, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R5, PT, PT, R4, -0x1, RZ ?trans2;
IADD3 R8, PT, PT, -R8, RZ, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ?trans1;
IMAD R5, R10, UR4, RZ &req={0} ?WAIT12_END_GROUP;
LDC R10, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IABS R9, R6 ?trans1;
CS2R R26, SRZ &req={4,3,2} ?WAIT3_END_GROUP;
I2F.RP R16, R9 &wr=0x2 ?trans2;
MUFU.RCP R16, R16 &req={2} &wr=0x2 ?trans1;
IABS R11, R10 &req={0} ?WAIT4_END_GROUP;
I2F.RP R17, R11 &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R16, 0xffffffe, RZ &req={2} ?trans2;
IABS R16, R3 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x2 &wr=0x3 ?trans1;
MUFU.RCP R17, R17 &req={0} &wr=0x0 ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R18, PT, PT, RZ, -R13, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R19, R18, R9, RZ ?trans1;
IABS R18, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R13, R19, R12 ?trans1;
IADD3 R14, PT, PT, R17, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R13, PT, PT, RZ, -R18, RZ ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R15, R14 &rd=0x0 &wr=0x2 ?trans2;
MOV R14, RZ &req={0} ?trans1;
IADD3 R20, PT, PT, RZ, -R15, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R17, R20, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R15, R15, R17, R14 ?WAIT4_END_GROUP;
IMAD.HI.U32 R14, R12, R16, RZ ?WAIT4_END_GROUP;
IMAD R12, R14, R13, R16 ?trans2;
IMAD.HI.U32 R15, R15, R16, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R9, R12, PT ?trans2;
IADD3 R13, PT, PT, -R15, RZ, RZ ?WAIT5_END_GROUP;
IMAD R16, R11, R13, R16 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P3, PT, R11, R16, PT ?trans1;
@!P2 IADD3 R12, PT, PT, R12, -R9, RZ ?trans2;
@!P2 IADD3 R14, PT, PT, R14, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P4, PT, R12, R9, PT ?trans1;
LOP3.LUT R9, R3, R6, RZ, 0x3c, !PT ?trans1;
LDC.64 R12, c[0x0][0x3b0] &wr=0x0 ?trans4;
ISETP.GE.AND P2, PT, R9, RZ, PT ?trans1;
@!P3 IADD3 R16, PT, PT, R16, -R11.reuse, RZ ?trans2;
@!P3 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
LDC R9, c[0x0][0x390] &wr=0x2 ?trans2;
ISETP.GE.U32.AND P1, PT, R16, R11, PT ?trans1;
LOP3.LUT R11, R3, R10, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P4 IADD3 R14, PT, PT, R14, 0x1, RZ ?trans1;
ISETP.NE.AND P4, PT, R6, RZ, PT ?trans2;
ISETP.GE.AND P3, PT, R11, RZ, PT ?trans1;
@!P2 IADD3 R14, PT, PT, -R14, RZ, RZ ?WAIT6_END_GROUP;
@P1 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
IMAD.WIDE R12, R3, 0x4, R12 &req={0} ?trans1;
ISETP.NE.AND P1, PT, R10, RZ, PT ?trans2;
@!P4 LOP3.LUT R14, RZ, R6, RZ, 0x33, !PT ?trans2;
STG.E desc[UR6][R12.64], RZ &rd=0x0 ?trans1;
MOV R16, R15 ?trans1;
ISETP.GE.U32.AND P2, PT, R9, 0x8, PT &req={2} ?trans1;
IMAD R14, R5, R14, RZ ?WAIT3_END_GROUP;
@!P3 IADD3 R16, PT, PT, -R16, RZ, RZ ?WAIT3_END_GROUP;
@!P1 LOP3.LUT R16, RZ, R10, RZ, 0x33, !PT ?trans1;
ISETP.NE.AND P1, PT, R4, RZ, PT ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans2;
IADD3 R11, PT, PT, -R16.reuse, RZ, RZ ?trans1;
IMAD R16, R16, R9, RZ ?WAIT4_END_GROUP;
IMAD R11, R10, R11, R3 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans1;
@!P2 BRA 0xbf0 &req={0} ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R21, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R20, R16, 0x4, RZ ?trans1;
CS2R R26, SRZ ?trans1;
MOV R30, R8 ?WAIT3_END_GROUP;
IADD.64 R18, R20.reuse, UR8 &req={0} ?trans2;
IADD.64 R20, R20, UR10 ?trans2;
IADD.64 R18, R18, 0x10 ?trans2;
IADD.64 R20, R20, 0x10 ?WAIT8_END_GROUP;
LDG.E R24, desc[UR6][R18.64+-0x10] &req={2} &wr=0x2 ?trans2;
IMAD R24, R24, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R14, R24 ?WAIT5_END_GROUP;
LEA R22, P2, R24, UR12, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R23, R24, UR13, R25, 0x2, P2 ?trans2;
LDG.E R24, desc[UR6][R20.64+-0x10] &wr=0x2 ?trans4;
LDG.E R22, desc[UR6][R22.64] &wr=0x2 ?trans2;
FFMA R27, R24, R22, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R28, desc[UR6][R18.64+-0xc] &wr=0x2 ?trans2;
IMAD R28, R28, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R29, RZ, 0x1f, R28 ?WAIT5_END_GROUP;
IADD.64 R28, R14, R28 ?WAIT5_END_GROUP;
LEA R24, P2, R28, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R28, UR13, R29, 0x2, P2 ?trans2;
LDG.E R28, desc[UR6][R20.64+-0xc] &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x2 ?trans2;
FFMA R31, R28, R24, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R18.64+-0x8] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+-0x8] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans2;
FFMA R27, R22, R28, R31 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R18.64+-0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+-0x4] &wr=0x1 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x1 ?trans2;
FFMA R31, R22, R24, R27 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R18.64] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans2;
FFMA R27, R22, R28, R31 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R18.64+0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x1 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x1 ?trans2;
FFMA R31, R22, R24, R27 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x2 ?trans4;
LDG.E R22, desc[UR6][R18.64+0x8] &wr=0x3 ?trans2;
IMAD R22, R22, R10, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x3 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x3 ?trans2;
FFMA R33, R22, R28, R31 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R33 &rd=0x2 ?trans4;
LDG.E R22, desc[UR6][R18.64+0xc] &wr=0x3 ?trans2;
IMAD R22, R22, R10, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R24, P2, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R20.64+0xc] &rd=0x1 &wr=0x0 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x0 ?trans1;
IADD3 R30, PT, PT, R30, 0x8, RZ ?trans1;
IADD.64 R18, R18, 0x20 ?WAIT3_END_GROUP;
IADD3 R26, PT, PT, R26, 0x8, RZ ?trans1;
ISETP.NE.AND P2, PT, R30, RZ, PT ?trans1;
IADD.64 R20, R20, 0x20 &req={1} ?trans2;
FFMA R27, R22, R24, R33 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x2 ?trans5;
@P2 BRA 0x690 ?trans5;
@!P1 BRA 0x12a0 ?trans5;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
@!P0 BRA 0xf40 ?WAIT12_END_GROUP;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x3 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R25, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R24, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R24, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R20.64] &wr=0x4 ?trans1;
IADD.64 R24, R24, UR10 ?trans2;
IMAD R22, R22, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R18, P2, R22, UR4, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R19, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R18.64] &wr=0x3 ?trans2;
FFMA R27, R22, R18, R27 &req={3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0x4] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x2 ?trans2;
FFMA R31, R22, R28, R27 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R31 &rd=0x3 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R18, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R19, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0x8] &wr=0x2 ?trans4;
LDG.E R18, desc[UR6][R18.64] &wr=0x2 ?trans2;
FFMA R33, R22, R18, R31 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R33 &rd=0x3 ?trans4;
LDG.E R22, desc[UR6][R20.64+0xc] &wr=0x2 ?trans2;
IMAD R22, R22, R10, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R14, R22 ?WAIT5_END_GROUP;
LEA R28, P2, R22, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R29, R22, UR5, R23, 0x2, P2 ?trans2;
LDG.E R22, desc[UR6][R24.64+0xc] &wr=0x0 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x0 ?trans1;
IADD3 R26, PT, PT, R26, 0x4, RZ ?trans1;
FFMA R27, R22, R28, R33 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x3 ?trans2;
@!P1 BRA 0x12a0 ?trans5;
ISETP.NE.AND P1, PT, R7, 0x1, PT ?trans1;
LOP3.LUT P2, RZ, R9, 0x1, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P1 BRA 0x1160 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x4 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R23, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R22, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R22, UR8 &req={0} ?WAIT6_END_GROUP;
LDG.E R24, desc[UR6][R18.64] &wr=0x5 ?trans1;
IADD.64 R22, R22, UR10 ?trans2;
IMAD R24, R24, R10, R11 &req={5} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R24, R14, R24 ?WAIT5_END_GROUP;
LEA R20, P1, R24, UR4, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R21, R24, UR5, R25, 0x2, P1 ?trans2;
LDG.E R24, desc[UR6][R22.64] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R20.64] &wr=0x4 ?trans2;
FFMA R9, R24, R20, R27 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R9 &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R18.64+0x4] &wr=0x4 ?trans2;
IMAD R24, R18, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R25, RZ, 0x1f, R24 ?WAIT5_END_GROUP;
IADD.64 R28, R14, R24 ?WAIT5_END_GROUP;
LEA R24, P1, R28, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R28, UR5, R29, 0x2, P1 ?trans2;
LDG.E R28, desc[UR6][R22.64+0x4] &wr=0x4 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x4 ?trans1;
IADD3 R26, PT, PT, R26, 0x2, RZ ?trans1;
FFMA R27, R28, R24, R9 &req={4,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x0 ?trans2;
@!P2 BRA 0x12a0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x4 ?trans1;
MOV R18, R26 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR4, c[0x0][0x398] &wr=0x5 ?trans4;
IADD.64 R18, R16, R18 ?WAIT5_END_GROUP;
SHF.L.U64.HI R17, R18.reuse, 0x2, R19 ?trans1;
IMAD.SHL.U32 R16, R18, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R16, UR8 &req={4} ?WAIT7_END_GROUP;
LDG.E R18, desc[UR6][R18.64] &wr=0x4 ?trans1;
IADD.64 R16, R16, UR10 ?WAIT7_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &req={2} &wr=0x2 ?trans1;
IMAD R10, R18, R10, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?WAIT5_END_GROUP;
IADD.64 R10, R14, R10 ?WAIT5_END_GROUP;
LEA R14, P1, R10, UR4, 0x2 &req={5} ?WAIT4_END_GROUP;
LEA.HI.X R15, R10, UR5, R11, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans2;
FFMA R27, R16, R14, R27 &req={3,2,0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R27 &rd=0x4 ?trans2;
IADD3 R3, PT, PT, R2, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P1 BRA 0x220 ?trans5;
EXIT &req={1} ?trans5;
BRA 0x12e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_interpolate_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
_Z17k_interpolate_gpuiiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s21, s4, 0xffff
s_mul_i32 s4, s19, s18
v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB3_6
s_load_b32 s13, s[0:1], 0x10
s_load_b32 s3, s[2:3], 0x0
v_mov_b32_e32 v9, 0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s13, 0
s_mul_i32 s3, s3, s21
s_cselect_b32 s14, -1, 0
s_ashr_i32 s15, s4, 31
s_ashr_i32 s16, s18, 31
s_add_i32 s4, s4, s15
s_add_i32 s5, s18, s16
s_xor_b32 s19, s4, s15
s_xor_b32 s20, s5, s16
v_cvt_f32_u32_e32 v0, s19
v_cvt_f32_u32_e32 v2, s20
s_sub_i32 s2, 0, s19
s_sub_i32 s4, 0, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s2, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x18
s_mul_i32 s1, s18, s17
s_mov_b32 s2, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v10, v0, v3
v_add_nc_u32_e32 v11, v2, v4
.LBB3_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s10, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s14
global_store_b32 v[3:4], v9, off
s_cbranch_vccnz .LBB3_5
v_add_nc_u32_e32 v0, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_mul_hi_u32 v5, v0, v10
v_mul_hi_u32 v6, v0, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v7, v5, s19
v_mul_lo_u32 v8, v6, s20
v_add_nc_u32_e32 v12, 1, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v7, v0, v7
v_sub_nc_u32_e32 v0, v0, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_subrev_nc_u32_e32 v13, s19, v7
v_cmp_le_u32_e32 vcc_lo, s19, v7
v_add_nc_u32_e32 v8, 1, v6
v_cmp_le_u32_e64 s0, s20, v0
v_cndmask_b32_e32 v5, v5, v12, vcc_lo
v_subrev_nc_u32_e32 v12, s20, v0
v_cndmask_b32_e32 v7, v7, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e64 v6, v6, v8, s0
v_xor_b32_e32 v13, s15, v2
v_add_nc_u32_e32 v8, 1, v5
v_cndmask_b32_e64 v0, v0, v12, s0
v_cmp_le_u32_e32 vcc_lo, s19, v7
v_add_nc_u32_e32 v12, 1, v6
v_xor_b32_e32 v2, s16, v2
s_mov_b32 s0, s13
v_cndmask_b32_e32 v5, v5, v8, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s20, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v5, v5, v13
v_cndmask_b32_e32 v0, v6, v12, vcc_lo
v_sub_nc_u32_e32 v5, v5, v13
v_mov_b32_e32 v13, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_xor_b32_e32 v0, v0, v2
v_mul_lo_u32 v5, s1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v0, v0, v2
v_mul_lo_u32 v7, v0, s13
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_mul_lo_u32 v0, v0, s18
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v8, 31, v7
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v5
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
v_add_co_u32 v7, vcc_lo, s8, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
.LBB3_4:
global_load_b32 v16, v[5:6], off
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s0, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[14:15], null, v16, s18, v[0:1]
v_ashrrev_i32_e32 v15, 31, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[14:15], 2, v[14:15]
v_add_co_u32 v14, vcc_lo, v2, v14
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v15, vcc_lo, v12, v15, vcc_lo
v_add_co_u32 v5, vcc_lo, v5, 4
global_load_b32 v16, v[7:8], off
global_load_b32 v14, v[14:15], off
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
v_add_co_u32 v7, vcc_lo, v7, 4
v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v13, v16, v14
global_store_b32 v[3:4], v13, off
s_cbranch_scc0 .LBB3_4
.LBB3_5:
v_add_nc_u32_e32 v1, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s2, vcc_lo, s2
s_and_not1_b32 exec_lo, exec_lo, s2
s_cbranch_execnz .LBB3_2
.LBB3_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| k_interpolate_gpu | 8,184 | 3,074 | stackv2-00000-of-00015 |
// Demangled: k_interpolate_grad_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z22k_interpolate_grad_gpuiiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R7, c[0x0][0x388] &wr=0x3 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R3, R6, UR6, R3 &req={1} ?WAIT5_END_GROUP;
IMAD R0, R7, UR4, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R2, c[0x0][0x390] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R2, 0x1, PT &req={0} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU UR4, c[0x0][0x370] &wr=0x0 ?trans1;
LOP3.LUT R5, R2.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R4, R7, UR5, RZ ?trans1;
LOP3.LUT R2, R2, 0x7, RZ, 0xc0, !PT ?trans1;
LDCU UR8, c[0x0][0x38c] &wr=0x1 ?trans1;
IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x3b0] &wr=0x3 ?trans1;
IMAD R6, R6, UR4, RZ &req={0} ?trans2;
IMAD R7, R7, UR8, RZ &req={1} ?WAIT7_END_GROUP;
LDC R8, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
IABS R9, R4 &req={1} ?trans2;
IABS R19, R3 ?trans2;
I2F.RP R15, R9 &wr=0x1 ?trans2;
MUFU.RCP R15, R15 &req={1} &wr=0x1 ?trans1;
IABS R14, R8 &req={0} ?WAIT4_END_GROUP;
I2F.RP R16, R14 &wr=0x0 ?trans1;
IADD3 R10, PT, PT, R15, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &req={4} &rd=0x1 &wr=0x4 ?trans1;
MUFU.RCP R16, R16 &req={0} &wr=0x0 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R18, PT, PT, RZ, -R11, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R15, R18, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R11, R15, R10 ?trans1;
IADD3 R12, PT, PT, R16, 0xffffffe, RZ &req={0} ?trans2;
IABS R16, R4 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x0 &wr=0x1 ?trans2;
IADD3 R15, PT, PT, RZ, -R16, RZ ?trans1;
MOV R12, RZ &req={0} ?trans1;
IADD3 R17, PT, PT, RZ, -R13, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R17, R17, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R13, R17, R12 ?trans1;
MOV R13, R19 ?trans2;
LDC.64 R18, c[0x0][0x398] &wr=0x0 ?trans3;
IMAD.HI.U32 R10, R10, R13, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R12, R13, RZ ?WAIT4_END_GROUP;
IMAD R12, R10, R15, R13 ?trans1;
IADD3 R15, PT, PT, -R11, RZ, RZ ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R9, R12, PT ?trans1;
IMAD R13, R14, R15, R13 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R14, R13, PT ?trans1;
IMAD.WIDE R18, R3, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, -R9, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P3, PT, R12, R9, PT ?trans1;
LOP3.LUT R9, R3, R4, RZ, 0x3c, !PT ?trans2;
@!P2 IADD3 R13, PT, PT, R13, -R14, RZ ?trans2;
LOP3.LUT R12, R3, R8, RZ, 0x3c, !PT ?trans1;
ISETP.GE.AND P1, PT, R9, RZ, PT ?trans1;
@!P2 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
LDC R9, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R13, R14, PT ?trans1;
ISETP.GE.AND P2, PT, R12, RZ, PT ?WAIT3_END_GROUP;
@P3 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R4, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT3_END_GROUP;
@P0 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?WAIT3_END_GROUP;
@!P2 IADD3 R11, PT, PT, -R11, RZ, RZ ?trans2;
@!P3 LOP3.LUT R10, RZ, R4, RZ, 0x33, !PT ?trans1;
ISETP.GE.U32.AND P1, PT, R9, 0x8, PT &req={0} ?WAIT4_END_GROUP;
IMAD R12, R7, R10, RZ ?trans2;
HFMA2 R10, -RZ, RZ, 0, 0 ?trans1;
@!P0 LOP3.LUT R11, RZ, R8, RZ, 0x33, !PT ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?trans2;
IADD3 R15, PT, PT, -R11.reuse, RZ, RZ ?trans1;
IMAD R14, R11, R9, RZ ?WAIT4_END_GROUP;
IMAD R11, R8, R15, R3 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
@!P1 BRA 0xb40 ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R17, R14.reuse, 0x2, R15 ?trans1;
IMAD.SHL.U32 R16, R14, 0x4, RZ ?trans1;
MOV R10, RZ ?trans1;
MOV R28, R5 ?WAIT3_END_GROUP;
IADD.64 R20, R16.reuse, UR10 &req={0} ?trans2;
IADD.64 R16, R16, UR8 ?trans2;
IADD.64 R20, R20, 0x10 ?trans2;
IADD.64 R16, R16, 0x10 ?WAIT8_END_GROUP;
LDG.E R22, desc[UR6][R16.64+-0x10] &req={2} &wr=0x2 ?trans4;
LDG.E R24, desc[UR6][R20.64+-0x10] &req={0} &wr=0x4 ?trans4;
LDG.E R25, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R24, R25 &req={4} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0xc] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+-0xc] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64+-0x8] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+-0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+-0x4] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R20.64+0x4] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R16.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R20.64+0x8] &req={0} &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x3 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R29, R29, R30 &req={3} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R27, R22, UR13, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R16.64+0xc] &rd=0x2 &wr=0x3 ?trans4;
LDG.E R30, desc[UR6][R20.64+0xc] &rd=0x4 &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x5 ?trans1;
IADD3 R28, PT, PT, R28, 0x8, RZ ?trans1;
IADD.64 R16, R16, 0x20 &req={2} ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R10, 0x8, RZ ?trans1;
IADD.64 R20, R20, 0x20 &req={4} ?trans2;
IMAD R22, R22, R8, R11 &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?trans1;
FMUL R31, R30, R31 &req={5} ?WAIT4_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR12, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R22, UR13, R23, 0x2, P1 ?trans1;
ISETP.NE.AND P1, PT, R28, RZ, PT ?WAIT4_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R31 &rd=0x0 ?trans9;
@P1 BRA 0x5e0 ?trans5;
@!P0 BRA 0x1220 ?trans5;
IADD3 R16, PT, PT, R2, -0x1, RZ ?trans2;
LOP3.LUT P0, R28, R9, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R16, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xeb0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R27, desc[UR6][R18.64] &req={2,0} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R17, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R16, UR8 &req={1} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R20.64] &wr=0x4 ?trans1;
IADD.64 R16, R16, UR10 ?WAIT6_END_GROUP;
LDG.E R26, desc[UR6][R16.64] &wr=0x2 ?trans1;
IMAD R22, R22, R8, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR4, 0x2 &req={0} ?trans1;
FMUL R29, R26, R27 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &rd=0x0 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x4] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R16.64+0x4] &wr=0x4 ?trans4;
LDG.E R31, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR4, 0x2 ?trans1;
FMUL R31, R30, R31 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R31 &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R20.64+0x8] &wr=0x2 ?trans4;
LDG.E R29, desc[UR6][R16.64+0x8] &req={0} &wr=0x4 ?trans4;
LDG.E R30, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P1, R22, UR4, 0x2 ?trans1;
FMUL R29, R29, R30 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R29 &rd=0x4 ?trans4;
LDG.E R22, desc[UR6][R20.64+0xc] &wr=0x2 ?trans4;
LDG.E R30, desc[UR6][R16.64+0xc] &wr=0x5 ?trans4;
LDG.E R31, desc[UR6][R18.64] &req={1} &wr=0x5 ?trans1;
IMAD R22, R22, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P1, R22, UR4, 0x2 ?trans1;
FMUL R31, R30, R31 &req={5} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R31 &rd=0x4 ?trans1;
IADD3 R10, PT, PT, R10, 0x4, RZ ?WAIT7_END_GROUP;
@!P0 BRA 0x1220 ?trans5;
ISETP.NE.AND P0, PT, R28, 0x1, PT ?trans1;
LOP3.LUT R9, R9, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R9, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x10e0 ?trans6;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R26, desc[UR6][R18.64] &req={4,2,0} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R21, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R20, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R16, R20, UR8 &req={1} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR6][R16.64] &wr=0x4 ?trans1;
IADD.64 R20, R20, UR10 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R20.64] &wr=0x2 ?trans1;
IMAD R22, R22, R8, R11 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R24, P0, R22, UR4, 0x2 &req={0} ?trans1;
FMUL R9, R9, R26 &req={2} ?WAIT3_END_GROUP;
LEA.HI.X R25, R22, UR5, R23, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R24.64], R9 &rd=0x1 ?trans4;
LDG.E R16, desc[UR6][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R20.64+0x4] &wr=0x4 ?trans4;
LDG.E R29, desc[UR6][R18.64] &wr=0x4 ?trans1;
IMAD R22, R16, R8, R11 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R23, RZ, 0x1f, R22 ?WAIT5_END_GROUP;
IADD.64 R22, R12, R22 ?WAIT5_END_GROUP;
LEA R26, P0, R22, UR4, 0x2 ?trans1;
FMUL R29, R28, R29 &req={4} ?WAIT3_END_GROUP;
LEA.HI.X R27, R22, UR5, R23, 0x2, P0 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R26.64], R29 &rd=0x1 ?trans1;
IADD3 R10, PT, PT, R10, 0x2, RZ ?WAIT7_END_GROUP;
@P1 BRA 0x1220 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x5 ?trans1;
MOV R16, R10 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
LDG.E R19, desc[UR6][R18.64] &req={2} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x3b0] &wr=0x0 ?trans3;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
SHF.L.U64.HI R15, R16.reuse, 0x2, R17 ?trans1;
IMAD.SHL.U32 R14, R16, 0x4, RZ ?WAIT5_END_GROUP;
IADD.64 R16, R14, UR8 &req={5} ?WAIT7_END_GROUP;
LDG.E R16, desc[UR6][R16.64] &wr=0x5 ?trans1;
IADD.64 R14, R14, UR10 ?WAIT7_END_GROUP;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
IMAD R8, R16, R8, R11 &req={5} ?WAIT5_END_GROUP;
SHF.R.S32.HI R9, RZ, 0x1f, R8 &req={1} ?WAIT5_END_GROUP;
IADD.64 R8, R12, R8 ?WAIT5_END_GROUP;
LEA R10, P0, R8, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R8, UR5, R9, 0x2, P0 ?trans1;
FMUL R9, R14, R19 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R10.64], R9 &rd=0x0 ?trans3;
IADD3 R3, PT, PT, R6, R3, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x180 ?trans5;
EXIT &req={3,2} ?trans5;
BRA 0x1260;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: k_interpolate_grad_gpu(int, int, int, int, int, float const*, int const*, float const*, float*)
_Z22k_interpolate_grad_gpuiiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s21, s4, 0xffff
s_mul_i32 s4, s18, s17
v_mad_u64_u32 v[1:2], null, s15, s21, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB4_8
s_load_b32 s13, s[0:1], 0x10
s_load_b32 s3, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_gt_i32 s13, 0
s_mul_i32 s3, s3, s21
s_cselect_b32 s14, -1, 0
s_ashr_i32 s15, s4, 31
s_ashr_i32 s16, s18, 31
s_add_i32 s4, s4, s15
s_add_i32 s5, s18, s16
s_xor_b32 s17, s4, s15
s_xor_b32 s20, s5, s16
v_cvt_f32_u32_e32 v0, s17
v_cvt_f32_u32_e32 v2, s20
s_sub_i32 s2, 0, s17
s_sub_i32 s4, 0, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s2, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x18
s_mul_i32 s2, s19, s18
s_mov_b32 s1, 0
s_mov_b32 s19, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v8, v0, v3
v_add_nc_u32_e32 v9, v2, v4
.LBB4_2:
s_and_not1_b32 vcc_lo, exec_lo, s14
s_cbranch_vccnz .LBB4_7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v2
v_xor_b32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v8
v_mul_hi_u32 v4, v0, v9
v_mul_lo_u32 v5, v3, s17
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v6, v4, s20
v_add_nc_u32_e32 v7, 1, v3
v_sub_nc_u32_e32 v5, v0, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v0, v0, v6
v_subrev_nc_u32_e32 v10, s17, v5
v_cmp_le_u32_e32 vcc_lo, s17, v5
v_add_nc_u32_e32 v6, 1, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_le_u32_e64 s0, s20, v0
v_cndmask_b32_e32 v5, v5, v10, vcc_lo
v_cndmask_b32_e32 v3, v3, v7, vcc_lo
v_subrev_nc_u32_e32 v7, s20, v0
s_delay_alu instid0(VALU_DEP_4)
v_cndmask_b32_e64 v4, v4, v6, s0
v_xor_b32_e32 v10, s15, v2
v_cmp_le_u32_e32 vcc_lo, s17, v5
v_add_nc_u32_e32 v6, 1, v3
v_cndmask_b32_e64 v0, v0, v7, s0
v_add_nc_u32_e32 v7, 1, v4
v_xor_b32_e32 v5, s16, v2
s_mov_b32 s0, 0
v_cndmask_b32_e32 v3, v3, v6, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s20, v0
v_cndmask_b32_e32 v0, v4, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v3, v10
v_xor_b32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v3, v10
v_lshlrev_b64 v[10:11], 2, v[1:2]
v_sub_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v3, s2, v3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_mul_lo_u32 v5, v0, s13
v_mul_lo_u32 v0, v0, s18
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[12:13], 2, v[3:4]
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v11, vcc_lo
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_add_co_u32 v10, vcc_lo, s10, v12
v_add_co_ci_u32_e32 v11, vcc_lo, s11, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v12, vcc_lo, s6, v4
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v14, vcc_lo, s8, v4
v_add_co_ci_u32_e32 v15, vcc_lo, s9, v5, vcc_lo
.LBB4_4:
s_lshl_b64 s[22:23], s[0:1], 2
s_mov_b32 s21, 0
v_add_co_u32 v4, vcc_lo, v12, s22
v_add_co_ci_u32_e32 v5, vcc_lo, s23, v13, vcc_lo
global_load_b32 v6, v[4:5], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[4:5], null, v6, s18, v[0:1]
v_add_co_u32 v6, vcc_lo, v14, s22
v_add_co_ci_u32_e32 v7, vcc_lo, s23, v15, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
global_load_b32 v6, v[6:7], off
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, v10, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, v11, v5, vcc_lo
global_load_b32 v16, v[2:3], off
global_load_b32 v7, v[4:5], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v16, v6, v16
.LBB4_5:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v6, v7, v16
global_atomic_cmpswap_b32 v6, v[4:5], v[6:7], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v6, v7
v_mov_b32_e32 v7, v6
s_or_b32 s21, vcc_lo, s21
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s21
s_cbranch_execnz .LBB4_5
s_or_b32 exec_lo, exec_lo, s21
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, s13
s_cbranch_scc0 .LBB4_4
.LBB4_7:
v_add_nc_u32_e32 v1, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s19, vcc_lo, s19
s_and_not1_b32 exec_lo, exec_lo, s19
s_cbranch_execnz .LBB4_2
.LBB4_8:
s_endpgm
| k_interpolate_grad_gpu | 8,182 | 3,214 | stackv2-00000-of-00015 |
// Demangled: three_interpolate_gpu(int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z21three_interpolate_gpuiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R25, SR_TID.X &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R24, c[0x0][0x360] &wr=0x1 ?trans1;
IMAD R0, R8, UR5, RZ &req={2} ?WAIT4_END_GROUP;
IMAD R0, R0, R9, RZ ?trans2;
IMAD R25, R24, UR4, R25 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R25, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IMAD R18, R8.reuse, R9, RZ ?trans1;
LDC R20, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x384] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R8.reuse, RZ, PT ?trans1;
LOP3.LUT R22, RZ, R8, RZ, 0x33, !PT ?trans2;
IABS R19, R18 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans2;
LDC.64 R6, c[0x0][0x398] &wr=0x3 ?trans1;
I2F.RP R9, R19 &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans5;
LDC.64 R4, c[0x0][0x3a0] &wr=0x0 ?trans1;
IMAD R23, R8, UR5, RZ &req={1} ?trans1;
MUFU.RCP R9, R9 &req={4} &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x3a8] &wr=0x4 ?trans1;
IMAD R24, R24, UR4, RZ &req={2} ?trans1;
IADD3 R10, PT, PT, R9, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R10, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R12, PT, PT, RZ, -R11, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R21, R12, R19, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R21, R11, R21, R10 &req={3,0} ?WAIT7_END_GROUP;
IABS R11, R20 ?trans2;
IABS R12, R25 ?trans2;
I2F.RP R10, R11 &req={0} &wr=0x0 ?trans2;
MUFU.RCP R10, R10 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IADD3 R14, PT, PT, RZ, -R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R14, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R13, R8 ?trans1;
LOP3.LUT R8, R25, R20, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R9, R12, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R11, R10, R12 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R11, R10, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R10, PT, PT, R10, -R11.reuse, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R10, R11, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
SEL R13, R22, R9, !P0 ?WAIT5_END_GROUP;
IMAD R27, R13, 0x3, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R8, R27, 0x4, R6 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR6][R8.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R8.64+0x8] &rd=0x0 &wr=0x5 ?trans1;
IABS R10, R18 ?WAIT4_END_GROUP;
IADD3 R29, PT, PT, RZ, -R10, RZ ?trans1;
IMAD.HI.U32 R10, R21, R12, RZ ?trans1;
LOP3.LUT R8, R25, R18, RZ, 0x3c, !PT &req={0} ?WAIT3_END_GROUP;
IMAD R12, R10, R29, R12 ?trans1;
IABS R29, R18 ?trans2;
IADD3 R9, PT, PT, -R13, RZ, RZ ?trans2;
ISETP.GT.U32.AND P1, PT, R19, R12, PT ?WAIT3_END_GROUP;
IMAD R9, R20, R9, R25 ?WAIT10_END_GROUP;
@!P1 IADD3 R12, PT, PT, R12, -R29, RZ ?trans2;
@!P1 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P2, PT, R12, R19, PT ?WAIT13_END_GROUP;
@P2 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R18, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R10, PT, PT, -R10, RZ, RZ ?WAIT10_END_GROUP;
@!P2 LOP3.LUT R10, RZ, R18, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R14, R23, R10, RZ ?trans2;
IMAD R8, R15, R20, R9 &req={2} ?WAIT3_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
IMAD R10, R11, R20.reuse, R9.reuse &req={3} ?trans2;
IMAD R16, R17, R20, R9 &req={5} ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans2;
SHF.R.S32.HI R11, RZ, 0x1f, R10 ?trans2;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans1;
IADD.64 R8, R14.reuse, R8 ?trans2;
IADD.64 R10, R14, R10 ?WAIT2_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT3_END_GROUP;
LEA R12, P2, R8, UR8, 0x2 ?trans2;
LEA R14, P1, R10, UR8, 0x2 ?trans2;
LEA.HI.X R13, R8, UR9, R9, 0x2, P2 ?trans1;
IMAD.WIDE R8, R27, 0x4, R4 ?trans1;
LEA.HI.X R15, R10, UR9, R11, 0x2, P1 ?trans2;
LEA R10, P1, R16.reuse, UR8, 0x2 ?trans2;
LDG.E R13, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R26, desc[UR6][R8.64+0x4] &wr=0x2 ?trans1;
LEA.HI.X R11, R16, UR9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R15, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R27, desc[UR6][R8.64+0x8] &wr=0x5 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x5 ?trans1;
FMUL R17, R26, R13 &req={2} ?WAIT4_END_GROUP;
FFMA R26, R16, R15, R17 &req={3} ?trans1;
IMAD.WIDE R16, R25, 0x4, R2 &req={4} ?trans1;
IADD3 R25, PT, PT, R24, R25, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R25, R0, PT ?trans1;
FFMA R27, R27, R10, R26 &req={5} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R27 &rd=0x0 ?trans7;
@!P1 BRA 0x210 ?trans5;
EXIT ?trans5;
BRA 0x6e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_interpolate_gpu(int, int, int, int, float const*, int const*, float const*, float*)
_Z21three_interpolate_gpuiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s20, s4, 0xffff
s_mul_i32 s4, s19, s18
v_mad_u64_u32 v[1:2], null, s15, s20, v[0:1]
s_mul_i32 s12, s4, s16
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s12, v1
s_cbranch_execz .LBB1_3
s_ashr_i32 s13, s4, 31
s_ashr_i32 s14, s18, 31
s_add_i32 s4, s4, s13
s_add_i32 s5, s18, s14
s_xor_b32 s15, s4, s13
s_xor_b32 s16, s5, s14
v_cvt_f32_u32_e32 v0, s15
v_cvt_f32_u32_e32 v2, s16
s_load_b32 s2, s[2:3], 0x0
s_sub_i32 s3, 0, s15
s_sub_i32 s4, 0, s16
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v2, v2
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v3, s3, v0
v_mul_lo_u32 v4, s4, v2
s_load_b256 s[4:11], s[0:1], 0x10
s_mul_i32 s1, s18, s17
s_mov_b32 s3, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v3, v0, v3
v_mul_hi_u32 v4, v2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v0, v0, v3
v_add_nc_u32_e32 v3, v2, v4
.LBB1_2:
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v1, v2
v_xor_b32_e32 v11, s14, v2
v_xor_b32_e32 v9, v4, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v9, v3
v_mul_hi_u32 v10, v9, v0
v_mul_lo_u32 v5, v4, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v13, v10, s15
v_sub_nc_u32_e32 v5, v9, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v9, v9, v13
v_add_nc_u32_e32 v13, 1, v10
v_subrev_nc_u32_e32 v7, s16, v5
v_cmp_le_u32_e32 vcc_lo, s16, v5
v_add_nc_u32_e32 v6, 1, v4
v_subrev_nc_u32_e32 v14, s15, v9
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
v_cmp_le_u32_e32 vcc_lo, s16, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v6, 1, v4
v_cndmask_b32_e32 v4, v4, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v12, v4, v11
v_sub_nc_u32_e32 v4, v12, v11
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v4, v4, 1, v4
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v8, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s15, v9
global_load_b96 v[4:6], v[4:5], off
v_dual_cndmask_b32 v10, v10, v13 :: v_dual_cndmask_b32 v9, v9, v14
v_xor_b32_e32 v14, s13, v2
v_add_nc_u32_e32 v13, 1, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s15, v9
v_cndmask_b32_e32 v9, v10, v13, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v9, v9, v14
v_sub_nc_u32_e32 v9, v9, v14
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v9, s1, v9
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[9:10], 2, v[9:10]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v5, v5, v11
v_add_nc_u32_e32 v4, v4, v11
v_add_nc_u32_e32 v6, v6, v11
v_sub_nc_u32_e32 v13, v5, v12
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v14, v4, v12
v_mad_u64_u32 v[4:5], null, s18, v13, v[1:2]
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v5, v6, v12
v_mad_u64_u32 v[11:12], null, s18, v14, v[1:2]
v_add_co_u32 v6, vcc_lo, s8, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[13:14], null, s18, v5, v[1:2]
v_ashrrev_i32_e32 v5, 31, v4
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v8, vcc_lo
v_ashrrev_i32_e32 v12, 31, v11
v_add_co_u32 v15, vcc_lo, s4, v9
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_ci_u32_e32 v16, vcc_lo, s5, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[8:9], 2, v[11:12]
v_ashrrev_i32_e32 v14, 31, v13
v_add_co_u32 v10, vcc_lo, v15, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v11, vcc_lo, v16, v5, vcc_lo
v_add_co_u32 v8, vcc_lo, v15, v8
s_delay_alu instid0(VALU_DEP_4)
v_lshlrev_b64 v[12:13], 2, v[13:14]
v_add_co_ci_u32_e32 v9, vcc_lo, v16, v9, vcc_lo
global_load_b96 v[4:6], v[6:7], off
s_clause 0x1
global_load_b32 v10, v[10:11], off
global_load_b32 v9, v[8:9], off
v_add_co_u32 v7, vcc_lo, v15, v12
v_add_co_ci_u32_e32 v8, vcc_lo, v16, v13, vcc_lo
global_load_b32 v11, v[7:8], off
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_add_nc_u32_e32 v1, s2, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s12, v1
s_or_b32 s3, vcc_lo, s3
s_waitcnt vmcnt(2)
v_mul_f32_e32 v10, v5, v10
s_waitcnt vmcnt(1)
v_fmac_f32_e32 v10, v4, v9
v_add_co_u32 v4, s0, s10, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v5, s0, s11, v8, s0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v10, v6, v11
global_store_b32 v[4:5], v10, off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| three_interpolate_gpu | 2,934 | 3,359 | stackv2-00000-of-00015 |
// Demangled: three_interpolate_grad_gpu(int, int, int, int, float const*, int const*, float const*, float*)
Function : _Z26three_interpolate_grad_gpuiiiiPKfPKiS0_Pf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R27, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R26, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R24, c[0x0][0x388] &wr=0x3 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R27, R26, UR6, R27 &req={1} ?WAIT5_END_GROUP;
IMAD R0, R24, UR4, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, R0, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IMAD R20, R24.reuse, UR5, RZ ?trans1;
LDC R22, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x38c] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, R24.reuse, RZ, PT ?trans1;
LOP3.LUT R25, RZ, R24, RZ, 0x33, !PT ?trans2;
IABS R21, R20 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans2;
LDC.64 R6, c[0x0][0x3a0] &wr=0x3 ?trans1;
I2F.RP R10, R21 &wr=0x4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x3a8] &wr=0x0 ?trans5;
LDC.64 R4, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R24, R24, UR5, RZ &req={1} ?trans1;
MUFU.RCP R10, R10 &req={4} &wr=0x1 ?trans6;
LDC.64 R2, c[0x0][0x398] &wr=0x4 ?trans1;
IMAD R26, R26, UR4, RZ &req={2} ?trans1;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R10, PT, PT, RZ, -R9, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R23, R10, R21, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R23, R9, R23, R8 &req={3,0} ?WAIT7_END_GROUP;
IABS R11, R22 ?trans2;
IABS R14, R27 ?trans2;
I2F.RP R10, R11 &req={0} &wr=0x0 ?trans2;
MUFU.RCP R10, R10 &req={0} &wr=0x0 ?trans2;
IADD3 R8, PT, PT, R10, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x0 &wr=0x1 ?trans2;
MOV R8, RZ &req={0} ?trans1;
IADD3 R12, PT, PT, RZ, -R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R12, R11, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R9, R9, R13, R8 ?trans1;
LOP3.LUT R8, R27, R22, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD.HI.U32 R9, R9, R14, RZ ?WAIT5_END_GROUP;
IADD3 R10, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
IMAD R10, R11, R10, R14 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P2, PT, R11, R10, PT ?WAIT13_END_GROUP;
@!P2 IADD3 R10, PT, PT, R10, -R11.reuse, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.GE.AND P2, PT, R8, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R10, R11, PT ?WAIT13_END_GROUP;
@P1 IADD3 R9, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
@!P2 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT5_END_GROUP;
SEL R17, R25, R9, !P0 ?WAIT5_END_GROUP;
IMAD R13, R17, 0x3, RZ ?WAIT4_END_GROUP;
IMAD.WIDE R8, R13, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR6][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R10, R27, 0x4, R4 ?trans1;
IABS R15, R20.reuse ?trans2;
IABS R19, R20 ?trans1;
IMAD.WIDE R12, R13, 0x4, R6 ?trans1;
LDG.E R28, desc[UR6][R10.64] &wr=0x3 ?trans4;
LDG.E R31, desc[UR6][R12.64] &wr=0x3 ?trans1;
IADD3 R18, PT, PT, RZ, -R15, RZ ?trans1;
IMAD.HI.U32 R15, R23, R14, RZ ?trans1;
IADD3 R29, PT, PT, -R17, RZ, RZ ?trans1;
LDG.E R30, desc[UR6][R8.64+0x4] &wr=0x4 ?trans2;
IMAD R14, R15, R18, R14 ?WAIT2_END_GROUP;
IMAD R29, R22, R29, R27 ?trans1;
LDG.E R32, desc[UR6][R8.64+0x8] &wr=0x5 ?trans2;
ISETP.GT.U32.AND P1, PT, R21, R14, PT ?trans2;
LDG.E R33, desc[UR6][R12.64+0x4] &wr=0x4 ?trans11;
@!P1 IADD3 R14, PT, PT, R14, -R19, RZ ?WAIT2_END_GROUP;
@!P1 IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R14, R21, PT ?trans1;
LOP3.LUT R14, R27, R20, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R14, RZ, PT ?WAIT7_END_GROUP;
@P2 IADD3 R15, PT, PT, R15, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R20, RZ, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R15, PT, PT, -R15, RZ, RZ ?WAIT8_END_GROUP;
@!P2 LOP3.LUT R15, RZ, R20, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R14, R24, R15, RZ ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?trans1;
IMAD R16, R16, R22, R29 &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16.reuse, UR8, 0x2 ?trans1;
FMUL R35, R31, R28 &req={3} ?trans2;
LDG.E R28, desc[UR6][R12.64+0x8] &wr=0x2 ?trans1;
LEA.HI.X R19, R16, UR9, R17, 0x2, P1 ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R18.64], R35 &rd=0x0 ?trans4;
LDG.E R34, desc[UR6][R10.64] &wr=0x3 ?trans1;
IMAD R16, R30, R22, R29 &req={4} ?WAIT5_END_GROUP;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?WAIT5_END_GROUP;
IADD.64 R16, R14, R16 ?WAIT5_END_GROUP;
LEA R30, P1, R16, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R31, R16, UR9, R17, 0x2, P1 ?trans1;
IMAD R32, R32, R22, R29 &req={5} ?trans2;
FMUL R17, R33, R34 &req={3} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R30.64], R17 &rd=0x0 ?trans4;
LDG.E R37, desc[UR6][R10.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R33, RZ, 0x1f, R32 ?WAIT5_END_GROUP;
IADD.64 R14, R14, R32 ?WAIT3_END_GROUP;
IADD3 R27, PT, PT, R26, R27, RZ ?trans2;
LEA R8, P1, R14, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R14, UR9, R15, 0x2, P1 ?trans1;
ISETP.GE.AND P1, PT, R27, R0, PT ?trans1;
FMUL R37, R28, R37 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR6][R8.64], R37 &rd=0x0 ?trans7;
@!P1 BRA 0x210 ?trans5;
EXIT ?trans5;
BRA 0x700;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_interpolate_grad_gpu(int, int, int, int, float const*, int const*, float const*, float*)
_Z26three_interpolate_grad_gpuiiiiPKfPKiS0_Pf:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[8:11], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_mov_b32 s5, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s16, s4, 0xffff
s_mul_i32 s4, s10, s9
v_mad_u64_u32 v[6:7], null, s15, s16, v[0:1]
s_mul_i32 s8, s4, s8
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmpx_gt_i32_e64 s8, v6
s_cbranch_execz .LBB2_9
s_ashr_i32 s9, s4, 31
s_ashr_i32 s12, s10, 31
s_add_i32 s4, s4, s9
s_add_i32 s5, s10, s12
s_xor_b32 s13, s4, s9
s_xor_b32 s14, s5, s12
v_cvt_f32_u32_e32 v0, s13
v_cvt_f32_u32_e32 v1, s14
s_load_b32 s15, s[2:3], 0x0
s_sub_i32 s2, 0, s13
s_sub_i32 s3, 0, s14
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v1, v1
s_mul_i32 s11, s11, s10
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v0, 0x4f7ffffe, v0 :: v_dual_mul_f32 v1, 0x4f7ffffe, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v0, v0
v_cvt_u32_f32_e32 v1, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s15, s15, s16
s_mov_b32 s16, 0
v_mul_lo_u32 v2, s2, v0
v_mul_lo_u32 v3, s3, v1
s_load_b256 s[0:7], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_hi_u32 v2, v0, v2
v_mul_hi_u32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v14, v0, v2
v_add_nc_u32_e32 v15, v1, v3
.LBB2_2:
v_ashrrev_i32_e32 v7, 31, v6
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v6, v7
v_xor_b32_e32 v5, v0, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v0, v5, v15
v_mul_hi_u32 v9, v5, v14
v_mul_lo_u32 v1, v0, s14
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_mul_lo_u32 v10, v9, s13
v_sub_nc_u32_e32 v1, v5, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v5, v5, v10
v_add_nc_u32_e32 v10, 1, v9
v_subrev_nc_u32_e32 v3, s14, v1
v_cmp_le_u32_e32 vcc_lo, s14, v1
v_add_nc_u32_e32 v2, 1, v0
v_subrev_nc_u32_e32 v11, s13, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_dual_cndmask_b32 v1, v1, v3 :: v_dual_cndmask_b32 v0, v0, v2
v_xor_b32_e32 v3, s12, v7
v_cmp_le_u32_e32 vcc_lo, s14, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, 1, v0
v_cndmask_b32_e32 v0, v0, v2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v3
v_sub_nc_u32_e32 v8, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, v8, 1, v8
v_mul_lo_u32 v8, v8, s10
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s13, v5
global_load_b96 v[0:2], v[0:1], off
v_cndmask_b32_e32 v9, v9, v10, vcc_lo
v_cndmask_b32_e32 v5, v5, v11, vcc_lo
v_xor_b32_e32 v11, s9, v7
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v10, 1, v9
v_cmp_le_u32_e32 vcc_lo, s13, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v5, v9, v10, vcc_lo
v_sub_nc_u32_e32 v9, v6, v8
v_lshlrev_b64 v[7:8], 2, v[6:7]
v_xor_b32_e32 v5, v5, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s0, v7
v_sub_nc_u32_e32 v5, v5, v11
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
v_add_co_u32 v3, vcc_lo, s4, v3
v_mul_lo_u32 v10, s11, v5
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
global_load_b96 v[3:5], v[3:4], off
v_ashrrev_i32_e32 v11, 31, v10
s_waitcnt vmcnt(1)
v_mad_u64_u32 v[12:13], null, v0, s10, v[9:10]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[10:11]
v_add_co_u32 v16, vcc_lo, s6, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v13, 31, v12
v_add_co_ci_u32_e32 v17, vcc_lo, s7, v11, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[12:13], 2, v[12:13]
v_add_co_u32 v10, vcc_lo, v16, v12
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, v17, v13, vcc_lo
global_load_b32 v0, v[7:8], off
global_load_b32 v13, v[10:11], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v0, v3, v0
.LBB2_3:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v12, v13, v0
global_atomic_cmpswap_b32 v3, v[10:11], v[12:13], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v3, v13
v_mov_b32_e32 v13, v3
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_3
s_or_b32 exec_lo, exec_lo, s17
v_mad_u64_u32 v[10:11], null, v1, s10, v[9:10]
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[0:1], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v17, v1, vcc_lo
global_load_b32 v3, v[7:8], off
global_load_b32 v11, v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v3, v4, v3
.LBB2_5:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v10, v11, v3
global_atomic_cmpswap_b32 v4, v[0:1], v[10:11], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v4, v11
v_mov_b32_e32 v11, v4
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_5
s_or_b32 exec_lo, exec_lo, s17
v_mad_u64_u32 v[0:1], null, v2, s10, v[9:10]
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, v16, v0
v_add_co_ci_u32_e32 v1, vcc_lo, v17, v1, vcc_lo
global_load_b32 v2, v[7:8], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(1)
v_mul_f32_e32 v4, v5, v2
.LBB2_7:
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v2, v3, v4
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_7
s_or_b32 exec_lo, exec_lo, s17
v_add_nc_u32_e32 v6, s15, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s8, v6
s_or_b32 s16, vcc_lo, s16
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB2_2
.LBB2_9:
s_endpgm
| three_interpolate_grad_gpu | 3,057 | 3,877 | stackv2-00000-of-00015 |
// Demangled: three_nn_gpu(int, int, int, float const*, float const*, float*, int*)
Function : _Z12three_nn_gpuiiiPKfS0_PfPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R27, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R26, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR5, UR4, URZ &req={2} ?trans1;
IMAD R27, R26, UR6, R27 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R24, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x3a0] &wr=0x3 ?trans8;
LDC.64 R8, c[0x0][0x3a8] &wr=0x4 ?trans1;
IMAD R26, R26, UR5, RZ &req={1} ?trans1;
ISETP.GT.AND P0, PT, R24, RZ, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1f0 &req={3,2} ?trans5;
IMAD R5, R27, 0x3, RZ &req={0} ?trans1;
MOV R11, 0x7f800000 ?trans1;
IADD3 R27, PT, PT, R26, R27, RZ ?trans2;
IMAD.WIDE R2, R5, 0x4, R6 ?WAIT3_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?trans1;
IMAD.WIDE R4, R5, 0x4, R8 &req={4} ?trans1;
STG.E desc[UR6][R2.64], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x4], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x8], R11 &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64], RZ &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64+0x4], RZ &rd=0x0 ?trans4;
STG.E desc[UR6][R4.64+0x8], RZ &rd=0x0 ?trans1;
@!P0 BRA 0x110 ?trans5;
EXIT ?trans5;
LOP3.LUT R31, R24.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R25, R24.reuse, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R24, R24, 0x3, RZ ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x384] &req={0} &wr=0x0 ?trans1;
IMAD R23, R27, 0x3, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
IABS R7, R6 &req={0} ?WAIT4_END_GROUP;
I2F.RP R0, R7 &wr=0x0 ?trans1;
IMAD.WIDE R2, R23, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R22, desc[UR6][R2.64] &req={5} &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R2.64+0x4] &wr=0x5 ?trans1;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans3;
LDG.E R20, desc[UR6][R2.64+0x8] &rd=0x1 &wr=0x5 ?trans1;
HFMA2 R30, -RZ, RZ, 0, 0 ?trans1;
MOV R33, RZ ?trans1;
CS2R R28, SRZ ?trans1;
IABS R2, R27 &req={1} ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R8, PT, PT, RZ, -R5, RZ &req={4,1} ?WAIT5_END_GROUP;
IMAD R3, R8, R7, RZ ?trans1;
MOV.64 R8, 0x483d6329f1c35ca5 ?WAIT3_END_GROUP;
IMAD.HI.U32 R5, R5, R3, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R2, RZ ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R7.reuse, R0, R2 ?trans2;
LDC R2, c[0x0][0x388] &wr=0x0 ?trans3;
ISETP.GT.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R7, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R0, R7, PT ?trans1;
LOP3.LUT R0, R27, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, RZ, PT ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R23 ?WAIT6_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R2, 0x4, PT &req={0} ?WAIT7_END_GROUP;
@!P1 LOP3.LUT R5, RZ, R6, RZ, 0x33, !PT ?trans1;
MOV.64 R6, 0x483d6329f1c35ca5 ?WAIT4_END_GROUP;
IMAD R2, R24, R5, RZ ?trans1;
MOV.64 R4, 0x483d6329f1c35ca5 ?WAIT4_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans1;
@!P0 BRA 0xfa0 ?trans6;
MOV.64 R4, 0x483d6329f1c35ca5 ?trans2;
MOV R32, RZ ?trans1;
CS2R R28, SRZ ?trans1;
MOV R30, RZ ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R12, R32, 0x3, RZ ?trans2;
HFMA2 R13, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R14, R2, R12 ?WAIT5_END_GROUP;
LEA R18, P0, R14, R10, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R14, R11, R15, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R14, desc[UR6][R18.64+0x4] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R18.64] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R18.64+0x8] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R18.64+0xc] &req={5} &rd=0x0 &wr=0x5 ?trans4;
LDG.E R34, desc[UR6][R18.64+0x10] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R18.64+0x14] &rd=0x0 &wr=0x5 ?trans1;
BSSY.RECONVERGENT B0, 0x7e0 ?trans1;
MOV R33, R32 ?trans1;
FADD R14, -R21, R14 &req={2} ?trans1;
FADD R15, -R22, R15 &req={3} ?WAIT3_END_GROUP;
FMUL R14, R14, R14 ?trans1;
FADD R17, -R20, R17 &req={4} ?WAIT3_END_GROUP;
FFMA R14, R15, R15, R14 ?WAIT4_END_GROUP;
FFMA R17, R17, R17, R14 ?WAIT6_END_GROUP;
F2F.F64.F32 R16, R17 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R16, PT &req={1} &wr=0x1 ?trans1;
MOV.64 R14, R16 ?trans2;
@P0 BRA 0x7d0 &req={1,0} ?trans6;
DSETP.GT.AND P1, PT, R6, R16, PT &wr=0x0 ?trans1;
MOV.64 R14, R8 ?trans2;
MOV.64 R8, R16 ?trans2;
MOV R33, R29 ?trans1;
MOV R29, R32 ?trans1;
@!P1 MOV.64 R8, R6 &req={0} ?trans2;
@!P1 MOV R29, R30 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R4, R16, PT &wr=0x0 ?trans2;
@!P1 FSEL R4, R16, R4, P0 &req={0} ?trans1;
@!P1 FSEL R5, R17, R5, P0 ?trans1;
@!P1 SEL R16, R32, R28, P0 ?WAIT3_END_GROUP;
@!P1 MOV R6, R4 ?trans1;
@!P1 MOV R7, R5 ?trans1;
@!P1 MOV R30, R16 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
FADD R34, -R21, R34 &req={5} ?trans1;
FADD R35, -R22, R35 ?trans1;
FADD R37, -R20, R37 ?trans1;
IADD3 R16, PT, PT, R12, 0x6, RZ ?trans1;
FMUL R34, R34, R34 ?trans1;
MOV R17, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xa40 ?trans2;
FFMA R34, R35, R35, R34 ?trans1;
IADD3 R35, PT, PT, R32, 0x1, RZ ?trans1;
IADD.64 R16, R2, R16 ?WAIT2_END_GROUP;
FFMA R18, R37, R37, R34 ?trans2;
MOV R28, R35 ?WAIT4_END_GROUP;
F2F.F64.F32 R18, R18 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R14, R18, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R4, R18 ?trans2;
@P0 BRA 0xa30 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R8, R18, PT &wr=0x0 ?trans1;
MOV.64 R4, R14 ?trans2;
MOV.64 R14, R18 ?trans2;
MOV R28, R33 ?trans1;
MOV R33, R35 ?trans1;
@!P1 MOV.64 R14, R8 &req={0} ?trans2;
@!P1 MOV R33, R29 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R6, R18, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R18, R6, P0 &req={0} ?trans1;
@!P1 FSEL R7, R19, R7, P0 ?trans1;
@!P1 SEL R18, R35, R30, P0 ?WAIT3_END_GROUP;
@!P1 MOV R8, R6 ?trans1;
@!P1 MOV R9, R7 ?trans1;
@!P1 MOV R29, R18 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R12, 0x9, RZ ?trans1;
MOV R13, RZ ?trans1;
LEA R6, P0, R16, R10, 0x2 ?WAIT4_END_GROUP;
IADD.64 R12, R2, R12 ?WAIT3_END_GROUP;
LEA.HI.X R7, R16, R11, R17, 0x2, P0 ?trans2;
LEA R10, P0, R12, R10, 0x2 ?WAIT3_END_GROUP;
LDG.E R16, desc[UR6][R6.64+0x4] &wr=0x2 ?trans1;
LEA.HI.X R11, R12, R11, R13, 0x2, P0 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR6][R6.64] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x4] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R10.64+0x8] &wr=0x3 ?trans4;
LDG.E R19, desc[UR6][R6.64+0x8] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xdf0 ?trans1;
FADD R16, -R21.reuse, R16 &req={2} ?trans1;
FADD R18, -R21, R18 &req={4} ?trans1;
FADD R35, -R22, R35 &req={5} ?WAIT3_END_GROUP;
FMUL R18, R18, R18 ?trans1;
FADD R17, -R22, R17 &req={3} ?trans1;
FADD R37, -R20, R37 ?trans2;
FFMA R18, R35, R35, R18 ?trans1;
FMUL R16, R16, R16 ?WAIT3_END_GROUP;
FFMA R10, R37, R37, R18 ?trans1;
FFMA R16, R17, R17, R16 ?trans1;
FADD R19, -R20, R19 ?WAIT4_END_GROUP;
FFMA R12, R19, R19, R16 ?trans1;
F2F.F64.F32 R10, R10 ?trans1;
IADD3 R16, PT, PT, R32.reuse, 0x2, RZ ?trans2;
IADD3 R18, PT, PT, R32, 0x3, RZ ?WAIT3_END_GROUP;
MOV R30, R16 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R4, R12, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R6, R12 ?trans2;
@P0 BRA 0xde0 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R14, R12, PT &wr=0x0 ?trans1;
MOV R30, R28 ?trans1;
MOV R28, R16 ?trans1;
MOV.64 R6, R4 ?trans2;
MOV.64 R4, R12 ?trans2;
@!P1 MOV.64 R4, R14 &req={0} ?trans2;
@!P1 MOV R28, R33 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R8, R12, PT &wr=0x0 ?trans2;
@!P1 SEL R16, R16, R29, P0 &req={0} ?trans1;
@!P1 FSEL R8, R12, R8, P0 ?trans1;
@!P1 FSEL R9, R13, R9, P0 ?WAIT3_END_GROUP;
@!P1 MOV R33, R16 ?trans1;
@!P1 MOV R14, R8 ?trans1;
@!P1 MOV R15, R9 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
DSETP.GT.AND P0, PT, R6, R10, PT &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xf60 ?trans1;
MOV.64 R8, R10 ?trans2;
MOV R29, R18 ?trans1;
@P0 BRA 0xf50 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R4, R10, PT &wr=0x0 ?trans1;
MOV.64 R8, R6 ?trans2;
MOV.64 R6, R10 ?trans2;
MOV R29, R30 ?trans1;
MOV R30, R18 ?trans1;
@!P1 MOV.64 R6, R4 &req={0} ?trans2;
@!P1 MOV R30, R28 ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R14, R10, PT &wr=0x0 ?trans2;
@!P1 SEL R12, R18, R33, P0 &req={0} ?trans1;
@!P1 FSEL R10, R10, R14, P0 ?trans1;
@!P1 FSEL R11, R11, R15, P0 ?WAIT3_END_GROUP;
@!P1 MOV R28, R12 ?trans1;
@!P1 MOV R4, R10 ?trans1;
@!P1 MOV R5, R11 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R32, PT, PT, R32, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R32, R25, PT ?WAIT13_END_GROUP;
@P0 BRA 0x500 ?trans5;
MOV R33, R25 ?WAIT7_END_GROUP;
ISETP.NE.AND P0, PT, R31, RZ, PT ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R6 ?trans2;
MOV.64 R12, R4 ?trans2;
MOV R35, R29 ?trans1;
MOV R34, R30 ?trans1;
MOV R32, R28 ?WAIT4_END_GROUP;
@!P0 BRA 0x1930 ?trans5;
LDC.64 R14, c[0x0][0x398] &wr=0x0 ?trans1;
IMAD R16, R33, 0x3, RZ ?trans2;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R12, R2, R16 ?WAIT5_END_GROUP;
LEA R10, P0, R12, R14, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R12, R15, R13, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R12, desc[UR6][R10.64+0x4] &wr=0x2 ?trans4;
LDG.E R13, desc[UR6][R10.64] &wr=0x3 ?trans4;
LDG.E R19, desc[UR6][R10.64+0x8] &rd=0x0 &wr=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x12d0 ?trans1;
MOV R35, R33 ?trans1;
MOV R34, R29 ?trans1;
MOV R32, R30 ?trans1;
MOV.64 R10, R8 &req={0} ?WAIT2_END_GROUP;
FADD R12, -R21, R12 &req={5,2} ?trans1;
FADD R13, -R22, R13 &req={3} ?WAIT3_END_GROUP;
FMUL R12, R12, R12 ?trans1;
FADD R19, -R20, R19 &req={4} ?WAIT3_END_GROUP;
FFMA R12, R13, R13, R12 ?WAIT4_END_GROUP;
FFMA R36, R19, R19, R12 ?trans1;
MOV.64 R12, R6 ?WAIT3_END_GROUP;
F2F.F64.F32 R18, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R18, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x12c0 &req={0} ?trans5;
DSETP.GT.AND P1, PT, R6, R18, PT &wr=0x0 ?trans1;
MOV.64 R10, R18 ?trans2;
@!P1 MOV.64 R10, R6 &req={0} ?trans2;
MOV R34, R33 ?trans1;
@!P1 MOV R34, R30 ?trans1;
MOV R35, R29 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R4, R18, PT &wr=0x0 ?trans2;
@!P1 FSEL R12, R18, R4, P0 &req={0} ?trans1;
@!P1 FSEL R13, R19, R5, P0 ?trans1;
MOV.64 R18, R8 ?trans2;
@!P1 SEL R32, R33, R28, P0 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x1, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1930 ?WAIT12_END_GROUP;
@!P0 BRA 0x1920 ?trans5;
IADD3 R4, PT, PT, R16, 0x3, RZ ?trans1;
MOV R5, RZ ?WAIT5_END_GROUP;
IADD.64 R6, R2, R4 ?WAIT5_END_GROUP;
LEA R4, P0, R6, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R5, R6, R15, R7, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR6][R4.64+0x4] &wr=0x2 ?trans4;
LDG.E R7, desc[UR6][R4.64] &wr=0x3 ?trans4;
LDG.E R9, desc[UR6][R4.64+0x8] &rd=0x0 &wr=0x4 ?trans1;
BSSY.RECONVERGENT B1, 0x15a0 ?trans1;
IADD3 R30, PT, PT, R33, 0x1, RZ ?trans1;
MOV R28, R35 ?trans1;
MOV R29, R34 ?trans1;
MOV.64 R4, R18 &req={0} ?WAIT2_END_GROUP;
FADD R6, -R21, R6 &req={2} ?trans1;
FADD R7, -R22, R7 &req={3} ?WAIT3_END_GROUP;
FMUL R6, R6, R6 ?trans1;
FADD R9, -R20, R9 &req={4} ?WAIT3_END_GROUP;
FFMA R6, R7, R7, R6 ?WAIT4_END_GROUP;
FFMA R36, R9, R9, R6 ?trans1;
MOV.64 R6, R10 ?WAIT3_END_GROUP;
F2F.F64.F32 R8, R36 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R18, R8, PT &req={0} &wr=0x0 ?trans2;
@P0 BRA 0x1590 &req={0} ?trans5;
DSETP.GT.AND P1, PT, R10, R8, PT &wr=0x0 ?trans1;
MOV.64 R4, R8 ?trans2;
@!P1 MOV.64 R4, R10 &req={0} ?trans2;
MOV R28, R30 ?trans1;
@!P1 MOV R28, R34 ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R12, R8, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R8, R12, P0 &req={0} ?trans1;
@!P1 FSEL R7, R9, R13, P0 ?trans1;
MOV.64 R8, R18 ?trans2;
@!P1 SEL R29, R30, R32, P0 ?trans1;
MOV R30, R35 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.NE.AND P0, PT, R31, 0x2, PT ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R4 ?trans2;
MOV.64 R12, R6 ?trans2;
MOV R35, R30 ?trans1;
MOV R34, R28 ?trans1;
MOV R32, R29 ?WAIT4_END_GROUP;
@!P0 BRA 0x1920 ?trans5;
IADD3 R16, PT, PT, R16, 0x6, RZ ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R16 ?WAIT5_END_GROUP;
LEA R14, P0, R2, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R2, R15, R3, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR6][R14.64+0x4] &wr=0x2 ?trans4;
LDG.E R3, desc[UR6][R14.64] &wr=0x3 ?trans4;
LDG.E R11, desc[UR6][R14.64+0x8] &wr=0x4 ?trans1;
IADD3 R16, PT, PT, R33, 0x2, RZ ?trans1;
MOV.64 R12, R4 ?WAIT2_END_GROUP;
MOV R34, R30 ?trans1;
MOV R32, R28 ?trans1;
MOV R35, R16 ?trans1;
FADD R2, -R21, R2 &req={2} ?trans1;
FADD R3, -R22, R3 &req={3} ?WAIT3_END_GROUP;
FMUL R2, R2, R2 ?trans1;
FADD R11, -R20, R11 &req={4} ?WAIT3_END_GROUP;
FFMA R2, R3, R3, R2 ?WAIT4_END_GROUP;
FFMA R2, R11, R11, R2 ?trans1;
MOV.64 R10, R8 ?WAIT5_END_GROUP;
F2F.F64.F32 R2, R2 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R8, R2, PT &req={0} &wr=0x0 ?trans1;
MOV.64 R18, R2 ?trans2;
@P0 BRA 0x1920 &req={0} ?trans6;
DSETP.GT.AND P1, PT, R4, R2, PT &wr=0x0 ?trans1;
MOV.64 R18, R8 ?trans2;
MOV.64 R10, R2 ?trans2;
@!P1 MOV.64 R18, R8 &req={0} ?trans2;
@!P1 MOV.64 R10, R4.reuse ?trans2;
MOV.64 R12, R4 ?trans2;
MOV R35, R30 ?trans1;
MOV R34, R16 ?trans1;
MOV R32, R28 ?trans1;
@!P1 MOV R35, R30 ?trans1;
@!P1 MOV R34, R28 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P1 DSETP.GT.AND P0, PT, R6, R2, PT &wr=0x0 ?trans2;
@!P1 FSEL R6, R2, R6, P0 &req={0} ?trans1;
@!P1 FSEL R7, R3, R7, P0 ?trans1;
@!P1 SEL R32, R16, R29, P0 ?WAIT3_END_GROUP;
@!P1 MOV R12, R6 ?trans1;
@!P1 MOV R13, R7 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.128 UR8, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.L.U64.HI R3, R23.reuse, 0x2, R0 ?trans1;
IMAD.SHL.U32 R2, R23, 0x4, RZ ?trans1;
F2F.F32.F64 R19, R18 &wr=0x1 ?trans1;
IADD3 R27, PT, PT, R26, R27, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R27, UR4, PT ?trans1;
IADD.64 R4, R2.reuse, UR8 &req={0} ?trans2;
IADD.64 R2, R2, UR10 ?WAIT4_END_GROUP;
STG.E desc[UR6][R4.64], R19 &req={1} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R11, R10 &wr=0x1 ?trans2;
STG.E desc[UR6][R4.64+0x4], R11 &req={1} &rd=0x0 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R13, R12 &wr=0x1 ?trans2;
STG.E desc[UR6][R4.64+0x8], R13 &req={1} &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64], R35 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x4], R34 &rd=0x0 ?trans4;
STG.E desc[UR6][R2.64+0x8], R32 &rd=0x0 ?trans1;
@!P0 BRA 0x220 ?trans5;
EXIT ?trans5;
BRA 0x1ac0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: three_nn_gpu(int, int, int, float const*, float const*, float*, int*)
_Z12three_nn_gpuiiiPKfS0_PfPi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x3c
s_load_b128 s[16:19], s[0:1], 0x0
s_add_u32 s2, s0, 48
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s19, s4, 0xffff
s_mul_i32 s12, s17, s16
v_mad_u64_u32 v[6:7], null, s15, s19, v[0:1]
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s12, v6
s_cbranch_execz .LBB0_13
s_cmp_gt_i32 s18, 0
s_mov_b32 s16, 0
s_cselect_b32 s13, -1, 0
s_ashr_i32 s14, s17, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_add_i32 s4, s17, s14
s_load_b32 s17, s[2:3], 0x0
s_xor_b32 s15, s4, s14
s_load_b256 s[4:11], s[0:1], 0x10
v_cvt_f32_u32_e32 v0, s15
s_sub_i32 s2, 0, s15
s_mul_i32 s1, s18, 3
s_delay_alu instid0(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_waitcnt lgkmcnt(0)
s_mul_i32 s17, s17, s19
s_add_u32 s6, s6, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
s_addc_u32 s7, s7, 0
v_mul_lo_u32 v1, s2, v0
s_mov_b32 s2, 0xf1c35ca5
s_mov_b32 s3, 0x483d6329
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v1, v0, v1
v_add_nc_u32_e32 v19, v0, v1
.LBB0_2:
v_lshl_add_u32 v3, v6, 1, v6
v_mov_b32_e32 v12, s3
v_dual_mov_b32 v16, s3 :: v_dual_mov_b32 v15, s2
v_dual_mov_b32 v10, s3 :: v_dual_mov_b32 v9, s2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v4, 31, v3
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v11, s2
v_lshlrev_b64 v[7:8], 2, v[3:4]
s_and_not1_b32 vcc_lo, exec_lo, s13
s_cbranch_vccnz .LBB0_12
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v8, vcc_lo
s_mov_b32 s0, 0
v_mov_b32_e32 v20, 0
v_mov_b32_e32 v18, s3
global_load_b96 v[3:5], v[0:1], off
v_ashrrev_i32_e32 v0, 31, v6
v_dual_mov_b32 v17, s2 :: v_dual_mov_b32 v12, s3
v_mov_b32_e32 v11, s2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v6, v0
v_xor_b32_e32 v1, v1, v0
v_xor_b32_e32 v0, s14, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v1, v19
v_mul_lo_u32 v9, v2, s15
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v1, v1, v9
v_add_nc_u32_e32 v9, 1, v2
v_subrev_nc_u32_e32 v10, s15, v1
v_cmp_le_u32_e32 vcc_lo, s15, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_cndmask_b32 v2, v2, v9 :: v_dual_cndmask_b32 v1, v1, v10
v_add_nc_u32_e32 v9, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s15, v1
v_dual_cndmask_b32 v1, v2, v9 :: v_dual_mov_b32 v10, s3
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v9, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v1, v1, v0
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, s1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v13, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v14, vcc_lo, s7, v1, vcc_lo
v_mov_b32_e32 v1, v20
.LBB0_4:
global_load_b96 v[21:23], v[13:14], off offset:-4
s_mov_b32 s19, exec_lo
s_waitcnt vmcnt(0)
v_dual_sub_f32 v0, v22, v4 :: v_dual_sub_f32 v15, v21, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v0, v0, v0
v_fmac_f32_e32 v0, v15, v15
v_sub_f32_e32 v15, v23, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v0, v15, v15
v_cvt_f64_f32_e32 v[15:16], v0
v_mov_b32_e32 v0, s0
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_ngt_f64_e32 v[11:12], v[15:16]
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v21, s0
s_mov_b32 s20, exec_lo
v_cmpx_ngt_f64_e32 v[9:10], v[15:16]
s_cbranch_execz .LBB0_9
s_mov_b32 s21, exec_lo
v_cmpx_gt_f64_e32 v[17:18], v[15:16]
v_mov_b32_e32 v18, v16
v_dual_mov_b32 v20, s0 :: v_dual_mov_b32 v17, v15
s_or_b32 exec_lo, exec_lo, s21
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_dual_mov_b32 v21, v2 :: v_dual_mov_b32 v2, v20
v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
v_dual_mov_b32 v9, v17 :: v_dual_mov_b32 v10, v18
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s20
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_dual_mov_b32 v18, v16 :: v_dual_mov_b32 v17, v15
v_dual_mov_b32 v16, v12 :: v_dual_mov_b32 v15, v11
v_mov_b32_e32 v0, v1
v_mov_b32_e32 v1, v21
v_dual_mov_b32 v11, v17 :: v_dual_mov_b32 v12, v18
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s19
v_add_co_u32 v13, vcc_lo, v13, 12
v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s18, s0
s_cbranch_scc1 .LBB0_12
v_mov_b32_e32 v20, v2
v_mov_b32_e32 v2, v1
v_dual_mov_b32 v18, v10 :: v_dual_mov_b32 v17, v9
v_dual_mov_b32 v9, v11 :: v_dual_mov_b32 v10, v12
v_mov_b32_e32 v11, v15
v_mov_b32_e32 v1, v0
v_mov_b32_e32 v12, v16
s_branch .LBB0_4
.LBB0_12:
v_cvt_f32_f64_e32 v3, v[15:16]
v_cvt_f32_f64_e32 v4, v[11:12]
v_cvt_f32_f64_e32 v5, v[9:10]
v_add_nc_u32_e32 v6, s17, v6
v_add_co_u32 v9, vcc_lo, s8, v7
v_add_co_ci_u32_e32 v10, vcc_lo, s9, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s12, v6
v_add_co_u32 v7, s0, s10, v7
v_add_co_ci_u32_e64 v8, s0, s11, v8, s0
s_or_b32 s16, vcc_lo, s16
global_store_b96 v[9:10], v[3:5], off
global_store_b96 v[7:8], v[0:2], off
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB0_2
.LBB0_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| three_nn_gpu | 8,923 | 3,294 | stackv2-00000-of-00015 |
// Demangled: MatrixMul(int*, int*, int*, int)
Function : _Z9MatrixMulPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R12, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
IMAD.WIDE R10, R6, R11, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans1;
MOV R23, 0x4 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6.reuse, R9, UR24 ?trans1;
LDG.E R14, desc[UR16][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, R19, UR14 ?WAIT4_END_GROUP;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R16, desc[UR16][R8.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0x8] &wr=0x5 ?trans1;
IMAD.WIDE R20, R6, R25, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R11, 0x4 &req={1} ?trans1;
IMAD.WIDE R8, R6.reuse, R25, UR8 &req={4} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R6, R11, UR6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR16][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R30, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
IMAD R12, R12, R13, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R12, R15, R14, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R17, R17, R16, R12 &req={5} ?WAIT4_END_GROUP;
IMAD R17, R24, R18, R17 ?WAIT4_END_GROUP;
IMAD R17, R26, R22, R17 &req={4} ?WAIT4_END_GROUP;
IMAD R17, R28, R20, R17 ?WAIT4_END_GROUP;
IMAD R8, R30, R8, R17 ?WAIT4_END_GROUP;
IMAD R0, R19, R10, R8 ?trans1;
@P0 BRA 0x210 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7e0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 IMAD R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 IMAD R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 IMAD R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xad0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMul(int*, int*, int*, int)
_Z9MatrixMulPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMul | 4,508 | 1,245 | stackv2-00000-of-00015 |
// Demangled: hello_kernel(char*, int)
Function : _Z12hello_kernelPci
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans2;
IADD3 R1, PT, PT, R1, -0x1e0, RZ &req={0} ?trans1;
HFMA2 R8, -RZ, RZ, 0.00853729248046875, 0.008056640625 ?trans1;
MOV R11, 0xa202020 ?trans1;
HFMA2 R9, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R10, 0x20202020 ?trans2;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
HFMA2 R4, -RZ, RZ, 0.01393890380859375, 0.01393890380859375 ?trans1;
MOV R5, 0x23232323 ?trans1;
HFMA2 R6, -RZ, RZ, 0.01393890380859375, 0.01393890380859375 ?trans1;
STL.128 [R1+0x40], R8 &rd=0x1 ?trans1;
MOV R7, 0x23232323 ?trans1;
HFMA2 R17, -RZ, RZ, 0.00018727779388427734375, 0.01393890380859375 ?trans1;
MOV R18, 0x205f2020 ?trans1;
HFMA2 R19, -RZ, RZ, 456, 0.008056640625 ?trans1;
MOV R16, 0x23232323 ?trans1;
STL.128 [R1], R4 ?trans1;
MOV R12, 0x7c207c20 ?trans1;
HFMA2 R13, -RZ, RZ, 0.008758544921875, 0.008056640625 ?trans1;
MOV R14, 0x2020207c ?trans1;
STL.128 [R1+0x10], R4 &rd=0x2 ?trans1;
HFMA2 R15, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R26, 0x7c207c20 ?trans1;
HFMA2 R24, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
STL.128 [R1+0x20], R16 &rd=0x3 ?trans1;
MOV R25, 0x20202020 ?trans1;
MOV R8, 0x7c207c5f &req={1} ?trans1;
HFMA2 R9, -RZ, RZ, 471.75, 456 ?trans1;
MOV R10, 0x5f5f2020 ?trans1;
HFMA2 R11, -RZ, RZ, 0.000186920166015625, 0.00853729248046875 ?trans1;
STL.128 [R1+0x50], R12 ?trans1;
HFMA2 R27, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R29, 0xa202020 ?trans1;
HFMA2 R31, -RZ, RZ, 0.008758544921875, 471.75 ?trans1;
STL.128 [R1+0x90], R8 &rd=0x1 ?trans1;
MOV R28, 0x20202020 ?trans1;
HFMA2 R4, -RZ, RZ, 471.75, 0.008758544921875 &req={2} ?trans1;
MOV R5, 0x205f205f ?trans1;
HFMA2 R6, -RZ, RZ, 0.008056640625, 471.75 ?trans1;
MOV R7, 0x205f5f20 ?trans1;
MOV R30, 0x7c207c20 ?trans1;
MOV R16, 0x20207c20 &req={3} ?trans1;
HFMA2 R17, -RZ, RZ, 0.008056640625, 471.75 ?trans1;
MOV R18, 0x5f202f7c ?trans1;
STL.128 [R1+0x80], R4 &rd=0x2 ?trans1;
HFMA2 R19, -RZ, RZ, 0.02783203125, 264 ?trans1;
MOV R20, 0x205c205f ?trans1;
HFMA2 R21, -RZ, RZ, 559.5, 0.00817108154296875 ?trans1;
MOV R23, 0x205f202f ?trans1;
MOV R22, 0x7c207c20 ?trans1;
S2R R9, SR_TID.X &req={1} &wr=0x0 ?trans1;
LDC R8, c[0x0][0x360] &wr=0x0 ?trans1;
HFMA2 R12, -RZ, RZ, 456, 0.114990234375 ?trans1;
MOV R13, 0xa205c20 ?trans1;
HFMA2 R15, -RZ, RZ, 0.008758544921875, 0.008056640625 ?trans1;
MOV R14, 0x7c207c20 ?trans1;
STL.128 [R1+0x60], R24 &rd=0x1 ?trans1;
HFMA2 R33, -RZ, RZ, 471.75, 479 ?trans1;
MOV R34, 0x2020202f ?trans1;
HFMA2 R32, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R5, 0x7c202f5f &req={2} ?trans1;
HFMA2 R4, -RZ, RZ, 456, 0.008758544921875 ?trans1;
MOV R7, 0x7c5f2820 ?trans1;
MOV R6, 0x7c207c20 ?trans1;
STL.128 [R1+0x70], R28 &rd=0x2 ?trans1;
MOV R35, 0x20202020 ?WAIT3_END_GROUP;
STL.128 [R1+0xa0], R16 &rd=0x3 ?trans4;
STL.128 [R1+0xb0], R20 &rd=0x4 ?trans1;
MOV R24, 0x7c5f7c20 &req={1} ?trans1;
HFMA2 R25, -RZ, RZ, 479, 0.008056640625 ?trans1;
MOV R26, 0x5f5f5c7c ?trans1;
STL.128 [R1+0xc0], R12 &rd=0x1 ?trans1;
MOV R27, 0x7c5f7c5f ?WAIT3_END_GROUP;
STL.128 [R1+0xd0], R4 &rd=0x5 ?trans1;
HFMA2 R29, -RZ, RZ, 471.75, 0.008056640625 &req={2} ?trans2;
IMAD R8, R8, UR4, R9 &req={0} ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x0 ?trans1;
MOV R30, 0x5f20202f ?trans1;
HFMA2 R31, -RZ, RZ, 0.000186920166015625, 0.11517333984375 ?trans1;
MOV R28, 0x7c207c20 ?trans1;
HFMA2 R17, -RZ, RZ, 0.06829833984375, 471 &req={3} ?trans1;
MOV R18, 0x7c5f7c20 ?trans1;
HFMA2 R19, -RZ, RZ, 471.75, 471 ?trans1;
MOV R16, 0x7c5f7c20 ?trans1;
HFMA2 R23, -RZ, RZ, 0.11517333984375, 456 &req={4} ?trans1;
MOV R20, 0x20202020 ?trans1;
HFMA2 R21, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R22, 0x20202020 ?trans1;
HFMA2 R12, -RZ, RZ, 0.008056640625, 0.008056640625 &req={1} ?trans1;
MOV R5, 0xa207c5f &req={5} ?trans1;
HFMA2 R4, -RZ, RZ, 471.75, 287 ?trans1;
MOV R7, 0x20202020 ?trans1;
HFMA2 R6, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R13, 0x20202020 ?trans1;
ISETP.GE.AND P0, PT, R8, UR4, PT &req={0} ?trans1;
HFMA2 R14, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R15, 0x20202020 ?trans1;
STL.128 [R1+0xe0], R28 &rd=0x0 ?trans4;
STL.128 [R1+0xf0], R24 &rd=0x1 ?trans4;
STL.128 [R1+0x100], R16 &rd=0x2 ?trans4;
STL.128 [R1+0x110], R4 &rd=0x3 ?trans4;
STL.128 [R1+0x120], R20 &rd=0x4 ?trans1;
MOV R28, 0x20207c20 &req={0} ?trans1;
HFMA2 R29, -RZ, RZ, 0.008056640625, 0.008056640625 ?trans1;
MOV R30, 0x20202020 ?trans1;
STL.128 [R1+0x30], R12 ?trans1;
HFMA2 R31, -RZ, RZ, 0.000186920166015625, 0.008056640625 ?trans1;
MOV R24, 0x3a3a3a3a &req={1} ?trans1;
HFMA2 R25, -RZ, RZ, 0.0001900196075439453125, 0.7783203125 ?trans1;
STL.128 [R1+0x140], R12 &rd=0x0 ?trans1;
HFMA2 R16, -RZ, RZ, 0.055999755859375, 0.055999755859375 &req={2} ?trans1;
MOV R17, 0x2b2b2b2b ?trans1;
HFMA2 R18, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R5, 0x3a3a3a3a &req={3} ?trans1;
HFMA2 R4, -RZ, RZ, 0.7783203125, 0.7783203125 ?trans1;
MOV R6, 0x3a3a3a3a ?trans1;
HFMA2 R7, -RZ, RZ, 0.7783203125, 0.7783203125 ?trans1;
MOV R22, 0x2b2b2b2b &req={4} ?trans1;
HFMA2 R23, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R21, 0xa202020 ?trans1;
MOV R19, 0x2b2b2b2b ?trans1;
CS2R R26, SRZ ?trans1;
STL.128 [R1+0x130], R28 &rd=0x1 ?trans1;
HFMA2 R15, -RZ, RZ, 0.00018823146820068359375, 0.055999755859375 &req={0} ?trans1;
MOV R12, 0x2b2b2b2b ?trans1;
HFMA2 R13, -RZ, RZ, 0.055999755859375, 0.055999755859375 ?trans1;
MOV R14, 0x2b2b2b2b ?trans1;
STL.128 [R1+0x150], R32 &rd=0x1 ?trans4;
STL.128 [R1+0x190], R4 &rd=0x1 ?trans4;
STL.128 [R1+0x160], R20 &rd=0x1 ?trans4;
STL.128 [R1+0x170], R16 &rd=0x1 ?trans4;
STL.128 [R1+0x180], R12 &rd=0x1 ?trans4;
STL.128 [R1+0x1b0], R24 &rd=0x1 ?trans4;
STL.128 [R1+0x1a0], R4 &rd=0x1 ?trans4;
STL.128 [R1+0x1c0], RZ &rd=0x1 ?trans4;
STL.128 [R1+0x1d0], RZ &rd=0x1 ?trans1;
@P0 EXIT ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R2, R1 ?trans1;
MOV R3, RZ ?WAIT5_END_GROUP;
IADD.64 R2, R2, R8 ?WAIT7_END_GROUP;
LDL.U8 R3, [R2] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
IADD.64 R8, R8, UR6 &req={0} ?WAIT6_END_GROUP;
STG.E.U8 desc[UR4][R8.64], R3 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x930;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: hello_kernel(char*, int)
_Z12hello_kernelPci:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x1c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
v_ashrrev_i32_e32 v4, 31, v1
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, __const._Z12hello_kernelPci.hello_str@rel32@lo+4
s_addc_u32 s3, s3, __const._Z12hello_kernelPci.hello_str@rel32@hi+12
v_add_co_u32 v2, vcc_lo, v1, s2
s_load_b64 s[0:1], s[0:1], 0x0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
global_load_u8 v2, v[2:3], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v1
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
s_waitcnt vmcnt(0)
global_store_b8 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| hello_kernel | 4,507 | 475 | stackv2-00000-of-00015 |
// Demangled: rotation(unsigned short)
Function : _Z8rotationt
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans8;
LDC.U16 R5, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x4][RZ] &wr=0x0 ?trans2;
STG.E.U16 desc[UR4][R2.64], R5 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x60;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: rotation(unsigned short)
_Z8rotationt:
s_load_b32 s2, s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, rot@rel32@lo+4
s_addc_u32 s1, s1, rot@rel32@hi+12
s_waitcnt lgkmcnt(0)
v_mov_b32_e32 v1, s2
global_store_b16 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| rotation | 199 | 159 | stackv2-00000-of-00015 |
// Demangled: set_mouse_g(float, float)
Function : _Z11set_mouse_gff
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x4][0x20] &wr=0x1 ?trans1;
FADD R5, R6, R6 &req={0} ?trans1;
FADD R7, R7, R7 ?WAIT4_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans4;
STG.E desc[UR4][R2.64+0x4], R7 ?trans1;
EXIT ?trans5;
BRA 0x90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: set_mouse_g(float, float)
_Z11set_mouse_gff:
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, mouse@rel32@lo+4
s_addc_u32 s3, s3, mouse@rel32@hi+12
s_waitcnt lgkmcnt(0)
v_add_f32_e64 v0, s0, s0
v_add_f32_e64 v1, s1, s1
global_store_b64 v2, v[0:1], s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| set_mouse_g | 270 | 188 | stackv2-00000-of-00015 |
// Demangled: set_window_g(int, int)
Function : _Z12set_window_gii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans7;
LDC.64 R2, c[0x4][0x28] &wr=0x1 ?trans8;
LDC.64 R4, c[0x4][0x30] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
I2FP.F32.S32 R7, UR6 &req={0} ?WAIT2_END_GROUP;
I2FP.F32.S32 R9, UR7 ?WAIT3_END_GROUP;
FMUL R11, R7, 0.5 ?trans1;
STG.E desc[UR4][R2.64], R7 &req={1} ?trans1;
FMUL R13, R9, 0.5 ?WAIT3_END_GROUP;
STG.E desc[UR4][R2.64+0x4], R9 ?trans4;
STG.E desc[UR4][R4.64], R11 &req={2} ?trans4;
STG.E desc[UR4][R4.64+0x4], R13 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: set_window_g(int, int)
_Z12set_window_gii:
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_cvt_f32_i32_e32 v0, s0
v_cvt_f32_i32_e32 v1, s1
v_mov_b32_e32 v4, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, window@rel32@lo+4
s_addc_u32 s1, s1, window@rel32@hi+12
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, windowD2@rel32@lo+4
s_addc_u32 s3, s3, windowD2@rel32@hi+12
v_dual_mul_f32 v2, 0.5, v0 :: v_dual_mul_f32 v3, 0.5, v1
s_clause 0x1
global_store_b64 v4, v[0:1], s[0:1]
global_store_b64 v4, v[2:3], s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| set_window_g | 386 | 311 | stackv2-00000-of-00015 |
// Demangled: compute_perm(double*, double*, int*, int, int, int, int, int)
Function : _Z12compute_permPdS_Piiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R5, SR_TID.Y &wr=0x3 ?trans1;
LDCU UR7, c[0x0][0x3a0] &wr=0x4 ?trans1;
S2R R7, SR_TID.Z &wr=0x5 ?trans4;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R4, c[0x0][0x364] &wr=0x3 ?trans8;
S2UR UR6, SR_CTAID.Z &wr=0x5 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR9, PT &req={2} ?trans2;
LDC R2, c[0x0][0x368] &wr=0x5 ?trans1;
IMAD R4, R4, UR5, R5 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R4, UR8, P0 ?trans1;
IMAD R5, R2, UR6, R7 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R5, UR7, P0 &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.GT.AND P0, PT, R4, UR6, PT &req={0} ?WAIT13_END_GROUP;
@P0 LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
@P0 IMAD R7, R5, UR8, R4 ?WAIT4_END_GROUP;
@P0 IMAD R7, R7, UR9, R0 ?WAIT4_END_GROUP;
@P0 IMAD.WIDE R2, R7, 0x8, R2 &req={0} ?WAIT5_END_GROUP;
@P0 STG.E.64 desc[UR4][R2.64], RZ &req={1} &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x490 ?WAIT12_END_GROUP;
@P0 BRA 0x310 ?trans5;
LDC R6, c[0x0][0x3a4] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
IMAD R6, R5, R6, UR6 &req={1} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R6, -0x1, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R3, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x480 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R5, R5, UR8, RZ ?WAIT4_END_GROUP;
IMAD R5, R5, UR9, R0 ?WAIT3_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R5, 0x8, R6 &req={1} ?trans1;
DADD R4, R2, 1 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64], R4 &req={0} ?trans1;
EXIT ?trans5;
LDC R6, c[0x0][0x3a4] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
IMAD R6, R5, R6, UR6 &req={1} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R6, -0x1, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R7, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x480 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R9, R5, UR8, R4 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R9.reuse, -0x1, RZ ?trans1;
IMAD R9, R9, UR9, R0 ?WAIT4_END_GROUP;
IMAD R4, R5, UR9, R0 ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, R4, RZ ?trans1;
IMAD.WIDE R4, R9, 0x8, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x8, R2 ?trans2;
LDG.E.64 R4, desc[UR4][R4.64] &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans3;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R9, 0x8, R6 &req={0} ?trans1;
DADD R6, R2, R4 &req={2} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R8.64], R6 &req={0} ?trans1;
EXIT ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R5, R5, UR8, R4 ?WAIT4_END_GROUP;
IMAD R7, R5, UR9, R0 ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
IMAD.WIDE R4, R7, 0x8, R4 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR4][R4.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x520;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: compute_perm(double*, double*, int*, int, int, int, int, int)
_Z12compute_permPdS_Piiiiii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x3c
s_load_b128 s[4:7], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v1, v0, 10, 10
v_bfe_u32 v6, v0, 20, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s8, s2, 16
s_and_b32 s2, s2, 0xffff
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[4:5], null, s14, s8, v[1:2]
v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
v_mad_u64_u32 v[2:3], null, s15, s3, v[6:7]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_gt_i32_e32 vcc_lo, s4, v4
v_cmp_gt_i32_e64 s2, s5, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e64 s3, s6, v2
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_18
s_clause 0x2
s_load_b32 s2, s[0:1], 0x28
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_ge_i32_e64 s2, v4
s_xor_b32 s3, exec_lo, s3
s_cbranch_execz .LBB0_15
v_cmp_ne_u32_e64 s12, 0, v4
s_mov_b32 s6, 0
s_mov_b32 s13, exec_lo
v_cmpx_eq_u32_e32 0, v4
s_cbranch_execz .LBB0_4
v_mad_u64_u32 v[5:6], null, v2, s7, s[2:3]
s_and_not1_b32 s12, s12, exec_lo
s_mov_b32 s6, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
global_load_b32 v1, v[5:6], off offset:-4
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, v1, v0
s_and_b32 s14, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s12, s12, s14
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s13
s_and_saveexec_b32 s13, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s12, exec_lo, s13
s_cbranch_execz .LBB0_12
v_cmp_gt_i32_e64 s13, 1, v4
s_mov_b32 s14, exec_lo
v_cmpx_lt_i32_e32 0, v4
s_cbranch_execz .LBB0_9
v_mad_u64_u32 v[5:6], null, v2, s7, s[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s0, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_mov_b32 s1, -1
s_mov_b32 s0, exec_lo
global_load_b32 v1, v[5:6], off offset:-4
s_waitcnt vmcnt(0)
v_cmpx_le_i32_e64 v1, v0
s_cbranch_execz .LBB0_8
v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
s_xor_b32 s1, exec_lo, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, -1, v5
v_mad_u64_u32 v[6:7], null, v3, s5, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v8, v6, v1
v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[8:9], 3, v[8:9]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[10:11], 3, v[6:7]
v_add_co_u32 v8, vcc_lo, s10, v8
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v9, vcc_lo, s11, v9, vcc_lo
v_add_co_u32 v10, vcc_lo, s10, v10
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
s_clause 0x1
global_load_b64 v[8:9], v[8:9], off
global_load_b64 v[10:11], v[10:11], off
s_waitcnt vmcnt(0)
v_add_f64 v[8:9], v[8:9], v[10:11]
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_and_not1_b32 s0, s13, exec_lo
s_and_b32 s1, s1, exec_lo
s_or_b32 s13, s0, s1
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s14
s_and_saveexec_b32 s0, s13
s_cbranch_execz .LBB0_11
v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[6:7]
v_add_co_u32 v3, vcc_lo, s10, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
global_load_b64 v[8:9], v[3:4], off
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 s6, s6, exec_lo
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s12
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB0_14
v_mul_lo_u32 v1, v2, s4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, v1, s5, v[0:1]
v_ashrrev_i32_e32 v7, 31, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[6:7]
v_add_co_u32 v0, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
global_load_b64 v[0:1], v[0:1], off
s_waitcnt vmcnt(0)
v_add_f64 v[8:9], v[0:1], 1.0
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_15:
s_and_not1_saveexec_b32 s0, s3
s_cbranch_execz .LBB0_17
v_mad_u64_u32 v[5:6], null, v2, s4, v[4:5]
s_waitcnt vmcnt(0)
v_mov_b32_e32 v8, 0
v_mov_b32_e32 v9, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[6:7], null, v5, s5, v[0:1]
v_ashrrev_i32_e32 v7, 31, v6
.LBB0_17:
s_or_b32 exec_lo, exec_lo, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[6:7]
v_add_co_u32 v0, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b64 v[0:1], v[8:9], off
.LBB0_18:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| compute_perm | 2,081 | 3,165 | stackv2-00000-of-00015 |
// Demangled: matrixMulGPUKernal0(float*, float const*, float const*, int, int)
Function : _Z19matrixMulGPUKernal0PfPKfS1_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R2, SR_TID.Y &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R22, -RZ, RZ, 0, 0 ?trans1;
S2R R3, SR_TID.X &wr=0x4 ?trans4;
LDC R29, c[0x0][0x364] &wr=0x2 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT7_END_GROUP;
LDC R28, c[0x0][0x360] &wr=0x4 ?trans1;
IMAD R29, R29, UR4, R2 &req={2} ?trans2;
IMAD R28, R28, UR5, R3 &req={4} ?WAIT3_END_GROUP;
@!P0 BRA 0xa50 &req={3,0} ?trans5;
ISETP.GE.U32.AND P1, PT, R0.reuse, 0x8, PT ?trans1;
LOP3.LUT R17, R0, 0x7, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R16, R29, R0, RZ ?trans1;
MOV R22, RZ ?trans2;
ISETP.NE.AND P0, PT, R17, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x580 ?trans6;
LDC R14, c[0x0][0x39c] &wr=0x0 ?trans1;
LOP3.LUT R30, R0, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
UMOV UR4, URZ ?trans1;
MOV R22, RZ ?trans1;
MOV R31, R28 ?trans1;
IADD3 R30, PT, PT, -R30, RZ, RZ ?WAIT3_END_GROUP;
LDC.64 R18, c[0x0][0x388] &wr=0x1 ?trans1;
SHF.R.S32.HI R15, RZ, 0x1f, R14 &req={0} ?WAIT5_END_GROUP;
IADD.64 R2, R14, R14 ?trans2;
IMAD.WIDE.U32 R18, R16, 0x4, R18 &req={1} ?trans2;
IADD.64 R4, R14, R2 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R2, 0x2, R3 ?trans1;
IADD.64 R6, R14, R4 ?trans2;
IMAD.SHL.U32 R12, R2, 0x4, RZ ?trans1;
SHF.L.U64.HI R11, R4, 0x2, R5 ?trans1;
IADD.64 R2, R14, R6 ?trans2;
IMAD.SHL.U32 R10, R4, 0x4, RZ ?trans1;
SHF.L.U64.HI R9, R6, 0x2, R7 ?trans1;
IADD.64 R4, R14, R2 ?trans2;
IMAD.SHL.U32 R8, R6, 0x4, RZ ?trans1;
IADD.64 R18, R18, 0x10 ?WAIT2_END_GROUP;
IADD.64 R20, R14, R4 ?trans2;
IMAD.SHL.U32 R6, R2.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R7, R2, 0x2, R3 ?trans2;
SHF.L.U64.HI R5, R4.reuse, 0x2, R5 ?trans1;
IMAD.SHL.U32 R4, R4, 0x4, RZ ?trans1;
SHF.L.U64.HI R3, R20.reuse, 0x2, R21 ?trans1;
IMAD.SHL.U32 R2, R20, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R26, c[0x0][0x390] &wr=0x0 ?trans1;
LDG.E R23, desc[UR6][R18.64+-0x10] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64+-0xc] &wr=0x3 ?trans4;
LDG.E R37, desc[UR6][R18.64+-0x8] &wr=0x4 ?trans4;
LDG.E R36, desc[UR6][R18.64+-0x4] &wr=0x5 ?trans1;
IMAD.WIDE R26, R31, 0x4, R26 &req={0} ?WAIT5_END_GROUP;
LDG.E R34, desc[UR6][R26.64] &wr=0x2 ?trans1;
IMAD.WIDE R24, R14, 0x4, R26 ?trans1;
IADD.64 R20, R26, R12 ?WAIT5_END_GROUP;
LDG.E R24, desc[UR6][R24.64] &wr=0x3 ?trans1;
IADD.64 R32, R26, R10 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R20.64] &wr=0x4 ?trans4;
LDG.E R33, desc[UR6][R32.64] &wr=0x5 ?trans4;
LDG.E R32, desc[UR6][R18.64+0x4] &wr=0x5 ?trans1;
FFMA R34, R23, R34, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R35, R35, R24, R34 &req={3} ?WAIT4_END_GROUP;
FFMA R35, R37, R20, R35 &req={4} ?trans1;
IADD.64 R20, R26.reuse, R8 ?trans2;
IADD.64 R22, R26, R6 ?trans2;
FFMA R34, R36, R33, R35 &req={5} ?trans1;
IADD.64 R24, R26.reuse, R4 ?trans2;
LDG.E R20, desc[UR6][R20.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD.64 R26, R26, R2 ?WAIT3_END_GROUP;
LDG.E R23, desc[UR6][R22.64] &wr=0x3 ?trans4;
LDG.E R24, desc[UR6][R24.64] &wr=0x4 ?trans4;
LDG.E R35, desc[UR6][R18.64+0x8] &wr=0x4 ?trans4;
LDG.E R26, desc[UR6][R26.64] &wr=0x5 ?trans4;
LDG.E R37, desc[UR6][R18.64+0xc] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R30, PT, PT, R30, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R30, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IMAD R31, R14, 0x8, R31 ?trans1;
IADD.64 R18, R18, 0x20 &req={0} ?trans2;
FFMA R33, R33, R20, R34 &req={2} ?WAIT4_END_GROUP;
FFMA R32, R32, R23, R33 &req={3} ?WAIT4_END_GROUP;
FFMA R32, R35, R24, R32 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R37, R26, R32 &req={5} ?trans1;
@P1 BRA 0x310 ?trans6;
@!P0 BRA 0xa50 ?trans5;
ISETP.GE.U32.AND P1, PT, R17, 0x4, PT ?trans1;
LOP3.LUT R19, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R19, RZ, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x7f0 ?trans6;
LDC R12, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
IADD3 R7, PT, PT, R16, UR4, RZ ?trans1;
UMOV UR5, URZ ?WAIT3_END_GROUP;
IADD.64 R8, R16, UR4 ?trans2;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R10, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R2, P1, R8, UR8, 0x2 &req={1} ?trans1;
IMAD R3, R12, UR4, R28 &req={0} ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?trans2;
IMAD.WIDE R4, R3, 0x4, R4 &req={2} ?trans1;
LEA.HI.X R3, R8, UR9, R9, 0x2, P1 ?trans1;
IADD.64 R8, R12, R14 ?WAIT3_END_GROUP;
LEA R6, P1, R14, R4.reuse, 0x2 ?trans1;
IMAD.WIDE R12, R12, 0x4, R4 ?trans1;
LDG.E R18, desc[UR6][R4.64] &wr=0x2 ?trans3;
IMAD.WIDE.U32 R10, R7, 0x4, R10 &req={3} ?trans1;
LEA.HI.X R7, R14, R5, R15, 0x2, P1 ?trans1;
LDG.E R12, desc[UR6][R12.64] &wr=0x3 ?trans1;
LEA R14, P1, R8, R4, 0x2 ?WAIT3_END_GROUP;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans1;
LEA.HI.X R15, R8, R5, R9, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR6][R2.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x4 ?trans4;
LDG.E R8, desc[UR6][R2.64+0x8] &wr=0x4 ?trans4;
LDG.E R9, desc[UR6][R2.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R11, R11, R18, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R11, R20, R12, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R8, R8, R6, R11 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R9, R14, R8 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa50 ?trans5;
ISETP.NE.AND P1, PT, R19, 0x1, PT ?trans1;
LOP3.LUT R0, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R0, 0x1, PT ?WAIT7_END_GROUP;
@!P1 BRA 0x9a0 ?trans6;
LDC R11, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x388] &wr=0x1 ?trans1;
MOV R6, R16 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
IADD3 R9, PT, PT, R16, UR4, RZ ?trans1;
UMOV UR5, URZ ?WAIT3_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IADD.64 R6, R6, UR4 ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x3 ?trans1;
LEA R8, P1, R6, UR8, 0x2 &req={1} ?trans1;
IMAD R13, R11, UR4, R28 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R13, 0x4, R4 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={3} ?trans1;
LEA.HI.X R9, R6, UR9, R7, 0x2, P1 ?WAIT3_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R4 ?trans2;
LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R22, R3, R4, R22 &req={2} ?WAIT4_END_GROUP;
FFMA R22, R9, R6, R22 &req={3} ?WAIT7_END_GROUP;
@P0 BRA 0xa50 ?trans5;
LDC R7, c[0x0][0x39c] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R16, UR4, RZ ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R7, R7, UR4, R28 &req={0} ?trans2;
IMAD.WIDE.U32 R2, R17, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR6][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x3 ?trans2;
FFMA R22, R3, R4, R22 &req={3} ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x39c] &wr=0x1 ?trans2;
IMAD R29, R29, UR4, R28 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R29, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R22 ?trans1;
EXIT ?trans5;
BRA 0xab0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMulGPUKernal0(float*, float const*, float const*, int, int)
_Z19matrixMulGPUKernal0PfPKfS1_ii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v3, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s9, s8, 16
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, s15, s9, v[2:3]
v_mad_u64_u32 v[1:2], null, s14, s8, v[3:4]
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB0_3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v2, v0, s6
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
.LBB0_2:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s6, s6, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s6, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s7, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_2
s_branch .LBB0_4
.LBB0_3:
v_mov_b32_e32 v6, 0
.LBB0_4:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s7, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMulGPUKernal0 | 4,422 | 1,082 | stackv2-00000-of-00015 |
// Demangled: matrixMulGPUKernal1(float*, float const*, float const*, int, int)
Function : _Z19matrixMulGPUKernal1PfPKfS1_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R22, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR10, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
S2R R3, SR_TID.Y &wr=0x4 ?trans4;
S2UR UR4, SR_CTAID.Y &wr=0x5 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x0 ?trans1;
ISETP.GE.AND P0, PT, R22, 0x1, PT &req={1} ?trans1;
USHF.L.U32 UR4, UR4, 0x4, URZ &req={5} ?trans1;
USHF.L.U32 UR5, UR5, 0x4, URZ &req={0} ?WAIT11_END_GROUP;
@!P0 BRA 0xbc0 &req={4,3,2} ?trans5;
IMAD R27, R22, UR4, RZ ?trans1;
S2UR UR8, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR6, 0x400 ?trans1;
MOV R17, RZ ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x400, URZ ?trans1;
IADD3 R10, PT, PT, R27.reuse, R22, RZ ?trans2;
IADD3 R21, PT, PT, R27, 0x10, RZ ?trans2;
LOP3.LUT R5, RZ, R27, RZ, 0x33, !PT ?WAIT3_END_GROUP;
VIMNMX.S32 R2, R10, R21, !PT ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R2, R5, RZ ?WAIT4_END_GROUP;
LOP3.LUT P0, RZ, R2.reuse, 0x10, RZ, 0xc0, !PT ?trans1;
ISETP.GE.U32.AND P1, PT, R2, 0x10, PT ?trans1;
ULEA UR6, UR8, UR6, 0x18 &req={0} ?trans1;
ULEA UR7, UR8, UR7, 0x18 ?WAIT5_END_GROUP;
LEA R11, R3.reuse, UR6, 0x6 ?trans1;
UMOV UR6, UR5 ?trans1;
LEA R8, R0.reuse, UR7, 0x2 ?trans2;
LEA R9, R0, R11, 0x2 ?trans2;
LEA R2, R3, R8, 0x6 ?trans1;
@P0 BRA 0x550 ?trans6;
LDCU UR6, c[0x0][0x39c] &wr=0x0 ?trans1;
LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R4, R3, R22, R0 ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R27, R4, RZ ?trans2;
LDC.64 R14, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R6, R3, UR6, R0 &req={0} ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, R6, UR5, RZ ?trans1;
IMAD.WIDE R12, R5, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R12, desc[UR10][R12.64] &wr=0x3 ?trans1;
IMAD.WIDE R14, R7, 0x4, R14 &req={2} ?WAIT6_END_GROUP;
LDG.E R15, desc[UR10][R14.64] &wr=0x2 ?trans1;
ULEA UR6, UR6, UR5, 0x4 ?WAIT3_END_GROUP;
STS [R9], R12 &req={3} ?trans4;
STS [R2], R15 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R29, [R8] ?trans4;
LDS.128 R4, [R11] &wr=0x0 ?trans4;
LDS R31, [R8+0x40] &wr=0x1 ?trans4;
LDS R28, [R8+0x80] &wr=0x2 ?trans4;
LDS R33, [R8+0xc0] &wr=0x3 ?trans4;
LDS R27, [R8+0x100] ?trans4;
LDS.128 R16, [R11+0x10] &wr=0x4 ?trans4;
LDS R24, [R8+0x140] &wr=0x5 ?trans4;
LDS R23, [R8+0x180] &wr=0x5 ?trans4;
LDS R20, [R8+0x1c0] &wr=0x5 ?trans4;
LDS R25, [R8+0x200] ?trans4;
LDS.128 R12, [R11+0x20] &wr=0x5 ?trans1;
FFMA R4, R4, R29, RZ &req={0} ?WAIT3_END_GROUP;
LDS R26, [R8+0x240] &wr=0x0 ?trans1;
FFMA R5, R31, R5, R4 &req={1} ?WAIT3_END_GROUP;
LDS R29, [R8+0x280] &wr=0x1 ?trans1;
FFMA R6, R28, R6, R5 &req={2} ?WAIT3_END_GROUP;
LDS R28, [R8+0x2c0] &wr=0x2 ?trans1;
FFMA R33, R33, R7, R6 &req={3} ?WAIT3_END_GROUP;
LDS R31, [R8+0x300] ?trans4;
LDS.128 R4, [R11+0x30] &wr=0x3 ?trans1;
FFMA R33, R16, R27, R33 &req={4} ?WAIT3_END_GROUP;
LDS R30, [R8+0x340] &wr=0x4 ?trans4;
LDS R27, [R8+0x380] &wr=0x4 ?trans1;
FFMA R24, R24, R17, R33 &req={5} ?WAIT3_END_GROUP;
LDS R16, [R8+0x3c0] &wr=0x5 ?trans1;
FFMA R23, R23, R18, R24 ?WAIT4_END_GROUP;
FFMA R19, R20, R19, R23 ?WAIT4_END_GROUP;
FFMA R19, R12, R25, R19 ?WAIT4_END_GROUP;
FFMA R26, R26, R13, R19 &req={0} ?WAIT4_END_GROUP;
FFMA R29, R29, R14, R26 &req={1} ?WAIT4_END_GROUP;
FFMA R15, R28, R15, R29 &req={2} ?WAIT4_END_GROUP;
FFMA R15, R4, R31, R15 &req={3} ?WAIT4_END_GROUP;
FFMA R30, R30, R5, R15 &req={4} ?WAIT4_END_GROUP;
FFMA R27, R27, R6, R30 ?WAIT4_END_GROUP;
FFMA R17, R16, R7, R27 &req={5} ?trans1;
MOV R27, R21 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0xbc0 ?trans5;
LDC R20, c[0x0][0x39c] &wr=0x0 ?trans1;
IADD3 R23, PT, PT, R0, UR6, RZ ?trans2;
IADD3 R25, PT, PT, R3, 0x10, RZ ?trans2;
IADD3 R21, PT, PT, R27, R0, RZ ?WAIT3_END_GROUP;
LDC.64 R30, c[0x0][0x388] &wr=0x1 ?trans2;
IMAD R21, R3, R22, R21 ?WAIT6_END_GROUP;
LDC.64 R28, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R25, R25, R20.reuse, R23.reuse &req={0} ?trans2;
IMAD R23, R3, R20, R23 ?WAIT7_END_GROUP;
IMAD.WIDE R32, R21, 0x4, R30 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R23, 0x4, R28 &req={2} ?trans1;
LDG.E R16, desc[UR10][R32.64] &wr=0x2 ?trans5;
LDG.E R19, desc[UR10][R18.64] &wr=0x3 ?trans4;
STS [R9], R16 &req={2} ?trans4;
STS [R2], R19 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R24, [R8] ?trans4;
LDS.128 R4, [R11] &wr=0x0 ?trans4;
LDS R26, [R8+0x40] &wr=0x1 ?trans4;
LDS R34, [R8+0x80] &wr=0x2 ?trans4;
LDS R22, [R8+0xc0] &wr=0x3 ?trans4;
LDS R35, [R8+0x100] ?trans4;
LDS.128 R12, [R11+0x10] &wr=0x4 ?trans4;
LDS R37, [R8+0x180] ?trans4;
LDS R36, [R8+0x300] ?trans1;
FFMA R24, R4, R24, R17 &req={0} ?WAIT3_END_GROUP;
LDS R4, [R8+0x140] &wr=0x0 ?trans1;
FFMA R5, R26, R5, R24 &req={1} ?WAIT3_END_GROUP;
LDS R24, [R8+0x1c0] &wr=0x1 ?trans1;
FFMA R6, R34, R6, R5 &req={2} ?WAIT3_END_GROUP;
LDS R5, [R8+0x200] ?trans1;
FFMA R7, R22, R7, R6 &req={3} ?WAIT3_END_GROUP;
LDS.128 R16, [R11+0x20] &wr=0x2 ?trans4;
LDS R26, [R8+0x2c0] ?trans1;
FFMA R7, R12, R35, R7 &req={4} ?WAIT3_END_GROUP;
LDS R22, [R8+0x3c0] ?trans1;
FFMA R4, R4, R13, R7 &req={0} ?WAIT3_END_GROUP;
LDS R7, [R8+0x280] ?trans1;
FFMA R37, R37, R14, R4 ?WAIT3_END_GROUP;
LDS R4, [R8+0x240] &wr=0x0 ?trans1;
FFMA R15, R24, R15, R37 &req={1} ?WAIT3_END_GROUP;
LDS R24, [R8+0x340] ?trans1;
FFMA R5, R16, R5, R15 &req={2} ?WAIT3_END_GROUP;
LDS R16, [R8+0x380] ?trans4;
LDS.128 R12, [R11+0x30] &wr=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IMAD.WIDE R34, R25, 0x4, R28 ?WAIT5_END_GROUP;
LDG.E R32, desc[UR10][R32.64+0x40] &wr=0x2 ?trans4;
LDG.E R34, desc[UR10][R34.64] &wr=0x3 ?trans1;
FFMA R4, R4, R17, R5 &req={0} ?trans1;
IADD3 R27, PT, PT, R27, 0x20, RZ ?trans2;
LEA R23, R20.reuse, R23, 0x5 ?trans1;
FFMA R17, R7, R18, R4 ?trans1;
IADD3 R21, PT, PT, R21, 0x20, RZ ?trans1;
ISETP.GE.AND P0, PT, R27, R10, PT ?trans1;
LEA R25, R20, R25, 0x5 ?trans1;
FFMA R17, R26, R19, R17 ?WAIT4_END_GROUP;
FFMA R17, R12, R36, R17 &req={1} ?WAIT4_END_GROUP;
FFMA R13, R24, R13, R17 ?WAIT4_END_GROUP;
FFMA R13, R16, R14, R13 ?WAIT4_END_GROUP;
FFMA R13, R22, R15, R13 ?trans1;
STS [R9], R32 &req={2} ?trans4;
STS [R2], R34 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R37, [R8] ?trans4;
LDS.128 R4, [R11] &wr=0x0 ?trans4;
LDS R26, [R8+0x40] &wr=0x1 ?trans4;
LDS R35, [R8+0x80] &wr=0x2 ?trans4;
LDS R24, [R8+0xc0] &wr=0x3 ?trans4;
LDS R33, [R8+0x100] ?trans4;
LDS.128 R16, [R11+0x10] &wr=0x4 ?trans4;
LDS R34, [R8+0x140] &wr=0x5 ?trans4;
LDS R32, [R8+0x180] &wr=0x5 ?trans4;
LDS R22, [R8+0x1c0] &wr=0x5 ?trans1;
FFMA R13, R4, R37, R13 &req={0} ?WAIT4_END_GROUP;
FFMA R26, R26, R5, R13 &req={1} ?trans2;
LDS.128 R12, [R11+0x20] ?trans2;
FFMA R5, R35, R6, R26 &req={2} ?trans2;
LDS R35, [R8+0x200] &wr=0x0 ?trans2;
FFMA R5, R24, R7, R5 &req={3} ?trans2;
LDS R24, [R8+0x240] &wr=0x1 ?trans2;
FFMA R5, R16, R33, R5 &req={4} ?WAIT2_END_GROUP;
LDS R33, [R8+0x280] &wr=0x2 ?trans2;
FFMA R5, R34, R17, R5 &req={5} ?trans2;
LDS R16, [R8+0x2c0] &wr=0x3 ?trans2;
FFMA R37, R32, R18, R5 ?trans2;
LDS R17, [R8+0x300] ?trans2;
FFMA R37, R22, R19, R37 ?WAIT2_END_GROUP;
LDS.128 R4, [R11+0x30] &wr=0x4 ?trans4;
LDS R22, [R8+0x340] &wr=0x5 ?trans4;
LDS R19, [R8+0x380] &wr=0x5 ?trans4;
LDS R18, [R8+0x3c0] &wr=0x5 ?trans1;
FFMA R35, R12, R35, R37 &req={0} ?WAIT4_END_GROUP;
FFMA R24, R24, R13, R35 &req={1} ?WAIT4_END_GROUP;
FFMA R33, R33, R14, R24 &req={2} ?WAIT4_END_GROUP;
FFMA R15, R16, R15, R33 &req={3} ?WAIT4_END_GROUP;
FFMA R15, R4, R17, R15 &req={4} ?WAIT4_END_GROUP;
FFMA R22, R22, R5, R15 &req={5} ?WAIT4_END_GROUP;
FFMA R19, R19, R6, R22 ?WAIT4_END_GROUP;
FFMA R17, R18, R7, R19 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x5f0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R3, UR4, RZ ?trans2;
IADD3 R0, PT, PT, R0, UR5, RZ ?WAIT5_END_GROUP;
IMAD R3, R3, UR6, R0 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR10][R2.64], R17 ?trans1;
EXIT ?trans5;
BRA 0xc40;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMulGPUKernal1(float*, float const*, float const*, int, int)
_Z19matrixMulGPUKernal1PfPKfS1_ii:
s_load_b256 s[0:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_lshl_b32 s9, s15, 4
s_lshl_b32 s8, s14, 4
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s6, 1
s_cbranch_scc1 .LBB1_5
v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
v_lshlrev_b32_e32 v7, 2, v1
v_lshlrev_b32_e32 v5, 6, v0
s_mul_i32 s10, s9, s6
s_lshl_b32 s11, s7, 4
s_add_i32 s6, s10, s6
s_mov_b32 s12, s8
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[3:4], null, v0, s7, v[1:2]
v_mov_b32_e32 v4, 0
v_add_nc_u32_e32 v6, 0x400, v7
v_add_nc_u32_e32 v7, v5, v7
v_add_nc_u32_e32 v8, v6, v5
.LBB1_2:
v_add_nc_u32_e32 v9, s10, v2
v_add_nc_u32_e32 v11, s12, v3
s_mov_b32 s13, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v10, 31, v9
v_ashrrev_i32_e32 v12, 31, v11
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[9:10], 2, v[9:10]
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v9, vcc_lo, s2, v9
v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v11, vcc_lo, s4, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
global_load_b32 v10, v[9:10], off
global_load_b32 v11, v[11:12], off
v_mov_b32_e32 v9, v6
s_waitcnt vmcnt(1)
ds_store_b32 v7, v10
s_waitcnt vmcnt(0)
ds_store_b32 v8, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB1_3:
v_add_nc_u32_e32 v10, s13, v5
s_add_i32 s13, s13, 4
ds_load_b32 v11, v9
ds_load_b32 v10, v10
v_add_nc_u32_e32 v9, 64, v9
s_cmp_eq_u32 s13, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, v10, v11
s_cbranch_scc0 .LBB1_3
s_add_i32 s10, s10, 16
s_add_i32 s12, s12, s11
s_cmp_ge_i32 s10, s6
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
s_branch .LBB1_6
.LBB1_5:
v_mov_b32_e32 v4, 0
.LBB1_6:
v_add_nc_u32_e32 v0, s9, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s7
v_add3_u32 v0, s8, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMulGPUKernal1 | 4,782 | 1,436 | stackv2-00000-of-00015 |
// Demangled: vector_add(float const*, float const*, float*, unsigned long)
Function : _Z10vector_addPKfS0_Pfm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R2, R3, UR4, R2 &req={1} ?trans2;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR6, PT &req={2} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.SHL.U32 R4, R2, 0x4, RZ ?trans1;
SHF.R.U32.HI R5, RZ, 0x1e, R2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans3;
IADD.64 R2, R4.reuse, UR8 &req={0} ?trans2;
IADD.64 R6, R4, UR10 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R6.64] &wr=0x3 ?trans1;
IADD.64 R4, R4, UR6 &req={2} ?trans2;
FADD R9, R2, R7 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x160;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vector_add(float const*, float const*, float*, unsigned long)
_Z10vector_addPKfS0_Pfm:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x2c
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s8, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
v_mov_b32_e32 v2, 0
v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[1:2]
s_and_saveexec_b32 s6, vcc_lo
s_cbranch_execz .LBB0_2
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vector_add | 599 | 513 | stackv2-00000-of-00015 |
// Demangled: expansion(int*, int*, int*, int)
Function : _Z9expansionPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x398] &wr=0x1 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT6_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x3c0 ?trans1;
I2F.F64 R4, UR4 &req={1} &wr=0x1 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
MUFU.RCP64H R3, R5 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, -R4, R2, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R2, R6, R2 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, -R4, R6, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R6, R2, R6 &req={1} &rd=0x1 &wr=0x3 ?trans2;
S2R R7, SR_TID.X &req={1} &wr=0x2 ?trans2;
IMAD R0, R0, UR4, R7 &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
I2F.F64 R8, R0 &wr=0x1 ?trans2;
FSETP.GEU.AND P1, PT, |R9|, 6.5827683646048100446e-37, PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R8, R2 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, -R4, R6, R8 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R2, R10, R6 &req={1} &wr=0x1 ?trans2;
FFMA R6, RZ, R5, R3 &req={1} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R6|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x3b0 &req={0} ?trans5;
MOV R6, 0x3b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xc90 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC R10, c[0x0][0x398] &wr=0x0 ?trans1;
IABS R9, R0 ?trans1;
F2I.F64.FLOOR R3, R2 &wr=0x1 ?trans1;
ISETP.GE.AND P1, PT, R0.reuse, RZ, PT ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x6f0 ?trans3;
LDC.64 R12, c[0x0][0x380] &wr=0x3 ?trans1;
IABS R8, R10 &req={0} ?trans1;
IMAD.WIDE R12, R0, 0x4, R12 &req={3} ?WAIT3_END_GROUP;
I2F.RP R6, R8 &wr=0x0 ?trans2;
MUFU.RCP R6, R6 &req={0} &wr=0x0 ?trans2;
IADD3 R4, PT, PT, R6, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x3 ?trans2;
MOV R4, RZ &req={0} ?trans1;
IADD3 R7, PT, PT, RZ, -R5, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R7, R7, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R7, R4 ?trans1;
MOV R7, R9 ?WAIT5_END_GROUP;
IMAD.HI.U32 R5, R5, R7, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R5, R8.reuse, R5, R7 ?trans2;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans3;
ISETP.GT.U32.AND P0, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R5, PT, PT, R5, -R8, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R8, R5, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R5, PT, PT, R5, -R8, RZ ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans3;
MOV R11, R5 ?trans1;
VIMNMX.S32 R5, R3, -0x1, !PT &req={1} ?WAIT4_END_GROUP;
@!P1 IADD3 R11, PT, PT, -R11, RZ, RZ ?trans1;
ISETP.GE.AND P2, PT, R5.reuse, R10.reuse, PT ?trans1;
ISETP.GE.AND P1, PT, R5, R10.reuse, PT ?trans2;
@!P0 LOP3.LUT R11, RZ, R10, RZ, 0x33, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R11, RZ, PT ?WAIT5_END_GROUP;
ISETP.LT.AND P0, PT, R5, R10, !P0 ?trans1;
IMAD.WIDE R4, R3, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R0, 0x4, R8 &req={3} ?trans1;
@P2 BRA 0x6e0 &req={2} ?trans6;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B1, 0x6c0 ?trans1;
PLOP3.LUT P2, PT, PT, PT, PT, 0x8, 0x80 ?trans1;
ISETP.NE.AND P3, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P3 BRA 0x6b0 ?trans5;
LDG.E R0, desc[UR4][R8.64] &wr=0x2 ?trans2;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
SEL R3, RZ, 0x1, !P2 ?WAIT5_END_GROUP;
STG.E desc[UR4][R12.64], R3 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x790 ?trans1;
@P0 STG.E desc[UR4][R4.64], RZ &rd=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x780 ?trans5;
LDG.E R0, desc[UR4][R12.64] &wr=0x2 ?trans2;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P2 MOV R3, 0x1 &req={0} ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R6.64], R3 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD R15, R10, R10, RZ ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans3;
IMAD.WIDE R2, R15, 0x4, R12 &req={2,0} ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0x890 ?trans4;
@P1 BRA 0x880 ?trans5;
LDG.E R0, desc[UR4][R4.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B1, 0x870 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P2 BRA 0x860 ?trans5;
LDG.E R0, desc[UR4][R8.64] &wr=0x2 ?trans2;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={2} ?WAIT5_END_GROUP;
SEL R11, RZ, 0x1, !P2 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
STG.E desc[UR4][R2.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x930 ?trans1;
@P0 STG.E desc[UR4][R4.64], RZ &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x920 ?trans5;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x3 ?trans2;
ISETP.NE.AND P2, PT, R2, RZ, PT &req={3} ?WAIT13_END_GROUP;
@P2 MOV R11, 0x1 ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R6.64], R11 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R3, PT, PT, R15, R15, RZ &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans4;
IMAD.WIDE R2, R3, 0x4, R12 ?trans2;
BSSY.RECONVERGENT B0, 0xa30 ?trans4;
@P1 BRA 0xa20 ?trans5;
LDG.E R0, desc[UR4][R4.64] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B1, 0xa10 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 &req={3} ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={4} ?WAIT13_END_GROUP;
@!P2 BRA 0xa00 ?trans5;
LDG.E R0, desc[UR4][R8.64] &wr=0x3 ?trans2;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={3} ?WAIT5_END_GROUP;
SEL R11, RZ, 0x1, !P2 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
STG.E desc[UR4][R2.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xad0 ?trans1;
@P0 STG.E desc[UR4][R4.64], RZ &rd=0x4 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xac0 ?trans5;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x5 ?trans2;
ISETP.NE.AND P2, PT, R2, RZ, PT &req={5} ?WAIT13_END_GROUP;
@P2 MOV R11, 0x1 &req={3} ?WAIT5_END_GROUP;
@P2 STG.E desc[UR4][R6.64], R11 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD R3, R15, 0x3, RZ &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans3;
IMAD.WIDE R12, R3, 0x4, R12 ?WAIT3_END_GROUP;
BSSY.RECONVERGENT B0, 0xbd0 ?trans4;
@P1 BRA 0xbc0 ?trans5;
LDG.E R0, desc[UR4][R4.64] &wr=0x5 ?trans1;
BSSY.RECONVERGENT B1, 0xbb0 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P2, PT, R0, RZ, PT &req={5} ?WAIT13_END_GROUP;
@!P2 BRA 0xba0 ?trans5;
LDG.E R8, desc[UR4][R8.64] &wr=0x5 ?trans2;
ISETP.NE.AND P2, PT, R8, RZ, PT &req={5} ?WAIT5_END_GROUP;
SEL R3, RZ, 0x1, !P2 ?WAIT8_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
STG.E desc[UR4][R12.64], R3 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xc70 ?trans1;
@P0 STG.E desc[UR4][R4.64], RZ &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0xc60 ?trans5;
LDG.E R12, desc[UR4][R12.64] &req={0} &wr=0x5 ?trans2;
ISETP.NE.AND P0, PT, R12, RZ, PT &req={5} ?WAIT13_END_GROUP;
@P0 MOV R3, 0x1 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R6.64], R3 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
FSETP.GEU.AND P0, PT, |R5|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R2, R5, 0x800fffff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0x1450 ?trans1;
FSETP.GEU.AND P2, PT, |R9|.reuse, 1.469367938527859385e-39, PT ?trans1;
MOV R12, 0x1 ?trans1;
LOP3.LUT R3, R2, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R2, R4 ?trans1;
LOP3.LUT R7, R9, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R20, R5, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R14, 0x1ca00000 ?WAIT3_END_GROUP;
@!P0 DMUL R2, R4, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
MOV R21, R7 ?trans1;
MUFU.RCP64H R13, R3 &req={0} &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R7, R20, PT ?trans1;
@!P2 MOV R16, RZ ?trans1;
@!P0 LOP3.LUT R20, R3, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R22, PT, PT, R20, -0x1, RZ ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R12, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R10, R10, R10 &req={0} &rd=0x0 ?trans2;
@!P2 LOP3.LUT R10, R5, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?trans1;
SEL R11, R14, 0x63400000, !P1 ?WAIT4_END_GROUP;
@!P2 ISETP.GE.U32.AND P3, PT, R7, R10, PT ?trans1;
MOV R10, R8 ?trans1;
LOP3.LUT R11, R11, 0x800fffff, R9, 0xf8, !PT ?WAIT3_END_GROUP;
@!P2 SEL R15, R14, 0x63400000, !P3 ?WAIT5_END_GROUP;
@!P2 LOP3.LUT R15, R15, 0x80000000, R9, 0xf8, !PT ?WAIT4_END_GROUP;
@!P2 LOP3.LUT R17, R15, 0x100000, RZ, 0xfc, !PT ?WAIT15_END_GROUP;
NOP ?WAIT13_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P2 DFMA R10, R10, 2, -R16 &wr=0x0 ?trans2;
@!P2 LOP3.LUT R21, R11, 0x7ff00000, RZ, 0xc0, !PT &req={0} ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R21, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R15, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R22, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R12, R18, R12 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R18, -R2, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R18, R12, R18 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R16, R12, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R18, R16, -R2, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R12, R18, R16 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1300 &req={1,0} ?trans5;
LOP3.LUT R16, R5, 0x7ff00000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R7.reuse, -R16.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R7, R16, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, -0x46a00000, !PT ?trans1;
SEL R7, R14, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R8, R8, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R7, PT, PT, -R7, R8, RZ ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IADD3 R9, PT, PT, R7, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R14, R12, R8 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R15|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1440 ?trans5;
DFMA R2, R12, -R2, R10 &wr=0x0 ?trans1;
MOV R8, RZ ?trans1;
FSETP.NEU.AND P0, PT, R3.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R5, R3, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R9, R5, R9, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1440 ?trans5;
IADD3 R3, PT, PT, -R7.reuse, RZ, RZ ?trans1;
MOV R2, RZ ?trans1;
IADD3 R7, PT, PT, -R7, -0x43300000, RZ ?trans1;
DMUL.RP R8, R12, R8 &wr=0x0 ?trans2;
LOP3.LUT R5, R9, R5, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, -R2, R12 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R3|, R7, PT &req={0} ?WAIT5_END_GROUP;
FSEL R14, R8, R14, !P0 ?trans1;
FSEL R15, R5, R15, !P0 ?trans1;
BRA 0x1440 ?trans6;
DSETP.NAN.AND P0, PT, R8, R8, PT &wr=0x0 ?trans2;
@P0 BRA 0x1420 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R4, R4, PT &wr=0x0 ?trans2;
@P0 BRA 0x13f0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R21, R20, PT ?trans1;
MOV.64 R14, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1440 ?trans5;
ISETP.NE.AND P0, PT, R21, 0x7ff00000, PT ?trans1;
LOP3.LUT R15, R9, 0x80000000, R5, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R20, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R2, R15, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R14, RZ ?trans1;
@P0 MOV R14, RZ ?WAIT3_END_GROUP;
@P0 MOV R15, R2 ?trans1;
BRA 0x1440 ?trans6;
LOP3.LUT R15, R5, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R4 ?trans1;
BRA 0x1440 ?trans6;
LOP3.LUT R15, R9, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R14, R8 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
MOV R2, R14 ?trans1;
MOV R3, R15 ?trans2;
RET.REL.NODEC R6 0x0 ?trans5;
BRA 0x1490;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: expansion(int*, int*, int*, int)
_Z9expansionPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s8, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cvt_f64_i32_e32 v[2:3], s8
s_ashr_i32 s2, s8, 31
s_add_i32 s3, s8, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_xor_b32 s2, s3, s2
v_cvt_f64_i32_e32 v[4:5], v1
v_cvt_f32_u32_e32 v0, s2
s_sub_i32 s3, 0, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
v_div_scale_f64 v[6:7], null, v[2:3], v[2:3], v[4:5]
v_div_scale_f64 v[12:13], vcc_lo, v[4:5], v[2:3], v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[8:9], v[6:7]
s_waitcnt_depctr 0xfff
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[10:11], v[12:13], v[8:9]
v_fma_f64 v[6:7], -v[6:7], v[10:11], v[12:13]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[10:11]
v_div_fixup_f64 v[2:3], v[6:7], v[2:3], v[4:5]
v_mul_lo_u32 v5, s3, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v5, v0, v5
v_add_nc_u32_e32 v0, v0, v5
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_floor_f64_e32 v[3:4], v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v6, v1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v6, v6, v2
v_mul_hi_u32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s2
v_sub_nc_u32_e32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_le_u32_e32 vcc_lo, s2, v0
v_cvt_i32_f64_e32 v5, v[3:4]
v_subrev_nc_u32_e32 v3, s2, v0
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v3, s2, v0
v_cmp_le_u32_e32 vcc_lo, s2, v0
s_load_b64 s[2:3], s[0:1], 0x10
v_cndmask_b32_e32 v0, v0, v3, vcc_lo
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v0, v0, v2
v_add_co_u32 v3, vcc_lo, s6, v3
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
v_sub_nc_u32_e32 v7, v0, v2
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v8, 31, v7
v_cmp_eq_u32_e64 s0, 0, v7
v_lshlrev_b64 v[8:9], 2, v[7:8]
v_ashrrev_i32_e32 v6, 31, v5
v_max_i32_e32 v2, -1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[10:11], 2, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v9, vcc_lo
v_mov_b32_e32 v9, 1
v_cmp_gt_i32_e32 vcc_lo, s8, v2
v_add_co_u32 v7, s1, s2, v10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v8, s1, s3, v11, s1
s_and_b32 s1, vcc_lo, s0
s_mul_i32 s2, s8, s8
s_mov_b32 s3, 4
.LBB4_1:
s_and_saveexec_b32 s6, vcc_lo
s_cbranch_execz .LBB4_5
global_load_b32 v2, v[7:8], off
s_mov_b32 s7, 0
s_mov_b32 s8, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_ne_u32_e32 0, v2
s_cbranch_execz .LBB4_4
global_load_b32 v2, v[3:4], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s0, 0, v2
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 s7, s0, exec_lo
.LBB4_4:
s_or_b32 exec_lo, exec_lo, s8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[10:11], 2, v[1:2]
v_cndmask_b32_e64 v2, 0, 1, s7
v_add_co_u32 v10, s0, s4, v10
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v11, s0, s5, v11, s0
global_store_b32 v[10:11], v2, off
.LBB4_5:
s_or_b32 exec_lo, exec_lo, s6
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s0, s1
s_cbranch_execz .LBB4_7
global_store_b32 v[7:8], v0, off
.LBB4_7:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_and_saveexec_b32 s6, vcc_lo
s_cbranch_execz .LBB4_10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[1:2]
v_add_co_u32 v10, s0, s4, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v11, s0, s5, v11, s0
global_load_b32 v2, v[10:11], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e64 s0, 0, v2
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB4_10
global_store_b32 v[5:6], v9, off
.LBB4_10:
s_or_b32 exec_lo, exec_lo, s6
v_add_nc_u32_e32 v1, s2, v1
s_add_i32 s3, s3, -1
s_waitcnt_vscnt null, 0x0
s_cmp_eq_u32 s3, 0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB4_1
s_endpgm
| expansion | 7,060 | 2,904 | stackv2-00000-of-00015 |
// Demangled: firstExpansion(int*, int*, int)
Function : _Z14firstExpansionPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: firstExpansion(int*, int*, int)
_Z14firstExpansionPiS_i:
s_endpgm
| firstExpansion | 95 | 15 | stackv2-00000-of-00015 |
// Demangled: testBuffer(int*, int*, int)
Function : _Z10testBufferPiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R7, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 MOV R9, 0x12d5a9 ?trans1;
@P0 LEA R4, P1, R7, R4, 0x2 &req={0} ?WAIT4_END_GROUP;
@P0 LEA.HI.X R5, R7, R5, R0, 0x2, P1 ?WAIT5_END_GROUP;
@P0 STG.E desc[UR4][R4.64], R9 &rd=0x0 ?trans1;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x1 ?trans2;
LEA R2, P0, R7, UR6, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R3, R7, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: testBuffer(int*, int*, int)
_Z10testBufferPiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v2
v_cndmask_b32_e64 v2, 0x12d5a9, 0, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| testBuffer | 709 | 522 | stackv2-00000-of-00015 |
// Demangled: testMatrix(int**, int, int*, Flight*)
Function : _Z10testMatrixPPiiS_P6Flight
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans1;
UIMAD UR4, UR4, UR4, URZ &req={2} ?trans1;
IMAD R5, R5, UR5, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5.reuse, UR4, PT ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], RZ &req={3} &rd=0x1 ?trans7;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R5 ?trans2;
LEA R4, P0, R5, UR4, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R5, UR5, R0, 0x3, P0 ?WAIT6_END_GROUP;
LDG.E.64 R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
ISETP.NE.S64.AND P0, PT, R4, RZ, PT &req={2} ?WAIT14_END_GROUP;
@!P0 EXIT ?trans5;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x398] &wr=0x2 ?trans2;
IMAD.WIDE R6, R5, 0x38, R6 &req={2} ?WAIT6_END_GROUP;
LDG.E R7, desc[UR6][R6.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R2.64], R7 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: testMatrix(int**, int, int*, Flight*)
_Z10testMatrixPPiiS_P6Flight:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x8
s_load_b128 s[4:7], s[0:1], 0x10
v_mov_b32_e32 v4, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_mul_i32 s3, s3, s3
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
global_store_b32 v[0:1], v4, off
v_cmpx_gt_i32_e64 s3, v2
s_cbranch_execz .LBB1_3
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ne_u64_e32 vcc_lo, 0, v[2:3]
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB1_3
global_load_b32 v4, v[2:3], off
s_waitcnt vmcnt(0)
v_mad_i64_i32 v[2:3], null, v4, 56, s[6:7]
global_load_b32 v2, v[2:3], off offset:4
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| testMatrix | 735 | 713 | stackv2-00000-of-00015 |
// Demangled: testMatrixBoolean(int*, int, int*)
Function : _Z17testMatrixBooleanPiiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x4 ?trans1;
UIMAD UR4, UR4, UR4, URZ &req={2} ?trans1;
IMAD R5, R5, UR5, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5.reuse, UR4, PT ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], RZ &req={3} &rd=0x1 ?trans7;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R5 ?trans2;
LEA R4, P0, R5, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R5, UR5, R0, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
HFMA2 R5, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: testMatrixBoolean(int*, int, int*)
_Z17testMatrixBooleanPiiS_:
s_clause 0x2
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x8
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_mul_i32 s5, s5, s5
v_mad_u64_u32 v[4:5], null, s15, s4, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[2:3], 2, v[4:5]
v_mov_b32_e32 v5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
s_mov_b32 s2, exec_lo
global_store_b32 v[0:1], v5, off
v_cmpx_gt_i32_e64 s5, v4
s_cbranch_execz .LBB2_3
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 0, v2
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB2_3
v_mov_b32_e32 v2, 1
global_store_b32 v[0:1], v2, off
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| testMatrixBoolean | 640 | 581 | stackv2-00000-of-00015 |
// Demangled: divideKernel(double*, int, int)
Function : _Z12divideKernelPdii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans8;
LDC R6, c[0x0][0x370] &wr=0x4 ?trans1;
UIMAD UR4, UR5, UR6, URZ &req={2} ?WAIT6_END_GROUP;
IADD3 R0, PT, PT, R2, UR4, RZ &req={1} ?WAIT4_END_GROUP;
IADD3.X R28, PT, PT, R0, R5, RZ, PT, !PT &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R28, R4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={4,0} ?trans5;
IMAD R3, R6.reuse, UR6, RZ ?trans1;
IADD3 R7, PT, PT, R6, UR5, RZ ?trans2;
IADD3 R2, PT, PT, R2, R5, RZ ?trans1;
LDC.64 R20, c[0x0][0x380] &wr=0x0 ?trans1;
I2F.U32.RP R8, R3 &wr=0x1 ?trans1;
IADD3 R11, PT, PT, RZ, -R3, RZ ?trans1;
IMAD R7, R7, UR6, RZ ?trans1;
ISETP.NE.U32.AND P3, PT, R3, RZ, PT ?trans1;
IMAD R5, R5, R4, R5 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x730 ?trans1;
IADD3 R9, PT, PT, R2, 0x1, R7 ?WAIT2_END_GROUP;
LOP3.LUT R6, RZ, R7, RZ, 0x33, !PT ?WAIT3_END_GROUP;
VIMNMX.S32 R9, R9, R4, !PT ?trans1;
MUFU.RCP R8, R8 &req={1} &wr=0x1 ?trans4;
IADD3 R9, PT, PT, -R2, R9, R6 ?trans1;
HFMA2 R6, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R9, RZ, PT ?trans1;
IMAD.WIDE R20, R5, 0x8, R20 &req={0} ?trans1;
IADD3 R10, PT, PT, R8, 0xffffffe, RZ &req={1} ?trans2;
IADD3 R8, PT, PT, R9, -0x1, RZ ?WAIT9_END_GROUP;
@!P0 IADD3 R8, PT, PT, R9, RZ, RZ ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R7, R10 &wr=0x0 ?trans2;
IMAD R11, R11, R7, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R11, R6 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R7, R8, RZ ?WAIT5_END_GROUP;
IADD3 R6, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R8, R3, R6, R8 ?trans1;
SEL R6, RZ, 0x1, !P0 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@P1 IADD3 R8, PT, PT, -R3, R8, RZ ?trans2;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R8, R3, PT ?WAIT13_END_GROUP;
@P2 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P3 LOP3.LUT R7, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R7, RZ ?WAIT4_END_GROUP;
IADD3 R7, PT, PT, R6, 0x1, RZ ?WAIT4_END_GROUP;
LOP3.LUT P0, R7, R7, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x720 &req={2} ?trans5;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B1, 0x710 ?trans1;
IADD3 R27, PT, PT, R0, 0x1, R5 ?trans2;
IADD3 R28, PT, PT, R2, UR4, RZ ?trans2;
IADD3 R26, PT, PT, -R7, RZ, RZ ?WAIT7_END_GROUP;
LDG.E.64 R12, desc[UR6][R20.64] &wr=0x2 ?trans1;
IMAD.WIDE R16, R27, 0x8, R18 &req={1,0} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R16.64] &wr=0x3 ?trans1;
MOV R4, 0x1 ?trans1;
IADD3 R26, PT, PT, R26, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x6c0 ?trans4;
ISETP.NE.AND P1, PT, R26, RZ, PT ?trans1;
MUFU.RCP64H R5, R13 &req={2} &wr=0x0 ?trans1;
FSETP.GEU.AND P2, PT, |R11|, 6.5827683646048100446e-37, PT &req={3} ?trans1;
DFMA R8, -R12, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R8, R8, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R4, R8, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R12, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R8, R4, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R12, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R14, R8 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R13, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P2, 0x6b0 ?trans5;
MOV R4, 0x690 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1530 ?trans5;
MOV R4, R24 ?trans1;
MOV R5, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
STG.E.64 desc[UR6][R16.64], R4 &rd=0x1 ?trans1;
IADD3 R28, PT, PT, R3.reuse, R28, RZ ?trans2;
IADD3 R27, PT, PT, R3, R27, RZ ?trans1;
@P1 BRA 0x370 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R28, PT, PT, R28, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R6, 0x3, PT ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans6;
LDC.64 R16, c[0x0][0x388] &req={1} &wr=0x1 ?trans6;
@!P0 EXIT &req={2} ?trans5;
LDG.E.64 R12, desc[UR6][R20.64] &wr=0x2 ?trans1;
IMAD R31, R17, R16, R28 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R30, R31, 0x8, R18 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R30.64] &wr=0x3 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0xac0 ?trans1;
MUFU.RCP64H R5, R13 &req={2} &wr=0x0 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={3} ?WAIT3_END_GROUP;
DFMA R6, -R12, R4, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R6, R6, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R4, R6, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R12, R6, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R6, R4, R6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, -R12, R6, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R8, R6 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R13, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xab0 ?trans5;
MOV R4, 0xa90 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1530 ?trans5;
MOV R4, R24 ?trans1;
MOV R5, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR6][R30.64], R4 &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R3, R28, RZ ?WAIT5_END_GROUP;
IMAD R27, R17, R16, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x8, R18 ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R26.64] &wr=0x3 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0xe20 ?trans1;
MUFU.RCP64H R9, R13 &req={2} &wr=0x1 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={3} ?WAIT3_END_GROUP;
DFMA R14, -R12, R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R12, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R14, R4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R12, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R14, R8 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R13, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0xe10 ?trans5;
MOV R4, 0xdf0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1530 ?trans5;
MOV R4, R24 ?trans1;
MOV R5, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR6][R26.64], R4 &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R3, R6, RZ ?WAIT5_END_GROUP;
IMAD R29, R17, R16, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R28, R29, 0x8, R18 ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R28.64] &wr=0x3 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0x1180 ?trans1;
MUFU.RCP64H R9, R13 &req={2} &wr=0x1 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={3} ?WAIT3_END_GROUP;
DFMA R14, -R12, R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R12, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R14, R4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R12, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R14, R8 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R13, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x1170 ?trans5;
MOV R4, 0x1150 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1530 ?trans5;
MOV R4, R24 ?trans1;
MOV R5, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR6][R28.64], R4 &rd=0x0 ?trans4;
LDG.E.64 R12, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R3, R6, RZ ?WAIT5_END_GROUP;
IMAD R27, R17, R16, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x8, R18 ?WAIT5_END_GROUP;
LDG.E.64 R10, desc[UR6][R26.64] &wr=0x3 ?trans1;
HFMA2 R8, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0x14e0 ?trans1;
MUFU.RCP64H R9, R13 &req={2} &wr=0x1 ?trans1;
FSETP.GEU.AND P1, PT, |R11|, 6.5827683646048100446e-37, PT &req={3} ?WAIT3_END_GROUP;
DFMA R14, -R12, R8, 1 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R14, R14, R14 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, R8, R14, R8 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, -R12, R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R14, R4, R14 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R8, R10, R4 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R14, -R12, R8, R10 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R4, R4, R14, R8 &req={0} &wr=0x0 ?trans2;
FFMA R0, RZ, R13, R5 &req={0} ?WAIT5_END_GROUP;
FSETP.GT.AND P0, PT, |R0|, 1.469367938527859385e-39, PT ?WAIT13_END_GROUP;
@P0 BRA P1, 0x14d0 ?trans5;
MOV R4, 0x14b0 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0x1530 ?trans5;
MOV R4, R24 ?trans1;
MOV R5, R25 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR6][R26.64], R4 &rd=0x2 ?trans1;
IADD3 R28, PT, PT, R3, R6, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R28, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x780 &req={2} ?trans5;
EXIT ?trans5;
FSETP.GEU.AND P3, PT, |R11|, 1.469367938527859385e-39, PT ?trans1;
FSETP.GEU.AND P0, PT, |R13|.reuse, 1.469367938527859385e-39, PT ?trans1;
LOP3.LUT R14, R13, 0x800fffff, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B3, 0x1d00 ?trans1;
LOP3.LUT R2, R11, 0x7ff00000, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R15, R14, 0x3ff00000, RZ, 0xfc, !PT ?trans1;
MOV R14, R12 ?trans1;
LOP3.LUT R5, R13, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R0, 0x1ca00000 ?trans1;
MOV R22, 0x1 ?WAIT3_END_GROUP;
@!P3 LOP3.LUT R7, R13, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
@!P0 DMUL R14, R12, 8.98846567431157953865e+307 &wr=0x0 ?trans1;
ISETP.GE.U32.AND P2, PT, R2.reuse, R5, PT ?trans1;
MUFU.RCP64H R23, R15 &req={0} &wr=0x0 ?trans1;
@!P3 MOV R32, RZ ?trans1;
@!P3 ISETP.GE.U32.AND P4, PT, R2, R7, PT ?trans1;
@!P0 LOP3.LUT R5, R15, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
SEL R8, R0, 0x63400000, !P2 ?WAIT3_END_GROUP;
@!P3 SEL R7, R0, 0x63400000, !P4 ?trans2;
LOP3.LUT R9, R8, 0x800fffff, R11, 0xf8, !PT ?WAIT3_END_GROUP;
@!P3 LOP3.LUT R7, R7, 0x80000000, R11, 0xf8, !PT ?trans1;
MOV R8, R10 ?WAIT3_END_GROUP;
@!P3 LOP3.LUT R33, R7, 0x100000, RZ, 0xfc, !PT ?trans1;
MOV R7, R2 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
@!P3 DFMA R8, R8, 2, -R32 &wr=0x1 ?trans2;
@!P3 LOP3.LUT R7, R9, 0x7ff00000, RZ, 0xc0, !PT &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R22, -R14, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, R24, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R22, R24, R22 &req={0} &rd=0x0 &wr=0x1 ?trans2;
IADD3 R22, PT, PT, R7, -0x1, RZ &req={0} ?trans2;
IADD3 R23, PT, PT, R5, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R22, 0x7feffffe, PT ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R23, 0x7feffffe, P0 ?WAIT15_END_GROUP;
NOP ?WAIT7_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R24, -R14, 1 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R34, R24, R34, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R32, R34, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R32, -R14, R8 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, R34, R24, R32 &req={0} &rd=0x0 &wr=0x1 ?trans2;
@P0 BRA 0x1bb0 &req={1,0} ?trans5;
LOP3.LUT R5, R13, 0x7ff00000, RZ, 0xc0, !PT ?trans1;
MOV R10, RZ ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R2.reuse, -R5.reuse, RZ ?trans1;
ISETP.GE.U32.AND P0, PT, R2, R5, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R7, R7, -0x46a00000, !PT ?trans1;
SEL R0, R0, 0x63400000, !P0 ?WAIT4_END_GROUP;
VIMNMX.S32 R7, R7, 0x46a00000, PT ?WAIT5_END_GROUP;
IADD3 R0, PT, PT, -R0, R7, RZ ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R0, 0x7fe00000, RZ ?WAIT6_END_GROUP;
DMUL R24, R22, R10 &wr=0x0 ?trans2;
FSETP.GTU.AND P0, PT, |R25|, 1.469367938527859385e-39, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x1cf0 ?trans5;
DFMA R8, R22, -R14, R8 &wr=0x0 ?trans1;
MOV R10, RZ ?trans1;
FSETP.NEU.AND P0, PT, R9.reuse, RZ, PT &req={0} ?trans1;
LOP3.LUT R13, R9, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R11, R13, R11, RZ, 0xfc, !PT ?WAIT8_END_GROUP;
@!P0 BRA 0x1cf0 ?trans5;
IADD3 R9, PT, PT, -R0.reuse, RZ, RZ ?trans1;
MOV R8, RZ ?trans1;
IADD3 R5, PT, PT, -R0, -0x43300000, RZ ?trans1;
DMUL.RP R10, R22, R10 &wr=0x0 ?trans2;
LOP3.LUT R13, R11, R13, RZ, 0x3c, !PT &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R24, -R8, R22 &wr=0x0 ?trans2;
FSETP.NEU.AND P0, PT, |R9|, R5, PT &req={0} ?WAIT5_END_GROUP;
FSEL R24, R10, R24, !P0 ?trans1;
FSEL R25, R13, R25, !P0 ?trans1;
BRA 0x1cf0 ?trans6;
DSETP.NAN.AND P0, PT, R10, R10, PT &wr=0x0 ?trans2;
@P0 BRA 0x1cd0 &req={0} ?trans5;
DSETP.NAN.AND P0, PT, R12, R12, PT &wr=0x0 ?trans2;
@P0 BRA 0x1ca0 &req={0} ?trans5;
ISETP.NE.AND P0, PT, R7, R5, PT ?trans1;
MOV.64 R24, 0xfff8000000000000 ?WAIT12_END_GROUP;
@!P0 BRA 0x1cf0 ?trans5;
ISETP.NE.AND P0, PT, R7, 0x7ff00000, PT ?trans1;
LOP3.LUT R25, R11, 0x80000000, R13, 0x48, !PT ?WAIT4_END_GROUP;
ISETP.EQ.OR P0, PT, R5, RZ, !P0 ?WAIT13_END_GROUP;
@P0 LOP3.LUT R0, R25, 0x7ff00000, RZ, 0xfc, !PT ?trans1;
@!P0 MOV R24, RZ ?trans1;
@P0 MOV R24, RZ ?WAIT3_END_GROUP;
@P0 MOV R25, R0 ?trans1;
BRA 0x1cf0 ?trans6;
LOP3.LUT R25, R13, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R12 ?trans1;
BRA 0x1cf0 ?trans6;
LOP3.LUT R25, R11, 0x80000, RZ, 0xfc, !PT ?trans1;
MOV R24, R10 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 ?trans5;
BRA 0x1d20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: divideKernel(double*, int, int)
_Z12divideKernelPdii:
s_clause 0x1
s_load_b32 s6, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_add_u32 s4, s0, 16
s_addc_u32 s5, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s6, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s7, s15, s6
s_add_i32 s8, s7, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add3_u32 v2, v0, s8, 1
s_mov_b32 s8, exec_lo
v_cmpx_gt_i32_e64 s2, v2
s_cbranch_execz .LBB1_3
s_load_b64 s[0:1], s[0:1], 0x0
s_mul_i32 s8, s3, s2
s_load_b32 s10, s[4:5], 0x0
s_add_i32 s8, s8, s3
v_mov_b32_e32 v3, 0
s_ashr_i32 s9, s8, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[8:9], 3
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s0, s8
s_addc_u32 s5, s1, s9
s_add_i32 s8, s2, 1
s_mul_i32 s6, s10, s6
s_mul_i32 s3, s3, s8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s7, s7, s3
v_add3_u32 v0, s7, v0, 1
s_ashr_i32 s7, s6, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_lshl_b64 s[8:9], s[6:7], 3
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s1, 0
.LBB1_2:
global_load_b64 v[4:5], v3, s[4:5]
global_load_b64 v[6:7], v[0:1], off
v_add_nc_u32_e32 v2, s6, v2
s_waitcnt vmcnt(0)
v_div_scale_f64 v[8:9], null, v[4:5], v[4:5], v[6:7]
v_div_scale_f64 v[14:15], vcc_lo, v[6:7], v[4:5], v[6:7]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f64_e32 v[10:11], v[8:9]
s_waitcnt_depctr 0xfff
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f64 v[12:13], v[14:15], v[10:11]
v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
v_cmp_le_i32_e32 vcc_lo, s2, v2
s_or_b32 s1, vcc_lo, s1
v_div_fixup_f64 v[4:5], v[8:9], v[4:5], v[6:7]
global_store_b64 v[0:1], v[4:5], off
v_add_co_u32 v0, s0, v0, s8
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v1, s0, s9, v1, s0
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB1_2
.LBB1_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| divideKernel | 9,323 | 1,518 | stackv2-00000-of-00015 |
// Demangled: subtractProductKernel(double*, int, int)
Function : _Z21subtractProductKernelPdii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x3 ?trans1;
LDCU UR8, c[0x0][0x374] &wr=0x4 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
IADD3.X R15, PT, PT, R0, R7, RZ, PT, !PT &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R15, R6, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={4,3,0} ?trans5;
S2R R11, SR_CTAID.Y &wr=0x0 ?trans1;
UIMAD UR6, UR7, UR8, URZ ?trans1;
S2R R0, SR_TID.Y &wr=0x1 ?trans3;
UI2F.U32.RP UR5, UR6 ?trans2;
IADD3 R9, PT, PT, RZ, -UR6, RZ ?trans1;
ISETP.NE.U32.AND P3, PT, RZ, UR6, PT ?WAIT6_END_GROUP;
MUFU.RCP R2, UR5 &wr=0x2 ?trans2;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IADD3 R3, PT, PT, R11, UR8, RZ &req={0} ?trans2;
IADD3 R8, PT, PT, R2, 0xffffffe, RZ &req={2} ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x0 ?trans1;
IADD3 R0, PT, PT, R0, R7, RZ &req={1} ?trans1;
IMAD R3, R3, UR7, RZ ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={3} ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R0, 0x1, R3 ?trans2;
LOP3.LUT R2, RZ, R3, RZ, 0x33, !PT ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R3, R8 &wr=0x1 ?trans1;
VIMNMX.S32 R5, R5, R6, !PT ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R0, R5, R2 ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R5.reuse, RZ, PT ?trans1;
IADD3 R4, PT, PT, R5, -0x1, RZ ?trans1;
IMAD R9, R9, R3, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?trans2;
LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans5;
@!P0 IADD3 R4, PT, PT, R5, RZ, RZ ?trans1;
SEL R5, RZ, 0x1, !P0 ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R10, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R3, UR6, R4 ?trans2;
IMAD R3, R11, UR7, R0 ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, UR6, PT ?trans2;
IADD3 R0, PT, PT, R3, 0x1, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R0, UR6, RZ ?WAIT5_END_GROUP;
IMAD R11, R2, R6, R7 ?trans2;
@P1 IADD3 R4, PT, PT, R4, -UR6, RZ ?trans2;
@P1 IADD3 R10, PT, PT, R10, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R4, UR6, PT ?trans1;
IMAD R4, R3, R6, R6 ?trans1;
IADD3 R3, PT, PT, R2, UR6, RZ ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R4, R7, RZ ?trans1;
IMAD R7, R3, R6, R7 ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x8, R8 &req={1} ?trans2;
@P2 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans2;
@!P3 LOP3.LUT R10, RZ, UR6, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R5, R10, RZ ?trans1;
IMAD.WIDE R10, R11, 0x8, R8 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R7, 0x8, R8 ?trans1;
MOV R7, R15 &req={0} ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x388] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x9b0 ?trans1;
ISETP.GE.AND P0, PT, R0, R6, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x9a0 &req={2,1} ?trans5;
LDC R31, c[0x0][0x38c] &wr=0x0 ?trans1;
IADD3 R20, PT, PT, R5, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x670 ?trans1;
MOV R25, R0 ?trans2;
LOP3.LUT P0, R21, R20, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R17, R31, R6, R7 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R16, R17, 0x8, R14 &req={1} ?WAIT5_END_GROUP;
@!P0 BRA 0x660 ?trans5;
IADD3 R19, PT, PT, R4, R7, RZ ?trans1;
LDG.E.64 R22, desc[UR8][R16.64] &wr=0x2 ?trans4;
IMAD.WIDE R18, R19, 0x8, R14 ?trans1;
LDG.E.64 R24, desc[UR8][R12.64] &wr=0x2 ?trans4;
LDG.E.64 R26, desc[UR8][R18.64] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R21, 0x1, PT ?trans1;
DFMA R22, -R22, R24, R26 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R18.64], R22 &req={0} &rd=0x0 ?trans1;
MOV R25, R2 ?WAIT9_END_GROUP;
@!P0 BRA 0x660 ?trans5;
IMAD R19, R2, R6, R7 &req={0} ?trans1;
LDG.E.64 R22, desc[UR8][R16.64] &wr=0x2 ?trans3;
IMAD.WIDE R18, R19, 0x8, R14 ?trans1;
LDG.E.64 R24, desc[UR8][R10.64] &wr=0x2 ?trans4;
LDG.E.64 R26, desc[UR8][R18.64] &wr=0x2 ?trans1;
LOP3.LUT R20, R20, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R20, 0x2, PT ?trans1;
DFMA R22, -R22, R24, R26 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R18.64], R22 &req={0} &rd=0x1 ?trans1;
MOV R25, R3 ?WAIT9_END_GROUP;
@!P0 BRA 0x660 ?trans5;
IMAD R23, R3, R6, R7 &req={1} ?trans1;
LDG.E.64 R18, desc[UR8][R16.64] &wr=0x2 ?trans3;
IMAD.WIDE R22, R23, 0x8, R14 ?trans1;
LDG.E.64 R20, desc[UR8][R8.64] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR8][R22.64] &wr=0x2 ?trans2;
DFMA R18, -R18, R20, R24 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R22.64], R18 &req={0} &rd=0x2 ?trans1;
IADD3 R25, PT, PT, R3, UR6, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.GE.U32.AND P0, PT, R5, 0x3, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x9a0 ?trans5;
IMAD R19, R25.reuse, R6.reuse, R31 &req={2,1,0} ?trans1;
LDG.E.64 R22, desc[UR8][R16.64] &wr=0x2 ?trans1;
IMAD R27, R25, R6, R7 ?trans2;
IMAD.WIDE R18, R19, 0x8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x8, R14 ?trans2;
LDG.E.64 R18, desc[UR8][R18.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR8][R26.64] &wr=0x2 ?trans1;
IADD3 R30, PT, PT, R25, UR6, RZ ?WAIT5_END_GROUP;
IMAD R29, R30.reuse, R6.reuse, R31 ?trans2;
IMAD R33, R30, R6, R7 ?trans2;
IMAD.WIDE R28, R29, 0x8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R32, R33, 0x8, R14 ?trans1;
DFMA R36, -R22, R18, R20 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R26.64], R36 &req={0} ?trans4;
LDG.E.64 R20, desc[UR8][R28.64] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR8][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R22, desc[UR8][R32.64] &wr=0x2 ?trans1;
IADD3 R30, PT, PT, R30, UR6, RZ ?WAIT5_END_GROUP;
IMAD R35, R30.reuse, R6.reuse, R31 ?trans2;
IMAD R19, R30, R6, R7 ?trans2;
IMAD.WIDE R34, R35, 0x8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R18, R19, 0x8, R14 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, -R24, R20, R22 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R32.64], R20 &req={0} &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR8][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR8][R18.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR8][R34.64] &req={0} &wr=0x2 ?trans1;
IADD3 R30, PT, PT, R30, UR6, RZ ?WAIT5_END_GROUP;
IMAD R27, R30.reuse, R6.reuse, R31 ?trans2;
IMAD R29, R30, R6, R7 ?trans2;
IMAD.WIDE R26, R27, 0x8, R14 ?WAIT4_END_GROUP;
IMAD.WIDE R28, R29, 0x8, R14 ?WAIT15_END_GROUP;
NOP ?WAIT6_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R22, -R22, R20, R24 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R18.64], R22 &req={0} &rd=0x3 ?trans4;
LDG.E.64 R26, desc[UR8][R26.64] &wr=0x2 ?trans4;
LDG.E.64 R20, desc[UR8][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R24, desc[UR8][R28.64] &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R20, -R20, R26, R24 &req={2} &wr=0x0 ?trans2;
STG.E.64 desc[UR8][R28.64], R20 &req={0} &rd=0x3 ?trans1;
IADD3 R25, PT, PT, R30, UR6, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R25, R6, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x690 &req={3} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R7, PT, PT, R7, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R6, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3c0 ?trans5;
EXIT ?trans5;
BRA 0x9f0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: subtractProductKernel(double*, int, int)
_Z21subtractProductKernelPdii:
s_clause 0x1
s_load_b32 s7, s[0:1], 0x1c
s_load_b64 s[2:3], s[0:1], 0x8
s_add_u32 s4, s0, 16
v_and_b32_e32 v2, 0x3ff, v0
s_addc_u32 s5, s1, 0
s_mov_b32 s9, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s7, 0xffff
s_add_i32 s8, s3, 1
s_mul_i32 s14, s14, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v5, s14, s8, v2
v_cmpx_gt_i32_e64 s2, v5
s_cbranch_execz .LBB0_6
s_load_b64 s[10:11], s[4:5], 0x0
s_load_b64 s[4:5], s[0:1], 0x0
v_bfe_u32 v0, v0, 10, 10
s_lshr_b32 s7, s7, 16
s_mul_i32 s1, s3, s2
s_mul_i32 s15, s15, s7
s_mov_b32 s0, s3
v_add3_u32 v6, s15, s8, v0
v_add_nc_u32_e32 v7, s14, v2
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s2, v6, s[0:1]
v_cmp_gt_i32_e32 vcc_lo, s2, v6
s_waitcnt lgkmcnt(0)
s_mul_i32 s3, s11, s7
s_mul_i32 s6, s10, s6
s_mul_i32 s7, s3, s2
.LBB0_2:
s_and_saveexec_b32 s9, vcc_lo
s_cbranch_execz .LBB0_5
v_dual_mov_b32 v8, v6 :: v_dual_add_nc_u32 v1, s1, v5
s_mov_b32 s10, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[3:4], 3, v[1:2]
v_mov_b32_e32 v1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s4, v3
v_add_co_ci_u32_e64 v4, s0, s5, v4, s0
.LBB0_4:
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add3_u32 v9, v7, v1, 1
v_ashrrev_i32_e32 v2, 31, v1
v_add_nc_u32_e32 v8, s3, v8
v_ashrrev_i32_e32 v10, 31, v9
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[11:12], 3, v[1:2]
v_add_nc_u32_e32 v1, s7, v1
v_lshlrev_b64 v[9:10], 3, v[9:10]
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v11, s0, s4, v11
v_add_co_ci_u32_e64 v12, s0, s5, v12, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v9, s0, s4, v9
v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
v_cmp_le_i32_e64 s0, s2, v8
s_clause 0x2
global_load_b64 v[13:14], v[3:4], off
global_load_b64 v[11:12], v[11:12], off
global_load_b64 v[15:16], v[9:10], off
s_or_b32 s10, s0, s10
s_waitcnt vmcnt(0)
v_fma_f64 v[11:12], -v[13:14], v[11:12], v[15:16]
global_store_b64 v[9:10], v[11:12], off
s_and_not1_b32 exec_lo, exec_lo, s10
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s9
v_add_nc_u32_e32 v5, s6, v5
v_add_nc_u32_e32 v7, s6, v7
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s2, v5
s_or_b32 s8, s0, s8
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_2
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| subtractProductKernel | 4,047 | 1,565 | stackv2-00000-of-00015 |
// Demangled: swapKernel(double*, int, int, int)
Function : _Z10swapKernelPdiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans7;
LDC R0, c[0x0][0x388] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R5, R5, UR4, R2 &req={1} ?trans1;
UIMAD UR4, UR4, UR5, URZ &req={3} ?WAIT4_END_GROUP;
ISETP.GE.AND P0, PT, R5, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UI2F.U32.RP UR5, UR4 ?trans2;
IADD3 R7, PT, PT, R5, UR4, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -UR4, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, RZ, UR4, PT ?trans1;
LDCU UR9, c[0x0][0x38c] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x3e0 ?trans1;
ISETP.GE.AND P0, PT, R7.reuse, R0.reuse, PT ?trans1;
VIMNMX.S32 R4, R7, R0, !PT ?trans1;
LDCU UR10, c[0x0][0x390] &wr=0x1 ?trans1;
MUFU.RCP R2, UR5 &wr=0x2 ?trans2;
SEL R6, RZ, 0x1, P0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans4;
IADD3 R4, PT, PT, R4, -R7, -R6 ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R2, 0xffffffe, RZ &req={2} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x2 &wr=0x4 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={2} ?trans2;
IMAD R9, R9, R3, RZ &req={4} ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R7, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R3, UR4, R4 ?trans2;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans3;
ISETP.GE.U32.AND P0, PT, R4, UR4, PT ?WAIT13_END_GROUP;
@P0 IADD3 R4, PT, PT, R4, -UR4, RZ ?trans2;
@P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R4, UR4, PT ?WAIT13_END_GROUP;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R7, RZ, UR4, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R7, RZ ?WAIT4_END_GROUP;
IADD3 R4, PT, PT, R6.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R6, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R4, R4, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3d0 &req={3,2,1,0} ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, -R4, RZ, RZ ?trans1;
LDCU UR8, c[0x0][0x38c] &wr=0x2 ?trans1;
IMAD R17, R5.reuse, R0.reuse, UR5 &req={1} ?trans2;
IMAD R19, R5, R0, UR8 &req={2} ?WAIT7_END_GROUP;
IMAD.WIDE R10, R17, 0x8, R14 &req={1,0} ?WAIT4_END_GROUP;
IMAD.WIDE R6, R19, 0x8, R14 ?trans1;
LDG.E.64 R12, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E.64 R8, desc[UR6][R6.64] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R5, UR4, RZ ?trans1;
IMAD R17, R0.reuse, UR4, R17 ?trans2;
IMAD R19, R0, UR4, R19 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
STG.E.64 desc[UR6][R6.64], R12 &req={2} &rd=0x1 ?trans4;
STG.E.64 desc[UR6][R10.64], R8 &req={3} &rd=0x1 ?trans8;
@P0 BRA 0x310 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
IMAD R11, R5.reuse, R0.reuse, UR10 &req={3,1} ?trans2;
IMAD R7, R5, R0, UR9 ?trans2;
IMAD.WIDE R10, R11, 0x8, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R7, 0x8, R2 ?trans1;
LDG.E.64 R12, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E.64 R8, desc[UR6][R6.64] &wr=0x3 ?trans1;
IADD3 R25, PT, PT, R5, UR4, RZ ?WAIT5_END_GROUP;
IMAD R17, R25.reuse, R0.reuse, UR10 ?trans2;
IMAD R5, R25, R0, UR9 ?trans2;
IMAD.WIDE R16, R17, 0x8, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x8, R2 ?trans1;
STG.E.64 desc[UR6][R6.64], R12 &req={2} &rd=0x0 ?trans4;
STG.E.64 desc[UR6][R10.64], R8 &req={3} &rd=0x1 ?trans4;
LDG.E.64 R18, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E.64 R14, desc[UR6][R4.64] &wr=0x3 ?trans1;
IADD3 R25, PT, PT, R25, UR4, RZ ?WAIT5_END_GROUP;
IMAD R23, R25.reuse, R0.reuse, UR10 ?trans2;
IMAD R21, R25, R0, UR9 ?trans2;
IMAD.WIDE R22, R23, 0x8, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R20, R21, 0x8, R2 ?trans1;
STG.E.64 desc[UR6][R4.64], R18 &req={2} &rd=0x2 ?trans4;
STG.E.64 desc[UR6][R16.64], R14 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R12, desc[UR6][R22.64] &req={0} &wr=0x4 ?trans4;
LDG.E.64 R6, desc[UR6][R20.64] &wr=0x5 ?trans1;
IADD3 R27, PT, PT, R25, UR4, RZ ?WAIT5_END_GROUP;
IMAD R25, R27.reuse, R0.reuse, UR10 ?trans2;
IMAD R9, R27, R0, UR9 &req={1} ?trans2;
IMAD.WIDE R24, R25, 0x8, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R9, 0x8, R2 ?trans1;
STG.E.64 desc[UR6][R20.64], R12 &req={4} &rd=0x3 ?trans4;
STG.E.64 desc[UR6][R22.64], R6 &req={5} &rd=0x3 ?trans4;
LDG.E.64 R18, desc[UR6][R24.64] &req={2} &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR6][R8.64] &wr=0x4 ?trans1;
IADD3 R5, PT, PT, R27, UR4, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, R0, PT ?trans1;
STG.E.64 desc[UR6][R8.64], R18 &req={2} &rd=0x3 ?trans4;
STG.E.64 desc[UR6][R24.64], R10 &req={4} &rd=0x3 ?trans8;
@!P0 BRA 0x3f0 ?trans5;
EXIT ?trans5;
BRA 0x660;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: swapKernel(double*, int, int, int)
_Z10swapKernelPdiii:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s7, s8, 0xffff
s_mov_b32 s8, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB2_3
s_load_b32 s2, s[2:3], 0x0
s_load_b64 s[0:1], s[0:1], 0x0
v_mul_lo_u32 v0, s4, v1
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s7
s_mov_b32 s7, 0
s_mul_i32 s3, s2, s4
.LBB2_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_add_nc_u32_e32 v2, s6, v0
v_add_nc_u32_e32 v4, s5, v0
v_add_nc_u32_e32 v1, s2, v1
v_add_nc_u32_e32 v0, s3, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[2:3], 3, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 3, v[4:5]
v_add_co_u32 v2, vcc_lo, s0, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_clause 0x1
global_load_b64 v[6:7], v[2:3], off
global_load_b64 v[8:9], v[4:5], off
s_waitcnt vmcnt(1)
global_store_b64 v[4:5], v[6:7], off
s_waitcnt vmcnt(0)
global_store_b64 v[2:3], v[8:9], off
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB2_2
.LBB2_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| swapKernel | 2,707 | 917 | stackv2-00000-of-00015 |
// Demangled: vecAdd(float*, float*, float*)
Function : _Z6vecAddPfS_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R11, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R2, R11, 0x4, R2 &req={0} ?trans1;
I2FP.F32.U32 R9, R11 ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R11.reuse, 0x4, R4 &req={2} ?trans1;
STG.E desc[UR4][R2.64], RZ &req={1} ?trans3;
IMAD.WIDE.U32 R6, R11, 0x4, R6 &req={3} ?trans1;
STG.E desc[UR4][R4.64], R9 ?trans4;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0xe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vecAdd(float*, float*, float*)
_Z6vecAddPfS_S_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v2, 2, v0
v_cvt_f32_i32_e32 v0, v0
s_waitcnt lgkmcnt(0)
s_clause 0x2
global_store_b32 v2, v1, s[4:5]
global_store_b32 v2, v0, s[6:7]
global_store_b32 v2, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vecAdd | 406 | 202 | stackv2-00000-of-00015 |
// Demangled: matrix_mult(float*, float*, float*, int)
Function : _Z11matrix_multPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x520 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R0, RZ ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R15, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
IMAD.WIDE R24, R6, R25, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans3;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6, R9, UR24 ?trans1;
LDG.E R12, desc[UR16][R24.64] &wr=0x3 ?trans1;
MOV R23, 0x4 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R10, R6, R11, UR14 ?WAIT4_END_GROUP;
HFMA2 R27, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R14, desc[UR16][R8.64] &rd=0x1 &wr=0x4 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R19, desc[UR16][R4.64+-0x8] &wr=0x4 ?trans1;
IMAD.WIDE R20, R6, R27, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R16, desc[UR16][R10.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R18, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R29, 0x4 ?trans1;
IMAD.WIDE R8, R6.reuse, R27, UR8 &req={1} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x5 ?trans4;
LDG.E R25, desc[UR16][R4.64] &wr=0x5 ?trans1;
IMAD.WIDE R10, R6, R29, UR6 &req={0} ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x5 ?trans4;
LDG.E R27, desc[UR16][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R29, desc[UR16][R4.64+0x8] &wr=0x5 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x5 ?trans4;
LDG.E R31, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x5 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
FFMA R0, R15, R13, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R0, R17, R12, R0 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R19, R14, R0 &req={4} ?WAIT4_END_GROUP;
FFMA R16, R18, R16, R19 &req={5} ?WAIT4_END_GROUP;
FFMA R16, R25, R22, R16 ?WAIT4_END_GROUP;
FFMA R16, R27, R20, R16 ?WAIT4_END_GROUP;
FFMA R8, R29, R8, R16 ?WAIT4_END_GROUP;
FFMA R0, R31, R10, R8 ?trans1;
@P0 BRA 0x220 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa90 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7f0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
FFMA R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa90 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 FFMA R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 FFMA R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xae0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_mult(float*, float*, float*, int)
_Z11matrix_multPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_ashrrev_i32_e32 v2, 31, v1
v_mov_b32_e32 v6, 0
v_mov_b32_e32 v4, v0
s_mov_b32 s3, s2
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s3, s3, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s3, 0
v_lshlrev_b64 v[7:8], 2, v[4:5]
v_add_nc_u32_e32 v4, s2, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v7, vcc_lo, s6, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
global_load_b32 v5, v[2:3], off
global_load_b32 v7, v[7:8], off
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v5, v7
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v6, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v6, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_mult | 4,514 | 1,194 | stackv2-00000-of-00015 |
// Demangled: FMaxPoolBackward(float*, float*, int*, int, int, int, int, int, int, int, int)
Function : _Z16FMaxPoolBackwardPfS_Piiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x2 ?trans1;
S2R R8, SR_TID.Y &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R0, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR7, PT &req={2} ?trans1;
IMAD R8, R5, UR5, R8 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R8, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R11, SR_CTAID.Z &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x3b4] &wr=0x3 ?trans6;
LDC R15, c[0x0][0x3b0] &wr=0x4 ?trans1;
LDCU.64 UR10, c[0x0][0x3a0] &wr=0x5 ?trans1;
IMAD R3, R11, UR6, R8 &req={0} ?WAIT4_END_GROUP;
IMAD R7, R3, UR7, R0 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans2;
IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R2.64] &rd=0x0 &wr=0x3 ?trans1;
IABS R13, R15 &req={4} ?WAIT4_END_GROUP;
I2F.RP R10, R13 &wr=0x1 ?trans2;
MUFU.RCP R10, R10 &req={1} &wr=0x1 ?trans2;
IADD3 R6, PT, PT, R10, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R7, R6 &rd=0x1 &wr=0x4 ?trans2;
HFMA2 R6, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R12, PT, PT, RZ, -R7, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R3, R12, R13, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R7, R7, R3, R6 ?trans1;
IABS R2, R4 &req={2} ?WAIT5_END_GROUP;
IMAD.HI.U32 R7, R7, R2, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R13, R3, R2 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R13, R2, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R2, PT, PT, R2, -R13, RZ ?trans2;
@!P0 IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2, R13, PT ?trans1;
LOP3.LUT R2, R4, R15, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, RZ, PT ?trans1;
IMAD R2, R11, UR10, RZ &req={5} ?WAIT4_END_GROUP;
IMAD R2, R2, UR11, RZ ?trans2;
@P1 IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R15, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT8_END_GROUP;
@!P1 LOP3.LUT R7, RZ, R15, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R7, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R15, R3, R4 ?trans2;
IMAD R4, R8, UR8, R7 &req={3} ?trans2;
IMAD R3, R0, UR8, R3 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans3;
IMAD R4, R4, UR11, R3 ?trans1;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?WAIT4_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R4 ?WAIT5_END_GROUP;
LEA R4, P0, R2, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR9, R3, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x400;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: FMaxPoolBackward(float*, float*, int*, int, int, int, int, int, int, int, int)
_Z16FMaxPoolBackwardPfS_Piiiiiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b128 s[4:7], s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[0:1], null, s13, s2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cmp_gt_i32_e64 s2, s7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB1_2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, s15, s6, v[2:3]
s_clause 0x2
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x30
v_mad_u64_u32 v[4:5], null, v3, s7, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v5, 31, v4
v_lshlrev_b64 v[3:4], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_mul_lo_u32 v0, v0, s1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v5, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
v_add_co_u32 v3, vcc_lo, s10, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s11, v4, vcc_lo
global_load_b32 v5, v[5:6], off
s_ashr_i32 s2, s0, 31
global_load_b32 v6, v[3:4], off
s_add_i32 s3, s0, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s3, s3, s2
v_cvt_f32_u32_e32 v1, s3
s_sub_i32 s6, 0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v1, 0x4f7ffffe, v1
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v3, s6, v1
v_mul_hi_u32 v3, v1, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v1, v1, v3
s_waitcnt vmcnt(1)
v_ashrrev_i32_e32 v4, 31, v5
v_add_nc_u32_e32 v7, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v7, v4
v_xor_b32_e32 v4, s2, v4
v_mul_hi_u32 v1, v3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v7, v1, s3
v_sub_nc_u32_e32 v3, v3, v7
v_add_nc_u32_e32 v7, 1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v8, s3, v3
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_cndmask_b32_e32 v1, v1, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v3, v3, v8, vcc_lo
v_add_nc_u32_e32 v7, 1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s3, v3
v_cndmask_b32_e32 v1, v1, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v1, v1, v4
v_sub_nc_u32_e32 v1, v1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, v2, s1, v[1:2]
v_mul_lo_u32 v1, v1, s0
s_mul_i32 s0, s15, s4
s_mul_i32 s0, s0, s5
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s1, s0, 31
v_mul_lo_u32 v2, v3, s5
s_lshl_b64 s[0:1], s[0:1], 2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v1, v5, v1
s_add_u32 s0, s8, s0
s_addc_u32 s1, s9, s1
v_add3_u32 v0, v1, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v6, off
.LBB1_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| FMaxPoolBackward | 1,698 | 2,140 | stackv2-00000-of-00015 |
// Demangled: FMaxPoolForward(float const*, float*, int*, int, int, int, int, int, int, int, int)
Function : _Z15FMaxPoolForwardPKfPfPiiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x2 ?trans1;
S2R R0, SR_TID.Y &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R5, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R4, R3, UR4, R4 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, UR7, PT &req={2} ?trans1;
IMAD R3, R5, UR5, R0 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R3, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R8, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x3a0] &wr=0x1 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
MOV R2, 0xc61c3c00 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans4;
S2UR UR6, SR_CTAID.Z &wr=0x1 ?trans1;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={0} ?trans1;
UIMAD UR4, UR6, UR4, URZ &req={1} ?WAIT4_END_GROUP;
UIMAD UR4, UR4, UR5, URZ ?WAIT4_END_GROUP;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ?WAIT4_END_GROUP;
@!P0 BRA 0xa80 &req={2} ?trans8;
IMAD R7, R4, R9.reuse, RZ ?trans1;
BSSY.RECONVERGENT B0, 0xa80 ?trans1;
IMAD R9, R3, R9, RZ ?trans1;
LDCU UR12, c[0x0][0x3a4] &wr=0x0 ?trans2;
IADD3 R0, PT, PT, R7.reuse, 0x1, RZ ?trans2;
IADD3 R5, PT, PT, R7, R8.reuse, RZ ?trans2;
IADD3 R8, PT, PT, R9, R8, RZ ?trans1;
MOV R10, R9 ?trans1;
LDCU.64 UR10, c[0x0][0x380] &wr=0x1 ?trans1;
VIMNMX.S32 R0, R0, R5, !PT ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, R7.reuse, -R0.reuse, RZ ?trans2;
IADD3 R6, PT, PT, -R7, R0, RZ ?trans1;
MOV R0, RZ ?trans2;
ISETP.GT.U32.AND P0, PT, R2, -0x8, PT ?trans1;
MOV R2, 0xc61c3c00 ?trans1;
LOP3.LUT R13, R6.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R22, R6.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R11, R6, 0xfffffff8, RZ, 0xc0, !PT &req={0} ?WAIT7_END_GROUP;
LDCU UR7, c[0x0][0x3b0] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, -R9, R10.reuse, RZ ?trans1;
MOV R16, R10 ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x610 ?trans1;
ISETP.NE.AND P1, PT, R13, RZ, PT ?trans1;
MOV R5, R7 ?trans2;
ISETP.GE.AND P2, PT, R10, R8, PT ?trans1;
IMAD R12, R12, UR7, -R7 &req={0} ?trans1;
@P0 BRA 0x600 ?trans11;
HFMA2 R18, -RZ, RZ, 0, 0 ?trans1;
MOV R5, R7 ?WAIT7_END_GROUP;
IMAD R14, R16, UR12, R5 ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R20, R14, UR4 ?WAIT5_END_GROUP;
LEA R14, P3, R20, UR10, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R15, R20, UR11, R21, 0x2, P3 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R14.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR8][R14.64+0x4] &wr=0x3 ?trans4;
LDG.E R21, desc[UR8][R14.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR8][R14.64+0xc] &wr=0x5 ?trans4;
LDG.E R25, desc[UR8][R14.64+0x10] &wr=0x4 ?trans4;
LDG.E R27, desc[UR8][R14.64+0x14] &wr=0x4 ?trans4;
LDG.E R29, desc[UR8][R14.64+0x18] &wr=0x5 ?trans4;
LDG.E R31, desc[UR8][R14.64+0x1c] &wr=0x5 ?trans1;
IADD3 R18, PT, PT, R18, 0x8, RZ ?trans1;
FSETP.GT.AND P5, PT, R17, R2, PT &req={2} ?WAIT5_END_GROUP;
FSEL R2, R17, R2, P5 ?trans1;
IADD3 R17, PT, PT, R12, R5, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x8, RZ ?trans2;
FSETP.GT.AND P6, PT, R19, R2, PT &req={3} ?trans1;
SEL R0, R17, R0, P5 ?WAIT4_END_GROUP;
FSEL R2, R19, R2, P6 ?WAIT5_END_GROUP;
FSETP.GT.AND P3, PT, R21, R2, PT &req={4} ?WAIT3_END_GROUP;
@P6 IADD3 R0, PT, PT, R17, 0x1, RZ ?trans2;
FSEL R2, R21, R2, P3 ?WAIT5_END_GROUP;
FSETP.GT.AND P4, PT, R23, R2, PT &req={5} ?WAIT3_END_GROUP;
@P3 IADD3 R0, PT, PT, R17, 0x2, RZ ?trans2;
FSEL R2, R23, R2, P4 ?WAIT5_END_GROUP;
FSETP.GT.AND P5, PT, R25, R2, PT ?WAIT3_END_GROUP;
@P4 IADD3 R0, PT, PT, R17, 0x3, RZ ?trans2;
FSEL R2, R25, R2, P5 ?WAIT5_END_GROUP;
FSETP.GT.AND P6, PT, R27, R2, PT ?WAIT3_END_GROUP;
@P5 IADD3 R0, PT, PT, R17, 0x4, RZ ?trans2;
FSEL R2, R27, R2, P6 ?WAIT5_END_GROUP;
FSETP.GT.AND P3, PT, R29, R2, PT ?WAIT3_END_GROUP;
@P6 IADD3 R0, PT, PT, R17, 0x5, RZ ?trans2;
FSEL R2, R29, R2, P3 ?WAIT5_END_GROUP;
FSETP.GT.AND P4, PT, R31, R2, PT ?WAIT3_END_GROUP;
@P3 IADD3 R0, PT, PT, R17, 0x6, RZ ?trans1;
ISETP.NE.AND P3, PT, R18, R11, PT ?trans1;
FSEL R2, R31, R2, P4 ?WAIT8_END_GROUP;
@P4 IADD3 R0, PT, PT, R17, 0x7, RZ ?WAIT4_END_GROUP;
@P3 BRA 0x360 ?trans5;
BSYNC.RECONVERGENT B1 &req={1} ?trans5;
BSSY.RECONVERGENT B1, 0xa60 ?trans4;
@!P1 BRA 0xa50 ?trans5;
IADD3 R14, PT, PT, R13, -0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x820 ?trans1;
ISETP.NE.AND P1, PT, R22, RZ, PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P3, PT, R14, 0x3, PT ?WAIT13_END_GROUP;
@!P3 BRA 0x810 ?trans5;
LDCU UR7, c[0x0][0x3a4] &wr=0x0 ?trans1;
LDCU.64 UR14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R14, R16, UR7, R5 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R18, R14, UR4 ?WAIT5_END_GROUP;
LEA R14, P3, R18, UR14, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R15, R18, UR15, R19, 0x2, P3 ?WAIT5_END_GROUP;
LDG.E R17, desc[UR8][R14.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR8][R14.64+0x4] &wr=0x3 ?trans4;
LDG.E R21, desc[UR8][R14.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR8][R14.64+0xc] &wr=0x5 ?trans1;
FSETP.GT.AND P3, PT, R17, R2, PT &req={2} ?WAIT5_END_GROUP;
FSEL R2, R17, R2, P3 ?trans1;
IADD3 R17, PT, PT, R12, R5, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x4, RZ ?trans2;
FSETP.GT.AND P4, PT, R19, R2, PT &req={3} ?trans1;
SEL R0, R17, R0, P3 ?WAIT4_END_GROUP;
FSEL R2, R19, R2, P4 ?WAIT5_END_GROUP;
FSETP.GT.AND P5, PT, R21, R2, PT &req={4} ?WAIT3_END_GROUP;
@P4 IADD3 R0, PT, PT, R17, 0x1, RZ ?trans2;
FSEL R2, R21, R2, P5 ?WAIT5_END_GROUP;
FSETP.GT.AND P3, PT, R23, R2, PT &req={5} ?WAIT3_END_GROUP;
@P5 IADD3 R0, PT, PT, R17, 0x2, RZ ?trans2;
FSEL R2, R23, R2, P3 ?WAIT8_END_GROUP;
@P3 IADD3 R0, PT, PT, R17, 0x3, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P1 BRA 0xa50 ?trans5;
ISETP.NE.AND P1, PT, R22, 0x1, PT ?trans1;
BSSY.RECONVERGENT B2, 0x990 ?trans1;
LOP3.LUT P3, RZ, R6, 0x1, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@!P1 BRA 0x980 ?trans5;
LDCU UR7, c[0x0][0x3a4] &wr=0x0 ?trans1;
LDCU.64 UR14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R14, R16, UR7, R5 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R14, R14, UR4 ?WAIT5_END_GROUP;
LEA R18, P1, R14, UR14, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R19, R14, UR15, R15, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R15, desc[UR8][R18.64] &wr=0x2 ?trans4;
LDG.E R17, desc[UR8][R18.64+0x4] &wr=0x3 ?trans1;
FSETP.GT.AND P1, PT, R15, R2, PT &req={2} ?WAIT5_END_GROUP;
FSEL R2, R15, R2, P1 ?trans1;
IADD3 R15, PT, PT, R12, R5, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x2, RZ ?trans2;
FSETP.GT.AND P4, PT, R17, R2, PT &req={3} ?trans1;
SEL R0, R15, R0, P1 ?WAIT4_END_GROUP;
FSEL R2, R17, R2, P4 ?WAIT8_END_GROUP;
@P4 IADD3 R0, PT, PT, R15, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
@!P3 BRA 0xa50 ?trans5;
LDCU UR7, c[0x0][0x3a4] &wr=0x0 ?trans1;
LDCU.64 UR14, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R14, R16, UR7, R5 &req={0} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 ?WAIT5_END_GROUP;
IADD.64 R14, R14, UR4 ?WAIT5_END_GROUP;
LEA R16, P1, R14, UR14, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R17, R14, UR15, R15, 0x2, P1 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR8][R16.64] &wr=0x2 ?trans2;
FSETP.GT.AND P1, PT, R17, R2, PT &req={2} ?WAIT13_END_GROUP;
@P1 IADD3 R0, PT, PT, R12, R5, RZ ?trans1;
@P1 MOV R2, R17 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
@!P2 BRA 0x2a0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R10, c[0x0][0x3a8] &wr=0x0 ?trans8;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R3, R10, UR6, R3 &req={0} ?WAIT4_END_GROUP;
IMAD R3, R3, R11, R4 ?WAIT4_END_GROUP;
IMAD.WIDE R4, R3, 0x4, R6 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R4.64], R2 ?trans1;
IMAD.WIDE R6, R3, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR8][R6.64], R0 ?trans1;
EXIT ?trans5;
BRA 0xb20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: FMaxPoolForward(float const*, float*, int*, int, int, int, int, int, int, int, int)
_Z15FMaxPoolForwardPKfPfPiiiiiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b128 s[4:7], s[0:1], 0x20
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[0:1], null, s14, s3, v[3:4]
s_mul_i32 s14, s13, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v1, s14, v2
v_cmp_gt_i32_e32 vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s7, v1
s_and_b32 s2, s2, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_9
s_clause 0x2
s_load_b64 s[12:13], s[0:1], 0x30
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s12, 1
s_cbranch_scc1 .LBB0_7
v_mul_lo_u32 v3, s5, v0
v_mul_lo_u32 v7, v0, s13
v_mul_lo_u32 v8, v1, s13
s_mul_i32 s0, s15, s4
v_mov_b32_e32 v5, 0
s_mul_i32 s0, s0, s5
v_mov_b32_e32 v6, 0xc61c3c00
s_ashr_i32 s1, s0, 31
v_add3_u32 v2, v2, v3, s14
v_add_nc_u32_e32 v9, s12, v7
v_add_nc_u32_e32 v10, s12, v8
s_lshl_b64 s[0:1], s[0:1], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s4, s8, s0
v_mul_lo_u32 v2, s13, v2
s_addc_u32 s9, s9, s1
s_mov_b32 s8, 0
s_mov_b32 s13, 0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v3, 31, v2
v_mov_b32_e32 v11, v8
s_mov_b32 s14, 0
s_mov_b32 s16, s13
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_4:
global_load_b32 v12, v[3:4], off
v_add_nc_u32_e32 v11, 1, v11
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_ge_i32_e64 s1, v11, v10
s_waitcnt vmcnt(0)
v_cmp_gt_f32_e64 s0, v12, v6
v_cndmask_b32_e64 v6, v6, v12, s0
v_cndmask_b32_e64 v5, v5, s16, s0
s_add_i32 s16, s16, 1
s_or_b32 s14, s1, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s14
v_add_nc_u32_e32 v7, 1, v7
v_add_nc_u32_e32 v2, s5, v2
s_add_i32 s13, s13, s12
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_ge_i32_e32 vcc_lo, v7, v9
s_or_b32 s8, vcc_lo, s8
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s8
s_branch .LBB0_8
.LBB0_7:
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, 0xc61c3c00
.LBB0_8:
v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[3:4], null, v2, s7, v[1:2]
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[3:4]
v_add_co_u32 v2, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[2:3], v6, off
global_store_b32 v[0:1], v5, off
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| FMaxPoolForward | 4,500 | 1,846 | stackv2-00000-of-00015 |
// Demangled: FMaxPoolForwardFix(float const*, float*, int*, int, int, int, int, int, int, int, int)
Function : _Z18FMaxPoolForwardFixPKfPfPiiiiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x2 ?trans1;
S2R R7, SR_TID.Y &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.Y &wr=0x3 ?trans8;
LDC R0, c[0x0][0x364] &wr=0x3 ?trans1;
IMAD R6, R3, UR4, R6 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R6, UR7, PT &req={2} ?trans1;
IMAD R7, R0, UR5, R7 &req={3} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R7, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
S2R R10, SR_CTAID.Z &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x3b4] &wr=0x3 ?trans6;
LDC R9, c[0x0][0x3b0] &wr=0x4 ?trans1;
LDCU.64 UR10, c[0x0][0x3a0] &wr=0x5 ?trans1;
IMAD R5, R10, UR6, R7 &req={0} ?WAIT4_END_GROUP;
IMAD R0, R5, UR7, R6 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={2} &rd=0x0 &wr=0x2 ?trans1;
IABS R12, R9 &req={4} ?WAIT4_END_GROUP;
I2F.RP R8, R12 &wr=0x1 ?trans2;
MUFU.RCP R8, R8 &req={1} &wr=0x1 ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x1 &wr=0x4 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R11, PT, PT, RZ, -R5, RZ &req={4} ?WAIT5_END_GROUP;
IMAD R3, R11, R12, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R3, R4 ?trans1;
IABS R13, R2 &req={2} ?WAIT5_END_GROUP;
MOV R3, R13 ?WAIT5_END_GROUP;
IMAD.HI.U32 R5, R5, R3, RZ ?WAIT5_END_GROUP;
IADD3 R8, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R12, R8, R3 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R12, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R12, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R3, R12, PT ?trans1;
LOP3.LUT R3, R2, R9, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, RZ, PT ?WAIT7_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT5_END_GROUP;
@!P0 IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT8_END_GROUP;
@!P1 LOP3.LUT R5, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R3, PT, PT, -R5, RZ, RZ ?trans1;
IMAD R5, R7, UR8, R5 &req={3} ?WAIT4_END_GROUP;
IMAD R3, R9, R3, R2 ?trans2;
IMAD R2, R10, UR10, RZ &req={5} ?trans2;
IMAD R4, R6, UR8, R3 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R2, R2, UR11, RZ ?trans2;
IMAD R4, R5, UR11, R4 ?WAIT3_END_GROUP;
SHF.R.S32.HI R3, RZ, 0x1f, R2 ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?WAIT5_END_GROUP;
IADD.64 R2, R2, R4 ?WAIT5_END_GROUP;
LEA R4, P0, R2, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R5, R2, UR9, R3, 0x2, P0 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans4;
LDG.E R5, desc[UR4][R4.64] &wr=0x2 ?trans1;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x410;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: FMaxPoolForwardFix(float const*, float*, int*, int, int, int, int, int, int, int, int)
_Z18FMaxPoolForwardFixPKfPfPiiiiiiiii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b128 s[4:7], s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[2:3], null, s14, s3, v[1:2]
v_mad_u64_u32 v[0:1], null, s13, s2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s6, v2
v_cmp_gt_i32_e64 s2, s7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, s2, vcc_lo
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB2_2
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[3:4], null, s15, s6, v[2:3]
s_load_b64 s[2:3], s[0:1], 0x10
s_mul_i32 s4, s15, s4
s_mul_i32 s4, s4, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[4:5], null, v3, s7, v[0:1]
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s2, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
s_load_b64 s[2:3], s[0:1], 0x30
global_load_b32 v7, v[5:6], off
s_waitcnt lgkmcnt(0)
s_ashr_i32 s6, s2, 31
v_mul_lo_u32 v0, v0, s3
s_add_i32 s7, s2, s6
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s7, s7, s6
v_cvt_f32_u32_e32 v1, s7
s_sub_i32 s8, 0, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v1, v1
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v6, 31, v7
s_waitcnt_depctr 0xfff
v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_add_nc_u32 v8, v7, v6
v_cvt_u32_f32_e32 v1, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s8, v1
v_mul_hi_u32 v5, v1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v1, v1, v5
v_xor_b32_e32 v5, v8, v6
v_xor_b32_e32 v6, s6, v6
v_mul_hi_u32 v1, v5, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v8, v1, s7
v_sub_nc_u32_e32 v5, v5, v8
v_add_nc_u32_e32 v8, 1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_subrev_nc_u32_e32 v9, s7, v5
v_cmp_le_u32_e32 vcc_lo, s7, v5
v_cndmask_b32_e32 v1, v1, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cndmask_b32_e32 v5, v5, v9, vcc_lo
v_add_nc_u32_e32 v8, 1, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_le_u32_e32 vcc_lo, s7, v5
v_cndmask_b32_e32 v1, v1, v8, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v1, v1, v6
v_sub_nc_u32_e32 v1, v1, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[5:6], null, v2, s3, v[1:2]
v_mul_lo_u32 v1, v1, s2
s_load_b128 s[0:3], s[0:1], 0x0
v_mul_lo_u32 v2, v5, s5
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v1, v7, v1
s_lshl_b64 s[4:5], s[4:5], 2
v_add3_u32 v0, v1, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
s_waitcnt lgkmcnt(0)
s_add_u32 s0, s0, s4
s_addc_u32 s1, s1, s5
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
v_add_co_u32 v0, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v4, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[0:1], v2, off
.LBB2_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| FMaxPoolForwardFix | 1,706 | 2,099 | stackv2-00000-of-00015 |
// Demangled: kernelMatrixMul(float*, float*, float*, int)
Function : _Z15kernelMatrixMulPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans1;
UIMAD UR4, UR18, UR18, URZ &req={2} ?trans1;
IMAD R5, R5, UR5, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R7, UR18 ?trans1;
UISETP.GE.AND UP0, UPT, UR18, 0x1, UPT ?trans1;
IABS R6, R5 ?trans2;
I2F.RP R0, R7 &wr=0x0 ?trans3;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R4, PT, PT, RZ, -R3, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R9, R4, R7, RZ ?trans1;
MOV R4, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R9, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R7, R3, R4 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R7, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R7, R0, PT ?trans1;
@!P1 EXIT ?WAIT12_END_GROUP;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
ISETP.GE.AND P1, PT, R5, RZ, PT ?trans1;
@!P0 IADD3 R0, PT, PT, R0, -R7, RZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR18, PT ?trans1;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?WAIT8_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?trans2;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans2;
@!P0 LOP3.LUT R0, RZ, UR18, RZ, 0x33, !PT ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT3_END_GROUP;
IADD3 R14, PT, PT, R5, -R0, RZ ?trans2;
LDG.E R15, desc[UR16][R2.64] &req={1} &rd=0x0 &wr=0x5 ?trans5;
@!P1 BRA 0x6c0 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
USHF.L.U32 UR6, UR18, 0x1, URZ ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
MOV R18, R14 ?trans1;
MOV R19, R0 ?trans1;
UIMAD.WIDE.U32 UR6, UR6, 0x4, URZ ?trans1;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UIMAD.WIDE.U32 UR8, UR18, 0x14, UR6 ?trans1;
UIMAD.WIDE.U32 UR10, UR18, 0x10, UR6 ?trans1;
UIMAD.WIDE.U32 UR12, UR18, 0x8, UR6 ?trans1;
UIMAD.WIDE.U32 UR14, UR18, 0xc, UR6 ?trans1;
UMOV UR4, URZ ?trans2;
IADD.64 R6, R4.reuse, UR8 &req={1} ?trans2;
IADD.64 R8, R4.reuse, UR10 ?trans2;
IADD.64 R10, R4, UR12 ?WAIT8_END_GROUP;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.WIDE R16, R19, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E R21, desc[UR16][R16.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R12, R18, 0x4, R12 &req={1} ?WAIT5_END_GROUP;
LDG.E R20, desc[UR16][R12.64] &wr=0x2 ?trans1;
MOV R23, UR18 ?trans1;
FFMA R15, R20, R21, R15 &req={5,2} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R20, R23, 0x4, R16 ?trans1;
STG.E desc[UR16][R2.64], R15 &rd=0x1 ?trans4;
LDG.E R24, desc[UR16][R12.64+0x4] &wr=0x2 ?trans4;
LDG.E R25, desc[UR16][R20.64] &wr=0x2 ?trans1;
IADD.64 R22, R16, UR6 ?WAIT2_END_GROUP;
FFMA R29, R24, R25, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R29 &rd=0x2 ?trans4;
LDG.E R22, desc[UR16][R22.64] &wr=0x3 ?trans4;
LDG.E R24, desc[UR16][R12.64+0x8] &wr=0x3 ?trans1;
IADD.64 R26, R20, UR6 ?trans2;
FFMA R31, R24, R22, R29 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R31 ?trans4;
LDG.E R26, desc[UR16][R26.64] &wr=0x1 ?trans4;
LDG.E R24, desc[UR16][R12.64+0xc] &wr=0x1 ?trans2;
FFMA R15, R24, R26, R31 &req={1} ?trans1;
IMAD.WIDE R24, R19, 0x4, R10 ?WAIT4_END_GROUP;
STG.E desc[UR16][R2.64], R15 &rd=0x1 ?trans4;
LDG.E R24, desc[UR16][R24.64] &wr=0x2 ?trans4;
LDG.E R20, desc[UR16][R12.64+0x10] &wr=0x2 ?trans1;
IADD.64 R22, R16, UR14 ?trans2;
FFMA R29, R20, R24, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R29 &rd=0x2 ?trans4;
LDG.E R22, desc[UR16][R22.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR16][R12.64+0x14] &wr=0x3 ?trans1;
IMAD.WIDE R20, R19, 0x4, R8 ?WAIT4_END_GROUP;
FFMA R27, R16, R22, R29 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R27 &rd=0x2 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x3 ?trans4;
LDG.E R16, desc[UR16][R12.64+0x18] &wr=0x3 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?trans1;
FFMA R25, R16, R20, R27 &req={3} ?trans1;
IMAD.WIDE R16, R19, 0x4, R6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R2.64], R25 &rd=0x2 ?trans4;
LDG.E R24, desc[UR16][R12.64+0x1c] &wr=0x1 ?trans4;
LDG.E R16, desc[UR16][R16.64] &wr=0x1 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R22, UR18 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD3 R18, PT, PT, R18, 0x8, RZ ?WAIT3_END_GROUP;
IMAD R19, R22, 0x8, R19 ?trans2;
FFMA R15, R24, R16, R25 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R15 &rd=0x2 ?trans1;
@P0 BRA 0x3a0 ?trans5;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x970 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R11, UR4 ?trans1;
IADD3 R9, PT, PT, R14, UR4, RZ ?WAIT4_END_GROUP;
IMAD R11, R11, UR18, R0 ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={3} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR16][R6.64] &wr=0x4 ?trans1;
MOV R11, UR18 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R10, R11, 0x4, R6 ?WAIT4_END_GROUP;
FFMA R15, R8, R9, R15 &req={5,4,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R15 &rd=0x1 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR16][R4.64+0x4] &wr=0x2 ?trans1;
UIADD3 UR6, UPT, UPT, UR18, UR18, URZ ?WAIT6_END_GROUP;
MOV R17, UR6 ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R6 ?WAIT4_END_GROUP;
FFMA R19, R8, R10, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R19 &rd=0x3 ?trans4;
LDG.E R16, desc[UR16][R16.64] &wr=0x2 ?trans4;
LDG.E R18, desc[UR16][R4.64+0x8] &wr=0x2 ?trans1;
MOV R8, UR18 ?trans1;
MOV R12, UR6 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
IADD.64 R8, R8, R12 ?WAIT5_END_GROUP;
LEA R6, P0, R8, R6, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R7, R8, R7, R9, 0x2, P0 ?trans1;
FFMA R9, R18, R16, R19 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R9 &rd=0x3 ?trans4;
LDG.E R8, desc[UR16][R4.64+0xc] &wr=0x1 ?trans4;
LDG.E R6, desc[UR16][R6.64] &wr=0x1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R15, R8, R6, R9 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R15 &rd=0x3 ?trans6;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
UISETP.NE.AND UP0, UPT, UR5, 0x1, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0xae0 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R11, UR4 ?trans1;
IADD3 R9, PT, PT, R14, UR4, RZ &req={3} ?WAIT4_END_GROUP;
IMAD R11, R11, UR18, R0 ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={3} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR16][R6.64] &wr=0x4 ?trans1;
MOV R13, UR18 ?trans1;
FFMA R11, R8, R9, R15 &req={5,4} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R13, 0x4, R6 ?trans1;
STG.E desc[UR16][R2.64], R11 &rd=0x1 ?trans4;
LDG.E R10, desc[UR16][R4.64+0x4] &wr=0x3 ?trans4;
LDG.E R8, desc[UR16][R8.64] &wr=0x3 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R15, R10, R8, R11 &req={3,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R15 &rd=0x1 ?trans6;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UISETP.NE.U32.AND UP0, UPT, UR5, 0x1, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x4 ?trans1;
MOV R11, UR4 &req={1} ?trans1;
IADD3 R9, PT, PT, R14, UR4, RZ &req={3} ?WAIT4_END_GROUP;
IMAD R11, R11, UR18, R0 ?trans2;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR16][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR16][R6.64] &wr=0x3 ?trans2;
FFMA R15, R4, R6, R15 &req={5,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R15 ?trans1;
EXIT ?trans5;
BRA 0xbe0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernelMatrixMul(float*, float*, float*, int)
_Z15kernelMatrixMulPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s4, s4
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_4
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_4
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_add_nc_u32_e32 v7, v1, v2
v_xor_b32_e32 v7, v7, v2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
s_ashr_i32 s2, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_add_i32 s3, s4, s2
global_load_b32 v5, v[3:4], off
s_xor_b32 s5, s3, s2
v_cvt_f32_u32_e32 v0, s5
s_sub_i32 s2, 0, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, s2, v0
s_load_b128 s[0:3], s[0:1], 0x0
v_mul_hi_u32 v6, v0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v6
v_mul_hi_u32 v0, v7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s5
v_sub_nc_u32_e32 v0, v7, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v6, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
s_mov_b32 s5, 0
v_cndmask_b32_e32 v0, v0, v6, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v1, v0
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v6, s5, v2
v_ashrrev_i32_e32 v1, 31, v0
s_add_i32 s5, s5, 1
s_cmp_lg_u32 s4, s5
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_lshlrev_b64 v[8:9], 2, v[0:1]
v_add_nc_u32_e32 v0, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[6:7], 2, v[6:7]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v8, vcc_lo, s2, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
v_add_co_u32 v6, vcc_lo, s0, v6
s_delay_alu instid0(VALU_DEP_4)
v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
global_load_b32 v1, v[8:9], off
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v5, v6, v1
global_store_b32 v[3:4], v5, off
s_cbranch_scc1 .LBB0_3
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernelMatrixMul | 4,899 | 1,744 | stackv2-00000-of-00015 |
// Demangled: processMandelbrotElement(double*, double*, double*, double*, double*, double*, double)
Function : _Z24processMandelbrotElementPdS_S_S_S_S_d
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R2, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x1 ?trans1;
S2R R3, SR_TID.Y &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x0 ?trans5;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU.128 UR12, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU.128 UR8, c[0x0][0x380] &wr=0x3 ?trans6;
LDC R5, c[0x0][0x364] &wr=0x4 ?trans1;
LDCU.128 UR16, c[0x0][0x3a0] &wr=0x5 ?trans1;
UIMAD UR4, UR5, UR6, UR4 &req={1} ?trans1;
IMAD R2, R3, UR7, R2 &req={0} ?WAIT2_END_GROUP;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans2;
IMAD R5, R5, UR7, RZ &req={4} ?trans1;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x0 ?trans3;
IMAD.WIDE.U32 R2, R5, UR4, R2 ?trans2;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans3;
SHF.L.U64.HI R3, R2.reuse, 0x3, R3 ?trans1;
IMAD.SHL.U32 R2, R2, 0x8, RZ ?WAIT5_END_GROUP;
IADD.64 R14, R2.reuse, UR14 &req={2} ?trans2;
IADD.64 R4, R2.reuse, UR8 &req={3} ?trans2;
IADD.64 R16, R2.reuse, UR16 &req={5} ?trans2;
IADD.64 R6, R2.reuse, UR10 ?trans2;
IADD.64 R18, R2.reuse, UR18 ?trans2;
IADD.64 R10, R2, UR12 ?WAIT2_END_GROUP;
LDG.E.64 R14, desc[UR4][R14.64] &req={1} &wr=0x2 ?trans4;
LDG.E.64 R2, desc[UR4][R4.64] &wr=0x0 ?trans4;
LDG.E.64 R16, desc[UR4][R16.64] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR4][R6.64] &wr=0x4 ?trans4;
LDG.E.64 R18, desc[UR4][R18.64] &wr=0x5 ?trans4;
LDG.E.64 R12, desc[UR4][R10.64] &wr=0x3 ?trans1;
DMUL R14, R14, 0.5 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R2, R14, UR6, R2 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R4.64], R2 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R16, 0.5 &req={3} &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R14, UR6, R8 &req={4} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R6.64], R8 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R18, 0.5 &req={5} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R12, R14, UR6, R12 &req={0} &wr=0x0 ?trans2;
STG.E.64 desc[UR4][R10.64], R12 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x3e0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: processMandelbrotElement(double*, double*, double*, double*, double*, double*, double)
_Z24processMandelbrotElementPdS_S_S_S_S_d:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x38
s_load_b32 s5, s[0:1], 0x44
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
v_and_b32_e32 v3, 0x3ff, v0
v_bfe_u32 v0, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_mul_i32 s6, s4, s15
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
s_add_i32 s16, s6, s14
s_cmp_lt_u32 s14, s4
s_load_b256 s[8:15], s[0:1], 0x0
s_cselect_b32 s4, 12, 18
v_mov_b32_e32 v1, s4
global_load_u16 v2, v1, s[2:3]
s_lshr_b32 s2, s5, 16
v_mov_b32_e32 v1, 0
s_waitcnt vmcnt(0)
v_mul_lo_u32 v4, s2, v2
v_mad_u32_u24 v0, v0, v2, v3
s_load_b256 s[0:7], s[0:1], 0x20
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v4, s16, v[0:1]
v_lshlrev_b64 v[0:1], 3, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s14, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s15, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v6, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
global_load_b64 v[4:5], v[4:5], off
global_load_b64 v[6:7], v[6:7], off
v_add_co_u32 v8, vcc_lo, s8, v0
v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
v_add_co_u32 v10, vcc_lo, s10, v0
v_add_co_ci_u32_e32 v11, vcc_lo, s11, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s12, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
global_load_b64 v[12:13], v[8:9], off
global_load_b64 v[14:15], v[10:11], off
global_load_b64 v[16:17], v[0:1], off
s_waitcnt vmcnt(5)
v_mul_f64 v[2:3], v[2:3], 0.5
s_waitcnt vmcnt(4)
v_mul_f64 v[4:5], v[4:5], 0.5
s_waitcnt vmcnt(3)
v_mul_f64 v[6:7], v[6:7], 0.5
s_waitcnt vmcnt(2)
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_fma_f64 v[2:3], v[2:3], s[4:5], v[12:13]
s_waitcnt vmcnt(1)
v_fma_f64 v[4:5], v[4:5], s[4:5], v[14:15]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_3)
v_fma_f64 v[6:7], v[6:7], s[4:5], v[16:17]
global_store_b64 v[8:9], v[2:3], off
global_store_b64 v[10:11], v[4:5], off
global_store_b64 v[0:1], v[6:7], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| processMandelbrotElement | 1,341 | 1,270 | stackv2-00000-of-00015 |
// Demangled: gpu_kernel(int*, int*, int*, int)
Function : _Z10gpu_kernelPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x170 ?trans6;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, R0 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.GE.AND P0, PT, R11.reuse, UR6, PT &req={2} ?trans1;
IMAD.WIDE R8, R11, 0x4, R2 &req={3} ?WAIT12_END_GROUP;
@P0 BRA 0x160 &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R11, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R11, 0x4, R6 &req={3} ?trans1;
IADD3 R13, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R13 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 &req={1} ?trans5;
STG.E desc[UR4][R8.64], R11 ?trans1;
EXIT ?trans5;
BRA 0x190;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: gpu_kernel(int*, int*, int*, int)
_Z10gpu_kernelPiS_S_i:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
s_load_b64 s[0:1], s[0:1], 0x10
global_load_b32 v0, v[4:5], off
global_load_b32 v6, v[6:7], off
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v0, v6, v0
global_store_b32 v[4:5], v0, off
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
global_store_b32 v[2:3], v1, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| gpu_kernel | 717 | 685 | stackv2-00000-of-00015 |
// Demangled: initRNG(curandStateXORWOW*, int)
Function : _Z7initRNGP17curandStateXORWOWi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X ?trans1;
LDCU UR6, c[0x0][0x370] &wr=0x2 ?trans1;
HFMA2 R2, -RZ, RZ, -178.125, -3742 ?trans1;
S2R R9, SR_TID.X &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0xf40 ?trans1;
LDCU UR7, c[0x0][0x360] &wr=0x3 ?trans3;
S2UR UR5, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x4 ?trans7;
LDC R0, c[0x0][0x388] &wr=0x5 ?trans8;
LDC R8, c[0x0][0x364] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
UIMAD UR4, UR5, UR6, UR4 &req={2} ?trans1;
ISETP.GT.AND P0, PT, R0.reuse, -0x1, PT &req={5} ?trans1;
LOP3.LUT R0, R0, 0xaad26b49, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
IMAD R0, R0, 0x4182bed5, RZ ?trans2;
IMAD R8, R8, UR4, R3 &req={1} ?trans1;
SEL R3, R2, 0x8bf16996, P0 ?trans2;
IADD3 R5, PT, PT, R0, 0x75bcd15, RZ ?trans1;
IMAD R8, R8, UR7, R9 &req={3} ?trans1;
LOP3.LUT R10, R0, 0x159a55e5, RZ, 0x3c, !PT ?trans2;
IADD3 R4, PT, PT, R3, 0x64f0c9, R0 ?trans1;
IMAD.WIDE R6, R8, 0x30, R6 &req={0} ?trans1;
IADD3 R13, PT, PT, R0, 0x583f19, RZ ?WAIT2_END_GROUP;
IADD3 R11, PT, PT, R3.reuse, 0x1f123bb5, RZ ?trans2;
LOP3.LUT R12, R3, 0x5491333, RZ, 0x3c, !PT ?trans1;
STG.E.64 desc[UR8][R6.64], R4 &req={4} &rd=0x0 ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?trans2;
STG.E.64 desc[UR8][R6.64+0x8], R10 &rd=0x0 ?trans4;
STG.E.64 desc[UR8][R6.64+0x10], R12 &rd=0x0 ?trans6;
@!P0 BRA 0xf30 ?trans5;
IADD.64 R10, R6, 0x4 &req={0} ?trans2;
MOV R18, RZ ?WAIT7_END_GROUP;
LOP3.LUT R12, R8, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B1, 0xec0 ?trans1;
MOV R13, RZ ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R12, RZ, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xeb0 ?trans5;
LDC.64 R14, c[0x4][RZ] &wr=0x0 ?trans1;
HFMA2 R19, -RZ, RZ, 0, 0 ?trans2;
IMAD.WIDE.U32 R14, R18, 0xc80, R14 &req={0} ?WAIT7_END_GROUP;
MOV R21, RZ &req={0} ?trans1;
MOV R23, RZ ?trans1;
CS2R R4, SRZ ?trans1;
CS2R R2, SRZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R16, R23, 0x4, R10 ?WAIT5_END_GROUP;
LDG.E R25, desc[UR8][R16.64] &rd=0x0 &wr=0x5 ?trans1;
MOV R27, R23 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x5, PT ?WAIT5_END_GROUP;
P2R R28, PR, RZ, 0x1 &req={0} ?WAIT8_END_GROUP;
SHF.R.U32.HI R30, RZ, R0, R25 &req={5} ?trans1;
IMAD R16, R27, 0x20, R0 ?WAIT3_END_GROUP;
LOP3.LUT R17, R30, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R17, 0x1, PT ?trans1;
IMAD R17, R16, 0x5, RZ ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R16, R17, 0x4, R14 ?trans1;
R2P PR, R30, 0x7e ?WAIT7_END_GROUP;
@!P0 LDG.E R20, desc[UR8][R16.64] &wr=0x2 ?trans4;
@!P0 LDG.E R24, desc[UR8][R16.64+0x10] &wr=0x3 ?trans4;
@!P0 LDG.E R29, desc[UR8][R16.64+0x4] &wr=0x4 ?trans4;
@!P0 LDG.E R22, desc[UR8][R16.64+0x8] &wr=0x4 ?trans4;
@!P0 LDG.E R31, desc[UR8][R16.64+0xc] &wr=0x4 ?trans4;
@P1 LDG.E R32, desc[UR8][R16.64+0x14] &wr=0x4 ?trans4;
@P2 LDG.E R34, desc[UR8][R16.64+0x28] &wr=0x4 ?trans4;
@P5 LDG.E R36, desc[UR8][R16.64+0x64] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR8][R16.64+0x1c] &wr=0x4 ?trans4;
@P6 LDG.E R35, desc[UR8][R16.64+0x78] &wr=0x4 ?trans4;
@P2 LDG.E R33, desc[UR8][R16.64+0x2c] &wr=0x4 ?trans4;
@P4 LDG.E R37, desc[UR8][R16.64+0x5c] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR8][R16.64+0x3c] &wr=0x2 ?trans1;
@!P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR8][R16.64+0x50] &wr=0x3 ?trans1;
@!P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR8][R16.64+0x18] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR8][R16.64+0x24] &wr=0x4 ?trans1;
@!P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR8][R16.64+0x20] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R32, desc[UR8][R16.64+0x30] &wr=0x4 ?trans1;
@P2 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R34, desc[UR8][R16.64+0x38] &wr=0x4 ?trans1;
LOP3.LUT P0, RZ, R30, 0x80, RZ, 0xc0, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ?trans2;
@P4 LDG.E R26, desc[UR8][R16.64+0x60] &wr=0x4 ?trans1;
@P3 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P3 LDG.E R20, desc[UR8][R16.64+0x44] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P4 LDG.E R24, desc[UR8][R16.64+0x58] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans1;
@P2 LDG.E R29, desc[UR8][R16.64+0x34] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R22, desc[UR8][R16.64+0x4c] &wr=0x4 ?trans1;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R31, desc[UR8][R16.64+0x40] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R35, RZ, 0x3c, !PT ?trans2;
@P2 LOP3.LUT R2, R2, R33, RZ, 0x3c, !PT ?trans1;
@P4 LDG.E R35, desc[UR8][R16.64+0x54] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P3 LDG.E R33, desc[UR8][R16.64+0x48] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R34, desc[UR8][R16.64+0x8c] &wr=0x4 ?trans4;
@P5 LDG.E R32, desc[UR8][R16.64+0x68] &wr=0x4 ?trans1;
@P3 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R20, desc[UR8][R16.64+0x6c] &wr=0x2 ?trans1;
@P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P6 LDG.E R24, desc[UR8][R16.64+0x80] &wr=0x3 ?trans1;
@P2 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P5 LDG.E R29, desc[UR8][R16.64+0x70] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R22, desc[UR8][R16.64+0x74] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R31, desc[UR8][R16.64+0x7c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R26, desc[UR8][R16.64+0x88] &wr=0x4 ?trans1;
@P3 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R33, desc[UR8][R16.64+0x84] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R35, desc[UR8][R16.64+0x90] &wr=0x4 ?trans1;
@P5 LOP3.LUT R2, R2, R32, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P0 LDG.E R32, desc[UR8][R16.64+0x94] &wr=0x4 ?trans4;
@P0 LDG.E R37, desc[UR8][R16.64+0x98] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR8][R16.64+0x9c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT &req={2} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT &req={4} ?trans2;
@P5 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ?trans2;
R2P PR, R30.B1, 0x7f ?WAIT13_END_GROUP;
@P0 LDG.E R22, desc[UR8][R16.64+0xa8] &wr=0x2 ?trans4;
@P0 LDG.E R24, desc[UR8][R16.64+0xb0] &wr=0x3 ?trans4;
@P0 LDG.E R31, desc[UR8][R16.64+0xac] &wr=0x4 ?trans4;
@P0 LDG.E R29, desc[UR8][R16.64+0xa4] &wr=0x4 ?trans4;
@P0 LDG.E R20, desc[UR8][R16.64+0xa0] &wr=0x4 ?trans4;
@P2 LDG.E R32, desc[UR8][R16.64+0xc8] &wr=0x4 ?trans4;
@P3 LDG.E R34, desc[UR8][R16.64+0xdc] &wr=0x4 ?trans4;
@P4 LDG.E R36, desc[UR8][R16.64+0xf0] &wr=0x4 ?trans4;
@P5 LDG.E R33, desc[UR8][R16.64+0x104] &wr=0x4 ?trans4;
@P1 LDG.E R26, desc[UR8][R16.64+0xc4] &wr=0x4 ?trans4;
@P3 LDG.E R37, desc[UR8][R16.64+0xe8] &wr=0x4 ?trans4;
@P3 LDG.E R35, desc[UR8][R16.64+0xe0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P1 LDG.E R22, desc[UR8][R16.64+0xb4] &wr=0x2 ?trans1;
@P0 LOP3.LUT R5, R5, R24, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P1 LDG.E R24, desc[UR8][R16.64+0xbc] &wr=0x3 ?trans1;
@P0 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?WAIT3_END_GROUP;
@P1 LDG.E R31, desc[UR8][R16.64+0xc0] &wr=0x4 ?trans1;
@P0 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P1 LDG.E R29, desc[UR8][R16.64+0xb8] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?trans2;
LOP3.LUT P0, RZ, R30, 0x8000, RZ, 0xc0, !PT ?trans1;
@P6 LDG.E R20, desc[UR8][R16.64+0x118] &wr=0x4 ?trans4;
@P3 LDG.E R30, desc[UR8][R16.64+0xe4] &wr=0x4 ?trans1;
@P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R26, desc[UR8][R16.64+0xd8] &wr=0x4 ?trans1;
@P1 LOP3.LUT R21, R21, R22, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P4 LDG.E R22, desc[UR8][R16.64+0xf8] &wr=0x2 ?trans1;
@P2 LOP3.LUT R21, R21, R32, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={3} ?trans1;
@P3 LDG.E R32, desc[UR8][R16.64+0xec] &wr=0x3 ?trans1;
@P3 LOP3.LUT R21, R21, R34, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R24, desc[UR8][R16.64+0xd0] &wr=0x2 ?trans1;
@P4 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?trans2;
@P1 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT &req={4} ?trans1;
@P0 LDG.E R36, desc[UR8][R16.64+0x12c] &wr=0x4 ?trans1;
@P5 LOP3.LUT R21, R21, R33, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R33, desc[UR8][R16.64+0xd4] &wr=0x3 ?trans1;
@P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P2 LDG.E R31, desc[UR8][R16.64+0xcc] &wr=0x4 ?trans4;
@P4 LDG.E R29, desc[UR8][R16.64+0xfc] &wr=0x4 ?trans4;
@P4 LDG.E R34, desc[UR8][R16.64+0xf4] &wr=0x4 ?trans1;
@P6 LOP3.LUT R21, R21, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P4 LDG.E R20, desc[UR8][R16.64+0x100] &wr=0x4 ?trans1;
@P2 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P5 LDG.E R26, desc[UR8][R16.64+0x114] &wr=0x4 ?trans1;
@P2 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?WAIT3_END_GROUP;
@P5 LDG.E R24, desc[UR8][R16.64+0x10c] &wr=0x2 ?trans1;
@P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R30, desc[UR8][R16.64+0x128] &wr=0x2 ?trans1;
@P2 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?WAIT3_END_GROUP;
@P5 LDG.E R33, desc[UR8][R16.64+0x110] &wr=0x3 ?trans1;
@P2 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?trans2;
@P3 LOP3.LUT R4, R4, R37, RZ, 0x3c, !PT ?trans1;
@P5 LDG.E R31, desc[UR8][R16.64+0x108] &wr=0x4 ?trans1;
@P3 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans1;
@P6 LDG.E R35, desc[UR8][R16.64+0x11c] &wr=0x4 ?trans1;
@P4 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R22, desc[UR8][R16.64+0x120] &wr=0x4 ?trans1;
@P0 LOP3.LUT R21, R21, R36, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
@P6 LDG.E R29, desc[UR8][R16.64+0x124] &wr=0x4 ?trans1;
@P3 LOP3.LUT R5, R5, R32, RZ, 0x3c, !PT ?trans2;
@P4 LOP3.LUT R2, R2, R34, RZ, 0x3c, !PT ?trans1;
@P0 LDG.E R37, desc[UR8][R16.64+0x130] &wr=0x4 ?trans4;
@P0 LDG.E R32, desc[UR8][R16.64+0x134] &wr=0x4 ?trans4;
@P0 LDG.E R34, desc[UR8][R16.64+0x138] &wr=0x4 ?trans4;
@P0 LDG.E R36, desc[UR8][R16.64+0x13c] &wr=0x4 ?trans1;
IADD3 R0, PT, PT, R0, 0x10, RZ ?WAIT2_END_GROUP;
@P4 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R0, 0x20, PT ?trans1;
@P5 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT &req={2} ?trans2;
@P6 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ?trans2;
@P5 LOP3.LUT R4, R4, R33, RZ, 0x3c, !PT &req={3} ?trans2;
@P5 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT &req={4} ?WAIT4_END_GROUP;
@P6 LOP3.LUT R2, R2, R35, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ?trans2;
@P6 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R2, R2, R37, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ?trans2;
@P0 LOP3.LUT R4, R4, R34, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
@P0 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ?trans1;
@P1 BRA 0x360 ?trans6;
ISETP.NE.AND P2, PT, R28, RZ, PT ?WAIT13_END_GROUP;
@P2 BRA 0x2f0 ?trans5;
STG.E.64 desc[UR8][R6.64+0x8], R2 &rd=0x0 ?trans1;
IADD3 R19, PT, PT, R19, 0x1, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR8][R6.64+0x10], R4 &rd=0x0 ?trans2;
ISETP.GE.U32.AND P0, PT, R19, R12, PT ?trans2;
STG.E desc[UR8][R6.64+0x4], R21 &rd=0x0 ?trans11;
@!P0 BRA 0x2b0 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
MOV R2, R8 &req={0} ?trans1;
MOV R3, R9 ?trans1;
SHF.R.U64 R8, R8, 0x2, R9.reuse ?trans2;
SHF.R.U32.HI R9, RZ, 0x2, R9 ?trans2;
ISETP.GT.U64.AND P0, PT, R2, 0x3, PT ?WAIT3_END_GROUP;
IADD3 R18, PT, PT, R18, 0x1, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x230 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E.64 desc[UR8][R6.64+0x18], RZ ?trans4;
STG.E desc[UR8][R6.64+0x20], RZ ?trans4;
STG.E.64 desc[UR8][R6.64+0x28], RZ ?trans1;
EXIT ?trans5;
BRA 0xf80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initRNG(hiprandState*, int)
_Z7initRNGP12hiprandStatei:
s_load_b64 s[0:1], s[0:1], 0x4
s_clause 0x2
s_load_b32 s4, s[2:3], 0x10
s_load_b32 s5, s[2:3], 0x1c
s_load_b32 s6, s[2:3], 0x8
v_bfe_u32 v1, v0, 10, 10
s_mov_b32 s7, 0x8a5d614f
s_mov_b32 s18, exec_lo
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s0, 16
s_mul_i32 s4, s4, s15
s_lshr_b32 s8, s5, 16
s_and_b32 s9, s5, 0xffff
s_xor_b32 s5, s6, 0x2c7f967f
s_add_i32 s4, s4, s14
s_mul_i32 s10, s5, 0x493c4aa1
s_cmp_gt_i32 s6, -1
v_mul_u32_u24_e32 v5, s1, v1
s_mul_i32 s0, s0, s1
s_cselect_b32 s6, s7, 0xfa091aa4
s_xor_b32 s1, s10, 0x159a55e5
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v0, v0, 20, 10
s_add_i32 s7, s10, 0x583f19
s_xor_b32 s5, s6, 0x5491333
v_mov_b32_e32 v7, s7
v_mul_lo_u32 v6, s0, v2
v_mad_u64_u32 v[3:4], null, s4, s8, v[1:2]
s_add_i32 s0, s10, 0x75bcd15
s_add_i32 s4, s6, 0x1f123bb5
s_mov_b32 s7, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_add3_u32 v4, v6, v5, v0
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
v_mad_u64_u32 v[5:6], null, v3, s9, v[2:3]
s_add_i32 s0, s10, s6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_mul_lo_u32 v8, v4, 48
s_add_i32 s0, s0, 0x64f0c9
v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
v_mov_b32_e32 v4, s0
v_ashrrev_i32_e32 v6, 31, v5
ds_store_2addr_b64 v8, v[0:1], v[2:3] offset0:3 offset1:4
ds_store_2addr_b32 v8, v4, v7 offset1:10
v_cmpx_ne_u32_e32 0, v5
s_cbranch_execz .LBB0_12
v_mov_b32_e32 v7, v6
v_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v9, 24, v8
s_mov_b32 s8, 0
s_getpc_b64 s[14:15]
s_add_u32 s14, s14, _ZL31d_xorwow_sequence_jump_matrices@rel32@lo+4
s_addc_u32 s15, s15, _ZL31d_xorwow_sequence_jump_matrices@rel32@hi+12
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_and_b32_e32 v10, 3, v6
s_mov_b32 s19, exec_lo
v_cmpx_ne_u32_e32 0, v10
s_cbranch_execz .LBB0_11
s_mov_b32 s20, 0
s_mov_b32 s21, 0
.LBB0_4:
s_mov_b32 s9, s8
s_mov_b32 s10, s8
s_mov_b32 s11, s8
s_mov_b32 s12, s8
v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
v_mov_b32_e32 v4, s12
s_mov_b64 s[10:11], s[14:15]
s_mov_b32 s9, 0
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_lshr_b32 s0, s9, 3
s_mov_b64 s[12:13], 0
s_and_b32 s0, s0, 0x1ffffffc
s_mov_b64 s[16:17], s[10:11]
v_add_nc_u32_e32 v11, s0, v9
s_and_b32 s0, s9, 31
ds_load_b32 v11, v11
s_waitcnt lgkmcnt(0)
v_bfe_u32 v11, v11, s0, 1
s_delay_alu instid0(VALU_DEP_1)
v_cmp_eq_u32_e32 vcc_lo, 0, v11
.LBB0_6:
s_load_b32 s6, s[16:17], 0x0
s_cmp_eq_u32 s12, 1
s_cselect_b32 s0, -1, 0
s_cmp_eq_u32 s12, 2
v_cndmask_b32_e64 v11, v0, v1, s0
s_cselect_b32 s1, -1, 0
s_cmp_eq_u32 s12, 3
s_cselect_b32 s4, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v2, s1
s_cmp_eq_u32 s12, 4
s_cselect_b32 s5, -1, 0
s_cmp_eq_u32 s12, 0
v_cndmask_b32_e64 v11, v11, v3, s4
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v11, v11, v4, s5
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v12, s6, 0, vcc_lo
s_cselect_b32 s6, -1, 0
s_add_u32 s12, s12, 1
s_addc_u32 s13, s13, 0
s_add_u32 s16, s16, 4
v_xor_b32_e32 v11, v12, v11
s_addc_u32 s17, s17, 0
s_cmp_eq_u32 s12, 5
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v4, v4, v11, s5
v_cndmask_b32_e64 v3, v3, v11, s4
v_cndmask_b32_e64 v2, v2, v11, s1
v_cndmask_b32_e64 v1, v1, v11, s0
v_cndmask_b32_e64 v0, v0, v11, s6
s_cbranch_scc0 .LBB0_6
s_add_i32 s9, s9, 1
s_add_u32 s10, s10, 20
s_addc_u32 s11, s11, 0
s_cmpk_lg_i32 s9, 0xa0
s_cbranch_scc1 .LBB0_5
v_mov_b32_e32 v11, v9
s_mov_b64 s[0:1], 0
.LBB0_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, 1
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 2
v_cndmask_b32_e32 v12, v0, v1, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v12, v12, v2, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_cmp_eq_u32 s0, 4
v_cndmask_b32_e32 v12, v12, v3, vcc_lo
s_cselect_b32 vcc_lo, -1, 0
s_add_u32 s0, s0, 1
s_addc_u32 s1, s1, 0
s_cmp_eq_u32 s0, 5
v_cndmask_b32_e32 v12, v12, v4, vcc_lo
ds_store_b32 v11, v12
v_add_nc_u32_e32 v11, 4, v11
s_cbranch_scc0 .LBB0_9
s_add_i32 s21, s21, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s21, v10
s_or_b32 s20, vcc_lo, s20
s_and_not1_b32 exec_lo, exec_lo, s20
s_cbranch_execnz .LBB0_4
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s19
v_lshrrev_b64 v[0:1], 2, v[6:7]
v_cmp_gt_u64_e32 vcc_lo, 4, v[6:7]
s_add_u32 s14, s14, 0xc80
s_addc_u32 s15, s15, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v7, v1 :: v_dual_mov_b32 v6, v0
s_or_b32 s7, vcc_lo, s7
s_and_not1_b32 exec_lo, exec_lo, s7
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s18
s_load_b64 s[0:1], s[2:3], 0x0
v_mov_b32_e32 v4, 0
ds_load_2addr_b64 v[0:3], v8 offset0:4 offset1:5
ds_store_2addr_b32 v8, v4, v4 offset0:1 offset1:2
ds_load_2addr_b64 v[9:12], v8 offset0:2 offset1:3
ds_load_2addr_b64 v[13:16], v8 offset1:1
s_waitcnt lgkmcnt(0)
v_mad_i64_i32 v[6:7], null, v5, 48, s[0:1]
s_clause 0x2
global_store_b128 v[6:7], v[0:3], off offset:32
global_store_b128 v[6:7], v[9:12], off offset:16
global_store_b128 v[6:7], v[13:16], off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initRNG | 8,079 | 3,193 | stackv2-00000-of-00015 |
// Demangled: transposeNoBankConflicts(float*, float*, int, int)
Function : _Z24transposeNoBankConflictsPfS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_CTAID.Y &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R8, SR_TID.Y &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R0, SR_CTAID.X &wr=0x4 ?trans1;
S2R R9, SR_TID.X &wr=0x4 ?trans1;
LEA R7, R7, R8, 0x4 &req={0} ?WAIT2_END_GROUP;
LEA R0, R0, R9, 0x4 &req={4} ?WAIT5_END_GROUP;
IMAD R5, R7, UR6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R2.64] &req={3} &rd=0x0 &wr=0x2 ?trans1;
MOV R4, 0x400 ?trans1;
IMAD R7, R0, UR7, R7 ?trans1;
S2R R5, SR_CgaCtaId &wr=0x1 ?trans3;
LEA R4, R5, R4, 0x18 &req={1} ?WAIT5_END_GROUP;
IMAD R4, R8, 0x44, R4 ?WAIT5_END_GROUP;
LEA R9, R9, R4, 0x2 ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R7, 0x4, R4 &req={0} ?trans1;
STS [R9], R6 &req={2} ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R11, [R9] &wr=0x0 ?trans4;
STG.E desc[UR4][R2.64], R11 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: transposeNoBankConflicts(float*, float*, int, int)
_Z24transposeNoBankConflictsPfS_ii:
s_load_b64 s[4:5], s[0:1], 0x10
v_and_b32_e32 v4, 0x3ff, v0
v_bfe_u32 v5, v0, 10, 10
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, s14, 4, v4
v_lshl_add_u32 v1, s15, 4, v5
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_load_b32 v6, v[2:3], off
v_lshlrev_b32_e32 v2, 2, v4
v_mad_u32_u24 v4, 0x44, v5, v2
v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
ds_store_b32 v4, v6
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
ds_load_b32 v4, v4
s_waitcnt lgkmcnt(0)
global_store_b32 v[0:1], v4, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| transposeNoBankConflicts | 671 | 748 | stackv2-00000-of-00015 |
// Demangled: Registers2SharedMem(float*, int)
Function : _Z19Registers2SharedMemPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R1, PT, PT, R1, -0x400, RZ &req={0} ?trans1;
HFMA2 R0, -RZ, RZ, 1.875, 0 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x1f0 ?trans2;
STL [R1], R0 &rd=0x0 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x2, UR4 &req={2} ?trans1;
IMAD R2, R3, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R2.reuse, UR4, PT ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT12_END_GROUP;
@P1 BRA 0x1e0 &req={0} ?trans5;
S2R R4, SR_CgaCtaId &wr=0x0 ?trans1;
LDC R6, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R3, 0x400 ?trans1;
MOV R5, R2 ?trans1;
IMAD R2, R6, UR5, RZ &req={1} ?WAIT3_END_GROUP;
LEA R3, R4, R3, 0x18 &req={0} ?trans1;
MOV R4, RZ ?WAIT7_END_GROUP;
IMAD R6, R4, 0x4, R1 &req={0} ?WAIT6_END_GROUP;
LDL R6, [R6] &wr=0x2 ?trans1;
IMAD R7, R5, 0x4, R3 ?trans1;
IADD3 R5, PT, PT, R2, R5, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R4.reuse, 0xff, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.LT.AND P2, PT, R5, UR4, PT ?trans1;
STS [R7], R6 &req={2} &rd=0x0 ?WAIT12_END_GROUP;
@!P1 BRA P2, 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 EXIT ?trans5;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
STG.E desc[UR4][R2.64], R0 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x240;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: Registers2SharedMem(float*, int)
_Z19Registers2SharedMemPfi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s5, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s4, 0xffff
s_ashr_i32 s4, s5, 2
v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
v_mov_b32_e32 v2, 1.0
s_mov_b32 s5, exec_lo
scratch_store_b32 off, v2, off offset:16
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB3_3
s_load_b32 s2, s[2:3], 0x0
s_mov_b32 s3, 0
s_mov_b32 s7, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s15, s15, s2
s_mul_i32 s2, s2, s6
v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
v_lshl_add_u32 v0, v1, 2, 0
v_mov_b32_e32 v3, 16
s_lshl_b32 s6, s2, 2
.LBB3_2:
scratch_load_b32 v4, v3, off
s_add_i32 s8, s7, 1
v_cmp_le_i32_e32 vcc_lo, s4, v2
s_cmpk_gt_u32 s7, 0xfe
v_add_nc_u32_e32 v2, s2, v2
s_cselect_b32 s7, -1, 0
v_add_nc_u32_e32 v3, 4, v3
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s7, exec_lo, s7
s_or_b32 s3, s7, s3
s_mov_b32 s7, s8
s_waitcnt vmcnt(0)
ds_store_b32 v0, v4
v_add_nc_u32_e32 v0, s6, v0
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB3_2
.LBB3_3:
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB3_5
s_load_b64 s[0:1], s[0:1], 0x0
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1.0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
.LBB3_5:
s_endpgm
| Registers2SharedMem | 860 | 821 | stackv2-00000-of-00015 |
// Demangled: SharedMem2Registers(float*, int)
Function : _Z19SharedMem2RegistersPfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R1, PT, PT, R1, -0x400, RZ &req={0} ?trans1;
HFMA2 R0, -RZ, RZ, 1.875, 0 ?trans1;
S2R R3, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x1 ?trans1;
BSSY.RECONVERGENT B0, 0x1f0 ?trans2;
STL [R1], R0 &rd=0x0 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x2, UR4 &req={2} ?trans1;
IMAD R2, R3, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R2.reuse, UR4, PT ?trans1;
ISETP.NE.AND P0, PT, R2, RZ, PT ?WAIT12_END_GROUP;
@P1 BRA 0x1e0 &req={0} ?trans5;
S2R R5, SR_CgaCtaId &wr=0x0 ?trans1;
LDC R6, c[0x0][0x370] &wr=0x1 ?trans1;
MOV R0, 0x400 ?trans1;
MOV R3, R2 ?trans1;
MOV R4, RZ ?WAIT3_END_GROUP;
LEA R2, R5, R0, 0x18 &req={0} ?trans1;
IMAD R0, R6, UR5, RZ &req={1} ?WAIT7_END_GROUP;
IMAD R5, R3, 0x4, R2 &req={0} ?trans1;
IADD3 R3, PT, PT, R0, R3, RZ ?trans1;
IMAD R6, R4.reuse, 0x4, R1 ?trans1;
ISETP.GE.U32.AND P1, PT, R4.reuse, 0xff, PT ?trans1;
IADD3 R4, PT, PT, R4, 0x1, RZ ?trans2;
LDS R5, [R5] &wr=0x0 ?trans1;
ISETP.LT.AND P2, PT, R3, UR4, PT ?WAIT3_END_GROUP;
STL [R6], R5 &req={0} &rd=0x0 ?trans10;
@!P1 BRA P2, 0x150 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 EXIT ?trans5;
LDL R5, [R1] &req={0} &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans2;
STG.E desc[UR4][R2.64], R5 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x250;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SharedMem2Registers(float*, int)
_Z19SharedMem2RegistersPfi:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b32 s5, s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s6, s4, 0xffff
s_ashr_i32 s4, s5, 2
v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
v_mov_b32_e32 v2, 1.0
s_mov_b32 s5, exec_lo
scratch_store_b32 off, v2, off offset:16
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB2_3
s_load_b32 s2, s[2:3], 0x0
s_mov_b32 s3, 0
s_mov_b32 s7, 0
s_waitcnt lgkmcnt(0)
s_add_i32 s15, s15, s2
s_mul_i32 s2, s2, s6
v_mad_u64_u32 v[2:3], null, s15, s6, v[0:1]
v_lshl_add_u32 v0, v1, 2, 0
v_mov_b32_e32 v3, 16
s_lshl_b32 s6, s2, 2
.LBB2_2:
ds_load_b32 v4, v0
s_add_i32 s8, s7, 1
v_cmp_le_i32_e32 vcc_lo, s4, v2
s_cmpk_gt_u32 s7, 0xfe
v_add_nc_u32_e32 v2, s2, v2
s_cselect_b32 s7, -1, 0
v_add_nc_u32_e32 v0, s6, v0
s_or_b32 s7, vcc_lo, s7
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s7, exec_lo, s7
s_or_b32 s3, s7, s3
s_mov_b32 s7, s8
s_waitcnt lgkmcnt(0)
scratch_store_b32 v3, v4, off
v_add_nc_u32_e32 v3, 4, v3
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB2_2
.LBB2_3:
s_or_b32 exec_lo, exec_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 s2, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB2_5
scratch_load_b32 v0, off, off offset:16
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v1, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
global_store_b32 v1, v0, s[0:1]
.LBB2_5:
s_endpgm
| SharedMem2Registers | 881 | 833 | stackv2-00000-of-00015 |
// Demangled: SharedMem2globalMem(float*, float*, int)
Function : _Z19SharedMem2globalMemPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R6, UR4, R3 &req={1} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x1 ?trans4;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 S2R R3, SR_CgaCtaId &wr=0x4 ?trans1;
@!P0 MOV R2, 0x400 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x2, UR4 &req={1} ?trans1;
@!P0 LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans5;
ISETP.GE.AND P1, PT, R0, UR4, PT ?trans1;
@!P0 LEA R2, R3, R2, 0x18 &req={4} ?trans1;
IMAD R3, R6, UR5, RZ &req={2} ?WAIT4_END_GROUP;
@!P0 LDS R7, [R2] &wr=0x3 ?trans4;
@!P0 STG.E desc[UR8][R4.64], R7 &req={3} &rd=0x1 ?trans3;
@P1 EXIT &req={0} ?trans5;
I2F.U32.RP R8, R3 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R3.reuse, R0, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R3, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R3, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x3f0 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, UR4, PT ?trans1;
VIMNMX.S32 R7, R2, UR4, !PT &req={1} ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R2, PT, PT, R7, -R2, -R6 ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R2, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R3, R4, R2 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P0 IADD3 R2, PT, PT, -R3, R2, RZ ?trans2;
@P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R5, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R6, R5, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3e0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R8, PT, PT, -R2, RZ, RZ ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R2, R0, UR5, 0x2 ?WAIT7_END_GROUP;
LDS R9, [R2] &req={0} &rd=0x0 &wr=0x2 ?trans1;
IMAD.WIDE R4, R0, 0x4, R6 &req={1} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
IADD3 R0, PT, PT, R3, R0, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IMAD R2, R3, 0x4, R2 &req={0} ?trans1;
STG.E desc[UR8][R4.64], R9 &req={2} &rd=0x0 ?trans11;
@P0 BRA 0x360 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x1 ?trans1;
UMOV UR5, 0x400 ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x380] &wr=0x2 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={1} ?WAIT12_END_GROUP;
LEA R2, R0.reuse, UR5, 0x2 ?trans1;
IMAD.WIDE R12, R0, 0x4, R10 &req={2,1} ?trans1;
IADD3 R0, PT, PT, R3, R0, R3 ?WAIT3_END_GROUP;
IMAD R14, R3.reuse, 0x4, R2 ?trans1;
LDS R15, [R2] &wr=0x1 ?trans1;
IMAD.WIDE R4, R3.reuse, 0x4, R12 &req={0} ?trans1;
IADD3 R0, PT, PT, R3.reuse, R0, R3 ?trans2;
LDS R17, [R14] &wr=0x0 ?trans1;
IMAD R16, R3.reuse, 0x4, R14 ?trans2;
IMAD.WIDE R6, R3.reuse, 0x4, R4 ?trans1;
ISETP.GE.AND P0, PT, R0, UR4, PT ?trans2;
LDS R19, [R16] &wr=0x2 ?trans1;
IMAD R18, R3, 0x4, R16 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R3, 0x4, R6 ?WAIT3_END_GROUP;
LDS R21, [R18] &wr=0x3 ?trans4;
STG.E desc[UR8][R12.64], R15 &req={1} &rd=0x1 ?trans4;
STG.E desc[UR8][R4.64], R17 &req={0} &rd=0x1 ?trans4;
STG.E desc[UR8][R6.64], R19 &req={2} &rd=0x1 ?trans4;
STG.E desc[UR8][R8.64], R21 &req={3} &rd=0x1 ?trans1;
@!P0 BRA 0x440 ?trans5;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: SharedMem2globalMem(float*, float*, int)
_Z19SharedMem2globalMemPfS_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s8, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB1_2
v_mov_b32_e32 v0, 0
ds_load_b32 v2, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v2, s[6:7]
.LBB1_2:
s_or_b32 exec_lo, exec_lo, s8
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_ashr_i32 s1, s0, 2
s_mov_b32 s0, exec_lo
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB1_5
v_ashrrev_i32_e32 v2, 31, v1
s_mul_i32 s2, s2, s3
v_lshl_add_u32 v0, v1, 2, 0
s_ashr_i32 s3, s2, 31
s_lshl_b32 s6, s2, 2
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_lshl_b64 s[4:5], s[2:3], 2
s_mov_b32 s3, 0
.LBB1_4:
ds_load_b32 v4, v0
v_add_nc_u32_e32 v1, s2, v1
v_add_nc_u32_e32 v0, s6, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_cmp_le_i32_e32 vcc_lo, s1, v1
s_or_b32 s3, vcc_lo, s3
s_waitcnt lgkmcnt(0)
global_store_b32 v[2:3], v4, off
v_add_co_u32 v2, s0, v2, s4
v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB1_4
.LBB1_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| SharedMem2globalMem | 2,256 | 840 | stackv2-00000-of-00015 |
// Demangled: bankConflictsRead(float*, int, int, int, long*)
Function : _Z17bankConflictsReadPfiiiPl
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xb0 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x2, UR4 &req={2} ?trans1;
IMAD R0, R0, UR5, RZ &req={1} ?WAIT11_END_GROUP;
ISETP.GE.AND P0, PT, R0.reuse, UR4, PT ?trans1;
MOV R2, R0 ?trans1;
IADD3 R0, PT, PT, R0, -UR4, RZ ?WAIT11_END_GROUP;
@P0 BRA 0x60 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.NE.AND P0, PT, R2, RZ, PT ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?WAIT12_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans2;
@!P0 STG.E desc[UR8][R2.64], RZ &req={1} &rd=0x1 ?trans1;
CS2UR UR6, SR_CLOCKLO ?WAIT5_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
CS2R R2, SR_CLOCKLO &req={1} ?WAIT5_END_GROUP;
@P0 EXIT ?trans5;
IADD.64 R2, R2, -UR6 ?trans2;
LDC.64 R4, c[0x0][0x398] &wr=0x1 ?trans4;
STG.E.64 desc[UR8][R4.64], R2 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x170;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bankConflictsRead(float*, int, int, int, long*)
_Z17bankConflictsReadPfiiiPl:
s_load_b64 s[2:3], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_ashr_i32 s2, s2, 2
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, v0, s3, s[2:3]
s_mov_b32 s3, 0
.LBB4_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v1, s2, v1
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_or_b32 s3, vcc_lo, s3
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB4_1
s_or_b32 exec_lo, exec_lo, s3
v_cmp_eq_u32_e32 vcc_lo, 0, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB4_4
s_load_b64 s[4:5], s[0:1], 0x0
v_mov_b32_e32 v0, 0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v0, s[4:5]
.LBB4_4:
s_or_b32 exec_lo, exec_lo, s2
s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_getreg_b32 s3, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB4_6
s_load_b64 s[0:1], s[0:1], 0x18
s_sub_u32 s2, s3, s2
s_subb_u32 s3, 0, 0
v_mov_b32_e32 v0, s2
v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3
s_waitcnt lgkmcnt(0)
global_store_b64 v2, v[0:1], s[0:1]
.LBB4_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bankConflictsRead | 565 | 640 | stackv2-00000-of-00015 |
// Demangled: globalMem2SharedMem(float*, float*, int)
Function : _Z19globalMem2SharedMemPfS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x370] &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans7;
LDC R6, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R6, UR4, R3 &req={1} ?trans1;
LDCU UR4, c[0x0][0x390] &wr=0x1 ?trans4;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT13_END_GROUP;
@!P0 S2R R3, SR_CgaCtaId &wr=0x4 ?trans1;
@!P0 MOV R2, 0x400 ?trans1;
USHF.R.S32.HI UR4, URZ, 0x2, UR4 &req={1} ?trans1;
@!P0 LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans5;
ISETP.GE.AND P1, PT, R0, UR4, PT ?trans1;
@!P0 LEA R2, R3, R2, 0x18 &req={4} ?trans1;
IMAD R3, R6, UR5, RZ &req={2} ?WAIT4_END_GROUP;
@!P0 LDS R7, [R2] &wr=0x3 ?trans4;
@!P0 STG.E desc[UR8][R4.64], R7 &req={3} &rd=0x1 ?trans3;
@P1 EXIT &req={0} ?trans5;
I2F.U32.RP R8, R3 &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R3.reuse, R0, RZ ?trans2;
IADD3 R9, PT, PT, RZ, -R3, RZ ?trans1;
ISETP.NE.U32.AND P2, PT, R3, RZ, PT ?trans1;
BSSY.RECONVERGENT B0, 0x3f0 ?trans1;
ISETP.GE.AND P0, PT, R2.reuse, UR4, PT ?trans1;
VIMNMX.S32 R7, R2, UR4, !PT &req={1} ?WAIT4_END_GROUP;
SEL R6, RZ, 0x1, P0 ?trans1;
MUFU.RCP R8, R8 &req={0} &wr=0x0 ?trans4;
IADD3 R2, PT, PT, R7, -R2, -R6 ?trans2;
IADD3 R4, PT, PT, R8, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={0} ?trans2;
IMAD R9, R9, R5, RZ &req={1} ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R9, R4 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R5, R2, RZ ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R2, R3, R4, R2 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P0 IADD3 R2, PT, PT, -R3, R2, RZ ?trans2;
@P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R2, R3, PT ?WAIT13_END_GROUP;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans2;
@!P2 LOP3.LUT R5, RZ, R3, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R5, PT, PT, R6, R5, RZ ?WAIT4_END_GROUP;
IADD3 R2, PT, PT, R5.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R2, R2, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x3e0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?trans1;
IADD3 R8, PT, PT, -R2, RZ, RZ ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT6_END_GROUP;
LEA R2, R0, UR5, 0x2 ?WAIT7_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R6 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR8][R4.64] &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans2;
IADD3 R0, PT, PT, R3, R0, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
STS [R2], R5 &req={2} &rd=0x0 ?trans2;
IMAD R2, R3, 0x4, R2 &req={0} ?WAIT10_END_GROUP;
@P0 BRA 0x360 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR5, 0x400 ?WAIT7_END_GROUP;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?WAIT12_END_GROUP;
IMAD.WIDE R12, R0, 0x4, R10 &req={1,0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R3.reuse, 0x4, R12 ?trans2;
LDG.E R12, desc[UR8][R12.64] &wr=0x2 ?trans2;
IMAD.WIDE R6, R3.reuse, 0x4, R4 ?trans2;
LDG.E R4, desc[UR8][R4.64] &wr=0x3 ?trans2;
IMAD.WIDE R8, R3, 0x4, R6 ?trans2;
LDG.E R6, desc[UR8][R6.64] &wr=0x4 ?trans4;
LDG.E R8, desc[UR8][R8.64] &wr=0x5 ?trans1;
LEA R2, R0, UR5, 0x2 ?WAIT5_END_GROUP;
IMAD R14, R3, 0x4, R2 ?WAIT4_END_GROUP;
IMAD R15, R3.reuse, 0x4, R14 ?trans1;
IADD3 R0, PT, PT, R3, R0, R3 ?WAIT3_END_GROUP;
IMAD R17, R3.reuse, 0x4, R15 ?trans1;
IADD3 R0, PT, PT, R3, R0, R3 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR4, PT ?trans1;
STS [R2], R12 &req={2} &rd=0x0 ?trans4;
STS [R14], R4 &req={3} &rd=0x0 ?trans4;
STS [R15], R6 &req={4} &rd=0x0 ?trans4;
STS [R17], R8 &req={5} &rd=0x0 ?trans1;
@!P0 BRA 0x440 ?trans5;
EXIT ?trans5;
BRA 0x590;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: globalMem2SharedMem(float*, float*, int)
_Z19globalMem2SharedMemPfS_i:
s_clause 0x2
s_load_b32 s3, s[0:1], 0x24
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b32 s2, s[0:1], 0x18
s_mov_b32 s8, exec_lo
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s3, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v0, 0
ds_load_b32 v2, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v2, s[6:7]
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s8
s_load_b32 s0, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_ashr_i32 s1, s0, 2
s_mov_b32 s0, exec_lo
v_cmpx_gt_i32_e64 s1, v1
s_cbranch_execz .LBB0_5
v_ashrrev_i32_e32 v2, 31, v1
s_mul_i32 s2, s2, s3
v_lshl_add_u32 v0, v1, 2, 0
s_ashr_i32 s3, s2, 31
s_lshl_b32 s6, s2, 2
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_lshl_b64 s[4:5], s[2:3], 2
s_mov_b32 s3, 0
.LBB0_4:
global_load_b32 v4, v[2:3], off
v_add_nc_u32_e32 v1, s2, v1
v_add_co_u32 v2, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_le_i32_e64 s0, s1, v1
s_or_b32 s3, s0, s3
s_waitcnt vmcnt(0)
ds_store_b32 v0, v4
v_add_nc_u32_e32 v0, s6, v0
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| globalMem2SharedMem | 2,233 | 837 | stackv2-00000-of-00015 |
// Demangled: partition(int*, int*, int*, int)
Function : _Z9partitionPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans6;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans8;
LDC.64 R4, c[0x4][RZ] &wr=0x2 ?trans1;
LDCU UR7, c[0x0][0x398] &wr=0x3 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
STG.E desc[UR4][R4.64], RZ &req={2} &rd=0x2 ?trans1;
IMAD R3, R3, UR6, R0 &req={1} ?WAIT6_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GE.AND P0, PT, R3, UR7, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={2,0} ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R10, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE R6, R3, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE R8, R3, 0x4, R8 &req={1} ?WAIT5_END_GROUP;
LDG.E R5, desc[UR4][R8.64] &wr=0x3 ?trans1;
BSSY.RECONVERGENT B0, 0x5e0 ?trans1;
ISETP.GE.AND P0, PT, R5.reuse, R0, PT &req={3} ?trans1;
IADD3 R4, PT, PT, R5, -0x1, RZ ?trans1;
IMAD.WIDE R2, R0, 0x4, R10 &req={2} ?WAIT11_END_GROUP;
@P0 BRA 0x5d0 ?trans5;
LDG.E R6, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R7, PT, PT, R0.reuse, -R5.reuse, RZ ?trans2;
IADD3 R9, PT, PT, -R0, R5, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x310 ?trans1;
LOP3.LUT P1, R8, R7, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, -0x4, PT ?trans1;
MOV R7, R5 ?WAIT9_END_GROUP;
@!P1 BRA 0x300 &req={0} ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R14, PT, PT, -R8, RZ, RZ ?trans1;
MOV R7, R5 ?WAIT7_END_GROUP;
IMAD.WIDE R12, R7, 0x4, R10 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR4][R12.64] &wr=0x2 ?trans2;
ISETP.GT.AND P1, PT, R19, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@!P1 IMAD.WIDE R8, R4, 0x4, R10 ?WAIT5_END_GROUP;
@!P1 LDG.E R17, desc[UR4][R8.64+0x4] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R14, 0x1, RZ ?trans2;
@!P1 IADD3 R15, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R7, 0x1, RZ ?trans1;
@!P1 STG.E desc[UR4][R8.64+0x4], R19 &rd=0x1 ?trans1;
ISETP.NE.AND P2, PT, R14, RZ, PT ?trans1;
@!P1 MOV R4, R15 ?trans2;
@!P1 STG.E desc[UR4][R12.64], R17 &req={2} &rd=0x1 ?trans10;
@P2 BRA 0x230 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
@P0 BRA 0x5d0 ?trans5;
IADD.64 R8, R10, 0x8 &req={1} ?WAIT3_END_GROUP;
IADD3 R12, PT, PT, -R0, R7, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR4][R10.64+-0x8] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R21, R6, PT &req={5,2} ?WAIT13_END_GROUP;
@!P0 LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE R14, R4, 0x4, R14 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R13, desc[UR4][R14.64+0x4] &wr=0x2 ?trans4;
@!P0 STG.E desc[UR4][R14.64+0x4], R21 &rd=0x0 ?trans4;
LDG.E R23, desc[UR4][R10.64+-0x4] &wr=0x3 ?trans1;
@!P0 IADD3 R18, PT, PT, R4, 0x1, RZ ?WAIT5_END_GROUP;
@!P0 MOV R4, R18 ?trans1;
@!P0 STG.E desc[UR4][R10.64+-0x8], R13 &req={2} &rd=0x1 ?trans1;
ISETP.GT.AND P1, PT, R23, R6, PT &req={3} ?WAIT13_END_GROUP;
@!P1 LDC.64 R16, c[0x0][0x380] &wr=0x2 ?trans2;
@!P1 IMAD.WIDE R16, R4, 0x4, R16 &req={2} ?WAIT5_END_GROUP;
@!P1 LDG.E R19, desc[UR4][R16.64+0x4] &wr=0x2 ?trans4;
@!P1 STG.E desc[UR4][R16.64+0x4], R23 &rd=0x3 ?trans4;
LDG.E R25, desc[UR4][R10.64] &wr=0x4 ?trans1;
@!P1 IADD3 R18, PT, PT, R4, 0x1, RZ ?WAIT5_END_GROUP;
@!P1 MOV R4, R18 ?trans1;
@!P1 STG.E desc[UR4][R10.64+-0x4], R19 &req={2} ?trans1;
ISETP.GT.AND P0, PT, R25, R6, PT &req={4} ?WAIT13_END_GROUP;
@!P0 LDC.64 R14, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
@!P0 IMAD.WIDE R14, R4, 0x4, R14 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R21, desc[UR4][R14.64+0x4] &wr=0x2 ?trans4;
@!P0 STG.E desc[UR4][R14.64+0x4], R25 &rd=0x0 ?trans4;
LDG.E R27, desc[UR4][R10.64+0x4] &wr=0x4 ?trans1;
@!P0 IADD3 R13, PT, PT, R4, 0x1, RZ &req={1} ?WAIT5_END_GROUP;
@!P0 MOV R4, R13 ?trans1;
@!P0 STG.E desc[UR4][R10.64], R21 &req={2} &rd=0x2 ?trans1;
ISETP.GT.AND P1, PT, R27, R6, PT &req={4} ?WAIT13_END_GROUP;
@!P1 LDC.64 R16, c[0x0][0x380] &req={3} &wr=0x1 ?trans2;
@!P1 IMAD.WIDE R16, R4, 0x4, R16 &req={1} ?WAIT5_END_GROUP;
@!P1 LDG.E R13, desc[UR4][R16.64+0x4] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?trans2;
@!P1 IADD3 R14, PT, PT, R4, 0x1, RZ &req={0} ?trans2;
IADD3 R7, PT, PT, R7, 0x4, RZ ?trans1;
@!P1 STG.E desc[UR4][R16.64+0x4], R27 &rd=0x2 ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
@!P1 MOV R4, R14 ?trans2;
@!P1 STG.E desc[UR4][R10.64+0x4], R13 &req={3} &rd=0x2 ?trans10;
@P0 BRA 0x340 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R8, c[0x0][0x380] &req={1} &wr=0x0 ?trans1;
LDG.E R13, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE R8, R4, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R8.64+0x4] &wr=0x3 ?trans1;
ISETP.GT.AND P0, PT, R4.reuse, R5, PT ?trans1;
IADD3 R7, PT, PT, R4, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x7c0 ?trans4;
ISETP.GE.AND P1, PT, R7, R0, PT ?trans1;
STG.E desc[UR4][R8.64+0x4], R13 &req={2} &rd=0x0 ?trans4;
STG.E desc[UR4][R2.64], R11 &req={3} &rd=0x0 ?trans2;
@!P0 BRA 0x7b0 ?trans6;
S2R R3, SR_LANEID &req={0} &wr=0x0 ?trans1;
VOTEU.ANY UR6, UPT, PT ?trans1;
LDC.64 R10, c[0x4][RZ] &wr=0x1 ?trans1;
FLO.U32 R6, UR6 &req={5} &wr=0x0 ?trans1;
POPC R15, UR6 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R6, R3, PT &req={0} ?trans1;
S2R R8, SR_LTMASK &wr=0x0 ?trans4;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans8;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R11, desc[UR4][R10.64], R15 &req={1} &wr=0x3 ?trans1;
LOP3.LUT R12, R8, UR6, RZ, 0xc0, !PT &req={0} ?WAIT2_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x0 ?trans4;
POPC R12, R12 &wr=0x1 ?trans1;
SHFL.IDX PT, R13, R11, R6, 0x1f &req={3} &wr=0x1 ?trans2;
IADD3 R13, PT, PT, R13, R12, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE R2, R13, 0x4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R8, R13, 0x4, R8 &req={0} ?trans1;
STG.E desc[UR4][R2.64], R5 &rd=0x1 ?trans4;
STG.E desc[UR4][R8.64], R4 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P1 EXIT ?trans5;
S2R R3, SR_LANEID &req={1,0} &wr=0x0 ?trans1;
VOTEU.ANY UR6, UPT, PT ?trans1;
LDC.64 R8, c[0x4][RZ] &wr=0x1 ?trans1;
FLO.U32 R6, UR6 &req={5} &wr=0x0 ?trans1;
S2R R10, SR_LTMASK &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x390] &wr=0x3 ?trans1;
POPC R13, UR6 &wr=0x1 ?trans1;
ISETP.EQ.U32.AND P0, PT, R6, R3, PT &req={0} ?WAIT6_END_GROUP;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans7;
@P0 ATOMG.E.ADD.STRONG.GPU PT, R9, desc[UR4][R8.64], R13 &req={1} &wr=0x4 ?trans1;
LOP3.LUT R10, R10, UR6, RZ, 0xc0, !PT &req={2} ?WAIT6_END_GROUP;
POPC R10, R10 &wr=0x1 ?trans1;
SHFL.IDX PT, R11, R9, R6, 0x1f &req={4} &wr=0x1 ?trans2;
IADD3 R11, PT, PT, R11, R10, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE R2, R11, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R4 &req={3} ?trans1;
STG.E desc[UR4][R2.64], R7 ?trans4;
STG.E desc[UR4][R4.64], R0 ?trans1;
EXIT ?trans5;
BRA 0x900;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: partition(int*, int*, int*, int)
_Z9partitionPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v0, 0
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, d_size@rel32@lo+4
s_addc_u32 s3, s3, d_size@rel32@hi+12
global_store_b32 v0, v0, s[2:3]
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_15
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s2, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
global_load_b32 v0, v[0:1], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[0:1]
global_load_b32 v1, v[2:3], off
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
global_load_b32 v9, v[5:6], off
s_waitcnt vmcnt(1)
v_add_nc_u32_e32 v3, -1, v1
v_cmpx_lt_i32_e64 v1, v0
s_cbranch_execz .LBB0_7
v_ashrrev_i32_e32 v2, 31, v1
s_add_u32 s8, s4, 4
s_addc_u32 s10, s5, 0
s_mov_b32 s9, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_mov_b32_e32 v2, v1
v_add_co_u32 v7, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
.LBB0_3:
global_load_b32 v10, v[7:8], off
s_mov_b32 s0, exec_lo
s_waitcnt vmcnt(0)
v_cmpx_le_i32_e64 v10, v9
s_cbranch_execz .LBB0_5
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[11:12], 2, v[3:4]
v_add_nc_u32_e32 v3, 1, v3
v_add_co_u32 v11, vcc_lo, s8, v11
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v12, vcc_lo, s10, v12, vcc_lo
global_load_b32 v4, v[11:12], off
global_store_b32 v[11:12], v10, off
s_waitcnt vmcnt(0)
global_store_b32 v[7:8], v4, off
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v2, 1, v2
v_add_co_u32 v7, s0, v7, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
v_cmp_ge_i32_e32 vcc_lo, v2, v0
s_or_b32 s9, vcc_lo, s9
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s9
s_cbranch_execnz .LBB0_3
s_or_b32 exec_lo, exec_lo, s9
global_load_b32 v9, v[5:6], off
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s0, exec_lo
v_lshlrev_b64 v[7:8], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v7, vcc_lo, s4, v7
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v2, v[7:8], off offset:4
s_waitcnt vmcnt(1)
global_store_b32 v[7:8], v9, off offset:4
s_waitcnt vmcnt(0)
global_store_b32 v[5:6], v2, off
v_cmpx_gt_i32_e64 v3, v1
s_cbranch_execz .LBB0_11
s_mov_b32 s4, exec_lo
s_mov_b32 s1, exec_lo
v_mbcnt_lo_u32_b32 v2, s4, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB0_10
s_bcnt1_i32_b32 s8, s4
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, s8
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, d_size@rel32@lo+4
s_addc_u32 s5, s5, d_size@rel32@hi+12
global_atomic_add_u32 v4, v4, v5, s[4:5] glc
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s1
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s1, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v4, s1, v2
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v6, vcc_lo, s6, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
v_add_co_u32 v4, vcc_lo, s2, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
global_store_b32 v[6:7], v1, off
global_store_b32 v[4:5], v3, off
.LBB0_11:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v1, 2, v3
s_delay_alu instid0(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, v1, v0
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_15
s_mov_b32 s1, exec_lo
s_mov_b32 s0, exec_lo
v_mbcnt_lo_u32_b32 v2, s1, 0
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB0_14
s_bcnt1_i32_b32 s1, s1
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, s1
s_getpc_b64 s[4:5]
s_add_u32 s4, s4, d_size@rel32@lo+4
s_addc_u32 s5, s5, d_size@rel32@hi+12
global_atomic_add_u32 v3, v3, v4, s[4:5] glc
.LBB0_14:
s_or_b32 exec_lo, exec_lo, s0
s_waitcnt vmcnt(0)
v_readfirstlane_b32 s0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v2, s0, v2
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[2:3]
v_add_co_u32 v4, vcc_lo, s6, v2
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b32 v[4:5], v1, off
global_store_b32 v[2:3], v0, off
.LBB0_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| partition | 4,025 | 2,947 | stackv2-00000-of-00015 |
// Demangled: vectorAdd(float const*, float const*, float*, int)
Function : _Z9vectorAddPKfS0_Pfi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R9, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans1;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorAdd(float const*, float const*, float*, int)
_Z9vectorAddPKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorAdd | 569 | 577 | stackv2-00000-of-00015 |
// Demangled: matrixMultiply(float*, float*, float*, int, int, int, int, int, int)
Function : _Z14matrixMultiplyPfS_S_iiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R18, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R0, SR_CTAID.Y &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
S2R R17, SR_TID.Y &wr=0x2 ?trans1;
S2R R7, SR_CTAID.X &wr=0x4 ?trans1;
S2R R19, SR_TID.X &wr=0x4 ?trans1;
ISETP.GE.AND P0, PT, R18, -0xe, PT &req={1} ?trans1;
IMAD R0, R0, 0x10, R17 &req={2} ?WAIT2_END_GROUP;
IMAD R16, R7, 0x10, R19 &req={4} ?WAIT10_END_GROUP;
@!P0 BRA 0x5c0 &req={3,0} ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x3a4] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R18, -0x1, RZ ?trans1;
MOV R9, RZ ?trans1;
IMAD R18, R0, R18, R19 ?trans1;
UMOV UR4, 0x400 ?trans1;
LDCU.64 UR10, c[0x0][0x398] &wr=0x2 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans1;
LDC.64 R2, c[0x0][0x3a0] &wr=0x3 ?trans3;
LEA.HI R5, R5, R4, RZ, 0x4 ?WAIT4_END_GROUP;
SHF.R.S32.HI R5, RZ, 0x4, R5 ?trans1;
IMAD R26, R17, UR7, R19 &req={1} ?WAIT3_END_GROUP;
IADD3 R23, PT, PT, -R5, RZ, RZ ?trans1;
ULEA UR6, UR5, UR4, 0x18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x400, URZ ?trans1;
LEA R26, R7, R26, 0x4 ?WAIT3_END_GROUP;
ULEA UR4, UR5, UR4, 0x18 ?trans1;
LEA R22, R17, UR6, 0x6 ?WAIT5_END_GROUP;
LEA R24, R19.reuse, UR4, 0x2 ?trans1;
IMAD R21, R19, 0x4, R22 ?WAIT3_END_GROUP;
LEA R20, R17, R24, 0x6 &req={2} ?WAIT7_END_GROUP;
ISETP.GE.AND P1, PT, R19, UR11, PT ?trans1;
ISETP.GE.AND P0, PT, R17, R2, PT &req={3} ?trans1;
MOV R8, RZ ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 ?trans2;
ISETP.GE.OR P1, PT, R0, UR10, P1 ?trans1;
ISETP.GE.OR P0, PT, R16, R3, P0 ?WAIT12_END_GROUP;
@!P1 LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans8;
@!P0 LDC.64 R10, c[0x0][0x388] &wr=0x1 ?trans1;
@!P1 IMAD.WIDE R4, R18, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
@!P1 LDG.E R8, desc[UR8][R4.64] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE R10, R26, 0x4, R10 &req={1} ?WAIT5_END_GROUP;
@!P0 LDG.E R27, desc[UR8][R10.64] &wr=0x3 ?trans1;
IADD3 R23, PT, PT, R23, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R23, 0x1, PT ?trans1;
IADD3 R17, PT, PT, R17, 0x10, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x10, RZ ?trans2;
IADD3 R18, PT, PT, R18, 0x10, RZ ?trans2;
LEA R26, R3, R26, 0x4 ?trans1;
STS [R21], R8 &req={2} ?trans4;
STS [R20], R27 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R28, [R24] ?trans4;
LDS.128 R12, [R22] &wr=0x0 ?trans4;
LDS R31, [R24+0x40] &wr=0x1 ?trans4;
LDS R30, [R24+0x80] &wr=0x2 ?trans4;
LDS R34, [R24+0xc0] &wr=0x3 ?trans4;
LDS R29, [R24+0x100] ?trans4;
LDS.128 R4, [R22+0x10] &wr=0x4 ?trans4;
LDS R32, [R24+0x140] &wr=0x5 ?trans4;
LDS R25, [R24+0x180] &wr=0x5 ?trans4;
LDS R27, [R24+0x200] ?trans1;
FFMA R12, R12, R28, R9 &req={0} ?WAIT3_END_GROUP;
LDS R28, [R24+0x1c0] &wr=0x0 ?trans1;
FFMA R13, R31, R13, R12 &req={1} ?WAIT3_END_GROUP;
LDS.128 R8, [R22+0x20] &wr=0x1 ?trans1;
FFMA R13, R30, R14, R13 &req={2} ?WAIT3_END_GROUP;
LDS R30, [R24+0x240] &wr=0x2 ?trans1;
FFMA R13, R34, R15, R13 &req={3} ?WAIT3_END_GROUP;
LDS R31, [R24+0x280] &wr=0x3 ?trans1;
FFMA R13, R4, R29, R13 &req={4} ?WAIT3_END_GROUP;
LDS R4, [R24+0x2c0] &wr=0x4 ?trans1;
FFMA R34, R32, R5, R13 &req={5} ?WAIT3_END_GROUP;
LDS R5, [R24+0x300] ?trans4;
LDS.128 R12, [R22+0x30] &wr=0x5 ?trans1;
FFMA R29, R25, R6, R34 ?WAIT3_END_GROUP;
LDS R32, [R24+0x340] &wr=0x5 ?trans4;
LDS R25, [R24+0x380] &wr=0x5 ?trans4;
LDS R6, [R24+0x3c0] &wr=0x5 ?trans1;
FFMA R7, R28, R7, R29 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R8, R27, R7 &req={1} ?WAIT4_END_GROUP;
FFMA R30, R30, R9, R7 &req={2} ?WAIT4_END_GROUP;
FFMA R31, R31, R10, R30 &req={3} ?WAIT4_END_GROUP;
FFMA R11, R4, R11, R31 &req={4} ?WAIT4_END_GROUP;
FFMA R5, R12, R5, R11 &req={5} ?WAIT4_END_GROUP;
FFMA R32, R32, R13, R5 ?WAIT4_END_GROUP;
FFMA R25, R25, R14, R32 ?WAIT4_END_GROUP;
FFMA R9, R6, R15, R25 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x210 ?trans5;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R16, UR5, PT &req={0} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR4, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R5, R0, UR5, R16 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x650;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMultiply(float*, float*, float*, int, int, int, int, int, int)
_Z14matrixMultiplyPfS_S_iiiiii:
s_clause 0x3
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_load_b64 s[12:13], s[0:1], 0x28
v_bfe_u32 v2, v0, 10, 10
v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v1, s15, 4, v2
v_lshl_add_u32 v0, s14, 4, v3
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s5, -14
s_cbranch_scc1 .LBB0_14
v_lshlrev_b32_e32 v4, 2, v3
s_add_i32 s0, s5, -1
v_lshlrev_b32_e32 v5, 6, v2
s_ashr_i32 s1, s0, 31
v_mul_lo_u32 v8, v1, s5
v_add_nc_u32_e32 v6, 0x400, v4
s_lshr_b32 s1, s1, 28
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_add_i32 s1, s0, s1
v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, v5, v4
v_cmp_gt_i32_e64 s0, s7, v0
v_add_nc_u32_e32 v9, v6, v5
s_ashr_i32 s4, s1, 4
s_mov_b32 s14, 0
.LBB0_2:
v_mov_b32_e32 v10, 0
s_and_saveexec_b32 s15, vcc_lo
s_cbranch_execz .LBB0_6
v_lshl_add_u32 v11, s14, 4, v3
v_mov_b32_e32 v10, 0
s_mov_b32 s16, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_i32_e64 s5, v11
s_cbranch_execz .LBB0_5
v_add_nc_u32_e32 v10, v11, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v11, 31, v10
v_lshlrev_b64 v[10:11], 2, v[10:11]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s8, v10
v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
global_load_b32 v10, v[10:11], off
.LBB0_5:
s_or_b32 exec_lo, exec_lo, s16
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s15
v_mov_b32_e32 v11, 0
s_waitcnt vmcnt(0)
ds_store_b32 v7, v10
s_and_saveexec_b32 s15, s0
s_cbranch_execz .LBB0_10
v_lshl_add_u32 v10, s14, 4, v2
v_mov_b32_e32 v11, 0
s_mov_b32 s16, exec_lo
s_delay_alu instid0(VALU_DEP_2)
v_cmpx_gt_i32_e64 s6, v10
s_cbranch_execz .LBB0_9
v_mad_u64_u32 v[11:12], null, v10, s7, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v12, 31, v11
v_lshlrev_b64 v[10:11], 2, v[11:12]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v10, s1, s10, v10
v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
global_load_b32 v11, v[10:11], off
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s16
.LBB0_10:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s15
v_mov_b32_e32 v10, v6
s_mov_b32 s1, 0
s_waitcnt vmcnt(0)
ds_store_b32 v9, v11
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_11:
v_add_nc_u32_e32 v11, s1, v5
s_add_i32 s1, s1, 4
ds_load_b32 v12, v10
ds_load_b32 v11, v11
v_add_nc_u32_e32 v10, 64, v10
s_cmp_eq_u32 s1, 64
s_waitcnt lgkmcnt(0)
v_fmac_f32_e32 v4, v11, v12
s_cbranch_scc0 .LBB0_11
s_add_i32 s1, s14, 1
s_cmp_eq_u32 s14, s4
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_14
s_mov_b32 s14, s1
s_branch .LBB0_2
.LBB0_14:
v_cmp_gt_i32_e32 vcc_lo, s12, v1
v_cmp_gt_i32_e64 s0, s13, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_16
v_mad_u64_u32 v[2:3], null, v1, s13, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB0_16:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMultiply | 2,561 | 1,993 | stackv2-00000-of-00015 |
// Demangled: foo(int*)
Function : _Z3fooPi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R9, -RZ, RZ, 0, 5.9604644775390625e-08 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 &req={1} ?trans4;
STG.E desc[UR4][R2.64+0x4], R9 ?trans1;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], RZ ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo(int*)
_Z3fooPi:
s_load_b64 s[0:1], s[0:1], 0x0
v_dual_mov_b32 v1, 1 :: v_dual_lshlrev_b32 v0, 2, v0
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v1
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b64 v3, v[1:2], s[0:1]
global_store_b32 v0, v3, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| foo | 344 | 174 | stackv2-00000-of-00015 |
// Demangled: kernel(float*, float*, int*, int*)
Function : _Z6kernelPfS_PiS0_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x398] &wr=0x2 ?trans1;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans4;
LDG.E R7, desc[UR4][R4.64] &req={2} &wr=0x3 ?trans3;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R9, UR6, R0 &req={1} ?WAIT2_END_GROUP;
IMAD R9, R2, R7, RZ &req={3} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R9, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R0, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R8, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R9, desc[UR4][R2.64+-0x4] &wr=0x3 ?trans1;
IMAD.WIDE R4, R7, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R11, desc[UR4][R4.64] &wr=0x4 ?trans1;
IADD3 R7, PT, PT, -R7, RZ, RZ ?WAIT3_END_GROUP;
LDG.E R13, desc[UR4][R4.64+0x4] &wr=0x5 ?trans2;
IMAD.WIDE R6, R7, 0x4, R2 ?trans2;
LDG.E R14, desc[UR4][R4.64+-0x4] &rd=0x0 &wr=0x3 ?trans4;
LDG.E R12, desc[UR4][R6.64] &wr=0x3 ?trans4;
LDG.E R15, desc[UR4][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R16, desc[UR4][R6.64+-0x4] &rd=0x1 &wr=0x4 ?trans1;
FADD R8, RZ, R8 &req={2} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R8, R8 &wr=0x2 ?trans2;
I2FP.F32.S32 R10, R8 &req={2} ?WAIT5_END_GROUP;
FADD R9, R9, R10 &req={3} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R9, R9 &wr=0x2 ?trans2;
I2FP.F32.S32 R10, R9 &req={2} ?WAIT5_END_GROUP;
FADD R10, R11, R10 &req={4} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R10, R10 &wr=0x0 ?trans2;
I2FP.F32.S32 R5, R10 &req={0} ?WAIT5_END_GROUP;
FADD R5, R12, R5 ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R5, R5 &wr=0x0 ?trans2;
I2FP.F32.S32 R4, R5 &req={0} ?WAIT5_END_GROUP;
FADD R4, R13, R4 &req={5} ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R4, R4 &wr=0x1 ?trans2;
I2FP.F32.S32 R7, R4 &req={1} ?WAIT5_END_GROUP;
FADD R7, R14, R7 ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R7, R7 &wr=0x0 ?trans2;
I2FP.F32.S32 R6, R7 &req={0} ?WAIT5_END_GROUP;
FADD R6, R15, R6 ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R6, R6 &wr=0x0 ?trans2;
I2FP.F32.S32 R9, R6 &req={0} ?WAIT5_END_GROUP;
FADD R9, R16, R9 ?WAIT6_END_GROUP;
F2I.TRUNC.NTZ R9, R9 &wr=0x0 ?trans2;
ISETP.NE.AND P0, PT, R9, 0x2, PT &req={0} ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R0 ?WAIT12_END_GROUP;
@!P0 BRA 0x400 ?trans5;
ISETP.NE.AND P0, PT, R9, 0x3, PT ?WAIT13_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
@!P0 MOV R7, 0x3f800000 ?trans1;
@!P0 LEA R2, P1, R0, R2, 0x2 &req={0} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R3, R0, R3, R5, 0x2, P1 ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R2.64], R7 &rd=0x0 ?trans1;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x1 ?trans2;
LEA R2, P0, R0, UR6, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR7, R5, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], RZ ?trans1;
EXIT ?trans5;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
FSETP.NEU.AND P0, PT, R2, 1, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans2;
LEA R2, P0, R0, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R0, UR7, R5, 0x2, P0 ?trans1;
HFMA2 R5, -RZ, RZ, 1.875, 0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x490;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: kernel(float*, float*, int*, int*)
_Z6kernelPfS_PiS0_:
s_clause 0x1
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s1, s[0:1], 0x2c
s_waitcnt lgkmcnt(0)
s_load_b32 s2, s[8:9], 0x0
s_load_b32 s0, s[10:11], 0x0
s_and_b32 s1, s1, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
s_waitcnt lgkmcnt(0)
s_mul_i32 s1, s0, s2
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s1, v1
s_and_saveexec_b32 s1, vcc_lo
s_cbranch_execz .LBB0_11
v_ashrrev_i32_e32 v2, 31, v1
s_ashr_i32 s1, s0, 31
s_mov_b32 s2, 0
s_lshl_b64 s[0:1], s[0:1], 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
s_mov_b32 s4, exec_lo
v_add_co_u32 v4, vcc_lo, v2, s0
global_load_b32 v10, v[2:3], off offset:4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
v_sub_co_u32 v7, vcc_lo, v2, s0
v_subrev_co_ci_u32_e32 v8, vcc_lo, s1, v3, vcc_lo
s_clause 0x2
global_load_b96 v[4:6], v[4:5], off offset:-4
global_load_b96 v[7:9], v[7:8], off offset:-4
global_load_b32 v11, v[2:3], off offset:-4
s_mov_b32 s1, 0
s_mov_b32 s0, 0
s_waitcnt vmcnt(3)
v_add_f32_e32 v10, 0, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v10, v10
v_cvt_f32_i32_e32 v10, v10
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v10, v11, v10
v_cvt_i32_f32_e32 v10, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v10, v10
v_add_f32_e32 v5, v5, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v5, v5
v_cvt_f32_i32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v5, v8, v5
v_cvt_i32_f32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v5, v5
v_add_f32_e32 v5, v6, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v5, v5
v_cvt_f32_i32_e32 v5, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v4, v5
v_cvt_i32_f32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_i32_e32 v4, v4
v_add_f32_e32 v4, v9, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_i32_f32_e32 v4, v4
v_cvt_f32_i32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_f32_e32 v4, v7, v4
v_cvt_i32_f32_e32 v4, v4
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_lt_i32_e32 2, v4
s_xor_b32 s4, exec_lo, s4
v_cmp_ne_u32_e32 vcc_lo, 3, v4
s_mov_b32 s0, exec_lo
s_mov_b32 s3, 1.0
s_and_b32 s2, vcc_lo, exec_lo
s_and_not1_saveexec_b32 s4, s4
v_cmp_ne_u32_e32 vcc_lo, 2, v4
s_and_not1_b32 s2, s2, exec_lo
s_mov_b32 s1, exec_lo
s_and_b32 s5, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s2, s2, s5
s_or_b32 exec_lo, exec_lo, s4
v_mov_b32_e32 v4, s3
s_and_saveexec_b32 s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s3
v_mov_b32_e32 v4, 0
s_or_b32 s0, s0, exec_lo
s_and_not1_b32 s1, s1, exec_lo
s_or_b32 exec_lo, exec_lo, s2
s_and_saveexec_b32 s2, s1
s_cbranch_execz .LBB0_9
global_load_b32 v2, v[2:3], off
v_mov_b32_e32 v4, 1.0
s_and_not1_b32 s0, s0, exec_lo
s_waitcnt vmcnt(0)
v_cmp_eq_f32_e32 vcc_lo, 1.0, v2
s_and_b32 s1, vcc_lo, exec_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 s0, s0, s1
.LBB0_9:
s_or_b32 exec_lo, exec_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_11
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v4, off
.LBB0_11:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| kernel | 1,895 | 2,125 | stackv2-00000-of-00015 |
// Demangled: foo()
Function : _Z3foov
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: foo()
_Z3foov:
s_endpgm
| foo | 91 | 11 | stackv2-00000-of-00015 |
// Demangled: MatrixMul(float*, float*, float*, int)
Function : _Z9MatrixMulPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={2,0} ?trans5;
S2R R5, SR_TID.Y &wr=0x0 ?trans1;
LDC.64 R20, c[0x0][0x390] &wr=0x1 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, UR5, URZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
S2R R2, SR_CTAID.Y &wr=0x0 ?trans1;
S2R R19, SR_TID.X &wr=0x3 ?trans1;
ISETP.GE.U32.AND P0, PT, R0, 0x8, PT ?trans1;
UMOV UR4, URZ ?trans1;
IADD3 R5, PT, PT, R5, R2, R2 &req={0} ?trans2;
IADD3 R3, PT, PT, R19, UR5, RZ &req={3} ?WAIT3_END_GROUP;
IMAD R2, R5, R0, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, R3, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R20, R5, 0x4, R20 &req={1} ?trans1;
LOP3.LUT R5, R0, 0x7, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LDG.E R37, desc[UR6][R20.64] &req={2} &rd=0x0 &wr=0x5 ?trans1;
@!P0 BRA 0x6d0 ?trans5;
LDC.64 R22, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R9, R0.reuse, 0x3, R19.reuse ?trans1;
LEA R13, R0.reuse, R19, 0x2 ?trans1;
IMAD R15, R0.reuse, 0x5, R19.reuse ?trans1;
IADD3 R11, PT, PT, R0.reuse, UR5, R19.reuse ?trans1;
IMAD R17, R0.reuse, 0x6, R19.reuse ?trans1;
LOP3.LUT R4, R0.reuse, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
IMAD R19, R0, 0x7, R19 ?trans1;
LDC.64 R24, c[0x0][0x388] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R3, R0, R0 ?trans1;
UMOV UR4, 0x3 ?trans1;
MOV R6, R2 ?trans1;
MOV R35, R3 ?trans1;
IADD3 R9, PT, PT, R9, UR5, RZ ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R13, UR5, RZ ?trans2;
IADD3 R15, PT, PT, R15, UR5, RZ ?trans2;
IADD3 R17, PT, PT, R17, UR5, RZ ?trans2;
IADD3 R19, PT, PT, R19, UR5, RZ ?trans2;
IADD3 R4, PT, PT, -R4, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE.U32 R26, R6, 0x4, R22 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R28, R35, 0x4, R24.reuse &req={2} ?trans2;
LDG.E R26, desc[UR6][R26.64] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x2 ?trans1;
IADD3 R31, PT, PT, R6, 0x1, RZ ?trans1;
IMAD.WIDE.U32 R32, R11, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R31, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R37, R26, R28, R37 &req={5,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x1 ?trans4;
LDG.E R30, desc[UR6][R30.64] &wr=0x2 ?trans4;
LDG.E R32, desc[UR6][R32.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R6, 0x2, RZ ?trans1;
IMAD.WIDE.U32 R28, R7, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R26, R10, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R8, R30, R32, R37 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R8 &rd=0x2 ?trans4;
LDG.E R27, desc[UR6][R26.64] &wr=0x1 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R6, 0x3, RZ ?trans1;
IMAD.WIDE.U32 R32, R9, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R10, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R37, R27, R28, R8 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x1 ?trans4;
LDG.E R30, desc[UR6][R30.64] &wr=0x2 ?trans4;
LDG.E R32, desc[UR6][R32.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R6, 0x4, RZ ?trans1;
IMAD.WIDE.U32 R28, R13, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R26, R10, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R8, R30, R32, R37 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R8 &rd=0x2 ?trans4;
LDG.E R27, desc[UR6][R26.64] &wr=0x1 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R6, 0x5, RZ ?trans1;
IMAD.WIDE.U32 R32, R15, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R10, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R37, R27, R28, R8 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x1 ?trans4;
LDG.E R30, desc[UR6][R30.64] &wr=0x2 ?trans4;
LDG.E R32, desc[UR6][R32.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R6, 0x6, RZ ?trans1;
IMAD.WIDE.U32 R28, R17, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R26, R10, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R8, R30, R32, R37 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R8 &rd=0x3 ?trans4;
LDG.E R27, desc[UR6][R26.64] &wr=0x2 ?trans4;
LDG.E R28, desc[UR6][R28.64] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R6, 0x7, RZ ?trans1;
IMAD.WIDE.U32 R32, R19, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R30, R12, 0x4, R22 ?WAIT4_END_GROUP;
FFMA R10, R27, R28, R8 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R10 &rd=0x3 ?trans4;
LDG.E R31, desc[UR6][R30.64] &wr=0x1 ?trans4;
LDG.E R32, desc[UR6][R32.64] &wr=0x1 ?trans1;
IADD3 R4, PT, PT, R4, 0x8, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
LEA R11, R0, R11, 0x3 ?WAIT2_END_GROUP;
LEA R7, R0, R7, 0x3 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans1;
LEA R9, R0.reuse, R9, 0x3 ?trans2;
LEA R13, R0.reuse, R13, 0x3 ?trans2;
LEA R15, R0.reuse, R15, 0x3 ?trans2;
LEA R17, R0.reuse, R17, 0x3 ?trans2;
LEA R19, R0, R19, 0x3 ?WAIT2_END_GROUP;
LEA R35, R0, R35, 0x3 ?trans2;
IADD3 R6, PT, PT, R6, 0x8, RZ ?trans1;
FFMA R37, R31, R32, R10 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x3 ?trans1;
@P0 BRA 0x280 ?trans5;
UIADD3 UR4, UPT, UPT, UR4, -0x3, URZ ?WAIT12_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
ISETP.GE.U32.AND P0, PT, R5, 0x4, PT ?trans1;
LOP3.LUT R16, R0, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R16, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x960 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
IMAD R13, R0, UR4, R3 ?WAIT6_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R8, R17, 0x4, R6 &req={3,1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R13, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R15, PT, PT, R17, 0x1, RZ ?trans2;
IADD3 R19, PT, PT, R13, R0, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R12, R15, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R14, R19, 0x4, R4 ?WAIT4_END_GROUP;
FFMA R37, R8, R10, R37 &req={5,3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x1 ?trans4;
LDG.E R12, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R17, 0x2, RZ ?trans2;
IADD3 R25, PT, PT, R19, R0, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R8, R23, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R10, R25, 0x4, R4 ?WAIT4_END_GROUP;
FFMA R19, R12, R14, R37 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R19 &rd=0x2 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x3 ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R17, PT, PT, R17, 0x3, RZ ?trans2;
IADD3 R25, PT, PT, R25, R0, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R6, R17, 0x4, R6 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R25, 0x4, R4 ?WAIT4_END_GROUP;
FFMA R13, R8, R10, R19 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R13 &rd=0x2 ?trans4;
LDG.E R6, desc[UR6][R6.64] &wr=0x1 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R37, R6, R4, R13 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x2 ?trans6;
@!P1 EXIT ?trans5;
ISETP.NE.AND P0, PT, R16, 0x1, PT ?trans1;
LOP3.LUT R4, R0, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R4, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xae0 ?trans6;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R2, UR4, RZ &req={2} ?trans1;
IMAD R15, R0, UR4, R3 ?WAIT6_END_GROUP;
LDC.64 R8, c[0x0][0x388] &req={3} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R6, R13, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR6][R6.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R15, 0x4, R8 &req={2} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x3 ?trans1;
IADD3 R17, PT, PT, R13, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R15, R0, RZ ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R4, R17, 0x4, R4 ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R8, R15, 0x4, R8 ?WAIT4_END_GROUP;
FFMA R13, R6, R10, R37 &req={5,3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R13 &rd=0x1 ?trans4;
LDG.E R4, desc[UR6][R4.64] &wr=0x2 ?trans4;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R37, R4, R8, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 &rd=0x1 ?trans6;
@P1 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x4 ?trans1;
IADD3 R9, PT, PT, R2, UR4, RZ ?trans1;
IMAD R11, R0, UR4, R3 ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR6][R2.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &wr=0x4 ?trans2;
FFMA R37, R2, R4, R37 &req={5,4,3,2,1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R20.64], R37 ?trans1;
EXIT ?trans5;
BRA 0xba0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMul(float*, float*, float*, int)
_Z9MatrixMulPfS_S_i:
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 1
s_cbranch_scc1 .LBB0_3
v_bfe_u32 v1, v0, 10, 10
v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
s_load_b64 s[2:3], s[0:1], 0x10
s_mov_b32 s5, 0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v1, s15, 1, v1
v_lshl_add_u32 v0, s14, 1, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v6, v1, s4
v_add_nc_u32_e32 v2, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[1:2], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s2, v1
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v2, vcc_lo
s_load_b128 s[0:3], s[0:1], 0x0
global_load_b32 v7, v[4:5], off
.LBB0_2:
v_dual_mov_b32 v1, v3 :: v_dual_add_nc_u32 v2, s5, v6
s_add_i32 s5, s5, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s4, s5
v_lshlrev_b64 v[8:9], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[1:2], 2, v[0:1]
v_add_nc_u32_e32 v0, s4, v0
s_waitcnt lgkmcnt(0)
v_add_co_u32 v8, vcc_lo, s0, v8
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
v_add_co_u32 v1, vcc_lo, s2, v1
v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
global_load_b32 v8, v[8:9], off
global_load_b32 v1, v[1:2], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v7, v8, v1
global_store_b32 v[4:5], v7, off
s_cbranch_scc0 .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| MatrixMul | 4,931 | 903 | stackv2-00000-of-00015 |
// Demangled: MatrixMulSh(float*, float*, float*, int)
Function : _Z11MatrixMulShPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R0, 0x2, PT &req={1} ?trans1;
UIADD3 UR5, UPT, UPT, UR5, UR5, URZ &req={2} ?WAIT12_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R3, SR_TID.Y &wr=0x0 ?trans1;
S2UR UR8, SR_CgaCtaId &wr=0x1 ?trans1;
LEA.HI R2, R0, R0, RZ, 0x1 ?trans1;
UMOV UR6, 0x400 ?trans1;
S2R R4, SR_CTAID.Y &wr=0x2 ?trans1;
UIADD3 UR7, UPT, UPT, UR6, 0x10, URZ ?trans1;
SHF.R.S32.HI R2, RZ, 0x1, R2 ?trans1;
UMOV UR4, URZ ?trans1;
S2R R23, SR_TID.X &wr=0x3 ?trans1;
LDC.64 R20, c[0x0][0x390] &wr=0x4 ?trans1;
IADD3 R6, PT, PT, R2, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P1, PT, R6, 0x3, PT ?trans1;
ULEA UR7, UR8, UR7, 0x18 &req={1} ?trans1;
ULEA UR6, UR8, UR6, 0x18 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans4;
LEA R10, R3.reuse, UR7, 0x3 &req={0} ?trans2;
LEA R8, R3.reuse, UR6, 0x3 ?trans2;
IADD3 R7, PT, PT, R3, R4, R4 &req={2} ?WAIT2_END_GROUP;
LOP3.LUT R4, R2, 0x3, RZ, 0xc0, !PT ?trans2;
IADD3 R5, PT, PT, R23, UR5, RZ &req={3} ?trans1;
IMAD R6, R7, R0, R23 ?trans1;
LEA R8, R23, R8, 0x2 ?trans1;
ISETP.NE.AND P0, PT, R4, RZ, PT ?trans2;
IMAD R9, R7, R0, R5 ?trans1;
LEA R7, R23, UR6, 0x3 ?WAIT3_END_GROUP;
IMAD.WIDE.U32 R20, R9, 0x4, R20 &req={4} ?trans1;
LEA R9, R23, R10, 0x2 ?WAIT3_END_GROUP;
IMAD R10, R3, -0x4, R10 ?trans1;
@!P1 BRA 0x7c0 &req={1} ?trans6;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R3.reuse, 0x4, RZ ?trans2;
IADD3 R11, PT, PT, R3.reuse, 0x6, RZ ?trans2;
IADD3 R15, PT, PT, R3.reuse, 0x2, RZ ?trans1;
IMAD R12, R3, R0.reuse, R23.reuse ?trans1;
LOP3.LUT R22, R2, 0x3ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R13, R13, R0.reuse, R23.reuse ?trans1;
IADD3 R31, PT, PT, R6, 0x4, RZ ?trans1;
LDC.64 R16, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R11, R11, R0.reuse, R23.reuse ?trans1;
UMOV UR4, URZ ?trans1;
IMAD R14, R15, R0, R23 ?trans1;
IADD3 R15, PT, PT, R12, UR5, RZ ?WAIT2_END_GROUP;
IADD3 R27, PT, PT, R13, UR5, RZ ?trans2;
IADD3 R12, PT, PT, -R22, RZ, RZ ?trans2;
IADD3 R11, PT, PT, R11, UR5, RZ ?trans2;
IADD3 R13, PT, PT, R14, UR5, RZ ?WAIT7_END_GROUP;
IADD3 R29, PT, PT, R31, -0x4, RZ &req={2} ?trans1;
IMAD.WIDE.U32 R24, R15, 0x4, R16 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R28, R29, 0x4, R18 &req={0} ?trans1;
LDG.E R14, desc[UR8][R24.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR8][R28.64] &wr=0x3 ?trans4;
STS [R8], R33 &req={3} ?trans4;
STS [R9], R14 &req={2} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R35, desc[UR8][R20.64] &wr=0x2 ?trans4;
LDS R26, [R10] ?trans4;
LDS.64 R22, [R7] &wr=0x2 ?trans4;
LDS R37, [R10+0x8] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R24, R13, 0x4, R16 ?WAIT4_END_GROUP;
FFMA R22, R22, R26, R35 &req={2} ?WAIT4_END_GROUP;
FFMA R37, R37, R23, R22 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R37 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R35, PT, PT, R31, -0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R28, R35, 0x4, R18 ?WAIT5_END_GROUP;
LDG.E R33, desc[UR8][R28.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR8][R24.64] &wr=0x3 ?trans4;
STS [R8], R33 &req={2} ?trans4;
STS [R9], R24 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R35, desc[UR8][R20.64] &wr=0x2 ?trans4;
LDS R14, [R10] ?trans4;
LDS.64 R22, [R7] &wr=0x2 ?trans4;
LDS R26, [R10+0x8] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R28, R31, 0x4, R18 ?WAIT4_END_GROUP;
FFMA R14, R22, R14, R35 &req={2} ?WAIT4_END_GROUP;
FFMA R35, R26, R23, R14 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R35 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IMAD.WIDE.U32 R22, R27, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R29, desc[UR8][R28.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR8][R22.64] &wr=0x3 ?trans4;
STS [R8], R29 &req={2} ?trans4;
STS [R9], R14 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R33, desc[UR8][R20.64] &wr=0x2 ?trans4;
LDS R26, [R10] ?trans4;
LDS.64 R24, [R7] &wr=0x2 ?trans4;
LDS R37, [R10+0x8] &wr=0x0 ?trans1;
FFMA R24, R24, R26, R33 &req={2} ?WAIT4_END_GROUP;
FFMA R37, R37, R25, R24 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R37 ?trans1;
IADD3 R33, PT, PT, R31, 0x2, RZ ?trans1;
IMAD.WIDE.U32 R24, R11, 0x4, R16 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans3;
IMAD.WIDE.U32 R22, R33, 0x4, R18 ?WAIT6_END_GROUP;
LDG.E R23, desc[UR8][R22.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR8][R24.64] &wr=0x3 ?trans4;
STS [R8], R23 &req={2} ?trans4;
STS [R9], R24 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R33, desc[UR8][R20.64] &wr=0x2 ?trans4;
LDS R14, [R10] ?trans4;
LDS.64 R28, [R7] &wr=0x2 ?trans4;
LDS R35, [R10+0x8] &wr=0x0 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R12, RZ, PT ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
LEA R15, R0.reuse, R15, 0x3 ?trans1;
IMAD R13, R0.reuse, 0x8, R13 ?trans1;
LEA R27, R0.reuse, R27, 0x3 ?trans1;
IMAD R11, R0, 0x8, R11 ?trans1;
IADD3 R31, PT, PT, R31, 0x8, RZ ?trans1;
FFMA R14, R28, R14, R33 &req={2} ?WAIT4_END_GROUP;
FFMA R29, R35, R29, R14 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R29 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 BRA 0x340 ?trans5;
@!P0 EXIT ?trans5;
ISETP.NE.AND P0, PT, R4, 0x1, PT ?trans1;
LOP3.LUT R2, R2, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R2, 0x1, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xaa0 ?trans6;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
UIADD3 UR5, UPT, UPT, UR4, UR4, URZ ?WAIT6_END_GROUP;
IADD3 R2, PT, PT, R3, UR5, RZ ?trans1;
LDC.64 R12, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R19, PT, PT, R6, UR5, RZ ?WAIT3_END_GROUP;
IMAD R23, R2, R0, R5 ?trans2;
IMAD.WIDE.U32 R18, R19, 0x4, R14 &req={0} ?WAIT6_END_GROUP;
LDG.E R19, desc[UR8][R18.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R22, R23, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R22, desc[UR8][R22.64] &wr=0x4 ?trans4;
STS [R8], R19 &req={3} &rd=0x0 ?trans4;
STS [R9], R22 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R11, desc[UR8][R20.64] &wr=0x3 ?trans4;
LDS R2, [R10] ?trans4;
LDS.64 R16, [R7] &wr=0x3 ?trans4;
LDS R25, [R10+0x8] &wr=0x1 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x2, URZ ?WAIT6_END_GROUP;
IADD3 R4, PT, PT, R3, UR5, RZ ?WAIT5_END_GROUP;
IMAD R19, R4, R0, R5 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R12, R19, 0x4, R12 ?WAIT4_END_GROUP;
FFMA R2, R16, R2, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R25, R17, R2 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R17 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
IADD3 R11, PT, PT, R6, UR5, RZ ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R14, R11, 0x4, R14 ?WAIT6_END_GROUP;
LDG.E R15, desc[UR8][R14.64] &wr=0x3 ?trans4;
LDG.E R12, desc[UR8][R12.64] &wr=0x4 ?trans4;
STS [R8], R15 &req={3} ?trans4;
STS [R9], R12 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R11, desc[UR8][R20.64] &wr=0x3 ?trans4;
LDS R2, [R10] ?trans4;
LDS.64 R18, [R7] &wr=0x3 ?trans4;
LDS R23, [R10+0x8] &wr=0x0 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R2, R18, R2, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R19, R23, R19, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R19 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P1 EXIT ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, UR4, URZ ?WAIT6_END_GROUP;
IADD3 R2, PT, PT, R3, UR4, RZ ?trans1;
LDC.64 R14, c[0x0][0x388] &wr=0x3 ?trans1;
IADD3 R3, PT, PT, R6, UR4, RZ ?WAIT3_END_GROUP;
IMAD R5, R2, R0, R5 ?trans2;
IMAD.WIDE.U32 R2, R3, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR8][R2.64] &wr=0x4 ?trans1;
IMAD.WIDE.U32 R4, R5, 0x4, R14 &req={3} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &wr=0x3 ?trans4;
STS [R8], R3 &req={4} ?trans4;
STS [R9], R4 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R11, desc[UR8][R20.64] &wr=0x3 ?trans4;
LDS R0, [R10] ?trans4;
LDS.64 R6, [R7] &wr=0x3 ?trans4;
LDS R13, [R10+0x8] &wr=0x1 ?trans1;
FFMA R0, R6, R0, R11 &req={3} ?WAIT4_END_GROUP;
FFMA R13, R13, R7, R0 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR8][R20.64], R13 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0xc10;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: MatrixMulSh(float*, float*, float*, int)
_Z11MatrixMulShPfS_S_i:
s_load_b32 s4, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_cmp_lt_i32 s4, 2
s_cbranch_scc1 .LBB1_3
v_bfe_u32 v8, v0, 10, 10
v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v2, 0x3ff, v0
s_clause 0x1
s_load_b64 s[6:7], s[0:1], 0x10
s_load_b128 s[0:3], s[0:1], 0x0
v_lshl_add_u32 v0, s15, 1, v8
s_lshl_b32 s5, s14, 1
v_mul_lo_u32 v9, v8, s4
s_lshr_b32 s8, s4, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
s_add_i32 s8, s4, s8
v_mad_u64_u32 v[3:4], null, v0, s4, v[2:3]
v_lshlrev_b32_e32 v4, 2, v2
v_lshlrev_b32_e32 v7, 3, v2
v_add3_u32 v2, v2, v9, s5
s_lshl_b32 s4, s4, 1
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshl_add_u32 v6, v8, 3, v4
v_add_nc_u32_e32 v0, s5, v3
v_lshl_add_u32 v8, v8, 2, 16
s_ashr_i32 s5, s8, 1
v_add_nc_u32_e32 v9, 16, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[0:1]
v_mov_b32_e32 v0, v3
s_waitcnt lgkmcnt(0)
v_add_co_u32 v4, vcc_lo, s6, v4
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB1_2:
v_mov_b32_e32 v3, v1
v_lshlrev_b64 v[10:11], 2, v[0:1]
v_add_nc_u32_e32 v0, 2, v0
s_add_i32 s5, s5, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
s_cmp_eq_u32 s5, 0
v_lshlrev_b64 v[12:13], 2, v[2:3]
v_add_co_u32 v10, vcc_lo, s0, v10
v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
v_add_nc_u32_e32 v2, s4, v2
s_delay_alu instid0(VALU_DEP_4)
v_add_co_u32 v12, vcc_lo, s2, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s3, v13, vcc_lo
global_load_b32 v3, v[10:11], off
global_load_b32 v10, v[12:13], off
s_waitcnt vmcnt(1)
ds_store_b32 v6, v3
s_waitcnt vmcnt(0)
ds_store_b32 v9, v10
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
global_load_b32 v3, v[4:5], off
ds_load_b64 v[10:11], v7
ds_load_2addr_b32 v[12:13], v8 offset1:2
s_waitcnt vmcnt(0) lgkmcnt(0)
v_fmac_f32_e32 v3, v10, v12
s_delay_alu instid0(VALU_DEP_1)
v_fmac_f32_e32 v3, v11, v13
global_store_b32 v[4:5], v3, off
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_scc0 .LBB1_2
.LBB1_3:
s_endpgm
| MatrixMulSh | 4,640 | 1,226 | stackv2-00000-of-00015 |
// Demangled: find_odd(int, int*, int*)
Function : _Z8find_oddiPiS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans6;
LDC.64 R8, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R11, R11, UR4, RZ &req={1} ?WAIT7_END_GROUP;
IMAD.WIDE R4, R0, 0x4, R8 &req={3} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR6][R4.64] &req={2} &wr=0x2 ?trans2;
LOP3.LUT R2, R4, 0x80000001, RZ, 0xc0, !PT &req={2,1} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, 0x1, PT ?trans1;
IMAD.WIDE R2, R0, 0x4, R6 &req={0} ?trans1;
IADD3 R0, PT, PT, R11, R0, RZ ?WAIT3_END_GROUP;
SEL R13, R4, RZ, !P0 ?trans2;
ISETP.GE.AND P0, PT, R0, UR5, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R2.64], R13 &rd=0x1 ?trans10;
@!P0 BRA 0xd0 ?trans5;
EXIT ?trans5;
BRA 0x180;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: find_odd(int, int*, int*)
_Z8find_oddiPiS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s10, s[0:1], 0x0
s_add_u32 s2, s0, 24
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s8, s4, 0xffff
s_mov_b32 s4, exec_lo
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s10, v1
s_cbranch_execz .LBB0_3
s_load_b32 s2, s[2:3], 0x0
s_load_b128 s[4:7], s[0:1], 0x8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_mul_i32 s2, s2, s8
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[8:9], s[2:3], 2
s_mov_b32 s3, 0
.LBB0_2:
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
v_add_nc_u32_e32 v1, s2, v1
global_load_b32 v0, v[4:5], off
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v2, vcc_lo, v2, s8
v_cmp_le_i32_e64 s0, s10, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 s3, s0, s3
s_waitcnt vmcnt(0)
v_and_b32_e32 v6, 0x80000001, v0
v_cmp_eq_u32_e64 s1, 1, v6
s_delay_alu instid0(VALU_DEP_1)
v_cndmask_b32_e64 v0, 0, v0, s1
global_store_b32 v[4:5], v0, off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_2
.LBB0_3:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| find_odd | 679 | 814 | stackv2-00000-of-00015 |
// Demangled: matrixMult(int*, int*, int*, int, int, int, int, int, int)
Function : _Z10matrixMultPiS_S_iiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R17, SR_TID.Y &wr=0x2 ?trans6;
LDC R0, c[0x0][0x364] &wr=0x2 ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R18, SR_TID.X &wr=0x4 ?trans5;
S2UR UR5, SR_CTAID.X ?trans1;
UIADD3 UR4, UPT, UPT, UR7, 0x3, URZ &req={1} ?WAIT7_END_GROUP;
S2UR UR6, SR_CTAID.Y &wr=0x2 ?trans1;
UI2FP.F32.S32 UR4, UR4 ?WAIT4_END_GROUP;
UFMUL UR4, UR4, 0.25 ?WAIT3_END_GROUP;
LDC R3, c[0x0][0x360] &wr=0x4 ?trans6;
F2I.CEIL.NTZ R8, UR4 &wr=0x1 ?trans1;
IMAD R7, R0, UR6, R17 &req={2} ?trans1;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?trans1;
IMAD R16, R3, UR5, R18 &req={4} ?WAIT12_END_GROUP;
@!P0 BRA 0xc50 &req={3,0} ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GE.U32.AND P0, PT, R8.reuse, 0x4, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x40, URZ ?trans1;
LOP3.LUT R6, R8, 0x3, RZ, 0xc0, !PT ?trans1;
MOV R3, RZ ?trans1;
MOV R25, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
ULEA UR4, UR6, UR4, 0x18 &req={0} ?trans1;
ULEA UR5, UR6, UR5, 0x18 ?WAIT5_END_GROUP;
LEA R5, R17, UR4, 0x4 ?trans2;
LEA R4, R18, UR5, 0x2 ?WAIT3_END_GROUP;
IMAD R2, R18, 0x4, R5 ?trans2;
IMAD R0, R17, 0x10, R4 ?trans1;
@!P0 BRA 0x9b0 ?trans6;
LDC.64 R34, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x1 ?trans1;
LOP3.LUT R8, R8, 0x7ffffffc, RZ, 0xc0, !PT ?trans1;
IMAD R23, R7, UR7, R18 ?trans1;
IADD3 R9, PT, PT, R17.reuse, 0xc, RZ ?trans1;
LDCU UR5, c[0x0][0x3a4] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R17.reuse, 0x4, RZ ?trans2;
IADD3 R19, PT, PT, R17, 0x8, RZ ?trans1;
LDC.64 R20, c[0x0][0x3a0] &wr=0x3 ?trans1;
IADD3 R22, PT, PT, R18, 0x8, RZ ?trans1;
MOV R3, RZ ?trans1;
IADD3 R24, PT, PT, -R8, RZ, RZ ?trans1;
LDCU UR4, c[0x0][0x39c] &wr=0x4 ?trans1;
ISETP.GE.AND P2, PT, R7, UR6, PT &req={1} ?trans1;
IMAD R26, R9, UR5, R16 &req={2} ?WAIT2_END_GROUP;
IMAD R28, R11, UR5, R16.reuse ?trans2;
IMAD R30, R19, UR5, R16.reuse ?trans2;
IMAD R32, R17, UR5, R16 ?WAIT7_END_GROUP;
ISETP.GE.AND P0, PT, R16, R21, PT &req={3} ?trans1;
IADD3 R9, PT, PT, R19, -0x8, RZ ?trans2;
IADD3 R10, PT, PT, R22, -0x8, RZ ?trans1;
UMOV UR7, UR4 &req={4} ?trans1;
MOV R27, RZ ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.OR P4, PT, R9, R20, P0 ?trans1;
ISETP.GE.OR P3, PT, R10, UR7, P2 ?trans1;
IMAD.WIDE R36, R23, 0x4, R34 &req={0} ?WAIT11_END_GROUP;
@!P4 LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@!P3 LDG.E R27, desc[UR8][R36.64] &wr=0x2 ?trans1;
@!P4 IMAD.WIDE R10, R32, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@!P4 LDG.E R29, desc[UR8][R10.64] &rd=0x0 &wr=0x3 ?trans1;
IADD3 R9, PT, PT, R19, -0x4, RZ ?WAIT5_END_GROUP;
ISETP.GE.OR P4, PT, R9, R20, P0 ?WAIT13_END_GROUP;
@!P4 LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R22, -0x4, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.OR P3, PT, R10, UR7, P2 ?trans1;
STS [R2], R27 &req={2} &rd=0x0 ?trans4;
STS [R0], R29 &req={3} &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R31, [R4] ?trans4;
LDS.128 R12, [R5] &wr=0x3 ?trans4;
LDS R33, [R4+0x10] &wr=0x4 ?trans1;
MOV R27, RZ &req={0} ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 &req={2} ?WAIT2_END_GROUP;
IMAD R12, R12, R31, R25 &req={3} ?trans2;
LDS R25, [R4+0x30] ?trans2;
IMAD R33, R33, R13, R12 &req={4} ?trans2;
@!P4 IMAD.WIDE R12, R28, 0x4, R8 &req={1} ?trans2;
LDS R8, [R4+0x20] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P3 LDG.E R27, desc[UR8][R36.64+0x10] &wr=0x2 ?trans4;
@!P4 LDG.E R29, desc[UR8][R12.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD R14, R8, R14, R33 &req={0} ?trans1;
ISETP.GE.OR P4, PT, R19, R20, P0 ?WAIT13_END_GROUP;
@!P4 LDC.64 R12, c[0x0][0x388] &req={1} &wr=0x0 ?trans1;
IMAD R14, R25, R15, R14 ?trans1;
ISETP.GE.OR P3, PT, R22, UR7, P2 ?trans1;
STS [R2], R27 &req={2} &rd=0x1 ?trans4;
STS [R0], R29 &req={3} &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R31, [R4] ?trans4;
LDS.128 R8, [R5] &wr=0x3 ?trans4;
LDS R33, [R4+0x10] &wr=0x4 ?trans4;
LDS R25, [R4+0x30] ?trans1;
MOV R27, RZ &req={1} ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 &req={2} ?WAIT2_END_GROUP;
IMAD R8, R8, R31, R14 &req={3} ?WAIT4_END_GROUP;
IMAD R33, R33, R9, R8 &req={4} ?trans2;
@!P4 IMAD.WIDE R8, R30, 0x4, R12 &req={0} ?trans2;
LDS R12, [R4+0x20] &wr=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P3 LDG.E R27, desc[UR8][R36.64+0x20] &wr=0x2 ?trans4;
@!P4 LDG.E R29, desc[UR8][R8.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD R10, R12, R10, R33 &req={0} ?trans1;
IADD3 R33, PT, PT, R19, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R33, R20, P0 ?trans1;
IMAD R10, R25, R11, R10 ?trans1;
IADD3 R33, PT, PT, R22, 0x4, RZ ?WAIT11_END_GROUP;
@!P0 LDC.64 R8, c[0x0][0x388] &req={1} &wr=0x0 ?trans1;
ISETP.GE.OR P3, PT, R33, UR7, P2 ?trans1;
STS [R2], R27 &req={2} &rd=0x1 ?trans4;
STS [R0], R29 &req={3} &rd=0x2 ?trans2;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R31, [R4] ?trans4;
LDS.128 R12, [R5] &wr=0x3 ?trans4;
LDS R11, [R4+0x10] &wr=0x4 ?trans4;
LDS R25, [R4+0x20] &wr=0x5 ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 &req={1} ?trans1;
MOV R29, RZ &req={2} ?trans1;
IMAD R10, R12, R31, R10 &req={3} ?WAIT2_END_GROUP;
LDS R12, [R4+0x30] &wr=0x1 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P3 LDG.E R27, desc[UR8][R36.64+0x30] &rd=0x0 &wr=0x2 ?trans2;
@!P0 IMAD.WIDE R36, R26, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R29, desc[UR8][R36.64] &wr=0x3 ?trans1;
IMAD R13, R11, R13, R10 &req={4} ?WAIT4_END_GROUP;
IMAD R13, R25, R14, R13 &req={5} ?trans1;
IADD3 R24, PT, PT, R24, 0x4, RZ ?WAIT3_END_GROUP;
IMAD R12, R12, R15, R13 &req={1} ?trans2;
ISETP.NE.AND P0, PT, R24, RZ, PT ?trans1;
IADD3 R3, PT, PT, R3, 0x4, RZ ?trans2;
IADD3 R23, PT, PT, R23, 0x10, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x10, RZ ?trans2;
IADD3 R22, PT, PT, R22, 0x10, RZ ?trans1;
IMAD R32, R21, 0x10, R32 ?WAIT2_END_GROUP;
IMAD R28, R21.reuse, 0x10, R28 ?trans2;
IMAD R30, R21.reuse, 0x10, R30 ?trans2;
IMAD R26, R21, 0x10, R26 ?trans1;
STS [R2], R27 &req={2} ?trans4;
STS [R0], R29 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R31, [R4] ?trans4;
LDS.128 R8, [R5] &wr=0x0 ?trans4;
LDS R14, [R4+0x10] &wr=0x1 ?trans4;
LDS R25, [R4+0x20] &wr=0x2 ?trans4;
LDS R33, [R4+0x30] &wr=0x3 ?trans1;
IMAD R8, R8, R31, R12 &req={0} ?WAIT4_END_GROUP;
IMAD R9, R14, R9, R8 &req={1} ?WAIT4_END_GROUP;
IMAD R10, R25, R10, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R33, R11, R10 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0x330 ?trans5;
@!P1 BRA 0xc50 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x1 ?trans1;
IMAD R17, R3.reuse, 0x4, R17 ?trans1;
IADD3 R6, PT, PT, -R6, RZ, RZ ?trans1;
IMAD R22, R3, 0x4, R18 ?trans1;
LDCU UR4, c[0x0][0x3a4] &wr=0x2 ?trans3;
LDC.64 R14, c[0x0][0x3a0] &wr=0x3 ?trans1;
IMAD R23, R7.reuse, UR7, R22 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x4 ?trans1;
ISETP.GE.AND P2, PT, R7, UR5, PT &req={1} ?trans1;
IMAD R3, R17, UR4, R16 &req={2} ?WAIT12_END_GROUP;
ISETP.GE.AND P0, PT, R16, R15, PT &req={3} ?trans1;
ISETP.GE.OR P1, PT, R22, UR6, P2 &req={4} ?trans1;
HFMA2 R27, -RZ, RZ, 0, 0 ?trans1;
MOV R29, RZ ?trans1;
IMAD.WIDE R18, R23, 0x4, R12 &req={0} ?trans1;
ISETP.GE.OR P0, PT, R17, R14, P0 ?WAIT9_END_GROUP;
@!P1 LDG.E R27, desc[UR8][R18.64] &wr=0x2 ?trans4;
@!P0 LDC.64 R20, c[0x0][0x388] &wr=0x0 ?trans2;
@!P0 IMAD.WIDE R20, R3, 0x4, R20 &req={0} ?WAIT5_END_GROUP;
@!P0 LDG.E R29, desc[UR8][R20.64] &wr=0x3 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IADD3 R23, PT, PT, R23, 0x4, RZ ?trans2;
IADD3 R22, PT, PT, R22, 0x4, RZ ?trans2;
IADD3 R17, PT, PT, R17, 0x4, RZ ?trans1;
IMAD R3, R15, 0x4, R3 ?trans1;
STS [R2], R27 &req={2} ?trans4;
STS [R0], R29 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS R24, [R4] ?trans4;
LDS.128 R8, [R5] &wr=0x0 ?trans4;
LDS R26, [R4+0x10] &wr=0x1 ?trans4;
LDS R28, [R4+0x20] &wr=0x2 ?trans4;
LDS R30, [R4+0x30] &wr=0x3 ?trans1;
IMAD R8, R8, R24, R25 &req={0} ?WAIT4_END_GROUP;
IMAD R9, R26, R9, R8 &req={1} ?WAIT4_END_GROUP;
IMAD R10, R28, R10, R9 &req={2} ?WAIT4_END_GROUP;
IMAD R25, R30, R11, R10 &req={3} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 BRA 0xa70 ?trans5;
LDCU.64 UR4, c[0x0][0x3a8] &wr=0x0 ?trans2;
ISETP.GE.AND P0, PT, R16, UR5, PT &req={0} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R7, UR4, P0 ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R7, R7, UR5, R16 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR8][R2.64], R25 ?trans1;
EXIT ?trans5;
BRA 0xce0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMult(int*, int*, int*, int, int, int, int, int, int)
_Z10matrixMultPiS_S_iiiiii:
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b32 s16, s[0:1], 0x3c
s_load_b64 s[2:3], s[0:1], 0x28
v_bfe_u32 v3, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_add_i32 s8, s5, 3
s_delay_alu instid0(SALU_CYCLE_1)
v_cvt_f32_i32_e32 v1, s8
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[12:13], s[0:1], 0x10
s_lshr_b32 s0, s16, 16
v_mul_f32_e32 v1, 0x3e800000, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ceil_f32_e32 v1, v1
v_cvt_i32_f32_e32 v5, v1
v_mad_u64_u32 v[0:1], null, s15, s0, v[3:4]
s_and_b32 s0, s16, 0xffff
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s14, s0, v[4:5]
v_cmp_gt_i32_e32 vcc_lo, 1, v5
s_cbranch_vccnz .LBB0_9
v_lshlrev_b32_e32 v2, 2, v4
v_lshlrev_b32_e32 v6, 4, v3
v_mul_lo_u32 v8, v0, s5
v_cmp_gt_i32_e64 s0, s4, v0
v_cmp_gt_i32_e64 s1, s7, v1
v_add_nc_u32_e32 v7, 64, v2
v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v9, v6, v2
s_mov_b32 s4, 0
s_delay_alu instid0(VALU_DEP_2)
v_add_nc_u32_e32 v10, v7, v6
.LBB0_2:
s_lshl_b32 s14, s4, 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, s14, v4
v_cmp_gt_i32_e32 vcc_lo, s5, v12
s_and_b32 s16, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s15, s16
s_cbranch_execz .LBB0_4
v_add_nc_u32_e32 v11, v12, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v12, 31, v11
v_lshlrev_b64 v[11:12], 2, v[11:12]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s8, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s9, v12, vcc_lo
global_load_b32 v11, v[11:12], off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s15
v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v12, s14, v3
s_waitcnt vmcnt(0)
ds_store_b32 v9, v11
v_cmp_gt_i32_e32 vcc_lo, s6, v12
s_and_b32 s15, s1, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s14, s15
s_cbranch_execz .LBB0_6
v_mad_u64_u32 v[13:14], null, v12, s7, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v14, 31, v13
v_lshlrev_b64 v[11:12], 2, v[13:14]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v11, vcc_lo, s10, v11
v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
global_load_b32 v13, v[11:12], off
.LBB0_6:
s_or_b32 exec_lo, exec_lo, s14
v_mov_b32_e32 v11, v7
s_mov_b32 s14, 0
s_waitcnt vmcnt(0)
ds_store_b32 v10, v13
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_7:
v_add_nc_u32_e32 v12, s14, v6
s_add_i32 s14, s14, 4
ds_load_b32 v14, v11
ds_load_b32 v15, v12
s_cmp_eq_u32 s14, 16
s_waitcnt lgkmcnt(0)
v_mad_u64_u32 v[12:13], null, v14, v15, v[2:3]
s_delay_alu instid0(VALU_DEP_1)
v_dual_mov_b32 v2, v12 :: v_dual_add_nc_u32 v11, 16, v11
s_cbranch_scc0 .LBB0_7
s_add_i32 s4, s4, 1
s_delay_alu instid0(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s4, v5
s_barrier
buffer_gl0_inv
s_cbranch_vccz .LBB0_2
s_branch .LBB0_10
.LBB0_9:
v_mov_b32_e32 v2, 0
.LBB0_10:
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
v_cmp_gt_i32_e64 s0, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB0_12
v_mad_u64_u32 v[3:4], null, v0, s3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s12, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMult | 5,082 | 2,191 | stackv2-00000-of-00015 |
// Demangled: findMinMaxInMatrix(int*, int*, int*, int)
Function : _Z18findMinMaxInMatrixPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R13, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x3 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x4 ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R13 &req={1} ?WAIT4_END_GROUP;
LEA.HI R6, R4, R13, RZ, 0x8 ?WAIT4_END_GROUP;
SHF.R.S32.HI R10, RZ, 0x8, R6 ?WAIT5_END_GROUP;
IMAD R11, R10, R0, RZ &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R2 &req={4} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR8][R4.64] &req={3} &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, R0, 0xff, PT ?trans1;
BSSY.RECONVERGENT B0, 0xba0 ?WAIT12_END_GROUP;
@!P0 LOP3.LUT R7, R6, 0xffffff00, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
@!P0 IADD3 R10, PT, PT, R10, R13, -R7 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?trans1;
MOV R8, R9 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0xb90 &req={0} ?trans5;
IADD3 R10, PT, PT, R11.reuse, R10, RZ ?trans2;
IADD3 R5, PT, PT, R11, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x280 ?trans1;
MOV R8, R9 ?WAIT3_END_GROUP;
VIMNMX.S32 R6, R10, R5, !PT ?WAIT5_END_GROUP;
IADD3 R4, PT, PT, -R11.reuse, R6.reuse, RZ ?trans2;
IADD3 R5, PT, PT, R11, -R6, RZ ?trans2;
LOP3.LUT P0, R4, R4, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P2, PT, R5, -0x4, PT ?WAIT10_END_GROUP;
@!P0 BRA 0x270 ?trans5;
IADD3 R6, PT, PT, -R4, RZ, RZ ?trans1;
MOV R8, R9 ?WAIT7_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R2 ?WAIT6_END_GROUP;
LDG.E R4, desc[UR8][R4.64] &wr=0x2 ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans2;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
ISETP.GE.AND P0, PT, R4.reuse, R9.reuse, PT &req={2} ?trans1;
VIMNMX.S32 R9, R4, R9, PT ?WAIT12_END_GROUP;
@P0 VIMNMX.S32 R8, R4, R8, !PT ?trans1;
@P1 BRA 0x1e0 ?trans6;
BSYNC.RECONVERGENT B1 ?trans5;
@P2 BRA 0xb90 ?trans5;
IADD3 R4, PT, PT, R10, -R11, RZ ?trans1;
BSSY.RECONVERGENT B1, 0x7c0 ?trans1;
IADD.64 R2, R2, 0x8 ?WAIT3_END_GROUP;
ISETP.GT.AND P1, PT, R4, 0xc, PT ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x8 ?WAIT12_END_GROUP;
@!P1 BRA 0x7b0 ?trans5;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
IADD3 R12, PT, PT, R10, -0xc, RZ ?WAIT11_END_GROUP;
IMAD.WIDE R6, R11, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R20, desc[UR8][R6.64+-0x8] &wr=0x2 ?trans4;
LDG.E R13, desc[UR8][R6.64+-0x4] &wr=0x3 ?trans1;
IADD3 R29, PT, PT, R11, 0x4, RZ ?WAIT3_END_GROUP;
LDG.E R14, desc[UR8][R6.64] &wr=0x4 ?trans2;
IMAD.WIDE R28, R29, 0x4, R2 ?trans2;
LDG.E R15, desc[UR8][R6.64+0x4] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R18, desc[UR8][R28.64+-0x8] &wr=0x5 ?trans4;
LDG.E R17, desc[UR8][R28.64+-0x4] &wr=0x5 ?trans1;
IADD3 R5, PT, PT, R11, 0x8, RZ ?WAIT3_END_GROUP;
LDG.E R16, desc[UR8][R28.64] &wr=0x5 ?trans2;
IMAD.WIDE R4, R5, 0x4, R2 ?trans2;
LDG.E R19, desc[UR8][R28.64+0x4] &wr=0x5 ?trans4;
LDG.E R23, desc[UR8][R4.64+-0x8] &wr=0x5 ?trans4;
LDG.E R22, desc[UR8][R4.64+-0x4] &wr=0x5 ?trans1;
IADD3 R25, PT, PT, R11, 0xc, RZ ?WAIT3_END_GROUP;
LDG.E R21, desc[UR8][R4.64] &wr=0x5 ?trans2;
IMAD.WIDE R6, R25, 0x4, R2 &req={0} ?trans2;
LDG.E R27, desc[UR8][R4.64+0x4] &rd=0x4 &wr=0x5 ?trans4;
LDG.E R25, desc[UR8][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R26, desc[UR8][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R24, desc[UR8][R6.64] &wr=0x5 ?trans4;
LDG.E R28, desc[UR8][R6.64+0x4] &rd=0x0 &wr=0x5 ?trans1;
IADD3 R11, PT, PT, R11, 0x10, RZ ?trans1;
VIMNMX.S32 R30, R20.reuse, R9.reuse, PT &req={2} ?trans1;
ISETP.GE.AND P1, PT, R20, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R9, R30, R13, PT &req={3} ?trans1;
ISETP.GE.AND P2, PT, R13, R30, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R4, R9, R14, PT &req={4} ?trans1;
ISETP.GE.AND P3, PT, R14, R9, PT ?WAIT3_END_GROUP;
@P1 VIMNMX.S32 R8, R20, R8, !PT ?trans1;
VIMNMX.S32 R5, R4, R15, PT &req={5} ?trans1;
ISETP.GE.AND P1, PT, R15, R4, PT ?WAIT3_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R13, !PT ?trans1;
VIMNMX.S32 R4, R5, R18, PT ?trans1;
ISETP.GE.AND P2, PT, R18, R5, PT ?WAIT3_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R14, !PT ?trans1;
VIMNMX.S32 R5, R4, R17, PT ?trans1;
ISETP.GE.AND P3, PT, R17, R4, PT ?WAIT3_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R15, !PT ?trans1;
VIMNMX.S32 R4, R5, R16, PT ?trans1;
ISETP.GE.AND P1, PT, R16, R5, PT ?WAIT3_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R18, !PT ?trans1;
VIMNMX.S32 R6, R4, R19, PT &req={0} ?trans1;
ISETP.GE.AND P2, PT, R19, R4, PT ?WAIT3_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R17, !PT ?trans1;
VIMNMX.S32 R5, R6, R23, PT ?trans1;
ISETP.GE.AND P3, PT, R23, R6, PT ?WAIT3_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R16, !PT ?trans1;
VIMNMX.S32 R4, R5, R22, PT ?trans1;
ISETP.GE.AND P1, PT, R22, R5, PT ?WAIT3_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R19, !PT ?trans1;
VIMNMX.S32 R6, R4, R21, PT ?trans1;
ISETP.GE.AND P2, PT, R21, R4, PT ?WAIT3_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R23, !PT ?trans1;
VIMNMX.S32 R4, R6, R27, PT ?trans1;
ISETP.GE.AND P3, PT, R27, R6, PT ?WAIT3_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R22, !PT ?trans1;
VIMNMX.S32 R5, R4, R25, PT ?trans1;
ISETP.GE.AND P1, PT, R25, R4, PT ?WAIT3_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R21, !PT ?trans1;
ISETP.GE.AND P2, PT, R26, R5, PT ?trans1;
VIMNMX.S32 R7, R5, R26, PT ?WAIT3_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R27, !PT ?trans2;
ISETP.GE.AND P3, PT, R24, R7, PT ?trans1;
VIMNMX.S32 R7, R7, R24, PT ?trans2;
@P1 VIMNMX.S32 R8, R8, R25, !PT ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R28, R7, PT ?trans1;
VIMNMX.S32 R9, R7, R28, PT ?trans1;
@P2 VIMNMX.S32 R8, R8, R26, !PT ?trans1;
ISETP.GE.AND P2, PT, R11, R12, PT ?WAIT4_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R24, !PT ?WAIT6_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R28, !PT ?WAIT3_END_GROUP;
@!P2 BRA 0x310 ?trans5;
BSYNC.RECONVERGENT B1 ?trans5;
IADD3 R4, PT, PT, R10, -R11, RZ ?trans1;
BSSY.RECONVERGENT B1, 0xa60 ?trans4;
ISETP.GT.AND P1, PT, R4, 0x4, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xa50 ?trans5;
IMAD.WIDE R4, R11, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R12, desc[UR8][R4.64+-0x8] &wr=0x2 ?trans4;
LDG.E R14, desc[UR8][R4.64+-0x4] &wr=0x3 ?trans1;
IADD3 R7, PT, PT, R11, 0x4, RZ ?WAIT3_END_GROUP;
LDG.E R16, desc[UR8][R4.64] &wr=0x4 ?trans2;
IMAD.WIDE R6, R7, 0x4, R2 ?trans2;
LDG.E R18, desc[UR8][R4.64+0x4] &wr=0x5 ?trans4;
LDG.E R15, desc[UR8][R6.64+-0x8] &wr=0x5 ?trans4;
LDG.E R20, desc[UR8][R6.64+-0x4] &wr=0x5 ?trans4;
LDG.E R17, desc[UR8][R6.64] &wr=0x5 ?trans4;
LDG.E R19, desc[UR8][R6.64+0x4] &wr=0x5 ?trans1;
IADD3 R11, PT, PT, R11, 0x8, RZ ?trans1;
VIMNMX.S32 R13, R9, R12, PT &req={2} ?trans1;
ISETP.GE.AND P0, PT, R12, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R9, R13, R14, PT &req={3} ?trans1;
ISETP.GE.AND P1, PT, R14, R13, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R13, R9, R16, PT &req={4} ?trans1;
ISETP.GE.AND P2, PT, R16, R9, PT ?WAIT3_END_GROUP;
@P0 VIMNMX.S32 R8, R8, R12, !PT ?trans1;
VIMNMX.S32 R4, R13, R18, PT &req={5} ?trans1;
ISETP.GE.AND P0, PT, R18, R13, PT ?WAIT3_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R14, !PT ?trans1;
VIMNMX.S32 R5, R4, R15, PT ?trans1;
ISETP.GE.AND P1, PT, R15, R4, PT ?WAIT3_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R16, !PT ?trans1;
VIMNMX.S32 R4, R5, R20, PT ?trans1;
ISETP.GE.AND P2, PT, R20, R5, PT ?WAIT3_END_GROUP;
@P0 VIMNMX.S32 R8, R8, R18, !PT ?trans1;
ISETP.GE.AND P3, PT, R17, R4, PT ?trans1;
VIMNMX.S32 R4, R4, R17, PT ?trans1;
PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x80 ?trans2;
@P1 VIMNMX.S32 R8, R8, R15, !PT ?trans2;
ISETP.GE.AND P1, PT, R19, R4, PT ?trans1;
VIMNMX.S32 R9, R4, R19, PT ?trans2;
@P2 VIMNMX.S32 R8, R8, R20, !PT ?WAIT5_END_GROUP;
@P3 VIMNMX.S32 R8, R8, R17, !PT ?WAIT5_END_GROUP;
@P1 VIMNMX.S32 R8, R8, R19, !PT ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
ISETP.LT.OR P0, PT, R11, R10, P0 ?WAIT13_END_GROUP;
@!P0 BRA 0xb90 ?trans5;
IMAD.WIDE R2, R11, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR8][R2.64+-0x8] &wr=0x2 ?trans4;
LDG.E R6, desc[UR8][R2.64+-0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR8][R2.64] &wr=0x4 ?trans4;
LDG.E R12, desc[UR8][R2.64+0x4] &wr=0x5 ?trans1;
VIMNMX.S32 R5, R9, R4, PT &req={2} ?trans1;
ISETP.GE.AND P0, PT, R4, R9, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R7, R5, R6, PT &req={3} ?trans1;
ISETP.GE.AND P1, PT, R6, R5, PT ?WAIT4_END_GROUP;
ISETP.GE.AND P2, PT, R10, R7, PT &req={4} ?trans1;
VIMNMX.S32 R7, R7, R10, PT ?WAIT3_END_GROUP;
@P0 VIMNMX.S32 R8, R8, R4, !PT ?trans2;
ISETP.GE.AND P0, PT, R12, R7, PT &req={5} ?trans1;
VIMNMX.S32 R9, R7, R12, PT ?trans2;
@P1 VIMNMX.S32 R8, R8, R6, !PT ?WAIT5_END_GROUP;
@P2 VIMNMX.S32 R8, R8, R10, !PT ?WAIT5_END_GROUP;
@P0 VIMNMX.S32 R8, R8, R12, !PT ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
S2UR UR6, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.GT.U32.AND P6, PT, R0.reuse, 0x7f, PT ?trans1;
UIADD3 UR5, UPT, UPT, UR4, 0x400, URZ ?trans1;
BSSY.RECONVERGENT B0, 0xd70 ?trans1;
ISETP.GT.U32.AND P5, PT, R0.reuse, 0x3f, PT ?trans1;
ISETP.GT.U32.AND P4, PT, R0.reuse, 0x1f, PT ?trans1;
ISETP.GT.U32.AND P3, PT, R0.reuse, 0xf, PT ?trans1;
ISETP.GT.U32.AND P2, PT, R0.reuse, 0x7, PT ?trans1;
ISETP.GT.U32.AND P1, PT, R0.reuse, 0x3, PT ?trans1;
ISETP.GT.U32.AND P0, PT, R0, 0x1, PT ?trans1;
ULEA UR5, UR6, UR5, 0x18 &req={0} ?trans1;
ULEA UR4, UR6, UR4, 0x18 ?WAIT5_END_GROUP;
LEA R6, R0.reuse, UR5, 0x2 ?trans2;
LEA R7, R0, UR4, 0x2 ?WAIT3_END_GROUP;
STS [R6], R9 &rd=0x0 ?trans4;
STS [R7], R8 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans8;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P6 BRA 0xd60 &req={0} ?trans5;
LDS R2, [R6] ?trans4;
LDS R3, [R6+0x200] &wr=0x0 ?trans2;
ISETP.GE.AND P6, PT, R2, R3, PT &req={0} ?WAIT13_END_GROUP;
@P6 STS [R6], R3 ?trans4;
LDS R2, [R7] ?trans4;
LDS R4, [R7+0x200] &wr=0x0 ?trans2;
ISETP.GT.AND P6, PT, R2, R4, PT &req={0} ?WAIT13_END_GROUP;
@!P6 STS [R7], R4 &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.NE.AND P6, PT, R0, RZ, PT ?WAIT5_END_GROUP;
BSSY.RECONVERGENT B0, 0xe40 ?trans4;
@P5 BRA 0xe30 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x100] &wr=0x1 ?trans2;
ISETP.GE.AND P5, PT, R0, R3, PT &req={1} ?WAIT13_END_GROUP;
@P5 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x100] &wr=0x1 ?trans2;
ISETP.GT.AND P5, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P5 STS [R7], R2 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xf00 ?trans4;
@P4 BRA 0xef0 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x80] &wr=0x2 ?trans2;
ISETP.GE.AND P4, PT, R0, R3, PT &req={2} ?WAIT13_END_GROUP;
@P4 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x80] &req={1} &wr=0x1 ?trans2;
ISETP.GT.AND P4, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P4 STS [R7], R2 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0xfc0 ?trans4;
@P3 BRA 0xfb0 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x40] &wr=0x3 ?trans2;
ISETP.GE.AND P3, PT, R0, R3, PT &req={3} ?WAIT13_END_GROUP;
@P3 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x40] &req={2,1} &wr=0x1 ?trans2;
ISETP.GT.AND P3, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P3 STS [R7], R2 &rd=0x3 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1080 ?trans4;
@P2 BRA 0x1070 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x20] &wr=0x4 ?trans2;
ISETP.GE.AND P2, PT, R0, R3, PT &req={4} ?WAIT13_END_GROUP;
@P2 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x20] &req={3,2,1} &wr=0x1 ?trans2;
ISETP.GT.AND P2, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P2 STS [R7], R2 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1140 ?trans4;
@P1 BRA 0x1130 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x10] &wr=0x5 ?trans2;
ISETP.GE.AND P1, PT, R0, R3, PT &req={5} ?WAIT13_END_GROUP;
@P1 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x10] &req={4,3,2,1} &wr=0x1 ?trans2;
ISETP.GT.AND P1, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P1 STS [R7], R2 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
BSSY.RECONVERGENT B0, 0x1200 ?trans4;
@P0 BRA 0x11f0 ?trans5;
LDS R0, [R6] ?trans4;
LDS R3, [R6+0x8] &wr=0x5 ?trans2;
ISETP.GE.AND P0, PT, R0, R3, PT &req={5} ?WAIT13_END_GROUP;
@P0 STS [R6], R3 ?trans4;
LDS R0, [R7] ?trans4;
LDS R2, [R7+0x8] &req={4,3,2,1} &wr=0x1 ?trans2;
ISETP.GT.AND P0, PT, R0, R2, PT &req={1} ?WAIT13_END_GROUP;
@!P0 STS [R7], R2 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P6 EXIT ?trans5;
LDS R0, [R6] ?trans1;
LDC.64 R2, c[0x0][0x388] &req={4,3,2,1} &wr=0x1 ?trans8;
LDC.64 R4, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
LDS R9, [UR4+0x404] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R0, R9, PT &req={2} ?WAIT13_END_GROUP;
@P0 STS [R6], R9 ?trans4;
LDS R0, [R7] ?trans4;
LDS R8, [UR4+0x4] &wr=0x2 ?trans2;
ISETP.GT.AND P0, PT, R0, R8, PT &req={2} ?WAIT13_END_GROUP;
@!P0 STS [R7], R8 ?trans4;
LDS R11, [UR4+0x400] &wr=0x1 ?trans4;
LDS R13, [UR4] &wr=0x0 ?trans4;
STG.E desc[UR8][R2.64], R11 &req={1} ?trans4;
STG.E desc[UR8][R4.64], R13 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x1310;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: findMinMaxInMatrix(int*, int*, int*, int)
_Z18findMinMaxInMatrixPiS_S_i:
s_load_b32 s3, s[0:1], 0x18
s_mov_b32 s4, exec_lo
s_waitcnt lgkmcnt(0)
s_ashr_i32 s2, s3, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshr_b32 s2, s2, 24
s_add_i32 s2, s3, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_ashr_i32 s2, s2, 8
v_mov_b32_e32 v6, s2
v_cmpx_eq_u32_e32 0xff, v0
s_lshl_b32 s5, s2, 8
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_sub_i32 s3, s3, s5
s_add_i32 s3, s2, s3
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v6, s3
s_or_b32 exec_lo, exec_lo, s4
s_load_b128 s[4:7], s[0:1], 0x0
v_mul_i32_i24_e32 v1, s2, v0
s_load_b64 s[2:3], s[0:1], 0x10
s_mov_b32 s8, 0
s_mov_b32 s1, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_mov_b32_e32 v5, v4
v_cmpx_lt_i32_e32 0, v6
s_cbranch_execz .LBB0_6
v_add_co_u32 v2, vcc_lo, s4, v2
v_dual_mov_b32 v5, v4 :: v_dual_add_nc_u32 v6, v6, v1
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_4:
global_load_b32 v7, v[2:3], off
v_add_nc_u32_e32 v1, 1, v1
v_add_co_u32 v2, vcc_lo, v2, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ge_i32_e32 vcc_lo, v1, v6
s_or_b32 s8, vcc_lo, s8
s_waitcnt vmcnt(0)
v_max_i32_e32 v8, v7, v4
v_cmp_lt_i32_e64 s0, v7, v5
v_min_i32_e32 v5, v7, v5
s_delay_alu instid0(VALU_DEP_2)
v_cndmask_b32_e64 v4, v8, v4, s0
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s8
.LBB0_6:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_or_b32 exec_lo, exec_lo, s1
v_lshlrev_b32_e32 v1, 2, v0
s_movk_i32 s0, 0x100
v_add_nc_u32_e32 v2, 0x400, v1
ds_store_2addr_stride64_b32 v1, v4, v5 offset1:4
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
.LBB0_7:
s_lshr_b32 s0, s0, 1
s_mov_b32 s1, exec_lo
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
v_cmpx_gt_u32_e64 s0, v0
s_cbranch_execz .LBB0_12
v_lshl_add_u32 v3, s0, 2, v2
s_mov_b32 s4, exec_lo
ds_load_b32 v4, v2
ds_load_b32 v3, v3
s_waitcnt lgkmcnt(0)
v_cmpx_ge_i32_e64 v4, v3
s_cbranch_execz .LBB0_10
ds_store_b32 v2, v3
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s4
v_lshl_add_u32 v3, s0, 2, v1
ds_load_b32 v4, v1
ds_load_b32 v3, v3
s_waitcnt lgkmcnt(0)
v_cmp_le_i32_e32 vcc_lo, v4, v3
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_12
ds_store_b32 v1, v3
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s1
s_cmp_lg_u32 s0, 1
s_cbranch_scc1 .LBB0_7
s_mov_b32 s0, exec_lo
v_cmpx_eq_u32_e32 0, v0
s_cbranch_execz .LBB0_15
v_mov_b32_e32 v2, 0
ds_load_2addr_stride64_b32 v[0:1], v2 offset1:4
s_waitcnt lgkmcnt(0)
s_clause 0x1
global_store_b32 v2, v1, s[6:7]
global_store_b32 v2, v0, s[2:3]
.LBB0_15:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| findMinMaxInMatrix | 7,340 | 1,673 | stackv2-00000-of-00015 |
// Demangled: calculate(long long*, long long, long long, long long, long long*, long long, long long)
Function : _Z9calculatePxxxxS_xx
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_CTAID.X &wr=0x1 ?trans7;
LDC.64 R8, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans1;
LDCU.128 UR8, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD R5, R5, UR4, R0 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x388] &wr=0x1 ?trans3;
IMAD R7, R5, R9, RZ &req={2} ?WAIT2_END_GROUP;
IMAD.WIDE.U32 R2, R5, R8, UR8 &req={3} ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, R3, R7, RZ ?WAIT5_END_GROUP;
IADD.64 R2, R2, UR10 ?WAIT4_END_GROUP;
IADD.64 R2, R2, -0x1 ?WAIT6_END_GROUP;
ISETP.GT.S64.AND P0, PT, R2, UR4, PT &req={1} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE.U32 R2, R5, R8, UR10 ?trans1;
LDC.64 R12, c[0x0][0x3b0] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x2 ?trans3;
IADD3 R3, PT, PT, R7, R3, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x1 ?trans1;
LEA R10, P0, R2, UR4, 0x3 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R2, UR5, R3, 0x3, P0 ?trans2;
LEA R2, P0, R8, R10, 0x3 ?WAIT3_END_GROUP;
LDG.E.64 R6, desc[UR8][R10.64] &req={2} &wr=0x2 ?trans1;
LEA.HI.X R3, R8, R11, R9, 0x3, P0 ?WAIT5_END_GROUP;
LDG.E.64 R8, desc[UR8][R2.64+-0x8] &wr=0x2 ?trans1;
ISETP.NE.S64.AND P0, PT, R12, UR6, PT &req={1} ?WAIT3_END_GROUP;
LOP3.LUT R4, R5, 0x1, RZ, 0xc0, !PT ?trans1;
HFMA2 R5, -RZ, RZ, 0, 0 ?trans2;
ISETP.EQ.S64.OR P1, PT, RZ, UR10, P0 ?WAIT3_END_GROUP;
ISETP.NE.U64.AND P2, PT, R4, 0x1, PT ?trans2;
IADD.64 R4, R2, -0x8 ?WAIT4_END_GROUP;
SEL.64 R4, R4, R10, !P2 ?WAIT3_END_GROUP;
LOP3.LUT R6, R8, R6, RZ, 0x3c, !PT &req={2} ?trans2;
LOP3.LUT R7, R9, R7, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R4.64], R6 &rd=0x0 ?trans1;
@P1 BRA 0x310 ?trans5;
LDCU.64 UR6, c[0x0][0x398] &wr=0x1 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans2;
LDG.E.64 R4, desc[UR8][R2.64] &req={2,0} &wr=0x2 ?trans1;
ULEA UR4, UP0, UR6, UR4, 0x3 &req={1} ?WAIT4_END_GROUP;
ULEA.HI.X UR5, UR6, UR5, UR7, 0x3, UP0 ?trans2;
MOV R6, UR4 ?WAIT4_END_GROUP;
MOV R7, UR5 ?WAIT6_END_GROUP;
LDG.E.64 R6, desc[UR8][R6.64] &wr=0x2 ?trans2;
LOP3.LUT R4, R6, R4, RZ, 0x3c, !PT &req={2} ?trans2;
LOP3.LUT R5, R7, R5, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
STG.E.64 desc[UR8][R2.64], R4 &rd=0x1 ?trans2;
@P0 EXIT ?trans5;
LDC.64 R4, c[0x0][0x380] &req={1,0} &wr=0x0 ?trans2;
LDG.E.64 R4, desc[UR8][R4.64] &req={0} &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x3a0] &wr=0x2 ?trans2;
STG.E.64 desc[UR8][R2.64], R4 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x370;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calculate(long long*, long long, long long, long long, long long*, long long, long long)
_Z9calculatePxxxxS_xx:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x44
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_add_u32 s2, s10, -1
s_addc_u32 s3, s11, -1
v_mad_u64_u32 v[2:3], null, s8, v1, s[8:9]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v0, v3
v_mad_u64_u32 v[3:4], null, s9, v1, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mov_b32_e32 v0, v3
v_add_co_u32 v3, vcc_lo, s2, v2
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v0, vcc_lo
v_cmpx_ge_i64_e64 s[6:7], v[3:4]
s_cbranch_execz .LBB0_5
v_mad_u64_u32 v[3:4], null, v1, s8, 0
s_lshl_b64 s[2:3], s[10:11], 3
s_load_b256 s[12:19], s[0:1], 0x20
s_add_u32 s6, s2, s4
s_addc_u32 s7, s3, s5
s_cmp_eq_u64 s[10:11], 0
s_cselect_b32 s1, -1, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, v1, s9, v[4:5]
v_dual_mov_b32 v4, v5 :: v_dual_and_b32 v1, 1, v1
v_add_co_u32 v5, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v0, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 3, v[3:4]
s_waitcnt lgkmcnt(0)
s_cmp_eq_u64 s[14:15], s[16:17]
v_lshlrev_b64 v[4:5], 3, v[5:6]
s_cselect_b32 s0, -1, 0
s_cmp_lg_u64 s[14:15], s[16:17]
v_add_co_u32 v6, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v4
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v5, vcc_lo
s_clause 0x1
global_load_b64 v[8:9], v[6:7], off
global_load_b64 v[10:11], v[3:4], off offset:-8
v_add_co_u32 v0, vcc_lo, v3, -8
v_add_co_ci_u32_e32 v3, vcc_lo, -1, v4, vcc_lo
v_mov_b32_e32 v2, 0
s_cselect_b32 s6, -1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_or_b32 s1, s1, s6
v_cmp_eq_u64_e32 vcc_lo, 0, v[1:2]
v_dual_cndmask_b32 v1, v3, v7 :: v_dual_cndmask_b32 v0, v0, v6
s_and_b32 vcc_lo, exec_lo, s1
s_waitcnt vmcnt(0)
v_xor_b32_e32 v4, v11, v9
v_xor_b32_e32 v3, v10, v8
global_store_b64 v[0:1], v[3:4], off
s_cbranch_vccnz .LBB0_3
s_add_u32 s2, s4, s2
s_addc_u32 s3, s5, s3
s_clause 0x1
global_load_b64 v[0:1], v2, s[4:5]
global_load_b64 v[3:4], v2, s[2:3]
s_waitcnt vmcnt(0)
v_xor_b32_e32 v0, v3, v0
v_xor_b32_e32 v1, v4, v1
global_store_b64 v2, v[0:1], s[4:5]
.LBB0_3:
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_5
v_mov_b32_e32 v2, 0
global_load_b64 v[0:1], v2, s[4:5]
s_waitcnt vmcnt(0)
global_store_b64 v2, v[0:1], s[12:13]
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calculate | 1,526 | 1,573 | stackv2-00000-of-00015 |
// Demangled: mult_matrices_kernel(int*, int*, int*, dim2, int)
Function : _Z20mult_matrices_kernelPiS_S_4dim2i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x2 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x3 ?trans7;
LDC R3, c[0x0][0x364] &wr=0x1 ?trans2;
IMAD R2, R3, UR4, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={3} ?WAIT13_END_GROUP;
@P0 EXIT &req={2,0} ?trans5;
S2R R0, SR_TID.X &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
S2UR UR9, SR_CTAID.X &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR12, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x0 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans1;
LDCU UR5, c[0x0][0x374] &wr=0x4 ?trans1;
ISETP.LT.AND P0, PT, RZ, UR8, PT &req={1} ?trans1;
UIMAD UR6, UR6, UR4, URZ &req={2} ?trans1;
IMAD R0, R3, UR9, R0 &req={0} ?trans1;
UIMAD UR7, UR7, UR5, URZ &req={4} ?WAIT10_END_GROUP;
@P0 BRA 0x280 &req={3} ?trans5;
LDC R8, c[0x0][0x39c] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x230 ?trans1;
ISETP.GE.AND P0, PT, R0, R8, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x220 ?trans5;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
MOV R3, R0 ?WAIT7_END_GROUP;
IMAD R5, R2, R8, R3 ?trans1;
IADD3 R3, PT, PT, R3, UR6, RZ ?WAIT3_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R6 &req={0} ?trans2;
ISETP.GE.AND P0, PT, R3, R8, PT ?WAIT3_END_GROUP;
STG.E desc[UR12][R4.64], RZ &rd=0x1 ?trans10;
@!P0 BRA 0x1c0 &req={1} ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R2, UR7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR4, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x160 ?trans5;
EXIT ?trans5;
LDCU UR11, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
ULOP3.LUT UR9, UR8, 0x7ffffff8, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR8, UR8, 0x7, URZ, 0xc0, !UPT ?WAIT3_END_GROUP;
UIADD3 UR9, UPT, UPT, -UR9, URZ, URZ ?trans1;
USHF.R.S32.HI UR10, URZ, 0x1f, UR11 &req={0} ?trans2;
MOV R8, UR11 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x10, URZ &req={1} ?WAIT3_END_GROUP;
MOV R9, UR10 ?WAIT9_END_GROUP;
LDCU UR10, c[0x0][0x39c] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0xd40 ?trans1;
ISETP.GE.AND P0, PT, R0, UR10, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0xd30 &req={3,2,1} ?trans5;
LDCU UR10, c[0x0][0x3a0] &wr=0x0 ?trans1;
MOV R3, R0 ?trans1;
IMAD R4, R2, UR10, RZ &req={0} ?WAIT7_END_GROUP;
LDC R6, c[0x0][0x39c] &wr=0x0 ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 &req={3,2,1} ?trans1;
ISETP.NE.AND P0, PT, RZ, UR8, PT ?trans1;
MOV R37, RZ ?WAIT5_END_GROUP;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans8;
LDC R5, c[0x0][0x3a0] &wr=0x2 ?trans1;
IMAD R7, R2, R6, R3 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R10, R7, 0x4, R10 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], RZ &rd=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R5, 0x8, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x8e0 &req={0} ?trans5;
SHF.R.S32.HI R9, RZ, 0x1f, R6 ?trans1;
MOV R8, R6 ?trans1;
MOV R29, RZ ?trans1;
MOV R34, R4 ?trans1;
MOV R7, UR9 ?trans1;
MOV R35, R3 ?trans1;
IADD.64 R12, R8, R8 ?WAIT4_END_GROUP;
IADD.64 R14, R8, R12 ?WAIT3_END_GROUP;
SHF.L.U64.HI R13, R12, 0x2, R13 ?trans1;
IADD.64 R16, R8, R14 ?trans2;
IMAD.SHL.U32 R12, R12, 0x4, RZ ?trans1;
SHF.L.U64.HI R15, R14, 0x2, R15 ?trans1;
IADD.64 R18, R8, R16 ?trans2;
IMAD.SHL.U32 R14, R14, 0x4, RZ ?trans1;
SHF.L.U64.HI R17, R16, 0x2, R17 ?trans1;
IADD.64 R20, R8, R18 ?trans2;
IMAD.SHL.U32 R16, R16, 0x4, RZ ?trans1;
SHF.L.U64.HI R19, R18, 0x2, R19 ?trans1;
IADD.64 R22, R8, R20 ?WAIT2_END_GROUP;
IMAD.SHL.U32 R18, R18, 0x4, RZ ?trans1;
SHF.L.U64.HI R21, R20.reuse, 0x2, R21 ?trans1;
IMAD.SHL.U32 R20, R20, 0x4, RZ ?trans1;
SHF.L.U64.HI R23, R22.reuse, 0x2, R23 ?trans1;
IMAD.SHL.U32 R22, R22, 0x4, RZ ?WAIT7_END_GROUP;
LDC.64 R24, c[0x0][0x388] &wr=0x0 ?trans1;
HFMA2 R33, -RZ, RZ, 0, 2.384185791015625e-07 ?WAIT5_END_GROUP;
IMAD.WIDE R32, R34, R33, UR4 ?WAIT6_END_GROUP;
LDG.E R32, desc[UR12][R32.64+-0x10] &wr=0x2 ?trans1;
IMAD.WIDE R24, R35, 0x4, R24 &req={0} ?WAIT5_END_GROUP;
LDG.E R26, desc[UR12][R24.64] &wr=0x2 ?trans1;
MOV R27, 0x4 ?trans1;
IMAD R36, R32, R26, R29 &req={2,1} ?trans2;
IMAD.WIDE R28, R6, 0x4, R24 ?WAIT4_END_GROUP;
IMAD.WIDE R26, R34, R27, UR4 ?trans1;
STG.E desc[UR12][R10.64], R36 &rd=0x0 ?trans4;
LDG.E R28, desc[UR12][R28.64] &wr=0x0 ?trans4;
LDG.E R31, desc[UR12][R26.64+-0xc] &wr=0x0 ?trans2;
IMAD R36, R31, R28, R36 &req={0} ?trans1;
IADD.64 R30, R24, R12 ?WAIT4_END_GROUP;
STG.E desc[UR12][R10.64], R36 &rd=0x0 ?trans4;
LDG.E R30, desc[UR12][R30.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR12][R26.64+-0x8] &wr=0x2 ?trans2;
IMAD R29, R33, R30, R36 &req={2} ?trans1;
IADD.64 R32, R24, R14 ?WAIT4_END_GROUP;
STG.E desc[UR12][R10.64], R29 &rd=0x1 ?trans4;
LDG.E R32, desc[UR12][R32.64] &wr=0x0 ?trans4;
LDG.E R28, desc[UR12][R26.64+-0x4] &wr=0x0 ?trans2;
IMAD R36, R28, R32, R29 &req={0} ?trans1;
IADD.64 R28, R24, R16 &req={1} ?WAIT4_END_GROUP;
STG.E desc[UR12][R10.64], R36 &rd=0x0 ?trans4;
LDG.E R28, desc[UR12][R28.64] &wr=0x2 ?trans4;
LDG.E R31, desc[UR12][R26.64] &wr=0x2 ?trans2;
IMAD R28, R31, R28, R36 &req={2} ?trans1;
IADD.64 R30, R24, R18 ?WAIT4_END_GROUP;
STG.E desc[UR12][R10.64], R28 &rd=0x1 ?trans4;
LDG.E R30, desc[UR12][R30.64] &wr=0x2 ?trans4;
LDG.E R33, desc[UR12][R26.64+0x4] &wr=0x2 ?trans2;
IMAD R31, R33, R30, R28 &req={2} ?trans1;
IADD.64 R32, R24, R20 ?WAIT4_END_GROUP;
STG.E desc[UR12][R10.64], R31 &rd=0x1 ?trans4;
LDG.E R32, desc[UR12][R32.64] &wr=0x2 ?trans4;
LDG.E R36, desc[UR12][R26.64+0x8] &req={0} &wr=0x2 ?trans1;
IADD.64 R24, R24, R22 ?trans2;
IMAD R36, R36, R32, R31 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R36 &rd=0x1 ?trans4;
LDG.E R29, desc[UR12][R26.64+0xc] &wr=0x2 ?trans4;
LDG.E R24, desc[UR12][R24.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R7, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R7, RZ, PT ?trans1;
IADD3 R37, PT, PT, R37, 0x8, RZ ?trans2;
IADD3 R34, PT, PT, R34, 0x8, RZ ?trans1;
IMAD R35, R6, 0x8, R35 ?trans2;
IMAD R29, R29, R24, R36 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R29 &rd=0x1 ?trans2;
@P1 BRA 0x5b0 ?trans5;
@!P0 BRA 0xd00 ?trans5;
UIADD3 UR10, UPT, UPT, UR8, -0x1, URZ ?trans1;
LOP3.LUT P0, R22, R5, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
UISETP.GE.U32.AND UP0, UPT, UR10, 0x3, UPT ?WAIT6_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P1 BRA 0xb20 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R7, PT, PT, R4, R37, RZ ?trans1;
IMAD R17, R37, R6, R3 ?WAIT6_END_GROUP;
LDC.64 R14, c[0x0][0x388] &wr=0x2 ?trans1;
IMAD.WIDE R12, R7, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
LDG.E R16, desc[UR12][R12.64] &wr=0x3 ?trans1;
IMAD.WIDE R14, R17, 0x4, R14 &req={2} ?WAIT5_END_GROUP;
LDG.E R7, desc[UR12][R14.64] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, 0x4, R14 ?WAIT4_END_GROUP;
IMAD R7, R16, R7, R29 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R7 &rd=0x0 ?trans4;
LDG.E R18, desc[UR12][R18.64] &wr=0x2 ?trans4;
LDG.E R24, desc[UR12][R12.64+0x4] &wr=0x2 ?trans1;
IADD.64 R16, R8, R8 ?WAIT5_END_GROUP;
LEA R20, P1, R16, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R16, R15, R17, 0x2, P1 ?trans1;
IMAD R23, R24, R18, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R23 &rd=0x2 ?trans4;
LDG.E R20, desc[UR12][R20.64] &wr=0x0 ?trans4;
LDG.E R24, desc[UR12][R12.64+0x8] &wr=0x0 ?trans1;
IADD.64 R16, R8, R16 ?WAIT5_END_GROUP;
LEA R14, P1, R16, R14, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R16, R15, R17, 0x2, P1 ?trans1;
IMAD R7, R24, R20, R23 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R7 &rd=0x2 ?trans4;
LDG.E R16, desc[UR12][R12.64+0xc] &wr=0x3 ?trans4;
LDG.E R14, desc[UR12][R14.64] &wr=0x3 ?trans1;
IADD3 R37, PT, PT, R37, 0x4, RZ ?trans1;
IMAD R29, R16, R14, R7 &req={3,1} ?WAIT5_END_GROUP;
STG.E desc[UR12][R10.64], R29 &rd=0x2 ?trans2;
@!P0 BRA 0xd00 ?trans5;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R22, 0x1, PT ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x388] &wr=0x3 ?trans6;
@P0 IADD3 R15, PT, PT, R4, R37, RZ ?trans1;
@P0 IMAD R7, R37, R6, R3 &req={2} ?trans1;
LDC.64 R20, c[0x0][0x388] &wr=0x2 ?trans3;
@P0 IMAD.WIDE R14, R15, 0x4, R12 &req={0} ?WAIT5_END_GROUP;
@P0 LDG.E R12, desc[UR12][R14.64] &wr=0x4 ?trans1;
@P0 IMAD.WIDE R16, R7, 0x4, R16 &req={3} ?WAIT5_END_GROUP;
@P0 LDG.E R7, desc[UR12][R16.64] &wr=0x4 ?trans1;
@P0 IMAD.WIDE R18, R6, 0x4, R16 ?trans1;
LOP3.LUT R5, R5, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P1, PT, R5, 0x1, PT ?trans1;
@P0 IMAD R7, R12, R7, R29 &req={4} ?trans2;
LDC.64 R12, c[0x0][0x380] &wr=0x0 ?trans3;
@P0 STG.E desc[UR12][R10.64], R7 &rd=0x3 ?trans4;
@P0 LDG.E R22, desc[UR12][R14.64+0x4] &rd=0x2 &wr=0x4 ?trans4;
@P0 LDG.E R18, desc[UR12][R18.64] &wr=0x4 ?trans1;
@P0 IADD3 R37, PT, PT, R37, 0x2, RZ ?WAIT4_END_GROUP;
@!P1 IADD3 R5, PT, PT, R4, R37, RZ ?trans1;
@!P1 IMAD R37, R37, R6, R3 ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R14, R37, 0x4, R20 &req={2} ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R12, R5, 0x4, R12 &req={0} ?WAIT4_END_GROUP;
@P0 IMAD R29, R22, R18, R7 &req={4,1} ?WAIT5_END_GROUP;
@P0 STG.E desc[UR12][R10.64], R29 &rd=0x3 ?trans4;
@!P1 LDG.E R12, desc[UR12][R12.64] &wr=0x2 ?trans4;
@!P1 LDG.E R14, desc[UR12][R14.64] &wr=0x2 ?trans2;
@!P1 IMAD R5, R12, R14, R29 &req={2} ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR12][R10.64], R5 &rd=0x3 ?trans2;
IADD3 R3, PT, PT, R3, UR6, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R6, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x380 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR10, c[0x0][0x398] &wr=0x0 ?trans1;
IADD3 R2, PT, PT, R2, UR7, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR10, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x310 ?trans5;
EXIT ?trans5;
BRA 0xd90;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mult_matrices_kernel(int*, int*, int*, dim2, int)
_Z20mult_matrices_kernelPiS_S_4dim2i:
s_clause 0x1
s_load_b32 s8, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x18
v_bfe_u32 v3, v0, 10, 10
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_mov_b32 s7, exec_lo
s_lshr_b32 s12, s8, 16
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s12, v[3:4]
v_cmpx_gt_i32_e64 s4, v1
s_cbranch_execz .LBB0_9
s_clause 0x1
s_load_b32 s7, s[2:3], 0xc
s_load_b64 s[16:17], s[2:3], 0x0
s_clause 0x1
s_load_b128 s[8:11], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v0, 0x3ff, v0
v_mov_b32_e32 v14, 0
s_mov_b32 s18, s5
s_mov_b32 s1, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s7, 0xffff
s_cmp_gt_i32 s6, 0
v_mad_u64_u32 v[2:3], null, s14, s0, v[0:1]
v_mul_lo_u32 v3, s6, v1
s_mul_i32 s7, s16, s0
s_cselect_b32 s14, -1, 0
s_ashr_i32 s19, s5, 31
s_mul_i32 s15, s17, s12
s_lshl_b64 s[12:13], s[18:19], 2
s_delay_alu instid0(VALU_DEP_2)
v_cmp_gt_i32_e64 s0, s5, v2
s_mul_i32 s16, s15, s6
.LBB0_2:
s_delay_alu instid0(VALU_DEP_1)
s_and_saveexec_b32 s17, s0
s_cbranch_execz .LBB0_8
v_ashrrev_i32_e32 v4, 31, v3
v_mul_lo_u32 v15, v1, s5
v_mov_b32_e32 v6, v2
s_mov_b32 s18, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[3:4]
v_add_co_u32 v4, vcc_lo, s8, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
.LBB0_4:
v_add_nc_u32_e32 v7, v6, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v8, 31, v7
v_lshlrev_b64 v[8:9], 2, v[7:8]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v8, vcc_lo, s2, v8
v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
s_and_not1_b32 vcc_lo, exec_lo, s14
global_store_b32 v[8:9], v14, off
s_cbranch_vccnz .LBB0_7
v_ashrrev_i32_e32 v7, 31, v6
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v13, v5
v_mov_b32_e32 v12, v4
s_mov_b32 s19, s6
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[10:11], 2, v[6:7]
v_add_co_u32 v10, vcc_lo, s10, v10
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v11, vcc_lo, s11, v11, vcc_lo
.LBB0_6:
global_load_b32 v7, v[12:13], off
global_load_b32 v18, v[10:11], off
v_add_co_u32 v10, vcc_lo, v10, s12
v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
v_add_co_u32 v12, vcc_lo, v12, 4
v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
s_add_i32 s19, s19, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
s_cmp_eq_u32 s19, 0
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[16:17], null, v18, v7, v[0:1]
v_mov_b32_e32 v0, v16
global_store_b32 v[8:9], v16, off
s_cbranch_scc0 .LBB0_6
.LBB0_7:
v_add_nc_u32_e32 v6, s7, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s5, v6
s_or_b32 s18, vcc_lo, s18
s_and_not1_b32 exec_lo, exec_lo, s18
s_cbranch_execnz .LBB0_4
.LBB0_8:
s_or_b32 exec_lo, exec_lo, s17
v_add_nc_u32_e32 v1, s15, v1
v_add_nc_u32_e32 v3, s16, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s4, v1
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| mult_matrices_kernel | 5,767 | 1,890 | stackv2-00000-of-00015 |
// Demangled: descendGradient(int, float*, float*, float*, float*)
Function : _Z15descendGradientiPfS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x380] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x3a0] &wr=0x3 ?trans1;
HFMA2 R7, -RZ, RZ, 3.79296875, 0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans1;
STG.E desc[UR6][R4.64], R7 &req={3} &rd=0x3 ?trans1;
IMAD R2, R3, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={3,0} ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x370] &wr=0x1 ?trans1;
IMAD R5, R2, 0x3, RZ ?trans1;
MOV R7, 0x43960000 ?trans1;
UMOV UR4, 0x400 ?WAIT4_END_GROUP;
LDC.64 R14, c[0x0][0x398] &wr=0x2 ?trans8;
LDC.64 R12, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD R4, R3, UR8, RZ &req={1} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?trans1;
IADD.64 R14, R14, 0x8 &req={2} ?WAIT2_END_GROUP;
IMAD.WIDE R12, R5, 0x4, R12 &req={3} ?WAIT3_END_GROUP;
LEA R5, R0, UR4, 0x2 ?WAIT7_END_GROUP;
LDG.E R20, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R21, desc[UR6][R12.64+0x4] &wr=0x3 ?trans1;
MOV R8, 0x7fc00000 &req={0} ?trans1;
LDC.64 R18, c[0x0][0x3a0] &wr=0x0 ?trans2;
LDG.E R6, desc[UR6][R12.64+0x8] &rd=0x1 &wr=0x5 ?trans6;
LDC.64 R16, c[0x0][0x390] &wr=0x4 ?trans1;
FFMA R23, R8, +QNAN , R7 ?trans1;
HFMA2 R29, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
STG.E desc[UR6][R18.64], R23 &req={0} &rd=0x1 ?trans1;
F2I.TRUNC.NTZ R20, R20 &req={2} &wr=0x0 ?trans1;
F2I.TRUNC.NTZ R8, R21 &req={3} &wr=0x2 ?trans1;
IMAD.SHL.U32 R7, R20, 0x20, RZ &req={0} ?WAIT5_END_GROUP;
MOV R9, R7 ?trans1;
IMAD.SHL.U32 R8, R8, 0x20, RZ &req={2} ?WAIT5_END_GROUP;
MOV R10, R8 &req={4,1} ?WAIT7_END_GROUP;
IMAD.WIDE R18, R9, 0x4, R16 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R20, R10, 0x4, R14.reuse ?trans1;
LDG.E R22, desc[UR6][R18.64] &wr=0x2 ?trans4;
LDG.E R26, desc[UR6][R20.64+-0x8] &wr=0x3 ?trans1;
UMOV.64 UR4, 0x3f947ae147ae147b ?trans1;
UMOV.64 UR8, 0x3f847ae147ae147b ?trans1;
FMUL R30, R22, +QNAN &req={2} ?trans1;
IMAD.WIDE R22, R9, 0x4, R14 ?trans1;
F2F.F64.F32 R26, R26 &req={3} ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R30 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R26, -UR4, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R24, UR8, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R33, R32 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR6][R20.64+-0x8], R33 &req={0} &rd=0x0 ?trans4;
LDG.E R24, desc[UR6][R22.64+-0x8] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64] &wr=0x3 ?trans4;
LDG.E R36, desc[UR6][R18.64+0x4] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R33 ?trans1;
FMUL R34, R24, +QNAN &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R34 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, -UR4, R24 &req={1} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R35 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R26, UR8, R24 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R31, R30 &req={1} &wr=0x1 ?trans2;
STG.E desc[UR6][R18.64], R31 &req={1} &rd=0x1 ?trans4;
LDG.E R37, desc[UR6][R20.64+-0x4] &wr=0x2 ?trans1;
FMUL R36, R36, +QNAN &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R36 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R37 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R26, -UR4, R24 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R24, UR8, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R33, R32 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR6][R20.64+-0x4], R33 &req={0} &rd=0x0 ?trans4;
LDG.E R24, desc[UR6][R22.64+-0x4] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64+0x4] &wr=0x3 ?trans4;
LDG.E R36, desc[UR6][R18.64+0x8] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R33 ?trans1;
FMUL R34, R24, +QNAN &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R34 &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, -UR4, R24 &req={2} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R35 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R26, UR8, R24 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R31, R30 &req={1} &wr=0x1 ?trans2;
STG.E desc[UR6][R18.64+0x4], R31 &req={1} &rd=0x1 ?trans4;
LDG.E R37, desc[UR6][R20.64] &wr=0x2 ?trans1;
FMUL R36, R36, +QNAN &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R36 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R37 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R26, -UR4, R24 &req={2} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R32, R24, UR8, R26 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R33, R32 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR6][R20.64], R33 &req={0} ?trans4;
LDG.E R26, desc[UR6][R22.64] &wr=0x2 ?trans4;
LDG.E R35, desc[UR6][R18.64+0x8] &wr=0x3 ?trans4;
LDG.E R36, desc[UR6][R18.64+0xc] &wr=0x4 ?WAIT15_END_GROUP;
NOP ?WAIT5_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R33 ?trans1;
FMUL R34, R26, +QNAN &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R34 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R24, -UR4, R26 &req={0} &rd=0x3 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R35 &req={3} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R24, UR8, R26 &req={1} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R31, R30 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR6][R18.64+0x8], R31 &req={0} &rd=0x0 ?trans4;
LDG.E R32, desc[UR6][R20.64+0x4] &wr=0x2 ?trans1;
FMUL R36, R36, +QNAN &req={4} ?WAIT15_END_GROUP;
NOP ?WAIT12_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R26, R36 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R32 &req={2} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R24, -UR4, R26 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R26, R26, UR8, R24 &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R27, R26 &req={1} &wr=0x1 ?trans2;
STG.E desc[UR6][R20.64+0x4], R27 &req={1} &rd=0x1 ?trans4;
LDG.E R22, desc[UR6][R22.64+0x4] &wr=0x2 ?trans4;
LDG.E R34, desc[UR6][R18.64+0xc] &wr=0x3 ?trans1;
IADD3 R29, PT, PT, R29, 0x4, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R29, 0x20, PT ?trans1;
IADD3 R9, PT, PT, R9, 0x4, RZ ?trans2;
IADD3 R10, PT, PT, R10, 0x4, RZ ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R30, R27 &req={0} ?trans1;
FMUL R33, R22, +QNAN &req={2} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R33 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R30, R30, -UR4, R24 &req={0} &rd=0x3 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R24, R34 &req={3} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R24, R30, UR8, R24 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R25, R24 &req={0} &wr=0x0 ?trans2;
STG.E desc[UR6][R18.64+0xc], R25 &req={0} &rd=0x1 ?trans1;
@P0 BRA 0x270 ?trans5;
ISETP.GT.AND P1, PT, R2, 0x1f, PT ?trans1;
BSSY.RECONVERGENT B0, 0x1300 ?trans1;
ISETP.GE.U32.AND P0, PT, R3, 0x2, PT ?trans1;
MOV R10, RZ ?WAIT10_END_GROUP;
@P1 BRA 0x12f0 ?trans5;
MOV R10, RZ ?trans1;
MOV R9, R2 ?WAIT7_END_GROUP;
IADD3 R19, PT, PT, R7, R9, RZ &req={1} ?WAIT5_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R16 ?WAIT6_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R4, R9, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R9, 0x20, PT ?trans1;
FFMA R10, R19, R19, R10 &req={2} ?WAIT12_END_GROUP;
@!P1 BRA 0x1280 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STS [R5], R10 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P0 BRA 0x13f0 ?trans5;
MOV R7, R3 ?WAIT7_END_GROUP;
SHF.R.U32.HI R16, RZ, 0x1, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R16, PT ?WAIT13_END_GROUP;
@!P0 IMAD R9, R16, 0x4, R5 ?trans1;
@!P0 LDS R10, [R5] &req={0} ?trans5;
@!P0 LDS R9, [R9] &wr=0x0 ?trans2;
@!P0 FADD R10, R9, R10 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R5], R10 &rd=0x2 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R7, 0x3, PT ?trans1;
MOV R7, R16 ?WAIT12_END_GROUP;
@P0 BRA 0x1340 &req={2} ?trans5;
S2UR UR5, SR_CgaCtaId &wr=0x2 ?trans1;
ISETP.GT.AND P0, PT, R2, 0x1f, PT ?trans1;
UMOV UR4, 0x400 ?trans1;
BSSY.RECONVERGENT B0, 0x1520 ?trans1;
HFMA2 R10, -RZ, RZ, 0, 0 &req={0} ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={2} ?WAIT9_END_GROUP;
LDS R7, [UR4] &wr=0x0 ?trans1;
@P0 BRA 0x1510 ?trans5;
LDC.64 R18, c[0x0][0x398] &req={1} &wr=0x1 ?trans1;
MOV R10, RZ ?trans1;
MOV R9, R2 ?WAIT7_END_GROUP;
IADD3 R17, PT, PT, R8, R9, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R16, R17, 0x4, R18 &req={1} ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R4, R9, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, 0x20, PT ?trans1;
FFMA R10, R17, R17, R10 &req={2} ?WAIT12_END_GROUP;
@!P0 BRA 0x14a0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
ISETP.GE.U32.AND P1, PT, R3, 0x2, PT ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
STS [R5], R10 &rd=0x2 ?trans4;
FSEL R28, R7, R28, !P0 &req={0} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 BRA 0x1640 &req={2} ?trans5;
MOV R7, R3 ?WAIT7_END_GROUP;
SHF.R.U32.HI R16, RZ, 0x1, R7 ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, R16, PT ?WAIT13_END_GROUP;
@!P0 IMAD R8, R16, 0x4, R5 ?trans1;
@!P0 LDS R9, [R5] ?trans5;
@!P0 LDS R8, [R8] &wr=0x0 ?trans2;
@!P0 FADD R10, R8, R9 &req={0} ?WAIT5_END_GROUP;
@!P0 STS [R5], R10 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.GT.U32.AND P0, PT, R7, 0x3, PT ?trans1;
MOV R7, R16 ?WAIT12_END_GROUP;
@P0 BRA 0x1590 &req={0} ?trans5;
LDC.64 R8, c[0x0][0x3a0] &wr=0x0 ?trans2;
LDG.E R10, desc[UR6][R8.64] &req={0} &wr=0x2 ?trans6;
S2UR UR5, SR_CgaCtaId &wr=0x0 ?trans1;
UMOV UR4, 0x400 ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?trans1;
ULEA UR4, UR5, UR4, 0x18 &req={0} ?WAIT9_END_GROUP;
LDS R19, [UR4] &req={1} &wr=0x0 ?trans3;
@P0 MOV R19, R11 &req={0} ?WAIT5_END_GROUP;
FADD R7, R28, R19 ?WAIT4_END_GROUP;
FFMA R17, R7, 0.019999999552965164185, R10 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R17 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R10, desc[UR6][R8.64] &wr=0x2 ?trans1;
F2I.TRUNC.NTZ R6, R6 &req={5} &wr=0x1 ?trans1;
MOV R11, R19 ?trans1;
I2FP.F32.S32 R7, R6 &req={1} ?WAIT5_END_GROUP;
FADD R7, R7, R10 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R7 &rd=0x0 ?trans1;
BRA 0x180 ?trans5;
BRA 0x1770;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: descendGradient(int, float*, float*, float*, float*)
_Z15descendGradientiPfS_S_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s3, s[0:1], 0x0
s_load_b256 s[4:11], s[0:1], 0x8
s_add_u32 s0, s0, 40
s_addc_u32 s1, s1, 0
v_mov_b32_e32 v9, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mov_b32_e32 v2, 0x43960000
s_mov_b32 s2, exec_lo
global_store_b32 v9, v2, s[10:11]
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_24
s_load_b32 s2, s[0:1], 0x0
v_lshl_add_u32 v1, v1, 1, v1
v_lshlrev_b32_e32 v10, 2, v0
v_mov_b32_e32 v11, 0x7fc00000
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s15, s2
s_cselect_b32 s3, 12, 18
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_mov_b32_e32 v2, s3
global_load_u16 v3, v2, s[0:1]
v_ashrrev_i32_e32 v2, 31, v1
v_cmp_eq_u32_e64 s0, 0, v0
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_mad_u64_u32 v[4:5], null, s15, v3, v[0:1]
v_mul_lo_u32 v12, s2, v3
v_add_co_u32 v5, vcc_lo, s4, v1
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v2, vcc_lo
v_readfirstlane_b32 s3, v3
v_cmp_gt_i32_e64 s1, 32, v4
v_cmp_lt_u32_e64 s2, 1, v3
.LBB0_2:
global_load_b96 v[1:3], v[5:6], off
s_mov_b64 s[4:5], 0
global_store_b32 v9, v11, s[10:11]
s_waitcnt vmcnt(0)
v_cvt_i32_f32_e32 v1, v1
v_cvt_i32_f32_e32 v2, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b32_e32 v7, 5, v1
v_lshlrev_b32_e32 v1, 5, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v8, 31, v7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[15:16], 2, v[7:8]
v_lshlrev_b64 v[17:18], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v2, vcc_lo, s6, v15
v_add_co_ci_u32_e32 v8, vcc_lo, s7, v16, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v15, vcc_lo, s8, v17
v_add_co_ci_u32_e32 v16, vcc_lo, s9, v18, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v17, vcc_lo, v15, s4
v_add_co_ci_u32_e32 v18, vcc_lo, s5, v16, vcc_lo
v_add_co_u32 v19, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v20, vcc_lo, s5, v8, vcc_lo
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmpk_eq_i32 s4, 0x80
global_store_b32 v[17:18], v11, off
global_store_b32 v[19:20], v11, off
s_cbranch_scc0 .LBB0_3
v_mov_b32_e32 v2, 0
s_and_saveexec_b32 s4, s1
s_cbranch_execz .LBB0_8
v_mov_b32_e32 v2, 0
v_mov_b32_e32 v8, v4
s_mov_b32 s5, 0
.LBB0_6:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v15, v7, v8
v_add_nc_u32_e32 v8, v8, v12
v_ashrrev_i32_e32 v16, 31, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_co_u32 v15, vcc_lo, s6, v15
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v16, vcc_lo, s7, v16, vcc_lo
v_cmp_lt_i32_e32 vcc_lo, 31, v8
global_load_b32 v15, v[15:16], off
s_or_b32 s5, vcc_lo, s5
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v2, v15, v15
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_6
s_or_b32 exec_lo, exec_lo, s5
.LBB0_8:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s4
s_mov_b32 s4, -1
s_mov_b32 vcc_lo, exec_lo
s_cbranch_vccz .LBB0_22
s_and_not1_b32 vcc_lo, exec_lo, s2
s_mov_b32 s4, s3
ds_store_b32 v10, v2
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_13
.LBB0_10:
s_lshr_b32 s5, s4, 1
s_mov_b32 s12, exec_lo
v_cmpx_gt_u32_e64 s5, v0
s_cbranch_execz .LBB0_12
v_lshl_add_u32 v2, s5, 2, v10
ds_load_b32 v2, v2
ds_load_b32 v7, v10
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v2, v2, v7
ds_store_b32 v10, v2
.LBB0_12:
s_or_b32 exec_lo, exec_lo, s12
s_cmp_gt_u32 s4, 3
s_mov_b32 s4, s5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_10
.LBB0_13:
ds_load_b32 v2, v9
v_mov_b32_e32 v7, 0
s_and_saveexec_b32 s4, s1
s_cbranch_execz .LBB0_17
v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v8, v4
s_mov_b32 s5, 0
.LBB0_15:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v15, v1, v8
v_ashrrev_i32_e32 v16, 31, v15
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[15:16], 2, v[15:16]
v_add_co_u32 v15, vcc_lo, s8, v15
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v16, vcc_lo, s9, v16, vcc_lo
global_load_b32 v15, v[15:16], off
s_waitcnt vmcnt(0)
v_dual_fmac_f32 v7, v15, v15 :: v_dual_add_nc_u32 v8, v8, v12
v_cmp_lt_i32_e32 vcc_lo, 31, v8
s_or_b32 s5, vcc_lo, s5
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s5
s_cbranch_execnz .LBB0_15
s_or_b32 exec_lo, exec_lo, s5
.LBB0_17:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s4
s_and_not1_b32 vcc_lo, exec_lo, s2
s_mov_b32 s4, s3
ds_store_b32 v10, v7
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_vccnz .LBB0_21
.LBB0_18:
s_lshr_b32 s5, s4, 1
s_mov_b32 s12, exec_lo
v_cmpx_gt_u32_e64 s5, v0
s_cbranch_execz .LBB0_20
v_lshl_add_u32 v1, s5, 2, v10
ds_load_b32 v1, v1
ds_load_b32 v7, v10
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v1, v1, v7
ds_store_b32 v10, v1
.LBB0_20:
s_or_b32 exec_lo, exec_lo, s12
s_cmp_gt_u32 s4, 3
s_mov_b32 s4, s5
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_cbranch_scc1 .LBB0_18
.LBB0_21:
global_load_b32 v1, v9, s[10:11]
ds_load_b32 v7, v9
v_cndmask_b32_e64 v13, v13, v2, s0
s_mov_b32 s4, 0
s_waitcnt lgkmcnt(0)
v_cndmask_b32_e64 v14, v14, v7, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_f32_e32 v2, v13, v14
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v1, 0x3ca3d70a, v2
v_cvt_i32_f32_e32 v2, v3
global_store_b32 v9, v1, s[10:11]
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
global_load_b32 v1, v9, s[10:11]
v_cvt_f32_i32_e32 v2, v2
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_add_f32_e32 v1, v1, v2
global_store_b32 v9, v1, s[10:11]
s_branch .LBB0_23
.LBB0_22:
.LBB0_23:
s_and_b32 vcc_lo, exec_lo, s4
s_cbranch_vccz .LBB0_2
.LBB0_24:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| descendGradient | 6,898 | 3,519 | stackv2-00000-of-00015 |
// Demangled: square(double*, double*)
Function : _Z6squarePdS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R5, 0x8, R6 &req={2} ?trans1;
DMUL R4, R2, R2 &req={3} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: square(double*, double*)
_Z6squarePdS_:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v2, 3, v0
s_waitcnt lgkmcnt(0)
global_load_b64 v[0:1], v2, s[2:3]
s_waitcnt vmcnt(0)
v_mul_f64 v[0:1], v[0:1], v[0:1]
global_store_b64 v2, v[0:1], s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| square | 349 | 155 | stackv2-00000-of-00015 |
// Demangled: matmul_kernel(float const*, float const*, float*, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
Function : _Z13matmul_kernelPKfS0_Pfmmmmmm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x3c0] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x3b0] &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x3b8] &wr=0x3 ?trans1;
ISETP.NE.S64.AND P0, PT, RZ, UR4, PT &req={1} ?WAIT6_END_GROUP;
ISETP.EQ.S64.OR P0, PT, R2, RZ, !P0 &req={2} ?WAIT6_END_GROUP;
ISETP.EQ.S64.OR P0, PT, R4, RZ, P0 &req={3} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR16, c[0x0][0x3b8] &wr=0x0 ?trans1;
HFMA2 R17, -RZ, RZ, 0, 0 ?trans1;
MOV R19, RZ ?trans1;
LDCU.64 UR10, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR22, c[0x0][0x358] &wr=0x2 ?trans1;
ULOP3.LUT UR4, UR16, 0x7, URZ, 0xc0, !UPT &req={0} ?trans1;
ULOP3.LUT UR5, UR16, 0x3, URZ, 0xc0, !UPT ?trans1;
ULOP3.LUT UR16, UR16, 0xfffffff8, URZ, 0xc0, !UPT ?trans1;
USHF.L.U64.HI UR25, UR10, 0x5, UR11 &req={1} ?trans1;
USHF.L.U32 UR24, UR10, 0x5, URZ ?trans1;
USHF.L.U64.HI UR11, UR10, 0x2, UR11 ?trans1;
MOV R16, UR4 ?trans1;
MOV R18, UR5 ?trans1;
USHF.L.U32 UR10, UR10, 0x2, URZ ?trans1;
UMOV.64 UR4, URZ &req={2} ?WAIT11_END_GROUP;
UMOV.64 UR6, URZ &req={5} ?WAIT5_END_GROUP;
LDCU.64 UR14, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDC.64 R6, c[0x0][0x3b8] &wr=0x1 ?trans1;
LDCU.64 UR18, c[0x0][0x390] &wr=0x2 ?trans1;
UMOV UR8, UR6 ?trans1;
UMOV UR9, UR7 ?trans1;
UIMAD UR12, UR5, UR14, URZ &req={0} ?trans1;
UIMAD.WIDE.U32 UR8, UR4, UR14, UR8 ?WAIT3_END_GROUP;
UIMAD UR12, UR4, UR15, UR12 ?trans1;
ULEA UR13, UP0, UR8, UR18, 0x2 &req={2} ?WAIT3_END_GROUP;
UIADD3 UR9, UPT, UPT, UR9, UR12, URZ ?trans1;
ISETP.GE.U64.AND P1, PT, R6, 0x8, PT &req={1} ?trans2;
MOV R2, UR13 ?trans1;
ULEA.HI.X UR9, UR8, UR19, UR9, 0x2, UP0 ?WAIT6_END_GROUP;
MOV R3, UR9 ?trans1;
UMOV.64 UR8, URZ ?trans1;
ISETP.NE.S64.AND P0, PT, R16, RZ, PT ?WAIT3_END_GROUP;
LDG.E R5, desc[UR22][R2.64] &req={5} &rd=0x0 &wr=0x5 ?trans1;
@!P1 BRA 0x680 ?trans10;
LDCU.64 UR14, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.128 UR28, c[0x0][0x380] &wr=0x2 ?trans1;
LDCU UR17, c[0x0][0x3bc] &wr=0x3 ?trans1;
UIMAD UR12, UR5, UR14, URZ &req={1} ?trans1;
UIMAD.WIDE.U32 UR8, UR4, UR14, URZ ?WAIT3_END_GROUP;
UIMAD UR13, UR4, UR15, UR12 ?trans1;
ULEA UR12, UP0, UR8, UR28, 0x2 &req={2} ?trans1;
ULEA UR14, UP1, UR6, UR30, 0x2 ?trans2;
UIADD3 UR9, UPT, UPT, UR9, UR13, URZ ?trans2;
ULEA.HI.X UR15, UR6, UR31, UR7, 0x2, UP1 ?trans2;
ULEA.HI.X UR13, UR8, UR29, UR9, 0x2, UP0 ?WAIT4_END_GROUP;
UIADD3.64 UR8, UPT, UPT, UR12, 0x10, URZ ?trans1;
MOV.64 R6, UR14 ?WAIT5_END_GROUP;
MOV.64 R8, UR8 ?trans2;
UMOV.64 UR8, URZ &req={3} ?WAIT6_END_GROUP;
LDG.E R0, desc[UR22][R8.64+-0x10] &req={2} &wr=0x2 ?trans4;
LDG.E R4, desc[UR22][R6.64] &wr=0x2 ?trans2;
FFMA R15, R0, R4, R5 &req={5,2} ?trans1;
IADD.64 R4, R6, UR10 ?WAIT4_END_GROUP;
STG.E desc[UR22][R2.64], R15 &rd=0x1 ?trans4;
LDG.E R0, desc[UR22][R8.64+-0xc] &wr=0x2 ?trans4;
LDG.E R10, desc[UR22][R4.64] &wr=0x2 ?trans2;
FFMA R21, R0, R10, R15 &req={2} ?trans1;
IADD.64 R10, R4, UR10 ?WAIT4_END_GROUP;
STG.E desc[UR22][R2.64], R21 &rd=0x2 ?trans4;
LDG.E R0, desc[UR22][R8.64+-0x8] &wr=0x3 ?trans4;
LDG.E R12, desc[UR22][R10.64] &wr=0x3 ?trans2;
FFMA R23, R0, R12, R21 &req={3} ?trans1;
IADD.64 R12, R10, UR10 ?WAIT4_END_GROUP;
STG.E desc[UR22][R2.64], R23 &rd=0x3 ?trans4;
LDG.E R0, desc[UR22][R8.64+-0x4] &wr=0x1 ?trans4;
LDG.E R14, desc[UR22][R12.64] &wr=0x1 ?trans1;
IADD.64 R4, R12, UR10 ?trans2;
FFMA R15, R0, R14, R23 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R15 &rd=0x1 ?trans4;
LDG.E R0, desc[UR22][R8.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR22][R4.64] &wr=0x2 ?trans1;
IADD.64 R10, R4, UR10 ?trans2;
FFMA R21, R0, R14, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R21 &rd=0x2 ?trans4;
LDG.E R0, desc[UR22][R8.64+0x4] &wr=0x3 ?trans4;
LDG.E R14, desc[UR22][R10.64] &wr=0x3 ?trans1;
IADD.64 R12, R10, UR10 ?trans2;
FFMA R23, R0, R14, R21 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R23 &rd=0x2 ?trans4;
LDG.E R0, desc[UR22][R8.64+0x8] &wr=0x3 ?trans4;
LDG.E R20, desc[UR22][R12.64] &wr=0x3 ?trans1;
IADD.64 R14, R12, UR10 &req={1} ?trans2;
UIADD3.64 UR8, UPT, UPT, UR8, 0x8, URZ ?WAIT4_END_GROUP;
UIADD3.64 UR12, UPT, UPT, UR8, -UR16, URZ ?trans1;
FFMA R25, R0, R20, R23 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R25 &rd=0x2 ?trans4;
LDG.E R14, desc[UR22][R14.64] &wr=0x3 ?trans4;
LDG.E R0, desc[UR22][R8.64+0xc] &rd=0x1 &wr=0x3 ?trans1;
ISETP.NE.S64.AND P1, PT, RZ, UR12, PT ?trans2;
MOV R10, UR24 ?trans1;
MOV R11, UR25 ?WAIT5_END_GROUP;
IADD.64 R6, R6, R10 ?trans2;
IADD.64 R8, R8, 0x20 &req={1} ?trans2;
FFMA R5, R0, R14, R25 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R5 &rd=0x2 ?trans1;
@P1 BRA 0x390 ?trans5;
@!P0 BRA 0xd60 ?trans5;
IADD.64 R6, R16, -0x1 ?trans2;
ISETP.NE.S64.AND P0, PT, R18, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U64.AND P1, PT, R6, 0x3, PT ?WAIT14_END_GROUP;
@!P1 BRA 0x980 ?trans5;
LDC.64 R6, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU.64 UR14, c[0x0][0x398] &wr=0x3 ?trans1;
MOV.64 R8, UR6 ?trans2;
MOV.64 R12, UR6 ?trans2;
LDCU.128 UR28, c[0x0][0x380] &wr=0x4 ?trans2;
MOV R13, R9 ?trans1;
UIMAD UR17, UR5, UR14, URZ &req={3} ?trans1;
UIMAD.WIDE.U32 UR12, UR4, UR14, UR8 ?WAIT3_END_GROUP;
UIMAD UR15, UR4, UR15, UR17 ?trans1;
IMAD R0, R6.reuse, UR9, RZ &req={1} ?trans1;
ULEA UR14, UP0, UR12, UR28, 0x2 &req={4} ?trans1;
IMAD.WIDE.U32 R12, R6, UR8, R12 ?trans1;
UIADD3 UR13, UPT, UPT, UR15, UR13, URZ ?WAIT3_END_GROUP;
IMAD R9, R7, UR8, R0 ?trans1;
ULEA.HI.X UR13, UR12, UR29, UR13, 0x2, UP0 ?trans1;
LEA R10, P1, R12, UR30, 0x2 ?trans1;
MOV R8, UR14 ?trans2;
IADD3 R9, PT, PT, R13, R9, RZ ?WAIT4_END_GROUP;
LEA.HI.X R11, R12, UR31, R9, 0x2, P1 ?trans1;
MOV R9, UR13 ?WAIT4_END_GROUP;
LDG.E R4, desc[UR22][R10.64] &wr=0x3 ?trans4;
LDG.E R0, desc[UR22][R8.64] &wr=0x3 ?trans1;
IADD.64 R12, R10, UR10 ?trans2;
FFMA R5, R0, R4, R5 &req={5,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R5 &rd=0x1 ?trans4;
LDG.E R12, desc[UR22][R12.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR22][R8.64+0x4] &wr=0x2 ?trans1;
LEA R14, P1, R6, R10, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R15, R6, R11, R7, 0x3, P1 ?trans1;
FFMA R21, R0, R12, R5 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R21 &rd=0x3 ?trans4;
LDG.E R14, desc[UR22][R14.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR22][R8.64+0x8] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R6, 0xc, R10 ?WAIT4_END_GROUP;
IMAD R7, R7, 0xc, RZ ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, R11, R7, RZ ?trans1;
FFMA R7, R0, R14, R21 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R7 &rd=0x3 ?trans4;
LDG.E R0, desc[UR22][R8.64+0xc] &wr=0x2 ?trans4;
LDG.E R5, desc[UR22][R10.64] &req={1} &wr=0x2 ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, 0x4, URZ ?trans1;
FFMA R5, R0, R5, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R5 &rd=0x3 ?trans6;
@!P0 BRA 0xd60 ?trans5;
LDC R0, c[0x0][0x3b8] &wr=0x1 ?trans1;
ISETP.NE.S64.AND P0, PT, R18, 0x1, PT ?WAIT3_END_GROUP;
LOP3.LUT P1, RZ, R0, 0x1, RZ, 0xc0, !PT &req={1} ?WAIT11_END_GROUP;
@!P0 BRA 0xba0 ?trans5;
LDCU.64 UR26, c[0x0][0x398] &wr=0x1 ?trans1;
LDCU.64 UR28, c[0x0][0x3a0] &wr=0x4 ?trans1;
LDCU.128 UR12, c[0x0][0x380] &wr=0x0 ?trans1;
UIMAD UR17, UR5, UR26, URZ &req={1} ?trans1;
UIMAD.WIDE.U32 UR18, UR4, UR26, UR8 ?trans1;
UIMAD UR30, UR9, UR28, URZ &req={4} ?trans1;
UIMAD.WIDE.U32 UR20, UR8, UR28, UR6 ?trans1;
UIMAD UR17, UR4, UR27, UR17 ?trans2;
UIMAD UR29, UR8, UR29, UR30 ?trans1;
ULEA UR12, UP0, UR18, UR12, 0x2 &req={0} ?trans1;
ULEA UR14, UP1, UR20, UR14, 0x2 ?trans1;
UIADD3 UR17, UPT, UPT, UR17, UR19, URZ ?trans1;
UIADD3 UR29, UPT, UPT, UR21, UR29, URZ ?WAIT3_END_GROUP;
ULEA.HI.X UR13, UR18, UR13, UR17, 0x2, UP0 ?trans1;
ULEA.HI.X UR15, UR20, UR15, UR29, 0x2, UP1 ?trans1;
MOV R6, UR12 ?trans1;
MOV R8, UR14 ?WAIT3_END_GROUP;
MOV R7, UR13 &req={3} ?trans1;
MOV R9, UR15 ?WAIT4_END_GROUP;
LDG.E R0, desc[UR22][R6.64] &wr=0x3 ?trans4;
LDG.E R4, desc[UR22][R8.64] &wr=0x3 ?trans1;
IADD.64 R10, R8, UR10 ?trans2;
FFMA R13, R0, R4, R5 &req={5,3} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R13 &rd=0x1 ?trans4;
LDG.E R0, desc[UR22][R6.64+0x4] &wr=0x3 ?trans4;
LDG.E R10, desc[UR22][R10.64] &wr=0x3 ?trans1;
UIADD3.64 UR8, UPT, UPT, UR8, 0x2, URZ ?trans1;
FFMA R5, R0, R10, R13 &req={3,2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R5 &rd=0x1 ?trans6;
@!P1 BRA 0xd60 ?trans5;
LDCU.64 UR26, c[0x0][0x398] &wr=0x4 ?trans1;
LDCU.64 UR28, c[0x0][0x3a0] &wr=0x0 ?trans1;
LDCU.128 UR12, c[0x0][0x380] &wr=0x1 ?trans1;
UMOV UR19, UR9 ?trans1;
UMOV UR20, UR6 ?trans1;
UMOV UR21, UR7 ?trans1;
UMOV UR18, UR8 ?trans1;
UIMAD UR17, UR5, UR26, URZ &req={4} ?trans1;
UIMAD.WIDE.U32 UR18, UR4, UR26, UR18 ?trans1;
UIMAD UR9, UR9, UR28, URZ &req={0} ?trans1;
UIMAD.WIDE.U32 UR20, UR8, UR28, UR20 ?trans1;
UIMAD UR17, UR4, UR27, UR17 ?WAIT2_END_GROUP;
UIMAD UR8, UR8, UR29, UR9 ?trans1;
ULEA UR12, UP0, UR18, UR12, 0x2 &req={1} ?trans1;
ULEA UR14, UP1, UR20, UR14, 0x2 ?trans1;
UIADD3 UR9, UPT, UPT, UR17, UR19, URZ ?trans1;
UIADD3 UR8, UPT, UPT, UR21, UR8, URZ ?WAIT3_END_GROUP;
ULEA.HI.X UR13, UR18, UR13, UR9, 0x2, UP0 ?trans1;
ULEA.HI.X UR15, UR20, UR15, UR8, 0x2, UP1 ?trans1;
MOV R6, UR12 ?trans1;
MOV R8, UR14 ?WAIT3_END_GROUP;
MOV R7, UR13 &req={3} ?trans1;
MOV R9, UR15 ?WAIT4_END_GROUP;
LDG.E R6, desc[UR22][R6.64] &wr=0x3 ?trans4;
LDG.E R8, desc[UR22][R8.64] &wr=0x3 ?trans2;
FFMA R5, R6, R8, R5 &req={5,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR22][R2.64], R5 &rd=0x4 ?trans2;
LDC.64 R2, c[0x0][0x3c0] &req={4,3,2,1,0} &wr=0x0 ?trans1;
UIADD3.64 UR6, UPT, UPT, UR6, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P0, PT, R2, UR6, PT &req={0} ?WAIT14_END_GROUP;
@P0 BRA 0x180 ?trans5;
LDC.64 R2, c[0x0][0x3b0] &wr=0x0 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x1, URZ ?WAIT6_END_GROUP;
ISETP.NE.S64.AND P0, PT, R2, UR4, PT &req={0} ?WAIT14_END_GROUP;
@P0 BRA 0x170 ?trans5;
EXIT ?trans5;
BRA 0xdf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matmul_kernel(float const*, float const*, float*, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
_Z13matmul_kernelPKfS0_Pfmmmmmm:
s_load_b512 s[4:19], s[0:1], 0x0
s_mov_b64 s[2:3], 0
s_waitcnt lgkmcnt(0)
s_cmp_eq_u64 s[16:17], 0
s_cbranch_scc1 .LBB0_9
s_load_b64 s[20:21], s[0:1], 0x40
s_waitcnt lgkmcnt(0)
s_cmp_lg_u64 s[20:21], 0
s_cselect_b32 s0, -1, 0
s_cmp_lg_u64 s[18:19], 0
v_cndmask_b32_e64 v0, 0, 1, s0
s_cselect_b32 s0, -1, 0
s_lshl_b64 s[12:13], s[12:13], 2
v_cndmask_b32_e64 v1, 0, 1, s0
s_lshl_b64 s[10:11], s[10:11], 2
v_cmp_ne_u32_e64 s0, 1, v0
v_mov_b32_e32 v0, 0
s_delay_alu instid0(VALU_DEP_3)
v_cmp_ne_u32_e64 s1, 1, v1
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_8
s_mul_i32 s22, s2, s15
s_mul_hi_u32 s23, s2, s14
s_mul_i32 s24, s3, s14
s_add_i32 s23, s23, s22
s_mul_i32 s22, s2, s14
s_add_i32 s23, s23, s24
s_delay_alu instid0(SALU_CYCLE_1)
s_lshl_b64 s[24:25], s[22:23], 2
s_mov_b64 s[22:23], 0
s_add_u32 s33, s8, s24
s_addc_u32 s36, s9, s25
s_mov_b64 s[24:25], s[6:7]
.LBB0_4:
s_and_b32 vcc_lo, exec_lo, s1
s_cbranch_vccnz .LBB0_7
s_lshl_b64 s[26:27], s[22:23], 2
s_mov_b64 s[28:29], s[4:5]
s_add_u32 s26, s33, s26
s_addc_u32 s27, s36, s27
s_mov_b64 s[30:31], s[24:25]
global_load_b32 v1, v0, s[26:27]
s_mov_b64 s[34:35], s[18:19]
.LBB0_6:
s_clause 0x1
global_load_b32 v2, v0, s[28:29]
global_load_b32 v3, v0, s[30:31]
s_add_u32 s34, s34, -1
s_addc_u32 s35, s35, -1
s_add_u32 s30, s30, s12
s_addc_u32 s31, s31, s13
s_add_u32 s28, s28, 4
s_addc_u32 s29, s29, 0
s_cmp_eq_u64 s[34:35], 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v1, v2, v3
global_store_b32 v0, v1, s[26:27]
s_cbranch_scc0 .LBB0_6
.LBB0_7:
s_add_u32 s22, s22, 1
s_addc_u32 s23, s23, 0
s_add_u32 s24, s24, 4
s_addc_u32 s25, s25, 0
s_cmp_eq_u64 s[22:23], s[20:21]
s_cbranch_scc0 .LBB0_4
.LBB0_8:
s_add_u32 s2, s2, 1
s_addc_u32 s3, s3, 0
s_add_u32 s4, s4, s10
s_addc_u32 s5, s5, s11
s_cmp_eq_u64 s[2:3], s[16:17]
s_cbranch_scc0 .LBB0_2
.LBB0_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matmul_kernel | 5,704 | 1,256 | stackv2-00000-of-00015 |
// Demangled: matmul_parallel_kernel(float const*, float const*, float*, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
Function : _Z22matmul_parallel_kernelPKfS0_Pfmmmmmm
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
LDC R8, c[0x0][0x364] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x3c0] &wr=0x3 ?trans1;
S2R R9, SR_TID.Y &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.X &wr=0x1 ?trans8;
LDC R2, c[0x0][0x360] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.Y &wr=0x2 ?trans8;
LDC.64 R4, c[0x0][0x3b0] &wr=0x4 ?trans8;
LDC.64 R6, c[0x0][0x3b8] &wr=0x5 ?trans1;
IMAD R2, R2, UR5, R3 &req={1} ?WAIT2_END_GROUP;
HFMA2 R3, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
ISETP.GE.U64.AND P0, PT, R2, UR6, PT &req={3} ?trans2;
IMAD R8, R8, UR4, R9 &req={2} ?trans1;
MOV R9, RZ ?WAIT5_END_GROUP;
ISETP.GE.U64.OR P0, PT, R8, R4, P0 &req={4} ?WAIT6_END_GROUP;
ISETP.EQ.S64.OR P0, PT, R6, RZ, P0 &req={5} ?WAIT14_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans1;
IADD.64 R4, R6, -0x1 ?trans2;
MOV R23, RZ ?trans1;
LDCU UR13, c[0x0][0x3b8] &wr=0x1 ?trans3;
ISETP.GE.U64.AND P1, PT, R4, 0x7, PT ?trans2;
LDCU.128 UR8, c[0x0][0x390] &wr=0x2 ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R10, R8, UR6, R2 &req={0} ?trans1;
ULOP3.LUT UR4, UR13, 0x7, URZ, 0xc0, !UPT &req={1} ?WAIT3_END_GROUP;
IMAD R5, R8, UR7, R11 ?trans1;
LEA R4, P2, R10, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE.U32 R6, R8, UR10, RZ ?trans1;
MOV R22, UR4 ?trans1;
UMOV.64 UR4, URZ ?trans1;
LEA.HI.X R5, R10, UR9, R5, 0x2, P2 ?trans1;
IMAD R9, R8, UR11, R7 ?trans2;
ISETP.NE.S64.AND P0, PT, R22, RZ, PT ?trans2;
LDG.E R11, desc[UR16][R4.64] &req={3} &rd=0x0 &wr=0x5 ?trans1;
@!P1 BRA 0x640 ?trans11;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x2 ?trans1;
LDCU UR14, c[0x0][0x3bc] &wr=0x3 ?trans1;
ULOP3.LUT UR10, UR13, 0xfffffff8, URZ, 0xc0, !UPT ?trans1;
UMOV.64 UR4, URZ ?trans1;
LEA R14, P1, R6, UR20, 0x2 &req={1} ?WAIT4_END_GROUP;
LEA.HI.X R15, R6, UR21, R9, 0x2, P1 ?trans1;
USHF.L.U64.HI UR12, UR6, 0x5, UR7 &req={2} ?trans1;
LEA R12, P1, R2, UR22, 0x2 ?trans1;
USHF.L.U32 UR11, UR6, 0x5, URZ ?trans1;
USHF.L.U64.HI UR7, UR6, 0x2, UR7 ?trans1;
IADD.64 R14, R14, 0x10 ?trans2;
USHF.L.U32 UR6, UR6, 0x2, URZ ?trans1;
LEA.HI.X R13, R2, UR23, RZ, 0x2, P1 &req={3} ?WAIT11_END_GROUP;
LDG.E R0, desc[UR16][R14.64+-0x10] &req={2} &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R12.64] &wr=0x2 ?trans2;
FFMA R21, R0, R10, R11 &req={5,2} ?trans1;
IADD.64 R10, R12, UR6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R4.64], R21 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0xc] &wr=0x2 ?trans4;
LDG.E R16, desc[UR16][R10.64] &wr=0x2 ?trans2;
FFMA R25, R0, R16, R21 &req={2} ?trans1;
IADD.64 R16, R10, UR6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R4.64], R25 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0x8] &wr=0x3 ?trans4;
LDG.E R18, desc[UR16][R16.64] &wr=0x3 ?trans2;
FFMA R27, R0, R18, R25 &req={3} ?trans1;
IADD.64 R18, R16, UR6 ?WAIT4_END_GROUP;
STG.E desc[UR16][R4.64], R27 &rd=0x3 ?trans4;
LDG.E R0, desc[UR16][R14.64+-0x4] &wr=0x1 ?trans4;
LDG.E R20, desc[UR16][R18.64] &wr=0x1 ?trans1;
IADD.64 R10, R18, UR6 ?trans2;
FFMA R21, R0, R20, R27 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R21 &rd=0x1 ?trans4;
LDG.E R0, desc[UR16][R14.64] &wr=0x2 ?trans4;
LDG.E R20, desc[UR16][R10.64] &wr=0x2 ?trans1;
IADD.64 R16, R10, UR6 ?trans2;
FFMA R25, R0, R20, R21 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R25 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x4] &wr=0x3 ?trans4;
LDG.E R20, desc[UR16][R16.64] &wr=0x3 ?trans1;
IADD.64 R18, R16, UR6 ?trans2;
FFMA R27, R0, R20, R25 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R27 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x8] &wr=0x3 ?trans4;
LDG.E R24, desc[UR16][R18.64] &wr=0x3 ?trans1;
IADD.64 R20, R18, UR6 &req={1} ?trans2;
UIADD3.64 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
UMOV UR8, UR10 ?trans1;
UMOV UR9, UR14 ?WAIT2_END_GROUP;
UIADD3.64 UR8, UPT, UPT, UR4, -UR8, URZ ?trans1;
FFMA R29, R0, R24, R27 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R29 &rd=0x2 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x3 ?trans4;
LDG.E R0, desc[UR16][R14.64+0xc] &rd=0x1 &wr=0x3 ?trans1;
ISETP.NE.S64.AND P1, PT, RZ, UR8, PT ?trans2;
UMOV UR8, UR11 ?trans1;
UMOV UR9, UR12 ?WAIT2_END_GROUP;
IADD.64 R12, R12, UR8 ?trans2;
IADD.64 R14, R14, 0x20 &req={1} ?trans2;
FFMA R11, R0, R20, R29 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R11 &rd=0x2 ?trans1;
@P1 BRA 0x330 ?trans5;
@!P0 EXIT ?trans5;
LDC.64 R12, c[0x0][0x3a0] &wr=0x1 ?trans1;
ISETP.GE.U64.AND P1, PT, R22, 0x4, PT ?trans2;
ULOP3.LUT UR6, UR13, 0x3, URZ, 0xc0, !UPT ?trans1;
HFMA2 R25, -RZ, RZ, 0, 0 &req={2} ?WAIT5_END_GROUP;
MOV R24, UR6 ?WAIT5_END_GROUP;
ISETP.NE.S64.AND P0, PT, R24, RZ, PT ?trans2;
@!P1 BRA 0x910 ?WAIT12_END_GROUP;
LDCU.128 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R0, R12.reuse, UR5, RZ &req={1} ?trans1;
MOV R8, R6 ?trans1;
IMAD.WIDE.U32 R18, R12, UR4, R2 ?WAIT4_END_GROUP;
IMAD R17, R13, UR4, R0 ?trans1;
IADD.64 R20, R8, UR4 ?WAIT4_END_GROUP;
IADD3 R17, PT, PT, R19, R17, RZ ?trans2;
LEA R14, P1, R20, UR8, 0x2 &req={2} ?trans2;
LEA R16, P2, R18, UR10, 0x2 ?trans2;
LEA.HI.X R15, R20, UR9, R21, 0x2, P1 ?trans2;
LEA.HI.X R17, R18, UR11, R17, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR16][R14.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R16.64] &wr=0x2 ?trans1;
IMAD.SHL.U32 R21, R13, 0x4, RZ ?trans2;
IMAD.WIDE.U32 R18, R12, 0x4, RZ ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, R21, RZ ?WAIT5_END_GROUP;
IADD.64 R18, R16, R18 ?trans2;
FFMA R11, R0, R10, R11 &req={5,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R11 &rd=0x1 ?trans4;
LDG.E R18, desc[UR16][R18.64] &wr=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x4] &wr=0x2 ?trans1;
LEA R20, P1, R12, R16, 0x3 ?WAIT4_END_GROUP;
LEA.HI.X R21, R12, R17, R13, 0x3, P1 ?trans1;
FFMA R23, R0, R18, R11 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R23 &rd=0x2 ?trans4;
LDG.E R20, desc[UR16][R20.64] &wr=0x3 ?trans4;
LDG.E R0, desc[UR16][R14.64+0x8] &wr=0x3 ?trans1;
IMAD R27, R13, 0xc, RZ ?trans2;
IMAD.WIDE.U32 R16, R12, 0xc, R16 ?WAIT5_END_GROUP;
IADD3 R17, PT, PT, R17, R27, RZ ?trans1;
FFMA R19, R0, R20, R23 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R19 &rd=0x2 ?trans4;
LDG.E R0, desc[UR16][R14.64+0xc] &wr=0x3 ?trans4;
LDG.E R11, desc[UR16][R16.64] &req={1} &wr=0x3 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
FFMA R11, R0, R11, R19 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R11 &rd=0x2 ?trans6;
@!P0 EXIT ?trans5;
ISETP.NE.S64.AND P0, PT, R24, 0x1, PT ?WAIT14_END_GROUP;
@!P0 BRA 0xab0 ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R0, R12.reuse, UR5, RZ &req={1} ?trans1;
MOV R14, R6 ?trans1;
MOV R15, R9 ?trans1;
IMAD.WIDE.U32 R18, R12, UR4, R2 &req={2} ?WAIT4_END_GROUP;
IMAD R17, R13, UR4, R0 ?trans1;
IADD.64 R14, R14, UR4 ?WAIT4_END_GROUP;
IADD3 R19, PT, PT, R19, R17, RZ ?trans2;
LEA R16, P0, R14, UR8, 0x2 &req={3} ?trans2;
LEA R20, P1, R18, UR10, 0x2 ?trans2;
LEA.HI.X R17, R14, UR9, R15, 0x2, P0 ?trans2;
LEA.HI.X R21, R18, UR11, R19, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R0, desc[UR16][R16.64] &wr=0x2 ?trans4;
LDG.E R10, desc[UR16][R20.64] &wr=0x2 ?trans1;
LEA R14, P0, R12, R20, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R12, R21, R13, 0x2, P0 ?trans1;
FFMA R19, R0, R10, R11 &req={5,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R19 &rd=0x3 ?trans4;
LDG.E R0, desc[UR16][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x2 ?trans1;
UIADD3.64 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
FFMA R11, R0, R14, R19 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R11 &rd=0x3 ?trans6;
ULOP3.LUT UR6, UR13, 0x1, URZ, 0xc0, !UPT ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
MOV R14, UR6 ?WAIT5_END_GROUP;
ISETP.NE.U64.AND P0, PT, R14, 0x1, PT ?WAIT14_END_GROUP;
@P0 EXIT ?trans5;
LDCU.128 UR8, c[0x0][0x380] &wr=0x4 ?trans1;
MOV R7, R9 ?trans1;
IMAD.WIDE.U32 R8, R12, UR4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD R12, R12, UR5, RZ ?trans1;
IADD.64 R2, R6, UR4 ?WAIT3_END_GROUP;
IMAD R13, R13, UR4, R12 ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R9, R13, RZ ?trans2;
LEA R6, P0, R2, UR8, 0x2 &req={4} ?trans2;
LEA R12, P1, R8, UR10, 0x2 ?trans2;
LEA.HI.X R7, R2, UR9, R3, 0x2, P0 ?trans2;
LEA.HI.X R13, R8, UR11, R9, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R6, desc[UR16][R6.64] &wr=0x4 ?trans4;
LDG.E R12, desc[UR16][R12.64] &wr=0x4 ?trans2;
FFMA R11, R6, R12, R11 &req={5,4,3,2} ?WAIT5_END_GROUP;
STG.E desc[UR16][R4.64], R11 ?trans1;
EXIT ?trans5;
BRA 0xc00;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matmul_parallel_kernel(float const*, float const*, float*, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long)
_Z22matmul_parallel_kernelPKfS0_Pfmmmmmm:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x54
s_load_b512 s[16:31], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x40
v_bfe_u32 v2, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
v_mov_b32_e32 v1, 0
v_mad_u64_u32 v[2:3], null, s14, s2, v[4:5]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
v_mov_b32_e32 v3, v1
v_cmp_gt_u64_e32 vcc_lo, s[28:29], v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_u64_e64 s0, s[0:1], v[2:3]
s_and_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s1, s0
s_cbranch_execz .LBB1_4
s_cmp_eq_u64 s[30:31], 0
s_cbranch_scc1 .LBB1_4
v_mad_u64_u32 v[4:5], null, v0, s26, 0
v_lshlrev_b64 v[8:9], 2, v[2:3]
s_lshl_b64 s[0:1], s[24:25], 2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s20, v8
v_mov_b32_e32 v1, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[5:6], null, v0, s27, v[1:2]
v_lshlrev_b64 v[1:2], 2, v[4:5]
v_add_co_ci_u32_e32 v4, vcc_lo, s21, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v1, vcc_lo, v3, v1
v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
v_mad_u64_u32 v[3:4], null, v0, s22, 0
global_load_b32 v7, v[1:2], off
v_mad_u64_u32 v[5:6], null, v0, s23, v[4:5]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mov_b32_e32 v4, v5
v_lshlrev_b64 v[5:6], 2, v[3:4]
v_add_co_u32 v3, vcc_lo, s18, v8
v_add_co_ci_u32_e32 v4, vcc_lo, s19, v9, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v5, vcc_lo, s16, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
.LBB1_3:
global_load_b32 v0, v[5:6], off
global_load_b32 v8, v[3:4], off
v_add_co_u32 v3, vcc_lo, v3, s0
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, v5, 4
s_add_u32 s30, s30, -1
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
s_addc_u32 s31, s31, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u64 s[30:31], 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v7, v0, v8
global_store_b32 v[1:2], v7, off
s_cbranch_scc1 .LBB1_3
.LBB1_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matmul_parallel_kernel | 5,029 | 1,350 | stackv2-00000-of-00015 |
// Demangled: check_nodec(int, int*, bddNode_*, bddNode_*, float*, bddNode_**, bddNode_**, float*)
Function : _Z11check_nodeciPiP8bddNode_S1_PfPS1_S3_S2_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R13, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R5, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD R13, R13, UR4, R0 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans4;
ISETP.NE.AND P0, PT, R13.reuse, RZ, PT ?trans1;
ISETP.GE.AND P1, PT, R13, R5, PT &req={2} ?WAIT12_END_GROUP;
@!P0 LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans2;
@!P0 STG.E desc[UR4][R2.64], RZ &req={1} &rd=0x1 ?trans1;
@P1 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x3b8] &req={1} &wr=0x0 ?trans8;
LDC.64 R8, c[0x0][0x3a0] &wr=0x1 ?trans2;
LDG.E R11, desc[UR4][R8.64] &req={1} &wr=0x2 ?trans1;
IMAD.WIDE R6, R13, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R6, desc[UR4][R6.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x250 ?trans1;
FSETP.NEU.AND P1, PT, R6, R11, PT &req={2} ?WAIT13_END_GROUP;
@P1 BRA 0x240 ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R13 ?trans1;
IMAD.SHL.U32 R6, R13, 0x8, RZ ?WAIT3_END_GROUP;
SHF.L.U64.HI R7, R13, 0x3, R0 ?WAIT5_END_GROUP;
IADD.64 R10, R6, UR6 &req={0} ?trans2;
LDCU.64 UR6, c[0x0][0x390] &wr=0x0 ?trans5;
LDG.E.64 R10, desc[UR4][R10.64] &wr=0x0 ?trans2;
ISETP.NE.S64.AND P1, PT, R10, UR6, PT &req={0} ?WAIT14_END_GROUP;
@P1 BRA 0x240 ?trans5;
LDCU.64 UR6, c[0x0][0x3b0] &wr=0x0 ?trans2;
IADD.64 R6, R6, UR6 &req={0} ?trans2;
LDCU.64 UR6, c[0x0][0x398] &wr=0x0 ?trans5;
LDG.E.64 R6, desc[UR4][R6.64] &wr=0x0 ?trans2;
ISETP.NE.S64.AND P1, PT, R6, UR6, PT &req={0} ?WAIT14_END_GROUP;
@!P1 LDC.64 R10, c[0x0][0x388] &wr=0x0 ?trans2;
@!P1 STG.E desc[UR4][R10.64], R13 &req={0} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P0 EXIT ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x1 ?trans2;
LDG.E R6, desc[UR4][R6.64] &req={1} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R6, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDG.E R9, desc[UR4][R8.64] &wr=0x2 ?trans1;
LDC.64 R6, c[0x0][0x3b0] &wr=0x1 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 ?WAIT7_END_GROUP;
LDC.64 R12, c[0x0][0x3a8] &req={0} &wr=0x0 ?trans8;
LDC.64 R10, c[0x0][0x398] &wr=0x3 ?trans8;
LDC.64 R14, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE R6, R5, 0x8, R6 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R5, 0x8, R12 &req={0} ?trans1;
STG.E desc[UR4][R2.64+0x4], R9 &req={2} ?trans4;
STG.E.64 desc[UR4][R6.64+0x8], R10 &req={3} ?trans4;
STG.E.64 desc[UR4][R4.64+0x8], R14 &req={4} ?trans1;
EXIT ?trans5;
BRA 0x360;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: check_nodec(int, int*, bddNode_*, bddNode_*, float*, bddNode_**, bddNode_**, float*)
_Z11check_nodeciPiP8bddNode_S1_PfPS1_S3_S2_:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x4c
s_load_b256 s[4:11], s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_cmp_eq_u32_e32 vcc_lo, 0, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_2
v_mov_b32_e32 v0, 0
global_store_b32 v0, v0, s[4:5]
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s2
s_load_b32 s16, s[0:1], 0x0
s_mov_b32 s3, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s16, v1
s_cbranch_execz .LBB0_10
s_load_b64 s[18:19], s[0:1], 0x38
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, s2, s18, v3
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v4, s2, s19, v4, s2
global_load_b32 v0, v[3:4], off
s_load_b32 s2, s[10:11], 0x0
s_load_b128 s[12:15], s[0:1], 0x28
s_mov_b32 s1, exec_lo
s_waitcnt vmcnt(0) lgkmcnt(0)
v_cmpx_eq_f32_e32 s2, v0
s_cbranch_execz .LBB0_7
v_lshlrev_b64 v[2:3], 3, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s12, v2
v_add_co_ci_u32_e64 v5, s0, s13, v3, s0
global_load_b64 v[4:5], v[4:5], off
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e64 s0, s[6:7], v[4:5]
s_delay_alu instid0(VALU_DEP_1)
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_7
v_add_co_u32 v2, s0, s14, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e64 v3, s0, s15, v3, s0
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_cmp_eq_u64_e64 s0, s[8:9], v[2:3]
s_and_b32 exec_lo, exec_lo, s0
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v0, 0
global_store_b32 v0, v1, s[4:5]
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s1
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_10
v_mov_b32_e32 v0, 0
global_load_b32 v1, v0, s[4:5]
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v1
s_cbranch_vccnz .LBB0_10
s_ashr_i32 s17, s16, 31
v_dual_mov_b32 v1, s8 :: v_dual_mov_b32 v2, s9
s_lshl_b64 s[0:1], s[16:17], 3
v_mov_b32_e32 v5, s2
s_add_u32 s4, s12, s0
s_addc_u32 s5, s13, s1
s_add_u32 s0, s14, s0
s_addc_u32 s1, s15, s1
s_lshl_b64 s[8:9], s[16:17], 2
v_dual_mov_b32 v3, s6 :: v_dual_mov_b32 v4, s7
s_add_u32 s2, s18, s8
s_addc_u32 s3, s19, s9
s_clause 0x2
global_store_b64 v0, v[1:2], s[0:1] offset:8
global_store_b32 v0, v5, s[2:3] offset:4
global_store_b64 v0, v[3:4], s[4:5] offset:8
.LBB0_10:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| check_nodec | 1,534 | 1,462 | stackv2-00000-of-00015 |
// Demangled: atomicAddKernel(float*)
Function : _Z15atomicAddKernelPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans1;
HFMA2 R7, -RZ, RZ, 1.875, 0 ?WAIT7_END_GROUP;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD.HI R4, R0, 0x66666667, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R5, RZ, 0x1f, R4 ?WAIT4_END_GROUP;
LEA.HI.SX32 R5, R4, R5, 0x1e ?WAIT5_END_GROUP;
IMAD R5, R5, -0xa, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.F32.FTZ.RN.STRONG.GPU desc[UR4][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: atomicAddKernel(float*)
_Z15atomicAddKernelPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mul_hi_i32 v0, 0x66666667, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 2, v0
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, 10
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_mov_b32 s0, 0
global_load_b32 v3, v[0:1], off
.LBB1_1:
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, 1.0, v3
global_atomic_cmpswap_b32 v2, v[0:1], v[2:3], off glc
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v2, v3
v_mov_b32_e32 v3, v2
s_or_b32 s0, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB1_1
s_endpgm
| atomicAddKernel | 435 | 676 | stackv2-00000-of-00015 |
// Demangled: naiveAddKernel(float*)
Function : _Z14naiveAddKernelPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x0 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x0 ?trans8;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD R0, R0, UR4, R5 &req={0} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans3;
IMAD.HI R4, R0, 0x66666667, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R5, RZ, 0x1f, R4 ?WAIT4_END_GROUP;
LEA.HI.SX32 R5, R4, R5, 0x1e ?WAIT5_END_GROUP;
IMAD R5, R5, -0xa, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={1} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans2;
FADD R5, R0, 1 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0x100;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: naiveAddKernel(float*)
_Z14naiveAddKernelPf:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
v_mul_hi_i32 v0, 0x66666667, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v0
v_ashrrev_i32_e32 v0, 2, v0
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, 10
v_sub_nc_u32_e32 v0, v1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[0:1], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, 1.0, v2
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| naiveAddKernel | 459 | 569 | stackv2-00000-of-00015 |
// Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
Function : _Z24exclusive_prefix_sum_gpuPiS_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.Y &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x360] &wr=0x2 ?trans6;
LDC R12, c[0x0][0x370] &wr=0x3 ?trans1;
S2R R13, SR_CTAID.X &wr=0x2 ?trans1;
LDCU UR8, c[0x0][0x394] &wr=0x4 ?trans1;
S2R R6, SR_TID.X &wr=0x2 ?trans5;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R15, c[0x0][0x364] &wr=0x1 ?trans1;
IMAD R2, R13, UR5, R6 &req={2} ?WAIT2_END_GROUP;
IMAD R15, R15, UR4, R0 &req={1} ?trans2;
IMAD R0, R12, UR5, RZ &req={3} ?WAIT4_END_GROUP;
IMAD R7, R0, R15, R2 ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7, UR8, PT &req={4} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR9, c[0x0][0x390] &wr=0x0 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x394] &wr=0x2 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR9, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x210 &req={2,1} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
ISETP.NE.AND P0, PT, R7, RZ, PT ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans6;
@P0 IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
@P0 LDG.E R3, desc[UR6][R2.64+-0x4] &wr=0x2 ?trans1;
@!P0 LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans1;
@P0 IMAD.WIDE R4, R7, 0x4, R4 &req={1} ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT4_END_GROUP;
@P0 STG.E desc[UR6][R4.64], R3 &req={2} &rd=0x1 ?trans4;
@!P0 STG.E desc[UR6][R8.64], RZ &req={0} &rd=0x1 ?trans1;
ISETP.GT.AND P0, PT, R7, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={1} ?trans5;
BRA 0x140 ?trans5;
VIMNMX.U32 R9, R0, 0x1, !PT ?trans1;
IADD3 R2, PT, PT, R15, 0x1, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR8, 0x1, URZ ?trans1;
BSSY.RECONVERGENT B0, 0x5b0 ?trans1;
I2F.U32.RP R4, R9 &wr=0x0 ?trans1;
IADD3 R11, PT, PT, RZ, -R9, RZ ?trans1;
IMAD R3, R2, R12, R13 ?trans1;
ISETP.NE.U32.AND P3, PT, R9, RZ, PT ?WAIT3_END_GROUP;
IMAD R2, R3, UR5, R6 ?WAIT5_END_GROUP;
VIMNMX.S32 R5, R2.reuse, UR4, !PT ?trans1;
MUFU.RCP R4, R4 &req={0} &wr=0x0 ?trans4;
IADD3 R5, PT, PT, -R2, R5, RZ ?trans1;
HFMA2 R2, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ISETP.NE.AND P0, PT, R5, RZ, PT ?WAIT5_END_GROUP;
SEL R8, RZ, 0x1, !P0 ?trans1;
IADD3 R3, PT, PT, R4, 0xffffffe, RZ &req={0} ?trans2;
IADD3 R4, PT, PT, R5, -0x1, RZ ?WAIT5_END_GROUP;
@!P0 IADD3 R4, PT, PT, R5, RZ, RZ ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R3, R3 &wr=0x0 ?trans2;
IMAD R11, R11, R3, RZ &req={0} ?WAIT4_END_GROUP;
IMAD.HI.U32 R11, R3, R11, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R11, R11, R4, RZ ?WAIT5_END_GROUP;
IADD3 R2, PT, PT, -R11, RZ, RZ ?WAIT5_END_GROUP;
IMAD R4, R9, R2, R4 ?trans2;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans3;
ISETP.GE.U32.AND P1, PT, R4, R9, PT ?WAIT13_END_GROUP;
@P1 IADD3 R4, PT, PT, -R9, R4, RZ ?trans2;
@P1 IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P2, PT, R4, R9, PT ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans11;
@P2 IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT2_END_GROUP;
@!P3 LOP3.LUT R11, RZ, R9, RZ, 0x33, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R8, R11, RZ ?WAIT4_END_GROUP;
IADD3 R8, PT, PT, R11.reuse, 0x1, RZ ?trans1;
ISETP.GE.U32.AND P1, PT, R11, 0x3, PT ?WAIT3_END_GROUP;
LOP3.LUT P0, R14, R8, 0x3, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BRA 0x5a0 &req={0} ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD R13, R15, R12, R13 ?WAIT4_END_GROUP;
IMAD R13, R13, UR5, R6 ?trans1;
IADD3 R6, PT, PT, -R14, RZ, RZ ?trans2;
LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans2;
IADD3 R19, PT, PT, R13, -UR9, RZ ?WAIT7_END_GROUP;
ISETP.GT.AND P0, PT, R7.reuse, UR9, PT ?trans1;
IMAD.WIDE R14, R7, 0x4, R8 &req={0} ?WAIT4_END_GROUP;
SEL R17, R19, RZ, P0 ?trans2;
LDG.E R14, desc[UR6][R14.64] &req={3} &wr=0x3 ?trans3;
IMAD.WIDE R16, R17, 0x4, R8 ?WAIT6_END_GROUP;
LDG.E R17, desc[UR6][R16.64] &wr=0x3 ?trans1;
IMAD.WIDE R12, R7, 0x4, R10 &req={2} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IADD3 R7, PT, PT, R0.reuse, R7, RZ ?trans2;
IADD3 R19, PT, PT, R0, R19, RZ ?trans2;
IADD3 R21, PT, PT, R14, R17, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R21 &rd=0x3 ?trans3;
@P0 BRA 0x4c0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
@!P1 EXIT ?trans5;
ISETP.GT.AND P0, PT, R7.reuse, UR9, PT ?trans1;
IADD3 R6, PT, PT, R7.reuse, -UR9, RZ ?trans1;
IMAD.WIDE R12, R7, 0x4, R4 &req={3,1,0} ?WAIT4_END_GROUP;
SEL R9, R6, RZ, P0 ?trans2;
LDG.E R6, desc[UR6][R12.64] &wr=0x2 ?trans3;
IMAD.WIDE R8, R9, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R23.reuse, UR9, PT ?trans1;
IADD3 R10, PT, PT, R23, -UR9, RZ ?WAIT5_END_GROUP;
SEL R11, R10, RZ, P0 ?trans1;
IMAD.WIDE R16, R7, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 ?trans1;
IADD3 R19, PT, PT, R6, R9, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE R6, R0.reuse, 0x4, R12 ?trans2;
STG.E desc[UR6][R16.64], R19 &rd=0x0 ?trans4;
LDG.E R11, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R6.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R0, R23, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R23.reuse, UR9, PT ?trans1;
IADD3 R8, PT, PT, R23, -UR9, RZ ?WAIT5_END_GROUP;
SEL R15, R8, RZ, P0 ?trans1;
IMAD.WIDE R8, R0, 0x4, R16 ?WAIT4_END_GROUP;
IMAD.WIDE R14, R15, 0x4, R4 ?trans1;
IADD3 R21, PT, PT, R12, R11, RZ &req={2} ?WAIT3_END_GROUP;
IMAD.WIDE R12, R0.reuse, 0x4, R6 ?trans2;
STG.E desc[UR6][R8.64], R21 &rd=0x1 ?trans4;
LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans4;
LDG.E R6, desc[UR6][R12.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R0, R23, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7.reuse, UR9, PT ?trans1;
IADD3 R10, PT, PT, R7, -UR9, RZ ?WAIT5_END_GROUP;
SEL R19, R10, RZ, P0 &req={0} ?trans1;
IMAD.WIDE R10, R0, 0x4, R8 ?WAIT4_END_GROUP;
IMAD.WIDE R16, R0, 0x4, R12 ?WAIT4_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R4 ?trans1;
IADD3 R23, PT, PT, R6, R15, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64], R23 &rd=0x0 ?trans4;
LDG.E R16, desc[UR6][R16.64] &wr=0x2 ?trans4;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R0.reuse, 0x4, R10 &req={1} ?trans1;
IADD3 R7, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R7, UR8, PT ?trans1;
IADD3 R13, PT, PT, R16, R19, RZ &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], R13 &rd=0x0 ?trans7;
@!P0 BRA 0x5c0 ?trans5;
EXIT ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: exclusive_prefix_sum_gpu(int*, int*, int, int)
_Z24exclusive_prefix_sum_gpuPiS_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_b32 s5, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v0, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s2, s4, 16
s_and_b32 s4, s4, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
s_load_b64 s[2:3], s[0:1], 0x10
s_mul_i32 s8, s5, s4
s_mul_i32 s14, s14, s4
s_mov_b32 s4, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v1, v2, s8
v_add3_u32 v0, s14, v0, v1
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_ge_i32_e64 s3, v0
s_cbranch_execz .LBB0_12
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v1, 31, v0
s_cmp_lg_u32 s2, 0
v_mov_b32_e32 v2, 0
s_cselect_b32 s1, -1, 0
s_mov_b32 s14, 0
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_add_u32 s12, s4, -4
s_addc_u32 s13, s5, -1
s_ashr_i32 s9, s8, 31
s_sub_i32 s2, 0, s2
s_lshl_b64 s[10:11], s[8:9], 2
.LBB0_2:
s_and_b32 vcc_lo, exec_lo, s1
s_cbranch_vccz .LBB0_4
v_add_nc_u32_e32 v1, s2, v0
v_add_co_u32 v7, vcc_lo, s12, v3
v_add_co_ci_u32_e32 v8, vcc_lo, s13, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, 0, v1
s_mov_b32 s0, 0
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
s_clause 0x1
global_load_b32 v1, v[7:8], off offset:4
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, v5, v1
v_add_co_u32 v5, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
global_store_b32 v[5:6], v1, off
s_branch .LBB0_5
.LBB0_4:
s_mov_b32 s0, -1
.LBB0_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB0_11
s_mov_b32 s0, exec_lo
v_cmpx_ne_u32_e32 0, v0
s_xor_b32 s0, exec_lo, s0
s_cbranch_execz .LBB0_8
v_add_co_u32 v5, vcc_lo, s12, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s13, v4, vcc_lo
global_load_b32 v1, v[5:6], off
v_add_co_u32 v5, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[5:6], v1, off
.LBB0_8:
s_and_not1_saveexec_b32 s0, s0
s_cbranch_execz .LBB0_10
global_store_b32 v2, v2, s[6:7]
.LBB0_10:
s_or_b32 exec_lo, exec_lo, s0
.LBB0_11:
v_add_nc_u32_e32 v0, s8, v0
v_add_co_u32 v3, s0, v3, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v4, s0, s11, v4, s0
v_cmp_lt_i32_e32 vcc_lo, s3, v0
s_or_b32 s14, vcc_lo, s14
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s14
s_cbranch_execnz .LBB0_2
.LBB0_12:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| exclusive_prefix_sum_gpu | 3,589 | 1,523 | stackv2-00000-of-00015 |
// Demangled: vectorAdd(int*, int*, int*, int)
Function : _Z9vectorAddPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x398] &wr=0x2 ?trans7;
LDC R9, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R9, R9, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x140;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectorAdd(int*, int*, int*, int)
_Z9vectorAddPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v2, v3, v2
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectorAdd | 572 | 576 | stackv2-00000-of-00015 |
// Demangled: vectors_add(float*, float*)
Function : _Z11vectors_addPfS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x0 ?trans1;
S2R R0, SR_CTAID.X &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R7, R0, UR6, R7 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R2, R7, 0x4, R2 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE.U32 R4, R7, 0x4, R4 &req={3} ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans2;
FADD R7, R2, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0xf0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: vectors_add(float*, float*)
_Z11vectors_addPfS_:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
v_mov_b32_e32 v2, 0
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[0:1], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| vectors_add | 429 | 408 | stackv2-00000-of-00015 |
// Demangled: bucketSort(int*, int, int*, int)
Function : _Z10bucketSortPiiS_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x388] &wr=0x2 ?trans7;
LDC R11, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R11, R11, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R11, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR6, c[0x0][0x398] &wr=0x0 ?trans1;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
ISETP.GE.AND P0, PT, R11, UR6, PT &req={0} ?WAIT13_END_GROUP;
@!P0 IMAD.WIDE R2, R11, 0x4, R8 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R4, R11, 0x4, R4 &req={3} ?trans1;
@!P0 STG.E desc[UR4][R2.64], RZ &req={2} &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDG.E R7, desc[UR4][R4.64] &wr=0x2 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
BSSY.RECONVERGENT B0, 0x200 ?trans1;
MOV R0, RZ ?trans1;
MOV R13, 0xffffffff ?trans1;
IMAD.WIDE R6, R7, 0x4, R8 &req={2} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R6.64], R15 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
IMAD.WIDE R2, R13, 0x4, R8 &req={0} ?WAIT6_END_GROUP;
LDG.E R3, desc[UR4][R2.64+0x4] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?trans2;
IADD3 R0, PT, PT, R3, R0, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, R11, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x190 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
STG.E desc[UR4][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x220;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: bucketSort(int*, int, int*, int)
_Z10bucketSortPiiS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x8
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b32 s4, s[0:1], 0x18
s_load_b64 s[2:3], s[0:1], 0x10
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1)
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_and_saveexec_b32 s4, vcc_lo
s_cbranch_execz .LBB0_3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
v_mov_b32_e32 v0, 0
global_store_b32 v[4:5], v0, off
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s4
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
v_mov_b32_e32 v0, 1
v_add_co_u32 v2, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
s_mov_b32 s1, -1
s_mov_b32 s0, 0
global_load_b32 v4, v[2:3], off
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
global_atomic_add_u32 v[4:5], v0, off
v_mov_b32_e32 v0, 0
v_mov_b32_e32 v4, 0
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB0_4:
global_load_b32 v5, v4, s[2:3]
s_add_i32 s1, s1, 1
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_waitcnt vmcnt(0)
v_dual_mov_b32 v5, s1 :: v_dual_add_nc_u32 v0, v5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, v0, v1
s_or_b32 s0, vcc_lo, s0
s_and_not1_b32 exec_lo, exec_lo, s0
s_cbranch_execnz .LBB0_4
s_or_b32 exec_lo, exec_lo, s0
global_store_b32 v[2:3], v5, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| bucketSort | 910 | 1,082 | stackv2-00000-of-00015 |
// Demangled: convolution1d(float*, float*, float*, int)
Function : _Z13convolution1dPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R15, UR6, PT &req={1} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
IADD3 R9, PT, PT, R15, -0x2, RZ ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
ISETP.GE.AND P0, PT, R9, UR6, PT ?trans1;
IADD3 R11, PT, PT, R15.reuse, -0x1, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x3 ?trans3;
ISETP.LT.U32.OR P0, PT, R15, 0x2, P0 ?WAIT13_END_GROUP;
@!P0 LDC.64 R6, c[0x0][0x380] &wr=0x4 ?trans1;
@!P0 LDG.E R0, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R4, R15, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
LDG.E R13, desc[UR4][R4.64] &wr=0x2 ?trans1;
@!P0 IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={4} ?WAIT6_END_GROUP;
@!P0 LDG.E R6, desc[UR4][R6.64] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P1, PT, R11, UR6, PT ?WAIT13_END_GROUP;
@!P1 LDC.64 R8, c[0x0][0x380] &wr=0x1 ?trans2;
@!P1 IMAD.WIDE.U32 R8, R11, 0x4, R8 &req={1} ?WAIT4_END_GROUP;
@!P0 FFMA R13, R0, R6, R13 &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR4][R4.64], R13 &rd=0x1 ?trans4;
@!P1 LDG.E R8, desc[UR4][R8.64] &wr=0x1 ?trans4;
@!P1 LDG.E R0, desc[UR4][R2.64+0x4] &wr=0x1 ?trans1;
LEA R10, P0, R15, UR8, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R11, R15, UR9, RZ, 0x2, P0 ?trans1;
@!P1 FFMA R13, R0, R8, R13 &req={1} ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR4][R4.64], R13 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R2.64+0x8] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R10.64] &wr=0x2 ?trans1;
IADD3 R7, PT, PT, R15, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R7, UR6, PT ?trans1;
IADD3 R12, PT, PT, R15, 0x2, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x2d0 ?trans4;
ISETP.GE.U32.AND P1, PT, R12, UR6, PT ?trans1;
FFMA R7, R0, R6, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x1 ?trans1;
@P0 BRA 0x2c0 ?trans6;
LDG.E R0, desc[UR4][R2.64+0xc] &wr=0x2 ?trans4;
LDG.E R6, desc[UR4][R10.64+0x4] &wr=0x2 ?trans2;
FFMA R7, R0, R6, R7 &req={2,1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 &rd=0x2 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
@P1 EXIT ?trans5;
LDG.E R2, desc[UR4][R2.64+0x10] &wr=0x3 ?trans4;
LDG.E R10, desc[UR4][R10.64+0x8] &wr=0x3 ?trans2;
FFMA R7, R2, R10, R7 &req={3,2,1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R7 ?trans1;
EXIT ?trans5;
BRA 0x330;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: convolution1d(float*, float*, float*, int)
_Z13convolution1dPfS_S_i:
s_load_b32 s8, s[0:1], 0x18
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
v_cmpx_gt_i32_e64 s8, v0
s_cbranch_execz .LBB0_5
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v1, 2, v0
s_mov_b32 s1, -2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v3, s0, s6, v1
v_add_co_ci_u32_e64 v4, null, s7, 0, s0
.LBB0_2:
v_add_nc_u32_e32 v1, s1, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_lt_i32_e32 vcc_lo, -1, v1
v_cmp_gt_i32_e64 s0, s8, v1
s_and_b32 s6, vcc_lo, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s6
s_cbranch_execz .LBB0_4
v_lshlrev_b64 v[5:6], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
global_load_b32 v1, v2, s[2:3]
global_load_b32 v5, v[5:6], off
global_load_b32 v6, v[3:4], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v1, v5
global_store_b32 v[3:4], v6, off
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s0
s_add_i32 s1, s1, 1
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s1, 3
s_cbranch_scc1 .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| convolution1d | 1,462 | 726 | stackv2-00000-of-00015 |
// Demangled: convolution2d(float*, float*, float*, int)
Function : _Z13convolution2dPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R6, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x398] &wr=0x2 ?trans1;
VIMNMX.S32 R3, R6, UR4, !PT &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, R0, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IMAD R10, R0, UR4, RZ ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R7, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P0, PT, R6, RZ, PT ?trans1;
IADD3 R8, PT, PT, R10.reuse, -R0, RZ ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R10, R6, RZ ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
ISETP.EQ.OR P0, PT, RZ, UR4, !P0 ?trans1;
SHF.R.S32.HI R9, RZ, 0x1f, R8 ?WAIT5_END_GROUP;
IADD.64 R12, R8, R6 ?WAIT5_END_GROUP;
LEA R14, P1, R12, UR8, 0x2 &req={1} ?trans1;
IMAD.WIDE.U32 R4, R11, 0x4, R4 &req={0} ?WAIT3_END_GROUP;
LEA.HI.X R15, R12, UR9, R13, 0x2, P1 ?trans2;
@!P0 LDG.E R12, desc[UR6][R2.64] &req={2} &wr=0x2 ?trans4;
LDG.E R9, desc[UR6][R4.64] &wr=0x2 ?trans4;
@!P0 LDG.E R13, desc[UR6][R14.64+-0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, RZ, UR4, PT ?WAIT13_END_GROUP;
@P1 LDC.64 R16, c[0x0][0x380] &wr=0x0 ?trans1;
@P1 IADD3 R19, PT, PT, R8, R6, RZ ?WAIT5_END_GROUP;
@P1 IMAD.WIDE R16, R19, 0x4, R16 &req={0} ?WAIT4_END_GROUP;
@!P0 FFMA R9, R12, R13, R9 &req={2} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R4.64], R9 &rd=0x0 ?trans4;
@P1 LDG.E R16, desc[UR6][R16.64] &wr=0x0 ?trans4;
@P1 LDG.E R12, desc[UR6][R2.64+0x4] &wr=0x0 ?trans1;
IADD3 R13, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R13, R0, PT ?WAIT5_END_GROUP;
ISETP.EQ.OR P2, PT, RZ, UR4, P0 ?trans1;
IADD3 R13, PT, PT, R6, -0x1, RZ ?trans1;
@P1 FFMA R9, R12, R16, R9 &req={0} ?WAIT5_END_GROUP;
@P1 STG.E desc[UR6][R4.64], R9 &rd=0x0 ?trans6;
@!P2 LDG.E R14, desc[UR6][R14.64+0x4] &wr=0x0 ?trans4;
@!P2 LDG.E R12, desc[UR6][R2.64+0x8] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P1, PT, R13, R0, PT ?WAIT13_END_GROUP;
@!P1 LDC.64 R16, c[0x0][0x380] &wr=0x1 ?trans1;
@!P1 IADD3 R19, PT, PT, R10, R13, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.WIDE.U32 R16, R19, 0x4, R16 &req={1} ?WAIT4_END_GROUP;
@!P2 FFMA R9, R12, R14, R9 &req={0} ?WAIT5_END_GROUP;
@!P2 STG.E desc[UR6][R4.64], R9 &rd=0x0 ?trans4;
@!P1 LDG.E R16, desc[UR6][R16.64] &wr=0x0 ?trans4;
@!P1 LDG.E R12, desc[UR6][R2.64+0xc] &wr=0x0 ?trans1;
LEA R14, P2, R11, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R11, UR9, RZ, 0x2, P2 ?trans1;
@!P0 MOV R11, RZ ?trans1;
@!P1 FFMA R9, R12, R16, R9 &req={0} ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR6][R4.64], R9 &rd=0x0 ?trans4;
LDG.E R14, desc[UR6][R14.64] &wr=0x2 ?trans4;
LDG.E R12, desc[UR6][R2.64+0x10] &wr=0x2 ?trans1;
@!P0 IADD.64 R10, R6, R10 ?WAIT5_END_GROUP;
@!P0 LEA R18, P1, R10, UR8, 0x2 ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R19, R10, UR9, R11, 0x2, P1 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x1, URZ ?trans1;
FFMA R17, R12, R14, R9 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x1 ?trans4;
@!P0 LDG.E R18, desc[UR6][R18.64+0x4] &wr=0x1 ?trans4;
@!P0 LDG.E R12, desc[UR6][R2.64+0x14] &wr=0x1 ?trans1;
VIMNMX.U32 R9, R13, UR4, !PT &req={0} ?trans1;
IADD3 R8, PT, PT, R8, R0, R0 ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R9, R0, PT ?WAIT13_END_GROUP;
@!P1 LDC.64 R10, c[0x0][0x380] &wr=0x0 ?trans1;
@!P1 IADD3 R13, PT, PT, R13, R8, RZ ?WAIT5_END_GROUP;
@!P1 IMAD.WIDE.U32 R10, R13, 0x4, R10 &req={0} ?WAIT4_END_GROUP;
@!P0 FFMA R17, R12, R18, R17 &req={1} ?WAIT5_END_GROUP;
@!P0 STG.E desc[UR6][R4.64], R17 &rd=0x0 ?trans4;
@!P1 LDG.E R10, desc[UR6][R10.64] &wr=0x0 ?trans4;
@!P1 LDG.E R12, desc[UR6][R2.64+0x18] &wr=0x0 ?trans1;
ISETP.LE.U32.AND P2, PT, R0, UR4, PT ?trans1;
@!P1 FFMA R17, R12, R10, R17 &req={0} ?WAIT5_END_GROUP;
@!P1 STG.E desc[UR6][R4.64], R17 &rd=0x0 ?trans7;
@P2 BRA 0x600 ?trans5;
LDC.64 R10, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R8, R6, RZ ?trans1;
LDG.E R0, desc[UR6][R2.64+0x1c] &wr=0x2 ?trans4;
IMAD.WIDE.U32 R10, R13, 0x4, R10 &req={1} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x600 ?trans1;
FFMA R17, R0, R10, R17 &req={2,0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R17 &rd=0x0 ?trans1;
@P0 BRA 0x5f0 ?trans5;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
LDG.E R2, desc[UR6][R2.64+0x20] &wr=0x2 ?trans4;
IADD.64 R6, R6, R8 ?WAIT5_END_GROUP;
LEA R8, P0, R6, UR8, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R9, R6, UR9, R7, 0x2, P0 ?WAIT6_END_GROUP;
LDG.E R9, desc[UR6][R8.64+0x4] &wr=0x2 ?trans2;
FFMA R7, R2, R9, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR6][R4.64], R7 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
EXIT ?trans5;
BRA 0x620;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: convolution2d(float*, float*, float*, int)
_Z13convolution2dPfS_S_i:
s_load_b32 s8, s[0:1], 0x18
v_max_i32_e32 v1, s15, v0
s_mov_b32 s2, exec_lo
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s8, v1
s_cbranch_execz .LBB1_8
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
s_add_i32 s0, s15, -1
s_mov_b32 s1, -1
s_mul_i32 s9, s8, s0
s_mov_b32 s10, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_add_nc_u32_e32 v2, -1, v0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
v_add_co_u32 v0, vcc_lo, s6, v3
v_mov_b32_e32 v3, 0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
.LBB1_2:
s_add_i32 s0, s1, s15
v_mov_b32_e32 v4, v2
s_cmp_gt_i32 s0, -1
s_cselect_b32 s6, -1, 0
s_cmp_lt_i32 s0, s8
s_cselect_b32 s0, -1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_b32 s11, s6, s0
s_mov_b64 s[6:7], 0
.LBB1_3:
v_cmp_lt_i32_e32 vcc_lo, -1, v4
v_cmp_gt_i32_e64 s0, s8, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_b32 s12, s11, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s0, s12
s_cbranch_execz .LBB1_5
v_add_nc_u32_e32 v5, s9, v4
s_add_u32 s12, s2, s6
s_addc_u32 s13, s3, s7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s4, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
global_load_b32 v7, v3, s[12:13]
global_load_b32 v5, v[5:6], off
global_load_b32 v6, v[0:1], off
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v6, v7, v5
global_store_b32 v[0:1], v6, off
.LBB1_5:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v4, 1, v4
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmp_lg_u32 s6, 12
s_cbranch_scc1 .LBB1_3
s_add_i32 s10, s10, 1
s_add_i32 s1, s1, 1
s_add_i32 s9, s9, s8
s_add_u32 s2, s2, 12
s_addc_u32 s3, s3, 0
s_cmp_lg_u32 s10, 3
s_cbranch_scc1 .LBB1_2
s_waitcnt_vscnt null, 0x0
s_barrier
buffer_gl0_inv
.LBB1_8:
s_endpgm
| convolution2d | 2,817 | 1,257 | stackv2-00000-of-00015 |
// Demangled: matrix_multi(float*, float*, float*, int)
Function : _Z12matrix_multiPfS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans1;
S2R R7, SR_TID.X &wr=0x2 ?trans7;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x2 ?trans7;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R5, c[0x0][0x370] &wr=0x3 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT4_END_GROUP;
IMAD R0, R0, R5, UR5 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R0, UR6, R7 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R6, 0x1fff, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDCU UR14, c[0x0][0x398] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?trans1;
LDCU.64 UR26, c[0x0][0x358] &wr=0x1 ?trans1;
USHF.R.S32.HI UR12, URZ, 0x2, UR14 &req={0} ?trans1;
ULOP3.LUT UR14, UR14, 0xfffffffc, URZ, 0xc0, !UPT ?WAIT3_END_GROUP;
UIMAD UR13, UR12, 0x3, URZ ?trans1;
UIMAD UR15, UR12, 0x6, URZ &req={1} ?WAIT12_END_GROUP;
MOV R4, RZ &req={0} ?trans1;
MOV R2, RZ ?trans1;
MOV R8, R0 ?trans1;
MOV R9, RZ ?trans1;
LDCU.128 UR20, c[0x0][0x380] &wr=0x0 ?trans1;
UIADD3 UR16, UPT, UPT, UR12, UR12, URZ ?trans1;
UIMAD UR17, UR12, 0x5, URZ ?trans1;
UIMAD UR18, UR12, 0x7, URZ ?trans1;
UMOV UR4, URZ ?trans1;
UMOV UR19, UR15 ?trans1;
UMOV UR24, UR14 ?trans1;
UMOV UR10, UR13 ?trans1;
UMOV UR25, UR12 ?WAIT7_END_GROUP;
USHF.R.S32.HI UR5, URZ, 0x1f, UR4 ?trans1;
USHF.R.S32.HI UR9, URZ, 0x1f, UR16 ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR25 ?trans1;
UMOV UR8, UR16 ?trans1;
USHF.R.S32.HI UR11, URZ, 0x1f, UR10 ?trans1;
UMOV UR6, UR25 ?trans1;
IADD.64 R10, R6, UR4 ?trans2;
IADD.64 R12, R8, UR4 ?trans2;
IADD.64 R14, R6, UR6 ?WAIT2_END_GROUP;
IADD.64 R18, R8, UR6 ?trans2;
USHF.R.S32.HI UR7, URZ, 0x1f, UR24 ?trans1;
LEA R32, P0, R10, UR20, 0x2 &req={0} ?trans1;
IADD.64 R20, R6.reuse, UR8 ?trans2;
IADD.64 R30, R6, UR10 ?trans2;
UMOV UR6, UR24 ?trans1;
LEA.HI.X R33, R10, UR21, R11, 0x2, P0 ?trans1;
IADD.64 R26, R6, UR6 ?WAIT2_END_GROUP;
IADD.64 R28, R8, UR6 ?trans2;
USHF.R.S32.HI UR7, URZ, 0x1f, UR17 ?trans1;
LEA R36, P0, R12, UR22, 0x2 ?trans1;
IADD.64 R24, R8, UR10 ?trans2;
LDG.E R3, desc[UR26][R32.64] &wr=0x2 ?trans1;
LEA.HI.X R37, R12, UR23, R13, 0x2, P0 ?trans1;
IADD.64 R12, R8, UR8 ?WAIT3_END_GROUP;
LEA R34, P1, R14, UR20, 0x2 ?trans2;
LEA R16, P2, R18, UR22, 0x2 ?trans2;
LEA R10, P3, R20, UR20, 0x2 ?trans1;
UMOV UR6, UR17 ?trans1;
LEA R22, P0, R12, UR22, 0x2 ?trans1;
USHF.R.S32.HI UR9, URZ, 0x1f, UR19 ?trans1;
LEA.HI.X R35, R14, UR21, R15, 0x2, P1 ?trans1;
LDG.E R5, desc[UR26][R36.64] &rd=0x0 &wr=0x2 ?trans1;
LEA.HI.X R23, R12, UR23, R13, 0x2, P0 ?WAIT2_END_GROUP;
LEA R12, P0, R30, UR20, 0x2 ?trans1;
UMOV UR8, UR19 ?trans1;
LEA.HI.X R17, R18, UR23, R19, 0x2, P2 ?trans1;
LDG.E R34, desc[UR26][R34.64] &wr=0x3 ?trans1;
LEA.HI.X R11, R20, UR21, R21, 0x2, P3 ?trans2;
LEA.HI.X R13, R30, UR21, R31, 0x2, P0 ?trans1;
IADD.64 R30, R6, UR6 ?trans2;
LDG.E R17, desc[UR26][R16.64] &wr=0x3 ?trans1;
LEA R18, P1, R24, UR22, 0x2 ?WAIT2_END_GROUP;
LEA R20, P2, R26, UR20, 0x2 ?trans1;
LDG.E R10, desc[UR26][R10.64] &wr=0x4 ?trans1;
LEA R14, P3, R28, UR22, 0x2 ?trans2;
LEA.HI.X R19, R24, UR23, R25, 0x2, P1 ?trans1;
IADD.64 R24, R8, UR6 ?trans2;
LDG.E R23, desc[UR26][R22.64] &wr=0x4 ?trans1;
LEA.HI.X R21, R26, UR21, R27, 0x2, P2 ?trans2;
LEA.HI.X R15, R28, UR23, R29, 0x2, P3 ?trans1;
IADD.64 R28, R6, UR8 ?WAIT2_END_GROUP;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
LEA R26, P0, R30, UR20, 0x2 ?trans1;
IADD.64 R36, R8, UR8 &req={0} ?trans2;
LDG.E R12, desc[UR26][R12.64] &wr=0x5 ?trans1;
LEA.HI.X R27, R30, UR21, R31, 0x2, P0 ?trans2;
LEA R30, P0, R24, UR22, 0x2 ?trans1;
LDG.E R35, desc[UR26][R18.64] &wr=0x5 ?trans1;
LEA R32, P1, R28, UR20, 0x2 ?trans1;
UMOV UR6, UR18 ?trans1;
LEA.HI.X R31, R24, UR23, R25, 0x2, P0 ?trans1;
LDG.E R11, desc[UR26][R20.64] &rd=0x0 &wr=0x5 ?trans1;
LEA.HI.X R33, R28, UR21, R29, 0x2, P1 ?trans1;
IADD.64 R28, R6, UR6 ?WAIT2_END_GROUP;
IADD.64 R24, R8, UR6 ?trans2;
LDG.E R16, desc[UR26][R14.64] &rd=0x1 &wr=0x5 ?trans1;
LEA R20, P0, R36, UR22, 0x2 &req={0} ?WAIT3_END_GROUP;
LDG.E R26, desc[UR26][R26.64] &wr=0x5 ?trans1;
LEA R18, P1, R28, UR20, 0x2 ?trans2;
LEA.HI.X R21, R36, UR23, R37, 0x2, P0 ?trans1;
LDG.E R31, desc[UR26][R30.64] &wr=0x5 ?trans1;
LEA R14, P2, R24, UR22, 0x2 &req={1} ?trans2;
LEA.HI.X R19, R28, UR21, R29, 0x2, P1 ?trans1;
LDG.E R32, desc[UR26][R32.64] &wr=0x5 ?trans1;
LEA.HI.X R15, R24, UR23, R25, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR26][R20.64] &wr=0x5 ?trans4;
LDG.E R18, desc[UR26][R18.64] &wr=0x5 ?trans4;
LDG.E R14, desc[UR26][R14.64] &wr=0x5 ?trans1;
IADD3 R2, PT, PT, R2, 0x8, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R2, 0x2000, PT ?trans1;
ULEA UR25, UR12, UR25, 0x3 ?trans1;
ULEA UR16, UR12, UR16, 0x3 ?trans1;
ULEA UR10, UR12, UR10, 0x3 ?trans1;
ULEA UR24, UR12, UR24, 0x3 ?trans1;
ULEA UR17, UR12, UR17, 0x3 ?trans1;
ULEA UR19, UR12, UR19, 0x3 ?trans1;
ULEA UR18, UR12, UR18, 0x3 ?trans1;
ULEA UR4, UR12, UR4, 0x3 ?trans1;
FFMA R3, R3, R5, R4 &req={2} ?WAIT4_END_GROUP;
FFMA R3, R34, R17, R3 &req={3} ?WAIT4_END_GROUP;
FFMA R3, R10, R23, R3 &req={4} ?WAIT4_END_GROUP;
FFMA R12, R12, R35, R3 &req={5} ?WAIT4_END_GROUP;
FFMA R11, R11, R16, R12 ?WAIT4_END_GROUP;
FFMA R11, R26, R31, R11 ?WAIT4_END_GROUP;
FFMA R11, R32, R20, R11 ?WAIT4_END_GROUP;
FFMA R4, R18, R14, R11 ?trans1;
@P0 BRA 0x220 ?trans6;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD R5, R6, 0x2000, R0 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R0, 0x2000, PT ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR26][R2.64], R4 &rd=0x0 ?trans7;
@P0 BRA 0x150 ?trans5;
EXIT ?trans5;
BRA 0x8b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrix_multi(float*, float*, float*, int)
_Z12matrix_multiPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x20
v_bfe_u32 v1, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 0x2000, v0
s_cbranch_execz .LBB0_5
s_clause 0x2
s_load_b32 s2, s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[0:1]
v_dual_mov_b32 v1, 0 :: v_dual_lshlrev_b32 v0, 13, v0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s2, s2, 2
v_add_co_u32 v2, vcc_lo, s4, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[2:3], s[2:3], 2
.LBB0_2:
v_mov_b32_e32 v4, 0
s_movk_i32 s9, 0x2000
s_mov_b64 s[4:5], 0
.LBB0_3:
s_delay_alu instid0(SALU_CYCLE_1)
v_add_co_u32 v5, vcc_lo, v2, s4
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
s_add_u32 s10, s6, s4
s_addc_u32 s11, s7, s5
global_load_b32 v7, v1, s[10:11]
global_load_b32 v5, v[5:6], off
s_add_i32 s9, s9, -1
s_add_u32 s4, s4, s2
s_addc_u32 s5, s5, s3
s_cmp_lg_u32 s9, 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v4, v5, v7
s_cbranch_scc1 .LBB0_3
v_add_nc_u32_e32 v5, s8, v0
s_add_i32 s8, s8, 1
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmpk_lg_i32 s8, 0x2000
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s0, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
global_store_b32 v[5:6], v4, off
s_cbranch_scc1 .LBB0_2
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrix_multi | 3,454 | 1,238 | stackv2-00000-of-00015 |
// Demangled: par_sieve(int*, int, int, int, int)
Function : _Z9par_sievePiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R6, c[0x0][0x38c] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R3, SR_TID.X &wr=0x3 ?trans6;
LDC R0, c[0x0][0x360] &wr=0x4 ?trans8;
S2UR UR6, SR_CTAID.X &wr=0x0 ?trans1;
UVIMNMX.S32 UR4, UR4, 0x2, UPT &req={2} ?trans1;
VIMNMX.S32 R6, R6, UR5, PT &req={1} ?WAIT6_END_GROUP;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans1;
ISETP.LT.AND P0, PT, R6, UR4, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={4,3,0} ?trans5;
LDCU UR5, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD R0, R0, UR6, R3 ?trans1;
MOV R7, UR4 ?trans1;
LDCU.64 UR8, c[0x0][0x358] &wr=0x1 ?trans3;
IADD3 R8, PT, PT, R0, 0x1, RZ ?trans1;
UIADD3 UR5, UPT, UPT, UR5, -0x1, URZ &req={0} ?WAIT12_END_GROUP;
LDCU UR4, c[0x0][0x38c] &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x280 ?trans1;
ISETP.GE.AND P0, PT, R0, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
LDC.64 R4, c[0x0][0x380] &wr=0x0 ?trans2;
IMAD.WIDE R2, R7, 0x4, R4 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR8][R2.64+-0x8] &req={1} &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R2, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
IADD3 R12, PT, PT, R7, -0x2, RZ ?WAIT5_END_GROUP;
IMAD R2, R8, R7, R12 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R2, UR5, PT ?WAIT13_END_GROUP;
@P0 BRA 0x270 ?trans5;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
MOV R9, R2 ?WAIT7_END_GROUP;
IADD3 R11, PT, PT, R11, UR4, RZ ?trans1;
IMAD.WIDE R2, R9, 0x4, R4 ?WAIT3_END_GROUP;
IADD3 R10, PT, PT, R8, R11, RZ ?trans2;
STG.E desc[UR8][R2.64], RZ &rd=0x0 ?trans3;
IMAD R9, R10, R7, R12 ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R9, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x200 &req={0} ?trans5;
BSYNC.RECONVERGENT B0 &req={1} ?trans5;
ISETP.NE.AND P0, PT, R7.reuse, R6, PT ?trans1;
IADD3 R7, PT, PT, R7, 0x1, RZ ?WAIT12_END_GROUP;
@P0 BRA 0x110 ?trans5;
EXIT ?trans5;
BRA 0x2c0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: par_sieve(int*, int, int, int, int)
_Z9par_sievePiiiii:
s_load_b128 s[4:7], s[0:1], 0x8
s_add_u32 s8, s0, 24
s_addc_u32 s9, s1, 0
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_min_i32 s2, s6, 2
s_min_i32 s10, s5, s7
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_gt_i32 s2, s10
s_cbranch_scc1 .LBB0_8
s_load_b32 s3, s[8:9], 0xc
s_load_b64 s[6:7], s[0:1], 0x0
s_add_i32 s4, s4, -1
s_mul_i32 s11, s5, s2
v_mov_b32_e32 v5, 0
s_waitcnt lgkmcnt(0)
s_and_b32 s0, s3, 0xffff
s_add_u32 s8, s6, -8
v_mad_u64_u32 v[2:3], null, s15, s0, v[0:1]
s_addc_u32 s9, s7, -1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v3, 2, v2
v_cmp_gt_i32_e64 s0, s5, v2
v_add_nc_u32_e32 v4, 1, v2
v_mad_u64_u32 v[0:1], null, s2, v3, -2
.LBB0_2:
s_delay_alu instid0(VALU_DEP_3)
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB0_7
s_ashr_i32 s3, s2, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[14:15], s[2:3], 2
s_add_u32 s14, s8, s14
s_addc_u32 s15, s9, s15
global_load_b32 v1, v5, s[14:15]
s_waitcnt vmcnt(0)
v_cmp_ne_u32_e32 vcc_lo, 1, v1
s_cbranch_vccnz .LBB0_7
v_mul_lo_u32 v1, v4, s2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add3_u32 v1, s2, -2, v1
v_cmp_gt_i32_e32 vcc_lo, s4, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_7
v_mov_b32_e32 v1, v0
s_mov_b32 s3, 0
.LBB0_6:
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[6:7], 2, v[1:2]
v_add_nc_u32_e32 v1, s11, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cmp_le_i32_e32 vcc_lo, s4, v1
v_add_co_u32 v6, s1, s6, v6
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v7, s1, s7, v7, s1
s_or_b32 s3, vcc_lo, s3
global_store_b32 v[6:7], v5, off
s_and_not1_b32 exec_lo, exec_lo, s3
s_cbranch_execnz .LBB0_6
.LBB0_7:
s_or_b32 exec_lo, exec_lo, s12
s_delay_alu instid0(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v3
s_add_i32 s1, s2, 1
s_add_i32 s11, s11, s5
s_cmp_ge_i32 s2, s10
s_mov_b32 s2, s1
s_cbranch_scc0 .LBB0_2
.LBB0_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| par_sieve | 1,082 | 1,205 | stackv2-00000-of-00015 |
// Demangled: matrixMult(int*, int*, int*, int)
Function : _Z10matrixMultPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans1;
LDCU UR18, c[0x0][0x398] &wr=0x2 ?trans1;
S2R R0, SR_TID.X &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.Y &wr=0x1 ?trans8;
S2UR UR5, SR_CTAID.X &wr=0x3 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x3 ?trans1;
IMAD R2, R2, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R7, R7, UR5, R0 &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R0, R2, R7, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR18, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR18, 0x8, UPT ?trans1;
UMOV UR4, URZ ?trans1;
LDCU.64 UR16, c[0x0][0x358] &wr=0x0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R2, R2, UR18, RZ ?trans1;
PLOP3.LUT P0, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT13_END_GROUP;
@!P0 BRA 0x510 ?trans5;
LDCU.128 UR20, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R6, R7 ?trans1;
ULOP3.LUT UR4, UR18, 0x7ffffff8, URZ, 0xc0, !UPT ?WAIT4_END_GROUP;
UIADD3 UR5, UPT, UPT, -UR4, URZ, URZ ?WAIT3_END_GROUP;
UMOV UR4, URZ ?trans1;
MOV.64 R4, UR20 &req={1} ?trans2;
UIMAD.WIDE UR6, UR18, 0x1c, UR22 ?trans1;
UIMAD.WIDE UR8, UR18, 0x18, UR22 ?trans1;
UIMAD.WIDE UR10, UR18, 0x14, UR22 ?trans1;
UIMAD.WIDE UR12, UR18, 0x10, UR22 ?trans1;
IMAD.WIDE.U32 R4, R2, 0x4, R4 ?trans1;
UIMAD.WIDE UR14, UR18, 0xc, UR22 ?WAIT4_END_GROUP;
IADD.64 R4, R4, 0x10 ?WAIT8_END_GROUP;
MOV R21, 0x4 ?trans1;
UIMAD.WIDE UR20, UR18, 0x4, UR22 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
UIMAD.WIDE UR24, UR18, 0x8, UR22 ?trans1;
MOV R9, 0x4 ?trans1;
IMAD.WIDE R20, R6.reuse, R21, UR22 ?trans1;
LDG.E R12, desc[UR16][R4.64+-0x10] &req={0} &wr=0x2 ?trans3;
HFMA2 R19, -RZ, RZ, 0, 2.384185791015625e-07 ?trans2;
IMAD.WIDE R10, R6, R11, UR20 ?trans1;
LDG.E R13, desc[UR16][R20.64] &rd=0x0 &wr=0x2 ?trans1;
MOV R23, 0x4 ?WAIT2_END_GROUP;
IMAD.WIDE R8, R6.reuse, R9, UR24 ?trans1;
LDG.E R14, desc[UR16][R10.64] &rd=0x1 &wr=0x3 ?trans4;
LDG.E R15, desc[UR16][R4.64+-0xc] &wr=0x3 ?trans1;
IMAD.WIDE R18, R6, R19, UR14 ?WAIT4_END_GROUP;
HFMA2 R25, -RZ, RZ, 0, 2.384185791015625e-07 ?trans1;
LDG.E R16, desc[UR16][R8.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R22, R6, R23, UR12 ?WAIT3_END_GROUP;
LDG.E R17, desc[UR16][R4.64+-0x8] &wr=0x5 ?trans1;
IMAD.WIDE R20, R6, R25, UR10 &req={0} ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x5 ?trans4;
LDG.E R24, desc[UR16][R4.64+-0x4] &wr=0x5 ?trans1;
MOV R11, 0x4 &req={1} ?trans1;
IMAD.WIDE R8, R6.reuse, R25, UR8 &req={4} ?trans2;
LDG.E R22, desc[UR16][R22.64] &wr=0x4 ?trans4;
LDG.E R26, desc[UR16][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R10, R6, R11, UR6 ?WAIT3_END_GROUP;
LDG.E R20, desc[UR16][R20.64] &wr=0x4 ?trans4;
LDG.E R28, desc[UR16][R4.64+0x4] &wr=0x4 ?trans4;
LDG.E R8, desc[UR16][R8.64] &rd=0x0 &wr=0x4 ?trans4;
LDG.E R30, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans4;
LDG.E R19, desc[UR16][R4.64+0xc] &rd=0x1 &wr=0x4 ?trans1;
UIADD3 UR5, UPT, UPT, UR5, 0x8, URZ ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?trans1;
MOV R9, UR18 &req={0} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x8, URZ ?trans1;
IADD.64 R4, R4, 0x20 &req={1} ?WAIT3_END_GROUP;
IMAD R6, R9, 0x8, R6 ?trans2;
IMAD R12, R12, R13, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R12, R15, R14, R12 &req={3} ?WAIT4_END_GROUP;
IMAD R17, R17, R16, R12 &req={5} ?WAIT4_END_GROUP;
IMAD R17, R24, R18, R17 ?WAIT4_END_GROUP;
IMAD R17, R26, R22, R17 &req={4} ?WAIT4_END_GROUP;
IMAD R17, R28, R20, R17 ?WAIT4_END_GROUP;
IMAD R8, R30, R8, R17 ?WAIT4_END_GROUP;
IMAD R0, R19, R10, R8 ?trans1;
@P0 BRA 0x210 ?trans6;
ULOP3.LUT UR5, UR18, 0x7, URZ, 0xc0, !UPT ?WAIT6_END_GROUP;
ISETP.NE.AND P0, PT, RZ, UR5, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.GE.U32.AND UP0, UPT, UR5, 0x4, UPT ?trans1;
ULOP3.LUT UR6, UR18, 0x3, URZ, 0xc0, !UPT ?WAIT5_END_GROUP;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?trans1;
ISETP.NE.AND P0, PT, RZ, UR6, PT ?WAIT12_END_GROUP;
@!P1 BRA 0x7e0 ?trans5;
LDC.64 R8, c[0x0][0x388] &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x380] &wr=0x2 ?trans1;
HFMA2 R3, -RZ, RZ, 0, 0 ?trans1;
MOV R4, UR4 ?trans1;
MOV R12, UR18 ?trans1;
UMOV UR5, URZ ?trans1;
USHF.R.S32.HI UR7, URZ, 0x1f, UR18 ?trans1;
IADD.64 R18, R2, UR4 ?trans2;
LDC.64 R10, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD R5, R4, UR18, R7 ?trans1;
IADD3 R17, PT, PT, R2, UR4, RZ ?trans1;
MOV R13, UR7 ?WAIT5_END_GROUP;
IADD.64 R14, R12, R12 ?WAIT3_END_GROUP;
LEA R4, P1, R18, UR8, 0x2 &req={2} ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={1} ?WAIT3_END_GROUP;
LEA.HI.X R5, R18, UR9, R19, 0x2, P1 ?trans1;
MOV R19, UR18 ?trans1;
LEA R18, P1, R14, R8, 0x2 ?trans1;
LDG.E R6, desc[UR16][R8.64] &req={0} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R10, R17, 0x4, R10 &req={3} ?trans1;
IADD.64 R16, R12, R14 ?trans2;
LDG.E R21, desc[UR16][R4.64+0x4] &wr=0x3 ?trans1;
IMAD.WIDE R12, R19, 0x4, R8 ?trans1;
LEA.HI.X R19, R14, R9, R15, 0x2, P1 ?trans2;
LDG.E R11, desc[UR16][R10.64] &wr=0x2 ?trans1;
LEA R14, P1, R16, R8, 0x2 ?WAIT3_END_GROUP;
LDG.E R12, desc[UR16][R12.64] &wr=0x3 ?trans1;
LEA.HI.X R15, R16, R9, R17, 0x2, P1 ?WAIT3_END_GROUP;
LDG.E R18, desc[UR16][R18.64] &wr=0x4 ?trans4;
LDG.E R17, desc[UR16][R4.64+0x8] &wr=0x4 ?trans4;
LDG.E R23, desc[UR16][R4.64+0xc] &wr=0x5 ?trans4;
LDG.E R14, desc[UR16][R14.64] &wr=0x5 ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x4, URZ ?trans1;
IMAD R6, R11, R6, R0 &req={2} ?WAIT4_END_GROUP;
IMAD R6, R21, R12, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R6, R17, R18, R6 &req={4} ?WAIT4_END_GROUP;
IMAD R0, R23, R14, R6 &req={5} ?WAIT7_END_GROUP;
@!P0 BRA 0xa80 ?trans5;
UISETP.NE.AND UP0, UPT, UR6, 0x1, UPT ?trans1;
ULOP3.LUT UR5, UR18, 0x1, URZ, 0xc0, !UPT ?trans1;
MOV R6, UR4 ?WAIT3_END_GROUP;
UISETP.NE.U32.AND UP1, UPT, UR5, 0x1, UPT ?trans1;
PLOP3.LUT P1, PT, PT, PT, UP0, 0x80, 0x8 ?WAIT5_END_GROUP;
@UP0 LDCU.128 UR8, c[0x0][0x380] &wr=0x1 ?trans1;
PLOP3.LUT P2, PT, PT, PT, UP1, 0x80, 0x8 ?trans1;
@UP0 LDCU.64 UR12, c[0x0][0x380] &wr=0x2 ?trans3;
@!UP1 LDCU.128 UR20, c[0x0][0x380] &wr=0x3 ?trans3;
@P1 MOV R4, R2 ?trans1;
@P1 MOV R5, RZ ?trans1;
@P1 IADD3 R15, PT, PT, R2, UR4, RZ ?trans1;
@UP0 UMOV UR6, UR4 ?trans1;
@UP0 UMOV UR7, URZ ?trans1;
@UP0 UIADD3 UR4, UPT, UPT, UR4, 0x2, URZ ?trans1;
@P1 IADD.64 R8, R4, UR6 ?WAIT2_END_GROUP;
@P1 IMAD R5, R6, UR18, R7 ?trans1;
MOV.64 R10, UR8 &req={1} ?trans2;
MOV.64 R12, UR10 ?trans2;
MOV R6, UR4 ?trans1;
@P1 LEA R4, P0, R8, UR12, 0x2 &req={2} ?trans1;
@P1 IMAD.WIDE.U32 R10, R15, 0x4, R10 ?trans1;
MOV R15, UR18 ?WAIT3_END_GROUP;
@P1 IMAD.WIDE R12, R5, 0x4, R12 ?trans1;
@P1 LEA.HI.X R5, R8, UR13, R9, 0x2, P0 ?trans1;
@P1 LDG.E R23, desc[UR16][R10.64] &req={0} &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R8, UR20 &req={3} ?WAIT3_END_GROUP;
@!P2 IADD3 R19, PT, PT, R2, UR4, RZ ?trans1;
MOV.64 R16, UR22 ?trans2;
@P1 IMAD.WIDE R14, R15, 0x4, R12 ?trans1;
@P1 LDG.E R4, desc[UR16][R4.64+0x4] &wr=0x3 ?trans3;
@!P2 IMAD R21, R6, UR18, R7 ?trans1;
@P1 LDG.E R12, desc[UR16][R12.64] &wr=0x2 ?trans1;
@!P2 IMAD.WIDE.U32 R8, R19, 0x4, R8 ?WAIT3_END_GROUP;
@P1 LDG.E R14, desc[UR16][R14.64] &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R21, 0x4, R16 &req={0} ?WAIT3_END_GROUP;
@!P2 LDG.E R9, desc[UR16][R8.64] &wr=0x4 ?trans4;
@!P2 LDG.E R10, desc[UR16][R10.64] &wr=0x4 ?trans1;
@P1 IMAD R23, R23, R12, R0 &req={2} ?WAIT4_END_GROUP;
@P1 IMAD R0, R4, R14, R23 &req={3} ?WAIT4_END_GROUP;
@!P2 IMAD R0, R9, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R7, R2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R3, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR16][R2.64], R0 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xad0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matrixMult(int*, int*, int*, int)
_Z10matrixMultPiS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v4, 0x3ff, v0
s_waitcnt lgkmcnt(0)
s_lshr_b32 s4, s3, 16
s_and_b32 s3, s3, 0xffff
v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_max_i32_e32 v1, v2, v0
v_cmpx_gt_i32_e64 s2, v1
s_cbranch_execz .LBB0_6
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_mul_lo_u32 v1, v2, s2
s_cmp_lt_i32 s2, 1
s_cbranch_scc1 .LBB0_4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v2, 31, v1
s_mov_b32 s3, s2
v_mov_b32_e32 v5, v0
v_lshlrev_b64 v[3:4], 2, v[1:2]
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_ashrrev_i32_e32 v6, 31, v5
s_add_i32 s3, s3, -1
s_cmp_eq_u32 s3, 0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[5:6]
v_add_co_u32 v6, vcc_lo, s6, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
global_load_b32 v8, v[3:4], off
global_load_b32 v9, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
v_add_co_u32 v3, vcc_lo, v3, 4
v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
s_cbranch_scc0 .LBB0_3
s_branch .LBB0_5
.LBB0_4:
v_mov_b32_e32 v2, 0
.LBB0_5:
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v1, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_store_b32 v[0:1], v2, off
.LBB0_6:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| matrixMult | 4,509 | 1,246 | stackv2-00000-of-00015 |
// Demangled: curand_test(curandStateXORWOW*, float*)
Function : _Z11curand_testP17curandStateXORWOWPf
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
LDG.E.64 R6, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans4;
LDG.E.64 R10, desc[UR4][R2.64+0x10] &wr=0x3 ?trans4;
LDG.E.64 R8, desc[UR4][R2.64+0x8] &wr=0x4 ?trans1;
HFMA2 R13, -RZ, RZ, 0.1171875, 0 ?trans1;
S2R R15, SR_TID.X &wr=0x0 ?trans1;
SHF.R.U32.HI R0, RZ, 0x2, R7 &req={2} ?WAIT2_END_GROUP;
IADD3 R6, PT, PT, R6, 0x587c5, RZ ?trans2;
LOP3.LUT R0, R0, R7, RZ, 0x3c, !PT ?trans1;
IMAD.SHL.U32 R5, R11, 0x10, RZ &req={3} ?trans1;
MOV R17, R10 ?trans1;
MOV R18, R11 ?trans1;
MOV R16, R9 &req={4} ?trans1;
IADD3 R4, PT, PT, R0, R0, RZ ?trans1;
MOV R7, R8 ?WAIT3_END_GROUP;
STG.E.64 desc[UR4][R2.64+0x8], R16 ?trans1;
LOP3.LUT R0, R0, R4, R5, 0x96, !PT ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
STG.E.64 desc[UR4][R2.64], R6 ?trans1;
LOP3.LUT R19, R0, R11, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R19, R6, RZ ?trans1;
STG.E.64 desc[UR4][R2.64+0x10], R18 ?trans3;
I2FP.F32.U32 R0, R0 ?WAIT5_END_GROUP;
FFMA R13, R0, R13, 1.1641532182693481445e-10 ?trans1;
IMAD.WIDE.U32 R4, R15, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64], R13 ?trans1;
EXIT ?trans5;
BRA 0x1d0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: curand_test(hiprandState*, float*)
_Z11curand_testP12hiprandStatePf:
s_load_b128 s[0:3], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
s_clause 0x2
s_load_b128 s[4:7], s[0:1], 0x18
s_load_b32 s8, s[0:1], 0x28
s_load_b32 s9, s[0:1], 0x0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v2, s6
s_lshr_b32 s10, s4, 2
s_add_i32 s9, s9, 0x587c5
s_xor_b32 s4, s10, s4
s_lshl_b32 s10, s8, 4
s_lshl_b32 s11, s4, 1
v_dual_mov_b32 v1, s5 :: v_dual_mov_b32 v4, s8
s_xor_b32 s10, s11, s10
v_dual_mov_b32 v3, s7 :: v_dual_mov_b32 v8, s9
s_xor_b32 s4, s10, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_xor_b32 s4, s4, s8
s_add_i32 s5, s9, s4
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_f32_u32_e32 v6, s5
v_dual_mov_b32 v7, s4 :: v_dual_fmaak_f32 v6, 0x2f800000, v6, 0x2f800000
s_clause 0x2
global_store_b32 v5, v7, s[0:1] offset:40
global_store_b128 v5, v[1:4], s[0:1] offset:24
global_store_b32 v5, v8, s[0:1]
global_store_b32 v0, v6, s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| curand_test | 823 | 609 | stackv2-00000-of-00015 |
// Demangled: add(int*, int*, int*, int*)
Function : _Z3addPiS_S_S_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x398] &wr=0x1 ?trans2;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
S2R R9, SR_CTAID.X &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R9, R2, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans8;
LDC.64 R4, c[0x0][0x388] &wr=0x1 ?trans8;
LDC.64 R6, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R4, R9, 0x4, R4 &req={1} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x3 ?trans1;
IMAD.WIDE.U32 R6, R9, 0x4, R6 &req={2} ?trans1;
IADD3 R9, PT, PT, R2, R5, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x120;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: add(int*, int*, int*, int*)
_Z3addPiS_S_S_:
s_load_b256 s[0:7], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b32 s6, s[6:7], 0x0
s_waitcnt lgkmcnt(0)
s_cmp_ge_i32 s15, s6
s_cbranch_scc1 .LBB0_2
s_mov_b32 s8, s15
s_ashr_i32 s9, s15, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_lshl_b64 s[6:7], s[8:9], 2
s_add_u32 s4, s4, s6
s_addc_u32 s5, s5, s7
s_add_u32 s2, s2, s6
s_addc_u32 s3, s3, s7
s_add_u32 s0, s0, s6
s_addc_u32 s1, s1, s7
s_load_b32 s0, s[0:1], 0x0
s_load_b32 s1, s[2:3], 0x0
s_waitcnt lgkmcnt(0)
s_add_i32 s0, s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
global_store_b32 v0, v1, s[4:5]
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| add | 542 | 413 | stackv2-00000-of-00015 |
// Demangled: calcPReLUKernel(float const*, float*, float const*, int, int, int)
Function : _Z15calcPReLUKernelPKfPfS0_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R5, SR_TID.Y &wr=0x1 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R0, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R2, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R5, R2, UR5, R5 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR7, PT &req={3} ?trans1;
IMAD R0, R3, UR4, R0 &req={2} ?WAIT5_END_GROUP;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R7, R5, UR6, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x310 ?trans1;
FSETP.GT.AND P0, PT, R9, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x300 ?trans5;
LDC R8, c[0x0][0x3a0] &wr=0x0 ?trans1;
IABS R6, R5 ?trans2;
IABS R11, R8 &req={0} ?WAIT4_END_GROUP;
I2F.RP R0, R11 &wr=0x0 ?trans2;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x1 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R4, PT, PT, RZ, -R3, RZ &req={1} ?WAIT5_END_GROUP;
IMAD R13, R4, R11, RZ ?trans1;
MOV R4, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R3, R3, R13, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R3, R3, R4, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R3, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R11.reuse, R3, R4 ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x0 ?trans3;
ISETP.GT.U32.AND P0, PT, R11, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R11, RZ ?trans1;
ISETP.GE.AND P0, PT, R5, RZ, PT ?WAIT4_END_GROUP;
ISETP.GT.U32.AND P1, PT, R11, R0, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R0, PT, PT, R0, -R11, RZ ?trans1;
ISETP.NE.AND P1, PT, R8, RZ, PT ?WAIT3_END_GROUP;
@!P0 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT10_END_GROUP;
@!P1 LOP3.LUT R0, RZ, R8, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE.U32 R2, R0, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans2;
FMUL R9, R9, R2 &req={2} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU.64 UR6, c[0x0][0x388] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R7 ?trans2;
LEA R2, P0, R7, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R3, R7, UR7, R0, 0x2, P0 ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x370;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: calcPReLUKernel(float const*, float*, float const*, int, int, int)
_Z15calcPReLUKernelPKfPfS0_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[8:11], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s3, s2, 16
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
v_cmp_gt_i32_e32 vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e64 s2, s9, v2
s_and_b32 s2, vcc_lo, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_4
s_load_b128 s[4:7], s[0:1], 0x0
v_mad_u64_u32 v[3:4], null, v2, s8, v[0:1]
s_load_b64 s[0:1], s[0:1], 0x10
s_mov_b32 s2, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
v_lshlrev_b64 v[0:1], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v3, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v1, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_cmpx_nlt_f32_e32 0, v3
s_cbranch_execz .LBB0_3
s_ashr_i32 s3, s10, 31
v_ashrrev_i32_e32 v6, 31, v2
s_add_i32 s4, s10, s3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s3, s4, s3
v_add_nc_u32_e32 v2, v2, v6
v_cvt_f32_u32_e32 v4, s3
s_sub_i32 s4, 0, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v2, v2, v6
v_rcp_iflag_f32_e32 v4, v4
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v4, 0x4f7ffffe, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v4, v4
v_mul_lo_u32 v5, s4, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v5, v4, v5
v_add_nc_u32_e32 v4, v4, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v4, v2, v4
v_mul_lo_u32 v4, v4, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v2, v2, v4
v_subrev_nc_u32_e32 v4, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v4, vcc_lo
v_subrev_nc_u32_e32 v4, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v2, v2, v4, vcc_lo
v_xor_b32_e32 v2, v2, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v2, v6
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[4:5]
v_add_co_u32 v4, vcc_lo, s0, v4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v2, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v3, v3, v2
.LBB0_3:
s_or_b32 exec_lo, exec_lo, s2
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[0:1], v3, off
.LBB0_4:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| calcPReLUKernel | 1,419 | 1,714 | stackv2-00000-of-00015 |
// Demangled: im2col_d(double const*, double*, int, int, int, int, int, int)
Function : _Z8im2col_dPKdPdiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R4, SR_CTAID.X &wr=0x1 ?trans7;
LDC R5, c[0x0][0x3a4] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans2;
IMAD R4, R4, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R4, R5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R6, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x0 ?trans2;
VIMNMX.S32 R0, R6, UR5, PT &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC R10, c[0x0][0x398] &wr=0x0 ?trans1;
IABS R9, R5 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans6;
LDC.64 R14, c[0x0][0x380] &wr=0x2 ?trans8;
LDC.64 R16, c[0x0][0x388] &wr=0x3 ?trans1;
IABS R8, R10 &req={0} ?WAIT4_END_GROUP;
I2F.RP R0, R8 &wr=0x0 ?trans1;
IADD.64 R14, R14, 0x40 &req={2} ?trans2;
IADD.64 R16, R16, 0x40 &req={3} ?trans2;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R7, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R7, R7, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R7, R2 ?trans1;
MOV R7, R9 ?trans1;
LOP3.LUT R2, R5, R10, RZ, 0x3c, !PT ?WAIT4_END_GROUP;
IMAD.HI.U32 R0, R3, R7, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R8, R3, R7 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R8.reuse, RZ ?trans2;
@!P1 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R2, RZ, PT ?trans1;
LOP3.LUT R2, R6.reuse, 0xf, RZ, 0xc0, !PT ?trans1;
ISETP.GE.U32.AND P0, PT, R3, R8, PT ?trans1;
MOV R3, R4 ?trans1;
LOP3.LUT R4, R6, 0x7, RZ, 0xc0, !PT ?WAIT11_END_GROUP;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?WAIT10_END_GROUP;
@!P0 LOP3.LUT R0, RZ, R10, RZ, 0x33, !PT &req={1} ?WAIT7_END_GROUP;
LDC R5, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x0 ?trans1;
IABS R10, R0 &req={3,1} ?trans2;
IABS R20, R3 ?trans2;
I2F.RP R11, R10 &wr=0x1 ?trans2;
MUFU.RCP R11, R11 &req={1} &wr=0x1 ?trans1;
IADD3 R5, PT, PT, -R5, UR5, RZ &req={0} ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x0 ?trans3;
IADD3 R6, PT, PT, R5, 0x1, RZ ?WAIT4_END_GROUP;
IABS R7, R6 ?WAIT4_END_GROUP;
I2F.RP R18, R7 &req={4,2} &wr=0x2 ?trans1;
IADD3 R8, PT, PT, R11, 0xffffffe, RZ &req={1} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R9, R8 &rd=0x1 &wr=0x3 ?trans1;
MUFU.RCP R18, R18 &req={2} &wr=0x2 ?trans1;
MOV R8, RZ &req={1} ?trans1;
IADD3 R21, PT, PT, RZ, -R9, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R11, R21, R10, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R8, R9, R11, R8 ?trans1;
IADD3 R12, PT, PT, R18, 0xffffffe, RZ &req={2} ?trans2;
IABS R18, R0 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x1 &wr=0x2 ?trans2;
IADD3 R9, PT, PT, RZ, -R18, RZ ?trans1;
MOV R12, RZ &req={1} ?trans1;
IADD3 R22, PT, PT, RZ, -R13, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R19, R22, R7, RZ ?trans1;
IABS R22, R6 ?WAIT3_END_GROUP;
IMAD.HI.U32 R12, R13, R19, R12 ?trans1;
MOV R13, R20 ?trans1;
IADD3 R22, PT, PT, RZ, -R22, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R12, R13, RZ ?trans1;
MOV R18, R22 ?WAIT3_END_GROUP;
IMAD.HI.U32 R8, R8, R13, RZ ?WAIT4_END_GROUP;
IMAD R18, R12, R18, R13.reuse ?trans2;
IMAD R9, R8, R9, R13 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R7, R18, PT ?trans2;
ISETP.GT.U32.AND P2, PT, R10, R9, PT ?WAIT11_END_GROUP;
@!P1 IADD3 R18, PT, PT, R18, -R7.reuse, RZ ?trans2;
@!P1 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans2;
@!P2 IADD3 R9, PT, PT, R9, -R10, RZ ?trans2;
@!P2 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R6, RZ, PT ?trans1;
ISETP.GE.U32.AND P3, PT, R18, R7, PT ?trans1;
LOP3.LUT R7, R3, R0, RZ, 0x3c, !PT ?trans1;
ISETP.GE.U32.AND P0, PT, R9, R10, PT ?trans1;
LOP3.LUT R9, R3, R6, RZ, 0x3c, !PT ?WAIT5_END_GROUP;
ISETP.GE.AND P1, PT, R9, RZ, PT ?WAIT5_END_GROUP;
@P3 IADD3 R12, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.GE.AND P3, PT, R7, RZ, PT ?trans1;
@P0 IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT4_END_GROUP;
MOV R7, R8 ?trans1;
@!P1 IADD3 R12, PT, PT, -R12, RZ, RZ ?trans2;
@!P2 LOP3.LUT R12, RZ, R6, RZ, 0x33, !PT ?trans1;
MOV R6, RZ ?WAIT3_END_GROUP;
@!P3 IADD3 R7, PT, PT, -R7, RZ, RZ ?trans1;
IMAD R8, R5, R12, R12 ?trans1;
@!P0 LOP3.LUT R7, RZ, R0, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD R5, R7, UR5, R12 &req={0} ?trans1;
IADD3 R7, PT, PT, -R8, R3, RZ ?WAIT7_END_GROUP;
LDC R8, c[0x0][0x39c] &req={3,1,0} &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x3a0] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R5, R6, RZ ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P2, PT, R2, RZ, PT ?trans1;
LDCU UR5, c[0x0][0x390] &req={2} &wr=0x2 ?trans1;
IMAD R11, R3, UR8, R6 &req={1} ?trans1;
IADD3 R6, PT, PT, R6, 0x1, RZ ?trans1;
IMAD R10, R10, UR5, R7 &req={2} ?trans1;
ISETP.GE.U32.AND P1, PT, R8, 0x10, PT &req={0} ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R6, UR8, PT ?trans1;
IMAD R11, R11, R8, RZ ?WAIT9_END_GROUP;
@!P1 BRA 0xa30 &req={4} ?trans5;
LOP3.LUT R34, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R12, RZ ?trans1;
MOV R13, R11 ?trans1;
MOV R9, R10 ?trans1;
IADD3 R34, PT, PT, -R34, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R20, R9, 0x8, R14 ?WAIT5_END_GROUP;
LDG.E.64 R30, desc[UR6][R20.64+-0x40] &req={4} &wr=0x2 ?trans1;
IMAD.WIDE R18, R13, 0x8, R16 ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R18.64+-0x40], R30 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R32, desc[UR6][R20.64+-0x38] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x38], R32 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R22, desc[UR6][R20.64+-0x30] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x30], R22 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R24, desc[UR6][R20.64+-0x28] &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x28], R24 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R26, desc[UR6][R20.64+-0x20] &wr=0x4 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x20], R26 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R28, desc[UR6][R20.64+-0x18] &wr=0x5 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x18], R28 &req={5} &rd=0x5 ?trans4;
LDG.E.64 R30, desc[UR6][R20.64+-0x10] &req={0} &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x10], R30 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R32, desc[UR6][R20.64+-0x8] &req={1} &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+-0x8], R32 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R22, desc[UR6][R20.64] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64], R22 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R24, desc[UR6][R20.64+0x8] &req={3} &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+0x8], R24 &req={3} &rd=0x3 ?trans4;
LDG.E.64 R26, desc[UR6][R20.64+0x10] &req={4} &wr=0x4 ?trans4;
STG.E.64 desc[UR6][R18.64+0x10], R26 &req={4} &rd=0x4 ?trans4;
LDG.E.64 R28, desc[UR6][R20.64+0x18] &req={5} &wr=0x5 ?trans4;
STG.E.64 desc[UR6][R18.64+0x18], R28 &req={5} &rd=0x4 ?trans4;
LDG.E.64 R30, desc[UR6][R20.64+0x20] &req={0} &wr=0x5 ?trans4;
STG.E.64 desc[UR6][R18.64+0x20], R30 &req={5} &rd=0x4 ?trans4;
LDG.E.64 R32, desc[UR6][R20.64+0x28] &req={1} &wr=0x5 ?trans4;
STG.E.64 desc[UR6][R18.64+0x28], R32 &req={5} &rd=0x4 ?trans4;
LDG.E.64 R22, desc[UR6][R20.64+0x30] &req={2} &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+0x30], R22 &req={2} &rd=0x4 ?trans4;
LDG.E.64 R24, desc[UR6][R20.64+0x38] &req={3} &wr=0x2 ?trans1;
IADD3 R34, PT, PT, R34, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, R12, 0x10, RZ ?trans2;
IADD3 R9, PT, PT, R9, 0x10, RZ ?trans2;
IADD3 R13, PT, PT, R13, 0x10, RZ ?trans1;
ISETP.NE.AND P1, PT, R34, RZ, PT ?trans1;
STG.E.64 desc[UR6][R18.64+0x38], R24 &req={2} &rd=0x4 ?WAIT12_END_GROUP;
@P1 BRA 0x7b0 ?trans5;
@!P2 BRA 0xe40 ?trans5;
IADD3 R9, PT, PT, R2, -0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R4, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R9, 0x7, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xbf0 ?trans5;
LDC.64 R20, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R10, R12, RZ ?WAIT7_END_GROUP;
LDC.64 R18, c[0x0][0x388] &req={4} &wr=0x1 ?trans1;
IMAD.WIDE R20, R9, 0x8, R20 &req={0} ?WAIT5_END_GROUP;
LDG.E.64 R22, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R11, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R9, 0x8, R18 &req={1} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R18.64], R22 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R24, desc[UR6][R20.64+0x8] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+0x8], R24 &req={2} &rd=0x1 ?trans4;
LDG.E.64 R26, desc[UR6][R20.64+0x10] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R18.64+0x10], R26 &req={2} &rd=0x2 ?trans4;
LDG.E.64 R28, desc[UR6][R20.64+0x18] &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+0x18], R28 &req={3} &rd=0x2 ?trans4;
LDG.E.64 R30, desc[UR6][R20.64+0x20] &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+0x20], R30 &req={3} &rd=0x2 ?trans4;
LDG.E.64 R32, desc[UR6][R20.64+0x28] &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+0x28], R32 &req={3} &rd=0x2 ?trans4;
LDG.E.64 R22, desc[UR6][R20.64+0x30] &req={0} &wr=0x3 ?trans4;
STG.E.64 desc[UR6][R18.64+0x30], R22 &req={3} &rd=0x2 ?trans4;
LDG.E.64 R24, desc[UR6][R20.64+0x38] &req={1} &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x8, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R18.64+0x38], R24 &req={3} &rd=0x2 ?trans4;
@!P2 BRA 0xe40 ?trans5;
IADD3 R9, PT, PT, R4, -0x1, RZ ?trans2;
LOP3.LUT P2, R13, R8, 0x3, RZ, 0xc0, !PT ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P1, PT, R9, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xd30 ?trans5;
LDC.64 R18, c[0x0][0x380] &req={4,2} &wr=0x0 ?trans1;
IADD3 R9, PT, PT, R10, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R9, 0x8, R18 &req={0} ?trans2;
LDC.64 R8, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E.64 R20, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD3 R23, PT, PT, R11, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R8, R23, 0x8, R8 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R8.64], R20 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R22, desc[UR6][R18.64+0x8] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R8.64+0x8], R22 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R24, desc[UR6][R18.64+0x10] &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R8.64+0x10], R24 &req={2} &rd=0x0 ?trans4;
LDG.E.64 R26, desc[UR6][R18.64+0x18] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R8.64+0x18], R26 &req={2} &rd=0x0 ?trans4;
@!P2 BRA 0xe40 ?trans5;
LDC.64 R18, c[0x0][0x380] &req={4,2} &wr=0x1 ?trans1;
IADD3 R9, PT, PT, R10, R12, RZ &req={0} ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x388] &wr=0x0 ?trans1;
IMAD.WIDE R18, R9, 0x8, R18 &req={1} ?WAIT5_END_GROUP;
LDG.E.64 R8, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R11, R12, RZ ?trans1;
ISETP.NE.AND P1, PT, R13, 0x1, PT ?WAIT4_END_GROUP;
IMAD.WIDE R10, R11, 0x8, R20 &req={0} ?WAIT5_END_GROUP;
STG.E.64 desc[UR6][R10.64], R8 &req={2} &rd=0x1 ?trans4;
@!P1 BRA 0xe40 ?trans5;
LDG.E.64 R8, desc[UR6][R18.64+0x8] &req={1} &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R13, 0x2, PT ?WAIT3_END_GROUP;
STG.E.64 desc[UR6][R10.64+0x8], R8 &req={2} &rd=0x3 ?trans10;
@!P1 BRA 0xe40 ?trans5;
LDG.E.64 R8, desc[UR6][R18.64+0x10] &req={3} &wr=0x2 ?trans4;
STG.E.64 desc[UR6][R10.64+0x10], R8 &req={2} &rd=0x0 ?trans2;
@P0 BRA 0x690 ?trans5;
LDC R6, c[0x0][0x370] &wr=0x5 ?trans1;
LDCU UR5, c[0x0][0x3a4] &wr=0x0 ?trans1;
IMAD R3, R6, UR4, R3 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR5, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x2e0 ?trans5;
EXIT ?trans5;
BRA 0xeb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: im2col_d(double const*, double*, int, int, int, int, int, int)
_Z8im2col_dPKdPdiiiiii:
s_load_b32 s17, s[0:1], 0x28
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s15, s17
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v1, s4
s_mov_b32 s4, exec_lo
global_load_u16 v3, v1, s[2:3]
s_load_b64 s[2:3], s[0:1], 0x20
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, v3, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_8
s_load_b256 s[4:11], s[0:1], 0x0
s_ashr_i32 s13, s3, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s14, s3, s13
s_xor_b32 s14, s14, s13
s_waitcnt lgkmcnt(0)
s_ashr_i32 s0, s10, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s1, s10, s0
s_xor_b32 s1, s1, s0
s_xor_b32 s0, s13, s0
v_cvt_f32_u32_e32 v0, s1
s_sub_i32 s12, 0, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s10, v0
s_mul_i32 s12, s12, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s12, s10, s12
s_add_i32 s10, s10, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s10, s14, s10
s_mul_i32 s12, s10, s1
s_add_i32 s13, s10, 1
s_sub_i32 s12, s14, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s14, s12, s1
s_cmp_ge_u32 s12, s1
s_cselect_b32 s10, s13, s10
s_cselect_b32 s12, s14, s12
s_add_i32 s13, s10, 1
s_cmp_ge_u32 s12, s1
s_cselect_b32 s1, s13, s10
s_sub_i32 s10, s8, s11
s_xor_b32 s12, s1, s0
s_add_i32 s1, s10, 1
s_sub_i32 s0, s12, s0
s_cmp_gt_i32 s2, 0
s_cselect_b32 s10, -1, 0
s_cmp_gt_i32 s11, 0
s_cselect_b32 s12, -1, 0
s_ashr_i32 s13, s1, 31
s_ashr_i32 s14, s0, 31
s_add_i32 s15, s1, s13
s_add_i32 s0, s0, s14
s_xor_b32 s15, s15, s13
s_xor_b32 s16, s0, s14
v_cvt_f32_u32_e32 v0, s15
v_cvt_f32_u32_e32 v2, s16
s_sub_i32 s0, 0, s15
s_sub_i32 s18, 0, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v4, v0
v_cvt_u32_f32_e32 v2, v2
v_mul_lo_u32 v0, s17, v3
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v5, s0, v4
v_mul_lo_u32 v6, s18, v2
s_mul_i32 s0, s2, s11
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_hi_u32 v3, v4, v5
v_mul_hi_u32 v5, v2, v6
v_mul_lo_u32 v6, s0, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v8, v4, v3
v_add_nc_u32_e32 v9, v2, v5
.LBB0_2:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB0_7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v1, v2
v_xor_b32_e32 v3, v3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v3, v9
v_mul_hi_u32 v5, v3, v8
v_mul_lo_u32 v10, v4, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v11, v5, s15
v_add_nc_u32_e32 v12, 1, v4
v_sub_nc_u32_e32 v10, v3, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v3, v11
v_add_nc_u32_e32 v11, 1, v5
v_subrev_nc_u32_e32 v13, s16, v10
v_cmp_le_u32_e32 vcc_lo, s16, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cmp_le_u32_e64 s0, s15, v3
v_cndmask_b32_e32 v4, v4, v12, vcc_lo
v_subrev_nc_u32_e32 v12, s15, v3
v_cndmask_b32_e32 v10, v10, v13, vcc_lo
v_cndmask_b32_e64 v5, v5, v11, s0
v_xor_b32_e32 v13, s14, v2
v_add_nc_u32_e32 v11, 1, v4
v_cndmask_b32_e64 v3, v3, v12, s0
v_cmp_le_u32_e32 vcc_lo, s16, v10
v_add_nc_u32_e32 v12, 1, v5
v_xor_b32_e32 v10, s13, v2
s_mov_b32 s0, 0
v_cndmask_b32_e32 v4, v4, v11, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s15, v3
v_mov_b32_e32 v11, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v4, v13
v_cndmask_b32_e32 v2, v5, v12, vcc_lo
v_sub_nc_u32_e32 v5, v3, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v10
v_mad_u64_u32 v[3:4], null, v5, s9, v[2:3]
v_sub_nc_u32_e32 v2, v2, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v5, v2, s1
v_sub_nc_u32_e32 v4, v3, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s8, v4, v[1:2]
v_sub_nc_u32_e32 v10, v2, v5
.LBB0_4:
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v2, v10
v_mov_b32_e32 v4, v11
s_and_not1_b32 vcc_lo, exec_lo, s12
s_mov_b32 s18, s11
s_cbranch_vccnz .LBB0_6
.LBB0_5:
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s18, s18, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_eq_u32 s18, 0
v_lshlrev_b64 v[12:13], 3, v[2:3]
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
v_lshlrev_b64 v[14:15], 3, v[4:5]
v_add_nc_u32_e32 v4, 1, v4
v_add_nc_u32_e32 v2, 1, v2
v_add_co_u32 v12, vcc_lo, s4, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
v_add_co_u32 v14, vcc_lo, s6, v14
v_add_co_ci_u32_e32 v15, vcc_lo, s7, v15, vcc_lo
global_load_b64 v[12:13], v[12:13], off
s_waitcnt vmcnt(0)
global_store_b64 v[14:15], v[12:13], off
s_cbranch_scc0 .LBB0_5
.LBB0_6:
v_add_nc_u32_e32 v11, s11, v11
v_add_nc_u32_e32 v10, s8, v10
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, s2
s_cbranch_scc0 .LBB0_4
.LBB0_7:
v_add_nc_u32_e32 v1, v1, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v6, v6, v7
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB0_2
.LBB0_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| im2col_d | 6,789 | 3,624 | stackv2-00000-of-00015 |
// Demangled: im2col_f(float const*, float*, int, int, int, int, int, int)
Function : _Z8im2col_fPKfPfiiiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R7, SR_CTAID.X &wr=0x1 ?trans7;
LDC R4, c[0x0][0x3a4] &wr=0x2 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x1 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans2;
IMAD R7, R7, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, R4, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R6, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x3a0] &wr=0x0 ?trans2;
VIMNMX.S32 R0, R6, UR5, PT &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, 0x1, PT ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDC R9, c[0x0][0x398] &wr=0x0 ?trans1;
IABS R10, R4 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x1 ?trans1;
LOP3.LUT R20, R6.reuse, 0xf, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R22, R6.reuse, 0x7, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R6, R6, 0x3, RZ, 0xc0, !PT ?trans2;
IABS R8, R9.reuse &req={0} ?trans2;
LOP3.LUT R4, R4, R9, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
I2F.RP R0, R8 &wr=0x0 ?trans2;
MUFU.RCP R0, R0 &req={0} &wr=0x0 ?trans2;
IADD3 R2, PT, PT, R0, 0xffffffe, RZ &req={0} ?WAIT4_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x0 &wr=0x2 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={0} ?trans1;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R5, R5, R8, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?trans1;
MOV R5, R10 ?WAIT5_END_GROUP;
IMAD.HI.U32 R0, R3, R5, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R0, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R8, R3, R5 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P1, PT, R8, R3, PT ?WAIT13_END_GROUP;
@!P1 IADD3 R3, PT, PT, R3, -R8.reuse, RZ ?trans2;
@!P1 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.GE.AND P1, PT, R4, RZ, PT ?trans2;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
ISETP.GE.U32.AND P0, PT, R3, R8, PT ?WAIT7_END_GROUP;
LDC.64 R2, c[0x0][0x380] &wr=0x2 ?trans6;
@P0 IADD3 R0, PT, PT, R0, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R9, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R0, PT, PT, -R0, RZ, RZ ?trans1;
IADD.64 R4, R4, 0x20 &req={0} ?WAIT9_END_GROUP;
@!P0 LOP3.LUT R0, RZ, R9, RZ, 0x33, !PT ?trans1;
IADD.64 R2, R2, 0x20 &req={2,1} ?WAIT8_END_GROUP;
LDC R9, c[0x0][0x39c] &wr=0x0 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x0 ?trans1;
IABS R15, R0 ?WAIT4_END_GROUP;
I2F.RP R16, R15 &req={4,2,1} &wr=0x1 ?trans2;
MUFU.RCP R16, R16 &req={1} &wr=0x1 ?trans1;
IADD3 R9, PT, PT, -R9, UR5, RZ &req={0} ?trans1;
LDCU UR5, c[0x0][0x394] &wr=0x0 ?trans3;
IADD3 R8, PT, PT, R9, 0x1, RZ ?WAIT4_END_GROUP;
IABS R14, R8.reuse ?trans2;
IABS R21, R8 ?trans2;
I2F.RP R17, R14 &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R16, 0xffffffe, RZ &req={1} ?trans2;
IABS R16, R0 ?trans2;
IADD3 R21, PT, PT, RZ, -R21, RZ ?trans1;
F2I.FTZ.U32.TRUNC.NTZ R11, R10 &req={3} &rd=0x1 &wr=0x3 ?trans1;
MUFU.RCP R17, R17 &req={2} &wr=0x2 ?trans1;
MOV R10, RZ &req={1} ?trans1;
IADD3 R18, PT, PT, RZ, -R11, RZ &req={3} ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, R17, 0xffffffe, RZ &req={2} ?trans2;
IABS R17, R7 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R13, R12 &rd=0x1 &wr=0x2 ?trans2;
MOV R12, RZ &req={1} ?trans1;
IADD3 R19, PT, PT, RZ, -R13, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R19, R19, R14, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R12, R13, R19, R12 ?WAIT4_END_GROUP;
IMAD R13, R18, R15, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R10, R11, R13, R10 ?trans1;
IADD3 R13, PT, PT, RZ, -R16, RZ ?trans1;
MOV R16, R21 ?trans2;
IMAD.HI.U32 R11, R12, R17, RZ ?trans2;
MOV R12, R13 ?trans2;
IMAD.HI.U32 R10, R10, R17, RZ ?WAIT4_END_GROUP;
IMAD R13, R11, R16, R17.reuse ?trans2;
IMAD R12, R10, R12, R17 ?WAIT3_END_GROUP;
ISETP.GT.U32.AND P1, PT, R14, R13, PT ?trans2;
ISETP.GT.U32.AND P2, PT, R15, R12, PT ?WAIT11_END_GROUP;
@!P1 IADD3 R13, PT, PT, R13, -R14.reuse, RZ ?trans2;
@!P1 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans2;
@!P2 IADD3 R12, PT, PT, R12, -R15.reuse, RZ ?trans2;
@!P2 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R8, RZ, PT ?trans1;
ISETP.GE.U32.AND P3, PT, R13, R14, PT ?trans1;
LOP3.LUT R13, R7.reuse, R8, RZ, 0x3c, !PT ?trans1;
ISETP.GE.U32.AND P0, PT, R12, R15, PT ?trans1;
LOP3.LUT R12, R7, R0, RZ, 0x3c, !PT ?WAIT3_END_GROUP;
ISETP.GE.AND P1, PT, R13, RZ, PT ?WAIT7_END_GROUP;
@P3 IADD3 R11, PT, PT, R11, 0x1, RZ ?trans1;
ISETP.GE.AND P3, PT, R12, RZ, PT ?trans1;
@P0 IADD3 R10, PT, PT, R10, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R0, RZ, PT ?WAIT3_END_GROUP;
@!P1 IADD3 R11, PT, PT, -R11, RZ, RZ ?trans2;
@!P2 LOP3.LUT R11, RZ, R8, RZ, 0x33, !PT ?trans1;
MOV R12, R10 ?trans1;
MOV R8, RZ ?WAIT3_END_GROUP;
IMAD R10, R9, R11, R11 ?trans1;
@!P3 IADD3 R12, PT, PT, -R12, RZ, RZ ?trans2;
@!P0 LOP3.LUT R12, RZ, R0, RZ, 0x33, !PT ?trans2;
IADD3 R10, PT, PT, -R10, R7, RZ ?WAIT3_END_GROUP;
IMAD R9, R12, UR5, R11 &req={0} ?WAIT7_END_GROUP;
LDC R18, c[0x0][0x39c] &req={0} &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x3a0] &req={1} &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R9, R8, RZ &req={3} ?trans1;
HFMA2 R12, -RZ, RZ, 0, 0 ?trans1;
ISETP.NE.AND P2, PT, R20, RZ, PT ?trans1;
LDCU UR5, c[0x0][0x390] &req={2} &wr=0x2 ?trans1;
IMAD R11, R7, UR8, R8 &req={1} ?trans1;
IADD3 R8, PT, PT, R8, 0x1, RZ ?trans1;
IMAD R13, R13, UR5, R10 &req={2} ?trans1;
ISETP.GE.U32.AND P1, PT, R18, 0x10, PT &req={0} ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R8, UR8, PT ?trans1;
IMAD R11, R11, R18, RZ ?WAIT9_END_GROUP;
@!P1 BRA 0xa30 &req={4} ?trans5;
LOP3.LUT R18, R18, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
MOV R12, RZ ?trans1;
MOV R21, R11 ?trans1;
MOV R19, R13 ?trans1;
IADD3 R18, PT, PT, -R18, RZ, RZ ?WAIT7_END_GROUP;
IMAD.WIDE R14, R19, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R23, desc[UR6][R14.64+-0x20] &req={4} &wr=0x2 ?trans1;
IMAD.WIDE R16, R21, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64+-0x20], R23 &req={2} &rd=0x0 ?trans4;
LDG.E R25, desc[UR6][R14.64+-0x1c] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+-0x1c], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R27, desc[UR6][R14.64+-0x18] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+-0x18], R27 &req={2} &rd=0x2 ?trans4;
LDG.E R29, desc[UR6][R14.64+-0x14] &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+-0x14], R29 &req={3} &rd=0x3 ?trans4;
LDG.E R31, desc[UR6][R14.64+-0x10] &wr=0x4 ?trans4;
STG.E desc[UR6][R16.64+-0x10], R31 &req={4} &rd=0x4 ?trans4;
LDG.E R33, desc[UR6][R14.64+-0xc] &wr=0x5 ?trans4;
STG.E desc[UR6][R16.64+-0xc], R33 &req={5} &rd=0x5 ?trans4;
LDG.E R23, desc[UR6][R14.64+-0x8] &req={0} &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+-0x8], R23 &req={2} &rd=0x0 ?trans4;
LDG.E R25, desc[UR6][R14.64+-0x4] &req={1} &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+-0x4], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R27, desc[UR6][R14.64] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64], R27 &req={2} &rd=0x2 ?trans4;
LDG.E R29, desc[UR6][R14.64+0x4] &req={3} &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+0x4], R29 &req={3} &rd=0x3 ?trans4;
LDG.E R31, desc[UR6][R14.64+0x8] &req={4} &wr=0x4 ?trans4;
STG.E desc[UR6][R16.64+0x8], R31 &req={4} &rd=0x4 ?trans4;
LDG.E R33, desc[UR6][R14.64+0xc] &req={5} &wr=0x5 ?trans4;
STG.E desc[UR6][R16.64+0xc], R33 &req={5} &rd=0x4 ?trans4;
LDG.E R23, desc[UR6][R14.64+0x10] &req={0} &wr=0x5 ?trans4;
STG.E desc[UR6][R16.64+0x10], R23 &req={5} &rd=0x4 ?trans4;
LDG.E R25, desc[UR6][R14.64+0x14] &req={1} &wr=0x5 ?trans4;
STG.E desc[UR6][R16.64+0x14], R25 &req={5} &rd=0x4 ?trans4;
LDG.E R27, desc[UR6][R14.64+0x18] &req={2} &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+0x18], R27 &req={2} &rd=0x4 ?trans4;
LDG.E R29, desc[UR6][R14.64+0x1c] &req={3} &wr=0x2 ?trans1;
IADD3 R18, PT, PT, R18, 0x10, RZ ?WAIT2_END_GROUP;
IADD3 R12, PT, PT, R12, 0x10, RZ ?trans2;
IADD3 R19, PT, PT, R19, 0x10, RZ ?trans2;
IADD3 R21, PT, PT, R21, 0x10, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT ?trans1;
STG.E desc[UR6][R16.64+0x1c], R29 &req={2} &rd=0x4 ?WAIT12_END_GROUP;
@P1 BRA 0x7b0 ?trans5;
@!P2 BRA 0xe40 ?trans5;
IADD3 R14, PT, PT, R20, -0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R22, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R14, 0x7, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xbf0 ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R13, R12, RZ &req={4} ?WAIT5_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R14 &req={0} ?trans2;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E R19, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R11, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R16, R21, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R21, desc[UR6][R14.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+0x4], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R23, desc[UR6][R14.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+0x8], R23 &req={2} &rd=0x2 ?trans4;
LDG.E R25, desc[UR6][R14.64+0xc] &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+0xc], R25 &req={3} &rd=0x2 ?trans4;
LDG.E R27, desc[UR6][R14.64+0x10] &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+0x10], R27 &req={3} &rd=0x2 ?trans4;
LDG.E R29, desc[UR6][R14.64+0x14] &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+0x14], R29 &req={3} &rd=0x2 ?trans4;
LDG.E R19, desc[UR6][R14.64+0x18] &req={0} &wr=0x3 ?trans4;
STG.E desc[UR6][R16.64+0x18], R19 &req={3} &rd=0x2 ?trans4;
LDG.E R21, desc[UR6][R14.64+0x1c] &req={1} &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x8, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R16.64+0x1c], R21 &req={3} &rd=0x2 ?trans4;
@!P2 BRA 0xe40 ?trans5;
IADD3 R14, PT, PT, R22, -0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R6, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P1, PT, R14, 0x3, PT ?WAIT13_END_GROUP;
@!P1 BRA 0xd30 ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x0 ?trans1;
IADD3 R17, PT, PT, R13, R12, RZ &req={4,2} ?WAIT5_END_GROUP;
IMAD.WIDE R14, R17, 0x4, R14 &req={0} ?trans2;
LDC.64 R16, c[0x0][0x388] &wr=0x0 ?trans3;
LDG.E R19, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R21, PT, PT, R11, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R16, R21, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R16.64], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R21, desc[UR6][R14.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+0x4], R21 &req={2} &rd=0x0 ?trans4;
LDG.E R23, desc[UR6][R14.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R16.64+0x8], R23 &req={2} &rd=0x0 ?trans4;
LDG.E R25, desc[UR6][R14.64+0xc] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R16.64+0xc], R25 &req={2} &rd=0x0 ?trans4;
@!P2 BRA 0xe40 ?trans5;
LDC.64 R14, c[0x0][0x380] &wr=0x1 ?trans1;
IADD3 R13, PT, PT, R13, R12, RZ ?WAIT7_END_GROUP;
LDC.64 R16, c[0x0][0x388] &req={4,2,0} &wr=0x0 ?trans1;
IMAD.WIDE R14, R13, 0x4, R14 &req={1} ?WAIT5_END_GROUP;
LDG.E R19, desc[UR6][R14.64] &wr=0x2 ?trans1;
IADD3 R13, PT, PT, R11, R12, RZ ?trans1;
ISETP.NE.AND P1, PT, R6, 0x1, PT ?WAIT4_END_GROUP;
IMAD.WIDE R12, R13, 0x4, R16 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R12.64], R19 &req={2} &rd=0x1 ?trans4;
@!P1 BRA 0xe40 ?trans5;
LDG.E R11, desc[UR6][R14.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P1, PT, R6, 0x2, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R12.64+0x4], R11 &req={2} &rd=0x3 ?trans10;
@!P1 BRA 0xe40 ?trans5;
LDG.E R15, desc[UR6][R14.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R12.64+0x8], R15 &req={2} &rd=0x0 ?trans2;
@P0 BRA 0x690 ?trans5;
LDC R8, c[0x0][0x370] &wr=0x5 ?trans1;
LDCU UR5, c[0x0][0x3a4] &wr=0x0 ?trans1;
IMAD R7, R8, UR4, R7 &req={5} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R7, UR5, PT &req={0} ?WAIT13_END_GROUP;
@!P0 BRA 0x2e0 ?trans5;
EXIT ?trans5;
BRA 0xeb0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: im2col_f(float const*, float*, int, int, int, int, int, int)
_Z8im2col_fPKfPfiiiiii:
s_load_b32 s17, s[0:1], 0x28
s_add_u32 s2, s0, 40
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)
s_cmp_lt_u32 s15, s17
s_cselect_b32 s4, 12, 18
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v1, s4
s_mov_b32 s4, exec_lo
global_load_u16 v3, v1, s[2:3]
s_load_b64 s[2:3], s[0:1], 0x20
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[1:2], null, s15, v3, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1)
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB2_8
s_load_b256 s[4:11], s[0:1], 0x0
s_ashr_i32 s13, s3, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s14, s3, s13
s_xor_b32 s14, s14, s13
s_waitcnt lgkmcnt(0)
s_ashr_i32 s0, s10, 31
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s1, s10, s0
s_xor_b32 s1, s1, s0
s_xor_b32 s0, s13, s0
v_cvt_f32_u32_e32 v0, s1
s_sub_i32 s12, 0, s1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_readfirstlane_b32 s10, v0
s_mul_i32 s12, s12, s10
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s12, s10, s12
s_add_i32 s10, s10, s12
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_u32 s10, s14, s10
s_mul_i32 s12, s10, s1
s_add_i32 s13, s10, 1
s_sub_i32 s12, s14, s12
s_delay_alu instid0(SALU_CYCLE_1)
s_sub_i32 s14, s12, s1
s_cmp_ge_u32 s12, s1
s_cselect_b32 s10, s13, s10
s_cselect_b32 s12, s14, s12
s_add_i32 s13, s10, 1
s_cmp_ge_u32 s12, s1
s_cselect_b32 s1, s13, s10
s_sub_i32 s10, s8, s11
s_xor_b32 s12, s1, s0
s_add_i32 s1, s10, 1
s_sub_i32 s0, s12, s0
s_cmp_gt_i32 s2, 0
s_cselect_b32 s10, -1, 0
s_cmp_gt_i32 s11, 0
s_cselect_b32 s12, -1, 0
s_ashr_i32 s13, s1, 31
s_ashr_i32 s14, s0, 31
s_add_i32 s15, s1, s13
s_add_i32 s0, s0, s14
s_xor_b32 s15, s15, s13
s_xor_b32 s16, s0, s14
v_cvt_f32_u32_e32 v0, s15
v_cvt_f32_u32_e32 v2, s16
s_sub_i32 s0, 0, s15
s_sub_i32 s18, 0, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
v_rcp_iflag_f32_e32 v2, v2
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_mul_f32_e32 v2, 0x4f7ffffe, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cvt_u32_f32_e32 v4, v0
v_cvt_u32_f32_e32 v2, v2
v_mul_lo_u32 v0, s17, v3
s_mov_b32 s17, 0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v5, s0, v4
v_mul_lo_u32 v6, s18, v2
s_mul_i32 s0, s2, s11
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_mul_lo_u32 v7, v0, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_hi_u32 v3, v4, v5
v_mul_hi_u32 v5, v2, v6
v_mul_lo_u32 v6, s0, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_nc_u32_e32 v8, v4, v3
v_add_nc_u32_e32 v9, v2, v5
.LBB2_2:
s_and_not1_b32 vcc_lo, exec_lo, s10
s_cbranch_vccnz .LBB2_7
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v3, v1, v2
v_xor_b32_e32 v3, v3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_hi_u32 v4, v3, v9
v_mul_hi_u32 v5, v3, v8
v_mul_lo_u32 v10, v4, s16
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v11, v5, s15
v_add_nc_u32_e32 v12, 1, v4
v_sub_nc_u32_e32 v10, v3, v10
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_sub_nc_u32_e32 v3, v3, v11
v_add_nc_u32_e32 v11, 1, v5
v_subrev_nc_u32_e32 v13, s16, v10
v_cmp_le_u32_e32 vcc_lo, s16, v10
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_cmp_le_u32_e64 s0, s15, v3
v_cndmask_b32_e32 v4, v4, v12, vcc_lo
v_subrev_nc_u32_e32 v12, s15, v3
v_cndmask_b32_e32 v10, v10, v13, vcc_lo
v_cndmask_b32_e64 v5, v5, v11, s0
v_xor_b32_e32 v13, s14, v2
v_add_nc_u32_e32 v11, 1, v4
v_cndmask_b32_e64 v3, v3, v12, s0
v_cmp_le_u32_e32 vcc_lo, s16, v10
v_add_nc_u32_e32 v12, 1, v5
v_xor_b32_e32 v10, s13, v2
s_mov_b32 s0, 0
v_cndmask_b32_e32 v4, v4, v11, vcc_lo
v_cmp_le_u32_e32 vcc_lo, s15, v3
v_mov_b32_e32 v11, v6
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_xor_b32_e32 v3, v4, v13
v_cndmask_b32_e32 v2, v5, v12, vcc_lo
v_sub_nc_u32_e32 v5, v3, v13
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v2, v2, v10
v_mad_u64_u32 v[3:4], null, v5, s9, v[2:3]
v_sub_nc_u32_e32 v2, v2, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mul_lo_u32 v5, v2, s1
v_sub_nc_u32_e32 v4, v3, v10
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s8, v4, v[1:2]
v_sub_nc_u32_e32 v10, v2, v5
.LBB2_4:
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v2, v10
v_mov_b32_e32 v4, v11
s_and_not1_b32 vcc_lo, exec_lo, s12
s_mov_b32 s18, s11
s_cbranch_vccnz .LBB2_6
.LBB2_5:
v_ashrrev_i32_e32 v3, 31, v2
v_ashrrev_i32_e32 v5, 31, v4
s_add_i32 s18, s18, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_cmp_eq_u32 s18, 0
v_lshlrev_b64 v[12:13], 2, v[2:3]
v_add_nc_u32_e32 v2, 1, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v12, vcc_lo, s4, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s5, v13, vcc_lo
global_load_b32 v3, v[12:13], off
v_lshlrev_b64 v[12:13], 2, v[4:5]
v_add_nc_u32_e32 v4, 1, v4
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v12, vcc_lo, s6, v12
v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
s_waitcnt vmcnt(0)
global_store_b32 v[12:13], v3, off
s_cbranch_scc0 .LBB2_5
.LBB2_6:
v_add_nc_u32_e32 v11, s11, v11
v_add_nc_u32_e32 v10, s8, v10
s_add_i32 s0, s0, 1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u32 s0, s2
s_cbranch_scc0 .LBB2_4
.LBB2_7:
v_add_nc_u32_e32 v1, v1, v0
s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v6, v6, v7
v_cmp_le_i32_e32 vcc_lo, s3, v1
s_or_b32 s17, vcc_lo, s17
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s17
s_cbranch_execnz .LBB2_2
.LBB2_8:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| im2col_f | 6,645 | 3,645 | stackv2-00000-of-00015 |
// Demangled: multiply_by_two(double*, double const*, int)
Function : _Z15multiply_by_twoPdPKdi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x390] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R5, R5, UR4, R0 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R5, UR5, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
IMAD.WIDE R2, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x3 ?trans1;
IMAD.WIDE R6, R5, 0x8, R6 &req={2} ?trans1;
DADD R4, R2, R2 &req={3} &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x110;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: multiply_by_two(double*, double const*, int)
_Z15multiply_by_twoPdPKdi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e64 s3, v1
s_cbranch_execz .LBB0_2
s_load_b128 s[0:3], s[0:1], 0x0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[1:2]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s2, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
global_load_b64 v[2:3], v[2:3], off
s_waitcnt vmcnt(0)
v_add_f64 v[2:3], v[2:3], v[2:3]
global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| multiply_by_two | 502 | 504 | stackv2-00000-of-00015 |
// Demangled: func1(int*)
Function : _Z5func1Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5.reuse, 0x4, R2 &req={0} ?trans1;
VIMNMX.U32 R5, R5, 0x20, !PT ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 &req={1} ?trans1;
EXIT ?trans5;
BRA 0x80;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: func1(int*)
_Z5func1Pi:
s_load_b64 s[0:1], s[0:1], 0x0
v_max_u32_e32 v1, 32, v0
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| func1 | 260 | 117 | stackv2-00000-of-00015 |
// Demangled: func2(int*)
Function : _Z5func2Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &req={1} &wr=0x2 ?trans1;
ISETP.GT.U32.AND P0, PT, R5, 0x20, PT ?WAIT5_END_GROUP;
SEL R5, RZ, 0x1, !P0 ?trans1;
IADD3 R0, PT, PT, R0, R0, RZ &req={2} ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, R5, RZ, 0xfc, !PT ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64], R5 ?trans1;
EXIT ?trans5;
BRA 0xc0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: func2(int*)
_Z5func2Pi:
s_load_b64 s[0:1], s[0:1], 0x0
v_lshlrev_b32_e32 v1, 2, v0
v_cmp_lt_u32_e32 vcc_lo, 32, v0
v_cndmask_b32_e64 v0, 0, 1, vcc_lo
s_waitcnt lgkmcnt(0)
global_load_b32 v2, v1, s[0:1]
s_waitcnt vmcnt(0)
v_lshl_or_b32 v0, v2, 1, v0
global_store_b32 v1, v0, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| func2 | 358 | 187 | stackv2-00000-of-00015 |
// Demangled: func3(int*)
Function : _Z5func3Pi
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
S2R R5, SR_TID.X &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans1;
ISETP.GE.U32.AND P0, PT, R5.reuse, 0x21, PT &req={0} ?trans1;
IMAD.WIDE.U32 R2, R5, 0x4, R2 &req={1} ?WAIT12_END_GROUP;
@P0 LDG.E R0, desc[UR4][R2.64] &req={2} &wr=0x2 ?trans4;
@!P0 LDG.E R4, desc[UR4][R2.64+0x1000] &wr=0x3 ?trans1;
@P0 IADD3 R5, PT, PT, R0, 0x1, RZ &req={2} ?trans2;
@!P0 IADD3 R5, PT, PT, R4, R4, RZ &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0x2000], R5 ?trans1;
EXIT ?trans5;
BRA 0xc0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: func3(int*)
_Z5func3Pi:
s_load_b64 s[0:1], s[0:1], 0x0
s_mov_b32 s2, exec_lo
v_cmpx_gt_u32_e32 33, v0
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB2_2
v_lshl_or_b32 v1, v0, 2, 0x1000
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v1, s[0:1]
s_waitcnt vmcnt(0)
v_lshlrev_b32_e32 v1, 1, v1
.LBB2_2:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB2_4
v_lshlrev_b32_e32 v1, 2, v0
s_waitcnt lgkmcnt(0)
global_load_b32 v1, v1, s[0:1]
s_waitcnt vmcnt(0)
v_add_nc_u32_e32 v1, 1, v1
.LBB2_4:
s_or_b32 exec_lo, exec_lo, s2
v_lshl_or_b32 v0, v0, 2, 0x2000
s_waitcnt lgkmcnt(0)
global_store_b32 v0, v1, s[0:1]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| func3 | 400 | 365 | stackv2-00000-of-00015 |
// Demangled: update(int*, int*, int*, int*, int*, int*, int, int, int)
Function : _Z6updatePiS_S_S_S_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
LDCU UR5, c[0x0][0x3b8] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R9, c[0x0][0x3b4] &wr=0x2 ?trans1;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT2_END_GROUP;
IMAD R3, R9, UR5, RZ &req={2} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R3, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
IABS R6, R9.reuse ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans1;
IABS R7, R0 ?trans1;
LDC R11, c[0x0][0x3b0] &wr=0x1 ?trans1;
I2F.RP R4, R6 &wr=0x2 ?trans2;
MUFU.RCP R4, R4 &req={2} &wr=0x2 ?trans2;
IADD3 R2, PT, PT, R4, 0xffffffe, RZ &req={2} ?trans2;
LOP3.LUT R4, R0, R9, RZ, 0x3c, !PT ?WAIT2_END_GROUP;
F2I.FTZ.U32.TRUNC.NTZ R3, R2 &rd=0x2 &wr=0x3 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 &req={2} ?trans1;
IADD3 R5, PT, PT, RZ, -R3, RZ &req={3} ?WAIT5_END_GROUP;
IMAD R5, R5, R6, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R3, R3, R5, R2 ?WAIT6_END_GROUP;
IMAD.HI.U32 R5, R3, R7, RZ ?WAIT5_END_GROUP;
IADD3 R3, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R3, R6, R3, R7 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R6, R3, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R3, PT, PT, R3, -R6.reuse, RZ ?trans2;
@!P0 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.GE.AND P0, PT, R4, RZ, PT ?trans2;
ISETP.GE.U32.AND P1, PT, R3, R6, PT ?trans2;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x398] &wr=0x3 ?trans3;
@P1 IADD3 R5, PT, PT, R5, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?WAIT4_END_GROUP;
MOV R13, R5 ?trans2;
LDC.64 R4, c[0x0][0x380] &wr=0x4 ?trans3;
@!P0 IADD3 R13, PT, PT, -R13, RZ, RZ ?WAIT4_END_GROUP;
@!P1 LOP3.LUT R13, RZ, R9, RZ, 0x33, !PT ?WAIT5_END_GROUP;
IMAD.WIDE R2, R13, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={0} &wr=0x1 ?trans1;
IADD3 R8, PT, PT, -R13.reuse, RZ, RZ ?trans1;
IMAD.WIDE R6, R13, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
IMAD R10, R9, R8, R0 ?trans2;
LDG.E R7, desc[UR4][R6.64] &wr=0x2 ?trans2;
IMAD R0, R10, R11, R2 &req={1} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R0, -0x1, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R9, 0x4, R4 &req={4} ?WAIT6_END_GROUP;
LDG.E R4, desc[UR4][R4.64] &wr=0x2 ?trans2;
ISETP.NE.AND P0, PT, R4, R7, PT &req={2} ?WAIT13_END_GROUP;
@P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x3a0] &wr=0x0 ?trans1;
SHF.R.S32.HI R0, RZ, 0x1f, R13 ?trans1;
IMAD.SHL.U32 R8, R13, 0x4, RZ ?WAIT3_END_GROUP;
SHF.L.U64.HI R9, R13, 0x2, R0 ?WAIT5_END_GROUP;
IADD.64 R2, R8, UR6 &req={0} ?WAIT6_END_GROUP;
LDG.E R0, desc[UR4][R2.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R0, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P0 EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x3a8] &wr=0x0 ?trans1;
LDC.64 R4, c[0x0][0x380] &wr=0x1 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans2;
IMAD R17, R10, R11, -0x1 ?WAIT5_END_GROUP;
LDC.64 R6, c[0x0][0x388] &wr=0x2 ?trans1;
IADD.64 R8, R8, UR6 &req={0} ?WAIT8_END_GROUP;
LDG.E R11, desc[UR4][R8.64] &wr=0x3 ?trans2;
IMAD R11, R0, 0x3, R11 &req={3} ?WAIT5_END_GROUP;
IADD3 R11, PT, PT, R11, 0x2, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R12, R11, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R10, desc[UR4][R12.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x560 ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x500 ?trans5;
LDG.E R10, desc[UR4][R12.64+-0x8] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R12.64+-0x4] &wr=0x3 ?trans1;
IADD3 R11, PT, PT, R17, R10, RZ &req={2} ?trans2;
IADD3 R15, PT, PT, -R14, RZ, RZ &req={3} ?WAIT3_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R10.64], R15 &rd=0x1 ?trans1;
BRA 0x550 ?trans5;
LDG.E R10, desc[UR4][R12.64+-0x8] &wr=0x2 ?trans4;
LDG.E R15, desc[UR4][R12.64+-0x4] &wr=0x3 ?trans1;
IADD3 R11, PT, PT, R17, R10, RZ &req={2} ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R4 &req={1} ?WAIT5_END_GROUP;
REDG.E.ADD.STRONG.GPU desc[UR4][R10.64], R15 &req={3} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R11, desc[UR4][R2.64] &req={1,0} &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, R11, PT &req={2} ?WAIT13_END_GROUP;
@!P0 BRA 0x410 ?trans5;
EXIT ?trans5;
BRA 0x5b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: update(int*, int*, int*, int*, int*, int*, int, int, int)
_Z6updatePiS_S_S_S_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x4c
s_load_b128 s[16:19], s[0:1], 0x30
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1)
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_mul_i32 s2, s18, s17
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_gt_i32_e32 vcc_lo, s2, v1
s_and_saveexec_b32 s2, vcc_lo
s_cbranch_execz .LBB0_5
s_ashr_i32 s2, s17, 31
v_ashrrev_i32_e32 v3, 31, v1
s_add_i32 s3, s17, s2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_xor_b32 s3, s3, s2
v_add_nc_u32_e32 v4, v1, v3
v_cvt_f32_u32_e32 v0, s3
s_sub_i32 s4, 0, s3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_xor_b32_e32 v4, v4, v3
v_rcp_iflag_f32_e32 v0, v0
v_xor_b32_e32 v3, s2, v3
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cvt_u32_f32_e32 v0, v0
v_mul_lo_u32 v2, s4, v0
s_load_b256 s[4:11], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v2, v0, v2
v_add_nc_u32_e32 v0, v0, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_hi_u32 v0, v4, v0
v_mul_lo_u32 v2, v0, s3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_sub_nc_u32_e32 v2, v4, v2
v_add_nc_u32_e32 v4, 1, v0
v_subrev_nc_u32_e32 v5, s3, v2
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_cndmask_b32_e32 v2, v2, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, 1, v0
v_cmp_le_u32_e32 vcc_lo, s3, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_cndmask_b32_e32 v0, v0, v4, vcc_lo
v_xor_b32_e32 v0, v0, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_sub_nc_u32_e32 v4, v0, v3
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[2:3], 2, v[4:5]
v_mul_lo_u32 v4, v4, s17
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s8, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v3, vcc_lo
v_sub_nc_u32_e32 v1, v1, v4
global_load_b32 v0, v[5:6], off
v_mul_lo_u32 v4, v1, s16
s_waitcnt vmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v4, v0
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_add_co_u32 v0, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v5, vcc_lo, s10, v2
v_add_co_ci_u32_e32 v6, vcc_lo, s11, v3, vcc_lo
global_load_b32 v0, v[0:1], off offset:-4
global_load_b32 v1, v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, v0, v1
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
s_load_b128 s[0:3], s[0:1], 0x20
s_waitcnt lgkmcnt(0)
v_add_co_u32 v0, vcc_lo, s0, v2
v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
global_load_b32 v5, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_lt_i32_e32 vcc_lo, 0, v5
s_and_b32 exec_lo, exec_lo, vcc_lo
s_cbranch_execz .LBB0_5
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
s_add_u32 s2, s4, -4
s_addc_u32 s3, s5, -1
s_mov_b64 s[0:1], 0
s_mov_b32 s4, 0
s_mov_b32 s5, 0
.LBB0_4:
global_load_b32 v5, v[2:3], off
s_add_i32 s5, s5, 1
s_waitcnt vmcnt(0)
v_ashrrev_i32_e32 v6, 31, v5
v_add_co_u32 v5, vcc_lo, s0, v5
s_add_u32 s0, s0, 3
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_addc_u32 s1, s1, 0
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v5, vcc_lo, s6, v5
v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
global_load_b96 v[5:7], v[5:6], off
s_waitcnt vmcnt(0)
v_cmp_eq_u32_e32 vcc_lo, 0, v7
v_add_nc_u32_e32 v8, v5, v4
v_sub_nc_u32_e32 v5, 0, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_cndmask_b32_e32 v7, v6, v5, vcc_lo
v_ashrrev_i32_e32 v9, 31, v8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[8:9], 2, v[8:9]
v_add_co_u32 v5, vcc_lo, s2, v8
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s3, v9, vcc_lo
global_atomic_add_u32 v[5:6], v7, off
global_load_b32 v5, v[0:1], off
s_waitcnt vmcnt(0)
v_cmp_ge_i32_e32 vcc_lo, s5, v5
s_or_b32 s4, vcc_lo, s4
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s4
s_cbranch_execnz .LBB0_4
.LBB0_5:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| update | 2,424 | 2,619 | stackv2-00000-of-00015 |
// Demangled: keylogger(unsigned long*, unsigned long*)
Function : _Z9keyloggerPmS_
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x0 ?trans7;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans2;
LDG.E.64 R2, desc[UR4][R2.64] &req={0} &wr=0x2 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x2 ?trans2;
STG.E.64 desc[UR4][R4.64], R2 &req={2} ?trans1;
EXIT ?trans5;
BRA 0x70;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: keylogger(unsigned long*, unsigned long*)
_Z9keyloggerPmS_:
s_load_b128 s[0:3], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_load_b64 s[0:1], s[0:1], 0x0
v_mov_b32_e32 v2, 0
s_waitcnt lgkmcnt(0)
v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
global_store_b64 v2, v[0:1], s[2:3]
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| keylogger | 238 | 155 | stackv2-00000-of-00015 |
// Demangled: network_step(float*, float*, int*, float*, float*, float*, int)
Function : _Z12network_stepPfS_PiS_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.Y &wr=0x1 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans1;
S2R R2, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R0, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R4, c[0x0][0x3b0] &wr=0x4 ?trans1;
IMAD R0, R0, UR5, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R0, 0x7, PT ?trans1;
IMAD R5, R5, UR4, R2 &req={2} ?WAIT5_END_GROUP;
ISETP.GT.OR P2, PT, R5, 0x7, P0 ?trans1;
IADD3 R6, PT, PT, R4, -0x1, RZ &req={4} ?WAIT5_END_GROUP;
IMAD.HI R2, R6, 0x66666667, RZ ?WAIT7_END_GROUP;
@!P2 LDC.64 R12, c[0x0][0x3a8] &wr=0x1 ?trans1;
SHF.R.U32.HI R3, RZ, 0x1f, R2 ?trans2;
@!P2 LEA R7, R5, R0, 0x3 ?trans2;
LEA.HI.SX32 R3, R2, R3, 0x1d ?WAIT3_END_GROUP;
@!P2 LDC.64 R10, c[0x0][0x388] &wr=0x2 ?trans2;
IMAD R6, R3, -0x14, R6 ?WAIT4_END_GROUP;
@!P2 IMAD R3, R6, 0x8, R5 ?trans2;
@!P2 IMAD.WIDE R12, R7, 0x4, R12 &req={1} ?WAIT6_END_GROUP;
@!P2 LDG.E R13, desc[UR6][R12.64] &req={3} &rd=0x1 &wr=0x3 ?trans1;
@!P2 IMAD.WIDE R10, R3, 0x4, R10 &req={2} ?WAIT6_END_GROUP;
@!P2 LDG.E R10, desc[UR6][R10.64] &rd=0x2 &wr=0x3 ?trans1;
@!P2 S2R R17, SR_CgaCtaId &wr=0x4 ?trans1;
ISETP.GT.OR P1, PT, R5, 0x3, P0 ?WAIT13_END_GROUP;
@!P1 IMAD.HI R14, R4, 0x66666667, RZ ?trans1;
@!P1 LDC.64 R8, c[0x0][0x398] &wr=0x5 ?trans4;
@!P1 SHF.R.U32.HI R15, RZ, 0x1f, R14 ?WAIT4_END_GROUP;
@!P1 LEA.HI.SX32 R15, R14, R15, 0x1d ?trans1;
@!P1 LDC.64 R2, c[0x0][0x3a0] &wr=0x0 ?trans1;
@!P2 MOV R14, 0x400 ?WAIT5_END_GROUP;
@!P2 LEA R14, R17, R14, 0x18 &req={4} ?WAIT4_END_GROUP;
@!P2 LEA R7, R7, R14, 0x2 ?trans1;
@!P1 IMAD R16, R15, -0x14, R4 ?trans2;
@!P1 IMAD R12, R5, 0x8, R0 &req={1} ?WAIT3_END_GROUP;
@!P1 LEA R11, R16, R5, 0x2 &req={2} ?WAIT5_END_GROUP;
@!P1 IMAD.WIDE R8, R11, 0x4, R8 &req={5} ?WAIT4_END_GROUP;
@!P1 IMAD.WIDE R2, R12, 0x4, R2 &req={0} ?WAIT4_END_GROUP;
@!P2 FMUL R10, R10, R13 &req={3} ?WAIT5_END_GROUP;
@!P2 STS [R7], R10 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@!P1 LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans4;
@!P1 LDG.E R3, desc[UR6][R2.64] &wr=0x2 ?trans1;
@!P1 S2R R14, SR_CgaCtaId &wr=0x1 ?trans1;
@!P1 MOV R11, 0x400 ?WAIT5_END_GROUP;
@!P1 IADD3 R11, PT, PT, R11, 0x100, RZ ?trans1;
ISETP.NE.OR P0, PT, R5, RZ, P0 ?WAIT3_END_GROUP;
@!P1 LEA R11, R14, R11, 0x18 &req={1} ?WAIT5_END_GROUP;
@!P1 IMAD R12, R12, 0x4, R11 ?trans2;
@!P1 FMUL R5, R8, R3 &req={2} ?WAIT5_END_GROUP;
@!P1 STS [R12], R5 &rd=0x0 ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
@P0 EXIT ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x1 ?trans1;
LEA R13, R6, R0, 0x3 ?trans1;
IMAD.HI R5, R4, 0x66666667, RZ &req={0} ?WAIT6_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R8, R13, 0x4, R2 &req={1} ?WAIT6_END_GROUP;
LDG.E R8, desc[UR6][R8.64] &wr=0x2 ?trans1;
SHF.R.U32.HI R10, RZ, 0x1f, R5 ?trans1;
BSSY.RECONVERGENT B0, 0x4b0 ?trans3;
LEA.HI R5, R5, R10, RZ, 0x1d ?trans1;
IMAD.WIDE R10, R13, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD R5, R5, -0x14, R4 ?WAIT5_END_GROUP;
LEA R5, R5, R0, 0x3 ?trans1;
FSETP.GT.AND P0, PT, R8, 0.5, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x4a0 ?trans5;
LDG.E R4, desc[UR6][R10.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R4, 0x1, PT &req={2} ?trans1;
SHF.R.S32.HI R4, RZ, 0x1f, R13 ?WAIT12_END_GROUP;
@!P0 BRA 0x580 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R8, R5, 0x4, R8 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R8.64], RZ ?trans4;
STG.E desc[UR6][R2.64], RZ ?trans4;
LDG.E R10, desc[UR6][R10.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R5, 0x4, R6 ?trans1;
IADD3 R0, PT, PT, R10, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
LEA.HI R4, R0, R0, RZ, 0x1 ?WAIT4_END_GROUP;
LOP3.LUT R13, R4, 0xfffffffe, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R13, PT, PT, R0, -R13, RZ ?WAIT5_END_GROUP;
STG.E desc[UR6][R6.64], R13 ?trans1;
EXIT ?trans5;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans2;
LEA R10, P0, R13, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R11, R13, UR5, R4, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R4, desc[UR6][R10.64] &rd=0x0 &wr=0x2 ?trans1;
MOV.64 R6, 0x4338000000000000 ?trans2;
MOV.64 R8, 0x3fa999999999999a ?trans2;
UMOV.64 UR4, 0x3fe62e42fefa39ef ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 ?trans2;
DADD R6, -R6, 6.75539944105574400000e+15 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, -UR4, -R8 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R6, -UR4, R8 &req={1} &rd=0x1 &wr=0x3 ?trans1;
UMOV.64 UR4, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R6, 0x3e928af3fca213ea &req={1} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, UR4, R6 &req={3} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
UMOV.64 UR4, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, UR4 &req={1} &wr=0x1 ?trans1;
S2UR UR5, SR_CgaCtaId &wr=0x3 ?trans1;
UMOV UR4, 0x400 ?trans2;
ULEA UR8, UR5, UR4, 0x18 &req={3} ?trans1;
UIADD3 UR4, UPT, UPT, UR4, 0x100, URZ ?WAIT4_END_GROUP;
ULEA UR4, UR5, UR4, 0x18 ?trans1;
LEA R10, R0, UR8, 0x2 &req={0} ?WAIT5_END_GROUP;
LDS R11, [R10] &wr=0x0 ?trans1;
LEA R0, R0, UR4, 0x2 ?trans1;
UMOV.64 UR4, 0x3fd3333333333333 ?trans2;
LDS R12, [R10+0x20] &wr=0x3 ?trans4;
LDS R14, [R10+0x40] &wr=0x4 ?trans4;
LDS R16, [R10+0x60] &wr=0x5 ?trans4;
LDS R18, [R10+0x80] &wr=0x0 ?trans4;
LDS R13, [R10+0xe0] ?trans4;
LDS R15, [R0] ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
DFMA R6, R8, R6, 1 &req={1} &wr=0x1 ?trans1;
LDS R17, [R0+0x20] ?trans4;
LDS R19, [R0+0x40] ?trans4;
LDS R21, [R0+0x60] ?WAIT15_END_GROUP;
NOP ?WAIT10_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R6, R8, R6, 1 &req={1} &rd=0x2 &wr=0x1 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R8, R4 &req={2} &rd=0x2 &wr=0x1 ?trans2;
LDS R4, [R10+0xa0] &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R6, R6, R8 &req={1} &rd=0x1 &wr=0x0 ?trans2;
LDS R9, [R10+0xc0] &req={1} &wr=0x1 ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R6, R6 &req={0} &wr=0x0 ?trans2;
FADD R11, R6, R11 &req={0} ?WAIT4_END_GROUP;
FADD R11, R11, R12 &req={3} ?WAIT4_END_GROUP;
FADD R11, R11, R14 &req={4} ?WAIT4_END_GROUP;
FADD R11, R11, R16 &req={5} ?WAIT4_END_GROUP;
FADD R11, R11, R18 ?WAIT4_END_GROUP;
FADD R4, R11, R4 &req={2} ?WAIT4_END_GROUP;
FADD R4, R4, R9 &req={1} ?trans2;
LDC.64 R8, c[0x0][0x380] &wr=0x0 ?trans2;
FADD R4, R4, R13 ?WAIT4_END_GROUP;
FADD R4, R4, R15 ?WAIT4_END_GROUP;
FADD R4, R4, R17 ?WAIT4_END_GROUP;
FADD R4, R4, R19 ?WAIT4_END_GROUP;
FADD R21, R4, R21 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
F2F.F64.F32 R6, R21 &wr=0x1 ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R6, UR4, PT &req={1} &wr=0x0 ?trans2;
FSEL R7, RZ, 1.875, !P0 &req={0} ?trans1;
MOV R6, RZ ?trans1;
STG.E desc[UR6][R8.64], R21 ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R7, R6 &wr=0x0 ?trans2;
STG.E desc[UR6][R2.64], R7 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xea0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: network_step(float*, float*, int*, float*, float*, float*, int)
_Z12network_stepPfS_PiS_S_S_i:
s_clause 0x3
s_load_b32 s3, s[0:1], 0x44
s_load_b32 s2, s[0:1], 0x30
s_load_b128 s[16:19], s[0:1], 0x20
s_load_b256 s[4:11], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v4, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s0, s3, 16
s_and_b32 s1, s3, 0xffff
s_add_i32 s3, s2, -1
v_mad_u64_u32 v[2:3], null, s14, s1, v[1:2]
v_mad_u64_u32 v[0:1], null, s15, s0, v[4:5]
s_mul_hi_i32 s0, s3, 0x66666667
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_lshr_b32 s1, s0, 31
s_ashr_i32 s0, s0, 3
s_add_i32 s1, s0, s1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e64 s0, 8, v2
v_cmp_gt_i32_e32 vcc_lo, 8, v0
v_lshl_add_u32 v3, v2, 3, v0
s_mul_i32 s1, s1, 20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
s_sub_i32 s1, s3, s1
s_and_b32 s0, s0, vcc_lo
s_and_saveexec_b32 s3, s0
s_cbranch_execz .LBB0_2
v_lshl_add_u32 v5, s1, 3, v2
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v6, 31, v5
v_lshlrev_b64 v[7:8], 2, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_add_co_u32 v6, s0, s18, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e64 v7, s0, s19, v8, s0
v_add_co_u32 v4, s0, s6, v4
s_delay_alu instid0(VALU_DEP_1)
v_add_co_ci_u32_e64 v5, s0, s7, v5, s0
global_load_b32 v1, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_dual_mul_f32 v1, v4, v1 :: v_dual_lshlrev_b32 v4, 2, v3
ds_store_b32 v4, v1
.LBB0_2:
s_or_b32 exec_lo, exec_lo, s3
v_cmp_gt_i32_e64 s0, 4, v2
s_mul_hi_i32 s3, s2, 0x66666667
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s12, s0
s_cbranch_execz .LBB0_4
s_lshr_b32 s0, s3, 31
s_ashr_i32 s13, s3, 3
v_ashrrev_i32_e32 v4, 31, v3
s_add_i32 s0, s13, s0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_i32 s0, s0, 20
s_sub_i32 s0, s2, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[3:4]
v_lshl_add_u32 v5, s0, 2, v2
v_lshlrev_b32_e32 v3, 2, v3
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[4:5], 2, v[5:6]
v_add_co_u32 v6, s0, s16, v7
v_add_co_ci_u32_e64 v7, s0, s17, v8, s0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_co_u32 v4, s0, s10, v4
v_add_co_ci_u32_e64 v5, s0, s11, v5, s0
global_load_b32 v1, v[6:7], off
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_mul_f32_e32 v1, v4, v1
ds_store_b32 v3, v1 offset:256
.LBB0_4:
s_or_b32 exec_lo, exec_lo, s12
v_cmp_eq_u32_e64 s0, 0, v2
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_and_b32 s0, s0, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_and_saveexec_b32 s10, s0
s_cbranch_execz .LBB0_13
v_lshl_add_u32 v1, s1, 3, v0
s_lshr_b32 s0, s3, 31
s_lshr_b32 s1, s3, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_add_i32 s0, s1, s0
v_ashrrev_i32_e32 v2, 31, v1
s_mul_i32 s0, s0, 20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_sub_i32 s1, s2, s0
v_lshlrev_b64 v[2:3], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s6, v2
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
v_add_co_u32 v6, vcc_lo, s8, v2
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v3, vcc_lo
global_load_b32 v1, v[4:5], off
global_load_b32 v4, v[6:7], off
s_waitcnt vmcnt(1)
v_cmp_nlt_f32_e32 vcc_lo, 0.5, v1
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e64 s0, 1, v4
v_lshl_add_u32 v1, s1, 3, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s0, vcc_lo, s0
s_and_saveexec_b32 s1, s0
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s2, exec_lo, s1
s_cbranch_execz .LBB0_11
v_add_co_u32 v2, vcc_lo, s4, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
s_mov_b32 s0, 0xb0a726a6
s_mov_b32 s1, 0x3fee7078
v_lshlrev_b32_e32 v0, 2, v0
global_load_b32 v2, v[2:3], off
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[2:3], v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f64 v[2:3], v[2:3], s[0:1]
s_mov_b64 s[0:1], 8
v_cvt_f32_f64_e32 v3, v[2:3]
v_mov_b32_e32 v2, v0
.LBB0_7:
ds_load_b32 v4, v2
s_add_u32 s0, s0, -1
v_add_nc_u32_e32 v2, 32, v2
s_addc_u32 s1, s1, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u64 s[0:1], 0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v4, v3
s_cbranch_scc1 .LBB0_7
v_add_nc_u32_e32 v0, 0x100, v0
s_mov_b64 s[0:1], 4
.LBB0_9:
ds_load_b32 v2, v0
s_add_u32 s0, s0, -1
v_add_nc_u32_e32 v0, 32, v0
s_addc_u32 s1, s1, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[0:1], 0
s_waitcnt lgkmcnt(0)
v_add_f32_e32 v3, v2, v3
s_cbranch_scc0 .LBB0_9
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
v_cvt_f64_f32_e32 v[4:5], v3
s_mov_b32 s0, 0x33333333
s_mov_b32 s1, 0x3fd33333
v_ashrrev_i32_e32 v2, 31, v1
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_cmp_lt_f64_e32 vcc_lo, s[0:1], v[4:5]
v_mov_b32_e32 v4, 0
v_cndmask_b32_e64 v5, 0, 0x3ff00000, vcc_lo
v_cvt_f32_f64_e32 v6, v[4:5]
v_add_co_u32 v4, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
global_store_b32 v[4:5], v3, off
global_store_b32 v[0:1], v6, off
.LBB0_11:
s_and_not1_saveexec_b32 s0, s2
s_cbranch_execz .LBB0_13
v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, 1, v4
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshrrev_b32_e32 v3, 31, v6
v_lshlrev_b64 v[0:1], 2, v[1:2]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_nc_u32_e32 v4, v6, v3
v_add_co_u32 v2, vcc_lo, s4, v0
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
v_and_b32_e32 v8, -2, v4
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s8, v0
s_delay_alu instid0(VALU_DEP_4)
v_sub_nc_u32_e32 v6, v6, v8
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[2:3], v7, off
global_store_b32 v[4:5], v7, off
global_store_b32 v[0:1], v6, off
.LBB0_13:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| network_step | 4,997 | 3,705 | stackv2-00000-of-00015 |
// Demangled: stepLIF(float*, float*, int*, float*, float*, float*, int)
Function : _Z7stepLIFPfS_PiS_S_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R3, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans8;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans2;
IMAD R0, R0, UR4, R3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, 0x7, PT ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC R13, c[0x0][0x3b0] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R2, c[0x0][0x388] &wr=0x2 ?trans8;
LDC.64 R8, c[0x0][0x390] &wr=0x3 ?trans1;
IADD3 R4, PT, PT, R13, -0x1, RZ &req={0} ?WAIT5_END_GROUP;
IMAD.HI R5, R4, 0x66666667, RZ ?WAIT5_END_GROUP;
SHF.R.U32.HI R6, RZ, 0x1f, R5 ?WAIT4_END_GROUP;
LEA.HI.SX32 R5, R5, R6, 0x1d ?WAIT5_END_GROUP;
IMAD R4, R5, -0x14, R4 ?WAIT5_END_GROUP;
SHF.L.U32 R7, R4, 0x3, RZ ?WAIT4_END_GROUP;
IADD3 R15, PT, PT, R0, R7, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R15, 0x4, R2 &req={2} ?WAIT6_END_GROUP;
LDG.E R10, desc[UR4][R10.64] &req={1} &wr=0x2 ?trans1;
IMAD.HI R5, R13, 0x66666667, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x220 ?trans4;
SHF.R.U32.HI R6, RZ, 0x1f, R5 ?WAIT4_END_GROUP;
LEA.HI R6, R5, R6, RZ, 0x1d ?WAIT5_END_GROUP;
IMAD R5, R6, -0x14, R13 ?trans2;
IMAD.WIDE R12, R15, 0x4, R8 &req={3} ?WAIT3_END_GROUP;
LEA R5, R5, R0, 0x3 ?trans1;
FSETP.GT.AND P0, PT, R10, 0.5, PT &req={2} ?WAIT13_END_GROUP;
@P0 BRA 0x210 ?trans5;
LDG.E R6, desc[UR4][R12.64] &wr=0x2 ?trans2;
ISETP.GE.AND P0, PT, R6, 0x1, PT &req={2} ?trans1;
SHF.R.S32.HI R6, RZ, 0x1f, R15 ?WAIT12_END_GROUP;
@!P0 BRA 0x2f0 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R5, 0x4, R6 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], RZ ?trans4;
STG.E desc[UR4][R2.64], RZ ?trans4;
LDG.E R12, desc[UR4][R12.64] &wr=0x2 ?trans1;
IMAD.WIDE R8, R5, 0x4, R8 ?trans1;
IADD3 R0, PT, PT, R12, 0x1, RZ &req={2} ?WAIT4_END_GROUP;
LEA.HI R4, R0, R0, RZ, 0x1 ?WAIT4_END_GROUP;
LOP3.LUT R11, R4, 0xfffffffe, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R11, PT, PT, R0, -R11, RZ ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R11 ?trans1;
EXIT ?trans5;
LDCU.64 UR6, c[0x0][0x380] &wr=0x0 ?trans1;
MOV.64 R8, 0x4338000000000000 ?trans2;
MOV.64 R10, 0x3fa999999999999a ?trans2;
LDC.64 R16, c[0x0][0x3a8] &wr=0x1 ?trans1;
LEA R12, P0, R15, UR6, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R13, R15, UR7, R6, 0x2, P0 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R12.64] &wr=0x2 ?trans1;
UMOV.64 UR6, 0x3fe62e42fefa39ef ?trans1;
DADD R8, -R8, 6.75539944105574400000e+15 &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, -UR6, -R10 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3c7abc9e3b39803f ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R8, -UR6, R10 &req={0} &rd=0x0 &wr=0x3 ?trans1;
UMOV.64 UR6, 0x3e5ade1569ce2bdf ?trans1;
MOV.64 R8, 0x3e928af3fca213ea &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, UR6, R8 &req={3} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3ec71dee62401315 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3efa01997c89eb71 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F64.F32 R12, R6 &req={2} &wr=0x2 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f2a01a014761f65 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f56c16c1852b7af ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3f81111111122322 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fa55555555502a1 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fc5555555555511 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?trans1;
UMOV.64 UR6, 0x3fe000000000000b ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, UR6 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R8, R10, R8, 1 &req={0} &wr=0x0 ?WAIT15_END_GROUP;
NOP ?WAIT4_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DFMA R10, R10, R8, 1 &req={0} &rd=0x0 &wr=0x2 ?trans2;
LDC.64 R8, c[0x0][0x380] &req={0} &wr=0x0 ?trans2;
IMAD.WIDE R8, R5, 0x4, R8 &req={0} ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DMUL R14, R10, R12 &req={2} &rd=0x0 &wr=0x2 ?trans2;
IMAD.WIDE R10, R7, 0x4, R2 &req={0} ?WAIT15_END_GROUP;
NOP ?trans2;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R15, R14 &req={2} &wr=0x0 ?trans2;
STG.E desc[UR4][R8.64], R15 &req={0} &rd=0x0 ?trans1;
IMAD.WIDE R12, R0, 0x4, R16 &req={1} ?WAIT3_END_GROUP;
LDG.E R7, desc[UR4][R10.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R12.64] &wr=0x2 ?trans2;
FFMA R7, R16, R7, R15 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R7 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R12.64+0x20] &wr=0x2 ?trans4;
LDG.E R16, desc[UR4][R10.64+0x4] &wr=0x2 ?trans2;
FFMA R17, R6, R16, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R17 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R12.64+0x40] &wr=0x0 ?trans4;
LDG.E R14, desc[UR4][R10.64+0x8] &wr=0x0 ?trans2;
FFMA R15, R6, R14, R17 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R15 ?trans4;
LDG.E R6, desc[UR4][R12.64+0x60] &wr=0x1 ?trans4;
LDG.E R14, desc[UR4][R10.64+0xc] &wr=0x1 ?trans2;
FFMA R7, R6, R14, R15 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R7 &rd=0x0 ?trans4;
LDG.E R6, desc[UR4][R12.64+0x80] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R10.64+0x10] &wr=0x2 ?trans2;
FFMA R17, R6, R14, R7 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R17 &rd=0x1 ?trans4;
LDG.E R6, desc[UR4][R12.64+0xa0] &wr=0x2 ?trans4;
LDG.E R14, desc[UR4][R10.64+0x14] &wr=0x2 ?trans2;
FFMA R19, R6, R14, R17 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R19 &rd=0x2 ?trans4;
LDG.E R6, desc[UR4][R12.64+0xc0] &wr=0x3 ?trans4;
LDG.E R14, desc[UR4][R10.64+0x18] &wr=0x3 ?trans2;
FFMA R21, R6, R14, R19 &req={3} ?WAIT2_END_GROUP;
LDC.64 R6, c[0x0][0x3a0] &req={0} &wr=0x0 ?trans3;
STG.E desc[UR4][R8.64], R21 ?trans4;
LDG.E R16, desc[UR4][R12.64+0xe0] &wr=0x1 ?trans1;
LDC.64 R14, c[0x0][0x398] &wr=0x3 ?trans3;
LDG.E R18, desc[UR4][R10.64+0x1c] &wr=0x1 ?trans1;
SHF.L.U32 R23, R4, 0x2, RZ ?trans1;
IMAD.WIDE R6, R0, 0x4, R6 &req={0} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R23, 0x4, R14 &req={3} ?WAIT4_END_GROUP;
FFMA R17, R16, R18, R21 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R17 &rd=0x0 ?trans4;
LDG.E R0, desc[UR4][R6.64] &wr=0x3 ?trans4;
LDG.E R4, desc[UR4][R14.64] &wr=0x3 ?trans2;
FFMA R13, R0, R4, R17 &req={3} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R13 &rd=0x1 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x20] &wr=0x2 ?trans4;
LDG.E R4, desc[UR4][R14.64+0x4] &wr=0x2 ?trans2;
FFMA R19, R0, R4, R13 &req={2} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R19 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x40] &wr=0x0 ?trans4;
LDG.E R4, desc[UR4][R14.64+0x8] &wr=0x0 ?trans2;
FFMA R17, R0, R4, R19 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R8.64], R17 ?trans4;
LDG.E R0, desc[UR4][R6.64+0x60] &wr=0x1 ?trans4;
LDG.E R4, desc[UR4][R14.64+0xc] &wr=0x1 ?trans1;
UMOV.64 UR6, 0x3fd3333333333333 ?trans1;
IMAD.WIDE R2, R5, 0x4, R2 ?WAIT4_END_GROUP;
FFMA R13, R0, R4, R17 &req={1} ?WAIT4_END_GROUP;
F2F.F64.F32 R10, R13 &wr=0x0 ?trans1;
STG.E desc[UR4][R8.64], R13 ?WAIT15_END_GROUP;
NOP ?WAIT3_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
DSETP.GT.AND P0, PT, R10, UR6, PT &req={0} &wr=0x0 ?trans2;
FSEL R11, RZ, 1.875, !P0 &req={0} ?trans1;
MOV R10, RZ ?WAIT15_END_GROUP;
NOP ?trans1;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
NOP ?WAIT15_END_GROUP;
F2F.F32.F64 R11, R10 &wr=0x0 ?trans2;
STG.E desc[UR4][R2.64], R11 &req={0} ?trans1;
EXIT ?trans5;
BRA 0xdd0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: stepLIF(float*, float*, int*, float*, float*, float*, int)
_Z7stepLIFPfS_PiS_S_S_i:
s_load_b32 s2, s[0:1], 0x44
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_mov_b32 s2, exec_lo
v_cmpx_gt_i32_e32 8, v2
s_cbranch_execz .LBB1_9
s_load_b32 s2, s[0:1], 0x30
s_waitcnt lgkmcnt(0)
s_add_i32 s3, s2, -1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_mul_hi_i32 s4, s3, 0x66666667
s_lshr_b32 s5, s4, 31
s_ashr_i32 s4, s4, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_add_i32 s4, s4, s5
s_mul_i32 s12, s4, 20
s_load_b256 s[4:11], s[0:1], 0x0
s_sub_i32 s15, s3, s12
s_mul_hi_i32 s3, s2, 0x66666667
s_lshl_b32 s12, s15, 3
s_lshr_b32 s13, s3, 31
v_add_nc_u32_e32 v0, s12, v2
s_lshr_b32 s3, s3, 3
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_add_i32 s3, s3, s13
v_ashrrev_i32_e32 v1, 31, v0
s_mul_i32 s3, s3, 20
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
s_sub_i32 s2, s2, s3
v_lshlrev_b64 v[3:4], 2, v[0:1]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v0, vcc_lo, s6, v3
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v4, vcc_lo
v_add_co_u32 v5, vcc_lo, s8, v3
v_add_co_ci_u32_e32 v6, vcc_lo, s9, v4, vcc_lo
global_load_b32 v1, v[0:1], off
global_load_b32 v5, v[5:6], off
v_lshl_add_u32 v0, s2, 3, v2
s_waitcnt vmcnt(1)
v_cmp_nlt_f32_e32 vcc_lo, 0.5, v1
s_waitcnt vmcnt(0)
v_cmp_gt_i32_e64 s2, 1, v5
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_delay_alu instid0(SALU_CYCLE_1)
s_xor_b32 s14, exec_lo, s3
s_cbranch_execz .LBB1_7
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
s_mov_b32 s2, 0xb0a726a6
s_mov_b32 s3, 0x3fee7078
v_lshlrev_b64 v[0:1], 2, v[0:1]
global_load_b32 v3, v[3:4], off
s_ashr_i32 s13, s12, 31
v_mov_b32_e32 v9, 0
s_waitcnt vmcnt(0)
v_cvt_f64_f32_e32 v[3:4], v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mul_f64 v[3:4], v[3:4], s[2:3]
s_load_b128 s[0:3], s[0:1], 0x20
v_cvt_f32_f64_e32 v8, v[3:4]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
v_lshlrev_b64 v[4:5], 2, v[2:3]
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
s_waitcnt lgkmcnt(0)
v_add_co_u32 v6, vcc_lo, s2, v4
s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v7, vcc_lo, s3, v5, vcc_lo
s_lshl_b64 s[2:3], s[12:13], 2
s_add_u32 s12, s6, s2
s_addc_u32 s13, s7, s3
s_mov_b64 s[2:3], 0
global_store_b32 v[2:3], v8, off
.LBB1_3:
s_add_u32 s16, s12, s2
s_addc_u32 s17, s13, s3
global_load_b32 v10, v[6:7], off
global_load_b32 v11, v9, s[16:17]
v_add_co_u32 v6, vcc_lo, v6, 32
v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
s_add_u32 s2, s2, 4
s_addc_u32 s3, s3, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[2:3], 32
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, v10, v11
global_store_b32 v[2:3], v8, off
s_cbranch_scc0 .LBB1_3
s_lshl_b32 s2, s15, 2
v_add_co_u32 v4, vcc_lo, s0, v4
s_ashr_i32 s3, s2, 31
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
s_lshl_b64 s[0:1], s[2:3], 2
v_mov_b32_e32 v6, 0
s_add_u32 s2, s10, s0
s_addc_u32 s3, s11, s1
s_mov_b64 s[0:1], 0
.LBB1_5:
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s10, s2, s0
s_addc_u32 s11, s3, s1
global_load_b32 v7, v[4:5], off
global_load_b32 v9, v6, s[10:11]
v_add_co_u32 v4, vcc_lo, v4, 32
v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
s_add_u32 s0, s0, 4
s_addc_u32 s1, s1, 0
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_eq_u64 s[0:1], 16
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v8, v7, v9
global_store_b32 v[2:3], v8, off
s_cbranch_scc0 .LBB1_5
v_cvt_f64_f32_e32 v[2:3], v8
s_mov_b32 s0, 0x33333333
s_mov_b32 s1, 0x3fd33333
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_cmp_lt_f64_e32 vcc_lo, s[0:1], v[2:3]
v_mov_b32_e32 v2, 0
v_cndmask_b32_e64 v3, 0, 0x3ff00000, vcc_lo
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3)
v_cvt_f32_f64_e32 v2, v[2:3]
global_store_b32 v[0:1], v2, off
.LBB1_7:
s_and_not1_saveexec_b32 s0, s14
s_cbranch_execz .LBB1_9
v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v6, 1, v5
v_lshlrev_b64 v[0:1], 2, v[0:1]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshrrev_b32_e32 v2, 31, v6
v_add_nc_u32_e32 v4, v6, v2
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v2, vcc_lo, s4, v0
v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
v_and_b32_e32 v8, -2, v4
v_add_co_u32 v4, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s8, v0
v_sub_nc_u32_e32 v6, v6, v8
v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
global_store_b32 v[2:3], v7, off
global_store_b32 v[4:5], v7, off
global_store_b32 v[0:1], v6, off
.LBB1_9:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| stepLIF | 4,838 | 2,971 | stackv2-00000-of-00015 |
// Demangled: matchesKernel(int*, char*, char*, int, int, int, int, int)
Function : _Z13matchesKernelPiPcS0_iiiii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x39c] &wr=0x1 ?trans1;
S2R R16, SR_TID.X &wr=0x2 ?trans6;
S2UR UR7, SR_CTAID.X &wr=0x2 ?trans1;
UMOV.64 UR4, 0x4 ?WAIT7_END_GROUP;
LDC R29, c[0x0][0x360] &wr=0x2 ?trans1;
UIMAD.WIDE UR4, UR6, 0x4, UR4 &req={1} ?WAIT6_END_GROUP;
MOV.64 R2, UR4 ?trans2;
MOV R2, 0x0 ?trans1;
MOV.64 R4, UR4 ?WAIT3_END_GROUP;
MOV R5, R3 ?trans2;
LDC.64 R2, c[0x4][R2] &wr=0x1 ?trans1;
IMAD R16, R29, UR7, R16 &req={2,0} ?WAIT7_END_GROUP;
LEPC R20, 0xf0 ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={1} ?trans5;
LDCU UR4, c[0x0][0x3a4] &wr=0x0 ?trans1;
BSSY B1, 0x17f0 ?trans1;
ISETP.GE.AND P0, PT, R16, UR4, PT &req={0} ?WAIT13_END_GROUP;
@P0 BRA 0x17e0 ?trans5;
LDC R7, c[0x0][0x398] &wr=0x0 ?trans1;
LDCU UR6, c[0x0][0x3a0] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x370] &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU UR7, c[0x0][0x39c] &wr=0x3 ?trans7;
LDC.64 R26, c[0x0][0x358] &wr=0x4 ?trans1;
USHF.R.S32.HI UR5, URZ, 0x1f, UR6 &req={1} ?WAIT2_END_GROUP;
MOV R6, UR6 ?trans1;
IMAD R29, R29, UR4, RZ &req={2} ?trans1;
MOV R25, UR7 &req={3} ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 &req={0} ?trans1;
MOV R7, UR5 ?WAIT7_END_GROUP;
YIELD ?trans5;
LDCU UR4, c[0x0][0x3a4] &req={0} &wr=0x0 ?trans1;
BSSY.RECONVERGENT B0, 0x1690 ?trans1;
LDCU UR5, c[0x0][0x39c] &req={1} &wr=0x1 ?trans1;
IADD3 R0, PT, PT, -R16, UR4, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R0, UR5, PT &req={1} ?WAIT5_END_GROUP;
SEL R25, R0, R25, !P0 ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R25, RZ, PT ?WAIT13_END_GROUP;
@!P0 BRA 0x1680 &req={3,2} ?trans5;
IADD3 R22, PT, PT, R25, 0x1, RZ ?trans1;
BSSY.RECONVERGENT B2, 0x6c0 ?trans1;
HFMA2 R11, -RZ, RZ, 0, 5.9604644775390625e-08 ?trans1;
SHF.R.S32.HI R17, RZ, 0x1f, R16 ?trans2;
VIMNMX.U32 R22, R22, 0x2, !PT ?WAIT5_END_GROUP;
IADD3 R32, PT, PT, R22.reuse, -0x2, RZ ?trans2;
IADD3 R0, PT, PT, R22, -0x1, RZ ?WAIT3_END_GROUP;
ISETP.GE.U32.AND P0, PT, R32, 0xf, PT ?trans1;
LOP3.LUT R12, R0, 0xf, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0x6b0 ?trans5;
IADD.64 R8, R4, 0x20 ?trans2;
BSSY.RECONVERGENT B3, 0x6a0 ?trans1;
LOP3.LUT R10, R0, 0xfffffff0, RZ, 0xc0, !PT ?trans1;
MOV R11, RZ ?WAIT7_END_GROUP;
R2UR UR4, R26.reuse &req={4} ?trans2;
R2UR UR5, R27.reuse ?trans2;
R2UR UR6, R26.reuse ?trans2;
R2UR UR7, R27.reuse ?trans2;
R2UR UR8, R26 ?trans2;
R2UR UR9, R27 ?WAIT2_END_GROUP;
R2UR UR10, R26.reuse ?trans2;
R2UR UR11, R27.reuse ?trans2;
R2UR UR12, R26.reuse ?trans2;
R2UR UR13, R27.reuse ?trans2;
R2UR UR14, R26 ?trans2;
R2UR UR15, R27 ?WAIT2_END_GROUP;
R2UR UR16, R26 ?trans2;
R2UR UR17, R27 ?trans2;
IADD3 R13, PT, PT, R11.reuse, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R11.reuse, 0x2, RZ ?trans2;
IADD3 R19, PT, PT, R11.reuse, 0x3, RZ ?trans2;
IADD3 R21, PT, PT, R11, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R23, PT, PT, R11.reuse, 0x5, RZ ?trans1;
ST.E desc[UR4][R8.64+-0x1c], R13 &rd=0x0 ?trans1;
IADD3 R31, PT, PT, R11.reuse, 0x6, RZ ?trans2;
IADD3 R33, PT, PT, R11, 0x8, RZ ?trans2;
R2UR UR18, R26 ?trans1;
ST.E desc[UR6][R8.64+-0x18], R15 &rd=0x1 ?trans1;
R2UR UR19, R27 ?WAIT3_END_GROUP;
ST.E desc[UR8][R8.64+-0x14], R19 &rd=0x2 ?trans1;
IADD3 R13, PT, PT, R11, 0x7, RZ &req={0} ?WAIT3_END_GROUP;
ST.E desc[UR10][R8.64+-0x10], R21 &rd=0x0 ?trans1;
IADD3 R15, PT, PT, R11, 0x9, RZ &req={1} ?WAIT3_END_GROUP;
ST.E desc[UR12][R8.64+-0xc], R23 &rd=0x1 ?trans1;
IADD3 R19, PT, PT, R11, 0xa, RZ &req={2} ?WAIT3_END_GROUP;
ST.E desc[UR14][R8.64+-0x8], R31 &rd=0x2 ?trans4;
ST.E desc[UR4][R8.64+-0x4], R13 &rd=0x3 ?trans1;
IADD3 R21, PT, PT, R11, 0xb, RZ &req={0} ?WAIT3_END_GROUP;
ST.E desc[UR16][R8.64], R33 &rd=0x0 ?trans1;
IADD3 R23, PT, PT, R11.reuse, 0xd, RZ &req={1} ?trans2;
IADD3 R31, PT, PT, R11.reuse, 0xe, RZ &req={2} ?trans1;
ST.E desc[UR6][R8.64+0x4], R15 ?trans1;
IADD3 R13, PT, PT, R11, 0xc, RZ &req={3} ?WAIT3_END_GROUP;
ST.E desc[UR8][R8.64+0x8], R19 ?trans1;
IADD3 R33, PT, PT, R11.reuse, 0xf, RZ &req={0} ?trans2;
IADD3 R11, PT, PT, R11, 0x10, RZ ?trans1;
ST.E desc[UR10][R8.64+0xc], R21 ?trans4;
ISETP.NE.AND P0, PT, R11, R10, PT ?trans1;
ST.E desc[UR4][R8.64+0x10], R13 ?trans4;
ST.E desc[UR12][R8.64+0x14], R23 ?trans4;
ST.E desc[UR14][R8.64+0x18], R31 ?trans4;
ST.E desc[UR16][R8.64+0x1c], R33 ?trans4;
ST.E desc[UR18][R8.64+0x20], R11 &rd=0x0 ?trans2;
IADD.64 R8, R8, 0x40 &req={0} ?WAIT2_END_GROUP;
@P0 BRA 0x360 ?trans6;
BSYNC.RECONVERGENT B3 ?trans5;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
BSSY.RECONVERGENT B2, 0xbf0 ?WAIT12_END_GROUP;
@!P0 BRA 0xbe0 ?trans5;
ISETP.GE.U32.AND P0, PT, R12, 0x8, PT ?trans1;
LOP3.LUT R10, R0, 0x7, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B3, 0x960 ?trans4;
ISETP.NE.AND P1, PT, R10, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x950 ?trans6;
R2UR UR6, R26.reuse &req={4} ?trans1;
IMAD.WIDE.U32 R8, R11, 0x4, R4 ?trans1;
R2UR UR7, R27.reuse ?trans2;
R2UR UR8, R26.reuse ?trans2;
R2UR UR9, R27.reuse ?trans2;
R2UR UR10, R26 ?trans2;
R2UR UR11, R27 ?WAIT2_END_GROUP;
R2UR UR12, R26.reuse ?trans2;
R2UR UR13, R27.reuse ?trans2;
R2UR UR14, R26.reuse ?trans2;
R2UR UR15, R27.reuse ?trans2;
R2UR UR16, R26 ?trans2;
R2UR UR17, R27 ?WAIT2_END_GROUP;
R2UR UR18, R26 ?trans2;
R2UR UR19, R27 ?trans2;
IADD3 R13, PT, PT, R11.reuse, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R11.reuse, 0x2, RZ ?trans2;
IADD3 R19, PT, PT, R11.reuse, 0x3, RZ ?trans2;
IADD3 R21, PT, PT, R11, 0x4, RZ ?WAIT2_END_GROUP;
IADD3 R23, PT, PT, R11.reuse, 0x5, RZ ?trans2;
IADD3 R31, PT, PT, R11.reuse, 0x6, RZ ?trans2;
IADD3 R33, PT, PT, R11, 0x7, RZ ?trans1;
ST.E desc[UR6][R8.64+0x4], R13 ?trans1;
R2UR UR4, R26 ?trans2;
R2UR UR5, R27 ?trans1;
ST.E desc[UR8][R8.64+0x8], R15 ?trans4;
ST.E desc[UR10][R8.64+0xc], R19 ?trans4;
ST.E desc[UR12][R8.64+0x10], R21 ?trans4;
ST.E desc[UR14][R8.64+0x14], R23 ?trans4;
ST.E desc[UR16][R8.64+0x18], R31 ?trans4;
ST.E desc[UR18][R8.64+0x1c], R33 ?trans4;
ST.E desc[UR4][R8.64], R11 &rd=0x0 ?trans2;
IADD3 R11, PT, PT, R11, 0x8, RZ &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
@!P1 BRA 0xbe0 ?trans5;
ISETP.GE.U32.AND P0, PT, R10, 0x4, PT ?trans1;
LOP3.LUT R12, R0, 0x3, RZ, 0xc0, !PT ?trans1;
BSSY.RECONVERGENT B3, 0xae0 ?trans4;
ISETP.NE.AND P1, PT, R12, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0xad0 ?trans6;
R2UR UR6, R26.reuse &req={4} ?trans1;
IMAD.WIDE.U32 R8, R11, 0x4, R4 ?trans1;
R2UR UR7, R27.reuse ?trans2;
R2UR UR8, R26.reuse ?trans2;
R2UR UR9, R27.reuse ?trans2;
R2UR UR10, R26 ?trans2;
R2UR UR11, R27 ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R11.reuse, 0x1, RZ ?trans2;
IADD3 R15, PT, PT, R11.reuse, 0x2, RZ ?trans2;
IADD3 R19, PT, PT, R11, 0x3, RZ ?trans2;
R2UR UR4, R26 ?trans1;
ST.E desc[UR6][R8.64+0x4], R13 ?trans1;
R2UR UR5, R27 ?WAIT3_END_GROUP;
ST.E desc[UR8][R8.64+0x8], R15 ?trans4;
ST.E desc[UR10][R8.64+0xc], R19 ?trans6;
ST.E desc[UR4][R8.64], R11 &rd=0x0 ?trans2;
IADD3 R11, PT, PT, R11, 0x4, RZ &req={0} ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B3 ?trans5;
@!P1 BRA 0xbe0 ?trans5;
R2UR UR4, R26 &req={4} ?trans1;
IMAD.WIDE.U32 R8, R11, 0x4, R4 ?trans1;
R2UR UR5, R27 ?trans1;
ISETP.NE.AND P0, PT, R12, 0x1, PT ?WAIT12_END_GROUP;
ST.E desc[UR4][R8.64], R11 &rd=0x0 ?trans1;
@!P0 BRA 0xbe0 ?trans5;
ISETP.NE.AND P0, PT, R12, 0x2, PT ?trans1;
R2UR UR4, R26 ?trans2;
R2UR UR5, R27 ?trans2;
IADD3 R13, PT, PT, R11, 0x1, RZ ?WAIT8_END_GROUP;
@P0 R2UR UR6, R26 ?trans2;
@P0 R2UR UR7, R27 ?trans1;
ST.E desc[UR4][R8.64+0x4], R13 &rd=0x1 ?trans1;
@P0 IADD3 R11, PT, PT, R11, 0x2, RZ &req={0} ?WAIT11_END_GROUP;
@P0 ST.E desc[UR6][R8.64+0x8], R11 &rd=0x1 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
LOP3.LUT R30, R0.reuse, 0x3, RZ, 0xc0, !PT ?trans2;
LOP3.LUT R0, R0, 0xfffffffc, RZ, 0xc0, !PT ?trans1;
MOV R23, 0x1 ?WAIT7_END_GROUP;
LDCU.64 UR4, c[0x0][0x388] &req={2} &wr=0x2 ?trans1;
R2UR UR6, R26 &req={4} ?trans1;
HFMA2 R21, -RZ, RZ, 0, 0 ?trans1;
R2UR UR7, R27 ?trans1;
BSSY.RECONVERGENT B2, 0x11d0 ?trans1;
ISETP.GE.U32.AND P1, PT, R32, 0x3, PT ?trans1;
IADD3 R20, PT, PT, R23, -0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R30, RZ, PT ?trans1;
MOV R19, 0x1 ?trans1;
MOV R18, R23 &req={3} ?trans2;
IADD.64 R8, R16, R20 &req={1,0} ?WAIT5_END_GROUP;
ST.E desc[UR6][R4.64], R23 &rd=0x0 ?trans1;
IADD.64 R8, R8, UR4 &req={2} ?trans2;
@!P1 BRA 0x11c0 ?trans6;
MOV R15, RZ ?trans1;
MOV R19, 0x1 ?trans1;
MOV R18, R23 ?WAIT7_END_GROUP;
LDCU.64 UR4, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R10, PT, PT, R19, -0x1, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?trans1;
R2UR UR10, R26.reuse ?trans2;
R2UR UR11, R27 ?trans2;
R2UR UR8, R26 ?trans1;
IADD.64 R10, R6, R10 ?WAIT3_END_GROUP;
R2UR UR9, R27.reuse ?trans2;
R2UR UR6, R26 ?trans2;
R2UR UR7, R27 ?trans1;
IADD.64 R10, R10, UR4 &req={1} ?trans2;
LDG.E.U8 R31, desc[UR10][R8.64] &req={3} &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R19, 0x4, R4 ?WAIT5_END_GROUP;
LDG.E.U8 R10, desc[UR8][R10.64] &rd=0x1 &wr=0x2 ?trans4;
LD.E R21, desc[UR6][R12.64] &wr=0x3 ?trans1;
R2UR UR12, R26 ?trans2;
R2UR UR13, R27 ?trans2;
IADD3 R24, PT, PT, R20, 0x1, RZ ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 &req={1} ?trans1;
ISETP.NE.AND P1, PT, R10, R31, PT &req={2} ?trans1;
IADD3 R31, PT, PT, R18, 0x1, RZ ?trans1;
MOV R10, R19 ?trans1;
IADD3 R14, PT, PT, R21, 0x1, RZ &req={3} ?WAIT4_END_GROUP;
IADD.64 R10, R6, R10 ?trans2;
VIMNMX.S32 R31, R14, R31, PT ?trans2;
IADD.64 R10, R10, UR4 ?WAIT3_END_GROUP;
@!P1 IADD3 R24, PT, PT, R20, RZ, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R31, R31, R24, PT ?trans2;
LD.E R24, desc[UR8][R12.64+0x4] &wr=0x2 ?trans4;
ST.E desc[UR6][R12.64], R31 &rd=0x1 ?trans4;
LDG.E.U8 R10, desc[UR10][R10.64] &wr=0x3 ?trans4;
LDG.E.U8 R33, desc[UR12][R8.64] &wr=0x3 ?trans1;
IADD3 R20, PT, PT, R19, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R10, R33, PT &req={3} ?trans1;
IADD3 R18, PT, PT, R24, 0x1, RZ &req={2} ?WAIT2_END_GROUP;
IADD3 R33, PT, PT, R31, 0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R33, R18, R33, PT ?WAIT5_END_GROUP;
@!P1 IADD3 R14, PT, PT, R21, RZ, RZ ?trans1;
MOV R21, RZ ?WAIT5_END_GROUP;
IADD.64 R20, R6, R20 ?trans2;
VIMNMX.S32 R33, R33, R14, PT ?trans2;
IADD.64 R20, R20, UR4 ?trans2;
LD.E R14, desc[UR8][R12.64+0x8] &wr=0x2 ?trans4;
ST.E desc[UR6][R12.64+0x4], R33 &rd=0x3 ?trans4;
LDG.E.U8 R20, desc[UR10][R20.64] &wr=0x4 ?trans4;
LDG.E.U8 R11, desc[UR12][R8.64] &wr=0x4 ?trans1;
IADD3 R10, PT, PT, R19, 0x2, RZ ?WAIT2_END_GROUP;
IADD3 R28, PT, PT, R14, 0x1, RZ &req={2} ?trans1;
ISETP.NE.AND P1, PT, R20, R11, PT &req={4} ?trans1;
IADD3 R11, PT, PT, R33, 0x1, RZ ?trans1;
LD.E R20, desc[UR8][R12.64+0xc] &wr=0x2 ?trans4;
VIMNMX.S32 R31, R28, R11, PT &req={1} ?trans1;
HFMA2 R11, -RZ, RZ, 0, 0 ?WAIT5_END_GROUP;
IADD.64 R10, R6, R10 ?WAIT3_END_GROUP;
@!P1 IADD3 R18, PT, PT, R24, RZ, RZ ?trans1;
IADD.64 R10, R10, UR4 ?WAIT4_END_GROUP;
VIMNMX.S32 R31, R31, R18, PT ?WAIT5_END_GROUP;
ST.E desc[UR6][R12.64+0x8], R31 &rd=0x3 ?trans4;
LDG.E.U8 R10, desc[UR10][R10.64] &wr=0x4 ?trans4;
LDG.E.U8 R21, desc[UR12][R8.64] &wr=0x4 ?trans1;
IADD3 R15, PT, PT, R15, 0x4, RZ ?trans2;
R2UR UR4, R26 ?WAIT2_END_GROUP;
R2UR UR5, R27 ?trans2;
IADD3 R19, PT, PT, R19, 0x4, RZ ?trans2;
IADD3 R18, PT, PT, R20, 0x1, RZ &req={2} ?trans1;
ISETP.NE.AND P1, PT, R10, R21, PT &req={4} ?trans1;
IADD3 R21, PT, PT, R31, 0x1, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R21, R18, R21, PT ?WAIT7_END_GROUP;
@!P1 IADD3 R28, PT, PT, R14, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R15, R0, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R18, R21, R28, PT ?WAIT5_END_GROUP;
ST.E desc[UR4][R12.64+0xc], R18 &rd=0x3 ?trans4;
@P1 BRA 0xd30 ?trans5;
BSYNC.RECONVERGENT B2 ?trans5;
BSSY.RECONVERGENT B2, 0x1650 ?trans4;
@!P0 BRA 0x1640 ?trans5;
LDC.64 R10, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R12, PT, PT, R19, -0x1, RZ &req={3} ?trans1;
MOV R13, RZ ?trans1;
R2UR UR8, R26.reuse ?trans2;
R2UR UR9, R27 ?trans2;
R2UR UR6, R26 ?trans1;
IADD.64 R12, R6, R12 ?WAIT3_END_GROUP;
R2UR UR7, R27.reuse ?trans2;
R2UR UR4, R26 ?trans2;
R2UR UR5, R27 ?WAIT3_END_GROUP;
LDG.E.U8 R21, desc[UR8][R8.64] &wr=0x2 ?trans1;
IADD.64 R14, R12, R10 &req={1} ?WAIT7_END_GROUP;
LDG.E.U8 R14, desc[UR6][R14.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R12, R19, 0x4, R4 ?WAIT5_END_GROUP;
LD.E R24, desc[UR4][R12.64] &wr=0x3 ?trans1;
IADD3 R31, PT, PT, R20, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R14, R21, PT &req={2} ?trans1;
IADD3 R21, PT, PT, R18, 0x1, RZ ?trans2;
IADD3 R28, PT, PT, R24, 0x1, RZ &req={3} ?WAIT10_END_GROUP;
@!P0 IADD3 R31, PT, PT, R20, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R30, 0x1, PT ?trans1;
VIMNMX.S32 R18, R28, R21, PT ?WAIT5_END_GROUP;
VIMNMX.S32 R31, R18, R31, PT ?WAIT5_END_GROUP;
ST.E desc[UR4][R12.64], R31 &rd=0x1 ?trans2;
@!P0 BRA 0x1640 ?trans5;
MOV R14, R19 ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?trans1;
R2UR UR6, R26.reuse ?trans2;
R2UR UR7, R27 ?trans2;
R2UR UR8, R26 ?trans1;
IADD.64 R14, R6, R14 ?WAIT3_END_GROUP;
R2UR UR9, R27 ?trans1;
IADD.64 R20, R14, R10 ?WAIT3_END_GROUP;
R2UR UR4, R26 ?trans2;
R2UR UR5, R27 ?trans2;
LDG.E.U8 R20, desc[UR6][R20.64] &wr=0x2 ?trans1;
IADD3 R14, PT, PT, R19, 0x1, RZ ?WAIT4_END_GROUP;
LDG.E.U8 R15, desc[UR8][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE.U32 R18, R14, 0x4, R4 ?WAIT5_END_GROUP;
LD.E R33, desc[UR4][R18.64] &wr=0x3 ?trans1;
IADD3 R31, PT, PT, R31, 0x1, RZ &req={1} ?trans1;
ISETP.NE.AND P0, PT, R20, R15, PT &req={2} ?trans1;
MOV R15, R28 ?trans1;
IADD3 R28, PT, PT, R33, 0x1, RZ &req={3} ?WAIT5_END_GROUP;
VIMNMX.S32 R20, R28, R31, PT ?WAIT6_END_GROUP;
@!P0 IADD3 R15, PT, PT, R24, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R30, 0x2, PT ?WAIT4_END_GROUP;
VIMNMX.S32 R21, R20, R15, PT ?trans1;
HFMA2 R15, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
ST.E desc[UR4][R18.64], R21 &rd=0x2 ?trans4;
@!P0 BRA 0x1640 ?trans5;
R2UR UR8, R26 ?trans1;
IADD.64 R14, R6, R14 ?WAIT3_END_GROUP;
R2UR UR9, R27 ?trans1;
IADD.64 R14, R14, R10 ?WAIT3_END_GROUP;
R2UR UR6, R26.reuse ?trans2;
R2UR UR7, R27.reuse ?trans2;
R2UR UR4, R26 ?trans2;
R2UR UR5, R27 ?WAIT3_END_GROUP;
LDG.E.U8 R9, desc[UR8][R8.64] &wr=0x3 ?trans6;
LDG.E.U8 R14, desc[UR6][R14.64] &wr=0x3 ?trans4;
LD.E R10, desc[UR4][R12.64+0x8] &wr=0x4 ?trans1;
IADD3 R21, PT, PT, R21, 0x1, RZ &req={2} ?trans1;
ISETP.NE.AND P0, PT, R14, R9, PT &req={3} ?trans1;
IADD3 R10, PT, PT, R10, 0x1, RZ &req={4} ?WAIT5_END_GROUP;
VIMNMX.S32 R21, R10, R21, PT ?WAIT7_END_GROUP;
@!P0 IADD3 R28, PT, PT, R33, RZ, RZ ?WAIT5_END_GROUP;
VIMNMX.S32 R21, R21, R28, PT ?WAIT5_END_GROUP;
ST.E desc[UR4][R12.64+0x8], R21 &rd=0x4 ?trans2;
BSYNC.RECONVERGENT B2 ?trans5;
IADD3 R23, PT, PT, R23, 0x1, RZ &req={0} ?WAIT5_END_GROUP;
ISETP.NE.AND P0, PT, R23, R22, PT ?WAIT13_END_GROUP;
@P0 BRA 0xc20 ?trans5;
BSYNC.RECONVERGENT B0 ?trans5;
R2UR UR4, R26 &req={4} ?trans1;
IMAD.WIDE R8, R25, 0x4, R4 ?trans1;
R2UR UR5, R27 ?WAIT13_END_GROUP;
LD.E R8, desc[UR4][R8.64] &wr=0x4 ?trans1;
LDCU UR4, c[0x0][0x3a8] &wr=0x4 ?trans1;
BSSY.RECONVERGENT B0, 0x17a0 ?trans1;
ISETP.GT.AND P0, PT, R8, UR4, PT &req={4} ?WAIT13_END_GROUP;
@P0 BRA 0x1790 ?trans5;
S2R R0, SR_LANEID &wr=0x0 ?trans1;
VOTEU.ANY UR4, UPT, PT ?trans2;
UFLO.U32 UR5, UR4 ?trans2;
POPC R9, UR4 &wr=0x4 ?trans4;
ISETP.EQ.U32.AND P0, PT, R0, UR5, PT &req={0} ?WAIT13_END_GROUP;
@P0 R2UR UR4, R26 ?trans2;
@P0 R2UR UR5, R27 ?WAIT13_END_GROUP;
@P0 REDG.E.ADD.STRONG.GPU desc[UR4][R2.64], R9 &req={4} &rd=0x0 ?trans2;
BSYNC.RECONVERGENT B0 ?trans5;
LDCU UR4, c[0x0][0x3a4] &wr=0x4 ?trans1;
IADD3 R16, PT, PT, R29, R16, RZ ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R16, UR4, PT &req={4} ?WAIT13_END_GROUP;
@!P0 BRA 0x1f0 ?trans5;
BSYNC B1 ?trans5;
MOV R2, 0x8 &req={0} ?WAIT6_END_GROUP;
LDC.64 R2, c[0x4][R2] &wr=0x0 ?trans2;
LEPC R20, 0x1830 &req={2} ?WAIT7_END_GROUP;
CALL.ABS.NOINC R2 &req={3,1,0} ?trans5;
EXIT ?trans5;
BRA 0x1840;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: matchesKernel(int*, char*, char*, int, int, int, int, int)
_Z13matchesKernelPiPcS0_iiiii:
s_clause 0x1
s_load_b128 s[48:51], s[0:1], 0x18
s_load_b32 s2, s[0:1], 0x3c
s_mov_b64 s[46:47], s[0:1]
s_mov_b32 s32, 0
s_add_u32 s8, s46, 48
s_addc_u32 s9, s47, 0
s_waitcnt lgkmcnt(0)
s_ashr_i32 s1, s49, 31
s_mov_b32 s0, s49
s_and_b32 s33, s2, 0xffff
s_lshl_b64 s[0:1], s[0:1], 2
v_mad_u64_u32 v[41:42], null, s15, s33, v[0:1]
s_add_u32 s2, s0, 4
s_addc_u32 s3, s1, 0
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, __ockl_dm_alloc@rel32@lo+4
s_addc_u32 s1, s1, __ockl_dm_alloc@rel32@hi+12
s_swappc_b64 s[30:31], s[0:1]
s_mov_b32 s10, exec_lo
v_cmpx_gt_i32_e64 s51, v41
s_cbranch_execz .LBB2_13
s_load_b64 s[4:5], s[46:47], 0x10
s_load_b32 s12, s[8:9], 0x0
s_clause 0x1
s_load_b128 s[0:3], s[46:47], 0x0
s_load_b32 s11, s[46:47], 0x28
s_ashr_i32 s7, s50, 31
s_mov_b32 s6, s48
v_add_co_u32 v2, vcc_lo, v0, 4
v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
v_dual_mov_b32 v4, s49 :: v_dual_mov_b32 v9, 0
s_waitcnt lgkmcnt(0)
s_add_u32 s4, s4, s50
s_addc_u32 s5, s5, s7
s_ashr_i32 s7, s48, 31
s_mul_i32 s12, s12, s33
s_lshl_b64 s[6:7], s[6:7], 2
s_delay_alu instid0(SALU_CYCLE_1)
s_add_u32 s6, s0, s6
s_addc_u32 s7, s1, s7
s_mov_b32 s1, 0
.LBB2_2:
v_sub_nc_u32_e32 v5, s51, v41
s_mov_b32 s13, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_cmp_gt_i32_e32 vcc_lo, s49, v5
v_cndmask_b32_e32 v4, v4, v5, vcc_lo
v_cmpx_ne_u32_e32 0, v4
s_cbranch_execz .LBB2_9
v_add_nc_u32_e32 v5, 1, v4
s_mov_b32 s9, 1
s_mov_b32 s8, 0
s_delay_alu instid0(VALU_DEP_1)
v_max_u32_e32 v10, 2, v5
v_dual_mov_b32 v6, v3 :: v_dual_mov_b32 v5, v2
.LBB2_4:
v_mov_b32_e32 v7, s9
s_add_i32 s9, s9, 1
s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s9, v10
global_store_b32 v[5:6], v7, off
v_add_co_u32 v5, s0, v5, 4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
s_or_b32 s8, vcc_lo, s8
s_and_not1_b32 exec_lo, exec_lo, s8
s_cbranch_execnz .LBB2_4
s_or_b32 exec_lo, exec_lo, s8
v_ashrrev_i32_e32 v5, 31, v41
v_add_co_u32 v11, vcc_lo, s2, v41
v_add_nc_u32_e32 v13, -1, v10
s_mov_b32 s14, 1
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v12, vcc_lo, s3, v5, vcc_lo
s_mov_b32 s15, 0
.LBB2_6:
s_add_i32 s0, s14, -1
v_mov_b32_e32 v8, v3
v_add_co_u32 v5, vcc_lo, v11, s0
v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v7, v2
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v12, vcc_lo
v_dual_mov_b32 v16, s0 :: v_dual_mov_b32 v15, v13
s_mov_b32 s16, 0
s_mov_b64 s[8:9], s[4:5]
global_store_b32 v[0:1], v14, off
.LBB2_7:
global_load_b32 v17, v[7:8], off
global_load_u8 v18, v9, s[8:9]
global_load_u8 v19, v[5:6], off
v_add_nc_u32_e32 v14, 1, v14
v_add_nc_u32_e32 v15, -1, v15
s_add_u32 s8, s8, 1
s_addc_u32 s9, s9, 0
s_waitcnt vmcnt(2)
v_add_nc_u32_e32 v20, 1, v17
s_waitcnt vmcnt(0)
v_cmp_ne_u16_e32 vcc_lo, v18, v19
v_add_co_ci_u32_e32 v16, vcc_lo, 0, v16, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_min3_i32 v14, v20, v14, v16
v_mov_b32_e32 v16, v17
v_cmp_eq_u32_e32 vcc_lo, 0, v15
global_store_b32 v[7:8], v14, off
v_add_co_u32 v7, s0, v7, 4
v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
s_or_b32 s16, vcc_lo, s16
s_delay_alu instid0(SALU_CYCLE_1)
s_and_not1_b32 exec_lo, exec_lo, s16
s_cbranch_execnz .LBB2_7
s_or_b32 exec_lo, exec_lo, s16
s_add_i32 s14, s14, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_eq_u32_e32 vcc_lo, s14, v10
s_or_b32 s15, vcc_lo, s15
s_and_not1_b32 exec_lo, exec_lo, s15
s_cbranch_execnz .LBB2_6
.LBB2_9:
s_or_b32 exec_lo, exec_lo, s13
v_ashrrev_i32_e32 v5, 31, v4
s_mov_b32 s0, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[4:5]
v_add_co_u32 v5, vcc_lo, v0, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, v1, v6, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_ge_i32_e64 s11, v5
s_cbranch_execz .LBB2_12
s_mov_b32 s8, exec_lo
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mbcnt_lo_u32_b32 v5, s8, 0
v_cmp_eq_u32_e32 vcc_lo, 0, v5
s_and_b32 s9, exec_lo, vcc_lo
s_delay_alu instid0(SALU_CYCLE_1)
s_mov_b32 exec_lo, s9
s_cbranch_execz .LBB2_12
s_bcnt1_i32_b32 s8, s8
s_delay_alu instid0(SALU_CYCLE_1)
v_mov_b32_e32 v5, s8
global_atomic_add_u32 v9, v5, s[6:7]
.LBB2_12:
s_or_b32 exec_lo, exec_lo, s0
v_add_nc_u32_e32 v41, s12, v41
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_cmp_le_i32_e32 vcc_lo, s51, v41
s_or_b32 s1, vcc_lo, s1
s_and_not1_b32 exec_lo, exec_lo, s1
s_cbranch_execnz .LBB2_2
.LBB2_13:
s_or_b32 exec_lo, exec_lo, s10
s_add_u32 s8, s46, 48
s_addc_u32 s9, s47, 0
s_getpc_b64 s[0:1]
s_add_u32 s0, s0, __ockl_dm_dealloc@rel32@lo+4
s_addc_u32 s1, s1, __ockl_dm_dealloc@rel32@hi+12
s_delay_alu instid0(SALU_CYCLE_1)
s_swappc_b64 s[30:31], s[0:1]
s_endpgm
| matchesKernel | 8,968 | 2,874 | stackv2-00000-of-00015 |
// Demangled: transposeCoalesced(unsigned long long const*, unsigned long long*, int, int)
Function : _Z18transposeCoalescedPKyPyii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R11, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x2 ?trans1;
S2R R13, SR_TID.X &wr=0x1 ?trans1;
S2R R8, SR_CTAID.Y &wr=0x3 ?trans1;
S2R R15, SR_TID.Y &wr=0x3 ?trans1;
LEA R0, R11, R13, 0x3 &req={1} ?WAIT5_END_GROUP;
ISETP.GT.AND P0, PT, R0, UR9, PT &req={2} ?trans1;
LEA R5, R8, R15, 0x3 &req={3} ?WAIT5_END_GROUP;
ISETP.GT.OR P0, PT, R5, UR8, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans1;
IMAD R5, R5, UR9, R0 ?trans1;
LDCU UR6, c[0x0][0x360] &wr=0x2 ?trans5;
LDC.64 R6, c[0x0][0x388] &wr=0x3 ?trans1;
IMAD.WIDE R2, R5, 0x8, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E.64 R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
MOV R0, 0x400 ?trans1;
LDCU UR7, c[0x0][0x364] &wr=0x0 ?trans1;
S2R R5, SR_CgaCtaId &wr=0x1 ?trans1;
IMAD R11, R11, UR7, R15 &req={0} ?trans2;
LEA R0, R5, R0, 0x18 &req={1} ?WAIT5_END_GROUP;
IMAD R4, R15, 0x48, R0.reuse ?trans2;
IMAD R0, R13, 0x48, R0 ?WAIT3_END_GROUP;
LEA R9, R13, R4, 0x3 ?trans2;
LEA R4, R15, R0, 0x3 ?trans1;
IMAD R0, R8, UR6, R13 &req={2} ?WAIT4_END_GROUP;
IMAD R11, R11, UR8, R0 ?WAIT4_END_GROUP;
IMAD.WIDE R6, R11, 0x8, R6 &req={3} ?trans1;
STS.64 [R9], R2 &req={4} ?trans1;
BAR.SYNC.DEFER_BLOCKING 0x0 ?trans6;
LDS.64 R4, [R4] &wr=0x0 ?trans4;
STG.E.64 desc[UR4][R6.64], R4 &req={0} ?trans1;
EXIT ?trans5;
BRA 0x230;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: transposeCoalesced(unsigned long long const*, unsigned long long*, int, int)
_Z18transposeCoalescedPKyPyii:
s_load_b64 s[4:5], s[0:1], 0x10
v_bfe_u32 v1, v0, 10, 10
v_and_b32_e32 v2, 0x3ff, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v3, s15, 3, v1
v_lshl_add_u32 v0, s14, 3, v2
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_ge_i32_e32 vcc_lo, s4, v3
v_cmp_ge_i32_e64 s2, s5, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s3, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[8:11], s[0:1], 0x0
v_mad_u64_u32 v[4:5], null, v3, s5, v[0:1]
v_lshlrev_b32_e32 v0, 3, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
v_mad_u32_u24 v0, 0x48, v1, v0
v_ashrrev_i32_e32 v5, 31, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[3:4], 3, v[4:5]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v3, vcc_lo, s8, v3
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
global_load_b64 v[3:4], v[3:4], off
s_waitcnt vmcnt(0)
ds_store_b64 v0, v[3:4]
s_waitcnt lgkmcnt(0)
s_barrier
buffer_gl0_inv
s_load_b32 s0, s[0:1], 0x24
v_lshlrev_b32_e32 v0, 3, v1
s_waitcnt lgkmcnt(0)
s_lshr_b32 s1, s0, 16
s_and_b32 s0, s0, 0xffff
v_mad_u64_u32 v[3:4], null, s14, s1, v[1:2]
s_mul_i32 s15, s15, s0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_mul_lo_u32 v1, v3, s4
v_mad_u32_u24 v3, 0x48, v2, v0
v_add3_u32 v0, s15, v2, v1
ds_load_b64 v[2:3], v3
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 3, v[0:1]
v_add_co_u32 v0, vcc_lo, s10, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
s_waitcnt lgkmcnt(0)
global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| transposeCoalesced | 897 | 1,074 | stackv2-00000-of-00015 |
// Demangled: hash_f(float*, int*, float*, int, unsigned long)
Function : _Z6hash_fPfPiS_im
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R3, c[0x0][0x398] &wr=0x1 ?trans1;
S2R R2, SR_TID.X &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x3 ?trans6;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans8;
LDC R7, c[0x0][0x360] &wr=0x2 ?trans1;
IABS R9, R3 &req={1} ?WAIT4_END_GROUP;
I2F.RP R0, R9 &wr=0x1 ?trans1;
IMAD R2, R7, UR4, R2 &req={2} ?trans1;
MUFU.RCP R0, R0 &req={1} &wr=0x1 ?trans4;
ISETP.GE.AND P1, PT, R2, RZ, PT ?trans1;
IADD3 R4, PT, PT, R0, 0xffffffe, RZ &req={1} ?trans2;
IABS R0, R2 ?trans2;
F2I.FTZ.U32.TRUNC.NTZ R5, R4 &rd=0x1 &wr=0x2 ?trans2;
HFMA2 R4, -RZ, RZ, 0, 0 &req={1} ?trans1;
IADD3 R6, PT, PT, RZ, -R5, RZ &req={2} ?WAIT5_END_GROUP;
IMAD R7, R6, R9, RZ ?WAIT4_END_GROUP;
IMAD.HI.U32 R5, R5, R7, R4 ?WAIT4_END_GROUP;
IMAD R4, R2, R3, R2 ?trans2;
IMAD.HI.U32 R5, R5, R0, RZ ?WAIT5_END_GROUP;
IADD3 R5, PT, PT, -R5, RZ, RZ ?WAIT5_END_GROUP;
IMAD R0, R9, R5, R0 ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R9, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.AND P0, PT, R9, R0, PT ?WAIT13_END_GROUP;
@!P0 IADD3 R0, PT, PT, R0, -R9, RZ ?trans1;
ISETP.NE.AND P0, PT, R3, RZ, PT ?WAIT4_END_GROUP;
MOV R9, R0 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
@!P1 IADD3 R9, PT, PT, -R9, RZ, RZ ?WAIT4_END_GROUP;
@!P0 LOP3.LUT R9, RZ, R3, RZ, 0x33, !PT ?trans1;
ISETP.GE.AND P0, PT, R3, 0x1, PT ?WAIT3_END_GROUP;
IADD3 R6, PT, PT, R2, -R9, RZ ?WAIT4_END_GROUP;
SHF.R.S32.HI R7, RZ, 0x1f, R6 ?WAIT6_END_GROUP;
@!P0 BRA 0x920 &req={3,0} ?trans5;
ISETP.GE.U32.AND P0, PT, R3.reuse, 0x8, PT ?trans1;
LOP3.LUT R24, R3, 0x7, RZ, 0xc0, !PT ?trans2;
SHF.R.S32.HI R5, RZ, 0x1f, R4 ?trans1;
MOV R0, RZ ?trans2;
ISETP.NE.AND P1, PT, R24, RZ, PT ?trans1;
MOV R8, RZ ?WAIT6_END_GROUP;
@!P0 BRA 0x550 ?trans6;
LDCU.64 UR8, c[0x0][0x390] &wr=0x0 ?trans1;
IMAD.WIDE R8, R9, 0x4, RZ ?trans1;
LOP3.LUT R14, R3, 0x7ffffff8, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x1 ?trans1;
MOV R0, RZ ?trans1;
IMAD.WIDE R8, R2, 0x4, -R8 ?trans1;
IADD3 R14, PT, PT, -R14, RZ, RZ ?trans2;
LEA R12, P0, R4, UR8, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R13, R4, UR9, R5, 0x2, P0 ?trans1;
IADD.64 R10, R8, UR4 &req={1} ?trans2;
HFMA2 R8, -RZ, RZ, 0, 0 ?trans2;
IADD.64 R10, R10, 0x10 ?trans2;
IADD.64 R12, R12, 0x10 ?WAIT8_END_GROUP;
LDG.E R9, desc[UR6][R10.64+-0x10] &wr=0x2 ?trans4;
LDG.E R15, desc[UR6][R12.64+-0x10] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R10.64+-0xc] &wr=0x3 ?trans4;
LDG.E R17, desc[UR6][R12.64+-0xc] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+-0x8] &wr=0x4 ?trans4;
LDG.E R19, desc[UR6][R12.64+-0x8] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R10.64+-0x4] &wr=0x5 ?trans4;
LDG.E R21, desc[UR6][R12.64+-0x4] &wr=0x5 ?trans4;
LDG.E R22, desc[UR6][R10.64] &wr=0x5 ?trans4;
LDG.E R23, desc[UR6][R12.64] &wr=0x5 ?trans4;
LDG.E R26, desc[UR6][R10.64+0x4] &wr=0x5 ?trans4;
LDG.E R25, desc[UR6][R12.64+0x4] &wr=0x5 ?trans4;
LDG.E R28, desc[UR6][R10.64+0x8] &wr=0x5 ?trans4;
LDG.E R27, desc[UR6][R12.64+0x8] &wr=0x5 ?trans4;
LDG.E R30, desc[UR6][R10.64+0xc] &rd=0x0 &wr=0x5 ?trans4;
LDG.E R29, desc[UR6][R12.64+0xc] &rd=0x1 &wr=0x5 ?trans1;
IADD3 R14, PT, PT, R14, 0x8, RZ ?WAIT2_END_GROUP;
IADD3 R8, PT, PT, R8, 0x8, RZ ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R14, RZ, PT ?trans1;
IADD.64 R10, R10, 0x20 &req={0} ?trans2;
IADD.64 R12, R12, 0x20 &req={1} ?trans2;
FFMA R9, R9, R15, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R16, R17, R9 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R18, R19, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R9, R20, R21, R9 &req={5} ?WAIT4_END_GROUP;
FFMA R9, R22, R23, R9 ?WAIT4_END_GROUP;
FFMA R9, R26, R25, R9 ?WAIT4_END_GROUP;
FFMA R9, R28, R27, R9 ?WAIT4_END_GROUP;
FFMA R0, R30, R29, R9 ?trans1;
@P0 BRA 0x370 ?trans6;
@!P1 BRA 0x920 ?trans5;
ISETP.GE.U32.AND P0, PT, R24, 0x4, PT ?trans1;
LOP3.LUT R21, R3, 0x3, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.AND P1, PT, R21, RZ, PT ?WAIT7_END_GROUP;
@!P0 BRA 0x700 ?trans6;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
MOV R9, RZ ?trans1;
LDCU.64 UR8, c[0x0][0x390] &wr=0x1 ?trans4;
IADD.64 R14, R6, R8.reuse ?trans2;
IADD.64 R16, R4, R8 ?WAIT3_END_GROUP;
LEA R10, P0, R14, UR4, 0x2 &req={0} ?trans2;
LEA R12, P2, R16, UR8, 0x2 &req={1} ?trans2;
LEA.HI.X R11, R14, UR5, R15, 0x2, P0 ?trans2;
LEA.HI.X R13, R16, UR9, R17, 0x2, P2 ?WAIT3_END_GROUP;
LDG.E R9, desc[UR6][R10.64] &wr=0x2 ?trans4;
LDG.E R14, desc[UR6][R12.64] &wr=0x2 ?trans4;
LDG.E R16, desc[UR6][R10.64+0x4] &wr=0x3 ?trans4;
LDG.E R15, desc[UR6][R12.64+0x4] &wr=0x3 ?trans4;
LDG.E R18, desc[UR6][R10.64+0x8] &wr=0x4 ?trans4;
LDG.E R17, desc[UR6][R12.64+0x8] &wr=0x4 ?trans4;
LDG.E R20, desc[UR6][R10.64+0xc] &wr=0x5 ?trans4;
LDG.E R19, desc[UR6][R12.64+0xc] &wr=0x5 ?trans1;
IADD3 R8, PT, PT, R8, 0x4, RZ ?trans1;
FFMA R9, R9, R14, R0 &req={2} ?WAIT4_END_GROUP;
FFMA R9, R16, R15, R9 &req={3} ?WAIT4_END_GROUP;
FFMA R9, R18, R17, R9 &req={4} ?WAIT4_END_GROUP;
FFMA R0, R20, R19, R9 &req={5} ?WAIT7_END_GROUP;
@!P1 BRA 0x920 ?trans5;
ISETP.NE.AND P1, PT, R21, 0x1, PT ?trans1;
LOP3.LUT R9, R3, 0x1, RZ, 0xc0, !PT ?WAIT5_END_GROUP;
ISETP.NE.U32.AND P0, PT, R9, 0x1, PT ?WAIT7_END_GROUP;
@P1 LDC.64 R22, c[0x0][0x380] &wr=0x0 ?trans1;
@P1 MOV R14, R8 ?trans1;
@P1 MOV R15, RZ ?trans1;
@P1 IADD3 R8, PT, PT, R8, 0x2, RZ ?WAIT3_END_GROUP;
@!P0 MOV R17, RZ ?trans1;
@P1 IADD.64 R18, R6, R14 ?trans2;
@P1 LDC.64 R24, c[0x0][0x390] &wr=0x1 ?trans1;
@!P0 MOV R16, R8 ?trans1;
@P1 IADD.64 R20, R4, R14 ?WAIT4_END_GROUP;
@!P0 IADD.64 R6, R6, R16.reuse ?trans2;
@!P0 LDC.64 R12, c[0x0][0x380] &wr=0x2 ?trans1;
@!P0 IADD.64 R16, R4, R16 ?WAIT3_END_GROUP;
@P1 LEA R14, P2, R18, R22, 0x2 &req={0} ?WAIT4_END_GROUP;
@!P0 LDC.64 R10, c[0x0][0x390] &wr=0x0 ?trans1;
@P1 LEA.HI.X R15, R18, R23, R19, 0x2, P2 ?trans2;
@P1 LEA R8, P3, R20, R24, 0x2 &req={1} ?WAIT4_END_GROUP;
@P1 LEA.HI.X R9, R20, R25, R21, 0x2, P3 ?trans2;
@!P0 LEA R12, P2, R6, R12, 0x2 &req={2} ?WAIT4_END_GROUP;
@!P0 LEA.HI.X R13, R6, R13, R7, 0x2, P2 ?trans2;
@P1 LDG.E R7, desc[UR6][R14.64] &wr=0x2 ?trans1;
@!P0 LEA R10, P2, R16, R10, 0x2 &req={0} ?WAIT3_END_GROUP;
@P1 LDG.E R6, desc[UR6][R8.64] &wr=0x2 ?trans1;
@!P0 LEA.HI.X R11, R16, R11, R17, 0x2, P2 ?WAIT3_END_GROUP;
@P1 LDG.E R17, desc[UR6][R14.64+0x4] &wr=0x3 ?trans4;
@P1 LDG.E R16, desc[UR6][R8.64+0x4] &wr=0x3 ?trans4;
@!P0 LDG.E R13, desc[UR6][R12.64] &wr=0x4 ?trans4;
@!P0 LDG.E R10, desc[UR6][R10.64] &wr=0x4 ?trans1;
@P1 FFMA R6, R7, R6, R0 &req={2} ?WAIT4_END_GROUP;
@P1 FFMA R0, R17, R16, R6 &req={3} ?WAIT4_END_GROUP;
@!P0 FFMA R0, R13, R10, R0 &req={4} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R4, R3, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R5, 0x4, R6 &req={0} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR6][R4.64] &wr=0x2 ?trans1;
UMOV UR5, 0x3ab60b61 ?trans1;
UMOV UR4, 0x44340000 ?trans1;
BSSY.RECONVERGENT B1, 0xa50 ?trans1;
UFFMA UR4, UR5, -UR4, 1 ?WAIT4_END_GROUP;
UFFMA UR4, UR4, UR5, 0.0013888889225199818611 ?trans1;
FADD R0, R5, R0 &req={2} ?WAIT4_END_GROUP;
FCHK P0, R0, 720 &wr=0x0 ?trans1;
FFMA R3, R0, UR4, RZ ?WAIT4_END_GROUP;
FFMA R6, R3, -720, R0 ?WAIT4_END_GROUP;
FFMA R6, R6, UR4, R3 ?trans1;
@!P0 BRA 0xa40 &req={0} ?trans6;
MOV R4, 0xa30 ?WAIT7_END_GROUP;
CALL.REL.NOINC 0xaa0 ?trans5;
MOV R6, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B1 ?trans5;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
F2I.FLOOR.NTZ R7, R6 &wr=0x1 ?trans1;
IMAD.WIDE R2, R2, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R2.64], R7 &req={1} ?trans1;
EXIT ?trans5;
SHF.R.U32.HI R3, RZ, 0x17, R0 ?trans1;
BSSY.RECONVERGENT B0, 0x1080 ?trans4;
BSSY.RELIABLE B2, 0xc70 ?trans1;
LOP3.LUT R8, R3, 0xff, RZ, 0xc0, !PT ?trans1;
MOV R3, R0 ?WAIT3_END_GROUP;
IADD3 R7, PT, PT, R8, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GT.U32.OR P0, PT, R7, 0xfd, !PT ?WAIT13_END_GROUP;
@!P0 MOV R5, RZ ?trans1;
@!P0 BRA 0xc60 ?trans6;
FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0x1060 ?trans5;
HFMA2 R6, -RZ, RZ, 4.203125, 0 ?WAIT5_END_GROUP;
LOP3.LUT P0, RZ, R6, 0x7fffffff, R3, 0xc8, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x1040 ?trans5;
LOP3.LUT P0, RZ, R3, 0x7fffffff, RZ, 0xc0, !PT ?WAIT13_END_GROUP;
@!P0 BREAK.RELIABLE B2 ?trans5;
@!P0 BRA 0x1020 ?trans5;
FSETP.NEU.FTZ.AND P1, PT, |R0|, +INF , PT ?trans1;
LOP3.LUT P0, RZ, R6, 0x7fffffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
PLOP3.LUT P0, PT, P1, P0, PT, 0x2f, 0xf2 ?WAIT13_END_GROUP;
@P0 BREAK.RELIABLE B2 ?trans5;
@P0 BRA 0xff0 ?trans5;
ISETP.GE.AND P0, PT, R7, RZ, PT ?WAIT13_END_GROUP;
@P0 MOV R5, RZ ?trans1;
@!P0 FFMA R3, R0, 1.84467440737095516160e+19, RZ ?trans1;
@!P0 MOV R5, 0xffffffc0 ?WAIT7_END_GROUP;
BSYNC.RELIABLE B2 ?trans5;
UMOV UR4, 0x44340000 ?trans1;
IADD3 R6, PT, PT, R8, -0x7f, RZ ?trans1;
UIADD3 UR4, UPT, UPT, UR4, -0x4800000, URZ ?trans1;
BSSY.RECONVERGENT B2, 0xfe0 ?trans3;
IMAD R0, R6, -0x800000, R3 ?trans1;
IADD3 R5, PT, PT, R5, -0x9, R6 ?trans1;
FADD.FTZ R9, -RZ, -UR4 ?WAIT3_END_GROUP;
MUFU.RCP R7, UR4 &wr=0x0 ?trans2;
FFMA R8, R7, R9, 1 &req={0} ?WAIT4_END_GROUP;
FFMA R7, R7, R8, R7 ?WAIT4_END_GROUP;
FFMA R8, R0, R7, RZ ?WAIT4_END_GROUP;
FFMA R3, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R8, R7, R3, R8 ?WAIT4_END_GROUP;
FFMA R9, R9, R8, R0 ?WAIT4_END_GROUP;
FFMA R3, R7, R9, R8 ?WAIT5_END_GROUP;
SHF.R.U32.HI R0, RZ, 0x17, R3 ?WAIT4_END_GROUP;
LOP3.LUT R0, R0, 0xff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R10, PT, PT, R0, R5, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R10, -0x1, RZ ?WAIT5_END_GROUP;
ISETP.GE.U32.AND P0, PT, R0, 0xfe, PT ?WAIT13_END_GROUP;
@!P0 BRA 0xfc0 ?trans5;
ISETP.GT.AND P0, PT, R10, 0xfe, PT ?WAIT13_END_GROUP;
@P0 BRA 0xf90 ?trans5;
ISETP.GE.AND P0, PT, R10, 0x1, PT ?WAIT13_END_GROUP;
@P0 BRA 0xfd0 ?trans5;
ISETP.GE.AND P0, PT, R10, -0x18, PT ?trans1;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT12_END_GROUP;
@!P0 BRA 0xfd0 ?trans5;
FFMA.RZ R0, R7, R9, R8 ?trans1;
IADD3 R6, PT, PT, R10.reuse, 0x20, RZ ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, RZ, PT ?trans1;
ISETP.NE.AND P2, PT, R10, RZ, PT ?trans2;
LOP3.LUT R0, R0, 0x7fffff, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R0, 0x800000, RZ, 0xfc, !PT ?trans1;
FFMA.RP R0, R7.reuse, R9.reuse, R8.reuse ?trans1;
FFMA.RM R7, R7, R9, R8 ?trans1;
IADD3 R8, PT, PT, -R10, RZ, RZ ?trans2;
SHF.L.U32 R6, R5, R6, RZ ?trans2;
FSETP.NEU.FTZ.AND P0, PT, R0, R7, PT ?trans1;
SEL R0, R8, RZ, P2 ?trans2;
ISETP.NE.AND P1, PT, R6, RZ, P1 ?WAIT3_END_GROUP;
SHF.R.U32.HI R0, RZ, R0, R5 ?trans2;
PLOP3.LUT P0, PT, P0, P1, PT, 0xf8, 0x8f ?trans2;
SHF.R.U32.HI R6, RZ, 0x1, R0 ?WAIT3_END_GROUP;
SEL R5, RZ, 0x1, !P0 ?WAIT5_END_GROUP;
LOP3.LUT R5, R5, 0x1, R6, 0xf8, !PT ?WAIT4_END_GROUP;
LOP3.LUT R5, R5, R0, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
IADD3 R6, PT, PT, R6, R5, RZ ?WAIT4_END_GROUP;
LOP3.LUT R3, R6, R3, RZ, 0xfc, !PT ?trans1;
BRA 0xfd0 ?trans6;
LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0xfd0 ?trans6;
IMAD R3, R5, 0x800000, R3 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B2 ?trans5;
BRA 0x1070 ?trans5;
LOP3.LUT R3, R6, 0x80000000, R3, 0x48, !PT ?WAIT4_END_GROUP;
LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ?trans1;
BRA 0x1070 ?trans6;
LOP3.LUT R3, R6, 0x80000000, R3, 0x48, !PT ?trans1;
BRA 0x1070 ?trans6;
MUFU.RSQ R3, -QNAN &wr=0x0 ?trans1;
BRA 0x1070 ?trans5;
FADD.FTZ R3, R0, 720 ?WAIT7_END_GROUP;
BSYNC.RECONVERGENT B0 ?trans5;
HFMA2 R5, -RZ, RZ, 0, 0 ?WAIT4_END_GROUP;
RET.REL.NODEC R4 0x0 &req={0} ?trans5;
BRA 0x10a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: hash_f(float*, int*, float*, int, unsigned long)
_Z6hash_fPfPiS_im:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s4, s[0:1], 0x18
s_load_b64 s[6:7], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_lt_i32 s4, 1
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v1, s4, v[1:2]
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[3:4], 2, v[2:3]
v_ashrrev_i32_e32 v2, 31, v1
v_add_co_u32 v3, vcc_lo, s6, v3
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
s_cbranch_scc1 .LBB1_3
s_ashr_i32 s5, s4, 31
s_delay_alu instid0(VALU_DEP_1)
v_mov_b32_e32 v8, v4
s_add_i32 s6, s4, s5
v_add_nc_u32_e32 v6, v1, v2
s_xor_b32 s5, s6, s5
v_mov_b32_e32 v7, v3
v_cvt_f32_u32_e32 v0, s5
s_sub_i32 s6, 0, s5
v_xor_b32_e32 v6, v6, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_iflag_f32_e32 v0, v0
s_waitcnt_depctr 0xfff
v_mul_f32_e32 v0, 0x4f7ffffe, v0
v_cvt_u32_f32_e32 v0, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v5, s6, v0
v_mul_hi_u32 v5, v0, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_add_nc_u32_e32 v0, v0, v5
v_mul_hi_u32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_lo_u32 v0, v0, s5
v_sub_nc_u32_e32 v0, v6, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
v_cndmask_b32_e32 v0, v0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_subrev_nc_u32_e32 v5, s5, v0
v_cmp_le_u32_e32 vcc_lo, s5, v0
v_cndmask_b32_e32 v0, v0, v5, vcc_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_xor_b32_e32 v0, v0, v2
v_sub_nc_u32_e32 v0, v2, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_dual_mov_b32 v0, 0 :: v_dual_add_nc_u32 v5, v1, v0
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v5, vcc_lo, s0, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
s_mov_b32 s0, s4
.LBB1_2:
global_load_b32 v9, v[5:6], off
global_load_b32 v10, v[7:8], off
v_add_co_u32 v5, vcc_lo, v5, 4
v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
v_add_co_u32 v7, vcc_lo, v7, 4
v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
s_add_i32 s0, s0, -1
s_delay_alu instid0(SALU_CYCLE_1)
s_cmp_lg_u32 s0, 0
s_waitcnt vmcnt(0)
v_fmac_f32_e32 v0, v9, v10
s_cbranch_scc1 .LBB1_2
s_branch .LBB1_4
.LBB1_3:
v_mov_b32_e32 v0, 0
.LBB1_4:
s_ashr_i32 s5, s4, 31
s_waitcnt lgkmcnt(0)
s_lshl_b64 s[0:1], s[4:5], 2
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
v_add_co_u32 v3, vcc_lo, v3, s0
v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
global_load_b32 v3, v[3:4], off
s_waitcnt vmcnt(0)
v_add_f32_e32 v0, v0, v3
v_div_scale_f32 v3, null, 0x44340000, 0x44340000, v0
v_div_scale_f32 v6, vcc_lo, v0, 0x44340000, v0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
v_rcp_f32_e32 v4, v3
s_waitcnt_depctr 0xfff
v_fma_f32 v5, -v3, v4, 1.0
v_fmac_f32_e32 v4, v5, v4
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_mul_f32_e32 v5, v6, v4
v_fma_f32 v7, -v3, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_fmac_f32_e32 v5, v7, v4
v_fma_f32 v3, -v3, v5, v6
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_div_fmas_f32 v3, v3, v4, v5
v_div_fixup_f32 v0, v3, 0x44340000, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_floor_f32_e32 v3, v0
v_lshlrev_b64 v[0:1], 2, v[1:2]
v_cvt_i32_f32_e32 v2, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v0, vcc_lo, s2, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
global_store_b32 v[0:1], v2, off
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| hash_f | 6,695 | 2,354 | stackv2-00000-of-00015 |
// Demangled: initial_count(int*, int*, int, int, int)
Function : _Z13initial_countPiS_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR4, SR_CTAID.X &wr=0x1 ?trans1;
CS2R R30, SRZ ?WAIT7_END_GROUP;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R2, c[0x0][0x390] &wr=0x2 ?trans1;
IMAD R0, R5, UR4, R0 &req={1} ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans3;
IMAD.SHL.U32 R4, R0, 0x40, RZ ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R3 &req={2} ?WAIT3_END_GROUP;
IMAD R11, R4, R3.reuse, R3 ?trans1;
MOV R12, R3 ?WAIT4_END_GROUP;
IADD3 R26, PT, PT, R11, -R2, RZ ?trans1;
IADD.64 R6, R12.reuse, R12 ?trans2;
HFMA2 R2, -RZ, RZ, 0, 0 ?trans2;
IADD.64 R8, R12, R6 ?trans2;
IMAD.SHL.U32 R4, R6.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R5, R6, 0x2, R7 ?trans1;
IADD.64 R10, R12, R8 ?trans2;
LDC.64 R6, c[0x0][0x380] &wr=0x2 ?trans1;
SHF.L.U64.HI R9, R8, 0x2, R9 ?trans1;
IADD.64 R14, R12, R10 ?WAIT2_END_GROUP;
IMAD.SHL.U32 R8, R8, 0x4, RZ ?trans1;
SHF.L.U64.HI R11, R10, 0x2, R11 ?trans1;
IADD.64 R16, R12, R14 ?trans2;
IMAD.SHL.U32 R10, R10, 0x4, RZ ?trans2;
IADD.64 R18, R12, R16 ?trans2;
IMAD.SHL.U32 R12, R14.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R13, R14, 0x2, R15 ?trans1;
IMAD.SHL.U32 R14, R16.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R15, R16, 0x2, R17 ?trans1;
IMAD.SHL.U32 R16, R18.reuse, 0x4, RZ ?trans1;
SHF.L.U64.HI R17, R18, 0x2, R19 &req={1,0} ?WAIT7_END_GROUP;
IMAD.WIDE R18, R26, 0x4, R6 &req={2} ?WAIT5_END_GROUP;
LDG.E R32, desc[UR4][R18.64] &wr=0x2 ?trans1;
IMAD.WIDE R34, R3, 0x4, R18 ?trans1;
IADD.64 R36, R18, R4 ?WAIT4_END_GROUP;
LDG.E R29, desc[UR4][R34.64] &rd=0x0 &wr=0x3 ?trans4;
LDG.E R28, desc[UR4][R36.64] &wr=0x4 ?trans1;
IADD.64 R24, R18.reuse, R10 ?trans2;
IADD.64 R34, R18, R8 &req={0} ?WAIT5_END_GROUP;
LDG.E R24, desc[UR4][R24.64] &wr=0x5 ?trans4;
LDG.E R27, desc[UR4][R34.64] &wr=0x5 ?trans1;
IADD.64 R22, R18.reuse, R12 ?trans2;
IADD.64 R20, R18, R14 ?WAIT5_END_GROUP;
LDG.E R22, desc[UR4][R22.64] &wr=0x5 ?trans4;
LDG.E R20, desc[UR4][R20.64] &rd=0x0 &wr=0x5 ?trans1;
IADD.64 R18, R18, R16 ?WAIT7_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &rd=0x1 &wr=0x5 ?trans1;
IADD3 R33, PT, PT, R30, 0x1, RZ ?trans2;
IADD3 R31, PT, PT, R31, 0x8, RZ ?trans1;
IMAD R26, R3, 0x8, R26 ?trans1;
ISETP.NE.AND P0, PT, R32.reuse, RZ, PT &req={2} ?trans1;
ISETP.NE.AND P1, PT, R32, 0x1, PT ?trans1;
ISETP.NE.AND P2, PT, R29.reuse, 0x1, PT &req={3} ?trans1;
ISETP.NE.AND P3, PT, R29, RZ, PT ?trans1;
IADD3 R32, PT, PT, R2, 0x1, RZ ?WAIT9_END_GROUP;
@P0 IADD3 R33, PT, PT, R30, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R28, 0x1, PT &req={4} ?trans1;
@P1 IADD3 R32, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R28, RZ, PT ?trans1;
IADD3 R21, PT, PT, R33.reuse, 0x1, RZ &req={0} ?trans2;
IADD3 R2, PT, PT, R32.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R32, RZ, RZ ?trans2;
@P3 IADD3 R21, PT, PT, R33, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R27.reuse, 0x1, PT &req={5} ?trans1;
ISETP.NE.AND P3, PT, R27, RZ, PT ?trans1;
IADD3 R19, PT, PT, R2, 0x1, RZ &req={1} ?WAIT2_END_GROUP;
@P0 IADD3 R19, PT, PT, R2, RZ, RZ ?trans2;
IADD3 R23, PT, PT, R21.reuse, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R24, RZ, PT ?trans1;
@P1 IADD3 R23, PT, PT, R21, RZ, RZ ?trans2;
IADD3 R2, PT, PT, R19, 0x1, RZ ?trans2;
IADD3 R21, PT, PT, R23, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R19, RZ, RZ ?WAIT2_END_GROUP;
@P3 IADD3 R21, PT, PT, R23, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R22, RZ, PT ?trans1;
ISETP.NE.AND P1, PT, R24, 0x1, PT ?trans2;
IADD3 R23, PT, PT, R21.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R23, PT, PT, R21, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R20, RZ, PT ?trans1;
ISETP.NE.AND P3, PT, R22, 0x1, PT ?trans1;
IADD3 R19, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R21, PT, PT, R23, 0x1, RZ ?WAIT3_END_GROUP;
@P2 IADD3 R21, PT, PT, R23, RZ, RZ ?trans2;
@P1 IADD3 R19, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R20, 0x1, PT ?trans1;
IADD3 R20, PT, PT, R21.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R20, PT, PT, R21, RZ, RZ ?trans2;
IADD3 R2, PT, PT, R19, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R31, 0x40, PT ?trans1;
@P3 IADD3 R2, PT, PT, R19, RZ, RZ ?trans1;
ISETP.NE.AND P3, PT, R18.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P2, PT, R18, RZ, PT ?WAIT2_END_GROUP;
IADD3 R19, PT, PT, R2.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R19, PT, PT, R2, RZ, RZ ?trans2;
IADD3 R30, PT, PT, R20, 0x1, RZ ?trans2;
IADD3 R2, PT, PT, R19, 0x1, RZ ?WAIT4_END_GROUP;
@P3 IADD3 R2, PT, PT, R19, RZ, RZ ?trans2;
@P2 IADD3 R30, PT, PT, R20, RZ, RZ ?trans1;
@P0 BRA 0x210 ?trans6;
LDC.64 R4, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R3, PT, PT, R0, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R4, R3, 0x4, R4 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R4.64+0x8], R30 ?trans4;
STG.E desc[UR4][R4.64+0xc], R2 ?trans1;
EXIT ?trans5;
BRA 0x6b0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initial_count(int*, int*, int, int, int)
_Z13initial_countPiS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x0
v_mov_b32_e32 v1, 0
v_mul_lo_u32 v0, v2, s5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshl_add_u32 v0, v0, 6, s5
v_subrev_nc_u32_e32 v3, s4, v0
v_mov_b32_e32 v0, 0
s_mov_b32 s4, 64
.LBB2_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v4, 31, v3
s_mov_b32 s6, exec_lo
v_lshlrev_b64 v[4:5], 2, v[3:4]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v4, vcc_lo, s0, v4
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
global_load_b32 v4, v[4:5], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v4
s_xor_b32 s6, exec_lo, s6
s_cbranch_execz .LBB2_5
s_mov_b32 s7, exec_lo
v_cmpx_eq_u32_e32 1, v4
v_add_nc_u32_e32 v1, 1, v1
s_or_b32 exec_lo, exec_lo, s7
.LBB2_5:
s_and_not1_saveexec_b32 s6, s6
s_cbranch_execz .LBB2_9
s_mov_b32 s7, exec_lo
v_cmpx_eq_u32_e32 0, v4
v_add_nc_u32_e32 v0, 1, v0
s_or_b32 exec_lo, exec_lo, s7
.LBB2_9:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s6
v_add_nc_u32_e32 v3, s5, v3
s_add_i32 s4, s4, -1
s_cmp_eq_u32 s4, 0
s_cbranch_scc0 .LBB2_1
v_lshlrev_b32_e32 v2, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b64 v[2:3], v[0:1], off offset:8
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initial_count | 2,820 | 1,036 | stackv2-00000-of-00015 |
// Demangled: initialize_sorting(int*, int*, int*, int, int, int)
Function : _Z18initialize_sortingPiS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R5, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R4, c[0x0][0x3a0] &wr=0x3 ?trans8;
LDC.64 R2, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R0, R5, UR6, R0 &req={1} ?WAIT7_END_GROUP;
LDC.64 R18, c[0x0][0x398] &wr=0x1 ?trans1;
IADD3 R7, PT, PT, R0, R0, RZ ?trans2;
IADD3 R5, PT, PT, R4, R4, RZ &req={3} ?WAIT5_END_GROUP;
LDC R13, c[0x0][0x39c] &wr=0x3 ?trans1;
IMAD.WIDE R4, R5, 0x4, R2 &req={4} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x4 ?trans1;
IMAD.WIDE R2, R7, 0x4, R2 ?trans1;
LDG.E R4, desc[UR4][R4.64] &req={2} &rd=0x1 &wr=0x2 ?trans6;
LDC.64 R6, c[0x0][0x380] &wr=0x0 ?trans1;
LDG.E R15, desc[UR4][R2.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR4][R2.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.SHL.U32 R12, R0, 0x40, RZ ?WAIT2_END_GROUP;
HFMA2 R10, -RZ, RZ, 0, 4.17232513427734375e-07 ?trans1;
SHF.R.S32.HI R5, RZ, 0x1f, R19.reuse &req={1} ?trans1;
IMAD R17, R12.reuse, R19, R19 ?trans1;
IADD3 R12, PT, PT, R12, 0x3, RZ ?WAIT4_END_GROUP;
IADD3 R0, PT, PT, R17, -R18, RZ ?trans2;
IADD3 R15, PT, PT, R15, R4, RZ &req={2} ?trans1;
MOV R4, R19 &req={4,3,0} ?WAIT7_END_GROUP;
IMAD.WIDE R2, R0, 0x4, R6 &req={3,2} ?WAIT5_END_GROUP;
LDG.E R14, desc[UR4][R2.64] &wr=0x2 ?trans1;
IADD3 R10, PT, PT, R10, 0x8, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x2d0 ?trans1;
IADD3 R19, PT, PT, R12, -0x3, RZ &req={1,0} ?WAIT3_END_GROUP;
ISETP.NE.AND P0, PT, R10, 0x47, PT ?trans1;
ISETP.NE.AND P1, PT, R14, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x290 ?trans5;
ISETP.NE.AND P1, PT, R14, RZ, PT ?WAIT13_END_GROUP;
@P1 BRA 0x2c0 ?trans5;
IMAD.WIDE R16, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R19 &rd=0x0 ?trans1;
BRA 0x2c0 ?trans5;
IMAD.WIDE R16, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R19 &rd=0x1 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IMAD.WIDE R16, R13, 0x4, R2 &req={1,0} ?WAIT6_END_GROUP;
LDG.E R16, desc[UR4][R16.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x3d0 ?trans1;
IADD3 R19, PT, PT, R12, -0x2, RZ ?trans1;
ISETP.NE.AND P1, PT, R16, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x390 ?trans5;
ISETP.NE.AND P1, PT, R16, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x3c0 ?trans5;
IMAD.WIDE R16, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R19 &rd=0x1 ?trans1;
BRA 0x3c0 ?trans5;
IMAD.WIDE R16, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R19 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R4 &req={1,0} ?WAIT5_END_GROUP;
LEA R18, P1, R16, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x4f0 ?trans1;
IADD3 R21, PT, PT, R12, -0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x4b0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x4e0 ?trans5;
IMAD.WIDE R18, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans1;
BRA 0x4e0 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16, R2, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x610 ?trans1;
IADD3 R14, PT, PT, R12, 0x4, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x5d0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x600 ?trans5;
IMAD.WIDE R18, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R12 &rd=0x1 ?trans1;
BRA 0x600 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R12 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16, R2, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x730 ?trans1;
IADD3 R21, PT, PT, R12, 0x1, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x6f0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x720 ?trans5;
IMAD.WIDE R18, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans1;
BRA 0x720 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16, R2, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x850 ?trans1;
IADD3 R21, PT, PT, R12, 0x2, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x810 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x840 ?trans5;
IMAD.WIDE R18, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans1;
BRA 0x840 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R18, P1, R16, R2, 0x2 &req={1,0} ?WAIT4_END_GROUP;
LEA.HI.X R19, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x970 ?trans1;
IADD3 R21, PT, PT, R12, 0x3, RZ ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x930 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x960 ?trans5;
IMAD.WIDE R18, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans1;
BRA 0x960 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD.64 R16, R4, R16 ?WAIT5_END_GROUP;
LEA R2, P1, R16, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R3, R16, R3, R17, 0x2, P1 ?WAIT5_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0xa80 ?trans1;
ISETP.NE.AND P1, PT, R2, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0xa40 ?trans5;
ISETP.NE.AND P1, PT, R2, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0xa70 ?trans5;
IMAD.WIDE R2, R15.reuse, 0x4, R8 ?trans1;
IADD3 R15, PT, PT, R15, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R2.64], R14 &rd=0x3 ?trans1;
BRA 0xa70 ?trans5;
IMAD.WIDE R2, R11.reuse, 0x4, R8 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R2.64], R14 &rd=0x2 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R12, PT, PT, R12, 0x8, RZ ?trans1;
IMAD R0, R13, 0x8, R0 ?trans1;
@P0 BRA 0x1b0 ?trans6;
EXIT ?trans5;
BRA 0xac0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: initialize_sorting(int*, int*, int*, int, int, int)
_Z18initialize_sortingPiS_S_iii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[8:9], s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
s_mul_i32 s15, s15, s2
s_load_b128 s[0:3], s[0:1], 0x18
v_add_nc_u32_e32 v3, s15, v0
v_lshlrev_b32_e32 v0, 6, v0
v_lshlrev_b32_e32 v1, 1, v3
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshl_add_u32 v0, s15, 6, v0
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[1:2], 2, v[1:2]
s_waitcnt lgkmcnt(0)
s_lshl_b32 s2, s2, 1
v_mul_lo_u32 v3, v3, s1
v_add_co_u32 v1, vcc_lo, s6, v1
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
s_ashr_i32 s3, s2, 31
s_lshl_b64 s[2:3], s[2:3], 2
global_load_b64 v[1:2], v[1:2], off
s_add_u32 s2, s6, s2
s_addc_u32 s3, s7, s3
v_lshl_add_u32 v4, v3, 6, s1
s_load_b32 s2, s[2:3], 0x0
s_delay_alu instid0(VALU_DEP_1)
v_subrev_nc_u32_e32 v5, s0, v4
s_mov_b32 s0, 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v3, s2, v2
.LBB4_1:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v6, 31, v5
s_mov_b32 s2, exec_lo
v_lshlrev_b64 v[6:7], 2, v[5:6]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v6, vcc_lo, s4, v6
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v2, v[6:7], off
v_add_nc_u32_e32 v6, s0, v0
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v2
s_xor_b32 s2, exec_lo, s2
s_cbranch_execz .LBB4_5
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 1, v2
s_cbranch_execz .LBB4_4
v_ashrrev_i32_e32 v4, 31, v3
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[3:4]
v_add_nc_u32_e32 v3, 1, v3
v_add_co_u32 v7, vcc_lo, s8, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
global_store_b32 v[7:8], v6, off
.LBB4_4:
s_or_b32 exec_lo, exec_lo, s3
.LBB4_5:
s_and_not1_saveexec_b32 s2, s2
s_cbranch_execz .LBB4_9
s_mov_b32 s3, exec_lo
v_cmpx_eq_u32_e32 0, v2
s_cbranch_execz .LBB4_8
v_ashrrev_i32_e32 v2, 31, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[1:2]
v_add_nc_u32_e32 v1, 1, v1
v_add_co_u32 v7, vcc_lo, s8, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
global_store_b32 v[7:8], v6, off
.LBB4_8:
s_or_b32 exec_lo, exec_lo, s3
.LBB4_9:
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s2
v_add_nc_u32_e32 v5, s1, v5
s_add_i32 s0, s0, 1
s_cmp_eq_u32 s0, 64
s_cbranch_scc0 .LBB4_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| initialize_sorting | 4,340 | 1,599 | stackv2-00000-of-00015 |
// Demangled: lsd_count(int*, int*, int*, int, int, int)
Function : _Z9lsd_countPiS_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R0, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R3, c[0x0][0x360] &wr=0x1 ?trans8;
LDC.64 R16, c[0x0][0x390] &wr=0x3 ?trans8;
LDC.64 R18, c[0x0][0x398] &wr=0x4 ?trans1;
IMAD R0, R3, UR6, R0 &req={1} ?WAIT7_END_GROUP;
LDC.64 R20, c[0x0][0x380] &wr=0x1 ?trans1;
IMAD.SHL.U32 R5, R0, 0x40, RZ ?trans1;
IADD.64 R16, R16, 0x8 &req={3} ?WAIT6_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R6, desc[UR4][R2.64+-0x4] &req={2} &wr=0x4 ?trans4;
LDG.E R4, desc[UR4][R2.64+-0x8] &wr=0x2 ?trans4;
LDG.E R10, desc[UR4][R2.64] &wr=0x3 ?trans4;
LDG.E R12, desc[UR4][R2.64+0x4] &rd=0x5 &wr=0x5 ?trans1;
IMAD R7, R6, R19, R19 &req={4} ?WAIT5_END_GROUP;
IADD3 R9, PT, PT, R7, -R18.reuse, RZ ?trans1;
IMAD R7, R4, R19.reuse, R19.reuse &req={2} ?trans2;
IMAD R11, R10, R19, R19 &req={3} ?trans2;
IMAD.WIDE R8, R9, 0x4, R20 &req={1} ?trans1;
IADD3 R7, PT, PT, R7, -R18.reuse, RZ ?trans2;
IADD3 R3, PT, PT, R11, -R18, RZ &req={5} ?WAIT3_END_GROUP;
LDG.E R8, desc[UR4][R8.64] &wr=0x2 ?trans1;
IMAD.WIDE R6, R7, 0x4, R20 ?WAIT4_END_GROUP;
IMAD R11, R12, R19, R19 ?trans2;
LDG.E R6, desc[UR4][R6.64] &rd=0x1 &wr=0x3 ?trans1;
IMAD.WIDE R2, R3, 0x4, R20 ?trans2;
IADD3 R11, PT, PT, R11, -R18, RZ ?WAIT4_END_GROUP;
LDG.E R3, desc[UR4][R2.64] &rd=0x4 &wr=0x5 ?trans1;
IMAD.WIDE R10, R11, 0x4, R20 ?WAIT6_END_GROUP;
LDG.E R10, desc[UR4][R10.64] &wr=0x5 ?trans1;
HFMA2 R4, -RZ, RZ, 0, 1.1920928955078125e-07 ?trans1;
IADD3 R5, PT, PT, R5, 0x4, RZ ?trans1;
ISETP.NE.AND P3, PT, R8.reuse, RZ, PT &req={2} ?trans1;
ISETP.NE.AND P4, PT, R8, 0x1, PT ?WAIT4_END_GROUP;
SEL R7, RZ, 0x1, P3 &req={1} ?trans1;
SEL R2, RZ, 0x1, P4 &req={4} ?trans1;
ISETP.NE.AND P0, PT, R6.reuse, 0x1, PT &req={3} ?trans1;
ISETP.NE.AND P1, PT, R6, RZ, PT ?trans1;
MOV R6, 0x2 ?WAIT4_END_GROUP;
@P3 IADD3 R6, PT, PT, RZ, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R3.reuse, 0x1, PT &req={5} ?trans1;
ISETP.NE.AND P3, PT, R3, RZ, PT ?trans1;
@P4 IADD3 R4, PT, PT, RZ, 0x1, RZ ?trans1;
HFMA2 R3, -RZ, RZ, 0, 2.384185791015625e-07 ?WAIT3_END_GROUP;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R6, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R10.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R10, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R6, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
@P3 IADD3 R7, PT, PT, R6, RZ, RZ ?WAIT2_END_GROUP;
IADD3 R4, PT, PT, R2.reuse, 0x1, RZ ?trans2;
IADD3 R33, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P0 IADD3 R33, PT, PT, R7, RZ, RZ &req={0} ?WAIT7_END_GROUP;
IMAD.WIDE R22, R5, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R37, desc[UR4][R22.64+-0x8] &wr=0x2 ?trans4;
LDG.E R2, desc[UR4][R22.64+-0x4] &wr=0x3 ?trans4;
LDG.E R32, desc[UR4][R22.64] &wr=0x4 ?trans1;
IADD3 R25, PT, PT, R5, 0x4, RZ ?WAIT3_END_GROUP;
LDG.E R31, desc[UR4][R22.64+0x4] &rd=0x0 &wr=0x5 ?trans2;
IMAD.WIDE R24, R25, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R30, desc[UR4][R24.64+-0x8] &wr=0x5 ?trans4;
LDG.E R15, desc[UR4][R24.64+-0x4] &wr=0x5 ?trans4;
LDG.E R13, desc[UR4][R24.64] &wr=0x5 ?trans1;
IADD3 R27, PT, PT, R5, 0x8, RZ ?WAIT3_END_GROUP;
LDG.E R11, desc[UR4][R24.64+0x4] &rd=0x1 &wr=0x5 ?trans2;
IMAD.WIDE R26, R27, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R9, desc[UR4][R26.64+-0x8] &wr=0x5 ?trans4;
LDG.E R7, desc[UR4][R26.64+-0x4] &wr=0x5 ?trans4;
LDG.E R34, desc[UR4][R26.64] &wr=0x5 ?trans1;
IADD3 R23, PT, PT, R5, 0xc, RZ &req={0} ?WAIT3_END_GROUP;
LDG.E R29, desc[UR4][R26.64+0x4] &rd=0x0 &wr=0x5 ?trans2;
IMAD.WIDE R22, R23, 0x4, R16 ?WAIT5_END_GROUP;
LDG.E R28, desc[UR4][R22.64+-0x8] &wr=0x5 ?trans4;
LDG.E R35, desc[UR4][R22.64+-0x4] &wr=0x5 ?trans1;
IADD3 R25, PT, PT, R5, 0x10, RZ &req={1} ?WAIT3_END_GROUP;
LDG.E R36, desc[UR4][R22.64] &wr=0x5 ?trans2;
IMAD.WIDE R24, R25, 0x4, R16 ?trans2;
LDG.E R14, desc[UR4][R22.64+0x4] &rd=0x1 &wr=0x5 ?trans4;
LDG.E R12, desc[UR4][R24.64+-0x8] &wr=0x5 ?trans4;
LDG.E R10, desc[UR4][R24.64+-0x4] &wr=0x5 ?trans4;
LDG.E R8, desc[UR4][R24.64] &wr=0x5 ?trans4;
LDG.E R6, desc[UR4][R24.64+0x4] &rd=0x0 &wr=0x5 ?trans1;
IMAD R37, R37, R19, R19 &req={2} ?WAIT5_END_GROUP;
IADD3 R27, PT, PT, R37, -R18, RZ &req={0} ?trans1;
IMAD R37, R2, R19, R19 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R26, R27, 0x4, R20 ?trans1;
IADD3 R23, PT, PT, R37, -R18, RZ &req={1} ?WAIT3_END_GROUP;
IMAD R37, R32, R19, R19 &req={4} ?trans1;
LDG.E R2, desc[UR4][R26.64] &rd=0x0 &wr=0x2 ?trans1;
IMAD.WIDE R22, R23, 0x4, R20 ?WAIT3_END_GROUP;
IADD3 R37, PT, PT, R37, -R18, RZ ?trans2;
LDG.E R32, desc[UR4][R22.64] &rd=0x1 &wr=0x3 ?trans3;
IMAD.WIDE R24, R37, 0x4, R20 ?WAIT4_END_GROUP;
IMAD R37, R31, R19.reuse, R19.reuse &req={5} ?trans2;
IMAD R30, R30, R19, R19 ?trans1;
LDG.E R31, desc[UR4][R24.64] &wr=0x4 ?trans2;
IADD3 R37, PT, PT, R37, -R18.reuse, RZ ?trans2;
IADD3 R27, PT, PT, R30, -R18, RZ &req={0} ?WAIT3_END_GROUP;
IMAD.WIDE R22, R37, 0x4, R20 &req={1} ?WAIT4_END_GROUP;
IMAD R37, R15, R19, R19 ?trans1;
LDG.E R30, desc[UR4][R22.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R26, R27, 0x4, R20 ?WAIT3_END_GROUP;
IADD3 R37, PT, PT, R37, -R18.reuse, RZ ?trans1;
IMAD R13, R13, R19, R19 ?trans1;
LDG.E R15, desc[UR4][R26.64] &wr=0x5 ?trans3;
IMAD.WIDE R22, R37, 0x4, R20 &req={0} ?trans1;
IADD3 R25, PT, PT, R13, -R18, RZ ?WAIT3_END_GROUP;
IMAD R37, R11, R19, R19 ?trans1;
LDG.E R13, desc[UR4][R22.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x4, R20 ?WAIT3_END_GROUP;
IADD3 R37, PT, PT, R37, -R18.reuse, RZ ?trans1;
IMAD R9, R9, R19, R19 ?trans1;
LDG.E R11, desc[UR4][R24.64] &wr=0x5 ?trans3;
IMAD.WIDE R22, R37, 0x4, R20 &req={0} ?trans1;
IADD3 R27, PT, PT, R9, -R18, RZ ?WAIT3_END_GROUP;
IMAD R37, R7, R19, R19 ?trans1;
LDG.E R9, desc[UR4][R22.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R26, R27, 0x4, R20 ?WAIT3_END_GROUP;
IADD3 R37, PT, PT, R37, -R18.reuse, RZ ?trans1;
IMAD R34, R34, R19.reuse, R19.reuse ?trans1;
LDG.E R7, desc[UR4][R26.64] &rd=0x1 &wr=0x5 ?trans1;
IMAD R29, R29, R19, R19 ?trans2;
IMAD.WIDE R22, R37, 0x4, R20.reuse &req={0} ?trans1;
IADD3 R25, PT, PT, R34, -R18.reuse, RZ ?trans2;
IADD3 R29, PT, PT, R29, -R18, RZ ?trans2;
LDG.E R34, desc[UR4][R22.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R24, R25, 0x4, R20 ?WAIT4_END_GROUP;
IMAD R28, R28, R19, R19 ?trans1;
LDG.E R37, desc[UR4][R24.64] &rd=0x0 &wr=0x5 ?trans1;
IMAD.WIDE R26, R29, 0x4, R20 &req={1} ?WAIT3_END_GROUP;
IADD3 R29, PT, PT, R28, -R18.reuse, RZ ?trans1;
IMAD R23, R35, R19, R19 &req={0} ?trans2;
LDG.E R26, desc[UR4][R26.64] &rd=0x0 &wr=0x5 ?trans2;
IMAD.WIDE R28, R29, 0x4, R20 ?trans1;
IADD3 R23, PT, PT, R23, -R18, RZ ?WAIT3_END_GROUP;
IMAD R36, R36, R19, R19 ?trans1;
LDG.E R35, desc[UR4][R28.64] &wr=0x5 ?trans1;
IMAD.WIDE R22, R23, 0x4, R20 ?WAIT3_END_GROUP;
IADD3 R25, PT, PT, R36, -R18, RZ ?trans2;
LDG.E R36, desc[UR4][R22.64] &rd=0x1 &wr=0x5 ?trans1;
IMAD R27, R12, R19, R19 &req={0} ?trans2;
IMAD.WIDE R24, R25, 0x4, R20 ?WAIT4_END_GROUP;
IMAD R23, R14, R19, R19 &req={1} ?trans1;
IADD3 R27, PT, PT, R27, -R18.reuse, RZ ?trans1;
LDG.E R14, desc[UR4][R24.64] &rd=0x0 &wr=0x5 ?trans3;
IADD3 R23, PT, PT, R23, -R18, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R28, R23, 0x4, R20 ?WAIT4_END_GROUP;
IMAD.WIDE R22, R27, 0x4, R20 ?trans2;
LDG.E R28, desc[UR4][R28.64] &wr=0x5 ?trans2;
IMAD R27, R10, R19.reuse, R19.reuse ?trans2;
IMAD R8, R8, R19, R19 ?trans1;
LDG.E R10, desc[UR4][R22.64] &rd=0x1 &wr=0x5 ?trans2;
IADD3 R27, PT, PT, R27, -R18.reuse, RZ ?trans2;
IADD3 R25, PT, PT, R8, -R18, RZ &req={0} ?WAIT3_END_GROUP;
IMAD.WIDE R22, R27, 0x4, R20 &req={1} ?WAIT4_END_GROUP;
IMAD.WIDE R24, R25, 0x4, R20 ?trans1;
LDG.E R8, desc[UR4][R22.64] &wr=0x5 ?trans3;
IMAD R27, R6, R19, R19 ?trans2;
LDG.E R6, desc[UR4][R24.64] &rd=0x0 &wr=0x5 ?trans3;
IADD3 R27, PT, PT, R27, -R18, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R24, R27, 0x4, R20 &req={0} ?WAIT5_END_GROUP;
LDG.E R12, desc[UR4][R24.64] &wr=0x5 ?trans1;
IADD3 R27, PT, PT, R33, 0x1, RZ ?trans2;
IADD3 R3, PT, PT, R3, 0x14, RZ ?trans2;
IADD3 R5, PT, PT, R5, 0x14, RZ ?trans1;
ISETP.NE.AND P2, PT, R2.reuse, RZ, PT &req={2} ?trans1;
ISETP.NE.AND P3, PT, R2, 0x1, PT ?trans1;
IADD3 R2, PT, PT, R4, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R32.reuse, 0x1, PT &req={3} ?trans1;
ISETP.NE.AND P1, PT, R32, RZ, PT ?WAIT9_END_GROUP;
@P2 IADD3 R27, PT, PT, R33, RZ, RZ ?trans2;
@P3 IADD3 R2, PT, PT, R4, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R31.reuse, 0x1, PT &req={4} ?trans1;
ISETP.NE.AND P3, PT, R31, RZ, PT ?trans1;
IADD3 R22, PT, PT, R27.reuse, 0x1, RZ ?trans2;
IADD3 R4, PT, PT, R2.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R22, PT, PT, R27, RZ, RZ ?WAIT2_END_GROUP;
IADD3 R2, PT, PT, R4, 0x1, RZ ?trans2;
IADD3 R23, PT, PT, R22, 0x1, RZ ?trans1;
ISETP.NE.AND P0, PT, R30.reuse, 0x1, PT &req={5} ?trans1;
ISETP.NE.AND P1, PT, R30, RZ, PT ?trans1;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
@P3 IADD3 R23, PT, PT, R22, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R15.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P3, PT, R15, RZ, PT ?trans1;
IADD3 R4, PT, PT, R2, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R22, PT, PT, R23, 0x1, RZ ?WAIT4_END_GROUP;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R22, PT, PT, R23, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R13.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P1, PT, R13, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
IADD3 R15, PT, PT, R22.reuse, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R11.reuse, 0x1, PT ?trans1;
@P3 IADD3 R15, PT, PT, R22, RZ, RZ ?trans1;
ISETP.NE.AND P3, PT, R11, RZ, PT ?trans1;
IADD3 R4, PT, PT, R2, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R13, PT, PT, R15.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R13, PT, PT, R15, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R9.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P1, PT, R9, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
IADD3 R11, PT, PT, R13, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R7, 0x1, PT ?trans1;
@P3 IADD3 R11, PT, PT, R13, RZ, RZ ?trans1;
ISETP.NE.AND P3, PT, R7, RZ, PT ?trans1;
IADD3 R4, PT, PT, R2, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R9, PT, PT, R11.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R9, PT, PT, R11, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R34.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P1, PT, R34, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
IADD3 R7, PT, PT, R9, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R37, 0x1, PT ?trans1;
@P3 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P3, PT, R37, RZ, PT ?trans1;
IADD3 R4, PT, PT, R2, 0x1, RZ ?WAIT2_END_GROUP;
IADD3 R9, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@P0 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P1 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R26.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R26, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R35, 0x1, PT ?trans1;
IADD3 R7, PT, PT, R9, 0x1, RZ ?WAIT2_END_GROUP;
@P3 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P3, PT, R35, RZ, PT ?trans1;
IADD3 R4, PT, PT, R2.reuse, 0x1, RZ ?trans2;
IADD3 R9, PT, PT, R7.reuse, 0x1, RZ ?trans2;
@P1 IADD3 R4, PT, PT, R2, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R36.reuse, 0x1, PT ?trans1;
@P0 IADD3 R9, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P0, PT, R36, RZ, PT ?trans1;
IADD3 R2, PT, PT, R4, 0x1, RZ ?WAIT2_END_GROUP;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans2;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R7, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R14, 0x1, PT ?trans1;
IADD3 R4, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R14, RZ, PT ?trans1;
IADD3 R9, PT, PT, R7, 0x1, RZ ?trans2;
@P1 IADD3 R4, PT, PT, R2, RZ, RZ ?WAIT2_END_GROUP;
@P0 IADD3 R9, PT, PT, R7, RZ, RZ ?trans2;
IADD3 R2, PT, PT, R4.reuse, 0x1, RZ ?trans2;
IADD3 R7, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R4, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R28.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R28, RZ, PT ?trans1;
@P3 IADD3 R7, PT, PT, R9, RZ, RZ ?trans2;
IADD3 R9, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R10.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P3, PT, R10, RZ, PT ?trans1;
IADD3 R11, PT, PT, R7, 0x1, RZ ?WAIT6_END_GROUP;
@P1 IADD3 R9, PT, PT, R2, RZ, RZ ?trans2;
@P0 IADD3 R11, PT, PT, R7, RZ, RZ ?trans2;
IADD3 R2, PT, PT, R9.reuse, 0x1, RZ ?trans2;
@P2 IADD3 R2, PT, PT, R9, RZ, RZ ?trans1;
ISETP.NE.AND P1, PT, R8.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R8, RZ, PT ?trans1;
IADD3 R4, PT, PT, R11.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R4, PT, PT, R11, RZ, RZ ?WAIT2_END_GROUP;
IADD3 R7, PT, PT, R2, 0x1, RZ ?trans1;
ISETP.NE.AND P2, PT, R6.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P3, PT, R6, RZ, PT ?trans1;
IADD3 R8, PT, PT, R4, 0x1, RZ ?WAIT4_END_GROUP;
@P1 IADD3 R7, PT, PT, R2, RZ, RZ ?trans2;
@P0 IADD3 R8, PT, PT, R4, RZ, RZ ?trans2;
IADD3 R2, PT, PT, R7, 0x1, RZ ?WAIT3_END_GROUP;
@P2 IADD3 R2, PT, PT, R7, RZ, RZ ?trans1;
ISETP.NE.AND P2, PT, R3, 0x40, PT ?trans1;
ISETP.NE.AND P1, PT, R12.reuse, 0x1, PT ?trans1;
ISETP.NE.AND P0, PT, R12, RZ, PT ?trans1;
IADD3 R6, PT, PT, R8.reuse, 0x1, RZ ?trans2;
@P3 IADD3 R6, PT, PT, R8, RZ, RZ ?trans2;
IADD3 R4, PT, PT, R2, 0x1, RZ ?trans2;
IADD3 R33, PT, PT, R6, 0x1, RZ ?WAIT5_END_GROUP;
@P1 IADD3 R4, PT, PT, R2, RZ, RZ ?trans2;
@P0 IADD3 R33, PT, PT, R6, RZ, RZ ?trans1;
@P2 BRA 0x3a0 ?trans6;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
IADD3 R5, PT, PT, R0, R0, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R2, R5, 0x4, R2 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR4][R2.64+0x8], R33 ?trans4;
STG.E desc[UR4][R2.64+0xc], R4 ?trans1;
EXIT ?trans5;
BRA 0x1290;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: lsd_count(int*, int*, int*, int, int, int)
_Z9lsd_countPiS_S_iii:
s_load_b32 s2, s[0:1], 0x34
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_load_b256 s[0:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 6, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v1, 31, v0
v_lshlrev_b64 v[3:4], 2, v[0:1]
v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, 0
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v3, vcc_lo, s4, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
s_mov_b64 s[4:5], 0
.LBB3_1:
s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
v_add_co_u32 v5, vcc_lo, v3, s4
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
s_mov_b32 s8, s7
global_load_b32 v7, v[5:6], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[5:6], null, s7, v7, s[8:9]
s_mov_b32 s8, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v5, s6, v5
v_ashrrev_i32_e32 v6, 31, v5
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[5:6], 2, v[5:6]
v_add_co_u32 v5, vcc_lo, s0, v5
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
global_load_b32 v5, v[5:6], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v5
s_xor_b32 s8, exec_lo, s8
s_cbranch_execz .LBB3_5
s_mov_b32 s9, exec_lo
v_cmpx_eq_u32_e32 1, v5
v_add_nc_u32_e32 v1, 1, v1
s_or_b32 exec_lo, exec_lo, s9
.LBB3_5:
s_and_not1_saveexec_b32 s8, s8
s_cbranch_execz .LBB3_9
s_mov_b32 s9, exec_lo
v_cmpx_eq_u32_e32 0, v5
v_add_nc_u32_e32 v0, 1, v0
s_or_b32 exec_lo, exec_lo, s9
.LBB3_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s8
s_add_u32 s4, s4, 4
s_addc_u32 s5, s5, 0
s_cmpk_eq_i32 s4, 0x100
s_cbranch_scc0 .LBB3_1
v_lshlrev_b32_e32 v2, 1, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_ashrrev_i32_e32 v3, 31, v2
v_lshlrev_b64 v[2:3], 2, v[2:3]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
v_add_co_u32 v2, vcc_lo, s2, v2
v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
global_store_b64 v[2:3], v[0:1], off offset:8
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| lsd_count | 8,087 | 1,260 | stackv2-00000-of-00015 |
// Demangled: radix_sort(int*, int*, int*, int*, int, int, int)
Function : _Z10radix_sortPiS_S_S_iii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R15, SR_TID.X &wr=0x1 ?trans7;
S2UR UR6, SR_CTAID.X &wr=0x1 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x2 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x1 ?trans8;
LDC R19, c[0x0][0x3a8] &wr=0x3 ?trans8;
LDC.64 R16, c[0x0][0x388] &wr=0x4 ?trans1;
IMAD R15, R0, UR6, R15 &req={1} ?WAIT7_END_GROUP;
LDC.64 R8, c[0x0][0x390] &wr=0x1 ?trans1;
IADD3 R3, PT, PT, R15, R15, RZ ?trans2;
IADD3 R19, PT, PT, R19, R19, RZ &req={3} ?WAIT5_END_GROUP;
LDC.64 R4, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R18, R19, 0x4, R16 &req={4} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x3a0] &wr=0x4 ?trans1;
IMAD.WIDE R16, R3, 0x4, R16 ?trans1;
LDG.E R18, desc[UR4][R18.64] &req={2} &wr=0x2 ?trans6;
LDC.64 R2, c[0x0][0x398] &wr=0x0 ?trans1;
LDG.E R13, desc[UR4][R16.64+0x4] &wr=0x2 ?trans4;
LDG.E R11, desc[UR4][R16.64] &rd=0x0 &wr=0x5 ?trans1;
HFMA2 R0, -RZ, RZ, 0, 0 ?trans1;
IADD.64 R8, R8, 0x8 &req={1} ?WAIT2_END_GROUP;
IMAD.SHL.U32 R15, R15, 0x40, RZ ?trans1;
IADD3 R13, PT, PT, R13, R18, RZ &req={4,3,2,0} ?WAIT7_END_GROUP;
IMAD.WIDE R16, R15, 0x4, R8 &req={1,0} ?WAIT5_END_GROUP;
LDG.E R21, desc[UR4][R16.64+-0x8] &wr=0x2 ?trans2;
IMAD R19, R21, R7, R7 &req={2} ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, -R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
IADD3 R0, PT, PT, R0, 0x4, RZ ?trans1;
BSSY.RECONVERGENT B0, 0x2c0 ?trans4;
ISETP.NE.AND P0, PT, R0, 0x40, PT ?trans1;
ISETP.NE.AND P1, PT, R18, 0x1, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x280 ?trans5;
ISETP.NE.AND P1, PT, R18, RZ, PT ?WAIT13_END_GROUP;
@P1 BRA 0x2b0 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R2 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans1;
BRA 0x2b0 ?trans5;
IMAD.WIDE R18, R13.reuse, 0x4, R2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R21, desc[UR4][R16.64+-0x4] &req={1,0} &wr=0x2 ?trans2;
IMAD R19, R21, R7, R7 &req={2} ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, -R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x3e0 ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x3a0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x3d0 ?trans5;
IMAD.WIDE R18, R13.reuse, 0x4, R2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans1;
BRA 0x3d0 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R2 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R21, desc[UR4][R16.64] &req={1,0} &wr=0x2 ?trans2;
IMAD R19, R21, R7, R7 &req={2} ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, -R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x500 ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x4c0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x4f0 ?trans5;
IMAD.WIDE R18, R13.reuse, 0x4, R2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x1 ?trans1;
BRA 0x4f0 ?trans5;
IMAD.WIDE R18, R11.reuse, 0x4, R2 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R18.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
LDG.E R21, desc[UR4][R16.64+0x4] &req={1,0} &wr=0x2 ?trans2;
IMAD R19, R21, R7, R7 &req={2} ?WAIT5_END_GROUP;
IADD3 R19, PT, PT, R19, -R6, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R18, R19, 0x4, R4 ?WAIT6_END_GROUP;
LDG.E R18, desc[UR4][R18.64] &wr=0x2 ?trans1;
BSSY.RECONVERGENT B0, 0x620 ?trans1;
ISETP.NE.AND P1, PT, R18, RZ, PT &req={2} ?WAIT13_END_GROUP;
@!P1 BRA 0x5e0 ?trans5;
ISETP.NE.AND P1, PT, R18, 0x1, PT ?WAIT13_END_GROUP;
@P1 BRA 0x610 ?trans5;
IMAD.WIDE R16, R13.reuse, 0x4, R2 ?trans1;
IADD3 R13, PT, PT, R13, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R21 &rd=0x1 ?trans1;
BRA 0x610 ?trans5;
IMAD.WIDE R16, R11.reuse, 0x4, R2 &req={5} ?trans1;
IADD3 R11, PT, PT, R11, 0x1, RZ ?WAIT4_END_GROUP;
STG.E desc[UR4][R16.64], R21 &rd=0x0 ?trans3;
BSYNC.RECONVERGENT B0 ?trans5;
IADD3 R15, PT, PT, R15, 0x4, RZ ?trans1;
@P0 BRA 0x170 ?trans6;
EXIT ?trans5;
BRA 0x650;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: radix_sort(int*, int*, int*, int*, int, int, int)
_Z10radix_sortPiS_S_S_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x3c
s_load_b256 s[4:11], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
s_load_b128 s[0:3], s[0:1], 0x20
v_lshlrev_b32_e32 v0, 1, v2
v_lshlrev_b32_e32 v2, 6, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[0:1], 2, v[0:1]
v_lshlrev_b64 v[4:5], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_lshl_b32 s2, s2, 1
s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
s_ashr_i32 s3, s2, 31
v_add_co_u32 v0, vcc_lo, s6, v0
v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
s_lshl_b64 s[2:3], s[2:3], 2
v_add_co_u32 v4, vcc_lo, s8, v4
global_load_b64 v[0:1], v[0:1], off
s_add_u32 s2, s6, s2
s_addc_u32 s3, s7, s3
v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
s_load_b32 s2, s[2:3], 0x0
s_mov_b64 s[6:7], 0
s_waitcnt vmcnt(0) lgkmcnt(0)
v_add_nc_u32_e32 v2, s2, v1
s_mov_b32 s2, s1
.LBB5_1:
v_add_co_u32 v6, vcc_lo, v4, s6
v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
v_mad_u64_u32 v[7:8], null, s1, v6, s[2:3]
s_mov_b32 s3, exec_lo
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_subrev_nc_u32_e32 v7, s0, v7
v_ashrrev_i32_e32 v8, 31, v7
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[7:8], 2, v[7:8]
v_add_co_u32 v7, vcc_lo, s4, v7
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
global_load_b32 v1, v[7:8], off
s_waitcnt vmcnt(0)
v_cmpx_lt_i32_e32 0, v1
s_xor_b32 s3, exec_lo, s3
s_cbranch_execz .LBB5_5
s_mov_b32 s8, exec_lo
v_cmpx_eq_u32_e32 1, v1
s_cbranch_execz .LBB5_4
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[2:3]
v_add_nc_u32_e32 v2, 1, v2
v_add_co_u32 v7, vcc_lo, s10, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
global_store_b32 v[7:8], v6, off
.LBB5_4:
s_or_b32 exec_lo, exec_lo, s8
.LBB5_5:
s_and_not1_saveexec_b32 s3, s3
s_cbranch_execz .LBB5_9
s_mov_b32 s8, exec_lo
v_cmpx_eq_u32_e32 0, v1
s_cbranch_execz .LBB5_8
v_ashrrev_i32_e32 v1, 31, v0
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[7:8], 2, v[0:1]
v_add_nc_u32_e32 v0, 1, v0
v_add_co_u32 v7, vcc_lo, s10, v7
s_delay_alu instid0(VALU_DEP_3)
v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
global_store_b32 v[7:8], v6, off
.LBB5_8:
s_or_b32 exec_lo, exec_lo, s8
.LBB5_9:
s_delay_alu instid0(SALU_CYCLE_1)
s_or_b32 exec_lo, exec_lo, s3
s_add_u32 s6, s6, 4
s_addc_u32 s7, s7, 0
s_cmpk_eq_i32 s6, 0x100
s_cbranch_scc0 .LBB5_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| radix_sort | 2,632 | 1,682 | stackv2-00000-of-00015 |
// Demangled: write_sorted_hash_codes(int*, int*, int*, int)
Function : _Z23write_sorted_hash_codesPiS_S_i
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans8;
LDC R8, c[0x0][0x398] &wr=0x1 ?trans2;
ISETP.GE.AND P0, PT, R8, 0x1, PT &req={1} ?WAIT13_END_GROUP;
@!P0 EXIT &req={0} ?trans5;
S2R R0, SR_CTAID.X &wr=0x0 ?trans1;
LDC.64 R2, c[0x0][0x380] &wr=0x1 ?trans1;
LDCU UR4, c[0x0][0x360] &wr=0x0 ?trans1;
LOP3.LUT R17, R8.reuse, 0x7, RZ, 0xc0, !PT ?trans1;
S2R R7, SR_TID.X &wr=0x0 ?trans1;
IADD3 R6, PT, PT, R8.reuse, -0x1, RZ ?trans2;
LOP3.LUT R22, R8.reuse, 0xf, RZ, 0xc0, !PT ?trans1;
LDCU.64 UR6, c[0x0][0x358] &wr=0x2 ?trans1;
IADD3 R9, PT, PT, R17, -0x1, RZ ?trans1;
LDC.64 R4, c[0x0][0x388] &wr=0x3 ?trans1;
LOP3.LUT R23, R8, 0x3, RZ, 0xc0, !PT ?WAIT2_END_GROUP;
LOP3.LUT R8, R8, 0x7ffffff0, RZ, 0xc0, !PT ?trans1;
ISETP.GE.U32.AND P1, PT, R9, 0x3, PT ?trans1;
HFMA2 R9, -RZ, RZ, 0, 0 ?trans1;
ISETP.GE.U32.AND P0, PT, R6, 0xf, PT ?trans1;
IADD3 R8, PT, PT, -R8, RZ, RZ ?trans1;
IADD.64 R2, R2, 0x3c &req={1} ?trans2;
IADD.64 R4, R4, 0x20 &req={3} ?trans2;
IMAD R0, R0, UR4, R7 &req={2,0} ?WAIT7_END_GROUP;
LDC.64 R6, c[0x0][0x390] &req={0} &wr=0x0 ?trans1;
LDCU UR8, c[0x0][0x398] &req={1} &wr=0x1 ?trans1;
IMAD R11, R0, 0x40, R9 &req={4,3} ?trans1;
IADD3 R9, PT, PT, R9, 0x1, RZ ?trans1;
MOV R12, RZ ?WAIT4_END_GROUP;
ISETP.NE.AND P2, PT, R9, 0x40, PT ?trans1;
IMAD R10, R11.reuse, UR8, RZ &req={1} ?trans2;
IMAD.WIDE R6, R11, 0x4, R6 &req={0} ?trans1;
@!P0 BRA 0xa60 &req={2} ?trans9;
MOV.64 R12, RZ ?trans2;
MOV R11, R10 ?trans1;
MOV R16, R8 ?WAIT7_END_GROUP;
LDG.E R15, desc[UR6][R6.64] &req={1} &wr=0x2 ?trans2;
IMAD R15, R15, UR8, R12 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R15, 0x4, R2 ?WAIT5_END_GROUP;
LDG.E R27, desc[UR6][R18.64+-0x3c] &wr=0x2 ?trans1;
IMAD.WIDE R14, R11, 0x4, R4 ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64+-0x20], R27 &req={2} ?trans4;
LDG.E R20, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R20, R20, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R21, RZ, 0x1f, R20 ?WAIT5_END_GROUP;
IADD.64 R20, R20, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R20, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R20, R3, R21, 0x2, P3 ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x38] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x1c], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x34] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x18], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x30] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x14], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x2c] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x10], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x28] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0xc], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x24] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x8], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x20] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+-0x4], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x1c] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x18] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x4], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x14] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x8], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x10] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0xc], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0xc] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x10], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+-0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x14], R25 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R20, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, R3, R19, 0x2, P3 &req={1} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+-0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x18], R21 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R18, R12 ?WAIT5_END_GROUP;
LEA R24, P3, R18, R2, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, R3, R19, 0x2, P3 &req={0} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64] &wr=0x2 ?trans1;
IADD3 R16, PT, PT, R16, 0x10, RZ ?trans1;
IADD.64 R12, R12, 0x10 ?WAIT3_END_GROUP;
IADD3 R11, PT, PT, R11, 0x10, RZ ?trans1;
ISETP.NE.AND P3, PT, R16, RZ, PT ?trans1;
STG.E desc[UR6][R14.64+0x1c], R25 &req={2} &rd=0x1 ?WAIT12_END_GROUP;
@P3 BRA 0x230 ?trans5;
ISETP.NE.AND P3, PT, R22, RZ, PT ?WAIT13_END_GROUP;
@!P3 BRA 0x1380 ?trans5;
IADD3 R11, PT, PT, R22, -0x1, RZ ?trans1;
ISETP.NE.AND P3, PT, R17, RZ, PT ?WAIT4_END_GROUP;
ISETP.GE.U32.AND P4, PT, R11, 0x7, PT ?WAIT13_END_GROUP;
@!P4 BRA 0xf00 ?trans5;
LDG.E R11, desc[UR6][R6.64] &wr=0x2 ?trans1;
LDC.64 R18, c[0x0][0x380] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x3 ?trans7;
LDC.64 R14, c[0x0][0x388] &req={1} &wr=0x1 ?trans1;
IMAD R11, R11, UR8, R12 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R11, 0x4, R18 &req={0} ?WAIT6_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R10, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R11, 0x4, R14 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R20, desc[UR6][R6.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?trans1;
IMAD R20, R20, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R21, RZ, 0x1f, R20 ?WAIT5_END_GROUP;
IADD.64 R20, R20, R12 ?WAIT5_END_GROUP;
LEA R24, P4, R20, UR4, 0x2 &req={3} ?WAIT4_END_GROUP;
LEA.HI.X R25, R20, UR5, R21, 0x2, P4 ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x4], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 &req={0} ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R20, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, UR5, R19, 0x2, P4 ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x8], R21 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R24, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, UR5, R19, 0x2, P4 &req={1} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0xc] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0xc], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R20, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, UR5, R19, 0x2, P4 &req={0} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+0x10] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x10], R21 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R24, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, UR5, R19, 0x2, P4 &req={1} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0x14] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x14], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R20, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, UR5, R19, 0x2, P4 &req={0} ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+0x18] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x18], R21 &req={2} &rd=0x0 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R24, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, UR5, R19, 0x2, P4 &req={1} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0x1c] &wr=0x2 ?trans1;
IADD3 R12, PT, PT, R12, 0x8, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R14.64+0x1c], R25 &req={2} &rd=0x0 ?trans4;
@!P3 BRA 0x1380 ?trans5;
ISETP.NE.AND P3, PT, R23, RZ, PT ?trans1;
@!P1 BRA 0x1170 ?WAIT12_END_GROUP;
LDG.E R11, desc[UR6][R6.64] &wr=0x2 ?trans1;
LDC.64 R18, c[0x0][0x380] &wr=0x3 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x4 ?trans7;
LDC.64 R14, c[0x0][0x388] &req={1,0} &wr=0x0 ?trans1;
IMAD R11, R11, UR8, R12 &req={2} ?WAIT4_END_GROUP;
IMAD.WIDE R18, R11, 0x4, R18 &req={3} ?WAIT6_END_GROUP;
LDG.E R19, desc[UR6][R18.64] &wr=0x2 ?trans1;
IADD3 R11, PT, PT, R10, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R14, R11, 0x4, R14 &req={0} ?WAIT5_END_GROUP;
STG.E desc[UR6][R14.64], R19 &req={2} &rd=0x0 ?trans4;
LDG.E R20, desc[UR6][R6.64] &wr=0x2 ?trans1;
SHF.R.S32.HI R13, RZ, 0x1f, R12 ?trans1;
IMAD R20, R20, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R21, RZ, 0x1f, R20 ?WAIT5_END_GROUP;
IADD.64 R20, R12, R20 ?WAIT5_END_GROUP;
LEA R24, P4, R20, UR4, 0x2 &req={4} ?WAIT4_END_GROUP;
LEA.HI.X R25, R20, UR5, R21, 0x2, P4 ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0x4] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x4], R25 &req={2} &rd=0x1 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R18, R18, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 &req={0} ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R20, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R21, R18, UR5, R19, 0x2, P4 ?WAIT6_END_GROUP;
LDG.E R21, desc[UR6][R20.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R14.64+0x8], R21 &req={2} &rd=0x2 ?trans4;
LDG.E R18, desc[UR6][R6.64] &wr=0x3 ?trans2;
IMAD R18, R18, UR8, RZ &req={3} ?WAIT5_END_GROUP;
SHF.R.S32.HI R19, RZ, 0x1f, R18 ?WAIT5_END_GROUP;
IADD.64 R18, R12, R18 ?WAIT5_END_GROUP;
LEA R24, P4, R18, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R25, R18, UR5, R19, 0x2, P4 &req={1} ?WAIT6_END_GROUP;
LDG.E R25, desc[UR6][R24.64+0xc] &wr=0x3 ?trans1;
IADD3 R12, PT, PT, R12, 0x4, RZ ?WAIT3_END_GROUP;
STG.E desc[UR6][R14.64+0xc], R25 &req={3} &rd=0x2 ?trans4;
@!P3 BRA 0x1380 ?trans5;
LDG.E R11, desc[UR6][R6.64] &wr=0x3 ?trans1;
LDC.64 R14, c[0x0][0x380] &req={2,1,0} &wr=0x0 ?trans8;
LDC.64 R18, c[0x0][0x388] &wr=0x1 ?trans1;
IMAD R11, R11, UR8, R12 &req={3} ?WAIT4_END_GROUP;
IMAD.WIDE R14, R11, 0x4, R14 &req={0} ?WAIT6_END_GROUP;
LDG.E R15, desc[UR6][R14.64] &wr=0x2 ?trans1;
ISETP.NE.AND P3, PT, R23, 0x1, PT ?trans1;
IADD3 R11, PT, PT, R10, R12, RZ ?WAIT5_END_GROUP;
IMAD.WIDE R10, R11, 0x4, R18 &req={1} ?WAIT5_END_GROUP;
STG.E desc[UR6][R10.64], R15 &req={2} &rd=0x3 ?trans2;
@!P3 BRA 0x1380 ?trans5;
LDG.E R14, desc[UR6][R6.64] &wr=0x2 ?trans1;
LDCU.64 UR4, c[0x0][0x380] &wr=0x0 ?trans1;
SHF.R.S32.HI R19, RZ, 0x1f, R12 ?trans1;
MOV R18, R12 ?trans1;
IMAD R14, R14, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R15, RZ, 0x1f, R14 &req={3} ?WAIT5_END_GROUP;
IADD.64 R14, R14, R18 ?WAIT5_END_GROUP;
LEA R12, P3, R14, UR4, 0x2 &req={0} ?WAIT4_END_GROUP;
LEA.HI.X R13, R14, UR5, R15, 0x2, P3 ?WAIT6_END_GROUP;
LDG.E R13, desc[UR6][R12.64+0x4] &wr=0x2 ?trans1;
ISETP.NE.AND P3, PT, R23, 0x2, PT ?WAIT3_END_GROUP;
STG.E desc[UR6][R10.64+0x4], R13 &req={2} &rd=0x4 ?trans10;
@!P3 BRA 0x1380 ?trans5;
LDG.E R6, desc[UR6][R6.64] &wr=0x2 ?trans2;
IMAD R12, R6, UR8, RZ &req={2} ?WAIT5_END_GROUP;
SHF.R.S32.HI R13, RZ, 0x1f, R12 &req={4} ?WAIT5_END_GROUP;
IADD.64 R12, R18, R12 ?WAIT5_END_GROUP;
LEA R14, P3, R12, UR4, 0x2 ?WAIT4_END_GROUP;
LEA.HI.X R15, R12, UR5, R13, 0x2, P3 ?WAIT6_END_GROUP;
LDG.E R15, desc[UR6][R14.64+0x8] &wr=0x2 ?trans4;
STG.E desc[UR6][R10.64+0x8], R15 &req={2} &rd=0x0 ?trans2;
@P2 BRA 0x170 ?trans5;
EXIT ?trans5;
BRA 0x13a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: write_sorted_hash_codes(int*, int*, int*, int)
_Z23write_sorted_hash_codesPiS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s10, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_cmp_gt_i32 s10, 0
v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[2:3], s[0:1], 0x10
s_cselect_b32 s0, -1, 0
s_mov_b32 s1, 0
v_cndmask_b32_e64 v2, 0, 1, s0
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
v_mul_lo_u32 v0, s10, v1
v_lshlrev_b32_e32 v5, 6, v1
v_cmp_ne_u32_e64 s0, 1, v2
s_delay_alu instid0(VALU_DEP_3)
v_lshlrev_b32_e32 v0, 6, v0
.LBB6_1:
s_delay_alu instid0(VALU_DEP_2)
s_and_b32 vcc_lo, exec_lo, s0
s_cbranch_vccnz .LBB6_4
v_add_nc_u32_e32 v2, s1, v5
s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v1, 31, v0
s_mov_b64 s[8:9], 0
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_lshlrev_b64 v[6:7], 2, v[0:1]
v_lshlrev_b64 v[3:4], 2, v[2:3]
s_waitcnt lgkmcnt(0)
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
v_add_co_u32 v1, vcc_lo, s6, v6
v_add_co_ci_u32_e32 v2, vcc_lo, s7, v7, vcc_lo
s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
v_add_co_u32 v3, vcc_lo, s2, v3
v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
.LBB6_3:
global_load_b32 v6, v[3:4], off
s_waitcnt vmcnt(0)
v_mul_lo_u32 v6, v6, s10
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
v_ashrrev_i32_e32 v7, 31, v6
v_add_co_u32 v6, vcc_lo, s8, v6
s_add_u32 s8, s8, 1
v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
s_addc_u32 s9, s9, 0
s_cmp_eq_u32 s10, s8
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[6:7], 2, v[6:7]
v_add_co_u32 v6, vcc_lo, s4, v6
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
global_load_b32 v6, v[6:7], off
s_waitcnt vmcnt(0)
global_store_b32 v[1:2], v6, off
v_add_co_u32 v1, vcc_lo, v1, 4
v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
s_cbranch_scc0 .LBB6_3
.LBB6_4:
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
v_add_nc_u32_e32 v0, s10, v0
s_add_i32 s1, s1, 1
s_cmp_eq_u32 s1, 64
s_cbranch_scc0 .LBB6_1
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| write_sorted_hash_codes | 9,123 | 1,290 | stackv2-00000-of-00015 |
// Demangled: mykernel()
Function : _Z8mykernelv
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] ?trans1;
EXIT ?trans5;
BRA 0x20;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: mykernel()
_Z8mykernelv:
s_endpgm
| mykernel | 92 | 12 | stackv2-00000-of-00015 |
// Demangled: addMatrix(float*, float*, float*, int, int)
Function : _Z9addMatrixPfS_S_ii
.headerflags @"EF_CUDA_SM120 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM120)"
LDC R1, c[0x0][0x37c] &wr=0x0 ?trans1;
S2R R2, SR_TID.Y &wr=0x1 ?trans7;
LDC R0, c[0x0][0x360] &wr=0x2 ?trans1;
LDCU.64 UR6, c[0x0][0x398] &wr=0x3 ?trans1;
S2R R5, SR_TID.X &wr=0x2 ?trans6;
S2UR UR5, SR_CTAID.Y &wr=0x1 ?trans8;
LDC R3, c[0x0][0x364] &wr=0x1 ?trans8;
S2UR UR4, SR_CTAID.X &wr=0x2 ?trans1;
IMAD R3, R3, UR5, R2 &req={1} ?WAIT5_END_GROUP;
ISETP.GE.AND P0, PT, R3, UR7, PT &req={3} ?trans1;
IMAD R0, R0, UR4, R5 &req={2} ?WAIT4_END_GROUP;
IMAD R9, R0.reuse, UR7, R3 ?trans1;
ISETP.GE.OR P0, PT, R0, UR6, P0 ?WAIT13_END_GROUP;
@P0 EXIT &req={0} ?trans5;
LDC.64 R2, c[0x0][0x388] &wr=0x0 ?trans1;
LDCU.64 UR4, c[0x0][0x358] &wr=0x1 ?trans7;
LDC.64 R4, c[0x0][0x390] &wr=0x2 ?trans8;
LDC.64 R6, c[0x0][0x380] &wr=0x3 ?trans1;
IMAD.WIDE R2, R9, 0x4, R2 &req={0} ?WAIT6_END_GROUP;
LDG.E R2, desc[UR4][R2.64] &req={1} &wr=0x4 ?trans1;
IMAD.WIDE R4, R9, 0x4, R4 &req={2} ?WAIT6_END_GROUP;
LDG.E R5, desc[UR4][R4.64] &wr=0x4 ?trans1;
IMAD.WIDE R6, R9, 0x4, R6 &req={3} ?WAIT4_END_GROUP;
FADD R9, R2, R5 &req={4} ?WAIT5_END_GROUP;
STG.E desc[UR4][R6.64], R9 ?trans1;
EXIT ?trans5;
BRA 0x1a0;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
NOP;
..........
| // Demangled: addMatrix(float*, float*, float*, int, int)
_Z9addMatrixPfS_S_ii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x18
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10, 10
s_waitcnt lgkmcnt(0)
s_lshr_b32 s5, s4, 16
s_and_b32 s4, s4, 0xffff
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
v_mad_u64_u32 v[0:1], null, s14, s4, v[2:3]
v_mad_u64_u32 v[1:2], null, s15, s5, v[3:4]
s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
v_cmp_gt_i32_e64 s2, s3, v1
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
s_and_b32 s2, vcc_lo, s2
s_and_saveexec_b32 s4, s2
s_cbranch_execz .LBB0_2
s_load_b128 s[4:7], s[0:1], 0x0
s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]
s_load_b64 s[0:1], s[0:1], 0x10
v_ashrrev_i32_e32 v3, 31, v2
s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
v_lshlrev_b64 v[0:1], 2, v[2:3]
s_waitcnt lgkmcnt(0)
v_add_co_u32 v2, vcc_lo, s6, v0
s_delay_alu instid0(VALU_DEP_2)
v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
v_add_co_u32 v4, vcc_lo, s0, v0
v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
v_add_co_u32 v0, vcc_lo, s4, v0
global_load_b32 v2, v[2:3], off
global_load_b32 v3, v[4:5], off
v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
s_waitcnt vmcnt(0)
v_add_f32_e32 v2, v2, v3
global_store_b32 v[0:1], v2, off
.LBB0_2:
s_nop 0
s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
s_endpgm
| addMatrix | 708 | 825 | stackv2-00000-of-00015 |
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