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H: +-10v variable power supply
I need to generate a variable voltage ranging from +10v to -10v in order to control a motor driver. What are ways to generate this voltage?
To clarify: the motor driver takes +-10V as an input. +10V is full forward, -10V is full reverse, with voltages in between being differnt speeds, and 0 being stop.
AI: Sigh... Spehro Pefhany already gave you a great clue. Shop for a power supply that puts out +/- 10 volts or more likely +/- 12 volts. It does not have to supply even 1/2 amp to work.
Buy a 10 K potentiometer (and a knob) and connect its CW and CCW inputs to your +/- 10 volts. Connect the wiper to your motor controller. Connect the common grounds for speed control and the power supply together. Done.
The speed controller will likely ignore any voltages above 10 volts or less than - 10 volts.
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H: Phase Shift Keying: Is it ever actually used?
during my course in digital communications Phase Shift Keying is talked about where the modulation consisted of altering the phase of the carrier signal. This process takes up a lot of spectrum so I am wondering, is it ever actually used in wireless communications?
Or when PSK is talked about, is bandlimited PSK implied which amounts to QAM with a circular constellation?
AI: One of the most common uses of PSK is carried in (almost) everybody's pocket, the 2G GSM system. Although many phones use 3G and 4G modulation for traffic, 2G is still required for a common 'lowest level' that all support for call setup, and to revert to should 3G or 4G not be served in the area.
No commercial communication system uses raw 'PSK', as the spectrum is too wide, some form of filtering is used so all channels 'play nice' with the adjacent channels. 2G uses GMSK. Although it's described as an FSK scheme, the requirement for the modulation index be exactly 0.5 means that it always goes through the same phase points and is in fact also a PSK modulation scheme.
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H: How do you model a "leaky inductor"?
My understanding is as follows:
A voltage induces an electric field at a capacitor, which is measured in coulombs. If I wanted the capacitor to leak the charge exponentially, I could model that as a parallel resistor around it.
How would I express the dual of this paragraph for inductors? Something like:
A current induces a magnetic field at an inductor, which is measured in (Webers?). If I wanted the inductor to leak the magnetic flux exponentially, I could model that as a (series resistor?)
AI: As long as it's not a transformer or something where the leakage from one coil affects another, it might be as simple as putting a resistor in series because the flux is proportional to the current on the wire, and the flux losses are likely proportional to flux density. So, if you're trying to model the losses due to flux leakage, a resistor in series might be your answer.
Your waterwheel is not a bad analogy. Adding resistance in series will cause losses proportional to current, and current happens to be proportional to flux. I know that flux losses depend on physical shape and there are probably some eccentricities to the way flux is lost, but given that those are unknowns without a deep examination, it should be adequate to use a resistor in series for simulation. If you want you can probably use a single resistor to account for all of your losses, flux loss, coil resistance, ringing if present and eddy current losses.
As far as measurement quantities, there are quite a few with regard to magnetics. The Weber is a unit of flux, and flux density is measured in Teslas, so if you have 1 Weber in a cross section of 1 m^2 you have a density of 1 tesla. Coulombs are measurement of charge. 1 Coulomb is 1 Mol (Avogadro's number) of electrons or holes. A capacitor has capacitance rated in Farads, and a capacitance of 1 Farad means that the capacitor can store 1 coulomb of charge per volt it is charged to. The electric field is measured in volts, as basically all a capacitor does is store voltage (pressure)
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H: What's the rationale behind these warnings about extension cords?
(Disclaimer: I've read the help center and I do understand that this is bordering on off-topic since it's about consumer devices. However I hope that I've managed to make enough on-topic by asking about why it is the way it is, and what is the explanation from an electromagnetic point of view - in other words, what laws of electricity and what practical considerations have gone into these decisions).
I recently bought a power tool and in its manual I found a few peculiar safety rules. I cannot see why they would be there, although reading up more it seems that they are commonplace. My understanding of electricity is limited (just about enough to be dangerous), so I'm hoping to expand it. :)
The rules are:
Don't use an extension cord longer than 25m. Considering this is an outdoors tool, this limitation is severely restrictive. The best explanation I've seen is that longer cables would simply have too high of a resistance and the tool wouldn't be able to operate at full power. But this argument doesn't convince me. The tool is rated at 2.4kW, and it's meant to be used with 220V AC power source, which means it uses about 11 amps of current. All the extension cords I've ever come across have at least 16A limitation, so there is quite a reserve still. In addition, the power has to travel much, much further to get to my house, and even after the meter it still takes probably close to those same 25m to get to the power outlet. Why only 25m after the outlet? The resistance of the cables isn't that big, is it?
Don't daisy-chain extension cords. I suspect this is a variation of the above - don't exceed 25m; every connection adds additional contact resistance; water in the outdoors connections can be a problem - in general, it just adds risk. However, apart from the water in the contacts, the rest seems to me to be practically negligible. Is there really a significant contact resistance? Assuming that the extension cords are in a good shape.
Make sure that the power cord is entirely unrolled. This is another odd one. My suspicion is that it has to do with inductive resistance. But is it really that strong? Wherever I've seen people actually wanting to create an electromagnet, it's pretty much hard work. You need a lot of neat, tightly-wound loops of wire. An extension cord has a lot of insulator around it, spacing the wires pretty far apart, and the loops are very chaotic. In addition, if that was a problem, why do extension cord rollers exist? They're used especially when you need a very long extension cord, and you don't need to unroll them completely every time you want to use them. Solved: OK, I was off the mark. The correct answer (also a separate question) has to do with the wire heating up from being used close to its limits. When coiled together, the temperature can go pretty high and melt the cables. Not fun.
AI: Let's say you're extension cables are 1 mm² cross-sectional area.
The loop resistance is 33.6 mΩ/m.
A 25 m cable will have a loop resistance of 840 mΩ.
The voltage drop at 11 A will be given by V = IR = 11 x 0.84 = 9.24 V. On a 220 V supply this is a reduction of 4.2%.
Power dissipated as heat in the cable is given by P = VI or P = I²R = 11² x 0.84 = 102 W. This is a waste of 4.2% power (as we would expect from the previous calculation).
String four cords together for a 100 m run and you'll only get 220 - (9.24 x 4) = 183 V.
The situation is a little more complicated than the calculations above suggest because when you add in the cable resistance the current will reduce too. For a 2.4 kW, 220 V load we can calculate \$ R = \frac {V^2}{P} = \frac {220^2}{2400} = 20.2\ \Omega \$. Add in our 100 m loop cable resistance of 4 x 0.84 Ω and the total resistance is now 23.6 Ω resulting in a max current of only 9.3 A which at 183 V (calculated above) reduces the power to VI = 183 x 9.3 = 1700 W which is only 71% of the rated power. The "square" term in the power equation makes the power loss proportional to the square of the voltage loss.
Now to your questions:
Don't use an extension cord longer than 25m. ... and the tool wouldn't be able to operate at full power. But this argument doesn't convince me.
Be convinced by the maths.
All the extension cords I've ever come across have at least 16A limitation, so there is quite a reserve still.
See if you can find the cross-sectional area for those cables and recalculate.
In addition, the power has to travel much, much further to get to my house, and even after the meter it still takes probably close to those same 25m to get to the power outlet.
Ideally your local transformer will be fairly close to your house and, in Ireland, the connection will be using at least 25 mm² cable. You can get some idea of the source "resistance" to your house by monitoring the voltage while you switch on and off a large load such as an electric oven and all the hobs.
Don't daisy-chain extension cords. ... the rest seems to me to be practically negligible.
It may be tolerable (depending on your load) but it's not negligible.
Is there really a significant contact resistance?
This is usually not a factor.
Make sure that the power cord is entirely unrolled.
Our calculations showed that the power dissipated in the cable is 100 W. With the cable tightly rolled the coil temperature will rise. Imagine you wound the cable around a 100 W filament light bulb: what temperature do you think would be reached? Would it get close to melting the insulation?
Figure 1. Source: Why is it dangerous use a coiled extension cord.
My suspicion is that it has to do with inductive resistance.
The term you are looking for is "impedance" for AC resistance. Actually there will be almost zero inductance as the live and neutral currents are in opposite directions and cancel out. I used this trick in work when I needed to create a test load for a 30 A, 30 V 50 Hz supply. We first wound a coil of 1.5 mm² cable of the correct resistance but it was really hopping when we powered it up. When we unwound it, folded in half and rewound it there was no buzz.
Figure 2. Inductance cancellation. See my answer to the question linked above.
But is it really that strong? ... You need a lot of neat, tightly-wound loops of wire.
Or a high current in a low number of turns.
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H: How To Calculate kVA values in power analyzer meters?
I am using a Schinder Electric PM2120 power analyser meter.
I record values with it every 15 minutes.
When I calculate values in kVA manually and compare them with the recorded values, I notice that a difference appears. Please explain to me why this is happening.
I used \$Root 3\times VLL_{Avg}\times I_{Avg}\$ to calculate using kVA.
Spreadsheet link: record
The time, voltage, current, kVA, THD values are taken from the measurements made with the meter.
AI: The original question has been edited to more clearly indicate the \$\sqrt3\$ is the prefix and not plain ordinary 3. However, the principle for calculating VA based on using RMS values (rather than average values) remains the same.
3*V*I (or \$\sqrt3\$VI) is the correct formula for calculating VA if the voltage and current are RMS quantities but it seems you are using average values and these are likely to be average values of RMS values and so will give an error.
Consider 10 amps flowing for 1 second then zero amps for 9 seconds repeating. The average is clearly 1 amp. The RMS is somewhat different because you have to square then average then take the square root.
So 10 amps squared is 100 and this is averaged over ten seconds to be 10 amps squared. Take the square root and you find that the RMS is \$\sqrt{10}\$ amps and is substantially different to the average value of 1 amp.
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H: Circuit to control a magnetic field, using a laminated core
I need to produce a magnetic field that goes from 0 - 80 kA/m (0 - 100 mT), which I can control the amplitude of, and change its polarity.
The diagram below outlines a couple of pieces of laminated transformer core I was given (blue), with a winding (red) and the green is where I need to place what I want to measure. This was apparently used by someone before to do the same things, but the rest of the set up is lost.
I am hoping somebody could advise me as to what to use to drive the coil to reach the the field I need and to control reasonable steps (5-10 kA/m) of the field, or any other set up or modifications that I could make to improve things.
I put 4 amps through the coil and measure 8 kA/m (10 mT) in the gap. This is the limit of the power supply I have, and the coil heated up quite a bit. I have some worry of the coil heating up and the limits. If I assumed a relatively linear increase that would require 40A, which seems like a lot.
There is a gap between the cores under the coil, and the calculation I have come across for these setups usually there is only one gap placed opposite the coils.
Any advice would be greatly appreciated, even if it is an alternative set up.
AI: To make the magnetic field in the outside gap stronger, you can
Add more windings to the coil.
Remove the gap in the coil; fill it with something ferromagnetic (doesn't need to be laminated, that's only important in AC applications)
Make the outside gap smaller.
It's also possible that there's some short-cut across some of the windings, that would make them useless.
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H: Powering inverter gate needed for enabling a DC-DC converter
I'm designing a plugin card that's powered at 12V from the main board. Now, I need a 3V3 and a 2V5 voltages on the card, so I'm using two buck converters MUN12AD03-SH (I'm supposed to use this specific converter, so I can't change that).
The signal for enabling the converters comes from the main board and is active-low (I can't change that as well), while this the converter's enable is active-high, therefore I'll have to use an inverter gate.
So the question is what's the wisest way to power this inverter gate if the DC-DC converters aren't enabled yet (only have 12V)? I wasn't able to find a 12V tolerant inverter gate. Can I use a voltage divider as the inverter gate won't draw big currents? Or should I use another buck or LDO or something else?
AI: By the way, this is the buck converter you listed, its enable pin supports voltages up the \$V_{IN}\$ value.
I don't know if this is the 'wisest' way, as you call it, but you could do something like this:
simulate this circuit – Schematic created using CircuitLab
I am assuming the enabling signal would be high when not asserting and low when asserting. If it is open drain, you could pull up the MOSFET's gate anyway—that is why I added the optional pullup.
So in summary, when the enable signal coming from the main board is low (0V), the MOSFET is OFF and the EN pin on the buck converter side will be pulled high (converter is ON). When the enable signal coming from the main board is high (12V) or open drain, the MOSFET's gate will be high and the MOSFET is ON—this will force a low voltage at the EN pin on the buck converter side, thus disables it (converter is OFF).
You could do a similar thing for the other buck converter. Hope this helps.
Reference: MUN12AD03-SH
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H: Asynchronous SRAM routing crosstalk concerns
I'm routing a large BGA SRAM that is connected to a BGA FPGA, and there's about 40 signals altogether connecting the two. I'm using Henry Ott's recommended 8-layer stackup:
1 ________________Mounting Pads/Low Freq. Signals
2 ________________Pwr.
3 ________________Gnd.
4 ________________High Freq. Signals (SRAM Layer 1)
5 ________________High Freq. Signals (SRAM Layer 2)
6 ________________Gnd.
7 ________________Pwr.
8 ________________Low Freq. Signals/Test Pads
I've fanned out the BGA such that all the SRAM pins are on layers 4 and 5. However, my routing results in a lot of parallel traces on adjacent layers, and I'm concerned about crosstalk:
(I'm in the process of length tuning. SRAM traces are different shades of blue, indicating address/data/control groups, not layers. Sorry for any confusion.)
Questions I have about SRAM routing:
Should I revise my stackup to seperate these layers with a ground, or should I just try to avoid traces that are directly adjacent for long distances? Should I try to get all signals onto one layer using vias, or is that even worse?
On a related note, when I'm calculating trace-impedence of signals on layers 4/5, is that calculated as a microstrip or an asymmetrical stripline? It's not open to the air, but it's also not sandwiched directly between two ground planes.
Finally, this is unrelated, but for asynchronous SRAM do I need to length-match all signals or are there groups like in DRAM? I'm under the impression that for a write, for example, address and input data would need to arrive together, hence everything is length-matched.
This is my first high-speed design like this, and any advice would be greatly appreciated.
EDIT: SRAM part number for reference is CY62187EV30LL-55BAXI
AI: Should I revise my stackup to seperate these layers with a ground, or should I just try to avoid traces that are directly adjacent for long distances? Should I try to get all signals onto one layer using vias, or is that even worse?
Adding a ground layer between the two high speed routing layers will eliminate cross talk but obviously would add cost. Spacing the traces on adjacent layers by at least 3X (preferrably 5X) the dielectric height would reduce crosstalk. Adding vias always carries the risk of creating signal reflections and depends on the signal rise time and and how the vias are designed.
On a related note, when I'm calculating trace-impedence of signals on layers 4/5, is that calculated as a microstrip or an asymmetrical stripline? It's not open to the air, but it's also not sandwiched directly between two ground planes.
It is asymmetrical stripline. the reality is that it is sandwiched between ground planes. There are field solvers that can calculate the impednace of this geometry.
Finally, this is unrelated, but for asynchronous SRAM do I need to length-match all signals or are there groups like in DRAM? I'm under the impression that for a write, for example, address and input data would need to arrive together, hence everything is length-matched.
Length matching is a timing issue related to set up and hold of address and data lines to the write strobe. I don't really see a need here for length matching, but take into account skew between address, data and the write strobe. Depends on what speed you are running at.
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H: Logic: Output a 1 when a = 1 and b = 0
I'm a hobbyist just discovering logic gates and would like to know, is there a logic gate that will only output a 1 when a is a 1 and b is a 0?
Truth Table
a | b | y
---------
0 | 0 | 0
0 | 1 | 0
1 | 0 | 1
1 | 1 | 0
Here is a schematic I made, that I think should work in theory, but would like it in one package.
Are chips like this readily available or is everything made up of individual gates?
OFF TOPIC EDIT:
IMGUR is currently not working with SE for me or for people in the comments so the way I got around that was to go imgur.com and uploaded the picture manually. Then right click the picture > Copy image address and then paste it here like so:
AI: I'm pretty sure half a 7402 is all you need: use one gate to invert A and the other to NOR it with B:
simulate this circuit – Schematic created using CircuitLab
A A' B | Y
------------+----
0 1 0 | 0
0 1 1 | 0
1 0 0 | 1
1 0 1 | 0
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H: Why do I measure (almost) no voltage between 230V phase and my body?
The other day I was experimenting with a multimeter and checked the voltage in one of the electric plug at home. Without surprise I measured around 230V between phase and neutral and also 230V between phase and earth (By earth, I mean the earth wire, the "3rd hole").
Then I tried the measure the voltage between phase and my body by sticking one probe in the phase hole and holding the other in my hand (Might not be the best idea if the meter as a failure or is set to measure current instead of voltage... did it nevertheless...). There I measured around 8V AC. Why ? The voltage between me and the earth should be almost 0V hence the potential difference between me and the phase should be around what I measure between phase and earth wire (230V). Which make sense since if I stick my finger in the plug I'm sure I'll get a nice full 230V shock. So why does the meter indicate such low voltage ?
My guess is that it has something to do with capacitance since Earth (big 'E') capacitance is much higher than my body capacitance and would therefore allow higher alternating current to flow in it than into my body ? (Really fuzzy guess sorry).
Thanks for you help :)
AI: Mains neutral/earth is tied to the general mass of the earth.
Digital multimeters normally have an input impedance of 10MΩ. So a reading of 8V means that 0.8uA was flowing between the mains and your body through the multimeter.
At the time you made your measurement the impedance between your body and the general mass of the earth was much higher than the input impedance of your multimeter. So most of the voltage was dropped between your body and the general mass of the earth rather than across the multimeter.
It follows that if nothing had changed since you made the measurement and you touched the mains live conductor you would not have recieved a shock.
Of course it is all too easy to end up inadvertantly grounding your body, so I strongly reccomend avoiding touching live mains.
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H: If counter-emf is zero, why is COE violated?
I've been modeling this thought experiment a for a while now:
If in a electromagnetic system, the induced emf wasn't opposing the change, but increasing it, we're getting energy from nowhere, that makes sense when I consider conservation of energy & Lenz law.
What if a motor's coil has counter-emf = 0, and has constant current with increasing angular/linear velocity over time, or a current carrying rail & rod system, where the rod is moving without any counter-emf to reduce the applied constant power(constant voltage & constant current).
I don't see how this case violates conservation of energy.
Whatever kinetic energy gained by those moving components is from the power source, likewise, for the heat lost.
Unless, I'm missing something?
AI: At a very high level...
What you're missing is relativity.
Your statement is true in a static frame of reference, but with charges in motion, you have electro-magnetic interactions.
In a static frame (charges are fixed relative to each other), you can convert electromotive force to kinetic energy (and heat). However, in the real world, the conversion of electromotive force requires those charges to move... and moving charges disturb the fields around them.
Disturbing those fields creates E-M waves and those have to balance out to conserve energy. That's the source of "back/counter"-EMF in electromagnetics.
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H: Wiring washing machine motor
first apologize for wrong wording/idioms.
Found an old washing machine motor. It has six terminals, labeled U, V, W, Z, X, Y
Attached to the motor is a capacitor with two terminals, no more wires attached.
Now my questions would be (living in Europe with 230V mains / 400V):
Can this motor be operated using 230V and what would be the wiring including the capacitor?
Can this motor be operated using 400V and what would be the wiring including the capacitor? (In this case I guess I would use L1, L2 and L3)
Edit: I checked the resistance between all terminals. There is no electrical connection between the upper and lower set of terminals. One set of terminals (Z X Y) has a resistance of ~35 Ohms between any other two terminal (thick wire going into the motor) and the other set of terminals (U, V, W) has a resistance of ~ 7 Ohms (thin wire going into the motor)
AI: I suspect that this is a two-speed, two winding motor. One set of three terminals is for 350 RPM, 0.2 kW operation and the other set is for 2800 RPM, 0.5 kW operation. The first set requires a 20 microfarad capacitor and the second a 60 microfarad capacitor. The capacitors are connected between two terminals and power is connected between one of those terminals and the third terminal. Which of the two terminals is connected to power may determine the direction of rotation. Checking the resistance between each terminal and every other terminal may confirm how the motor should be connected and whether or not it is reversible. There is no indication that the motor can be operated from 400 volts.
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H: Bode plot graph: Frequency vs. Angular frequency
I am wondering, why are some Bode plots made with \$f\$ or frequency of signal representing x-axis, and why other Bode plots use \$\omega\$ or angular frequency of signal representing x-axis? Why don't all use same quantity (in my opinion, frequency)? But even if one may be using angular frequency for plot, and other may be using frequency for plot, two plots will look exactly the same...
Do you use angular frequency with imaginary unit \$j\omega\$ when plotting complex poles and zeros onto Bode plot? Or is there any other reason?
Also \$rad/sec\$ doesn't equal to \$Hz\$ so this is another fact that confuses things up.
AI: Transfer functions are commonly specified in terms of \$s = \sigma+j\omega\$, which means the bode plot can be interpreted as the evaluation of magnitude and phase of the transfer function along the (positive) imaginary axis of the \$s\$ plane. The imaginary axis relates to undamped sinusoidal inputs, which are typical signals of interest for system analysis. This direct correspondence is (in my opinion) the reason why bode is typically explained, plotted and taught in terms of angular frequency.
The x-axis and y-axis units and scaling should be taken as any other plot: a matter of personal preference, application relevance and detail representation. Sometimes angular frequency is preferred, other times \$Hz\$. Sometimes logarithm scaling, other times linear scaling. It is still the same transfer function regardless of plotting preferences, so any representation choices, as long as they are sensible, are acceptable.
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H: Automotive signal isolation - alternatives to optocouplers
I'm working on an automotive project, where I'd like to interface various digital signals to an MCU. The signals can either be ON/OFF (e.g. radiator fans) or measurements of pulse frequency, width, duration, etc. (e.g. tachometer or speed). The amplitude of the logic level high can be 5V, 9V or 12V. I would like to protect the MCU inputs from overvoltage conditions (e.g. voltages up to 40V) as well as reverse polarity conditions.
In testing and prototyping, I've used the below basic optocoupler circuit, selecting a suitable R1 value to ensure the current through D2 at 40V is within the specifications for the optocoupler:
This circuit works as intended, but I'm concerned about the longevity of the optocoupler LED and the degradation of the CTR over time. Is there an alternate method of providing isolated coupling for a wide range of voltage inputs, which has better long-term reliability and better high frequency characteristics than optocouplers?
AI: There are off-the-shelf isolator chips. For example:
Inductively coupled from Analog
RF coupled from Silabs (yes! basically a small radio inside a chip!)
Capacitively coupled like ISO77xx from TI
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H: Single ended to differential conversion with voltage divider
Let's assume I have an AD-converter that expects a differential signal with zero common mode voltage and I want to connect a single ended signal source.
If the AD has it's own isolated ground, couldn't I just use a voltage divider to drive the AD ground to the center of the signal?
In fact, since the AD already has the same impedance to ground on both input lines internally, shouldn't this happen 'automatically' even without an external divider? (I actually tried this, it didn't work)
Since I don't see this kind of interfacing anywhere if I look up single ended to differential conversion, I assume my understanding of the matter is a bit naive.
What would be a robust and simple way to connect a single ended signal (can be static) to a differential AD with zero common mode?
simulate this circuit – Schematic created using CircuitLab
AI: Even without an external divider? I actually tried this, it didn't work
If your signal source is "floating" then on the face of it it should work. However, the ADC inputs have small bias currents that need a path to local ground. Without that path to ground the bias currents will force both inputs to one or other of the ADC power rails and take it beyond the common-mode working range of the device.
So it works with the potential divider because the resistors provide a shunt path to ground/common reference point.
What would be a robust and simple way to connect a single ended signal
(can be static) to a differential AD with zero common mode?
Actually that is a different scenario. When you have a floating source (inherently differential) that is easily made suitable for the ADC by resistors but a single ended signal is, by definition referenced to a 0 volt net i.e. it produces a signal relative to that 0 volt net. You would need to use a signal inverter built from an op-amp to get a differential signal to the ADC. Alternatively a transformer can be used.
Then there is also common-mode noise to consider; "floating" sources are never really floating and will always exhibit different signal impedances to earth from their two terminals. However, that is beyond the scope of the question.
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H: 4Channel Smartphone Charger 5V 25A
I wanted to experiment a Smartphone Fast Charger. My source would 5V 25A, and output would be in 4 channels, all in parallel. Would that be safe to charge a smartphone?
If no, what can I use to bring down the ampere in one channel? Say, I'll be lowering the ampere down to 3.1A - like most fast charger does.
AI: The device that you connect to the charger port will take the current that it needs at the voltage provided. (I am indicating that the source voltage can have an impact on how much current a device load will take but the device still determines how much current it will draw from the source).
If some other charger is specifying 3.1A that is a specification of the maximum current that the charger can provide while still keeping its output voltage in range and operating in a safe condition such as not burning up or shutting down. If a device attached to that charger needed to draw more than 3.1A then that charger would not be suitable for that device.
Let us look at it from the aspect of your proposed charger. Just because your charger could deliver equal loads at 6.25A per port there is no value to that if the devices that you intend to attach will never draw that much current. You may also consider adding a current detector on each output to take action if a load device is ever attached that wants to try to draw more current than your ports are rated for. The actions that you take could be to either shut the output off till the load is removed or lower the output voltage to a level that the attached device stops drawing so much current.
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H: What is the purpose of the resistors in this schematic?
I’m looking into using a CD4021B shift register with an Arduino Uno, and found a schematic online detailing how to use it. However, I am confused as to what the point of the 10kohm resistors is, would the current not just pass straight through from the 5V to the shift register when the switches are closed? To me it seems like the resistors are pointless, however I am rather new to this all so if someone could enlighten me as to their purpose it would be much appreciated.
Schematic:
AI: These are called "pull-down resistors". They prevent the inputs to the IC from floating, and thus being in an indeterminate state. The point is to put the inputs in a known state (logic 0) when the switches are open. When the switches are closed the resistors are effectively "overridden" and a logic 1 is applied to the inputs.
If you have an IC with active-low inputs, then you would want pull-up resistors, which pull the inputs up to Vcc until the switch connects the pin to ground.
See this question or this question for more details.
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H: Trying to understand why the constant of integration was ignored on this RC circuit
I am watching this video where the guy deducts the voltage across the capacitor during the transient phase.
There is an integral, in the middle of the equations. The guy integrates that and there is no constant of integration after that.
This is not just this guy, I am not aware of any of the capacitor/inductor formulas where the tutor considers them.
Why is that? Why can you simply ignore the constant of integration for all these equations?
AI: I believe that the constant of integration is taken care of here: -
\$V_0\$ is the initial condition of the capacitor: -
And, when the left-hand integral is resolved \$V_0\$ is properly handled. For the right-hand integral having "0" as a limit means there won't be a "k" factor.
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H: Creating required voltage across a device using basic electrical principles
Let me explain what I mean by an imaginary case. Let's imagine a 10 V battery in series with two resistors equal in resistance value. The voltage in between those resistors is 5V according to the voltage division rule. I have a component (does not matter what it is) which needs to be powered up by 5 volts. When I try to use that 5V voltage value in between those resistors to power it up, the voltage division rule breaks and I get less than 5 volts across that component. I cannot figure out how to provide it 5 volts to power it up by using voltage division or basic circuit analysis techniques. What is the way to achieve any voltage value across any component we want?
AI: A voltage regulator.
A voltage regulator is a fairly fundamental concept in electronics. The simplest voltage regulator is the Linear (or sometimes LDO - Low DropOut). The regulator is essentially using two resistors to split the voltage to create your target output voltage (potential divider). However, the regulator also monitor the output voltage, and when it changes (because the load changes), the regulator alter your resistors to compensate.
In a typical LDO device, a transistor is used as a variable resistor to adjust the potential divider and achieve the desired output voltage.
There are other types of regulators that use different methods, but the common feature is the device regulates the output voltage to remain as constant as possible regardless of the load presented, or the input voltage.
The wiki page has more information than anyone would ever want
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H: USB Shield. To ground or not to ground?
I have been given a device at work to do some testing on. Basically an IC is becoming obsolete so I need to test a replacement part. Upon redoing the ESD checks, the device failed.
I checked the history of the device, and there were problems passing ESD before. There was a note from the testing facility that as the device was entirely metal (Stainless steel housing) only contact discharge up to 4kV was needed to pass (I am in UK). Apparently it failed a few times untill a capacitor/resistor was added between the USB shield and ground, and a small metal tab was introduced to add better contact between PCB ground and the metal case. This then apparently allowed it to pass.
Move on 5 years and I am redoing the tests. Each time I perform the contact discharge test at +4kV, the device loses its memory (this is a datalogging device) and it needs a factory reset and restart logging to work again. I rechecked some old ones using the previous IC and found that this also fails. It seemed that it was an intermittent problem (some devices passed 3 in 10 tests, others failed all 10 etc) so it seems to me like the pass on the ESD test previously was likely a fluke.
I tried a number of things, I put extra capacitors in parallel with the current one connecting the USB shield to ground (different values, high/low), I changed the resistor to different values (higher/lower resistance) and tried ferrite beads in parallel, and ferrite beads instead of the Resistor/capacitor as I had seen some places recommend, but still it failed. The only way I got it to pass was by grounding the USB shield directly.
Looking online I can't seem to find anywhere that says explicitly whether you should or shouldn't ground the USB shield. This discussion HERE has different views, this HERE also has a discussion on it. THIS link mentions the shield should only be connected to ground at the host, but no device should connect the shield to ground.... THIS document says the shield should be connected to the chassis. Yet, in fig 12 it seems to show the USB shield should be tied to GND plane.
There just seems to be a lot of different views on this so I am a bit unsure what to do next. Grounding the shield allows it to pass ESD, but is this something that should be done? Or should I continue to look for a better solution? If so, what is a good solution?
MORE INFO:
The PCB is very irregular, and tight on space, making the ground
plane near the USB connector very small.
I am not allowed to change any mechanical design on this. I am just
to find a solution which can be easily implemented and does not
require a redesign of the PCB or product so those suggestions are
pointless to make.
This is a a work device and as such, I am not allowed to show the
schematic, so please do not ask. The USB input circuitry was based on
this design:
The common-mode choke, ferrite and TVS diode protection are all in
the design already.
I am not the original design engineer. They do not work for the company any more so I am unable to find their reasoning for the design choices they made
The device is USB 2.0
The unit passes the test at -4kV, it is just the +4kV where it fails
MORE INFO
And more info required in comments will be added here.
Andy aka: I can show you this much:
All I can show of the actual PCB is this:
You can see that the ground plance stops short of the USB socket. The large hole is where the tabs for the USB shield to have a mechanical connection to the PCB. R1 is then connecting the shield to GND, and capacitor C3 is doing the same on the other connection. The shield is connected to ground via the 100k res/100nF cap. There is a metal tab fitted to the PCB which rests on the metal chassis. According to the old ESD report, this was needed or the device failed. As far as I can see, these were the only things added in addition to that example circuit to protect from ESD.
In response to the questions in the comments:
The failure occurs when doing a contact discharge ESD test on the USB shield (all other areas it is fine, just the USB shield it fails)
The test occurs while the unit is logging. It is not connected to any device via USB.
I have tried a 0R link to GND instead of the resistor/capacitor solution, but this still fails. When I add a wire link direct from the USB shield to the chassis (which is connected to PCB GND) then the issue is resolved. I believe this is because of the PCB design. The ground plane near the USB side is very small (about 12mm x 15mm). Yet the chassis is large. This is something I cannot change.
The location of the Chassis to PCB GND tab is on a sub-PCB, with a 30thou trace to the tab. (yes, I know it sounds strange, but the space constraints were ridiculous and this was not my design!)
AI: Best Practice
Firstly (as a bit of a cop out) personally, in designs I always ground through a 0R resistor so that the decision can be changed. This goes for pretty much any shield (Ethernet, USB etc)
The main problem that can arise is when the shield is grounded at either end, and the two ends don't agree on what 0V is. This can cause damage to either end, by currents flowing where they shouldn't (if the shield path is 0.2ohms, and the voltage difference 1V, that's 5A going where it shouldn't)
You might think why would this ever happen? But think of the situation where a laptop is connected to a piece of mains powered equipment over USB. The laptop could be on battery only (no true earth reference), but the equipment is connected to mains and thus may have a true 0V earth reference.
So the solution is to connect at only one end, but have some agreement on which end.
Generally, a USB host will be expected to provide the power and the device is quite often entirely bus powered and has no connections to anything else in the outside world (think USB memory stick, WiFi dongle etc). In general, the USB host should connect the shield to ground (and earth, if possible). This is why the host side is typically expected to tie the shield to ground or earth.
The fact that there are so many conflicting comments from people and different experiences shows clearly that it is far from safe to assume this is always adhered to, so as I mentioned firstly - add the option to change it easily.
In This Situation
After discussing this in a chat, the proposed solution is different. Since this is a question about ESD, it's messy and complicated and involves many aspects of the design (electrical, mechanical, system). The chat is available for all to see, but there important bits:
This datalogger has no other connections, apart from the USB connection to a PC/laptop
The datalogger has a metal chassis, that is bonded to the PCB board ground.
When the USB shield is not directly connected to PCB board ground (for example connected by R||C or HiZ), the datalogger fails (loses memory contents).
In the ESD test, the USB cable is not attached (or is floating at the other end).
The OP is not the design author, and has very limited scope for making design changes to solve this problem.
I surmise the problem is most likely PCB layout related. The ESD surge is taking a path from the shield, past sensitive electronics and finally reaching the chassis. By directly connected the shield to the chassis with a wire, ESD surge path reaches the chassis without going near the PCB so avoids the problem.
In this situation, as the datalogger has no other connections to any other devices; the potential issues (pun intended) cannot occur. So I would suggest connecting the shield to the chassis. Either by a wire, or a more production friendly approach is an ESD gasket around the connector which is a spongey conductive material that gives a connection without manual soldering and doesn't permeantly attach the chassis to the board.
In a more ideal world, I would respin the board so the chassis is isolated from the PCB board ground and the chassis is connected to the shield. That means that its not possible for ESD surges to reach the sensitive electronics at all. Except if you poke the datapins on the USB connector for fun - in which case, ESD diodes on the datalines that give a path to chassis ground, not PCB board ground.
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H: How many disc revolutions make 1kWh on this kWh-meter?
This a kWh meter from a TV show. I'd like to know how many disc revolutions make 1 kWh. I think it's somehow coded in the whole data on the panel or could be derived from that information:
I found a formula
P = (3600 * Kh) / t
(t = time in seconds taken by the disc to complete one revolution, P = power in watts)
which gives me 138,(8) revolutions per 1 kWh but I am not sure I used the formula correctly.
AI: The Kh is (indeed) what you're after, and the formula you give seems to be correct, according to wikipedia, 'Electromechanical' section.
P = (3600 * Kh) / t (for one rotation)
If we call the amount of rotations n, we get (P / n) = (3600 * Kh) / t
Or: P = (3600 * Kh) / (t * n)
Where:
t = Time in seconds
P = Power in Watts
That means the unit of Kh is:
(W / n) = (3600 * Kh) / s
(3600 * Kh) = W / (n * s)
Kh = W / (n * s * 3600)
And because s * 3600 = 1 hour: Kh = W / (h * n)
So if Kh = 7.2, and it takes 1 hour for the dial to rotate 1 time, you've used 7.2 Watts.
You want (n * kWh). Let's change that into (n * Wh) for now.
Divide everything on the right side through W: Kh = 1 / (Wh * n)
(n * Wh) = 1 / Kh
Now, we need to change Wh to kWh, so we multiply both sides with 1000:
(n * kWh) = 1000 / Kh
So for Kh = 7.2 you get 138.89 n*kWh or 138.89 rotations per kWh.
Your calculation is correct. :-)
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H: How does the voltage drop to negative values at t = 0 when the voltage starts with 0 V?
I understand that the voltage in the inductor is 0V because it behaves as a wire with a constant dc source while the switch is closed. But why does it drop to a negative value when the time t = 0 and the switch opens, instead of remaining as zero?
AI: Figure 1. The current after the switch opens.
You can think of an inductor as liking to maintain the current through it - in the short-term at least. The result of this is that at the moment you open the switch that current reverses through the 5k resistor.
Now observe that since current is flowing clockwise around the loop and the polarity of the voltage across the resistors will be as shown.
Finally, since the bottom of the inductor and 5k resistor are tied to GND and the right side of the 15k is negative then to top of the inductor must be negative too.
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H: 3 Phase Voltage Imbalance
We're trying to setup rotary phase converter, and we're getting some differences in line voltage. The black reads 350 to ground while red and white read 120 to ground. This is all from a 220 input. Red to white reads at 240 volts. Any thoughts on the problem? I don't imagine this is normal.
AI: If your rotary phase converter's output is wired for high-leg delta
then I'll present the following as a possibility.
When wired correctly, you'd expect to see something like this when measuring from each phase to neutral:
and your measurements would be L1 & L2 = 120V, L3 = 208V.
However, if your phase converter is internally miswired like this:
then your result could look something like this instead:
and your measurements would be something like L1 & L2 = 120V, L3 = 317V.
So - not the 350V you're seeing, but maybe a possibility?
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H: How A/C board works on an air conditioner
I have a question.
I got a Panasonic CU-C24GVK (24000 BTU Air conditioner), and the A/C board relay is burnt. If I'm not explaining myself, the A/C board is the thermostat itself, the board receive the 240V, and after some minutes it send a signal to a relay that connects those 240V to the outdoor unit's compressor, that board have the following diagram:
The question is, I want to know how this exactly works, because the relay that connects the 240V line with the COMP output is bad, so I cut the wire and connect the line directly to the COMP, so the compressor will be ON all the time, however, what is happening is that the compressor turns on, and after like 20 min, it turns off and never go back on again, it only turns on if I let it rest a while cutting the electrical supply to the thermostat. A technician told me that because of what I did, the run capacitor might be getting overheated, I ran a test, I waited for night, and as the outside temperature is lower, the compressor doesn't turn off.
But that have no sense to me, how a capacitor will get overheated for constant electrical supply if in a normal run it also have a constant supply unless the thermostat wants to shutdown the compressor? Can anyone explain that to me?
AI: The compressor is overheating,and the internal thermal cutout is tripping.After it cools the compressor runs again.
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H: Power Barrel Connector Voltage Rating Inquiry
My system is using 48V at 3A max. I am currently looking for a power connector to my PCB that can handle my specifications. I came across a potential connector, but I noticed on the data sheet it is rated for 24VDC and 5A. How does the manufacturer determine the voltage rating? Could I get away with using it at 48V if I am well below the current rating?
Part of interest: PJ-037BH-SMT-TR
AI: The datasheet for that part lists 24V as typical, not maximum. You will not have any issues at 48V.
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H: Identify uncommon thermistor
I am trying to repair several reasonably expensive pieces of equipment (ABI Veriti thermocyclers) in our lab which report the same error. They were all bought at the same time and must have a bad batch of components (they failed immediately after the warranty period).
I believe I have tracked the issue down to a failed thermistor. ABI (now ThermoFisher) will not sell me the part or tell me the specs.
The specs I have ascertained (on a good component) with a lab thermometer and multimeter are:
Radial PTC
1.1kohm @25°C
1.293 @ 76°C
Beta(k) ??
Length: 5mm
Diameter: 2.1mm
Shape: cylindrical
A slightly smaller diameter is probably OK but larger will not fit in the orifice machined into the heat sink.
I can not find anything even vaguely close to this on Mouser or a couple of other sites I have tried.
Any suggestions would be appreciated. We're a cancer research lab if that info motivates you.
AI: That looks like a Pt1000 resistor. These are platinum resistors with a resistance of 1000 Ω at 0°C and a postive temperature coefficient of resistance with temperature.
Have a look at the resistance ratio chart. This one by Kongsberg shows the resistances for a Pt100. Scale by 10 for a Pt1000.
Temperature Your reading Table
25°C 1100 Ω 1097.3 Ω
100°C 1340 Ω 1385.1 Ω
Pop it back in the kettle (at sea level) and measure the resistance again to check.
Pure platinum has α = 0.003925 Ω/(Ω·°C) in the 0 to 100 °C range and is used in the construction of laboratory-grade RTDs. Conversely, two widely recognized standards for industrial RTDs IEC 60751 and ASTM E-1137 specify α = 0.00385 Ω/(Ω·°C).
Before these standards were widely adopted, several different α values were used. It is still possible to find older probes that are made with platinum that have α = 0.003916 Ω/(Ω·°C) and 0.003902 Ω/(Ω·°C). Source: Wikipedia's Resistance thermometer.
There are very many manufacturers and several can make to order with case and lead lengths to suit.
I note that yours has only two wires. For industrial applications where the sensor may be remote from the amplifier a three or four-wire connection is made to allow correction for voltage drop along the current-carrying wires. Since yours does not have these additional wires it is probably located close enough to the measuring circuit that the error produced is not significant.
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H: Circuit design with multiple voltage levels
I'm working on an art piece based around an Arduino Mega that essentially requires power for three types of devices:
Solenoids (4): 24 V, ~100 mA a piece (400 mA, 9.6 W total)
NeoPixel LEDs (1280): 5 V, ~60 mA a piece (77 A, 384 W total)
Base stepper motor (1): 5 V, not really an issue because it can be powered with an H-bridge driver from the output of the Arduino
Since the LEDs are the primary current consumer here, we're thinking we'll use this 600 W, 5 V DC power supply (SE-600-5): http://www.meanwellusa.com/webapp/product/search.aspx?prod=SE-600
This power supply has three pairs of output terminals, and is rated for enough current to power the LEDs.
The concern here is how to step up that voltage from 5 V to 24 V to power the solenoids (with enough current). We are considering voltage regulators, boost converters, as well as a high voltage amplifier like the PB64 from Apex Technology (shown in Figure 4 here: https://www.digikey.com/en/articles/techzone/2018/apr/how-to-combine-high-and-low-voltages-in-a-single-design)
Does anyone have any experience with issues like this? How would you recommend managing two voltage levels?
Thanks so much!
AI: IMO it would make much more sense to use an SE-600-24 and use buck convertors to create a local +5V supply for your LEDS.
You have the potential to need conductors that will support many 10's of amps (if you have 4-5 major wiring runs) if you use a 5V supply and it is best to get this done at the highest voltage and lowest current possible. Running 5V any distance you will end up with significant voltage lose, and may end up with signal ground problems for your LED data.
There are plenty of 2-5A Buck convertors like this, this (I've used a bunch of these and I like the input capacitors) or this available at low cost that would support groupings of up to 50+ of your LEDs allowing much smaller wires to be used in your installation.
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H: Generating a Negative Voltage
In general, there are many ways for DC-DC conversion: SMPS, charge pump, linear regulators, zenner diodes, even resistive dividers. But lets say I want to create 2 voltage rails, +Vcc and -Vcc.
I can use an explicit negative voltage converter like an inverting charge pump or a buck-boost inverting topology converter, or even build a dual PSU that produces 2 rails centered around earth.
Can I achieve the same by just have 2 DC-DC converters, calling the middle node GND, and calling the low voltage -Vcc and the high voltage +Vcc? Are there any downsides to this method rather than using an already established GND and pulling a rail down with reference to that, aside from potential shorting risks to earth?
AI: At least one of the converters must be galvanically isolated (input to output). There cannot be a common between input and output. Using two isolated converters can help you deal with noise and ground loops in an analog design.
There is a potential issue with most single output converters not expecting a load that goes beyond their negative or positive rail. You can prevent any issues by putting a reverse-biased Schottky diode across each output.
There is an advantage over using an inverting buck converter for the negative rail in that the startup surge of an inverting buck can be very high, enough to potentially pull down the input source and prevent proper starting.
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H: RF Combiner Losses
I'm having a hard time understanding what is actually achievable with an RF combiner.
Let's consider this scenario, here port 1 of the RF combiner has a sinusoid at f1=100Hz and port 2 has a sinusoid f2= 1000Hz, each with 0 dBm in a 50 ohm system (e.g. each having Vpk-pk=0.632V).
In matlab I took these two signals and added them and we get the following:
The first question is, can a combiner actually produce a similar output (minus some small insertion losses)? I'm confused because per this application note from minicircuits, https://www.minicircuits.com/app/PWR2-4.pdf (see top of page 2) " If two signals at different RF frequencies are being added; then each signal will appear at the S port with a 3 dB loss. The internal resistor absorbs the 3 dB power loss for each signal."
Certainly it makes sense to me that if you added two in-phase, same frequency sinusoids in the combiner then your output wave would be 3 dB higher. But I don't understand whether adding non-coherent sinusoids MUST result in a 3dB reduction in each signal for ANY type of combiner or if the application note is referring only to a specific type of combiner? I've seen some notes about Wilkinson combiners having this 3dB loss here since the non-coherent waves won't cancel across the resistor.
If this has to do with the specific type of combiner, can anyone point me towards one that would allow adding of non-coherent sinusoids without this loss?
AI: Since the power is split into 2 paths and it is bidirectional, you lose 3dB in both directions, combining and splitting + 0.5dB typ. loss.
The advantage of this hybrid transformer method is the > 30dB of isolation between twin ports.
simulate this circuit – Schematic created using CircuitLab
The same behaviour is true for a Wilkinson and waveguide combiner.
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H: SC16IS740IPW alternative - want DIP housing
I am working on Infrared receiver based on Vishay's TFBS4711 and I've added SC16IS740 Single UART with I2C-bus/SPI interface for simplyfing communication with Vishay's IR transciever. Now, I am working on this subproject in Altium, and therefore I've varianted the PCB to through-hole and smd variant (for the sake of learning Altium and testing purposes of PCB once it is finished - through-hole variant will be used) and I cannot find alternative to SC16IS740, which resides in DIP/DIL housing. I've been searching on internet for about a week, without results, can someone help me.
P.S.: I am aware this is rather stupid question on the verge of downvoting, but I am getting simply desperate!
AI: Although you haven't actually listed which package of SMD SC16IS740 you have chosen, it doesn't really matter so much as there is no DIP packaged version.
Instead, flex your Altium skills further and make a daughterboard "breakout board" PCB. Just replace what would be DIP pegs with header pins to the correct pitch.
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H: LM2596 Cin requirements
I'm going to use an LM2596.
My maximum input will be 40V to a fixed output 5V 3A.
I've read in the datasheet that for Cin you need 1.5x for an electrolytic capacitor. So 40V x 1.5 will be some 60V. I've seen design and images from google of DC-DC Buck Converters featuring LM2596. They seem not to use 60+ V for Cin but can handle upto 40V input. What is going on here?
I've seen some schematic of that also only using 50V. Link.
AI: I've read in the datasheet that for Cin you need 1.5x for an
electrolytic capacitor.
The data sheet says this on page 15: -
The capacitor voltage rating must be at least 1.25 times greater than
the maximum input voltage, and often a much higher voltage capacitor
is required to satisfy the RMS current requirements.
So for the design you linked shown below: -
The 50 volt rating on the capacitor is adequate for an input voltage that might peak at 40 volts. But maybe you read about the output capacitor Cout by mistake: -
The capacitor voltage rating for electrolytic capacitors should be at
least 1.5 times greater than the output voltage, and often require
much higher voltage ratings to satisfy the low ESR requirements for
low output ripple voltage.
The general reason for both Cin and Cout sometimes requiring "much higher voltage ratings" is because with a higher voltage rating you usually get a significant improvement in current handling and lower ESR.
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H: Multi phase vs single phase power factors
Are there any differences between calculating single phase and multi phase power factors? I'm open to general answers, but more specifically:
If PF1=P/S, does PF3=(Pa+Pb+Pc)/(Sa+Sb+Sc)?
Does averaging work: PF3 = (PFa+PFb+PFc)/3?
Could a reactive load in one phase throw off the power factor of the others, or is power factor pretty well isolated between phases?
I thought I knew the answers to these questions from deriving them mathematically, but some meter readings today are making me question myself.
AI: Add all apperant powers as complex values then calculate p/s where p is the realpart and s its magnitude.
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H: What is this array-like notation of registers in datasheets?
I am reading BMP280 datasheet (pressure&temperature sensor). On different pages they use the following notation:
$$register\text{_}name[a:b]$$ where a, b are integers. For example, on page 13 "Enabling/disabling the temperature measurement and oversampling setting are selected through the osrs_t[2:0] bits in control register 0xF4".
How to interpret this notation?
AI: Those denote the bits within the register.
The bits are number 7, 6, 5, 4, 3, 2, 1, 0 so register 0xF4 is build up:
Control register 0xF4 bits: 7 6 5 4 3 2 1 0
<--->
osrs_t bits
In <----> you can set the temperature measurement and oversampling setting (osrs_t).
In Table 5 of page 13 you can see exactly the values and their meaning for these 3 bits:
If osrs_t would be stored in the MSB first 3 bits it would be mentioned as osrs_t[7:5], and if the entire byte is used, normally the [] will not be shown.
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H: TPL5110 doesn't work with NodeMCU
I am using a TPL5110 timer to drive my NodeMCU, in order to keep battery consumption low, but I can't let it work.
I have setup the standard circuit for this timer, as below:
Whenever I apply power from battery, TPL5110 starts blinking without providing power to NodeMCU. If I disconnect the NodeMCU load, the timer works fine. Whatever load I apply to the timer, it performs like it should, except if I connect it to the NodeMCU (which is draining just 80 mA). I have also tried with an opto-isolator, but I got same results: it is like the TPL5110 doesn't like the NodeMCU's load.
I came to the conclusion (after buying 3 TPL5110) that this timer is a cheat for use with NodeMCU. I hope I'm wrong.
AI: I fixed it by installing a 2,200 µF capacitor between NodeMCU's Vcc and ground, to filter startup spikes.
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H: Pass a signal in low-level entities and update it back in top-level entity in VHDL
I have tried a lot to pass a signal that is in a top-level entity, to a low-level entity as an in-port and do some operations on that signal and let the changes happen to the main signal.
Here i just used inc_tb.vhd (as a top-level module) that has a signal named PC and inc.vhd (as a low-level module) that gets the PC and increment it by one at clock edge. But whatever i do, PC gets the 'X' value.
How can i do this?
This is the inc.vhd (low-level module):
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
use work.types.all;
entity inc is
port(
clk : in std_logic;
pc_in : in std_logic_vector(11 downto 0);
pc_out : out std_logic_vector(11 downto 0)
);
end entity;
architecture behav of inc is
begin
process(clk) is
begin
if(rising_edge(clk)) then
pc_out <= std_logic_vector(unsigned(pc_in) + 1);
end if;
end process;
end architecture;
This is the inc_tb.vhd (top-level module):
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
use work.types.all;
entity inc_tb is
end entity;
architecture sim of inc_tb is
-- inputs
signal pc : std_logic_vector(11 downto 0) := x"004";
signal clk : std_logic := '0';
begin
-- DUT
CPU_1 : entity work.inc(behav) port map(clk, pc, pc); -- i want this to just increment pc
-- clock event
clk <= not clk after 5 ns;
process is
begin
wait for 10*100 ns;
wait;
end process;
end architecture;
AI: You can't use the same signal as in- and output.
Don't forget that you're not programming a sequential programming language. In
entity work.inc(behav) port map(clk, pc, pc);
The first and second pc are actually the same wires! (In fact, I'd expect your synthesizer to even complain about pc being driven by multiple drivers.)
This might indicate you're not already very familiar with the nonsequential logic of HDLs. Going back and doing a more basic VHDL tutorial might really pay off for you, and save you a lot of time overall.
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H: Why is the parasitic inductance placed in series with the resistance in the treatment of a real resistance?
As seen in the following image, the parasitic inductance is placed in series with the real resistance.
I do not understand that it is the reason for this decision, whether by convention or there is a reasoning behind it. It's probably a trivial question, but I'm starting to study electronics and I'd like to understand this basic thing.
AI: The inductance must be in series because if it were in parallel with the resistor then the dc resistance would always be \$0 \Omega\$.
The capacitor must be in parallel because if it were in series the dc resistance would always be \$\infty \Omega\$.
These elements are where they are because the inductance tends to increase the impedance at high frequency while the capacitance tends to decrease the impedance at high frequency.
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H: DC-DC switching converter PCB design
Recently I had a problem with noises in my led driver. I realized that my PCB design was terrible, so I redesigned whole PCB following common rules.
Could you take a look and check if my new design is ok?
Thanks for all answers.
AI: As @Jasen said: this will probably work fine, and I also agree with the other comments, about keeping it small etc.
Some additional thoughts:
C6, C7, C8 are probably not necessary
Like @winny said: move L2 to the right. In order to do that, you could move C2 to the left, especially if you would decide to omit C6,7,8 (or at least 2 of the 3)
You can probably do with just one C3, C4 or C5
All the vias on the left, near the connector can go. Your connector is through hole, and that should be enough
All the vias near C4/C5 can go, except for maybe one or two
Most of the vias near C1 can go, max. 4 should be enough
The vias near C3 can go as well
If you would 'lower' the Vcc trace on the top, you could make room for the GND trace to connect the connector with C1, and not need any vias at all around your capacitors. You're only drawing 488mA, so that shouldn't be a problem
The vias underneath U1 are probably also for heat? If so, check that there is no solder mask on them
Besides U1, the other part that will become more warm/hot is D2 and maybe the inductor
I like the position of D2 and the current sense resistors :-)
What kind of inductor are you using? It's quite common to use something like this:
As long as it's a ferrite inductor, you're probably ok, just checking.
You might want to consider bringing the DIM pin out to the connector as well. Might be fun for future use... ;-) You can PWM the DIM pin, or apply 0.5 - 2.5V on it to make your LED dimmable.
You're really on the right track here, not bad at all! Just some thoughts and possbily some improvements. And of course this is IMHO.
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H: PCB key contact
Hi! anyone knows how to design a pcb like this in the photo with eagle? Someone has a guide to do it? I don't know how the resistor should be placed.
It is basically a pcb for a synth, the key contact pcb
AI: Looks like a silicone molding placed over a PCB. The PCB will have either gold-plating or a carbon printing where the key switches bridge electrodes.
You can find design guides for this sort of thing, but if you have a source for the silicone keyboard molding, they would be the ones to ask.
Here is one such design guide.
The exact tool (eg. Eagle) you use to implement the design is not a big issue, the main issue is designing the patterns themselves.
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H: Upload pcb project on pcb service - Error
I have found a pcb service online: aisler.net.
After uploaded the project on the site appears the board prew with a error message:
"The board does not contain outer bounds. It can't be manufactured like this. The outer bounds should be on the dimensions (EAGLE) or Edge.Cuts (KiCad) layer.".
What does it mean?
How can I solve this problem?
AI: Add a layer to your board that has the outline of the board. This will define the shear lines, router bit paths and V-groove lines in your board. In a simple board it is probably just a square or rectangle, on a more complex board it may have text on it to indicate V-groove cuts, routed slots between mouse bites, etc.
Output and include the Gerber file for that layer and send it to the PCB house.
You may import the outline in .DXF format from a CAD package, especially in more complex situations where the board contours are not a simple rectangle or rectangle with rounded corners.
Personally, I usually use the Mechanical 5 layer in Altium, but it's arbitrary.
Here is a typical outline layer as displayed in Camtastic:
The width of the lines is not too important, the cuts will be made to the center of the lines, so something like 0.2mm that is wide enough to be easily seen, yet not too crude, works well.
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H: Looking for a PCB flag/indicator component
I am designing a test jig (within a 6U rack) that mates with 6 removable trays. Each tray can hold 16 sensors which can also be removed. The system will be intended to function in the following way:
Technician will populate all trays with sensors,
Trays are entered into rack and all sensors are tested,
Trays are removed from rack and sensors that failed are removed first and binned. The rest are passed and bagged.
My issue is production have requested for indicators next to each of the sensors on every tray that indicate a pass or fail.
When the boards are disconnected from the rack they lose power and although LEDs and external battery would be the first solution....they have asked for alternative solutions.
Is there such a component as an indicator relay or something along those lines? If anyone has a good solution for this issue then please let me know.
Software GUI is currently ruled out also as they believe looking at a screen and then at a PCB could lead to human error...
AI: There are non-volatile electromagnetic indicators that can be used.
They are a little oddball though. They were originally developed by the Canadian unit of Ferranti-Packard, but the patent has long since run out.
They work like a bistable relay (electromagnetic) and retain their state with power off. In the old days they were used in quantity for airline status displays in airports.
Personally I would consider fitting the trays with batteries (or applying power later) and using LEDs. You could store the information in a non-volatile memory such as a small microcontroller with on-board EEPROM or FRAM if the power has to be interrupted.
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H: LED strip appropriate for fiber-optic cables
A project will use 20 fiber optic side-glow cables, 3mm-thick, with one controllable LED each. A WS2812 LED strip or similar would be perfect for the ease of controlling the LEDs, however all that I've been able to find seem to be difficult to attach the fiber optic cables to. Using a "regular" diode, I could just attach it with heat-shrink tubing.
What would be a convenient solution to this problem?
AI: You should look at the WS2811 device which allows you to drive 3 individual LEDs. This is essentially the data controller and LED driver chip that is used in the WS2812 without the LEDs.
You can then drive one light pipe with each of the channels and 7 chips would provide control on a single data channel.
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H: Why doesn't voltage drop across this resistor when transistor is off?
The following excerpt from a book explains the functioning of the circuit below:
When V_in < V_th (device threshold voltage), the supply voltage (V_dd) is measured at the outlet. When V_in is increased above V_th, the NMOS turns on and V_dd is now dropped across the load resistor; V_out is now in common with ground, and the signal at V_out is inverted relative to V_in.
Question: Why is V_out = V_dd when the NMOS transistor is off (i.e. when V_in < V_th)? With the transistor off, it seems we should effectively be able to ignore that part of the circuit and compute V_out using Ohm's law to predict the drop of V_dd across the resistor. Why is this not the case?
AI: From the comments:
... but I am not sure why the book would be assuming no circuit connected at Vout. This section of the book is talking about integrated circuits (and said this circuit was commonly used in IC's after 1980). It would therefore seem safe to assume that there will always be another circuit attached so that Vout of this circuit is Vin of some other circuit. Do we know that this won't change the circuit behavior "too much"? That is, do we know that this voltage inversion switching will still work if we add another circuit onto Vout?
This is actually a fair assumption for MOS if they are driving other MOS devices.
Figure 1. The output (1) of one gate typically drives the inputs (2) of other gates and these have a very high input impedance.
Note that this will really only be true in the steady state condition. When switching occurs then the input gate capacitance has to be charged via the Vdd resistor and a voltage drop will occur as you suspect. It is this switching power dissipation that generates much of the heat in high-speed logic.
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H: What load can i connect if data sheet is missing output voltage
I am looking at a DC to DC converter data sheet that has an input voltage of 0V-100V. The datasheet only mentions a max output current of 4 amps. Is it safe to assume I can place a load of any voltage as long as it is lower than my input voltage, and draws less than 4 amps?
I have attached the data sheet for reference. Converter Data Sheet
AI: I am looking at a DC to DC converter data sheet that has an input voltage of 0V-100V.
Figure 1. From the datasheet.
No you're not. That's in input filter for a DC-DC converter. From the datasheet:
Power-One offers a complete range of input filters to
help control EMI in board-level DC-DC converter
applications.
The voltage rating will tell you the maximum voltage that the filter can withstand between positive and negative lines.
The current rating is the maximum current that the device can handle through the filter.
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H: Am I using my multimeter correctly to measure current?
I've wired up a simple circuit using:
9V Battery
Blue LED
220 Ohm Resistor
I was expecting a much higher value of mA? Is it true it's only 0.8mA?
Shouldn't the LED light up, since we're closing the circuit with our multimeter?
Thank you!
AI: The first thing to do is verify that your equipment works, in a lot of cases measurements that don't make sense can be from measurement error.
First test only the resistor from 9V to ground, you should measure 40mA.
If not then check the fuse and also check the batteries in a meter, low batteries can give false readings.
I also see that the LED is not lit, so this could indicate that it may be damaged. It may also be that the LED is backwards which would be a problem. Check the LED with the diode mode on the meter, it should be around 3.5V for the forward voltage. With the LED and resistor you should get somewhere between 20mA and 30mA. And the LED should be lit.
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H: 3mm different color LED resistances for bright light
I am trying to power a number of different color LEDs with a 5V wall-wart power supply able to deliver 2 Amps.
I tried to make them light with equal intensity and I like them to be bright. (They get quite irritating to the eyes)
I get the following resistances:
blue: 5K, yellow: 350Ω, red: 150Ω, orange: 1K, green: 50Ω
Do the values make sense? The 150Ω and the 50Ω resistances get quite hot.
Am I doing anything wrong?
AI: This diagram may help.
Figure 1. Figuring out the required voltage drop across the current-limiting resistor for a green LED at 20 mA. Source: LEDnique.
The graph shows the VF (forward voltage) of various LEDs at currents between 0 and 50 mA. We can see that at 20 mA the green LED will drop about 2.25 V. You are feeding from a 5 V supply so that means that the voltage drop across R is 5 - 2.25 = 2.75 V.
From Ohm's law we get \$ R = \frac {V}{I} = \frac {2.75}{0.02} = 137 \ \Omega \$. Pick the nearest standard value.
You can easily work out the resistor values for each of the other colours too.
For other currents slide the diode and resistor vertically to the desired value.
An alternate approach using the same graph is to draw the load-lines for a range of resistors.
Figure 2. Various 5 V resistor load-lines overlaid on IV curves.
[OP used] (1) blue: 5 kΩ, (2) yellow: 350 Ω, (3) red: 150 Ω, (4) orange: 1 kΩ, (5) green: 50 Ω.
Let's plot these points on the load lines.
Figure 3. The OP's resistor values found to give reasonably even brightness on a range of colours.
The plots indicate to me that there is a very large discrepancy in the efficiency (or possibly the optical focus) of the LEDs. If they were all the same efficiency the points should be close to the same height off the horizontal axis. From the results it appears that the blue is super-high efficiency but the green (which is in the most sensitive region of human vision) is terrible.
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H: What value of C should be added in parallel to make the circuit appear purely resistive?
I'm currently working through Cogdell's Foundations of Electrical Circuits and came across problem 4.39 d) as shown below:
Earlier in the question I found the frequency-to-be-used as 43.3x10^3 rad/s. Now, in order to make the circuit appear purely resistive the reactive part needs to sum to 0. In part c) of the question the capacitance was being added in series, so I simply used wL-(1/wC)=0. For d) however, the capacitance is to be in parallel with the inductor, leading to the (seemingly) unsolvable equation:
The book says the answer is C=0.1uF, and that it should lead to a real impedance of 400ohms. The only approach to this question I haven't taken is using the formula for the impedance angle for an R(L||C) circuit, but I'm not actually sure what that formula is. Any insight or hints are appreciated! Thanks.
AI: No, you should consider the capacitor in parallel to the input ports, like below:
Now it's easier to first find the input admittance and then put the imaginary parts equal to zero to find the right capacitance. Reverse the real part to get the real impedance.
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H: Wrong value with LM2937
I designed a PCB accoridng to the schematic above and here is the PCB:
It's not working as it' supposed to be.
After LM2937ET-10 (package SOT-223), I'm supposed to get +10 between pin 3 and pin 2 of this chip.
But when I put my 12v on input, I only measure 3V as output instead of 10. Is there something wrong?
AI: Your PCB routing for ICL7660 is wrong. Input and output are reversed, which I suspect simply shorts the output of LM2937.
Also, it is bad idea to use internal connection between tab and ground pins of LM2937. Either leave tab floating or (better) connect them together, exactly as datasheet recommends
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H: True 5V CPLD other than PIC/Altera ATF150*?
Are there any True 5V CPLD's families still in manufacturing other than PIC/Atmel ATF150*?
I am talking not just "5V tolerant IO", but rather ones with 5V VCCIO, able to drive 5V loads without external pull-ups. I've heard Chinese are joining FPGA/CPLD race, maybe there is a chance?
AI: The ispMACH4A5 family from Lattice Semiconductor. For example: M4A5-32/32-10JNC. These parts are JTAG programmable and range from 32 to 256 macrocells. Plenty of stock on DigiKey, not sure about production. I used them in many designs in the 90s and early 2000s.
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H: What comes after you have programmed a Bluetooth Low Energy chip with Nordic SDK and are ready for deployment?
I am working on this project with bluetooth low energy and it seems I will have to order the Nordic Semi DK kit for one of their nRF51 series chips. I am just curious (and an amateur at this), once one has written the program to be compiled and stored in the chip and tested the program with the DK board, you still obviously have the dev board attached to the chip. Once youre ready to manufacture a PCB do you just order the chip itself and load the compiled program in via an input mechanism on one of the chip's inputs or how exactly does that work most of the time?
AI: Development board to custom hardware:
Development Boards (dev-boards) are incredibly useful for quick prototyping. Typically, after validating your initial design using a development board, you would move to designing a custom PCB suited for your application. Software development can then continue using your application-specific hardware.
Possible reasons to design a custom PCB:
The product needs to fit in a specific enclosure.
Smaller PCB = lower cost PCB in mass production (development boards can be large relative to your product).
Not all components on a development board are required in a mass-produced product. Reducing part-count lowers your cost.
The list goes on. All of these points fall under the princicple of Design For Manufacture (DFM).
Programming your custom hardware in the factory:
You may be able to include a programming connector on-board. This can be any connector that interfaces your hardware to a programmer (such as a Segger J-Link).
There are a few reasons not to use a connector to program mass-produced products:
It is often not desirable to require an operator on a factory line to plug in every single board to the programmer manually. This takes operator time, which is valuable.
Adding a connector onto your product for one-time programming incurs unnecessary cost.
Connectors consume space on the PCB, which (depending on your product size) you may not have.
One very common solution to this is to use a "bed of nails" fixture. This involves pads on the bottom of your PCB that line up with spring contacts on a programming fixture. Not only can this be used to program your finished PCB, but can also make test-points available for automated checking on the factory line.
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H: Art of Electronics figure 5.87 (revised)
The circuit below comes from the errata of The Art of Electronics. Why is the circuit in Figure 5.87-B (bottom) correct?
As drawn, 50 mA at output will mean -5V at the inverting input of the Op-Amp. Actually, I would expect that 50 mA causes +5V and the circuit is at the Full-Source operation point (1V/10mA).
Should the errata be corrected? In the original figure (printed book), the inputs of the In-Amp are swapped.
Thank you in advance!
AI: On first sight, the instrumentation amplifier is wrong actually, not the input opamp.
But when looking closer into it, we have to make a change to all three active components!
A. Why change the instrumentation amplifier?
As drawn, when the output is +50mA, the instrumentation amplifier should output -5V which is lower than ground. If it is positively powered as in circuit A, it can not reach that level.
Exchanging the +/- pins of the instrumentation opamp would make it present 5V on the '-' input of the input opamp. In that case with an input at 5V, the circuit would be stable.
B. Why not change the input opamp?
Exchanging the inputs of the input opamp would make the feedback negative, but the input would have to be -5V to have 50mA at the output. That does also require that both opamps are powered from something lower than -5V and positive power (VCC).
C. The "disturbing" 100pF
Let's not forget the 100pF.
If we change the +/- positions of the input opamp, the feedback through this 100pF is correct. A sudden increase in output current, would lower the output of the instrumentation amplifier which would lower the voltage on Q1's base and decrease the current by lowering the voltage presented to the load.
Correcting the +/- inputs of the instrumentation amplifier (which is the good solution up to now), the 100pF works counterproductive. An increase in current will increase the Q1's base and hence increase the output current (as the output voltage increases).
So well, do we have to drop this 100pF? There is a good reason to have it!
D. Change "everything"
Therefore I would make another change: exhange Q1 for a PNP. The current is determined by the voltage drop from VCC to Q1's base, and hence (mostly) independent of the load.
Now wait a minute! That changes the feedback loop!!!!
With the PNP, I need the opamp's output to decrease for increasing current. So I have to change the +/- inputs of the input opamp. With the input connected to '-' the opamp output will drop with increasing input voltage. I need to change the +/- inputs of the instrumentation amplifier as well (the + needs to be at the top, - at the bottom), to make sure that its output increases with increasing current to decrease the gap with the '-' input of the first opamp.
Is the 100pF capacitor ok? Yes! With a sudden current increase, the output of the instrumentation amplifier increases, so Q1's base voltage will increase, which will lower the output current. Instant negative feedback for fast changes.
E. Conclusion:
Change +/- locations of both opamps, and,
Change Q1 into a PNP.
And that's the ART of Electronics!
F. Addendum (additions after the comment(s))
Does the 100pF value need to change? I can not tell from the schematic because an important element is missing: the load's value.
With the NPN, the 100pF actually depends on the load. The load changed the open loop amplification and phase. Why? Because an increase in voltage on the base of Q1 as an NPN resulted in the same voltage increase on Q1's emitter and hence a direct increase in the voltage of the load. That meant that the open loop current amplification by Q1 was \$1V/R_{load}\$ .
With Q1 being a PNP, it's current amplification is known. It is about \$1V/22 \Omega\$ . The voltage on the collector will "adapt" to the load.
So if the 100pF was correctly designed, it can be kept as-is for a \$22\Omega\$ load. If the load is different, then either the 100pF must be adjusted by the same factor, and/or the \$22\Omega\$ can change too. If we want a less power loss in the \$22\Omega\$ and divide its value by 10, then we must increase the 100pF by 10.
The exact value chosen for the 100pF depends on : the phase margin required for the closed loop, and the frequency range for which we want the regulation to work.
Ignoring all else, the 3k3 resistor and the 100pF seem to set a 3dB point at about 3kHz. 3kHz is fairly low and likely far from any phase margin requirement. If we consider the load resistor which was in series with the 3k3 resistor, I expect little change. To get 50mA at 8V, the load should not be higher than 160 Ohm, so that changes not much to 3k3.
With the NPN, we add the \$22\Omega\$ resistor, which is a known, so the 3dB frequency from this filter will not change much.
So, my best guess is to keep 100pF, to stay at a 3dB frequency of 3kHz, and I think that phase margin will be ok.
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H: How can a signal itself have a high impedance?
Observation: Recently I worked with a piezoelectric sensor and read that the sensor itself has a high impedance. Because of this, an op amp of high impedance was required to amplify the signal.
Question: How is it possible for a signal to have high impedance? How can the signal itself have resistance / reactance (I understand there will be very low amounts of resistance in the wire that the signal travels across.) Shouldnt the signals resistance / reactance be determined by which circuit is connected to?
Disclaimer:
My background is in computer science and my knowledge of electronics is pocket sized. Sorry in advance if this question is based of misconceptions on my part.
AI: In electronics a high impedance signal would refer to a signal from a high impedance source (and low power).
I've only observed this expression applied to low voltage applications. It would not be applied to a high voltage source which is generally also high impedance.
In your observations you indicate that the source has a high impedance and that it is therefore required that the load also has high impedance - so you're not talking about a high impedance signal!
Officially a signal does not have an impedance, but we can come very close to it when the signal is in a transmission line. At that time it must have the transmission line's impedance. That is: the voltage to current ratio in the transmission line is determined by the transmission line - nothing else. Reflections at the terminals of the transmission line balance it out.
The wires with low amounts of resistance are in fact the transmission lines where I would technically accept to talk about the impedance of a signal, but that would not be what somebody means by the impedance of a signal.
A. Can a signal have high impedance?
Think of high impedance signal as a signal coming from a source with a high internal impedance and a very small power level. Avoid using it as an expression as it is technically incorrect.
B. Is the signals resistance/reactance determined by the circuit it is connected to?
When refering to the signal source impedance, that impedance is "by definition" determined by the source, not by the circuit it is connected to. The circuit it is connected to will contribute to the resulting current flow(s) and voltages.
In my opininion it is more correct to state that the signal impedance is determined by the transmission line through which it flows, not by the circuit it is connected to. But that is not the "conventional meaning" of "signal impedance" in engineering conversations. It would only be understood as such in in-depth exchanges where such definitions would be avoided.
C. Extra info
When a signal source is high impedance with low power, it is best to amplify the power with a circuit that has a matching load. The load should be the "complement" of the source. If the source would be 1 MOhm (purely resistive), then the amplifying circuit ideally has an input impedance of 1MOhm to transfer as much power as possible. Other factors come into play. In most cases though, the input impedance will be chosen to be higher than 10 MOhm as a lot of engineers will choose to build a voltage amplifier rather than a power amplifier.
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H: Kickstarting an opamp for oscillating?
I have been building many different variations of op-amp oscillators but have come across a recurring issue that has manifested itself again in this VCO schematic:
I find that when turning on my power supply I get waveform output for about half a second and then an instant cut off. I used a potentiometer as a voltage divider and it seems to work. (Turning the supply on and off again and listening to the pitch of the wave). I run the various circuits from a +/-12V supply with a third ground connection and have tried using TL072 and TL082 opamps but to no avail.
The Issue: When I build op-amp oscillator circuits (other than schmitt trigger oscillators which work perfectly every time) I find they need to be "jumpstarted" in order to start oscillating, I consistently encounter issues where turning the frequency too high permanently "turns the oscillator off", the oscillator slowly goes down in pitch only to stop outputting completely and the aforementioned issues.
The Question: Is there a common link/issue with op-amp circuits that cause these issues? When simulated, all the circuits output the correct waveform yet seem to be completely inoperable when actually built. Why does a schmitt trigger op-amp oscillator work perfectly every-time yet other don't? What do other oscillators (say a triangle/saw oscillator) rely on that a simple square wave relaxation oscillator does not?
AI: You main problem is the NPN Vce(sat) . Although this will be close to 0V if the control V is closer to 0, the frequency drops and it stops
This topic has been discussed many times in this forum, but I offer new improvements.
Issues:
Single supply
Vout must be <<0.5V to NPN, otherwise add 1K across Vbe or use any NFET.
Signal level can be boosted by reducing positive feedback ratio from 2:1 to 1:10
e.g. Rf/Rin+=1M:100k with 1M to Vcc/2 or 2M pullup and 2M pulldown.
This yields a 10V swing on a single 15V supply centred at Vcc/2.
Split Supply.
Vout must not exceed Reverse Vbe max of -5V. It’s better to use an NFET here.
change +5V Vref to 0V for symmetry
Both configs above
Vcontrol in all cases using Vbe ref to gnd becomes Vcc*2 minus headroom or Vcm max.
If the control voltage = 0V , it will stop oscillating, which isn't hard to avoid, examine in put offset voltage.
use any NFET instead of an NPN
Victor raises a good point with the input diodes, but the Vin+ input resistors limits the input current, so this is ok for LM358, because we are operating at 0 gain when clipping as a comparator. Otherwise CMOS OpAmps differential inputs can be kept to a minimum with matching 100k series R inputs and adding protection diodes.
Adding a series 100K to balance the input Z and offset voltage for better symmetry from input bias current.
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H: Arduino Nano disconnecting from PC on plugging in 3.3v NRF24L01 into PCB
I've built this PCB which includes two I2C port expanders, an Arduino nano, inputs for buttons and encoders, and headers to plug in an NRF24L01 board.
Currently, I just have code running to read two encoders plugged into J12 and J11 on this schematic, and send how far each of them have turned over the serial port.
This all works perfectly, the problem comes when I plug in the NRF24L01 into the headers on the board. As soon as I do, the arduino disconnects from the PC; I get the little noise from Windows, both the COM port and the device disappear, and it resets the arduino. However, I can still see the TX LED light up, so the code is still running and the data is transmitting over serial, the PC just doesn't see it anymore. As soon as I remove the NRF board, the nano reconnects and works as usual.
I've tried plugging in an external power source and get the exact same behavior, so I don't believe it's an issue of the NRF drawing too much power. I've tried several different NRF boards as well, so it isn't an issue with the specific board I have plugged in.
What could my problem be?
AI: Nevermind, I'm an idiot. My problem was unrelated to any power issues. I noticed that 70mA seemed much too high for a chip that's supposed to draw 12mA at the absolute most, and after taking a closer look at the PCB, I realized I swapped the two rows of four pins horizontally, so every pin was connected wrong. After wiring it correctly with jumper cables, the problem is solved and the NRF works fine.
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H: Relation between Mbits/s and MHz
I am trying to communicate with an ADC via SPI. In the datasheet, It is mentioned, that:
The performance of the ADC161S626 is ensured
over temperature at clock rates of 1 MHz to 5 MHz – DNL +0.8 / −0.5 LSB
and reference voltages of 2.5 V to 5.5 V
I went to STM32CubeMX to configure SPI. I found that the one I am using is connected to APB1 which works at 80 MHz. There is a prescaler for SPI that divide this value but I noticed the result is a baud rate not a frequency (MBits/s). So, my question is: to correctly set the clock frequency for the SPI, should I consider that MBits/s is equivalent to MHz and set this latter to a value between 1 MBits/sec and 5 MBits/s ?
AI: (Updated after P__J__'s comment)
Yes, if you count within one byte (see explanation below).
No, if you count over multiple bytes, because of the gap between the bytes.
[]
(Note that instead of ASCII, any data can be sent).
As you can see the clock speed has an up/down pulse, and this corresponds to 1 bit. So 1 mbits/s equals the 1 MHz clock speed (or in other words, in 1 million clock pulses, 1 million bits can be sent/received).
This is not mandatory for all protocols, but for SPI it is.
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H: Inline Voltage Divider - do they exist?
I'm looking for a neat off the shelf solution to halving a voltage via a resistor network. Some kind of small module, (probably GND, signal in, signal out) that can be wired inline with a sensor that delivers 0-10V for feeding into a 0-5V ADC.
I do NOT want to make my own PCB, enclosure etc. This should be something that can be dropped straight into production equipment.
I have tried googling the title desription but nothing comes up. Do such devices exist, and if so what are they called?
Thanks for the replies - the term I am looking for is "precision attenuator"
AI: "wired inline with a sensor"
What cabling are you using for the sensor? You can get inline attenuators like these:
http://ch.farnell.com/aim-cambridge-cinch-connectivity/27-9300-6/bnc-attenuator-male-female-6db/dp/2357852?mckv=s6zXSYADd_dc|pcrid|90940810960|kword||match||plid||slid||product|2357852|pgrid|18061213600|ptaid|pla-294680686006|&gross_price=true&CATCI=pla-294680686006&CAAGID=18061213600&CAGPSPN=pla&gclid=EAIaIQobChMIrtCovZni3AIVxuR3Ch09RQ1xEAQYASABEgJr3fD_BwE&CAWELAID=120185710000331336
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H: 12V motor or 24V motor for go-cart?
I am making a PVC electric go-cart. I want to know which is better: a 12V motor or a 24V motor?
I want good speed and good torque, because I don't want it to struggle with my weight (I weigh around 210 lb). So what's better for this project?
AI: The voltage of the motor does not determine the torque. A motor manufacture can produce a motor that operates on 12 volts, another one on 24 volts, and the mechanical output can be the same.
But if I were to have the option of selecting between two identical motors, one being 12 volts and the other 24 volts, I would pic the 24 volt motor. For the same power the current will be half. This will allow for thinner wire to be used and control electronics that will not have to switch as high a current. Or the same size of wire can be used and there would be less power loss in the wiring if 24 volts was used.
But another consideration is the available battery. Getting a single 12 volt battery is easy and relatively less expensive. For 24 volt there would be either two 12 volt batteries in series. It adds some complexity but that might be acceptable. Or for example, if a lithium battery pack were available in 24 volts (approximately) with the required capacity, then that might be a good solution.
Basically there are a lot of considerations and tradeoffs that can be made. The whole design needs to be considered. All the pieces. And as I said, the actual motor voltage is not relevant as far as output power delivered. Look at what someone else has done and see if it makes sense, if you can find the equivalent components you need.
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H: Pick largest of several voltages with analogue comparators
This is not an XY problem. I have already decided that the best way to handle the actual application is to use a multiplexer and ADC/MCU to measure all the voltages.
However, I am always keen to find a neat new way to hook up opamps or comparators. This is an 'does this configuration exist in a neat way' question? I've not managed to find one yet through the normal search routes.
Inputs - 6 or so positive signals in the 1v to 2v range
Outputs - one amplifier or comparator output per signal, where that corresponding to the largest (or equivalently the smallest) voltage has a unique, perhaps high output, and all the others have a low and similar output, such that they are already logic-usable levels, or can be compared against a simple threshhold to give logic levels.
Ignore input voltage offsets as being insignificant with respect to the input voltages. Hysteresis is optional. Scalable to any (reasonable) number of inputs.
It's relatively easy to output true for all the signals that are above the average of the inputs. Just form the average with an equal resistor network, then use this voltage for the reference input to each comparator.
What I feel should be possible is some sort of diode feedback, like in an absolute value circuit, where the gain of an amplifier reduces the diode drop to insignificance, and the 'winning' amplifier/comparator silences all the others. However, I've not managed to find a simple configuration yet.
What's a simple configuration? One amp per input, with at most two additional shared ones. One diode, or at a stretch two, per amp, with at most 4 resistors per amplifier, and a few extra shared, with as few as possible needing matched values.
Any thoughts?
(edit)
I have the outline of a solution which involves an integrator which controls a common reference level. This level ramps down if no inputs exceed it, and ramps up when any input exceeds it. The level will tend to hunt around the largest level, with the comparator output corresponding to the largest flicking on and off. Replacing the comparators with amplifiers and paying attention to stability may result in a steady output that's suitable.
AI: It turns out I could smell the solution. It's interesting to see how long it took to get there, needed me to post a question to make it happen, and my thought process went via the intermediate ramping integrator edit to my question.
simulate this circuit – Schematic created using CircuitLab
It's intended that all channels are identical. However, I've drawn channels 1 and 2 as the simplest possible, and left channel n to receive embellishments.
Consider all inputs except input 1 low. Amplifier 1 works as a follower, with its output a diode D1 drop above its negative input, R1 pulling a modest current through the diode. All other amplifier outputs will be at the negative rail, with their diodes reverse biassed.
As input 2 increases in voltage, it will eventually exceed the common reference voltage on R1, OA2 output will go high, pulling the common reference up to its input voltage, which will send amplifier 1 output low.
If we assume a sufficiently low impedance driving the inputs, I've shown on channel n how a sniff of hysteresis can be applied to the input.
The active output is a diode drop above the input voltage. The inactive outputs are near the negative rail.
To make this easily discriminated by logic, the inputs need to be guaranteed to stay some reasonable voltage above the negative rail. This will happen automatically if the inputs are strictly positive, and the amplifiers receive a negative rail.
With sufficient positive rail available, the diodes could be replaced by elements with a larger voltage drop, for instance several series diodes, or a LED, to increase the voltage excess of the output over the input. Using LEDs would make a nice self-indicating circuit, as long as the LED reverse breakdown was not exceeded, or they were protected by a proper diode in series. If they were inputs to optocouplers, they could be used to drive logic easily.
In an effort to get better logic levels out of the system, I've added Qn. It works as a cascode, transferring the amplifier output current to R1, but only when the output voltage is about 2 diode drops above the logic high reference voltage. Dn could be omitted, as long as the reverse VBE limit, usually around 5v or so for silicon, is not exceeded when the output is low. This now ensures that the outputs are nearly negative rail for low, and logic high reference + 1.4v for high. It does increase the loop gain of the system, so might compromise stability. I'd need to think about that. A resistor in series with Qn emitter would control the gain, and while it would destroy the relatively constant output high voltage, at least the output high voltage is guaranteed to be above a certain voltage, regardless of how low the winning input voltage is.
An essentially identical scheme can be configured to select the smallest input voltage.
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H: SLA battery constantly being charged and used
I have a 12V 7Ah SLA battery with a smart battery charger for SLA batteries with the maximal output of 0.8A.
I would like to use the battery to charge an Arduino board with few other things (at most 0.5A current consumption). Several times a day, the battery must be used for few seconds to power a motor (which takes few amps).
The battery must be contantly used for powering the board. Is it safe to charge and use the battery constantly? Is it a standard use case, can't it reduce its lifetime?
AI: You aren't really charging and using it at the same time in reality. This is the same when you use your smartphone, whilst plugged into a charger.
Any power required by the system (in this case the motor, and your aurdino board) is taken from the power input (the smart battery charger input). Anything remaining in the power budget is then used to charge the batteries. This means you are charging the battery, but powering the system straight from the main input and not the battery.
The trickier situation is when the power required by the system is greater than the main power input. In the common example is when charging a phone from a PC (only 500mA) and the phone is using more than 500mA (especially common when using GPS). This situation requires sourcing power from the battery at the same time as using main input power, and is requires some kind of load balancing. In this situation the battery is not charging - it is discharging.
This has no real impact on the battery life, beyond the usual charge/discharge fatigue you would expect.
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H: Symbols: Double-arrow circle enclosed "10" on electronic appliances
What does the symbol that says 10 inside the double arrowed circle mean? I have seen a similar symbol on another appliance that had the number 25
AI: That's a Chinese RoHS / recycling indication: Under RoHS 2, manufacturers must indicate dangerous chemicals inside on the outside. The number in the circle is an indication for the "Environment Friendly Use Period", the period in which it's safe the contained substances will not leak out.
10 in your circle means that it's pretty safe that for 10 years, no RoHS-critical substances will leak out.
https://www.electronicsweekly.com/blogs/directive-decoder/china-rohs/china-rohs-new-efup-guidance-2007-03/
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H: Question about equation for LT3750 capacitor charger IC
I have a question about the equation for minimum primary inductance on page 8 of the data sheet for the LT3750 high voltage capacitor charging IC.
The equation in question:
$$L_{\text{pri}} \geq \frac{V_{\text{out}} \times 1\text{ }\mu \text{s}}{N \times I_{\text{pk}}}$$
My confusion comes from the (× 1us) part. Would the minimum inductance for, say a circuit with an output of 600V, a peak current of 3A and using a transformer with a ratio of 1:10, be
$$\frac{600 \times .000001}{10 \times 3} = 0.00002\text{ uH}$$
or
$$\frac{600 \times 1}{10 \times 3} = 20\text{ uH}$$
or something else?
AI: Since 0.00002µH sounds way too small, I would assume 20µH. This hunch is further backed up by the chart of recommended transformers on the same page.
If they wanted you to use 0.000001 in the numerator, they would have written it differently in the datasheet.
Since this equation is very similar to
you can hopefully see what they are getting at.
If you convert the seconds to microseconds, you are also changing the henry to microhenry. So your first equation is correct if you change the units in the answer to H instead of µH.
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H: Relation between the impedance of speaker and amplitude of sin wave?
I have an oscillator producing a sine wave with amplitude 3 V (so it oscillates between +3 V and -3 V). The oscillator is at about 500 Hz. I connected this to an 8 ohm speaker and I hear the sound from the oscillator. I noticed that on the speaker is written 0.5W, so I assume that this speaker can handle at most 0.5 W.
I am not sure that I understand how speakers work, but applying Ohms law I see that at 3 V and 8 Ohm, the speaker would draw a current of 3/ 8 = 375 mA. This would mean that the power consumed is P = UI = 3x 0.375 = 1.125 W.
The speaker is only rated for 0.5 W, so I assume that I should reduce the amplitude if I don't want to damage the speaker.
My question is simply: Did I calculate this correctly?
(One of my concerns is if I can apply Ohms law since the voltage isn't constant. Could I possibly just add a resistor in series with the speaker to increase the impedance?)
AI: First, your Ohm's Law equation is calculating what is called 'peak power,' which uses the maximum voltage output of the amplifier. Another common way to specify power ratings on speakers is 'RMS power,' which calculates the equivalent heating of a DC source as your AC source (i.e. the amplifier). RMS power of your setup would be:
$$P_{RMS} = V_{RMS}^2 / Z_{speaker} = \frac{V_{peak}^2}{2} / Z_{speaker}$$
So in your case, the \$3 V_{peak}\$ amplitude reduces to \$2.12 V_{RMS}\$ You'll need the datasheet of your speaker to determine whether the 0.5 W rating is in peak or RMS power.
But that's not the whole story, because \$Z_{speaker}\$ is certainly more than just a DC resistance. Alluding to this previous question, the speaker is modeled as a combination of DC resistance with a significant inductance in series, plus some parasitic components:
(Note that Andy's answer's link has moved here as of this posting.) Recall that the impedance of an inductor increases as frequency increases:
$$Z_{inductor} = j \omega L = j 2 \pi f L $$
So the speaker's impedance will also vary with frequency. From my experience, speaker impedance is often rated at 1 kHz or thereabouts, so your speaker's impedance at 500 Hz may be lower and thus more power may be delivered than you'd calculate by using the static \$8 \Omega\$ value.
There is also the question of your amplifier's output impedance. If you see \$3 V_{peak}\$ with the amplifier unloaded, even \$1 \Omega\$ of output impedance (a very fine amplifier indeed) will reduce the voltage across the speaker to \$1.88 V_{RMS}\$ and thus reduce the power delivered to the speaker.
My suggestion: observe the voltage across the speaker and listen for any distortion, which is a good indication of over-driving. And examine the datasheet if you have it.
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H: Raising Op Amp Supply Voltage Without Affecting Output Voltage
I have an existing analog input circuit on a device that utilizes an op amp (TI LM2902) as a buffer. There is a reference voltage of 9V and the Op Amp is powered by 5V. The input signal to be read by the ADC originates at an off-board sensor.
I am wanting to make a new device with more inputs and re-use the existing circuit. The new device I am making does not have any need for 5V, so I am wondering if it is possible to raise the Op Amp supply voltage to 9V without affecting the ADC values? I want the A to D readings to be consistent between the two device.
My understanding is that the supply voltage just dictates the ceiling of the output voltage. Is this correct and the ADC values will be the same whether I power the op amp with 5 or 9 volts?
AI: My understanding is that the supply voltage just dictates the ceiling of the output voltage.
Yes, that is correct.
Yes, but it is also the problem.
The danger is that in a power-up, fault, or sensor disconnection or short that the op-amp output will exceed the maximum allowable input voltage for the ADC. This limit is likely to be 5 V or very slightly over. Exceeding this will destroy the ADC chip.
simulate this circuit – Schematic created using CircuitLab
Figure 1. Over-voltage protection.
To do what you require some form of over-voltage clamp is required. This could be a resistor and 5.1 V Zener (Fig. 1a) or resistor and diode to +5 V (Fig. 1b).
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H: Pi-Matching network needed when already 50Ohm matched on transceiver?
I've been dreaming up a small gadget featuring a NRF51822 MCU as a centerpiece and I'm a total noob at RF-voodoo. I want to use a chip antenna. My question is this: Do i need this matching network
From the MCU/Transceiver or this one
From the chip-antenna datasheet or both?
I found some talk online of mixing the two together somehow but that was with a different configuration on the output of the MCU.
Can someone help me or point me in the right direction?
Link to the MCU datasheet
Link to antenna datasheet
AI: Technically, yes, you need both. The MCU one goes next to the MCU, and the antenna one goes next to the antenna.
The network mentioned in the MCU datasheet is always required, because it converts the double ended output from the MCU into a single ended output for your antenna, and basically gives the MCU a 50 Ohm output.
The matching network for the antenna is so that the antenna can be precisely matched with the feedline and deliver the maximum amount of power into the air. Since the exact impedance of the antenna and the feedline will be affected by many things, like nearby components and casing etc, this is typically not set in stone during the design phase. As BB ON mentions, what usually happens is that the circuit designer puts the space for a pi matching network on the board, and then the board is assembled and put in the casing. Then a signal is put through the antenna, and the reflection is measured. Depending on the exact characteristics of the reflection, the pi network at the antenna is modified until the reflection is as small as possible.
If you're not going into production and the range isn't critical, then you can probably get away with not doing that final step and just putting the component values from the reference design. Your efficiency and range will suffer, but the device will probably still work.
If your feedline is very short, you might be able to skip the antenna one and just use the MCU one, as explained here. Note that you still need the full MCU one that you talk about in your question.
TL;DR yes you need both
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H: Suppressing "travelling" EMI spikes
I am working on a circuit with a AC to DC power supply module and wireless MCU module. The MCU operates at 240MHz and on the power input to the module there are 2 x 0.1uF capacitors and a 22uF capacitor used for bypass. These have been found through trial and error to most limit the noise passed on to the rails. To further reduce noise, a ferrite bead is located on the power side of these capacitors and has worked to reduce the propagated MCU clock noise to acceptable levels.
The remaining problem that I am hitting is that there is a strong "travelling" transient spike (as shown in the spectrum plot below) that starts at about 1MHz and makes its way to about 25MHz before disappearing into the noise. At any given time there is only one spike a specific frequency and it travels from low to higher frequency while reducing in amplitude. The travel time of this transient is about 2 seconds. This transient is strongest near the MCU module but is getting onto power rail (Test Point) and out through the AC/DC module to the power cord.
I have attempted to add more capacitance (1uF, 10uF, 22uF, 47uF) near the MCU module but have seen no measurable effect on this travelling transient spike by doing so. Ignoring the presence of this spike, the noise level is near the floor as seen by the spectrum analyzer. The presence of the ferrite bead mentioned previously has no effect on the amplitude of these lower frequency spikes as its peak impedance is in the 200-400MHz range. If the MCU module is replaced with low value resistor, the spikes are not present.
Based on this, I have a few questions:
For a travelling transient like this, can anyone suggest how this would affected the conducted emissions values versus a fixed frequency spike?
What would the quasi peak of this sort of transient spike look like?
Are there any suggestions on what might be possible to reduce the amplitude of these spikes given that various additional capacitances on the MCU module power input didn't seem to work? I will be trying a ferrite core on the power cord, as well a low frequency ferrite bead on the input to the MCU module and have already tried an inductor on the input to the AC/DC module.
Thanks.
AI: Normally "traveling" peaks do not contribute meaningfully to quasi-peak or average measurements, which are (usually) what counts when it comes to EMC regulatory standards.
Frequency dithering can induce traveling peaks - this is a standard EMC "cheat" for power supplies and is a feature of some PWM controllers to specifically beat the QP and average emissions limits.
A QP detector is sort of like a peak detector followed by a lossy integrator. Spurious peaks (ones that aren't always there) tend to get filtered out. Average detectors are even less sensitive to spurious peaks. These travelling peaks only show up in the QP and average measurement frequency windows for short periods of time, hence their minimal impact.
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H: How do I calculate the diode parameters for reverse polarity protection?
I understand that a diode allows current to flow in one direction only, and that inserting a diode in series with a power source will protect the circuit from a reverse polarity battery.
How do I calculate what capacity diode is appropriate? I want to minimize the voltage drop as the battery is a one cell lithium unit with maximum 4.2V. The device (a camera) seems to shut itself off when the battery hits 3.8V.
AI: For such a low allowable drop, you need a zero voltage drop diode. It can be done with a P-Channel enhancement mode MOSFET. E.g. a IRFD9120 is sufficient for up to 1A drain current.
(Use a multimeter and check how much current your camera draws. Check it with display on and zoom moving.)
simulate this circuit – Schematic created using CircuitLab
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H: Noisy amplification and low light: photodiode and op-amps question
My formal education was in mechanical engineering and I’m well trained in some CS as well. Yet here I am on an electrical project (that will eventually turn CS). I have been lost and confused for many months now and could really use some specific help.
Project scope/goals:
Measurements from the sample to photodiode should be in the 0.3 to 3 picoAmp range. An array of photodiodes will detect this small amount of light. Right now I’m just trying to get a circuit working for a single photodiode at that extremely low light range. Time response can be long or short because we can hit the sample with the laser for a long time without any problem. The laser rep rate is ~76MHz versus the approx. detector bandwidth ~23KHz so there shouldn’t be a problem with signal decay.
Materials:
S10355 photodiode (we are looking to replace, suggestions would be awesome)
Powered breadboard with +5V, +15V, and -15V supplies
NI USB-6211 for measurements
Op Amps we have around(happy to buy more as needed)
TLC271 (0 to +15)
TL031 (-15 to 15)
MCP603 (0 to +5)
MCP6002
Large resistors: 10Meg, 22Meg
Resistor kit (100 ohm to 900k ohm, lots of values)
‘Ideal’ Circuit simulation (that doesn’t really work but is good for visualization):
Adapted from book:
I chose my resistance total based on amplifying 0.3picoAmps to 1 Volt. The book also describes a way to do this with a single op amp but I haven’t gotten that one to work even a wee bit. The only other way seems to be a tee-network but this causes proportional noise gain as well which wouldn’t be appropriate for my application from what I can tell.
Major problem:
There appears to be so much noise even at ~no light~ conditions (there’s never no light but I can get close), that the voltage readings are maxed. Since we are looking at subtle changes this makes it pretty unclear. I read about making a pseudo-ground for the cathode of the photodiode and set one up at 1V from the +5V of the breadboard. This doesn’t seem to do as the forum post indicated or maybe my gain is so high I need a mV or pV pseudo-ground? Not sure. I have also read that choice of Op Amp is critical, and I’m not sure I have the right ones for the job right now, could this be hindering linear response and ground levels?
Power turned off/no light Vout:
Power turned on/no light Vout:
Future problems: I know to eventually implement any of this on a PCB board (for the full array of photodiodes) I will have to be exceptionally wary of noise for detecting such low current levels. Do you have some tips for this? There’s a nice noise analysis in the book but I don’t fully understand the ee concepts I am working around to be honest.
AI: I read about making a pseudo-ground for the cathode of the photo diode
and set one up at 1V from the +5V of the breadboard. This doesn’t seem
to do as the forum post indicated or maybe my gain is so high I need a
mV or pV pseudo-ground? Not sure. I have also read that choice of Op
Amp is critical, and I’m not sure I have the right ones for the job
right now, could this be hindering linear response and ground levels?
The things to know about building these circuits are:
1) Breadbaords aren't going to cut it, this automatically adds more than 10pF to your circuit and way to much inductance, use perf board and solder the components. Or use wire wrapping. 10pF*1e6Ω = 10Hz so if you use a breadboard, 10pF will automatically cut your bandwidth to 10Hz with no gain capacitor.
2) You'll need an amplifier with a lower input bias current than that of what you want to measure. An op amp with an input bias current in the fA range would be appropriate. Input bias current means the current flowing into the opamps + and - terminals. If you want to measure pA keep in mind that even large resistive materials can source pA of current, FR4 (PCB material) drops to 10e8Ω when damp and if you put 1V on the other side of the PCB, you get 1pA of leakage (and offset). Guard traces can be essential.
3) Select an amplifier with a larger open loop gain, and larger bandwidth than you require. Make sure you understand that when you put capacitance and gain, they affect the gain bandwidth product
4) Use two amplifier stages to gain up your signal, if you need 1e9 of gain then gain up the first one with 1e5 and the next one with 1e4 (for example)
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H: LTSpice is frustrating me. Why isn't this Class C amplifier working? I can't get a sinusoudal output
I've been trying to research how a class C amplifier works, and it makes perfect sense to me, but I'm having problems getting it to function in LTSpice. I have the latest LTSpice version (XVII with latest updates as of last week).
I can't seem to get my "resonant network" to resonate with a sine wave, no matter what I keep getting this cut off wave. What am I doing wrong ?
I have done a lot of searching on the web and this seems like the proper circuit structure - and I think it would probably work in real life, but in LTSpice it indicates it isn't going to work and I can't see why.
Trying to amplify a simple 1Mhz carrier sine signal here.
Here is a picture of the circuit. The waveform is being sampled from the collector of the transistor
Since I can't figure out how to share or attach a file, here is the LTSpice *.asc file contents
Version 4
SHEET 1 1076 680
WIRE 240 -128 -192 -128
WIRE -192 -96 -192 -128
WIRE 240 -64 240 -128
WIRE 240 -64 160 -64
WIRE 336 -64 240 -64
WIRE 160 -32 160 -64
WIRE 336 -32 336 -64
WIRE -192 32 -192 -16
WIRE 160 80 160 32
WIRE 240 80 160 80
WIRE 336 80 336 48
WIRE 336 80 240 80
WIRE 400 80 336 80
WIRE 512 80 464 80
WIRE 240 144 240 80
WIRE -32 192 -160 192
WIRE 96 192 32 192
WIRE 176 192 96 192
WIRE 512 192 512 160
WIRE 96 208 96 192
WIRE -160 240 -160 192
WIRE 96 320 96 288
WIRE -160 352 -160 320
WIRE 240 384 240 240
FLAG 96 320 0
FLAG -160 352 0
FLAG 240 384 0
FLAG -192 32 0
FLAG 512 192 0
SYMBOL npn 176 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N2222
SYMBOL res 80 192 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 32 176 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10µ
SYMATTR SpiceLine V=6.3 Irms=0 Rser=0.001 Lser=0 mfg="TDK" pn="C3216X5ROJ106M" type="X5R"
SYMBOL voltage -160 224 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0 1 1000000)
SYMBOL voltage -192 -112 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value 9
SYMBOL ind2 352 64 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 100µ
SYMATTR Type ind
SYMATTR SpiceLine Ipk=0.04 Rser=11 Rpar=78263 Cpar=1.868p mfg="Würth Elektronik" pn="74476420 WE-GF 1210"
SYMBOL cap 176 32 R180
WINDOW 0 24 56 Left 2
WINDOW 3 24 8 Left 2
SYMATTR InstName C2
SYMATTR Value 150p
SYMATTR SpiceLine V=6.3 Irms=3.93m Rser=19.9098 Lser=0
SYMBOL res 496 64 R0
SYMATTR InstName R2
SYMATTR Value 220
SYMBOL cap 464 64 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C3
SYMATTR Value 470p
SYMATTR SpiceLine V=50 Irms=20.8m Rser=5.448 Lser=0
TEXT -424 104 Left 2 !.tran 0 30us 0 .0001
AI: Essentially the same Class-C type circuit with a few component value changes, to achieve a somewhat-sinewave at the collector (your design goal).
Loaded resonator Q is about 15, so that the second-harmonic is suppressed by only 28 dB below the fundamental.
An added resistor (R3) decreases drive into the transistor base. DC supply has been increased slightly. L1 resonates with C1 near 1 MHz. Only 7.2 mW are delivered to the 10K load resistor R2.
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H: Transistors with different loads in parallel
My circuit roughly looks like this:
I want to send a signal to uC and turn on a LED when there is light shining on phototransistor Q3.
Currently I'm using stm32f4 (discovery board) as a signal receiver, but I would like to be able to replace it with an atmega at any time.
My problem is that base of Q1 is taking almost all of the current coming from Q3 and emitter-ground voltage after Q2 is too low for a uC to recognize it as a logical high.
I know I can add a resistor just before the base of Q1, but I don't know what is a resistance of the input of the uC (because it may be replaced with a different one)
How can I make sure that both the LED and the signal to uC have enough voltage to work properly?
AI: Why all the complexity, you only need Q1 and the light sensitive detector.
simulate this circuit – Schematic created using CircuitLab
The datasheet for the TEPT4400 shows that you are unlikely to get more than 200uA of current unless you have an extreme light intensity from a tungsten light source.
Read the CIE A definition here.
The Q1 10K Ohm base Emitter resistor will result in a threshold value of around 70uA, you may need to increase this to get sufficient base current for the light level you want to detect.
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H: Expressions in Verilog module instantiations
If I have the following verilog module definition:
module foo (
input a,
output b
);
assign b = !a;
endmodule
And then I instantiate it within another module like so
module bar (
input c,
output d
);
foo foo0 (
.a(c),
.b(!d) //note the not operator
);
endmodule
I looked at the EBNF syntax definition for Verilog and it showed expressions as valid arguments for port assignment.
Will this do what I want (i.e. act as a passthrough—outputting c)? Or does verilog not allow operators other than concatenation for port assignment?
I realize this example is contrived, but my project has a decent amount of code so I didn't want to upload/explain all of it unless necessary.
AI: This is legal for input port connections, but output ports can only be connected to nets and/or variables, or a concatenation of those. See section 23.3.3.3 Port connection rules for nets with built-in net types of the 1800-2017 LRM.
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H: Causes for a burned up flyback diode on a relay?
I'm repairing a control board for a premium washing machine (model #s at bottom for anyone that's interested). The machine was displaying an error code for relay failure. I took the board out of circuit, injected voltage on the DC bus, and detected two shorted 1N4148 "T4" diodes, each in parallel to a 12v SPST-NO relay (marked with arrows below). I replaced them. Each relay switches one side of the water heating element (+ or -). I have not tested the repair yet, but the machine does work without issue with a substitute board.
Trying to figure out what may have caused the diodes to short?
Note: After repair
Machine: MHW6000X
Relays: Omron 12V G2RL-1A-E
Control Board: W10406607 / W10406604 (alternates, W10342325 / W10342327, W10388205, W10427972, W10384506, W10354088, W10406635)
I found these short diodes using isopropyl alcohol (99%) and a microscope (loupe or optivisor works for less $$). Here's a video from my microscope camera showing the alcohol
https://youtu.be/w-QVvYimghc
This is one of the larger "neighboring" diodes, MURS160T3G "U1J" in SMB package. Same relay, so perhaps a strange bit of design here.
AI: Figure 1. Relay datasheet extract.
Checking the relay datasheet we find that the coil current should be about 33 mA. At the instant of switch-off the coil inductance will maintain that 33 mA through the flyback diodes.
Figure 2. Extract from the Vishay 1N4148 datasheet.
Checking the Vishay (chosen at random) datasheet we see that 33 mA is well within specification.
I would conclude that the designers did their job OK but that the purchasing department may have found some bargain diodes.
Update for "T4" diodes:
The Diodes Incorporated datasheet rates their diode at 250 mA continuous. That isn't the problem either.
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H: Is there a Semisynchronous Buck Topology which mixes the advantages & disadvantages of both?
I was looking at "What is the purpose of using MOSFET instead of free-wheeling diode in Buck topology?" and the referenced PDF which discusses the trade-offs between a traditional asynchronous Buck with the lower Schottky diode, and the more complicated but more efficient MOSFET which replaces it. Then I thought, "If you allow the Schottky diode to remain, but parallel it with a MOSFET, you could use comparators to sort of notice the Schottky conducting and turn the MOSFET on, and then turn it off again when the flowing current has decreased enough. This would improve efficiency, prevent the possibility of shoot-through, and take the synchronous complexity and move it out of the switching chip." Yet I haven't seen it, so perhaps there is some reason why this isn't done.
So if this does work, it would produce yet another possible set of trade-offs which could be considered. Meaning that the Schottky diode wouldn't have to dissipate as much heat, and the efficiency of the circuit would improve, at the cost of additional circuitry? Thanks ahead of time.
=========== EDIT ===========
More recently, I stumbled on something that, to me, makes answers related to this question more important for achieving better efficiency.
In this TI app note about designing an Isolated Buck (Flybuck) Converter, there is a Synchronous Buck with three outputs, as shown:
As you can see, only Vout1 has had its Schottky diode replaced with a MOSFET, and the other two outputs are still sustaining the same Schottky diode efficiency losses as would a standard non-synchrous Buck.
Can those isolated outputs be easily made synchronous? I haven't seen it so far, but even so, I believe that there are significant efficiency gains to be realized by this method, especially with multiple isolated outputs. And the cost of extra MOSFETs should be partially offset by smaller heatsinks, and lowered cooling costs because of less heat generated in the isolated output Schottky diodes.
So, does this method exist, and if so, what is the name of this method, and if not, I will in the future ask how it may be done in a separate question, and link to it here. Thanks ahead of time.
AI: Synchronous rectification can be motivated by several factors, however, it is difficult to beat a Schottky diode in terms of losses. Neglecting the ac ripple (deep continuous conduction mode), the conduction loss of a diode is \$P_d\approx V_f*I_{d,avg}\$ whereas for a MOSFET, it will be \$P_Q=I_{D,rms}^2*r_{DS(on)}\$. The diode drop goes down with temperature while the MOSFET on-resistance increases with temperature. However, synchronous rectification often helps getting rid of a diode heatsink as paralleling MOSFETs in SMD packages reduces the total on-resistance and power dissipation.
For a CCM-operated buck converter, the upper-side MOSFET "sees" the inductor current during \$DT_{sw}\$ while the diode "sees" the inductor current during \$(1-D)*T_{sw}\$. Thus, for low duty ratios (12 to 3.3-V output for instance), the upper-side switch conducts much less than the diode (considering CCM) and it might be interesting to adopt synchronous rectification (sync rect). If you now convert a 6-V source down to 5 V, you can see that the diode conduction time will be much less than the MOSFET and it is less interesting to adopt sync rect. Self-driven synct rect is popular in active-clamp forward converters where the inductor always operate in CCM, even in no-load conditions. This avoids narrow pulses which collapse the auxiliary \$V_{cc}\$ otherwise and it keeps the same dynamic (small-signal) transfer function as conduction mode does not change.
Finally, there are a lot of dedicated synct rect controllers. They all observe the voltage across the driven MOSFET and check when the body diode conducts or stop conducting. Semi vendors rival in tricks to avoid false tripping and try to reduce the controller's sensitivity to stray inductances (in the package itself and the PCB also) which is a real problem in high-power converters. You should be able to find more information in semi vendors application notes.
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H: STM32 Flash erase sector 0
I have an updatable project with stm32f407. Code produced by cubeMx. Updater code check new update from internet and if is avaliable write main program on 0x08020000(sector 5) and this updater code on 0x08000000(sector 0 and sector 2 size is less than 32kb)
I am writing a code(will be like main project on sector 5) can update the updater code on sector 0
My problem is when I erase sector 0 AC6 give an error for address wrapping and STM32 stop working. I think is because of sector 0 has a special situation. there is no problem with erase other sectors. Is there a anyway to erase sector0 with a embedded program? The problem begin after delete 1 sector. I dont know what to do. (sorry for my bad English)
for(data_sayac=0;data_sayac<=filelength/2;data_sayac+=2)
{
// UPDATEDATA_ADDRESS defined 0x08040000 (sector 6 where my new updater data copied from internet)
// UPDATEDATA_ADDRESS2 defined 0x08000000 (sector 0 where my new updater program copied from sector 6)
Data1=Flash_oku_halfword(UPDATEDATA_ADDRESS+data_sayac);
if(Flash_oku_halfword(UPDATEDATA_ADDRESS2+data_sayac)!=0xFFFF) // if sector is not empty erase first
{
HAL_FLASH_Unlock();
Get_Sector= FLASH_If_GetSectorNumber(UPDATEDATA_ADDRESS2+data_sayac); // get sector number by address
FLASH_Erase_Sector(Get_Sector,VOLTAGE_RANGE_3); //erase sector
}
Flash_yaz_halfword(UPDATEDATA_ADDRESS2+data_sayac,Data1); // write halfword
}
AI: My problem is when I erase sector 0 AC6 give an error for address wrapping
Remember that the first item on page zero is the interrupt vector table.
Your problem sounds a lot like you have interrupts enabled. This would only work in case you moved the vector table to a RAM address using the SCB->VTOR register. Note that the vector table needs an address with the lowest byte all zero (256 byte aligned).
Is there a anyway to erase sector0 with a embedded program?
This usually needs a bit of preparation:
disable interrupts (or use VTOR above)
erase page
write new page content
enable interrupts
A power fail (or any other Reset) could "brick" the device, if it happened between the erase and the new write.
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H: Inverting REFCLOCK of Ethernet PHY
A few years ago I had to design a board that uses the NXP LPC1769 MCU and had Ethernet connectivity. I was in need of a PHY chip and the LAN8720 was choosen.
During design however, I noticed that NXP in their development boards use an inverting buffer on the REFCLOCK signal (see here, U9). I searched the datasheet, but I couldn't really understand the reason for this inverter. Finally I decided to follow their advice and also use the inverter. The board worked perfectly, as many more following designs did.
Now we are migrating to the STM32F427 MCU, and again I need Ethernet connectivity. I plan to use again the LAN8720 PHY, but I am confused about whether I should invert the REFCLOCK signal again.
Since I didn't understand why it was needed in the first case, I am not sure what to look for now to ensure whether it is needed or not.
Why this inverter was used? Where one can find information on the datasheet about this? And most importantly how can I know whether I need it on the new design?
Note: Space is at a premium for my new design, so eliminating even such a small part will be beneficial. I wouldn't really like to add it to the design just for a trial-and-error approach, only to find out it needs bypassing...
AI: The answer is on page 29 of the LAN8720A datasheet: The REF_CLK Out Mode is not part of the RMII Specification. Timing in this mode is not compliant with the RMII specification. To ensure proper system operation, a timing analysis of the MAC and LAN8720 must be performed.
I would bet that NXP did that analysis and needed to invert the clock to achieve good timing margins. The propagation delay of the LVC inverter, and maybe even the RMII trace lengths, will have been part of that process.
The STM32F427 timing requirements and characteristics should be very similar to the LPC1769; RMII is RMII... But I would do a fresh analysis if I were you!
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H: Routing the signal across the slot opening in the power plane
What happens when we rout a signal trace across the slot opening in the underlying power plane ? Can you please explain the signal integrity issues generated by this mistake ? And what will happen if we rout a differential transmission line across a slot? Will the above issues be presented with the differential line ?
AI: Every signal has a return current associated with it. That current will flow along the path of lowest impedance; it will "hug" the signal by flowing back through the adjacent plane (if possible). Note that bypass capacitors provide a way for the AC component of return current to jump between ground and power planes and can sometimes be more important for that purpose than they are for power integrity!
The slot will create an impedance discontinuity which will cause reflections and degrade signal integrity; an SI simulation will tell you if this is going to stop your design working reliably. And diverting the return current will open up the loop area of your signal, causing (potentially substantial) addition RFI emissions.
It's much less of an issue for a differential pair. There's a useful application note here.
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H: Atmega naming scheme (324p vs 328p)
I am looking into AVR chips (big fan) for a personal project. I need capabilities similar to Arduino Uno, so I recently compared Atmega 328p and Atmega 324p.
To my surprise the 324p has significantly more features and on-board hardware than the 328p. To me, higher model number == more powerful/more features product, so discovering this slightly confusing me.
Could anyone explain to me why Atmel chose such weird convention for naming their chips? I know this is not a big deal, but for the future reference I would like to know how to choose AVR MCU's for my needs properly (their buyers guide is not very helpful).
edit: the 328p consumes twice less amount of power, so is it all down to smaller, less power hungry product?
AI: The numbers of Atmega devices follow a quite simple basic scheme. Let's take the Atmega644PA-AU as an example.
"64" The first digits always mark the size of the Flash in Kibibyte
This is always a power of 2, between 2 and 256. The 4808 is the only exception with 48kB of memory
The RAM is in most cases a factor of 8 or 16 smaller than the Flash
"4" The last digit marks the series of chips. Within a series they are often pin-compatible and share a similar set of features. Some prominent series are:
'no digit' - these are the first generation chips with 8 to 128 kiB Flash
'8' - a series from 4 to 32 kiB Flash, all in the same housing. More or less an improved version of the original chips
'4' similar to '8', but in larger packages with more pins (~40 instead of ~30) and up to 128 kiB Flash
'5' similar to '4', but with more timers and PWM channels
'0','1' rather old family with large packages (60 - 100 pins) and up to 256 kiB Flash.
'9' with integrated LCD controller
'U2', 'U4' are the two sizes of USB-enabled controllers
'08', '09' newest family with additional configurable logic and more CPU-bypassing features
'50', '90' the largest chips with 100 pins, but few peripherals
'PA':
'A' and 'B' are newer revisions, usually without major changes.
'P' is 'pico-power' - chips with very deep sleep modes and quite low power consumption, ideal for battery-powered applications
'L' and 'V' are sampled for lower voltage operation at slower clock speeds (old series only, newer have this 'built-in').
'-AU' The letters after the dash mark
the kind of packaging (LGA, DIP, QFN...)
the temperature range (industrial, consumer)
the shipping packaging (tube, reel)
default fuse settings (e.g. internal oscillator on 32U4)
lead content (obsolete)
The even smaller Attiny controllers follow a similar scheme, but have more and smaller families with more specialized sets of features.
Notable is the Attiny[2,4,8,16,32][0,1][4,6,7] (e.g. Attiny204 up to Attiny3217) series that extends the Atmega[8-48]0[8,9] towards smaller memory and fewer pins.
As of 2020, there are a two new Atmega-related series: AVR-DA and AVR-DB which seem to be very similar to Atmega, but with some improved and more modern features.
In summary: You can learn quite a lot about the device from its number, but for details and precise numbers you always have to look into the datasheet.
Microchip offers a handy Quick Reference Guide where families of chips are grouped - but be careful, some entries are wrong (e.g. 324PB, 32U4).
Basic buying guide for Atmega: Use a ..4 or ..8, depending on the number of I/O and peripherals you need. 'P' and 'B' are always favorable. For communication with a PC, use a U2 or U4. Battery powered devices that have to react on external signals might profit from the new ..[0-1][4-9] series.
For special needs, check the rest of the species.
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H: Is it possible for a bulb to behave like an inductor?
I have learned that the bulb has made from a coil of tungsten, not only bulbs many other components like electromagnet and electric motors also have coils in it. Is there a multiple behavior for this components i.e. does these components behave like an inductor at the same time? Does these components have inductance?
AI: Only ideal (theoretical) components have a single behavior. Real components always have multiple behavior. The secondary behavior is usually far less significant. In the case of an incandescent bulb, it is primarily a resistor, but a coil of tungsten will have some value of inductance as well. At AC power frequency, 50 or 60 Hz, the inductance will be insignificant, but if you use a bulb for a load in a radio frequency circuit, the inductance might be significant.
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H: About the torque of mini servo motor
I'd like to automate button pressing on Nintendo DSi for a certain purpose.
For this, I think I will use a raspberry pi and a mini servo motor SG-90.
My question is, would the SG-90 would give enough torque to be able to press the button?
The following figures are provided :
Couple: 1,6 kg.cm at 4.8V
Speed: 0,12 s/60° (probably also at 4.8V)
Thank you
AI: You must specify the linear displacement of the switch and required maximum slew rate and thus toggle frequency.
The torque is 2.2kg-cm or 22kg-mm is enough to damage the switch so spring load force is not likely an issue.
Response time of 120ms is slow for 60 deg. But for 20 deg it may be 40ms or more.
What is needed to create say 3mm linear displacement in 20 deg rotation at some radius?
One approach is the design of a friction roller Cam on the servo arm.
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H: Flooring for home lab
I am setting up a home electronics lab for projects with my kids, currently ages 4 through 10. What type of flooring would work best?
We will be doing art projects in the same room, so we need something easy to clean (no carpet). I would prefer something relatively inexpensive as well. I have found lots of information about flooring for a pro setting, but I have not found recommendations for home use.
AI: ESD is a matter of how much intermittency or damage you can afford. In a medial device, or aerospace application or other industry the costs are very very high into the hundreds of millions (or a human life) for a failure. In these cases every available option to mitigate ESD risk is taken, which include floor mats, wrist straps, humidity control (60% if I remember right), making sure no materials that promote ESD (like paper and plastic) come into contact with electronics and even monitoring the local electric field. The cost in time and money is also high.
Even in a regular production environment, the costs can be high (for scraping a few hundred dollars worth of components).
In your case, since your costs of failure are quite low (if you ESD'ed a MOSFET, that's ~1$ and tens of minutes to troubleshoot whereas a mat is 10's of dollars or more) and the costs of ESD mitigation would be higher than a few components, it may not be necessary to go to such great lengths for ESD lab coats and ESD flooring. It might be better to just use wrist straps and an ESD mat for educations sakes and call it good.
For a proper ESD floor, the floor needs to be conductive and connected to ground (with 1MΩ of resistance between the user and the floor), proper footwear that is conductive is worn with a foot strap. I'm not aware of any home materials that would satisfy the conductive requirement.
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H: Best topology for an AC/AC switched-mode power supply
I need a power supply with two 100W isolated AC outputs. The output voltage must be a 24V 10kHz sine wave. The load regulation is not so important, what is truly important is the preservation of the sinusoidal wave shape under both rated load and no load conditions. Which SMPS topology is best suited for this purpose?
The first thing that came to my mind is an AC/DC SMPS (PFC + isolated step-down) followed by a PWM inverter. But I think that it is over-complicated for such a seemingly simple task.
The second thought was to get rid of the inverter. Indeed, we already have a rectangular AC voltage after the step-down stage. Maybe we can filter it instead of rectifying? I also found information about resonant converters, and that they can be used as AC/AC converters.
So what do you think about it?
Some additions
The input is 230V 50Hz mains.
Load regulation: 20% is OK.
The same with THD: 10-20% is OK.
I'm sorry. I forgot probably the most important thing - efficiency! It should be at the level of an average SMPS, 80% or more.
AI: You say you want two 10 kHz 100 W outputs. You didn't say what the input to this power supply is, so I'll assume normal 50 or 60 Hz line voltage.
In that case, the input 50 or 60 Hz is really of no use directly. Use it to create DC, then use that to make the 10 KHz. You only need a single 200 W (plus a little for losses) output that drives a transformer with two secondaries.
The DC to AC converter could be something like a class D amplifier with a little resonance to be really good at your single output frequency. For simplicity, you could just get a 250 W audio amplifier and feed it a 10 kHz signal. That's more complex inside, but that doesn't matter if you're buying it as a pre-made off the shelf box.
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H: Difference between `gcc` and `gcc-msp430`
What is the difference between using gcc versus using gcc-msp430? When I run man gcc, there are msp430 options that I can set using -mmcu=. However, whenever I run gcc to compile a code for the msp430, I get the following error:
$ gcc -Os -Wall -g -mmcu=msp430g2553 -c main.c
gcc: error: unrecognized command line option ‘-mmcu=msp430g2553’
make: *** [Makefile:11: main.o] Error 1
What is wrong here? I'm on Fedora Linux if that makes a difference.
AI: gcc (alone) is your local machine compiler that generates code for x86 and x86-64 (ie. the target is your computer, unless you are running on non-x86). gcc-msp430 is the cross compiler that runs on your computer, but generates machine code for MSP430.
Generally one GCC installation supports a single target (ie. family of CPUs having the same or very close ISA), like x86, ARM or AVR. For example the MSP430 flavor will support arguments like msp430g2553, while ARM flavor will support cortex-m3. A compiler triplet is used to fully identify the compiler.
Each of the targets also has its own options. Your can find them here.
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H: Using potentiometer in two separate circuits
I am building a circuit with Arduino to control the motion of a stepper motor.
I want to use my guitar amp potentiometers to feed voltages back into the Arduino without disassembling the original amp circuit.
Is this possible? How can it be achieved?
AI: What you are proposing is very unlikely to work. Your micro-controller ADC (analogue to digital converter) input is expecting a signal in the range 0 to +5 V. For a potentiometer input this will be wired as shown in Figure 2.
simulate this circuit – Schematic created using CircuitLab
Figure 1. A potentiometer connected to a micro-controller ADC input.
A guitar amplifier, on the other hand, consists of an AC signal pre-amplifier with tone and volume controls feeding into the main amplifier stage. The guitar signal with high-output pickup at full volume might put out a signal of +/-1 V peak. You can't have this voltage on the potentiometers at the same time as using it for a 0 to 5 V signal.
In the example shown the op-amp is fed from a single-ended supply. We know this because there is a ground symbol on the negative supply pin and a positive connection on the other. The DC+ is likely to be in the range of 12 to 18 V. To allow the output to swing positive and negative we need to bias the output to mid-supply. That's the purpose of R5 and R6. So on a 12 V system the quiescent voltage on the output would be 6 V. Since this is fed back to the potentiometers you can see that the voltages on the pots will be about 6 V with the guitar signal superimposed on it.
Figure 2. A Baxandall tone control stage typical of many guitar amplifier pre-amp stages. Source: Learn About Electronics.
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H: Replacing CMOS SRAM with equivalent TTL SRAM
I want to replace an IS62WV51216BLL-55 (http://www.issi.com/WW/pdf/62WV51216ALL.pdf) with an AS7C4098A-12 (https://au.mouser.com/datasheet/2/12/as7c4098a_v1.2-1288279.pdf), as the latter has much better speed (although less capacity, but that's not a problem in my case), to be interfaced with some STM32 I have lying around.
My question is, is the fact that the latter is a TTL part (but CMOS compatible according to the datasheet) a problem? I can see a table with the recommended voltages (and those are basically 5v), but the absolute minimum and maximum seems to be adequate (-0.5 to 7V).
Any other problems that might arise even if voltage is ok (according to the datasheets)?
AI: You're confusing the manufacturing process of the AS7C4098A (which is CMOS) with it's compatibility (which is TTL and CMOS). Compatibility here refers to I/O levels and means that the AS7C4098A will connect to and work with other parts that use either TTL or CMOS logic thresholds.
This is all about reading and understanding the DC characteristics section of the datasheets, comparing the Voh/Vol and Vih/Vil parameters of the devices you are connecting together. And I'm not sure you've understood the absolute maximum ratings section - the 7V you quote is an absolute maximum supply voltage above which you will damage the SRAM, so what do you mean when you say this is "adequate"?
Make sure your STM32 (which is presumably powered from 3.3V) is going to be OK working with a 5V powered SRAM, i.e. that its inputs are 5V tolerant.
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H: In-system programming of the SPI Flash chip
Device have Serial NOR Flash chip MX25L6406E located on the rear of the PCB (SO-8/SOIC-8 Package). Is it possible to program chip without desoldering it? (In-system programming). As I know, it depends mainly on specific design.
AI: So you're asking how to determine whether a chip can be in-system programmed.
There's a lot of factors to that, but the ones I can think of are:
selective powering: Can you power the memory IC without starting the rest of the system? If giving power to that IC means you power the microcontroller it's connected to, and you have no way of stopping that microcontroller from using the SPI lines you want to connect to to talk to the memory chip, then this can't work. In essence, you'll have a hard time if the memory IC and the microcontroller run from the same power supply, and the microcontroller doesn't have an externally accessible reset pin. Also, if the same power supply powers other components, what will happen?
Side effects of the programming itself: are there other devices on the SPI bus? When the microcontroller is powered of, will these have a chip select line that is deasserted, i.e. will they know that they're not "meant" to be talked to?
Pin direction problems: Now, your MCU is powered off or in reset, but you power your memory and do some communication on the SPI bus. In which state are the pins of the MCU that connect to the memory when powered off/ in reset? Are they shorted to ground, pulled up to VCC? Is it OK to apply e.g. 3.3V to pins when the MCU is powered off, or will it be damaged?
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H: Connect three HC-05 Masters to three HC-05 slaves
I have 3 Bluetooth modules HC-05 connected to my laptop using an USB-TTL interface and 3 microcontrollers each one has its own HC-05 slave. These devices shall send values to my laptop (each slave sends a value to his own master only). In the laptop side, I have a Python script that manages the communication in this way:
Open COM1 (Master 1)
Send request to the slave
The slave sends a response
Close COM1 (Master 1)
Open COM2 (Master 2)
Send request to the slave
The slave sends a response
Close COM2 (Master 2)
Open COM3 (Master 3)
Send request to the slave
The slave sends a response
Close COM3 (Master 3)
To do so, is it possible to set different baud rates in order to avoid conflicts between them ?
For example:
Master 1 and Slave 1: 115200 bit/s
Master 2 and Slave 2: 19200 bit/s
Master 3 and Slave 3: 9600 bit/s
Is there another efficient way to make sure that every pair of HC-05 avoid other HC-05 devices ?
AI: If you bind master 1 to slave 1, master 2 to slave 2, and master 3 to slave 3, then the 3 master/slave pairs should communicate without any conflicts and you will not need to keep closing and reopening COM ports. The binding procedure is described in this video - you need CMODE=0.
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H: What was the use-case for the 74hc590?
The 74hc590 http://www.ti.com/lit/ds/symlink/sn74hc590a.pdf is a binary counter followed by a register with a tri-state output.
I thought about using it in a homebrew CPU design, as it's wider than the 74hc161, but the output buffer means that it takes an extra clock before a counter clear CCLR# is reflected at the output.
Have I misunderstood this part?
What was the 590's original purpose? i.e. Why were people putting registers after counters, resulting in this part being made?
AI: The use case is pretty well described by you: a binary counter with a latch.
For when you want something counted, but the output of the counter to only change on a latch signal.
Use cases range pretty widely – from gated clock dividers to clock-domain crossing counters to very simple IO expanders.
A very striking example is a frequency counter: assume you want to measure something in the range of 20 kHz. You have a 100 Hz clock. You use that 10 Hz clock to reset the counter clocked by the ca 20 kHz, so counts should be always in the range of around 200. Of course, you don't want your display to update while your counter is counting – only maybe 12.5 times a second. So, you latch your counter on the 8. edge of your 100 Hz clock.
(these ICs weren't all invented to build CPUs, so the assumption that "it exists" and "it must be useful in a CPU design" is unfounded)
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H: I don't understand why this open collector not gate needs diodes
I'm trying to understand why the following circuit, which corresponds to an open collector not gate, needs to use two diodes. The circuit I'm taking about is below:
I think I understand the one just after the Vcc, I guess it's for preventing the current to flow to ground when A is high, am I right? Why can't you just remove the Vcc instead of using that diode?
I'm trying to figure out what is the purpose of the one that is between ground and B, but I don't get why is it necessary to prevent the curent to flow from B to ground.
AI: The diode to the right is hard to avoid in chip construction of MOSfet circuits where the substrate is grounded :Presentation on theme: "Metal Oxide Semiconductor Field Effect Transistor (MOSFET)" PPT Slides, Dr. M A ISLAM IIUC
The upper diode to Vcc is not part of the MOSfet structure - it is added by the chip designer. It does limit the possible applications of this open-drain output, since a load above Vcc would be limited when this diode forward-biases.
However, the upper diode does help protect the drain from over-voltage (above Vcc). It may be a weak diode only meant for occasional events, like static discharge.
Sometimes, a chip designer would not use that circuit. For example, a chip meant to be powered by Vcc=3.3V might be advertised to have "5V-tolerant I/O". This diode would not be present as shown.
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H: Troubleshoot a backplane
I have built a simple bus backplane from stripboard and 40-pin female headers for a computer project I am working on. When I tested the backplane to make sure that it functioned, I found that it's soldered properly but that inside one or two of the female headers I used as connectors, there is a short that connects three lines on the backplane.
Visual inspection is of little help, the flaw isn't visible; it is inside the connector shroud somewhere.
So my question is: Is it possible to measure with a multimeter somehow, which of the seven paralleled connectors is the culprit? I would like to salvage the backplane and just replace the offending connector if possible.
AI: In all probability, it's got something to do with your soldering and not with the insides of the connectors (which were made by precision machines, and likely even tested before leaving the factory).
Take a knife and make sure to clean the gaps between your tracks. It must also fit between the solder "blobs".
Your solder joints aren't very uniform – that's really where I'd start looking. Even the tiniest little solder needle will be a short. All in all, from an effort point of view, if simply removing as much solder as possible from these and resoldering the 21 contacts in question doesn't help, redo the whole board. That time, first cleanse your copper track (slight rub with something abrasive, alcohol), so that you don't get a copper oxide layer. Apply a small amount of (preferably liquid) flux to the tracks prior to soldering in your first connector row. Use less solder overall.
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H: Motor current consumption and power do not match
I am working on a design and need to calculate the energy consumption of this motor:
https://www.maxonmotor.com/medias/sys_master/root/8825428410398/17-EN-256.pdf.
(Part No. 339252)
The manufacturer's specifications states:
Nominal current (max. continuous current): 0.402 A and
Nominal voltage: 12 V.
Based on this, my understanding is that the power consumption of the motor should be 0.402 A x 12 V = 4.824 watt
However the manufacturer lists this motor as 1.5 W.
How is this adding up? Shouldn't this be a 4.8 W motor? Can you please help me understand how the current (0.402 A) and voltage (12 V) and power (1.5 W) are related? Is there anything else in that specification sheet that I am missing?
AI: It's right there on page 1 of the data sheet. The graph below shows the power output curve being 1.5 watts: -
What you have calculated is the electrical input power and this does not equal the mechanical output power (\$2\pi n T\$).
Take the example at 10,000 rpm. That's 167 revs per second (n above). Multiply it by torque (approximately 1.4 mNm) and you get 0.2333. Multiply by pi and 2 and you get a wattage of 1.47 watts. That's the output power.
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H: KiCAD: Why is ERC throwing errors on apparently connected pins?
I've reconnected several of these (C1, U1 GND) more than once, even redrawing entire wire segments, but I still get errors about unconnected pins. Is there something I'm doing incorrectly?
AI: The blue lines are busses. They do not connect signals without a specific naming convention (http://docs.kicad.org/5.0.0/en/getting_started_in_kicad.html#bus-connections-in-kicad).
Use wires (green lines) instead.
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H: Why do many uC have more then one I2C interfaces?
On I2C buses you can hock up 112 devices. So why do so many microcontrollers have up to four I2C ports, when you could just operate enough devices for most applications on one I2C interface?
AI: As @JohnD says, you may need to talk to several devices which have the same built-in, unchangeable address.
Another reason for multiple I2C busses is that they can be very slow. Standard I2C devices only run at 100 kHz. By having multiple busses you can access multiple devices in parallel, effectively increasing the data rate.
A third possibility is that you want your MCU to act as a slave on one bus and a master on another.
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H: Discharging a capacitor quicker, using an exterior time varying magnetic field?
I was analyzing the possibility of varying an exterior magnetic field, that's aligned in direction with the magnetic field produced by the displacement currents(both parallel in the same plane) shown in the figure above.
And when I used this equation to model the case:
It seems possible to discharge the capacitor faster/slower depending on the orientation of the exterior magnetic field, and it's rate of change, the exterior magnetic field would affect the displacement current's magnetic field, wouldn't that help in discharging/charging it? In addition, increasing those rates or decreasing it?
Discharging faster by increasing the displacement currents, and the conduction currents flowing in the loop, if the field was in the opposite direction(out of the page) it would discharge slower since now it's opposing/reducing the displacement currents.
NOTE: The magnetic field will be confined mostly in the separation gap of the two plates, to reduce it's effects on the overall loop(that includes the load/resistor).
AI: Bd is around the axis of the capacitor. An externally caused field Bext doesn't boost Bd if it isn't around the same axis. I think that you do not want to add a piece of metal to make a direct current between the plates. That would cause just the right Bext and surely it accelerates the discharging.
Another possible way to make more field around the axis of the capacitor is to somehow increase diminishing rate of the electric field between the plates. That's Maxwell's famous virtual displacement current (which in insulators can also be a real molecular de-polarization current). But that is just accelerating the discharging somehow. You must accelerate discharging to get a field which is hoped to accelerate the discharging. How ingenious!
You can accelerate discharging by adding an opposite voltage in series with the resistor.That voltage can be induced by a changing magnetic field. The localization of that field is not critical, it's enough it goes through the discharging current loop. If you want to restrict it between the plates, it's ok and there's no need for the changing magnetic field go just around the axis of the capacitor.
There exists a trick to insert external changing magnetic field which really is around the axis of the capacitor: Insert a circularly magnetized permanent magnet between the plates. That will accelerate discharging or make it slower depending on the polarity of the magnet, because during the insertion movement the field changes in the discharging loop. The effect exists only when the magnet moves.
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H: Multiple ADC's interfacing to FPGA
I am looking for a 32-channel ADC (24-bit resolution) which can simultaneously sample all the signals. But I could find only 8-channel ADC with the above requirements.
So, is it possible that I can use multiple 8-channel ADC's to interface with FPGA at the same time?
AI: Yes, completely possible. Pick an ADC that allows synchronization of conversions, ADS1278 for example.
You can read the conversions out from the ADCs with a single interface (bandwidth permitting) or multiple- the key thing is to synchronize the conversions themselves, and you can read out the data at your leisure (at least until the next set of conversions arrives).
With an FPGA you will have no problem generating the proper SYNC signal (or whatever your ADC of choice requires).
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H: How to detect mains outage for 12V SLA battery charger
I'm wanting to use a 12V SLA battery and off the shelf mains charger as an uninterruptible power supply for an Arduino or similar device (via an appropriate 12->5V regulator) as also described here and here.
The battery voltage can be monitored using a voltage divider and one of the analogue i/o ports, but I also want to be able to detect from the Arduino software when the mains is off. I think what I'm after is an electronic version of something similar to this (to use for sensing rather than switchover). What is a way to do this with minimal additional components?
AI: If you are continuously charging an SLA battery at the right voltage, then you do not need any form of switchover, just run the 12v->5v from the battery, and everything will happen automatically when mains power fails.
The safest place to detect mains failure is on the DC side of the charging power supply. Like this
simulate this circuit – Schematic created using CircuitLab
I'm not suggesting you hack into the charger to identify the pre-regulator voltage. I am suggesting that you use a 20v (ish) DC output wall wart, and build the regulator from an LM317. If the 317 doesn't sound attractive, you can buy cheap DC input 13.8v charger modules designed for float charging SLAs.
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H: Which type of capacitor to use for matching the data sheet?
I want to choose decoupling capacitors for some microcontroller peripherals, which in their data sheets only specify some capacitans. Since you have quite a choice of passive components and the data sheets not always specify which type to use (ceramic, some electrolytic, aluminum or tantalum) I feel insecure.
The data sheet says to use a 1uF and a 0.1uF cap. I feel sure that the 0.1uF one could be a ceramic. But could the 1uF be one to? I want to operate at 3.3V will a 1uF ceramic cap lose to much capacity to make the recommended 1uF. And is a 0402 cap as good as a 0603 for the same capacity?
Thank you for any help!
AI: Decoupling capacitors are usually of the ceramic kind, sometimes combined with an electrolytic capacitor. Ceramic capacitors are widely used for most applications, the electrolytic ones are useful if you need higher capacitance values in a relatively small package. In most cases ceramic capacitors will fit your need just fine
I usually use the biggest footprint I can fit on to the board (0805-1206) unless I don't have the space. Capacitors with bigger footprints usually have a higher max voltage rating without a lot of added costs. Also they tend to have improved temperature stability. So the 0402 cap will probably have a reduced max rating, and slightly reduced temperature stability in comparison with the 0603. But if you are not planning on using the product in extreme environments and the Vmax of the 0402 fits your needs (including some extra tolerance as buffer) it should be fine.
Another thing to watch out for is the type of capacitor X5R, X7R and C0G/NP0 are less susceptible to a broader temperature range as Y5V.
This is I think pretty much the basics, other things that can be taken into account are the ESR/Q needed for example. Which can be of importance when designing filters of switching power supplies.
ADDITIONAL EDIT:
I just briefly want to add that if you are working with high frequency, where the performance is determined mostly on the inductance. That a 1206 SMT capacitor will have approximately twice the inductance of a 0603 capacitor. Therefor for high frequencies it is recommended to use the smallest practical size for the application. And find the largest capacitor value available in this size. (A smaller value will have no improvement in high frequency performance but will degrade low frequency effectiveness)
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H: Operate a switch from a USB port
I have almost no experience with electronics so this might be a stupid question.
I have a "switch" that I want to operate from a computer running Linux, it's actually two cables that I need to connect to each other closing the circuit for about 1 second. They operate at 5V.
I did some research and apparently I can do this with an Arduino, but since it seems like a very simple circuit I was wondering if I can build something with only a few components. I also found the Teensy board but it still seems overkill.
Any advice?
AI: You could do this with a microcontroller, and the hardware can be very simple, using something like a PIC18f4550 which can run at 5 volts, you would just need the PIC, a couple of decoupling capacitors, a transistor, relay and flyback diode; there would however be a fairly significant software burden.
A much better solution in your situation is to get a ready made unit off the shelf which provides this functionality, something like this, though I have no experience with it so can't vouch for the quality, it just turned up with a quick google.
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H: Behavior of frequency in a sinusoidal circuit
My question is in regards to a circuit like this with a sinusoidal voltage source Vin. When I try to figure out the voltage ratio between Vin and Vout I get ωCR/(ωCR - j). I then try to figure out what the Vout becomes when ω >> cutoff-frequency(1/RC) AND ω << frequency(1/RC). For the first instance, I get that Vout will be 1 because as the frequency becomes bigger, the capacitor acts like a short circuit. But what happens when the frequency becomes smaller than the cutoff frequency?
AI: You can rewrite your equation as:
$$\frac{V_{out}}{V_{in}} = \frac{1}{1 + \frac{1}{j\omega RC}}$$
Since R and C are constants, the question is what happens qualitatively as the value of ω changes.
When ω = 1/RC, the \$\frac{1}{j\omega RC}\$ term is essentially unity (ignoring phase for the moment), so the overall expression becomes \$\frac{1}{1+j} = \frac{1}{\sqrt{2}}\$. This is known as the half-power, or -3 dB point, and we call this the cutoff frequency of the filter.
When ω >> 1/RC, the \$\frac{1}{j\omega RC}\$ term becomes very small, so the overall expression becomes \$\frac{1}{1+0} = 1\$. As you say, the capacitor behaves as a short circuit.
When ω << 1/RC, the \$\frac{1}{j\omega RC}\$ term becomes very large, so the overall expression becomes \$\frac{1}{\text{large number}} = 0\$. Now the capacitor behaves more and more as an open circuit.
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H: Current relationships across a voltage step down convertor
This question arose from a conversation over the weekend and we tied ourselves in knots trying to get to the bottom of it. I didn’t have time to put a simple circuit together so it would be great to get some expert thoughts on this.
Given a circuit as follows:
With a 12v supply attached we get the following readings:
V1 - 12v
A1 - 50mA
V2 - 5v
(1) With SW1 open, assuming the buck convertor is 80% efficient, what is the expected value of A2?
(2) With SW1 closed, same question/assumptions.
(3) Why?
(4) What is the correct way to talk about the difference between measurements at A1 and A2. Is it correct to say that the excess current (46mA) flows into the negative terminals of the buck converter?
Thanks in advance!
Edits/Clarifications
This is a simplified version of a real circuit that promoted some discussion. The original components were as follows:
Buck converter module: https://www.amazon.co.uk/gp/product/B01MQGMOKI
The module shorts the In- and Out- terminals internally (making SW1 irrelevant as folks have pointed out).
Mini Ammeter (A1): https://www.amazon.co.uk/gp/product/B00PGOUX0W
This module forced me to place the ammeter on the return side of the circuit since it effectively shorts the -ve power and test terminals.
AI: Forget about the SW1 switch open or closed it doesn't matters. Because the input and output are not completely isolated(means -ve will be common for input and output).They are already interconnected inside the buck converter itself. The answer to your first question is that in theory ,you can take 96mA output from A2 but it still purely depends on the load. Buck converter efficiency will vary depending on the load. If you have lighter load on the output side,the efficiency will be much good. If you have more heavy load,then it's efficiency will start to degrade.The degraded performance is due to dissipation of heat due to heavy loads. So practically it not the case that you'll always have constant efficiency irrespective of the load at the output of the buck converter.
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H: How to correctly test a 4-channel Logic Level Converter?
I have a 4-channel logic level converter (it says Level Converter MH on its back and seems to be a very common one for Raspberry Pi and Arduino usage) and wanted to test it's functionality. I don't have a data sheet for it, but its this thing: Link to the product at mepits.com.
Here are images of my board:
I use a 545043 YwRobot breadboard power supply, which provides 5v on one side and 3.3v on the other of my breadboard.
On the low-voltage side of my converter I connected LV to + of the 3.3v side of the power supply and GND to -.
On the high-voltage side I did the same but to the 5v +/- on the power supply.
I then connected LV1 to +3.3v (directly from the power supply), to simulate HIGH, and expected to measure +5V on HV1 against the GND on the high-voltage side, but my multimeter only showed 2.9v.
This is my wiring:
The negatives are already connected together on the power supply on the left side, but I added a direct connection to double-check anyways.
The upper side is the 5V side, the lower the 3.3V side.
So my question is, did I understand something wrong and wired it up wrongly?
AI: Thanks for the photos.
The updated photos of the converter's PCB don't reveal any concerns.
However looking at the photo of your breadboard, a problem is clear: You haven't soldered the header pins onto the logic-level converter.
That will lead to a variety of potential problems, depending on which connections made good-enough contact, and which do not.
Please solder the header pins to the converter board, re-test, and report back.
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H: How much capacitance/joule/watt is needed on average household' energy storage system with supercapacitor?
I am on the process of making assumption how much capacitance/joule/watt is required on average supercapacitor as household' energy storage system. I plan the design for energy hub to be charged by electrical grid on night, and by the sunlight on daylight. I've found that for normal household energy use, the power supplied by meter (9.2 kVA on average) should suffice. In theory, this allows you to simultaneously supply devices with a maximum power of 9.2 kW or 9200 watts. Does it mean that ideal household supercapacitor for renewable energy resource (sunlight) on energy hub is 50% or...? Any help would be appreciated. Thank you.
AI: Here's a quick calculation, using an example 500 F, 16.5 volt supercapacitor (https://www.mouser.com/datasheet/2/257/Maxwell_16VModule_DS_1009363-10-1179674.pdf)
Assume your converter electronics can work between 5 and 15 volts with a 90% efficiency. At 5 volts, this capacitor would have energy ( 1/2 * C * V^2) of 12,500 joules. At 15 Volts it would have an energy 112,500 joules. Subtract and you would have 100,000 joules to work with if the capacitor was charged to 15V and discharged to 5V.
Since a joule is a watt-second, you have 100,000 watt-seconds, and at 9200 watts you have a theoretical 10.9 seconds (100,000 / 9200) of capacity in each capacitor of this size. Throw in your 90% efficiency and you are just under 10 seconds of capacity for each 500 F, 16.5 volt capacitor. So calculate the number of seconds you want to run the household, and you will see how many capacitors you need.
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H: Can high power USB destroy older devices?
My brand new pair of bluetooth headphones stopped working after charging them with a 2.1 Amps USB outlet. I can't turn it ON anymore. I do see the LED battery Green then I charge it though. I noticed on the datasheet that the Amps for the headphones are 500mA and I've been charging them with my 2.1A usb plug. Could that have friend the circuitry? I'm not sure how battery works, for from Ohms law, IR=V if V is constant 5V, and R I'm guessing is too, then A could not vary.
AI: No, that's not the way it works. The USB supplies 5V at whatever current the device wants to draw, up to some maximum (2.1A in this case).
It is possible, however, for the USB outlet to be faulty and providing more than 5V, which could damage something plugged into it. Or the headphones could just have failed (infantile failures are not unknown in electronics).
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