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H: Verilog: Output propagation
I'm learning to use Verilog in a digital systems course. I have a question about value propagation.
I'll use the example below to ask my question.
module sampleModule
reg a,b,c;
not g1(d,b);
and g2(e,a,d);
and g3(f,c,e);
initial
a=1;b=1;c=0;
endmodule
I want to verify that my understanding of Verilog is correct: What I believe will happen right after time=0, when registers a, b, and c are loaded with the appropriate values is
Verilog will notify g1,g2,g3 that the values of registers a, b, c have changed.
In some indeterminate order
g1 will update its output value, d.
g2 will update its output value, e.
g3 will update its output value, f.
Gates will continue updating values until all are stable.
First off, is that right? Secondly, in the example above, the values will eventually stabilize, so Verilog is "happy" to update output values in any order. However, what if such is not the case and Verilog is given a poorly arranged feedback loop that alternates infinitely between two values? I understand that one can delay output propagation, but if not properly arranged, how does Verilog deal with an arrangement that should theoretically behave this way?
AI: Yes, that is correct behavior of event driven simulation. But it can broken down even further. You update the value of a and g2 could update the value of e. And then either b gets updated, or g3 updates the value of f. Only the statements within the begin/end block have guaranteed ordering so that a must be updated before b, and b must be updated before c.
And yes, even with a simple nand g4(o,o,i); you can create an oscillation when i goes to 1. With a 0 output delay your simulation will hang. Most simulators catch this by placing a limit on the number of evaluations that can happen without time advancing. But with a non-zero output delay, o will oscillate until something else stops the simulation. The simulator has no way of knowing what the intent was; it does what you tell it to do.
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H: CD4052 multiplexer with different input voltages
I've been working on designing a PCB for my indoor garden and i'm facing a problem i dont understand.
In my design i use a multiplexer (cd4052), to choose which sense resistor my current sensing chip (ina219) is reading.
I have 4 different sense resistors,
12V in
5V (right after a linear regulator)
12V out LEDS 1
12V out LEDS 2
After receiving and soldering everything correctly (i guess), i end up measuring 11.3V where it should be 5V.
So i've soldered a 2nd PCB with only some components, the 5V output is correct until i solder the CD4052...
MP_0, MP_1 and MP_2 are linked to a resistor on the 12V routes
MP_3 is linked to a resistor on the 5V route
I may have missunderstood things about the CD4052 documentation but i'm stuck anyway.
Thanks for reading/helping !
AI: You are applying 12V to pins of a chip that is powered by 5V. It cannot handle that and current will flow via IO pin protection diodes from IO pins to 5V supply, which explains why the 5V is now 11.3V which is 12V minus one diode drop. The inputs and outputs of the chip must be within the range of the power supplies.
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H: 3.7V to 7.5V step up circuit
I need a circuit which can step up the voltage from my 3.7V Li Ion battery to 7.5V.
The current requirements are pretty small (up to 50mA max), but I have a latching solenoid which requires a short 7.5V pulse @ 350mA and so the step up circuit must be able to supply this too. I designed one based on the MC34063A but the Ipk value was around 2A and I don't think the IC can cope with that.
Would anyone be able to recommend a differnt IC that I could use. Power consumption is the main concern since it's a battery powered project and so ideally I want the power consumption of the IC to be proportional to the output power, i.e. I don't want it to draw a lot of power while it's only using up to 50mA in order to cope with the larger pulse.
AI: 1.5 amps needn't be the limit when using the MC34063A chip: -
But, even if the peak current is limited why not run in CCM mode? If your input voltage needs to be as low as 3 volts (for example) and you used a 15 μH inductor, I can't see the peak inductor current exceeding 1.75 amps: -
The above calculation is based on producing 8.1 volts (7.5 volts after a non-ideal rectifier) at the output and driving a 20 ohm load from a 3 volt input supply. \$I_{PEAK}\$ is 1.723 amps. Switching frequency is 100 kHz.
I've also assumed that once the output capacitor is charged up to the required output voltage that it will "soak up" the 350 mA pulses to a certain extent. In that respect, I've made the assumption that the output current will average at 375 mA. The MC34063A has a current limit facility so I don't really see it having a problem.
Calculator can be found here.
If you used a 22 μH inductor, the peak inductor current is 1.523 amps.
If you use a 33 μH inductor, the peak inductor current is 1.380 amps: -
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H: Single conductor connecting two parts of a circuit vs two separate circuits
In a textbook exercise, this circuit appears
simulate this circuit – Schematic created using CircuitLab
Solving it was no problem, but checking the answer it stated that i0 must be 0 as no current can flow in a single conductor connecting two parts of a circuit. The consequences raised some questions:
Does that mean that the connection between A and B is unnecessary?
That the diagram you get by removing this connection is equivalent to the original?
With no current flowing, must the voltage between A and B be 0? If these were two separate circuits,
couldn't the voltage be anything? If the voltage is non zero, why won't the current flow?
From a practical perspective, how can the voltage controlled current source know the value of v0 if there is no connection between the parts. Is there some real world hidden connection in such current sources that are abstracted away in diagrams?
Thanks, from someone just starting out with simple hobby electronics.
AI: The connection might be necessary. See 2)
There is no voltage difference between A and B because they are connected with an ideal wire. In some cases it is important to maintain the same reference voltage in two or more parts of a system, so we connect them together with an ideal wire. This ideal wire is often called "ground".
This schematic is an ideal model of a circuit, so the dependent sources "know" what is controlling them because you marked it on the schematic. In the real world there would be some physical connection between the two.
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H: PNP switch is conducting
I have a simple circuit which causes problems. This circuit should act as a switch but it is on when it should not be.
I have a VCC that can go up to 50/60 V. Q2 is a high voltage BJT so therefore I selected it. However, the circuit does not function very well. Without powering the opto-LED, when I put for example 9.5 V DC on the collector of Q2, the output at the emitter is also at 9.5 V, which tells me the BJT is on. This should not be happening.
The base is at 9.2 V and the collector of the opto coupler is also at 9.2 V which indicates the opto coupler is not on. The 9.2 V is a strange number because I suspected it to be somewhere around 8.7 V due to the diode drop.
I believe there is a small leakage current turning Q2 on.
Any idea what is wrong and how to improve this circuit?
AI: Even with the opto-coupler "off" there will be enough leakage current through the transistor to slightly turn on Q2.
There is a current path from the 50V, through the E-B junction of Q2 (basically a forward biassed diode), through R6 and through the opto which might be officially "off" but will still pass a bit of leakage current. That tiny bit of current passes through Q2 base and is amplified by its hfe. The current has nowhere else to go, and you probably have 0.55 or 0.6V Vbe on Q2 because of this - Q2 is "just about on".
It depends a bit on what range of voltage you expect your "50/60V" to be, but you need to ensure that the opto needs to be properly on before Vbe of Q2 gets to 0.6V or so. A resistor in the emitter of Q2 helps, but better would be a shunt resistor (about 470R should do it) from Q2 base to the 50V in.
This still allows Q2 to saturate on when the opto is on (0.47/20.47 * 50V = 1.1V, plenty to turn it on), but will shunt away the leakage current of the opto from Q2 base when it is off.
(Note however that that value likely won't alleviate the problem with 12V in, so you might have to tweak this approach to fit your expected range of input volts.)
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H: Solder station grounding setup
I have a Sugon T26 soldering station.
It has an European 2 pin plug, I have a 3 pin adapter for it.
As far as I am aware there will be no ground connection using this method.
It comes with a ground connector on the station, crocodile clip style.
Where should I connect the clip? (I am situated at home.)
I have no access to a ground other than in the wall socket.
Am I better off trying to source a 3 cable wire for the power supply and fixing a standard UK plug to it?
AI: You solder station designed to use in industry. They usually have ground separate from power ground, which is for safety. For home use you may replace power cable with 3 wire and grounding pin and connect green wire to chassy. The iron body should be grounded. That crocodile style connector for antistatic rug and bracelet.
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H: Decoupling Capacitor Loop Length vs Loop Area
When considering inductance reduction, what is considered more important? Reducing the loop length or the loop area? Below are two examples for visualisation, I am ignoring a lot of ways to reduce inductance (e.g. groundplanes, via teadrops):
Assuming both loop lengths are the same, why would loop area impact inductance?
AI: When considering inductance reduction, what is considered more
important? Reducing the loop length or the loop area?
Loop area is the most important consideration.
When the wires are close (forming a smaller loop area) the magnetic field on one wires tends to cancel out the magnetic field from another. That reduces loop inductance.
If you use this parallel wire calculator and mess around with values you'll get the gist.
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H: Differential and Common currents in EMI Design
I need some clarifications about an application note from ON Semiconductor I have downloaded form the following site:
http://www.icbase.com/pdf/add/on/AN-106-00003en.pdf
The discription of the differential and common mode given in the application when referred to figure 1b, confused me!
What confused me is the statement encircled (Maybe my English is not good enough)
If we look to the image both DM source and CM1 are sourcing up and yet it has been said that DM is out of phase in each branch and CM is in phase both to the DC rail and ground.
What is it meant by these two statements?
Can someone redraw the direction of both currents through the whole circuit ?
AI: The below picture should shed more light on the way these currents circulate in the circuit:
The differential-mode currents can be quite easily predicted with a simulator considering the below scheme while common-mode types are more difficult to predict/model as they involve PCB layout, stray capacitance with heatsinks (if any) or inter-winding capacitance for instance:
You will need dedicated receiver and line impedance stabilization network or LISN to assess the level of noise. Please note it is best to combine signals coming from the LISN line and neutral outputs to isolate differential- and common-mode contributors.
The LISN is there to fix the grid output impedance to 50 ohms from 150 kHz to 30 MHz. That way, measurements performed in France or in the US are done on the same grid output impedance.
Disclaimer: I plead guilty for writing the application note you referred to. I was wearing short pants at that time : )
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H: Combining 2x1 mux and 4x1 mux with AND gate
I've found an example from my teacher's notes and I've no clue how to solve it. Could someone help me?
Find the F output
Please go easy on me I'm still trying to learn this. My first attempt was completely wrong I've checked the MUX truth table again so here is my solution.
4x1 Mux should be:
A'B'C + A'B0 + AB'1 + AB1 = C+A
2x1 Mux should be:
AB + 0 = AB
then
(C+A)AB = AB
I'm using this website to simplify boolean algebras.
AI: Your answer is incorrect, since when computing the output of both multiplexers, you incorrectly took into the account the dependency of the output on the selector / selectors. Watch closely how I did it and compare to the results you got!
According to the truth table of a 2x1 mux and a 4x1 mux, we can write the following, and use boolean algebra rules in order to simplify:
The output of the 2x1 mux: $$Z_1=A' B+A\cdot 0=A'B$$
The output of the 4x2 mux: $$Z_2=A'B'\cdot C+A'B\cdot 0+AB' \cdot 1+AB \cdot 1 = A'B'C+AB'+AB=A'B'C+A$$
Then, it's clear that: $$F=Z_1Z_2=A'B(A'B'C+A)=A'BA'B'C+A'BA=0+0=0$$
Or, in other words, the output F is False.
P.S - I used this helpful site to verify the answer.
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H: 10Gb link data transfer between FPGA && PC
I'm trying to transfer data from 10Gb ETH subsystem of FPGA to 10GB ETH card of PC. SFP, RJ45 and ETH cable comprise of this data transfer pipeline. The RTL code is ready for testing and I'm looking forward to develop a PC side application to initiate the 10G protocol to initiate the link between the FPGA and PC to acheive successful data streaming without data loss.
Can anyone help me with where do I start and what all do I need to learn and understand to solve this problem.
AI: initiate the 10G protocol to initiate the link between the FPGA and PC to achieve successful data streaming without data loss.
There's not much to "initiate" at the link level: as soon as the MAC IP you're using initializes the link, you're ready to use it. The IP will have some signal(s) that indicate the link status.
Once the link is up, the FPGA should initialize a link-local IP address; for IPV4 that would be in the 169.254/16 subnet and start sending the data using the UDP protocol. In the simplest case of a point-to-point link, the data can be sent to the broadcast subnet, i.e. 169.254.255.255. You can select some unused port to send the data to - ideally it should be a port >= 1024 so that unprivileged applications could bind to it.
The application that is to receive the data needs to bind a UDP socket, at the chosen port, to the link-local IP address of the interface (network card) used to connect to your FPGA-based device. You'll need to enumerate the network interfaces and choose the appropriate one. Do offer the user a drop-down list if there's more than one interface with a link-local address.
The application will now be receiving the broadcast messages from the FPGA. But efficient reception of 10G traffic without dropping any packets requires care. The core requirement is to let the hardware fill your receive buffers, without the involvement of the CPU, and thus without thrashing the caches as well. The job of the buffer filling should be done by the motherboard chipset acting on the PCIe transactions generated by the network card. Common operating systems provide a mechanism to exploit that.
On Windows, you'll have to use overlapped zero-copy I/O (Registered Input/Output (RIO) API) so that the network card writes the packet contents directly to the buffers you provide - several buffers have to be preallocated ahead of time for that, so that you don't starve the network card of buffers. The operating system's job will then only be to signal to your application that the buffers have been filled.
On Linux, you'd use io_uring (available since kernel 5.1) or similar - see this Q&A for equivalent APIs on Linux. The use of io_uring is essential to minimize the "long tail" of packet loss (i.e. the rare packet drops). Using Linux's usual Asynchronous I/O (AIO) is necessary, but the overhead of shuffling packets between the kernel and userspace occasionally drops packets that would otherwise not be if using io_uring, especially if the kernel misjudges the necessary number of buffers to submit to the network card to keep it streaming without overflows (packet drops).
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H: Controlling a 5V power supply with a 5V signal
The might sound like a dumb need. Why if I have a 5V control signal would I want to control a 5V load? The issue I am up against is a voltage drop over a long run. In a home automation setup the installer used an extended run from a 5V power supply that is switchable because it is plugged into a wattbox for power cycling in case the end powered device gets locked up. This is a great feature to have but the problem that the long run created is now having an unreliable voltage at the end point device. (In other words, it works most of the time but not all of the time)
Ideally, rather than trying to boost the supply voltage to compensate for the long run, I would like to have this long power supply run become a control signal run rather than power. Then, at the end point use that 5v signal (which is more like 4.2 under load) to control a local 5v 2A power supply. I guess I could easily control the AC power going to the adapter via a solid state relay but then I get into needing to mess around with the high voltage side of things. I thought it would be easier to put a relay on the low voltage side of the local power supply but the SSR I first tried had too much of a voltage drop across the output connection and I was back to square one.
Is there a low voltage relay type solution that would work for this? If so, please call out specifics because I am lost to find anything that makes sense.
Do NOT suggest running a lower gauge number wire. That is not possible in this setup and I need to use what is there. I also want to keep the power management where it is. I just want the power supply to be localized for stability.
If I am going down the wrong road here and the AC side is the best place to control on the local end let me know that too.
AI: Switching a large current with a small one is usually done with a (MOSFET) transistor, especially for low voltage applications.
So this is what you might need:
(Notice that the MOSFET inverts the polarity of the switching signal in this circuit! 5V=LAMP ON, 0V=LAMP OFF)
simulate this circuit – Schematic created using CircuitLab
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H: Unable to toggle an LED with STM32 Blue Pill
I'm a beginner, and I'm using an STM32 Blue Pill board for the first time. I completed a basic tutorial on how to activate the PC13 pin (on-board LED), but now that I'm trying to get an external LED to blink on a breadboard, I'm having issues.
I'm using the STM32CubeIDE, and allowed the IDE to autogenerate the configuration code that I need to use pin PA0 as GPIO output:
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_RESET);
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pin : PA0 */
GPIO_InitStruct.Pin = GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
Within my loop, I'm simply running
while (1)
{
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, 1);
HAL_Delay(500);
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, 0);
HAL_Delay(500);
}
Despite this simple code, I can't get the LED to blink. Here's a picture of my circuit:
To summarize, I have the 3.3v and ground pins connected to the breadboard power rails at the bottom (with a red power LED). I have a jumper cable connecting the A0 pin to row 25, and a 330Ω resistor in series with a 5mm LED with a forward voltage of 3.0V and a forward current of 20mA. I then connect the cathode of the LED to the negative power rail on the breadboard (attached to board ground).
I've tried swapping jumper cables, output pins, LEDs, resistance, but nothing has worked. I connected the pin jumper cable to the positive power rail, and the LED lit up (as expected), so I don't think there's something wrong with my circuit. I've also re-programmed the MCU to make sure my program was uploading correctly. Perhaps I'm misunderstanding the relationship between the pin and ground? Any help would be appreciated.
AI: You want to toggle Port A pin 0, but you are actually toggling Port C pin 0.
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H: What is scratchpad memory?
What is a scratchpad memory?
I mean I get the article in principle, but I can't figure out how it exactly differs from other memories e.g. L1 Cache.
It
is a high-speed internal memory used for temporary storage of
calculations, data, and other work in progress.
is no explanation for me. From my pov this could be applied to almost each kind of memory.
AI: Scratchpad memory isn't a "type" of memory. It is the purpose the memory is used for, but any type of memory could be used for that purpose.
Semiconductor marketing of course picked up on this confusion long ago: if there's a "market", we shall fill it, and thus you had products designated as scratchpad (or cache!) RAM - they were simply "small" static RAMs, fast enough per whatever the marketing folk thought the typical scratchpad/cache use calls for. It's all marketing though: scratchpad/cache is what you make of it, not what it is :) And thus cache tag RAM wasn't merely called "cache RAM", it was called tag RAM, because "cache RAM" was already the way fast SRAM in narrow DIP packages was peddled at the time.
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H: Use a transistor or MOSFET as a switch to control a solenoid
I am working on a project to control a solenoid (12 V/DC 12.96 W) with an ESP32. I have attached a circuit design as it is in picture.
I have couple of questions:
Would this circuit work properly?
Do I need to change the transistor (PN2222) to a MOSFET (IRLB8743PBF)?
Solenoid force varies between 30N,59N. How can I control the force of the solenoid via the ESP32?
AI: Would this circuit work properly?
No. You are applying 12 V to the 5 V supply input of the ESP32 module, which will blow it up. You need a voltage regulator or DC/DC converter to drop the 12 V down to 5 V.
Do I need to change the transistor (PN2222) to a MOSFET (IRLB8743PBF)?
Yes. The solenoid draws 12.96 W / 12 V = 1.08 A. PN2222 is rated for 600 mA absolute maximum, so it is nowhere near sufficient. IRLB8743 can handle the current easily, but it is designed for 4.5 V or higher Gate drive. Since the ESP32 only puts out 3.3 V you will probably need a level converter to provide sufficient Gate voltage.
Solenoid force varies between 30N,59N. How can I control the force of
the solenoid via the ESP32?
Solenoid force varies as it moves through the stroke, generally getting stronger as it reaches the end. You can vary the current using PWM, but that can only make the force less than it is normally, eg. at 50% PWM it would vary from 15N to 30N.
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H: LTSpice - voltage goes through the roof in LC circuit
I am trying to simulate an oscillator in LTSpice.
So I tried to make a simple LC circuit.
Since a voltage source would not make the circuit oscillate,
I did not use a voltage source and made the capacitor start with 6 volts.
But for some reason the voltage just explodes and goes to almost 200kV.
I have no explanation for this phenomenon.
Maybe someone can help me with this.
https://i.stack.imgur.com/LxLSl.jpg
AI: To expand a bit on Tony's comment, LTspice has a default series resistance of 1m\$\Omega\$ for an inductor, so you have an initial current of 6,000A.
Aside from being pretty unrealistic unless the inductor and core were enormous, that means that there is 18,000 J of energy stored in the inductor, so one would expect a peak voltage across the capacitor of about 190,000 V from conservation of energy.
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H: How to get a 1 clock period pulse from a constant signal clock input on every 64 clocks?
I would like to "extract" a one period pulse from a constant clock signal on every 64 clocks. This pulse signal is to be used for reset. What kind of logic circuit should I be looking for?
Thank you.
AI: I have assumed that you just want a high pulse out during the high phase of the clock
every 64th clock pulse.
4024 is a negative edge triggered 7 stage binary counter. 4068 is an 8 input Nand gate. 4013 is a Dual D-Type flip flop.
Output of nand gate is usually high holding D type flipflop in reset. On a certain falling edge of the clock, the counter will increment to all ones output. The nand output goes low releasing the reset on the flipflop. The next rising edge of the clock clocks a one through to the Q output of the flipflop. The next falling edge of the clock makes the Q1 to Q6 outputs roll over to all zeros, the nand gate output goes high reseting the flipflop.
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H: Does anyone know what the nitrogen gas on this telephone pole is for?
I saw this out walking. The tank had a sticker saying it is nitrogen. I followed the brown hose up to the cylinder on the what looks like a power wire. I would think it is a non-air "bath" to prevent arcing. I don't know what the cylinder is. Seems like something someone would steal, but the tank was left there in the open secured with an easily cuttable steel chain. So it must be worth it to have it there.
AI: Most likely, the dry nitrogen is being used to flush moisture from cables. "It turns out they're there to keep copper cables dry so phone and internet services can run smoothly." See also the Answer Man.
Pressurized nitrogen is also used to force optic cables through tubes. In that case, though, the cylinder would only have been used for a short while.
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H: MAX485 DMX connection polarity/pinout
Im working on an Arduino project that involves receiving DMX with a MAX485 chip. The pinout of the chip has the 2 dmx pins labeled as A and B, but all the DMX pinouts have them labeled as + and -. What connects to what? Looking around, I have seen diagrams showing both ways. Which one is correct?
AI: MAX485 A is high when data is logic 1.
DMX512 + is high when data is logic 1.
So MAX485 A pin is DMX data+.
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H: Stepping up three 3.3 V outputs to 5 V
I want to use the third solution from this answer to step up three of my GPIO pins from my Raspberry Pi.
Would I need to make one of these circuits for each of the pins or could I, for example, replicate the bottom row again and increase the value of the resistor?
AI: Using diodes is a bit iffy because the MAX7219 requires max 0.8 V low and min 3.5 V high. Diodes will just manage this, but noise rejection will be compromised.
A simpler solution might be to use a 5 V logic gate IC with TTL input levels (0.8 V low, 2.4 V high) from eg. 74LS or 74HCT series.
If you only need to buffer 3 outputs then any IC with at least 3 non-inverting gates will be enough. Suitable candidates include (where 'x' = eg. LS or HCT):-
74x04 or 74x14 (6 inverters, wire pairs in series to produce 3 non-inverting buffers)
74x08 (4 AND gates, tie one input high to make non-inverting buffer)
74x34 (6 non-inverting buffers)
74x86 (4 XOR gates, tie one input low to make non-inverting buffer)
74x125 (Quad bus buffer, tie Enable input low to active output).
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H: Stopping flyback spark from inductor, but only some of the time
I'm currently working on a project designing an experimental engine control unit, which ignites a flammable mixture with a standard spark plug and standard ignition coil (the old style https://en.wikipedia.org/wiki/Ignition_coil). The primary is first charged to a nominal voltage (12V I think) then, to generate the spark, the primary voltage is quickly dropped to zero and the collapsing magnetic field in the secondary inductor causes a voltage spike across the spark plug. I'm controlling the primary voltage with a microprocessor and MOSFET and charge the primary when the engine is "armed" and turn off the coil when "arm" is switched off.
I'd like a way of making the spark coil fail-safe, i.e. if there is a sudden power cut, no spark will be created due to the sudden voltage drop, but be able to generate a spark by intentionally dropping the voltage whenever needed. This needs to be 100% reliable, as it could be safety-critical if there is a build up of explosive gasses and an emergency shutdown is needed. I understand usually you'd connect a flyback diode (plus Zener/resistor) in reverse bias across the coil to stop the voltage spike, but the voltage spike is needed to generate a spark...
I looked at make-before-break relays to connect the flyback diode before the primary current is switched off, but couldn't really find any available and I'm not sure how they could be connected to stop the spark in the event of a power cut or when the "arm" switch is turned off. Likewise with using solid-state switches to include a diode in the loop, I'm not sure if it could be connected quickly enough to beat the voltage spike.
Thanks in advance for any input, this has been puzzling me for months now. I'm a mechanical engineer at heart, so please be patient if I've misunderstood anything in the above!
AI: Instead of charging up the coil in advance, can you just apply a pulse to your FET when you want to create a spark?
Or
Is there some scenario where a 100ms pulse would need to be prevented from creating the spark after the rising edge has already happened?
EDIT:
Thinking more about this, if it is safety critical, then you should have a shorting relay on the output. When the emergency button is pressed or power is cut, then the output of the coil is shorted. Obviously you'd have to find a relay that can stand off the sparking voltage.
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H: Wiring 2P2S battery pack
I have 4 18650 batteries and I want to make a battery pack of it. If all the batteries were new and had similar voltage/capacity I could easily charge them all together in parallel with my charger. However the batteries have about 10% difference in capacity so I need to charge them using a balance wire on each battery/cell.
My problem is this: I have 2 circuits that I came up on my mind (drawing below) in such a way that one circuit is for charging and the other for discharging. So how do I do the wiring in such a way that I can solder the wires to the batteries (spot weld) and have a DISCHARGE port (+ and -) and a CHARGE port (GND and cell 1, cell 2, cell 3 and cell 4)?
AI: Parallel charging works better then no balancer is needed. Just reduce the max CC for 3cell and the low cell will just charge up faster.
You may want to monitor the weak cell for low voltage or use as higher cutoff for low voltage as the imbalance will undercharge the weakest cell first if/when used in series.
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H: Resistances calculations
The question is as shown below:
The answer from the book is as follows:
However, below is my attempt, is my approach accurate?
AI: 1. Your calculation for R2 contains a sign error
Double-check your equation
$$
-v_{gs} + i_dR_2 - 6 = 0
$$
There is a sign error in there. It looks like you're using KVL; double-check and be very detail-oriented in how you apply KVL. Correct the sign error and you will get the correct answer.
2. Your calculation for R1 is correct -- actually more correct than than the "solution"!
By your calculations you end up with a value of 4.8kΩ. In the answer key they just round this to 5kΩ:
$$
R_1=\frac{6V-1.2V}{1mA}=4.8k\Omega \approx 5k\Omega
$$
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H: What is the importance of peak factor and form factor?
I get that form factor and peak factor are suppose to be ratios involving the RMS, maximum and average values of current or voltage for AC circuits, but I don't get specifically why those ratios are important that they need a special name. Is there any explanation or usage that shows importance to why the quantities for those ratios are selected and placed that way?
AI: If in fact you mean crest factor then the wiki article linked provides a good source. So, for instance, crest factor is a useful term when applied to multimeters: -
Crest factor is an important parameter to understand when trying to
take accurate measurements of low frequency signals. For example,
given a certain digital multimeter with an AC accuracy of 0.03%
(always specified for sine waves) with an additional error of 0.2% for
crest factors between 1.414 and 5, then the total error for measuring
a triangular wave (crest factor = 1.73) is 0.03% + 0.2% = 0.23%.
For other applications, consider an audio amplifier designed to handle an RMS signal of 1 volt at the input. If we didn't understand anything about the crest factor of the actual signal into the amplifier, we might design it to work with 1 volts RMS sinewaves and neglect the fact that for an audio signal, the crest factor is quite high. Neglecting the crest factor would mean that the amplifier would distort heavily on the audio peaks: -
Is there any explanation or usage that shows importance to why the
quantities for those ratios are selected and placed that way?
For simple waveform shapes like sine, square, triangle and sawtooth, the crest factor is unimportant to state because, mathematically the signal shape defines what the peak to RMS value actually is.
As for form factor the Wikipedia article explains it sufficiently but I'll focus on one particular point of relevance: -
Digital AC measuring instruments are often built with specific
waveforms in mind. For example, many digital AC multimeters are
specifically scaled to display the RMS value of a sine wave. Since the
RMS calculation can be difficult to achieve digitally, the absolute
average is calculated instead and the result multiplied by the form
factor of a sinusoid. This method will give less accurate readings for
waveforms other than a sinewave.
So, it comes into play when cheaper voltmeters are used to measure (or infer) the RMS value of a signal. We are nearly always interested in the RMS value and more expensive equipment will have "true RMS" measurement capabilities but cheaper equipment will use an inexpensive signal rectifier and then low pass filter that rectified output to make an estimate of RMS. If the signal is a sinewave then, the meter knows that it has to multiply the averaged-rectified value by 1.1107 (\$\frac{\pi}{2\sqrt2}\$) to predict the RMS value. Of course, it doesn't use a multiplier; it uses a little signal gain on the average signal before feeding it into its ADC.
But, the problem comes when the signal is not a sinewave. If it were a square wave then the predicted RMS value would be 11.07% too high because the from factor for a square wave is unity. Likewise, if the signal were a triangle wave (form factor \$\frac{2}{sqrt3} \approx 1.1574\$), then the signal RMS would be predicted to be about 4% low.
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H: Inductor design tips
I should design an inductor which has these features:
3F3 magnetic ferrite material
Temperature is between 35-70 celcius
Copper filling factor, kc = 0.5
Max 10A DC or 10A AC 50kHz
U type inductor
12 microhenry
I should find these:
flux density
current density
turn number
gap space (if there is)
turn area
I considered using this resource, page 300.
Am I on right way? Do you have any trick point for me? Like advising, resources, etc.
AI: Max 10A DC or 10A AC 50kHz
You should consider this first and recognize that 10 amps AC is an RMS specification. This means that the peak current is 14.14 amps (for a sinewave). This exceeds the DC specification and so, it should be used to test a prospective design to see if there is significant core saturation.
In that requirement you said or but, if you meant and you would need to consider the worst case as being 24.14 amps.
However, there are many inductor applications that work with square waves and, a 10 amp RMS square wave has a peak current of 10 amps. So you need to define what you really want because not defining what you want will usually end in disappointment.
3F3 magnetic ferrite material
3F3 means you will use a Ferroxcube part for the transformer so, go through the parts available (there are literally hundreds of specific part types that use 3F3 material) and find the core shape that you want.
Then pick one that you think might be appropriate - Ferroxcube has some great resources so use them to narrow down the search for an appropriate core size of the right type in the 3F3 material you want.
I will add this - 3F3 is good for over 500 kHz so you might be being steered down a path that isn't necessary. For instance, 3C85 or 3C90 is probably better material at 50 kHz in some respects.
U type inductor
If you actually looked at Ferroxcube U cores, you will find that none are available in 3F3 material. They are generally available in 3C90 material. So, do some thinking and decide what you do want.
12 microhenry
So, once you have chosen a core type, you can make an guesstimate of the core size and "test" to see if it's likely to saturate. You do this by calculating the number of turns to produce 12 μH. Then with number of turns and peak current (maybe 14.14 amps) you can calculate the ampere-turns (magneto motive force). That's simply amps x turns.
You turn that into the H-field level (magnetic field strength) by dividing it by the mean length of the core (it will be specified in the core-set data sheet).
Once you have H-field you can convert that to peak flux density (Bmax) by using the BH curve for the material you have chosen (you say 3F3) - there will be a data sheet for 3F3 material so use that.
If the Bmax value is greater than around 300 mT then you are likely to be on the knife-edge of good/bad performance. Then, you can make a decision to add a gap to the core. The gap will reduce the effective core magnetic permeability and, in turn, this reduces inductance and saturation levels. So, if you need a gap, you must add more turns to get to the required inductance of 12 μH. What you will find is that if the inductance due to the gap has fallen by 4, you only need to double the turns to restore it to the right value.
Recalculate H-field - this time you use the new value for turns. H-field will obviously be bigger (with the gap) because there will be more turns but, due to the permeability reduction, there will be a clear benefit when gapping and the Bmax level will reduce.
Then, if the Bmax value is below (say) 200 mT (a bit of a rule of thumb), try to estimate how much of the available space you have for winding your turns. Remember to choose a copper wire diameter that easily handles the RMS current without significant overheating.
Iterate down the path above a couple of times and hey presto, you've designed the inductor.
Inductor Design - How do I know what value of Bmax and Current Density to choose?
How to calculate air gap in flyback transformer
Adding a gap to a core for an inductor
How to correctly use the formula for calculating the air-gap in a pulse transformer
Why do we want gap in the core material while designing inductor
Inductors, Toroid or EE Core?
How to change ferrite core of transformer
DIY inductor saturation current
How a switching PSU inductor overcomes the problem of saturation current?
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H: How were four wires replaced with two wires in early telephones?
In this video, when A wanted to talk to B, a microphone was connected to a distant speaker using two wires (A → B).
When B talked to A, a copy of above was used in the other direction (B → A) using two more wires.
This required four wires:
But then it says the two-way communication could be made by using just two wires:
How was this possible? Wouldn't the current from the microphone affect the speaker on the same side?
AI: How was this possible? Wouldn't the current from microphone affect
speaker on the same side?
The modern telephone is wired in a Wheatstone bridge arrangement like this: -
So, if you ensure that the telephone network line impedance (\$Z_{LINE}\$) is controlled then, theoretically, any signal produced by the microphone is dramatically reduced into the local earpiece. It won't be a perfect cancellation but it'll be pretty good.
Amended picture originally from here. It might be easier to understand this diagram: -
Picture from here.
And, all throughout the network there are line amplifiers that need to translate from 2 wire to 4 wires so that amplifier circuits can be added: -
Picture from here. Then another hybrid transformer is used to reconvert the 2-way (4-wire) amplified signals back 2-wire: -
Here's an example of an early telephone anti-sidetone circuit using the same principle as the hybrid transformer: -
Picture from this website.
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H: ICs on opposite sides of a PCB
I am relatively new to PCB design and circuits in general. I am routing my first 4 layer board now and I am wondering about placing ICs on top of each other on opposite sides of the PCB. The ICs in question are fully differential op amps, part MCP6D11. They all are running on 3.3v and will have a gain of 1. I am wondering if it is okay to place the parts on top of each other on opposite sides of the PCB with their ground pads connected to each other through vias as show in the pictures below. Will this cause any signal integrity issues in the audio rate analog domain? Will it be a pain to hot air solder them if their ground pads are connected so closely? Any other issues that I am not thinking of?
AI: If you are concerned about signal integrity then you most certainly want to have internal planes. Your best bet would be to have two internal ground planes to provide a low-impedance return path, as well as shielding between the chips. So to answer your question, no - there probably won't be an issue with putting one chip "above" another on the opposite side of the board provided you have internal ground planes.
When it comes to hot air soldering, yes - it will be more difficult to solder parts with a connection to a large mass of copper because said copper will wick away the heat more easily. A good hot air tool will be able to overcome this though.
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H: Measuring/confirming voltage and current
new to the site and to electronics.
I just started learning about ohm's law and Kirchhoff's voltage law and trying to confirm values I am reading.
I have a simple circuit with a 9 V battery, 100 ohm resistor and red LED, the datasheet tells me forward voltage is 2.2 to 2.4. Checking with a multimeter the battery is 9.2 V and the resistor is 99.6 ohm.
First issue is voltage, when I measure the LED it has 2.33 V and the resistor has 5.8 V, this is 8.13 V not 9.2?
Then for current I believe we first get voltage (9.2 - 2.33 = 6.87) then 6.87/99.6 = 68.96 mA but when I measure I get 56.8 mA?
I don't understand why the numbers don't add up, can anyone help explain please?
AI: When you add your resistor and LED to a feeble 9 volt supply/battery, it's likely that the terminal voltage drops so, measure the voltage across the supply when you have your circuit (resistor and LED) connected.
So, you should probably trust the implied 8.13 volts under load. But, you have to remember that the multimeter measuring amps might add a few ohms of series resistance too.
So, with 5.8 volts across the resistor you should have a current of 58.23 mA but, when you insert the meter this is slightly less at 56.8 mA. The 56.8 mA would imply a resistance of more like 102.1 Ω. So, your meter's current shunt resistor is about 2.5 Ω.
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H: Optimal coil specification connected to a 160W audio amplifier to produce an "intense" varying magnetic field
Disclaimer: I’m computer scientist
I would like to generate an "intense" varying magnetic field by connecting a coil to a max 160W audio amplifier. The theoretical output frequency range is 20Hz to 20kHz. I plan to only output sinusoidal signals in the range 500Hz to 5000Hz.
The audio amplifier I have to do that is a 4Ω SMSL SA 98E 2x160W specifications in french, less detailed specifications in English from the manufacturer.
I would like to know what should be the optimal inductance of the coil I should use and the wire thickness.
I have so far tried a 0.5mH coil with 0.5mm wire, but the coil heats which indicates that the wire is too thin. 0.5mH is ~4.4Ω at 1kHz.
What is the most unclear to me is the 4Ω impedance required by the amplifier. At what frequency should it be 4Ω ? I could not find a clarification on that with google. But I did find plenty of warnings that it can harm the amplifier if the impedance of the HP is too low.
Since I don’t want harm my amplifier, I ask the experts here if the 4Ω impedance should be at 1kHz or 20kHz. In the later case the inductance of my coil should indeed be much lower.
Edit 1: as asked by StackExchange I must clarify why this question is different from this similar question. The titles are very close, but I initially badly formulated my question which ended on a different topic (measuring inductance). Tony Stewart Sunnyskyguy EE75 did provide a precise answer to the question in the title but I was unsure if it was safe for my amplifier. This question is now more on topic and ask about the risk for my amplifier to use a low inductance. I apologise for the inconvenience.
AI: Your amp has a max output current of 10A (datasheet) and a peak output voltage of 36V.
36V peak is 25V RMS, so if you want 10A into the load that's a maximum impedance of 2.5 ohms, which corresponds to an inductance of 80µH.
Adding a bit of safety margin, let's say 100µH.
Of course, at 500Hz, the inductive part of the impedance will be 0.25 ohms, so you won't be able to use full power or the current would simply be huge. But that's a class D amp, which means it has no Safe Operating Area restrictions for the output transistors, which means you don't have to add a resistor in series or do anything special for this extremely low load as long as the output voltage stays low enough to not exceed the maximum current.
So what you could do is just wire enough turns for 100µH, then set the voltage on the signal generator to have the AC current you want in your coil. This means you must set a voltage that is proportional to frequency.
Pros: you always get the same current in the coil no matter the frequency, and you don't have to add a resistor in series to waste power.
Cons: it's a bit more complicated since you have to adjust signal amplitude.
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H: How do I wire up a 3 wire electric motor?
I bought an old Dewalt bandsaw. It had this motor attaced:
I initially thought it was just missing a switch, but in fact it has no capacitor and all the wires coming out of the motor are unlabeled. No wiring diagram is present. There are four wires in total:
I have identified the wire on the right as earth.
Using a multimeter I determined that
Green / black had a resistance of 8 ohms
Green / brown had a resistance of 16 ohms
Brown / black had a resistance of 23 ohms
I have found a replacement capacitor and wired it up like this (blue is neutral and brown is live):
Will this work? I have not yet turned it on and thought I would check here before proceeding. In trying to do this have watched plenty of youtube videos on motors and looked at wiring diagrams but am finding it tricky to match theory to reality.
Thank you in advance for any help you can give.
Will.
AI: Quick search for "dewalt dw3401 motor wire manual" yielded a manual. Wiring diagram on page 15 of pdf.
There are different variations shown. Your motor has a 1-phase symbol on the far left side of the nameplate, which is what you need. The diagrams with the 1-phase motor have the capacitor connected to brown and black.
This is consistent with your measurements, too, other than one of the wire colors supposed to be blue vs "dark green".
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H: What should a 12v solar battery read while in use?
I have a 12v solar system with 2 12v batteries (One marine, other a car battery).
My inverter has a minimum voltage input of 11.0v and peak of 15.0v, but when I'm running it under load, I get a voltage of 10.9v - 11.8v, and 12v-14v when not underload.
Is there something wrong with my setup or is this normal for a battery under load?
btw, the panels are 20v and charging the batteries while under load as well as not under load. (Charging current :500mA, solar panel current 7A.)
AI: These readings sound about right.
While charging, the voltage will be higher than the nominal 12V, while discharging it will be lower.
This is because of the internal resistance of the battery.
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H: Can you explain the operation of this RC network for a crystal oscillator?
I am trying to work out what the RC network in the circuit below does and how it works. The circuit output is fed as input to a CD4060 binary counter. According to what I have read, the signal from the crystal into the CD4060 must be bounce-less and noise free. Is that what the RC network is doing? How does it work?
AI: 10M provides the DC input self-centering bias so the CMOS can amplify the signal near Vdd/2 by virtue of negative feedback from the internal CMOS inverter.
The two C’s are designed to match the crystal load rating for centre frequency. (C1//C2)
The 33k reduces the current so that the internal crystal lattice only draws <50uW due to the high density of power limitations on the crystal lattice inside. It does not affect the frequency and the voltage gain in the CMOS now working as an analog amplifier that limits to a square wave.
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H: Adding a Delay Ltspice
Is it possible to set a delay between two components on Ltspice ? Actually I just want to simulate the time for a sensor it takes to react (set an output) to an exciting signal.
This is for taking into account the impact of a delay with respect to the stability of the system into an AC simulation.
Have a nice day !
AI: Yes. You'd use the delay line element for that, or you can use a behavioral voltage source BV and use the behavioral delay function in it, for example:
SYMBOL bv 128 128 R0
SYMATTR InstName DLY1
SYMATTR Value V=delay(V(x),100n)
This element introduces a 100ns delay.
See this thread for discussion of various ways of adding delays in LTspice in general.
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H: Is it possible to chain Hall sensors?
I'm working on a hobby project that is to add sensors to a wooden chess board in order to detect if a piece is on a given square.
I'm quite beginner at electronics, only experienced in programming, not aware of terminology.
I've come across a few ideas, from reed switches to Hall sensors. In terms of sensors, I'd prefer Hall sensors (SS49E).
The next problem is how to read data. I've seen a solution that uses a cd4067 to implement multiplexing. I'd need 4 of these.
Is there a solution that does some kind of chaining? An ideal solution would be to have a module with a Hall sensor belonged to each square and chain them together, read them similar to dealing with shift registers. Something like implementing a 1-bit shift register with the sensor on it. Sorry if this is stupid idea.
The goal is to minimise wiring and make the hardware simple.
AI: The "1-wire" bus protocol would suit your requirements. Do a search and see if there's a "1-wire Hall sensor". These can then be read directly by your microcontroller without any shift-registers.
1-wire devices are pre-programmed with unique addresses. An interesting little problem for you would be the registering the addresses of each sensor at each square. I suggest that you have a learning mode where you move a piece sequentially around the board, row by row, while recording which sensor is at which grid reference.
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H: Choose and protect NPN transistor with resistor and diode
I'm working on my first circuit, controlling closet fans with an ESP32. I did some research drew the following circuit. I control the flow to GND from a 5V USB power supply with the GPIO pin thorugh the transistor. The fans would want 12V, but work with 5V just as well. I use the step-up-module to increase the airflow.
The 1k Ohm resistor should protect the base of the transistor (BC547B) and the diode is used as a " flyback diode", to protect the transistor as well. I've gathered that from this question. For this I bought a mix of common diodes (IN4001 4004 4007 5404 5406 5408 RL207 FR107 207 UF4007 IN5817 5819 5822 4148).
The question is, if the transistor is used safely in this circuit and what diode is best used here?
EDIT: I've updated the above shown circuit with feedback from the community:
EDIT 2: A second update of the circuit.
AI: Your diagram lacks grounds but I can get the idea.
It would be better to switch the 9V with the transistors. The current will be lower and the step-up module may have some nasty characteristics (like a big input capacitor) that could cause problems when it switches on. The DC current switching the 5V might be in the 75mA range vs 35mA switching the fan directly.
The purpose of the resistor is not just to prevent the transistor from dying but to control the base current so that it saturates when on. The 1K may be a bit too high for that purpose. BC547B is okay with Ic/Ib = 20.
With 3.1V drive and 0.7 Vbe the base current is 2.4V/R. So for 75mA you'd want about 620 ohms and for 35mA 1K or 1.3K is okay.
As far as the diodes go, I am not sure they are actually necessary, even with the transistor switching the fan directly, but it costs little to add them. Any of the types mentioned are fine. I would use 1N4148s or 1N400x.
simulate this circuit – Schematic created using CircuitLab
The only disadvantage of leaving the DC-DC converter(s) running all the time is a bit more power consumption from the quiescent current the step-up converters draw, but it should not be much in comparison to the ~1W the fans draw in operation.
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H: Guitar Pedal Simulator with LtSpice
I'm trying to simulate a guitar pedal with LtSpice. Do you know how I can input a guitar recording to the circuit? I will then convert the output to a txt to listen to it from Matlab sound function.
AI: Wave files can be imported directly.
Copy the .wav file to the directory of the project
For the voltage source that you want to output the wav file, ctrl+click and edit the value field
The value should say wavefile=file.wav (where file is the file name)
Source:
https://www.analog.com/en/education/education-library/videos/5579265677001.html
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H: Do electrons actually jump across contacts?
When we connect two conductors together in a junction, do electrons actually move from one conductor to another?
Does it also affects the masses of the two conductors?
AI: Yes, actual electrons do move through conductors and yes, they cross boundaries like connections between two wires.
While electrons do have mass, there is no net addition of electrons through a conductor. If N electrons are added at one end you will get N out the other end for a net mass change of 0.
Keep in mind that electrons move in a reverse direction (i.e. from - to +) which is the opposite of the conventions we normally use for current from which is from + to -. Also note that electrons move quite slowly through conductors even though the electric current moves much faster. The electrons themselves move at something like 1 mm/sec in a copper wire.
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H: Eliminating humming from switched audio jack
I'm using a simple DPDT 3.5 audio jack to attempt to switch between two audio outputs - speakers with a built in amplifier and headphones. The speakers work just fine, but when the headphones are plugged in, my current design leaves the signal floating on the speakers so naturally there is quite a hum, even as far as still being able to hear the music.
This is the type of switch I'm using:
The jack is wired:
Grounds all tied together to pin 1
Audio in from the sound card to pins 2 and 3
Speakers on pins 4 and 5
And the overall diagram of how things are set up:
What should I do to eliminate this noise?
I've tried adding a large resistor between ground and speaker signal but I found that if the resistor was small enough to be effective it caused noticeable problems when the headphones were unplugged. My other thoughts were: should I have a capacitor somewhere? Or instead of switching the signal directly, could I detect the plugging in of the headphones and switch off the power to the speakers completely?
AI: When you say speakers you mean "amplifier + speakers". Regular speakers won't hum when disconnected.
You need to short the amplifier inputs to ground when you plug in the headphones. It looks as though that socket has auxiliary contacts 6/7 and 9/10 which may perform this function. (You forgot the datasheet link so I can't check.)
Try a continuity test between 6 and 7 while plugging the headphones in and out and the same with 9 and 10. You'll be hoping the contacts close with the headphones plugged in.
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H: Memory To Memory DMA on STM32
According to STM32F407 reference manual page 313, memory to memory mode in DMA is a mode that doesn't need any triggering request from a peripheral and it will happen just after the stream enable bit is set. (also we know from the reference that only the DMA2 could handle memory to memory data transfer) :
So the question is for a transfer between two integer array defined in the memory area, which stream of DMA2 must be enabled and which channel of this stream must be used to have a DMA transfer without any peripheral triggering and only when enabling the DMA stream?
In fact what i want is sending some data from a buffer array in the memory area to a GPIO output data register. As is said what i expect to happens is when stream is enabled the transaction just happens but the result was not what i expected and no data is sent to that GPIO output data register. I want to use memory to memory DMA mode because it doesn't need any extra triggering
AI: After one day really hard challenging with the problem! i finally figured out some important points that i think will be worthy for other people out there so i decided to represent them:
The STM32's DMA is a very quaint tool that i today realized that it can handle almost every kind of data transmission from a memory area to another memory area(such as moving one array members to another one) or from a memory area to a control register of a peripheral(for example i tried to config and initialize a GPIO by DMA and it works absolutely accurate!). The code is placed in the following and that is for STM32F407 Disco Board(PD12 to PD15 are connected to on board LEDs).
We can handle this goal(GPIO initializing using DMA) in either "Memory to Peripheral" mode with a Peripheral request triggering or in "Memory to Memory" mode without any triggering and just after enabling the DMA stream(no matter which stream and all do the job perfectly)
sizeof() operator returns size of an array in bytes, to determine the number of elements in an integer array you must divide the result by 4
The most important point that really annoyed me is that in "Memory to Memory" mode , the DMA peripheral port is the Source of transition and Memory port is the Destination of transition. See the Arrows direction below:
And finally i share my code that does the GPIO Initialization job:
//****** This program is a creative way to Initialize and Config a GPIO on STM32F407 Disco Board (GPIOD Pin_12, Pin_13, Pin_14, Pin_15) using DMA (Memory to Memory mode) ******//
#include "stm32f4xx.h"
#include "stm32f4xx_dma.h"
#include "stm32f4xx_rcc.h"
//---------- Forward Declaration -------//
void DMA2_GPIOD_Initializer(void);
//----------- Variables Definition ------//
#define MODER 0x55<<24 //sets direction of PORTD Pin_12, Pin_13, Pin_14, Pin_15 to output
#define OTYPER 0<<12 //sets GPIOD Pin_12, Pin_13, Pin_14, Pin_15 as push-pull
#define OSPEEDER 0 //sets GPIO Pins OSpeed in Low Speed
#define PUPDR 0 //sets no Pull resistor to pins
#define IDR 0
#define ODR 0xF<<12 // sets Pin_12, Pin_13, Pin_14, Pin_15 to High
int Config_Buffer[] = {MODER,OTYPER,OSPEEDER,PUPDR,IDR,ODR};
int main(void)
{
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD,ENABLE);
DMA2_GPIOD_Initializer();
while(1)
{
}
}
//------------------- DMA2_GPIOD_Initializer ----------------------//
void DMA2_GPIOD_Initializer(void)
{
DMA_InitTypeDef DMA_InitStruct;
//Clock for DMA2
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2,ENABLE);
//Stream_7 initializing(Each stream can do the job and you can choose one arbitrary)
DMA_InitStruct.DMA_Channel = DMA_Channel_0;//In Memory to Memory mode channel number isn't important and has no effect
DMA_InitStruct.DMA_Priority = DMA_Priority_High;
DMA_InitStruct.DMA_DIR = DMA_DIR_MemoryToMemory;
/* Be very careful that in Memory to Memory mode Peripheral is the SOURCE
memory*/
DMA_InitStruct.DMA_PeripheralBaseAddr = (uint32_t)Config_Buffer;
DMA_InitStruct.DMA_Memory0BaseAddr = (uint32_t)(GPIOD_BASE);
DMA_InitStruct.DMA_BufferSize = sizeof(Config_Buffer)/4;//"sizeof()"function determines the size of array in (bytes) But we need To know the number of int(4bytes) in array
// so we must to devide sizeof(Config_Buffer) result by 4
DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Enable;
DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStruct.DMA_Mode = DMA_Mode_Normal;
DMA_Cmd(DMA2_Stream7,DISABLE);
while(DMA_GetCmdStatus(DMA2_Stream7));/**Before calling DMA_Init() function,it is recommended to check that the Stream is actually disabled using the function DMA_GetCmdStatus().*/
/**All the stream dedicated bits set in the status register (DMA_LISR and
DMA_HISR) from the previous data block DMA transfer should be cleared before the
stream could be re-enabled. *For More informations refer to Reference manual Page 324*/
DMA_ClearFlag(DMA2_Stream7,DMA_FLAG_TCIF7|DMA_FLAG_HTIF7|DMA_FLAG_TEIF7|DMA_FLAG_DMEIF7|DMA_FLAG_FEIF7);
DMA_Init(DMA2_Stream7,&DMA_InitStruct);
DMA_Cmd(DMA2_Stream7,ENABLE);
}
At the end im sorry for my not so good English and i appreciate whom corrects my mistakes. My main aim was just to share my knowledge. Thanks for reading :)
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H: Why don't we use the same connector for all digital signals?
A modern PC typically has a lot of connectors, including USB ports, displayport and HDMI ports, and ethernet ports. My understanding is that all of these are digital connections that are designed for transferring large amounts of data.
Instead of having all of these different connectors, and maintaining multiple independent standards, why not just have, say, 15 USB ports on the back of the computer, and then have all peripherals and networking use this same port as well?
AI: There are a couple of reasons, but I think one of the big ones is the speed of the various signals. Take, for example, USB 2.0 and USB 3.0:
Source: https://theydiffer.com/difference-between-usb-2-0-and-3-0-cables/
USB 3 adds those extra five pins at the top, which are used in SuperSpeed mode (total bandwidth of 5 Gbps, which is much faster than USB 2!) To carry such fast signals, you need higher-quality cables, which are more expensive. Designing circuits capable of such speeds is also more complex--you might need to go from a 2 layer to a 4 or 6 layer impedance-controlled circuit board, or you might need to use more expensive ICs.
There are many things that just don't need that extra speed (think of peripherals like a mouse or keyboard) and forcing everything to use one very high quality standard would just drive both prices and complexity up.
You can see this with the current mess that is the various types of USB Type-C cable. The different types of "USB-C cable" have different capabilities--some can only do USB 2.0 speeds, some support SuperSpeed, others support even faster standards like Thunderbolt, some support Power Delivery. You could just get the best, most capable cable for everything, but that gets very expensive very quickly.
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H: How to associate multiple symbols with one footprint in KiCad
I made a schematic for a 5 band analog EQ. I used OP Amps to make active bandpass filters for various frequencies within the human hearing range which means when I made my schematic I drew 5 OP Amps in total (one for each frequency) as shown here:
The actual IC I'm using for the OP Amps is the LM 833 which actually has two amps inside it per chip:
I made a custom footprint for the LM833 but I want to associate it with two of the OP Amp symbols I made on my schematic so that when I generate the netlist only 3 LM833 ICs are generated and the correct connections are automatically made according to my schematic. How do I do this?
AI: Due to architectural limitations in Kicad, it is impossible to associate multiple symbols with one footprint. This is because the symbols carry the pin mapping information directly. In other CAD packages, there is a mapping layer in between that can remap the symbol pins to the footprint pins. In Kicad, what you have to do is make one symbol with two sub-symbols, one for each of the two amplifiers in the device, and with the appropriate pins assigned on each sub-symbol. Then, you need to make sure to instantiate both sub-symbols in the schematic for each IC.
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H: What is meant by this statement about op-amps?
I am trying to understand the inverting negative feedback how it stabilizes the op-amp circuit. As the book is explaining this I came across the highlighted sentence:
Thus the voltage vo will not depend on the value of the current that might be supplied to a load impedance connected between terminal 3 and ground.
If I understand correctly what he is trying to say, is that if I have the below circuit, then, io = always regardless of the output resistance. Why?
The book:
Microelectronic Circuits SEVENTH EDITION
Adel S. Sedra
University of Waterloo
Kenneth C. Smith
University of Toronto
ISBN 978–0–19–933913–6
AI: The op-amp produces an output voltage (\$v_O\$) that forces the inverting-input voltage to virtually equal the non-inverting-input voltage. It does this using negative feedback via R2 and R1: -
This happens because the open-loop gain of the op-amp is very, very high; sometimes in excess of 1 million. So, if you think about that sort of gain magnitude, for any reasonable voltage on the output, the negative feedback produces a voltage difference at the inputs to be in the realm of microvolts i.e. they become virtually the same.
But, a normal op-amp can only usually supply 10 to 20 mA of output current so, if you try and draw too much current, the op-amp will fail to make the input voltage difference virtually zero.
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H: Role of the Schottky diode (power supplies)
In the figure below I have two power supplies (+ VS, -VS) of 100V to power a PA107DP amplifier.
The 2 power supplies must be supplied by an external voltage of 24V (the connector of the external power supply is just above the 100V power supply (R24-100B)).
At the connector output of the external power supply there is a Schottky diode (D5.)
What is the role of the Schottky diode in this case?
How do I choose the Schottky diode? This diode is 50V / 10A. Why was a diode with these characteristics chosen?
AI: What is the role of the Schottky diode in this case?
If you connected the incoming supply to J5 the wrong way round, the diode (D5) would block that voltage and thus prevent U3 and U4 from burning or breaking.
How do I choose the Schottky diode? This diode is 50V / 10A. Why was a
diode with these characteristics chosen?
It has to be able to handle the full current that flows and, given that this may be several amps, a 10 amp rating may be appropriate for reliability of the device. It also has to have a reverse voltage rating greater than 24 volts and, for Schottky type diodes, a 50 volts rating is appropriate (given that they can be quite leaky).
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H: Equivalent resistance 700 or 750 ohms?
I need help solving this task, if anyone had a similar problem it would help me.
The task is:
What is the equivalent resistance in a circuit?
I tried the following:
\$Re = \frac{(1000+1000) \times (1000+200)} {(1000+1000) + (1000+200)} = 750\ \Omega\$
Is it exactly 700 or 750 ohms ?
AI: The leftmost part is a closed circuit, and that shorts the vertical 1k resistor on the left. You are left with two 1k’s in parallel, so 500 ohm, that goes in series with the 200 ohm resistor, making it 700 ohm.
(answering because you tried in the comments)
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H: Powering LED and DC motor with USBC PD
I'm looking to power a circuit with USB-c with a trigger board negotiating 20Vin up to 2A.
The circuit would consists of a high power LED strip that runs 21.5V @1A and a DC motor water pump rated for 12V 300mA.
My thoughts are to have them connect in parallel.
I would use a step-up converter with constant current to regulate current through the LED
I would use a step-down converter with constant current to regulate current to the DC motor.
Is this a good approach or is that completely wrong?
AI: As long you are within the limits, I don't see why it wouldn't work.
Negotiating on USB-C is not easy though, you will need some specialized chips and they are still sparse as USB-C is fairly new, not all stacks are implemented, that is the most tricky part of this project.
Be careful about the inductance of the motor, I don't think USB-C is designed to supply current to inductive load so you need to make sure that kickbacks aren't going to be a problem. If you have a step-down converter it should negate the problem though.
It makes more sense to have them in parallel as you will have fewer losses on the DC/DC converters and will need a smaller size.
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H: Generate a model into Ltspice where we can adjust a parameter
I am trying to generate a subcircuit on ltspice. It is a first order filter where I would like to adjust the cuttoff frequency. I know that it is possible to do it on component but on a parameter ("param") I do not know how to do it.
I would like to set directly the param "fp" of the subcircuit. Does anyone know a way to do it ?
Have a nice day !
AI: Try this (it works in microcap): -
I didn't use the "=" (equate) to make these statements work but, they still work when you do use the equate (optional I guess). LTSpice might need the equate.
I think your main problem was expecting the raw "10n" to be recognized in the .param Rfiltre statement. Having said that, microcap will allow it. I can also keep the curly braces around Rfiltre in microcap too.
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H: Tri-state push-pull configuration GPIO protection
I am designing a sort of "driver" for a high voltage Charlieplexed LED array, since normal GPIOS can't handle 12V. For that, I need to be able to use tri-state logic, which means LOW, HIGH, and HIGH-Z.
The schematic below shows two arrangements of PMOS and NMOS similar to a push-pull configuration using two of these ICs plus two not yet defined NMOS. The first -U1 and U4- define the behavior that can be represented as push and pull, and the second -U3 and U6- are the output enable. (HIGH means enable and LOW means HIGH-Z)
So far, the simulation is running well, however, In the last question I asked someone made me a heads-up about the ideal behavior of the GPIOs and that I should be careful with the 12V present in the gate of the PMOS. To solve that I included these two NMOS -U5 and U2- keeping the voltage of the GPIOS under safe values.
Is this fix correct? can someone note me if I might be overseeing something, I'm still a noob at this.
Also, I'm simulating with NI Multisim 14.2
Note1: I'm aware of the body effect difference that U1 and U4 will have with respect to U3 and U6 since the body/bulk terminal is kept shorted to the source terminal and not Vcc/Vss. However, I think that for this application it will not have a noticeable effect.
Note2: S1, 2, 3, and 4 are spst placed there only for the simplicity of the simulation, and they are not considered for the final design.
AI: Yes, the circuit for driving high side PMOS and low side NMOS FETs looks correct and should work in theory.
Actual performance will vary due to exact part numbers are not known.
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H: Do bank/rows/columns based NOR flash memory exist?
SDRAM supports more addresses than their address bus width allows thanks to the bank/row/column scheme it's based on.
My question is if there are non volatile parallel memories that are based on the same bank/row/column scheme so they can support further addresses than the address bus lines allow. After a quick search in various stores I guess that the answer is NO. If not, why?
AI: No, NOR Flash with an interface that matches SDRAM interface of bank/row/column addressing does not exist, because NOR Flash is not accessed as rows and columns (and banks) like DRAM natively is.
However, many kinds of NOR Flash chips do exist with a multiplexing scheme to reduce pin count.
Some have multiplexed address/data bus to save pins. This is sometimes called ADM muxed memory.
Some have multiplexed address bus to save pins. This is sometimes called AADM muxed memory.
How that relates to the internal structure of the NOR Flash itself is another thing, it's just that the interface is multiplexed.
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H: Universal motor DC vs AC which will give more speed and torque
I have shortlisted a universal motor for a DIY project requiring High speed and torque of the motor.
Motor looks like below and some characteristics.
DC Motor : Washing Machine
Input Power: 750 Watt
Voltage: 230 V 50 Hz
Current: 0.95 – 1.1 A
Speed: 16500 - 20000 rpm (3 speed)
Rating: 30 Minutes
Insulation: Class B
I see it being a universal motor can be powered by 230v AC or 230v DC supply.
Will AC or DC give more speed and torque for a 30 min continuous operation ?
AI: A universal motor operating with DC power at a voltage equal to the motor's RMS AC voltage rating will have speed vs. torque capability curves that show both higher speed and higher torque capability when operating with DC as shown below. The actual operating speed and torque will be determined by the load's speed vs. torque demand torque. At steady-state, operation will be at the intersection of the curves.
The safe continuous operation point or the safe operation for a given load vs. time duty cycle will be determine by the motor's efficiency and its capability to dissipate heat due to losses. The motor will be more efficient with DC power because of iron loss reduction. However the copper losses will be higher at a higher torque or speed since the motor's output power is proportional to torque multiplied by speed.
Will AC or DC give more speed and torque for a 30 min continuous operation ?
Yes. However how much more speed and and torque and how long it will be safe to operate will be determined by the load's torque vs. speed demand curve and the motor's efficiency and cooling capability.
Image from Fitzgerald, Kingsley, Umans, Electric Machinery, 4th ed
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H: Power efficiency with Boost vs Buck-Boost using same regulator
I'm doing a few tests and figuring out what will be the best option for what will eventually be part of a battery powered circuit. I have both a boost and buck-boost converter, both using the XLSEMI XL6009 regulator. I have both set to 12V output and connected to an 8ohm power resistor to simulate a 1.5A load.
Using a lab bench power supply to simulate different voltages, I noticed with sub 12V inputs, the power consumption stays very close to 20W using the boost converter. But with the buck-boost, I'm seeing 24W starting at 12V with increasing power consumption as voltage decreases.
Is it normal for buck-boost converters to be less efficient? I imagined it would have been roughly the same power efficiency, since it uses the same regulator.
I included a link to the XL6009 datasheet here
AI: The buck-boost circuit in the data sheet that you may be using is this one: -
Note that it uses a transformer to transfer power to the output (in red). Transformers will be about twice the inefficiency of a single inductor used in a boost circuit: -
And, in any type of power converter like this, it will be the wound components that are likely to be the most wasteful of power hence, the buck-boost circuit shown above will be significantly less efficient than the boost converter.
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H: I can’t remember the name of that component
I’m looking for the name of the component that act like a relay but instead of using a coil to generate a magnetic field that moves the relay « arm » it uses a LED and a photosensor.
It allows to isolate a high voltage of a circuit from a low voltage.
Thanks a lot!
AI: Optocoupler, optoisolator, solid state relay, opto-triac.
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H: Digital downcounter not resetting
I have a digital down counter which is supposed to count from 9 to 0 and then it goes back to 9 (bottom) but it only goes back from 9 to 8 and then back to 9 and I don't understand how it works.
Note that before I made that circuit I had connected the inputs of the gates to Qbar without a NOT gate of each JK flip flop but it counted until 1 so it didn't make the job it had to make.
What am I missing?
AI: The problem is a glitch on the outputs when the counter tries to go from 8 to 7. There is an intermediate glitch state of 1111 when the 3 left flipflops' Q outputs have all changed state to 1 but the right hand flipflop's Q output has not quite changed state, it is still at 1. The And gate decodes this all 1's glitch (all zeros on the ~Q outputs) and resets the flipflops to 9.
Solution
Add an extra stage to the counter as shown below. Then when the lower 4 bits transition from 8 to 7, the extra most significant bit will be zero and the And gate will not generate a glitch pulse. Of course you'll generate the same problem if you try to reset the counter to a value greater than 15 because the And gate will produce a glitch output when the counter tries to step from 16 to 15.
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H: How to regulate temperature of an IC/PCB -in a vacuum
I have to regulate the temp of an IC. (70deg. C)
The part will be in a vacuum chamber.
Electrical connections can pass in-out of the vacuum chamber through a port (plenty of connections available.)
I have done this before in air using TECs to regulate the temperature (both heating and cooling) using a control loop with a thermistor for sense feedback.
I am predicting this won't work in a vacuum.
TECs only create a temperature differential.
You need a constant temperature reference to go up and down from (like a chunk of metal with fans.)
If that chunk of metal cannot thermally conduct to air it will continue to heat-up.
TECs are not 100% efficient; a portion of the input power goes directly into heating the system, regardless of what direction it is being driven.
What I need to do is take thermal energy out of the system.
I don't think it is impossible.
Imagine a cylinder filled with air compressed by a piston, sitting a vacuum.
It takes a constant force for the piston to maintain position.
Compressing the piston further would heat up the cylinder (energy-IN)
Decompressing the piston would cool the cylinder (energy-out)
But even this example wouldn't work forever because of the friction losses from the piston actuating.
You need to thermally conduct in-out of the vacuum chamber.
But can you do this with electronics?
Would it be a TEC across the vacuum chamber barrier? If so, I don't have that.
AI: In my experience you can conduct a great deal of heat away from your device simply by conduction through its electrical connections. If that is not sufficient, use a heat pipe (as is done in laptops, for example) to conduct the heat away from your device to the wall of the chamber or to a heavy cable that leaves the chamber.
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H: 5A 12V Battery charger -> 12V Marine Battery -> Inverter -> Fridge for longer run-time?
I currently have a 12V Deep Cycle Marine Battery hooked up to a 1,000W (2,000W peak) Inverter, this should run my fridge no problem, however the runtime wouldn't be terribly long.
I also have a 700W propane generator (900W peak), I don't believe it can support the startup of the fridge, so my question is can I use the battery charger hooked up to the propane generator to provide additional run-time to the marine battery while it powers the fridge?
Thanks!
AI: Maybe, though it's likely to be a very inefficient use of the propane. You can get fridges that run directly off propane.
If it's a smart battery charger, then it may be confused by the varying load on the battery. This will cause the battery voltage to go up and down unexpectedly. Smart chargers work out where they are in the charging cycle by monitoring the battery voltage.
The charger is only putting out 60W maximum. Is that going to be enough to do anything useful? A 1000W inverter is likely to draw a current, even when the fridge thermostat is off.
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H: PSpice Dependent Source
I'm trying to simulate the above circuit in Pspice, but I am getting the error:
ERROR -- Voltage source and/or inductor loop involving X_F3.VF_F3
You may break the loop by adding a series resistance
is it possible for power and current values to be zero?
AI: You need to do this: -
Hopefully, that should work.
The gain value for F3 should be 3 and not "F".
You should not short I1.
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H: I want to make a temperature controller, but the heating element didn't work
My schematic circuit from controller to heater (12V)
When I connect the heater, the voltage drops to zero.
When I try it in a simulator with a DC motor, it works:
This is my 12V heating element:
AI: Shouldn't you be doing something like this: -
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H: Is regenerative braking always suitable for an EV regardless of battery chemistry?
I've been doing a lot of reading on different motion control approaches both for hardwire industrial motion, as well as EV applications.
While I've skimmed a few IEEE papers that sought to study the effects of regen braking on lithium-ion batteries as it impact battery capacity retention (cycles) they seemed somewhat inconclusive. This also only examines the common LiIon chemistry but doesn't even address other popular lithium-containing chemistries like LiFePo4 or NMC. I'm no chemist.
At a much smaller scale, we see use of NiCad and SLA batteries that are robust to being charged in a "don't care" fashion. However, lithium cells tend to be a bit more picky when it comes to being charged. Negating the aspect about total cell cycle degradation for a moment--what about safety when it comes to regen braking lithium-based cells?
Assuming the cell is sitting behind some basic controller--what happens to back-EMF from a large (200W+) motor if the cell is "fully" charged and the BMS shuts off the back-EMF transient? We know it will generate heat..but does that heat stay in the motor? Or are we talking about dissipation into the motor's bus/wiring? Should high-power (EV) motors powered by lithium chemistry employ shunt regulators if extending battery life by regen braking is not necessary? (Thinking more about industrial robots rather than EVs).
AI: Assuming the cell is sitting behind some basic controller--what happens to back-EMF from a large (200W+) motor if the cell is "fully" charged and the BMS shuts off the back-EMF transient?
200W for an electric vehicle is rather small, if not to say microscopic. A Nissan Leaf from 2010, if I'm not mistaken a relatively small commercial EV, has around 80 kW, i.e. the 400-fold in power.
You're right, there's a controller, and a bidirectional AC/DC converter between motor(s) and battery(ies).
That converter's job on recuperation is to rectify the voltage from the batteries; since its bidirectional nature requires this rectification to be synchronous, the controller will also control the duty cycle with which that happens, and hence the voltage on the DC and thus the charging current
In case you brake with a full battery, only little energy will be allowed to flow through that converter; most will either simply left in the AC circuitry (i.e. like disconnecting the motor) or sunk into a resistor.
If you need the decelleration, then the converter will instead of charging discharge the battery to cause a current opposing to that which the turning of the motor causes.
For street-legal western EVs (i.e. not golf carts or similar), you underestimate the amount of cost that flows into the control and build of the converters. These things don't "blindly" let power flow between motor and battery.
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H: Current-voltage characteristics of silicon carbide luminescence
I am currently studying the textbook Light-Emitting Diodes (3rd Edition) by E. Fred Schubert. Chapter 1.2 Henry Round's demonstration of the first LED says the following:
The mechanism of light emission in forward-biased and reverse-biased Schottky diodes is shown in Figure 1.4, which displays the band diagram of a metal-semiconductor junction under (a) equilibrium, (b) moderate forward bias, (c) strong forward bias conditions, and (d) under strong reverse bias where avalanche multiplication occurs. The semiconductor shown in the figure is assumed to be lightly doped (n-type); the semiconductor can even be insulating (i-type). Such diodes are frequently called metal-insulator-semiconductor (MIS) Schottky diodes.
Under strong forward bias conditions, minority carriers are injected into the semiconductor by tunnelling through the surface potential barrier. Light is emitted upon recombination of the injected minority carriers with the n-type majority carriers. The forward voltage required for minority carrier injection in Schottky diodes is larger than typical p-n junction forward voltage. Round (1907) reported operating voltages ranging between 10V and 110V.
Light can also be generated in a Schottky diode under strong reverse-bias conditions as shown in Figure 1.4(d). At a sufficiently strong reverse bias, the avalanche effect occurs in which high-energy carriers impact-ionize atoms of the semiconductor, that is, a valence electron is excited to the conduction band. In this process, holes are created in the valence band as well as electrons in the conduction band, which will eventually recombine thereby creating light. Additional light-generating processes in Schottky diodes under reverse-bias conditions have been reported by Eastman et al. (1964).
Chapter 1.3 Oleg Lossev's research on SiC LEDs says the following:
Oleg Vladimirovich Lossev (1923, 1924a, 1924b, 1928), a brilliant Russian experimentalist who worked at the Nizhny Novgorod Radio Laboratory in the former Soviet Union, reported the first detailed investigations of the electroluminescence phenomenon observed with SiC metal-semiconductor rectifiers. Born in 1903, Lossev published his first paper on electroluminescence at the age of 20 years, in 1923, when he had not yet a formal degree. In the 1923 paper, Lossev reported seeing green light with the "naked eye" when reverse-biasing a SiC metal-semiconductor rectifier. In his 1924 paper published in the Wireless World and Radio Review, he showed the first photograph of SiC emitting electroluminescence. It is shown in Figure 1.5.
For forward bias, the current was higher but little or no light emission was observed. The main use of these rectifiers was in solid-state demodulation radio-circuits that did not employ vacuum tubes. Oleg Lossev found that luminescence occurred in some diodes when biased in the reverse direction; subsequently he found that in some diodes luminescence occurred when biased in the forward and reverse directions. A detailed current-voltage characteristic revealing Lossev's the high degree of scientific rigour is shown in Figure 1.6.
Chapter 1.3 claims the following:
For forward bias, the current was higher but little or no light emission was observed.
But based on what is claimed in chapter 1.2 and figure 1.4, it seems that forward bias should result in light emission. Am I misunderstanding something here?
Furthermore, I am unsure of how to understand figure 1.6. There are two points where it is stated that "Beginning from this point the luminescence is observed", where the bottom-left statement seems to be in the "(-) carborundum (+) steel wire" area, and the top-right statement seems to be in the "(+) carborundum (-) steel wire" area. So what is figure 1.6 showing?
AI: To emit light your recombination needs to occur all at once across the semiconductor bandgap. In forward bias your electrons move into an excited state in the metal, and then quickly lose their energy to heat in the metal rather than to a photon.
Figure 1.6 shows a fairly standard looking diode I-V curve. Apparently in this case you enter reverse bias by applying a positive voltage to the steel wire. It looks like you have substantial light emitted above about 3 V forward bias and about 30 V reverse bias.
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H: How do random number generators in calculators work?
I have a TI-30xIIs scientific calculator. I was playing around with some of the functions, and I discovered it had a random number generator. I became curious as to how it worked. My first thought was that it used avalanche noise or noise generated by the diodes in the solar panel, but then I realized that they could be using some sort of algorithm like a Mersenne Twister
AI: According to the manual, the random number is generated from a seed, and a new seed is generated after a random number is generated. Also the random number seed is user selectable to control sequences of random numbers.
All this gives information that it is a simple deterministic pseudo-random number generator (PRNG), something like a linear congruent generator (LCG), or a linear feedback shift register (LFSR).
Given the fact that this random generation must be repeatable, it makes sense to simply use pseudo-random generation instead of other kinds of randomness, even if it is tempting to use entropy from some sources like battery voltage level, timestamps of button press and release events, etc.
It seems that someone has (almost) figured the algorithm for the exact same calculator and has a webpage about it on github to calculate next numbers given the seed value.
Looking at the code, it's an LCG which uses numbers 40014 and 2147483563, of which the latter is a prime. These numbers seem to be quite popular due to a paper by L'Ecuyer on implementing LCGs, as discussed on United-TI Archives.
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H: Delayed insulation failure of DC barrel jack
Recently I had to replace a male DC barrel jack that connected a string of LEDs to a driver. Unconnected, I measured 100 VDC out of the driver. The male jack I salvaged from an old 12 VDC power supply.
I made sure the current out of the driver is lower than the current the old power supply was rated for, but there was no way to find out what the jack´s voltage rating is. I replaced the jack and ran the LEDs for a couple of hours, after which everything ran normally and the jack didn't feel warm at all.
What I am worried about is that the jack is being used at a voltage higher than it was originally intended for. It ran without any issues for a couple of hours. If insulation were insufficient, I would expect it to fail rapidly.
How long does insulation take to fail when used over its rated voltage?
How is it expected to fail?
Should I be worried about my replacement causing a fire or other adverse effects?
AI: I picked a somewhat random example of a DC (usually low-voltage) barrel jack. It's datasheet is here:
Barrel Jack
The relevant specification is here:
So in this case, the device is rated to withstand 500 VAC for 1 minute. How long would it last at 100V? It's anyone's guess but generally dielectric breakdown occurs over time and will eventually fail.
In your case, I'd err on the side of caution and use a connector that is rated for 100V instead of 12V.
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H: How to find the v(t)?
can someone help me in here.
Find the V(t) when t = 2,5ms and knowing that i(t) = Icos(wt).
R= 50ohms, L=100mH, I=2A, w=100π rad/s
Like I know that Z = 50 + j10π = 59,05∠32,14°
And v(t) = Z*i(t) = 59,05∠32,14° * 2∠0° = 118,10∠32,14°
v(2,5ms) = 118,10cos(100π2,5m + 32,14) = 99V
But the answer in my book is 26,3V so I don't know what i'm doing wrong
AI: \$ v(t)=L\large\frac{di(t)}{dt}\small+Ri(t)\$
\$ v(t)=L\large \frac{d}{dt}\normalsize 2\:cos(100\pi t)+50(2\:cos(100\pi t))\$
\$ v(t)=0.1\times (-200\pi \:sin(100\pi t))+100\:cos(100\pi t)\$
\$ v(t)=-20\pi \:sin(100\pi t)+100\:cos(100\pi t)\$
we have: \$100\pi t=100\pi\times 0.0025=\large \frac{\pi}{4}\small\equiv \normalsize 45^o\$
hence, \$ v(0.0025)=-\large \frac{20\pi}{\sqrt{2}}+\frac{100}{\sqrt{2}}\normalsize=26.28\: V\$
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H: Amplifying 40ns pulses that come at unknown times (for single photon detector)
I have a single photon detector produces a 40ns signal when a photon enters the detector, like the image below:
I would like to take this electrical signal and hook it up to this device which simply time-tags these pulses based on the rising edge of the pulse. The time-tagging device requires inputs that are in the range of 2.4V to 5V, and my detector (as shown in the picture) produces pulses with a height of 0.5V.
Therefore, I would like to amplify the output of my detector (by about 5-10x) so that it is compatible with my time-tagging device. As you can see in the picture, the ramp-up of my signal is quite sharp, and I am particularly interested in getting accurate time-tags of my pulses location.
Looking at the rise-time of my pulse, it seems to be about 5ns. So am I correct in thinking I need an amplifier that can amplify signals at a speed of 1/(5ns) = .2*10^9 Hz = 200 MHz?
Any recommendations for what I should buy or build so that I can amplify the signal accurately?
EDIT:
Going into a bit more of the details of my attempt:
Right now I've tried using a ZPUL-30P to do the job (it's something that we have around the lab). And this doesn't seem to be ideal:
As you can see the voltage produces a long tail of 400ns which I fear will interfere other pulses that are arriving close in time with this pulse. Additionally, looking at the pulse it seems as though some of the individual shots aren't triggered properly (maybe around 1/500). Additionally, I have 4 separate output channels that come out of the detector, so I will need to either buy 4 amplifiers or one device that can amplify all 4 - and in a perfect world they will not produce different delays.
AI: I need an amplifier that can amplify signals at a speed of 1/(5ns) = .2*10^9 Hz = 200 MHz?
Ish, not really. If I squint hard, your pulse looks to have an initial slew rate of 150 V/us, a noise voltage of about 20mV pk, and a time-to-peak of about 8ns. @Kartman's suggestion of a comparator is a reasonable one. High-speed comparators are rated not by maximum frequency, but by propagation delay (with "maximum equivalent input rise time bandwidth" as a secondary parameter). If you can tolerate a delay between pulse start and amplified pulse start of (at a purely wild guess) 10% of 8ns, you're looking at something like the ADCMP55x with 500 ps propagation delay, 510 ps rise time to 90% deflection.
You also ask:
in a perfect world [the channels] will not produce different delays
There is no such thing as exact. You're looking to minimize dispersion. The ADCMP55x claims a max dispersion of 125 ps.
Your noise characteristics are very unclear. If you're lucky, you can simply choose a comparator threshold of something like 80mV and cross your fingers. If you get false positives, then increase this threshold, and/or add hysteresis. Both will increase delay by a configurable amount.
Given that the minimum pulse width for your quTAU is 4ns, assuming that nothing elsewhere in the signal chain has a bug, it is unlikely that a comparator-amplified signal will produce false negatives (your missed trigger shots).
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H: Will I get electrocuted by touching an exposed wire of a closed circuit?
Let's say I have some electrical appliance plugged into the wall outlet and turned on. If one of the wires coming from the plug is stripped bare and I touch it, what would happen?
I ask this because I saw on a youtube video about electrical engineering, the ground wire can be connected to the conductive metal casing of an electrical appliance so in the event that the hot wire was somehow making contact with the casing then it would take the low resistance path through the ground wire and save a person from an electrical shock. But if you are touching that metal casing which is connected to both hot and ground, how are you protected? Would you still not be in contact with a closed circuit and potentially get electrocuted?
AI: You've got good answers as far as some of the safety aspects, so I'm just going to clarify something about the ground. There is an additional benefit to the low impedance path it provides. The point is not simply for more current to flow through the ground and less through you, the point is to have so much current flow through the low impedance path provided that the circuit breaker or fuse trips nearly instantly. This greatly decreases the danger of faults since for you to be shocked as an additional path to ground, you have to be in contact with the device in question at the moment of the fault. The scaffold incident mentioned in another answer shows where metal is providing a path to ground but people are shocked anyways, but I would note the scaffold has rubber wheels, which even when wet, would isolate the upper metal part of the scaffold. The wheels also have low surface area in contact with pavement, which is itself a poor conductor, even when wet. If they had had a ground conductor terminated to the scaffold and the metal parts of the scaffold bonded together, it is possible the current would have mostly bypassed the workers, leaving them alive.
An electrical danger chart from wikipedia:
It's for AC current and on the vertical is the time you're exposed and the horizontal is amount of current so we can look and see that 50mA for a second or more may stop the heart, and any current above that exceeds what is necessary to kill. 120 volts is enough voltage with the average person in average clothing. What exactly constitutes a "Low impedance ground path" is affected by the source voltage, impedance and current limit. In the case of 120v or 240v residential lines, a line protected by a 50A circuit breaker requires a larger grounding/bonding wire than one protected by a 15A circuit breaker because for the breaker to trip, a fault at the same voltage must cause more than 3 times as much current to flow. The faster the surge, and the faster the breaker trips, the shorter the surge is. You may have noted that "low impedance path to ground" is quoted, not "low resistance". The ground network must not just be low enough resistance to allow a high current flow and trip the breaker, it must also be low inductance to prevent delay in tripping due to inductive effects.
Now let's look at how much resistance a human has:
You can see from the chart on the right that if you're wet you have much lower resistance, so lets say you're in the rain and you're leaning with one hand on the casing of a piece of equipment. Wet palm touch says your resistance is as low as 1000 ohms. If that piece of equipment is ungrounded and becomes energised to 120VAC, current flow will be equal to
I=E/R
I=120V/1000Ω
I=120mA
So that has a good chance of being lethal. Let's say the device is grounded at the time of the short such that 100 amps flow for a moment on a 15A line, tripping the circuit breaker almost instantly(100A is conservative), in the instant the short occurs and that current flows, the resistance of the 15A supply line and source impedance will cause a voltage drop, end effect being that you are exposed to much less than 120V for less than a hundredth of a second.
Or to look at a piece of equipment fed by a 75f run of 14AWG copper wire, the electricity has to go both ways, so we can calculate the resistance of 150f of 14 gauge wire as 0.379 ohms. So if we apply a perfect 120V to it when the equipment is drawing the maximum 15A, the wires have a volt drop of
E=IR=15A*0.379Ω=5.685V
So even with the full 15A rated current flowing and a reasonable length wire run you can get significant voltage drop. You only have 114.315V at the device. Now lets assume a 14 gauge ground wire and look at how much current we would expect in this example with a short.
I=E/R=120V/0.379Ω=316 amps
Needless to say this will cause a significant voltage drop that will protect you while the current briefly flows, and much more than the roughly ~5x rated current required to trip the circuit breaker near instantly.
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H: Looking for all-encompassing website to download standards (UL, NEC, ISO, etc)
TLDR : Frustrated with the way standards are handled in my industry bc they are important, looking for one website that does it all.
I am a controls engineer and have been in this industry for about 7 years now. One of my struggles is finding a website that is a one stop shop for all standards for my industry that do not charge an arm and a leg for one edition. One of my frustrations is something like UL508a costs about $500, but will reference other UL standards within, which also happen to cost $500 each. I want something that is subscription based for individuals, because I have also found it not popular for companies to pay for subscriptions to allow employees to download things at will.
I briefly worked for a robotics company and an integrator, and have seen many many references to all sorts of safety standards for robots, hazardous locations like paint booths (class 1 div 1 etc), and your typical UL and NEC standards for panels that also have many references to even things like fuse classifications (e.g. UL248-8 class J having its very own document)
I am not interested in using google every time I need to look something up and clicking through a 100 websites only to find a random PDF someone uploaded 10 years ago.
Has anyone discovered a solution to this, or am I just whining?
AI: IHS offers such a subscription service: https://global.ihs.com/
Be prepared to shell out in the 5 figures annually, though. It’s simply the cost of doing business.
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H: Variable power supply 200V
I want to make a power DC supply with voltage rating 0-200V.
I want it to be a variable power supply with voltage from 1V to 200v.
What should be my approach?
AI: My approach, but I've got not experience in building measurement-grade supplies, would be the following. Please, do take this slightly "and the details are left for the reader to implement" approach with a grain of salt.
You need a reference voltage and a control loop. Doing things in open loop over a large range is probably a bad idea.
Your large voltage range requires the control loop to control a divided output, and that will get inaccurate for small output values, so I'd recommend doing multiple separate controllers, and just picking the right one for every output voltage. (E.g. one for 0.5V–2V, for 2V–8V, from 8V to 32V and for 32V to 200V)
You can buy voltage references (do not go too cheap on this, a few cents more here will help you not worry about that source of error later on). Say, you get one with 2.048V +- 0.1% over the temperature range you care about.
Then, you'd take the voltage output by that, and pass it through a multiplying DAC, or voltage DAC with external reference input. That DAC has more effective bits than your intended resolution needs. Using more bits than strictly necessary allows for later software calibration.
Then, you'll need a > 200V DC source, ideally filtered against noise, but I don't know what you need in spectral hygiene.
You'll want a high-side pass bijunction transistor, with a load resistors stronger than your maximum load. (Which means you want different load resistances, swapped based on your output voltage range, effectively. You can also do that with e.g. a single n-channel mosfet controlled by a relatively rough DAC to give the desired output current "minimum load".)
That pass transistor's base voltage is controlled by a control loop that compares the voltage on its output, divided by a different resistive voltage divider (0.1% resistors are relatively cheap) for each range, to the voltage generated by your precision DAC above.
Use a low-offset, low-bias-current opamp, or instrumentation amplifier circuit, to implement that feedback loop.
Sprinkle in a series R and a parallel C filtering on the opamp's output to dampen the oscillations you'd get on voltage adjustments/load changes. Put analog switch IC's on the output of that – another few ohms of resistance doesn't hurt the control loop, and neither will the parasitic capacitance; now, replicate for each voltage range, and you'll have selectable controllers for all of your output.
What I described above is basically an opamp-controlled linear regulator, one for each double-octave of output voltage. The redundancy comes from the fact that getting the same resolution over such a large voltage range using a single resistive divider ist hard, and I don't see an elegant way to get a high-accuracy multiplying DAC to work at 200V.
Now comes the annoying part: everything done, this thing will probably not be 1% accurate. You'll need to have a microcontroller that translates the desired voltage to both a selection for the active controller and a non-linearity-compensated DAC value. Depending on your resolution (1% accuracy sadly doesn't tell us what the resolution is) and thermal and time-stability needs, this might imply hacks like keeping all your hybrid/analog circuity in a temperature-controlled heated enclosure, or a temperature-compensation calibration, or bright "do not operate when temperature is outside 18°-22°C" stickers or something.
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H: Dedicated current sense amplifier vs simp,e difference amplifier
I need to implement low-side current sensing for a H-bridge motor driver. While there are dedicated current sense amplifiers such as TI’s INA180, can I use a simple difference amplifier for this with equivalent gain of the INA180? What are the specific advantages of dedicated CS amplifiers?
There are issues with stock availability of the INA180 variant with specific gain in my part of the world. However opamps such as the MCP6001 are widely available and inexpensive.
AI: What are the specific advantages of dedicated CS amplifiers?
Current sense amplifiers are designed to operate from a low source impedance, so they can have lower input impedance than opamps, which allows topologies that offer features not available to opamps.
Among these the most interesting is the ability to operate with input voltages way beyond the power rails of the amplifier. This is extremely useful for high-side current sense.
You also get convenience and cost features, like having good offset and CMRR without having to buy expensive matched precision resistors.
These features are very useful for a high-side current sense, but not for a low-side current sense. In low-side, you don't have much common mode so CMRR is not that important, and input voltage is close to ground, so you don't need an amp that can take inputs beyond the rails.
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H: How to match RF output of (30+j10) Ohms to 50 Ohm antenna with matching network?
I'm designing a matching network for a 2.4 GHz inverted F antenna on a PCB that I am also designing. I am using an ESP32-D0WDQ6 MCU, and reading from the datasheet, the output impedance for the RF pin is (30+j10) ohms. (Datasheet in section 2.5 on page 7)
My goal is to design everything as ideally as possible with minimal power loss.
This image resembles the layout, board size is
a bit larger in scale in reality compared to the antenna:
This builds off of a question answered by Andy aka who suggested I create a new question which included additional details which I raised in comments. The question was should the antenna itself be tuned to 50 ohms ideally, even if the source output impedance is 30 Ω + j10 Ω, and how to match with a matching network? He recommended an L pad network which included the following details:
If your antenna is 50 Ω and your source is 30 Ω + j10 Ω then, add a
series capacitor of -j10 Ω to cancel out the +j10 Ω effect of the
inductor.
This now means you are trying to match 30 Ω resistive to an antenna of
50 Ω resistive.
Then use an L-pad calculator like this: -
You can double check the formula derivation on that site.
Series inductance needs to be about 1.6 nH Parallel capacitance needs
to be about 1.1 pF Then, if you went back to the start of the problem
and analysed what value of inductance is needed to produce the j10 Ω
in your driver output impedance, you'd calculate it to be 0.663 nH at
2.4 GHz.
This means that you can actually dispense with the added series
capacitor of -j10 Ω (as originally proposed) because you need 1.624 nH
from the above calculator. The upshot of this is that 1.624 nH might
as well be 1.663 nH so, the external series inductor you need to add
is 1 nH.
I asked the question if 50 ohms might be more ideal for the antenna due to normally being the best compromise between low attenuation and power handling, and was also discussing using a simulator to design the antenna and set the impedance which I plan on doing with openEMS, and to this Andy noted “If you are not wanting to use matching components you set the antenna to be 30 - j10 to maximise power from a 30 + j10 source but, only if you are not creating a transmission line to connect them i.e. the connection distance is very short.” My transmission line from the MCU RF pin to the matching network will be about 20mm so about 2/3 of a quarter wavelength. I am perfectly fine with using matching components if there is any advantage, and I intend to do whatever else I have to do in order to achieve an ideal solution. And I don't expect to design an antenna in a simulator that’s going to match the impedance exactly on the board in real life, but I want it to match exactly so therefore I will need matching components I conclude. Also, would there be any advantage in setting the transmission line to the RF pin impedance rather than to 50 ohms? Or would this be detrimental?
Andy aka has pointed out a way to match 30 ohms to 50 ohms with the L pad network and also cancel out the +j10 from the source by adding a -j10 series inductor value, which would match the source output to the antenna input, but what if the antenna isn’t tuned perfectly to 50 ohms? Say you have a 50 ohm reference antenna, but once it is placed on the PCB with components on the board and inside the case or housing which contains it, the impedance will be affected and transformed from 50 ohms to something else. To adjust for this, would I, using the online calculator Andy used, set the output impedance for the matching network to whatever the antenna impedance actually ends up being instead of 50 ohms?
And say I have a 50 ohm reference antenna design, would the best way to tune this antenna to 50 ohms on the board be to draw the length arm of the antenna longer on the PCB than in the original dimensions, and then trim it until it measures (with no L pad components on the PCB) nearest to 50 Ω at 2.4 GHz measured on a VNA at the antenna input as in this pic, and then after that match perfectly to 50 ohms with the matching network?
Because most of the time unless you're really lucky, even by trimming the length arm on the IFA, this still will not match it to the center of the Smith chart as the other dimensions play a role in impedance also, but usually you can get fairly close, somewhat close or at least closer. I plan on using a 50 ohm antenna, but drawing it on the PCB with a longer length arm that I will trim as I said to reach nearest to 50 Ω at 2.4 GHz on the actual PCB so it's as close as possible. Then once the antenna is closest to 50 ohms when viewed right at its input, then I will match exactly to 50 ohms with the matching network (or to whatever the antenna impedance actually ends up being instead of 50 ohms after trimming if that's what I should do instead) so basically the trimming of the antenna will be done just to lessen the impedance changes the matching network needs to perform. Is this the right strategy? Then this is the finished circuit?
Say on the VNA after trimming, my antenna ends up at 69 Ω + j 11 Ω at 2.4 GHz in attempting to get closest to 50 ohms at the center as in the image below. Would I then match the L pad input to 30 ohms while factoring out the +j10 on the MCU RF pin as Andy demonstrated, and set the output to 69 Ω + j 11 Ω? Is this the right idea? How could I do this with component values? I don't understand how to convert impedance such as j10 Ω into component values as Andy has done where he says "you'd calculate (j10 Ω) to be 0.663 nH at 2.4 GHz".
AI: Is this the right strategy? Then this is the finished circuit?
This is what I would recommend when you have a significant length of t-line between chip and antenna: -
would the best way to tune this antenna to 50 ohms on the board be to
draw the length arm of the antenna longer on the PCB than in the
original dimensions, and then trim it until it measures (with no L pad
components on the PCB) nearest to 50 Ω at 2.4 GHz
I'm no PCB antenna expert but I have seen it done this way. An antenna that is a little long will have a slightly higher impedance and one that is more inductive so, I would experiment with an antenna design on a PCB and trial that against the readings on the VNA.
Would I then match the L pad input to 30 ohms while factoring out the
+j10 on the MCU RF pin as Andy demonstrated, and set the output to 69 Ω + j 11 Ω? Is this the right idea?
Two things here; you need to reduce the j11 part by series tuning with a capacitor of -j11. The capacitor reactance formula is this: -
$$X_C = \dfrac{1}{2\pi f C} \hspace{1cm}\text{hence}\hspace{1cm} C = \dfrac{1}{2\pi f X_C}$$
Plugging 11 Ω into Xc and using f = 2.4 GHz gives a capacitance of 6.03 pF. That would need to be the capacitance in series with your 69 + j11 antenna to make it 69 + j0.
Then you match to 69 Ω but use a 69 Ω t-line: -
I don't understand how to convert impedance such as j10 Ω into
component values
For an inductor, the impedance formula is this: -
$$X_L = 2\pi f L \hspace{1cm}\text{hence}\hspace{1cm} L = \dfrac{X_L}{2\pi f}$$
So, an inductive reactance of 10 Ω is an inductance of 0.663 nH.
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H: Add a buzzer to a low current LED
The attached circuit works fine. The LED turns ON when SENSE PROBE and GROUND PROBE are NOT attached. The circuit is fed by a 5V battery. Somehow, the LED is not bright enough to begin with, but I could live with that. Now I am trying to add a small buzzer that also goes off whenever the LED is ON.
Adding that buzzer directly with the LED does not work. I measured the voltage across the LED and it was about 1.84V. That is not enough to trigger the buzzer. Connecting the buzzer to 5V and ground works fine. Is there a way to add a low current relay so that it turns ON the buzzer with the LED?
AI: HFE reduces towards 10% when saturated , so R4 needs to. Be reduced to 10% or less with the buzzer on, maybe a bit less than 10%. Then both buzzer and LED should work. But buzzer would be louder between collector and V+. Try 1k.
I assume you are using a polarized buzzer and maybe the polarity is wrong.
Most common are magnetic 30 mA buzzers or 167 Ohms @ 5V. My analysis indicates about 158 Ohms confirms my experience. Therefore for full bright Green and buzzer loudness, choose R4 = near 860 Ohms and check polarity
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H: Flashing SPI flash using DediProg while having intersection with other device
In my design for PCIE to USB converter board. I use VL805 Host Controller to do the conversion.
the chip needs a firmware that I flash it to SPI FLASH (U25) using DediProg.
I added a special 6-pin header (J14) to which I connect wires to DediProg.
my plan is to flash the firmware through the header, and supply voltage to the SPI by using Dediprog VCC.
at the flashing time, VL805 won't be connected to power. the signals {SPICS#, SPICK, SPISI, SPISO} are connected to that Host controller.
I was wondering if there could be a problem with the connection at the intersection between the SPI FLASH and the HEADER although the signals {SPICS#, SPICK, SPISI, SPISO} will be connected to a device that has no power.
My Solution:
Note: the VL805 sits on a PCB that will be connected as an external device to mini-PC motherboard.
Since there is a possibility of having ESD protection diodes at the SPI pins inside VL805 Chip, if we decide that we turn off the motherboard (3V3AUX_IN will be off) then turn on the programmer (DEDIPROG) in order to flash, we can risk powering up the chip again by supplying voltage to 3V3AUX_IN when the SPI signals {SPICS#, SPCIK, SPISI, SPISO} are high:
NOTE: that's just an image for clarification, I still have no information about whether ESD protection diodes exist in the VL805 or not.
So, to fix that, I thought of adding an N-MOSFET transistor that will pull down the (Power on Reset - PONRST) pin which will reset the chip at the time the Programmer device (DEDIPROG) is ON and is delivering VCC_DEDIPROG (which eventually will turn ON 3V3AUX_IN, and that's O.K because we want the CHIP to be ON when we do reset):
This means VCC_DEDIPROG will supply voltage to 3V3AUX_IN (which in a normal mode it should come the motherboard, but the motherboard at the flashing time is turned off) and that will help the transistor pull the PONRST node down.
the DIODE 101 will prevent current from passing to the programming device when 3v3AUX_IN is supplied from the motherboard (which we will turn it on after we finish flashing the SPI ROM).
Diode D100 will help discharging the C601 capacitor in cases where 3V3AUX_IN is suddenly down as result of power being cut-off or noise, in that case a system reset should be performed through PONRST pin.
What do you think of my solution?
AI: Yes, there could be problems when unpowered chip sits on the same bus.
IO pins usually have protection diodes to supply voltage, so the unpowered chip can try to load the SPI bus down as it tries to power up via the current it draws from the SPI pins.
Also in general having voltages on IO pins while a chip is unpowered is not normal and if the voltages or current exceed rated safe limits there can be permanent damage.
If the 3V3AUX power is off, the flashing will not work.
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H: United Kingdom Split Phase Transformer / Centre Tapped Earthed (CTE) / 55V - 0V - 55V - How do you wire the connector?
I'm working on a weird project which involves making a custom cable for a British CTE Transformer. For those not in the know, these transformers are typically used at jobsites to provide 110V power. There is no neutral contact; instead, there is a -55V, a ground, and a +55V contact.
These type of transformers use IEC 60309 connectors for their outputs, with a key at the 4h (120 degree) position, like this.
My question is: Which pin is +55V, and which pin is -55V? I've been looking everywhere for this information. I'd call a company in the UK, but timezones get in the way for me.
AI: My question is: Which pin is +55V, and which pin is -55V? I've been
looking everywhere for this information.
At a particular instant in time, one pin will be positive and the other pin will be negative and they will have the same magnitude. Ten milliseconds later and the opposite happens. It happens because the output voltage from a transformer is alternating and not DC: -
Short story: it matters not one jot.
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H: What are the main parameters to check display with display controller
I have MAX9278 deserializer IC which is connected to a 3.1inch TFT display 800 (W) * 480 (H).
Deserializer provides 4 LVDS lanes and 1 clock to the display.
What are the major parameters that I need to check so that I can confirm that the Display will work fine with my deserializer?
AI: Video format compatibility, e.g. resolution, blanking, pixel clock. Interface compatibility between singe/double/quad LVDS link. For each of the links 8-bit display with 4 lanes, or 6-bit display with 3 lanes. Compatible link/lane bit mapping e.g. VESA or JEIDA. DE/HS/VS sync compatibility. Basically everything that is provided regarding the interfaces.
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H: How to calculate the collector and emitter resistors in a differential amplifier with transistors
I'm refreshing my electronics knowledge a bit (after 30+ years), and I'm trying to build an audio amplifier from scratch without integrated circuits (transistors, and mosfets only).
I'm trying to build the input stage, which is a differential amplifier using 2 transistors. I'm currently simulating it with LTSpice, but I seem to amplify only the positive part of my input signal. I guess it's because of the values of the emitter and collector resistors.
I understand the principle of a diff amplifier, but I'm struggling with the practical setup.
Can somebody explain to me (or point me to a site) how to calculate those resistors?
I guess there should be current flowing through R2 while out1 should be at ground level, if no signal is applied?
I included my schematic and the waveforms.
Thanks a lot!
AI: Firstly, you probably need to set V4 to be 0 volts (midway between the power rails) if you are testing the front end differential amplifier. Currently it appears to be set to a value called "V" and I can't see what this is anywhere.
But, your circuit has a massive voltage gain so reduce the input voltage AC amplitude to produce a decent sinewave on the output. Remember that when you "close the loop" the circuit gain will become much lower due to negative feedback and the actual levels at the bases of the transistors will be around a milli volt or so. That is about the right sort of level you'll need to use when testing your differential front-end.
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H: RiscV CPU, why is it so complicated? (for companies to build)
I saw an online code for RiscV32 bit processor which consists of nearly 1000 lines of code and supports all know commands like sw, lw, j, etc...
My question is, why companies like Apple need so much time and resources to build a new processor if 1000 lines can be fixed/improved by one engineer only?
AI: If they were only simulating the processor, it wouldn't take much at all, a student could do this with the right software. Actually implementing the processor in silicon takes a lot of time and effort. Apple did their own IC design which means that not only do you have to deal with the RISCV architecture, but also designing the transistors and the physical fabrication. Many engineers are needed to do this in many different areas. In addition, for a consumer processor everything needs to be optimized to keep costs down and for performance (power and speed).
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H: Output voltage\current of 555
Im trying to understand what is the output voltage\current (pin 3) of that 555.
If I get it right, when low (logic 0) AND Vcc is 5v AND output current is 8mA, the output voltage is 0.4v
And when high (logic 1) AND Vcc is 5v AND output current is -100mA, the output voltage is 3.3v.
So I have 2 questions:
why -100mA when high? and not +100mA?
In order to get that 100mA, should I connect a load (lets say resistor) to the output, with the value of (3.3v \ 100mA) = 33ohm?
Appreciate the help
AI: The convention used here is (-) is current SOURCED BY or flowing OUT of the pin. The (+) is when current is flowing IN to the pin, i.e. it's SINKING current.
The 100mA rating is the MAXIMUM that the pin can source. Generally you will load the pin much less than this. You should not design your circuit to maximally load a pin in general.
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H: Altium Designer Deleted schematics completely
I opened up Altium after a windows update, and received this error:
[Error] ADF4355-3.SchDoc Project ADF4355-3.SchDoc, could not be found and will be removed from the project.
I saw another post that said to just add the file back in manually after it removes it, but the file is completely gone. There is a backup that is just a blank schematic, and 2 of my libraries are gone as well. The recycle bin shows nothing.
Has anyone experienced similar problems or know if the data is recoverable?
AI: Find the original project directory (not the one listed in alitum). If the files are gone from there then check the hard drive and do a search for all schdoc files. If the file is not listed there then you have a problem.
In addition altium can be configured to save files in a history directory in the project folder. This doesn't come by default so if you didn't do that then the history files won't be of much use to you.
If the files really aren't in the project directory then they probably are gone you should see how bad you want them and pay for recovery (which may or may not work if the files have been over written, keep in mind that the more you run the drive the better chance that they have been over written).
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H: What's the current through the 2Ω resistance? The question requires me to find the answer by using Thevenin's theorem
This is the circuit. I have found Thevenin equivalent resistance to be 5 ohm. Is that correct?
I am not able to find the Thevenin equivalent voltage across the load resistance.
These are the steps that I took to get the Thevenin equivalent resistance:
I removed the load resistance
I calculated the remaining resistances: [(4+6)||(6+4)] = 5 ohm
AI: As a hint, consider that your circuit behaves exactly the same as this one:
simulate this circuit – Schematic created using CircuitLab
Now you should be able to see how you can apply Thevenin's theorem (two times) to simplify this circuit to the point where you'll be able to find the current through R5 by inspection.
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H: ESD protection for power input with several fused branches
I'm designing an industrial board that will be powered with a +24V DC. On the PCB there are several fuses to protect each branch against over-current/short-circuit. Example:
simulate this circuit – Schematic created using CircuitLab
Of course the resistors simulates the actual loads: MCU, relays, LEDs, ...
The 24V is applied through screw terminals.
I need to protect the circuits ("loads" in this examples) from ESD.
As far as I know the ESD protection should be placed very close to the input connector.
So the obviously solution is to add an unidirectional TVS at the input:
simulate this circuit
Usually I put a fuse before the TVS so it can also be effective on persistent over-voltages or inversion of polarity. But here I don't think it's worth to add another fuse!
Is a single TVS enough for ESD protection? Is there a better (= safer, more reliable) circuit to use in this scenario?
By the way, I don't have a real "ground", so I need to close the discharge to the common voltage (0V).
AI: here's the general pattern.
Ideally, AC-couple the ground plane to FE or chassis. Also think through the consequences of how this interacts with all the non-power signal connections, and every conceivable way of the field wiring being done wrong (often multiple mistakes at once due to wires being swapped or shifted). A common mode choke may be called for too, for EMI, depending on details - not shown here.
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H: What's the ideal positioning for analog MUX in microcontroller circuit? (in a design with two boards)
I'm designing a set of PCBS for a midi controller and am wondering what is the best placement for the multiplexers in my design. Here are the details:
Board 1: a microcontroller (Teensy 4.0), power in, usb out
Board 2: A control panel with around 50 pots and switches, all of which will be fed into 74HCT4051 multiplexer chips and then into the Teensy's analog inputs
The boards will be connected with an IDC cable, like this one.
So, is there any advantage placing the multiplexer chips on one board or the other (ie positioning the chips closer to the pots or closer to the microcontroller)? Or should I assume that either way should work fine?
To be clear, the pots and switches will be biased with the 3.3V coming from the microcontroller.
AI: One problem with IDC cables is grounding and noise issues, they need to be accounted for or there could be problems with the design.
IDC cables can have cross talk between conductors, so sending the digital signals over IDC could potentially bleed into the next pin if the signals are switching and create noise (I've had this happen before).
With IDC, grounding can become an issue, the IDC is something like 26 or 28AWG which means at least ~50mΩ per foot (plus a few more 10mΩ's for the connectors on each end). If you send a 10mA signal that is switching digitally (or an IC that swtiches 10mA of current on board 2), then the ground could move ~500uA and that is almost 1bit for a 12bit ADC at 3.3V. So make sure the ground is solid by using more than one conductor (use a lot more than one pin).
Unless cost is a major factor, I'd just put one or more cheap ADC's on the other board like the ADS7952S
The best option would be to put the processor on the same board and make the IDC short as possible
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H: Are there any special considerations for extending a UHF-carrying coax wire in a small device?
In the process of doing a repair on a mobile phone, I've tracked down a "no service" issue to an antenna lead inside the case. Specifically, it has detached from the U.FL/MMCX (I'm not sure which this is) connector soldered to the mainboard.
You can see on the bottom half of the image the white wire is broken off and sitting to the down and to the right of the connector (marked "1") it's intended to be part of. Note that this wire isn't an antenna itself; it carries the signal from the GSM radio on the mainboard to the actual antenna module on the other side of the device. It is intended to be terminated on both sides.
The problem is that the antenna wire has become so frayed, that I don't think there's enough of it left to cleanly resolder to the connector.
So, some new wire is in order. Problem is, I can't find any direct replacements for this device.
What I need to know is, if there are any special considerations for the right gauge and material of wire to use for this embedded UHF antenna use case. Can I grab an arbitrary bit of copper coax of a similar size and splice it in, or does the 1900MHz signal this line will carry demand more precision in the materials or techniques used?
AI: The coax impedance must be matched and the cable must be able to carry the 1900MHz signal. It might say the impedance on the cable (like 50Ω or 75Ω), if it does then your in luck. If it doesn't then the only way to find out is to test it (which would be very difficult and require specialized equipment).
Additionally the repair would need a continuous wire (so no splicing). Splicing can't match impedance specs. The cable would need to be soldered (or connected) in the same way to the antenna as the cable is now.
The easiest thing to do would be to get a new antenna/cable, but whatever happens the impedance must be matched.
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H: How is this optoisolator being sensed by an input?
I'm trying to replace a mains input opto-isolator (pictured below) which is connected to an input on an industrial control board.
I would have though shorting the input would be enough but this is not the case. There is an input LED on the board which changes state however it doesn't activate the desired function in the controller
I don't have access to remove the board so I can't see what kind of input circuit it is - but from the above testing I'm assuming it's an ADC.
The large SMD device on the input can't be a PTC as i've drawn here - I think it would have to be a diode for reverse polarity protection.
The resistor above it is 47R - I'm assuming that this is all that is required to trigger the input. I'm going to purchase a few resistor values to test (i've tested tested down to about 500R with the resistors I have on hand and it hasn't worked)
Is there anything else I'm missing?
AI: This circuit uses a power resistor to drop up 360Vpk or 5mA into Full Wave Diode Bridge then LED. The output current thus saturates the effective Darlington inverter so that only zero crossings are pull-up except when the input current drops below the threshold which may be in the 1mA range. Thus it is possible to generate a 1% zero-crossing positive pulse at 2x grid frequencies.
simple simulation.
I omitted the MOV on the output stage.
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H: Crystal oscillator behaving strangely
I've made a 32kHz crystal oscillator using the CD4060B IC. The IC is powered by a 7805 voltage regulator which in turn is connected to a 12V SMPS.
I've probed the Q5 output (~1024Hz) using an optocoupled MSP432 and had the following waveform:
The large "off" period grows larger and eventually the oscillations stop.
I've noticed that when I placed my finger at the body of the 7805, I had stable 1024Hz oscillations for some seconds, then the "off" period started growing again until the wave collapsed. I thought it could be an overheating problem, so I added a heatsink to the 7805 and probed the current using a multimeter - still had the same result (the current drawn was at most 1.1mA).
Then I've placed much larger decoupling capacitors (220uF and 470uF) - still had the same results.
Then I connected the IC directly to the 12V SMPS and had the same result...
I also tried the original circuit, but with different feedback capacitors and resistor at the crystal filter (15pF, 33pF, 56pF, and 3.3Mohm) - still no improvement...
Finally I've powered the IC directly using the 5V pin from MSP432 and probed using the same optocoupled circuit. Then I had a stable and perfect ~1024Hz square wave.
Could this be a problem with my SMPS or is it a problem with the circuit? What could possibly indicate the fact that my finger at the body of 7805 created a "temporary stable" square wave? Why does it work with the MSP432 as the power source?
Thanks in advance.
AI: I don't see anything inherently wrong with your circuit or your constant-current drive output circuit, except that you MUST connect unused inputs on the chip to a valid logic level (ground or +5 in this case). In particular, pin 12 (RESET) must be grounded or it will float around with leakage and capacitive pickup.
It's also possible the 470K is too high and your oscillator is barely able to maintain oscillation.
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H: Can anyone identify this 40-pin SMT socket on the Silicon Labs BRD4180A board?
This socket appears on the Silicon Labs BRD4180A board and it might be nice to reuse the module on our projects after programming it. The socket appears to have 50-mil spacing between pins. What is it? There are no apparent markings on the plastic itself.
Male/female:
From datasheet (probably 3d render):
AI: The key to this lies in the documentation for the BRD4001 'Wireless Starter Kit' which your BRD4180A plugs into - available from SiLabs here.
There you'll find the BOM spreadsheet, which tells you that the daughterboard connectors, P200 & P201, are Samtec Tiger Eye™ TFC-120-02-L-D-A-K-TR - these are the connectors you'll need to use on your own boards to be able to re-use the BRD4180A on them.
The mating connectors on your BRD4180A are probably SFC-120-something....
The WSTK documentation package link is posted in a SiLabs Knowledge-Base article here.
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H: What is the meaning of Change in Output Offset Voltage between complementary output states
I have MAX9278 deserializer IC which is connected to a 3.1inch TFT display 800 (W) * 480 (H).
Deserializer provides 4 LVDS lanes and 1 clock to the display.
While I checking the electrical voltage compatibility between the Display and the deserializer, both have a differential voltage levels of 1.125V to 1.375V. So, I believe they are compatible. But,
In the table "DC Electrical Characteristics" page 10 :
Does the Output Offset Voltage "Vos" actually mean Common Mode Voltage?
What does the "Change in VOS Between Complementary Output States - del(Vod)" & "Change in VOS Between Complementary Output States - del(Vos)" ? Can someone help me with a diagram on what does this mean?
AI: Does the Output Offset Voltage "Vos" actually mean Common Mode Voltage?
Normally, Common-Mode and Offset voltages are different things: Common-Mode voltage includes Offset, Noise, etc voltage.
What does the "Change in VOS Between Complementary Output States - del(Vod)" & "Change in VOS Between Complementary Output States - del(Vos)" ? Can someone help me with a diagram on what does this mean?
First, there's a typo in the datasheet: The first parameter should be "Change in VOD Between Complementary Output States - del(Vod)"
The diagram at p.22 of the datasheet shows the signaling scheme.
When the differential signal swings from high to low or vice-versa, either the offset voltage (VOS) or the differential voltage (VOD) can shift. ΔVOS and ΔVOD indicate the maximum amount of these shifts guaranteed (I'm not sure about that, it may not be guaranteed) by the IC's design.
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H: Calculating RC snubber network current?
I'm trying to pick the components to use with this DC/DC Buck-Boost Converter. At page 13, the datasheet says, that for input voltages higher than 4.5 V I need to add an extra 2Ω/1nF RC snubber between SW1 and GND. And my concern is, what resistor size/package should I use? How do I calculate the max current that would go through that network at 1 MHz switching frequency? I know that I could calculate capacitive reactance of that capacitor to know the current, but that seems appropriate only for sine wave voltage, not for a PWM signal with rapidly changing duty cycle.
AI: The SW1 pin will be Vin + the transient. For 3.3V it doesn't get much more than 4V. So maybe 1V through the cap (momentarily for a few ns, we'll figure the transient square instead of peaky for calcs sake and lasts 10ns with a height of 1V only the AC will go through the cap and reach the resistor).
I don't think I'd worry about the power at all. That pulse is small, way less than 10ns. \$1V^2*2Ω = 2W\$ and \$2W*10ns/1s= 20nW \$ Even with a pulse rate of 1MHz this would be 20nW*1e6 or 20mW, any resistor could handle that and that is worst case upper-bound.
If your really worried about it simulate it, it's really easy with lt spice (if they have the model and they do for 90% of converters, or use LT power cad to generate the spice file)
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H: "The following branches form a loop of rigid branches (shorts) when added to the circuit" error in Hspice
simulate this circuit – Schematic created using CircuitLab
I am trying to do the transient analysis of this circuit.
Given, Initial Conditions I(L0.1-)=10A, I(L0.4-)=20A
simulator lang=spice
R200 1 0 200
R40 1 2 40
R60 2 0 60
L0.1 2 0 0.1 IC=10
L0.4 2 0 0.4 IC=20
.OP
.TRAN 1m 50m
.END
I am getting this error
Fatal error found by spectre during topology check.
FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit:
L0.1:1 (from 2 to 0)
Can anyone help me what is the reason?
AI: Inductors are internally represented as voltage sources, so unless you have some series resistance in there, somewhere, the circuit sees two voltage sources in parallel, which is not possible. The same for two current sources in series.
You can either add some minor resistance (something like 1 mΩ, or so) in series with any of the two, so that the local loop includes that resistance, or combine the two inductors into an equivalent one, L1 || L2.
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H: Capacitive distance sensor - humidity influence?
We are using a capacitive sensor to measure displacement (from here: https://www.micro-epsilon.com/displacement-position-sensors/capacitive-sensor/?sLang=en). However, we seem to notice a significant dependence on the humidity of the air on the result (temperature in the room is controlled and almost constant, humidity varies over the year from about 20%-50%).
The obvious cause would be a humidity dependence of the relative permittivity. However, I cannot seem to find any data of this dependence (except some for the static case). On the other hand, this surely has been measured.
So the question is: Is there data available for the humidity dependence of the relatve permittivity of air at frequencies from 20 Hz to e.g. 10 kHz?
AI: At around 20 °C, water has a relative electrical permittivity of about 80. Air is 1 so, any water content could be a significant factor in altering the capacitance measured. Given that capacitance is proportional to permittivity there should be a fairly direct link.
I guess all you have to do is calculate the percentage presence of water in a given "air" volume for a certain level of humidity. For instance, wiki states this: -
A parcel of air near saturation may contain 28 g (0.99
oz) of water per cubic metre of air at 30 °C (86 °F)
And, this document pretty much shows the same thing (ignore the red lines). At 30 °C and 100% RH, the water content is around 25 g per cubic metre: -
So, using the above example, 1 cubic metre contains 28 g of water or, as a volume that's 28 ml. And, there's 1,000,000 ml in 1 cubic metre so, as a volume percentage, 28 mg of water per cubic metre is 0.0028%.
Given that the permittivity of water is 80, then the capacitance could increase by 80 x 0.0028% = 0.224%.
But, you may also attract condensation onto your sensor and that will surely make the capacitance sensor read a much higher value.
Is there data available for the humidity dependence of the relative
permittivity of air at frequencies from 20 Hz to e.g. 10 kHz?
This graph from here suggests that you won't get a change in dielectric permittivity of water until you are in the GHz region: -
And this graph shows that the dielectric permittivity of water is constant down to 1 MHz. I think it's reasonable to assume that it will stay constant down to DC: -
And this graph from here pretty much nails it down to about 10 Hz: -
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H: Determining capacitor value in a flyback converter
I have a dead audio mixer power supply (Soundcraft MTK 22) which I am trying to bring back to life and learn more about flyback converters in the process. This particular supply runs on 230VAC and outputs +5V, -15V, +15V and +48V. The user guide states that the power consumption is <120VA. The problem lies in the switching circuit based on the UC3842A switching controller which I've sketched out here:
(Connections on the right are connected to the primary side of the transformer)
The power mosfet was short-circuited so during my previous repair attempts I replaced the mosfet, the switching controller, C103, C107, C105, C102, R102 and R103 but the mosfet shorted again. Thus, I decided to also replace all the SMD components around the UC3842A. However, as I don't have a component tester at hand I can't determine the values of the C106, C108 and C104 capacitors. Also, I don't know the switching frequency, which is in turn determined by C106 and R106 (whose value I do know).
Is there some other way to work out the switching frequency or choose those capacitor values?
AI: Is there some other way to work out the switching frequency or choose
those capacitor values?
The UC3842 data sheet shows this graph: -
RT and CT in your diagram are here: -
So, remove C106 and test it with a capacitance meter because there's no other way to determine the switching frequency given that the device may be damaged. You might get lucky by removing the MOSFET and seeing if the UC3842's oscillator magically springs back to life of course.
100 kHz is fairly standard for switching frequencies so if you say that RT (R106) is 15 kΩ then C106 (CT) will be about 1 nF
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H: How to calculate the angle for the phasor form?
I have the following problem:
A one-phase voltage of v(t) = 150⋅sin(wt)is connected to a load with impedance Z=2+4j Ohm.
What is the current through the load, on phasor form? (use the supply voltage as reference)
My problem:
I think the magnitude is 23.7 (taking 150/sqrt(2) and dividing by 4.47 since r=sqrt(2^2 + 4^2). But how do i calculate the angle for the phasor form?
AI: Yes, the magnitude of the current is 23.72 amps.
To calculate the phase angle, the easiest way is to convert the rectangular impedance to a magnitude (already done) and an angle. The angle is \$\arctan(4/2)\$ = 63.435 °.
Given that it is a positive value, when you divide voltage (at 0 °) by an impedance having an angle of +63.435 ° the net result for current is a negative angle of 63.435 °
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H: Is the Raspberry Pi Pico pinout compatible with the Arduino Nano?
I could not see any Information regarding the pinout compatibility in the documentation:
https://www.raspberrypi.org/documentation/pico/getting-started/
To what extent is the Raspberry Pi Pico pinout compatible with the Arduino Nano?
The footprint of both boards looks very similar. Many Thanks!
AI: Here the pinout of Raspberry Pi Pico:
Source: https://datasheets.raspberrypi.com/pico/Pico-R3-A4-Pinout.pdf
and here the one of Arduino Nano:
Source: https://content.arduino.cc/assets/Pinout-NANO_latest.png
They are quite different and not compatible.
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H: What is the control Input of the small signal current mode PWM switch
I am trying to simulate the open loop transfer function of my system. My system is really classic. A converter (the plant transfer function), a sensor and a corrector which is a simple Integrator (1/(1+s/wp)). My corrector is a discrete transfer function. But I use the inverse bilinear transform to get it in the S domain. (I do not think that it is possible to simulate discrete transfer function in LTspice). My problem is the following, it doesn't work. When I simulate it with a transient analysis "trans", the duty cycle given is not correct and the output of my controller does not move in function of the output where as the output is really moving correctly because I used a method which set automatically the operating point #ChristopheBasso. I would like to be sure to what I have to apply on the control input of the PWM switch.
If I used the UC384X, from my side, I think the Input control of the average PWM switch is equal to the input of the comparator as it is shown above.
So after my corrector, I have to simulate the error amplifier? Isn't it? The model that I have of the error amplifier is clearly not representative of the real model. I saw when I looked the bode diagram of the error amplifier. But I do not think that It will prevent to make my simulation work. Then I should got add the real model if I want to obtain the correct open loop transfer function.
Here is how I set the error amplifier.
Have a nice day!
AI: In a circuit like the UC384x but also in many other controllers, the maximum peak current voltage setpoint is limited to a certain precise level. It is 1 V for the UC but can be of lower value in other controllers like 0.8 or even 0.5 V in more modern ac-dc PWM circuits. In recent low-voltage dc-dc controllers, it is no longer uncommon to encounter maximum voltage setpoints as low as 50 mV but then you can imagine the sensitivity to switching noise in this case and good layout with adequate components choice are paramount.
This upper limit is there to protect the converter against peak current runaway when the loop is open. This happens during the start-up sequence, before the output voltage reaches the target, but also in fault conditions such as short circuits or optocoupler failure. With a 1-V maximum voltage setpoint and a sense resistance \$R_{sense}\$, then the maximum permissible current is: \$I_{p,max}=\frac{V_{max}}{R_{sense}}+\frac{V_{in}}{L_p}t_{prop}\$ in a flyback converter where \$t_{prop}\$ represents the delay incurred to the IC internals plus the driving time to effectively turn the MOSFET off.
In the UC348x picture shown below, the control section starts at the COMP pin of the error amplifier:
The voltage first undergoes an offset subtraction of 1.2 V roughly and this is to ensure a true zero-current setpoint when the COMP pin either rails down to 0.8 V (typical) with the op-amp or is externally brought to ground via an optocoupler. In reality, the \$V_{CE,sat}\$ of the opto is around 200-400 mV depending on various factors and owing to the diodes, you truly have zero volt at the current sense comparator. This interesting feature brings 0% duty ratio at no cost and allows operation of unloaded converters without output power runaway. The division-by-three is there to augment the op-amp dynamics. Without it, the op-amp output would move between 1.2 and 2.2 V to bring 1 V as a maximum setpoint. However, this would restrict the op-amp on a low voltage range but could also compromise the noise susceptibility. For that reason, the divider forces a higher voltage on the op-amp output (4.2 V to obtain 1 V) and naturally expands its output dynamics.
If you now want to model this controller with the CM PWM switch model, it is important to properly build this op-amp sub-circuit. The circuit in your post uses a simple voltage-controlled voltage-source with a 60-dB gain and it looks like the simplest option. It has several drawbacks:
the circuit output is unclamped meaning that during bias point operations the "op-amp" can peak to several kV. Yes, libraries don't burn but SPICE can't compute a proper bias point in this case.
if you run transient analyses, you may have totally abnormal voltage values across the compensating elements.
you have to reproduce the circuitry in the current-mode PWM controller you have adopted which is to limit to 1 V max the bias at the control pin of the CM PWM switch model.
The below circuit shows a first possibility to model the UC384x and this is a very first approximation which does not work with an optocoupler pulling the COMP pin down but it is good enough to obtain a first ac response with the PWM switch model. A more comprehensive model with a 1-mA maximum output is given in my book.
In this circuit, the output voltage is clamped to 5 V and 0.8 V via perfect diodes (N=10m) and there is no convergence issue considering the 100-µS source involved when the diodes clamp. So if you connect this op-amp to your model, you need a add a 1-V Zener diode and you should be ok:
You could also use an in-line equation (analog behavioral expression) and clamp the error voltage between 10 mV and 1 V. You could even group the 1.2-V offset subtraction and the divide-by-3 operation in the same line:
You read the expression as:
IF V(err) is less than 10 mV THEN V=10 mV
IF V(err) is greater than 1 V THEN V=1 V
ELSE V=V(err)
Hope this helps your model converge!
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H: Uncrossing differential pair routing
I'm routing USB tracks, which are 90R differential impedance from a USB hub to a downstream device, but the D+ and D- pads downstream are crossed over, and the device has an exposed pad, so I can't route behind. Is there a better way of doing this than my solution (see image) to use vias right at the end of the routing for the smallest distance possible?
AI: Vias are quite big 1.3mm / 0.8mm hole, I can go down to 0.8mm/0.4mm
vias, is using as small a via as possible best practice for this sort
of issue? What's the technical reasoning behind it?
Ideally, for high speed balanced signals like USB you should introduce the same to one track as you do on the other. Here's what I mean (roughly): -
But, make your vias much smaller and therefore more likely to be closer to 45 Ω impedance on each. The impedance is determined by various things but, in short, a fat via pad will have an impedance that is too low and you might get some problems. Its impedance will be too low because the inductance to capacitance ratio will be smaller than that dictated by rules: -
$$Z_0 = \sqrt{\dfrac{L}{C}}$$
This site provides useful information about how you should go about doing this such as this for a couple of example of 50 Ω vias: -
So you have a couple of examples and given that they are 50 Ω, they are close enough to your required 45 Ω per track for this to be OK in my opinion.
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H: Getting the wrong voltage while simulating a 555 timer
I'm designing a circuit based on the 555 timer. I'm using EasyEda as simulator.
The problem I'm having is that, with a voltage supply of 5V, I'm getting 3.3V in the output, while I was expecting 4.4V minimum.
I'm expecting the mentioned value because the VOH stated for 5V supply in the LMC555 datasheet (see 6.5) is that. However, since the voltage I'm getting is lower, I suspect that my confusion comes from the 555 my simulator is using. Let me explain:
As far as I understand, the 555 timer is kind of a standard part. Many manufacturers make it, but they all should match some pre-established specification. However, there might be different families of 555 timers depending on the technology they use (CMOS, TTL...). Is this correct?
If so, my guess is that the simulator I'm using is simulating a TTL 555 timer, while the datasheet I was reading (the one above) speaks about a CMOS 555 timer. That would explain the voltage drop I'm seeing (it makes sense that BJTs drop more voltage than CMOS, right?). Is this correct?
To verify this I have done the following, I'm not sure if I have understood it correctly though:
I have noticed that the 555 timer that is available in the simulator is called 555_BJT_EE. That BJT part makes me thing that it is simulating a 555 based on BJTs, that is, TTL technology. Next, I have searched a datasheet that corresponds to a TTL 555 timer and I have found this: LM555 timer datasheet.
In the part 6.5 I can read in the table that the output voltage drop (high) for 5V is between 2.75V and 3.3V.
I think that output voltage drop means the voltage you need to substract to your Vcc to get Vout. Is this correct?
If it is, is my above reasoning correct? (namely, I was looking at the wrong datasheet because it was describing a CMOS 555 timer, while I'm using a TTL (BJT) one. Thus, I need to stick to a datasheet which corresponds to a TTL 555, which happens to be the one my simulator has)
EDIT
I have no load for now, just an oscilloscope to measure the output frequency.
Here is the schematics (555 in astable mode to generate a sqare wave signal at 2 Hz):
AI: As far as I understand, the 555 timer is kind of a standard part.
Yes, definitely. That used to be called "multi-sourcable".
Many manufacturers make it, but they all should match some pre-established specification.
Hopefully. They only do if there's actually an agreement between these manufacturers, which often isn't the case. It's not the case here: The original IC was just so simple and laxly specified (by modern standards) that it's easy to be "compatible" with the original specs, and that's kind of the common denominator. You still should check the datasheet of the exact 555 you're using if you're using it at high frequencies, high currents, low latencies...
However, there might be different families of 555 timers depending on the technology they use (CMOS, TTL...). Is this correct?
yes.
If so, my guess is that the simulator I'm using is simulating a TTL 555 timer, while the datasheet I was reading (the one above) speaks about a CMOS 555 timer.
That might well be the case.
That would explain the voltage drop I'm seeing (it makes sense that BJTs drop more voltage than CMOS, right?). Is this correct?
It would be a possible explanation.
Is that output voltage drop the drop you must expect from your Vcc? In other words, If my voltage supply is 5V I should expect 2.25 maximum, correct?
No, you must really read the datasheet of your chip to get that data.
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H: How to write a voltage in phasor form (using a reference-voltage)
I have the following problem:
Consider two voltages described by
v1 = 325 sin(wt+10º) V
v2 = 326 sin(wt+130º) V
Write v2 in Phasor Form using v1 as reference...
My Question is:
I understand that the angle will be 120º, but what will the voltage be?
Below is a drawing of how I am imagining it to be from a trigonometric point of view, but maybe this is the wrong way to look at the problem?
AI: Write v2 in Phasor Form using v1 as reference...
To find it without drawing phasors you just add/subtract \$\theta °\$ to/from all of your phasors where \$\theta °\$ is the angle that when added/subtracted from your reference phasor will make it \$0°\$. In your case you can subtract \$10°\$ from each phasor (thus making \$v_1\$ your reference).
Making \$v_1\$ the reference means you adjust its angle to \$0°\$. When you do this, the entire phasor diagram rotates with \$v_1\$ until \$v_1\$ is at the \$0°\$ position.
For example, below on the left are two arbitrary phasors \$V_X\$ and \$V_Y\$. On the right I have made \$V_X\$ the reference and put it at position \$0°\$.
What really matters with phasors is their position relative to each other. Rotating the whole group around does not change their relationship to each other. Further, you can use whatever angle you want as the reference. Some folks use \$90°\$ so it is whatever you prefer.
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H: How does a bare PCB product such as a Raspberry Pi pass ESD testing for CE mark?
I am designing a product that is to be sold as a bare PCB as a finished product, and so requires EMC testing to be able to CE mark. I am new to designing for ESD, and protecting every single exposed pin from an 8KV discharge seems overwhelming!
My question is how does something like a Raspberry Pi pass this test? Have they managed to design such that every pin survives 8KV, or am I missing something about how the EMC directive is applied?
AI: Does this answer your question (emphasis added)?
9.3.2 Test method The test method shall be in accordance with EN 61000-4-2 [2]. For radio equipment and ancillary equipment the
following requirements and evaluation of test results shall apply. The
test severity level for contact discharge shall be 4 kV and for air
discharge 8 kV. All other details, including intermediate test levels,
are contained within EN 61000-4-2 [2].
Electrostatic discharges shall be applied to all exposed surfaces of the EUT except where the user documentation specifically indicates a
requirement for appropriate protective measures (see EN 61000-4-2
[2])
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H: Correct design of Colpitts oscillator
I have been watching this video and when it is designing the colpitts oscillator it doesn't add a base resistor. I am thinking that is wrong because the BJT will saturate since the guy sets a base voltage 1/2VCC + VBE(0.7) to make the temperature dependent Vbe not important. So if we add a base resistor to the Collpits oscillator will that change something important (feedback fraction or the amplification of the signal ( in the closed loop configuration ) ) .
simulate this circuit – Schematic created using CircuitLab
Why don't we add another base resistor here?
simulate this circuit
AI: There is already an equivalent input series resistance. Why would you think you need more? hFE Re = Rin.
The concept of the Colpitts Osc shown here is to amplify AC current > 1 by series resonance in phase with output. This would be a Series mode Crystal with low ESR and the Xtal is a RsCmLCp equivalent circuit with C1,C2 added for tuning.
Here I have simulated a 10MHz Colpitts Osc with an added series Rs=10 that you may adjust with your mouse-wheel to determine how much gain margin you have before it stops oscillating. This is how you validate the oscillator gain stability margin for a given series crystal oscillator.
This is time-averaged if the transistor ratios are overdriven into cutoff of base current, or may be tuned for small Vbe variations and a better sinewave out.
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H: Are KiCad's horizontal 2.54" pin header and 90 degree pin headers equivalent?
I was experimenting with PCB layout in KiCad and noticed that the Connector_PinHeader_2.54mm > PinHeader_1x06_P2.54mm_Horizontal footprint and a physical 90 degree pin header I have do not seem to match, as seen in this photograph:
The physical pin header in my possession appears to be designed to have the plastic spacer in contact with the PCB, with the other half of the pins used for contact with the female connector.
On the other hand, KiCad's footprint resembles more an upright header laying down on the PCB with a bend to go through the pad further down than most upright headers' pins extend.
I was unable to find anything which resembled the KiCad component through any of the component suppliers I typically use. Is it a real thing, and does it have a name? If not, does KiCad have an equivalent to the real component?
AI: Based on the source for the KiCad 3d model generator, these pin headers were modeled using a WE 613 0xx 110 21
You can find them in stock at Digikey
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H: Ways to reduce Vgs range of Logic Level MOSFET
I try to control two MOSFETs from one microcontroller pin, where one MOSFET shall turn on 400 ms after the first one. The second MOSFET is switching on a relay coil.
My idea was just to use a RC circuit on the Gate of the one to turn on secondly but unfortunately the range of Vgs is to huge to exacty determine the turn on point of the MOSFET.
Can the simple RC and MOSFET circuit be altered, so that the turn on Point can be precisely defined? (+- 50ms)
The goal is a small component count and a robustness against temperature and tolerances.
AI: Can the simple RC and MOSFET circuit be altered, so that the turn on
Point can be precisely defined? (+- 50ms)
Yes, but you will have to add a component that has more accurate threshold voltage. An op amp or comparator could be used with reference voltage set by a voltage divider, like this:-
simulate this circuit – Schematic created using CircuitLab
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H: Does splitting the clock signal into several inputs cause problems with system stability?
Below is the schematic of the sequencer I designed. Does splitting the clock signal into several inputs cause problems with system stability? I have marked with colour the place where the signal was split. Is this the right way? Or should I do it differently? Thank you.
AI: Your clocking arrangement is difficult to analyze by inspection. You generate a "clock" signal, pass it through an inverter and use that as the inverted clock for IC10. IC10's output is passed through an RC network, two Schmitt inverters and then IC11. An output of IC11 is then fed all the way back to the reset input of IC3, which is clocked on the original non-inverted clock, and IC5, which gets one of your inverted clocks.
I would be concerned about the timing relationship between the reset input and the clock input of IC3 and IC5. You need to make sure there are no setup or hold problems that could occur. You should draw a timing diagram for this signal path, adding the minimum and maximum delays of each element in the path, and see what the relationship is between the two inputs of IC3 and IC5.
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H: Help with DC Motor
I have a little yellow dc motor. I checked on google for the spec and it looks like this :
As I’m using a 5V source, I calculated that with a resistor of 50 ohms, that should do it. When I connected the motor, nothing happened.
I then connected the motor directly to the 5V supply (no resistor) and it started to work. I checked the current with only the motor and it was about 120mA.
I then thought the motor had some kind of internal resistance, so I checked it with my multimeter and measured around only 7 ohms.
What am I missing?
AI: You're missing a lot of basics missing here.
The first and most egregious is thinking that the motor doesn't affect current draw. By doing what you did, you basically assumed that the motor has no control over how much current will flow through it. This is false since it draws more current when it needs to apply more torque. The motor doesn't need a resistor to control the current going through it. It can do that on its own. This first misunderstanding here is the most important one.
Second is understanding what motor specs actually mean. That 100mA is saying that at the motor's design point, it will draw 100mA when you apply 5V directly to it. What is the motor's design point? It's the largest amount of load torque that the designer of the motor believed the motor could reasonably provide for long periods of time without overheating or being strained too hard. Since the current draw will vary with the load torque, that means it will probably draw something other than 100mA when you connect your load torque to it.
Third, the motor does have a resistance due to its windings (and hopefully a very low resistance) but there's other stuff inside the motor too. So you cannot treat a spinning motor as just its internal resistance. The only time you can is when the motor is stalled and not spinning. As soon as the motor is spinning it is also acting as a generator and there's an opposing voltage developed inside the motor, in addition to the inductance of the windings, in addition to the internal resistance.
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H: Watt output of radio station
I was wondering how many watts an AM radio station outputs, and if I can calculate the watts on a tuned antenna by this equation:
Where Win = the watts input for the antenna, Wout = the watts output for the radio station, r = distance from the transmitter, and Y = how much rf the antenna gets from that square metre (I'm expecting Y to be like 0.1% or something because it's a pretty small antenna).
AI: There is no simple answer. Working from ((old)) memory, transmitter output power ranges from 5 kW to over 50 kW. Then the antenna has a shaped radiation pattern (after all, why waste power radiating upward?); it is not a simple point source radiator that so many formulae are based on. Then you get into multi-antenna phased arrays for serious directionality.
Most radio stations have a website and a Wikipedia page. Between the two you should be able to find out the basics for stations near you: transmitter power and ERP - effective radiated power.
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H: Purpose of this IC in USB 3.0 Hub
I'm trying to design my own USB 3.0 hub based on this commercial design,
I can understand everything in this design except the usage of IC "ASM1543".
Unfortunately there is no datasheet available, however a product brief is available at https://www.asmedia.com.tw/product/85ayqa4SX4XSewIf/230yQc0rgeGp9TJ4
According to the brief this IC is a,
ASM1543 is a one Four to two differential channels mux switch with integrated Type-C
Configuration Channel Logic Circuitry, using for USB3.1 type-C mux and CC detection
application
The IC looks like to be connected between USB 3.0 hub IC and USB C port. I wish to have a USB C connection on my design. Yet I'm confused if I should use this IC. Since there is no datasheet available I prefer to avoid using it if it's not necessary.
My question is what is the purpose of this IC? Would I have proper USB C functionality without using this IC by directly connecting a USB C port to bridge IC? After all as per my understanding USB C is only a form factor. Technically I don't need any soft of circuitry to convert USB 3.0 Type A to Type C?
AI: You need the mux to handle the case of plugging in the USB-C cable in either direction. The super speed pin pairs are only wired to one side of the connector, so your circuitry must figure out which way it is plugged in and set the multiplexer accordingly.
Another mux you can use is the OnSemi NL3HS3124A https://www.onsemi.com/pub/Collateral/NL3HS3124A-D.PDF
If you don't need super speed (3.0) then you can ignore those pins and don't need the mux, but you'll only get USB2.0 data rates.
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