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H: NE5532 slew rate
datasheet: http://www.ti.com/lit/ds/symlink/ne5532.pdf
I saw in most opAmps this rate was given as V/us, for example, for LM741 it was 0.5V/us. Is this 9V/ms a typing error? Because if it is not, then this NE5532 is way slower than the LM741 which is a very ancient opAmp(I have been told so many times).
AI: It is a typo. If you look in the specs section you'll see it specified as V/μs.
Also in the features section:
High Slew Rate: 9 V/μs Typ |
H: Two different ceramic decoupling capacitors in parallel
I am trying to repair a motherboard that had a shorted ceramic capacitor (1206 package) in position B. The voltage across the pads is ~19V. I put in a 10 μF 25V-rated ceramic cap, and the motherboard could be powered on, but the cap quickly became very hot (75°C after a couple of minutes), even when the board was just plugged in, and not powered up. The smaller ceramic cap in position A is in parallel with the cap in position B, and they seem to be decoupling the power supply for the IC in position C.
Fundamentally, my question is how to puzzle out the capacitance of the shorted cap (or, alternatively, an explanation of why the 10μF cap might be inadequate). But a secondary question is why the need for two ceramics (of different capacitance) in parallel.
One idea is to just get the datasheet for the IC, and see what decoupling cap values are specified. Unfortunately, googling the markings on the IC ("EN=FG 82W") don't lead to any obvious result. Perhaps someone here is knowledgeable enough to identify the chip by its appearance.
Needless to say, I don't have access to the schematic, and the manufacturer wasn't forthcoming with the needed info.
AI: It's a common conception that smaller capacitors have a lower inductance and are therefore better at knocking out the really high frequency stuff. There are strong opinions both ways, and it comes down to the exact capacitor and how high your high frequencies are. Some reports of them having their own resonance when combined in pairs... I'm slightly sceptical.
Have you considered whether one of the larger bulk capacitors has died? If so, it would result in large currents and voltage fluctuations in the smaller ones and thus heating.
The topology you have there is a switch mode dc-dc converter. It will be operating in the 100kHz to 2MHz region and likely converting a few amps. The caps will be taking quite a chunk of this current.
The chip is probably something like allegro ARG81801. If you read the section on that's datasheet about capacitor selection you'll see you need a fairly large X7R type, they're recommending 13.8uF minimum. |
H: Hidden airwires in Eagle ...?
I have designed a PCB using Autodesk Eagle.
After I routing the PC and check for errors from Tools -> Errors, there are lot of airwires (31) like below. But, I couldn't find any airwire.
How to solve this problem?
AI: After rerunning DRC problem is solved as @Huisman mentioned.
If you just select Tools -> Errors, It shows previous errors without updating current status.
Use Tools -> DRC... and click on the Check button to update the errors. |
H: Main aspect of circuit designing process
As a electrical and electronics engineering student I still do not understand what we actually mean by designing a circuit. Are we just trying to shape signals using components or make sure specified amount of current goes through a particular element or there is somehing much more deep in this? We learn about solving circuits but not designing them for some purposes. So what is the catch here?
AI: This is a very thoughtful statement and reflects my own experience going through a EE degree.
Circuit analysis ("solving circuit problems") is the foundation on which circuit design/synthesis is built upon. You can't really build something if you can't analyze it. (eg. you can't build a car if you can't diagnose simple car problems or list the different parts inside a car).
A lot of undergraduate work is learning the fundamental building blocks and theory of modern circuits. Amplifiers, digital logic, filter design, board design, antenna design, wave propagation, etc. You might not necessarily use all of it in your career, but you at least know the core components of modern circuits and are better equipped to modify an existing design when you encounter it, or design something better.
It's unfortunate that all this information comes piecemeal at university. You don't see the big picture until you're a junior or senior. At least, that's how it was for me. Good luck in your studies-- don't feel bad if you don't see how it all comes together right now. I've been there myself. |
H: Redundant DC-DC converter (parallel)
I am building a flight computer for a sounding rocket. I want to include redundant power supplies - in other words: parallel DC-DC converters. What do I need to consider in order to do this? (is my approach doable: see schematic)
V+ on the input is connected to two 3S LIPO Batteries (also in parallel with ORing diodes).
Additionally: would you suggest using ORing FETs instead of just diodes? That would give me the possibility to disable a power supply that has "burned through" (output = input)
AI: Unless this is a regulatory requirement, you probably ought to make the converter more robust rather than doubling up. If one dies, the other is very likely to die of the same cause.
Rather than adding shut off FETs, just use a higher voltage rated part e.g. TPS5420.
With 3s you'll have~12V, which means you'll only have 5V headroom. RC stuff can be rather noisey, and switch mode converters are like electronic hammers. Your Vin should have a ceramic decoupling capacitor as well as the 100uF electrolytic, 10uF ish and I'd add a ferrite bead to damp the high frequency ringing, spiking and emissions.
Honestly, I think you can attain much better reliability with half the components... |
H: How to find replacement LED for TV backlight
My TV has a damaged LED in its backlight. The LED had started flickering like 2 weeks ago and finally the whole backlight stopped working. Nothing obviously unusual on the LED driver board, the MOSFET and the sense resistors seem to be okay, no short, body diode working, no visible burn marks.
So I want to replace the damaged LED, but by which model? With a battery (8.2V) and a 400 Ohms resistor a single LED shows 2.69V @ 15 mA. There are 22 LEDs in total (two rows with 7 LEDs and one row with 8 LEDs), all in one series circuit. Each SMD-LED has approximately 3mm by 3mm body with <=1mm height and a circular radiative region.
I have no idea what could be the maximum rated current or the color temperature. Is there any chance of finding a right one? Are SMD LEDs of TV backlights somehow standard types?
AI: If the LEDs are all in series, then the driver is a constant-current source.
I assume you have a good idea of which LED is bad. Simply connect your ammeter across it and fire it up — this will tell you directly how much current the source is producing.
Color temperature will have to be judged by eye. |
H: Can the same 3V source be used for 2 different circuits
I'm trying to combine 2 circuits on a micro:bit - one to operate a PWM motor and the other to drive a 7 segment display. I'm doing this on a Kitronik breakout board https://www.kitronik.co.uk/pdf/5601_edge_connector_breakout_board_for_the_bbc_microbit_datasheet_1_0.pdf
The 7 segment display has a 5V pin but seems to work from a 3V source provided by the micro:bit.
I don't know much about electronics so I thought I'd ask this while trying to figure out how to rearrange the components so that everything fits on the breadboard.
The two circuits work individually and both require a 3V source. There are two 3V pins on the breakout board. I've looked at various projects but I haven't found one where they're driving 2 components off the 3V source.
The question is: Would it be OK to use one pin for the PWM motor and the other for the 7 segment display or should I power one of them from a battery?
AI: Yes, you can do that.
You have to take into account that the current supplied by the power source is (more than) the combined current need of the motor and the display. Note that the motor may use initially/during starting or accelerating more current. |
H: Thevenin equivalent with non-constant voltage
Does Thevenin's Theorem cover the case where the voltage source is changing with time? As an example of such a circuit, I'd like to replace a sensor, that produces a voltage, with a Thevenin equivalent in a model. Presuming I have a model of the internal resistance of the sensor and a model of the voltage change with respect to stimulus change, am I allowed to say that by Thevenin's Theorem the equivalent circuit is a variable voltage source and a resistance in series?
Note that I am asking specifically if this is permitted under the theorem. I know that I can model my sensor this way, I'm just not sure if I can invoke Thevenin as justification.
AI: If you put it as an answer I'll accept it
Thevenin's Theorem applies to AC and DC circuits.
Oh go on then I'll add some more stuff from hyperphysics: - |
H: Is there a rule of thumb for choosing polygon width?
I am currently using the same width as the smallest wire inside the polygon, is this too small?
AI: In Eagle, the "width" parameter associated with a polygon is the width of the stroke used to fill it. A wider stroke will be less able to fill narrow gaps between other conductors. But a stroke that is too narrow will cause the resulting Gerber file to be huge because of the number of strokes required.
The width of the narrowest wire used elsewhere in your design is a good starting point, unless you have huge areas of polygon that need to be filled. |
H: Ground offset or common mode noise voltage
This is just a small doubt I would like to clear.
Suppose I have a buck regulator providing output at 5V and 1A.
Suppose I measure the output voltage at the ground pad of the output capacitor and it measures like 0.2V.
Is this 0.2V common mode noise or is it ground bounce or what is the 0.2V? The neutral (return path) is not at 0V potential but at 0.2V. So, can I call this as common mode noise voltage or ground offset/ground bounce?
AI: We use the term "Ground" for a local voltage we choose to define as 0V. There does not even have to be any current flowing thru that connection. It is just a 0V potential reference.
Since it is a local reference, the term "ground" can be many used for different reasons.
The "Protective Earth" (PE) Ground is used for AC grid reference defined by some low resistance path to conductive earth to a distribution transformer Neutral tap below into conductive soil and to copper plumbing below earth surface level.
"Floating ground" just means voltage is high impedance to protective earth ground.
There can be many reasons for one local ground to differ from another.
Your example of 0.2V offset with respect to the scope's "earth grounded" measurement may be called an offset or a ground shift due to the current *resistance=voltage between the two 0V references.
It could be 1A * 0.2 Ohms of resistance or 1uA*0.2 MOhms, as your measurement does not include resistance or shared current which is required to tell the reason for the difference. |
H: Switch that resets to 'on' after power loss
amateur Jack of all trades looking for something I'm not sure exists.
I have a mains lighting ring which means I can plug in lamps in my bedroom and turn them on at the door switch (if the lamps themselves are on).
What I would like is to be able to switch the lamps on from the doorway, off from the lamp itself, then on from the wall again (without turning the lamp back on).
I.e. go to bedroom turn the lamps on on entering the room, go to bed and turn the lamps off from bed and then the next night turn the lamps on on entering the room without having to go to the lamps themselves.
I was thinking about some sort of switch that would turn itself on when the power was lost from the wall switch so that I could flick the wall switch off and then on an again and the lamps should come back on.
The lamps should also be able to be turned off and on again overnight as needed from the lamp switches.
I don't want (nor have the skills) to run wires through the walls etc and so was hoping to do it all through a switch I could wire into the lamp wire
Thanks for any suggestions.
AI: If you don't mind using a bit of power in a relay coil while the lamp is off you can do it like this:
simulate this circuit – Schematic created using CircuitLab
Using a DPDT relay, this circuit starts with the lamp 'on'. Pressing the button activates the relay, turning the lamp off. The second pole on the relay is used to hold the lamp in the off position until power goes away...at which point the whole thing resets. |
H: Whats the metal plate on some transitors with the big hole meant for?
A lot of transitors have this metal plate on the back with a hole in the middle. Whats the purpose of that?
AI: For attaching a heatsink.
That big metal part is bonded directly to the semiconductor die inside the device, allowing it to efficiently conduct heat away from the die and to the outside of the package. The hole in it is for a screw, to mount it firmly to a heatsink. Since it's bonded to the die, the tab (as it's called) is also electrically connected to the device, usually but not always mirroring one of the functions of the pins (frequently ground). This can be important when several devices share the same heatsink.
Incidentally, this type is called a TO-220 package. There are other packages designed for heatsinks, as well; TO-247, for instance, is another particularly common one with a similar shape; it looks like this:
The TO-247 package is generally more effective at transferring heat (we engineers say it has a "lower thermal resistance") than the TO-220, but it's also slightly (as in fractions of a cent, but it still matters when you're buying millions!) more expensive to produce.
Some devices are also available in TO-220F packages, which are identical to TO-220 but with the tab insulated in plastic to avoid electrical contact to the heatsink; these look like this:
They are have much higher thermal resistance than the non-insulated kind, so you don't see them used very often.
There are other packages designed to screw onto heatsinks like this, and there are surface-mount packages with similar designs, but I think this answer is getting long enough already! Hope that helped. |
H: How does the arc extinguisher work in a miniature circuit breaker?
In a miniature circuit breaker, as shown below, the distance between open contacts is much less than the distance between metal bars in the arc extinguisher part (the gap gets progressively longer from contacts to arc extinguisher.)
So why does the arc move from the contacts to the arc extinguisher?
i.e. Why doesn't it stay between the actual contacts, where the gap is minimum and has the least resistance/breakdown-voltage?
AI: The resistance of the arc can be increased by splitting the arc into a number of smaller arcs in series. Each one of these arcs experiences the effect of lengthening and cooling. The arc may be split by introducing some conducting plates between the contacts.
The bimetallic strip trips the breaker unless during short circuit condition, the sudden rising of electric current, causes electromagnetic plunger to strike the trip lever causing immediate release of latch mechanism consequently open the circuit breaker contacts much faster, while the bimetallic strip does it more accurately at lower currents.
This video on YouTube shows roughly how it should work. The current extinguishes at the next AC zero crossing but would not work for DC inductive loads.
According to the video as well as this link the arc moves from the contacts to the Arc extinguisher, due to magnetic field (e.g. magnetized chutes) or (depending on the breaker's design and how you mount it) due to convection and rise of the hot plasma. |
H: 1-channel GPIO from industrial PC over RS232 port
I am ordering a computer based on 4x4-R1000V motherboard (Ryzen Embedded, https://www.asrockind.com/overview.asp?Model=4X4-R1000V) for an industrial application.
I need a 1-channel GPIO (0 for zero, >1V for one). The board has on-board 1 x COM(RS-232/422/485).
My question is: is it possible to drive one (any) pin on the connector as a GPIO from Linux? Is it perhaps chipset-dependent?
I spotted Possible to use a 9 Pin Serial port as “GPIO” using ioctl()? suggesting it is shoudl work, but I'd rather have a confirmation from hardware folks here.
AI: You can arbitrarily control at least the DTR and RTS lines of a RS-232 interface.
Example: https://github.com/xanthium-enterprises/RTS-DTR-Pin-Control-Linux/blob/master/serial_rts_dtr.c |
H: Equivalent circuit of a non-ideal resistor
I've come across two different equivalent circuits for a non-ideal resistor and I'd like to understand which is correct. The first is:
and the second:
These are different equivalent circuits with different frequency responses. To show this I can take the parasitic values from the second link (C=0.3pF and L=1.5nH) and simulate both equivalent circuits with SPICE. For the simulation I'm using a voltage divider configuration with the top resistor non-ideal (arbitrary value of 1kOhm) and the bottom resistor ideal (also value of 1kOhm). The divider is driven by an AC voltage input of increasing frequency. Here's the first simulated circut:
And here's the second:
I measure the ratio of Vout to Vin (where Vout is the voltage measured across the ideal, bottom resistor). I've used the same frequency range. The plot for the first circuit is:
And the plot of the second:
There's nothing unexpected about this, since the parallel capacitor in the first circuit bypasses the resistor and inductor, whereas in the second, the capacitor is in series with the inductor.
It seems to me that the second circuit must be the correct one, since otherwise I don't see the point of ever using a speedup capacitor (the parasitic parallel capacitance basically acts as one). Is my intuition correct?
Note I've seen this answer which also seems to indicate the second circuit is correct. However, the linked to Vishay article uses the first circuit, although with added inductance due to the "external connection".
AI: The difference is the parasitics that each model considers.
The first model ignores lead inductance but accounts for something like inter-winding capacitance in wirewound resistors. Interwinding capacitance is identical capacitance you get in inductors between the adjacent coils sitting next to each other and lets sufficiently high frequencies completely bypass the bulk of the inductor.
The second model ignores interwinding capacitance but accounts for lead inductance.
So really, a better (but perhaps needless complex model for most uses) is a combination of the two.
It seems to me that the second circuit must be the correct one, since otherwise I don't see the point of ever using a speedup capacitor (the parasitic parallel capacitance basically acts as one). Is my intuition correct?
Why wouldn't you need still need one? Just because the parasitic capacitance is there doesn't mean it's large enough for your purposes. |
H: THD analysis of an arbitrary expression in LTspice
Is it possible to perform .four THD analysis of an arbitrary expression in LTspice?
It works seamlessly with simple expressions like V(out) or I(Rload), but I would like to perform THD analysis on an expression like Ix(U1:VCC)+Ix(U1:VEE), which doesn't work (yields no output in the log) when I write
.tran 0 10m 0 1u
.four 1k 18 4 (Ix(U1:VCC)+Ix(U1:VEE))
Such an expression can easily be plotted, though.
AI: Mathematically I am not sure whether it is correct what you are trying to do. I suppose you should evaluate the THD of both supplies seperately. However, if you do want to do it in LTSpice, you may use some dummy resistors and an external current source.
In this example, the supply current difference is used as reference to bias another dummy resistor \$R_3\$, yielding:
\$THD_{R1}=43.3\%\$
\$THD_{R2}=47.16\%\$
\$THD_{R3}=0.03\%\$ |
H: Is it ever a good idea to rely on wire resistance instead of a proper resistor?
I implemented a breadboard prototype based on the circuit below (image created by a LED circuit calculator here).
The LEDs are SFH4556P. Voltage for the breadboard is provided by a wall wart adapter (phone charger) and supplies 5V (1A max) via a USB cable salvaged from a PC mouse (has 5 wires, two for data, shield ground, plus and minus - of which only the latter two are used). I also added a 500mA fuse to the circuit, the resistor is rated for 2 Watts.
I hooked everything up and started my measurements and immediately hit an issue. The current draw of the circuit was below 30mA meaning my LEDs were way too dimm.
I replaced the resistor with a 1.5 Ohm one (same wattage rating) and current draw rose up to around 40mA, which is still too low.
I then I removed the resistor and voila - around 50mA.
I also found the culprit - the salvaged USB cable. It seems that due to thin wires used in it, each of the two used cables cause a resistance of around 5 Ohm so it causes the circuit to already contain 10 Ohms of resistance.
How bad of an idea would it be to just leave the circuit as it is (without a resistor)? Can I calculate if the wires in the cable are capable of sustaining the circuit without any resistor in it?
The circuit is part of a DIY TrackIR project and that is also its intended usage.
AI: I suspect most of your resistance more in the 4 contacts than the wires. It's OK if they are predictable and stable over time. Copper wire is often used as a 1/8W 50mV current shunt.
If you are OK with an unregulated constant dim IR current, this will work, but if you want a little better performance, you will want to regulate current and aim ahead a bit to get a competitive edge and look ahead a bit to turn the motors to follow better. Optical path control is important.
SFH4556P Specs: 130 deg (discontinued July '19)
1.7V nom @ 100mA pulsed 2.0 V max
2.5V nom @ 450mA pulsed
3.6V nom @ 1000mA pulsed 4.6V max
Other
I hope you choose to regulate it with a low side 50mV shunt dual comparator and low Ron logic level NFET and pulse it.
Height variation must be eliminated for reflection path loss variation.
Beamwidth should match your reflection target for good edge detection.
I would use say 1~5% duty cycle pulsed at higher current using an active current limit at say >10kHz with a BPF and detect the wave precision envelope using Photo diodes with 100kHz TIA's which will be far matched than PT's and as accurate as your matched resistors. You may want to do auto calibration as well.
Above 100mA the bulk resistance dominates this diode curve.
Vf= 2.1 [Ω] * If + 1.51 V nominal pulsed voltage
Vf= 2.9 [Ω] * If + 1.7 V worst case ( process tolerances) |
H: Operational Amplifier diagram
I came across several circuit diagram which make use of op amplifier. What confused me is that in the diagram, there's a basic diagram of an amplifier followed by e.g 1/4 AD8662 (4 of those diagrams). Does that mean the amplifier has 4 channels or does it mean there are 4 physical amplifiers in the circuit?
AI: The AD866x comes in 3 varieties x=1,2,4 indicating the number of Op Amps per IC.
Therefore the "1/4 AD8662 " has an error. |
H: Running out of I2C channels on microcontroller
I am building a signal acquisition system that has a lot of sensor. These sensors communicate with the microcontroller by I2C interface. I'm running out of I2C channels on the microcontroller. Is there a way that I can add more sensor on the mcu withing necessary using I2C channels? Like by using GIOP?
AI: Generally any GPIO pins on a micro-controller can be used for an I2C master interface, but you may have to write "bit-bang" code to do this.
Another option is to use an I2C multiplexer chip. |
H: Is the zeta DC-DC converter topology scalable to 50kW / hundreds of amps?
Question
The task at hand is to build a 50kW (e.g. say 125VDC 400A out) DC-DC converter that charges a large lead-acid stack with said 400A and accepts a somewhat wide input voltage range. With that in mind, if we allow the input voltage range to be 50-260V, the converter topology will need to be zeta (or similar - buck-boost, SEPIC, Ćuk). If I instead ensure the input voltage is always higher than the output (e.g. 150-800), then the buck topology is likely the best choice (multi-phase buck, a vastly scaled up version of the 12V->Vcore part in modern PC motherboards). The zeta topology however gives me more flexibility in the specific application, so I'm wondering - could it also be scaled to such power levels?
Background
Some guys are building an electric motor testing bench, and the part that I might get involved is the powerful DC-DC converter for energy recuperation. The idea is that a stack of power lead-acid cells (forklift-duty types) would power an ESC, which commands the Motor Under Test. Another, larger motor, would act as a mechanical load to the M.U.T. That second motor, operated as a generator, would recuperate the energy back into the battery stack through a DC-DC converter, which should have programmable target output power (so that we can modulate the torque that the M.U.T. has to provide in order to keep the set RPM).
More current to the battery leads to more mechanical torque, so the M.U.T. will draw even more current to keep up, so in the end the battery will still be drained, but only with the power lost as inefficiencies in the system - not the full 50 kW.
Specifications
The generator will be a 3-phase permanent-magnet type
The M.U.T. will be up to 50kW, so realistically the DC-DC converter only needs to handle 40kW. But I'll aim for 50kW to have some margin.
The battery voltage could be as low as 24V, and as high as 120V. Of course, 24V batteries will only be used for testing low-power low-voltage motors, which are nowhere near 50 kW.
400A will be the max amps we'd want to get into the battery, regardless of its voltage. So 50kW are only with the highest battery voltages.
50kW will only need to be sustained for a few seconds, and the entire test run (with varying power levels) is less than 1 minute.
We'll only build one, or a handful, of these converters. Component cost is not a huge priority. Development cost is more relevant.
Other guys are handling the mechanical part (motors, bearings, torque measurement, shafts, ...)
Zeta topology option
I've read a Microchip app note (High-Power CC/CV Battery Charger Using an Inverse
SEPIC (Zeta) Topology) which presents a 100W charger in the same general direction. The central part of the converter is this:
I was thinking that maybe, maybe, if I uprate the power components for voltage and current, and provide many more parallel copies of C1,C7,C8, Q1, Q2, the circuit can be scaled to tens of kW. Then it would give me more flexibility, as this way I don't need to worry about the corner cases that the other option has.
Buck topology option
Instead I can push the guys to select a motor with a very low Kv for the generator (or use a transformer after it), so that the input voltage to the DC-DC converter is always higher than the desired output. This either calls for a motor with ridiculously low Kv, or a 3-phase transformer, if I want to cover the worst possible case: battery voltage 120V, test at low RPM. The transformer options is likely the best, if also provided with bypass contactors to handle the low battery voltage case as well (to avoid ridiculously large input:output voltage ratios).
Other thoughts
Of course the option to lose the energy from the generator in a resistive grid is possible, but is viewed as inefficient and will cost more to provide the necessary cooling
probably a permanent-magnet generator is not the best idea. Come to think of it, using an alternator is maybe a fruitful direction, I'm not sure why the guys are fixated on PM motors, maybe I'll be able to persuade them otherwise.
AI: Is the (insert name) DC-DC converter topology scalable to (insert impressive power level)?
Yes. OK, next question.
Oh, you meant reasonably scalable, didn't you?
The problem with the Ćuk, SEPIC & zeta converters are that they carry considerable power in the filter capacitors, and they need multiple inductors. So they may not scale as well as other options.
A 4-switch buck-boost should scale better than the above options, because you'll only need one inductor and one set of filter caps, at the expense of needing four switches.
I think if I were you I'd explore a multi-phase 4-switch (per bank) buck boost. I know that if I were the one doing this there'd be a microcontroller controlling it, but whether you do that or seek out some controller chips that'll do the job for you is a strategic decision that depends on the team you have available. |
H: Bidirectional 4 cell Li-Ion battery pack
I went through the following application note from microchip that deals with designing a bidirectional power supply for charging a battery pack (pages 16/30 and 17/30).
The link: https://www.microchip.com/Developmenttools/ProductDetails/MCP1630RD-DDBK3
The application note says that when a power supply of 6.5V to 7V presents from the right side (J2 in the schematic), the circuit works as a boost converter to charge the battery pack.
Let's start from this point. To charge an Li-Ion battery pack, we need two loops (Constant current loop and a constant voltage loop ). At this configuration, we have only the current loop composed of U4:A and its surrounding components, In my behalf, I don't think that the voltage loop composed of U3:B will take effect in this configuration because it is placed at the input side of the boost configuration. So, where is the voltage loop when the circuit is in the boost configuration ?
When the circuit is concidered from left to right, the battery pack is concidered to be the input voltage to the rest of the circuit which is now working as a voltage mode buck converter (controlled by U3:B that is now at the output of the circuit). And the current flowing through the shunt resistors R4 and R5 is now negative, so how does the current loop react to this current knowing that the OPAMP is fed only with a positive 5V ?
AI: This design uses PIN RA0 to measure Vbatt and sets Ibatt for the charge current in a continuous loop for each of the 4 modes.
Idle, Pre-charge, CC, CV, Idle Cutoff < 100mA |
H: Why is feeder network so long and other questions?
I have an mBed Lora 915Mhz shield I attached to a Raspberry Pi. I had some questions about the feeder network. In the attached schematic. Why isn't a simple cap/inductor pair sufficient for an impedance match in this case? Also, they use a capacitor and inductor in series. Is this a resonant band pass filter? Then why is the resonant frequency 1.4Ghz (22pF/5.6nH) and not 915Mhz? I checked the BOM and half the components are DNP. I attached a spice simulation with the actual component values.
Here is the simulation with the resistor removed:
AI: They needed a 7th order filter to achieve > 50dB /octave LPF, perhaps with linear phase.
Each pole is staggered to achieve the desired Q and phase response overall and not simply a 2nd order resonant BPF to achieve a flat group delay in the area of interest.
You can see each pole by removing the 50R load. These will be spaced over the phase control region possibly from fo/2 to 3fo for this filter. |
H: Floating Power Supplies
Referring to this post, is it possible to float power supplies by simply not connecting the ground wire?
AI: The safety ground is used for other purposes as well as keeping the frame at 0V.
1) attenuate bidirectional noise thru chokes and Y caps to PE Gnd.
2) reduce accumulated insulated charge for high power leakage currents and accumulated voltage to reduce stress for breakdown voltage.
The other question referred to isolating the secondary DC from PE. |
H: What's the purpose of SMA antenna connector grounding? Can I just use a copper antenna with no grounding?
I'm looking at a schematic which includes an SMA antenna connector. I'm wondering why this connector needs grounding and whether a simple copper wire without grounding can be used instead
Would I be able to use an internal antenna like this one, with no grounding?
AI: Every antenna feed point requires two nets. If it's an unbalanced feed, the second net is the ground return.
By connecting the ground to the SMA connector, the board designer gives you the flexibility to use different antenna implementations. You may have a cable and then a remote antenna, or you may have an antenna right at the connector.
If you have a monopole antenna, you need to have a reference ground, which could be implemented using the board's ground plane. If you're simply going to connect a monopole antenna right at the SMA connector (no cable), then you may be right and the ground connection on the SMA side may not be strictly necessary, since the board ground will be part of the antenna. However, I see no penalty in connecting the SMA ground even in this case. You may actually be saving yourself from some trouble: the antenna you're going to use may have been designed taking the length on the SMA ground into consideration, or there may be matching components connected to the ground inside the antenna. |
H: Is it good practice to use an ESP32 DevKit in a product?
I am developing a small electronic product which, if all works fine, I think about producing and selling in small numbers.
Currently I use an ESP32 DevKit for the development. That is the ESP32 development board with "everything" included like power regulator, USB connection, etc.
https://www.aliexpress.com/item/4000093185394.html
The schematic for that DevKit is published here https://www.espressif.com/en/support/download/documents
In theory, when I want to build my own product I could:
A) Use all or most of the PCB design of that DevKit board and add the few extra components which I need all in one PCB.
B) Or I could design my own PCB and solder the DevKit board on my PCB which would include only a few extra components.
B is much easier for me because the DevKit boards are ready and cheap available.
Is it good practice to do that? Or are there good reasons to put everything on one PCB including the parts which are now on the ESP32 DevKit board?
AI: I use dev boards because they save me time, are known to work, should have met the required EMC standards, are easier to install and maintain, and if I drop dead the person taking over my project won't have too much trouble figuring it out.
If you make your own rf PCB, or use a part of the dev board modified in any way that could affect EMC compliance then you will probably have to get it tested to be legal, which would be prohibitively expensive for a small production run. All this is avoided if you use a pre-approved board.
Conspiracy theories aside, buying from AliExpress or eBay is a bit risky because you don't know if the device is compliant, even if it looks identical to one that does. If you are worried about it then buy from a reputable company like Sparkfun or Digikey. If that still doesn't assuage your fears then sell the product without the module and let the customers source it themselves.
Also consider the application - might it put you at the wrong end of a lawsuit if something goes wrong? If it's a 'hobby' project and you aren't making a lot of money out of it then you probably have nothing to worry about. Millions of these EPS32 modules are being used throughout the World, so if they were a problem we probably would have heard about it. But you have to evaluate the risk. If there's even a small possibility that your product could cause harm then it might be best not to sell it. |
H: Series current calculations
simulate this circuit – Schematic created using CircuitLab
My question is about elementary series current calculations. Above you see 3 circuits. All circuits have a Vin of 24v connected to either 1 or 2 heating elements (Z1 and Z2).
When calculating the current in circuit 1 I apply the formula I = P_Z1/U_Z1 = 2W/12V = 0.17A.
When calculating the current in circuit 2 I apply the formula I = P_Z2/U_Z2, 1W/12V = 0.08A.
When calculating the current in circuit 3 I apply the formula I = P_tot/Vin, 3W/24V = 0.125A.
OR
I can calculate I in circuit 3 by first calculating R_tot = R_Z1 + R_Z2 then using I= Vin/R_tot.
R_1 = U_z1²/P_z1 = 12²/2 =24 Ohm.
R_2 = U_z2²/P_z2 = 12²/1 = 144 Ohm.
So R_tot= 168 Ohm. with I = 24/168= 0.14A.
Question 1: How come I get 2 different answers when applying the 2 different ways to calculate I? Where am I going wrong here? AND which answer is the correct one?
Question 2: In circuit 1 (and 2) I connected a 12V heating element to a 24V power supply and calculated I throug 2W/12v = 0.17A. I get the feeling that this is wrong because the source voltage is not taken into acocunt here, where am I going wrong here?
Question 3: what does it practically mean when connecting a 12V/2W element to a 24V source?
Question 4: In circuit 3 we have I = 0.14A. this means for Z1 (and Z2) that P has changed? P_z = 12V*0.14A= 1.68W, but when we started it was 2W. Where Am I going wrong here?
AI: Question 1: How come I get 2 different answers when applying the 2 different ways to calculate I? Where am I going wrong here?
When using I = P_Z1/U_Z1, you assume to know the power dissipated by the resistor. But you don't know this yet. Like muyustan comments, 2W is the rating of the resistor, not the power dissipated at the moment.
The power dissipated is a dependent variable. The known independent variables in your circuit are the resistance and the applied voltage.
Question 2: In circuit 1 (and 2) I connected a 12V heating element to a 24V power supply and calculated I throug 2W/12v = 0.17A. I get the feeling that this is wrong because the source voltage is not taken into acocunt here, where am I going wrong here?
Although you take the source voltage into account (2W/12v = 0.17A), you cannot assume the power dissipation. See previous comment.
Question 3: what does it practically mean when connecting a 12V/2W element to a 24V source?
First: It means you use a component beyond its rated values. You should not connect a 12V rated component to a 24V power source.
Next, if the component survives being subjected to a voltage higher than the rated voltage, it doesn't mean it will behave the same as when being used within the rated operating conditions.
Question 4: In circuit 3 we have I = 0.14A. this means for Z1 (and Z2) that P has changed? P_z = 12V*0.14A= 1.68W, but when we started it was 2W. Where Am I going wrong here?
As written above, the power dissipation can change.
When "12V/2W" is the only information you have for that resistor, you can assume the resistors has a power dissipation of 2W at 12V. This means its resistance is \$R=U^2/P = (12V)^2/2W = 72 \Omega \$. Likewise the 12V/1W resistor has a resistance of \$ 144 \Omega \$.
Assuming the resistance does not change with applied voltage, even when it is beyond its rating, you can find the current through the resistors is
$$ I = 24V / (Z_1+Z_2) = 24V / 216 \Omega = 0.11 A$$
The voltage across Z_1 will be \$ 0.11A*72 \Omega = 8V\$
The voltage across Z_2 will be \$ 0.11A*144 \Omega = 16V\$ which is beyond its voltage rating.
The power dissipated by Z_1 will be \$ (0.11A)^2*72 \Omega = 0.88W\$
The voltage across Z_2 will be \$ (0.11A)^2*144 \Omega = 1.76 W\$ which is beyond its power rating |
H: Negative voltage from multi-tap transformer
If we have a multi-tap transformer like this:
Is it possible to use two of the taps to generate negative voltage and use other taps for positive voltage?
AI: Is it possible to use two of the taps to generate negative voltage and use other taps for positive voltage?
Not that way.
Figure 1. The common GND on the two rectifier outputs places a short-circuit on the transformer via two rectifier diodes.
simulate this circuit – Schematic created using CircuitLab
Figure 2. Two standard ways to do it. (a) Half-wave rectification. (b) Bridge rectification. |
H: Switching between taps of transformer
What's the difference between this two methods of "tap switching"? do they work the same?
simulate this circuit – Schematic created using CircuitLab
AI: No, the circuits are not the same.
I removed the "fluff" (the rectifiers are irrelevant) and added labels.
simulate this circuit – Schematic created using CircuitLab
The top circuit can output 4 different voltages if the voltages across the separate windings are all different.
The bottom circuit can only output 3 different voltages, when S2b is in the "C" position, switch S2a does nothing. |
H: Should I apply soldermask over SMT thermal pads?
On page 8 and 9 of the following datasheet, there's a description of thermal pads for this MOSFET: https://www.vishay.com/docs/63302/si2342ds.pdf
What I am wondering is: I will design the footprint on the copper layer to have the shape of the footprint on page 8, with the "copper spreading". This increases the heat transfer, so better cooling.
Should I also leave holes as big as that in the soldermask? Or can I cover up the thermal pads so that the footprint with the soldermask will look like the one on page 9 (standard SOT-23). This way during reflow, the parts will stay nicely in place.
AI: As I read the datasheet, it is expected that there will be soldermask over the thermal pad.
This paragraph from the datasheet seems to be saying that you should only have holes in the solder mask for the pins of the transistor:
Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drainpins, the solder mask generation occurs automatically.
So, your idea of having solder mask over the whole thing with holes just for the transistor pins is correct. |
H: Looking for documentation about power electronics
I'm looking documentation about this circuit. But I'm not able to find about it because I do not know the word associated to this circuit.
I would like to have a document which explains all the different steps in function of the time of the circuit.
Also, if you have a book to recommend me about power electronics, it would be a pleasure to hear its name.
AI: This topology is known as an Asymmetric bridge. It is useful when you only need unidirectional current but also must manage a free-wheel path. The classic use of this is in Switch-Reluctance drives or induction heating
3KW SR motor gate driver and simulation questions
Switched reluctance motor inverter
http://pu.edu.pk/images/journal/iqtm/PDF-FILES/05-Comparative%20Evaluation%20of%20Asymmetric%20Half%20Bridge-Yasir%20Saleem_V_VIII_IssueII_Decem2012.pdf
You need to turn both switches on to build up current. You then have two additional states available to you.
https://www.microsemi.com/document-portal/doc_download/7337-aptc60dhm24t3g-datasheet
Turn both switches off. This exposes the coil to a negative voltage loop which will cause the current to decay quickly
Turn bottom switch off. This exposes the coil to a zero voltage loop as the current freewheel via to the top diode and the top switch. This reduces current ripple.
Typically the zero-volt loop method is used during an SR sector then switching to negative to decay for next phase |
H: Lead acid battery charging too fast
I have an ebike. I usually charge my lead acid battery for 6 hours until the charger shows green light, and I can travel for 30 Km or so. But since last week, green light indicating full charge appears after only 2.30h, and I can only travel 10 Km max, on low speed. If I try to charge it with another charger, same thing happens. I tried everything, but I can't get the bike to charge after 2.30h. Does anyone know what could be the problem?
AI: It’s time for a new battery. At least one cell in yours has lost capacity, probably the result of a broken plate or internal connection. The vibration experienced in E-vehicle applications is very hard on batteries.
There's no reasonable way to repair it, so recycle it and get a new one. |
H: Trying to detect if a battery is charged
So I am doing a project as part of which I have rechargeable 5V battery and a charging source. I want to detect if the battery is charged and if it is then all the current should flow to a dummy load but if it isn't then all the current should flow to the battery. I many people I have asked said I should use a voltage comparator however I don't quite understand how.
Can you explain/ provide an example diagram of how everything should be connected or if there are other methods which can be used?
AI: This is worryingly like a "design this for me" question. Assuming it is not and you know what your are doing, I shall attempt to assist.
So you say the battery is a 5V battery. Without knowing its charge level vs voltage graph, there's not much I can say about how to read the charge state other than: the voltage will vary with charge. If you measure this voltage you will be able to tell the charge state of the battery. This is assuming that you are drawing only a low current from the battery, as internal resistance will reduce the voltage of the battery at higher current draw.
You can measure the voltage with an op-amp, the output of which can either got into a comparator (for a "dumb" on-off reading) or into an analogue to digital converter and micro-controller of some sort which can then do some intelligent control. Assuming you go for a micro-controller for the more intelligent and versitile option, you can then turn on/off transistors with it, if doing it the method with discreet components, then you'll need to wire in logic as required to shunt the current around.
As for getting your charge source, I'm assuming you have a dedicated module already set up for this, or at least know how to design one yourself, as charging batteries can be tricky. Without knowing the specifics of your application and battery pack, there's not much assistance I can give. |
H: How to overcome current drop in circuit with high inductance value?
I have a very simple circuit that uses a switch to switch between a resistive loop and inductive + resistive loop.
Whenever I switch from resistive load to inductive load, the current of the source current measured over the R2 drops to almost 19A.
How can I make the current stay stable even when I switch the switch?
The current drop happens when I turn off the switch as shown on picture below:
AI: How can I make the current stay stable even when I switch the switch?
Try removing the diode across the current source.
If you need the diode then please don't expect miracles with inductors - they fight against a changing current and, when the switch is activated, the inductor current will have fallen to zero amps thus, when opening the switch (to allow current to try and pass through the inductor) you can't expect all the 100 amps to instantly pass through it - the inductor will resist and that is what you see.
This is a fundamental property of inductor - they produce a counter emf proportional to the rate of change of current. This means if you expect an infinitely fast change in current, the inductor produces an infinitely high back emf to counter that change. |
H: pull-ups between logic gates
I'm trying to understand why, on this circuit bit, they used pull-ups resistors between logic ICs of the 74LS and CD4000 families. Specifically I'm talking about resistor array RM1 and R1. All the ICs on this circuit are supplied by 5V.
As far as I know, pull-ups are needed when you have open-collector/gate outputs/input, and not for TTL and CMOS devices, am I wrong?
AI: This is a case of interface between logic families (from LS-TTL -to- CMOS). Although both are powered from +5v supply, logic levels differ:
Logic low output for the 74LS93 is compatible with logic low input for CMOS 4002. No problem here.
Logic high output of 74LS93 is marginal compared to logic high input for CMOS 4002.
This is a matter of noise immunity: pull-up resistors ensure that a logic high is closer to Vcc of +5V rather than a \$V_{be}\$ lower than +5V.
Worst case \$V_{OH}\$ for 74LS93 is 2.7V
Admittedly, that's with Vcc at minimum 4.75V, and loaded with maximum current (0.4mA). When lightly loaded with high-impedance CMOS, far less static current flows.
Minimum acceptable \$V_{IH}\$ of 4002 is 3.5V
Clearly, the 74LS93 needs some extra help to pull up to 3.5V. 10k pull-up resistors do the job. Even so, at higher speeds, capacitance may slow the rising edge. |
H: pausing d flip flop output
I want to make a digital timer that counts to 99 minutes 59 seconds the problem is that i want to use 4 digit 7 segment display so i have to oscillate the input of the bcd to 7 segment display between the four digits so i have to control the decade counter 74160 so i use mux to choose which counter to work and counter 5 oscillate switches the mux quickly . How to control f/f wheather to output or to keep the output for itself for now till it`s turn?
AI: To do this with minimal changes to your design, consider using a tri-state buffers at the output of each counter.
This is a buffer with an ENable pin. When the enable pin is asserted, the buffer produces an output like normal. When the enable pin is de-asserted, the buffer puts its outputs in high-impedance (or high-Z) state. This not only means there's no output, it also means the output won't interfere with other gates trying to produce outputs onto the same wires.
For example, consider 74LS244. This has two sets of 4 tri-state buffers, with each set of 4 controlled by a common enable pin. Note the enable pin is active-low, so "asserted" means a low voltage and "de-asserted" means a high voltage. You'd need two of these to complete your design. |
H: Phone to TTL output?
I am looking for a way to get my phone to output a TTL level signal, up to about 1200 baud. Any suggestions?
The only thing I can think of is using an audio output with a square wave signal, and then amplifying it. Is that workable? Anything better?
AI: Use a non-linear amplifier to get TTL levels, in the form of a comparator with it's threshold set a the mid-point of the audio waveform level. Possible devices might include an LM360.
This won't work for frequencies near zero, as audio output will likely stay close to the threshold and near the noise floor, producing garbage. But will work for a high enough minimum toggle rate.
If you need to get a TTL output toggling at any frequencies from 0 to 1200 Hz, then another strategy is to output a much higher frequency audio signal (say 12 kHz) for the duration of your TTL high, and use a bandpass filter on the output to filter and detect this tone (diode + cap, similar to a AM crystal radio detector) before the TTL output comparator (with its threshold set above the zero-output noise floor and below the bandpass filter ripple).
If you output a lower frequency, say 2400 Hz, to indicate TTL high, another possibility is to use an Arduino chip, audio to ADC input, and measure the time between threshold crossing to detect the tone frequency needed to output a high level on another IO pin. But this lower audio frequency will limit the minimum duration of your TTL pulse transitions (and quantize them in time).
A higher audio frequency will also quantize the TTL output in time, but at a higher time resolution. So an appropriate USB audio DAC might allow very high audio signaling frequencies by supporting a sample rate of 96k or 192k. This would likely provide even better time resolution for your TTL output than signaling via USB (OTG) serial or ethernet packets, as a streaming real time audio driver on a mobile device (RemoteIO on iOS) has much more deterministic latency than either the USB or the network stack drivers on the mobile OS. |
H: Perfomance of PCIe expander?
A PCIe expander allows to have more PCIe slots from a single one available in the computer.
How exactly is the performance affected? Are the output slots in parallel, and therefore the bandwidth decreases by a factor of 3?
AI: There's different things that can be called expanders:
Lane bifurcators
PCIe switch-based backplanes
Lane bifurcators
A PCIe socket can have more than 1 PCIe lane – for example, x4 and x16 lane slots are pretty common. If the root complex and all PCIe switches in between support it, these lanes can either be used for only one link, giving more bandwidth, or be split among different PCIe devices.
If that is supported, then a basically passive card could be used to e.g. connect four x1 sockets to a x4 socket. Again, this is a special case and needs support from the hardware. That technique is called "lane bifurcation".
Obviously, that means the overall bandwidth is split according to the number of lanes that the end devices get.
Full switch-based backplane
PCIe is a point-to-point link system.
Hence, just like in Ethernet, you can have switches that add more links to a single link. Of course, the devices sharing that link can not magically get a higher sum bandwidth than that original link offered, but the bandwidth isn't statically alotted – just as in ethernet, each device will get as much bandwidth as it wants until the bottleneck gets congested. |
H: Why is propagation delay a function of supply voltage?
In the context of FPGAs, it was brought to my attention today that propagation delay varies with supply voltage. When I asked why this was so, one of the FPGA designers stated that a logic gate is essentially an amplifier (which I do agree with) and that more supply voltage means more gain (which I'm not so sure about) and more gain means faster propagation.
I didn't really buy this argument. All else being equal, simply increasing the supply voltage should not increase the small-signal gain, which is out of scope anyways since the 'amplifier' is being over-driven with digital signals.
The only thing I can think of is that a larger supply voltage suggests a higher absolute output voltage slew rate and since the FET threshold voltages don't change (I think), the thresholds are hit more quickly, leading to less delay.
Is my reasoning correct, or is there something else going on here?
AI: I didn't really buy this argument. All else being equal, simply increasing the supply voltage should not increase the small-signal gain, which is out of scope anyways since the 'amplifier' is being over-driven with digital signals.
It really does. Don't think in terms of voltage gain, think in terms of output current:
When you increase the supply voltage, the gate capacitance of a FET is charged quicker, because exponentially more current flows through the involved semiconductor junctions.
That leads to a quasi linear increase of maximum switching speed in modern CMOS ICs. Sadly, you buy that with a raising energy dissipation per switching (=heat!), and thus typically in a superquadratically effort needed to keep the IC at acceptable temperatures. That's one of the main reasons (if not the main reason) there's little complex logic clocked at 10 GHz. |
H: why use of 1uf capacitors in max232 ic, why does not use 10uf capacitor in max232 ic.?
I have use 1uf capacitor in max232 circuit
c1=1uf (pin 1 and 3)
c2=1uf (pin 4 and 5)
c3=1uf (pin 2 and vcc)
c4=1uf (pin 6 and gnd)
c5=0.1uf (pin vcc and gnd)
why this type of values used?
AI: Because if datasheet says 1uF for the charge pump then that is the best value it works with the given frequency of the charge pump. Higher capacitance charges more slowly so the charge pump would need slower frequency or it would take longer for the pumped voltage to settle. Lower capacitances would charge too fast and can not transfer enough charge per clock cycle, so the voltage would droop under load. There is a difference between MAX232 and MAX232A, the former needs 1uF capacitors while the latter only needs 100nF capacitors. |
H: How to change the highlight color in Eagle when using the show command?
I want to use "show GND" and have everything highlighted show up purple. How do I achieve this?
AI: Select a track by clicking on it.
Go to "options", choose "set" and there you should find a slider that can be used to set the brightness of anything that is highlighted.
You can also (within that area) select "high contrast" and adjust the slider to give different colours. You can choose purple. |
H: Why use 100E resistor in max232 ic in serial pins 13 and 14?
serial pin 13(RxD) use 100E -pin 13 to male connector pin 2(RxD),
serial pin 14(TxD) use 100E -pin 14 to male connector pin 3(TxD)
Why 100E used?
I have attached image and mention clearly for your reference...
AI: In general, we can't know a specific reason why someone has put them there, but we can guess. They might be there to help the chip ESD protection to cope with even larger surges than without them. They might be there to help to decrease EMI from conducting and radiating from wires. They might be there to slow down signal edges. They might provide some protection for overvoltage situations. They might be there just because this is copied from somewhere else, so there is really no reason. |
H: Resolution of potentiometer
I'm a bit confused about the resolution of a potentiometer as a voltage divider.
What's the relation between voltage and number of turns in a pot?
For example In below circuit:
What the resolution of the multi-turn potentiometer would be if we increase/decrease the 5V?
Assuming it's a 10 turn pot, to calculate each turn we should divide that 5V to 10,000?
Does adding gain to the op amp will reduce the resolution of the pot even more? is there anyway to compensate for that?
simulate this circuit – Schematic created using CircuitLab
AI: The resolution or adjustability is a result of the pot geometry, dimensions element materials and construction and wiper design, the number of turns is not directly related - for example a trimpot with 20+ turns may have no better resolution or adjustability than a single-turn trimpot with similar electrical element length.
Wirewound pots have a resolution because of the windings of resistance wire. Cermet, conductive plastic, carbon, and hybrid types (such as conductive plastic over wirewound) have “infinite resolution” so substitute the “adjustability” spec from the datasheet. For example, the 3296 series of 25 turn trimpots claims 0.01% adjustability as a voltage divider, a fairly optimistic number.
In the case of wire wound pots, the resolution is also dependent on the element resistance value. Take a typical 10-turn panel potentiometer, the inexpensive plastic-housed 3590 series from Bourns:
The resolution (as a voltage divider) is given as a percentage. So a 10K pot will have a resolution of 0.02%, regardless of the voltage across it (within reason, at very low or high voltages other effects will manifest).
Similarly, with gain, the percentage will be the same, but it will represent more or less voltage depending on the value of gain employed.
The resolution of the 10-turn pot of this design is particularly good because the element is physically very long- it’s helical in geometry. Trimpots may have a mechanical reduction gearing and a short element length, so easy to set but not much, if any, improvement in resolution/adjustability over a single turn pot with the same element length.
If you want to improve resolution with a given pot, you can reduce the range of adjustment with external resistors (temperature effects must be considered more carefully). If you restrict the adjustment range to, say, 9.5V to 10.5V then you have resolution of +/-0.02% of 1V rather than 10V, so you should be able to set it to within +/-200uV in 10V. How long it stays there is another question..
Just as my personal rule of thumb, if better than ~0.1% stability of a precision pot setting or ~1% stability on a non-precision pot is required (these are not hard and fixed numbers but also relate to expected re-calibration intervals (if any), how extreme the conditions are etc.), it's better to re-think the design and add ranges or otherwise reduce the sensitivity to the pot setting. Nowadays we can often replace calibration and setting pots with digital methods. |
H: How to block / lessen EM-radiation/signal from home Wi-Fi router?
1) What materials and how can I use to completely block radiation from two antennas of my WiFi router?
2) What materials and how can I lessen by 20-50% radiation/signal from the third router antenna?
3) Is there a simple (household / amateur) way to verify intensity of router radiation - like neon bulb lighting close to electricity wires?
a) If I just wrap the antenna with metallized foil - would it work for sure?
b) How is it the usual way - those visible antennas are the only transmitters or there are additional transmitters (emitters) inside the casing?
I have a Wi-Fi router with three antennas. It says 2.4 GHz / 5 GHz. 2.4 is always blinking and 5 is always on (but not blinking).
I am concerned with electromagetic radiation and I would like to decreese it (the router shall still be switched on and shall continue to provide Wi-final signal).
Currently I do not have access to router menu.
P.S. This is not a question (or discussion) of "I am afraid of EM-radiation" - I am not.
I am asking a specific technical question and expect the answer to be a specific technical one.
I conjecture that just wrapping foil around antenna can actually increase (not decrease) signal. I cannot make 100% metal cage around.
Here is Tom's Guide on foil reflector (different topic, but related).
AI: Unscrew each antenna. See what type of connector they use (most likely a SMA connector). If the router doesn't have removable antennas, you can also try taking the case off - perhaps there will be connectors inside the case, or perhaps you can remove them by force. I am not responsible for damage to your router.
1) What materials and how can I use to completely block radiation from two antennas of my WiFi router?
Most likely, you can simply remove the antenna and the router will not be able to radiate energy. The router will still try to transmit; the transmitted power will be reflected back into the transmitter circuit. There is a remote possibility that this could damage the transmitter (however this is mostly a problem for high-power transmitters, like radio station transmitters, which a Wi-Fi router is not).
If you want a slightly more robust solution, you can connect a dummy load to the antenna port. This is a resistor with the same impedance as the antenna. Antennas are typically 50Ω impedance (source) so you will need a 50Ω dummy load with the right connector. The dummy load "looks like" an antenna electrically, but it doesn't actually radiate or receive any signal.
2) What materials and how can I lessen by 20-50% radiation/signal from the third router antenna?
The proper way to do this would be with an attenuator, which is like a dummy load but with two connectors. One side plugs into the router and the other side plugs into the antenna.
This is the electrical engineering way to reduce the power of an RF signal.
3) Is there a simple (household / amateur) way to verify intensity of router radiation - like neon bulb lighting close to electricity wires?
You are looking for a field strength meter. Shopping recommendations are off-topic for this site.
a) If I just wrap the antenna with metallized foil - would it work for sure?
Not necessarily, but you could try it. I would imagine that since your foil wrapping is antenna-shaped, and very close to the antenna, the signal might couple to your foil wrapping and then be radiated by the foil. However, I am not sure.
If you connect the foil to the ground on the antenna connector, then you've made an approximation of coax cable, which does provide shielding. But why not just disconnect the antenna?
b) How is it the usual way - those visible antennas are the only transmitters or there are additional transmitters (emitters) inside the casing?
Generally, for a Wi-Fi router, the only antennas are the ones you can see.
Note: the word "transmitter" usually refers to the circuit that produces the radio signal, or the whole device, not just the antenna. Of course the circuit is inside the casing. |
H: Is Inductor peak current same as the Inductor Inrush current
I am using a DC-DC converter which is having an inductor rating of 68uH and 2.05A.
Output Voltage of dc-dc is 23V and output current max is 300mA
Schematic :
I am using a current probe and measuring the current through the inductor.
When I turn ON the DC-DC converter, the Inductor draws 10.75A. Should I consider this as Inductor Inrush current or peak current? If I consider this as Inrush current, as I do this during start-up of the converter, then how to measure the peak current of the inductor?
And since the inductor is rated for only 2.05A, won't this high current damage the component even though it is for a short duration?
Current probe is set as 0.1V/A in the probe and 0.1V/A in the scope as well.
Inductor Peak current (below is the waveform captured during the start-up of the DC-DC converter):
Inductor RMS Current (below is the waveform captured during normal running condition of the DC-DC Converter) :
AI: I assume this is a boost converter since inrush of that magnitude would be unusual in a buck or buck-boost converter. (Though you leave out a lot of information that would be helpful, like topology and schematic.)
A boost converter has a direct path from the input through the inductor and diode or synchronous rectifier to the output caps. So there is typically a large inrush current.
Technically, the peak of the inrush current is by definition the "peak" inductor current, but that's not what we usually mean in a DC-DC converter when we use the term "peak current". So you can consider that the inrush current. The peak current is the maximum current at the top of the inductor current waveform when the converter is in normal operation. It's what is meant for example by "peak current mode" control. Typical you put a short wire in series with an inductor and use a current probe to measure the inductor peak current.
When you exceed the saturation current of the inductor, the inductance drops to a very low level and you just have the parasitic resistance (L, ESR) and the diode's dynamic impedance between Vin and the output caps. So the inrush can be very high as you note.
It is short duration, and it's not likely to damage the inductor, but it could damage the output rectifier. You have to check each component including the inductor to see if it can withstand the inrush.
One trick you can use is to bypass the inductor and diode with a rectifier rated for high pulse currents directly from the input to the output. Then all the inrush current passes through the diode, which is then reverse biased when the converter starts up.
Here's an example:
EDIT after the schematic was added to the post:
It looks like you're using an SS34 diode, rated for 100A peak half sine current. So no problem there. I can't quite make out the inductor part number (it's also good form to add links to your component datasheets in your question) but it's unlikely that such a short duration inrush would damage an inductor. If there's any chance that the converter would start and the FET would turn on during the peak inrush you will have to check the FET SOA to see if it can handle it as well. The datasheet for the controller doesn't specify the startup characteristics very well and I can't read the FET part number so it's impossible to know for sure.
Still, it seems like you have no need for a bypass diode in your application. It will probably be fine but without doing the proper due diligence I can't say for sure. |
H: System verilog: check if logic signal changes at posedge
I'm relatively new to SV. I'm building a testbench in which I want to monitor a signal and take some action if it value changes @ clock posedge.
I’m looking for a compact way to this (I.e. not using a register).
logic [31:0] var_signal
Inizialmente
begin
for(i=0; i<max_cles; i++) begin
@(posedge clk_i);
//check if var_signal changed and do something
end
end
I searched the web and found threads on assertions but it is not what I want to do here.
Any hints?
AI: I want to monitor a signal and take some action if it value changes @ clock posedge.
I know you don't want to use a register but it can be test-bench register. You have to make a copy at the clock edge and compare it against the old value:
logic [31:0] new_var_signal
always @(posedge clk_i)
new_var_signal <= var_signal;
assign signal_changed_at_clock_edge = (new_var_signal != var_signal) ? 1 : 0;
There is a caveat: if the signal can also become 'z' or 'x' you should use:
assign signal_changed_at_clock_edge = (new_var_signal !== var_signal) ? 1 : 0;
Note that you are in an ideal simulation environment and there is no such moment as @(posedge.. That moment is infinitely short.
In a real digital design the signal has to be stable around the clock edge. The time before the clock edge is called the setup time and the time after is called the hold time. |
H: Can I measure current with a 0.1Ω shunt?
I am currently trying to make a game console out of a Raspberry Pi 4 and a hard drive, with an Arduino to control boot, shutdown or reset, plus temperature.
I got a degree in engineering in electronics and embedded systems, however I could not practice my skills for a while (world is governed by code today) and would like to implement some features, such as current monitoring. As far as I know the best way to do that in my case is through a shunt on the 5V line, measure the voltage difference at the sides with an ADC and estimate it.
Would a resistor of 0.1Ω be ok for this? Such as one like this:
I found some limited to 2W, if we consider a current of 3A maximum, that's a voltage drop of 0.3V and power dissipated of 0.9W, I can compensate for the voltage drop so this is fine.
My calculation gives me a step of 5mV with the 10 bits ADC of Arduino, which would mean I can measure current with a 50mA resolution; not very precise but I just need to know if I am in the 200mA or 2A range while using it.
This project is just for fun and practicing, not something serious, so precision or safety is not a big concern.
AI: You sure can. Normally you amplify the voltage before measuring it though. The easiest location to measure is to put the resistor in the ground path so you can process the voltage across the resistor easily, but then this disrupts the ground connection which is bad. Putting it on the high-side means you need a diff-amp to produce a ground referenced signal. |
H: Measuring high voltage with low power op amp
I want to use AD623 instrumentation op amp to measure current at high side of the circuit:
simulate this circuit – Schematic created using CircuitLab
I was thinking to use a voltage divider like above diagram to drop the voltage to AD623 input limit range. but then I came across this article which describes how one can measure high voltages with low power op amps:
Won’t 150V input burn up the op amp? Not if the V1 voltage is used to
generate the positive powersupply (Vcc_H) for the first op amp, OP_A.
And then talks about return path about bias current, but honestly I don't get it.
Why it wont burn the op amp?
What if we use a regulator to generate positive supply for the op amp?
What about negative supply for the negative rail of the op amp?
What specification should the mosfet have? do we need a logic level mosfet?
Appreciate it if someone please expand and explain the whole concept of this method in simple terms.
AI: The key is the Vcc_H and Vcc_L suppl that the op amp is using. It's referenced to the 150V supply, not ground.
And then this OP_A whose power supply voltages are "hanging under" the 150V rail, gets fed the voltages across the current sense resistor. Since these current sense voltages are tiny, they are also close to 150V so nothing fries.
Then the op-amp drives the MOSFET.
You know how a pull-down transistor with a pull-up resistor can be used to convert a low voltage signal to a high high voltage signal (with an logic inversion)? This is similar to that, but upside down: a pull-up transistor with a pull-down resistor lets a very high voltage output a very low one (that is referenced to ground in this case). And instead of the transistor being fully conducting or blocking for a digital signal, it's partially on for an analog signal.
That dissipates a heat, potentially a lot of heat at high voltage differentials, and its heat that the MOSFET dissipates rather than the transistor (you can think of the MOSFET being driven at partially between full on and off as a variable resistor, though a nonlinear one, but the op-amp feedback compensates for that. That's why R3 and R4 are so large, to minimize the current flowing which minimizes heating. |
H: Can a low amps 48v battery handle big DC motor
I have a 48V DC motor, 3500W at 300A, combined with a dc controller with 60A constant and 120A peak discharge rate.
Can a 48v li-ion battery with 20A constant and 40A peak discharge rate, safely drive the dc motor?
Will the battery be damaged by a dc motor that will draw more current than the battery can give, or will the dc motor run at a reduced (proportional) power/torque, given by the battery's capabilities and the battery remain intact and safe?
The DC controller has current limiter protection at 120A fixed.
AI: 3500W @ 200A is only 12V not 48V and DC motors tend to draw 10x typ the power on full voltage surge start unless using a suitable PWM controller.
Or if you consider 3500W @ 48W that implies a load of 3500/48= 73 A.
Either way you need to show datasheets for everything, or ask with better data.
Conclusion. : Not a good match
update
I found your specs.
It is a 3 HP 48V motor (11.8HP pk) that draws 3500W (your spec) at peak efficiency (PE) at 6000/6400 RPM or a drop of 6.26% from a no load top speed that draws 4A.
This ratio of PE to no load = 73A/4A = 18.25 implies how much slower you need to ramp up the speed to prevent blowing your slo-blow battery fuse or PTC matched to the battery C rating and your specified need for 20A or about 1/4 of the 3HP current of 73A.
The controller can handle it only if you manually reduce the ramp rate of voltage rise significantly and use a meter to gauge it.
A battery pack may exist for this rating but that is a lot of current.
[Specs]
Diameter 3.0 in.
Length 7.8 in.
Peak Horsepower 11.5
Peak Torque 7260 oz-in
RPM at 48V 6400 rpm
Shaft Diameter 1/2 in.
Shaft Length 2 in.
Keyway 1/8 in.
Capacitors Yes
Magnet Type Neodymium
No Load Amps 4.4 Amps
Terminal Resistance 0.066 Ohms
Kt 10.05 oz-in/Amp
Kv 135 rpm/Volt
Peak Effieciency (PE) 85%
RPM at PE 6000
Torque at PE (oz-in) 510
Horsepower at PE 3.0 HP
Current at PE 55A
HP Range for 75%+ Efficiency 1.0 to 8.1
Weight 7.3 lbs.
0-A28-400-F48 |
H: Twisted pair's effect on power supply rise time
I am having a tough time wrapping my head around this question.
I am well aware of the benefits of using a twisted pair for signal wires: the cancellation of common mode noise coupled onto the wires, and the cancellation of radiated noise from the loops when there are changing currents through the wires.
Now, we have a power supply with a fast rise time and long cables. This is causing concern about generating a voltage spike at the load from the wire's inductance and the load capacitance.
Someone recommended we twist the power supply cables to help with this... does this actually help? Thank you!
AI: I assume you want the fast rise time to appear at the load on the end of the long cables. Or you have a high di/dt load and you want to minimize the voltage dip at the load. In that case twisting the cables may help. The magnetic fields of close conductors carrying opposite currents will tend to cancel, reducing the inductance associated with the cabling.
The bigger the loop area between the two conductors the higher the inductance. And since V=L*di/dt for a fast di/dt you want a small value of L (large V/L). |
H: Hardware composite video overlay
I am building a setup to make more inputs on a composite monitor (in fact it's a VGA monitor with a composite-to-VGA converter on it but the overlay needs to be composite) and everything will be controlled via a microcontroller.
I want to be able to show a menu that will tell me what source is selected. I made everything and it does work, but when I open the menu the whole screen does blank and only my menu works (witch is normal because it currently have it's own composite signal and when I open it up the relay of the input is turned off to turn on the one of the menu).
Can anybody guides me in the process?
The cheaper working solution will be the best one.
AI: The normal solution is a "genlock": sync your system to the incoming video, then selectively replace bits of it.
You will need:
sync separation (single chip solution)
fast analogue switch between your signal and theirs
recombine the signals (or just output them as S-Video)
Edit: or there's almost certainly a single chip solution for the whole thing. Here's a mono version. https://www.sparkfun.com/products/retired/9168 |
H: Syfer (now Knowe) X2Y EMI filter
I struggled to compare the EMI filter needed for 24V to 5V non-isolated BUCK DC/DC (running 300KHz to 500KHz) to ensure it passes CE conformance. I wish to keep switching noise within the DC/DC area as well as filtering out external noise entering into DC/DC.
I have two choices:
(a) Simple SMD ferrite beads and COG cap as pi filter
(b) SMD X2Y filter (1206J1000103MXTE03). It claims benefits superior to (a).
I have spoken to support and they have very little application note to demonstrate the benefits of the X2Y technology. No PPT presentation.
Has anyone use X2Y and how they compare with C-L-C pi filter.
AI: Filters are not trivial or simple with mutual coupling , unknown source impedances, complex loads and variable Q resonance and anti resonance.
Your schematic is already a 9th order LPF and non of the ESL are included.
The 10nF part you selected has an SRF of 100MHz and that is due to the ESL of about 1nH due to its small size. But if you add 0.5nH/mm traces that will lower the SRF and possibly react with all the other reactances. Good or bad all depends what emissions you have and need to control.
This is not a solution but demonstrates a lossy ferrite bead and cap with a SRF and a lower PRF anti-resonant peak. You must get s parameters & simulate or characterize your approved vendors and test with suitable test methods on your layout or experiment with other modelling tools such as Falstad's or using a scope with impulse testing using AC couple 50 ohm semi-rigid coax terminated at DSO with 50R.
For example here was a perfectly flat group delay Bessel filter destroyed by mismatching the load R. |
H: Help identifying 8 pin connector
Where should I start when trying to identify this connector on a WaveShare epaper hat? I've browsed through more Mouser pages than I want to think about. The manufacturer (WaveShare) has been downright unhelpful.
Additionally, what crimp ends are appropriate for this type of connector?
I think I've narrowed this down to the following categories which still yields ~400 results:
Connector > Header & Wire Housing
8 Position
1 Row
Pitch ~2.5-2.54
Female
What can I do to further narrow down this search?
Here are a few more pictures of the male and female parts of this connector.
EDIT:
As requested, here are images of the crimp-on ends for completeness
AI: I believe it's a JST PH 2.0 connector.
Waveshare's product page for the e-Paper HAT says the package includes a "PH2.0 20cm 8Pin x1" which then made things quite easy :-)
The connector is a JST PHR-8, available here or here for instance. |
H: Understanding capacitance in oscilloscope probe tip
I am trying to understand the capacitance and resistance in oscilloscope probe tip.
In the above attached image, that 9Mohm resistance is used for that 1x and 10x setting that divides the input voltage by 10 times or not, right?
But which capacitance are we referring to when we say that the probe has some capacitance?
Are we referring to the capacitor marked 1 or marked 2?
And second question, how does this capacitance impact while measuring high speed signals?
AI: The capacitance in parallel with the 9 megohm resistor is the primary factor in determining the probe capacitance presented to the circuit being probed since, by design, most of the signal voltage (90%) appears across it. At low frequencies, the attenuation of the probe is due to the resistors. At high frequencies, however, the reactance of the capacitors becomes dominant. Then the attenuation of the probe depends on the ratio of the capacitors. For this reason, an adjustable capacitor (usually designated as the compensating capacitor) is included within the probe. By adjusting it, the total capacitance of the oscilloscope input capacitor and the compensating capacitor can be made equal to 9 times the probe capacitance. Thus these capacitors would form a 10:1 voltage divider. In this way, the overall probe and oscilloscope input behave as a 10:1 divider over the full bandwidth of the probe. Another way of looking at it is that the idea is to make the time constant of the 9 megohm resistor and probe capacitance be equal to the time constant of the oscilloscope input (including the compensation capacitor). If that is true, the attenuation of the total circuit will be independent of frequency. |
H: how to wire a 12 lead motor for lowest possible current draw
Im on a job where a blower motor that was a 20amp load, was replaced with a 46Amp motor. The bucket can not be replaced for a larger starter, there is no more room in the MCC. The owners do not want to replace the motor, the blower has been rebuilt around the larger motor blah blah blah. Im wondering if there is any configuration of a 12 lead motor that would allow the motor to run at a lower current.
I was thinking about using a WYE configuration, that would reduce my current by 1/(sqrt(3)) but that still wouldn't be enough. I need to cut the current in half, or even a little more.
Is there a wiring configuration for a 12 lead motor that can deliver current reduction roughly half of the low voltage delta configuration?
AI: If the motor was changed because the rebuilt blower needs a more powerful motor, there is certainly nothing that can be done.
If the motor is grossly oversized for the load, it will not draw the full rated current, but it will likely not draw as little as 20 amps either.
If the motor is grossly oversized and you change it from delta to wye, it might still be able to operate the load and draw less current, but probably not enough less. It might also be at risk for overheating even though the current is lower because it will be operating at a higher slip leading to increased rotor heating. I am not certain if that is possible, but it needs to be considered.
If the motor is grossly oversized and the supply voltage is the lower of two nameplate voltages for the motor, the motor could be operated with half of the windings disconnected. That would only work if the actual load is less than half of the motor rating.
It seems extremely unlikely that any makeshift solution will work. Someone will probably need to bite the bullet and do what is required for a proper installation. |
H: In Verilog , if the always@ block is executed sequentially , how do non-blocking statements work since they are executed parallely?
I am getting totally confused because contradictory things are given.
https://class.ece.uw.edu/371/peckol/doc/Always@.pdf
In this pdf, it is said that whether the 'always block' will be executed sequentially or parallelly will depend on the assignment used. If nonblocking->parallely else sequentially.
But many answers like this
Are Verilog if blocks executed sequentially or concurrently?
Says it is always executed sequentially.
So I have two doubts
Is the 'always' block executed sequentially or parallelly?
If sequentially, how do nonblocking statements execute?
AI: Nonblocking assignments simply defer the actual update of the value until all of the statements in the current always block are evaluated. It has the appearance that all of the statements run "concurrently" or "in parallel", but if this was actually the case, it creates an ambiguity: what happens when you assign the same reg two different values in the same always block? If things are truly concurrent, this is a race condition and the new value will be unpredictable. However, the language semantics dictate something else: that the statements must be evaluated sequentially. If you assign the same reg from multiple places in the same always block, the last one takes precedence. Hence, you can consider that the statements are "evaluated" sequentially, but the regs are all updated with new values concurrently.
The synthesizer will convert the HDL code into logic that implements the equivalent functionality. In hardware, things will naturally be evaluated in parallel if there are no data dependencies, but the ordering of the statements would determine the precedence - which value is selected to be loaded into the next register or logic gate. |
H: How to replace a potentiometer with a digital solution in a buck feedback loop?
I have a simple pre-made buck converter that looks something like this:
The output voltage can be easily adjusted, by turning the R2 trimpot, which adjusts the voltage the feedback pin is getting.
What I would like to do, is to take this mechanical way of setting the output voltage and change it to a digital one, where I can set the output voltage I want with something like an Arduino.
My first idea was to simply rip out the R2 trimpot and replace it with a digital potentiometer, but this turned out to be a no-go, since the digital pots I have (and most cheap digi pots I have seen) have voltage limits of around 0 - 5V, and I will be outputting voltages between 1.2 - 23V (The power source feeding the buck is 24V)
My second idea would be to somehow use an op amp to replace the R2 trimpot, but I have not been able to figure out how to go about this.
What would be some simple way to achieve my goal?
AI: Put the digipot in R1's position. The max normal voltage seen at the FB pin will only be +1.25 volts so a 5 volt device will be fine. However, there might be fault circumstances when this might rise above 5 volts so put a zener diode across that point.
The other end of the digipot will be at 0 volts so this is another advantage. However, a digipot will introduce capacitance that may cause ringing in the regulator's output voltage and this might require you to have a small capacitor across R2 (about 47 pF).
You should also consider that using a digipot as a rheostat has two disadvantages: -
The end-to-end resistance of the pot isn't accurately defined so there will be a larger error than when using a conventional fixed resistor
Digipots are much better in terms of temperature stability when operated as a potentiometer rather than a rheostat. |
H: How to properly terminate this circuit (50 Ω coaxial to oscilloscope)
I'm a bit confused how this type of circuit should be terminated. I have no experience with transmission lines, so I do not know where to put the 50 Ω resistor.
It's basically output from an op-amp, there will be a BNC connector, and I want to connect it to an oscilloscope.
Bandwidth would be 100 MHz.
Is it necessary to put a 50 Ω resistor like this?
a)
Or should the 50 Ω resistor be like this?
b)
Or should there even some termination at the "other end", between the end of the coaxial cable and the input to the oscilloscope?
c)
Or just put 50 Ω termination on the "other side"?
d)
My feeling is that option c) is correct, but I'm really not sure.
UPDATE:
I have simulated those circuits in LTspice (it is able to simulate transmission lines).
It looks like this:
I have captured voltages at the ends of that transmission line and current going down to transmission line (actually current through R7). The voltage source sends a 10 V pulse.
a)
The pulse has 10V peak at the end (output from transmission line), but it bounces back to the input of transmission line. There are 2 current peaks: +100 mA and -100 mA.
b)
It looks like the output of the transmission line sees many bounces (with 20 V peaks), and the current peak is 200 mA.
c)
The output sees a 5 V pulse. Current peaks at 100 mA. No bounces.
d)
The output sees 10 V pulse. Current peaks at 200 mA. No bounces.
So it looks like a) is the best option (the output sees 10 V, and there is only a 100 mA current peak), but I don't know whether that pulse bouncing back to the input of the transmission line could cause some problems or not.
AI: Option (a) is the normal approach because: -
The op-amp output sees the least loading effect due to the 50 ohms (R7) being in series with the output.
The voltage seen at the scope-end is ideally the same voltage as delivered by the op-amp (after a delay of course).
Option (b) just shunts the very low output impedance of the op-amp with 50 ohms i.e. it is ineffectual.
In option (c) R8 can be used (compared to option (a)) but it usually doesn't bring a whole lot to the party other than halving the signal amplitude.
Option (d) loads the op-amp with 50 ohms and this might be a little too "heavy handed" for most op-amps. |
H: Low-pass cutoff frequency definition (-3dB vs. filter design)
For low-pass filters, we usually define the cutoff frequency as the frequency at which the gain drops by -3dB.
Another definition, however, comes up in filter design as one of the parameters that specify the filter (along with maximum passband attenuation, minimum stopband attenuation and the stopband frequency, see figure below.)
I fail to see how are these related as these two do not seem to be linked.
AI: I've taken your picture and corrected it showing the real 3 dB point at Fc: -
What you called the "cut-off frequency" is preferably called the lower pass band edge frequency or the lower transition band edge frequency. They are just "markers" that indicate where the real filter response cannot go beyond and are non mathematically related to the cut-off frequency - it is defined by the signal power falling to 50% commonly known as a half-power point. |
H: How inductance of a coil changes when there is a metal object nearby?
I am not sure if it is increasing or decreasing as some sources say it is increasing whereas some say it is not. What actually happens when a metallic object is put under a coil that is meant to be used as a detection coil for metal detector?
AI: What actually happens when a metallic object is put under a coil that
is meant to be used as a detection coil for metal detector?
If the metal is (say) iron then there are two opposing effects. Iron has a magnetic permeability much greater than 1 and this will tend to increase the inductance of the search coil but, iron is also a conductor and, it will act as a shorted turn and reduce the inductance of the search coil. Somewhere between the two is the answer and this depends on: -
Operating frequency
Relative dimensions of the piece of iron (i.e. shape)
Size
Incidentally some grades of stainless steel are very difficult to find using a metal detector because the two effects cancel out. I discovered this when designing metal detectors for food and pharmaceutical lines.
For other (non-ferromagnetic) metals/conductors their presence reduces the inductance of the search coil. |
H: Thermistor scavenge from digital medical thermometer
To be more specific, there's this thermistor I scavenge from an old medical thermometer.
Something like this
Cut to the chase, I connected my multimeter to the two wire of the thermistor where my multimeter shows a resistance of 40.9 kilo ohm at normal temperature.
Blasting it with the heat of my soldering iron and I got a resistance of 8.8 kilo ohm (I'm really sorry for the bad angle. It's hard holding it here while taking a shot)
When trying to cool it off using my refrigerator, the resistance would become higher than 40.8 kilo ohm.
The question here is, Is there a way to calculate the temperature from the resistance it gave?
AI: Those cheap home thermometers use a (relatively) precision NTC thermistor that was first developed in Japan in the late 1980s (IIRC). The easiest way to figure out the thermistor specifications is to replace the thermistor with a variable resistor and find the values that give specific readings on the display.
Of course that only works if the unit is still functional. If not you can try to create specific temperatures, maybe by mixing warm and cold water, and calibrate with another accurate thermometer.
A typical spec for the type of thermistor used in this kind of consumer application is 54K +/-10% at 37°C and \$\beta_{32-42} =\$ 3700 +/-2%. The thermistor will work over a wider range, but it's specified for measurements of human body temperature. The loose reference resistance spec means that the measuring circuit has to be calibrated (each unit individually) with a trimpot or digitally, since that represents a few °C tolerance, which is totally unacceptable tolerance for the application.
Once you have the two parameters, as above, you can calculate the temperature from the resistance using the simplified Steinhart–Hart equation (c = 0).
\$\frac{1}{T} = \frac{1}{T_0} + \frac{1}{\beta}\cdot\ln{(\frac{R_X}{R_0})}\$
where T is in Kelvin, R is in ohms. So in the above example, T0 is 310.15K (37°C).
If you end up trying to calibrate the thermistor for a more general purpose application, more common reference temperatures used for the measurement of beta are 35°C and 85°. You can mix hot and cold water in a large pot or whatever to get stable temperature readings on a second reference thermometer, (assuming you lack a laboratory dry block calibrator). The resistances at lower temperatures are fairly high, so you need to keep moisture out of the probe.
If this sounds like a lot of trouble, you can buy a thermistor with known specifications for a dollar or so. You might want to check and see if my values happen to be correct for your part (you can very easily check at 0°C and 100°C using ice-water slurry and boiling water- the latter check will be less accurate) and if they don't pan out, toss the thing. |
H: 4017 IC block diagram
I am really confused with the block diagram of 4017 IC. Here's the dataheet.
I really can't wrap my head around the way they have taken the output for each count. They are just taking two flip to choose the state. Shouldn't they take all four?
The outputs of flip-flops go through the AND gate (NAND+NOT).Let's take the count of 3 for illustration here. For this, the counter should have 0011 (Q4-Q3-Q2-Q1) in the flip-flops. In the block diagram, they have chosen only Q4' and Q3. This means the LED connected to count three should light up when the Q4 is low and Q3 is high ie. (01XX). But that't not what the flip-flops are holding.
Also there are 4 cases where the Q4 is low and Q3 is high. Counts of 4,5,6,7 have their 4th bit 0 and 3rd bit 1.
What is going on exactly inside the counter? You may take any count for the illustration.
I have attached the portion of datasheet for convenience:
Here's a decade counter that I have studied:
Cropped by Irfanview ^Y then copied ^C and pasted here ^V
AI: The FFs are not counting in binary, they're a Johnson (twisted ring) counter. This has the advantage that any given state can be decoded using a 2-input gate, which is exactly why they did it this way. Adding one extra FF is simpler than creating ten 4-input gates. And also, the outputs are guaranteed to be glitch-free, since only one FF changes state at a time. The ten output gates detect which FF is about to change state, by comparing input to output. |
H: Altium Grid Ends?
I am trying to edit the shape of my board in Altium, and I have found that the grid simply stops at the current board edge.
I can make the board smaller, but not bigger. The cursor simply won't move beyond the current board edge.
I have no idea how to fix this and googling hasn't turned anything up. Any ideas?
AI: I've run into this issue before. I've solved it by moving the whole board design some amount from the edge.
Ensure everything is selected and then Edit -> Move -> Move Selection by X,Y. Enter some large whole number (10000 mil, for example) for your X and Y coordinates depending on which/edge corner of the grid you are running into. I'm assuming you're hitting the bottom left corner, so use positive X and Y numbers.
You will need to repour your polygons, and you will also have to move your board shape in the board planning mode separately. |
H: Trying to get a 32.768 kHz crystal to oscillate
I've spent quite a bit of time read up on oscillator circuits and trying to get this circuit to oscillate. I'm trying to build this oscillator for a clock but I won't be putting it into a RTC, so I only need the 32.768 kHz frequency as an output.
Rereading, I'm pretty sure I need 25 pF caps instead as I misinterpreted how load capacitance worked. Regardless, I've tried a few different cap values (which were not 25 pF) and have gotten nothing.
I've also tried swapping and removing the resistors to a number of values as well.
However, I don't know what else is wrong. Moreover, I want to simulate it in LTspice but I don't know how to get the motional parameters as I only know the motional resistance.
I've also tried building this circuit on a breadboard and I get nothing but a flat line on my oscilloscope.
The crystal I'm using is a CFS-206 HZFB and the datasheet is here:
http://cfd.citizen.co.jp/english/prod-tech/product/pdf/datasheet_TF/CFS-206_CFS-145_E.pdf
Thank you in advance for any help with this.
AI: Rereading, I'm pretty sure I need 25pF caps instead as I misinterpreted how load capacitance worked.
You need 25pF caps less any stray board and chip capacitance. You'll probably end up at around 18-22pF.
However, I don't know what else is wrong.
Using a 74S part is probably killing you, for starters, if you're really using it. And if you are, then R2 needs to be much lower than the megaohm range.
Switch over to a 74C04 or a 74HCU04 (the "U" is important -- it stands for "unbuffered", and means that there are fewer stages of amplification internal to the part -- this makes its action less positive as a gate, but more linear as an amplifier -- and you're using it as an amplifier here).
If you don't switch over to a 74C or 74HCU part, then start by choosing a value of R2 that puts the output at around 1.5 to 2V when R1 isn't present (VDD/2 for CMOS -- 1.5-2V is specific to TTL). I'm not sure what that value will be, but I suspect it'll be in the 10-50 kiloohm range. Then see if things work. Find the largest value of R1 that'll work, then cut it by about a factor of 2.
I suspect, however, that to make a 74S part oscillate you'll need to overdrive the crystal. The thing is designed to work on a whisper of power, but the 74S is a brute compared to a typical CMOS gate. I'm not sure if you'll break the crystal outright, but you may have problems with temperature and aging.
Moreover, I want to simulate it in LTspice but I don't know how to get the motional parameters as I only know the motional resistance.
Motational capacitance = teeny, motational inductance = ginormous. It really only matters if you're trying to characterize the thing for start-up time (it's the motational resistance that matters for whether it'll oscillate at all, and whether you're overdriving it). I'd just guess at a Q of between 10,000 and 100,000 and solve for the motational capacitance and inductance from that and the published motational resistance (it's effectively a series circuit, so use \$X_{Cm} = X_{Lm} = R_m Q\$).
If you just have to know, and if you have a good enough signal generator you can measure the parameters. It would be too much of a digression to explain my (quirky) methods here; just Google on "measuring crystal parameters" and choose a method that matches the equipment you have available. |
H: Replace switching diode with MOSFET for lower voltage drop in charge pump?
I have seen reverse voltage protection circuits that use a pmos instead of a diode so that there is minimal power loss and voltage drop in that sector of the circuit.
I want to make a charge pump for logic level MOSFETs, but if I only have 5v as a supply, my charge pump will only charge the capacitor to around 4.3v. Is a pmos suitable for fast switching applications in a charge pump?
Images from Hackaday and Circuitdigest.
AI: No, you will need a more complicated circuit hanging off the gate of the PMOS. The simple PMOS "diode" circuit, unlike a real diode, is able to conduct in both directions if it's on. What determines whether it is on is if the "cathode" voltage is positive relative to the gate terminal.
That's not a problem if what is on the cathode end is something like a resistor which can only develop a voltage drop if there is a power source connected to the "anode". But it's a problem if what is on your output end has its own energy supply like a charge pump since it can maintain that voltage that keeps the PMOS on in the absence of a supply on the "anode" end. It can push current back the other way. |
H: Instrumentation Amplifier - circuit analyze
I found this schematic in LT1014 datasheet:
What the pointed op amp (and the circuitry around it) is for and how it works?
Why do we need to cancel the bias current?
What's the application for such a circuit? just like all other in amps?
AI: Search for "Bias Current Compensation" and you'll find a useful paper from Analog Devices that covers the basics. What follows is a somewhat hand-wavy explanation.
Unlike many opamps, the LT1013/14 does not have internal input bias current compensation. The input transistors are PNP, so all of the inputs function as current sources, with values on the order of 19 nA.
The fourth opamp in the diagram above (pins 12, 13 and 14) is used for bias current compensation for the two opamps directly above it, in order to eliminate the need for the source circuit to deal with it. It provides a sink for the bias currents of pins 3, 5, 12 and 13, reducing the residual bias current seen by the driving circuit to <1 nA.
Negative feedback means that pin 13 has the same voltage as pin 12, and therefore, the bias current flowing through pins 12 and 13 is the same. It is also the same as the current from pin 5, and if there is zero differential input, the current from pin 3 as well. The voltage at pin 14 is whatever it takes to make the current through the "2R" resistor attached to pin 13 equal to the bias current. The current through the "2R" resistor attached to pin 3 is the same. There are 2 inputs (twice the bias current) attached to the resistor connected to pins 5 and 12, so the resistor must be half the value, or just "R", in order for it to have the same voltage drop. |
H: PIC programming in Assembly
I went through an assembly program of the PIC16F88 downloaded from microchip and saw something that I have ever seen before
; eeprom definitions
org 0x2100
de LOW(IREF_ZERO), HIGH(IREF_ZERO)
de LOW(MAX_BATTERY_VOLTAGE), HIGH(MAX_BATTERY_VOLTAGE)
********End of the program****
The de does not appear in the set of the instruction the PIC, what does the instructioin de do in the program ?
AI: de is an assembler directive to declare an EEPROM data byte. org is also a directive.
You can find a full list of assembler directives in the MPASM manual (see 4.17 for de).
In general all assemblers will have directives of this kind, that don't map to machine language instructions, but the syntax varies between assemblers. |
H: What makes a semiconductor?
Wikipedia says the following:
Conventional semiconductors like silicon have a bandgap in the range of 1 - 1.5 electronvolt (eV), whereas wide-bandgap materials have bandgaps in the range of 2 - 4 eV.
According to this table of semiconductor materials, however, there are semiconductors with both higher and lower band gaps, ranging from 0 - 6.36 eV. Where is the line? What is the criteria for determining whether or not something is a semiconductor?
AI: There's no actual hard line I'd be aware of that tells semiconductors from non-conductors in terms of bandgap.
In the end, it's a definition up to the author of any text. It might be helpful to think of things in practical terms (e.g. "can I make a PN junction out of this?"), but that really just brings you further down into subjective statements.
So,
Where is the line?
Wherever it's sensible to put it in the context you're working with. |
H: Simple FM Radio Receiver project
I've been making my own simple FM radio. I know it's not quite appropriate to make this stuff on breadboard, but if it works, I'll move in on the board and solder it. I wanted to ask why my radio is not picking up any signals.
At first I thought of having a very small antenna for this purpose. I don't know if it is enough, but I don't think so. Then I realised I also might have connected my circuit wrongly. Or the variable capacitor. I've been thinking a lot how I am supposed to connect it properly. Because I have no idea. Can anyone tell me? And is there a way I could vary my variable capacitor with a metal screwdriver? I don't have any plastic ones..
Here's the schematic of the circuit:
Here is the screen of my variable capacitor:
And the way it's all connected on breadboard could be seen here:
I filtered high-frequency noise using low-pass filter and I only heard some small humming noise there. I wasn't sure if it was talking or not.. After I used my screwdriver, I didn't hear anything, everything was quiet.
Help me out with this project, please.
AI: Your "FM receiver" is at best an AM receiver.
It should be possible to build an AM receiver on a breadboard. Commercial broadcast AM stations in the USA are on frequencies from 560 kilohertz to 1.695 megahertz. That's low enough that you could expect the circuit to work on a breadboard.
Commercial FM broadcast in the USA is from 88 megahertz to 108 megahertz. That is much too high to run on a breadboard. The individual pin rows act like inductors at those frequencies, and the rows act like there are capacitors connecting them. (That is, pins in a row that are connected together will act like an open circuit at high frequencies, and adjacent rows will act like they are shorted together.)
88MHz is just too high.
Your circuit doesn't resemble any typical AM receiver that I've ever seen, nor does it resemble an FM receiver.
Your best bet is to buy a kit (one that has a good set of instructions and also explains the theory behind radio and the receiving circuit.)
Alternatively, find a project description that includes a good explanation and a parts list. Purchase exactly the parts recommended by the author.
In either case, follow the instructions exactly. Many AM receiver circuits are simple (few components, few connections) to assemble but complicated to use (setup, tuning, antenna placement, etc.)
If this is the video you followed, then it is probable that it will work if properly built and tuned. That doesn't mean that it will be easy. It also doesn't mean you can build it on a breadboard.
That circuit will be twitchy (very sensitive to the presence of other objects close by) and very sensitive to stray capacitance and inductance.
The capacitors and inductors used in the circuit have values close to the capacitance between rows on the breadboard and the inductance in the rows. It will be pretty much impossible to tune it to anywhere close to the needed frequency - if it can work at all. And, that's ignoring the inductance of your long wires.
If you want to build that circuit, then you absolutely must build it as shown and described. That means right down to the size of the perfboard and the placement of the components. You will have to solder it together.
No other way of building that circuit will work properly. It is not a proper FM demodulator, and it does not use a typical RF receiver or amplifier.
The coil you made is completely mashed out of shape. It won't have anywhere close to its intended inductance.
My first job in the field of electronics was tuning the low pass filter on the output of 25watt radio transmitters. They were "tuned" by stretching (or pushing back together) the coils in the filter. The coils used were about the size of the one needed for the circuit you are trying to build. A coil as far out of shape as yours is would have messed up the tuning to the point that it would have been easier to replace it than to tune it. |
H: If you have a BMS, will current be limited at some points to a DC motor and affect performance?
I am part of a group in a senior design project. We are designing an electric bicycle. Our professor proposed an issue to us and we are having trouble figuring it out, as we can't really seem to find any information on this.
We have a 10s5p battery pack using Lithium Ion 3.6V nominal rating cells. So 10 in series for 5 parallel connections. Each is rated at 2.6Ah.
The question the professor posed is when the BMS is balancing the parallel packs, is there a point where there's such a huge difference between let's say parallel pack 1 and 2, that pack 2 is disabled, and then suddenly there isn't enough current available for the motor?
Is this situation possible, and how can we avoid this? We noticed on https://www.orionbms.com/manuals/utility_o2/param_balancing_description.html it says a BMS can be programmed for such a small difference such as 10mV, wouldn't it be such a short time between balancing this wouldn't be an issue?
AI: BMS cutouts - high voltage, low voltage & over-current are intended for "when things go wrong" - not as primary control systems. BMS balancing is a proper function of the BMS in normal use, but in normal operation only occurs when the battery is very close to fully charged.
You, and/or your professor, are confusing different actions of a BMS.
Cell balancing occurs during charging and with the balancer you refer to they say
"When any one cell in the battery pack exceeds the Start Balancing voltage, the BMS will begin the balancing algorithm for all cells."
About the only situation that would occur in is where the batteries were fully charged and you had regenerative braking and immediately commenced a downhill braking procedure.
Regardless of whether you were able to trigger this mode in some manner, it is not associated with high current motor operation.
The professor may have intended to refer to or referred to over current battery protection. Under conditions of very high discharge with two parallel batteries, each with its own BMS, it is essentially certain that one BMS will reach trip point before the other. How soon depends on both BMS trip point settings and the degree to which the two batteries share the load current.
For purposes of example assume your cells are high power 18650s rated at 30A max discharge and that you set the BMS at 40A trip. That's per 5S battery so the total allowed output is 60A x 5S or about 3.6V x 80A ~= 300 Watts typically.
At 40A/battery wiring resistances of 0.01 Ohms will drop 0.4V.
That's liable to be well in excess of BMS settings imbalances.
Even a wiring resistance of 0.001 Ohm drops 40 mV.
So you need to aim at differences in wiring loom resistances for the two batteries of around 1 milliOhm or less.
If cell internal resistances vary by more than a few milliOhms you'll get similar effects ven with perfectly balanced wiring.
What this seems to be suggesting is that if you really MUST push your bike to it's max power limit without tripping one BMS - and so then the other, that you functionally need a single BMS - perhaps independent strings of electronics communicating intelligently.
But, odds are, when you are that close to the limit the sequential tripping is just a sign that the system has reached its limit and is about to trip out, no matter what you do.
A logical "solution" is to set your main controller so that it never allows current to reach the BM trip point.
Again: BMS cutouts - high voltage, low voltage & over-current are intended for "when things go wrong" - not as primary control systems. |
H: Op-Amp comparator output not reaching 0V
I am using a UA741CP opamp IC as a simple opamp voltage comparator.
I initially supplied it with 5V and tested the circuit as shown but even though I give voltage less than inverting input to non-inverting input I am getting 1.8 V or near not 0 V as output.
I hope someone knows the answer.
Regards,
AI: This is expected behaviour from the ancient 741.
From the datasheet:
As you can see, the output voltage cannot reach the supply voltages
The thing of it is, that it isn't proportional to the supply voltage. The output can never get closer to the voltage rails than 1 or 2 volts.
Since you are working with a supply voltage of 5V, you have very little room for the voltage to change. The output will probably vary between something like 2V and 3V. Not really all that useful.
There are many reasons not to use the 741. I won't repeat them here, but pretty much every reason not to use the 741 applies in your case.
You should use a rail to rail opamp, or, since you need to buy a part anyway, just go ahead and get a comparator rated to work on a single 5V power supply.
The LM393 is a comparator rated to operate on 5V. It is commonly available -it is nearly as common as the 741. |
H: Paralleling MOSFET Oscillation
I'm currently reading an application note about paralleling MOSFET and oscillation and it is written the following sentence :
"In addition, parallel MOSFETs share a common low-impedance path, which is also susceptible to parasitic oscillation."
What does it mean by low impedance path ? And why there is a low impedance path ? And why a low impedance path is susceptible to cause oscillations ?
Here is the application note (the sentence is written page 4):
https://toshiba.semicon-storage.com/info/docget.jsp?did=59458&prodName=TK8P65W
Thank you very much !
AI: There are 3 connection paths between 2 parallel FETs. You might think of them as 0 Ohms but every conductor has resistance and inductance and if near another insulated conductor automatically has some capacitance. The semiconductor dielectric also has capacitance and it gets bigger with smaller RdsOn. So in choosing a part with smallest gate capacitance, one will see that some parts have a lower and higher RC product from the normal distribution depending on the internal design of the FET.
The impedances are thus treated as 3 miniature transmission lines with inductance of ~ 0.5nH/mm and the output and junction capacitances lumped together in datasheets ; Coss,Ciss that are derived from Cds, Cgd, Cgs.
If you re-read the article, it tells you how that gets transformed into a Colpitt's Oscillator. It also gets worse when Vt thresholds are mismatched. The oscillations can be prevented by choosing a suitable low gate resistor for each gate. The article shows where these ringing problems can occur during switching.
simulate this circuit – Schematic created using CircuitLab |
H: Capacitor selection for LM3940 LDO regulator
My project requires 3.3v for operation. For the simplicity I want to power it with USB sources and this makes me to add step-down converter/regulator to get 3.3v from 5v line (let's omit input power filtering for a moment).
I've chosen LM3940 low-drop regulator because of the following:
works with 4.5v to 5.5v input range;
can handle up to 1A, however, power consumption of my scheme unlikely exceeds 100mA.
According to the datasheet (section 8.2.2) I should add output capacitor no less than 33uF but there is also one more requirement: the ESR value.
They give some advises in section 8.2.2.1.2 for proper capacitor selection but I'm not very familiar with ESR yet and want to get it right.
According to the plot above I should be pretty safe (let's get the very minimum) if output capacitor ESR value lies within [0.10; 0.32] Ohms range (if I assume only 0.1 Ohm and middle value between 0.1 and 1 on the plot).
Also one thing to note: my device will always work at room temperature (15-30 degrees) so now ESR oscillations should occur; with this understanding I want to use only one electrolytic output capacitor without messing up with tantalums.
So I've found some electrolytic caps (series K50-35) in local store and checked datasheet to find info about ESR. However, they only gives tan δ value and tells no about testing frequency (but it seems to be 120 Hz, as stated in Accuracy subsection). So I used this formula to calculate ESR for capacitors:
$$ ESR = \frac{\tan \delta}{2 \pi f C} $$
For given f = 120 Hz I've found that only following caps are suitable to be right for LM3940:
1000uF / 6.3v, 10v, 16v, 25v, 35v, 50v, 63v
470uF / 50v, 63v, 100v
330uF / 63v, 100v
However, I'm somewhat confused with so large voltage/capacity values and suppose that there is some kind of error in my calculations.
Could you please say if I'm right or not in selecting proper capacitor or I've missed something? Thank you!
AI: It's important to know a bit of (pre)history here... Looking at LM3940 datasheet I see a "May 1999" date, but the chip may be older than this. This means the device was designed at a time before thin portable devices, and it will require the type of output cap that was usual back in the day, which would probably be tantalum or electrolytic. Likewise a regulator like LM317 works best with the type of caps that it was designed for, that means a high-ish value with not too low ESR.
Modern LDOs are usually designed to be stable with only ceramic caps at the output because ceramic caps have gone a long way since the 1990's and become the cheaper, smaller, thinner option. But you can usually improve transient response by adding more capacitance, if necessary.
If you want to use LM3940, then you have to respect its ESR requirements. Personally I would use a Panasonic FR 470µF 6.3V capacitor, which has an ESR of 80-130 mOhms. But my reason for choosing this particular cap is that they fit the requirements and I ordered a bag of 100 (they're not expensive), so I have them. I wouldn't recommend placing an order just for one cap though, so you have to pick one that you can get easily.
Basically, you want low ESR for good transient response, but if it is too low then a LDO that is not designed for low ESR caps will go unstable, and the electrolytic cap can form a LC resonant circuit with ceramic capacitors in parallel. This cap's ESR of 80-130 mOhms is a great compromise, it is low enough for good transient response and it produces no resonance at all with a 1µF ceramic. Also most LDOs like the high capacitance and "low but not too low" ESR.
However, I'm somewhat confused with so large voltage/capacity values and suppose that there is some kind of error in my calculations.
This is normal, most "general purpose" caps are designed for low cost, NOT for low ESR. So if you want low ESR, you have to use a very big capacitor value which will use a lot of board space and may not be practical. Also the high ESR value of general purpose caps is a feature: it makes them not resonate with the ubiquitous 100nF ceramic bypass caps even if trace inductance is high, and that's good.
The "Panasonic FR" cap I linked is specifically optimized for low ESR.
Lower ESR and high capacitance mean Polymer caps. Some have ESR as low as 6 mOhms. These are quite popular among audiophiles who mod their equipment, for all the wrong reasons. DO NOT use a polymer cap unless you understand that it has strong tendency to create resonance peaks with ceramic bypass caps and/or make regulators unstable if not used carefully.
So, for your LDO, get a "Low-impedance" electrolytic (not "general purpose"), like those used at the output of switching power supplies. If you have an old switching supply that you don't use, there's your free cap!
Personally I'd replace the LM3940 with a more modern LDL1117 which has much better characteristics, lower quiescent current, and will work fine with ceramic caps.
(note LDL1117 is different from LD1117) |
H: 50 mOhm F SMD resistor identification HELP!
I have been trying to identify this resistor so I can order replacements as several are bad in my device. It’s fairly large. 11mm x 5mm? This is an estimate in reference to the nano2 smd 7a fuse in the socket near by and several other components on board. I have provided a picture with the component circled in red. Any help is greatly appreciated. 50mOhmF SMD resistor. .05ohm or 50M ohm? Any part numbers provided for replacement much appreciated. Most of the ones I find are much too small 6mm L x 3mm W. Thanks!!!
AI: It seems that the type is SLN5TTED50L0F from KOA Speer (http://www.koaspeer.com/slw07-slw1-sln3-sln5/).
The F stands for 1% tolerance. |
H: Superposition principle and voltage division
I am looking at some circuit solving using the superposition principle and I came across this one.
We need to find \$v_0\$. My thought would be to use superposition and voltage division in the following way:
\$v_0=V_{ss}\cdot\frac{2R_a}{2R_a+R}+2V_a\cdot \frac{2R_a}{2R_a+R}\$
We in both cases find the voltage across \$2R_a\$ with the voltage divider formula. However, it turns out the solution is actually:
So my denominator and numerator should switch places in the second part of my solution, but I don't understand why this is. Aren't we then finding the voltage across \$R\$? And does that have an effect on \$v_o\$?
I hope someone can clarify this for me.
AI: Hmm.
First I remove \$2V_a\$ source. So we left with this:
And we can find \$V_{O1}\$
$$V_{O1} = V_{SS} \frac{2R_a}{R+ 2R_a} = 0.081V = 81mV$$
Nowe we turn-off the \$V_{SS}\$ source and we are ending with this circuit:
And now we can solve for \$V_{O2}\$
As you can see this time \$V_{O2}\ = I\cdot R\$ or \$V_{O2} = 2V_a - I\cdot 2R_a\$
Where:
\$I = \frac{2V_a}{R+2R_a}\$ therefore:
$$V_{O2} =I\cdot R =\frac{2V_a}{R+2R_a}\cdot R = 2V_a \frac{R}{R+2R_a} = 1.167V $$
and finally
$$V_O =V_{O1}+V_{O2} = V_{SS} \frac{2R_a}{R+ 2R_a} + 2V_a \frac{R}{R+2R_a} =1.248V $$
Your circuit looks like this:
I mark the voltage drop by the arrows and the arrow tip is pointing the "positive" side.
And from KVL we have:
$$2V_a = V_{2R_a} + V_R$$ and also notice that \$V_o2\$ is a voltage drop betwenn \$V_A\$ node and GND.
$$V_A = 2Va - V_{2R_a} = 2Va - I*{2R_a} $$ or becouse \$V_A = V_R = I*R\$
Do you see it? |
H: What did I feel testing a car battery?
Was trying to test the voltage of my car battery but accidently had the multimeter set up for Amps (was using it for an old project and forgot to switch cables/turn the dial).
Turned my multimeter on. Connected the terminal to my car battery to test for a flat and while holding the multimeter probes thought i felt something travel through my fingers. No pain or anything. Just a very odd sensation.
It's a 12V battery. I know (from the sparks and 30 seconds on google) they pack a LOT of current but surely there isn't enough voltage to shock me through the (a) plastic handles of the multimeter, and (b) my skin.
So what did I feel? The multimeter is only rated for 10A. Any chance it could have 'failed dangerously' when I accidently overloaded it? Or was the sensation in the probes just the sudden surge of current inducing some sort of force in the wire?
Thanks for you help. Panicking a bit.
AI: A multimeter in ampmeter mode is basically a short.
If you're lucky, the multimeter has a fuse that instantly burned when you connected the battery – a charged, a shorted car battery can easily source > 80 A, and that just vaporizes a lot of on-board conductor traces.
So, what you might have been feeling is
the electromotive force due to wires with very high currents running in opposite direction being very close
the thermal reaction of measurement leads most definitely not speced for shorting car batteries (compare your multimeter leads to car jumper wires. Assume that at least 70% of your lead's diameter is isolation.)
something in your multimeter violently exploding and that mechanical shock being sent down the wires.
your nervous system's shock response to seeing sparks and hearing something pop.
Back-EMF: a fuse blowing has very high derivative of current over time, which means that the very little inductance of your wires might have caused a very high voltage for very shortly, think a couple kV. That might actually have shot through your isolation, but honestly, the resulting current would most likely have been low enough to not pose a danger |
H: What is dynamic memory?
I have an Arduino Uno and I'm trying to use it to provide data for 1200 WS2812B leds. When I tried to provide data for them, the Arduino IDE says "Sketch uses 5086 bytes (15%) of program storage space. Maximum is 32256 bytes.
Global variables use 1952 bytes (95%) of dynamic memory, leaving 96 bytes for local variables. Maximum is 2048 bytes.
Low memory available, stability problems may occur."
What does dynamic memory mean and how do I make more space for it. Also, I'm going to eventually switch the Arduino with a Raspberry Pi for wireless control of the leds. Will the Raspberry Pi have more dynamic memory?
AI: Global variables use 1952 bytes (95%) of dynamic memory, leaving 96 bytes for local variables. Maximum is 2048 bytes. Low memory available, stability problems may occur.
You have assigned 1952 bytes of RAM to global variables. Those are declared outside of function scopes, or inside function scopes with the static keyword.
The remaining 96 bytes is all you have for heap and stack (dynamic memory). Which is not much.
Heap is generally not used in embedded systems due to the lack of memory management to prevent memory fragmentation.
Stack however is always used.
When you call a function, the return address is put on stack, the arguments are put on stack, and all local variables of that function are put on the stack. Then you call the next function. And the next.
And an interrupt can be called anytime as well. Causing all processor (R0,R1..) registers to be put on stack to save the current state and prepare for execution of the interrupt service routine.
Stack is important. 96 bytes is not much. See if you can get more, or be really aware with what you are doing.
When you run out of stack, you have a big problem. |
H: Is it good practice to substitute a resistor by parallel and series-ing them?
In our electronics (I) lab they told us to never use resistors in parallel or series and choose a value near your calculations. but never explained why.
Is it ok to just buy the range of 1ohm to 1M and use them to get the resistance I want?
I'm starting to build a guitar amplifier. while buying the parts I may end up with lots of spares.
thanks
AI: The pros about using a single resistor over either parallel or series:
Less cost
Less wiring
Less space needed
Less error prone (one component less to fail)
The pros about using a combination of resistors:
You can select resistors from the ones you have if you have a limited number of values
When putting them parallel, you increase the power (Watts), see remark of greggo
(You reduce the average tolerance, however since you have to design for worst case situations, this does not help).
Reducing need of (re)loading reels for high production volume, see remark of Tom Carpenter
Reducing risk when one component breaks, and in some cases (personal injuries) even mandatory such as in e.g. ESD gear or EX certified gear, see remarks of SteveSh and rackandboneman.
However, in any professional (and serious hobby project), I would use only one resistor when possible, taking the closes/best resistor value and power into account. |
H: Non-inverting op-amp audio mixer
I am trying to make sense of the difference between non-inverting and inverting op-amp based audio "mixers". The circuits are basically summing op-amp amplifiers. Here is the part which I do not understand (Figure from simulations below).
I simulated both, and the main difference is that in the non-inverting case, the other sources act like shorts, but in inverting configurations they do not. Why is that so? Can someone explain?
If I am summing 3 signals from sources and only one is generating a sinusoidal signal with 100 mV amplitude, I get 33 mV at the output of the non-inverting configuration and in the inverting case, I have 100 mV at the output. Why?
AI: I am summing 3 signals from sources and only 1 is generating sinusoidal signal with 100 mV amplitude I get 33 mV at the output of non-inverting configuration and in inverting case I have 100mV at the output. Why?
In the top (inverting) amplifier, the summing junction is a virtual ground. The feedback current exactly matches the current into the virtual ground and the output is the inverted sum of the input voltages (modified by the resistor ratio, here unmodified because all the resistors are the same).
In the bottom (non-inverting) amplifier, the three inputs flow into a three-way voltage divider so given that the resistors are equal they get averaged; 0,0,100 mV gets you 33.3 mV. The amplifier just buffers that gives a 33.3 mV output.
The 470 k does basically nothing, so I'm going to ignore it.
If you want 100 mV from the non-inverting amplifier, configure it to have a gain of 3. eg: 2 k from output to inverting input and 1 k from there to ground. |
H: Making sense of potentiometer connections
I have stumbled across a problem with potentiometer connections that I have no idea how to tackle. What are the differences of the two circuits below? I understand that the one on the right is the same as a 5kOhm resistance, but the left one I have no idea to what it is equivalent, and the difference appears to be huge in this other question of mine.
simulate this circuit – Schematic created using CircuitLab
EDIT
This doubt arises from this circuit, where I want to calculate the output from that top part made of R2,C2,C1 and R3 which is supposed to generate an offset to Vin.
I was trying to ask just the part that was confusing me
AI: simulate this circuit – Schematic created using CircuitLab
As drawn, both (a) and (b) would be incorrect ways to use a potentiometer. The problem in both case is that as the wiper approaches the ground rail the resistance is falling and you are approaching a short-circuit on your supply. If you do try this you may burn out the carbon track or the wiper contacts.
The correct way to use a potentiometer - where the potential is adjustable on the wiper - is shown in (c). Here the supply always sees a 10 kΩ load and the output voltage varies between 0 and 10 V as the pot's wiper is moved to the top. (The actual output voltage will depend on the load resistance too.)
Neither pot in your op-amp schematic are configured as (a) or (b).
The upper pot is the same as (c) but drawn sideways (which doesn't help understanding) and has two filter capacitors added.
The lower pot is in a gain adjusting circuit and even when adjusted to 0 Ω it only forms part of a divider circuit with R4 which ensures that the output is never short-circuited to ground.
From the comments:
Also, you say that in the upper there are two filter capacitors.
simulate this circuit
Figure 2. OP's schematic redrawn.
As redrawn here it should be more obvious that C1 is the decoupling capacitor on the 5 V supply and should be placed close to the op-amp.
C2 is a filter capacitor on the potentiometer wiper. It will help filter out any noise that comes through from the +5 V supply but as the wiper moves closer to the positive supply it's ability to filter becomes less due to the decreasing source resistance. In this case the pot would likely be left at mid position as it appears to be used to bias the non-inverting input to, typically, 2.5 V. |
H: Bandwidth and Gain bandwidth product
What is the difference between the Bandwidth and the Gain Bandwidth product that we usually find in datasheets of OP AMPS and comparators ? and why have we defined the Gain Bandwidth Product and we did not stick with the The Bandwidth parameter ?
AI: Each is a variable Aol (open loop gain), BW tradeoff where the product is constant for the conditions given.
With an internal integration capacitor (aka compensation for all the transistor stages) around 10Hz the higher order effects are eliminated and now the closed loop gain is stable with negative feedback at unity gain (for most) where the bandwidth is maximum. GBWs can range from 10kHz to 300MHz for most but 10MHz is most common. That could be Aol=1e6 with 10MHz BW or Aol=1e7 , 1MHz BW as both have GBW of 10MHz/
This applies to Op Amps not Comparators which are not meant to be used with negative feedback for stable linear operation, but they are used with positive feedback to make hysteresis. |
H: How do I calculate the total wattage of a dc to dc circuit?
I am trying to figure out the total wattage of the below assumed dc to dc converter circuit block diagram.
Can I get it simply by just multiplying the total SUM of the system output voltages by total SUM of the system output Amps, like this:
(3.3 + 3.3 + 6 + 6 + 9) X (.5 + .5 + 2 + 2 + 2.5) =
(27.6V) X (7.5A) = 207W ???
Is that how we calculate it?
AI: No. Those are the correct units, but the answer will be off. This problem can be solved with simple physics plus common sense; specifically the conservation of energy plus the fact that no power conversion device is 100% efficient.
You need to calculate the power available from each output, by multiplying its current by its voltage (e.g. each one of your two 3.3V supplies needs 1/2 A, and so provides 1.75W). Then you need to add all of those together.
The number you get is the maximum possible output power. It's also the theoretical minimum of the maximum input power. In reality you'll need to divide that by the efficiency of the supply (e.g. 80%). If you really want to get down to details, each output will have its own efficiency, so you'd need to multiply each output power by the individual efficiency, then add those up. |
H: How can I make a simple circuit to output only after a min input voltage is exceeded?
Here's my problem....
I am setting up a camera system on a motor coach that is designed to trigger separate cameras when blinkers or backup is engaged.
the problem I'm having is the only accessible trigger voltage line I have goes from 10v when blinker is off up to 24v when blinkers are engaged. The problem is the 10v on the line is engaging my triggers...i need it to be zero until I turn on the blinker and allow the 24v to activate the triggers
So I thought I could build e a simple zener diode circuit to achieve this.... I purchased a 18v zener and some 2k resisters.... but it's been about 15 years since I've been in electronics and I've forgotten how to get the correct values or parts to achieve my goal and how to build a working circuit.
If anyone could help I would greatly appreciate it... my idea worked but when the zener turned on I only output 3v on the backside (anode) of the zener.
Thank you for any advice...
Update:
I actually posted a picture of the circuit I made which actually worked great for me but apparently it didn't show up here.
I did confirm a solid 10v with a DVM when switch is off.
The motor coach runs on 24v - some systems run by 12v and others 24.
I'm suspect of the 10v being present too because we have a generator being installed and the installer put switches in so you can toggle from Gen power to bus power. I think he may have hooked up something wrong... but for now this fix works
The circuit which Russel posted (small circuit on left) is almost identical to what I had. except i used 2 zeners (one 11v and the other 13v) one regular diode, a coupling capacitor and a 75 ohm resistor.
AI: Here are two circuits which are potentially suitable.
A more complete knowledge of your situation is needed to design with certainty.
The left hand circuit outputs a voltage which is Vzener less than Vin.
C1 acts as a filter capacitor to provide DC when a blinker signal is the trigger.
R1 serves to provide a minimum load to the zener and to dissipate the capacitor energy when the source signal is removed.
The right hand circuit enables the transistor only when input voltages well in excess of 10V are present. As shown it tracks Vin when it is flashing. This could be changed if needs be. eg a capacitor on Q1_C or at Q1_b could be arranged to assist.
Q1 base drive voltage = Vin x R2/(R1 + r2) = Vin/28 with the components shown.
For Vin = 10V, Vbase = 10/28 = 0.36V
For Vin = 24V, Vbase = 24/28 = 0.86V.
The transistor needs ABOUT Vbase = 0.6V to operate.
D2 and C4 form a reservoir to operate the circuit from briefly if the input is pulsing and a steady on trigger voltage is required. If a steady output is not needed then D2 can be shorted and C4 omitted.
R4 discharges C2 when Vin is removed if the output load is not adequate to do so in reasonable time.
The circuits can be 'improved' if more information is provided on the requirement.
simulate this circuit – Schematic created using CircuitLab |
H: Add a passive hardware token using a 3.5mm jack
I have a box that I made for my niece, which allows her to exchange voice messages with me. It is powered by a Raspberry Pi and features two buttons, a LED, a microphone and a speaker.
Now, for Christmas I want my niece to be able to exchange these voice messages with various friends (4, 8 or 16) and relatives by plugging in a hardware token to the device, featuring a picture of that person.
I am now looking for the most simple way to add this functionality.
Preferably using a 3.5mm jack socket because they are readily available from used devices / headphones
Preferable a passive device (Capacitors + Resistors)
Preferably by attaching it directly to the Raspberry Pi
Preferably without using a AD-converter, since the Raspberry Pi does not have this built-in.
Easy to use by a 3-year-old
So using a 3.5 mm plug with 3 pins I could add attach power to one pin and either connect or disconnect the other two from that pin, which would leave me with two bits, resulting in 4 people (in addition to me as the default, if the socket provides a switch when a plug is inserted).
If I had an analog-digital converter I could add a voltage-divider to the three pins and use the voltage as an indicator. However, the Raspberry Pi does not have that built-in so I am looking for a smart way to achieve this using one of the GPIO pins.
AI: Use 1-wire bus and any 1-wire chip inside the button. I wrote "any", because each 1-wire chip has its own, unique hardware address, so all that you need on RPi side is checking that the chip was detected, for example using bash command:
ls /sys/bus/w1/devices/
and checking it's output for existence of subdirectory named exactly as this hardware address.
On RPi HW side you need only connect additional jack socket to proper I/O pins (GND + DATA). There is no need to use any power connection here, so it looks to be safest for RPi than similar solution, which uses I2C (I2C needs to have dedicated power line, what makes risk of damage RPi in case of short-circuit).
EDIT: For reliable work you should add the pull-up resistor 4.7kOhm between DATA line and Vcc (3.3V).
You can use most popular and cheap DS18B20 chip, which additionaly provides possibility to measure the room temperature ;), or DS2401, which additionaly provides unique serial number. |
H: Caseless PC - should I be concerned about incoming EMI
This is a follow-up to this question. I have built a custom PC case that is essentially cardboard. Are the components likely immune to ambient EMI or do they build them under the assumption that a quality case will attenuate such signals.
I am new to EE SE (though I foresee many future interactions as I plan to enter the field).
AI: That question is asking about the PC generating EMI and interfering with other equipment, which is a different problem. The PC itself isn't going to care about ambient EMI since its own emissions are likely very large relative to its surroundings. |
H: What does fall and rise of clock mean?
Im new to electronics. In fact, I'm a computer scientist looking into embedded systems.
I am going through Vol. 1 of Jonathan Valvano's book on embedded systems and got stuck when i read on Gated D Latches:
What does it mean when an input falls? He says that: "the last D input is remembered or latched when the enable input falls"???
See the truth table where W is the enable input:
AI: The fall and rise of a clock usually refers to the Rising Edge and the Falling Edge. And that's just what it sounds like. It's the short period of time when the clock goes from Digital LOW to Digital HIGH and vice versa.
What does it mean when an input falls? He says that: "the last D input is remembered or latched when the enable input falls"???
The way a D-Latch works is as such: when the enable bit (in this case W) is set to HIGH, Q = D. And Q will always equal D as long as W is HIGH. But when the enable bit (W) is LOW, Q no longer equals D and the state of Q will not change until W is set HIGH again. During this time, Q = the last state D was in right before W = LOW.
In the image above, our enable bit is represented as E instead of W. |
H: What is the State of a MOSFET with a Constant Source Current and Floating Gate?
simulate this circuit – Schematic created using CircuitLab
Suppose we have a NMOS transistor, with and ideal current source (I_S) in its source. The drain is connected to V_DD, and the gate is just floating. It certainly cannot be cut-off since we have forced a current in its source, but is it triode or saturated? What if we change the MOS transistor to a BJT?
AI: Your schematic shows a P-channel MOSFET, but operation is the same for NMOS.
When the Gate is 'floating' it will have a voltage determined by whatever charge was stored on it before being put in the circuit. So it might be cut off or it not might not be, depending on its previous history.
An 'ideal' MOSFET has no leakage and no breakdown voltage. If your circuit had only 'ideal' components and VGS was zero, then the ideal FET would be perfectly cut off and the ideal current would produce infinite voltage across it (which is impossible of course, but when an unstoppable current meets infinite resistance...).
But real FETs do have these 'flaws', so in practice it would at least pass the constant current corresponding to the leakage current at the voltage required to produce it. If the constant current was higher than the leakage current at normal operating voltage then VDS would increase until it reached the avalanche breakdown region, where the FET would act like a Zener.
If the floating Gate had sufficient charge to turn the FET on enough to keep VDS below the breakdown voltage then it would either be in the linear or saturated region, depending on VDS and ID.
(Graph from Toshiba app note 20810726: Selecting MOSFETs and Consideration for Circuit Design)
Bipolar transistors behave similarly, except the Base needs continuous current to keep the transistor turned on. So if the Base was open circuit the transistor would stay cut off until reaching its breakdown voltage. The curve trace below was taken from a PNP transistor rated for a maximum VCEO of -25V. It shows a smooth breakdown transition at ~-30V, drawing ~6mA at -35V. (the sharp drop at the bottom left of the curve is caused by reverse Base-Emitter breakdown at ~+6V).
Many bipolar transistors have a negative resistance characteristic in the breakdown region, where as current increases the voltage drops to a lower value called VCEO(sus) (sustaining voltage). This shows up on the curve tracer as an instability at the breakdown transition. |
H: how to change output impedance of op amp
I have made a non-inverting op-amp using lf351n with gain of 5 and i need to connect the op-amp to a device with input impedance of 50ohm.I want to know how to make the output impedance of the op-amp to be 50ohm
AI: We only tend to need 'impedance matching' when dealing with RF, and an LF351 is not an RF amplifier.
50 ohms is quite a low load impedance for an opamp to drive, so the main part of driving a 50 ohm load is to make sure it will source enough current.
With a +/- 15v supply, the 351 is specified to drive a minimum of 10v, and typically 12v, into a 2k load, so let's optimistic and use typicals and say 6mA. If we look at the short circuit current specification, it's a minimum of 10mA, and a max of 60mA, so until limited by device dissipation, and for any particular device, you may be able to supply a little bit to a lot more.
+/- 6mA into a 50 ohm load is a swing of only +/- 300mV.
If you constrain your opamp gain such that it never drives more than +/- 300mV, you could connect it directly. Alternatively, put a resistor in series with the 50 ohm load, drive more voltage into it, and let the resistor and load divide it down to 300mV at the load.
If you do actually want to make the output 50 ohms impedance, say to drive a long transmission line without reflections, then you would configure the opamp to produce twice as much voltage as you want the load to see, and use a series 50 ohm resistor. However, for LF351 frequencies, it would have to be a verrrry long transmission line to make it worth the trouble.
Note that some opamps are not stable into a very low load impedance, I don't know about the 351 specifically, you'l have to try it and see. If it's unstable driving 50 ohms directly, or even the 100 ohms of a series 50ohm and the load, then increase the series resistor until it's happy, up to 2k as the data sheet suggests. |
H: Does the counter of an Atmega328 still count inside interrupt handler?
When you enter the interrupt service routine of an Atmega328 that is triggered from a compare event of the TCNT and the value that is set, will the counter TCNT start counting again or rather, keep counting inside the interrupt handler or is it frozen until the interrupt handler is exited?
I will have an interrupt triggered every X seconds so I'm wondering about the timing of this interrupt. Because if the interrupt stops the TCNT from counting, then I will have an offset every second.
AI: The counter continues counting unless you set the necessary control bits to stop it. The interrupt handler won't stop it. |
H: Help getting the transfer function of a circuit
I have been trying to get the transfer function of the circuit below for some days now and I eventually get to an expression but I don't believe I am geting the correct expression and here's why (the words "Circuito" translate directly to "circuit"):
Ignore the dotted lines, those are meant to guide the analysis. I have tried to get an expression by using the superposition of the two circuits that the dotted lines enclose. So I would have:
$$
V_{outA}=\bigg(1+\frac{R_{5}}{R_{4}}\bigg)V_{in}
$$
Since its just a mere non inverting configuration of the OpAmp. For the circuit B I would have:
$$
V_{outB}=\bigg(1+\frac{R_{5}}{R_{4}}\bigg)\bigg(\frac{R_{2}}{R_{2}+R_{3}}V_{+5}\bigg)
$$
and the total response at the opamp would then be:
$$
V_{out}=V_{outA}+V_{outB}=\bigg(V_{in}+\frac{R_{2}}{R_{2}+R_{3}}V_{+5}\bigg)\bigg(1+\frac{R_{5}}{R_{4}}\bigg)
$$
Finnaly at the passage through the RC filter it would be:
$$
V_{out}=\bigg(V_{in}+\frac{R_{2}}{R_{2}+R_{3}}V_{+5}\bigg)\bigg(1+\frac{R_{5}}{R_{4}}\bigg)\frac{1}{1+j\omega R_{6}C_{3}}
$$
when left in complex form. To get something to work with I wrote:
$$
|V_{out}|=\bigg|\bigg(V_{in}+\frac{R_{2}}{R_{2}+R_{3}}V_{+5}\bigg)\bigg(1+\frac{R_{5}}{R_{4}}\bigg)\bigg|\frac{1}{\sqrt{1+(2\pi fR_{6}C_{3})^{2}}}
$$
$$
\phi=-\arctan(2\pi fR_{6}C_{3})
$$
However, when I use this expressions, and I fix the values of R1,R2,R4 o 1kOhm, R6 to 12kOhm, C1=1uF, C2=100uF and C3=150nF The values I get for a resistance in the places of the potentiometer are R3=5100Ohm and R5=2500Ohm when Vin is a 0.8V sinusoidal signal and Vout will be a 2.5V sinusoidal signal with a 2.5V offset. But in practice I had to use a 20k potentiometer in R5 and a 10k for R3 so My intuition is that my expression is wrong, and the simulations in multisim also point in that direction. Where is my mistake?
PS: This circuit as appeared in two other questions here in the stack but I am a bit desperate to get a correct answer and its killing me not knowing where my mistake is.
AI: Because of the fact that \$R_3\$ is a potentiometer. It is much more complicated than you think. And to simplify the equations, you should pick \$R_3 << R_2\$. Or add a voltage follower between POT wiper and \$R_2\$
Then we can write the equation for the voltage at the non-inverting input:
$$V_{NI} = V_1\frac{R_1}{R_1+R_2}+ V_{IN}\frac{R_2}{R_1+R_2} $$
Or if we include the POT in the equation:
$$V_{NI} = \alpha V_{+5}\frac{R_1}{R_1+(1 -\alpha)\alpha R_3+R_2}+ V_{IN}\frac{(1 -\alpha)\alpha R_3+R_2}{R_1+(1 -\alpha)\alpha R_3+R_2} $$
Where:
\$\alpha =\$ POT wiper position from 0 to 1.
And since \$R_3\$ POT is supplied from a DC voltage it will create a DC offset at the op-amp output.
Equal to $$V_{offset} = \alpha V_{+5}\frac{R_1}{R_1+(1 -\alpha)\alpha R_3+R_2} \left( 1 + \frac{\alpha_5 R_5}{R_4}\right)$$
Where
\$\alpha_5 =\$ is a \$R_5\$ POT wiper position from 0 to 1.
All this means that if for example, the DC offset at the op-amp output is set by \$R_3\$ to \$2.5V\$.
Then the op-amp output voltage will be:
$$V_O = 2.5V + V_{IN} \left( 1 + \frac{\alpha_5 R_5}{R_4}\right) $$
So, now you got all the information needed to solve your problem. |
H: Arduino thinks I pressed a switch when I touch anything
So I have found something very strange and confusing, When I touch anything even my desk my arduino thinks I connected to the input of any pin I pick.
here is a video of what is happening
it even does it when connected directly to a battery
here is the video
AI: Floating input is influenced by the charge on your body. Put a 10k resistor on that input (the switch input, that is) to GND or VCC and that behavior should largely go away. You can also probably get away with enabling the internal pull up / down on the pin in software (the second argument to the pinMode function in Arduino-speak). |
H: Do IC step-down/buck converters generally boost voltage when the input falls below the desired output?
I’m trying to select a buck convertor to regulate the output of a LiPo battery so I can use it to replace two AA batteries. Ideally I want the regulation to happen only when the battery is above 3 V. When it drops below that I want the voltage to flow as normal and not be boosted up to 3 V. (My aim is to reduce the voltage of the LiPo battery before the buck convertor so that as the battery discharges it is able to trigger a low battery warning that kicks in at 2.4V).
I’ve found an TI IC that seems to fit the bill, the TPS62698: http://www.ti.com/product/TPS62698 . The max input and output voltages are perfect (4.8 V and 3 V), but I’m a bit confused by the minimum voltages. The minimum input specified is 2.3V, and the minimum output is 3 V. Does this mean that this is actually a buck-boost? Or is this just some sort of technicality and there is no regulation below 3 V? All of the TI step-down ICs seem to be like this from what I can see...
AI: The parametrics on that page are incorrect and were pulled from a datasheet PDF in an automated manner. You can tell because the text mentions the TPS62693, but the page is for the TPS62698, and the parameterics listed are also listed for TPS62698 but contain values from parts of the datasheet that describe different devices.
If you open up the datasheet you'll find that, for the most part, it describes four different parts in the same series: the TPS62692, TPS62693, TPS62694, and TPS62698. The first page only describes the TPS62693, but all subsequent pages provide specifications for all four parts in the series.
They've taken these parametrics from the "Recommended Operating Conditions" table, which is a bit confusing because this table covers the complete range of parts as if they are the same part, rather than separately.
Pulling details from other tables, the TPS62692 has a fixed output voltage of 2.2V, and the TPS62698 has a fixed output voltage of 3.0V. The input voltage ranges where they guarantee a particular level of voltage regulation (ripple) is 2.65V to 5.5V on the TPS62692, and 3.3V to 5.5V on the TPS62698. You may be able to operate these devices outside of these ranges, but there is no guarantee that they will work reliably.
If you provide an input voltage equal to or less than the fixed output voltage, the device will likely not regulate correctly. The result in this case is undefined, but it will most likely result in a lower-than-expected output voltage and an inability to sink anywhere near the rated current.
The reason they say you can go down to 2.3V in the operating conditions is that you can most likely power the device on in standby mode at a lower voltage than is necessary to actually make it regulate an output voltage. With a Vin of 2.3V you'll be able to keep the device operating correctly in shutdown mode (EN pulled low). |
H: A question about UART communication
Are there predefined keywords/codes that when sent from a pic to a computer running windows (UART) can elicit certain actions (like show a special pattern or open a picture on the screen) on the computer directly without requiring to program a special app to process the signals sent (like VB.net)?
AI: No, there aren't. If nothing else, it would be a security nightmare for anyone who used serial comms to connect to other systems.
Exception: Some systems allow you to use the serial port as the "console". If that's the case, then you get access to a command prompt, at which you can enter any command you like. |
H: Can an INA219 current sensor operate with a FET body diode present over the sensing pins?
I'm designing a board with optional current sensing modules (based on INA219) that can be plugged into it for monitoring the current on some 12V lines that go to peripheral devices.
The schematic for the main board looks like this:
The 12V_INT line is the 12V supply on this board, and the 12V_OUT_1 line goes to a connector that is used by the peripheral whose current load is being monitored.
The idea here is that when the sense module is not present, the CSENSE_PRSNT_1 line is pulled to ground by the 10K resistor, so Q3 is on and Q4 is off. This allows current to flow from 12V_IN directly to 12V_OUT_1, powering the peripheral. The LED is off, indicating that no module is plugged in.
The module board plugs into CONN7 and bridges 12V_INT to CSENSE_PRSNT_1. This raises CSENSE_PRSNT_1 to 12V, switching Q3 off and Q4 on. This turns the LED on, and blocks direct current flow between 12V_INT and 12V_OUT_1. The module board then has a 10mΩ precision resistor across the 12V_INT and 12V_OUT_1 lines, and the INA219's sense pins are connected over it.
As far as I understand, this should work. The body diode of Q3 is pointing in the wrong direction to allow current flow, so it shouldn't affect the reading. The body diode breakdown voltage should not be exceeded, and if it is I have bigger problems. I don't see anything in the INA219 datasheet that indicates there would be a problem. Am I correct here? Did I miss something?
AI: It looks good to me too:
The turned off mosfet will basically disappear from the sense circuit and all current will flow through the resistor instead, so everything should work just fine.
I initially thought (before I read your whole question) that you intended to use the internal resistance of the mosfet as the current sense resistor and were concerned about possible damage to the INA219. but that would also work. |
H: Impedance Mismatch of LVDS Differential Pairs
A mistake was made when designing a set of mother and daughter PCBs, resulting the daughter board to have its LVDS pairs at ~100Ω differential impedance, while the motherboard ~90Ω. The receiver, which is on the motherboard, is a standard LVDS receiver, with 100Ω termination resistors. Those pairs connect via a dedicated FFC cable. The designs are already at the manufacturer and cancelling the order will cost a lot. What are the chances that the communication will survive this mismatch? The clock of the data transfer is between 300-400 MHz.
AI: There's a neat little return loss and mismatch calculator that I like to use for these situations. 100R into 90R gives a reflection loss coefficient of 0.0526, meaning you're reflecting 5.26% of your signal back.
If your receiver can reject that level of noise, and you can deal with potentially 11% higher peak voltages in your waveform (due to standing waves), you should be ok. |
H: Should I ground the heatsink?
I am using an npn transistor in TO-220 package, and its collector is electrically connected to the metal part on it. I have checked it via a multimeter. I use a heatsink for that transistor, with isolator. So after mounting it to heatsink with isolators, it is no longor electricaly connected, I have checked again. However, when I inspect the signals in the circuit via oscilloscope, I see there is some noise on waveforms, while trying to understand where it comes from, I have touched the heatsink with a metal, to be precise with the tip of the following instrument:
It becomes much smooter. I didn't understand how touching it would affect the stability. After some reading on the web, I saw some say that heatsink itself should also be grounded. I wanted to have your thoughts on this.
By the way, transistors(npn&pnp) are used in a class B audio amplifier.
p.s : This doesn't answer my question.
AI: By the way, transistors(npn&pnp) are used in a class B audio amplifier.
This is an important detail. The transistor tab is usually connected to the Collector pin, and your standard insulator will add about 15pF capacitance between the tab and the heat sink, so this is about knowing whether this capacitance can cause problems or not.
If the heat sink is grounded, then the collector will have 15pF to ground capacitance in series with the connection inductance. Then the heat sink will also capacitively couple to whatever traces or signals are around.
If your amp uses an emitter-follower output stage, then both power transistors collectors are connected to power supplies (or ground if it is a single supply amp). Since power supplies are decoupled to ground, there is already a low impedance HF path between collectors and ground, therefore grounding the heat sink should make no difference. However, if the heat sink is external, or part of the enclosure, and the enclosure is already grounded at another point, grounding the heat sink on the amp pcb will introduce a ground loop.
If your amp uses a common emitter output stage, then the collectors are connected to the output, and the capacitance will be between output and heat sink. Some amps omit the insulator for better thermal resistance and have the heat sink connected to the output voltage, but this requires it to be inside an enclosure and not accessible. Anyway, if you ground it, then you have to consider if the extra 15pF to ground could make your amp unstable. For an audio amp, this is unlikely.
when I inspect the signals in the circuit via oscilloscope, I see there is some noise on waveforms, while trying to understand where it comes from, I have touched the heatsink (...) It becomes much smooter.
If the output voltage appears fuzzy on the scope, your amp could have stability issues. You can try single shot mode and see if you observe oscillations or just noise. If the amp does have stability issues, they are probably not related to case-to-heatsink capacitance, the problem would come from somewhere else, like layout or decoupling. |
H: Would this circuit work like an SR latch? Why is it better to use two NOR gates?
I am very new to digital logic, and have just started to learn about feedback in circuits. The basic example of an OR gate with its output connected to one of its inputs creates a circuit that seems to behave like an SR latch without a reset function (i.e. once it receives an input it will output high indefinitely) so I am wondering if the following modification to this circuit would allow it to function as a latch, and why the standard topology using two NOR gates is preferred.
AI: Would this circuit work like an SR latch?
yes it works well as Q with positive logic input.
Why is it better to use two NOR gates?
It is minimal and R is faster AND gives both outputs Q & Q*.
This uses negative logic on inputs.
Using 2 NAND gates also gives identical results. |
H: Switched Capacitor with MOSFET
I have been trying to create a simple switched capacitor for my circuit, yet I must be doing something wrong and can't understand why it won't work.
When the MOSFET is ON, VGS=3.2V, whereas when it is OFF, VGS=0V. I want this 1pF capacitor to be addes to my circuit, which operates in the range of 4-6GHz. Normally, when the MOSFET is OFF, the capacitor should "see" an open circuit and not contribute its capacity to the circuit. However, no matter if the MOSFET is ON or OFF, I get the same result:
Can somebody please tell me what's going on here?
Thank you in advance!!!
AI: The MOSFET you have chosen (1RF530) is not at all suitable for a high frequency circuit.
It has an output capacitance of several hundred picofarad even when it is off. It is not going to make much difference changing the bias.
You need to find a device whose output capacitance is low relative to 1pF - I don't think you will find one. You may be able to use a diode switch to do what you want.
There are devices available that have electrically switchable capacitors or maybe a reed relay.
1RF530 datasheet
Digital Programmable Capacitor |
H: What is this red mark that resembles a net bridge in circuit diagrams?
What does the red mark on this schematic mean? I think it's not a net bridge.
The corresponding image was taken from the IO board of raspberry pi compute module 3.
Link to the diagram: https://www.waveshare.com/w/upload/7/75/CM3-board.pdf
İmage:
Best regards and thanks
AI: The clue here is the signal names: x_P and x_N.
These traces are balanced differential signals, which have a specified impedance. The red symbol on the schematic is indicating that these are required to be routed as a differential pair. This means calculating a geometry to establish the required impedance, and then the design software will try to maintain that geometry when the pair is routed on the PCB.
These are high speed HDMI signals, which absolutely require proper routing to maintain signal integrity. They should also haved noted the differential impedance required as well: 100 \$\Omega\$ for HDMI. |
H: ESP8266 3.3V and ADAFRUIT TRINKET 5V I2C communication
I try to learn I2C with this diagram as an exercise.
I want to read my ESP8266 IO events from my 5V adafruit trinket.
I2C MASTER ESP8266ex
Operating Voltage 2.5 V ~ 3.6 V
Operating Current Average value: 80 mA
I2C SLAVE TRINKET 5V
On-board 3.3V or 5.0V power regulator with 150mA output capability and ultra-low dropout.
Up to 16V input, reverse-polarity protection, thermal and current-limit protection.
I read on i2c-bus.org voltage-level
Since I2C is an open drain concept the VCC level as such is not
critical for the operation as long as all components on the bus can
accept the voltage on the IO pins and are able to detect the logic
levels.
It's seems to be not the case here, the ESP8266 only accept 3.6V max and trinket use 5V, then I search a solution :
bi-directional-logic-level-converter-hookup-guide
With my Raspberry as 3.3V power source for LV and the Trinket 5V OUT pin as 5V powersource for HV.
This tutorial use the N-channel BSS138 but i have not this MOSTFET only the N-channel 5ln01sp
This my schematic for the moment :
Can I use the 5ln01sp MOSFET instance of the BSS138 ? (I suppose that yes after having consulted the data sheet of each one but I am not sure because of my low level of knowledge.)
As a beginner, could my scheme work without drawbacks, did I forget something ?
Thank you for your help and your time.
AI: Short Answer:
Looks definitely Okay
Long answer:
Here is the reference design or solution for the similar case from NXP:
https://www.nxp.com/docs/en/application-note/AN10441.pdf
One option was to look for the high voltage tolerant I2C Pins. Normally, in most of the MCUs you can find that information. The I2C pins will be tolerant to higher voltage than the VDD of the system. Example: STM32F405 MCU:
In your case, I could not find the related information in the datasheet.
Looking into the datasheet of the part 5LN01SP:
The maximum gate threshold voltage is 1.3 V (we have a good buffer of 3.3 V - 1.3 V = 2V)
Forward voltage drop of the body diode is 0.85 V typical (1.2 V maximum), still we have guaranteed buffer 2.1 V (3.3 V - 1.2 V).
The series resistance hardly matters if this is the only device on the I2C bus.
at 100 Hz or even a few 10s of KHz of clock frequency, I do not expect any problems as such. |
H: Switching regulator using MCUs
One of the most useful ability of MCUs is generating PWM signal. For example ESP32 duty resolution can be lowered down to 1 bit in which case the maximum frequency is 40 MHz.
With such fast clock speed a 200-500KHz and 10-12 bit resolution is more than enough to build a switching buck or boost converter:
simulate this circuit – Schematic created using CircuitLab
Is there a down-side in using of MCUs PWM to build a switching regulator? (am I going to face any problem?)
What advantages switching regulator ICs (like LM2596 or XL6009 etc) have over this method other than simplicity and ease of use?
AI: 10 bits at 200kHz requires a 200MHz peripheral clock, and 12 bits at 0.5MHz requires a 2GHz peripheral clock unless you have a fancy enhanced resolution PWM peripheral.
So lower PWM frequency means more expensive, heavier larger inductor. It’s difficult to get the MCU to regulate its own power. “Soft” firmware disruptions or bugs can cause physical damage.
Some processor bandwidth and resources are consumed by the (interrupt driven) control loop unless your chip has a dedicated processor for the purpose. That may increase latency for servicing lower priority interrupts or compromise the regulator performance.
Microchip has marketed versions of their PICs with peripherals optimized for SMPS control.. if Olin was still here he could tell you a lot more about actually using them, personally I tend to err on the conservative side.
There are also some small very low power MCUs that actually contain an entire switching regulator (except the inductor) to allow 1.5V operation.
There are a lot of similarities between a motor controller implemented by a DSP or microcontroller and a switching power supply so the existing peripherals often aimed at motor control could be used for a SMPS (although the frequency would typically be very low compared to a modern SMPS chip). Might be useful for special applications such as a polyphase low EMI power supply. |
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