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H: What is this keyboard connector and how to connect it to MCU?
I have a 1991 laptop keyboard w/o the motherboard. It was attached to the main board with two flexible cables. The keyboard feels awesome and I would like to make use of it. The issue is that I can't identify what connector this is (see pic. attached) and I don't know what keyboard controller was used to drive it. The flexible connectors are 0.59'' (~1.5 cm) and 0.43'' (~1.1 cm) in width.
My questions are:
What's the common name of this flexible cable connector, if any?
How to turn the keyboard into a usable one with an MCU (i.e. how to connect it to Arduino or Raspberry Pi, or any other micro controller/board)?
If it's hard to tell, I'd appreciate an advice on how to reverse engineer the keyboard to connect it to any modern controller (AVR, RPi, what not).
More pics:
Keyboard innards
Cables close-up
PS: The Part No. on the back of the keyboard says SU54TM017DK but googling returns zero hits.
AI: If you want easy-mode, you need a keyboard controller. Interfacing with a microcontroller is silly if all you want to do is route the keypresses to a PC (or USB host)... unless you are trying to learn how a keyboard controller works (by implementing one in your own firmware).
This one is a common one in industrial/custom projects: SK5100/SK5101 - Low Cost USB/PS2 Programmable FlexMatrix Industrial Keyboard Encoder
http://sprintek.com/products/sk5100.aspx
It works like this:
It has enough keyswitche support to cover the keyboard in the photos (and then some). 8x20 = 160 switches in matrix form. It can even drive RGB backlighting if you want to add that.
You can read the datasheet to learn more about how keyboard matrix switches work and you can reverse engineer your keyboard with a multimeter to confirm which pins match which I/O lines on the controller chip.
The cool thing about this controller is that it comes with a dev tool that lets you reprogram the keycode-to-switch mapping so you can figure out the exact wiring of the keyboard after-the-fact in case you got a few lines swapped. |
H: Hole Size Constraint Violation on DRC Check for custom mounting holes
It is about Altium designer. I am fairly new to that platform please bear with me.
I am at the stage finalizing PCB for manufacturing. Of course, I have to deal with couple of DRC errors and warnings. But, one of them is not that clear to me.
I have created a mounting hole library using Pad and drill size in 3.4mm diameter and hole size 5mm with plated option.
DRC is now complaining about the drill size can't be bigger than 2.54mm.
I can understand that, fine.
But, what would be the way to create this hole with plated option then?
AI: Just edit the drill size rule to increase the maximum size, AD has a rather silly default here.
This is pretty much a standard change when configuring AD. |
H: maximum emitter base reverse voltage limiting when driving with op amp?
This is part of a larger circuit, but problem area is shown below. In simulations (of the larger actual circuit not shown), the base voltage of Q1 drops to about -6.35V. Can this damage Q1 (2N3904)? What if the base voltage drops to -15V? Current flowing through emitter base with base at -6.35V is in pico amperes (~25pA).
If this is a problem, how can I limit base voltage between 0 and -5V, without limiting op amp supply voltages?
PS: This is for a bench power supply. I need a +15V since there is a differential amplifier for voltage sensing and I lose accuracy at low output voltages if op amp +V supply is low. The -15V tracks the +15V, otherwise I lose accuracy at low voltages and current sensing (due to greater offset).
AI: The absolute maximum Vbe voltage of Q1 is -6V , as you can see from a cursory look at the datasheet. So, -6.35 is (slightly) outside the allowable range.
Typically they won't break down until 7-9V so you're probably okay, but if you want to be sure just slap a diode (eg. 1N4148) from base to emitter, or change the divider values to limit the base voltage to -5V.
It's bad juju to cause reverse breakdown in the B-E junction, and a long term reduction in beta has been observed as a result of higher currents being forced through junction. |
H: Less voltage more amp? switch characteristis
I have a question regarding switches, relays etc
Ex, if I have a switch rated for 24v 0.5a, can the contacts then safely handle 12v up to 1a? Because the power passing the switch is the same? Or should I anyway use a 12v 1a switch?
AI: No, you can't do that.
You must adhere to specs in every aspect. If there's a component that has derating curve, then its datasheet will say so.
Physically, what heats up switches and makes arching weld together contacts is current. Exceeding the current rating is a dangerous game, and you shouldn't play it. |
H: Solder Ethernet directly to board?
I'm building a system based on one of the old Raspberry Pi model B's (yes, first series) into a very small enclosure. I need to run an Ethernet cable from the POE splitter I have in this enclosure to the RJ-45 connector on the Pi's board, but I find I don't have enough room to do it (at least, not without creating a very small -- three inch -- cable.) I'm wondering if I can simply desolder the RJ45 jack and solder the Ethernet cable directly to the board itself, but I find that there's a lot going on in that jack:
Given all this "stuff" in there, would soldering the wires directly to the board even work?
AI: As you've guessed yourself, no, this woun't work.
The plug integrates what network guys call "magnetics", which, in fact, means the transformers that you see in the picture.
Also, if all the problem is building a 10cm cable: That's quite obviously the easier, more stable, and quicker method.
(By the way, if you have the time, take apart a network cable. You don't want to solder these.) |
H: assembling PCB, Cx is shown within IC outline - does this mean Cx goes on other side?
Embarrassing question. I am assembling a PCB. Please see attached picture. C9 is within the boundry of IC3. Does this mean that C9 is installed on the other side of the board?
C9 = 100n X7R
AI: IC3 was probably intended to go in an ic socket: |
H: Is it possible to generate 4 PWM signals using a single PIC16F84A IC?
I have made a line follower and the issue I'm facing right now is its speed adjustment. The motors run too fast and make my robot go off track. Luckily my motor driver supports speed control through PWM signals, so I was just wondering if it's possible to generate 4 separate PWM signals using a single PIC16F84A IC.
Concerning my project, it is centered around the PIC16F84A microcontroller and a miniature chinese clone of L298A. For controlling the motor speed, two in my case, the motor driver requires 2 signals for each motor, therefore 4 in total. Hence I somehow need to be able to generate 4 PWM signals from my PIC16F84A to implement speed control for my motors. Is it possible to do so with my microcontroller?
It would be great if the provided solution were more code-oriented or just a minimal circuit.
AI: As you discovered from reading the datasheet, the PIC16F84A does not have any PWM hardware. You can still generate PWM, but you will have to do it by 'bit-banging' the I/O pins in software.
Maximum PWM frequency, resolution, and accuracy will be limited by code execution time, and the more PWM outputs you produce the slower it will get (for two motors you should only need two PWM outputs, with the other outputs held high or low). For best results the code would be written in assembler, with careful attention paid to the execution time of each instruction.
If the MCU needs to do other stuff (eg. reading photo-sensors) at the same time then it gets tricky - but still possible provided the other stuff can be done between PWM transitions. One solution is to use Timer0 to generate the PWM timing, with PWM pin updates done in the timer ISR. This will introduce some jitter and reduce the maximum PWM frequency, but allows other code to run in the background without worrying about upsetting the PWM timing.
If the MCU must also run other code with critical timing requirements (eg. software UART) then it gets even more tricky - perhaps even impossible. In that case you might want to consider changing to a more modern PIC with hardware PWMs. |
H: Inverting regulators and sinking current
I have a circuit to drive a simple resistive load, and it works quite well. On the high side is 2.5V from a regulator, and the low side is 0V (taken as reference to a battery's negative terminal which supplies the regulator).
I have realized that it would be desirable in my application to have the high side of the load be 0V, and the low side to be -2.5V instead. To do this, I have considered implementing the TPS63700 (link below).
What I can't get my head around, is the fact that the regulator would need to sink current rather than source it in this situation (about 60mA in my case). I would imagine it can, since i can't understand what situation wouldn't require it unless there was an even lower voltage in the circuit to source to. I've gone through the datasheet but the definition it uses is 'output current', and i don't know if that means current at the output or current that the device puts out.
Could someone explain where my thinking is wrong, and give a brief explanation of why the part (or other inverting regulators) would or wouldn't work for this application? Also, how does the current flow if the input side of regulator is connected to a battery (terminals 0V and ~4V), and the output side (-2.5V) is connected to the battery's neg terminal (0V) by a series resistor?
TPS63700 datasheet: http://www.ti.com/lit/ds/symlink/tps63700.pdf
Thanks.
AI: Consider the topology of an inverting buck converter:
simulate this circuit – Schematic created using CircuitLab
The regulator output does not sink current. The coil does!
When the MOSFET inside the regulator is conducting, there's a current running clockwise in the left loop. Then the regulator opens the MOSFET, but the current through the coil cannot be turned off in an instant. That's why there's now a counterclockwise current in the right loop. |
H: How to calculate the Impedance of a circuit
I am having a problem regarding calculating the impedance of the two circuits below:
simulate this circuit – Schematic created using CircuitLab
Everywhere I search I always get a description of what to do if they are connected in series or in parallell, however no one I have found so far explains how to use both parallell and series to make an Impedance function using the jw method. Would be extremly happy if someone explains the best method of getting the jw impedance function and also what does R1 // L1 stand for in these cases. Why is R1 // L1 often refered to as (R1 * L1) / (R1 + L1) and not (1/R1 + 1/L1) Like regular parallell functions.
The values on the different parts in the schematics are just examples, I would like to know how to make the formula using the signs like R1, C1 and so on.
Thanks in advance
AI: I always get a description of what to do if they are connected in series or in parallell
That's ultimately all there is. You keep applying parallel and series combinations until there is only a single impedance left. For example, in your first circuit, R and L are obviously in series. Solve for that. Now compute that result in parallel with C. In the second circuit, you can likewise combine R2 and C1 in series, then the result of that parallel with R1, then the result of that in series with L.
The "//" operator means in parallel with. The arbitrary case of multiple impedances in parallel is the reciprocal of the sum of the reciprocals. R1 // R2 // ... Rn = 1 / (1/R1 + 1/R2 + ... 1/Rn).
Note that for just two impedances, this can be reduced to (R1 * R2)/(R1 + R2). Your second equation for parallel impedances is wrong because you forgot to take the reciprocal of the resulting sum.
Note that the math above works not just for resistances, but also arbitrary impedances. In the general case, these are complex numbers. If all the impedances are resistances, then all the values are real numbers, making the computation easier. However, the algebra is the same, except that it has to be carried out on complex numbers in the case of arbitrary impedances. |
H: Can I call this dc to ac
I thought about making the current pass through the resistor the the ground
And after switching the direction the ground change to the opposite direction
AI: Yes, you can call that DC to AC.
You have designed an electromechanical chopper which supplies square-wave AC to the load.
But there's a few problems,
if one of the relay gets stuck you'll short circuit the supply
you'd probably get better efficiency. and greater reliability with a transistor H-Bridge instead of the relay bridge,
also the 555 is not set-up for equal on and off periods so the AC won't be balanced, there'll be a DC compnent that leaks through.
the inductors cause the relay contacts to arc when opening which will accelerate wear, some sort of snubber would help (a parallel diode on each inductor would probably suffice)
the relay coils need snubbers (eg diodes parallel with their coils)
running two relays may exceed the 100mA max output source current typcial of the NE555
I don't know where you're going get relays fast enough, that 555 is running at what? 200Hz? |
H: voltage division resistor value choice and battery terminals
lets say I want to divide my voltage by 2. For this reason, I must use 2 identical resistor for voltage divider curcuit. I must either use 1ohm resistors or 100000000k resisitor if there is such thing. As long as my input voltage drops to its half, what is up with resistors values
what happens if positive terminal of a battery is connected to soil. would there be current flowing into the soil?
AI: As long as my input voltage drops to its half, what is up with
resistors values?
It is a matter of how much current flow you want, or can tolerate. With a 12 volt battery 2 each 1 ohm resistors is 2 ohms, so 6 amps of current will flow. 12*6 = 72 watts of power, wasted as heat.
With 1 K resistors things get much better. Only 6 mA of current flows for 72 mW of heat. Whether it is grounded or not does not affect current flow.
You must have some use for 1/2 the battery voltage, so decide based on what current your load consumes. |
H: Where/How should I fuse this transformer?
Background: I have a step-down transformer P241-5-36, which is a single mains primary coil to 36V Center Tapped (18-0-18) secondary. I would like to use this transformer to build a linear regulated dual rail (+15V/-15V) DC power supply for DIY synth work. I'd like for both me and the power supply to not be destroyed if I happen to accidentally produce a short circuit on the secondary side. The data sheet says for my particular transformer, "36V C.T. @ 0.35A" under the "Secondary RMS Rating" column.
Question:
Do I place a fuse on the primary or secondary coil, or both and should I use a 0.35A value fuse or something else? I think the fuse needs to be on the primary coil (though I'm not sure the value), but when the transformer spec identifies 0.35A at secondary, it is confusing me.
Research: I researched linear regulated power supply circuits and found the following schematics:
Example 1
Example 2
Example 3
While these schematics all to very different things, they all share a commonality in that they show a fuse on the primary side of the transformer. I read through this post asking general safety questions about a PSU schematic. That individual's schematic showed fuses on both the primary coil AND secondary sides.
Proposed Schematic: Here is the schematic I plan to use for my power supply (up to the linear voltage regulators). It is dependent upon the correct location and value of a fuse - I took a guess here:
simulate this circuit – Schematic created using CircuitLab
Please note: I included a switch to float ground because I may want to probe with my oscilloscope and connect the probe's ground clip to something other than ground on my circuits.
Thanks, EE Community.
AI: Your transformer has 0.35A rating for its secondaries (each). You can fuse those with a [say] 0.3A fuse each. (The center tap doesn't nee a fuse.) The fuse in the primary [if you want it] needs to be much smaller. For 115V primary, you have a turns ratio of about 3.20 (to both secondaries in series), so the max current in the primary is about 0.11A. A 100mA fuse should work there.
Beware that if put the secondary side fuses after the rectifier they need to be DC fuses. AC and DC fuses are not the same because the latter need to cut the arc while in the former it gets cut by the AC sinewave itself. |
H: Sound combination using op-amp
I work on a project where i need to combine sound that comes from audio jack input (let say from tablet) with a sound we create from an MCU with DAC. So it basically means I need to sum the sound of : right speaker + left speaker + DAC.
Please see examples of what we did so far (notice we didn't yet chose the resistors for the op-amp):
How do you recommend to do it?
Is op-amp is the right way?
Do I need an amplifier at the output before I connect the it to a speaker?
Can you advise on values for resistor/any other component/other solution?
I don't have much experiment in that area.
AI: A summing opamp is the correct way to do this. However, your current configuration is problematic: you have the positive input connected to ground, as well as the negative supply of the opamp. This means that your signals need to be ground referenced (have a center point around 0v), but the opamp can't output voltages below 0v, so half your waveforms will be clipped off.
To fix this, either connect the opamp's negative supply to a negative voltage rail, or bias your signals to VCC/2, and connect the opamp's positive input to a resistor divider that also provides VCC/2.
Whether or not you need another amplifier before a speaker depends on the speaker; a small speaker is likely within the capabilities of your opamp, though it may not behave ideally. If in doubt, find a suitable audio amplifier IC and connect it on the output. |
H: A philosophical question about amps
I'm flipping out because I cannot find the answer to this anywhere. It's wholly philosophical. In reference to the amps of power supplies/adapters:
If all that matters is that enough amps are supplied, why aren't all power supplies/adapters just built with something like 100 amps or maybe 10 amps?
Why have us running around wondering: "Does this supply enough amps?"?
Why do they not all just supply plenty
AI: Building excess capcity makes the device larger, heavier, and most importantly more expensive
it's not that an overpowered power supply can't run a low powered device, it's just that a correctly sized power supply is usually better suited.
sure you can charge a phone from a 5000A capable 5V supply, but finding an outlet to plug it in is tricky and the wheelbarrow to transport it is inconvenient, much better is a pocket sized 2A charger.... |
H: Timer + voltage level translation circuit
I'm looking for a digital circuit whose behavior I will describe in a moment. It has one digital input (5V logic) and two digital outputs (12V logic). I'll hereby refer to these levels as 0 and 1, but keeping in mind the voltage difference between input and output. This circuit has to be as cheap as possible, with simplicity the second priority.
Upon a rising edge on the input, the first output should immediately go to 0, while the value of the second output is irrelevant (don't care).
Upon a falling edge on the input, both outputs should immediately go to 1. After an interval of time (around 200 ms, up to 50% tolerance on the timing is still acceptable), the second output should go to 0.
I built a circuit for this that would work if the input was 12 V, but other considerations forced the voltage level on the input to 5 V. I already felt my solution was getting complicated for a 12 V input, and just piling on a level shifter from 5 to 12 V would further complicate this circuit, so I'm trying to start from scratch and think of a simpler solution.
I think posting my circuit here would be counterproductive, as the natural reaction would be trying to refine it, and I think a good solution demands some outside the box thinking, but I will edit the post to include the circuit if requested by anyone.
Edit: by request, here is the circuit:
simulate this circuit – Schematic created using CircuitLab
The NOT gates are Schmitt triggers (HCF40106 in my circuit), which is why the circuit doesn't work properly with a 5V input: 5V is not recognized as a high level signal when the Schmitt triggers are supplied with 12V.
To fix the 5V issue, I thought of passing the input through the following circuit, but as stated above, I believe this is getting more complicated than necessary:
simulate this circuit
AI: I've shown an LT1017 for convenience, but a cheap LM393 would work just as well, as would a cheap opamp, in which case you could eliminate the 10k pullups.
Also, both outputs swing between 12 volts and ground, but I've manipulated the plot for clarity.
The LTspice circuit list follows, just in case you want to play with the circuit.
Version 4
SHEET 1 880 680
WIRE 112 -16 -336 -16
WIRE 224 -16 112 -16
WIRE 352 -16 224 -16
WIRE 112 0 112 -16
WIRE 352 16 352 -16
WIRE 224 96 224 -16
WIRE -192 112 -224 112
WIRE 192 112 -192 112
WIRE 352 128 352 96
WIRE 352 128 256 128
WIRE 400 128 352 128
WIRE 112 144 112 80
WIRE 192 144 112 144
WIRE 224 192 224 160
WIRE 112 208 112 144
WIRE 144 208 112 208
WIRE 224 272 192 272
WIRE 352 272 224 272
WIRE 352 304 352 272
WIRE 224 384 224 272
WIRE 112 400 112 208
WIRE 192 400 112 400
WIRE 352 416 352 384
WIRE 352 416 256 416
WIRE 400 416 352 416
WIRE -224 432 -224 112
WIRE -176 432 -224 432
WIRE -64 432 -112 432
WIRE 32 432 -64 432
WIRE 192 432 32 432
WIRE -336 464 -336 -16
WIRE -304 464 -336 464
WIRE -64 480 -64 432
WIRE 112 480 112 400
WIRE -336 496 -336 464
WIRE -224 496 -224 432
WIRE 32 496 32 432
WIRE -336 608 -336 576
WIRE -224 608 -224 576
WIRE -224 608 -336 608
WIRE -64 608 -64 560
WIRE -64 608 -224 608
WIRE 32 608 32 560
WIRE 32 608 -64 608
WIRE 112 608 112 560
WIRE 112 608 32 608
WIRE 224 608 224 448
WIRE 224 608 112 608
WIRE -336 656 -336 608
FLAG 400 128 OUTA
FLAG 400 416 OUTB
FLAG 224 192 0
FLAG 144 208 2.0V
FLAG -336 656 0
FLAG 192 272 +12
FLAG -304 464 +12
FLAG -192 112 VIN
SYMBOL Comparators\\LT1017 224 128 R0
SYMATTR InstName U1
SYMBOL Comparators\\LT1017 224 416 R0
SYMATTR InstName U2
SYMBOL res 336 0 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 336 288 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res 96 -16 R0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL res 96 464 R0
SYMATTR InstName R4
SYMATTR Value 2k
SYMBOL diode -176 416 M90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res -80 464 R0
SYMATTR InstName R5
SYMATTR Value 1meg
SYMBOL cap 16 496 R0
SYMATTR InstName C1
SYMATTR Value 240n
SYMBOL voltage -224 480 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value PULSE(0 5 0 1u 1u 1 2)
SYMBOL voltage -336 480 R0
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V2
SYMATTR Value 12
TEXT -328 632 Left 2 !.tran 10 uic |
H: Write the truth table for this circuit
This is what I have, but I not sure if it's right. Can someone please help me. Thanks in advance
Q A B | Q(t+1)
0 0 0 | 1
0 0 1 | 0
0 1 0 | 0
0 1 1 | 1
1 0 0 | 0
1 0 1 | 1
1 1 0 | 1
1 1 1 | 0
AI: The table is not correct. It is roughly half right.
My suggestion is to start in each state (so with the inputs and Q as you show in your table), then work through from left to right seeing what happens. You can write on the diagram what level each wire is as you go.
For each state, you should work through once, then once you have the levels of each wire written down, work through it again based on the levels for the wires you have written down in the previous go (not the original values). In fact keep going through until none of the wires change value. The NAND gates at the end are a bit awkward as they change their inputs, so you have to recalculate until it settles.
Here is an example for the state when Q=0, A=0 and B=0. Each diagram shows one pass.
In the first diagram, the Red numbers are the inputs, the Green numbers are calculated during the pass. Another pass is required to make sure nothing has changed because the logic is not combinational - the outputs feed back into the circuit.
In the second diagram, I've worked through the circuit and calculated the values again for each gate (starting from the inputs and working forward). Notice how the value for Q changed, you will note that the value for Q is actually wrong in the first diagram because the inputs to that NAND gate have changed from whatever they were before this state was entered. Because a gate changed, we now need to recalculate a third time.
In the third diagram, I did another pass, and notice that now Q_bar has changed. Again because its inputs changed in our previous pass. You know what that means... need to recalculate again.
In the fourth pass, nothing changed. Yay, the circuit is stable, so we know what the new outputs are now.
In this circuit you shouldn't find this next situation, but in others you may... if when running through you discover that you have reached a state that you have been in before - e.g. if you do this analysis on a NOT gate connected back on itself - then you have formed an oscillator and you might as well stop because the circuit is never going to stabilise. |
H: Finding Filtered Output using Convolution property of Continuous Fourier Transform
why the derivative of u[t] is delta[t] ?
also I don't understand why the sin term disappeared once the derivative is taken.
AI: \$\delta (t)\$ is the unit impulse and is zero everywhere except at \$t=0\$, and \$sin\:(\omega _0 t)=0\$ at \$t=0\$. The product of these two is zero everywhere.
\$u(t)\$ is the unit step function and its derivative is infinite at \$t=0\$ and zero everywhere else, and this is the definition of the unit impulse. |
H: replacement for old capacitor
Can anyone identify a part number for this capacitor? It was removed from a Wells-Gardner 19K6101 X-Y color monitor deflection board, c. 1981. Notice that there are 3 leads, with the middle lead marked NC. The opposite side has "CE 85º C 17 (U)(V) JAPAN". I can't find anything like it on the ELAN web site. The only 3-lead cap this size I can find at all is a Nichicon ULB1H472M at tedss.com, but there's no info on the lead layout, and Nichicon doesn't list this part number on their website.
Is this part still available? Or do you know of a suitable replacement with the same lead layout?
update: [In response to Tom] looks like hot glue might be the way to go. There are some big holes next to the lead holes.
AI: In my comment I missed that you mentioned one of the pins is marked NC. That clears things up completely.
A capacitor is a two terminal device. On the one you have the third pin is marked N/C meaning, not connected (or no connect). On very large capacitors, adding a third terminal was done to give some mechanical support to reduce stress on the component leads caused by vibration. The third lead does nothing electrically speaking.
Basically what you need to do is find a standard two terminal \$4700\mathrm{uF}\$ capacitor rated for at least \$50\mathrm{V}\$ which has a similar spacing between the two important leads (the ones not marked N/C). Any will do, though ones with lower ESR ratings will perform better at smoothing out supply rails (in sensitive circuits the lower ESR could cause issues, but given it is an electrolytic capacitor, you probably won't find one that large with an ESR low enough to cause problems).
When you solder in the new component, be sure to use some potting compound to help provide the mechanical support that the third leg used to. Hot glue can be used, but unless you can get it to go through some holes somewhere nearby, or wrap over other components, it won't stay attached for long. You are better using something like silicone epoxy. If you use the search tool here, there are some questions about potting compounds. |
H: Buck regulator frequency
I am trying to use a buck regulator. Usually I make it use at its Max frequency and then just use it. But now, we want to go for Emi and emc certification. I am hence told that this switching (a few hundreds of kHz) can generate noise in the system. So what is the optimal frequency to prevent rfi or noise ?
AI: Hundreds of khz is not your biggest problem. You should worry about hundreds of mhz that are involved in switch rise time, boost capacitor charging, etc. It all, by the way, starts with good layout, which if you don't have, is the reason for EMI problems.
There are several simple rules to follow, i hope not to miss something.
Keep magnetic flux as constant as you can: try making inductor current flow almost same way when the switch is on and off.
Where you have pulsed current, make sure return parh is right near the line. Of course, the both paths must be very short. Consider ferrite for boost cap to limit bandwidth.
Prevent capacitive coupling with switching node by removing plane underneath.
2 is most tricky, so pay close attention to whe pulsed currents flow. Use capacitors to provide the pulses, where needed, mostly on switch input.
By the way, you should also use a nice common mode filter on your input to prevent conductive emission.
Good luck! |
H: Gate with 2 inputs, one being "select". If select is high, output is always low regardless of other input
I am tring to figure out how I can have some sort of module that can create the following scenario:
The module has two inputs and one output. One of the inputs is "select". If select is high, then the output of the module is always low. If select is low, then the output of the module will equal the state of the other input.
Here is the truth table for my desired module:
Here is the circuit I am trying to achieve this outcome with:
Subtract is the "select" input and each of the "overflow" inputs are the 2nd inputs. Therefore I need 3 of my desired modules where each of the XOR gates are. The XOR gates achieve what I want when "overflow" is high, but not when it is low.
I'm sure this is relatively easy to achieve but I just can't seem to think straight at the moment. I think that some type of flip-flop would be my best bet.
AI: Your truth table is implemented by ~SELECT & INPUT. Assuming you're re-using the same select line for all three instances, you need one inverter and three AND gates.
I think that some type of flip-flop would be my best bet.
A flip-flop has memory. Its output depends on both the inputs and the past state of the output.
Since your truth table doesn't depend on the past state of the output, there's no reason to think a flip-flop would be useful here. |
H: Ground properties viz power and digital
What is the difference between power ground and digital ground ?
What I understand is that the pgnd is the path through which the supply current discharges. Now the DGND, is the ground reference to the digital signals. How are they eventually connected ? Via a star connection ?
Another thing. If INA MCU we have 4 gnd pins which or rather how many will act as a pgnd and how many is dgnd ? Is there some logic in this ?
For eg - a signal from a gpio in an MCU will have a small current. This will travel via the gpio track into the other end and then go into the ground via ,say a and pin of that chip. So, which gnd pin will it take to discharge into the gnd plane ?
If ,say that other ic is an ic with just 1 gnd pin, how can it be classed ? So, pgnd and dgnd are quite loosely used and can be interchanged. In fact many chips have just 1 ground pin. So that pin is a power ground or a digital ground ? The way I see it, it serves as both. So this is a disadvantage as well. Because any noise on the supply rail can cause a ground imbalance. Likewise with digital part can dump a lot of noise on ground.
AI: Different grounds are a design choice. Depending on the expected currents and expected interference grounds are separated on chip and / or on PCB or even in a complete system (finished product). There are no rules to do it like this or like that to guarantee succes. A strategy is chosen at the design phase and that is implemented. Sometimes certain ground connections are prepared on a PCB and conmnected or left open in the final design depending on tests. Experienced engineers usually know which strategy to choose in a certain situation.
You worry too much about these things but have too little knowledge to understand why to choose which strategy. Why is this so important to you to understand this all now ? Some things require experience, this is one of them. Join a team with experienced engineers and learn from them. |
H: Choosing a Shunt Resistor for Low Current Applications
Is it possible to use a shunt monitor to measure current for low values(10 mA-100mA) and if is it possible, should I use low resistive values like in most of the power circuit applications? I know that I need low resistance because it shouldn't effect my load(I don't know the value of it but probably in the order of magnitude of M(\$ 10^6 \$)Ω) but from this pdf I learned that for my application I need a resistive value of 2kΩ(200V/100mA[estimated]). I am starting to getting confused because there are also other parameters like tolerance, temperature coefficient and type(wirewound, metal, smd etc.) and I do not know which one should I take into account.
I am sorry if I can not point the question clearly, but I am a bit lost!
Edit: I just noticed that I didn't tell about the application itself. It will be an I-V tracer for samples of SiO2 wafers etc. that can log current data(using the above configuration with an instrumentation amplifier) and voltage data with a daq.
Edit2: Also as Neutronned suggest I also add the pieces of information that can be needed:
Voltage range is 0-200V and the input impadance of the sourcemeter is bigger than 10GΩ as datasheet suggests.
AI: We need a couple of other pieces of information - what is the voltage range and input impedance of the method you'll be using to measure the voltage on the shunt resistor? I'll make a couple of assumptions and use those to calculate something close.
Let's that you're using an analog input on an Arduino (or other micro). These are very high impedance (megohms) and have a typical range of 0 to 5V. It sounds like the maximum current you expect to measure is 100mA, so you'd want the max current to be somewhere close to 5V. Ohm Law V = I x R or R = V / I or 5V / .1A or 50 ohms. So a 50 ohm resistor will develop 5V across it when 100mA is flowing.
If you're sticking with standard resistor values, a 47 ohm would work fine. |
H: Does movement along the imaginary axis of a root locus change the natural frequency?
I have two root locus plots (x-real, y-imaginary) of the same oscillating mode: (1) for a base case system and (2) a system with added feedback. They are so similar, almost identical that I am having a hard time interpreting it but the author comments that "the frequency of the mode has been hardly changed". So he concludes it has not been changed significantly but how can he tell? Is it because the root locus has not moved along the imaginary axis?
On a root locus, zeroes and poles are plotted. What could be changed about these zeroes and poles without changing the frequency of the mode?
AI: If a system has a pole at \$s = a + ib\$, then it has a response that looks like
$$
r(t) = e^{(a + ib)t} = e^{at}e^{ibt}
$$
If these poles have a complex part (ie: \$b \neq 0\$), then the pair of poles create a real response that looks like
$$
r(t) = e^{at} \sin(bt) \text{ or } e^{at} \cos(bt)
$$
To answer your question:
Moving the poles along the real axis doesn't change the response frequency. Instead, it changes how quickly the response decays.
Moving the poles along the imaginary axis changes how fast the response oscillates.
So, like the author suggests, if the imaginary part of the roots doesn't change, then the frequency doesn't change either. |
H: Help in finding capacitor and resistor value for discharging circuit
I'm newish to electronics and I am trying to make a circuit that charges a capacitor, then discharges it when a switch is closed. The signal then goes into a schmitt trigger to be cleaned up. The trigger I was thinking of getting is this
simulate this circuit – Schematic created using CircuitLab
My question is will this circuit work or have I screwed it up? Also how to I figure out the correct values of the capacitor and resistors? I want the capacitor to charge in around 20ms if that is possible. Thanks
AI: That'll work.
Assuming you want 'reasonable' values, choose R1 somewhere between 1k and 100 kohm. Choose C so that 0.7*R1*C is the time you need. Choose R2 << R1, but at least 10 ohm (to protect the switch from arcing when you use it to discharge the capacitor.
So to charge in 10 seconds (consider that a long time), choose R1 = 100k. Then C is (10/70k) = 150 uF.
Note that capacitors are not particularly accurate (neither is the schmitt trigger), so your results may vary. It's easier to modify R1 to adjust. |
H: Methods for removing solder from inside a header socket
While soldering a header socket I sometimes apply too much solder and it flows through, partially filling in one or two of the female sockets holes. This prevents the male headers from being inserted all the way. What are some methods for removing the solder from within?
I've tried to insert a jumper wire and then heat the wire with the soldering iron, but that did not seem to help. I do not own a solder sucker (yet), so I have not had a chance to try that yet.
Edit: I am attempting to remove the solder from within the header socket itself, not from the via/holes on the PCB.
AI: If I understand you correctly, the solder is inside the contact, not the solder hole, then there is no practical way to fix it.
Some headers use a forked contact, others use a hollow square. In both cases, the solder gets wicked up with Capillary Action.
Once inside, the heat and time needed to reflow the solder, and wick it up with any typical desoldering wick or desoldering sucker tool will melt the plastic of the header. You won't be able to get close enough with most soldering irons to do it.
Desolder the entire header, and replace it with a new one, using less solder of course. It's the only proper and practical way to do it. |
H: STM32 SPI2 doesn't respond correctly
I have a problem with the SPI2 on stm32f4vg board , I have a code that is working perfectly for spi1 , but when I change the code to run on spi2, the code doesn't respond
here is the original code which I found on this web site
http://easystm32.ru/interfaces/45-spi-interface-part-2
#include "stm32f4xx_gpio.h"
#include "stm32f4xx_rcc.h"
#include "stm32f4xx.h"
#include "stm32f4xx_it.h"
#include "stm32f4xx_spi.h"
#define LED_PORT GPIOD
#define LED_GREEN (1 << 12)
#define LED_RED (1 << 14)
int main (void) {
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
// Timing port with LEDs
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOD, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
// Pins with LEDs are configured as outputs
GPIO_InitStructure.GPIO_Pin = (LED_GREEN | LED_RED);
GPIO_Init (LED_PORT, & GPIO_InitStructure);
// Timing SPI1 module and port A
RCC_APB2PeriphClockCmd (RCC_APB2Periph_SPI1, ENABLE);
RCC_APB2PeriphClockCmd (RCC_APB1Periph_SPI2, ENABLE);
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOA, ENABLE);
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOC, ENABLE);
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOB, ENABLE);
// Set SPI1 legs for running alternate function
GPIO_PinAFConfig (GPIOA, GPIO_PinSource7, GPIO_AF_SPI1);
GPIO_PinAFConfig (GPIOA, GPIO_PinSource5, GPIO_AF_SPI1);
GPIO_PinAFConfig (GPIOA, GPIO_PinSource6, GPIO_AF_SPI1);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin =( GPIO_Pin_7 | GPIO_Pin_6 | GPIO_Pin_5);
GPIO_Init (GPIOA, & GPIO_InitStructure);
// fills the structure with the parameters SPI module
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; // full duplex
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; // pass 8 bits
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; // polarity and
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; // clock phase
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; // control the state of NSS software
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32; // prescaler SCK
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; // The first significant bit is sent
SPI_InitStructure.SPI_Mode = SPI_Mode_Master; // mode - master
*/
SPI_Init (SPI1, & SPI_InitStructure); // Set up the SPI1
SPI_Cmd (SPI1, ENABLE);
// Since the NSS signal is controlled by the software, install it in the unit
// If you reset it to zero, our SPI module will think
// we multimaster topology, and was stripped of his powers the wizard.
SPI_NSSInternalSoftwareConfig (SPI1, SPI_NSSInternalSoft_Set);
uint16_t data = 0;
while (1) {
SPI_I2S_SendData (SPI1, 0x93); // 0x93 bytes transferred through SPI1
while (SPI_I2S_GetFlagStatus (SPI1, SPI_I2S_FLAG_BSY) == SET) // The transmitter is busy?
; // means doing nothing
if (SPI_I2S_GetFlagStatus (SPI1, SPI_I2S_FLAG_BSY) == SET)
{// If the data came
data = SPI_I2S_ReceiveData (SPI1); // Read the received data
if (data == 0x93)
{// Came correct data?
GPIO_Write (LED_PORT, LED_GREEN);
}
else
{
GPIO_Write (LED_PORT, LED_RED);
}
}
}
}
Now the moment that I change spi1 with SPI2 , (the port mapping and pins also have to be changed as follows :
int main (void) {
GPIO_InitTypeDef GPIO_InitStructure;
SPI_InitTypeDef SPI_InitStructure;
// Timing port with LEDs
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOD, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
// Pins with LEDs are configured as outputs
GPIO_InitStructure.GPIO_Pin = (LED_GREEN | LED_RED);
GPIO_Init (LED_PORT, & GPIO_InitStructure);
// Timing SPI2 module and port B
RCC_APB2PeriphClockCmd (RCC_APB1Periph_SPI2, ENABLE);
RCC_AHB1PeriphClockCmd (RCC_AHB1Periph_GPIOB, ENABLE);
// Set SPI1 legs for running alternate function
GPIO_PinAFConfig (GPIOB, GPIO_PinSource13, GPIO_AF_SPI2);
GPIO_PinAFConfig (GPIOB, GPIO_PinSource14, GPIO_AF_SPI2);
GPIO_PinAFConfig (GPIOB, GPIO_PinSource15, GPIO_AF_SPI2);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Pin =( GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15);
GPIO_Init (GPIOB, & GPIO_InitStructure);
// fills the structure with the parameters SPI module
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; // full duplex
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; // pass 8 bits
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; // polarity and
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; // clock phase
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; // control the state of NSS software
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_32; // prescaler SCK
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; // The first significant bit is sent
SPI_InitStructure.SPI_Mode = SPI_Mode_Master; // mode - master
*/
SPI_Init (SPI2, & SPI_InitStructure); // Set up the SPI2
SPI_Cmd (SPI2, ENABLE);
// Since the NSS signal is controlled by the software, install it in the unit
// If you reset it to zero, our SPI module will think
// we multimaster topology, and was stripped of his powers the wizard.
SPI_NSSInternalSoftwareConfig (SPI2, SPI_NSSInternalSoft_Set);
uint16_t data = 0;
while (1) {
SPI_I2S_SendData (SPI2, 0x93); // 0x93 bytes transferred through SPI2
while (SPI_I2S_GetFlagStatus (SPI2, SPI_I2S_FLAG_BSY) == SET) // The transmitter is busy?
; // means doing nothing
if (SPI_I2S_GetFlagStatus (SPI2, SPI_I2S_FLAG_BSY) == SET)
{// If the data came
data = SPI_I2S_ReceiveData (SPI2); // Read the received data
if (data == 0x93)
{// Came correct data?
GPIO_Write (LED_PORT, LED_GREEN);
}
else
{
GPIO_Write (LED_PORT, LED_RED);
}
}
}
}
Please can any one help me understand what is the problem
AI: RCC_APB2PeriphClockCmd (RCC_APB1Periph_SPI2, ENABLE);
^^^^ ^^^^
See the mismatch here?
SPI2 is an APB1 peripheral, so you need to enable it using RCC_APB1PeriphClockCmd(). |
H: op amp emitter follower buffer offset
Hi, I'm using an emitter follower op-amp buffer with LM6132 and PN2222A. I'm expecting almost an exact follow?, as simulated with multisim. However, I'm getting an output offset of around 50mV at zero input. Reading LM6132 I should be able to swing to 0 with +/-5v supply. I'm wondering if it's an op amp input offset problem, I'll be testing this when I have access to an oscilloscope. Also, I'm using a DC-DC converter for my two rails, specifically 102-3333-1-ND, and I have yet to add input/output capacitors to the converter.
AI: The emitter follower can only source current, it cannot sink it*. The LM6132 has an input bias current of (typically) 110nA at room temperature. That current flows out of the op-amp input.
If you connect it to a 500K load to ground, you'll get around 50mV of output offset. To make this go away you could add an E-B resistor- something like 1K should work very well.
*If you had a -10V supply it would probably appear to work since the transistor E-B junction would break down. This is not a good thing. Even with your +/-5V supplies it would be a good idea to add a reverse-biased diode such as a 1N4148 across the E-B junction (in parallel with the resistor I mentioned above). |
H: Why is home voltage value higher during the night?
I have been monitoring the voltage in my own home (Mexico 120V 60Hz). I have been graphing the values every minute and I'm starting to notice that during the morning voltage gets up to 127, and during the day (4pm) it can go as low as 118V — why does this happen?
The effect is quite similar to when I turn on the microwave for short periods, however these variations from 118V to 127V happen slowly during the 24 hrs of the day.
AI: TL,DR; What you are seeing is primarily the result of reactive load droop sharing, with secondary loading voltage drops in the transformers and lines.
When generators run in parallel like they do to supply national grids, there are two mechanisms at play that largely go unnoticed by the local population.
Perhaps the most critical one is speed droop load sharing. It's actually pretty clever and fairly simple - every generator in parallel is programmed to have the same, predictable slow-down from no load to full load. This way if something large starts on the grid, all generators respond roughly equally, sharing the load in proportion to their full load ratings.
There is a bit more to this, of course. On a big grid, some generators like nuclear plants will be base load stations, and will hardly respond at all to these changes. On the other extreme are peaking stations like natural gas turbines, which can easily react very quickly to truly large shifts in grid loading. This kind of a set up makes the best use of both resources.
But this speed regulation trick doesn't help with reactive loading. In brief for those uninitiated, reactive load consists essentially of those back-and-forth exchanges of current between capacitive and inductive loads that do not result in the delivery of real power.
But we can use a similar trick by using a voltage droop regulator on the output of every generator on the grid. From no-load to full-load, every generator will have roughly the same drop in output voltage. People live and work in daily cycles, and as a whole bunch of inductive, motor operated loads start up, the grid voltage comes down a bit to keep things balanced. This usually hits hardest in the early evening, with a noticeable bump around breakfast time (usually).
These two systems work in concert to ensure that no single unit on the system ever absorbs an amount of real or reactive load that it can't handle (at least until something really unexpected happened). Of course, additional losses are incurred in steps between you and the grid, but I cannot give you exact proportions without detailed equipment information. |
H: What is a mesh/loop in a circuit?
I am a total beginner in electronics. I think it's apparently easy to identify all the concepts in the tutorials and books. The problem is that the concept is exemplified only a few times in simple circuits and when I try to analyze circuits "not didactic" I can not identify certain concepts, including the mesh / loop.
Everywhere says "meshes are closed paths between two points", "the voltage is divided between the mesh resistors!" but it seems very vague.
Ok, let's say a mesh is a closed path from A to B, but what if this path is cut by a branch, it will remain a closed path or become two spots?
In the examples I see only a square connecting the positive to the negative of the source but can not see it in larger circuits!
What is the easiest way to understand this?
AI: Think of a mesh as 'one possible path for current to flow'.
So in a circuit with many nodes there are many possible meshes or paths. But that doesn't mean that a mesh is exclusive, no, in fact you can make up meshes or paths from other paths that exist.
In mesh analysis though, its helpful to isolate each mesh so that the current around that path is unique.
Once you have identified each mesh, apply Kirchoffs Current law and Ohms law for each loop/path/mesh and solve the simultaneous equations to find all the different currents. |
H: output impedance without small signal model
For the mosfet in the figure below, we have:
1. routd = rds(1+gm*rs)
2. routs = (1/gm)*(1 + rd/rds)
Actually, it is not difficult to derive these formulas. However, is there an intuitive way to get this without drawing small signal model?
AI: Yes - there is another (intuitive) approach based on feedback theory.
As we know - the resistor Rs (I am using a large symbol because it is an ohmic resistive part) provides negative current-controlled voltage feedback. According to feedback theory, the output resistance in this case is always increased by the factor (1-loop gain LG).
For the given circuit the loop gain is LG=-gmRs and, as a result, we have r,out,d=r,ds(1+gmRs)=r,ds(1+Rs/r,e) with r,e=1/gm. The symbol r,e is used sometimes instead of 1/gm because 1/gm is the input resistance at the source node for common gate stages.
Similarly, we can find the expression for r,out,s if we replace Rs by Rd and r,e by r,ds. It is a bit uncommon to consider - as far as the output resistance at the source is concerned - the small feedback effect caused by Rd (small loop gain LG=-Rd/r,ds because r,ds is much larger). Nevertheless, that is the way we arrive at the given expression for r,out,s . |
H: Which RF Frequency and modulation is best
We are currently working on a project and we would like to get your advice about which RF frequency and modulation would be most suitable to use for our project.
The project is about a wrist that is use as a Home Detention system for prisonners in custody in their appartment.
We are thinking to use a low frequency device for the wrist item but we are worried about several things:
1./ Range , we need it around 50m radius
2./ Battery consumption of the wrist (we need it to work about 2-3 years)
3./ Accuracy of signal
4./ Concrete wall faraday cage effect
I would be happy if some RF specialist could give their opinion about which frequency range they would use, which protocol and which chip as well as some advice about antenna.
Thank you in advance for your help and wishing you a great day.
Regards
AI: More detail is required...
Your question is not specific enough because which frequency bands, output powers, and modulation schemes you are allowed to use varies from country-to-country.
Things like "Accuracy" don't mean anything in this context and range is a multi-dimensional relationship between frequency band, modulation scheme, environment, and output power.
In general...
Lower frequencies penetrate structures better and experience less interference in indoor/urban environments (ergo, they are typically considered longer-range for constant power, but this isn't necessarily the case for any specific design problem).
Lower frequencies require larger antennas and therefore larger devices (not good for wearable/carried devices)
Because of their excellent long-range (penetration) abilities, these low-frequency bands are the most heavily regulated and utilized world-wide. They are also the first to be used historically, so there is a longer tradition of regulation for these bands. |
H: common mode chokes and their selection
I am trying to select common mode chokes for a board that I am designing. The point of doubt is common mode and differential mode noise filtering and the parameters/values of the components selected.
Now, the system consist of the following - battery connected to my PCB via wires(Vcc and GND) of 20V or so, Buck regulator and the rest of the system.
Now, having long wires from the batteries I understand that there can be common mode noise that can creep into my system. So I am having a common mode choke (XFMR1). L1 and C1 will filter out differential noise.
I understand how these 3 work. Now, what purpose does C1 serve ?
Suppose my buck regulator supplies 4Amps,this would mean I will have to select a common mode choke greater than 4Amps rating,right ? Now, the common mode choke has the property of having a high impedance at specific frequencies. What frequency will my choke be of ? As it is coming from the battery and since the battery is connected to many other boards, it is difficult to zero in on a certain frequency,right ? How do I start about it please ?
simulate this circuit – Schematic created using CircuitLab
AI: C1 is your first line of defense against differential noise coupled onto your wires, and your last line of defense against your device sending signals out into the world on those wires. Twisting the two wires tightly will help with differential noise as well.
If your buck supplies 4 A, it does not necessarily draw 4 A (as a linear regulator would!). If you have a specification on its efficiency, and you have good knowledge of its operating point, you might get away with less. But 4 A should certainly be enough, so that is a good 1st point. If you can't get one you like rated at 4 A, then sharpen your pencil (so to speak) and figure out exactly how much current will be needed.
Regarding the frequency for the common mode choke, the best option is to build it without one and measure the noise. Then select one that is best suited for where noise is the worst. If that is not feasible, then just try to get it below your circuit operating frequencies.
Do you have a separate chassis / earth ground, or is your negative coming in grounded? |
H: ERROR:NgdBuild:604 using FIFO in VHDL
I would like to use a FIFO in VHDL, I used coregen to make it but when I want to use it into my project, I get this error :
ERROR:NgdBuild:604 - logical block 'U101' with type
'fifo_generator_v9_3' could not be resolved. A pin name misspelling
can cause this, a missing edif or ngc file, case mismatch between the
block name and the edif or ngc file name, or the misspelling of a type
name. Symbol 'fifo_generator_v9_3' is not supported in target
'spartan3a'.
I can't find where this error come from... Here's some parts of my code (those with the FIFO) :
component fifo_generator_v9_3 is
PORT (
M_CLK : IN STD_LOGIC;
rst : IN STD_LOGIC;
din : IN STD_LOGIC_VECTOR(17 DOWNTO 0);
wr_en : IN STD_LOGIC;
rd_en : IN STD_LOGIC;
dout : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
full : OUT STD_LOGIC;
empty : OUT STD_LOGIC
);
end component;
signal WRITE_EN, READ_EN, FIFO_FULL, FIFO_EMPTY : STD_LOGIC;
signal DATA_IN, DATA_OUT : STD_LOGIC_VECTOR(17 downto 0);
U101:fifo_generator_v9_3
port map (
M_CLK,
rst,
DATA_IN,
WRITE_EN,
READ_EN,
DATA_OUT,
FIFO_FULL,
FIFO_EMPTY
);
Q : Can someone tell me where that error come from (in my case) ? Is it possible that I'm missing a file? In that case, where can I find it?
Thanks in advance !
AI: Ok so the right answer was (as Brian Drummond said) that I needed to add the Coregen path to the search paths or I could move the fifo_generator9_3.ngc file to my project directory, I did the second one and it works ! |
H: Altering reference voltage of DAC
I'm making a circuit which requires an adjustable voltage gain (0 - 1).
I thought of using a multiplying DAC (R-2R type) with input voltage connected to its Vref pin. The input code to the DAC shall be adjusted using a micro-controller and once set, the input code loaded into the DAC shall remain unchanged. I expect the transfer function Vo/Vref to remain constant.
Can someone cite the disadvantages of this circuit? I plan to test it in the next couple of days.
AI: Works really well. Two small drawbacks:
The gain settings are on a linear scale, so minimum attenuation for an 8-bit MDAC is -48dB. For some applications this may not be enough. In an audio application I augmented it with a 20dB FET-switched gain stage and managed to get pretty close to 1dB per step from 0 to 60, except the bottom 4 steps (0 off, 1 -68dB, 2 -62dB etc).
At high frequencies (well above the audio range) , the internal network is quite complex and so frequency response will not be equally flat at different attenuation settings. I should add that an 8-bit MDAC has the advantage over a 12-bit one; not only is the latter more complex, but in order to meet higher accuracy requirements, it tends to use larger FETs with lower ON-resistance but higher parasitic capacitance so its high frequency performance may be inferior. |
H: It is better to fix x's in the simulation or in the design?
I have a question about how to deal with x's in Verilog netlist simulations. I have a disagreement with another engineer (who is a bit more senior than I am) about what the right approach is. Although this question might seem opinion based, I do think there is a right answer even if the views are divided.
I do development for mixed-signal ASICs. I'm doing netlist simulations of a microprocessor which doesn't have it's program registers reset (it's an ARM Cortex-M3, there is an option to not have the registers reset during synthesis).
We have a ROM which the processor starts executing from after reset. During that program execution, one program register (R6) has x's in it because it wasn't reset. At a point in the simulation, x's from that register spread like wildfire through the rest of the design, and breaks the simulation. We don't see this issue in RTL simulations.
I would prefer to make a design change to cause the registers to be reset or to have the ROM program write zeros to those registers first thing. My college is very resistant to making any design change to clear out these x's, and he would prefer to mask them in the simulation somehow.
His contention is that the "x's aren't real because x's don't exist in real hardware". He therefore concludes that the x's in the simulation aren't real, and that any design changes based on these is not a good thing, or at lest, way too extreme of a response.
My contention is that although it is undoubtedly true that x's don't exist in hardware, they represent unknown or unpredictable values. I believe the gate library models x's to propagate pessimistically. Therefore, if x's are propagating to kill the simulation, it suggests there could be a combination of bits that would cause a problem. Since that is a possibility, I don't see making a design change to clear the x's as being too extreme, even if I can't prove they are absolutely real. (I suppose I could try a search for the bad combination of bits, but that would be a lot of work.)
Now, I can imagine an answer that the right approach depends on the type of quality that is being developed here. But, I think that the design changes I've suggested (adding in the resets or clearing them in the program) cost very little (especially modifying the ROM program). I think that going through the process of masking the bits in the simulation would be much more labor intensive.
What could I be misunderstanding from his point-of-view? What is the best approach? Is it really so bad to make a design change for a problem you can't prove is absolutely real?
AI: I suppose it depends on where the x's are in the design.
Take an example communication scheme within the chip. You may want to pass data around between two components, but lets say not on every clock cycle. You might decide then to have a data bus and a valid signal. The valid signal says when the data is valid. Because of this, whenever the valid signal is low, the value of the data signal doesn't matter (because it is ignored).
In this example as long as the valid signal is never a don't-care, the design will never do anything unexpected. The data signal can be don't-care, it doesn't really matter, because you always know that there will be valid data (whatever it is) when the valid signal is high.
If the valid signal was ever don't-care, then you do have a problem. Why? because it means you have some scenario where you have no idea what will happen. This may or may not cause an issue, but boy is it a nightmare to track down.
So, with that in mind, it is my opinion that:
If you come across x's in a data bus, it isn't the end of the world, in reality you don't know what the data will be at any given time anyway.
If they appear in control signals it may or may not be bad, you don't know. In this situation you should run your simulation twice, once making sure that the don't care is forced to be 0, and a second time making sure it is a 1. This way you know what will happen in both cases.
If you cannot be certain (i.e. from the code you have written) that a don't care wont cause issues, then you should not ignore it, x is an unknown potential disaster. If you know that the value at any given point doesn't matter, then x is perfectly valid.
Also, all control registers, whatever they are for, should be initialised to a value at reset. An uninitialised control register at power on could be disastrous. Imagine you make a control system for launching nuclear weapons and didn't initialise the 'launch' register to 0. For all you know when you turn the power on you could start WW3. |
H: What if there are an odd number of twists in a twisted pair cable?
I am not an electrician, or a student of the field. I am a Network Engineer with a curiosity bug and that has recently taken me to exploring cabling and Twisted Pair specifically. I say this to plead that the answers be 'dumbed down' so that I can understand it ^_^.
I have just finally understood the reason why 100BASE-TX and 10BASE-T uses two wires (one pair) for TX and another two wires (another pair) for RX. I understand that across each pair, one wire transmits the original signal, and the other wire transmits the exact inverse.
I also just finally understood why the wires are twisted within the pair. Effectively, to allow ambient sources of Electromagnetic Interference (EMI) to affect both wire pairs equally, rather than one disproportionately to the other.
What lead me to understand it was this image, posted on ResearchGate.net on this Post by Dr. Ismat Aldmour:
I'll post his explination here as well, to avoid the risk of link rot:
I had to explain this to my students in networking once by drawing
something similar to the attached Figure. In Figure 1, for the case of
parallel pair, the interference causes the red wire (the closer to
interference source) more pick-up voltage (induced) per unit length (1
mV as example) while less induced (0,5mV) in the blue wire. Total
difference at the destination is 3mV. While in the twisted pair case
(Figure 2), total difference is 0V at destination because parts
(twists) of red and blue wires alternatively subjected to same level
of interference and thereby total difference at destination is 0V. I
drew this figure for this question hoping to use it in lecturing as
well. This is especially useful when teaching networking to
non-electrical engineering students who don't recognize terms of
impedance, differential mode noise terms, ...etc . By the way,
interference in twisted pairs comes mainly from signaling on other
pairs running together within the same cable which can have many of
them. Thanks. @AlDmour.
With the image and explination, I understand how the six, even twists cause for both wires in the pair to be equally affected by ambient EMI, and the net delta interference to end up at +0. My question is, What happens if there is an odd number of twists in the wire?
For instance, if one more half twist is added to the Figure 2 image above, the interference delta on the Red wire would be +1mV, and the interference delta on the Blue wire would be +0.5mV.
How does the receiving end compensate for that, and/or detect the EMI and determine what mV on each pair it can ignore?
AI: A even number of twists is better, but I am not aware of practical cable situations where this is worth the trouble: there are other sources of interference which are probably more important that the small difference it would make.
Another way to look at it: the amount of magnetic interference is proportional to the area between the two wires. With a perfect even number of twists the area is effectively zero. With an odd number of twists it is essentially one twist area. That is still a vast improvement over no twist at all :) |
H: PCB component-less debug port suggestions
I need around 8 connections in a PCB I'm designing for debug and on board programming. Originally I had this debug connection's footprint as a simple single in line with headers: http://www.jameco.com/Jameco/Products/ProdImag/164822.jpg
This port is going to be used just one time, so is a huge waste of material, space and money if I decide to mass produce this PCB. I was looking for some commercial solutions to get inspire and I found this: http://www.telexsus.com/products/tag-connect/tc2050-idc-nl
The idea is very smart, no components on the PCB, just an SMD footprint and 3 holes to keep align the cable contacts to the pcb. I will like to know if there are other component less solutions, specially DIY.
AI: I've designed two boards including this connector and would highly recommend it, yet the "original" design seems to be this one.
Advantages:
Zero parts cost
Boards can be programmed using a Flying Probe or ICT system for mass production and testing
For low quantity programming, you do not need to fully plug the key in. It's enough to tap it onto the board and keep it there until programmed & verified.
Disadvantages:
Limited cycle count of the needle adapter when you attach it multiple times to the board and detach it during debugging (the plastic things which stick it to the board might break some time)
It may require a litle more board space than a really small connector
Yes, I'm a hardware/software engineer so I also do debugging and can recommend it as well from a software engineer's point of view. |
H: FPGA + SRAM - floating inputs of SRAM during configuration of FPGA
I'm connecting SRAM to FPGA (Spartan 6). During configuration and during periods when FPGA will be down (for example I would like to turn off FPGA when external flash will be programmed by uC) address lines of SRAM will not be driven, thus floating - which is bad I guess.
I came up with the idea to use a transistor to turn on / off SRAM. As I have uC on the board, I can connect base of transistor (ex. BC817) to uC and its collector to Vcc and emitter to VCCs of SRAM so I would be able to turn off SRAM when FPGA is down and when it is configured and runnign I can turn on transistor and thus SRAM.
Do you think it will be ok? Is it good idea?
AI: Most of the Xilinx FPGAs have weal pull-ups that can be active before configuration. Just tie the HSWAPEN pin to ground. Floating pins for a brief period during power-on should not be a problem. |
H: Battery lifetime about a fifth what it should be
I have an esp8266-201 hooked up to an LM3671 buck converter breakout that is in turn connected to a 3x AAA battery pack.
The capacity of the battery pack should be at least 1200 mAh at 4.5 volts.
The apparatus draws about 100 mA while awake and about 0.175 mA while sleeping (taken with a multimeter), and it is programmed on a 60 s sleep, 3 s wake cycle. This corresponds to an average current draw should be 100*(3/63) + 0.175*(60/63) = ~5 mA.
The device only runs for approximately 2 days or about 48 hours meaning that it is registering an average current draw of 25 mA.
What is going on here?
EDIT:
I powered the device using batteries from the same pack as the ones that failed earlier. I made sure all the batteries had voltages of ~1.6 V before placing them in the pack. I loosely monitored the voltage of the battery pack over time.
N.B. I realized a flaw in my firmware was causing the ESP8266 to draw more power than needed for my application. I changed the settings and managed to about half the wake current to ~55 mA. The average current is now about 2.5 mA
Although I halved the wake current the device did not last twice as long. It ran exceptionally until about the 50 hour mark where it began to drop off quickly. Does this signify bad batteries or something else?
It seem like the batteries discharged in the manner that they should, they just exhibited a much lower mAh then they should. I am particularly perplexed that halving the current did not double the run time. What is happening here?
AI: What makes you think you're actually draining the batteries?
The batteries are not going to provide you with 4.5V all through the 1200 mAh of charge. The voltage is going to drop. According to your measurement(s) the battery pack drops to below (I assume) ~3.3V after two days of discharge. At which point your buck doesn't have anything to buck and the rest of your system browns out.
Try using a buck/boost to get more out of your battery pack. |
H: Fm receiver local VFO sa615
I'm building a FM receiver based on a SA615.
But when I test the VFO (variable frequency oscillator) with a spectrum analyzer and a sniffer probe I don't see any frequency showing up. So the oscillator isn't starting up.
The VFO circuit I made is composed of salvaged radio parts.
Like a fm radio tuning capacitor, and the coil of the radio's loc osc.
The circuit I use is this one:
Where VAR-CAP is connected to the FM tuning capacitor.
And OSC_OUT to pin 3 of the sa615 (emmiter) and OSC_IN to pin 4 (base).
My circuit is based on following examples: and this
I hope someone can give me some tips or see whats wrong with it.
Thanks in advance!
AI: You have in and out the wrong way round. It's meant to be a colpitts oscillator. |
H: Dependent and independent KCL equations
Can someone explain what dependent and independent KCL equations mean to us, and how we can determine what is number of dependent/independent equations? I am reading about KCL and they said:
I don't understand this part: This in turn shows that the four KCL equations are dependent? What that dependent means to us when we have 4 KCL equations?
AI: If you have a network with n nodes, there will be \$n-1\$ independent KCL equations.
That means the KCL equations alone are not sufficient to produce a unique solution to the circuit. One more equation is required to produce a solvable set of equations.
Normally, the one additional equation is produced by designating one of the nodes as the "ground" node, and arbitrarily choosing that its potential will be considered as 0 V. |
H: common mode ground and its connection to main ground
I am trying to understand concepts in common mode voltage and EMI due to it. Now, I understand that differential mode is the difference between the P and N wires/signals. The common mode is the - (P+N)/2.This is w.r.t ground. Now, the common mode currents are induced due to noise generated via long wires that are connected to PCBs(that carried signals or power).
Now, the common mode current is dumped into the ground and thus making my ground noisy. Now my doubts are the following -
Common mode noise is generated in power lines(Vcc and GND) or in differential signal lines(RS422,485) or in both ?
If common mode noise is dumped into my ground and if I have a common ground my whole ground will be corrupted,right?
How should the common mode ground be coupled to my main GND plane ?
Also, I have long wires bringingin in Vcc,GND,and RS422 signals. So, where all should I put common mode chokes to filter common mode noise ?
AI: This is a thought experiment and something to think about rather than an answer to the direct questions. I believe that thinking about various scenarios like this is more helpful to the learning process than trying to focus on the specific questions raised.
So, if you had a small battery powered circuit that flashed an LED on and off a few times per second and then, with a wire, you connected the ground of that circuit to the live AC wire in your wall outlet what would you expect to see?
Would you expect to see the LED fry?
Would you expect to see the LED start flashing randomly?
Would you expect to see the LED carry on as if nothing had happened?
For the 2nd experiment, using the same battery and LED flasher circuit, if you routed your AC live wire through the 0V connections on your flasher and out to a 60 watt lightbulb that connected back to neutral would the flasher continue to operate without a hitch?
In both experiments I have tried to demonstrate a common-mode (or probably better stated as a longitudanal interference) problem and the first experiment was the ability of the LED flasher to deal with a common mode voltage and the 2nd experiment was dealing with common mode currents passing through the 0V in the flasher (as well as the common mode voltage being present).
You should think about this. What would be the bad practises that would make the LED flasher either die/fry or run intermittantly? This last question is a bit more searching but at the heart of it is the ability of the flasher circuit to cope with electric field gradients and magnetic field induction. You don't need to worry about this last bit yet, just concentrate on the two scenarios. Hope this helps. |
H: TIM 2 PWM Input on different pin STM32F072B Discovery
I'm trying to change the pin, that is connected to TIM2 in PWM Input mode for frequency measurement.
I just compiled the example, tested it and it works on pin PB03, however, when I try to change the pin to anything else, e.g. PB4, or PA10 the pin doesn't connect to the Timer at all. (Tried through debug.)
I
The setup code: //The only changes are in the GPIOConf
static void TIM_Config(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
TIM_ICInitTypeDef TIM_ICInitStructure;
/* TIM2 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
/* GPIOB clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); //Change here, to GPIOA
/* TIM2 chennel2 configuration : PB.03 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; //Change here, to pin 10
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
GPIO_Init(GPIOA, &GPIO_InitStructure); //Change to GPIOA
/* Connect TIM pin to AF2 */
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_2); //And change to pin 10
/* Enable the TIM2 global Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
/* ---------------------------------------------------------------------------
TIM2 configuration: PWM Input mode
The external signal is connected to TIM2 CH2 pin (PB.03)
TIM2 CCR2 is used to compute the frequency value
TIM2 CCR1 is used to compute the duty cycle value
In this example TIM2 input clock (TIM2CLK) is set to APB1 clock (PCLK1), since
APB1 prescaler is set to 1.
TIM2CLK = PCLK1 = HCLK = SystemCoreClock
External Signal Frequency = SystemCoreClock / TIM2_CCR2 in Hz.
External Signal DutyCycle = (TIM2_CCR1*100)/(TIM2_CCR2) in %.
Note:
SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f0xx.c file.
Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate()
function to update SystemCoreClock variable value. Otherwise, any configuration
based on this variable will be incorrect.
--------------------------------------------------------------------------- */
TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;
TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
TIM_ICInitStructure.TIM_ICFilter = 0x0;
TIM_PWMIConfig(TIM2, &TIM_ICInitStructure);
/* Select the TIM2 Input Trigger: TI2FP2 */
TIM_SelectInputTrigger(TIM2, TIM_TS_TI2FP2);
/* Select the slave Mode: Reset Mode */
TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Reset);
TIM_SelectMasterSlaveMode(TIM2,TIM_MasterSlaveMode_Enable);
/* TIM enable counter */
TIM_Cmd(TIM2, ENABLE);
/* Enable the CC2 Interrupt Request */
TIM_ITConfig(TIM2, TIM_IT_CC2, ENABLE);
}
And the Interrupt code: //I have changed nothing in it
void TIM2_IRQHandler(void)
{
/* Clear TIM2 Capture compare interrupt pending bit */
TIM_ClearITPendingBit(TIM2, TIM_IT_CC2);
/* Get the Input Capture value */
IC2Value = TIM_GetCapture2(TIM2);
if (IC2Value != 0)
{
/* Duty cycle computation */
DutyCycle = (TIM_GetCapture1(TIM2) * 100) / IC2Value;
/* Frequency computation */
Frequency = SystemCoreClock / IC2Value;
}
else
{
DutyCycle = 0;
Frequency = 0;
}
}
From my understanding, everything regarding the connection to the pin should be done by the pin AF mode 2 - which should connect it to TIM2, but this apparently doesn't happen.
I'm using the STM32F072B-DISCO, and KEIL v5
It is all from the default STM32CubeFW examples, and the project can be found under STM32F072B-Discovery_FW_V1.0.1\Projects\Peripheral_Examples\TIM|PWMInput\
Thank you for any help.
AI: This is because only specific pins of each port can have a function, in this case the Timer2_Channel2 is assignable only to PB3, and PA1 on this specific processor (STM32F072xB); see page ~43 on http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00090510.pdf
Thus the pins did correctly configure as input, however they did not connect to the timer.
Its a little sad that this doesn't have static control. |
H: Does leaving empty PCB holes filled with solder matter?
If I was soldering and I accidentally filled an unnecessary hole on my PCB with solder, is that a problem or can I just leave it filled?
Thank you for answering this ! All help is appreciated!
(And yes, I do know this is a beginner question. That's because I'm a beginner.)
AI: No, it is not an issue.
In a (huge) quantity production setting you might think about the wasted material (and there's that rumor about the mass fraction of the Saturn V) but for an ordinary prototype it should make no difference.
Should you later decide you wish to put a component lead or wire there, you may need to clean out the hole with flux and desolder braid, or some other method of your choice. |
H: Protect circuit from current generated by backdriving DC motor
In our application we have two modes of vehicle operation: manual and autonomous. Meaning that when vehicle is operated autonomously we control a brushed DC-motor using an H-bridge. In manual mode we don't control it, DC motor will see high impedance on its leads and can be backdriven. So in manual mode we want as less resistance as possible to backdrive the motor and we want to protect our circuitry from charge generated by the motor and the motor itself. Is there a common practice for that?
Below is the relevant part of the circuitry that we are going to use to drive the motor, it consists of a gate driver and an H-bridge.
AI: Basically you need a diode in series with the supply to the motor -- that will prevent the motor from supplying power back to the supply.
Trouble is the diode will drop 0.7 V and will dissipate power -- you can use a MOSFET in the supply or GND connection and drive it on when the motor is on, and off when the motor is off. You'll have to connect that FET with drain & source backwards from normal usage. |
H: How op amp works?
If I ground the V- input from a 741 op amp, I still need a trimpot connected with the offset null terminals as pictured below to regulate the output?
(source: learningaboutelectronics.com)
AI: That basically won't work. With no feedback, the output will be wildly noisy and drifty, and you won't be able to get a stable output. The output will basically be the open loop gain (typically about 200,000) times both the input offset and noise. An LM741, for instance, has a typical thermal drift of 15 uV/deg C, which will produce an output drift of 3 volts per degree C. |
H: Recommended 2.5V common mode?
I'm using the ADS1675 ADC in a project of mine. It has a differential input which is +/- 3V. I'm confused by the datasheet that says the recommended common mode voltage is 2.5V. Why would you want a common mode voltage in a differential signal? And this is essentially just a DC offset right, so the actual input range relative to the ADC ground will be between -.5V and +5.5V?
So essentially I will need to add a 2.5V supply or reference and use that as ground for the input stage as in the picture below?
Also they use -4V and 9V as the amplifier rails. I get that this is like +/- 6.5V raised by 2.5V.. So would I just use the 2.5V reference as ground for a +/- 6.5V supply?
AI: The ADS1675 is a high speed ADC which runs of a \$5\mathrm{V}\$ Single-Ended power supply. If you note the following tables from the datasheet:
The differential input must be referenced to mid point of the supply rails which in this case requires a common mode voltage of \$2.5\mathrm{V}\$.
You then have an input full scale range of \$\pm3\mathrm{V}\$. I can only presume there is some attenuation internally which means that this full scale range is brought to within the specs of the device (need to clear that up with some more reading).
The circuit you show is for a THS4503 which is a high speed fully differential amplifier. The purpose of this is to either buffer or amplify the incoming signal to the full scale range of the ADC, and critically to drive the sample/hold capacitance of the ADC input.
Because of the high speed, you need a pretty strong driver to ensure that the capacitance of the sample capacitor in the ADC is driven quickly to the level of the incoming signal. This requires a fairly high current to drive the capacitor at high frequencies. So if you have a weak signal source it is important to amplify it before driving the ADC. |
H: analogue and digital ground connection
I have been reading up on grounding and what is AGND and DGND i.e / analogue ground and digital ground respectively. Suppose , I have an ADC chip and a MCU in a PCB. Now, previously I would have a ground plane beneath them and split them into Analogue ground and digital ground. I have now realised that splitting the ground planes will be detrimental to my return path at higher frequencies of the signal.
So, the best way is to have a single ground plane or have 2 different ground plane which is connected by a ferrite bead. Then during layout remove this bead to have a thin connection between the 2 grounds.
But, this approach has an issue according to me, which might be wrong. Will this thin line not act as a sort of high impedance that blocks currents thereby making the 2 grounds at 2 different potentials ?
AI: Don't split your grounds. Drop the word split altogether. Instead, use partition. Partition your grounds.
As the previous answers have stated, the purpose of this is to keep noisy digital currents away from the analog. So you partition your board, and keep all digital traces in one area, and keep analog in another.
The use of ferrite beads on PCB to seperate grounds is a hack. Dan Beeker (Freescale) and Rick Hartley have both both expressed that ferrites are for people who do not know what they are doing. Be aware of where your currents are, and you wouldn't need to use any ferrites at all.
So keep a single plane, but partition your board such that analog signals are kept away from digital. It helps alot if the IC has pinouts which make this easy.
There some good information from Henry Ott
http://www.hottconsultants.com/techtips/split-gnd-plane.html
If you look at the following image
You can see that the board has been partitioned. To minimize any potential leakage, or stray feilds, there are cuts in the ground plane. This creates bridges that go from analog to digital grounds. This is ok so long as the routing ensures that no trace passes over such gaps. |
H: Voltage Drop across an LED
I'm having a little trouble understanding as to what the voltage drop across an LED actually does in terms of the electrons. I understand that the potential difference across an LED causes the electrons to move and then undergo recombination to emit light, but why does it only happen significantly at a certain potential difference. What happens at lower potentials?
AI: An LED is a diode. A diode is a semiconductor. At potentials lower than the forward biased voltage drop, very little current would be flowing. As the potential rises, more current is able to pass through (exponentially).
For more information, research semiconductor doping. |
H: Is it possible to regenerate lead-acid battery kept always charged?
I have a APC Back-UPS 280 I use for my server at home, and since power rarely fails, it is barely used. It only keeps the battery charged. The battery is 12 V, 7 Ah.
After about 18 months it started signaling battery to be replaced and I'm surprised, since it is a very short time. A APC Smart-UPS I also have has been going well for no less than 3 years, that is what I expected from the other one as well. Maybe the battery is of lower quality on the Back-UPS (neither of them is original).
Is it possible that the early failure depends on lack of "priming"? Maybe I could discharge the weak battery at 1 A (0.15 C) down to 11.8 V and recharge it to 14.0 V two or three times with an external charger.
Update
After reading the datasheet and the datasheet of a similar cell I found that the battery can stay continuously charged without the need of discharge cycles to maintain its capacity. The lack of discharge cycles was not the issue. The temperature inside the UPS could have caused a shorter life, but that much.
I opened the cap and I checked inside. I could see the gel but in one cell the gell appeared drier. I tried to add some liquid to that and to other cells and I connected a 2.5 A load to discharge the battery before recharging it. The initially drier cell was the only one gassing.
After flooding at this point all the cells (there was nothing to lose) I charged it with the UPS, to equalise the cells. When complete (5 hours, it was already mostly charged) I connected an even higher load (5 A) and now no gassing in any cell (as I said, they are all flooded now). It held 5 minutes without issues and with the expected voltage decrease as from the datasheet. The UPS now recognises the battery as good. I guess one cell was weaker and gassed during charge, resulting in drier gel and poorer performances.
I also made some ventilation holes in the case of the UPS.
AI: Even if you're not charging/discharging them these lead-acid batteries age and need to be replaced after some time.
You can discharge it and see if it still has some capacity left. If not or not enough, better replace it because when the power fails and you need it, it will not be able to provide the power needed. |
H: Have I reached maximum current on my Arduino?
I'm wrapping my head around my electronics theory (it's been a long while).
I've read that the max current from the 5v VCC pin on the Arduino Uno is 200ma before any damage is done.
I'm using an Adafruit NeoPixel 24 LED ring. Based on this page, each LED draws up to 60mA at full brightness. If I max each LED out that's 1440ma of current required.
I (foolishly as I now know) have been running all pixels at white on full brightness directly from the Arduino. Measuring the current (serially) on the ground line, there was roughly 315mA flowing in the circuit.
My question is, is the Arduino managing to get the circuit up to 315mA but from that point cannot provide anymore current? Is this is then the absolute non documented maximum that my Arduino can provide?
Further to that, does that mean I've been damaging the Arduino?
AI: Yes, you are slowly damaging it. Each output is guaranteed to supply up to 20 mA and you're exceeding that. You noticed that it does work. It will not work for the 10 years lifetime the manufacturer guarantees if you observe the max ratings. So it might fail sooner or later.
The Arduino can probably provide even more current but it's lifetime will decrease dramatically. For example you might get 5 years at 300 mA but only 1 month at 500 mA. This is just my guess !
What the max current will be in your implementation depends on the supply voltage and the LEDs. The switches in the Arduino have some resistance and these now limit the current somewhat. But this is no good as that also means extra heat dissipation ! And heat decreases lifetime.
If you want your contraption to last a long time: do not exceed the max ratings ! So use some MOSFETs to do the heavy work. The SI2301 and AO3400 are MOSFETs that can easily handle the current and can be easily controlled from the Arduino. Oh, and they're also cheap on ebay. |
H: Si4012 loop antenna question
I don't get how the antenna design on page 8 of the datasheet is suppose to work. I know that the feed trace from VDD works as an inductor at high frequencies, but how do I design an antenna like this on my PCB ?
Do I just draw one, and hope for the best, when I get the PCB back from manufacture, and start to measure the antenna impedance, or is there some design rules that will help me get best possible efficiency ?
https://www.silabs.com/Support%20Documents/TechnicalDocs/Si4012.pdf
AI: Not being much of an antenna designer the way I normally go about it is to copy a reference design which most RF chip-set manufacturers have available. If you go to the Si4012 Page page and look under the Tools tab you'll see reference designs for 434, 868 and 915 MHz antennas at the bottom of the page. Those files contain PDF and Gerber files containing a variety of designs:
You'll also want to read the AN727: Si4012 Antenna Interface and Matching Network Guide that includes worked out matching values on page six for common frequencies. If you need to design your own antenna or want some more detailed information about it they have the following application note that describes the design process in greater detail:
AN639: Design of Printed Trace Differential Loop Antennas
I noticed on the tools page they have the complete designs for 434 and 915 MHz TX PICO boards that would be worth a look. It also looks as though they're available as development boards at reasonable prices which might be worth considering so you can evaluate them initially and have a known good design for comparison. |
H: How to read large number of analog-in fast and effectively with Arduino-Compatible Hardware
I need to read the analog values of up to 50 analog light reflection sensors which are used to determine distance to a specific object with an Arduino-compatible Microcontroller such as:
Arduino Due with the Atmel SAM3X8E CPU
Arduino Zero with ATSAMD21G18, 32-Bit ARM Cortex M0+ CPU
But when thinking about my idea I come up with quite some questions I can't really answer myself:
My first Idea was to use several ATSAMD21G18 to read a bunch of 6 analog devices. But that would end up in having at least 9 ATSAMD21G18 and in having to connect them with SPI or I2C.
So I thought of using several analog Multiplexer/Demultiplexer like the 4067 instead. Even this would end up in multiple units of the 4067 but I could use a single Arduino Due / Zero.
My concerns however are that the 4067 does not switch the analog inputs fast enough for my needs. I really would like to read all those analog values as fast as possible. How fast would a 4067 be in this application?
And also. Using the 4067 I have to use digital I/Os to set the input channel of the 4067. Can I wire them in parallel so that I would be able to share the digital I/Os with every single 4067?
And also does the length of the circuit affect the readings when having to deal with distances between the 4067 and the Arduino of about 50cm?
AI: In general, multiplex in digital, not analog. Someplace somewhere you're going to have 50 separate signals. Whether these go into a bunch of analog muxes then a small number of A/Ds, or into a bunch of A/Ds and a small number of digital ports doesn't change the complexity much.
You need to get your priorities straight. You don't do these kinds of things by picking the microcontroller first, then figuring how to kludge stuff on to eventually do what you want despite the micro. You start with the requirements, then pick a suitable micro.
Your logic for dismissing one digital muxing approach makes no sense:
But that would end up in having at least 9 ATSAMD21G18 and in having to connect them with SPI or I2C.
Um, OK, but how is that a problem? Again, you're going to have 50 separate pins somewhere somehow. Having these be inputs to a bunch of 8-channel (or whatever) A/Ds sounds like a reasonable approach. Then using SPI to mux the data from those chips sounds quite reasonable. Other than dismissing this, you haven't actually given any reason why this isn't a reasonable approach. |
H: Switching power to a slave module without wasting power
I've got two circuit modules, let's call them master and slave.
The master controls whether the slave is powered (5V and 3V3 rails). Both modules share the same power supply. The slave will be built by somebody else, so I'm planning to use a LTC4217 hot swap controller IC to protect the master from any faults on the slave.
From reading through the LTC4217's datasheet I couldn't find a simple way of using a microcontroller to switch its output on or off. Perhaps there is an obvious example that you can think of though!
Instead, I'm trying to find an alternative method. The slave will be on the vast majority of the time, and the master will be switching it off for approx 0.25s every few minutes.
MOSFETs seem ideal, however they seem generally used to switching things on momentarily - i.e. normally off. My slave is normally on. I've heard that 'depletion mode' MOSFETs could be a potential solution but I am not knowledgeable with regards to them.
Am I overthinking this? Is there some simple normally used solution staring me in the face?
Cheers.
AI: You can use the hot swap controller and use the UVLO (under-voltage-lock-out) input pin to turn the output off to your slave. You have to be aware the current limit setting used because this can cause your slave to power up a little bit slowly - it all depends on load capacitance and the current limit value.
BTW it uses a MOSFET. |
H: Wavelength and PCB trace
I was thinking of ac signals recently and I am trying to visualize wavelength of an AC signal. If I take a 30KHz signal, the wavelength of this is 10Km which is a super long distance. Can someone tell me how this wave will travel in a standard wire or a trace (of say 10cm)?
I can understand that the signal cycles 30,000 times in a second but I am not able to visualize how it would travel say 10cm. I am sure I am thinking this all wrong and would like some inputs on it.
Thanks
AI: Finite velocity effects
When an electromagnetic wave propagates, it does at a finite velocity. This is evident when the distance covered is comparable to the wavelength.
In what way it reveals? Along the section considered, the field variations are observed.
When the distance is much smaller than the wavelength, the finite velocity of propagation does not matter. The effect of the disturbance fields, is "instant" for all points of the section considered.
Taking the example that you propose, for a wave of 30 kHz, the wavelength is 10 km. This means that at 10 km, you can measure the field variation as a function of distance because it is evident that the wave does not spread instantly.
For a length of 10 cm, the effect of the field is observed "instantaneously" at all points. |
H: Current mirror improvement by adding resistors
One of the limitations of the current mirror with 2 BJTs is the Early effect. According to the Art of Electronics 2nd Ed., adding emitter resistors should make the circuit "a far better current source" (picture left), but I cannot see any significant difference with the circuit on the right side of the picture in terms of current stability due to Early effect. Is there any better or more formal explanation why the former circuit is preferred?
simulate this circuit – Schematic created using CircuitLab
AI: Early effect on the output current is helped by emitter degeneration- it's negative feedback so it increases the output resistance. I have used this to produce some precise current ramps that would not be possible using an ordinary op-amp (too fast for the op-amp to respond).
If there is a tiny difference, a fraction of a degree C, between the junctions of Q3 and Q4 you will see a large difference in the collector currents. The Vbe will not be perfectly matched to begin with either. This is much less of a problem when the transistors are part of a monolithic circuit (inherently matched) and are side-by side (or perhaps consist of multiple transistors interleaved physically and electrically in parallel pairs). Still there will usually be some difference in power dissipation between the two transistors so that will cause a gradient and some Vbe change.
For example, if the collector current is 1mA, the transconductance of the transistors will be about 0.04 mho at room temperature, so 2.5mV difference in Vbe (about 1°C) would cause about a 10% error in the collector current. Beta has a relatively small effect (assuming the transistors have a beta in the hundreds).
The Early effect will cause a reduction in the output resistance. Since the Early voltage is normally ~100V (see SPICE models for the relevant parts) the output resistance will be about 100K\$\Omega\$ in this case, so pretty good. With the emitter resistors as shown it will be several M\$\Omega\$.
Early effect can be combated by using the 4-transistor improved Wilson current mirror configuration. With discrete parts and for low frequencies, it's easier to just throw an op-amp at it.
Check out the hybrid-pi model for more insight, and try some sims with a small base voltage added to one of the transistors. |
H: Eagle - Oval pad
How to make a through hole pad other than circular shape in Eagle?
I need an elongated circle / elliptical sort of pad. This is the best I could achieve:
This is what I did:
1) Made polygons on Pad layer, tStop layer and bStop layer.
2) Made a cutout polygon on Dimensions layer.
However I was unable to connect a pin to this while making the device. So, I added 4 pads so that their drill overlapped exactly with the area I wanted to be removed from my elongated pad. (I needed 1 pin to be connected to this but I added 4 pads so that their drills will ensure that whole central area gets removed even in case fab house doesn't make the cutout on dimension layer.)
I'm still not sure this will work though. Is there any better way to make a pad with elongated / square / random shaped drill?
AI: Place the pad. Right click on it and open its properties. In the drop down menu for "shape", select "long".
Now you have a long pad.
If you also need the hole in the pad to be non-circular then you have to either make a cutout or a mill callout.
Cutout
Use the "cut out" layer to draw the shape you need. With the board shop I work with, at least, the minimum width of the cut-out is 100 mils.
The easiest way to do this is to draw a 100 mil wide line where you want your cut-out. You can either select the "cut out" layer before drawing the line or move it to that layer after it's drawn. It'll look something like this:
A full tutorial (where this image is from) is available at OSH Park, who will also make the boards for you rather inexpensively.
If this won't work for you, contact the board house you plan to use and ask them how they want such a feature specified. For instance, if you need the cutout to be less than 100 mils wide, or you need it to be plated, ask your board house.
Mill Callout
As described on the linked guide. A mill call out is a box drawn around a drill hole on the "mill" layer. Again, you'll need to check with the boardhouse on what exactly they'll do with the callouts you've made, there is a chance they'll simply ignore them. |
H: RFM69W transceiver - Poor range
I'm having some difficulties with the RFM69W radio transceiver using Arduino Unos with the recommended RadioHead library. I have 2 Unos - each with one RFM69W - successfully sending and receiving messages, however I'm unable to get more than a few meters in range (open air).
All my research is coming up with the RFM69W being able to reach at least 100m, which I'm assuming requires tweaking of the configuration. The non high-powered (HW) version I'm using allows a max Tx power of +13. I've tried changing the data rate to the lowest possible - 2kbps @ 5kHz, which may have gained me an extra meter in open air. I've confirmed my wiring is correct against multiple schematics. I do not, however, have any sort of antenna connected to neither the trasmitting RFM69W nor the receiving.
Does anyone have experience tweaking these RFM69Ws to achieve the ranges I'm reading about everywhere? Would adding an antenna - even just a simple piece of wire - really improve my current few meters to 100+?
AI: RFM69W apparently doesn't have an integrated antenna, which you definitely need to improve the range.
A wire antenna with the correct length would already improve the range for sure, however, I don't think that you can reach that 100m+ with it. There are different antenna types which could be used but connecting an antenna to an RF module is not as trivial as it sounds first. (Search for impedance matching) |
H: Soldering a male-female bus connector
'Stackable bus connectors' are common nowadays on Arduino and other boards where a single connector has both the male pins (for the board below) and female sockets (for the board above)
In DIY sites there are instructions on how to solder these to the board. This isn't tooo hard.
But what do you do when you have a PC104+ 4x30 (120 pin) connector?
Soldering these by hand isn't easy and very time consuming but possible.
BUT, what do you do in mass production? you can't move these connectors through wave soldering as solder will get attached to the male pins and you can't have paste on the holes.
Any ideas on how this is done? I have a hard time believing this is done by hand. In the past there were press-fit connectors (still available today) but these are rare and quite expensive.
AI: So to summarize what I said in comments, the big manufacturers like TE and 3M make these in press-fit and "common" wave soldering version. 3M doesn't actually say much about the soldering process (at least in here, just "230°C for 60 seconds, 260°C for 10 seconds"), but TE goes in more detail besides specifying 260C and they recommend "Corpane Batch Vapor Phase (Model VVP 10 BU) and Vitronics IR (Model SMD 718) equipment", FWIW. As an aside, TE also sells presses (both manual and pneumatic) for their press-fit variants.
Teka makes a "self-soldering" version of these for reflow, which comes with solder balls pre-attached, and they have a more detailed article in which they compare their innovation with the alternatives. They recommended
Since both the solder and flux (in the form of the solder clip) and the connector are placed on the PCB at the same time, all that is required for reflow is the application of localized heat. This can be accomplished with the use of a benchtop hot-air fountain such as the one produced by
Zephyrtronics. (Pomona CA, http://www.zeph.com/pc104) |
H: How is a Twisted Pair's +-2.5v used to send a 1 or a 0?
This is a multi-part question that I'm asking as a follow on to this answer from my other question.
I know 100BASE-TX transmits through a pair of wires, that are twisted around each other so that the effective of ambient EMI affects them both identically (for the most part). I know that the signal is sent through one wire (TX+), and the exact opposite signal is sent through the other wire (TX-).
If the 100BASE-TX runs +-2.5V, does that mean the TX+ wire uses 0 through +2.5V, and the TX- wire uses -2.5V through 0?
I also know that "sending a signal" is effectively "applying a voltage" to the wire. And that a certain level of voltage correlates to a 1 or a 0.
What is the voltage range that equates to 1, and what is the voltage range that equates to 0?
Who and how is this range set? Is it a standard, or dynamically learned based on percentages of what either end of the wire is able to push through the wire (aka, different each physical connection)?
EMI is unavoidable, but due to the twisting of the pairs, the effect on the TX+ and TX- wires are identical, and as a result the noise added by EMI can be extracted on the receiving end.
How is the noise removed?
I am assuming if the wires send +1 and -1 respectively, and the EMI noise (for simplicity) adds +3 to both, the receiving side would receive +4 and +2. If you subtract those values from each other, you get a difference of 2, and if you put the 2 on either side of a 0 on a number graph, you end up with +1 and -1 again. Is that about it for the process?
Lastly, if noise is nothing more then adding or subtracting from the voltage on the wire, to what degree can noise affect the voltage.
If 100BASE-TX uses +-2.5V, in a typical office environment, about how much mV of noise can you expect?
I'm mostly curious to see how much voltage is added/subtracted by noise, proportionate to the sending signal. AKA, if typical noise might apply +-50mV, that wouldn't be all that much compared to a sending signal of 1000mV (1V). Not looking for a technical deep dive on this, just an idea so I have a basic understanding of the numbers / number ranges.
AI: If the 100BASE-TX runs +-2.5V, does that mean the TX+ wire uses 0 through +2.5V, and the TX- wire uses -2.5V through 0?
Not usually.
What is the voltage range that equates to 1, and what is the voltage range that equates to 0?
Usually, you'd transmit a 0 with, for example TX+ = -2.5 V and TX- = +2.5 V. And you'd transmit a 1 with TX+ = +2.5V and TX- = -2.5V.
While, as Andy says, in theory it isn't important if the two signal lines have different bias points, in practice it's easiest to make a receiver that compares the two lines to each other. So that any situation where RX+ > RX- is interpreted as a one and any situation where RX+ < RX- is received as a zero.
Who and how is this range set?
As I said above, any situation where RX+ > RX- is interpreted as a one and any situation where RX+ < RX- is received as a zero.
The specifications for the allowed common mode voltage and signal amplitude are usually chosen based on the available technology (semiconductor process and known circuit designs) so that all users can design their circuits to be interoperable. But basically this is an arbitrary choice made for different standards (LVDS, Ethernet, etc.) based on the technology expected to be used to implement them.
How is the noise removed?
Noise is removed because the receiver is designed to be mostly sensitive to only the difference between the input voltages, and have as little as possible response to the common mode voltage of the inputs.
If 100BASE-TX uses +-2.5V, in a typical office environment, about how much mV of noise can you expect?
You can see how much noise and interference the system designers allowed for by looking at the minimum signal amplitude allowed at the receiver. To give very low error rates, the maximum noise allowed is probably 1/15 or less of the signal amplitude. |
H: Pulldown doesn't seem to affect inverter?
I have a relay/optoisolator circuit which is connected to a microcontroller.
The input/output is controlled by a physical slide switch.
I expected this to turn off the relay and status light because of the 10K pulldown, but the status LED stays on when I switch to the input side.
What am I missing?
The relay is a SIP-1A05.
AI: If you are actually using an original, old, 7406, or a 74LS06, the 10K resistor is much too high to produce a logic Low. Bipolar TTL inputs source current, so a pull-down resistor must be a low enough value to draw about 1 mA when dropping less than 0.8 volts to produce a Low. Traditionally, we would use a switch to ground to guarantee a Low, and a 5K or so pull-up resistor to guarantee a high, although an open input would normally be recognized as a High.
A CMOS part (74HC06, 74AC06, etc.) has a very high input impedance and neither sources or sinks any significant current so would work in your circuit. |
H: Is it possible to do "runtime" routing/switching of current paths?
I am designing a project involving 12 DC motors, only one of which
will run at any time. I will be using a high-current-capable H-bridge
driver (like this one), in
order to run them bidirectionally.
In view of cost minimization, I'd like to use only one driver for the
entire board, i.e., run the motors sequentially by driving one for N
seconds, then moving to the next one, and so on (switching speed/delays are not important at all).
Is it possible to design a low BOM-cost modification (< $5 ideally, for switching between 12 motors) to the circuit where I can runtime-switch
the driver outputs, i.e., programmatically have the driver jump from serving one motor to the next?
I understand that solutions like crossbar/crosspoint ICs as well as
FPGAs are traditionally used to facilitate on-the-fly routing of
digital signals, but what about high-current lines (in this case, 3-4
amps of current draw)?
AI: A BOM of $5 is rather low: $5/12 leaves only 42 cents per relay for the simplest solution. (One side of each motor is permanently connected to one half-H, the other side of one and only one motor is connected to the other half-H.)
4 4-throw double pole relays could be used in a tree, which would give you a budget of 84 cents, but now for a 4-pole double-throw relay.
Maybe you have cheaper sources than I have? |
H: What OP AMP spec should I be checking to assure this behavior
Recently, on the advice of others on another thread, I tried to migrate a dual supply OP amp circuit to single supply version. I needed a quad OP AMP, and the logic was that since my final circuit only needed to provide 0 to about 3.5 VDC, an LM324 would do just fine. Well that was easy to try because I had some on hand, but the result wasn't so hot. It turns out that my circuit must drive the equivalent of about 10K tied to +V, as in this simplified test diagram...
The result with the LM324 was that the output under these circumstances was a dismal 650 mVDC, a very LONG way from the hoped output of near zero.
This makes sense... the LM324 uses ordinary bipolar transistors for its output stages and that's about the best you can hope for. So I poked around and found a Texas Inst. quad OP AMP, the TLC274. It uses FETs for all its internal circuitry and its data sheet actually DOES mention its output includes the negative supply rail.
Unfortunately it certainly won't go to the negative rail with any load. In the example shown the best the TLC 274 could do was about 90 mV. Granted that is hugely better than the LM324, but its still a LONG way from zero. To be practical, I'd like the output in the situation depicted in my schematic to be 20 mV or less. Had I stuck with my earlier dual supply OP amps, of course this would not be an issue. But a negative supply is not available without a charge pump oscillator or similar trick requiring more parts so I'd like to stick with a single supply OP amp if I can. I'm just at a loss as to what OP amp specification I should be looking at so I don't keep running into his same problem. TI is pretty fast at sending samples, but ask them for support on a question like this and you can expect to wait a month.
Addendum:
The answers I received here have really enlightened me, and I want to thank those of you who chimed in. I have pored over the specs of several so called "rail to rail" op amps and have requested a few samples, but what I've really learned here is that "rail to rail" is a relative term, and a single supply OP amp may not be the best choice for my situation.
It is indeed a stretch to expect even the best CMOS drive OP-AMps to have an effective resistance low enough to ensure a 20mV or less output against a 1mA pull up load, and even more a stretch to think it would be sufficiently consistent between parts. The truth is that if I want precision control down near zero, a dual supply OP-AMP is a much better choice, if only because "0" really is not "0" with a dual supply, but only a "reference point" between +/- V supplies. Such a reference point can always be adjusted or trimmed as close to zero as necessary.
So since I don't have a V- supply available in my case, I have two choices. Either find a way to alter the circuit I am driving to eliminate the 10K pull up to +10VDC, or revert to a dual supply OP-AMP. To make this work I'll need to add a second OP amp package configured as oscillator and charge pump, to develop a negative supply for the second package. I've done this before and found that just a few volts of V- supply is usually sufficient to build up a good DC amplifier with good accuracy around 0 volts, with a little attention given to the source of the virtual "0" reference.
In any case I now understand that for such a precision DC amplifier, with good drive around 0 volts, it is nearly futile to expect a rail to rail OP AMP to automatically be a good solution. Its not the conclusion I'd hoped for, but win or lose its always good when you come away more educated.
AI: You need to look for "rail-to-rail" op-amps and even then there will only be a few that will do 20mV (with a 1mA sink current) such as the AD8605 - not cheap but pretty good all round and beats the LM324 into pulp on most things providing it runs from less than 6V.
Here is linear technology's search engine with a few parameters also selected to give you a few to look thru
Going back to your idea of using an oscillator and small charge pump try looking for a single schmitt trigger in an SOT23 package - TI and Fairchild both make them. There are ones at TI that can output 30mA and can oscillate at tens of MHz. A couple of 1N4148 diodes and smallish capacitors should give you the negative rail you need.
Why can't one op-amp in a quad package generate a negative voltage (via a charge pump) to power the quad package's negative rail. If each op-amp takes 1mA unloaded then one op-amp has to supply 4mA but, in supplying 4mA this one particular op-amp now takes 5mA and therefore the total supply demand is now 8mA and of course this spirals out of control. On the other hand, one op-amp can be an oscillator and this oscillator can be buffered by a transistor that takes power from the positive rail independently of the op-amp. This will work so maybe consider that.
On a slightly different (but related) note, you can add an NPN BJT as an emitter follower to the output of an op-amp and use feedback from the emitter. What this gives you is worth trying. For a start you need an emitter resistor that won't drop more than 20mV when a 10k is pulling it up to 5V (a current of 0.5mA) therefore the emitter resistor can be no-more than 40 ohms. The other nice thing about this (if you can live with the extra current) is that the op-amp only needs to lower its output to ~0.7V to get ~0V at the output. This means the LM324 is now easily going to manage this situation. Here is an example: -
So, it's the 40 ohm resistor (Rload) that pulls down towards 0V to give you the low end of what you need. Going back to the original neg voltage generator, now that the op-amp is buffered from supplying its own current this method can be used to feed a charge pump. |
H: What kind of capacitor is this? How to read its value code?
I have found some capacitors like this one:
Does anyone know what kind of capacitor it is? How can I read its value?
AI: These images appear to have your answer. This capacitor is a 0.01µF 250v capacitor from old electronic equipment (most likely radio, audio, or television related) containing vacuum tubes. It is similar looking to some of these which are old mica capacitors:
The stripes on the capacitor can be interpreted using the standard resistor color code to give a 3-digit code like on standard capacitors, where the third digit is the multiplier. In order to read the capacitor code, simply multiply the number created by the first 2 digits by 10multiplier to get the final value in pF.
With resistors, the last stripe indicates the tolerance, but with older capacitors it indicates the voltage. If a tolerance is not specified, it is usually 20%. |
H: How much max current does this soldering-iron-station drive from the mains network?
This might sound a simple question, but I'm kind of confused. Here i the device and data sheets:
http://www.velleman.eu/products/view/?id=385738
http://www.velleman.eu/support/downloads/?code=VTSS4N
On its label it is written: 48 Watt 230V ac/50Hz.
Can we say the max current it will drive from the mains hot wire is:
Correction (48 W / 230 V = 0.21 A)
Is 230V ac directly applied to the soldering device's resistance?
AI: P = EI, so I = P/E = 48/230 = 0.2 Amp.
Since this iron has some kind of temperature control, the incoming AC power will not be connected directly to the iron. |
H: Is there a clever way to use a small variable capacitor where a larger capacitance is required?
I am designing an activity where students should band pass a song to find a hidden message at 1000Hz.
Problem
I have considered using a notch filter and tank circuit, but using the formula $$f=\frac{1}{2\pi\sqrt{LC}}$$
I cannot reach the range of 1000Hz with my variable capacitor. Is there a clever way to achieve a circuit to filter 1000Hz and use my variable capacitor for tuning?
At my disposal:
A variable capacitor (20-350pF)
Various capacitor values ranging from 100pF to 220uF. (I can find more if need be)
Inductors ranging from 250uH to 3mH
The drive to work on the weekend because I find this project so interesting.
AI: You could try an op-amp capacitance multiplier circuit:
(Courtesy of Wikipedia)
C = C1 * R1 / R2, so adjust R1 / R2 to provide the level of multiplication desired. Note that some op-amps have trouble driving capacitive loads. So if you connect a significant-enough capacitance to the op-amp output, it may oscillate.
Edit: A variant to try is this one. It uses the LM102 to buffer the input current, mostly eliminating the "resistance factor" from the previous circuit. I have not tested it, but would be skeptical of it's performance with very small capacitances. Also note that since C1 is being driven by the LM101A, this is "capacitive loading" and some op-amps could oscillate in this configuration. Some experimentation would be required. (Courtesy Texas Instruments) |
H: Why does inserting a resistance in the common of my scope probe cause it to pick up AC noise so much worse?
I'm poking at the inside of a USB oscilloscope, with the hope of modifying it so that the scope probe commons can be referenced to different voltages.
When I use my USB oscilloscope to measure a 24V DC signal with a 10x probe, I get reasonable results.
By my figuring, this 10x probe is a 9 MOhm resistor, in series with the scope's 1 MOhm internal resistance. Thus, a 10:1 divider.
simulate this circuit – Schematic created using CircuitLab
By adding 10 MOhm to the probe, I should turn it into a 20:1 divider. When I insert 10 MOhm into the positive signal path I do get a rough 20:1 effect, but I start seeing AC 60 Hz noise.
simulate this circuit
When I instead put the resistance in the common path, between the signal common and the scope probe common, I see vastly more AC noise.
simulate this circuit
My USB scope is isolated from my PC with a commercial USB isolator. Can anyone tell me what's going wrong, and how to fix it? I thought this might just be a consequence of having all this strewn about my desk instead of pleasantly soldered together with minimum signal paths. But I would have expected the noise to be much lesser magnitude, and much more responsive to physical rearrangement. Moving leads and parts has zero observable effect. And it still wouldn't explain the difference between inserting the resistance in the positive and negative paths.
Why is this happening, and how can I fix it?
AI: Look at the case represented by your first schematics. Let's say there is some noise source that is coupling to the connection between the probe and the 24V supply. Just for example, the coupling is weak and is equivalent to many mega-ohms of impedance. Since the 24V is relatively low impedance, the noise coupling in would not register at all in the measurement.
Loot at the case represented by the second schematics. Let's say the same noise source is coupling to the connection between the probe and the 10Mohm resistor. The impedance of that point to the ground reference is around 5Mohm. So even weak coupling in many mega-ohms of impedance from the noise source will show up in the measurement.
My guess is that the situation can be improved by attaching the 10Mohm resistor to the probe as closely and directly as possible. Then extend the ground around the probe tip with metal foil to cover the connection and the resistor completely.
Look at the case represented by the third schematics. If there is ground loop current between the scope and the 24V supply, the addition of the 10Mohm would cause that to show up. Theoretically, 1uA of ground loop current would show up as 10V with the 10Mohm resistor.
It is asymmetrical to case 2 because any external current coupled to the whole 24V apparatus would show up across the 10Mohm resistor.
The fix could be to hunt down and eliminate any ground loop coupling. For example, it is not unusual for power supplies and equipments to have their functional ground (directly or indirectly) connected to chassis ground through a resistor of mega-ohms and/or a small capacitor in parallel.
But in this case, perhaps decide if this is indeed an issue, possibly aided by an estimate of the ground loop current (for example, take your scope measurement and divide that by 10Mohm). If decided as not a real issue, tolerate it when using the scope and do not use the set up as in schematic 3. |
H: Using logic gates instead of Arduino
I have created a very simple circuit using arduino, in which I have 4 switches used to control the lamp ON/OFF as shown in the below schematic.
simulate this circuit – Schematic created using CircuitLab
Here is the program written in Arduino IDE:
int switch1 = 8;
int switch2 = 9;
int switch3 = 10;
int switch4 = 11;
int outputPin = 12;
void setup()
{
pinMode(switch1, INPUT);
pinMode(switch2, INPUT);
pinMode(switch3, INPUT);
pinMode(switch4, INPUT);
pinMode(outputPin, OUTPUT);
}
void loop()
{
if(digitalRead(switch2) || digitalRead(switch4))
{
digitalWrite(outputPin, HIGH);
}
if(digitalRead(switch1) && digitalRead(switch2))
{
digitalWrite(outputPin, LOW);
}
}
Basically, my original project has a Motor instead of Lamp, & the four switches shown above are the two pairs of switches in each tank. i.e. I have two tanks and two switches in each tank. 1 switch at the bottom of the tank to measure the water level. If tank is empty then this switch will be open. Another switch at the top of the tank, which will verify that if the tank is full or not and accordingly it will turn on/off the valve which is not shown in the below diagrams, as I think it's not necessary now.
The above circuit works perfectly, but now I want to complete the same circuit using logic gates, instead of arduino. I have tried the circuit shown in below schematic, but I was not successful as I am new to electronics & Logic gates.
simulate this circuit
I want to use logic gates instead of Arduino to bring down the cost.
Thanks for any help.
AI: I'll start by pointing out that your code is probably faulty. The last IF statement should examine switch 1 and switch 3, not 1 and 2.
With that said, let be restate your requirements:
1) If either SW2 or SW4 are open, start filling the tank (turn on the motor).
2) When both SW1 and SW3 are open, stop filling the tank (turn off the motor).
Right? And you do realize that this may cause one tank to overflow while the other tank is filling, right?
In this case, as @on8tom has pointed out, you need some sort of storage device, and a set/reset flip-flop is an excellent choice. Then
simulate this circuit – Schematic created using CircuitLab
should do what you want. Note that I've added a flyback diode on the relay coil, and you should always do this. The diode should be rated for more current than the relay coil draws. |
H: Simple problem with phasors
I'm trying to solve the following question (a):
According to the solutions manual and wolfram the answer is:
http://wolframalpha.com/input/?i=%28%285-6i%29-%282%2B8i%29%29%2F%28%28-3%2B4i%29%285-i%29%2B%284-6i%29%29
http://imgur.com/CyFHil4
This is what I've done:
I'm not getting the right answer and I don't understand why. I'm following the phasor multiplication and division rules:
http://en.wikibooks.org/wiki/Circuit_Theory/Phasor_Arithmetic
I'm using the fx-300MS for all polar and rectangular conversions.
EDIT: I've tried using exact values, but same problem.
AI: So yo had the denominator wrong as it should have been -7 + j17 instead of -6 + j17. I don't quite see the point of converting it back and forth between Cartesian and polar forms; you can calculate it directly will less work; and obviously (-3*5)+4+4=-7.
Your error however is a lot more trivial than that, you carried over a 4 to a 5: |
H: Extra 2 DB9 pins connection
Many DB9 symbols have 2 additional pins other than the 9 signal and GND pins that they are known for. How and to what are these 2 pins connected ? Pins 10 and 11.
Is it connected to chassis ground or is it an NC just to provide more stability for the mechanical and vibration protection?
AI: They're the two sets of pins leading downwards on the sides of the connector.
Is it connected to chassis ground or is it an NC just to provide more stability for the mechanical and vibration protection?
Yes. That is to say, they are always for mechanical stability, and sometimes for chassis ground when the application calls for it. |
H: op amp for CT sensor
I am trying to amplify a CT sensor.
The sensor is giving 5mV amplitude for low current, 100mV amplitude for higher current.
I built a voltage divider with 220 ohm resistors, and connect to a noninverting opamp with gain that should be 120k/10k+1 or about 13.
I am using 6V battery packs for positive and negative power for the LM358. The waveform going into the op amp shows on the oscilloscope as 5mV amplitude @60Hz.
The waveform coming out is only positive, and there is no gain. Since I'm fairly sure I built the circuit correctly, I'm first showing the schematic, assuming that the concept is wrong. If you experts tell me the schematic is right, then I will have to take a picture of the circuit and attach it to determine how it is built wrong.
Ok, in light of the answer I am posting a revised corrected schematic
AI: I can offer you some simple changes that should improve things for you.
1) Change R4 & R5 to 100k. Leave C1 as 1uF.
2) Disconnect the left end of R2 from the junction of R4 & R5 and instead connect the left end of R2 to the positive side of a 10uF capacitor. The negative side of the capacitor goes to ground.
These changes separate the virtual-earth node (junction of R4, R5, C1) from the feedback network.
I'm also assuming that you are running the op-amp from a single, positive supply with the negative rail pin of the chip grounded. Please let us know if that is NOT the case - the circuit does change if you are using a bi-polar power supply. |
H: Testing Long Time Delay
I have implemented a long time delay using a small microcontroller (MSP430) however I need to test and verify that it does as I expect.
My algorithm is as follows:
main()
{
//Init Timer
//Init Output
//Sleep
}
ISR_Timer()
{
//increment minutes
//if output off and enough time elapsed
//Turn output on
//Reset elapsed time
//else if output on and enough time elapsed
//Turn output off
//Reset elapsed time
}
Due to the delays being 21 hours and 3 hours, how can I go about testing this as it doesn't happen instantly. I have swapped the hours to minutes, although I will need a way to test that the output is off for 21 hours and on for 3 hours, and that nothing happens inside of the microcontroller, such as the watchdog timer reseting the CPU. The code is simple enough that going through it it can be seen that nothing is actually wrong with the implementation but it still needs to be tested in some way.
AI: Power a mechanical clock with the output of the timer. Either a mains clock, or one of these one AA battery cheap clock movements that turn up everywhere, depending on what your test system switches.
Set the test clock to 12:00, record the time you set the timer going. You only need to make three more visits to the test setup, and their times are fairly flexible. Make the first visit before 21 hours, to check the test clock still shows 12:00. Visit between 21 and 24 hours after starting, to check that the test clock is running, and that the time shown indicates that it started when expected. Make the next visit some time between 24 and 45 hours, to make sure that it is stopped, showing a time of 03:00.
If you want documentary evidence of the test working, photograph the test clock next to a normally running time and date clock, and annotate the print by hand to explain what can be concluded from the times.
If you put the test away in a cupboard for a week, then when you come back, the test clock should have advanced 3 hours per day of the test. |
H: Is this NPN transistor AND logic gate practical?
Most places on the internet that I see give a schematic for an AND gate that is something like this:
simulate this circuit – Schematic created using CircuitLab
The only thing about this is that when B is turned on but not A, which should logically output false, it seems to be somewhere between it (this can easily be seen with an LED at the output: it isn't as bright as it is if both A and B are on, logically satisfying AND, but it still lights up).
I was messing around and came up with this idea for an AND logic gate which works a bit more correct and I have been using it recently:
simulate this circuit
Essentially what I came up with when building that is Input A is put through a NOT gate which is put into another NOT gate, but the Collector on the second NOT gate is only powered by Input B. Therefore, if Input B is off, no output to begin with, but if its on but A isn't, then the first NOT gate powers the base to the second, making B ground.
I like building this design better, and it works so far for me, but I was wondering:
How practical is this design (e.g. why haven't I seen it before; are there any flaws)?
AI: It does work as an AND gate, but there is no gain for input B -- so you can't use its output to drive another gate's Input B.
For a logic family to work well, you need to have the output signal go high and low, and also be able to drive a number (fan out) of similar gates.
You could make a gate with input A and the V+ input of Q1 -- it would generate
OUT = A & not(B).
That gate would have gain. |
H: Relay : what is the difference between Low level trigger and high level trigger
I am selecting relay for A micro-controller project and I am electronic beginner so I faced an issue when I had to choose between low-level triggered and High-level triggered
As far as I understood :
Low-level triggered will allow the current to go through the power line when the control signal is below a certain voltage.
High-level triggered will allow the current to go through the power line when the control signal is above a certain voltage.
Am I right?
AI: A mechanical relay needs current to pass through its bobin to trigger. If you wire one end of the bobbin at V+ then you trigger it by driving the other end low, if you wire the first end av 0V/GND, then you trigger it by driving the other end High. So the relay itself doesnt care if its High or Low trigger (thats why I asked if it was a mechanical or solid state, and the part link).
The link that you posted however, shows a relay module with a transistor driver.
In such cases, depending on the transistor and configuration you use you can have specifically high or low level triggers.
However, there is another catch. That relay has both NO (Normally Opened) and NC (Normaly Closed) pins.
This means that when a relay is not triggered, the NO pin is opened (not connected) and the NC is shorted to the common.
When a relay is triggered, the switch bounces and NO becomes closed (connected) and NC becomes opened (disconnected).
Which means that.. when that relay is triggered, depending on how you wire it, you can have it conducting or not.
So.. answer is: you are partially correct and the rest can be correct depending on how you wire it..
Did I make sense..? |
H: Looking to drive an ST-Link in standalone mode
At present I have one connected to interface the IAR EWARM s/w running on a PC. Does anyone do a standalone program just to take an output file and burn it to flash? [I'm using STM32F303x MCU]
AI: The ST-Link utility can be used to program a given file.
It supports S-Record, Bin, Hex and S19 files. You have to create one of those out of your .out-File using the IELFTOOL at the end of your build-process (can be automated, so your hex-file never goes out of sync).
The ST-Link utility has also a command line interface, so it can be integrated in automatic production programming.
It supports verification of the downloaded firmware, so you can set those options and it will check if the firmware was downloaded correctly, which is a nice feature to have in production.
The various return values for different errors allow for different actions to be taken automatically. |
H: Diode protection in Pins
I was using the ISL21090 voltage reference from intersil. Intersil Link.
Now, there are quite a few DNC pins in this package which could be an issue during ESD .
Thats when I cam across a kind of similar chip and it was rad hard. Here the DNCs are connected via diodes Rad hard link. Pls check page 2 in here.
There are diode protection for the Vdd,pins and DNC -
How can this be explained ?
For eg - for the DNC pin, having these diodes, how will it help ?Its a bit confusing.
AI: "Radiation" is scary! ;-)
Rad-hard chips are designed for use in space and other extreme environments where exposure to very high energy particles is possible. On Earth, the atmosphere absorbs virtually all of these particles (which is partly why life on the surface of Earth is possible).
There are really just two concerns here:
Hardened for use in severely radiative environments ("Rad-hard") means that the chip cannot assume the presence of useful things like the atmosphere to absorb high energy particles.
A floating (otherwise disconnected) pin, as is typical of DNC or NC pins, is a pretty good (small) capacitor.
If incident high energy particles succeed in transferring energy to the floating pin the resulting stored voltage could be extremely large and this in turn could exceed the ability of the chip package to keep the charges isolated on the pin. It will break down and "zap" the sensitive micro-chip inside.
To prevent this, shunting diodes are added to disperse the charges before they can build up to a level sufficient to tunnel through the insulation of the chip's packaging.
But why not do this for all pins?
This is not necessary in all but the most extreme conditions as even cheap plastic packages and tiny sizes can resist thousands of volts. Pins that are not connected internally can store charges and then discharge them when touched or in contact with another body (e.g. ESD), but so what? If the package can prevent the discharges reaching the internal micro-chip and the external pin is not connected to anything (or grounded through PCB connections), there is no real consequence to it.
ESD diodes require a relatively large amount of area on the chip surface and the cost of a microchip, to the first order, is proportionate to its size. So, if you don't need to use a pin, there is little reason to waste space (increase the cost) to protect that pin. |
H: TVS diode in LDO output
This is a reliability doubt regarding an LDO. I was attending a conference on hi-reliability application of PMICs. During such a discussion one of the speakers said that when using an LDO ina hi rel application, the worst case is that the LDO fails and the input comes at the output as it is. Suppose Vin = 3.3V and output = 1.8V, when it fails Vout = 3.3V.
So one must make provisions to protect it. How can that be done ?
Would using a TVS protection(unidirectional) diode do the trick ? So basically it will clamp the Vout to a more manageable,say 1.5V or so.
is this a good approach ?
AI: No, this won't help, because then you're effectively shorting the power rail to ground via the TVS. Instead, you would need a Crowbar Circuit to trip a fuse or PTC. |
H: How come RTOSs are considered deterministic?
On a pc (an OS of course) any C program becomes indeterministic in terms of timing. For instance a loop takes between 1.2 and 1.3 seconds depending on "how fast I am moving another window". It is because the OS makes processes (or threads) share processing power.
As far as RTOSs are concerned (on an embedded system), when we write a multithreading application, I think the same thing happens depending on how many threads are executing concurrently.
I do not have instruments to test this accurately on an embedded system. Thus, I wanted to ask. Is my concern reasonable or am I missing something very fundamental?
EDIT: I will give an example. we have task1(takes 10 ms) and task2(takes 20 ms). They started at the same time on separate two threads. My claim (also concern, not sure) is that task1 takes more than 10ms, because they share processing power with task2.
AI: It's not true that tasks in an RTOS are automatically deterministic, but it's possible to put much tighter constraints on when and how often tasks run. An RTOS will usually provide for hard priorities for tasks; at any time the ready task with the highest priority is running. The author of the code also has total control over what set of tasks are running; you can reasonably expect there are no high priority background tasks that might interrupt your code to, say, swap data to disk, unless you wrote them.
On top of this, some RTOSes provide for cooperative multitasking. In contrast to preemptive multitasking, with cooperative multitasking a task will continue executing until it voluntarily gives up control of the CPU. |
H: Loop analysis in confusing circuit
Here is the circuit I am trying to analyse.
simulate this circuit – Schematic created using CircuitLab
Now I know generally how to do this.
Loop 1 we can call the RIGHT one and Loop 2 we will call the LEFT one.
Loop 2 is clearly 2A because it has a current source.
Loop 1 is 30/10 = 3A
and the voltage at A is clearly 12V because V = 3A*4
But how in the world do I find the Node voltage at B?
AI: This is a trick question :'(
It sounds like you are an early student of electrical engineering and, as such, this question is a bit unfair.
The circuit you have drawn is essentially two separate devices and they are connected together by only one wire.
The two devices are:
RIGHT: R4, R5, V2
LEFT: R1, R2, I1
You see, your reference point (the down-triangle or "Ground") is on the right device (network) and the other device is floating (not referenced to "0 Volts" at any point).
The analysis
The goal, then, is to determine the relationship of LEFT to ground. The key observation is that no current can flow between LEFT and RIGHT at steady state. There is only one wire between LEFT and RIGHT, so there is no return path for the current.
Therefore...
You can solve for A using only R4, R5, and V2. It's a simple voltage-divider.
The voltage at A is 5V higher than the voltage at the LEFT device's connection to V1 because there is no current in the connecting path, but a 5V drop due to V1.
You can solve for the voltage V1(-) to B because you know R1's resistance and R1's current (must be the same everywhere in the loop = I1 = 2A). |
H: SPI and pull-up resistors
I have a breakout that comes with two 10kOhm resistors: one on the SDA and one on SCL. The chip takes a max of 3.6V. AFAIK, I2C needs pull-ups on its pins, but could SPI be used on this module? I'm powering it with an Arduino and SCL seems to be around 4.5V - is it too high or is the pull-up going to shift it down?
Thanks
EDIT
The schematic of the breakout is essentially this:
AI: If you want to use the SPI bus, you need to remove the pull-up resistors.
You need to connect all wire lines like SDI, SDO, SPC and CS to the master device.
The LIS3DH is not 5V tolerant and the maximum voltage is 3.6V.
If you put higher voltage, you will damage the chip inputs.
You can put logic level translator between the Arduino card and your LIS3DH card. |
H: Low speed device is recognised as full speed (USB tiny-like AVR isp programmer)
I recently tried to replicate the setup proposed in this instructable.
Everything is fine until I hook up the device into (any of) the USB ports. Then, dmesg on Ubuntu complains that the device did not accept the address assignement (throwing an error -71).
I tried to replicate the schematic here:
simulate this circuit – Schematic created using CircuitLab
The only difference between this schematic and my actual set up is the R3 resistor which in my case are two series resistors of 1k each. (D3 was not present, but I thought it could be useful to see if the device was actually powered)
Why does Ubuntu recognise this as full speed rather than low speed? Do I need to use exactly the same resistance shown in the schematic, or do I have a completely different problem unrelated to this resistor value?
I'm a total beginner, so I may be missing something trivial, but I can't see it. Any help is appreciated.
P.S.: all components are SMDs
AI: A pullup on D+ signals Full Speed mode. Low Speed mode is signaled by a pullup on D-. |
H: Why ATMega328 can't run SPI at full clock speed
Two part question:
In the datasheet on page 168, the best SCK frequency one get get on SPI is \$\dfrac{f_{osc}}{2}\$, why can't this be \$f_{osc}\$?
Also from the datasheet: "When the SPI
is configured as Slave, the SPI is only guaranteed to work at \$\dfrac{f_{osc}}{4}\$ or lower". Why?
AI: ... the best SCK frequency one get get on SPI is \$\dfrac{f_{osc}}{2}\$, why can't this be \$f_{osc}\$?
Assuming faster electronics costs more money (in design time, testing, manufacturing costs, chip area, etc.), then I would expect Atmel's designers to trade reduced cost for reduced performance? Especially if there is feedback from customers that they aren't willing to pay a price premium for highest speed SPI?
A technical result might be driven by balancing cost and profit.
Also from the datasheet: "When the SPI
is configured as Slave, the SPI is only guaranteed to work at \$\dfrac{f_{osc}}{4}\$ or lower".
Typically, a MCU runs from it's own clock source; it is asynchronous with respect to other clock sources. Internally, it's SPI peripheral is synchronous with its own clock.
An SPI slave must lock to the external clock of a different asynchronous device. One way to do this is to 'sample' the external clock synchronously with the ATmega328's internal clock, two or more times for each state. This ensures the falling and rising edge of the external clock signal can't be confused.
If the slave were running at \$\dfrac{f_{osc}}{2}\$ there would only be time to take two samples of the external clock (synchronised with its own clock).
So that would imply one high and one low; the master clock is in an unknown state between samples. If the two systems were drifting with respect to each other the external clock signal might appear to jitter with long and short durations for the slave, making synchronisation fragile (which no one would like to deal with), or more complex (extra cost). It may be harder (more expensive) to make a system which can sample at higher than the systems clock to avoid this.
However with two, or more highs and two or more lows, they will stay broadly in-synch; the state of the master clock is known definitively between two highs and two lows, so for those periods there is no clock error between the master and slave.
So a way to 'know' that your synched, for part of the time, is see the external clock in the same state two or more times, hence the 4x slower. |
H: How long will this battery power this LED strip?
I'm a novice when it comes to electronics and when researching this its blown my mind. I'm trying to figure out how long I can power 2 meters of this LED strip for using this battery?
Details:
LED Strip:
Voltage: 12V
Total wattage of 2 meters: 9.6W
Battery:
Voltage: 12V
Capacity: 4800mAh
AI: At 12V and 9.6W the strips would consume 0.8A of current.
Divide that current into the battery capacity. 4.8Ah / 0.8A = 6 hours.
This is a very rough calculation, it's probably less than this. Real testing would be needed to verify this. |
H: What is the name of the sensor that most inkjet printers use to keep track of the print head's position?
I've been trying to build a cheap X-Y-Z table using mainly bits of old CD drives and printers I've got lying around. Since the printers already have a good single axis I would like to be able to, rather than having to buy a stepper motor and rebuild it, just repurpose the optical tabe the printer uses to keep track of the print head's position and keep the same DC motor. I've been able to extract the sensor the printer uses without damaging it or any part of the track, but I've been unable to find what the proper name of this sensor is, let alone documentation describing how to use it.
The sensor in question is in a black, plastic housing with a slit that the tape fits into. There are six pins on its underside that solder to the board, two of which come from something on top of the slit and four from something underneath. The black housing is labeled '6536' on top and '15' and 'DSO' underneath. My first guess is that the top is an LED while the bottom is a light sensor of some kind, but beyond basic checks (applying a weak current through the possible LED in either direction did not cause it to noticeably light up) I'm not sure how to get any more information out of it safely.
AI: It sounds to me like an optical encoder, which looks something like this:
One side is an infrared emitter (which is why you can't see it--Infrared light is not visible to the naked eye) and the other side is the infrared receiver. The tape has very small stripes on it, through which light cannot pass. When this stripe blocks the IR light from the emitter, the receiver does not see it. When the tape continues to move, the clear portion of the tape eventually passes through. The light is then seen by the IR receiver, and the circuit can tell that the tape has moved.
I would expect the two-lead part to be the emitter and the 4-lead part to be the receiver. |
H: Can you damage DC motor by backdriving it (with disconnected leads)?
We are looking for application where we need sometimes backdrive DC-motor manually. In order to protect motor driver and rest of the electronics we're thinking of electrically disconnecting motor leads from the motor driver using FETs or relays. Is there something else you should worry about? E.g. if rotating motor shaft too fast will produce too much voltage and we damage something inside motor or damage FETs isolating it? Is answer different for brushed and brushless motor?
Motor is rated for 24V, 5A continuous, 10A peak for 2 seconds. It's geared 50:1, so we can potentially backdrive it quite fast.
AI: Don't backdrive it any faster than its nominal run speed on 24V. This means that the back voltage won't be any more than 24V and the commutator won't fly apart. Now you can be confident that your isolation MOSFETs won't blow up. |
H: 7-segment display with decoder
I'm not sure if I'm on the right exchange here but if not then let me know! Worth trying anyway.
I'm in the process of making a logic circuit to display a number, for example, 15711862 - it has to be that length anyway. I've had to make my own decoder and I'm stuck with the outputs and which gates to use, would I use an AND gate, OR gate, etc. as well as the wiring, how do I determine which letters would connect to which gate, to then connect to the pin of the 7-segment display (I'll add a picture below).
Like I said, I'm not sure if this is the right exchange to ask on and if it's not then let me know and I'll delete the question, but I'm quite confused right now! Any questions please ask below!
AI: What you need is what's called a "BCD t0 7 segment decoder", which isn't what you've shown. Neither is the display you've shown a 7 segment display, since it only has 7 pins. Also, if you want to display more than one digit, you'll need as many decoders as you have digits and a means to drive each the inputs separately, or a multiplexing/latching/shift register scheme of some kind. Study this data sheet for a clue. |
H: Phase margin analysis of a [diy] PMOS LDO [with LTspice]
I'm somewhat familiar with using LTspice to do phase margin analysis for a classic i.e. obvious negative feedback path opamp circuit; in fact I've done that analysis successfully for fixing real opamp circuits. But I'm confused how to do this properly for the kind of circuit that is the core of a PMOS LDO. The circuit is actually based on another EE.SE question, which I could answer/fix with some cookbook knowledge of what works for such circuits. But I'm now trying to understand better how the fix worked. (Also, in this circuit there's no voltage divider for the reference voltage, so it's just a follower, which is unlike an actual LDO.)
In this type of circuit the positive feedback pin of the opamp receives the obvious feedback, but this is already out of phase, so it's negative positive feedback, LOL. It seems to me that since I can't meaningfully cut the feedback loop where I normally do it, i.e. at the negative input pin of the opamp, I should do it at the positive one. So I've done that and added a 0V DC but 1V AC stimulus as per the usual procedure. But the result I get doesn't seem to indicate any instability at all...
... which is quite in contrast with the transient simulation (and the real [uncompensated] circuit behavior from the other question).
A few extra notes: I've tried zeroing V2 but makes little difference and if possible I'd prefer to keep the DC point as close the real circuit as possible. Also the fix/compensation cap and its ESR resistor are purposefully disconnected above [so I can see the unstable circuit's bad phase margin], although if I connect them I can't see any amazing difference but the phase does stay higher for longer.
So what am I doing wrong in terms of phase margin analysis here?
A few more notes:
I've tried decreasing the AC stimulus to 0.1V or 0.01V but that makes no difference.
Source uploaded to http://pastebin.com/w3HBiBPw. The LM358 model is the one from TI.
AI: I think the top graph does indicate exactly where instability occurs: -
The phase angle is zero degrees and the gain is still +45 dB. In other words it's "gain margin" that is causing oscillation here.
The transient graph seems to indicate it oscillating at 250 kHz whereas the AC graph tells me it could oscillate at 100 kHz. This doesn't surprise me given the amount of gain margin (45 dB).
The compensated response is borderline unstable in the trough area but not quite totally unstable. I would imagine there would be a fair degree of overshoot/ringing when subjected to transient supply or load changes: - |
H: Wien oscillator with amplitude stabilization
Here is Wien oscillator with amplitude stabilization:
I know how this oscillator works in theory, but I'm interested how it would behave in practice. Voltage at Vout node would be sine wave. If we put some load between Vout and ground, it will affect amplitude of Vout, right?
Is it because of limited output current of opamp (LM741 in this case)?
I simulated this circuit in Multisim. Firstly, I connected 100k resistance on output and I didn't notice any change in amplitude of Vout.
Then I used lower values of resistance, and for example, for resistance of 10 Ohms on output, amplitude of Vout is about 0.13V.
What are applications of Wien oscillator?
Thanks in advance
AI: Then I used lower values of resistance, and for example, for
resistance of 10 Ohms on output, amplitude of Vout is about 0.13V.
A 741 is NOT a power amplifier - putting 10 ohms on the output is a recipe for disaster. Read the data sheet...
+/- 25mA is the output short circuit current and it's not recommended for anything like 10 ohms. In the data sheet it talks about the minimum load being 2 kohm to meet other technical values.
What are applications of Wien oscillator?
The process of learning to read data sheets and understanding op-amps will expose you to many applications and if you think that's an unfair answer then "tough" because questions that solicit opinions are usually closed down. |
H: Negative to Positive Voltage Converter
Is there an easy circuit or IC that will convert negative voltage to positive voltage and retain the initial value? Context below.
I am trying to add a volt meter to my power supply using some old parts I have lying around. My power supply is two 2-12V channels, one positive and one negative. I have an adc that can take anywhere from 0 to 5v. To start, I have a voltage divider on my channel output to my ADC so that my max voltage on both channels is just under 5v. However, I don't think my ADC can take negative voltage. I only have one 7 seg display, so I am using a switch to decide which voltage I am measuring.
On my ADC there is a VCC, +VREF, and a -VREF. I have VCC coming from my rectifier and my VREFs are coming from my regulated output. Initially I was using the switch to swap both VREFs depending on the channel. For example, my positive channel would have +VREF on my regulated positive output, and -VREF would be ground. On my negative channel it would switch so my +VREF was ground and -VREF was my negative output. This would still provide up to a 5v drop to my ADC for measurement. However, it doesn't seem to work that way.
My theory is that the 5V VCC doesn't change, so when I switch to my negative channel, it becomes much more than 5V relative to my VREF. So I want to put a negative to positive voltage converter on my negative output so that the ADC will receive a 5v drop relative to the initial ground. I just have no idea how to do that and all google seems to give me are positive to negative converters. Any help is appreciated! Thanks!
AI: How about a simple inverting amplifier:
$$ Vout = - \frac{Rf}{Ri} Vin $$
simulate this circuit – Schematic created using CircuitLab
Ri at around 10Kohm can be a good starting value. Choose Rf to scale the output voltage such that it is always within the output voltage limit of the opamp and the input limit of the ADC. |
H: What is the purpose of this transistor in an Apple Time Capsule?
While taking apart a 2009 Apple Time Capsule, I found a 2N3904 NPN transistor on a 2-wire cable with the emitter connected to one wire and the base and collector connected together and to the other wire. The transistor was physically attached to the back of the hard drive with Kapton tape. What is the transistor being used for?
simulate this circuit – Schematic created using CircuitLab
AI: I am 99% sure it is a temperature sensor.
App Note AN12.14 from Microchip can tell you a little bit about it.
(This is a pretty common cheap way to measure temperature on a circuit board) |
H: Where does the MOSFET body diode come from?
Where does the body diode in a MOSFET come from? I understand that its built in and an intrinsic part of the MOSFET. All illustrations of a MOSFET that I've seen depict the structure as two diodes back to back but non hint at where the diode comes from.
simulate this circuit – Schematic created using CircuitLab
AI: To be more accurate, in a typical power U-mosfet structure in use today [aka trench mosfet], this body diode is a PIN diode:
Image from this textbook. |
H: GB cart with Ram, Rom, no MBC. How do they work?
Gameboy cartridges, without memory banking, have 32KB of ROM and no RAM. To have more, carts tend to use a MBC (Memory Bank Controller) IC to add RAM and ROM, among other things.
However, two cartridge types, 8 & 9 (08h ROM+RAM 09h ROM+RAM+BATTERY) don't seem to have an MBC.
How do types 8 & 9 work?
AI: The cart connector has a pin (which seems to be variously reffered to as "MREQ" or CS_SRAM) which distinguishes between access to the cart rom space and access to the cart ram space. I'm seeing conflicting information on line about the active polirity of this line so it may be nessacery to do some testing.
If you can find a rom and ram chip with the right chip select polarities you may just be able to hook them up directly. If the chip select polarities on your chips are wrong you may need an inverter. Definately no need for anything as complex as a memory bank controller just to have both rom and ram. |
H: Given Vf across a LED, what is the current draw?
I have sourced some LEDs from everyone's favorite high-quality electronics marketplace, eBay.
I have a simplistic "datasheet" for the 7-segment LEDs that I purchased, which show a Vf of 3.8v across an array of LEDs. Does this give me enough information to know what current to drive these LEDs at or what a "safe" value would be? If not (and I am fairly certain it does not) what approach could I take to ensure I don't burn out my LEDs?
AI: It looks to me that the "3,8" shown on the drawing is the pin numbers of the common anode or common cathode connection, not the recommended voltage.
If the drawing is correct, there are six LEDs in series for each segment. A typical red LED has a forward voltage of about 1.8 volts, so you will require somewhat more that 10.8 volts to light a segment. 20 mA seems to be a safe current for most LEDs, but they will work (but be dimmer) at lower currents - I'd aim for 10 mA for a start.
If you have a 12 volt supply, you want a series resistor that will drop 1.2 volts (12 - 10.8) at 10 mA, which would be 120 ohms.
For the decimal point, with only two LEDs, the resistor should be abou 820 ohms.
To be certain of the actual voltage and permissible current, you should demand a proper datasheet from the vendor. |
H: Can I add PWM timers to a microcontroller externally?
I'm doing a project involving an LED matrix, and using PWM timers to be able to control the brightness. My microcontroller has 3 timers, and I need 4.
Is there a PWM timer circuit, perhaps using a 555 that I can connect outside the microcontroller to effectively add PWM timer?
I've seen this question, whose answers recommend servo drivers for PWM. However, I'm unsure how to use this to drive my LED's, as their output is for 3-wire servos. Looking at this pinout, would I just attach the signal wire to my LED(s)?
I'm also curious if there's a simpler circuit I could use to do this, if GPIOs are at a minimum (if I want to use one pin instead of the two that i2c would require). Alternatively, could I possible use a SIPO shift register to communicate over i2c with the servo module, using only one GPIO pin?
edit: Sorry, it's late, I just realized that using a shift register would use more pins than just using i2c would. maybe use some kind of i/o expander so that pins are no longer at a premium?
AI: Yes, external PWMs can be added.
In fact, there are I/O expanders intended for LEDs where each output has its own PWM channel. The expander is controller through I2C.
PCA9532, MAX7313, for example. There is no shortage of LED drivers like that. Those datasheets will give you some keywords to find more.
There are also ICs specifically for driving segmented LED displays and matrices. I had some success with AS1115. |
H: Transformer winding
My EI core size is 32mm*60mm giving 368 W maximum power.I want to make 30 0 30 5A secondary out from transformer. according to my calculation dual winding of 75 turns for 30 0 30 V if i want another 25 0 25 V 5A from same winding with same center tap.Can it possible after dual 62 turn to take wire out for 25 0 25 V and continue up 75 turn which will give 30 0 30 final out from secondary.(Note that I will not use both voltage at same time).
AI: This will work as you suggest but you need to take account of loading effects on the transformer and leakage inductance plays a part in this. The upshot being that you might choose to add a turn or two to all secondary windings or maybe remove a few turns from the primary. This means that open circuit the secondaries might be a little high but, under loading conditions, the output will be nominally correct. It's optional. |
H: 10k potentiometer symbol meaning?
i am trying to map this schematic onto a virtual breadboard but i dont understand what the 10k potentiometer symbol represents. am i supposed to connect the 5v terminal to the positive end of a battery and 0v to negative end. The virtual potentiometer also has three pins with the middle one labeled wiper while the other two named as terminals so where do i connect the pins?
AI: A potentiometer has 3 terminals, and physically consists of a resistive track with terminals at either end and a moveable 'wiper' terminal that can be positioned anywhere along the track.
A typical use for a potentiometer is as a variable voltage divider, and this is how it is being used in your circuit. 5V is presented across the length of the track (at the terminals), and so the voltage at the wiper can be altered to give any voltage value in this range.
Potentiometers are usually drawn as a fixed resistor (the track) with an arrow representing the wiper positioned somewhere along its length. The one in your diagram is simply missing its arrow head. So yes, you connect the wiper to pin 5 of your IC, one of the track ends to GND and the other to 5V (which is also the supply to your servo, and is presumably the same as Vcc supplied to the IC) |
H: How can a smartphone's extended battery be same size as the original battery?
I know this is kind of a basic question, there might be a few ways to answer it...
Recently I found out there is a slim extended battery which has the same size as OEM battery (I mean really same size height and width, not using a different battery cover,) how is that possible?
In simply physics, if the OEM Battery already max out the capacity of storing mAh in such a size, how is the Extended Battery able to have more capacity with the same size?
For example, I found original battery capacity is 2800mAh
But here the extended battery can be up to 3800mAh, 4400mAh, that's a huge difference...
Are those extended batteries just fake products?
AI: This can be false marketing. This can also be more or less true and here's how.
First, battery technology slowly advances. One major power tools producer launched its 10.8 volts line of professional power tools in perhaps 2004 and they shipped with batteries assembled of 1Ah Li-Ion cells. In perhaps 2007 they switched to 1.3 Ah cells of the same size. Later they somehow found 1.5 Ah cells and 2.0 Ah cells still of the same size. Nowadays tools from that line come with 1.5 Ah and 2.0 Ah batteries. Newer batteries can be used on older tools and older batteries can be used on newer tools. I have no independent data to back the claim that batteries capacity indeed increases as claimed but batteries are key elements to power tools so I assume a major tools producer would not fool us like that.
Second, it depends on how you measure. You can charge the battery to different states. One major power tools producer claims certain Li-Ion batteries are charged fully in 35 minutes. Answers to this question explain that it's simply impossible and the most likely scenario is that the battery is actually charged to about 80% which isn't that bad. So if you know that the target device only charges a battery to 80% you can charge your battery to 100% when measuring capacity. Customers will be unable to use that full capacity but you can simply disclose your measuring procedure in the finest print available.
Third, you could find a battery with slightly thinner case which simply holds more chemicals and thus has larger capacity.
Fourth, you could find a battery that uses more compact safety features or lacks some of them. Major battery producers make some effort to ensure that batteries don't explode or burn under heavy loads. That also takes some volume of the battery. Make those less reliable or remove them - and you can fit more chemicals into the battery and get larger capacity. |
H: How to generate UART interrupt for GPIOs?
I am using PIC32 and I have few inputs. I want a UART Tx Interrupt to fire whenever any input becomes HIGH. I have somehow manged to write code for UART tx and rx interrupt and its working but I don't have an idea how to implement it for my application.
int main()
{
//configure UART
UARTConfigure(UART1, UART_ENABLE_PINS_TX_RX_ONLY);
UARTSetFifoMode(UART1, UART_INTERRUPT_ON_TX_NOT_FULL | UART_INTERRUPT_ON_RX_NOT_EMPTY);
UARTSetLineControl(UART1, UART_DATA_SIZE_8_BITS | UART_PARITY_NONE | UART_STOP_BITS_1);
UARTSetDataRate(UART1, FPB, 115200);
UARTEnable(UART1, UART_ENABLE_FLAGS(UART_PERIPHERAL | UART_RX | UART_TX));
// Configure UART Interrupt
INTEnable(INT_SOURCE_UART_RX(UART1), INT_ENABLED);
INTSetVectorPriority(INT_VECTOR_UART(UART1), INT_PRIORITY_LEVEL_2);
INTSetVectorSubPriority(INT_VECTOR_UART(UART1), INT_SUB_PRIORITY_LEVEL_0);
// Enable multi-vector interrupts
INTConfigureSystem(INT_SYSTEM_CONFIG_MULT_VECTOR);
INTEnableInterrupts();
while(1)
{
//main code
}
}
void __ISR(_UART1_VECTOR, ipl2) IntUart1Handler(void)
{
// RX interrupt
if(INTGetFlag(INT_SOURCE_UART_RX(UART1)))
{
// Clear the RX interrupt Flag
INTClearFlag(INT_SOURCE_UART_RX(UART1));
// Echo what we just received.
char RxBuffer[5];
if((U1STAbits.URXDA)!=0)
{
getsUART1(5,RxBuffer , 123);
U1STAbits.URXDA = 0;
U1STAbits.OERR = 0;
putsUART1(RxBuffer);
putsUART1("\n");
memset(RxBuffer,0,5*sizeof(char));
}
}
// TX interrupt
if ( INTGetFlag(INT_SOURCE_UART_TX(UART1)) )
{
INTClearFlag(INT_SOURCE_UART_TX(UART1));
}
}
I don't know what logic should I made so that if any inputs become HIGH, lets say
if(INPUT1 == HIGH)
{
//generate UART tx interrupt
}
Please help. Thanks!
AI: Use pseudo-code:
if(INPUT1 == HIGH)
{
//fill Tx FIFO buffer with some data, which causes UART Tx interrupt
}
UART TX interrupt is fired, when UART TX FIFO buffer is filled with data. |
H: 3V Current source with low voltage drop
I'm trying to make a IR laser diode driver which needs 1.9V and ~80-100 mA constant current. Most of laser driver circuits in web has LM317 as a current source but that design has always voltage drop around 2.5V. Since I have 3V supply, i'm trying to find an alternative way with low drop-out voltage.
I have found LT3085 (Datasheet) which says 275mV dropout voltage.
In datasheet's typical application section there is a circuit for Current Source but Vin=10V. Since LT3085 has "Wide Input Voltage Range 1.2V to 36V". How can I use with 3V supply?
AI: that regulator has low drop out, but it requires a supply voltage for the internal circuitry (not for the load) thats a 1.5V more than the output voltage. configure it as a current sink.
connect the load between +3V and in
connect Vcontrol to +3V
connect set to 31K resistor to ground
connect out to 3.3 ohms resistor to ground |
H: How does the force given by bi-polar stepper motor relate to the delay between the steps?
We are using the following Bi-polar motor.(Haydon Kerk 25343-05).
https://prototypes.haydonkerk.com/ecatalog/can-stack-linear-actuator/en/linear-actuator-25343-05
You will find the specs of the motor in the above link.
There is a micro-controller which drives the motor. The motor is rotating in clockwise and anti-clockwise directions with the below pattern given at the micro-controller GPIOs.
0101->1001->1010->0110->0101... the motor will rotate one direction and for
0101->0110->1010->1001->0101... it will go the other way.
If I add a delay between steps, it rotates slower. But does it increase the force exerted by the motor or decrease the force? How is the force given by the motor relate to the delay between the steps?
AI: If you look at the "Resources" tab on the URL you provided, you will find the link for the Performance Curve pdf.
Look at the "Thrust vs full steps per second" graph, I copied the image here: |
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