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H: How do I determine what range (not necessarily value) of resistors to use for voltage dividing
I'm getting back into electronics as a hobby and doing some refreshers having been away from it for a long time. I understand Ohm's law and voltage dividing, however, I'm not sure I understand what the proper ranges of resistors to use are when dividing voltages.
For example, if I have a 5 V source and I want two 2.5 V divisions, I can use two 10 kΩ resistors to get that.
But I can ALSO use two 100 kΩ resistors, or two 1 MΩ resistors. What I'm struggling with is: what is the determining factor or calculation that I should be using to determine which pair is the best way to do this? Is it based on current requirements?
On a side/similar note, as a project I'm going to build a digital thermometer. I have a TM346 sensor and will be converting its output to digital and use a microprocessor to convert to a temperature, but to use the A/D converter (ADC0804LCN) and get the full dynamic range of conversion, I need to supply this chip some reference voltages.
What's the best way to provide accurate voltages to this chip? I figure voltage dividing is not the best way to handle it. Aa a low reference I need to supply 322 mV and as a high reference I need to supply 628 mV. I'm assuming voltage dividing is NOT the best way to accurately get these values.
AI: When you build a simple resistor voltage divider, you're also creating a path to ground for whatever is sourcing current. For example, if you're just dividing 5 volts in half with two 10k resistors, you've also essentially added a 20k load to the supply, adding 250 µA. That might not seem like much, but if you're building a device that's meant to be battery-operated and last for years, that matters a lot.
On the other hand, if you have too little current, for example, to charge the gate of a capacitive input, it may be inadequate because it takes too long to measure, etc.
As you suspected, the range of values should be based on current: enough to drive whatever is downstream effectively, but not so much that it burdens something upstream. |
H: LED Driver Advice Reqd
I'm looking to put LED strips into my converted van. Using some before, it wasn't long before they dimmed or individual leds failed. I was told it was because automotive voltage, especially on newer vehicles, sits much higher (14.4v) than the 12v reqd to drive the strip. Apparently they do not like being over driven.
So, I was thinking instead to drive them at 11v constantly. I understand they would produce fewer lumens but I'd happily forgo those for longevity.
Can anyone advise on a suitable cct? I was thinking of using something like am LM317 to get my 11v constantly, but what would I need to drive the input up far enough to keep the 317 working when the battery is sat a tad discharged at 11v ish?
Hope it makes sense ;-)
AI: Most dumb led strips have resistors that limit the leds to about 18mA at 12V, and 20mA at 14V. They already adjust for the higher voltage. The issue is cheaper ones use cheaper parts that don't last as long as you think they should. Even some of the expensive ones are just cheap ones relabeled.
Yes, running them at a lower voltage is a good idea. A LM317 Linear regulator is probably not the best as (VIN - VOUT) * A is wasted in heat. This adds up. Anything above 3W will need to start using active cooling. At even 11V 1A out, your looking at 14.4V 1A in, 3.3V 1A or 3.3W wasted.
You need to go with a switching regulator. These commonly have over 80% efficiency, sometimes up to 95%. Even at 80%, the same 11V 1A out as above will only waste 2.2W of heat. An entire watt saved. At 95% its only 0.6W wasted. Most switching regulators can go into pass through if close to 11V so that would solve your other issue.
Any number of off the shelf switching regulators or modules online that would work. Just look for their efficiency at the amperage and voltages you are working with. |
H: Determine the operating point of the circuit in the figure. Voltage divider, op amp, diode
simulate this circuit – Schematic created using CircuitLab
Since the operating point of the circuit is determined by analysing it in DC, the capacitors behave as open circuits.
At this point, as far as I understand it, the voltage at node V+ is determined by the voltage divider consisting of resistors R2 and R1.
$$V_+ = E \frac{R_1}{R_1 + R_2} = 30\text{ mV}$$
Since the operational amplifier is ideal, due to the virtual short-circuit principle, node V- will have the same voltage.
The voltage drop at the ends of resistor R4 causes a current to flow towards ground. The same current will flow through R5, since it cannot pass through the input of the op amp.
This way I can determine
$$V_x = R_5\frac{V_-}{R_4} + V_-=0,3V$$
But at this point either I find a negative Vout or the diode remains off and Vout = 0.
What am I doing wrong?
AI: Your equation for \$V_+\$ is correct but you've calculated the value incorrectly -- it is 147 mV, not 30 mV.
\$V_-\$ has the same voltage, as you've stated, so the current flowing from that node to ground through \$R_4\$ is \$147\text{ mV} / 10\text{ k}\Omega = 14.7\mu\text{A}\$. That same current flows from \$V_x\$ to \$V_-\$ through \$R_5\$ (since, as you've stated, no current flows into or out of the op amp's input) so \$V_x\$ is \$14.7\mu\text{A} \times 90\text{ k}\Omega = 1.323\text{ V}\$ above \$V_-\$, which is therefore \$V_x = 1.47\text{ V}\$. \$V_{\text{out}}\$ is 700 mV less than \$V_x\$ since the diode is on. |
H: Lifetime of unprotected PCB outdoors
I'm designing a 40GHz RF system that will be operated outside for research. I prefer avoiding conformal coating and radomes to protect it due to cost, complexity, and loss. An alternative I'm considering is no protection, since the acceptable working life is only 50 hours. Also, we can choose to only operate in good weather conditions, without rain or high dust, around 20 Celsius. Does anyone have experience with the lifetime of unprotected PCBs outdoors?
AI: Since you're only expecting a couple of days of operation, it's not corrosion of the PCB I'd worry about. But moisture condensing or accumulating on a 40 GHz circuit and antenna element can certainly affect them.
Possibly the simplest, cheapest protection, that would not affect the radiation pattern, is an inverted styrofoam cup or bowl placed over the circuit board. Low density styrofoam is pretty transparent to RF. Use a big enough cup so that it doesn't come within 10 mm (i.e. about a wavelength) of the antenna portion of the circuit. |
H: How does a phase shift keying receiver detect when a new incoming modulated signal is at the input?
This is not a math question.
What I want to know is the physical implementation of the receiver where phase modulated signal is coming to the receiver.
How does the receiver decide when the phase reversal occurs or one bit duration is completed and the second bit is being received? I mean how are the sender and receiver synchronized and how does the receiver know when to sample the incoming continuous signal for processing?
In the UART protocol, there are start bits and end bits and the baud rate is known to the receiver so that it can easily know what to do, when to sample bits etc.
How does the whole thing apply to the PSK situation?
AI: What I want to know is the physical implementation of the receiver
Well I cannot give you schematics (beyond the scope of this site) but I can say a few words about the problems and what needs to be overcome.
The tricky bit is knowing the actual phase of the received signal and, trying to decode the demodulated data to a 1 or a 0. Basically, the receiver cannot initially know the phase of the signal and therefore, it cannot interpret the initial signal as a 1 or a 0. It has to wait until the phase changes and then it can "frame" the received signal correctly.
But it's a bit more complex; the transmitter cannot send out a whole bunch of logic 1s (or 0s) and expect the receiver to keep track of a constant phase signal ad infinitum; the data has to be encoded to prevent an excessive number of contiguous 1s or 0s being transmitted.
It can do this by Manchester encoding (a wasteful scheme) or by data scrambling (symbol and BW efficient). Of course the receiver has to understand the encoding/scrambling but, that's trivial. The receiver also has to know the baud rate but again, that is also trivial.
So, once the receiver aligns itself with data edges, it can start to sample the demodulated data in the middle of the symbol but, several to tens of initial bits will be lost prior to full alignment (unlike a UART where it's expected to be up and running in an instant).
This may sound wasteful but, but consider that all radio data transmission systems have to use what is known as a data preamble when a packet is sent so that the receiver can align its RF circuits to the signal. The preamble is just a series of 1s and 0s encoded in such a way as to make it distinguishable from normal data. This preamble allows the receiver to lock-in to the transmission and decode initial data that doesn't form part of the payload message.
In other words, when the receiver eventually locks-in to the preamble, it expects data to follow. Here's an example for FSK data transmission but, it's pretty much the same for PSK: -
To the right of the picture is when real payload data would become transmitted (and hopefully received correctly).
Picture originally used here: -
In one-way asynchronous serial communication, how does the receiver sync up its bytes?
Data encoding for GFSK wireless
The links above may also make interesting reading. You might also be interested in how a receiver has to lock-in to the amplitude of a carrier. Clearly, if the modulation is pure FSK or PSK then the RF stage can operate at full gain and "lose" amplitude artefacts but, if a QAM scheme is involved then, an AGC circuit has to try and make the best SNR from the incoming RF signal as well: -
Picture from Why is this Arduino RF Receiver changing value back and forth so much?. |
H: Bipolar stepper motor spins very slowly and makes a loud noise
I got a custom PCB. I am using DRV8428P driver (here is the datasheet) for a stepper motor. The problem I am facing is not being able to have the stepper rotate faster than 5 rpm. Also, the stepper makes a very loud noise.
Here is the schematic of my stepper controller:
Here are the specs of the stepper motor:
Here is how I wired up my stepper to the custom PCB:
My controller is Raspberry Pi Zero and I am using Python to drive the stepper:
import RPi.GPIO as GPIO
import time
delay = 0.0005 #time to settle
AIN1 = 21 # GPIO21
AIN2 = 26 # GPIO26
BIN1 = 20 # GPIO20
BIN2 = 8 # GPIO8
def setup():
GPIO.setmode(GPIO.BCM)
GPIO.setup(AIN1, GPIO.OUT, initial=GPIO.LOW)
GPIO.setup(AIN2, GPIO.OUT, initial=GPIO.LOW)
GPIO.setup(BIN1, GPIO.OUT, initial=GPIO.LOW)
GPIO.setup(BIN2, GPIO.OUT, initial=GPIO.LOW)
setup()
def setStep(w1, w2, w3, w4):
GPIO.output(AIN1, w1)
GPIO.output(AIN2, w2)
GPIO.output(BIN1, w3)
GPIO.output(BIN2, w4)
time.sleep(delay)
try:
while 1:
setStep(1,0,1,0)
setStep(0,1,1,0)
setStep(0,1,0,1)
setStep(1,0,0,1)
except KeyboardInterrupt:
pass
GPIO.cleanup()
When I decrease the delay value, the stepper mostly won't move but vibrates. The delay value that seems to work is 0.0005. However, the stepper makes a loud noise and barely rotates. I uploaded a short video of the stepper here: https://streamable.com/6kyayx.
I am not sure how get the stepper to spin as fast as 150 rpm as it is stated in the stepper's specs. I also have a hard time translating the hints to Python code, which are given in the steppers specs regarding high torque and initial phase setup.
Any ideas?
AI: Check with a multimeter that red-yellow is one coil and blue-orange is the other.
The chart shows that you've got to start the stepper at about 500 Hz and ramp up. Starting at too high a frequency will cause it to stall.
500 Hz would correspond to 2 ms per step rather than 0.5 ms which is what your delay = 0.0005 is giving you. |
H: Low noise voltage clamp for ADC
I have a sensor that can output 0 to 12 VDC. However, the ADC I am using can only convert 0..3.3 V. I am trying to limit the sensor output to 3.3 V to protect the ADC from damage.
The sensor output range of interest is 0..0.1 V and it is important to minimize noise there as much as possible. I have seen circuits with diodes used to limit the voltage but I believe they add significant noise.
Would a voltage follower op-amp circuit using a 3.3 V positive supply be able to limit the voltage, while adding less noise than the diode voltage clamps?
I don't have a negative voltage regulator so I am unable to provide a -3.3 V negative supply but do have a -12 V supply. Will using 3.3 V and -12 V supplies for the op-amp affect its output in any way I need to be concerned about?
AI: I used this schematic with good results.
It was an instrumentation opamp powered from +/-15V, because that was required due to the input voltage common mode. So its output would range from about -13V to +13V. The ADC had to be protected from that. You can use any other opamp, of course.
R1 limits current. If frequency is low, you can use a higher value. Then D1/D2 are the usual diode clamps. Schottky diodes are preferable. The 3V zener diode is kept in on-state by R2, which keeps D1 off when it doesn't need to be on. This keeps capacitance low. I used a zener because the 3V3 supply was not able to sink the maximum current that could flow through R1.
You could also just use a zener, which works as a diode in one direction and limits negative voltage to about -0.7V, and works as a zener in the other direction to limit voltage. But zeners have quite large capacitance, which can distort your signal.
Note this circuit will not protect the micro if its 3V3 supply is missing. In this case it will limit input voltage to 3V3, but that's not low enough if the micro is unpowered. So the 3V3 supply should be derived from the 12V supply yo make sure they come up at the same time.
Another solution is to use a diode clamp to the power supply, but then you have to make sure it can sink the current, because the 3V3 LDO only works one way. A solution can be to use a TL431 wired as shunt regulator, set to 3.4V, and acting as overvoltage protection. |
H: How can a DALI power supply handle shorting
I'm trying to understand how a DALI power supply can handle being shorted, when a controller is transmitting a signal. The AN1465 application node helped a lot with understanding a usage, but I'm still not quite sure about how the power supply handles the shorting.
Is it using a form of short circuit protection? I know that the supply is limited to 250 mA, but what about the shorts?
AI: I'm still not quite sure about how the power supply handles the
shorting.
From the document you linked is this short circuit current limiter: -
That circuit will limit the maximum external current to about 60 mA when shorted out although it won't be capable of driving a full bus worth of units. |
H: What is the primary motivation behind combining A series and R series ARM onto an FPGA in MPSoC Xilinx devices?
The first entry into the SoC series from Xilinx was the Zynq SoC. It combined ARM cortex A9 processor with programmable logic to get the best of both worlds.
The current generation contains Ultrascale+ devices that Zynq UltraScale+ MPSoC and Zynq UltraScale+ RFSoC. These contain:
Dual or Quad Arm® Cortex®-A53
Dual Arm Cortex-R5F
What I fail to understand is, what would a person do with so many cores? And why mix A and R series ARM processors anyway? I don't know what the difference between them is. If we need processing power, we could just go for a DSP, GPU or something else isn't it? I am missing the point here actually.
AI: Multiple CPUs on an SoC FPGA have several typical applications, some examples being:
Each CPU targeted to a specific task and I/O, either with private buses and/or memory and/or IO or shared with other CPUs.
Two sets of CPU/memory with shared I/O for dual redundancy.
Three CPUs connected in lock-step for triple-mode redundancy.
This list of examples far from not exhaustive, though I'll refrain from keeping tweaking it.
Many of these functions are found on microcontrollers and SoCs but without the FPGA gates, which is why they're made.
One thing's for sure: they will all be in there because enough customers requested them for specific applications they have. They'll have stayed on their product line-up because customers kept buying them. They're not made to see if they might sell. With the very large devices, it's typically relatively few customers buying relatively few parts at relatively very high cost (some many £k/part). Like most manufacturers, FPGA manufacturers are very market driven for their higher-end products. |
H: Potentiometer ADC noise varies based on position of wiper?
I have a potentiometer setup as a voltage divider like so, where the wiper of the potentiometer gets fed into my MCUs ADC Pin:
When I measure the noise of the incoming ADC signal, I get different levels of noise based on the position of the wiper.
For example, I get greater noise when the voltage is closer to 3.3V, and much less noise when the voltage is closer to GND.
I can't understand why this might happen . The noise is reaching levels that are quite problematic as well...
The way I am determining signal noise it by taking 100 samples of the ADC while the potentiometer is "idle" (ie. not being touched) and then calculating the noise of the signal by determining the highest value sample recorded minus the lowest value sample recorded divided by 2. Here are some rough values being logged.
Wiper position close to 3.3V rail: noise around 1000
Wiper @ middle position: noise around 500
Wiper position close to GND: noise is minimal (around 40)
So yeah... signal noise is increasing as the voltage on the ADC pin increases. This couldn't be a faulty potentiometer could it?
AI: The source of the noise is the switching regulator and switching logic loads on it.
As the potentiometer wiper is moved closer to the supply rail, the resistance between the rail noise and the capacitor is lower. So the cut-off frequency of the RC filter is higher and has less effect as seen at your sampling rate.
As the wiper is moved further from the rail, the RC filter has a lower cut-off frequency.
The filter cut-off frequency is given by: fc = 1/(2 x Pi x RC)
To alleviate this, you can put the supply through an initial RC filter before driving the potentiometer. The below circuit uses a filter with an fc of 72 Hz, far below your rail supply/load switching frequencies. The 100 ohm series resistor drops just under 1% of the 3.3 V rail so the potentiometer still has almost the full range. With the noise removed, the potentiometer will give a much truer range anyway.
simulate this circuit – Schematic created using CircuitLab
This circuit removes the capacitor on the potentiometer output as it's not needed. You don't give part numbers so the ADC input impedance is unknown. But it must have a high input impedance for you not to see worse noise at the mid-ish rail pot' settings. |
H: Why does KiCad / FreeRoute connect an IC's input pin with ground even if such a connection is missing in the schema?
After uploading my PCB design for manufacture, I got an error message about an input pin (#14) of one of the ICs (U4; a TDA7560 amp) being connected to GND and GNDA:
Result Source net Source pad Destination net Destination pad R [Ω]
Short GND D1 / 2 NET-(C22-PAD1) C22 / 1 0
Short GND D1 / 2 GNDA D4 / 2 0
Short GNDA D4 / 2 NET-(C22-PAD1) C22 / 1 0
But: I have never defined such a connection in the KiCad schema I had drawn:
There is just one connection to one of the outputs of the mixer chip on the left via coupling cap and nothing more.
Nevertheless, after generating the net file, constructing the PCB layout, and making FreeRoute do all the routings, I got a conductor path (Net–(C22–Pad1)) crossing the net tie (!) between GND and GNDA. See the path highlighted in pink, which should only connect the C22 cap with pin #14 of U4:
It collides both with GND, and with GNDA where the net tie connecting GND and GNDA lies. Is this a bug in KiCad's Pcbnew or FreeRoute?
UPDATE: When correcting the PCB layout, I found out that the net tie was in fact connected to the NET-(C22-PAD1) path with a narrow white line. See the screenshot below. Does this mean that the wrong connection was already in the net list? Then it becomes somehow mysterious why the DRC didn't warn me.
AI: Hover/select D1, press M, move it out of the way, then D4 and C22. Check for suspicious wiring; delete and redo them, but they are probably fine. In my experience, KiCAD will complain if you violate design rules, both at schematic stage and PCB stage. Problem is, you loaded the netlist into an external tool and autorouted it; KiCAD was then unaware of the changes. Perhaps it should be, but a DRC check is not done automatically.
Looks to me like the highlighted track was erroneously ran overtop the GNDA track or vice-versa by the auto-router. If so, FreeRoute lived up to it's cost (free.) Always do a DRC (design rule check) before fab.
As a bodge, cut that skinny track right near GNDA on both sides. Just touching it with a dremel cut-off disc is very fast. Then run a wire from U4.14 to C22. 30ga Kynar wire works great for this; use an x-acto blade to cut the insulation by rolling the wire under it gently. |
H: Twisting two cables: Does the rotation of each cable play any role?
When twisting two cables (imagine f.e. something like a twisted pair cable), does the rotation of both cables have any importance? I.e., is it important that each cable rotates around its own axis as both cables are twisted together, or should it be kept "unrotated" so to be sure that possible side effects happen/don't happen?
AI: The rotation of each cable around its center axis is unimportant electrically, though if it's extreme it could be important mechanically.
The reasons for twisting conductors together are to minimize inductance and to reject common-mode noise in differential applications (Noise incident on both cables is rejected by a differential receiver.) . In either case the important thing is the twist of the two conductors, not the twist of each individual cable in the pair. |
H: Signals acting weirdly in VHDL
I've always been told that a signal updates its values after a wait statement, or after a rising edge if we have for example
if rising_edge(clk) then
but in this testbench, after the first wait statement and giving values Rst, Load, and Data, which are signals, it updates those signals instantly, if I use ModelSim, it doesn't wait after the second wait statement to update those signals.
readVec: PROCESS
VARIABLE VectorLine: LINE;
VARIABLE VectorValid: BOOLEAN;
VARIABLE vRst: STD_LOGIC;
VARIABLE vLoad: STD_LOGIC;
VARIABLE vData: STD_LOGIC_VECTOR(7 DOWNTO 0);
VARIABLE vQ: STD_LOGIC_VECTOR(7 DOWNTO 0);
VARIABLE space: CHARACTER;
BEGIN
WHILE NOT ENDFILE (vectorFile) LOOP
readline(vectorFile, VectorLine); -- put file data into line
read(VectorLine, vRst, good => VectorValid);
NEXT WHEN NOT VectorValid;
read(VectorLine, space);
read(VectorLine, vLoad);
read(VectorLine, space);
read(VectorLine, vData);
read(VectorLine, space);
read(VectorLine, vQ);
WAIT FOR ClkPeriod/4;
Rst <= vRst;
Load <= vLoad;
Data <= vData;
Qexpected <= vQ;
WAIT FOR (ClkPeriod/4) * 3;
END LOOP;
ASSERT FALSE
REPORT "Simulation complete"
SEVERITY NOTE;
WAIT;
END PROCESS;
AI: I've always been told that a signal updates its values after a wait
statement, or after a rising edge if we have for example 'if
rising_edge(clk) then'
You've been misinformed somewhat. In VHDL, a signal updates its value:
on a wait statement (not after it)
at the end of a process
'On a wait statement' means 'upon starting the wait statement'.
A process that has a sensitivity list is said to be sensitive to the signal(s) in that list. The process has the same behaviour as a process with no sensitivity list but instead having all of the list signals in a 'wait on' statement - which must be final statement in the process.
So the following are logically identical:
p: process(RST, CLK) is
begin
if (RST = '1') then
a <= '0';
elsif rising_edge(CLK) then
a <= b;
end if;
end process p;
p: process is
begin
if (RST = '1') then
a <= '0';
elsif rising_edge(CLK) then
a <= b;
end if;
wait on RST, CLK;
end process p;
From this, a signal update does not happen on a rising edge because the rising_edge function is 'special' in some way. rising_edge simply executed when the process is executed, which happens if the process it's in is sensitive to the signal rising_edge tests. Both are usually a clock.
In your example shown, the signals will be updated after the first 1/4 of your clock period. Most often, it would be written instead as:
...
read(VectorLine, vQ);
Rst <= vRst;
Load <= vLoad;
Data <= vData;
Qexpected <= vQ;
wait for ClkPeriod;
...
This updates the signals at the start of each clock period, the same as the actual design logic processes that your testbench is testing will do. |
H: Is this circuit the right way to drive a piezo buzzer?
I am trying to drive a piezo buzzer and came up with the following circuit. Am I doing it right?
AI: You show no good reason for deviating from the specs in the datasheet.
Stay within the specs. Next time please include the specs in the question.
Also, an MMBT3904 does not have hFE>200 and the diode is essential.
A better choice is a small signal diode and https://www.digikey.ca/en/products/detail/diodes-incorporated/BC847BW-7-F/1142228.
It depends how loud you need But it is rated for +/-3V or 3.0 Vp and not +5V/-1V, which might work but offset the coil from it's rated centre position or perhaps saturate the core and draw more current. |
H: Is it possible that north and south poles of a disc-shaped magnet change position over time?
[See update at the bottom]
We build brushless DC motors of about 1 kW power at 48 volts. In order to drive the motor, we need to know the rotor position and, to do that, we fit a disc-shaped magnet on the top of the shaft, and read the rotor position using the Infineon TLE5012B angular sensor (datasheet: https://www.infineon.com/dgdl/Infineon-TLE5012B_Exxxx-DS-v02_01-EN.pdf?fileId=db3a304334fac4c601350f31c43c433f).
The overall setup is as described in this image, taken from the sensor user manual:
The magnet is a disc 10 mm wide and 4 mm thick:
Looking at the image above, it is not that the north is on one face, and the south on the other face: both north and south lie on the same face, with the north "up" (for example) and the south diametrally opposed.
When the motor+control board are assembled, we run a self-learning procedure which determines precisely the orientation of the magnet in respect to the rotor. It is very important that the board knows the
precise offset (in degrees) of the north of the magnet, because once per turn the sensor generates an index pulse, and that pulse tells the board the rotor angle. The requested precision of this offset is about 5 degrees: if the offset is wrong by more than that, the motor sinks a lot of current and turns badly especially at higher speeds.
This system normally works well but, in about 10% of the cases, after some time (days or weeks) the motor starts to turn badly. Re-running the self learning procedure solves the issue. It seems that the magnet is not the same as before, a permanent change happens, correctable only by changing the stored offset (through the self learning procedure which, essentially, searches for the zero position which is now different than before).
Initially we thought that the magnet could mechanically move, so we started to fix it with some drops of glue. But this is not the issue, it seems.
So here is my question: is it possible that the north and south of a magnet like that change their position, especially thinking that the magnetic disc is mounted on the rotor of a brushless DC motor,
where there are strong magnets? A move of one or two degrees does no harm; if that happens, we are facing a movement of 5 or more degrees.
---UPDATE---:
What I mean with "change position of the poles" is that, after some unknown event (maybe temperature, or anything), the offset ("calibration") stored in the control board is no more valid. A new self-learning procedure corrects the problem. This means probably, that the poles have changed their position. The offset stored by the board is no more valid for that magnet. If both poles become weaker, together, probably there is no problem (the sensor auto regulates its sensitivity). But if the loss of magnetism is uneven among the two poles (who knows?), the "geometry" of the magnet changes and, to the sensor, it appears as the two poles have moved. May it be?
---UPDATE 2---:
I have to clarify why I think there is a permanent change in the magnetic disc.
There is a "zero position" of the rotor. This "zero" is when the rotos is oriented in a precise position: at zero degrees (out of 360). Now suppose the sensor disc magnet is positioned perfectly onto the rotor such that, when the rotor is in its mechanical zero, the disc is perfectly aligned with the sensor, so the sensor emits a INDEX pulse. If I don't fit the disc in the correct position, the sensor will emit an index pulse anyway, but out of phase with the mechanical zero position of the rotor. For example, the index will come, every turn, at 5 degrees instead of 0 degrees.
By running the self-learning procedure, the control board is able to detect this misalignment or offset (5 degrees). This offset is then stored in non-volatile memory. From that moment, I can turn off the system, power it back again, and everything works because the absolute position of the rotor is corrected by the stored offset, so the electronic board knows the real position of the rotor and can energyze the coils correctly.
Now suppose I move the disc 10 degrees clockwise and power up the system: the control board will always get the wrong position of the rotor (always 10 degrees), so it will energyze the wrong coils (or not the "wrong coils", the correct ones, but too early or too late).
At this point, I run again the self-learning procedure, and the control board notices that the offset is not 5 degrees as before: now it is 15 degrees. The new offset is stored in memory, and everything works well again.
This is what is happening to us: we calibrate the system and send it to customers. Sometimes (10%), the customers calls us telling the motor fails. A new calibration solves. Only a couple of motors have been returned for inspection, at the moment, and we are investigating. Now, we understand that the offset has changed, but we have not been able to replicate the problem. We are sure that the position of the disc does not change, because we mark the position and also fix it with glue. It really seems that the poles of the magnetic disc change their position: and not only slightly, because an error in the offset is tolerable up to a few degrees (say, 3 or 4).
Here comes the question: is it possible that a magnetic disc moves its N and S poles in a permanent way, due to the continuous presence of external magnetic fields, perhaps in conjunction with high temperature events? It happens only in a few cases, and there are different situations. Sometimes the motor can heat, perhaps only once during installation, or maybe only once, or repeatedly, the motor is over stressed with big currents and hence anormally strong magnetic fields. But the result, it seems, is the same: the offset must be recalculated.
AI: If you use neodynium magnet, maximum usable temperature is 80°C, although Curie point is ~300 °C !
EDIT: Some characteristics and specs in french, sorry.
Remark : somewhere in this page ...
https://www.supermagnete.fr/faq/Les-aimants-les-plus-forts-du-monde
A strong external magnetic field, such as a large neodymium supermagnet, could weaken the magnetization of an AlNiCo magnet, remove it or even reverse the north and south poles.
Use SH or higher |
H: Double Bridge-Rectifier Circuit Question
I am up to building a NE555 controlled PWM circuit that will power a 220v heater. NE555 will use a typical configuration and will drive a 20N60 Mosfet. The mosfet Vgs(th) is 10v, so NE555 needs to be powered by a 12-15v power supply. Because device's output is basically 220v, I decided to power NE555 w/o a transformer. Of course, the simplest solution is just use a big resistor, but that would dissipate too much heat. So I decided to use the capacitative dropper circuit. So, I have two rectifiers, one for the mosfet part, the other for the NE555 part, please consider schematics.
I built the circuit and it works. However, for NE555 to control the mosfet, I need to short GND-A and GND-B. Once I did this, the zener was immediately burned. I tried to analyze path of current during each half-wave, and I don't see how it could make its way thru the diodes to, obviously bypass the 0.22uF cap, and burn the zener. Anyone care to explain, please?
AI: I tried to analyse path of current during each half-wave, and I don't
see how it could make its way thru the diodes to, obviously bypass the
0.22uF cap, and burn the zener. Anyone care to explain, please?
Just trace it round like this: -
Basically, with the AC instantaneous polarity as shown by the + and - symbols, the zener diode receives the full 220 volts peak waveform and burns. |
H: Why does the below SPICE simulation show an initial current even before the voltage source is applied?
LT-spice simulation is showing a sudden jump in MOSFET current from 0 to 5mA at t=0. What would be the explanation for this? Is it a tool issue?
All the capacitor initial voltages (C2, C1 and C4) are set to 0.
The initial 5mA is seen to be flowing through MOSFET M2 and C4. How can MOSFET conduct this mA current without the gate being turned on? More surprisingly before the input voltage is ramped up!!
Current through C2 seems to be ramping up at the same rate as input voltage.
AI: There's no glitch, it's the result of differentiation for the combined effect of the parasitic capacitances. In this case, if you modify the .MODEL to have Cjo=0 Cgs=0, you'll see that the effect vanishes. Even more, if you add a 1n cap externally across the DS and plot the current through it, you'll see that the current has the same "jump":
The value is 1.01n because the current for 1n is 1.4m, which makes the plot look like the current is part of the axes (visual tweak, nothing else).
You can also try uic instead of startup, and then you'll see kA at play. That's because startup ads a fixed 20 μs ramp to the sources, while uic makes it relative to the time step (e.g. as small as possible), thus the slopes are magnitudes in difference (in this case). |
H: Why does the resistance of a space heater decrease as it gets hot?
I came across something I find odd while hacking a space heater into a high power dummy load: my cheap space heater is rated 1.5 kW 110 VAC, so I expected to see less than 8 ohms which, when heating, would increase to about 8 ohms in steady-state with the fan ON.
Indeed, the resistance of copper increases with temperature - even if the resisting element is not made of copper, I assume most metals (except NTC) do the same in varying degrees.
I'm not familiar with US electrical supply, so I just assumed here the increased initial current is handled - otherwise there might have been some inrush control built-in.
After tearing it apart, which revealed the heating element was as expected directly connected to the supply, I measured the resistance at 50 ohms. Puzzled, I applied 30 V DC across the prongs and the current increased from 0.6 A to more than 3 A in a matter of minutes. Without suprise, the resistance had gone down with heating to about 10 ohms. The fan wasn't on, it's not an universal motor but an AC machine.
Am I forgetting something fundamental or isn't it a bit odd that the resistance decreases with temperature like NTC resistors? If not, what kind of material does that?
AI: There are few types of heating elements used in space heaters, all with their peculiarities.
The traditional Kantal wire, formed as a spiral/serpentine and supported by mica paper, ceramic body or quartz tube in its place.
It has more or less constant resistance between room temperature and working temperture (600 ... 1000K)
Modern carbon mesh heaters are similar in electrical behavior, but rather expensive.
The traditional tungsten wire in a quartz tubing. These are in essence low-efficiency incandescent lamps.
When cold, they have 3-5 times lower resistance. Their resistance is more or lesss proportional to the temperature, just like in most pure metals. When powered on, the wire heats up quickly so they don't trip the breaker by their inrush current.
"Ceramic" heaters. They look like the one in your comment, a ceramic blob (in general more than one) pressed between pieces of aluminium radiator / conductor.
These are rather complex.
When cold, they have 3x-5x higher resistance.
When powered on, they heat up to like 400K and their resistance gets at minimum (rated power).
When cooling is restricted and the temperature goes up, their resistance sharply increases. This supposedly makes them safer. This also allows some power regulation by adjusting only the fan speed.
I don't really know how the ceramic heating elements implement this complex behavior, but one can imagine a mixture of NTC and PTC substances and/or a phase change that makes the substance non-conductive.
In essence, these ceramic heaters are the worst choice in regard to making a constant resistance dump load out of them.
Get a kanthal-based, convection-driven space heater instead. You will get more or less stable resistance without the need to control a fan. |
H: How to distinguish a 1N4148 diode from a Zener diode visually?
The 1N4148 looks like this and a Zener diode looks the same.
What is the most recommended way to distinguish or identify them visually?
AI: That's a standard package for many diodes.
The only way to distinguish them visually is by any printed code. Or to buy them in labeled packaging from the trusted seller (digikey, mouser, the manufacturer) and don't mix them up.
Electrically you can measure the diode and put it through a few tests to get some general specs and type but trying to nail down the model would be difficult based on the sheer number of similar parts. Professionals wouldn't waste their time and hobbyists shouldn't either. The miniaturization and mass production of these commodity parts prevent that type of reuse. Just buy new ones that are properly labeled. |
H: Why do almost all DALI master circuits calls for using an interrupt pin for RX?
I was searching for the DALI communication part for Dali Master Design and almost all designs use opto isolation circuits (which vary differently in components) and use MCU interrupt pin for DALI receive part (Rx). Can we use any GPIO pins or do we need to use interrupt pins only?
Got this reference from https://ar.mouser.com/applications/lighting-digitally-addressable/
AI: To have accurate timing, you must have low latency on the leading edge of the packet.
The ST datasheet itemizes the interface. |
H: SPI connection to Raspberry Pi
I want to flash and configure a processor using a Raspberry Pi. For this I'm using the SPI pins of the Raspberry Pi.
I read that the Raspberry Pi pins can provide no more than 8 mA out of each pin. Do I need to limit the current on the SPI pins with a series resistor?
Or can I just connect them directly to the SPI pins of the processor?
AI: You didn't specify which controller you want to interface to the RPi.
But a typical SPI peripheral won't sink a lot of current; 8mA would be more than enough.
I wouldn't recommend adding series resistors. They'll negatively affect the signal edges and thus reduce the maximum bitrate.
Just connect the signals directly:
SCLK -> SCLK
MOSI -> MOSI
MISO <- MISO
#SS -> #SS |
H: How do I calculate accuracy marked as ±(4 ppm rdg + 10Digit)?
Trying to figure out the correct way to calculate accuracy with LSD. I looked at a few sources, but I'm still confused on the topic.
The question:
A digital voltmeter can display counts up to 1999999 (6 1 /2 digits).
The range is set to 1 volt and has an input of 0.724 DCV.
With an accuracy specified as ±(4 ppm rdg + 10 LSD), the accuracy is ± ______ DCV.
This is what I came up with:
10 of 199999 = .0005%
0.724 * 0.000004 + 0.0000005 = 0.000007896
However, it ended up being wrong. Just need a little help understanding it.
AI: This accuracy is defined by gain error (4 ppm ) and offset error (10 LSD).
You then add these two for worst case.
0.724000 \$~~~~~\$ input
0.000002896 gain error
0.xxxx10 \$~~~~~~\$ offset error
0.000013 tolerance error
Remember gain and offset in future when working with ADC errors as well as incremental missing codes usually caused by logic ground noise on Vref. |
H: Does the standard for M12 A-Coded 4-pin plugs (female) have a dummy center hole to accommodate 5-pin socket (male) connectors?
I have a project that will tap into an existing sensor that uses a 4-pin M12 A-Coded connector. My plan is to use a Y Splitter to allow me to tap a parallel connection to the sensor.
The splitter I have found uses 5-pin A-Coded connectors. Finding a FMM splitter has been a challenge, I haven't found a 4 pin version.
Connecting the the 4-pin sensor to the female 5-hole connector is no problem, but my concern is that the cable that is currently attached to the sensor is likely a 4 conductor cable. If the cable's connector doesn't have a dummy center hole it won't fit on the splitter. I'll have to replace the connector.
All the 4-conductor cables I've examined or seen images have a dummy center hole, is that actually part of the standard?
This may be for a large number of installations, so I won't know ahead of time each situation.
AI: Cut off the center pin of the male connector in the Y splitter.
The cable that is currently attached to the sensor is likely a 4 conductor cable.
It is.
All the 4-conductor cables I've examined or seen images have a dummy center hole, is that actually part of the standard?
It is not. |
H: Inverting amplifier not acting as expected with non-ideal op amp
I'm fairly new to using op amps, so this may be a simple issue. I am building an inverting amplifier for monitoring a negative voltage on an analog rail. Since the ADC I'm using requires a positive voltage an inverting amplifier seems to be the way to go.
First, here is the LTSpice model using the OP07 (I have tried a variety of op amps with little to no improvement)
In this configuration the output voltage is higher than expected. With a -2V input and unity gain I would expect the output to be 2V, however it is slightly higher at 2.097V. The voltage at the inverting pin is 48.9mV, which seems to be the cause of the higher than expected output voltage.
Things I've tried
Changing V- to -5V. This solves the issue, but I'd prefer to not require another voltage rail
Using an ideal op amp the circuit works as expected, further indicating there is some parameter of non-ideal op amps that I don't understand
Any suggestions are appreciated
AI: OP07 input range is only guarranteed to within 2 V of the negative rail, typically 1 V. You need to use something like LM324 whose range includes the negative rail for it to work properly.
There are plenty of other opamps that will also include the negative rail. They tend to be called 'single supply' amplifiers, as they are intended to be used with ground as the negative rail. Most R2R (Rail to Rail) amplifiers will also handle inputs around 0 V properly. |
H: Why can't WiFi hardware be used to receive radio stations?
Special hardware is needed to receive radio waves in different frequencies i.e a RTL-SDR.
My question is why can't the WiFi hardware get also used to pick up radio signals? Isn't WiFi just a radio signals running on a different frequency? (i.e 2.4 Ghz).
Is the hardware hardwired to only operate on such frequencies and they are not able to be modified via software or drivers?
Another way to put the question is, what is in an SDR kit like RTL-SDR that's not already in my laptop?
AI: SDR = Software Defined Radio. I.e. controlled from software. They have functionality for generic radio.
WiFi devices doesn't have SDR, instead the have a baseband processor which are the complex device targeted especially for the WiFi bands, modulation, etc. It can't be controlled from the software outside of those functionality. It just wasn't designed to be a generic SDR.
And no, this aren't for marketing reasons. It's just because it wasn't required. And implementing something what is not required for an end product to function is a waste of resources. |
H: LTSpice: op-amp integrator/differentiator not working for all R and C?
I am trying to test a simple op-amp integrator (from my textbook) in LTSpice with a square-wave input.
As can be seen, the output is an (almost) triangular waveform for a resistance of 1 kΩ and a capacitance of 10 μF:
However, when I change R and C to 10 kΩ and 100 μF respectively, the output gets saturated:
I don't understand why the output would saturate given that the voltage on being integrated should not exceed the supply at all:
$$V_o = -\frac{1}{RC}\int_0^{t} V_i(t)dt$$
For R = 10 kΩ and C = 100 μF, RC should only be 1 and Vi(t) is only 0.5 V for the ON interval, so the integral should not exceed supply. My textbook does not impose any restrictions or constraints on the values R and C and simply provides the above equation.
Additionally, is there a reason why the output waveform in the first case is not perfectly triangular, and appears to have some distortion around the rising and falling edges of the pulse? Does it have to do with high frequency rejection at those places due to the frequency response of the particular model being used?
AI: Spice computes the DC operating point before starting out. The DC operating point of this circuit includes a perfect, lossless capacitor, which will cause the OPAMP to hit its rails.
This also occurs in your original simulation, but the RC network is much faster than the PULSE frequency. The 1k is able to fully discharge the 10u before the next charging pulse occurs. If you were to rerun the original simulation with the 1k/10u, and set the transient stop time to 3ns, you'll notice the C voltage start charged even though you "just turned it on."
Change the value of the capacitor to
"100u ic=0v"
to tell SPICE that the capacitor starts discharged. the IC directive is "initial condition" |
H: BJT High Frequency Effects?
I am studying high frequency common emitter amplifier and I came across a model where parasitic capacitances C_CB, C_BE, C_CE of BJT are included. In my textbook the small signal current gain beta of the transistor then becomes frequency dependent because of the parasitic capacitances. My question: Is the small signal current gain beta cut-off frequency responsible for the upper frequency limit of the transistor amplifier? Because I also read about the Miller-Effect. Does this result in another cut off frequency?
AI: BJTs are voltage controlled devices. On first order, they're voltage controlled current sources, with collector current depending on internal Vbe.
Current gain does not exist at the physical level. There is no mechanism by which base current is multiplied by hFe and turned into collector current.
Current gain is an observed effect at low frequency: Vbe controls Ic, but Vbe also causes a current to flow through the B-E junction. They happen to be quite proportional because Ic has an exponential dependence on Vbe, and Ib also has an exponential dependence on Vbe. So this results in a convenient and easy to use "current gain" metric.
At high frequency, collector current is still controlled by internal Vbe. However, the base has capacitance to both C and E. In order to vary the base collector current quickly, these two capacitances have to be charged and discharged, which implies a base current i=C dv/dt in addition to the current going through the B-E junction. On top of that, quite a large amount of charge is stored in the base, which makes the B-E capacitance appear surprisingly large and difficult to discharge at turn-off.
So the observed current gain of the transistor, which doesn't exist at the physical level but is still convenient, does appear to go down with increasing frequency. This is not due to any "current gain" mechanism, but simply the fact that whatever circuit is providing base current must also provide current to charge and discharge Cbc and Cbe. So at high frequency, more AC base current is needed, because more goes into the capacitance and less into doing useful work moving Vbe, and therefore current gain goes down.
Even if the transistor base is driven by a current in your circuit, the device is still voltage driven internally. The B-E junction and capacitances convert the driving base current into voltage, which then controls Ic. When base is current driven, due to capacitances, internal voltage gets lower at high frequency, which looks like current gain is dropping.
Because i=C dv/dt, if the transistor is wired as common emitter amplifier and has a large voltage swing on its collector, the smaller Cbc sees a large dv/dt, thus it takes much more current than the tiny capacitance value (usually a few pF for small transistors) would imply. This is Miller effect, which is basically the product of Vcb voltage swing and Cbc. Miller effect only occurs if there is a voltage swing on the collector, hence the useful cascode circuit.
And since voltage swing is tiny on the B-E junction, the much larger Cbe sees a low dv/dt, and takes much less current.
In addition, the base has resistance and inductance, which means even if it was driven by an ideal voltage source, it would still have a lowpass effect. |
H: How do certain oscilloscopes have high isolation between channels?
At first, I couldn't think of any mechanism to get great isolation between the front-end and the sense amps because hundreds of volts of isolation sounds like capacitive isolation. Capacitive coupling wouldn't allow DC to pass normally. If some sort of dynamic sensing was done, I would think the accuracy would drop greatly. I guess the alternative here is that you simply lose the DC component in this case.
Then I thought maybe you could have a front-end be a MOSFET common-drain/voltage follower with a special FET that has a thick gate oxide increasing the breakdown voltage. Is that all it is? Is it multiple stages of that with each stage on a separate isolated power rails?
Spehro's answer here created the question for me:
Can an op amp Vin+ and Vin- be outside the supply voltage so long as their difference is inside it?
This doesn't answer the question, but it's related:
Why so few osilloscope with dedicated isolated channels?
AI: The isolation could be achieved by performing the analog to digital conversion before the isolation but it often isn't.
Here is a portion of the block diagram of the Tektronix TPS2000B isolated oscilloscope from their service manual. Note how the analog to digital conversion is performed after the isolation barrier.
The exact method that is used is not described but it does involve modulating the input signal onto an AC carrier frequency that is transferred across the isolation boundary using a transformer.
On the other side of the transformer the signal is demodulated before being fed to the analog to digital converter.
Tektronix have decided that for the particular bandwidth and accuracy requirements for this oscilloscope this method was better/cheaper etc than putting the analog to digital conversion before the isolation.
Image from Tektronix. |
H: Will connecting unused CMOS outputs to VCC damage the chip?
I am using a 74HC154 4x16 decoder in a design I'm working on and I'm not using the last four outputs. During PCB routing it would be very convenient if I could tie these unused outputs to the VCC flood. Would this cause a short circuit when those outputs are low?
AI: Chip damage is not guaranteed, but is possible.
It will cause a short circuit when those outputs drive low. |
H: Why doesn't my battery pack run a 12 V lamp very long?
I am new to this forum. While I have been experimenting with electronics for years, I guess I am still a novice. Please help me understand why my battery pack doesn't run a 12 V LED lamp very long.
I have 8 AA rechargeable, fully charged batteries connected in series. They say they can deliver 1.2 V and 2000 mAh. I know that voltage drops as the batteries are discharged, so decided I needed a boost converter module to deliver smooth 12 V output.
The input meter on the booster shows 9.89 V which is about what I would expect with no load. As soon as I turn on the bulb the voltage drops to 6.43 V. The output meter shows I am getting 12 V out and I am drawing 0.85 A. I believe that sounds about right because it is a 10 W, 12 V LED bulb.
I calculated that the light should burn for about 1.9 hours (I originally, incorrectly stated 19 hours). I know there is resistance that I don't how to measure, so I was ready to accept 20-25% reduction.
But the lamp burns for only about 5 minutes.
AI: As soon as I turn on the bulb the voltage drops to 6.43 V
Something is terribly wrong. That is only 0.8 Volts per cell. Much too low. Try to measure the input current. Maybe the boost is not operating properly for some reason and is consuming vast amounts of input current (although it would be getting hot if that were the case).
Also, consider using 10 AA batteries in series and powering the lamp directly. You will probably have much better results.
Each cell has something like 2 Watt-hours of energy in it. A little more actually. So that means 8 cells have 16-20 Watt-hours. So your calculation of expected battery life appears to be a good ballpark number. I would guesstimate about 1.5 hours to allow for various normal expected losses. |
H: Read MicroSD card with USB reader while it is connected to (powered-off) microcontroller
I have created a small breakout board, where a microSD card is inserted and I can access its signals.
Now, when the necessary SD signals are connected to an AVR microcontroller via SPI, they communicate successfully.
At the same time, I have soldered wires to a microSD USB adapter, so that the microSD slot pins are now available as wires. When I connect my SD breakout board only with the tweaked USB adapter, I can successfully read the SD content to my PC.
The problem emerges when I have the breakout board connected both to the AVR and the tweaked USB adapter at the same time, even though the AVR is powered off. Let me be clear that in order to find the problem I have made sure that there is no connection between the SD 3V3 pin and the AVR power supply, to ensure that the AVR does not power on by mistake. As far as the ground of the AVR and that of the SD card, I tried both leaving them connected and isolating them with no difference.
As a result, my guess is that there is feedback from the rest of the SPI signals that are connected to the AVR, messing with the SD USB reading. Does that sound correct/possible?
If so, I need a way to isolate those SPI signals when the AVR turns off, so that I can read my SD card via USB.
I understand the whole procedure sounds weird, but the reason it is needed is that the SD card will be placed in a closed casing where I won't have access. Thus I need the tweaked USB reader to get its stored data via a special connector, when the AVR is off, and I also need the microSD card to be connected to the AVR in order to store data from it, when it is on.
AI: The root cause of the problem is that AVR, like pretty much all ICs, requires power supply bias voltage for its inputs to behave like inputs. Internally, all of the various integrated transistors are nothing but a bunch of carefully designed P-type and N-type regions. Every PN junction is a diode, whether it is wanted or not. So power supply voltage bias is required to ensure that these so-called "parasitic" PN junctions are reverse-biased so that they do not conduct.
Cutting the power to an IC does not make the input pins behave like they were unconnected.
When voltage is applied to any of the pins of an IC that exceeds the voltage on the power supply pins, those parasitic PN junctions become forward-biased, and current conducts through unwanted paths. This can lead to surprising, erratic behavior. This also happens whenever an unpowered IC gets voltage applied to its input pins.
The best way to work around this issue, is to ensure that your AVR is always powered up when there are signals on its SPI bus. It doesn't have to be running (it can be held in reset), but it must have sufficient voltage on its power supply pins.
One way to address this would be to add Schottky diodes (because of their low forward voltage) between the SPI signals and the positive power supply pin. That way, the Schottky becomes forward-biased before any of the internal parasitic PN junctions.
Another way to address this would be to bring USB power (or lower-voltage power derived from USB) from your microSD adapter, and connect that supply voltage through a Schottky diode to your AVR's power supply. You will also need to add a Schottky diode between the AVR's power supply and its regular power supply, to prevent the USB adapter from trying to drive power into your device's power supply.
Both of these approaches will require some careful handling of the Reset signal. You will need to make sure that the AVR is held in Reset when it is powered by the USB adapter. |
H: Can I control 5 V input on a CD4051 but power the IC with 3.3 V?
The datasheet of the CD4051 says:
Wide Analog Input Voltage Range: ±5 V Maximum.
CD54HC and CD74HC Types
Operation Control Voltage: 2 V to 6 V
Switch Voltage: 0 V to 10 V
In my circuit I power (VCC) the IC with 3.3 V.
I have a variable analog voltage with a maximum of 5 V on analog pins (mux-an-in-*).
If I increase the voltage to over 4 V the chip conducts the voltage without being activated and also conducts a different voltage than the input voltage.
It actually has unexpected behavior.
Could it be because the chip can't be powered by VCC with a lower voltage than it drives on its analog pins?
AI: In all but a few special cases, the inputs to an IC cannot go outside of the power rails by more than a few tens of mV, and it's typical to see chips specified to have inputs limited to exactly the power rails or less.
(Some chips -- not the CD4xxx line -- are designed to take a certain power rail but tolerate inputs at higher voltage. Most typically a chip may run off of 3.3V, but tolerate 5V. If so, this fact will be featured in the product description. Because usually you don't need it, but when you do, you really do, and the feature will sell chips.)
This is because most chips have ESD protection on their inputs that's implemented with diodes to VSS and VDD, or their inputs just have implicit diodes to VSS and VDD. In some cases (apparently in your case) putting too high a voltage on a pin means that the diode that conducts lets carriers spill out where they shouldn't, and interferes with the operation of the whole chip.
So if you are powering your CD5051 from +5V, then you can give it a +5V input and it will work properly. But not if you're powering it from 3.3V.
You need to power the chip from 5V, or limit the input voltage to VDD. |
H: White and pink noise generator simulation (LTSPICE)
I've been trying to replicate the following circuit in LTspice but I'm not getting any frequency response in the pink or white noise output.
This is the circuit taken from the “Electronic Devices and Circuit Theory” book (by Boylestad, Nashelsky):
Here is the circuit in LTspice:
And this is the output of the circuit:
I don't know if I need to use an AC voltage source or if I'm measuring the outputs wrong, I hope someone can help me with this, thank you.
AI: You're not going to get the expected output because the Zener noise in reverse Vbe breakdown of Q1 is not modeled. You can try putting an AC source in series with the base of Q1.
You might also want to choose real transistor models eg. 2N4401.
It's also probably not a great idea to leave those capacitor ends hanging (maybe put a 10 meg resistor to ground) though it's not hurting you in this case. |
H: What could prevent the start of a microcontroller?
Problem description
I've got occasional startup issues on some boards with an ATmega2561. On about 10% (seems to fluctuate a lot) the processor does not seem to start on first power on. Only a power cycle lets the MCU start.
I've researched online and tried different things. I made several hypothesis and tested them but I have been able to disprove all of them.
I've checked the datasheet several times but could not find any clue as to what I could be doing wrong.
Reproducing
The Problem shows itself in the following way:
Switch on power
Sosftware won't start (no communication on UART no LED-blink, both of which should happen when the software runs.)
Switch power off and wait 10s
Switch on again
Microcontoller starts
If I switch off the power for >3 minutes the problem appears again. If a board has the problem it's perfectly reproducible. Replacing the microcontroller solves the problem.
I've also checked the power. The microcontroller runs at 5V. The 5V switches on within a few microseconds and is rock solid stable (checked with an oscilloscope and multimeter in Min/Max-Setting.)
Also: I can program the microcontroller via ISP if it is in that hung state.
Hypothesis
Hypothesis 1
External ceramic resonator does not start because of wrong fuse settings
I could disprove that by measuring the frequency with an oscilloscope and by setting the microcontroller to use the internal R/C oscillator (which should start.)
Hypothesis 2
Something with the external reset circuit
Reset/ is high and stable 200ms after power on (that's the time the external reset is pulled low).
Hypothesis 3
The MCU is in some undefined state for some unknown reason after startup
Pulling reset low for any amount of time did not get the microcontroller started.
It seems I'm out of ideas. What's more: This board has a bootloader which I use to load an application. If there is a valid application the bootloader immediately starts the app in its first line of code. The problem exists independently of state. It does not start into bootloader or application. If it's not a hardware issue it must be software, but the only thing common between application and bootloader is basically one line of C-code (that calls a few functions to read from EEPROM and FLASH to check if a valid application is installed.)
Does anyone have an idea on how to tackle this problem? Could it be a software issue? Why does it not happen on all the microcontrollers?
Update:
As suggested in the comments I've measured AVcc in relation to Vcc during power on.
Channel 1 (yellow) is Vcc, Cannel 2 (cyan) is Aref
That seems to be the problem. Aref (and also AVcc) is rising much faster than Vcc.
SOLVED! (at least it seems)
Adding a resistor in front of the LM7805 that creates the Aref and AVcc to limit the current (and therefore charge the capacitors slower) brought the AVcc on after Vcc and now a board that had the problem boots normally.
(
AVcc (yellow) and Aref (cyan)
AI: How you power the MCU can be the source of problems.
Applying voltages to IO pins and AREF pin before main digital VCC and analog AVCC supplies are applied means that protection diodes from IO pins to supplies have to conduct input clamping current to supply pins, which puts extra stress to internal MCU structures and might raise the supply voltages and power on the MCU with voltages lower than expected. MCU might end up in some unexpected internal state where it does not run properly even after a reset pulse. One such problem might be a latch-up condition, which does get solved only by removing power from circuit.
The updated question shows that AVCC and VCC have about 1V difference between them during supply rise time, so their difference exceeds the safe limits of 300mV. |
H: Looking for an explanation of grounding in relation to computers and DVI-HDMI adapters
I recently found that a DVI-HDMI adapter, purchased to connect the micro-HDMI port on my new Raspberry Pi 400 to the DVI port on my monitor, behaves strangely: it works well when connecting to my ATX Linux box, but results in "No Signal" when used with the Pi 400. Adding to the strangeness, the adapter works on an old Pi 3B, but only when using Raspbian Jessie, not the latest Bullseye, and then only at low resolutions, and with a "blinking" problem, the signal going off and on.
Thoroughly mystified, I started to search the net for info on faulty adapters, and found the following QA in the Raspberry Pi forum on SE:
https://raspberrypi.stackexchange.com/questions/46701/no-monitor-input-using-a-hdmi-to-dvi-adapter
One of the answers says:
In my case I noticed that the metal housing of the DVI adapter did not come into contact with the ground of the HDMI, (apparently this problem occurs because raspberry pi does not have a grounding pin), I decided to force a contact between the two ends of the adapter housing.
I would be grateful if people who understand these matters would explain a few things:
What in the context of a computer is a "grounding pin"? Why is it needed and how can a computer do without one?
Why would the "metal housing of the DVI adapter" need to come into contact with the ground of the HDMI? The adapter housing is plastic, you can see that in the picture that goes with the answer linked above.
Is it a good idea to "force a contact between the two ends of the adapter housing"? What could go wrong?
AI: Most likely issue is the use of one or more sub-standard items.
The HDMI to DVI adapter does not connect the metal shell of HDMI and DVI connectors together, so the shields of HDMI and DVI cable that should be connected together are not.
Also both the DVI and HDMI cables have more than one ground pin, for example each high speed differential pair has a shield which is supposed to be grounded. At least some sub-standard HDMI cables do not connect all of these and rely only on few or the single low speed DC/data ground pin or the connector shell shield to conduct.
So, as with any other device, any signal or power wire needs a return wire which is called the ground. Your cables and adapters may disconnect some or in worst case all of these return paths, or just leave one return path that can't handle high speeds required, or has too much current flowing in it so that the ground potentials differ or have noise which makes it harder to receive the signals properly.
If the DVI-HDMI adapter does not connect connector shells together, connecting them together will at least make the situation better. The fact that adapter has a plastic case is irrelevant, it's about the electrical connection between connectors.
The Raspberry Pi is usually powered from two-prong USB power supply, so it is not grounded, i.e. connected to earth potential, the output voltage floats, so it may float to some potential that is higher than earth potential. It means that when it is connected to some other equipment, like a grounded/earthed monitor, the accumulated charge gets discharged when connector shells touch so the two devices are at same potential. If the grounds do not connect first, then the charges balance via data pins which might damage the devices. It is even more dangerous if you have a monitor which requires to be connected to earthed mains socket and you have it on non-earthed socket. |
H: Why is the energy in a battery QV, but the energy in a capacitor QV/2
If I know the total charge in a battery, let's say 5000 Ah, and I want to find how much energy is stored in the battery, I multiply the total charge by the voltage E = Q·V; for example, for 12 V I will get 12·5000.
Now if I know the charge in a capacitor, and I want to find the energy stored, E = ½·C·V2 where Q = C·V, so I get E = ½·Q·V.
Why is there a difference?
AI: Short answer:
an ideal battery has constant voltage \$U_{nom}\$ (nominal voltage) until it's empty, so energy stored is:
\begin{aligned}
E &= U_{nom} \times I \times T\\
&= U_{nom} \times \text{capacity}
\end{aligned}
an ideal capacitor has voltage proportional to charge, so it decreases linearly to 0:
\begin{aligned}
E &= \int_0^T U(t)I\ dt\\
&= U_{average} \times I \times T\\
&= \frac{U_0}{2} \times I \times T\\
&= U_0 \times \text{capacity}
\end{aligned}
Visually, if you draw power vs time (at constant current), then you get a rectangle for a battery, and a triangle (so half the area) for a capacitor.
Long answer:
If you look more into detail, specially for the battery, the energy is not exactly \$E=Q \times U\$:
the voltage is not really constant : for most battery technologies, it starts above nominal voltage, then there is a long period where it is near the nominal voltage, and finally it drops quickly when the battery is nearly empty (it is usually recommanded to stop discharging before you are in this fast voltage drop region : you gain very little energy, but reduce significantly the lifetime of the battery).
there is an internal resistance in the battery, so some of the energy is lost in the battery, before it even come out (you might or not want to account it as stored, usually it is because the losses depend on how fast you discharge the battery, so it's easier to have something constant)
battery chemistry isn't linear, so you get "internal resistance"/"capacity" changing with current
For the capacitors, it's harder to say something general, but depending of the type, there can be also some rather big deviations. For example some MLCC (multi-layer ceramic capacitors) can lose 80% of their capacitance at higher voltages, and regain it at lower voltage: so you store far less energy than expected in the higher voltage part. |
H: Why are Digital Transistors / BRT always BJT?
I recently discovered the Bias Resistor Transistors (BRT) / Digital Transistors as commercial solution for low power, cheap solid state switches.
This IC is offered by multiple suppliers (Rohm, NXP, Infineon, Onsemi...) and all of them use transistors of BJT type.
Why there's not a mosfet integrated solution for BRTs?
My first guess would be that since BJTs have higher transconductance, can deliver current faster and have lower capacitance, so they might be more useful to be used as simple gate drivers for higher power transistors.
However, I have found circuits where a low side digital transistor is used to drive a high side, low power PMOS transistor. Is that only for redundancy purposes? Just 'cause BRTs are very cheap? Wouldn't just adding a series resistor to the mosfet's gate a cheaper solution?
AI: Why there's not a mosfet integrated solution for BRTs?
A BJT needs a series resistor to make it's input compatible with a logic level voltage source whereas, a MOSFET is voltage driven to the gate hence it doesn't require a series resistor to make its input compatible with most common logic level voltage drives.
A BJT has much much lower input capacitance compared to a MOSFET hence, the pull-down resistor is less problematic for high-speed switching. Compare this with a MOSFET; it has quite a high gate-source capacitance and, this can vary from a few tens of pico farads to several nano farads hence, there is a less clear-cut value of pull-down resistor that fits many user requirements and, inevitably, the user would likely have to fit an external pull-down resistor to suit the speed of their application.
A BJT is guaranteed to activate (to within a defined specification) with logic levels using the series resistor and pull-down resistor whereas a MOSFET has quite a variation in gate-source voltages to suit the drain current requirements of the user. This means that adding a series resistor and pull-down resistor is unattractive to most pro users.
MOSFET circuits sometimes do need a series gate resistor but this is usually in the region of a few Ω to tens of Ω. Due to the nature of most MOSFET switching circuits, the power dissipated by this resistor means it might have to be a bigger package compared to what some internal resistor might be.
Some MOSFET applications will suffer if there is an inbuilt series resistor hence it doesn't make sense to load this component into a MOSFET package.
BTW your diagram is misleading as it shows a PNP transistor with emitter connected to ground (a highly unlikely scenario in most applications): - |
H: can we trade off electric power for time?
The voltage and current are exchangable for a constant power. Can we increase the power of the source by decreasing the time of the supply ?
From this equation
Power = Energy / Time
The total energy of the source is constant, so by reducing the time of the supply we can increase the power. If the source is a battery then by making the battery discharge faster we can increase the power output. But, how to do it?
And also for, what if the source was a constant power supply ?
AI: Can we increase the power of the source by decreasing the time of the
supply ?
Unfortunately, the power of a source is just that but...
can we trade off electric power for time?
Absolutely we can.
If the source has a limited energy then, we can choose to use that energy (within reason) how we like. It's average power that you cannot do much about.
For instance, if you have a 1 watt supply source, you can accumulate the energy from that source (1 joule per second) into a capacitor (for instance) and deliver a peak of 1 kW every second but, only for a duration of 1 millisecond.
I've designed a circuit that charges a capacitor from a 500 watts supply and delivers peaks of several megawatts into a load (that I'm unfortunately prevented from talking about). It doesn't deliver the several megawatts for very long and, there is a several tens of second re-charge time but, in effect, I'm trading time for peak power.
But, how to do it?
Energy storage into big capacitors and rapid discharge into a powerful load. You need to do this efficiently of course and switching regulators are the turn-to solution. |
H: Model of an inductor in Ngspice
I am moving from LTspice to NgSpice.
In the former the inductance has a default value of a series resistance of 1milli oHms (that could be set to zero by adding 'Rser=0' in the line command defining the value and nodes of the inductor), whereas for the latter no information seems to be given in the documentation. Does anyone have an idea if the NgSpice inductors have a series resistance or not. If yes, what is the command to use in order to set its value to 0?
Thanks in advance
AI: Just set up a current source of 1 A with a parallel inductor and read the DC voltage. Even better, use the same current source but in an .AC analysis (of several decades). It should be more than sufficient to determine whether there are poles or zeroes. |
H: Another LED Circuit Design Question - higher voltage and bigger resistor vs lower voltage and smaller resistor
I'm an avid DIY'er recycling some LEDs from a TV. It uses 50 LEDs in series, supplied by 160 V, and the PSU says 160 V @ 400 mA. So my target is to provide 3.2 V @ 400 mA in my own circuit. I would like to drive them with my 12 V constant voltage power supply, which is adjustable from 10 V up to 14 V.
I understand how to calculate resistor size for a given series of LEDs. Tons of articles explain that. I also understand that LEDs have an aggressive I-V curve, so a series resistor acting as a current limiter is highly recommended (required depending on who you ask). What I don't understand is what happens to the circuit upon voltage fluctuations.
Take a couple sample circuit designs for my case:
I could wire 3 LEDs per series, provide 12.08 volts, with a 6.2 ohm resistor. That's only 79% efficient, requires a 2 watt resistor, and generates a good bit of heat.
I could wire 4 LEDs per series, provide 13.2 volts, with a 1 ohm resistor. That's 97% efficient, cheaper, easier, and runs cooler.
A couple of pre-emptive clarifications...
I don't know the specifications of the LEDs in question. They are from a Sharp LC-55Q7030U, and I can't find details on what the manufacturer used.
And I could use the power supply from the TV, which appears to be a much higher quality current-limited source, but then I have to figure out how to trigger power-on, control its PWM circuit, and then figure out how to do the same for the next 2 different TVs I want to control with the same switch & dimmer. Doing some soldering feels simpler to my under-educated brain.
Question:
How do I calculate the effect of supply voltage fluctuations on each of those (or infinite alternative) circuit design options? How much protection does the nice and efficient 1 ohm resistor actually provide? Would that really be any better than just under-supplying 12.4 V to 4 LEDs without a resistor (which still provides ample brightness)?
AI: First - under-supplying (starving) the LEDs with no series resistor is not a good idea. The conduction "knee" of an LED is not perfectly square. With no current limiting, the LEDs probably will fail.
What I don't understand is what happens to the circuit upon voltage fluctuations.
What happens is that the current through the LEDs varies dramatically.
Neither of those options is a good idea. The problem is that the actual forward voltage (Vf) for each LED varies, so the total Vf for a string or 3 or 4 could be off by several tenths of a volt. The larger the voltage drop across the resistor, the move consistent (and safe) the circuit. try this.
Assume a perfect 3.2 V LED. With Ohm's Law, calculate the resistance value for one resistor, one LED, and 12 V. Then, for the same resistor value, calculate the LED current at 11 V and 13 V. Look at the percentage change in current for the high and low supply values.
Now, do all of that assuming three LEDs in series. You will see a much larger variation in LED current at the high and low supply voltages. A circuit designer for such a system probably has a goal or spec for the max current variation allowed for good product performance, and can work backwards through the calculations (or just recalculate for all cases) to determine the optimum resistor value. Then use a resistor at that value with a high enough power rating, and clamp it to a heatsink, or place it next for an air vent.
I suggest you adjust your goals. Driving an LED with a DC voltage source and a resistor never is very efficient. 50% is not considered an excessive value. The "right" way to stabilize the LED current across power supply variations is to replace the single resistor with a constant-current circuit. And the "right" way to minimize the heat dissipated in the current limiting function is to use a switching circuit. but each of those options increases circuit complexity.
Update:
Single 3.2V & 400ma LED, 12V source, 22-ohm resistor, +1V source fluctuation gives me resistor current of 445ma, 11% change. 3 of the same LEDs, 6-ohm resistor, +1V source fluctuation give me resistor current of 567ma, 42% change. Is that the right way to look at the impact on the LEDs themselves?
Yes, that is the right way. I haven't checked your numbers, but they smell correct. For whatever the system voltage is, the smaller the percentage of it across the resistor, the larger the effects of voltage changes and individual LED parameter differences on the LED current. |
H: Can I download my code from Keil uVision5 or STM32CubeIDE to the STM32F103C6T6 board via FTDI?
Can I download my code from Keil uVision5 or STM32CubeIDE to the STM32F103C6T6 board via FTDI? If yes, then how should I do it? I can't find anything that helps online.
If there is no method to do so with these two IDEs, is there any other IDE (except Arduino IDE because I want to learn advanced programming and stay away from Arduino) that will help me?
Thank you.
AI: Technically speaking, the answer of @Tirdad Sadri Nejad is correct. Let me elaborate a little.
You need STM32CubeProgrammer, which can upload compiled binary to the board. In order to upload firmware via UART, you will have to switch BOOT0 pin/switch to 1 (and reset/power cycle of course). In order to run the code, you will need to switch BOOT0 to 0 and reset as well.
BOOT0 set to 1 on power-on will activate built-in fixed booloader, which is a program designed to, well, program the MCU (it's a whole another independent piece of memory that can't be edited). It can work with UART or other protocols (it's even possible for some STM32 to be flashed via I2C!)
This is STM32CubeProgrammer. I don't use it because I have ST-Link on my Disco Board, and the error is there because I tried to connect without activating bootloader (switching BOOT0 to 1). Anyway, on the top-right you can select "UART", and you'll be able to access the flash memory of the MCU. All you need is to compile your program, open the binary file with "Open File", then choose "Download" option where you see "Read" (yes, it's "download", it freaks me out too).
Honestly, switching BOOT0 to 1 to flash it and then to 0 to run it every time is annoying. You should get a standalone ST-Link, it's a one time purchase that improves quality of life immesurably. Also, it will allow you to use very cool debugger where you can literally stop program execution on any line of code you want and check what variables are, see registers at any moment etc. Very useful. Even if you don't need all that functionality now, you probably will eventually, and you don't need to physically switch BOOT0. When you write your first code and just blink LED and need to switch BOOT0 every 3 minutes, it gets very annoying.
Also, with ST-Link you can upload firmware straight from the IDE. |
H: What is the purpose of these 1 ohm resistors in this DC/DC converter schematic?
This schematic is from the LT3467 datasheet. I'm hoping someone can help me understand the purpose of the 1 ohm R3 and R4 resistors.
My concern is that they'd need to have very high power ratings as it seems there would be a ton of current running through them which would require them to be pretty large. Although in reality I don't believe that's the case, otherwise this circuit wouldn't be very practical.
I did run a simulation in LTspice and looked at the voltage at the R3 node and the current through it. Here's the schematic and simulation output. The voltage and current are switching at the switch frequency of the device, which is 1.3MHz. The switch current swings about 820mA (maybe using incorrect terminology here?) so it seems to me the 1 Ohm resistor would need to dissipate nearly 10 watts! (15V x 640mA = 9.6W.) I feel like I'm not thinking about this correctly.
AI: Assuming the steady state RMS charge current is the same as the DC rated current of 100 mA = 0.1A .
\$P_d=I^2R= 0.1^2[\text{A}] \times 1 [\Omega]= 10\text{ mW}\$ for the resistor in question.
This split supply regulator boosts 5 V to +15 for a 10 V boost and +5 to -15 V for a 20 V boost. The Schottky diodes are all the same and rated for 20 V and the energy transfer must be greater, thus the series R must be a thermal power sharing during the power-on transient..
The biggest power load is during startup. Your results indicate the current but not the duty factor of the pulses and thus the average power is less.
I(R3) peaks at almost 5 A or 25 W for a number of switching cycles. But the tail of this envelope of peaks ends before 0.5 ms, which is much shorter (< x %) than the rated single pulse max of 2.5 A. So this adds some thermal surge sharing with the Schottky diodes which are also rated here for only -20 V. These can be prone to thermal runaway when hot as the leakage current rises sharply. |
H: Can you tolerate routing traces underneath high speed signals?
I am working on a 2 layer board with ground and power layer on top and bottom and I have reached a single point where the 2 layers are limiting my design.
It is regarding SPI signals that would be working with 40MHz frequency communicating to a display. As shown in the top layer and bottom layer pictures.
I have encountered the following problems:
SCLK and SDA signals are on opposite pins between connector and MCU so I had to trace one of them behind the pin so as to avoid crossing each other
This solution has caused my power(5V, 3V3) pins to be isolated between the SDA and SCLK signals and I am struggling on how to reach the power pins, on the connector, with a minimum EMI problems.
As you can see I've routed 5V and low speed signal underneath the SDA and SCLK pads so as to avoid crossing bellow SDA and SCLK traces. Still there is a small gap of 0.5mm(20mils) between the pads and the closest ground layer. However, when it comes to the 3V3 trace I really had to cross underneath the SCLK signal.
I was wondering if some of you experienced EMI professionals could tell me how serious of problem am I causing with this solution and is there any alternative approach that would be better?
AI: Comments
The frequency of crosstalk is not just the clock rate, but the bandwidth of the risetime. e.g. tr=1ns has -3dB BW of about 350 MHz. This risetime also depends on trace and load capacitance to ground with a wide tolerance on the source resistance of typically 35 Ohms for 3.6V logic such as ARM based uC.
Get http://www.saturnpcb.com free software to compute trace capacitance and impedance, crosstalk for coplanar and microstrip/stripline
Thinner dielectric layer is inverse to crosstalk with lower trace impedance to ground. So more layers helps reduce conductor gaps.
Use microvias and more of them less than 15% of \$\lambda_{f_{-3dB}}\$ apart.
Add 10:1 probe tip and gnd spring test points making the holes large enough to support the probe, such as 2nd photo above.
Learn to estimate crosstalk and then learn how to validate this in your next design. There are many factors to learn.
Find out more about highspeed PCB design from IPC-2251, normally a fee-based spec, but if you dig, you can find some things.
Hire an expert in IPC-2251 to layout your next board. The skills you learn and success may be worth more than the cost of failure.
Learn some new tools and learn from datasheets how to model source impedance from Vol/Iol and C from rise time, then compute transmission lines from Saturn and Transmission Line Analysis in Falstad. Saturn gives voltage and dB crosstalk and it is important to know if the noise is coherent, edge-triggered or latched. If you have fee-based tools, perhaps better, but lots to learn.
Below shows random length traces and different width/height ratio=impedance with vias shown (add 1.x nH)
Notice that I reduced the risetime at source and the dominant ringing matches the -3dB BW in Saturn near 350 MHz with 5ns /div.
Reconsider item 8.
Notice you can use the mousewheel in Falstad to change the load to 100 Ohms and get almost a textbook waveform at 2.5V from 3.3 |
H: Driving a motor using SPST relay
I'm trying to drive a brushed DC motor of 24V and 7W (sorry I don't have the datasheet) using a power relay on a PCB using a STM32 microcontroller.
My plan is to use my STM32 to control a transistor to drive a SPST relay (datasheet) that's connected to the motor. But I'm a little bit confused about the output voltage of the relay. From what I understand from the datasheet of the relay, I'll need a 9V to drive the relay, but what will be the output of the relay? Will it be 9V too? Does it mean I'll need a 24V coil voltage to drive a 24V motor?
Thanks.
AI: But I'm a little bit confused about the output voltage of the relay.
From what I understand from the datasheet of the relay, I'll need a 9V
to drive the relay, but what will be the output of the relay?
Try this GIF animation from this site: -
It uses a 6 volt coil and switches 120 volts AC. Or maybe this is more your style: -
Same coil drive voltage as the output circuit but, the important thing here is that there is galvanic isolation between coil and contacts and, the contacts will run on a wide range of different voltages and AC.
Personally, this is my favourite: - |
H: Why is Line coding called "Line coding"?
Why is line coding also called digital base band modulation named "line coding" where does it come? and how is the name it to modulation
AI: When digital data transmission along wires (Morse code, Baudot telegraph machines for ex. ) had shown its usefulness also serious scientists became interested in it. Old systems based on relays did not gave much room for flashy on math based codings because the limiting factor was the mechanical speed of the parts of the equipment.
As electronics became available, at first along the vacuum tubes, higher transmission speeds became possible. It became gradually obvious, that the well established asynchronous transmission with marks and spaces (it's still popular in slow data rate applications) was far from optimal when one wanted to maximize the data rate through a given line and at the same time to keep the error probability below certain limit.
Mark-space -idea i.e. Voltage =ON for mark (or state 1) and voltage =OFF for space (or state 0) and and sending them sequentially as a fixed length pulses (like UART interfaces still do) do not give to the receiver especially good possibilities to decide was it a mark or space which is between the wires just now and when would it be the best moment to measure the voltage for valid decision. The causes:
pulses tend to get stretched and rounded through their flight along the wires due the frequency dependent propagation speed and attenuation
there's noise
there's no common time reference for the transmitter and receiver, a kind of clock synchronization is needed before the clocks of on time based decisions drift too much apart. The practical timing signal should be a part of the data transmission signal.
The timing in Baudot telegraph wasted at least 20% of the transmission capacity (which already was nothing spectacular) and so it does also in UARTs today.
To lift the available data rate through a given line higher smarter ways than at fixed rate sent DC levels were developed to present the digital states and to carry the timing information at the same time. Different methods were called line codes to separate them from modulations.
Modulations lifted the signal to a higher frequency band and especially radio communication needed it. I have in practice tried a telegraph machine which was based on about 90 years old technology and sent text at HF band. It really was a mechanical device which actually needed a DC mark-space signal, but the radio station had a frequency shift modulator and demodulator interface between the telegraph machine and the radio gear. Morse code was used to ask one to switch the telegraph ON. To do it a tuning fork was used to chek that the motors ran at the right speed.
Line codes occupied a band around 0Hz. Just 0Hz was not so optimal because it was difficult to pass the DC component, so a good line code did not suffer from the removal of the DC component. For original telegraphs DC was as important as some band above it.
ADD due a comment: Term coding has another use in digital domain. We call a math transformation of digital data coding when one stream of discrete states is transformed to another stream of discrete states to achieve something useful, for ex. encryption, data compression, immunity against errors or to fade certain statistical situations which can make the used physical signal transmission method work less than optimally. A typical such situation is a too long continuous chain of zeros or ones which could cause drift in the extraction of the timing in the receiver.
Line coding is not math with numbers nor symbols, it's presenting digital states with physical voltage pulses which also carry the timing information.
The name "line coding" is historical. In communication engineering math one could easily put all line coding schemes to the same box as modulations of digital signals. The historical separating difference is the frequency shifting in modulations, but that's only a property. The common thing of line codings and modulations is that both of them map the stream of discrete states to a continuous time voltage signal which also contains enough information of timing to be used in the symbol stream reconstruction in the receiver. |
H: UK: is up to 2 V AC between ground and neutral to be expected in a house supply?
I am seeing around 2 V AC between ground and the neutral, circa 240 V AC to the live wire. Is this normal or does this indicate a weak ground or some leakage path between lines perhaps?
I have an issue with switching equipment throwing RCD breakers, and am wondering if some small leakage current exists that is pushing me close to trip limit.
AI: It could be.
Most new supplies are TN-C-S (PME), where the earth and neutral are joined at the supply cut-out. On those supplies, the voltage between the Main Earth Terminal and the Neutral at the consumer unit should be tiny. But that may not still be true at the end of a long circuit, where there's a voltage drop along the neutral.
But many houses will still be on TN-S supplies, where the earth and neutral are only linked at the transformer. There the voltage difference would be the voltage drop along the neutral, all the way back to the transformer. A couple of volts wouldn't be at all surprising.
Some houses are also on TT supplies, where the only earth is a rod banged into the ground. On these, you will again see the voltage drop along the whole neutral back to the transformer, and perhaps some other stray voltages as the transformer earth and your earth aren't well connected.
If you want to detect leakage currents, you need a sensitive clamp meter capable of measuring down to milliamps. Either clamp it around an earth wire, or around the live and neutral simultaneously. |
H: Regenerated current during deceleration of PMSM motors
Let's say that a VFD is powering a PMSM and the motor is rotating at rated speed. The motor is connected to a high inertial load, so it cannot decelerate quickly. Now if the VFD commands a quick deceleration, how does the regen current from motor behave?
Equivalently, I have simplified the circuit to a DC permanent magnet motor with the below ciricuit diagram:
Initially, the VFD's main capacitor (C1) still has the rectified (through D2) supply voltage (V1) in it and SW1 is fully on so the motor is running at rated speed (with voltage V1 across it).
Now, to simplify the deceleration scenario, if I switch off SW1. I believe that the flyback diode (D1) and the motor inductance together forms a boost converter, so the main capacitor is charged to a higher voltage than V1.
But I am unable to realize what the current (or braking torque) waveform through the flyback diode (D1) looks like? Is it constant or intermittent spikes or a gradual drop over the deceleration period? What would the back current equation be?
A follow up question is, what does speed graph of motor during this regeneration period look like? Does it ramp down with constant deceleration?
AI: Now if the VFD commands a quick deceleration, how does the regen current from motor behave?
The VFD commanding deceleration results first in a reduction of frequency. Along with that, the motor voltage would be reduced by reducing the PWM pulse widths. The DC bus capacitor across the inverter input would normally maintain a constant voltage supported by a rectifier connected to the AC input. Reducing the motor frequency causes in to transition to generator operation. The phase relationship between the motor voltage and current would shift as the motor starts supplying power to the VFD. As a result the DC current at the inverter input reverses. If there is no system to dissipate the power returned to the DC bus, the capacitors will charge to a higher voltage and fail rather quickly.
There are a number of options for dealing with the situation. At least one would be built into any VFD that is a viable product. Some options are:
Detect that capacitor voltage has reached the safe limit, de-energize the motor and let it coast.
Override the speed command and only command a speed reduction for which existing motor and VFD losses can dissipate the energy.
Perform 2, but connect across the DC bus a resistor of modest power dissipation capability that will increase the braking power dissipation.
Perform 3, but connect a resistor bank with sufficient power dissipation capability to stop the load quickly.
Provide a regenerative input power section rather than a rectifier so that the motor can act continuously as a generator at the motor's rated torque.
There are a lot of alternatives in the details of point 2. That could be implemented as motor torque control or DC current control or in other ways. |
H: Why I am I unable to turn on a load when Wheatstone bridge is connected in series with the load
I am trying to switch on a load by using a Wheatstone bridge and planning to provide the differential voltage to the transistor.
Before doing that, I am trying to use two batteries (second one substituting the differential voltage from transistor).
However, I am getting a 0 V across the load and all of 9 V across the Wheatstone bridge.
simulate this circuit – Schematic created using CircuitLab
When I remove the transistor, I get 8 V across the bridge, but 0 across the load.
simulate this circuit
Either way, it's not turning on the light bulb or even a LED.
Final objective
Trying to switch on the load when the room gets darker (as resistance of LDR increased).
At ambient room light, I have set the Wheatstone bridge to be balanced or output a negative voltage.
As the darkness increases, resistance of the LDR increases, making the Wheatstone bridge un-balanced.
In our case, the voltage divider on right side (VRout), will decrease as R4 will remain constant whereas LDR1 will keep increasing.
At the end, the differential voltage between, VLout-VRout >=0.7V .
By connecting VLout to the base of an NPN transistor and VRout to ground, I am trying to switch the transistor to active state, in turn switching on the light bulb.
simulate this circuit
AI: There are too many reasons why your circuit fails.
Lack of low impedance current loop.
Lack of differential bias threshold for each Vbe = 0.7V (consider 0.6 your bridge reference +/-0.1 for gradual ON/OFF)
This design I made solves both but is still weak due to the relatively low resistance of the bulb compared to the battery ESR for a Panasonic Alkaline which all have a wide tolerance, based on the short circuit transient current.
The Threshold is around 1.4V and the resistance of the Rce of the driver NPN for a PN2222A is around 1 Ohm depending on saturation current. I used a 3.3W 9V bulb to match your bulb R which rises from 1.2 ohm to around 11x this value near 2/3 A.
Adjust R ratios for night Vbe=1.4V and 1.2V to minimize battery drain in daylight.
Corrected design
In order to turn on 12 to 14 ohm lamp with 10 k pullup to base, LDR must be much higher and the current gain must be much greater than this R Ratio of almost 1k. so two transistors in series as a Darlington, as shown above. These hFE's current gains multiply to enable saturation (low Vce) where the current gain is reduced to nearly 10% of rated hFE. Otherwise Vce rises until the gain is achieved.
In your case, the emitter resistance was far too high to conduct and bulb current to ground and back thru the batter to the bulb (even if Vbe was sufficient) So no bias voltage and no low R current loop.
Final remarks
A good alkaline battery can store 5 watt-hours [Wh].
A 9V bulb with these resistances cold and hot is a 3 W bulb.
The battery will have a very short life and LED's are far more efficient.
There is no better design result than this one, if you restrict it as requested with BJT's, 12.3 ohm tungsten lamp at 9V with a battery and have no other requirements. |
H: Should I trust a Power Adapter to directly run a pump?
After some research and head-scratching, I plan to connect a 3 Pin UK AC/DC 4.5V 500mA 0.5A Power Adapter (5.5mm x 2.1mm) into a 5.5mmx2.1mm 2 Pins DC Power Jack Female Connector Socket and that directly to a Mini Submersible Motor Micro Water Pump which is rated 3W DC 3-4.5V with a current within 0.05A.
In as far as I have understood so far, this should supply the pump with exactly the power it needs. Have I understood correctly? Should I be mindful of anything else? For example, should I use some sort of resistor to force the voltage to max out at 4.5v?
AI: Concerns:
3 pin vs 2 pin
the 3rd pin is a dummy plastic pin. The supply is double insulated.
3V to 4.5V
their specs are vague but the 0.05A current and power consumption will reduce with voltage but also increase lifespan somewhat.
I read they are rated for only 200h continuously. (due to vibrator contact arc erosion, I expect)
However if 4.5V* 0.05A is true, Pd= 225 mW and the current & power will increase to 10x on 1st pulse, which is why they specify a 3W rating
I expect it will last longer than 200h, if you limit the number of hours per day to 2 and don't let it warm up. But you should buy 2 just in case or consider a 3V 3W supply and it will last longer. (Arrhenius Law effect)
The size of the Cap and quality of low ESR in the supply may affect lifespan of supply and pump. But I can't be sure what you get. The pump ought to have a RC snubber across the vibrating solenoid contacts inside.
These are not high-reliability items but your choice is OK. Perhaps more flow at 4.5V but lower voltage is also OK with some slight life span advantage. |
H: MAX17703 Li-ion battery charger: max. battery voltage enough for 15 cells in series?
I am designing a battery charger for 15 Li-ion cells in series that add up to 63 V when fully charged.
I have shortlisted a charger controller IC from Maxim, the MAX17703.
The IC provides output voltages up to 60 V (-2.1 V). Will this be sufficient to fully charge the battery pack?
AI: The MAX17703's maximum input voltage is 60 V, the maximum programmable output voltage is 60 - 2.1 = 57.9 V, which will charge 15 cells in series to 3.86 V each.
So no, it will not fully charge your 15-cell Li-ion battery pack.
If you are willing to take the risk of supplying an input voltage very close to this IC's Absolute Maximum Rating, you would get just about enough output voltage for 15 cells, but you really shouldn't go there.
It would be better to find another charger IC, or use a smaller battery pack. |
H: Connect 3-way switch to Arduino
It is possible to connect a 3-way switch (8 pin) to an Arduino (for example https://www.alibaba.com/product-detail/3-way-slide-switch-8-pin_430752122.html) and read the status of the switch (the switch is up - Arduino prints "up" in serial monitor)? How to wire it?
AI: Assuming you want indications such as "up", "mid" and "down", then use one side of the switch; connect the common to ground and the three position terminals to inputs of the Arduino and ensure these inputs have pull-ups enabled. Then simply read which input is low. (This seems very simple, so have I misunderstood something?) |
H: Why is it necessary that the poly line extends the diffusion strip in a layout?
Here the poly ends exactly at the diffusion without clearing it, why is this a "catastrophic error" ? I understand that the transistor would never turn off if the poly only partially occluded the diffusion strip but what's the problem in this case?
AI: The problem is that these structures never end up being exactly the way you draw them. Even if you draw the end of the poly coincident with the edge of the diffusion the manufactured device may have some diffusion extending out past the end of the gate.
Remember that there can be small errors in alignment when the different structures are created. We rely on the edges of the poly to define the source and drain regions so the alignment and lithography for the implants doesn't have to be exact. If you try to draw a structure that requires exact alignment you will be disappointed.
Furthermore, the impurities in the source and drain will diffuse a bit after the implants. So even if you managed to perfectly align the implant you would still have some diffusion beyond the end of the gate. |
H: Test Circuit for Bipolar Amplifiers
I have this BJT test circuit to measure its Base-Emitter Voltage and I'm having some difficulties to understand what's the purpose of the lower Op Amp. Is it in a negative feedback?
AI: I'm having some difficulties to understand what's the purpose of the
lower Op Amp. Is it in a negative feedback?
It keeps the base current at a constant value of \$\frac{V_X}{R_B}\$.
Yes, local negative feedback through the transistor base-emitter junction maintains the virtual ground (i.e. \$V_B= \text{0 volts}\$) and keeps the base current constant. The OP-07 will adjust its output voltage to about -0.7 volts to overcome the natural base-emitter forward voltage.
The collector current and base current (sum = emitter current) flow into the lower OP-07's output and the upper OP-07 monitors collector current and fixes the collector voltage at 0 volts (BJT at point of near-saturation).
If the upper OP-07's non-inverting input was (say) raised to a higher DC voltage than 0 volts, the collector would be forced to be at that same voltage. I mention this because that is a more common test for BJTs. |
H: Want to create an alarm that senses 12 V and 240 V
On my boat I would like a warning buzzer to sound if the battery charger is on and the engine batteries are not isolated. Because if you start the engine with the battery charger on, the diodes in the engine alternator blow (been there, done that..!)
The unit could be 240 V or 12 V powered.
So on an abstract level the logic would be: IF 240 V to charger is live AND 12 V from engine batteries is live THEN SoundBuzzer.
I can imagine how to do this with two relays, one 240 V, the other 12 V. When both 240 V and 12 V are live the circuit is complete and the buzzer sounds. But I don't like the idea of a 240 V relay being energised for weeks on end while the battery charger is on and the boat is unattended.
I would prefer a neater solid-state solution, Is there one?
AI: Without knowing more about the various grounds running around, this sounds like a three circuit problem: The AC being sensed, the DC being sensed, and the power source for the beeper.
I would use two opto-isolators, one for the AC input and one for the DC input, with the two output transistors in series with a loud piezo beeper and its supply. No logic chips, no opamps or comparators, no Arduino, and no 555's. <gasp!>
The DC input needs a current limiting resistor, and I would add a small bridge rectifier so the input polarity doesn't matter. The AC input needs a current-limiting capacitor, a rectifier, and a small filter capacitor so there is a constant DC through the opto's input LED.
Power quality on a boat is very poor. A Zener diode in series with each opto input will increase noise immunity.
If the 12 Vdc power source for the beeper is the same as the one being sensed, I'd stay with the optoisolator. It's actually less messy than sensing the 12 V with a transistor or comparator.
I can whip up a simple schematic if you need one, and add it to this response. Or you can take a swing at one and we will advise.
UPDATE - Schematic
Here is a first-pass at a schematic. I came to my senses, and replaced a bunch of semi-dangerous stuff with an off-the-shelf 12 V wall wart. It is a cheap way to get certified isolation, noise filtering, and safety.
A range of component values will work for the resistors and Zener diode. The only real requirement is that the piezo beeper current be less than 20 mA to limit the current through the LED. Without the LED, the piezo current can be higher. The opto-isolator output transistor is rated for 50 mA, but I wouldn't run it at that level continuously.
Note: Both 12 V inputs are polarity-sensitive.
Note: There is no GND symbol in the schematic. I did this on purpose. All three circuits are completely floating with respect to each other. |
H: How is the overcharge protection working for USB-charged mini- LiPo packs
I looked into my tiny bluetooth speaker (LOGILINK SP0054BK), and found that the board only contains a 5856ESE, handling the bluetooth side of things, and a NS4150, handling the audio amplification, otherwise there are only resistors, caps, and some diodes - the energy is provided by a nondescript little silvery pack, that i guess is a LiPo pack. It is 20mm x 20mm x 5mm, and only has two leads. I cannot see a PCB through the Kapton. The charging is done via USB. I cannot follow the leads, because the whole board is multilayer and too crowded.
My question is: Do those packs themselves usually contain some overcharge protection circuit? Do they just put a resistor or diode in series with the 5V from USB to protect the LiPo from receiving more than 4.x V ?
Picture similar, only my pack is tinier and has no print:
AI: That is a very nice SOC chip with DSP for low cost (<<$1) and small instruction set (RISC) that does it all including 16 bit ADC to measure voltage and current to regulate LiPo battery charge.
https://github.com/RDA5981/RDA5856/blob/master/Datasheet/RDA5856TE_Datasheet_V0.03.pdf
Tear-down
(perhaps a fine example of IP theft, RDA does not hold patents and relies on alliance provider, but I don't know) |
H: STM32F746G-Disc code examining QSPI flash data transfer consecutively fail/pass by resetting MCU
Programming STM32F746 MCU with below code (read and write, then compare on N25Q128A NOR flash memory) result change after each time resetting MCU by it's botton or under debug session:
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_QUADSPI_Init();
/* USER CODE BEGIN 2 */
QSPI_CommandTypeDef sCommand;
uint32_t address = 0;
uint8_t BUFFERSIZE=20;
uint8_t txbuf[20]={1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20};
uint8_t rxbuf[20]={0};
// QSPI_ResetMemory(&hqspi);
// HAL_Delay(100);
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.AddressSize = QSPI_ADDRESS_24_BITS;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
QSPI_DummyCyclesCfg(&hqspi);
/*******Erase sequence*********/
QSPI_WriteEnable(&hqspi);
sCommand.Instruction = SECTOR_ERASE_CMD;
sCommand.AddressMode = QSPI_ADDRESS_1_LINE;
sCommand.Address = address;
sCommand.DataMode = QSPI_DATA_NONE;
sCommand.DummyCycles = 0;
HAL_QSPI_Command(&hqspi, &sCommand,HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
HAL_Delay(100);//HAL_QSPI_Abort(&hqspi);
/***********Transmission sequence***********/
QSPI_WriteEnable(&hqspi);
// HAL_Delay(50);//HAL_QSPI_Abort(&hqspi);
sCommand.Instruction = QUAD_IN_FAST_PROG_CMD;
sCommand.AddressMode = QSPI_ADDRESS_1_LINE;
sCommand.DataMode = QSPI_DATA_4_LINES;
sCommand.NbData = BUFFERSIZE;
HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);HAL_Delay(100);
HAL_QSPI_Transmit(&hqspi, txbuf,1000000);
HAL_Delay(40);//HAL_QSPI_Abort(&hqspi);
/***********Reception sequence***********/
// QSPI_DummyCyclesCfg(&hqspi);
sCommand.Instruction = QUAD_OUT_FAST_READ_CMD;
sCommand.DummyCycles = DUMMY_CLOCK_CYCLES_READ_QUAD;
//sCommand.NbData = BUFFERSIZE;
HAL_QSPI_Command(&hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE);
HAL_QSPI_Receive(&hqspi, (uint8_t*)rxbuf,1000000);
HAL_Delay(100);
HAL_Delay(1);
// HAL_Delay(100);//HAL_QSPI_Abort(&hqspi);
/************Test result********/
uint8_t index=0;
for (index = 0; index < BUFFERSIZE; index++)
{
if (rxbuf[index] != txbuf[index])
{
HAL_GPIO_WritePin(LED_GPIO_Port,LED_Pin,GPIO_PIN_SET);
}
}
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
static void QSPI_WriteEnable(QSPI_HandleTypeDef *hqspi)
{
QSPI_CommandTypeDef sCommand;
QSPI_AutoPollingTypeDef sConfig;
/* Enable write operations ------------------------------------------ */
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction = WRITE_ENABLE_CMD;
sCommand.AddressMode = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = QSPI_DATA_NONE;
sCommand.DummyCycles = 0;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
if (HAL_QSPI_Command(hqspi, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
/* Configure automatic polling mode to wait for write enabling ---- */
sConfig.Match = 0x02;
sConfig.Mask = 0x02;
sConfig.MatchMode = QSPI_MATCH_MODE_AND;
sConfig.StatusBytesSize = 1;
sConfig.Interval = 0x10;
sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
sCommand.Instruction = READ_STATUS_REG_CMD;
sCommand.DataMode = QSPI_DATA_1_LINE;
// if (HAL_QSPI_AutoPolling(hqspi, &sCommand, &sConfig, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
// {
// Error_Handler();
// }
}
/***********************************************/
static void QSPI_DummyCyclesCfg(QSPI_HandleTypeDef *QSPIHandle)
{
QSPI_CommandTypeDef sCommand;
uint8_t reg;
/* Read Volatile Configuration register --------------------------- */
sCommand.InstructionMode = QSPI_INSTRUCTION_1_LINE;
sCommand.Instruction = READ_VOL_CFG_REG_CMD;
sCommand.AddressMode = QSPI_ADDRESS_NONE;
sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
sCommand.DataMode = QSPI_DATA_1_LINE;
sCommand.DummyCycles = 0;
sCommand.DdrMode = QSPI_DDR_MODE_DISABLE;
sCommand.DdrHoldHalfCycle = QSPI_DDR_HHC_ANALOG_DELAY;
sCommand.SIOOMode = QSPI_SIOO_INST_EVERY_CMD;
sCommand.NbData = 1;
if (HAL_QSPI_Command(QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
if (HAL_QSPI_Receive(QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
/* Enable write operations ---------------------------------------- */
QSPI_WriteEnable(QSPIHandle);//optional
/* Write Volatile Configuration register (with new dummy cycles) -- */
sCommand.Instruction = WRITE_VOL_CFG_REG_CMD;
MODIFY_REG(reg, 0xF0, (DUMMY_CLOCK_CYCLES_READ_QUAD << POSITION_VAL(0xF0)));
if (HAL_QSPI_Command(QSPIHandle, &sCommand, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
if (HAL_QSPI_Transmit(QSPIHandle, ®, HAL_QPSI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
Error_Handler();
}
HAL_Delay( 40 );
}
Actually in first run rxbuff fills correctly after reset it returns just 1 on every bit but after reset again everything is ok and it repeats!!
I've doubled receive commands and buy debugging understood that unprogrammed bytes are all 1 and maybe the program or write commands are not working after each they execute correctly at the same address.
AI: The datasheet says sector erase can take up to 3 seconds, so yes, obviously 100ms or even 400ms may not be enough.
Either, use a long enough delay, or, poll when the operation is complete, maybe with timeout to see if an operation fails. |
H: A circuit with resistors connected to the ground
I do not understand how this circuit operates. As I know, for the current to flow through a circuit it should form a closed loop but I do not understand how this circuit forms a closed loop. In general, I got confused when I see a ground in the circuit. I do not know what the concepts that
I am missing regarding ground connections. I hope to find some helpful references.
AI: The ground symbol is a shorthand. Rather than drawing wires going all over a complicated schematic, we define a symbol that means "this point is connected to what we're going to call ground in this circuit". All of those symbols are connected together by definition--we just don't draw the wire so that the schematic is cleaner. In this case, it wouldn't make it very messy or confusing to draw the wire, but it absolutely would in a more complicated circuit.
Likewise, we often use an upward-pointing arrow with a label like "Vcc" or "+5V" or something to mean the same thing, except that it's the positive side of a power supply referred to ground. Since you'll probably have dozens or hundreds of things connected to that power supply in a complex circuit, this avoids extra wires running everywhere and makes it easier to understand the schematic. You can even use multiple such arrows, with one for Vcc and one for Vdd for instance; these will be connected to all other arrows with the same name.
If no power supply is drawn in the circuit, it can be assumed that a power supply is connected between a Vcc arrow and a ground symbol (and if the arrow is labelled +5V or something similar, you can assume the power supply is 5 volts); this is common on circuit diagrams that are meant to show something other than a complete schematic, like how to hook up a particular integrated circuit or the like. |
H: Connecting an external power supply for ADS1115 with sensors
I would like to ask a question regarding the current prototype I am designing for a monitoring system using Raspberry Pi, an ADS1115 ADC and analog/digital sensors. Below is the schematic of my current prototype
I am powering two analog sensors (PH-4502C, TDS Meter Gravity) at +5V, a DS18B20 digital temp sensor at +3.3v, and float switch sensors at +3.3v as well using a MB102 power supply. I chose this since I'd rather have external power for powering this prototype to reduce sourcing too much power from my RPI for this node as I consider integrating it with other circuitry to build larger systems in the future. The MB102 is also powered using a 12v 1A adapter.
My question lies with the ADS1115 ADC. I am considering in powering it also from the +3.3v off the external supply, however, I am not sure if what other considerations should I look into aside from the VDD I am supplying to ensure accurate readings are being made.
With that, my questions are as follows:
1.) Is the direct +3.3v supply to the ADC appropriate? Would I be better off on using the RPI +3.3v pin instead?
2.) In context with 1, do I provide common ground with the RPI using the MB102 ground? or with the +12v ground? What would be the difference in this case?
3.) Would I need extra components for somehow creating a more stable and safe circuit for my sensors, ADC, and the RPI?
4.) I am also looking into using a CAT5E cable for extending the wiring off the RPI to the prototype with maximum length of 1 meter. How would this affect the quality of data transmission from ADC to the controller? Would direct connection still be okay as it is?
Datasheets for reference:
TDS METER
MB102 Breadboard Power Supply
DS18B20
ADS1115
PH4502C pH meter Sorry but I couldn't find a proper datasheet for this so here is another reference link instead
AI: Think what happens if you power up one board before the other - If you don't have answer to that, maybe use one 3.3V supply for everything.
All grounds of all devices must be connected together, just like MB102 grounds are already. If you don't provide a good ground connection between devices, current return paths may go via IC data pins, which can damage devices.
If it works, no. Do note that the ADC address pin is floating and it won't reliably have an I2C address.
If properly designed, such as proper bypassing of supplies and choosing the wiring in a suitable way, it should work, but just randomly wiring it without thought will lead to problems. |
H: (AC circuits) Why do I need to use the superposition theorem when dealing with two or more different sources with different frequencies?
Consider:
I know that the elements would have different impedances under different frequencies, but I can’t really visualize it.
Also, is there another way to analyze the circuit (other than superposition)?
This question is specific to AC steady state analysis.
AI: You only need to use superposition if you are doing things in the frequency domain. Think about the equations you use for circuit elements in the frequency domain.
Inductors are \$Z_L = j\omega L\$
Capacitors are \$Z_C = \frac{1}{j\omega C}\$
Sinusoidal current and voltage sources are \$M\angle \theta\$
Think about what the \$\omega\$ is those equations. It's just one frequency. In other words a sine wave. Just one. One \$\omega\$ variable can't describe more than one sine wave. And the phasor form of the voltage source removes the frequency altogether because it assumes only one frequency which is taken into account elsewhere and must be the same everywhere else.
So if you analyze in the frequency domain then you must separate out each constituent frequencies into its own circuit then add them all up at the end via superposition.
If you do it in the time domain you don't need superposition. You can use it, but you don't strictly need it because then the equations for those circuit elements are:
\$I_c = C\frac{dV}{dT}\$ for capacitors
\$V_L = L\frac{di}{dT}\$ for inductors
\$Mcos(\omega t + \theta)\$ for sinusoidal voltage and current sources
Those time domain equations take into account the entire picture not by looking at frequencies (which are only mathematically rigorous when applied to individual sine waves), but look at rates of change which is able to analyze things from moment to moment completely ignoring the concept of frequency. If you think hard enough about it doesn't causal make sense for a real component to know the frequency because to know the frequency of something means that means it must know that it is a sine wave into the future and what that sine wave is. Obviously, the circuit elements can't see the future but it can see the rate of change right now.
The catch is that real waveforms are arbitrary so you almost never have analytical equations to describe them with for use in the time domain. But sinusoidal equations are analytical and via Fourier you can turn any arbitrary waveform into frequencies to work with in the frequency domain. Though I suppose you could just use it in the time domain as a massive sum of cosines (which actually is superposition, but you just aren't separating the circuits out into different versions like in the frequency domain). From that hopefully you can see it actually all is the same thing and elegant, in concept at least. The math can look messy.
Also solving time domain equations containing terms with those integrals and derivatives means differential equations. Trickier than frequency domain. That's the other catch of the time domain. |
H: How to unplug this stereo receiver ribbon wire to PCB connector?
I'm taking apart an old Pioneer stereo amplifier (model 303R). I'm having difficulty unpluging a couple of wire ribbons from the PCB.. I tried pushing, pressing it from the sides, pulling (i thing i damaged the wires when trying to wiggle it while pulling) to no avail... what would be the correct way to disconnect them?
Pictures:
AI: Those are soldered wire to board connectors. They can't be unplugged. Either unsolder them or cut them. |
H: Strange Isense shape for my flyback
I have strange shape when I'm measuring Rsense voltage, before that circuit, I have already made a flyback conerter with this SMPS transformer https://docs.rs-online.com/696a/0900766b80107114.pdf
and it works however when I make the same circuit with this SMPS https://www.farnell.com/datasheets/2706567.pdf, that doesn't works.
simulate this circuit – Schematic created using CircuitLab
Here is my shapes.
In blue this is transistor shape and in yellow Vsense.
PWM : https://www.mouser.fr/datasheet/2/308/1/UC3844B_D-2320086.pdf
The second picture is pin out of the pwm and Vds
In blue this is transistor shape and in yellow Vout of pwm
My circuit, sorry it's not clean
Anyone know why this signal form occurs
This Rsense resistor:
https://docs.rs-online.com/40d8/0900766b801b8af1.pdf
NMOS:https://www.infineon.com/dgdl/Infineon-IPP80R1K2P7-DS-v02_01-EN.pdf?fileId=5546d4625c167129015c200b9d5d467c
AI: The resistor you chose for R3 doesn't just act as a resistor, it's also a very good inductor. As the datasheet says, this resistor is constructed by cutting a helical groove into a metal film... This creates a coil of resistive wire that has a high inductance in addition to its desired resistance.
The leads of your resistor are also suspiciously long, which adds even more inductance. You have to keep all connections as short as possible in a high-frequency switchmode converter like this.
Instead of a source resistor, your MOSFET now has a source inductor, so it's no wonder that it oscillates like crazy. You'll have to replace R3 with a low-inductance type, i.e. a high power SMD film resistor. Additionally, it might be helpful to place a small capacitor (~10nF or so) in parallel to the current sense resistor to suppress the effect of any remaining inductance. The capacitor should also be a SMD type ideally. A small resistor in series with the FET's gate might also be a good idea, i.e. 4.7 Ohms. |
H: Calculate the active and reactive power of the connected load after field increase in synchronous generator
A 3-phase synchronous generator connected in Y configuration has the following given parameters
\$V_L=38kV, R_a=0.3\Omega,X_s=2\Omega, S=360MVA, cos{\phi}=0.83\$
Where the parameters correspond to the line voltage, armature resistance, synchronous reactance, total complex power and power factor(lagging).
The following quantities are then calculated:
\$ I_a=\frac{S}{\sqrt{3}V_L}=5469.6A\$
with
\$ \phi=-33.9\$
and \$ E\angle\delta=V_{phase}+I_a\angle\phi(R_a+jX_s)=30.515kV \angle15.52 \$
These numbers are correct and an indicative phasor diagram is drawn by hand
The question now is:The load connected to the generator has changed. In order to keep the demand and production in balance
at the same frequency and same terminal voltage, the generator field current has increased 22% by the
AVR. The corresponding power angle is now 12°.Calculate the active and reactive power of the connected load.
Here is where i get stuck, we know that \$Esin{\delta}\$ has to stay constant (right?) and i calculated the new excitation voltage by equating the old \$Esin{\delta}\$ with the new one. \$E'=39.28kV\$ but i cannot wrap my head around on how to implement the 22% field current increase, and whatever i did so far is wrong.
The correct answer is: ≈ 319 MW and ≈ 428.5 MVAr
Thanks for the help!
AI: I think the key to your question is in your question.
and same terminal voltage
If you know the terminal voltage and the power angle (angle by which E leads terminal voltage) then using power transfer equation you should be able to calculate what you need.
$$P=\frac{EVsin\delta}{X}$$
and also
$$Q = \frac{E^2-EVcos\delta}{X}$$
where \$\delta\$ is the angle by which \$E\$ leads the terminal voltage.
But, since your circuit includes \$R_a\$, you need a version of the power transfer equation that includes resistance,
$$P=\frac{E^2cos\phi-EVcos(\delta+\phi)}{Z}$$
and also
$$Q=\frac{E^2sin\phi-EVsin(\delta+\phi)}{Z} $$
where \$Z = R_a + jX_s = Ze^{j\phi}\$
You can derive these last two equations just like you derive the top two. Just let \$R_a\$ equal zero and these will devolve into the top two equations. |
H: Is it possible to use an aluminum channel as a ground plane for LEDs?
I'm considering creating an LED system in my house, and hope to place them within aluminum channels (with an overlying diffuser for effect).
I understand that when running lengths of LEDs, it is often advisable to 're-power' with the input voltage (in my case, 5V) every few meters or so. To avoid running two wires (Voltage and ground), would it be acceptable to run the voltage wire to each location, and connect the ground of the strip to the aluminum channel, and reconnect it ground at the source?
I know that frequently in building homes, copper pipes are used as a ground plane (not in use regularly, only for a ground fault), and is connected back to earth at a designated point. I also understand that aluminum has a low resistivity, but not as low as copper (i.e. a wire).
AI: The problem you're going to run into isn't the conductivity of the aluminum, it's how to connect to it. It's not the easiest thing to solder to, so you're probably going to end up with some kind of mechanical connection, in which case you have to worry about using dissimilar metals, corrosion and poor contact. It would probably be easier to just run wires and be done with it. |
H: Should an N channel MOSFET turn on when I apply the rated "gate threshold voltage"?
I purchased an N-channel MOFSET: FQP6N40C
I'm trying to use a 3.3V microcontroller output to activate this MOSFET to control a 12V power source. However, when applying the 3.3V signal, the MOSFET fails to activate. Applying a 5V signal however does activate the MOSFET.
Looking at the "On Charactericstics" below, shouldn't a 3.3V signal suffice to activate the MOSFET? Or am I misunderstanding this metric?
AI: No, a 3.3V signal won't turn this FET fully on (in fact, you'd be lucky if it conducted any current at all). Look at the conditions defined for the threshold voltage: "Id=250µA". This means that when you apply the threshold voltage to the FET (as defined by the manufacturer), a current of 0.25mA flows from drain to source (as long as the drain-to-source voltage is big enough). It might also vary a lot depending on the FET's actual threshold voltage, which is only loosely specified as being somewhere between 2V and 4V.
You have to go well past a FET's threshold voltage to turn it fully on. In your case, the manufacturer only defines the FET as "on" when its gate is at or above 10V as you can see from the specification of Rds(on). There is no guarantee about the FET's on-resistance for a gate voltage of less than 10V, therefore this FET is unsuitable even for 5V operation.
The typical characteristic graphs in the datasheet tell a more complete picture. Take a look at figure 1 (on-region characteristics) and figure 2 (transfer characteristics). You can see that a FQP6N40C isn't even fully on at 5V gate voltage - it actually needs at least 7V, typically, and possibly more depending on batch-to-batch variation.
Note that a switching FET is only "fully on" when it's in its ohmic region for all permissible drain-source currents: This means it behaves like a simple resistor from drain to source as long as you stay within its maximum ratings. This is the case at 10V gate voltage for the FQP6N40C, as can be seen in figure 1. The relationship between drain-source voltage and drain-source current is (roughly) linear all the way up to 10A. At lower gate voltage (i.e. 5V), the FET can still conduct but it's not fully on. As you go above a certain drain-source voltage, it enters saturation and the current will not increase much even if you increase the drain-source voltage dramatically. This is very much undesirable for switching FETs as it causes huge conduction losses and possibly destroys the FET - but it is actually the preferred (even required) operating region for analog designs. In simpler terms: At 5V, the FET is still "somewhat on" but not "fully on". It might even be "on enough" depending on your application but batch-to-batch threshold voltage variation might come to bite you. Its maximum drain-source current is dramatically reduced if you don't operate it at the manufacturer's recommended gate voltage.
You'll have to find a FET that specifies a maximum on-resistance at 3.3V gate voltage (or lower). These will typically have a threshold voltage of around 1V (maximum). |
H: Would a switch matrix work with many buttons pressed?
I'm beginning the process of building a chess board that would detect piece movement and record it to a text file. My first idea for capturing piece movement would be a matrix of reed switches (set up similarly to those cheap membrane push button arrays used in arduino projects and such) and chess pieces with magnets on their bottoms.
My question is whether this setup would work when many switches are "on" at the same time, as there would be many pieces on the board at a time. If this would work, would a setup similar to those membrane keypads work, or would some "assistance chips" be needed?
Thanks in advance for any help!
AI: If you design the firmware well, the matrix can detect up to 2 multiple key presses.
Let's assume that matrix rows are wired to Port A, columns are wired to Port B.
Here's pseudo-code for it.
for X of PORTA {
output HIGH on X
for Y of PORTB {
if Y is HIGH {
process as button at (X, Y) is pressed
}
}
|
It is simple to implement, but you can use Arduino KeyPad Library, which works pretty well. |
H: Aligned vs not-aligned components: Which is better for PCBA process?
I am designing a Raspberry Pi hat PCB for a home automation control project.
It contains many SMD resistors and capacitors.
I was just wondering if aligned components have any benefit over not-aligned components for real PCBA processes in the factory.
Is alignment only for visual beauty?
AI: It depends: Wave soldering requires strict adherence to rules about component position and orientation because of potential problems with solder flow. Reflow soldering can do pretty much anything.
Given that most SMD PCBs are manufactured using reflow soldering these days, you can just go wild. The pick-and-place machine will place your components however you like, even rotated, and the reflow oven doesn't care about component orientation / alignment at all.
If you're actually going to let someone manufacture your PCBs for you, make sure that all of your components can be picked and placed by a machine (and soldered in a reflow oven). Otherwise they'll have to place and/or solder some of the components manually and that'll cost you extra. Things like heavy capacitors, sockets, and connectors (and any through-hole parts in general) will often require manual steps. |
H: Flyback primary side control
I read the LT3573's datasheet, I have some questions would like to ask.
Based on this block diagram,
1.) What's the main function of the below circuit (red circle).
2.) If I need to detect the output voltage, why I cannot just use R3 and R4 to do that.
3.) What's the main function of I2.
And I also read the MPS MP6004's datasheet, but the method MPS use is different way, they add the extra winding to detect the output voltage.
4.) I am curious about what's the difference between MPS and LT.
5.) Why MPS do not need to use the circuit like LT?
AI: The voltage across L1A is referenced to Vin not ground. It can't be easily used for feedback in that form, Q2 and associated circuitry resolve that.
Just using a divider from L1A to ground would not give a voltage proportional to the output.
The purpose of R3, Q2, I2 and R4 is to create a voltage that is referenced to ground to feed the Flyback Error Amplifier.
Although Q2, Q3 and I2 look like a current mirror the purpose of Q3 and I2 is to create temperature compensated voltage source matching the Vbe of Q2 so that the emitter of Q2 is very close in voltage to that of Q3. The current injected into Q2 by R3 will therefore be proportional to the voltage across L1A.
The current through Q2 will be proportional to the voltage across L1A that in turn is proportional to the voltage on L1B.
The great majority of the injected emitted current of Q2 will flow through R4 creating a voltage across it that is proportional to the voltage on L1A and in turn proportional to the voltage at he output. A small proportion of the current fro R3 is lost (<1%) to the base current of Q2.
All of this allows the controller to provide feedback depending upon the output voltage without requiring additional components such as an opt-isolator or even additional windings on the transformer. |
H: Replacing Generic IGBT with CoPack IGBT
The IGBT of my induction cooker recently blown up and I have found it's FGA20S125P which is a 1250V 20A Shorted anode type IGBT. The datasheet is available here.
However I couldn't find this IGBT model and overseas orders would take months to reach me at a reasonable cost.
I came across a different IGBT Called IRG4PH50UD which has almost same parameters (close enough I guess) from a local vendor. The datasheet is available here.
However this IGBT is mentioned as an "UltraFast CoPack IGBT" with a weird symbol as shown below.
I couldn't find much information what "Copack IGBT" means. It seems to be some kind of small improvement to existing IGBT technology. Could someone explain me what this term means?
Would I be possibly able to replace FGA20S125P with this IGBT? The datasheet parameters looks almost similar as far as my knowledge on IGBTs goes. Also please note that I have limited experience using IGBTs as well.
AI: CoPack means the avalanche diode and IGBT are packaged together and both are rated at 20A continuously. (or 16A/24A in the case of your Infineon example)
You can inspect some datasheets to check for crossovers.
https://www.trustedparts.com/en/similar-parts/on-semiconductor/FGA20S120M |
H: Voltage divider dropping voltage more than expected
I'm trying to connect an ACS712 current sensor to an ESP32 ADC pin. The ESP32 expects 3.3 V, but the ACS712 can reach 4.5 V.
When there's no current going through the ACS712, its signal is 2.5 V, so I made a test: I made a voltage divider using 330 Ω / 1 kΩ resistors and instead of the 2.5 V dropping to 1.88 V as expected, it dropped to something like 0.4 V.
As soon as I connect the 1 kΩ between signal and ground, the signal drops from 2.5 V to 0.4 V.
Using much bigger resistors (4.7 kΩ / 10 kΩ) it works as expected, but I'm left wondering why it doesn't with smaller resistors.
AI: The ACS712 datasheet tells us the device will source 3mA. 2.5V into 1k equals 2.5mA. That suggests you are loading it too much. 10k is 1/10th of the load, so the ACS712 is a lot happier. |
H: Circuit problem with one current source and three resistors in parallel
I'm trying to prepare for FE exam. I'm having difficulty with this seemingly simple problem:
The solution calculates the node voltage and not voltage across 10k ohm resistor. Don't I have to find the individual current and then calculate the drop?
The solution applies KCL separately for 4k and 10k. I can't logically refute this but when I put the two resistors in parallel, I don't get the same combined current going through both.
My initial attempt at the problem was putting 4k and 3k in parallel. So (12/7) as the resistance. Then I used current divider:
I_10k = Isource (12/7) / [(12/7)||10k]
Then I calculated the voltage drop ,but I don't get anything even close to -14.6. I got like -0.1.
AI: Hint: the three resistors are in parallel.
You can just work out the equivalent parallel resistance and then work out the voltage using Ohm's Law. There are only two nodes in the circuit - the top rail and the bottom rail. Every resistor sees the same voltage. |
H: How did people make oscillators before they had the triode?
I found on Wikipedia that:
“In 1901, Reginald Fessenden demonstrated a direct-conversion heterodyne receiver or beat receiver as a method of making continuous wave radiotelegraphy signals audible. Fessenden's receiver did not see much application because of its local oscillator's stability problem.
A stable yet inexpensive local oscillator was not available until Lee de Forest invented the triode vacuum tube oscillator. In a 1905 patent, Fessenden stated that the frequency stability of his local oscillator was one part per thousand.”
How could they make sustained oscillation before they had the triode?
AI: Three-terminal devices aren't the only way to produce amplification, and therefore sustained oscillation. It's actually possible to build free-running oscillators (and even amplifiers) using only two-terminal devices as long as one of these devices has negative differential resistance - that means it has a region in its characteristic operating curves where it conducts less current as the voltage across it rises, or a region where the voltage drops as more current flows through it. A tunnel diode exhibits this characteristic, for example, but a simple gas discharge in the form of a neon lamp or even a spark in air also has negative differential resistance.
You can build a free-running oscillator using such a device. Here's an example of an oscillator which uses a tunnel diode to continuously supply additional energy to an LC resonant circuit. You don't have to use a semiconductor device, though - you can also use a simple electric arc. These early oscillators operated in the exact same way as modern tunnel diode RF oscillators and produced continuous, undamped oscillations way before vacuum tubes were invented. |
H: FTDI Debugger Load Switching
I’m developing a new version of a custom debugger board for my project. The debug target is a solar powered device, which means sometimes I want to power it from the host (debugger) and sometimes I want to disconnect the host power and let the target power itself.
Currently I can do this witch a single SPDT switch, the problem is many of the testing is done remotely, so this is not a good solution.
I have a FTDI chip FT232R (but I think what I’m asking applies in general) and I want to know if there are some pins I can configure for gating control via some software commands? If so, how should I deliver these commands from my computer? What I would like to do is to connect a load switch IC which would then turn on and off the power from the host to the target. Do you think this is a viable solution?
Thanks!
AI: Each FT devices is different but most feature GPIOs. In case of the FT232R they are called CBUS. Those pin can be accessed using the dedicated D2XX driver and feature a "high drive mode" which can be setup via the eeprom programming. Alternatively one can abuse one of the control flow pins e.g. DTR or RTS - if they are not already used. Those can be typically controlled via the generic Virtual Com Port (VCP) driver. This way the hassle with the D2XX driver can be avoided.
Anyway those pins are not meant as power source but they can be used to drive an LDO enable or a FET or similiar. |
H: How to start task in virtual sequence from testcase?
I'd like to execute a virtual sequence's task as below:
class MYTest extends uvm_test;
my_base_ahb_vseq_c my_base_ahb_vseq;
`uvm_component_utils_begin(MYTest)
`uvm_component_utils_end
function new(string name = "MYTest",uvm_component parent);
super.new(name,parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
my_base_ahb_vseq = my_base_ahb_vseq_c::type_id::create("my_base_ahb_vseq", this);
endfunction : build_phase
virtual function void end_of_elaboration_phase(uvm_phase phase);
uvm_root uvm_top = uvm_root::get();
super.end_of_elaboration_phase(phase);
`uvm_info(get_type_name(), $sformatf("MYTest!!! \n %0s", uvm_top.sprint()), UVM_LOW)
endfunction
task run_phase(uvm_phase phase);
phase.raise_objection(this);
`uvm_info(get_type_name(), "My AHB Test Start!!", UVM_LOW)
my_base_ahb_vseq.do_write(8'h12, 8'h34);
phase.drop_objection(this);
endtask
I implemented the virtual sequence as below:
class my_base_ahb_vseq_c extends AhbUvmUserVirtualSeq;
myAhbTransaction trans;
`uvm_object_utils_begin(my_base_ahb_vseq_c)
`uvm_field_object(trans, UVM_ALL_ON)
`uvm_object_utils_end
function new(string name="my_base_ahb_vseq_c");
super.new(name);
endfunction // new
endclass
When I execute MYTest, I got the error message below:
xmsim: *E,TRNULLID: NULL pointer dereference.
File: VirtualSeqLib.sv, line = 258, pos = 13
Scope: pstest.my_base_ahb_vseq_c@3148_1.do_write
Time: 0 FS + 33
Verilog Stack Trace:
0: task pstest.my_base_ahb_vseq_c@3148_1.do_write at ../VirtualSeqLib.sv:258
1: task pstest.MYTest@3049_1.run_phase at ../UserTest.sv:37
How do I execute the virtual sequence's task in the test class correctly?
AI: In general, the error message means that you declared an object but you did not construct the object before you tried to use it. A declared object defaults to the value null. You would construct an object using the new or create functions.
I assume line 258 is the following:
`uvm_do_on_with(trans, p_sequencer.masterSeqr1, {
The message is not specific enough to determine which pointer is null: trans or p_sequencer.masterSeqr1. If we assume trans is null, you could try to construct it somewhere, such as in the constructor for the my_base_ahb_vseq_c class:
function new(string name="my_base_ahb_vseq_c");
super.new(name);
trans = new();
endfunction // new
Otherwise, the error likely is due to p_sequencer.masterSeqr1. In that case, you need to track down how you implemented the sequencer. It might be in your env class.
Note that 32'addr is a syntax error. It is surprising that your compiler accepts it. I don't think this is related to your reported error, but you should fix it. For example, change:
FirstAddress == 32'addr;
to:
FirstAddress == addr;
I notice your UVM sequence does not have a task named body. It is conventional to do so, and it is also conventional to call it from the test using the start function. Perhaps if you follow these conventions, you can more easily avoid errors of this type. |
H: Why do we need coils to produce electromagnetic waves?
I'm trying to better understand how a simple radio can send/receive EM waves.
I have read that alternating current generates electromagnetic waves. So then if we make a DC circuit and flip the battery around once every second we would be making a 1Hz wave? Like this:
If so then why do we need coils? From this page I can see simple radio circuits all employ a coil: https://www.homemade-circuits.com/spy-bug-circuits/
... The procedures take place rapidly generating a frequency across the coil which is transmitted as carrier waves through the connected antenna.
Can't we just alternate the current on the antenna itself and emit waves? Like this picture: https://physics.stackexchange.com/a/286815
What if we use a coil but then not use an antenna, would the coil itself emit waves?
I guess I'm trying to figure out the relation between a coil and the antenna and why we need both.
AI: If so then why do we need coils? From this page I can see simple radio
circuits all employ a coil
The coil is needed to form a simple oscillator as per your linked article: -
C1, C2, C3 and L contribute to what is know as a "tank" circuit. The "tank" can be highly resonant and, when a biased transistor is connected to it correctly it will oscillate at a defined frequency.
What if we use a coil but then not use an antenna, would the coil
itself emit waves?
The coil can transmit an alternating magnetic field but, usually its dimensions are so small that it makes an ineffective electric field generator hence, you only get a the M part of an EM wave.
On the other hand, a proper antenna is good for generating the E and M parts of an EM wave in the right proportion to suit the impedance of free space. However, it may not be very suitable as a tuned component in an oscillator hence, we use an inductor for the oscillator and an antenna to transmit the signal. |
H: PFC inductor calculation
I have a question about PFC inductor calculation.
Please see the below figure.
This is my answer, but I don't know how to only let Lmin equal to Vrms, P, fs.
There is a V (output voltage) in there. I don't know how to cancel it.
Update:
AI: The duty ratio of the CCM boost PFC boost converter follows the same formula of the classical dc-dc switching cell except that the input voltage is a rectified sinusoidal waveform. The below slide shows the simple derivation:
I built many PFC examples in my book on SMPS from 2014 and it lets me verify the above calculations are ok:
Regarding the minimum inductance, you can determine the critical inductance value below which the converter runs in DCM. The formula for the critical inductance of a boost converter is: \$\frac{(1-\frac{V_{in}}{V_{out}})V_{in}^2R_L}{2F_{sw}V_{out}^2}\$.
But you can also use the formula given by Tony, this is a classical formula for the boost converter adapted to the PFC by Joël: \$L_{min}=\frac{(\sqrt{2}V_{ac,LL})^2}{2\delta I_rF_{sw}P_{out}}(1-\frac{\sqrt{2}V_{ac,LL}}{V_{out}})\$. A 100% ripple means the converter operates in borderline operation. |
H: How can I shift the output voltage of an encoder to an MCU-acceptable voltage range?
I am using an encoder in my circuit operating on 5 V and the maximum output voltage of my optical encoder is 5 V. I am using the TI CC1350 Launchpad MCU to read the encoder signal, but the problem is the MCU maximum input voltage on any pin is 4.1 V, so I want to shift the encoder output voltage to 3.3 V for safe operation.
For that, I found some solutions:
Voltage divider circuit
CD74HC4050 IC
N-FET for level shifting
Which solution can I use for the reliable and safe operation? Or is there another solution I can implement?
AI: If your optical encoder has a pull-up resistor on the phototransistor collector, adding only one resistor can solve this issue.
Here, we can calculate the R as,
$$ \frac{R_c}{R + R_c} = \frac{3.3}{5} $$
$$ R = 0.52 \times R_c $$
If your device requires very low power consumption, the external resistor will draw some constant currents. In this case, CD74HC4050 is good, which has a 20 µA current consumption itself.
An n-channel MOSFET level shifting is also a good option if you are not sure about the pull-up resistor value of the encoder. |
H: Behavior of a common emitter BJT with diode from collector to base
This is the schematic for a popular fuzz pedal. I'm struggling to comprehend the mechanism. For the DC signal V1, the forward drop of the diode VF and VBE are both overcome, but when the positive part of Vin is applied, isn't VBE brought high enough to damage the transistor? (I believe guitar pickups can give voltages as high as 1V, so 1.7 VAC; max rating for this BJT is 0.7VDC).
Furthermore, how does the diode create distortion? It seems as though any current that feed backs to the base is miniscule.
simulate this circuit – Schematic created using CircuitLab
AI: The diode is a voltage limiter so you get 0.7 to 0.8 Vpp with no load and then 50% if equal load or 1% in your case.
If the Vol/Io=Rce is about 5 ohms when saturated the Rbe resistance will be around 10% of this. I expect the guitar coil pickup to be around a few kilohms so this attenuates the signal exponentially.
I put some design corrections for you on my simulation.
Feel free to ask any more questions.
You can use anything from 2V to 12V and just scale the collector Rc. Normally saturation is rated at Ic/Ib= 10 but in this case if you consider a load pot greater than Rc, you can use a lower ratio like 2 or 3.
Otherwise you get a dip in the middle of the +ve square output.
note how massive that dip is in @transistor 's sim using your incorrect values.
If I used your RC values, it would give skinny spikes for each edge. |
H: Limit inrush current to capacitor bank
My goal is to drive a beefy solenoid (1.6 Ohm / 1.5 mH / 50ms actuation time, once every 1-2 seconds) from a 36mF (3x12mF in parallel) capacitor bank at 24V, charged from an 1A PSU. This capacitor/low power PSU arrangement was chosen to limit the coil heating in the event of a failure.
The main problem is limiting the inrush / charge current. Possible solutions:
Current limiting resistor (10 Ohm): Produces a lot of Heat (10W), slow (2sec)
NTC Thermistor: Way to long cooldown time (60+s)
Transistor based: Voltage drop is undesirable, and they seem to produce a lot of heat
Inductor: might cause ringing
LED constant current power supply (for instance PLM-25-1050): they all feature short-circuit-protection, which would likely trigger
Soft start ICs: Soft start time is <10 ms, which is not enough
The only viable solution I can think of would be using a constant-current boost converter from 5V which doesn't care about "short circuits".
Do you have any other ideas?
Is there an example / premade boost-converter? I cant seem to find a component matching my requirements.
AI: Resistor / PTC doesn't really work as it gets even slower as caps come closer to the desired voltage.
I would just put a shunt resistor and a series transistor (will dissipate heat though). You can use a small shunt if you add enough amplification:
Some power supplies can handle trying to draw more than rated current quite well, but especially for larger currents that is not the way to go, unless it's clearly specified in PSU datasheet.
To avoid dissipating heat, you could use a PWM controller and an inductor, but I would not go that way if heat dissipation is acceptable. |
H: What is the purpose of the diode in this peak detector?
I was reading about a capacitive soil moisture sensor circuit today, and came across the following diagram:
(Diagram taken from the Cave Pearl Project, https://thecavepearlproject.org/2020/10/27/hacking-a-capacitive-soil-moisture-sensor-for-frequency-output/)
As the peak detector section of this circuit uses the filtered output of a 555 timer, which I believe should never be a negative voltage, what is the purpose of diode T4? Is it really necessary in this circuit?
Any insight would be much appreciated!
AI: C4 will be charged to a voltage representing the previous peak voltage. That means that C4 voltage higher than probe output. Diode will prevent this higher voltage from being drawn down to probe's voltage level.
Current would flow "backwards" toward the probe, if there was no diode. But with the diode C4 remains in the peak voltage until it's pulled lower by current through R4.
The diode will cause a voltage drop though, so you need to take that into account or replace it with an "ideal diode circuit". Or the whole peak detector with a more sophisticated design such as this:
(Image source: Analog Devices - LTC6244 High Speed Peak Detector) |
H: How to transfer data from high-speed ADCs in MCUs?
Some MCUs contain multiple high spped ADCs, e.g. STM32F303 has multiple 12 bit, 5 MSPS ADCs. Let’s say I am using just one of these to sample a signal. Because 12 bits will be represented/stored as 16 bits (two bytes), I need 16x5=80 Mbit/s transfer rate. Of course the internal flash will be full in less than a second, while USB full speed supports only 12 Mbit/s. Even QSPI supports a max. of 40 Mbit/s.
How, then, can this enormous data be transferred/stored?
AI: The point of these ADCs is not to transfer the data out of the micro.
It has a fast ADC with many channels so it can quickly scan several channels and sample each one with minimum delay between them. This is important if you want to sample related signals "at the same time", for example current and voltage, while using only one ADC. With a lower sample rate, there would be more delay between each channel. Likewise if you want to synchronize the ADC with the PWM peripherals, for example to sample the current when your MOSFET is turned on, then the ADC sampling time will set a minimum on-time. A faster ADC allows a lower minimum on-time, lower duty cycle, or higher PWM frequency.
So in a typical application using the ADC at a high sample rate, it would sample in bursts, then run some algorithm on the data, then repeat. The ADC wouldn't run all the time.
In these cases, ADC samples are stored in RAM via DMA, and they never leave the chip.
If you want to store a long stream of samples from a fast ADC, basically you need some SDRAM, so that's not the right micro. If you want to stream that to the PC, you need USB2 or USB3, so again, not the right micro. |
H: Identify burned transistor on multi-tool PCB - top marking CM ... JA200
I am trying to identify the transistor that fried on this circuit board of a 12 V multi-tool. I can make out CM then JA200. Greatly appreciate any help with ID. I hate throwing things away.
AI: In general, it is going to be an N-channel MOSFET.
Your current MOSFET was obviously under specified so you'll want a better one (lower on-resistance and lower input capacitance would be good this to look for to make a motor-controller MOSFET "better"). I made those assumptions because your chip clearly has thermal failure (you didn't say you dropped it or hit it with a hammer).
Here is a good one that can handle many amps at your 12VDC supply with PWM speed control.
https://www.digikey.com/en/products/detail/infineon-technologies/IRLR8256TRPBF/2271900
Unfortunately, you'll pay $1 for the part and 7-$12 for shipping. |
H: ADG608 PWM on analog input for testing
I bought an analog multiplexer, the ADG608.
I want to test the output value on the D pin by sending PWM to one of the analog inputs, the S1 pin.
So if I test with a multimeter on the D pin when the address on A0, A1, and A2 sets for the S1 pin, does anyone know the maximum voltage that I can send to S1 using PWM? I don’t want to burn it .
So if everything is good I should get a voltage on the D pin, and if I change the address to S1, that doesn’t have any connection, I should get 0 V.
Any clue or advice?
AI: Read the datasheet:
Note that the range applies even if the power is removed from the chip in general. |
H: Trying to simulate channel length modulation effects to see practical considerations, finding negligible results
I'm a beginner, self-learning electronics, currently studying MOSFETS and I have been recently introduced to channel length modulation effects. I understand the theory behind it but after some simulations I'm confused about why I should care or if it's something that affects some MOSFETS more than others.
I did a falstad simulation and found no channnel length modulation effects whatsoever. I concluded that probably this simulation just ignores the effect so I made a similar circuit on LtSpice using a BS170 (for no particular reason, just picked some popular MOSFET) and I found the channel length modulation effect to be just 400 nA for the whole amplitude of the MOSFET's acceptable voltage range (Vds)
The question:
Is this what channel length modulation normaly looks like? Does it become much more noticable under some circumstances or with other MOSFETS? Why would I care for such a small effect? I'm a beginner and this to me looks like almost noise-level small.
AI: You're correct that Falstad doesn't seem to simulate channel-length modulation. The falstad model seems to only have two parameters - threshold voltage, and the leading factor in the square-law equation, so it cannot express channel-length modulation.
Channel-length modulation is most applicable in shorter-channel MOSFETs and especially transistors operated in strong inversion (strong gate drive). The BS170 has a fairly flat I-Vds characteristic in its datasheet (see Figure 1), suggesting that it doesn't suffer from channel length modulation very severely.
On the other hand, here's an example of how short-channel FETs (used in CMOS integrated circuits) look in a similar simulation:
Red is on the order of 500-100 nm long, yellow is 50-100 nm long, and teal on the order of 5-10 microns long. All are nFETs in the same CMOS process. Your discrete transistor is likely significantly longer given its much higher maximum voltage ratings. The X scale spans the entire working voltage range for this particular transistor.
You can see that the two shorter ones visibly suffer from channel-length modulation and other short-channel effects which are not distinguishable on an IV plot (since they look like an effective output impedance in both cases), but have different physical causes.
Unfortunately due to NDA, I'm not comfortable sharing the exact dimensions or exact numerical scale of the chart.
To replicate the same in LT-Spice, you may be able to search for an integrated design SPICE model deck, perhaps along the lines of 180 nm (a popular choice for teaching). |
H: Bubba Oscillator - Last filter not buffered
Let's say that we have the following circuit of a Bubba Oscillator
The purpose of the four low pass filters is to achieve a 45 degrees phase shift in the oscillation frequency. Meanwhile, the three op amps used (excluding the first one that implements an amplifier in inverting configuration) work as buffers in order for each filter stage to not load the other ones and make them independent. My question is, why don't we add another op amp after the last low pass filter in the bottom-left corner? Doesn't the load leakage in the amplifier affect the operation of the last filter?
Thanks for any answer in advance!
AI: You're right: RG does affect the low-pass that it's connected to. In particular, it slightly increases its cut-off frequency (since RG effectively goes to ground) and it also decreases the signal amplitude by a tiny amount. The latter effect is irrelevant since it's compensated by the amplifier.
The change in cut-off frequency is quite real, though. However, this also doesn't matter in practice: The tolerances of real-world capacitors are much larger than the small shift in oscillation frequency caused by RG. R/RG is roughly 0.03, so the cut-off frequency of that lower left low-pass is increased by 3%. Typical capacitors have 10% or even 20% tolerance. Expensive ones might get you down to 5% or even 1%. You'll have to trim this circuit in any case if you want an accurate frequency, which is why the small error introduced by RG is acceptable.
This is also the reason why RG and RF are so large compared to the other resistors: It keeps its influence on the frequency response low.
Since OpAmps usually come in packages of four, adding another buffer stage would mean that you'd double the number of chips in the design for a negligible improvement in performance which might even be completely negated by component tolerances. It's simply not worth the additional chip.
If you want no error without any additional buffer stages, you could also set RG=2R and replace the resistor in the lower left low-pass with RG. That way, the Thevenin equivalent of the resistors in that low-pass is exactly R and the frequency response of all four low-passes in the oscillator will be identical. You'll have to increase the inverting amplifier's gain, though, to account for the additional attenuation caused by lowering RG. |
H: Interpreting the value of transconductance shown in a MOSFET datasheet. Why was that particular value chosen to be shown?
Context: I'm a beginner in electronics, self studying MOSFETS. I'm trying to understand why the manufacturer of this MOSFET decided to provide a single particular transconductance value in the datasheet. I would like to understand why the manufacturer decided to show only that value and the reason behind why that value was chosen on the datasheet over all the other possible values.
Given this datasheet, I see that the manufacturer has chosen to show me the following value for transconductance only:
As far as I understand it, the transconductance is the slope of a point in the transfer characteristics graph (the plot of Vgs and Id)
I went to the plots in the datasheet to find the point in the graph where the manufacturer decided to provide this value, using the following logic:
Given Vds and Id marked in the previous image for the transconductance, I deduce the Vgs used seems to be 2.5V using the plot on the left of the image. Then reading the transfer characteristic's plot (right) I see roughly that the transconductance seems to be the slope of the pink line, at the point where Id is 0.2A (as seen in the value for transcondunctance in the datasheet) and the Vgs is 2.5V as previously deduced using the other plot.
Why would the manufacturer choose to provide the transconductance at this particular point? Does he expect people to use that point as the bias point for amplifiers for some reason? Is there some other common aplication that justifies why would that be? is it special in some way? It would seem to me that choosing a point a little bit to the right would give a higher transconductance.
AI: It is a typical working point.
You use MOSFET in one of two conditions:
as switch. \$R_{DS,on}\$ is important.
as variable resistor in a linear circuit, e.g. in a voltage regulator. It will be biased close to its turn-on gate voltage and \$V_{DS}\$ will be high enough to saturate the channel. The given value is the maximum small signal gain.
it would seem to me that choosing a point a little bit to the right would give a higher transconductance?.
While true, I would say that two aspects speak against this: First, the manufacturer provides this value as typical realiable value, while the real value can be better. So quoting a higher value would raise expectations and require better manufacturing control. Second, going any higher in \$V_{GS}\$ would also exceed the continuous drain current rating. |
H: Transformer - 2 Wires in and 3 wires out - How to connect ground?
I have the following transformer:
And the following power cable:
This is for a dual-polarity power supply for some audio circuits. How should I connect the ground pin to this circuit? Can the transformer I have be used to build this?
Thanks in advance!
AI: Your transformer should be bolted to the chassis of your project and connect ground from our mains to the chassis. I you are using a plastic project box, it will likely be best to connect to a bolt you are using to mount the transformer to the plastic box. That way, if you ever fry your transformer and you develop a short to the transformer chassis, you'll immediately pop your circuit breaker (and hopefully the fuse in your project).
Yes, your transformer is fine, the two mains wires connect to the two red wires of your transformer. The three wire bundle will become your input to the power supply - two blue to the bridge rectifier and yellow is the circuit "ground". I would NOT connect circuit ground of your project to your Mains Ground until you run some tests and make sure everything is ok. After that, it really depends what you plan t use it for whether you want to connect to ground. F you are just learning to use an oscilloscope, I would not connect to ground until you understand how your scope works and the ground reference of your scope. |
H: NZR signal and multiplexer 74LVC1G157
I'm trying to use a WS2812B addressable LED with a multiplexer 74LVC1G157. I have test code on an Arduino, and if I connect the LED to I0 or I1, the color of the LED changes, but the delay selector part doesn't do anything.
#include <Adafruit_NeoPixel.h>
#define I0 5
#define I1 6
#define SELECTOR 10
#define NUMPIXELS 1
Adafruit_NeoPixel pixel0(NUMPIXELS, I0, NEO_GRB + NEO_KHZ800);
Adafruit_NeoPixel pixel1(NUMPIXELS, I1, NEO_GRB + NEO_KHZ800);
void setup() {
pinMode(SELECTOR,OUTPUT);
pixel0.begin();
pixel1.begin();
}
void loop() {
digitalWrite(SELECTOR, HIGH);
pixel0.clear();
pixel1.clear();
pixel0.setPixelColor(0, pixel0.Color(0, 0, 80));
pixel0.show();
delay(500);
pixel0.setPixelColor(0, pixel0.Color(0, 80, 80));
pixel0.show();
pixel1.setPixelColor(0, pixel1.Color(80, 0, 0));
pixel1.show();
digitalWrite(SELECTOR, HIGH);
delay(5000);
digitalWrite(SELECTOR, LOW);
delay(1000);
digitalWrite(SELECTOR, HIGH);
delay(1000);
}
I suspect that maybe there is a problem with the support board multiplexer I'm using. Where could the problem be? Is there something wrong on my code?
I have tried to change the selector pin manually, connecting to GND and V+ and it only works when it is connected to V+, to GND does nothing.
AI: The Arduino libraries have documentation and documentation says how the library works and how it should be used, so this behaviour is expected based on how your code uses the library.
The multiplexer most likely works fine, there just is no data transmissions going on at the data pins when your code changes the multiplexer. The data is transmitted out only when show() method is called. |
H: Ferrite rod (loopstick) antenna directivity
In a video about ferrite rod antennas it was stated that the antenna is most sensitive to the direction perpendicular to the axis of the rod, and it is insensitive along the axis. These are shown with the green markers in the screenshot below. I found it surprising, because the induced voltage is equal to the change in the magnetic flux, which goes through the loop (the scalar product of the magnetic flux with the normal vector of the "surface"). Where is the mistake? Which argument is the correct one?
All the literature I've found was either very high level, or formulate the explanation in a very scientific, complex, mathematical way, with lots of backreferences, which I was not able to fully trace back and understand.
AI: For help understanding, one can find here some good simulations about antenna (transmitting)... and others things.
http://amanogawa.com/archive/Antenna1/Antenna1-2.html
One can see that the H vector is "circular" around the antenna.
So, for receiving something, "ferrite rod" must be "perpendicular" to the "direction line" of the emitter.
NB: This is the reason why two inductors that must not be "coupled" magnetically are arranged perpendicular to each other. |
H: GaN Power transitor said to "reduce EMI"
I have no experience in GaN, I am currently discovering the subject and I was studying a design from Infineon and I found on a GaN power transistor the following benefits:
Here is the datasheet: https://www.infineon.com/dgdl/Infineon-IGT60R070D1-DataSheet-v02_14-EN.pdf?fileId=5546d46265f064ff016686028dd56526
That is not really intuitive to me to reduce EMI when you increase the switching frequency. So what does it mean?
Have a nice day : )
AI: The switching frequency is not decisive here.
The main EMI problems occur from high frequency ringing around the switch, which is triggered by the switch turning on/off.
The main problems of conventional MOSFETs is the large gate capacitance (requiring a lot of gate current, i.e. high dI/dt), the large package inductance (due to large physical size), and reverse recovery ringing.
WBG FETs improve all of these metrics. The physical size improvement is only in part warranted by the material though. In part, it is just a modern design decision and Si parts with very flat packages also benefit greatly from this. |
H: Simple negative voltage divider circuit problem
My sensor gives output between -10V and +10V. Then I decided to use a simple voltage divider circuit to be compatible with the ADC input range. I used a power supply like the sensor, the expected output voltage should be about -2V at the input of the ADC.
But although increasing input voltage up to 20V the voltage stays the same as -0.7V.
Then I use LM741 OPAMP as a buffer, but the result hasn't changed.
Still, about -0.7V is seen.
To simulate negative voltages which are generated by my sensor, also I've reverse connected the power supply to the circuit for negative rails.
Why I'm getting such results and the voltage divider doesn't work?
AI: ADS1115, 16bit ADC chip accepts input voltage range of 0 - Vcc.
It does not accept negative input voltage.
To solve this issue, make the input source floated with Vcc/2 as a reference point.
But this solution is very basic and the accuracy is very low, depending on the Vcc quality and resistors tolerance.
For better performance, get floating reference voltage from a stable voltage reference, e.g. MAX6101. |
H: MOSFET as a switch - drain to source resistance (voltage drop) too big
I'm trying to use an IRF510 MOSFET as a switch for my JSN-SR04T ulrasonic sensor connected with ESP32 based microcontroller.
The gate is connected to a GPIO pin which outputs ~3.3V and is also grounded with 10kOhm resistor.
The sensor is between Vcc and drain.
The source is grounded.
When I turn on my GPIO pin, the MOSFET switches on but the voltage between drain and source is ~1.5V, which means my sensor won't turn on (it needs 3.3V.) Shouldn't the voltage between drain and source be nearly 0? What could be the cause?
AI: You are nowhere near driving the IRF510 with enough gate-source voltage: -
3.3 volts is just too low for this MOSFET. Even with 4.5 volts if you tried to take 100 mA the volt drop would be 100 mV. You didn't say what current your sensor took but, at 3.3 volts gate drive, the IRF510 is a poor choice. The words in the data sheet tell this too: -
4 volts gate-source voltage is only guaranteed to cause a drain current of 250 μA. |
H: Using voltage dependent capacitor in PID tuning?
Changes in capacitance of some types of MLCC with applied voltage is a well known phenomenon. Changes can be quite considerable eg -50%
Has anyone ever tried using this effect to fine tune the I term in a PID controller? We need an easily tunable ultra low noise circuit
AI: Has anyone ever tried using this effect to fine tune the I term in a
PID controller? We need an easily tunable ultra low noise circuit.
Considering that the integrator is naturally trying to accumulate a DC voltage, I think this would be a bad idea. The accumulation of the DC voltage (i.e. the normal working of an integrator) will disturb the capacitance value and, make this a bad idea IMHO. Then, if you could somehow overcome that (not-inconsiderable) problem, how would you apply a tuning voltage to the capacitor that didn't upset the natural and expected voltage output of the integrator?
No, it sounds like a bad idea to me.
The only working area for this idea is when trying to modify an AC signal because the DC level is of no-importance. Even then, you have to be mindful of the peak AC voltages because they would distort waveforms asymmetrically and this might be a problem.
It's a solution waiting for a problem I suspect but, none of the above are suitable. |
H: Why is the transistor in this dimming circuit getting very hot?
This is a fairly simple dimming circuit using a dual opamp (IC1) as a comparator to control the brightening and dimming of a light bulb.
The switch (pin 2 IC1a) is a contact connection to ground.
Trimpot 3 controls the speed of the brightening when the switch is connected to ground.
Trimpot 2 controls the speed of dimming.
The issue is that when using a 10 W bulb, transistor (Q1) gets warm during the brightening/dimming time. The longer the times are (based on TM2/TM3), the warmer it gets. It gets very hot when testing with a 25 W bulb.
Even if the trimmers are set to 0 ohms (thus only R5, R6 resistance) and there is virtually no brightening/dimming happening, the transistor gets extremely hot almost immediately.
Should there be a current limiting resistor from the transistor's emitter to ground?
What else could allow the transistor to function cooler?
Is it even possible to operate a D2PAK form factor that is meant to switch up to 40 W (3.3 A) without a heatsink and only PCB heatsinking?
AI: You've got at least a couple of problems. One is that you've greatly changed the circuit from the one you were following. The example uses one LM358 op-amp as an oscillator and a second op-amp as a comparator to drive a MOSFET with a pulse width modulated signal.
The modifications you've made appear to have changed the circuit from PWM to a linear regulator. In that case, even the MOSFET would get warm or hot.
The second problem is that you are using a NPN bipolar junction transistor instead of the specified N-channel MOSFET.
The NJVMJB44H11 has a collector to emitter saturation voltage of 1V. At 1A of current, that'd be at least 1W of power dissipated in the transistor. That's a lot more than the the 200mW mentioned on the web site you referred to.
MOSFETs have a certain minimum resistance when fully on (conducting.) That can be very low, resulting in low switching losses.
BJTs have a certain minimum collector to emitter voltage when fully switched on. The product of the voltage from collector to emitter and the current through the collector tells you how much power the transistor itself will waste as heat.
Saturation in the NJVMJB44H11 is rated at a base current of 0.4A. Your LM358 can't deliver the current needed to push the transistor into saturation, so you will have a higher voltage drop across the transistor and therefore more power loss - the transistor will get hotter. |
H: Designing baseboard for Intel processor
We are studying the feasibility of designing a minimal board for a high end CPU such as Intel's 8th Gen Core i7/9 alongside some FPGA. We have experience with DDR3/PCIe designs and know about high frequency PCB designs.
We don't have the intention to write its software, and shall stick to general bootloader/OS unless some initial state BIOS/bootloader is needed.
For such processors, are all of the design documents openly available?
On their website, I've seen some family specifications/datasheets and other design documents, but they don't seems to cover everything needed, for example I've searched for a while on Intel website and not been able to find packages layout, pinout, timings and any design examples/layout. I've seen some minimal images of pinout but not as an official reference.
AI: Generally, and this is something you probably also experienced working with DDR3 designs, manufacturers of cutting edge integrated devices want to know what you are building, how you plan to use it, and how many units you plan to sell. If it is academic, which institution is backing you. They do this to make it more difficult for competitors to review their features and implementation, to collect market data to plan their next products, but also often because of exclusivity , national security, and other potential legal and market requirements that necessitate signing agreements or other paperwork before allowing you to see their IP..
Personally I think it's a heavy approach just to see datasheets, and many manufacturers are seeing the value of open documentation and more "self service" sales channel, but not all manufacturers will be on board, that is the nature of the current device and integration market.
Your best bet is to get in contact with the manufacturer (Intel) via your regional sales channel, explain your application, and hope they will provide you an offer for discounted or free documentation.
Alternatively gray (unauthorized) or black (stolen) design materials can probably be found if one looks. |
H: Can current transformer be used to sense voltage?
When searching for voltage sensing transformers, I've come across this device on the internet: ZMPT107-1.
I far as I understood, this is a current transformer (it either uses a burden resistor or an transimpedance amplifier on the secondary), but I'm confused as the datasheet says it is used to sense voltage. How is this possible? Shouldn't it be fried when connected across higher voltages (most CTs have very low impedance)?
Also I'd like to know if there are small form voltage transformers for the sole purpose of sensing voltage waveforms of low frequency (i.e. 50 or 60 Hz), and if they exists, what are the part numbers.
AI: the datasheet says it is used to sense voltage. How is this possible?
It is a current transformer and I think you may be confused by this diagram (I've added the red boxes): -
The red boxes surround the load resistance of the circuit you wish to measure the current of.
Shouldn't it be fried when connected across higher voltages (most CTs
have very low impedance)?
Yes, it would fry if the current isn't limited - that's what the load resistor R' is trying to symbolize.
I'd like to know if there are small form voltage transformers for the
sole purpose of sensing voltage waveforms of low frequency (i.e. 50 or
60 Hz), and if they exists, what are the part numbers.
Here's something you are going to get used to if you use this site; requests for product recommendations are off-topic. |
H: LT Spice: parallel RLC circuit resonator giving weird frequency response?
I am trying out the following parallel RLC circuit configuration:
On trying out other similar parallel circuits (like with an RL coil in parallel with C or with RC and RL branches in parallel) I got the frequency curves I had expected and seen in textbooks. However with this one, I get the following response:
which appears to be pretty erratic. There is a "dip" at the resonant frequency (of around 1000 rad/s or 160 Hz) but I dont understand why the curve leading upto it and after it is so jagged?
When I step the resistances, this gets even more erratic. Is this normal behavior for this circuit. There was nothing in my text book to suggest this kind of response. I expected something like this:
AI: This is a likely candidate for show-stopper of the month: -
Then, when you fix that you'll realize that a voltage source (V1) is ideal and won't care a damn about C1 and L1 being present i.e. you'll just plot the spectrum of I(R1) as a straight horizontal line. |
H: Unexpected voltage spikes at output of PFET on falling edge
I have the circuit shown below:
I want this circuit to switch between 2.5V and 3.6V at the drain of the PFET when I input a square wave into the gate of the PFET.
I would expect that this circuit would do this - when I put 0V into the gate, the PFET should become a low-impedance resistor, causing the voltage to equal 5V - 2 0.7V diode drops = 3.6 V. When I put 5V into the gate, the PFET should act as an open circuit, so the drain voltage can be found using the voltage divider to be 2.5 V.
In reality, when I input a 10 kHz square wave into the gate of the PFET, I get the following voltage at the drain of the circuit (measured with an oscilloscope in a lab):
As you can see, there are massive voltage spikes that happen every falling edge. These voltage spikes take about 10 µs to dissipate.
I have been able to trace some information about these spikes. The voltage at the source node of the PFET also spikes, indicating that these spikes are not entirely due to my MOSFET selection:
A plot of the source-drain voltage of the PFET and of the voltage of the diodes also reveals a few things. The source-drain voltage appears to have an incredibly long 10 µs rise time for some reason. In addition, the diodes appear to be having an incredibly long 10 µs reverse recovery period:
When I have tested the diodes individually, I found that their reverse recovery time was orders of magnitude shorter than what I have seen here (the time on the datasheet is 8 ns). In addition, I found that the rise and fall times of my PFET, the ZVP3306A, was significantly faster when I tested it alone with a simple MOSFET test setup. On the datasheet, it has a rise time of 7 ns. So, individually the diodes and MOSFET can rise and fall incredibly quickly; however, when I am putting them together, I am getting massive rise times and reverse recovery times.
I will note that I performed a simulation of this circuit using Cadence PSpice. In the simulation, the large voltage spikes disappeared; However there were still very large 10 µs fall times at the drain of the PFET at every falling edge.
Does anyone know what may be causing these large rise times/reverse recovery times to appear? Am I correct that these are even rise times and reverse recovery times? Finally, is there any way I can adjust this circuit to speed these times up or remove this massive falling time at the drain entirely? I am trying to make this circuit switch quite fast, so any tips would be appreciated.
AI: You can expect Miller capacitance between gate and drain to react in both directions. Thus with a high impedance load, the gate voltage is being seen at the drain. Conversely, with a very low impedance load and higher impedance source, you can expect negative feedback to the gate.
Being aware of the FET model capacitance helps explain its behaviours. Capacitance tends to increase as RdsOn rating decreases such that for a given family the product is relatively constant.
Ref
A similar package in a PNP BJT could be less than 3 pF vs above FET is 50 pF for Ciss and 8 pF for Crss. This is the 2N3906-G. it also has a lower Rce=Vce(sat)/Io ~ 4 Ohms vs 14 ohms for your FET. Similarly, if you examine off-state leakage for the BJT and feedback capacitance Cob, as well as On impedance this BJT has a lower Rce*Cob=T than the FETs such as yours. This gives a hint as to why FET input & BJT output devices called IGBT's are popular for high slew rate and kV voltage switching.
The 1N4148 has even lower capacitance and leakage resistance so it is expected to see more of the transient across the diodes.
But since you have no tolerance specs for feed-thru voltage and load impedance, I cannot comment on a better solution. What is the purpose of this experiment? |
H: Op-amp comparator 0 V - +5 V outputting +1 V - +5 V PWM
I am trying to make a PWM signal for controlling a motor.
The TL082 op-amp, connected between 0 and +5 V, takes
a triangular input generated by an astable and filtered by a capacitor on the (-) input
an adjustable voltage, made by a R/2R resistor network on the (+) input
All this works at about 50 kHz. In theory, the output should vary from 0 to +5 V, but in reality, it varies from +1.4 V to +5 V.
I tried to add a pull-down resistor (1 kΩ and 10 kΩ), I also tried a pull up (never know) without results. I also tried a feedback loop with a 1 kΩ resistor on the (-) which changed nothing. I lowered the frequency to 25 kHz, which changed nothing. I know that these were useless, but I was not able to come up with tomething else, this is a REALLY basic circuit.
Here is the diagram:
and here are the oscilloscope traces:
The triangle input and the adjustable one (random value):
The triangle input and the output depending on the adjustable input level:
I must be wrong somewhere, but I don't get where; normally in comparator mode, the outputs are between V- and V+ and that's it. Maybe it is the fact that I use it between 0 V and +5 V?
On the other hand, the PWM is working, it changes with the adjustable voltage increase.
AI: A TL082 is an op amp, and is not designed to be used as a comparator. Its internal circuitry is optimized for linear operation in feedback, and isn't optimized for the kinds of saturation that occur with large-signal effects in a comparator.
Moreover, this is not a "rail to rail IO" op amp, and its output driver cannot reach all the way down to 0 V or all the way up to 5 V. In the datasheet you can see that the output stage has a fairly straightforward push-pull as its final stage:
This structure encounters Vbe drops on both its PNP and NPN output transistors, which means that the best output range you can expect is around 0.7 - 4.3 V (assuming the prior stage can reach a wide enough range).
Use a comparator instead (and if it has an open-collector/open-drain output, add a pullup resistor). The LM393 conveniently has the same pinout and an open collector output, requiring only the addition of the pull-up resistor. It's also faster - it slews from 0 to 5 V in 0.25 microseconds (20 V/μs), while the TL081 only slews at 13 V/μs. Aside from that, it's a fairly old and simple comparator, and you can get even faster/more advanced ones to meet specific needs. |
H: What happens if clock cycle is replaced with constant high voltage in a processor?
Would the data in registers change at light speed and maybe become unstable/undefined, or would the processor stop changing state altogether?
This post says:
To give all the gates time to change state from the whole chain we use a clock. The clock is an input to the CPU switching between 0 and 1 (signal going low to signal going high to signal going low, etc.), that drives the CPU to perform operations.
This article says:
If the clock speed is increased to 100GHz, a cycle will be 0.01 nanoseconds ... What happens when this size limitation is violated? What happens is that certain parts of your circuit are in the 'current' cycle, and other parts are in the 'previous' cycle. It gets really hard to handle such distributed systems.
But then this post says:
it will just stop
So I'm confused on the outcome.
If I picture a simple timer register hookedup to an adder, and each clock cycle its data gets ++1'ed, doesn't a constant high mean the register data loops through the adder and back to itself at light speed, adding to itself indefinitely? rather than stopping?
AI: Your doubts arise from lack of understanding of the basics about synchronous sequential logic networks, of which modern CPUs and related basic blocks, like counters, are just particular examples.
As someone else already pointed out, such networks can change state only in consequence of a clock edge, i.e. a clock signal transition.
I suggest you to investigate the basic behavior of edge-triggered flip-flops (i.e. 1 bit static memory, simplifying a bit :-) and other basic concepts about synchronous network timing requirements, such as setup time, hold time and propagation delay.
EDIT
(To tackle some comments by OP @Dan)
You keep mentioning the "speed of light", but you really should get that term out of your system.
Speed of light is a "speed" in physical sense, i.e. a ratio of space over time. Speed describes how fast physical bodies move. In digital logic we talk about processing speed, i.e. how many bit per seconds are processed.
Relating the two is not trivial at all (a bunch of charges moving is not necessarily the same as a bunch of bits "moving").
Asynchronous (i.e. "clockless") logic is theoretically faster, because devices can react without waiting for the clock edge. This doesn't mean the single device is "infinitely" fast. With the same technology and the same circuit complexity, getting rid of the clock just saves you the time some of the clocked devices waste waiting for the clock edge when they already have their inputs "ready". This doesn't increase the speed with which a single transistor switch state. So you will still have propagation delays.
(https://en.wikipedia.org/wiki/Asynchronous_circuit#Asynchronous_circuits).
OTOH, designing a complex asynchronous system is a timing nightmare, since any subsystem can react at any time, and you still have to meet setup and hold time requirements, but now you can't know when other blocks will switch their outputs since you have no synchronization signal. Moreover, you will still need synchronization, since some tasks will have to wait for other ones to complete. Without clock signals, this will be much more complex.
You could find this interesting:
https://en.wikipedia.org/wiki/Asynchronous_circuit#Asynchronous_CPU. |
H: Voltage supply fallback in very low-profile design
I'm currently designing a PCB built around an RP2040, following the RPi Foundations guidelines on how their SoC should be hooked up.
This specific device will have a very small footprint (hence the 2040) and will normally be powered by a LiPo battery - however, a user should be able to program the device over USB.
By default the RP2040 schematics utilize an NCP1117-3.3 regulator for power over USB, and it's easy enough to use a similar regulator to supply from a 3.7V battery.
However, as far as I'm aware, supplying from both the battery and USB port at the same time will damage the device. In order to prevent this I could simply add a jumper to force the user to select either the battery or USB as source. But I think there should be a more 'automated' solution to this as to user-proof the device as much as possible.
So in my idea the device will draw battery power by default, but should 'switch' to the USB's power as soon as the USB bus gets connected. I thought this should be easy enough with a PNP transistor - but as the 'standard' transistor is too large for the device's footprint I got myself lost in the world of transistor properties, and now I feel like I'm in over my head.
So to summarize: I'd like to gain some insight on the best practice to make this kind of 'switch' in power supplies when the higher voltage supply becomes available.
Thank you guys for any insights! :)
Background
I'm an IT guy by trade and I try to learn electrical engineering as a hobby, so asking a question like this is my attempt to gain more insight where my own research fails.
AI: You're looking for an OR controller. You'll need an external MOSFET and some other little passives but you can get the controller in something as small as an 8-DFN which is 2x3mm.
Also the NCP1117 has a dropout voltage of 1.4V so your 3.7V Lipo won't be able to power it.
If you don't care about the losses, you might be able to use a common-cathode diode pair. You can find those in packages as small as a 3-UDFN but a cursory look at the data sheet is not encouraging on the characteristics. Depending on your current draw, maximum tolerable voltage drop, etc., you'd probably have to go with something in a SOT-23 or -323. |
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