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H: Charge Lithium-Ion batteries using a solar panel in parallel
I want to charge some Lithium-Ion batteries using a solar panel with this loading circuit found on ebay here. Apparently it works fine with just one Li-Ion battery, but I would like to extend the capacity for some more battery life. Can i just connect 2 or 3 cells in parallel to this charger without worrying? Would there be a balancing issue? How do I balance them? Am I doing any risky stuff by putting them in parallel? Also I want to charge them using a 5.5V 2.5W solar panel using the charging board. Would that be enough? Should I buy a second solar panel?
The batteries I was looking @ are some panasonic ones. Are they good quality?
AI: Yes you can connect several Li-Ion cells in parallel but before you do so, check that they have (almost) the same voltage.
If you buy several at the same time from the same supplier, changes are this will be the case.
If the voltages are more than 0.2 V (I just sucked this value out of my thumb !) different, you have to balance the cells. Either charge them fully with the same charge, after charging they will have the same voltage. OR you connect them in parallel but with a small value resistor between both + poles. A 100 ohm resistor will do. This resistor will limit the current flowing from one cell to the other while they balance themselves. When there's 0 V across the resistor left, the cells are balanced and you can connect the + poles also without the resistor.
If the 2.5W solar panel will be enough, depends on your patience ! Using 2 cells will double the charging time. Using a solar panel with double the power will halve that charging time again. But the charging circuit you're using can only supply up to 1 A so it makes no sense to use more than 2 2.5W, 5V (so 0.5A) solar panels.
Panasonic are excellent batteries ! Also Samsung and LG make excellent batteries. I would not recommend most cheap UltraFire. Either get cells with "solder tabs" to connect them in parallel and to connect wires to them OR get cells without "solder tabs" but then get a battery holder. You should avoid to solder directly on the battery.
I would recommend getting "protected cells" (these have a small battery protection circuit) without "solder tabs" (most protected cells do not have these anyway). And to use a battery holder, if you ever need to replace the batteries, it will be easy. |
H: Potentiometer as Voltage regulator 12V to 6 - 12V range
I am new to electrical engineering and I would like to build simple circuit with potentiometer as voltage regulator.
I have simple circuit, as you can see in attached picture below.
I have 12V/1000 mA DC source connected via potentiometer to LED strip (unfortunately I don't know the resistance of this component, strip is about 1.5m long - type 5050 if it will help somehow)
I would like to know what kind of POT should I use to regulate source to range 6 - 12V. At the moment I have chosen 1k Ohm POT and it dims LED strip only in first 10% of range then nothing happens at all because strip barelly shine.
AI: What you are doing is not voltage regulation, but rather adjusting the resistance in series with the LEDs. This is a fine way to adjust brightness in principle - though it won't be linear, as you've observed - except for the fact that a potentiometer is not rated to carry the sort of current that flows through an LED strip. Potentiometers tend to be rated at 100mA or less, but 1.5 meters of LEDs will draw a lot more than that.
Your best option for controlling brightness fairly linearly is an adjustable constant-current supply - such as one like this:
An alternative that solves the power dissipation issue but not the linearity issue is to use a linear regulator like the LM317 with a potentiometer in the feedback loop - see that part's datasheet for an example. |
H: Latch IC for TFT application
This looks little odd to ask here, but I have stuck in situation where I have my hardware ready and unfortunately the footprint used is of some other part no. Due to time constraint, I cant rework with PCB development and I don't want to add floating connections anywhere in hardware.
To be more specific, I have used SN74HCT245, 3 state buffer with 3rd state as isolation. It's pinning diagram is as shows:
But, I need Latch IC (3rd state as latch, instead isolation) for my application. Is there any part no. with same pinning diagram and matching footprint as shown in the image above to fulfill my requirement.
Thank you.
AI: One solution with a pinout close to the '245 would be to use a PAL16R8 programmed to provide the latching function you need. Unfortunately, its output enable is on pin 11 rather than pin 19, so you'd still need a couple of wires. |
H: Is there a "faster" photoelectric beam sensor?
We've been experimenting with some Velleman PEM10D sensors. (So, something like this.)
The main reason chose, was they have a 10m length (we need a good 6m or so).
I have found that, the response is a bit slow for our needs.
So for example: if you drop a basketball through the beam from a height of two feet, it is travelling slow enough it will register. However if you drop a basketball through from 6 feet height, it is too fast, it will not trigger the device.
I surmise, we need the device to be (let's say) a good ten times faster.
Now, the spec of the device suggests .. "Response time: 5 - 100ms" I don't really know what that means - is that the minimum time of cutting the beam which will register? If so, what does the 10x spread mean? Perhaps someone here will know.
Secondly, in general is this a well-known problem, are there "much faster" photoelectric beam sensors? Or no, or ...?
Thirdly, indeed could the whole thing be a fubar on our end ... say, poor programming on the Arduino, wrong ... power supply or something, or some other mess-up by us?
So, to be perfectly clear, the thing cutting the beam in our setup is a fast-moving ball-like object, which can be moving quite fast .. some 10 or even 20 m/s.
Finally I apologise if this is not in fact the optimum forum. Thx
AI: The manual for your sensor - briefly - mentions "response time adjustment" via a screwdriver, which would explain the spread. Some applications, such as sensing someone coming through a doorway, require longer response times, so as to not trigger separately for, say, each leg.
In general, the response time of this sensor is going to be limited by the fact that it uses an electromechanical relay, which takes time to physically switch on and off. It's likely the internal electronics were designed with low speed operation in mind as well.
Broadly speaking, if you need high speed measurements, you probably want to look for a sensor that has either a transistor output (open collector, open drain, or logic level), or speaks a communication protocol like I2C or SPI. Sensors like these are likely to be designed around higher data rates and response times. Many of these more specialised sensors may be orientated around measuring distance, rather than just detecting beam breaks, but it's certainly possible to construct a beam break sensor with a fast response time; I'm just not sure if any exist commercially.
In passing, Sparkfun have a Lidar sensor that ought to meet your requirements pretty well. |
H: attenuated and biased output from op-amp
I've been struggling on build a noninverting amplifier with TL972IP (datasheet).
Here's what I've made:
Orange is for VCC+, Yellow is for VCC-, Green is for GND. Blue is for a signal input. Resistors are for feedback.
As it is hard to see, here's a diagram:
simulate this circuit – Schematic created using CircuitLab
With the configuration above, I've got this:
Yellow is the input and Blue is the output. As you see, input is attenuated (expected: gain of 2) and nagatively biased.
Where can I look into and see what's going wrong with this circuit?
AI: It might be the probe attenuation.
Some probes have a switch on them that let you select an attenuation of 2x, 5x, 10x. Other probes are simply built to attenuate and don't have a select switch, but simply have a, say, 10x written on them.
To account for this, oscilloscopes have an option for each channel to specify what kind of probe is connected to it.
For example, if you're using a 10x probe you would select the 10x option on that channel, so that the oscilloscope can display the right signal.
My guess is that you either are using a 10x probe without the proper option set on the oscilloscope, or vice versa you're using a regular probe with the 10x option activated on the oscilloscope.
If you multiply the output channel vertical scale by 10, you get 1V, and with that scale the output would be exactly twice the input (since the input vertical scale is 500mV). |
H: Is there a "scanning" beam sensor?
As I understand it, photo beam sensors (and perhaps other emission types) work like this...
it occurred to me, it would be great if there was a "scanning" such sensor...
So, it would rotate or swing, at many Hz, over perhaps 90 degrees. (It could rotate mechanically just like an airport radar or I guess a bar-code scanner, or perhaps "rotate" in some solid state manner.)
When an object cuts the beam, in fact it could tell you the angular bearing.
(Of course, if you put two or three of them over an opening, you could calculate a position in 2D nicely.)
In fact, does this technology exist .. is there such a photoelectric beam sensor -like device, which indeed will give you an "angular bearing"?
I've spent considerable time searching but not been able to discombobulate.
(I was astounded to learn there is a lidar-like thing that actually measures distance via time of flight, but that's sort of a further (amazing) complication, not really what I'm wondering about.) Thx, experts
PS I have no interest at all in model or manufacturer recommendations. I just want to know if such a thing exists. (For all I know, it's completely commonplace .. or it may be obviously "ridiculously impossible" to experts. Cheers)
AI: The main obstacle to this is that a traditional beam break has a point source and a point sensor. The system as you described would have to have a linear sensor in order to tell you where the break was, which would be more expensive.
It's certainly not impossible. Related work includes "structured light" (combining a scanning or otherwise patterned laser with a camera to give a 3D image), or the Flat Frog system for very large touchscreens. That has a large number of LEDs and photodiodes around the edge and detects fingers by successively illuminating from different angles and looking for the shadow. |
H: What does it mean if an AC motor has two voltage ratings?
On my AC motor nameplate, it says V230/400 (delta/star). I imagine this means that it is compatible with both voltages, but what allows it to do this? How will the performance change for each?
AI: (Assuming you are talking about an induction motor)
Such a motor will have six terminals - i.e. start and end points of all three windings available, which you should connect as star or delta. The terminals are arranged to allow you to do this easily.
The motor is rated to tolerate 230V RMS across points U1-W1, U2-W2 and U3-W3. If you connect it in
in star connection you can have V(L1-L3) = 230*sqrt(3) = 400V rms.
In delta mode you can only have V(L1-L3)=230V, so you probably shouldn't
directly connect it to the 440V 3-phase supply in delta mode. |
H: Power rail decoupling caps for analog circuitry
First off, the terminology I'm using could be complete rubbish - I'm still learning
I have a mixed signal board for measuring bio-signals. The 4 layer board will have a split ground plane, analog ground and main ground (for a microcontroller, SD card, extra sensors, etc), star connected at the power pins through a ferrite bead. Previous versions (which I did not design) have had significant problems with noise.
Should the analog circuitry (mostly op-amps, etc.) have additional decoupling capacitors near the physical chips, in addition to the caps at the outputs of the DC/DC and charge pump that are powering them? similar to the picture below.
Assuming that it should have the decoupling caps, what size and why?
The DC-DC and charge pump are in the range of 100s of KHz to a few MHz, while the analog signals we are interested in are less than 100Hz, centred around 10Hz
Finally, all componants are Imperial 0805 packages (for convenience, still prototyping). The op-amps are 0PA2277 (additional question: is it better to use OPA4277, with 4 op-amps per package instead of 2, in terms of noise performance?).
AI: All active components should have decoupling capacitors. The PCB traces between your part and your power source act like parasitic resistors and inductors, and if you don't decouple your ICs, then when their power requirements change quickly - for instance, when they try to change their output signal in response to something - the changing power requirements will cause voltage drop and overshoot due to the long PCB traces. A nearby decoupling capacitor eliminates that high frequency noise by providing for those short-term spikes locally.
0.1uF capacitors are a reasonable default for decoupling; if your device may have particularly large power draw requirements, you should add a 1uF or larger capacitor in parallel.
Regarding grounding, you will find a lot of conflicting advice on this on the Internet. Split ground planes are often less simple and more problematic than you might suppose, because return currents prefer to flow on the reference plane underneath the signal trace. If any of your traces cross the split in the ground plane, you will force that current to deviate around the split in the ground plane, causing a lot more noise than you might have eliminated by splitting the ground plane in the first place.
This article provides an excellent description of why you should consider using a single ground plane combined with careful routing. |
H: What's the main differences between a TSSOP and a SOIC and when would you use one over the other?
I was recently looking at some SPI SRAM chips at Mouser and noticed that a particular IC came in both a SOIC-8 and TSSOP-8 package. The specs seem identical but the price is different (not by much, but different).
Visually, it looks like you could take a SOIC and push down from the middle to flatten the pins out and you would have a TSSOP. I know it's not the same thing but it looks like you could. ;-)
Anyway, given the same specs, why would you choose one package over the other? Both seem to be as easy to solder as the other (pins not under IC). Both seem about the same size.
For me, it would seem you would pick the cheaper of the two but there has to be more than that.
Thanks
EDIT
One thing I didn't make clear, is that I am wondering if the differences are just physical or are there others? I see now that the size difference can be quite large considering....
So I am gathering that if board space is a premium (which it usually is) then use TSSOP. But then why do we need SOIC at all?
Hope that makes it more clear.
AI: The SOIC is more than 50% longer than the TSSOP. (4.9mm vs. 3.0mm) and only a bit wider. That may not seem like a lot to you, but on a crowded board it might make a difference.
The SOIC is taller (1.75mm vs. 1.2mm) which is enough to make a difference in a thin product.
The lead pitch is much closer (almost half) on the TSSOP- 0.65mm vs. 1.27mm, so for crude manufacturing processes the SOIC might well be preferred. If you think they are the same to hand solder- give it a try, unless you are quite skilled you'll see quite a difference. |
H: Does position error from accelerometer still build up quadratically when using Kalman filtering?
I want to implement an inertial navigation system that uses a basic IMU for indoor position tracking. From all the things I've read you need to assist the IMU with something like GPS or other means of position sensing since the error in position grows quadratically with time.
I looked into Kalman filtering and am confused why this doesn't fix the issue of quadratic position error. Since youre sensors only measure acceleration and gyro (and maybe magnetic field), you must get position from your estimated state, not from your estimated sensor reading. If this is the case then you update your position state with only the error on the accelerometer each time and not the double integration of the accelerometers past errors, right?
I may be just confused but I feel like Kalman should get rid of the quadratic error.
If this is not the case, then why? And what techniques do people use for reliable indoor position tracking with IMUs?
AI: No amount fo filtering can correct a contant error that is inherit in your input data.
Assume you are in rest, but your accelerometer gives a reading of a very low constant value X (its error). No amount of filtering will change this.
Integrating this X over time gives your 'speed' t * X, which increases linearly.
Intergrating this speed over time gives your 'position' (1/2) * t^2 * X, which grows quadraticly. |
H: Datasheet assistance request
I'm trying to incorporate a USB-PD controller into my design for a Dual Role Port (DRP). I'm currently building with a Cypress CCG2 24-pin QFN, and using their reference block from the datasheet found here.
Unfortunately, I can not figure out why they have a resistor where I have marked in red circle, suggestions for this? I'm pretty sure the the symbol in the purple is P-Channel FET, can someone confirm?
Below is Dual Role Port (DRP) Application from page 11 of attached datasheet.
AI: Dampen oscillation caused by the parasitic capacitance at the gate of the FET.
Adding to this, you are correct in thinking that the symbol in purple is the P-channel FET. |
H: What's a reasonable threshold for UVLO?
I see that the TPS61093 UVLO is triggered at 1.55V. However, this boost converter has a threshold of 2.6V. Is 1.55V a bit too low for lipo? If so, how come the TPS61093 is designed this way?
Thanks
AI: Yes, 1.55V is way too low for Li-Ion/LiPo. 2.6V is already on the very edge.
It has 1.55V UVLO because it works correctly down to 1.6V.
Not every single device in the world is designed to work with Li-Ion and only Li-Ion. If a converter says you could use a battery type that doesn't mean it will also suddenly do everything that the battery needs in ways of protection.
The main difference here is the presence of a PCB with many components vs just a chip. |
H: Small signal models of MOS amplifiers
I understand that the equivalent circuits describe the behavior of amplifier for signals of low amplitude that allow us to assume that the circuit behaves linearly.
My questions are:
Why are all the DC voltage and current sources that aren't varying with time zeroed out? I don't understand the statement- "As far as the signal is concerned, all DC sources have no effect on operation".
As in the above figure, the small signal equivalent model shows that the resistance tied between drain and VDD(which is shorted) to be in parallel with the the current source gmVgs. However the voltage across resistance and the voltage VDS(Vo) are not quite the same. How is this accounted in the above model?
Is there any other way to derive expressions for gain and I/O impedance? I tried to draw an equivalent circuit with all the dc sources present.Note that the voltage across RD is not VDS(as it should not be). Is it correct?
Applying KVL to output loop:
VDD - gmVgsRD - Vout = 0
VDD/Vgs - gmRD = Vout/Vgs
Voltage gain = Av = Vout/Vgs = VDD - gmRD.
But the expression for gain derived by shorting VDD is -gmRD.
Where am I going wrong?
AI: The true answer to your question unfortunately involves some bits of advanced calculus. Small signal models are derived from a first-order multi-variable Taylor expansion of the true non-linear equations describing the actual circuit behavior. This process is called circuit linearization.
Let's consider a very simple example with only one independent variable. Assume you have a non-linear V-I relationship for a two-terminal component that can be expressed in some mathematical way, for example \$i = i(v) \$, where \$i(v)\$ represents the math relationship (a function). Regular (i.e. one-dimension) Taylor expansion of that relation around an arbitrary point \$V_0\$, gives:
$$
i
= i(V_0) + \dfrac{di}{dv}\bigg|_{V_0} \cdot (v-V_0) + R
= i(V_0) + \dfrac{di}{dv}\bigg|_{V_0} \cdot \Delta v + R
$$
where \$R\$ is an error term which depends on all the higher powers of \$\Delta v = v - V_0\$.
The linearization consists in neglecting the higher order terms (R) and describe the component with the linearized equation:
$$
i
= i(V_0) + \dfrac{di}{dv}\bigg|_{V_0} \cdot \Delta v
$$
This is useful, i.e. gives small errors, only if the variations are small (for a given definition of small). That's where the small signal hypothesis is used.
Keep well in mind that the linearization is done around a point, i.e. around some arbitrarily chosen value of the independent variable V (that would be your quiescent point, in practice, i.e. your DC component). As you can see, the Taylor expansion requires to compute the derivative of \$i\$ and compute it at the same quiescent point \$V_0\$, giving rise to what in EE term is a differential circuit parameter \$\frac{di}{dv}\big|_{V_0}\$. Let's call it \$g\$ (it is a conductance and it is differential, so the lowercase g). Moreover, \$g\$ depends on the specific quiescent point chosen, so if we are really picky we should write \$g(V_0)\$.
Note, also, that \$i(V_0)\$ is the quiescent current, i.e. the current corresponding to the quiescent voltage. Hence we can call it simply \$I_0\$. Then we can rewrite the above linearized equation like this:
$$
i = I_0 + g \cdot \Delta v
\qquad\Leftrightarrow\qquad
i - I_0 = g \cdot \Delta v
\qquad\Leftrightarrow\qquad
\Delta i = g \cdot \Delta v
$$
where I defined \$\Delta i = i - I_0\$.
This latter equation describes how variations in the current relate to the corresponding variations in the voltage across the component. It is a simple linear relationships, where DC components are "embedded" in the variations and in the computation of the differential parameter g. If you translate this equation in a circuit element you'll find a simple resistor with a conductance g.
To answer your question directly: there is no trace of DC components in the linearized (i.e. small signals) equation, that's why they don't appear in the circuit.
The same procedure can be carried out with components with more terminals, but this requires handling more quantities and the Taylor expansion becomes unwieldy (it is multi-variable and partial derivatives pop out). The concept is the same, though.
Small signal models are nothing more than the circuit equivalent of the differential parameters obtained by linearizing the multi-variable non-linear model (equations) of the components you're dealing with.
To summarize:
You choose a quiescent point (DC operating point): that's \$V_0\$
You compute the dependent quantities at DC (DC analysis): you find \$I_0\$
You linearize your circuit around that point using the DC OP data: you find \$g\$
You solve the circuit for small variations (aka AC analysis) using only the differential (i.e. small-signal) model \$g\$. |
H: Why are the semiconductor chips (DRAM) volatile
Let me clarify, we all know Dynamic RAM is volatile in nature (it just won't hold data when it's turned off).
I've been searching throughly about why instead of the 'what' about it, I just can't find a technical reason about why it won't hold permanent data.
I would like to know 'why' it doesn't hold permanent data (technically).
AI: DRAM is built as a capacitor and a switch for each bit - the data is stored as a charge on the capacitor.
It is pretty much impossible to make a perfect capacitor and a perfect transistor, certainly not on the tiny scale used in DRAM chips. There are leakage currents within the system - between the capacitor plates, across the channel of the transistor, etc.
This means that the charge stored on the capacitor will, over time, discharge. As the charge dissipates, the voltage on the plates gets smaller and smaller until it is indistinguishable whether it is a 1 or a 0 - it ends up being somewhere in between. At this point the data is lost or at the very least corrupted.
In practice, the way this is avoided is to periodically read every data bit in the RAM and then write the same value back. What this does is rebuild the charge on the capacitor to replace any that has leaked away. This process is called refreshing. If you turn the power off, the controller that is periodically refreshing the DRAM turns off and so it is no longer restoring the charge on each bit and the data eventually seeps away.
Furthermore, during operation when you access a bit in the DDR, the capacitor discharges a little bit through the access transistor - as the charge on the capacitor is shared with the capacitance of the access lines. So in order for the bit to not change, you have to write the same value back to restore the charge in the capacitor. |
H: Replacing battery by supercapacitor
I want to replace a battery, which has a load of LEDs and a temperature sensor, with a super capacitor.
How can I calculate the specifications of the super capacitor?
Thanks!
AI: You need four pieces of information
1) How much current do you need (in amps)?
2) How long do you want to run your circuit from the cap (in seconds)?
3) What it the largest voltage (normally the regular operating voltage) which will be applied? and
4) What is the lowest voltage out of the capacitor which will still allow the circuit to function?
Let's call 1) i, let's call 2) $\delta$t, 3) is Vmax, and 3) minus 4) is $\delta$V.
The relationship between time, voltage and current in a capacitor with a value of C in Farads is $${\frac{i}{C} = \frac{dV}{dt}}$$
For a constant i, which is a reasonable first approximation in this case, this becomes $${\frac{i}{C} = \frac{{\Delta}V}{{\Delta}t}}$$, or$${C = \frac{i{\Delta}t}{{\Delta}V}}$$ and the capacitor must have a voltage rating of Vmax.
To walk you through this, lets say you need .25 amps for 5 minutes (600 seconds). Let's say your battery puts out 3.7 volts when fresh, and your circuit will work down to a battery voltage of 3.0 volts. Then $$C = {\frac{(.25)(600)}{(3.7 - 3.0)}}$$ $$C = {\frac{150}{0.7}}$$
and you need a 214 Farad supercap with a voltage rating of 3.7 volts minimum.
EDIT - As Brian Drummond has pointed out, supercaps often have a high internal resistance. If you want to take this into consideration (and you had better do so), you need to quantify the resistance R of the cap at the current level which you are using. Then the capacity calculation remains the same, but if the capacitor voltage rating is Vcap, instead of being Vmax, $$Vcap = Vmax + (iR)$$ In the above example, if the ESR of the supercap is 20 ohms, $$Vcap = 3.7 + (.25)(20)$$ and $$Vcap = 8.7$$ In this case you would definitely need to find a different supercap. |
H: Most efficient two-way switch relay and/or schottky (or..)
Scenario: On my old military Land Rover I have a three-way pole switch which turns the pilot and tail lights on (top position), or also turns on the headlights (bottom position).
Top: Pilot and rear lights ON
Middle: All lights OFF (unconnected terminal)
Bottom: Side and rear lights + Headlights ON
The challenge is:
to use as little relays as possible (ideally only one) due to space constraints. My fuse/relay-box is already too full.
headlights must be powered through a relay (currently they are wired through the switch, which is a known problem on older Land Rovers (burnt out switches, poor lighting)
pilot lights may be powered directly (i think -- they take 8 watts max alltogether)
I have a tried a Schottky diode as it seemed to provide a solution for having power flow in only one way, but when I'm measuring I detect that voltage does leak in the wrong direction (???). I use the SB550 5A 50V Schottky diode and placed it between the terminals on the switch itself (not as depicted below after the relay, but I don't think that matters).
So, this is what I got so far (the connector on the image leads to the lights):
I am not that experienced with circuits, I hope someone here can review my schematics and provide some ideas or feedback on how to improve on it.
Soo many thanks!
AI: You must reverse the diode and remove the wire from the cathode of the diode to relay (30), as shown below, else you'll be turning on the headlights through the diode with the switch in the "SIDE ONLY" position.
Also, since the current into cold incandescent lamps is about ten times the current when they're hot, take care that you use a Schottky which can handle that high current for a few hundred milliseconds. A vanilla silicon diode will work OK too, (and you'll get less leakage) since it'll only be dropping a couple of hundred millivolts more than the Schottky, which won't make much of an impact on the brightness of the side and tail lights, methinks. |
H: Transistor saturation
I am trying to saturate a transistor , a BC547 A , but I am having a hard time figuring out something.What hFE should I use to compute the base and collector current to make it turn on fully?
Here is the datasheet
AI: Use an Hfe of 10 and you'll always saturate the transistor as long as the collector current isn't high enough to drive the transistor's raw Hfe to below 10.
Study figures 3 and 4 on the data sheet. |
H: 2N3055 Power Supply
Could someone explain how this circuit works and how the output is maintained at 12V?
schemstic http://www.radanpro.com/Radan2400/Napajanje/7812+2N3055.jpg
There is very little information on how the circuit works online. I know the 12V output from the 7812 is used to bias the power transistor, but how is the voltage at the emitter held at 12V too? Any help with this would be greatly appreciated.
AI: In fact, the output is not held at exactly 12 volts. If the 7812 output is at 12 volts, then depending on the current levels at the load the output voltage will be less than 12 volts, and possibly a good deal less.
EDIT - As Russell McMahon pointed out, I was ignoring the diode in the linked circuit. I was also ignoring the fact that 7812s have a nominal output in the range of 11.4 to 12.6 volts. Combining the two suggests that the base voltage will be in the range of 12.1 to 13.3 volts. Apply this as appropriate to the following. In effect, the added diode is intended to compensate for the transistor base-emitter voltage drop. And it does, but not very well. END EDIT
With the base held at 12 volts, the voltage drop of the base-emitter junction will determine the exact output voltage. Since this is a silicon transistor, the usual number is a voltage drop of ~0.7 volts. However, that number really only applies at currents around 1 to 10 mA. For 3 amps you should expect a voltage drop in the range of 1.5 to 1.6 volts. The base current supplied by the 7812 will be multiplied by the gain ($h_fe$ or $\Beta$) of the 3055, so the 7812 does not have to provide an enormous amount of current, although at maximum current the gain will drop, so you might expect a gain of 20 or so, for a base current requirement from the 7812 of 150 mA.
For an open circuit (no load), you can expect about 12 volts from this circuit. At 3 amps, something in the vicinity of 10.5 volts, or maybe a bit lower. This is not a very good circuit (but it is simple and cheap).
The other thing you need to watch out for is power dissipation. At full output and a 24 volt supply, The 2N3055 will be dropping about 13-14 volts, and will be carrying most of the current (at least 95%). So the power dissipated will be about 3 amps times 14 volts, or roughly 40 watts. If you build this, you must provide a fairly beefy heat sink for the transistor. Also note that, due to the low gain at high currents, the 7812 will dissipate significant power. To provide 150 mA of base current at a supply voltage will dissipate .15 amps times 12 volts, or 1.8 watts. This is more than a bare 7812 can handle without going into thermal shutdown, so you will also need a heatsink here as well, although not nearly as big as on the 3055. |
H: I2C - addressing
In the i2c protocol, I would like to know how the slave & master address are assigned. Most of the internet doc talk about how the protocol work, but i wasn't able to find doc about i2c slave & master addressing.
For instance, I want to communicate between my tm4c129 LP and a SparkFun light sensor datasheet. In the tivaware datasheet ( TI drivers), they set the master address as 0x3B.
Could I set an other legal address for that master device?
Same goes for the light sensor, the datasheet refer the device address has either 0x39 , 0x29 or 0x49? Can i change the slave address or it is build in the IC of the PCB?
AI: The I2C address is set within the chip itself. There may be pins exposed to select an alternate address within a range, but there is no way to give it a completely different range short of reimplementing it from scratch. |
H: How Can i Protect my Oscilloscope from high voltages?
I made an oscilloscope with AT90USB series(activated ADC in micro and send data to my own program in PC via USB).I dont need more than 0-5v but you can never tell.I know I can mislead higher voltages with diodes but what if I want to reduce the every high voltages to 0-5v?
Can I set AREF pin to negative voltages?
AI: Since your ADC is quite slow, you can probably provide a protection circuit without much difficulty. Something like
simulate this circuit – Schematic created using CircuitLab
In the event of an overvoltage, the diode will steer the current into the power supply or ground, while the resistor will limit the value of the current. For instance, if you're using a 5 volt power supply, and apply 100 volts to the input, the total current flow will be about 10 mA, while the diodes (make sure you use Schottky) will limit the voltage at the input to the range of about -0.3 to 5.3. If the total load on the regulator is more than 10 mA, it will be able to compensate for the current excursions.
There will (possibly) be a slight bandwidth reduction caused by the R1/ADC input capacitance acting as a low-pass filter, and the ATMEL data sheet does not seem to provide any information about input characteristics along this line. However, with a maximum conversion rate of 15 kHz, this seems unlikely to be a problem. |
H: Why doesn't the depletion zone cover the entire diode?
When you form a PN junction you're basically closing a circuit so why don't the free electrons in the N and the holes in the P diffuse completely as they would in any other circuit?
AI: Your first pictures show only the 'free moving' things: both parts are electrically neutral: they contain an amount of kernels (with a lot of layer-layer electrons) that compensate the free moving parts. The electrostatic force forces the free moving thingies and their kernels together. (But the kernels can't move, so its the free moving thingies that are more or less bound to their location.)
But in the boundary layer the free moving thingies have to move only a very small distance to annul each other, so that is what happens: a small region where the attraction of the freem moving thingies overcome them being attracted to their 'homes'.
These homes can't move, so the missing free moving thingies leave a small region on each side of the boundary that is charged and is lacking any free moving thingies (hence: an isolator).
"Why do they stop diffusing"? Because they are attracted ('bound') by the atom kernels they originated from. |
H: Find charge per unit length of conductors
Sorry if off-topic but I have a question in electrostatics. I didn't get any usefull answer at physics forums. The problem states:
Three very long (theoretically infinite long) hollow cylindrical conductors, with radius a,b,c,(c>b>a) are in vacuum. Inner and central conductor are charged, and outer conductor is grounded. Potentials of inner and central conductors with reference point relative to outer conductor are Va,Vb. Find charge per unit length of all three conductors.
I used Gauss's law to find electric field of one cylindrical conductor, which is $$E=\frac{\lambda}{2\pi r \epsilon_0}$$ Derivation of Va gives $$V_a=\int_a^b \frac{\lambda_a}{2\pi r \epsilon_0}dr+\int_b^c \frac{\lambda_a}{2\pi r \epsilon_0}dr=\frac{\lambda_a}{2\pi \epsilon_0}\left(ln\frac{b}{a}+ln\frac{c}{b}\right)$$ Derivation of Vb gives $$V_b=\int_b^c \frac{\lambda_b}{2\pi \epsilon_0 r}dr=\frac{\lambda_b}{2\pi\epsilon_0}ln\frac{c}{b}$$ Now, charges per unit length for first two conductors are $$\lambda_a=\frac{2\pi\epsilon_0 V_a}{ln\frac{b}{a}+ln\frac{c}{b}}$$ $$\lambda_b=\frac{2\pi\epsilon_0 V_b}{ln\frac{c}{b}}$$ Using superposition, charge per unit length of third conductor is $$\lambda_c=\lambda_a+\lambda_b$$ Could someone check if this is correct? I am not sure if the limits of integration for potentials are right.
Thanks for replies.
AI: This is a nice question...
Let's start with your last statement. It must be
$$\lambda_c=-(\lambda_a+\lambda_b)$$
because cylinder C has to cancel out the charges of cylinders A and B.
Now, think about the fields generated by the three charges. It looks like this:
Remember, that the charge on a conducting, hollow body does not generate any E-field inside.
But the E-field of a charge inside a hollow body does not end at the surface, it expands to infinity.
This also is a result of Gauß' law, as it simply says that field times (closed) surface is charge inside that surface.
The superposition of all fields is the grey curve, and now you see that
$$V_b=\int_b^c\frac{(\lambda_a+\lambda_b)}{2\pi\varepsilon_0r}\,dr$$
and
$$V_a=\int_a^b\frac{\lambda_a}{2\pi\varepsilon_0r}\,dr+V_b$$
With given potential(difference)s, you can calculate \$\lambda_a\$ and \$\lambda_b\$. |
H: What does a capacitor “Series” signifies?
I am an electronics beginner trying to shop online for capacitors but so far I am failing miserably.
My biggest question right now has to do with capacitor series. Below is a list of a couple of capacitor series categories in case I am not being clear on what I am talking about:
125L Series
2C20 Series
2C25 Series
A Series
Aximax Series
C052C Series
C315 Series
C322 Series
TCD Series
WKO Series
Below is the link to the page that contains the capacitor series. The capacitor series are listed under a filtering table column named "Product Range".
http://www.newark.com/webapp/wcs/stores/servlet/Search?st=ceramic+capacitor&catalogId=15003&categoryId=800000009504&langId=-1&storeId=10194
I would like to know if someone could tell me what role does the capacitor series plays when choosing a capacitor. So far, it looks to me like capacitor series is just a form factor but I have a feeling is more than that.
Also, if it’s ok, could someone tell me what series capacitor should I be looking at if the use that I have for the capacitors is just for beginner projects?
Thanks.
AI: The series is the manufacturer's product family. The products in a series will have something in common, like a target application or package type, and will often share a datasheet. For example, if you select the Ceralam MR series on the Newark page, you'll find about 50 ceramic through-hole capacitors made by AVX. Here's the datasheet for the whole series. A series datasheet describes the whole product line. It should tell you how to construct a part number for a specific capacitor. Here's how the Ceralam MR datasheet does that:
The next several pages give the package dimensions for the different styles and list which capacitance values are available in each style. Finally, there's some mechanical information that's used in mass production systems.
For beginner/hobbyist purposes, I recommend ignoring the series. First, narrow down the results based on the main parameters (capacitance, voltage, etc.), then look at the package and size, then look at the price. If you still have a lot of options, pick whichever datasheet is your favorite. :-)
The best parameter to start with is actually package, on the far right. Since you're buying in small quantities, you only want things like cut tape, bulk, and tube packaging. Tape and reel is for when you want to buy thousands of units at once. This knocks out a lot of duplicate part numbers from your list. |
H: LT-Spice RL circuit simulation ill behaved current
I am trying to simulate a RL circuit in DC with LT-spice as follows:
NOTE that the inductance is 0.0229 H although in the picture you see 229
Now, according to my calculation, what I would expect is that, because of the inductor, the current needs some time, say 4.4 tau to be close to the theoretical value of V/R = 1.497 A.
Below you can find the data of the circuit:
Inductance (H): 0.0229
Resistance (Ohm): 3.34
DC voltage (V): 5
Current (A): 1.4970059880239521
Tau: 0.006856287425149701
Critical time (s): 0.03016766467065869
Now, when I simulate the circuit in LT-spice, this is not what happens, the current jumps up to 1.497 immediately, not showing the exponential behaviour it should have in a circuit like this. What am I doing wrong I checked and doublechecked but I cannot find out what I am missing! As you can see with LT-spice I looked very close to t=0 to check whether I was missing out on the timescale, but the current behaviour is not exponential at t = 0 + dt either!
From my calculation, the theoretical behaviour before 0.03s should be the following:
AI: You need to start the transient analysis at zero volts, else it will start at a steady state of 5VDC with the current already flowing.
Add the keyword 'startup' to the .tran string, or tick the box 'Start external DC supply voltages at 0V:' in the simulation command panel. |
H: Why use an antistatic solvent dispenser bottle?
What reasons are there to have an antistatic solvent dispenser bottle (for cleaning your PCBs after soldering) as opposed to a solvent dispenser bottle that is not antistatic rated? I am specifically asking about the kind of bottles that have a stainless steel dispenser, such as the R&R Lotion bottles seen here: http://rrlotion.com/product/anti-splash-pump-solvent-dispensers-esd/
I have found several standards that suggest keeping anything that is not ESD safe at least 12 inches away from your ESD sensitive items, which is a good rule, but are there any other reasons why a dispenser bottle should be antistatic? Is there a reason why I shouldn’t purchase a solvent dispenser bottle that is not ESD safe and keep it further than 12 inches away from my ESD sensitive things?
AI: Generally speaking ESD protection is a bigger concern in larger scale manufacturing and production setting than it is for the homebrewer or r&d engineer.
The can specifically can pick electrostatic charge from you as you are moving around the house/shop and can store that charge as a weak capacitor at high potential. Your concerns about 12" is a general recommendation about keeping potential ESD sources away from sensitive electronics.
It is also quite likely that the manufacturer of the "non-ESD safe" version of the product container simply never bothered to go through ESD-safety verification or simply wishes to create a more expensive product for customers that require that validation.
If you are working at home or in a small lab it is very likely that you will have no problems using either product and ESD may not even register as a concern. At the very least you could test the product in house quickly and be confident that its ok to you. On the other side of the coing in a manufacturing setting a technician may be running around to multiple stations and working with a much higher volume of devices that purchasing verified ESD safe products becomes a valid business concern.
To specifically answer your question, if ESD is a concern to you, you will be safer as a general rule keeping non-esd rated items 12" away from the device or have a system to bleed charge. Keeping a solvent can on a grounded ESD pad will probably be enough verification for me personally . After all, a person is the biggest ESD danger in the room and you are comfortable handling the device after ESD precautions are taken. |
H: ATTiny 841 PWM at 450kHz
I have managed to output 500kHz PWM at 50% duty cycle on PA2 TOCC1 of ATTiny841.
DDRA = (1 << PA2);//PA2 pin as an output
TOCPMSA0 = (1 << TOCC1S0);//TOCC1 linkage
TOCPMCOE = (1 << TOCC1OE);//Enable PWM
TCCR1A = (1 << COM1A1) | (1 << WGM11);//Fast PWM 1110
TCCR1B = (1 << CS10) | (1 << WGM12) | (1 << WGM13);//Fast PWM 1110
ICR1 = 1;//Not sure how clock is calculated but this gives me 500kHz on scope
I would like now to generate a 450kHz PWM on that same pin. 444.44kHz = 8MHz/18 would be acceptable. How can I do that?
The datasheet of ATTiny 841 is available here: http://www.atmel.com/Images/Atmel-8495-8-bit-AVR-Microcontrollers-ATtiny441-ATtiny841_Datasheet.pdf
AI: First, either unprogram the CKDIV8 fuse or set the clock prescaler to /1 so that you're actually running at 8MHz instead of 1MHz. Then set ICR1 to 17 in order to get the timer to count 18 clock pulses per cycle. |
H: How do I design a through-hole pad in Altium Designer?
I want to define a custom component (TO92 temperature sensor) in Altium Designer with through-hole pads (0.7mm hole diameter, 1.27mm pitch). What is the right way to do this? I I created the schematics (all fine) and PCB library entries. I ran into the problem that I have no clue how to generate a pad with a hole in the PCB library, this is what I tried:
Approach 1 (using via):
Problem: Vias are not recognized as pads and therefore cannot be associated with a name/denominator resulting in vias not having a net in the final PCB document. I guess I cannot tell Altium "treat this via like a pad and give it a net"? Since it is not a pad, manually assigning is also no option via Design->Netlist->Edit nets
Approach 2 (using vias on top of pad)
Problems:
too big diameter of pad solder mask: It seems small pads are not possible when choosing Place->Pad since the pad is always huge, even when choosing a diameter of e.g. 0.1mm:
(note the tiny hole of 0.1mm in the center whereas the outer ring is still huge with over 1mm diameter).
unsure how to get hole: I put a via on top of a pad, this seems a pretty inelegant solution, what is the standard way to do this?
Thanks for any help/suggestions for directions!
Sebastian
AI: When you design your schematic component, assign Designators to the pins, e.g. A + B or 1 + 2, ....
In your PCB Library item (the one that is linked to your schematic symbol) use the Place -> Pad, select "Multi-Layer" as Layer, enter a hole size (.7mm) and a pad size (e.g 1.5x1.5mm) and you're done, name the two pads A + B (same name as in the schematic).
Now when you transfer your schematic design to your PCB, Altium will assign the appropriate nets to your pads. |
H: Are radio stations with higher frequency able to transmit higher quality audio?
e.g. a radio station at 100 mhz on FM vs a 50 mhz radio station. Wouldn't the latter have a lower bandwidth therefore lower quality audio/bit rate? If this is true, this must also mean that 2.4ghz router has less bandwidth capacity than a 5ghz router?
AI: There is no fundamental difference between 50 and 100 MHz in this respect.
Stereo FM signals have spectral components up to 57kHz (including RDS), modulated onto carriers with a peak deviation of 75 kHz, which effectively leads to a 200kHz channel spacing, and that would apply equally whether the carrier was 100MHz, 50 MHz, .... or 1 MHz.
The latter poses political difficulties, as it would impose a limit of 5 stations in the available space on the "Medium Wave" band (aka "AM" in the USA) or one station on the Long Wave band.
So the AM bands operate with a much closer channel spacing (9 kHz worldwide, except 10kHz mainly N. America), and it's this reduced channel spacing, not the carrier frequency, that restricts quality on the AM bands.
Likewise, if a 5GHz router offers higher bandwidth, it's because the channel allocated to it is wider than the (now rather crowded) 2.4 GHz band. |
H: How come 2 MOSFET chips are needed in protection circuits?
Like those here, the protection boards have at least 2 MOSFET chip (AO8814). Does anyone know why so many (4 fets) are needed?
AI: If the switches are connected in parallel (as indicated in one of the comments, ie the two SOURCES are linked via the PCB) it is for one of two reasons
Redundancy. If one FET can handle the current and FMEA calls for two... two in parallel double's the current capability - NOTE this is a dormant failure
Current capability. Two in parallel will permit more current
Two sets of paralleled FET's would imply a disconnect topology to isolate the +VE and the -VE from the supply |
H: Why do most of the non-volatile memories have logical 1 as the default state?
I have used non volatile memory, like EEPROM and FLASH memory, in embedded applications and I have always found that unused memory (EEPROM/FLASH) bit locations are always set to 1 by default. Why is this used instead of 0?
For example an address, say 0th address (first byte of memory), if not written to by the user, always stores 0xff and not 0x00. Why is it that people who built the memory chips kept it that way? I'm sure keeping the default memory location as 0xff would provide some advantage or something important for the manufacturer.
What is the reason behind this structure in memory chips?
AI: I am going to discuss flash memory programming, but a lot of material will be similar to EEPROMs (Electrically Erasable Programmable ROM), since flash memory was derived from EEPROMs in the mid 1980's. As described below, from a physical standpoint, the default state is 1's. But more importantly, I'm going to explain why there is a default state -- you can't just arbitrarily program on top of what is already programmed from last time.
NOR flash is almost always chosen for program flash since the interface is best suited for placing the data within the memory map of the microcontroller -- full address and data busses mimic RAM and allow random access to any location. Data can be read one word at a time, where a word is defined as the data width of the microcontroller, typically 8, 16, or 32-bits. NAND flash, on the other hand was developed to replace hard drives and works sequentially.
However programming gets a little more complicated. As already mentioned, the default state for NOR flash and other non-volatile memories like NAND flash, EEPROMs and even EPROMs is a logic 1. You cannot program 1's into these devices, you can only program 0's. So for example if you have a byte containing 0x0123 and you want to change it to 0x3210, you can't do so directly like writing over a byte in RAM.
Instead, bits in the memory must be erased, which puts them into the default 1 state already mentioned. This can only be done in blocks, not words. On the Microchip PIC32, which I have worked with the most lately, the minimum block size that can be erased is 4096 bytes. So if you wanted to change just one word (32-bits), you would have to read the 4K of memory, erase the block, then write the 4K of memory back to flash but including the new 32-bit value as needed. This erasing can take some time -- a good part of a second.
The following is a picture of a flash memory cell. Flash stores the data by removing or putting electrons on the floating gate. When electrons are present on the floating gate, no current flows through the transistor, indicating a 0. When electrons are removed from the floating gate, the transistor starts conducting, indicating a 1. (This is by convention -- it could have been the other way but would required inverters on all the data lines.)
Erase operation. The default state of flash memory cells (a single-level NOR flash cell) is 1 because floating gates carry no negative charges. Erasing a flash-memory cell (resetting to a 1) is achieved by applying a voltage across the source and control gate (word line). The voltage can be in the range of -9V to -12V. And also apply around 6V to the source. The electrons in the floating gate are pulled off and transferred to the source by quantum tunneling. In other words, electrons tunnel from the floating gate to the source and substrate.
Because erasing uses high voltages, so erasing in blocks requires less die area. So voltages can only be applied to entire rows of transistors at a time.
For writing, a NOR flash cell can be programmed, or set to a 0 by the following procedure. While writing, a high voltage of around 12V is applied to the control gate (word line). If a high voltage around 7V is applied to bit Line (drain terminal), a 0 is stored in the cell. The channel is now turned on, so electrons can flow from the source to the drain. The source-drain current is sufficiently high to cause some high-energy electrons to jump through the insulating layer onto the floating gate via a process called hot-electron injection.
For reading, a voltage of around 5V is applied to the control gate and around 1V to the drain. The state of the memory cell is distinguished by the current flowing between the drain and the source.
The useable life of non-volatile memory is measured in terms of erase cycles. The disadvantage of NOR is that the number of erase cycles is about 1/10 that of NAND memory. Many versions of the PIC32 only allow the flash memory to be updated 1000 times, way less then the typical 100,000 erase cycles for EEPROMs.
So it is not so important if the designers made the default state is 1 or 0 (they chose the value that permitted the easiest implementation); the important thing is that one has to erase a block of flash first (which takes time), and then reprogram the entire block (even if a single word is being changed (which requires a substantial amount of RAM).
This block erasing of the device goes back to the first EPROMs (Erasable Programmable ROM), which proceeded EEPROMs The code was programmed into chips (like the 16KB 27128) and placed in sockets. These chips had a little window on top which allowed light to shine on the die. When the program had to be changed, the chips were put into a UV eraser for 20 minutes or so, which would erase the entire chip. Then the chip would be programmed with the new program.
Some EEPROMs require erasing of blocks of memory before programming; others allow writing a byte at a time (the EEPROM controller actually erases the byte first and the programs it). |
H: Connector Selection Criteria
I have seen a friend place an RJ45 connector at the output of RS232Mux on a board he developed and then make another PCB with RJ45 connector and 3 RJ11 connectors so that muxed connection can be connected to respective devices.
I wonder what is the criteria for selection of a particular connector for a particular purpose?
Rephrasing the Question to meet the standards of StackExchange:
I have a PCB which has RS232 Mux. I have another PCB with RJ11 connectors for devices where the muxed outputs will go. Which connector/cable arrangements should I choose to connect the first PCB to the Second PCB.
what are the criteria should I consider for the selection?
AI: This is a very broad question, as the reasons are as numerous as the number of connectors out there.
Here are some of the most important points to consider when choosing a connector system. The last point may be the reason for your friends decision for RJ45.
Electric properties
High voltage
HV may require connectors with special insulation. It's also possible that the user should be protected from touching the contacts.
On the other side, tiny voltages may need some shielding against interference, not only for the cable, but also for the connector.
Maximum Current
High currents need large contacts and sometimes, you also need a very low contact resistance.
Note also that the contacts of the common SubD connector can be made of thin sheets of metal capable of some 100mA, but can also be made of massive, machined metal rated for 2A.
High Frequency
Connectors must not only match the shape of the cables, but also often its electrical characteristics like shielding and impedance.
Hot-plugging / plug detection
Have a look at USB or SATA cables. Some contacts are longer than others, so they will connect as first / disconnect as last. Plugs for audio jacks often contain a switch to detect a plugged in jack.
Mechanic properties
Number of contacts
Size
Tiny devices need tiny connectors. I worked on a project where we were happy to find an inter-PCB connector of 0.8mm height.
Type of assembly
Is the connector soldered / crimed / screwed / connected to an other connector?
Contact durability
There are connectors specified for 10 plug/pull cycles only, which are used inside devices and usually plugged only once, during production. For an audio jack, you definitely want more.
Durability
Sometimes, you need more heavy-duty like connectors. Some connectors need to be water tight, others should not disconnect e.g. due to vibrations.
Uniqueness
If you design a device with ten different cables being connected to, use ten different connectors, if possible. This makes it impossible to connect the device the wrong way. USB uses different connectors on both sides, because one side is connected to a host (PC), and the other to a client (Device). However, with USB-on-the-go this principle has been weakened.
Choice of material
The connector may have to withstand high / low temperatures, chemicals, may not contain materials becoming toxic when burning, and so on. I worked on projects with high magnetic fields, where connectors had to be non-magnetic (iron/nickel-free).
Economic reasons
Easier / faster assembly
The price for a custom connector may be worth a faster assembly of your product, if the quantity is high enough.
Customers loyalty
Dell uses a special connector for their laptop power cords, and there are not many third-party manufacturers of power supplies with that connectors. So, people buy Dell's genuine devices. (though this situation has relaxed somewhat). There is that cool company producing computers and mobiles. They make heavy use of custom connectors, so consumers have to buy at least a bunch of adaptors to use any kind of peripherals...
Synergy effects
Sometimes, there already is a well established mass marked of a connector / cable system, making it exceptionally cheap.
You mentioned RJ45. You can get connectors and cables of any length nearly for free, and the electric properties are quite good. Current is limited, but you get a handy, thin cable with four twisted pairs, may be shielded with a quite good impedance. Remember, computers transfer up to 1GBit/s through that cables. So yes, why not use it for other digital communication stuff?
Another example: In an experiment, we needed a bandwidth of several Gigabit/s. They used HDMI, because cables, connectors and transmitter/receiver modules were already available. Don't ask for the details, but HDMI, made for video transmission, had some benefits, so we use it to read out detectors in high energy physics. |
H: Drop Voltage using Resistor: is it practical?
I should probably say that this a basic question, I don't know much about this stuff, please don't be too hard on me.
Ok so I kind of thought it would be fun if I could light up 12V halogen lamps using 220V power supply, so I did a few calculations:
The bulb is rated at 60W, so according to P=VI, it should draw 5A current. Now since the input voltage is 220V and I need 12V, the voltage drop across the resistor will have to be 220-12=208V. The bulb draws 5A current so according to R=V/I, so I would need a 41.6 Ohm resistor, say approx. 40 Ohm.
I wanted to ask if my calculations are correct and if it is indeed safe and practical to drop voltage using resistors. I would also like some details on what kind of resistor I should use. Thanks.
AI: Your calculation is correct, however you also have to consider the power rating of the resistor.
Power is \$I^2 \cdot R\$ which is 1040W. That's a physically huge and expensive resistor and your circuit would be wasting 95% of the energy that you put in before it even gets to the bulb.
Here's a typical resistor style capable of that level of power dissipation:
It's 300mm long, 60mm in diameter and costs more than $40 US.
Would it ever make sense? Possibly- if you needed a 1kW heater for some reason as well as the lamp then it could conceivably.
Another consideration is that the socket of the halogen lamp may not be designed to keep fingers away from the supply. No big deal with 12V- it's pretty hard to electrocute a human with 12V, but 220V mains could be lethal. Most approaches to supplying low voltage lamps provide galvanic isolation which protects the user.
A better choice would be a 220:12 transformer or an 'electronic transformer' which uses switching power supply techniques to reduce the voltage.
Electronic transformer:
For a hobbyist, an old PC power supply could provide regulated 12V at 5A without breaking a sweat and it should be completely safe. See articles on the internet on how to get it to turn on (you may have add a dummy load). It provides DC rather than AC, however halogen bulbs of that voltage and power don't care much- the life may be slightly reduced on DC. |
H: How to replace a SMD capacitor on a raspberry pi?
(Note: also posted first in raspberrypi stackexchange, but not a single answer yet)
While desoldering the GPIO, I accidentally broke the capacitor C13 of my raspberry pi model B (2011.12 Rev7).
It is the capacitor between RG3 and the GPIO pins.
Looking up the schematics, it appears this cap is a 10nF cap connected on the 2V5 line to ground, parallel with C15, which is a 10µF. So it looks like this is a decoupling capacitor, but why the low value ?
I spent about two hours searching for a similar cap in various salvaged components. I finally found one on an HP dv6000 internal wifi board. (I had to check every value I desoldered, one by one, kinda tedious).
I did not solder it back yet, but i'll soon do.
I also did not tried powering my pi with the cap missing.
I wanted to know if there was any way to know that everything was back into order. What is the exact purpose of that cap, and how can I test that I soldered it correctly ?
Also, do you have some advice about how to solder it ? That piece is about half a millimeter long, maybe less than that. I got tweezers and head-mounted magnifying glasses, but I feel like I'm going to struggle a bit, especially because I only have 1mm thick solder.
AI: As you wrote, this is a decoupling capacitor. When the current demand of a device increases suddenly, the power supply circuit may not be able to fulfil it immediately, e.g. due to the inductance of the traces.
Decoupling capacitors just jump in, until the higher current is delivered by the supply.
But real capacitors are not ideal capacitors. They also have a resistance and inductance. This may cause similar problems as for the supply. As larger capacitors have a higher inductance, the solution is to use a large and a small capacitor. The smaller reacts faster, the larger endures longer. 100nF and 10nF are very typical values.
But it's not absolutely necessary that you solder a new cap of exactly that value, 8nF, 22nF or 33nF would do the job, too, (also remember, many caps have a precision of just 10-20%). Also, it's possible that you don't need that cap to run the Pi.
If you only have 1mm solder, just put some (not too much) solder on the pads of the PCB, add some flux, hold the cap onto the pads with tweezers, and solder it with a fine tip, without additional solder.
If the cap is tiny, there is a chance that you produced a short circuit. You should test the resistance, it should not be almost zero. It's also possible that there is no electrical connection, but as said, it's possible you will not notice that.
But also note that soldering is thermal and mechanical stress for tiny components, especially when removing them. This may also damage your robbed caps, I woud always recommend to use fresh components. |
H: Sign of current through a voltage source
simulate this circuit – Schematic created using CircuitLab
I am a total newbie to circuits, so please forgive my naivety. My question is the following:
When I simulate the above circuit in LTspice, the current across the voltage source is shown to be negative (-.05). That means in this case they mark the current coming out of the the positive terminal of the battery as negative. Is that just a convention or is there some logic behind it? If it's a convention, is that the general standard?
AI: A 'positive' current is defined as flow from a higher potential to lower potential. You should see that for the resistor in your simulator. Within the voltage source however, the current flows from the negative terminal (lower potential) towards positive terminal (higher potential). Hence the negative sign. |
H: tube amp power transformer
I am trying to build a 18w amplifier based on this schematic
however my power transformer doesn't have a center tap on the secondary winding
Is it possible to use this power transformer for this project?
I also tried it using a solid state rectifier (the one with 4 pins: - AC AC +) connecting the ac to the transformer the (-) to ground and the (+) to the standby switch (please see the schema), although I could measure the correct voltage on the (+), there was no current going on the grids of the tubes, not even on the filtering capacitors.
or maybe the problem is somewhere else in the circuit?
appreciate your help
AI: That is not a schematic.
Yes, you can use it, with a full-wave bridge rectifier. Instead of grounding the (nonexistent) center tap of the transformer you ground the minus side of the bridge rectifier.
Similarly one side of the filament should be grounded rather than the (nonexistent) filament winding centre tap.
simulate this circuit – Schematic created using CircuitLab
Be extremely careful and don't electrocute yourself. |
H: Altium: PCB ground plane and routing
OK so I've been asking around and reading how to connect ground pins to ground. Some said create vias to the ground planes. But should I do that for every pin? Because sometimes when I create via to each component then route their connection on the ground plane, the net line doesn't disappear all the time.
Then other sources say create polygon pours after the connection is done. Sounds fine.
Honestly I'm a bit confused, can anyone just clarify how to route ground connections? I have tried connecting initially but I feel that something is not right about it.
Note that the ground pins of each of the boxes are connected
AI: Some said create vias to the ground planes. But should I do that for every pin?
Through-hole pads don't need another via --- they already extend through the board to all layers.
For SMT, one via per pad is a starting point. Each component probably has its own current draw so you want to have enough vias to accomodate that. But you might find cases where it's not needed. For example, a bypass capacitor next and the power pin for an IC placed near each other probably can share one via.
Because sometimes when I create via to each component then route their connection on the ground plane, the net line doesn't disappear all the time.
Generally I hide the ratsnest lines for power and ground pins during the initial part of the design. Then they don't clutter things up while you're routing the signals. Once signals are routed, turn the power and ground net ratsnest back on. As you connect each pad to the planes, you should see one netline disappear. It might not be the one you expect, but by the time you connect all the pads to the planes, they should all be gone.
Then other sources say create polygon pours after the connection is done.
Altium distinguishes polygon pours from plane layers.
Polygons are positive features on positive (signal) layers, that fill large (or small) areas.
Plane layers are negative layers where copper is present on the entire surface, except where features are defined. If you make a polygon on a plane layer, you will produce a region with no copper, not a region with copper.
Making polygons last is mainly a convenience: Redrawing polygons can take a long time, and you don't want to be waiting for it to happen all the time during your design, so you draw your polygons last to avoid that inconvenience during most of the design process. |
H: calculate unknown source potential
In order to prepare for an exam in electro technics I have a specific task:
I have the following measurements of an unknown circuit:
\$(1)\quad U_{2(1)} = 4.28V \quad @ I_{(1)}=0.67A \$
\$(2)\quad U_{2(2)} = 1.38V \quad @ I_{(1)}=4.91A \$
Now I have to calculate the internal resistance.
The formula therefor is either \$ R_i = \dfrac{\Delta U}{\Delta I}\$ or \$R_i = \dfrac{U_s}{I_c}\$
where \$U_s\$ is the source potential and \$I_c\$ the short-circuit current.
I don't want to use the delta formula because I need the other two values in a later task anyway.
How do I calculate the source potential just having the both values?
AI: I don't want to use the delta formula ...
That's unfortunate because that's the formula to use.
\${{4.28\text{V}-1.38\text{V}}\over{4.91\text{A}-0.67\text{A}}} \approx 684 \text{m}\Omega\$
\$4.28\text{V}+0.67\text{A}\cdot684\text{m}\Omega\approx4.74 V\$
\$1.38\text{V}+4.91\text{A}\cdot684\text{m}\Omega\approx4.74 V\$ |
H: Is there a reason for the shape surge arrests have?
Why do surge arrest typically looks like this ?
I found one of the reason is to prevent ingress of water by using slippery rubber material but it does not explain the reason for the shape of the surge arrest.
AI: It is to increase the length of the surface path from one side to another. The surface is more conductive and has lower spark voltage than the middle of a material (because it can be coated with dust etc). The discs are there to make the surface path longer without increasing the length of the surge arrestor. |
H: LiPO reverse polarity protection with PFET & charger
I am trying to use a PFET to protect my circuit against reverse polarity like such:
Now I would like to add a LiPo charger to this circuit. Can I just add it after the PFET (@+Vbatprotected)? Will the charge current be able to flow "backwards" through the PFET?
AI: No you can't just attach the charger to +Vbatprotected. The whole point of that PFET (with it's gate hooked to GND) is to effectively operate as a diode, but without the pesky downside of a 0.7V drop (i.e. because it has a low drain-source resistance when it's in saturation).
Even if that wasn't the case, I wouldn't count on a PFET to handle charging current which can be quite high. Just hook your charger to +VBAT directly. |
H: Transformer temperature rating
I'm building a power monitor (so I get notifications if the power is lost in one of the inputs). To monitor it safely, I used these 220/12 0.35VA transformers (http://www.hahn-trafo.com/english/pcb-transformers-bv20.php), I have them in a row one next to another. The transformers each are connected like this:
simulate this circuit – Schematic created using CircuitLab
The LED is for indication and the optocoupler is for connecting to Raspberry Pi.
The transformer is rated for 29mA and the actual load is lower (but not by much).
The transformers get quite hot (sticking a temperature probe between two transformers I get 70C). The manufacturers website says that the transformer is rated for "ta 70C/B". Am I still OK or do I need to add a fan?
EDIT: I connected both LEDs in series with total 2K series resistance. The temperature dropped to 58C.
EDIT2: Connected a 390R resistor in series with the diode (the PSU designer software showed that it would reduce the peak current), didn't help. Probably the 1.2W no-load dissipation as specified by the manufacturer adds quite a lot to the temperature. Added a fan to circuate the air (this is in a 1U case). Hopefully it will reduce the tempaerature.
What is a "normal temperature" for a transformer? I know that some bigger transformers get quite hot when working at specified load (no rectifier, just transformer and vacuum tube heater), don't know about the little ones - I do not have a lot of experience with very low power devices such as this.
EDIT3: With a fan the temperature is ~43C on the transformer that is furthest away from the fan. Is that considered good enough? The 58C with no fan looks to me too high, but should be below the 70C spec for the transformer (in case the fan fails).
AI: Small transformers like this often run hotter than one might hope, it is a economising symptom. Operating them at 70 degC will cause long term reliability issues with nearby solder joints. A fan that is not monitored in some way is also a long term reliability issue. If you have space then also spread the transformers a bit apart if you can to help with cooling. Place holes in the PCB between the transformers to allow air convection.
I would suggest you use the lowest voltage output version to get the largest secondary current rating.
I would suggest that you use the largest primary voltage to get the least core losses at your rated mains voltage.
You waste half of the transformer secondary current rating by using a halfwave rectifier. Using the centre tapped secondary lets you get fullwave with two diodes or using a full bridge does the same with the single secondary.
I would use the 400V input transformer BV 202 0172 with the centre tapped 9V secondary. You should get about 4.4V on the capacitor with two diodes, with your indicator LED and OPTO in series you might not need much of a resistor, if the current limiting and voltage regulation with a small resistor value are a bit hard to characterise across part tolerances then the 12V secondary might be the way to go if the 6V secondary has enough voltage it would have the thickest secondary winding and current rating. You should be able to get a good OPTO signal with 2 to 20mA current Design for 10mA and you should be pretty safe with any of them.
The small value peak current limiting resistor will not have much effect on temperature in your transformer.
EDIT:
If you are stuck with that model of transformer you might be able to move some of the heat out of the transformer with a series resistor on the input side if you can prevent it saturating the core (keep the magnetising function linear) the iron losses will be reduced.
Using the fullwave bridge, as shown, and series connecting the LED and OPTO and reducing the current as much as possible will all help with reducing the copper losses. |
H: What happens if we give a command to LCD to print something without clearing the initial data it is displaying? Does it overwrite the previous data?
I've just started with embedded systems. Although, lcd should be cleared to print new values, but I read a code which was working even without clearing lcd.
EDIT: The LCD is based on JHD162A
AI: Please indicate display controller type, a popular one is the HD44780 which is compatible with a JHD162J.
Some displays can be set to scroll text, or wrap around an internal frame buffer, on small displays the frame buffer may not be fully displayed and your new text may be hidden. Setting the cursor to home and resetting the data address are recommended if you want to recover from display overflows in practice without clearing the display, however clearing the display is not required if you update fast you cannot even see the blank interval just write enough spaces to clear the rest of the display from what was there before. |
H: Is it normal that a clock divider made with ring johnson counter has output Undefined if clk starts high?
I'm making a frequency divider and the easiest way is to use a johnon's counter with D flip flop. The point is that if I make the clk start high, the counter has undefined output, while if I make the clk start low, it all should be ok.
Code of ring johnson's counter ("divide_by is unusued at the moment"):
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity double_period is
port(
clk : in std_logic;
--i 3 bit seguenti rappresentano 8 stati (stato 0 : divisione frequenza per 2, stato 1: divione per 4, stato 3 : divione per 6, etc...)
divide_by : in std_logic_vector(2 downto 0);
out_clk : out std_logic
);
end double_period;
architecture double_period_behaviour of double_period is
signal filoFlottante : std_logic;
component ffd is
port(
clk : in std_logic;
din : in std_logic;
dout : out std_logic
);
end component;
signal dInternal : std_logic_vector(8 downto 0);
signal dFirst : std_logic;
begin
dFirst <= not(dInternal(2));
f0 : ffd port map(clk, dFirst, dInternal(0));
f1 : ffd port map(clk, dInternal(0), dInternal(1));
f2 : ffd port map(clk, dInternal(1), dInternal(2));
--f3 : ffd port map(clk, dInternal(2), dInternal(3));
--f4 : ffd port map(clk, dInternal(3), dInternal(4));
--f5 : ffd port map(clk, dInternal(4), dInternal(5));
--f6 : ffd port map(clk, dInternal(5), dInternal(6));
--f7 : ffd port map(clk, dInternal(6), dInternal(7));
--f8 : ffd port map(clk, dInternal(7), dInternal(8));
out_clk <= dInternal(0);
end double_period_behaviour;
D FLIP FLOP CODE:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity ffd is
port(
clk : in std_logic;
din : in std_logic;
dout : out std_logic
);
end ffd;
architecture ffd_behaviour of ffd is
begin
process(clk)
variable qvar : std_logic := '0';
begin
if clk'event and clk='1' then
qvar := din;
end if;
dout <= qvar;
end process;
end ffd_behaviour;
The following is the TESTBENCH:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity double_periodTB is
end double_periodTB;
architecture double_periodTB_behaviour of double_periodTB is
component double_period is
port(
clk : in std_logic;
divide_by : in std_logic_vector(2 downto 0);
out_clk : out std_logic
);
end component;
signal clk : std_logic;
signal out_clk : std_logic;
signal divide_by : std_logic_vector(2 downto 0);
begin
process
begin
clk <= '1'; wait for 10 ns;
clk <= '0'; wait for 10 ns;
end process;
process
begin
divide_by(0) <= '0'; wait for 10 ns;
divide_by(0) <= '0'; wait for 10 ns;
end process;
process
begin
divide_by(1) <= '0'; wait for 10 ns;
divide_by(1) <= '0'; wait for 10 ns;
end process;
process
begin
divide_by(2) <= '0'; wait for 10 ns;
divide_by(2) <= '0'; wait for 10 ns;
end process;
sg : double_period port map(clk, divide_by, out_clk);
end double_periodTB_behaviour;
"DIVIDE_BY" IS UNUSUED AT THE MOMENT!!!!
AI: Is it normal that a clock divider made with ring johnson counter has output Undefined if clk starts high?
The short answer is Yes.
You get an event on clk assigning an initial value of '1', satisfying the if condition, assigning the value of din to qvar.
In the case of your three flip flops f0, f1 and f2 the din ports are association with either dInternal elements or the not expression of dInternal(2) using the intermediary signal dFirst.
If you were to display delta cycles in your waveform you'd see that the cause of your problem is that the assignment to dFirst occurs one delta cycle later.
For those of us who can't display delta cycles we can see that dFirst (not dInternal(2)) propagated a 'U' into the state of dbInternal because of the delta cycle delay:
(clickable)
Once in that 'U' recirculates.
You can correct the problem by using the rising_edge function found in package std_logic_1164 in your flip flop model:
library ieee;
use ieee.std_logic_1164.all;
entity ffd is
port (
clk: in std_logic;
din: in std_logic;
dout: out std_logic
);
end entity ffd;
architecture foo of ffd is
begin
process (clk)
variable qvar: std_logic := '0';
begin
if rising_edge(clk) then -- clk'event and clk = '1' then
qvar := din;
end if;
dout <= qvar;
end process;
end architecture;
The rising_edge function qualifies it's input with a call to function TO_01 and uses the 'LAST_VALUE attribute to determine there's actually a rising edge which means it won't trigger erroneously:
FUNCTION rising_edge (SIGNAL s : std_ulogic) RETURN BOOLEAN IS
BEGIN
RETURN (s'EVENT AND (To_X01(s) = '1') AND
(To_X01(s'LAST_VALUE) = '0'));
END;
This gives:
(clickable)
Just in case you were ever wondering why the rising_edge and falling_edge functions were included in package std_logic_1164, now you have a concrete example. |
H: How to wire circuit DC Motor with LED
I'm trying to learn a bit more about forward voltage and Ohm's law but I'm not sure how to wire this circuit.
I have:
One 4.5 DC motor (Operating Volts: 1.5- 4.5V, Nominal Volts: 4.5V, Current (no load): 0.25A)
Three 5mm LEDs (IF Typical (mA)20, IF Max Continuous (mA)50, VF Typical (V)2.1) -
One 3 - 12VDC Switchmode Plugpack (Output voltage: 3, 4.5, 5, 6, 7.5, 9, Output current: 1000mA (max))
Do I use the power at 4.5V and run the motor and the LEDs in parallel?
Do I need resistors on the LEDs?
AI: You can connect DC Motor and LED in parallel with the resistor in series with LED. LED can draw current about 24 mA (4.5 V - 2.1 V)/ (100 Ohms).
If resistor is not placed in series with it, The LED will eventually get over heated and gets destroyed. use a fly back diode in parallel with motor if it is unidirectional. If Power is set to 4.5 V, then using a 100 ohm resistor with LED is recommended.
simulate this circuit – Schematic created using CircuitLab
LED do not have a datasheet, so assuming typical Vf for calculation. |
H: Apparent power meaning
As far as i have read v(rms) is a dc value and i(rms) is also a dc value and apparent power is multiplication of both of them.so,can apparent power be represented as dc power absorbed by an ac circuit.am i guessing right?
AI: When you are considering any AC circuit, Power depends upon the phase difference(let's say it 'phi') between resistive & reactive components.
For DC you have studied P = V * I
But for AC power dissipated is given by P = e * i *cos(phi).
cos(phi) is called as power factor which decides how much power is actually dissipated.It depends upon the reactive(|XL-XC) & resistive() component of the circuit. Go through the link for how to find
phase difference or power factor.
since L(in the form of magnetic field) & C(in the form of electrical energy) are energy storing components. product of V & I will give you the apparent power but some fraction of energy will be stored in reactive components(L & C).Hence actual power dissipated will always be less than the apparent power.
more about Apparent power |
H: See my prototype electronic board w/connectors. Is it acceptable as a commercial product by Western standards?
Does this prototype meet a commercial standard for acceptability--knowing that it is a prototype? In other words, will my Western (USA) customer be upset when he sees it, or will it go by unnoticed as another purchased product?
This PCB board always receives a TTL signal when powered on, so no need for resistors (I believe).
A five volt DC power supply sends power to the capacitor and the capacitor to the ICs. The power cable comes in the DB15. The TTL signals (2 of them) come in the DB9. The output goes out the BNC.
The two ICs are side-by-side, is this too close?
The connector for the BNC uses two wires and the remainder were severed.
The plastic enclosure was purchased at the electronics market.
AI: The size of the box is limited by the connectors so it is a reasonable enclosure and layout for a splitter type box. Without more information about the circuit it would be hard to say anything else.
The spacing of TTL's is fine (if it works), if this is manufactured in quantity it is unlikely your client will spend the extra $.03 a unit for DIP sockets so the spacing between chips will actually improve. On the other hand TTL logic has been available in SMD sizes for decades and all that extra board space is a huge cost for a product like this manufactured in quantity so it entirely depends on what your client intends to do with the device with regards to the suitability of the circuit design. .
In terms of acceptability as a prototype see below for comments by category
Enclosure
In terms of a delivered product, it depends on what you are expected to present. For something with so few components I would spend more time making cleaner holes for the connectors to improve presentability of the enclosure. You may also want to consult your client about the type of cables being used. They may have hooded DB-15 connectors that would have trouble fitting in that opening, they may also have shielding/grounding requirements for case continuity between DB-15 sides. Additionally PCB mounted connectors that are roughly handled tend to break solder joints so physical screws may be necessary. This looks like an electrically simple device, the professionalism of your design is largely based on a clean look (good mechanical engineering) and a reliable (i.e. bombproof) assembly.
PCB
If this is a one off for a private client it is probably OK to leave on a protoboard (but check with them). If this is a something for a corporate client that needs 5+ copies or a bid for a bulk manufactured design the client will expect a PCB. I would have a PCB layout ready to replace the protoboard at the very least and ideally already fabricated. Generally speaking US companies and consumers will expect even small electrical jigs like this to be manufactured on PCB's.
Two layer pcb's in reasonable dimensions can be made quickly and shipped internationally, there are any number of PCB houses that can do this for you. Some will even provide you simple layout software with integrated cost calculators that is more than adequate for this application.
Overall
At the end of the day all of this depends on what the expectation of the client is at this stage. If this is a final prototype for a purchasing decision it is probably inadequate from a professional point of view, as an intermediate stage in development with a more relaxed professional relationship it may be fine. This is a prototype yes, but it does not demonstrate that you are ready to produce a final product tomorrow. In the US or otherwise I would expect any serious client to expect a final prototype for inspection to be close to or exactly the same as the delivered product (minus last input by client). |
H: PIC32 does not have Memory Managment Unit, why would a high end microcontroller not have such a peripheral
MMU is needed to run Linux and perhaps for other tasks related to OS. However, the PIC32 does not have one of these. Why would someone make a high end microcontroller and not include a MMU?
It may make sense for lower level PICs like PIC18F, PIC24 to not have MMU, but why did Microchip not put in an MMU into the PIC32 which is their high end processor?
AI: PIC32 does mot have Memory Management Unit ...
But it does.
The PIC32 uses the MIPS architecture, which normally is paired with an MMU. When Microchip designed the PIC32MX family, they left it off. The largest PIC32MX, in terms of memory, is the high-end PIC32MX795F512L which has 512KB of program flash and 128KB of RAM.
However the newer PIC32MZ family, introduced earlier this year, does have an MMU (or so the datasheet claims on the first page; I haven't used it yet).
The PIC32MZ2048ECM144, for example, has 2MB of program flash and 512KB of RAM. I'm pretty sure this is still not enough to run a real version of of Linux. In any case I'm guessing Microchip will continue to come out with new PIC32MZ versions with increasingly larger memory spaces. Ideally, they might come out with a PIC32 that has an external memory interface (appearing in the memory map as regular memory, not a peripheral). PIC32s already can run code out of either flash or RAM.
A while back I saw a job listing from Microchip for a Linux drivers engineer. Hmm. |
H: IC Thermal shutdown recovery time
Many RS485 transceiver chips have a thermal shutdown when the junction exceeds 150C. Typically they switch back on once the junction temperature drops 15 degrees.
How long does that typically take?
Since the power is dropping to near zero, and junction to case thermal resistance is typically 50C/watt, does that mean it can potentially drop temp very quickly and recover within microseconds?
AI: No, not microseconds - there will be some temperature hysteresis and some heat capacity. Probably more the order of a second than microseconds. |
H: What are some good Electrical and Electronics blogs worth following?
This is a soft question. I am newly admitted to Electronic and Electrical engineering . Under this branch there are multiple domains from which I may work in one of them in the future.
For knowing where is my particular interest in one of such particular domain, first of all I should know what are they (each domain) what are do's and don't. What is its scope and new technologies? And from the related blogs, sites I think that I could get such information.
So I want to ask about some good sites, magazines or blogs where I can get more info on the various fields and the latest trends about Electrical and Electronics research.
Or, should I just check out "classical" providers like Springer , IEEE Transactions , Elsevier etc ?
AI: That probably depends on your interests. Some suggestions (in no specific order):
http://www.ganssle.com/
http://thesignalpath.com/blogs/
http://www.crosstalkonline.org/
http://circuitcellar.com/
http://www.eetimes.com/
http://www.edn.com/
http://www.embedded.com/
http://www.eevblog.com/
http://www.bethesignal.com/bogatin/index.php
https://www.reddit.com/r/ECE/
https://www.reddit.com/r/electronics/
AND of course:
https://electronics.stackexchange.com ;-) |
H: Exact definition of overshoot
I am a computational biologist and am working on some aspects of control theory in biological systems. Since control theory concepts are not well known among biologists, I need a good standard reference for certain terms. I was thinking of citing a control theory textbook. Now I have a doubt regarding the definition of overshoot.
The book — Modern Control Engineering by Ogata defines maximum overshoot as:
The maximum overshoot is the maximum peak value of the response curve
measured from unity. If the final steady-state value of the response differs from unity, then it is common to use the maximum percent overshoot.
It does not say what maximum overshoot is, when the final steady state is not unity. In my analysis, at present, I am defining overshoot as the max value above the tolerance zone normalized by the steady state value. I am not sure if this fits the above definition (steady state being scaled to unity, however I do not report the steady state anywhere).
When I google overshoot I see images that have labelled overshoot differently which is either of these two:
The dynamic maximum
The difference between the maximum and the steady state.
Can someone please let me know what is the correct definition of overshoot (not percentage overshoot)? I need a good citable reference (a book or a review).
AI: WYSIWIG - as you need to cite a reference:
G.F. Franklin, J.D. Powell and A. Enami-Naeini: Feedback Control of Dynamic Systems, Prentice Hall, 4th edition:
(Quote)
The requirements for a step response are expressed in terms of the standard quantities illustrated in Fig. 3.27:
...
3.) The overshoot Mp is the maximum amount the system overshoots its final value divided by its final value (and often expressed as percentage).
EDIT/UPDATE:
Karl Johan Astroem, Richard M. Murray (Princeton University Press)
"Feedback Systems":
Quote:
The overshoot Mp is the percentage of the
final value by which the signal initially rises above the final value. This usually
assumes that future values of the signal do not overshoot the final value by more
than this initial transient, otherwise the term can be ambiguous. |
H: Tube amp low voltage
I am building a 18W tube amplifier based on this layout. I found a schematic for a similar amp.
my problem is that there is low plate voltage on all of the tubes (by plate I mean pin 3): when I measure the pins without the tubes it's around 120V and with the tubes it drops to ~17V. there is clearly something wrong.
After rectification I can measure ~300V on the (+) of the bridge rectifier.
I am concerned about that 220K resistor, which is (in the layout) next to the rectifying diodes. would it make a difference if I remove it? because i cannot see it on the schematic.
note: I have a power transformer without center tap, which is rectified using a bridge rectifier as discussed in tube amp power transformer
AI: Posted as a comment on the related question : tube amp power transformer
That "220K 1W" resistor looks like a problem. Was it meant to be 220R?
In a little more detail : the original 1950s circuit that inspired this design would have used a vacuum tube rectifier with a significant internal impedance. I haven't been through the details but something like a 5Z4 or GZ32 if you want to look up the datasheets.
That would impose some natural current limiting, partly to soften the impact on high voltage electrolytics, but also to save the circuit in the event of a flashover in the output valves (spectacular!).
Now is 220R about right? Anode current could reach 50-70mA for a pair of EL84s. (Look at the cathode bias resistance, and the grid voltage curves in the EL84 datasheets : at what cathode current does this resistor drop the grid voltage?)
In practice, measure the voltage across that resistor : it tells you the anode current.
Take an upper limit of 100mA : voltage drop of 22V, power = V^2/R = 2.2W. So 220R 2W is very plausible for HT currents up to say 90mA. |
H: Resistor circuit problem
I am having trouble with a circuit:
simulate this circuit – Schematic created using CircuitLab
I must calculate the voltage across R1.My answer is to first compute the current running across R1 and R4 , the two forming a series circuit:
6V/(1k+2k)ohms=0,002A
Then I calculate the voltage drop across R1:
V1=I*R1=0,002*1000=2V
It seems that I am wrong , but I don't understand how to do it in another way.
How must I compute the voltage across R1?
AI: R1 and R2 are NOT in series.
Here is how you can do it:
R1, R2 and R3 are in parallel. Calculate the parallel resistance of those three resistors so you can see them as one and call it R123.
Now R123 and R4 are in series. They form a voltage divider.
Now you should be able to calculate the volatge accross R123 (which is equal to the volatge across R1). |
H: NVIC on ARM CPUs
Can we look at NVIC peripheral on ARM CPUs like some sort of thread? Main application is executing, and at the same time NVIC peripheral doing her own work? Or all of that is single thread application. Can someone explain if I am wrong, where and why?
AI: I came from an Java background into embedded programming, so I asked myself the same question. In Java, you have Threads. With them you can execute some given tasks in a (kind of) parallel way. This is NOT how Interrupts work.
The code in an interrupt routine is not executed while the main loop runs. The main loop stops what it is doing and jumps to the interrupt routine in case an interrupt is fired. After execution of the isr it jumps back to where it was and continues with that. |
H: additional resistance required to produce a potential drop
A wire of length 100cm is connected to a cell of emf 2V and negligible internal resistance. The resistance of the wire is 3Ω. The additional resistance required to produce a potential drop of 1 millivolt/m?
The answer is 57 ohms.Could someone explain?
AI: I'll assume that the requirement is really 1 mV/cm of voltage drop along the wire. Here's one way to get there:
1 mV/cm × 100 cm = 100 mV total drop required.
100 mV / 3 Ω = 33.3 mA of current needs to flow.
2 V cell / 33.3 mA = 60 Ω total resistance is required.
60 Ω total - 3 Ω wire = 57 Ω additional required. |
H: Math of capacitor current/voltage when connecting capacitor to battery
I think I'm missing something fundamental in the math surrounding capacitors.
Suppose I have a 1 F capacitor that is not charged. The voltage across its terminals is 0 V.
Now suppose I connect a 1 V battery to it. The voltage across its terminals is therefore 1 V.
The current to it is given by:
I(t) = C dV(t)/dt
But the voltage has jumped in a non-continuous manner from 0V to 1V.
Therefore dV(t)/dt is "infinite" (or undefined) at the time t where I connected the battery. It jumped from 0V to 1V "instantaneously". This implies the current is infinite at this point.
What am I missing here?
AI: What you are missing is that you are working with ideal components. You are assuming that the capacitor and the battery have no resistance. In that case, yes, current would be infinite and the time to charge tha capacitor would be infinitely short.
We don't, however, have ideal components to work with. The battery will have an internal resistance (NOT a discrete part, but caused by the physics and chemistry of the battery.) The capacitor also has an internal resistance (again, this is inherent to the materials.)
These resistances prevent infinite currents from flowing, and prevent an instantaneous change in voltage.
You need to use equations that take the effects of the resitances into consideration.
Specifically you need to look into the RC time constant.
The RC time constant (T) is the product of the resistance (in Ohms) and the capacitance (in Farads.) T = RC
T is the number of seconds it will take the capacitor to charge to 63 percent of the target voltage - in your case, 0.63 Volts.
If the capacitor and the battery together have 1 Ohm of internal resistance, then T would be 1 Second. Taking t as 1 second, dV(t)/dt would then be 0.63 which leads to I(t) being 0.63Amperes, at which point the capacitor is only charged to 0.63 volts.
I've probably screwed up something in there, but the point is that infinite currents only occur in ideal circuits with no resistance. |
H: A question on precise resistor measurement for current loops
For a current outputting device I’m using a data acquisition board which can only measure voltages.
To translate the currents to voltages I use similar to the following shunt resistor:
http://docs-europe.electrocomponents.com/webdocs/13ec/0900766b813ecc53.pdf
These types of ultra-high precisions are used for 4-20mA current loops. In the data sheet the tolerance is mentioned as ± 0.005%. It means I can trust that this resistor R is such that 499.975 < R < 500.025 ohm.
So far so good… To prove and document the resistor’s resistance value, I’m using a calibrated current test device which has a certificate for 4mA and 20mA nominal currents. According to the certificate of this current regulator device, for 4mA mode the calibration institute measured 4.0055mA ; and for 20mA mode measured 20.0072mA.
I apply current across the resistor with this trusted current tester at 4.0055mA and 20.0072mA and I read voltages as 0.990V and 4.995V in order with the data acquisition board. This means I obtain resistances as 247.12930 ohm and 249.67509 ohm.
The data sheet of the ultra-high resistor claims its tolerance is ± 0.005%. It means R is such that 499.975 < R < 500.025 ohm but I’m measuring 247.12930 ohm and 249.67509 ohm at different currents which are both less than the data sheet claim.
The current tester claims the uncertainty is ±0.00040mA at 4mA mode and ±0.0035mA at 20mA mode.
Either the regulator is not regulating well or the data sheet is wrong. But both the current regulator and resistor have certificates. Should I trust the resistor data sheet or calculated resistor value from my measurements?
AI: Okay, the resistor is accurate (if you connected to it properly- only a few m\$\Omega\$ could take it out of spec- see 4-wire connection below- the two connections closest to the resistor body should go to the differential input amplifier and nowhere else) and your calibration source is accurate, assuming we can believe the calibration certificate.
simulate this circuit – Schematic created using CircuitLab
What makes you think that the data acquisition board is that accurate? The voltage reference in the data acquisition board has just as much effect on the reading as the resistor and the calibration source (span error). Any zero error (offset voltage) will cause a direct reading error of Vos/250\$\Omega\$ mA. And any input impedance that's lower than many megohms will shunt your shunt- 0.005% is 5M so you would want several times that at least. Any amplifier bias current will cause a direct error in the current measurement (a 250 ohm 1% resistor in series with the low side would reduce that error to the offset current rather than the bias current).
See above for the various error sources in the data acquisition board (not including the reference error, which is like a gain error in the diff amp).
If you're using something like NI's 4462 data acquisition boards, the DC performance is pretty disappointing for such an expensive board. |
H: USB to 3v converter to power a battery powered FM transmitter?
I have a SCOSCHE FM Transmitter which practically eats up 2xAAA batteries, I was thinking of using my TV's USB power for the transmitter. My search lead me to this 3 in 1 DC-DC USB 5V to 3.3V Step-Down Buck Module, now my questions are:
a). Will it be ok to power a 3V device with 3.3v? If yes, what other options do I have to get this done?
b). Since this is a FM transmitter are there any chances of static when this new power source is used?
AI: It won't go "poof" immediately, and will probably not go "poof" at all.
The transmitter has to be able to handle 3.3Volts because new alkaline batteries will have a voltage higher than 1.5Volts. A new battery may well reach 1.65 Volts, so two in series is 3.3Volts.
Since AAA batteries won't manage to put out 1.65Volts for very long under load, there is a slight chance the transmitter isn't designed to handle that voltage for very long and that it might over heat and burn out. I don't think it likely, but there's no way to tell without looking at the device or the schematic.
You might get more noise when powering the transmitter from USB with a switching regulator (which a buck regulator is.) There will be noise on the 5Volt and ground lines from the USB port, and there will be more noise from the regulator.
How much more noise you will hear depends on how well made the transmitter is. It might have good filtering/regulation for the power supply and you won't hear any noise at all. It might straight up suck canal water and manage to not only transmit all the USB noise but amplify it as well. Given the price and that it is designed for batteries, I wouldn't make any bets as to what will happen. |
H: Fix a broken Power Supply using existing connector (Newbie)
I am hoping to attempt to fix my childrens ride on electric car as the power supply was left charging and has cracked / broken (see pics).
I am completely new to electronics, but was hoping to replace the power supply and get the car working again.
The power supply seems to have a non-standard connector and I cannot seem to source a replacement on the internet so the only option "I can see" is to replace the power supply and solder / re-attach the connector to it, hence this question.
I have measured the voltage across the car battery and getting about 13 volts so can I assume that this has not been damaged?
I have looked at a few articles / videos such as -
https://superuser.com/questions/166876/can-i-patch-my-laptop-power-cable
Is it OK to solder a power cord?
https://www.youtube.com/watch?v=gTAUupMxT1U
But the over-riding theme seems to be its fine to DONT MESS ABOUT unless you know what you are doing?
I am in the UK.
I was hoping that someone who knows what they are doing could describe if / how they would attempt to repair this (maybe there is an alternate way or the connector is not so non-standard). They may also describe how dangerous is could be if done wrong?
I can at least then go forward knowing I can pay someone to complete the repair if I am not comfortable doing it myself.
EDIT: As this question has been put "on hold", here are some original notes that I did not post but probably should have to show where I had got to, but on reading the link again, think I would have to know how to design a power supply before asking how to repair one? yet individual questions regarding parts of the steps to repair on are OK on this site -
For the record, from those others links here is what I would do if I wasn’t concerned about safety.
Cut the connector end off the broken adaptor, cut the end of the new replacement adaptor.
From the picture, would separate the 2 wires.
Strip wires tidily.
Twine them (people seem to think this is better than just touching and solder).
Solder them
Heat shrink wrap each wire
Heat shrink wrap the external wire around the join to keep tidy.
Test the adaptor without letting it out of sight (but to be honest how would I know it was OK? I will check for heat in wire etc).
AI: All you would need to do is note down the polarity of the connector,
cut the wire off the old supply and wire it to a new 12v DC supply rated for the 1A output Making sure the polarity is correct to avoid burning out any reverse polarity protection diodes. |
H: Different time constants for charging and discharging of a circuit with a constant current source and a capacitor
Consider a circuit that only has a constant current source and a capacitor. The voltage across a capacitor is proportional to the integral of the current I, times time. Since the current is constant it may be taken outside the integral. Based on this, the voltage across the capacitor will continue to increase as time goes by. Now let's say I turn the source on for X seconds and then turn it off. Would the time constant for the charging phase, and the time constant for the discharging phase be the same? I'm not sure if the input resistance of the source has any effect on the time constant. Thank you for any advice!
AI: Here's the circuit I think you're describing:
simulate this circuit – Schematic created using CircuitLab
There's no time constant in this situation. The current source makes the capacitor voltage rise linearly. Time constants only appear when there's exponential decay.
When the current source is disconnected from the capacitor, there's no way for the capacitor to discharge. You can't just connect both ends to ground since the voltage across a capacitor is not allowed to change instantaneously in circuit theory.
Sources don't have input resistance since they have no inputs. They do have output resistance. If you include an output resistance with the current source, that will get you an exponential decay with a time constant, and the resistance will affect the time constant.
In general, it is possible to have different time constants for charging and discharging if you switch other components in or out of the circuit. |
H: Why is an op-amp necessary for photo detecting circuit generally?
I am trying to build a photodetecting circuit with a photodiode Hamamatsu Si PIN photodiode S6036
As I don't have much knowledge about circuit, I think a reverse voltage supply and a resistor are enough to build the circuit:
But, when I googled for a photodetecting circuit, the most examples are using op-amp. With a further search, I found that a such circuit is called transimpedance amplifier:
(source: wikimedia.org)
With my rough calculation, in the first figure, V_OUT across R will be I * R (Suppose that I is the current by a photodiode.) And in the second figure, V_OUT at the end of the op-amp will be I_P * R_F.
Both equations have the same form. Then, what reason makes TIA circuit si the widely used photodetecting circuit? TIA circuit can have higher gain? bandwidth? or stability?
AI: Both circuits are used and it depends on the application which of the two you should choose. There are two important differences between the modes the photodiode is used in those circuits:
The first mode is called photoconductive. It has a relative large reverse voltage across the diode which results in
low junction capacitance (good for high speed application)
high dark current (leakage current; bad for linearity)
The second mode is called photovolatic. It has zero voltage across the diode (note: the polarity of the diode doesn't matter much; if you reverse the diode it will just reverse the polarity of the output voltage; but still works)
high junction capacitance (bad for high speed application)
no dark current, very good linearity (for quantitative measurements)
Photoconductive mode would be advantageous e.g. for digital data transmission.
Photovoltaic mode would be advatageous e.g. for measuring irradiance. |
H: Is It Safe To Turn On a Dropped Laptop
My mother threw my Macbook out the windows and it landed on a flower pot. It has stayed intact however I'm reluctant to turn it on at risk of the hard drive getting damaged.
Is it safe to power it up, or should I have it sent for inspection first?
AI: If there is valuable personal data, not just the OS and apps data, the best thing to do is pull the HDD out and connect it to an already running (different) system with a USB3 enclosure.
This is so that if there is damage that progressively gets worse while it runs, you have the most time possible to copy off the data in order of importance. Usually it won't make any difference, would be damaged too much already or not damage at all but I have seen cases where every second counts.
Otherwise if there's no valuable personal data then you might as well just turn it on and see if everything works. Whatever is damaged, is not generally user repairable at a discrete level and if that whole modular portion needs replaced you may have to power it up to test and determine that.
It is doubtful the battery is damaged if the casing for it is undamaged, but just to be safe you might pull it out, power the system via the AC adapter and if smoke starts pouring out, have your hand on the ac outlet plug so you can pull power immediately. An excessively paranoid person might also power the laptop off the battery while it is outside or on concrete, away from flammable materials and you, but odds are the most likely components to fail from the abuse are the HDD and motherboard PCB or solder joint cracks, or of course screen or backlighting cracks. |
H: Malfunctioning H-Bridge
A PCB that I designed just came in (schematic pictured below). After soldering the components in, some things are happening that I don't understand. Most importantly, one part of the circuitry, an H-Bridge is used, however, at JP2 pin one has a voltage of .8v rather then 12v that the circuit is powered with. This behaviour is observed when Q1, Q3 and Q6 are "actuated" (or set HIGH) by the attiny85.
I've tried to google this, but have had no luck, as I have no idea of how to describe it using keywords, because I don’t really know what the problem is or how it has been caused.
My question is: Why is this happening? And how do I stop/fix this?
AI: That is a terrible schematic. See this description of how to draw a proper schematic.
In any case, your primary problem is that you don't seem to understand that when it is conducting, the emitter voltage of an NPN transistor can never be higher than its base voltage. In fact, it will be lower by at least 0.65 V. You're driving the base of Q1 with a logic signal from a 5-V MCU, so its emitter will be no more than about 4.3 V, probably less. Same thing with Q3 and Q5.
Also, I can't figure out what S2 is supposed to be doing. Are you sure you have a current path to the collector of Q1? |
H: Any clever way to provide 3.3V with good current output from a 9V battery?
I'm sorry for any English mistakes as I'm not used with using it when talking about technical stuff.
I have been using some ESP8266 WiFi modules with Arduino Mega for a project. They work with 3.3V Vcc but require some good amount of current (it can go over 200mA, as seen here http://wiki.iteadstudio.com/ESP8266_Serial_WIFI_Module), which make them impossible of powering from Arduino, and that's why I'm using batteries to power the VCC pin. I keep other two pins (CH_PD and RESET) at HIGH state, but I keep them at 3.3V pin from Arduino, as they seem to steal some precious current from ESP8266 VCC if connected together to the battery and make the ESP8266 unstable.
I used LM1117 because the original idea was to extract 3.3V from 5V Arduino pin for more current output, so an LM7833 would not work. Extracting 3.3V from the 5V didn't work as expected, so I'm using a battery now.
simulate this circuit – Schematic created using CircuitLab
This circuit has been working fine with some ESP8266s, but some of them seem to be requiring more power, since they are failing to get WiFi connections most of the time, taking too many attempts to connect. Also, LM1117 eventually heats quite a bit and drains a lot from the battery.
As you can see, I already power the ESP8266s from over 3.4V (although this level seems to drop a bit once I attach the ESP8266), and I'm kinda afraid to rise this level even more.
Do you have any ideas on a better circuit to provide 3.3V with good output of current for my ESP8266?
AI: 9V batteries are great for smoke alarms, but pretty shocking for anything else. The capacity of a standard PP3 (alkaline) is about 400mAh and has an internal resistance of around 5 Ohms (in fact some low duty ones internal resistances closer to 20+ Ohms). So basically not a lot of energy, poor current capability, and lots of energy wasted internally. If you use a linear regulator as you are, you are wasting 63% of that energy as heat in the regulator. You'd end up with a run time of only about 2 hours before your battery dies. The regulator will be dissipating over 1 Watt which is quite a lot without a heat sink.
Using a switching regulator would help - you reduce the current draw from the battery which reduces the losses on the internal resistance, whilst also massively reducing the losses in the regulator, so you claw back some of that wasted energy for a longer running time. But it still isn't a lot - at 200mA draw on the output, and assuming you have a 90+% efficient switching regulator, theoretically that would give you around 5 hours running time (factoring in the internal resistance). And that is not accounting for the discharge curve - the voltage will drop off much sooner than 5 hours, and as it does the switching regulator will start drawing more and more current from the battery to try and maintain the output voltage meaning more losses internally in the battery.
A standard alkaline AA battery by comparison has a capacity of around 2500mAh or more and an internal resistance of <0.5 Ohm. The trouble is the voltage - 1.5V. There are however many simple switcher ICs and modules out there that can run off a single AA or AAA cell and step up to a 3.3V output. This combination would give you around 4.7 hours with one cell and a boost converter. The main reason for the lower run time is there will be a much higher current draw from the battery than at the output as is the way with boost converters, so there will be more lost in the internal resistance. But even still you get a similar run time as a PP3 in less space, and with batteries that tend to be far cheaper. Or you could use the same approach but go for a D cell battery for example, those have a lower resistance and much higher capacity (closer to 15Ah), so with one of those and a boost converter you would have a run time of around 30 hours - 6 times longer than a PP3.
If you were to use more than once cell, i.e. go for say 3 AA batteries in series, your voltage will go up (capacity stays the same) and so will the run time. With 3 in series and a step down converter, you would have a run time of closer to 16 hours (at 200mA). You could even simply use a low drop out linear regulator to bring that down to 3.3V - it would hurt efficiency, but you would still be able to get a running time of around 12 hours - so still much more than the PP3. |
H: Is there a shared lead AND Gate IC?
Hi I'm an electronics hobbyist still learning some basics of digital logic.
I'm looking into building an arduino shield, but I want the arduino pinouts I'm using to be accessible when the shield is not enabled(by a single control pin). I know I could just wire up one lead of each of the gates 74HC08 to the enable line, but I'm wondering if there is a more convenient form factor for this kind of application, as the pins are somewhat awkwardly positioned. For example is there an IC where i[n] is passed to o[n] if enable is set?
EN o0 o1 o2
|___|___|___|
| |
|___________|
| | | |
GND i0 i1 i2
To clarify, I'm not looking for a specific product, rather I assume this is a common problem, and would like to know what keywords to use to find such a device.
AI: If you're willing to use a pullup or pulldown, the 74XX125 and similar devices will reflect the inputs on their outputs if the enable line is asserted, and go high-impedance if deasserted. |
H: Wavelength in real life
How to understand term wavelength of radio wave in real life. What this column 'Wavelength range' means to us in real life?
I theoretically understand what it is (distance between two successive peaks in signal), but cannot imagine what is it in real life.
AI: Sorry, but It is not clear what you mean by "in real life". You say you understand the theory, so you understand it is another parameter of the wave, just as the frequency is, but you don't seem to have problems with this latter.
I can only guess you need some example from other fields that are more "visually clear". So I propose you to think of the waves on the surface of a lake when its waters are still. When you throw a stone in it you can see circular waves expanding from the point where the stone sank. If you measure the distance between peaks, that's the wavelength.
Of course such nice pictures cannot be taken for EM waves, since you cannot "see" them. At best you could see some effects which can be explained taking wavelength into account, such as diffraction (Wikipedia). Excerpt:
Diffraction refers to various phenomena which occur when a wave
encounters an obstacle or a slit. In classical physics, the
diffraction phenomenon is described as the interference of waves
according to the Huygens–Fresnel principle. These characteristic
behaviors are exhibited when a wave encounters an obstacle or a slit
that is comparable in size to its wavelength.
In that article you can see some equations describing the visual effects caused by diffraction. Many patterns that are produced in the experiments can be related to the wavelength of the waves involved.
Note that diffraction can happen with EM waves at any frequency (RF diffraction), but its effects are not usually "visible" as those caused by light sources.
In this other interesting Wikipedia article on interference you can see also images of effects that depend on wavelength.
In particular, interference between EM waves can have a tangible effect on everyday life with your cell-phone (for example): namely fading. In short: have you ever wondered why sometimes your cell-phone receives a clear signal and, by just moving it a couple of centimeters away, the reception becomes crappy? That's fading in action!
Another practical situation where you must take wavelength into account is circuit theory and Kirchhoff's laws (KLs). KLs are not valid unconditionally, but can be used only under some specific assumptions, namely: the circuit dimensions must be much less than the minimum wavelength of the signals the circuit is going to handle. If that requirement is not met, the results obtained using KLs can be wrong and you'll need to use Maxwell's equations to analyze the circuit. Actually KLs are derived from Maxwell's equation under the assumption that the circuit is much smaller than the wavelength.
That's why microwave circuits are either extremely small or are "funny" because the "components" you see on them don't resemble classic "low-frequency" parts. |
H: PCIe, diagnosing and improving an eye diagram
I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector).
The root complex device is a Freescale i.MX6 which is PCIe Gen 2 compliant and the device I am communicating with is a Marvell WiFi module that is a PCIe Gen 3 compliant device. It's a single lane interface running at 2.5Gbps.
I've done some signal integrity measurements by soldering a high speed scope with proper differential probles right on the other side of the inline caps shown below:
For the clock the eye diagram looks quite good:
But the TX data not so much:
The WiFi chip has on-chip terminations so I don't believe I am supposed to need any additional terminations, but I could be wrong about that.
I have found some registers that can be set within the i.MX6 processor for the PCIe peripheral but I'm not exactly sure what they actually do. A little bit of trial and error hasn't gotten me very far either.
I've checked that the layout follows proper routing rules and the PCB was constructed with the correct impedance. Obviously I have some jitter in the system but it also looks like I have a reflection or de-emphasis issue. I'm hoping someone could describe what they see wrong with my eye diagram and/or suggest some ways to fix it.
Cheers!
AI: There are quite a number of things that will do this to you.
You have not stated the length of the interface. I do direct chip to chip PCIe frequently and you really need to take this into account as you will get attenuation of roughly 0.18dB per inch due to skin effect losses and about 0.5dB per inch due to dielectric absorption on 'ordinary' FR4.
I think you may be able to get better numbers from the PCB material datasheet if you download it and look at the loss tangent. Take a look at Isola 370HR for a typical datasheet. The numbers above are pretty accurate at the 5GHz rate. At the 2.5Gb rate, the numbers are a bit lower, with a total loss of ~ 0.4dB per inch.
I am assuming that apart from breakout and the coupling capacitors, you are using single-layer routing for the interface. Layer transitions can easily do very nasty things to the signal. Controlled impedance will be a bit different layer to layer and reflections are the natural result (there are ways of successfully doing multi-layer routing, but it takes a great deal of care and some unusual tricks to achieve).
For PCI express (and Infiniband for that matter), the rise and fall rate of the signal at the transmitter has a minimum rise and fall time to minimise EMI issues, and that time is 0.25UI, which yields 10GHz signalling artefacts on gen 2 links and 5GHz artefacts in gen 1 which must be taken into consideration.
The de-emphasis field above helps you get a clean eye at the receiver by bringing the non-switching amplitude down relative to the nominal launch amplitude.
If you are losing too much amplitude at the switching edge of the signal, set this field to a larger value. You might also set the nominal launch amplitude a bit higher as well.
Other issues you may look at:
Where, relative to the transmitter, are the coupling capacitors? They should be as close to the transmit pins as possible. Once they are more than half a wavelength of 10GHz (about 0.6 inches on FR4) [double that distance for 2.5Gb/sec links], they will most definitely reflect energy.
I have had problems with capacitor geometries of 0402 or larger in PCI express gen. 2 and I now use reverse geometry devices (0204) for the reduced effective series inductance. These seem to be getting the job done very well.
Looking closely at the eye diagram for transition bits (nice scope you have, by the way - that is what you need for this stuff), the initial signal drive appears to be driving a terminated line (the signal goes to 0.5 V(nominal) in the classic transmission line manner). This is not a particularly long line (the round trip time is where the signal drives to full V[nominal]).
you say that the link is running at 2.5Gb/sec (gen 1) and that is what the scope traces show, but you may want to experiment with the de-emphasis field (look in the reference manual as well as the electrical data sheet (see note below). The 'standard' de-emphasis values are for a nominal link, not an embedded link such as you have here (and what I also do regularly). If you can get it to about 6dB, you may get better results.
The nominal de-emphasis is 3.5dB for Gen 1 and 6dB for Gen2. I note that the field above seems to imply that a Gen 2 link is 3.5dB - you may want to dig a bit on that. The link you have needs a minimum of 3.5dB of de-emphasis.
Note that the eye at the receiver will be very different, but this is where it matters. As an experiment, read the error counters in the processor (most of them have a counter for retries); if you are not seeing significant errors, you may be chasing something that is not really a problem. If you are seeing large error counts, then maybe some of this might help.
One more thing: excessive launch amplitudes and de-emphasis are just as bad as setting them too low.
Maybe that will help you a bit: Hope so.
Note: Freescale documents everything, it is just that sometimes it is not in the place you expect to find it. Make sure you have the latest device errata as well.
Update. Added notes about capacitor geometries.
Up to the 2.5Gb/sec node, 0402 devices are fine. My handy calculator shows a typical 0402 device has about 10 ohms of impedance (inductive) at this frequency and 21 ohms at 5GHz (the highest frequency of interest). This is not too bad in a 100 ohm differential system as the effective impedance of a closely coupled pair is somewhat less than a straight addition.
The self resonance for this device is 19MHz, well below all frequencies of interest, so any phase noise is due to ESL. Keeping the impedance down to less than about 1/3 of the effective track impedance means that the phase noise (and therefore additional ISI) we will get is between 1 and 17 degrees (a single ended track from a closely coupled pair is typically (Z(diff)/2)*1.25, so for 100 diff, the single ended impedance is about 65 ohm). This amount of phase noise is manageable.
At 10GHz, the effective impedance is about 44 ohms, and can start to interfere with the differential pair by introducing excessive phase noise across the frequency band of interest as the maximum phase is now about 34 degrees. Although I have successfully done Gen 2 with 0402 devices, I have also had issues with longer runs and now use 0204 reverse geometry devices for this speed and higher.
For 8b/10b encoded links, the frequency band of interest is from bit rate/5 to bit rate * 2. The lower limit is bounded by run length encoding, and the upper limit is bounded by the specification requirement for minimum rise and fall times.
The ESL for various geometries:
0402: about 700pH
0204: about 300pH
0805: about 1nF
Update Added commentary about 50% initial launch amplitudes.
Let us consider a transmission line terminated at the source and destination at the characteristic impedance of the line, Z0.
At the initial launch, assuming the line is long compared to the wavelength of the signal, the launching point will go to 50% of launch amplitude due to voltage divider effect (the transmitter sees only the transmission line at this point).
Once the energy arrives at the destination point and starts rising to the 50% point, the energy at the source has effectively 'filled' the line with energy and rises to the full launch amplitude. Strictly speaking, the transmission line at the destination sees a voltage divider, and the divider effect at the source disappears as the output approaches DC (keeping in mind that the transmission line effect is applicable only to transitions).
This could also be visualised as the 50% energy level moving down the transmission line to the final termination and then reflecting back at full level. That is why we see a 'round trip time' in the 50% point at any point on the line.
Your plot shows precisely this behaviour at a point in the line that is not yet at the destination port, because this 50% point is in fact moving along the line.
At the receiver, once the energy has reached to 50% point, the full energy of the line is following and the voltage at the receiver continues to rise, giving a smooth transition from one level to the other.
This could also be visualised as the 50% voltage point moving along the line to the receiver, then reflecting back at 100% (the receiver achieves DC first). For that reason, the voltage at 50% viewed at any point on the line shows the round trip time from that point to the receiver.
This discussion is as valid for differential signals as single ended.
So your plot above shows classic transmission line behaviour with little excursions beyond the expected behaviour. In fact, this is one of the cleanest transmitter eyes I have seen. |
H: Signal of qubits
In the basics of digital electronics , I learned that 0 means there is no electronic signal and 1 means the electronic signal is present. All the electronic circuits works on the same mechanism i.e. 1 & 0.
But while surfing on internet, I found DWave Quantom computer, it uses qbit, i.e. it will be 0 and 1.
But how can we represent it in signal scenario? how it will be 0 and 1 both.
Can you please justify.
AI: Have you read this: https://en.wikipedia.org/wiki/Quantum_computing ?
You assume that such a calculation device also works with electronics, voltages, currents etc. Where does it say that it does ? And does it need to ?
It is possible (working devices exist) to build a mechanical computer which uses no voltages at all. Voltage is just a way to store information. Quantum computers use properties of atoms to store information. |
H: What is the "thing" that produce radio waves
From the best of my knowledge, radio signals are generated through some "oscillating" device and are propagated through an antenna.
The signal transmits throughout vacuum and experience some attenuation in dense media.
The receiver which is another antenna has a filter that picks up the frequency.
The peaks of the wave represents a "1" and the valley of the wave represents a "0", this is interpreted as digital signals by a processor and generates the corresponding results.
Can someone elaborate as to what is this oscillating thing that produce radio signal in modern radio device. Is it some sort of crystal or some elaborate circuit?
AI: Almost all modern radio transmitters indeed use one or more crystals to generate the transmit frequency and other needed frequencies. As crystals are only available / practical up to a relatively low frequency a circuit called a PLL is used to convert the crystal's frequency up to the required transmit frequency.
Another way to generate high frequencies is by using a tuned cavity, similar to the magnetron tube used in microwave ovens.
It depends on the application which solution is chosen. |
H: Wiring multiple peltier units
First of all this question relates to powering Peltier units and not the physical relationship.
I have two Peltier units and a 320w 12v supply similar to this the units are TEC12715. They are physically arranged in next to one another(parallel) and I have wired them in series; they are sandwiched between two heat-sinks which both have fans(also powered by the same supply). I am trying to cool a sealed box and currently the sealed(cooling) side will only drop a few degrees below ambient while the hot side is hitting 60*C.
Should I wire these units in parallel or series?
Thanks,
Mark
AI: Supply and load are both 12V so that means you will need to connect everything in parallel.
BUT since the TEC uses 15A you can only connect ONE to the supply as the supply can only deliver 25 A. When Connecting 2 TECs in parallel you need a supply of: 2 x 15 A = 30 A. Your supply is 25 A which is not enough.
So you can only use ONE TEC with ONE supply. For the second TEC you will need another supply OR ONE more powerfull supply of 12V and at least 30 A and then connect everything in parallel. |
H: How do car trackers communicate?
So i was thinking, How do car trackers or long distance (over 100kms) remote control communicate to their central commands,? Do they use the cell phone network? what could one require to set up such a network?
AI: Most tend to use cell phone networks and while there are a few different standards according to Wikipedia GSM now holds over 90% of the global market so it is possible to design GSM based products that handle many markets. Many manufacturers offer pin and command compatible cellular modules to handle country specific variants but in general UMTS is starting to make interoperability between countries and carriers easier.
For cell based products setting up your own "network" assuming you just mean something to receive GPS positions would normally just be a matter of having an Internet server with a static IP address so that the remote units can connect to your server and send through the data. Most use TCP/IP and the Internet as the tranport protocol so it's not really any different from posting something to a web page using your smart phone.
For close to global tracking or for remote areas without any cell phone coverage the other option is to use a satellite based system. One I've used quite a bit is Inmarsat and for that you sign up as a service provider through a company such as SkyWave, purchase some certified terminals and then you get access to retrieve and submit messages from/to their land earth stations. In practice that can be as simple as sending some XML formatted messages and requests via SOAP or various other method over the Internet.
Because satellite communications tends to be quite a bit more expensive than terrestrial some systems use a combination of both and may for example send frequent data when in cell network coverage and only send occasional / urgent message over satellite. Obviously both systems have ongoing access and data costs, but normally to access both you only need an Internet server and that doesn't have to be located in the same country as the devices you are communicating with. |
H: Is it safe to pass 240AC power through the ACS712 current sensor?
I'm trying to build a little Arduino circuit to automatically turn on a dust collector when my saw is on and drawing power.
My plan is to use an ACS712 current sensor (30 amps) to detect and transmit current changes to an Arduino and let the Arduino turn on a relay switch which should complete a 240v circuit to turn on the dust collector.
My saw has a 2000 watts motor which at 240v should draw around 8amps. I believe the ACS712 should not be overloaded by the amount of current drawn by the saw motor but I'm wondering whether its possible to safely pass the 240v Australia mains power through the ACS712 current sensor?
AI: For the chip itself:
Datasheet says Basic Isolation: 354VDC/Vpeak; Reinforced Isolation: 184VDC/Vpeak.
Vpeak = 1.41(ish)*VAC = 338.4V. For Basic Isolation, it should be okay, though with saws and what-nots there might be spikes that are multiples of Vpeak and then you get in dangerous waters. It might still do, but I'd say, add an extra optocoupler to any communication going out and keep your measurement-arduino safe from human hands at all times.
((
EDIT:
Note how on page 2 where I got those numbers it also admits that the 2.1kVrms rating given is completely useless "Allegro does not test that, we just had that tested by UL a couple of times" -- Marketing at its best: Always read the small print!
End of Edit
))
For the board:
HELL NO!
Looking at the picture I see a clearance of near to none on almost all of the designs out there. They are downright stupidly designed. I am somewhat doubtful if it'd be smart to put a current above 10A through most of them, but probably because of the presence of the contact block you'll get away with it.
But I have not seen a design in the offerings with more than 0.5mm clearance between the measured voltage and the local signal ground. That is, by any standard, a factor 4 to 8 too small to work with 240VAC safely.
For info: Clearance is the distance between two copper traces and even in the oldest standards I have worked with the minimum was 2mm for European/Aussie mains and it certainly hasn't gone down after more research into several phenomena. |
H: Help with understanding strange capacitor configuration arrangement
I am on a chapter of my electronics beginner’s book where the author talks about the PICAXE microcontroller. One of the first things the author mentions in this chapter is to make sure that the PICAXE microcontroller power source capacitor configuration looks something like this:
Right of the bat this configuration looks strange to me because of the need for using two different types of capacitors in parallel. My first thought was why not just combine the two capacitors and use one bigger one instead?
Also, interesting to note is that the bigger capacitors sit further away from the LM7805 than the smaller capacitors. Why not place them the other way around? There must be a good reason for this.
Could someone offer an explanation for this awkward capacitor configuration need?
Thanks.
AI: Indeed it's a pretty horrible layout, though almost anything is acceptable with a 7805 and a digital circuit.
The ceramic disk capacitors (last-century single layer version of today's ubiquitous MLCC chip capacitors) have lower impedance at high frequencies than the aluminum electrolytics (which have a certain amount of inductance and ESR), however they are limited in value so they can't cover the whole frequency range. So you get a lower overall impedance (and some damping) at a lower overall cost by combining two different types and values of capacitors (a 100uF ceramic disk capacitor would probably be the size of a dinner plate).
The ground trace layout is the most egregious- there should be a star connection at the input filter capacitors. 100uF on the output is unnecessarily large, but it won't hurt anything (a 100uF/10V cap is pretty small physically). 100uF on the input may or may not be sufficient. |
H: Balancing current with resistors when driving parallel strings of series LEDs with constant current
I'm designing a light source that will employ a grid of LED emitters powered by constant current drivers. The LEDs will be laid out in a parallel/series combination, in rows of 8 emitters in series, with 3 rows in parallel. There will be 3 of these arrays on the board, for a total of 9 rows of LEDs, driven by 3 constant current drivers. This is the schematic for the board:
In my initial testing, using 8 LEDs in series seems to limit the impact of voltage variation in any individual emitter, and I will be using an aluminum PCB substrate which will double as a heat sink to distribute the heat, but I'm considering also adding a resistor in series because I've heard that helps to ensure that the current stays the same between the parallel strings. From what I understand, I would add a few hundred mV of voltage drop to each string, so if the constant current driver is outputting 120mA, and voltage drop across the 8 LEDs is 18V, I would add a resistor that would result in 18.3V.
What I don't understand, and I'm hoping someone can explain, is how adding this resistor helps to regulate the maximum current in the string.
AI: The dropping resistor counteracts some of the LED forward drop (Vf) variation by inserting its own forward drop and providing a form of negative feedback. You select the overall LED current by setting the IR drop in the resistor to achieve the target series current. Reductions in Vf will lead to increased current, but also increased IR drop. That's the negative feedback.
How effective the dropping resistor is at absorbing the LED forward variation depends on the ratio of LED Vf variance to the resistor’s IR drop. For example, if your string can have a total Vf variance of up to 1V, but then you have only 0.3V resistor drop, then the resistor isn’t going to do much: you will have very large Vf-caused variations in current
As a consequence I think you will find it challenging to achieve good brightness balance by just using dropping resistors even with a constant-current driver for each color-set, unless you use ‘binned’ (matched) LEDs in each string. Even then, their drop will vary with temperature.
You’ve stated that you’re using constant current drivers. The driver inserts its own variable resistance to achieve a fixed LED current in spite of Vf variation. Therefore, if you extend that idea to each string, you don’t need dropping resistors at all.
If you haven’t designed the current source yet, a 2-transistor current limiter circuit, one for each color string, would work well.
Some current limiter examples here: Controlling High Current LEDs with an ATmega328
The ones shown are current sinks for low side, which are easier to control - you could use that if you supply Vcc to the LED common anodes instead of ground. Otherwise, they can also be used on the high side with some modifications. |
H: Increase minimum PWM duty cycle for high resolution PWM
I'm working on a project involving driving LEDs at a 20kHz PWM frequency with 1024 bit resolution. I've calculated that the minimum pulse time, (1/frequency)/resolution, would result in a minimum pulse time of ~50ns, which means I need rise and fall times of <25ns of all of the components I'm using to turn the LEDs on and off. While there are components that meet this specification, it's pretty demanding and I'd like to use some cheaper, more widely available ICs.
My thought is that while 1024 resolution is useful in adjusting the output of the LEDs in fine increments in my use case, I don't actually need a minimum brightness of 1/1024, but could probably get away with a minimum of 1% of the total brightness, or 1024 x 0.01, which is roughly 10x the minimum pulse width or about 500ns. This results in rise and falls times of 250ns, which greater increases the number of available components.
Is my understanding of the PWM frequency, resolution and duty cycle relationship correct here?
AI: Your calculations seem correct to me.
However, do you really care about the rise time being >25ns?
If you say you don't need the range below 1% brightness, then you can simply use only values in range 10 to 1023 out of 1023, and you therefore get a rise time of at least 10*50ns = 500ns.
If by mistake (or to simplify code/design) you still use the 0 to 9 out of 1023 range, then you will simply get in one of the following situations :
The LED doesn't turn on at all (you don't have time enough to turn it on at all before starting to turn it off.)
The LED turns on a little little bit (less than if you had instant turn on/off.)
The LED somehow manages to turn on then turns off as quick as possible.
Which of the above will happen depends of the exact components you use for driving the LED (I would guess 1 or 2 are the most likekly.)
Between 0 and 9, you might not get brightness proportionnal to PWM, but you should get:
at least the same brightness as for 0
at most the same brightness as for 10
for any 2 numbers A<B, you will have brighness_A<=brightness_B
If you don't care about what exactly happens below 1% of brighness, either don't use values 1 to 9, or just accept the fact that you will not get perfect linearity for those. |
H: Single wire (no ground wire) long distance low frequency communication
In a cave we are currently exploring, there is a temporary siphon that sometimes blocks our way.
I was thinking about monitoring it (pressure sensor or other level sensor at the siphon, transmitter via mobile phone outside the cave.)
The problem is that there is more than half a kilometer between the entrance and the siphon (including some narrow passages,) so I was wondering if it is possible to transmit information over such a long distance (let's say 1km) with a SINGLE wire (ie no "ground" wire, but both ends can connect to earth.)
The requirements:
a single wire between the siphon and the mobile phone emitter (ie no ground wire, but each side can be connected to the soil ("earth"))
distance : 1km
transmission in single direction (from cave to outside)
very low bandwidth needed (I'm fine with one bit per minute)
using a thin wire would be best (lower cost and weight).
ideally not consuming too much power (both sides will be battery powered, I need to transmit 8bits once per hour)
one micro-controller on each side (+ sensor or 4G module) + the necessary electronics for transmission
only safe voltages/currents (ie no injury if insulation is damaged and someone touches the wire)
Do you know if something like that is feasible?
If so, do you know where to start looking about information on how to build such a transmission (I have no idea how it might be called, so it's difficult to search for it.)
AI: Why a single wire? Why not a twisted pair? With a twisted pair (think "phone line") you can definitely get kilometer distance reliably and you can send power down the line as well, so that you only have to deal with batteries at the entrance to the cave. Splicing is easy with Scotchloks, which is an advantage over fiber. 300bps (and probably at least 9600bps) possible easily using 1970s technology (except "microcontroller").
Phone wires have been around for well over a hundred years. As noted in a comment, you can often find military or other surplus telephone wire extremely cheap. Not high enough quality for modern networks, but more than adequate for voice or low-speed data.
If the goal is to monitor a single open or close status then you may be able to avoid a complex system by literally opening /closing a switch on a pair of wires. If you can go do that with a passive device - float switch, bimetal thermostat etc. then you don't even need power at the far end. Changing batteries at the entrance is easy. If you miss a week or two due to weather or other reasons and can't change a remote battery then the system becomes useless. |
H: Reading of ammeter
In my university, we are using these ammeters to measure current:
What do the top series of numbers show (0-0.6/1.2), and what do the bottom series of numbers show (0-3/6)?
AI: Whichever setting you turn the knob to, the maximum reading is that many amps. If you set the knob to 0.6 then read the top scale. If you set the knob to 3 then read the bottom scale. If you set the knob to 1.2 then read the top scale but double the value you read (if the needle points at 0.4 then the current is 0.8A), and if you set the knob to 6 then read the bottom scale and double the value you read.
For best accuracy, use the smallest scale that contains the value you want to measure. |
H: Transistor H-Bridge Help
I have designed this H-Bridge Circuit using two NPN transistors and two PNP transistors.
My plan is to use an Arduino to control the base current in all of the transistors.
My supply voltage is 12V, and that is where the problem arises.
With 12V at the emitter of a PNP transistor, the 3.3V from the Arduino is simply not enough to prevent the PNP from conducting when the arduino GPIO goes high (3.3V). What is the solution to this problem? Am I supposed to use another set of transistors to connect the base pin of the PNP transistor either to 12V or to GND?
I have attached a simulation of my circuit, and here is a screenshot as well:
Falstad Link
AI: Yes, you need an additional set of transistors.
Basically, for each PNP, connect a R (2 k ?) from base to emitter. Then connect an NPN: collector -> PNP base; base -> GPIO, and emitter to GND via 2 kΩ. This NPN will then turn on the PNP.
You can't use the same GPIO for the upper PNPs and lower NPNs -- as you toggle the H-bridge, small delays will cause brief intervals where both devices are fully on and the large shoot-through current will damage them. Use a small non-overlap (basically break-before-make) for all switches. |
H: Can I combine <= and = in a always @ clock block?
I want to implement this approximate(*) absolute difference design in a clock block and I want to calculate it within one single clock cycle:
(*): Approximate because it's correct at an error of 1 (for instance, |61 - 63| = 1).
I could do:
tmp <= ina - inb;
out <= tmp[7:0] ^ {8{tmp[8]}};
but it would delay the result of one clock cycle. Does it make sense to write the following and mix both = and <= ?
module code(clk, ina, inb, out);
input clk;
input [7:0] ina;
input [7:0] inb;
output [7:0] out;
reg [8:0] t;
reg [7:0] tt;
always @(posedge clk) begin
t = ina - inb;
tt <= t[7:0] ^ {8{t[8]}};
end
assign out = tt;
endmodule
Or is there a proper way to write in a single line but obviously I don't want to "consume" two differences.
AI: As long as you write to a variable with a blocking assignment before you read it within the same always block, and you do not try to read outside that block, it's considered a temporary variable and gets synthesized into combinational logic.
Once you try to read it outside the block, it becomes sequential logic and you run the risk of a simulation race condition if that read is synchronized to the same clock edge.
A better coding style is declaring temporary variables inside the always block so it cannot be read (or more difficult to read) outside the block.
module code(
input clk,
input [7:0] ina,
input [7:0] inb,
output reg [7:0] out
);
always @(posedge clk) begin
reg [8:0] t;
t = ina - inb;
out <= t[7:0] ^ {8{t[8]}};
end
endmodule |
H: DC Block/high pass filter
I'm looking to design a DC blocking capacitor for an eternal antenna, to ensure no DC voltage can pass to the antenna.
Is this the correct way to simulate it, with the probe between the capacitor and resistor?
Thanks
https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjOB0CcCsDMYBMsCmBaMEBskAssADMdPIdngByywDslIRjjhjGWAUAMYhJ6thsrfgKEhW8SPHYRCkMLThEFheHFqFq8cZGJgOAJxAjwYk0koNWRDgHljxU9eRPx4jgHMHrCwxPwkViCOACVefldAhkEg8CdiBMdYNyDIWA4Ae15TN35oaNTE6FpsWGwUNwgMgFcAFw4ACxBtWQ4gA
AI: This is the correct way to simulate it (by probing the voltage between OUT and ground), but this is not the correct way to actually implement such a circuit for signal integrity and impedance matching, assuming a 50-ohm antenna.
An output that expects a 50-ohm impedance would see a reflection from the antenna in parallel with the 50-ohm biasing resistor, which would result in wasted energy or could even lead to oscillation and amplifier damage.
If your source is a pure voltage source, then you can use series termination and a bias tee that doesn't resistively load the line:
On the other hand, if your signal generator were an ideal current source, then you could use this kind of resistive parallel termination if you wanted to; in that case the terminating resistor should be physically close to the source. |
H: How to implement digital filter that will attenuate the voltage over certain ranges in my voltage-temperature plot
I have a temperature sensing circuit that has a "somehow linear" output voltage over the range 20-80 °C.
I plan to use an 8-bit ADC to have a digital representation of the voltages. However, the ADC samples at even periods resulting to the graph shown below:
The blue points are the "perceived" voltage of the ADC since it must have equal spaces between the levels of the sample. The orange points are the actual output voltage of the circuit above by manually setting the NTC to resistance values as set by the manufacturer on a data sheet. My goal is to design a digital filter that will attenuate certain magnitudes from 35-75 °C so that it will match the blue points.
How do I start? I am knowledgeable of discrete-time Fourier transforms and basic digital filter design however, I am not sure where to start. I plan to:
Take DTFT of the orange points
Design a digital filter that will attenuate certain magnitudes in the earlier DTFT graph (If so, how will I know the certain frequencies that need its magnitude response to be attenuated so that the orange points will match that of the blue points?)
AI: It appears that your goal is to take the ADC output and convert it into the correct temperature value.
You don't need a digital filter. Digital filters typically change a signals magnitude based on frequency. But what you actually want to do is get the temperature values based on the ADC reading. Therefore, what you actually need is a lookup table.
What I would suggest is to create an 8-bit lookup table that transforms your measured ADC reading into the correct reading. To generate the table, you could use the data points you already have (orange) and the desired values (blue) and linearly interpolate between them using a spreadsheet tool. Then put those values into an array in your software.
//The table should have 256 values
double table[]{
20.0,
20.5,
...
80.0
}
//get the temperature...
temperature = table[adc_value]; |
H: Connecting PET films electrodes to PCB
I have a plastic PET film that has been sputtered with silver (electrode)
I'm trying to connect the electrode to the PCB (there are pads in the PCB).
What is the best way to achieve high conductivity without pushing the film electrodes (the thickness of silver is 50nm). I've tried to use a screw to connect the electrode to the PCB pads but the screw tightening process damages the film and the silver on top.
Any ideas?
Best,
Alam
AI: My first idea would be a conductive glue. Or 3D print a custom bracket that pushes the foil down. |
H: How to solder a single wire into multiple cups in a D-SUB connector?
The question title says it all: I need one wire in the cable to connect to 3 cups in a D-SUB connector.
How do I best do this?
Do I solder the cups together with a blob of solder?
Do I bridge the cups with additional wires?
Do I split the cable wire in 3 (awfully thin wire already)?
How is shrink wrap insulation applied?
AI: Many quick & dirty alternatives are possible, but I'll try to answer how to do this professionally by the book (IPC).
Make 3 wires then join them with the single incoming wire at a separate solder joint.
Solder 3 wires to the dsub cups as usual. Peel & prepare them in advance by applying solder to them. Put some solder in the cup, then heat and insert.
Cut them at some sensible distance from the dsub. Ideally the wires to the dsub should have some mechanical strain relief somewhere, so you should take that in account when deciding how long the wires should be and where to join them. If it's some panel mount dsub then it might not matter.
If the 3 isolated wires are long enough (>100mm or so) then consider twisting them together.
Peel the single incoming wire and place a piece of shrink tube on it for later.
Peel the 3 wires, twist the naked wires together, then twist them with the peeled incoming wire. Solder.
Drag the shrink tube down from the single wire to cover the joint, then heat it. |
H: How to design PI controllers for two cascaded control loops?
Let's say I have following cascaded control loops:
inner current control loop with bandwidth \$\omega_{bw_{1}}\$ (PI controller \$R_{i_{s_{d}}}\$)
outer flux control loop with bandwidth \$\omega_{bw_{2}} = 0.1\cdot\omega_{bw_{1}}\$ (PI controller \$R_{\psi_{r}}\$)
Let's say I have designed the gains for the PI controller of the inner current control loop in the frequency domain based on the desired phase margin.
My question is whether I can treat the inner current control loop as it has transfer function \$G_{cl}(s) = 1\$ for the purpose of the design of the outer PI controller or is it necessary to respect the actual transfer function of the inner current control loop in the outer loop design despite the fact that the inner control loop has 10 times greater bandwidth?
AI: the fact that the inner control loop has 10 times greater bandwidth?
If the inner loop has a BW that is ten times greater than the outer loop then it's likely you can ignore the inner loop and get a decent approximation of the full transfer function by just analysing the outer loop.
But is there any real point to making this approximation given that there are so many numerical solving tools around (that make life so much easier for us) and, using them to analyse the full system is hardly any hardship at all. Just plug the diagram into a simulation tool or solver and you get the full answer. We're not living in the 1960s any more. |
H: Voltage gain of a differential amplifier with tail resistor
Suppose the following differential amplifier:
simulate this circuit – Schematic created using CircuitLab
To calculate the differential gain, I take advantage of node P being an AC ground and I draw the half circuit small signal model:
simulate this circuit
I know the gain to be:
Is the gain the same if I replace the ideal current source with a resistor? What changes in my analysis?
simulate this circuit
AI: If I replace the ideal current source with a resistor Is the gain the
same? What changes in my analysis?
The differential gain remains the same because the voltage at node P still behaves like 0 volts whether the resistor is placed there or not. It is forced to be 0 volts due to the antiphase nature of the two differential inputs having equal magnitude (that's how you measure differential gain). |
H: Circuit to reset a 4017 decade counter to 1
I have a need for a circuit with cascading outputs such as a 4017 chip. I want every output to be able to reset the circuit using a jumper. I was thinking to make a pcb with solder jumpers so one gets to choose which of the outputs resets the circuit by soldering one of the jumper's pads.
example with 4 outputs:
1000
0100
0010
0001
1000
Problem #1: when an output resets the circuit I want the first output to be on. So I want to start at 1 and not at 0.
Problem #2: when the circuit is powered on. I also like the circuit to start at 1
The outputs need to pull an input of an attiny or atmega chip with internal pull-up resistors to 0V.
I was thinking to use a CD4078BE which is an 8 input NOR / OR gate. The idea was to tie all 4017's outputs to the 4078's inputs. The inverted output of the 4078 would only be '1' if all 4017's outputs are low (so in reset/power up state).
Is this a viable approach or am I overlooking something?
AI: The friendly datasheet of CD4017 reveals the following timing spec:
That is, out of reset, output pin '0' is active, just like you want. If you don't want it to be active then simply don't use that pin and start counting from '1'...? |
H: Using an oscilloscope to measure the gain of an op-amp circuit (with capacitors)
I have an upcoming laboratory exam where we have to construct an op-amp circuit (from our experiments the circuits were always varied and probably will be a bit more difficult on our exam.)
We are always asked to measure the circuit's gain at certain frequencies to find its bode plot.
I know how to construct the circuit and plug the oscilloscope to it.
The problem is I do not know which values of frequencies I should be testing, or at which frequency value I should know that the gain does not change.
I heard something about dividing the gain found at the low and high frequencies by sqrt(2) to determine the bode plot. Can I get an explanation on what to do or the thing about dividing by sqrt(2)?
Edit: A friend of mine told me something about choosing voltage values at which distortion does not occur at the output signal. Also would appreciate a comment about this.
AI: The problem is I do not know which values of frequencies I should be
testing, or at which frequency value I should know that the gain does
not change.
This is where you test it and find out. OK, a pro would be able to estimate where these points in the spectrum are but, given that it's an experiment, you should try it at different frequencies and discover those points. The whole idea about an experiment (your words) is that it is a voyage of discovery.
As for the dividing by \$\sqrt2\$, this relates to the half power points of the spectrum that you uncover in your experiment. Here's a simple magnitude bode plot of a single-order low-pass filter: -
Picture from here.
A signal that falls to 3 dB below its nominal maximum level level is said to have reduced in power by 2. Consider this; if the original signal was 10 volts at its nominal maximum level then, the power associated with that signal into a 1 Ω load would be: -
$$V^2/R = 100/1 = 100\text{ watts}$$
Half the power level would be 50 watts and that would be a voltage of: -
$$V = \sqrt{50\text{ watts}\times 1 \text{ ohm}} = 7.071 \text{ volts}$$
Or, put another way 10 volts divided by \$\sqrt2\$
And, in decibel terms that's 3 dB down on 10 volts because 20 log (7.071/10) = 3.01 dB. Yes, 3.01 dB is strictly speaking the half power point but, as engineers we refer to it as the 3 dB point.
A friend of mine told me something about choosing voltage values
at which distortion does not occur at the output signal. Also would
appreciate a comment about this.
You should use your oscilloscope to ensure that the op-amp output does not visibly distort when making measurements in your experiment. Distortion is not your friend here (unless you are a guitarist) and, it can skew the 3 dB points a little if you are not careful about managing things correctly.
Here's another 2 bode plots (of a single-order low-pass and high-pass filter) with a little more information: -
Image from here. The point of showing the above is that for many op-amp circuits, there can be two 3 dB points; one at a low frequency and one at a higher frequency. Think audio processing circuits for example. So, you might end up with an experiment that produces a magnitude bode plot like this: -
Image from here. |
H: Identification of a circuit element
Here is the image:
What does the triangle with a bubble on one of its sides represent?
AI: Try this for size: -
Image from here. Here's a truth table and picture: -
Image from here. |
H: What is happening when a signal is acquired at exactly Nyquist frequency?
So I am doing some some simulations with 1V sinusoidal signals, and a 1 second acquisition at sampling frequency of 100 kHz.
Now I am slowly increasing the frequency of the sinusoidal signal. Trying 1 kHz, 10 kHz, 20 kHz, 40 kHz... Everything goes as planned and the FFT produces a spectrum with a mazimum equal to 1 V (aprox.) at the frequency of the signal. However at the exact nyquist frequency, 50 kHz, the amplitude is heavily reduced and there seems to be a DC component. Is there any reason why this occurs? What is failing in the theoretical Nyquist theorem.
AI: Here's a waveform sampled at its zero crossing points: -
Image from here.
Based on the samples taken, you'd estimate that there was no signal and that ties in with this: -
at the exact Nyquist frequency, 50 kHz, the amplitude is heavily
reduced
On the other hand, if the samples happened to be offset by 90° you'd conclude that the amplitude was correct.
there seems to be a DC component
Your image shows virtually nothing (1.6 mV) but, with some waveforms there might be a residual DC offset or, it might just be some small DC value from some signal processing chain.
What is failing in the theoretical Nyquist theorem.
Nothing as far as I can see. The theorem states that the sampling frequency has to be greater than the maximum signal frequency. |
H: Phase Constant of Transmission Lines when R, G, L and C values are unknown
A lossless transmission line of length 0.57 m is connected to a vector network analyser. When terminated in a short circuit the input impedance was measured to be: Zin (s/c) = j45 Ω. When terminated in an open circuit the input impedance was measured to be: Zin (o/c) = - j125 Ω. From other measurements it is known that the length of the line is 3λ.
Find the phase constant (β) of the transmission line in the other measurement.
The answer should be 33.1 rad/m but I am not sure how to get there. I would normally work out the propogation constant first using the R, G, L and C values and then deduce the phase constant from there, but the values aren't given in the question. Any explainations are appreciated.
AI: Because this looks like a homework problem I will refrain from solving the question in its entirety, but I'll give a framework for the solution that you can apply to get a final answer.
You know first that multiplying the magnitudes of Zin(s/c) and Zin(o/c) gives you \$Z_0^2\$ as justified in the footnote1; this value is 5625 so you know that this is a 75-ohm line.
Next, given that the line length is approximately 3λ, we need to account for the fact that the actual s/c and o/c impedances aren't perfect shorts/opens. With the help of a smith chart (e.g. by trial and error), or by using the mathematical statement relating the reflection coefficient seen at the input with the input impedance, you can find that the actual line length is slightly higher than 3λ (the Zin(s/c) and Zin(o/c) are satisfied for lengths just above 0, λ/2, λ, 3λ/2, ...).
After that, it's simple geometry and accounting for length - you have an electrical length in wavelengths, multiply by 2*pi to get length in radians, and divide by your physical length to get your phase constant.
1They are reciprocals of each other so their product is 1 when measured as normalized impedances, and the equation is simply scaled by multiplying both sides by Z_0. |
H: Virtual ground circuit capacitor's function?
What is the function of the capacitors in this virtual ground circuit?
I've read on the fly that C75 is to maintain a linear impedance for higher frequencies, but under which conditions I don't know.
And the purpose of C40? What is it for? On what depends its capacitance value?
This is in the context of an audio circuit. In particular the splitter should feed 2 variable state filters in series consuming around 50mA.
Reference: https://sound-au.com/articles/st-var-f2.gif
I ask because the circuit works fine without any both caps and I don't know if I'll be able to live without them in the long term, but I would like to skip them for space reasons if safe/possible.
AI: Both capacitors are noise filters. C75 works with the Thevenin equivalent of R124 and R178 to form a single-pole lowpass filter. You want this corner frequency to be significantly below the lowest signal frequency of interest.
C40 both filters noise on the power supply rail, and lowers its impedance caused by wiring and pc board trace resistances and inductances. Typically you want one such large capacitance per xx square inches of circuit area, plus smaller capacitors right at the power pins of each IC. The standard part is a 0.1 uF ceramic cap with the shortest possible leads/traces to the chip pins, one cap per power pin.
Check your numbers - 50 mA is way too high for the linked schematic. Also, most of the power supply current does not go into/out of the virtual GND. The GND circuit output sees only the algebraic sum of all circuit ground currents.
Update:
C40 filters noise on the power rail, but more importantly it filters noise caused by the signal going through the opamp. A portion of the current at the power pin is the static current needed to operate the internal circuits, but another portion is the amplified signal current going into and out of the output pin. If the supply rail impedance at the IC pin at the signal frequencies is not zero, the signal current will appear as a varying voltage at the power pin. This varying voltage can now appear across the opamp's input circuit as an unwanted form of feedback, sometimes causing the circuit to break into oscillation. This is especially true with linear audio power amplifier chips. The LM386 makes a fair AM radio transmitter.
The non-zero impedance of the power connection comes from both the output impedance of the source (at signal frequencies, not just at DC), and wire and pc board resistance and inductance. Because electrolytic capacitors usually do not have good high-frequency performance, a compromise is to have large caps in the area for low frequency decoupling, and smaller caps with better high-frequency behavior right at the IC pins to get the impedance at the signal frequencies down as low as possible. These caps also supply some signal current during transients, so the size does matter. 0.1 uF is the standard value for general-purpose work at low signal currents. At 10 mA and above I jump to a 1 uF ceramic at the pins. In many Analog Devices application circuits, they show a 0.1 uF ceramic and 10 uF electrolytic in parallel right at the device pins.
Update-2:
Besides acting as an energy store for signal transient currents, C40 is the shunt leg of a lowpass filter. The series leg is the combination of resistances and inductances in the wires and pc board traces between the power source and C40, plus the output impedance of the power source itself. Note that these are complex impedances, not simple resistances; their values vary with frequency. You can expect them to be higher at a signal current frequency of 10 kHz compared to a signal current of 1 kHz.
These are very small impedance values, difficult to measure and messy to calculate; for normal circuits and wiring, less than 1 ohm. Because an electrolytic capacitor has a relatively high equivalent series inductance, its impedance increases at high frequencies. This is why good design practice is to add a second lowpass filter right at the IC power pin, this time with a ceramic capacitor that has a much higher self-resonant frequency. Some Analog Devices app notes (love me ADI docs!) show a 10 ohm resistor in series with the power source, to give the decoupling capacitor(s) a higher series resistance to work with.
A search for power supply decoupling (no quotation marks) returned many documents and videos in exactly 0.5 seconds. Like this:
https://www.eetimes.com/bypass-or-decouple-your-way-to-power-supply-noise-reduction/
And, of course, this:
https://www.analog.com/media/en/training-seminars/tutorials/MT-101.pdf
At the end are links to eleven (11) other documents on this topic. |
H: Is it safe to connect metal body capacitors with a metal heatsink?
I have multiple metal case capacitors that I need to cool. The thermal tape I use is conductive (carbon based). Also larger heatsink on the left might touch capacitors on the left side. The question is, is it safe to do so? I assume that yes, because capacitors' metal cases should be isolated from the rest of it (only pins is actually connected, right?) - but I'm not 100% sure.
AI: I have no direct answer, but it's rather easy to test: take a multi-meter (in continuity tester mode, or if it don't have it in resistor mode,) and check if there is a connecton between metal and each of the pins.
If you don't have a multimeter, you can even do it with a battery and a LED+resistor or another small lamp. Just be careful not to apply reverse polarity on the capacitor (ie to test if negative pin is connected to case, connect negative pin to battery minus and put the LED and resistor between case and battery + ; to test if positive pin is connected to case, connect the positive pin to battery +, and put LED+resistor between case and battery -.
Be careful not to use a battery voltage greater than the capacitor rating (2.5V for the ones on the left if I read right.) |
H: How can get my LM2776 simulation in KiCAD working
I'm a beginner to both KiCAD and PCB design. I'm using KiCAD 6.0 on a mac. I'm trying to learn simulation and although the simulation basics seem straightforward enough, I have trouble importing models.
The above is my sample circuit. Now, it may include obvious flaws that I'm missing, since LM2776 is a new part for me, but I tried to make it similar to how its use is described on the datasheet. I'm planning to use it though in my circuits so I'd like to simulate its function before I try it out on the breadboard - I skipped the decoupling caps since I thought I wouldn't need them due to the noise-free current.
I used the built-in LM2776 symbol, but got the SPICE model from UltraLibrarian, which seems to be the official TI one. I chose the LM2776_TRANS model in the SPICE library.
If I understand correctly, the SPICE model's pinouts are described on this line:
.SUBCKT LM2776_TRANS Cn Cp EN VIN VOUT GND
so I defined the alternate node sequence thus: 6,5,4,3,1,2
I also switched the compatibility mode to PSpice. I would have included the SPICE model itself here as well, but SE the character limit ran out.
... but as you can suspect, it didn't work. The simulator's output was thus:
Compatibility modes selected: ps
Circuit: KiCad schematic
Reducing trtol to 1 for xspice 'A' devices
Doing analysis at TEMP = 27.000000 and TNOM = 27.000000
Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Note: Starting true gmin stepping
Trying gmin = 1.0000E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 5.6234E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 8.6596E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.6466E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9105E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9775E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9944E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9986E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9996E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Last gmin step failed
Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: True gmin stepping failed
Note: Starting dynamic gmin stepping
Trying gmin = 1.0000E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 5.6234E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 8.6596E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.6466E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9105E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9775E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9944E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9986E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Further gmin increment
Trying gmin = 9.9996E-03 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Last gmin step failed
Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: Dynamic gmin stepping failed
Note: Starting source stepping
Supplies reduced to 0.0000% Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Trying gmin = 1.0000E-02 Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
Warning: gmin step failed
Warning: source stepping failed
Transient solution failed -
Last Node Voltages
------------------
Node Last Voltage Previous Iter
---- ------------ -------------
net-_v1-pad1_ 0 0
net-_c1-pad1_ 0 0
net-_c1-pad2_ 0 0
xu1.n17015088 0 0.00455991 *
xu1.e 0 -0.00911982 *
xu1.en_ok 0 0
xu1.e_abm4_int1 0 0
xu1.n16871772 0 0.00455991 *
xu1.n16760001 0 0
xu1.phi1 0 0
xu1.e_abm2_int1 0 0
xu1.phi2 0 0
xu1.shdn 0 0
net-_r2-pad2_ 0 0.00455991 *
xu1.g_abmii4_int1 0 0
unconnected-_u1-pad4_ 0 0
xu1.ishdn 0 0
xu1.quies 0 0
xu1.n17384594 0 0
xu1.e_abm8_int1 0 0
xu1.e_abm3_int1 0 0
xu1.phi 0 0
xu1.cpump 0 0
xu1.x_u2.inp1 0 0
xu1.x_u2.inm1 0 0
xu1.n16760455 0 0
xu1.x_u2.inp2 0 0
xu1.x_u2.ehys_int1 0 0
xu1.x_u2.1 0 0
xu1.n16760389 0 0
xu1.x_u2.eout_int1 0 0
xu1.n17384614 0 0
xu1.g_abmii2_int1 0 0
xu1.prech_pulse 0 0
xu1.n17221946 0 0
xu1.u2_ctrl_rdiv 0 0
xu1.u2_ctrl_n16844013 0 0
xu1.x_u2_ctrl_u10.yint 0 0
xu1.x_u2_ctrl_u10.e_abmgate_int1 0 0
xu1.u2_ctrl_uvlo 0 0
xu1.u2_ctrl_n16785976 0 0
xu1.u2_ctrl_n16842955 0 0
xu1.x_u2_ctrl_u3.inp1 0 0
xu1.x_u2_ctrl_u3.inm1 0 0
xu1.u2_ctrl_thres_offset 0 0
xu1.x_u2_ctrl_u3.inp2 0 0
xu1.x_u2_ctrl_u3.ehys_int1 0 0
xu1.x_u2_ctrl_u3.1 0 0
xu1.pfm 0 0
xu1.x_u2_ctrl_u3.eout_int1 0 0
xu1.x_u2_ctrl_u18.yint 0 0
xu1.x_u2_ctrl_u18.e_abmgate_int1 0 0
xu1.u2_ctrl_n16785492 0 0
xu1.x_u2_ctrl_u9.yint 0 0
xu1.x_u2_ctrl_u9.e_abmgate_int1 0 0
xu1.x_u2_ctrl_u2.inp1 0 0
xu1.x_u2_ctrl_u2.inm1 0 0
xu1.u2_ctrl_n16786076 0 0
xu1.x_u2_ctrl_u2.inp2 0 0
xu1.x_u2_ctrl_u2.ehys_int1 0 0
xu1.x_u2_ctrl_u2.1 0 0
xu1.u2_ctrl_n16786106 0 0
xu1.x_u2_ctrl_u2.eout_int1 0 0
xu1.e_abm7_int1 0 0
xu1.pi 0 0
xu1.ilim 0 0
xu1.n17512460 0 1e-14
xu1.x_u21.yint 0 0
xu1.x_u21.e_abmgate_int1 0 0
xu1.n16759705 0 0
xu1.n16759819 0 0
xu1.x_u4.inp1 0 0
xu1.x_u4.inm1 0 0
xu1.x_u4.inp2 0 0
xu1.x_u4.ehys_int1 0 0
xu1.x_u4.1 0 0
xu1.n17345547 0 0
xu1.n17324527 0 0
xu1.x_u4.eout_int1 0 0
xu1.ilim_comp 0 0
xu1.n17385154 0 0
xu1.n17495282 0 0
xu1.n17549214 0 0
xu1.e_abm11_int1 0 0
xu1.x_u22.qint 0 0
xu1.x_u22.gq_int1 0 0
xu1.n16759799 0 0
xu1.x_u22.my5 0 -0.0498103 *
xu1.x_u22.myvss 0 0
xu1.x_u22.qqq 0 0
xu1.x_u22.x3.yint 0 0
xu1.x_u22.x3.e_abmgate_int1 0 0
xu1.x_u22.qqqd1 0 0
xu1.x_u22.qbr 0 0
xu1.x_u22.eqb_int1 0 0
xu1.n16759875 0 0
xu1.x_u26.qint 0 0
xu1.x_u26.gq_int1 0 0
xu1.n17522872 0 0
xu1.n17324921 0 0
xu1.x_u26.my5 0 -0.0498103 *
xu1.x_u26.myvss 0 0
xu1.x_u26.qqq 0 0
xu1.x_u26.x3.yint 0 0
xu1.x_u26.x3.e_abmgate_int1 0 0
xu1.x_u26.qqqd1 0 0
xu1.x_u26.qbr 0 0
xu1.x_u26.eqb_int1 0 0
xu1.n17525531 0 0
xu1.n17391639 0 0
xu1.x_u27.yint 0 0
xu1.x_u27.e_abmgate_int1 0 0
xu1.n17548583 0 -1e-14
xu1.n17548547 0 0
xu1.n17551684 0 0
xu1.n17551687 0 1e-14
xu1.e_abm12_int1 0 0
xu1.x_u15.yint 0 0
xu1.x_u15.e_abmgate_int1 0 0
xu1.n17324922 0 0
xu1.x_u25.yint 0 0
xu1.x_u25.e_abmgate_int1 0 0
xu1.e_abm6_int1 0 0
xu1.x_u_osc_u131.yint 0 0
xu1.x_u_osc_u131.e_abm_int1 0 0
xu1.u_osc_n16690266 0 0
xu1.u_osc_n16690364 0 0
xu1.u_osc_muxclk 0 0
xu1.x_u_osc_u134.yint 0 0
xu1.x_u_osc_u134.e_abmgate_int1 0 0
xu1.u_osc_n16690380 0 0
xu1.u_osc_n16690352 0 0
xu1.u_osc_n16690808 0 0
xu1.x_u_osc_u135.e_current_int1 0 0
xu1.u_osc_n16690502 0 -0.0498103 *
xu1.x_u_osc_u136.x1.yint1 0 0
xu1.x_u_osc_u136.x1.e_abmgate1_int1 0 0
xu1.x_u_osc_u136.x1.yint2 0 0
xu1.x_u_osc_u136.x1.yint3 0 0
xu1.x_u_osc_u136.x1.e_abmgate2_int1 0 0
xu1.x_u_osc_u136.clkdel 0 0
xu1.x_u_osc_u136.x2.yint 0 0
xu1.x_u_osc_u136.x2.e_abmgate_int1 0 0
xu1.x_u_osc_u136.clkint 0 0
xu1.x_u_osc_u136.qint 0 0
xu1.x_u_osc_u136.gq_int1 0 0
xu1.u_osc_n16690232 0 0
xu1.x_u_osc_u136.my5 0 -0.0498103 *
xu1.x_u_osc_u136.myvss 0 0
xu1.x_u_osc_u136.qqq 0 0
xu1.x_u_osc_u136.x3.yint1 0 0
xu1.x_u_osc_u136.x3.e_abmgate1_int1 0 0
xu1.x_u_osc_u136.x3.yint2 0 0
xu1.x_u_osc_u136.x3.yint3 0 0
xu1.x_u_osc_u136.x3.e_abmgate2_int1 0 0
xu1.x_u_osc_u136.qqqd1 0 0
xu1.x_u_osc_u136.qbr 0 0
xu1.x_u_osc_u136.eqb_int1 0 0
xu1.x_u_osc_u132.yint1 0 0
xu1.x_u_osc_u132.e_abmgate1_int1 0 0
xu1.u_osc_n16690334 0 0
xu1.x_u_osc_u132.yint2 0 0
xu1.x_u_osc_u132.yint3 0 0
xu1.x_u_osc_u132.e_abmgate2_int1 0 0
xu1.x_u_osc_u133.yint1 0 0
xu1.x_u_osc_u133.e_abmgate1_int1 0 0
xu1.x_u_osc_u133.yint2 0 0
xu1.x_u_osc_u133.yint3 0 0
xu1.x_u_osc_u133.e_abmgate2_int1 0 0
xu1.x_u28.yint 0 0
xu1.x_u28.e_abmgate_int1 0 0
b.xu1.x_u28.be_abmgate#branch 0 1 *
b.xu1.x_u_osc_u133.be_abmgate2#branch 0 1 *
b.xu1.x_u_osc_u133.be_abmgate1#branch 0 0
b.xu1.x_u_osc_u132.be_abmgate2#branch 0 1 *
b.xu1.x_u_osc_u132.be_abmgate1#branch 0 0
b.xu1.x_u_osc_u136.beqb#branch 0 1 *
b.xu1.x_u_osc_u136.x3.be_abmgate2#branch 0 0
b.xu1.x_u_osc_u136.x3.be_abmgate1#branch 0 0
b.xu1.x_u_osc_u136.bgq#branch 0 0
b.xu1.x_u_osc_u136.x2.be_abmgate#branch 0 0
b.xu1.x_u_osc_u136.x1.be_abmgate2#branch 0 1 *
b.xu1.x_u_osc_u136.x1.be_abmgate1#branch 0 0
b.xu1.x_u_osc_u135.be_current#branch 0 1e-05 *
b.xu1.x_u_osc_u134.be_abmgate#branch 0 0
b.xu1.x_u_osc_u131.be_abm#branch 0 0
b.xu1.be_abm6#branch 0 0
b.xu1.x_u25.be_abmgate#branch 0 1 *
b.xu1.x_u15.be_abmgate#branch 0 1 *
b.xu1.be_abm12#branch 0 1e-09 *
b.xu1.x_u27.be_abmgate#branch 0 1 *
b.xu1.x_u26.beqb#branch 0 1 *
b.xu1.x_u26.x3.be_abmgate#branch 0 0
b.xu1.x_u26.bgq#branch 0 0
b.xu1.x_u22.beqb#branch 0 1 *
b.xu1.x_u22.x3.be_abmgate#branch 0 0
b.xu1.x_u22.bgq#branch 0 0
b.xu1.be_abm11#branch 0 5.5e-05 *
b.xu1.x_u4.beout#branch 0 0
b.xu1.x_u4.behys#branch 0 0
b.xu1.x_u21.be_abmgate#branch 0 0
b.xu1.be_abm7#branch 0 0
b.xu1.x_u2_ctrl_u2.beout#branch 0 0
b.xu1.x_u2_ctrl_u2.behys#branch 0 0
b.xu1.x_u2_ctrl_u9.be_abmgate#branch 0 1 *
b.xu1.x_u2_ctrl_u18.be_abmgate#branch 0 0
b.xu1.x_u2_ctrl_u3.beout#branch 0 0
b.xu1.x_u2_ctrl_u3.behys#branch 0 0
b.xu1.x_u2_ctrl_u10.be_abmgate#branch 0 1 *
b.xu1.bg_abmii2#branch 0 0
b.xu1.x_u2.beout#branch 0 0
b.xu1.x_u2.behys#branch 0 0
b.xu1.be_abm3#branch 0 0
b.xu1.be_abm8#branch 0 0
b.xu1.bg_abmii4#branch 0 0
b.xu1.be_abm2#branch 0 1 *
b.xu1.be_abm4#branch 0 0
e.xu1.x_u28.e_abmgate#branch 0 0
e.xu1.x_u_osc_u133.e_abmgate2#branch 0 0
e.xu1.x_u_osc_u133.e_abmgate1#branch 0 0
e.xu1.x_u_osc_u132.e_abmgate2#branch 0 0
e.xu1.x_u_osc_u132.e_abmgate1#branch 0 0
e.xu1.x_u_osc_u136.eqb#branch 0 0
e.xu1.x_u_osc_u136.x3.e_abmgate2#branch 0 0
e.xu1.x_u_osc_u136.x3.e_abmgate1#branch 0 0
e.xu1.x_u_osc_u136.eq#branch 0 0
e.xu1.x_u_osc_u136.x2.e_abmgate#branch 0 0
e.xu1.x_u_osc_u136.x1.e_abmgate2#branch 0 0
e.xu1.x_u_osc_u136.x1.e_abmgate1#branch 0 0
e.xu1.x_u_osc_u135.e_current#branch 0 0
e.xu1.x_u_osc_u134.e_abmgate#branch 0 0
e.xu1.x_u_osc_u131.e_abm#branch 0 0
e.xu1.e_abm6#branch 0 0
e.xu1.x_u25.e_abmgate#branch 0 0
e.xu1.x_u15.e_abmgate#branch 0 0
e.xu1.e_abm12#branch 0 0
e.xu1.x_u27.e_abmgate#branch 0 0
e.xu1.x_u26.eqb#branch 0 0
e.xu1.x_u26.x3.e_abmgate#branch 0 0
e.xu1.x_u26.eq#branch 0 0
e.xu1.x_u22.eqb#branch 0 0
e.xu1.x_u22.x3.e_abmgate#branch 0 0
e.xu1.x_u22.eq#branch 0 0
e.xu1.e_abm11#branch 0 0
e.xu1.x_u4.eout#branch 0 0
e.xu1.x_u4.ehys#branch 0 0
e.xu1.x_u4.ein#branch 0 0
e.xu1.x_u21.e_abmgate#branch 0 0
e.xu1.e_abm7#branch 0 0
e.xu1.x_u2_ctrl_u2.eout#branch 0 0
e.xu1.x_u2_ctrl_u2.ehys#branch 0 0
e.xu1.x_u2_ctrl_u2.ein#branch 0 0
e.xu1.x_u2_ctrl_u9.e_abmgate#branch 0 0
e.xu1.x_u2_ctrl_u18.e_abmgate#branch 0 0
e.xu1.x_u2_ctrl_u3.eout#branch 0 0
e.xu1.x_u2_ctrl_u3.ehys#branch 0 0
e.xu1.x_u2_ctrl_u3.ein#branch 0 0
e.xu1.x_u2_ctrl_u10.e_abmgate#branch 0 0
e.xu1.e_u2_ctrl_e1#branch 0 0
e.xu1.x_u2.eout#branch 0 0
e.xu1.x_u2.ehys#branch 0 0
e.xu1.x_u2.ein#branch 0 0
e.xu1.e_abm3#branch 0 0
e.xu1.e_abm8#branch 0 0
e.xu1.e_abm2#branch 0 0
e.xu1.e_abm4#branch 0 0
v.xu1.x_u_osc_u136.v2#branch 0 0
v.xu1.x_u_osc_u136.v1#branch 0 0
v.xu1.v_u_osc_v45#branch 0 0
v.xu1.v_u_osc_v46#branch 0 0
v.xu1.v_v22#branch 0 0
v.xu1.v_v12#branch 0 0
v.xu1.v_v14#branch 0 0
v.xu1.v_v27#branch 0 0
v.xu1.v_v26#branch 0 0
v.xu1.v_v15#branch 0 0
v.xu1.x_u26.v2#branch 0 0
v.xu1.x_u26.v1#branch 0 0
v.xu1.x_u22.v2#branch 0 0
v.xu1.x_u22.v1#branch 0 0
v.xu1.v_v23#branch 0 0
v.xu1.v_v18#branch 0 0
v.xu1.v_v9#branch 0 0
v.xu1.v_u2_ctrl_v10#branch 0 0
v.xu1.v_u2_ctrl_v9#branch 0 0
v.xu1.v_u2_ctrl_v11#branch 0 0
v.xu1.v_u2_ctrl_v12#branch 0 0
v.xu1.v_v16#branch 0 0
v1#branch 0 0
No. of Data Rows : 0
doAnalyses: iteration limit reached
run simulation(s) aborted
Background thread stopped with timeout = 0
Reset re-loads circuit KiCad schematic
Circuit: KiCad schematic
So... how have I screwed up my design and settings?
AI: The simulator is telling you the problem:
Warning: singular matrix: check nodes unconnected-_u1-pad4_ and unconnected-_u1-pad4_
You need to connect pin 4 to VIN. Even though the datasheet shows this pin unconnected on the first page, you can read further to the pin table to see recommended configurations. |
H: What is the min and max input voltage range of a buck converter to maintain efficiency above 90%
I want to design a stepdown converter from 72V lithium ion battery to 12V, 5A. I am torn between using a flyback converter and a buck converter. Which topology will give me maximum efficiency at that power level?
AI: I am torn between using a flyback converter and a buck converter.
Which topology will give me maximum efficiency at that power level?
Without a shadow of doubt, a buck converter will provide superior efficiency compared to a flyback converter by nearly double figures of percentage points.
Here's a good benchmark (LTC3810) for consideration: -
Whatever device you go for, choose a synchronous converter i.e. one with a MOSFET (as per M2 above) instead of a diode.
Here's one (LTC7810) that is slightly more efficient on a 70 volt power supply: -
It can produce 12 volts at 5 amps from a 72 volt supply at about 95% efficiency. Probably near to about as good as it gets realistically. It's also good at up to 140 volts too. It's even 90%+ efficient at load currents as low as 3 mA too! A really nice bit of kit.
What is the min and max input voltage range of a buck converter to
maintain efficiency above 90%
The graphs in the pictures above give you that answer. If you are going to build one of these, don't skimp any anything. You need a damn fine layout with extensive ground planes and star-point power feeds, top quality inductors and really decent MOSFETs. You might also need to add an external supply filter system to reduce EMI that might be passed back to other circuits sharing the 72 volt supply. They are awesome though. Good luck finding one from TI that gives you confidence in the data sheet. Maybe this one should be considered: - |
H: Steer multiple LEDs with one microcontroller pin
I want to show a program state with LEDs. There are 22 steps, each step is represented by an LED.
only one LED is on at a time
the sequence is set (forward or backwards).
I have only one pin left on my MCU, maybe two.
Basically, I'd like to have the pin work as a 'clock'. For every pulse, the "next" LED is switched on, all other LEDs are off.
I could use a clock to binary IC. (e.g. 74HC393 Binary Counter) This would create a nibble, which I could then feed into a multiplexer (e.g. 700-MAX336CPI+) which would switch one of its 16 outputs on at a time. (I can live with 16 steps).
I want to make it relatively cheap. I wonder if there is a more elegant solution. Maybe with a specialized IC, or if there is a solution with simple discrete components, oh, maybe I could even use a little servo to point at the right step... What comes to your mind?
AI: I'd use 3 4017 counters, chained together. Just clock the chain from your microcontroller. The 4017 is very cheap, has an output for each LED (so no decoding), and can be set up very easily to be chained. You would need 3 for your application. The 23 pin output should just reset them all to restart the count.
Edit: You might be able to hack up something using diodes and pull-downs to test whether the 'reset' (ie, the 23 output) is high using the clock pin. A diode from 23 to the clock output through a 10k resistor, with a 100k resistor at the pin as a pull-down. When the clock is being driven low by the uC, momentarily change it to an input. If it stays low, it's not the end yet. You might also have to test 24 (ie, have them both connected to clock through a diode and 10k resistor) since the pullup will probably clock it again (but only once, until you drive it low again). Not sure, haven't tried it, but probably.
Much easier just to blow another uC pin to test 23, but you said you didn't want to do that. |
H: Is there a way to simulate this in LTspice?
There is a clock (pulse generator) and a component or a model will increase its output 10 mV at each rising edge of the pulse generator. In other words the black waveform will generate the green one below:
How can this be done?
AI: How can this be done?
If you just want to do this in a simulation, then use two voltage sources, a PWL and a clock voltage source.
PWL(0 0 0.1 0 0.1000001 0.1 0.2 0.1 0.2000001 0.2 0.3 0.2 0.3000001 0.3 0.4 0.3)
If it needs to be a circuit, you could have an op amp integrator that turns on during the rising edge and increases the voltage of the integrator only during the rising edge of the clock. |
H: Why does differential op-amp require mid-point biasing at its input to prevent clipping?
There's an AC signal, 1 V amplitude, which is the input to an op-amp, in differential mode:
However, the output gets clipped and the amplitude isn't unity for some reason, even though gain is set to be 1.
To "fix" this clipping, one needs to "bias" the op-amp by putting a reference midpoint (resistor divider network for example) at the positive terminal of op-amp, like this:
An "explanation" is that:
for the opamp to swing high, your input signal has to go below the
ground, so you set up "virtual ground" somewhere between rails so that
your opamp has some reference against which to invert the input signal
Or the "op-amp can't go beyond its output rails" etc.
These explanations do not help me understand the why.
To understand why, I'd like to know how the output of the OP284 changes with changing inputs to the OP284.
Is this approximately what the OP284 looks like?
Let's assume it is, which is just a bunch of BJTs.
V1 = negative terminal input to U1
V2 = positive terminal input to U1.
Output of U1 is: \$ V_{out} = Gain * (V_2- V1) \$
Gain is unity, so it's just: \$(V_2- V1)\$
Let's assume V5 (input source AC signal) goes like this:
At t = 1, Vin (positive terminal of V5) -> V1 is 0.1 V, V2 = 0 V.
t = 2, Vin = 0.2 V, V2 = 0 V
t = 3, Vin = 0.3 V, V2 = 0 V
For these three time instances, what's Vout?
Well, from figure 4, Q2 is closed off pretty much all the time, right? Q1 is slightly on, so Vo1 is about 0.1 V, while Vo2 is the maximum 5 V? (VCC5 rail).
So what about Vout when:
t = 10, Vin = 1 V, V2 = 0 V
t = 11, Vin = 0.9 V, V2 = 0 V.
...
t = 20, Vin = 0 V, V2 = 0 V
t = 21, Vin = -0.1 V, V2 = 0 V
?
AI: Why does differential op-amp require mid point biasing at its input to
prevent clipping?
It's not just a differential op-amp circuit, it's any linear op-amp circuit...
So, you are confusing yourself by not recognizing the basic problem. The confusion arises because you have chosen an overcomplicated circuit to learn a very basic thing: -
The above is not a differential op-amp; it's a single-ended input and the op-amp's negative rail is at ground potential. It's an inverting amplifier with a gain of unity; virtually as simple as it gets.
So, when the input signal goes below 0 volts, in order to keep Vin- at the same value as Vin+ (which happens to be 0 volts), the op-amp output rises to a positive value. That positive value enforces Vin- == Vin+. Not a millivolt higher nor a millivolt lower; that's what the op-amp is conditioned to do; it must makes Vin- == Vin+.
It has no other task.
However, if the input signal has a positive value then the op-amp output cannot make its output go below 0 volts and thus it clips. The output is limited to values within its power supply range; some are better and some are worse of course.
However, the output gets clipped and the amplitude isn't unity for
some reason, even though gain is set up to be 1.
No, of course it isn't unity; it's clipped; it's shortened; it's reduced.
To understand why, I'd like to know how output of OP284 changes with
changing inputs
It's got nothing to do with the op-amp model number; all op-amps will do the same.
Back to the basic circuit but with an input capacitor
It's a the same story; the op-amp can't fight against the input signal rising positively above 0 volts but, because we have added a capacitor there's a chance we can shift the output up a few volts and avoid it clipping: -
So now, the op-amp has a fight it can win; it's trying to make Vin- have a DC value of +2.5 volts; the op-amp can pull and push that voltage around by moving its output towards the positive supply rail or by moving towards ground. It's a symmetrical situation and, unless the input has an amplitude that is close to and beyond the power rails, the op-amp will produce a relatively undistorted output signal. |
H: Understanding shutdown mode in STM32L47
I am using an STM32L476 for my application and want to use shutdown mode to conserve the battery life of the device.
I was going through the reference manual and found the following:
Shutdown mode: VCORE domain is powered off. All clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI16, the LSI and the HSE are disabled. The LSE can be kept running. The system clock, when exiting the Shutdown mode, is MSI at 4 MHz. In this mode, the supply voltage monitoring is disabled and the product behavior is not guaranteed in case of a power voltage drop.
I have the following questions:
What does product behavior is not guaranteed in case of a power voltage drop mean?
I have a battery operated device (battery voltage 4.2 - 2.7 V), an LDO supplies a constant 3.3 V. I have a cutoff voltage of 3.3 V; after 3.3 V no supply will be given to the controller.
Will I be able to use shutdown mode for my application? Or do I need to use some other mode?
AI: It means that the MCU cannot detect an undervoltage condition and reset itself if the supply voltage drops below the minimum operating voltage, but does not go low enough to be considered to be fully powered off, the internal state of any circuit in the MCU can't be guaranteed and it may not wake up from shutdown mode.
If the supply does not dip below minimum MCU operating voltage while the MCU is in shutdown mode then that is fine. |
H: Filters: what kind of capacitor?
Until recently, I (foolishly) believed that the capacitance of a given capacitor was the capacitance given by the datasheet +- the tolerance.
I recently learned about the DC derating of MLCC (multi-layer ceramic capacitors), which can be quite huge (I have seen some with 80% reduction in capacity). What's more, this derating curve seems to be missing from datasheets (you have to dig though the manufacturer's website to find it).
So, for filtering signals with a DC component (for example an RC filter), what kind of capacitors do you usually use?
Do you still use MLCC and look up the derating every time? Or do you use another type that is more stable?
Sometimes, of course, you don't care at all about the precise cut-off frequency of your filter, and you can accept a factor 5 (or you can just derate by something smaller (50%?), so you know you will have an error one way or the other, but smaller.
But sometimes, you really have a trade-off between getting a well-filtered signal but still have the output of the filter changing "quickly" if the output changes, and then it would be nice if the cut-off frequency remains within 10-20% of what you decided.
AI: The options (not all good) are:
Don't care: tolerate/accept large variations in capacitance. Not always possible, depending on the application.
Remove the DC bias (AC-couple the signal) (and then possibly re-bias post-filter). Not always possible, depending on the application.
Try to calculate the derating and compensate for it. As you noticed, not all datasheets include derating curves. That's because the derating depends very heavily on the dielectric and even the package size and is very difficult to precisely control. This is even harder if the bias level isn't fixed.
Use a different type of capacitor with stable capacitance in the presence of DC bias. Film capacitors are popular in the filtering role for many applications. |
H: COM port not recognised by bootloader application PIC18F452
I want to program my PIC18F452 from long distances using a SIM808. by searching in the net I found out that I should follow this procedure:
I should write two different programs in the micro: a bootloader program and the main program.
The bootloader program checks the latest version and if it is the same, it enters the main program or otherwise deletes the original program and launches the new program.
I also need a site to put the binary file of my program there and the binary file will be downloaded exactly when the site opens, and then I should open the link with the sim808 and drop the binary file instead of the original program that was deleted.
For the bootloader, I'm using the application and the tutorial in the below link.
Now my problem is:
I can write the bootloader hex file on the micro but the bootloader PC application doesn't recognize the COM ports when I connect the PIC using CP2102 USB to TTL module. What should I do? Are there some drivers I need to install for this?
Is the procedure that I emphasized correct?
https://github.com/MicrochipC/Microchip_PIC_Bootloader_PIC18Fx52_TruTrack
AI: The USB device is COM15 and the program can only open COM1 through COM4.
Change the USB device name to something that the program can open. |
H: Boolean function of digital comparator
The boolean equation or function for a binary digital comparator is (A3&~B3)|| (x3&A2&~B2)|| (x3&x2&A1&~B1)|| (x3&x2&x1&A0&~B0).
This equation is considered to be the correct digital comparator.
But according to me (A3&~B3)|| (A2&~B2)|| (A1&~B1)|| (A0&~B0) gives the same result as the previous mentioned equation.
I can’t figure out the reason for adding xi with every comparison, it just makes the circuit more complex.
AI: First of all you should be using '&'for representing and operation, rather than '^' as the latter is usually used for xor operation. This creates a lot of confusion.
The Boolean expression given by : A3^~B3|| x3^A2^~B2|| x3^x2^A1^~B1|| x3^x2^x1^A0^~B0. is correct one and the latter one is incorrect. You can consider A=0100 and B=1000.
Now according to your proposed expression, The result will be 1, suggesting A is greater than B, which is incorrect. This is because for n bit number comparison, while comparing nth bit, it must be made sure that the previous n-1 bits (from MSB side are equal), else there is no point carrying out further evaluation.
The first expression, if x3=1, it means that A3 and B3 are equal, so now we compare A2 and B2. If x2=1, meaning A2 and B2 are equal, so comparing A1 and B1 and so on. Therefore your expression is incomplete .
Thanks |
H: RPM of 100% Efficient Motor?
This is considering an ideal scenraio where we have a 100% efficient motor at all RPMs.
If we start with $$\omega=\frac{P_{Mech}}{\tau}$$
Since the motor is provided with eletrical power, the mechanical power will be some multiple of this power. $$\omega=\frac{VI\eta}{\tau}$$ Now we let \$\eta=1\$ and notice that \$\frac{I}{\tau}=\frac{1}{k_{T}}\$ where \$k_{T} \$ is the torque constant. Therefore; $$\omega=\frac{V}{k_{T}}$$
So lets say we provide 5V and the no-load angular velocity is \$100 rad/sec\$. With this motor, according to the equation above the angular velocity should remain \$100 rad/sec\$ irrespective of the load we apply to the shaft of the motor. So the angular velocity of a 100% efficient motor is constant regardless of load applied?
Looking at the same equation but for a non-ideal motor; $$\omega=\frac{V\eta}{k_{T}}$$ At a constant voltage, when load torque is applied the efficiency decreases (Friction, internal power losses etc) which results in the decrease of angular velocity. But with no losses in electrical power this angular velocity should remain constant, right?
AI: But with no losses in efficiency this angular velocity should remain constant, right?
No. Efficiency and speed relation to voltage are not the same thing.
Let's consider an ideal DC motor wound with superconducting wire, with a wound field, that can be either in series with or parallel to the armature, driving a load torque, or twice that load torque.
The parallel wound motor, which is equivalent to a permanent magnet motor, will spin at a speed controlled by the applied voltage, and draw a current proportional to the torque. As there is no winding resistance, when the load torque and hence the current doubles, the speed will stay the same. The mechanical power delivered and the electrical power absorbed will both double, and the lossless motor stays 100% efficient.
The series wound motor, often used for cranes and car starter motors for its high starting torque, has a very variable speed, due to the magnetic field being proportional to the current drawn. This means the torque is proportional to current squared, or current proportional to square root of torque. As the load torque on this motor doubles, the current increases to 1.4 times, reducing the speed to 0.7 of what it was due to the increase in field. The output mechanical power and the input electrical power both increase by 40%, and the lossless motor stays 100% efficient. |
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