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H: MCP3008 (ADC with SPI interface) what to do with unused pins?
I'm building embedded system based on a Raspberry Pi with an MCP3008 for analog inputs. I have few questions regarding the PCB board design.
What should I do with unused analog inputs on my MCP3008?
What other countermeasures I can use for minimizing the analog noise jeopardizing my ADC measurements? I don't want to use analog ground because that requires another supply circuit for ADC board and I want to power up the MCP3008 directly from my Raspberry Pi.
Any other advice?
For now I'm working with a prototype on a breadboard. The wires are long and unused ADC inputs are not connected to a ground. I can see quite a large amount of noise from time to time on my analog readings and I want to come up with good enough countermeasures in my final project in order to minimize noise observed on my prototype.
Final Project Results:
http://maqister.blogspot.com/2016/08/my-homemade-raspberry-pi-expansions.html
AI: Normally I would say tie the unused inputs to pin 14 (analog ground). But you say you can't use that. Why not? |
H: Understanding reference application of LM3404
I'm looking at LM3404 to drive a 10W LED (900mA, 9-12V) with PWM. The reference schematic they give is the following:
I'm trying to de-structure the diagram, and I'm struggling with the purpose of L1 and D1. D1 is a 2A shottky diode, and due to its position I believe that it might act as protection should SW get shorted out? Why shottky and not zener? Speed?
L1 is a 33uH inductor; coupled with CO1 seems like a low-pass LC filter? Would that make sense?
AI: The LM3404 is a switch mode current regulator, similar to a buck voltage regulator. The purpose of L1 is to store energy during each switching cycle and the purpose of D1 is to "catch" the inductor current when the switch is off.
When the switch turns on the inductor is connected to Vin and the current in the inductor starts to ramp up. That current flows through the LED and the current sense resistor. When the current reaches the appropriate value the switch turns off and the inductor current starts to ramp down. At that time the inductor current flows in the Schottky diode and through the LED. The Schottky has a low voltage drop and therefore improves the efficiency.
The current sense resistor Rsns provides feedback so that the part can modify the duty cycle to maintain the programmed current. |
H: LDO can't sink current?
I am designing a circuit to protect CMOS inputs from over voltage by using below circuit.
However, if the overvoltage is applied at Vin, the output of the LDO rises accordingly.
I designed circuit using LM3480 regulator. and Vin was 24V, with resistor = 1Kohm, that gives LDO sinking current of 19mA if it were to maintain 5V rated output voltage. The back to back diode i used is BAT54SLT1G schottkey barrier diode.
I looked at the datasheet, and in nowhere i can find such parameter that describes output sink current.
Am I supposed to look at other types of regulator such as shunt or switching?
AI: Most LDOs can't sink any current, only source.
This is a simplified schematic of an LM317.
The NPN output stage can only source current, it will become reverse biased if it is required to sink current. Other LDOs have PNP output stages but they also can't sink current, probably until the output voltage goes above the input voltage.
If you have a static load on the supply rail (more than 19 mA in your example - say a 220 ohm resistor) then it may not be a problem as that static load will sink the fault load.
The other thing I have done is put a zener across the clamp supply to provide path for the fault current, a 4.7V zener may be appropriate.
Even if you don't have external diodes most CMOS logic devices have diodes just as you have drawn but internal to the device.
Voltage references often have output stages that can source or sink, but they are too expensive to sue in this type of application.
An active clamp such as below may meet your needs, it won't inject any significant current into your supply - the current will pass through the PNP transistor to ground.
Does the input resistor have to be 1K? Can it be higher? That would reduce the current you have to divert.
simulate this circuit – Schematic created using CircuitLab |
H: Hi-Z state, MCU and transistors
I have a 3-phase motor h-bridge. The inputs to the motor require 3 different phases, +, -, and 0. I've got the circuit below that I'm using:
The problem is that there are three states required:
Q1 = Q2 = Low for 0
Q1 = High and Q2 = Low for +
Q1 = Low and Q2 = High for -
And typical logic is binary. However, I would expect a High-Z state (meaning no current would be flowing), to be equivalent to "off" for both Q1 and Q2, since these are BJTs. Is this something that can be depended on?
AI: Yes, no current will flow (except leakage current) if the input is open, provided the output voltage stays within a diode drop of the rails.
If the output voltage is driven beyond the rails by two diode drops then the internal protection network of the driver could conduct some current, though the transistors will bear the brunt of it- so a series base resistor might be a good idea. |
H: Why is there so little interest in powerline communcations?
It seems that a power line protocol would be a really good way to help increase the range and reliability of wireless IOT networks. Wireless networks are always going to have areas that are hard to reach, even with mesh topologies, and it seems like power-line communication is an obvious choice to bridge gaps in low bandwidth networks. Yet new IOT standards like Thread have no provision for integrating power-line communications.
Is there a technical reason for this to be the case, or is wireless just a "sexier" topic these days? I notice that available standards, X10 and UPB are closed and have royalties. Is the lack of a reasonable, open standard discouraging adoption?
AI: Well it's been a few years since I worked with it but at the time it was slower than wireless for one, I'm talking about the fast ethernet replacement speed parts not something simple and dead slow like X10. The good chips were controlled by pretty much one company and several patents but that looks like it's freed up now. Regardless the chips ran hot and sucked down a lot of power. Also they were limited in the amount of bandwidth they could use due to FCC conducted emissions rules, basically how much junk or modulated traffic they were allowed to stuff on the power line intentionally. At the time maybe 5-8 years ago they were lobbying the FCC to try to get more bandwidth allocated to them.
Then yes the tech was fairly closed back then so that was a little discouraging. Cost was another big factor it was cheaper to use a wifi module than a homeplug device. Of course there was a major shift from desktop to laptop, phones and tablets that all demanded wireless (hard to believe there was a time I had ethernet cords snaking over the top of my couch for our laptops :)
Now past that is a tricking little problem in the US about hopping phases. Your house get's 240 from the street and splits it at the panel into two sides of 120. Well the modulated signaling of power line communications can't really bridge that gap and there were all sorts of solutions such as having an electrician install a bridge in your fuse box... Or using wireless to hop.
But now you see it's starting to get more complicated. Manufactures don't want to saddle their wifi routers with the not insignificant cost of power line networking, so it's non standard. What you ask about range, could be fixed with multiple wifi routers working together, of course it could be fixed with two home plug devices too, but either way this is a problem for a small subset of users.
Overall it just didn't find it's place in terms of cost, performance, customer wants. There were some cases our marketing told us about that really wanted this for instance older all brick structures in Europe they said or other buildings that a wifi router had trouble penetrating, still though we had trouble justifying price for the equipment to build a powerline backed wifi network. Technically of course it could be done :)
That's the faster stuff, we also looked at exactly what you are talking about for slower speeds, and there were more options there as well although they were also hampered by the split phase problem. Then once you get outside the home it's difficult to get very far since it's hard to get through giant transformers. Inside the home what you say can be done, and is in fact done by smarthome (and probably others) next generation of X10 type equipment. They use a X10 like backbone and compliment it with lowspeed wireless to try to improve the network reliability of both. |
H: Connecting Solid State Relays To AC Heating Elements - Is this circuit correct?
I'm converting a 1500W toaster to a reflow oven with PID control, but I'd like to focus on the hardware aspect.
I've pulled the switches and controls out of the oven and I'm left with something like this as if the oven is in bake mode which is all heaters and the convection fan:
simulate this circuit – Schematic created using CircuitLab
At the bottom is the "new circuit". Is this a "good circuit" for the controlling the top and bottom heating elements? Anything to look out for? I'm open to suggestions for improvement of the design as well.
I'd like to keep the convection fan intact as to keep the top and bottom more evenly heated.(It's a shaded pole motor like this)
I'll be using all of the correctly rated hardware electrically and thermally speaking. Heatsinks and cooling fan will be used on the SSRs.
Update:
The second, modified, circuit with the SSRs works.
AI: Your new circuit (2nd diagram) should work just fine.
You need to calculate how much power the SSRs will be dissipating. Assume that there is a 1 Vac drop across each SSR. Because you didn't mention in your question how much current the oven is supposed to draw, we can't estimate how much heat you need to get rid of.
You may also want to put a SSR or relay on the convection fan. |
H: Charge LiPo 5S with 18.5V laptop power supply
Is it possible to charge 5000mah 5s lipo pack with cheap $10 HP laptop power supply without special LiPo charger? Just by connecting the leads. The charge rate would be less than 1C.
Power supply is 18.5V / 3.5A / 65W / AC/DC
Battery is 5S1P / 18.5v / 5Cell
Here is the battery -
Turnigy 5000mAh 5S 20C Lipo Pack
AI: The simple answer is no! A 5S lithium battery will require a voltage of 21 volts to fully charge. There are other problems that you would run into by just plugging in that power source such as limiting the currents so that the power supply doesn't burn out, but if you are serious about charging that battery, it just can't be done at that voltage with that laptop power supply.
To charge a lithium battery you need:
1) supply a constant controlled current appropriate for that battery until each cell reaches 4.2 volts.
2) At 4.2 volts, supply constant voltage of 4.2 volts per cell and allow the current to drop as the battery saturates and fills up.
3) Ideally this should be done with a charger that can actually charge and monitor each individual cell versus charging all 5 at once to avoid imbalances
4) lithium iron and the older lithium ion use different voltages! 4.2 is for the commonly used lipo and I used it only as an example for the lithium chemistry in general. |
H: Can this active-high scenario be achieved without an external pull down resistor
If I understand correctly, few microcontrollers offer internal pull down resistors on their input pins but almost all allow for internal pull up resistors to be configured.
Why exactly is that ?
I understand that for a push button scenario, we can implement logic to interpet
0V = ON (button pressed)
5V or disconnected = OFF (button not pressed, internal pull up activated)
But what if the input is coming from an external system that you cannot control where the following logic needs to be implemented
external system is not connected (floating) on the input : should translate to OFF
external system is providing 0V on the input : should translate to OFF
external system is providing 5V on the input : should translate to ON
In this case you need some kind of active-high setup, but for that the internal pull up gets in the way (as a floating value should not be considered HIGH).
Wouldn't it be useful in such a case to have an internal pull down resistor on the input ?
I could implement this by disabling the internal pull up and use an external pull down resistor by connecting the input to GND via the pulldown.
But can this also be achieved in some way without using an external pull down ?
AI: Following controllers have pull-down resistors (not a complete list and not every variant was looked at, so there might be exceptions):
STM32 family
MSP430
ATxmega
PIC24 has change notification pins with pull-downs
PIC32
NXP LPC800 (their smallest, so I'd say the bigger ones have it as well)
...
So I'd say there are a lot of options to get a controller with pull-down resistors integrated. Only the very low end seems not to integrate pull-down resistors, which makes sense as they are very cost sensitive. Oddly enough is that AVR chose not to integrate them into their UC3 series.
If you have absolutely no choice to switch over to a MCU with pull down resistors, then you could hook it up to an analog input pin and read the voltage with the ADC. A floating pin should give you varying values, if it is grounded or pulled high the variance should decrease drastically and in theory the value should read a solid min or a solid max of the ADC. I've not tried this in practice, but I guess you have to take multiple readings and it might not be 100% reliable.
If your controller has no ADC, then I'm out of my wits, I was thinking something like maybe set the pin to output low, then switch to input and read back the value. But if the switch is providing 5V you will have a short, so that's a bad idea. Maybe it could work when the switch is not a low resistance connection to 5V. My idea behind it was to use the parasitic capacitance of the trace to store the low voltage for a short time before it starts to float at some level again and trigger the input high. If the switch is connected you would read back a high. But that is also quite a speculative approach and has to be tried out.
Still leaving a input pin floating is a bad idea in itself, so I'd say just go for that resistor or switch to one of the MCUs available with pull down resistors. |
H: vehicle presence sensor
I want to be able to sense the presence of a vehicle in a parking space. What type of sensor could I use to do so that wouldn't require invasive (digging asphalt) installation?
This must be a low-power solution. I've thought about using a photoelectric sensor, but I don't think that's a good idea as it would detect ANY object and not just a vehicle.
AI: If you want to create an inductive sensor without hurting your asphalt then try making a loop using thin metallic sticky tape. If you need to make cross over loops of metallic tape use a non-metallic tape to bridge the cross over points. Then over-coat the whole area with a thick durable paint if you need it to last.
To reduce total power usage energize the loop only at a very low duty cycle, (maybe only 1 second per minute). If there are several parking spaces you might multiplex each location for the short duty cycle time as a counter increments. With that method you can not only count the total cars but also record exactly which spaces are occupied. |
H: Powering 100w 32v LEDs
I need to power many 100w 32-36V LEDs... and building loads of 32V PSUs is costly and time consuming.
This is a bit of a crazy idea, and I'm aware that it's probably not the safest way to do this, but this circuit has just popped into my head:
The tiny detail that I'm not quite sure about is the DC voltage after the rectifier:
Should I calculate using 240V, so 7 LEDs connected in series across 240V would give 34.2V per LED.
Or, should I calculate using the peak, non-RMS voltage 340v, so 10 LEDs connected in series across 340V would give 34V per LED.
N.B. I'm aware the picture shows 8 LEDs, but it's just to visualise what I'm talking about.
If anybody has any other quick, easy, safer ways to do this then please let me know!
AI: The circuit you have drawn will not do what you want. If I were going about things this way, this is what I would do:
simulate this circuit – Schematic created using CircuitLab
How you implement the current sink is up to you. You could have a simple current sense resistor + feedback driving a linear pass transistor (if you want to dissipate lots of heat). If this is passing 3A (which is roughly what those LEDs are pulling) and has to drop 10V of extra voltage, that's 30W of heat you need to dump off into a heatsink. Not impossible, but requires thought. You can see the basic design of a linear current sink here.
You could also implement a current-controlled buck converter for the LEDs - although rating this for the full rectified mains voltage will require consideration. The link in @Damien's comment above is a good place to start looking, specifically using something like the Fairchild FL7701. This would be much more efficient, but requires a more sophisticated design. |
H: UART communication between LPC2138 (3.3V) and ATmega88(5V)
I want to establish UART communication between LPC2138 (3.3V) and ATmega88(5V). But since they are at different power logic level, i need bidirectional level translator in between both devices.
I come up with following part
As seen on above site, module has MOSFET, resistors and capacitors mounted on PCB. I want to know, Can it work in my case ( for UART comm )?
If TXB0104 is device used for interfacing, is below connection correct? Please check pin mapping and is there any pull up needed at LPC2138 or ATmega88 side or shown connection is enough.
Thanks.
AI: A simple solution is to run ATmega88 at 3.3V and no external hardware is required.
If not, a cascaded two transistors could do the trick, or 2 stage Not gate (in both TX and RX lines). As the communication in the line is only in one direction. Thi will cost you afew money. |
H: RTC capacitor with long lifetime selection
In my design I am using for RTC (BQ32000) circuit, for which I have used a 0.33F capacitor and it's rated lifetime is 2000 Hrs.
But I need to select a capacitor with 5000 Hrs lifetime.
I haven't found a part with 0.33F and a lifetime of 5000 Hrs.
My question is:
Can we place two capacitors in parallel to increase lifetime?
Alternatively where and how can I select a capacitor with a lifetime of 5000 Hrs.
AI: Placing to capacitors in parallel will have mainly two effects:
lower effective series resistance
increases capacity
It may increase the lifetime of the capacitor if the main stress (and cause of failure) is because of ripple currents. But generally it won't increase the lifetime as both parts are "living" in parallel, each using their lifespan. Twins don't have the double lifespan of a normal human either.
The lifetime of an electrolytic capacitor is often limited because of the electrolyte drying out. The higher the temperature the faster it will dry out.
I guess the capacitor you found was one rated for 2000hrs @ 85°C. I wasn't able to quickly find a supercap with a rated lifetime of more than that. So what are your options?
Review your requirements:
How long is your RTC running without supply? -> do you really need 0.33F to bridge that time? Maybe you could use a smaller capacitor with longer lifetime? (10mF with 5000hrs @ 85°C is readily available)
Investigate other options:
Maybe you can use a coin cell battery as backup? It stores a lot more energy than a capacitor, but you have to factor in self discharge and the temperature range might get further limited.
Can you place a temperature limit on your device?
If the rated temperature of your product is 10K lower than the rated temperature of the capacitor, it's lifetime will roughly double. So if your device is usable only from -40°C to 75°C the lifetime of your capacitor will probably be 4000hrs. Note this is just a rough ballpark estimation and not a fact. Lifetime is a complex thing and if you have to be 100% sure you will have to do an in depth analysis using an approach with Arrhenius equation
Is the end of life of the capacitor actually that bad for your intended use?
Capacitors end of life is often specified by a loss of capacitance by 30% or an increase of the internal resistance by a factor of four. Now if you would use a bigger capacitor it would still have a capacitance of 0.33F after it's specified lifetime. So if you would use a 0.5F capacitor it would have 0.35F after 2000hrs and then it would last another 2000hrs to your end of life capacitance of 0.23F. The increase in internal resistance will make nearly no difference if you only draw a microampere from it.
A possibly related question, with good answers: How durable is a supercapacitor? |
H: Can I use a stepper motor driver to control a brushed motor?
I'm doing a bit of shopping lately and I pretty much see stepper motor drivers everywhere, although I couldn't find any for brushed DC motors. I attempted to use a 2n2222 but it's probably a bad idea as it may will burn it out. Now, I found several small-sized stepper motor drivers that are perfectly sized for my needs, but I'm not sure if it can run these kinds of motors. Can a stepper motor driver run small, high-speed motors?
EDIT: The control that I'm talking about is speed control (50% from full speed, 37%, etc.)
These motors are what I'm talking about. 4v, more or less 1A
Thanks in advance
AI: The motors/drivers you've specified are an excellent match, as long as you realize that you'll need to provide a fairly high-speed PWM (Pulse Width Modulation - say, 10 kHz) signal for your speed control. The drivers are rated for 1.2 amps average, and the motors are claimed to run at ~100 mA, although I suspect that's with no load and they may well draw more when trying to do useful work. Plus, you won't get full speed under load.
What you cannot do is simply hook up a pot or variable voltage control input and get variable speed. You can work by varying the motor drive voltage, but this is a bit more involved, since it requires a relatively high-current amplifier or power supply, and is clearly not something you've done. Like I say, you'll need to learn about PWM for speed control. |
H: DC motor exception
What happens to our DC motor if we stop motion of the rotor with our hand while motor is active? Will the motor burn? Why, what is really happening in that situation?
AI: When you stop rotation there is no back emf generated. This means that the rotor sees the full applied voltage across its (small) resistance (I = V/R). This is the stall current. The result is that this large current flows through the rotor coil and generally burns it out. |
H: Arduino Yún and battery life
I am working on a small project that requires an Arduino (Yún?) to be powered by battery and connect to wifi. I am thinking of using the Yún since it already has wifi abilities.
My question is: What is the best way to power this in the long term (6 months min) indoors. I also need this to quite small. Would regular small batteries be my best bet? Could I hook up a phone battery or something like that?
Thanks
AI: The amount of power your entire system will draw is highly dependant on what your circuit actually does, but if you're only going to be using a few small sensors and the majority of your power draw is from the Arduino Yun we can make some estimates.
Adafruit has an excellent comparison of embedded linux boards, including the Arduino Yun, and details the current draw: here.
With WiFi ON the Yun draws approximately 280mA at 5V. (Note: The Arduino Yun does not have a voltage regulator on board. You would need to make an external voltage regulator for your chosen battery to ensure the voltage stayed at 5V - else you could fry your board.)
Using $$P=IV$$
We can calculate the power draw to be about 1.4W.
Let's assume you use a regulated 5V lithium battery, something like this (not cheap, but high capacity and regulated!)
The battery is rated at 27Whr - which means it can provide 27W for 1 hour.
If we're consuming 1.4W we can expect the battery to last: $$\frac{27}{1.4}=19.2hr$$
So even with a high capacity battery you're only going to be able to power your controller for at most a day. Hence, battery power probably isn't the way to go and isn't practical.
Try a 5V DC power pack which you can plug into the wall. |
H: What is the smallest and simplest seed for a random number generator?
A small microcontroller (8-bit Atmel) controls a number of lights in order to present a light show with many fancy randomized light sequences.
A suitable pseudo-RNG does its job nicely, but I'm looking for a good seed for it. A seed will be necessary because if someone turns multiple such devices on at the same time, it won't look good if they all generated the same sequences of effects until they slowly drift apart due to the tiny differences in their individual clock sources.
A very good method to seed a pseudo-RNG, which I often used, is possible in case of a device which has to be started with the press of a button or flip of a switch. As soon as the µc is powered on, a very fast timer can be started, and the value of this timer seeds the RNG as soon as the button is pressed for the first time.
The problem is, in this scenario, there are no buttons. The program has to start as soon as the device is powered on.
The place on the PCB is extremely limited (nothing more than a few of the very smallest SMD parts might fit), so I'm looking for the smallest and simplest possible solution. Therefore I'll rule out fancy solutions like true RNG hardware, radio receivers, etc.
All I have is a 16 bit timer-counter in the CPU, and an unused portpin which has access to an ADC.
My current solution is to just use a resistor (as inaccurate as possible) to provide approximately half the supply voltage to the ADC pin, and seed the RNG with the first AD conversion value. However, nowadays most 10% resistors have an inaccuracy well under 1% (it would be fun to imagine the face of a supplier when I tell them we want the worst quality SMD resistors they can find), so there is a very high chance of multiple units starting with the same seed.
A better alternative would be to make multiple conversions and build a value out of the least significant bits of these measurements. However, I used the ADC of this µc type before and I know it's very accurate. Running the ADC at the fastest possible speed might help here.
Does anyone have a better suggestion? The seed is not required to be perfectly uniformly distributed, but the more uniform the distribution is, the better. A 16 bit seed with a perfectly uniform distribution would be a dream too good to be true, but I think a halfway decent distribution over 5 or 6 bits might be sufficient.
AI: Put a parallel resistor and capacitor between the A/D pin and ground. Make the resistor fairly high, preferably well above the input signal impedance requirement for the A/D. Make the RC time constant maybe around 10 µs. For example, 100 kΩ and 100 pF sounds like a good combination.
To get a value with some randomness, drive the pin high for a while, then set it to high impedance and take a A/D reading a few µs later. Particularly if you properly abuse the A/D acquisition time, the voltage it will see will be dependent on the R and C values, the pin leakage current, other nearby noise, and temperature.
Grab the low bit or the low two bits and repeat as necessary to get any number of random bits.
For a more random pattern, perform this procedure occasionally and inject the low bit of the A/D result into the random number generator you are already using. |
H: What is this "contactless" LCD display
I disassembled a cheap digital tire pressure gauge that had quit working (leaking silver oxide cell, as I discovered). After deciding it was unrepairable I removed the circuit board, which had the LCD display on the back. It fell off and seemed to be completely unattached. There was a ribbed rubber strip between a plastic "step" on the the display and the row of contacts.
Here are some images of the LCD:
Front ↑
Back ↑
Edge view showing the "step" ↑
The rubber spacer ↑
I happened to view the display under bright light with a specular reflection from the plastic, and saw this:
Since the ribbing on the spacer runs "vertically" from the contacts on the PCB is that how power and signal are delivered to the faint, almost invisible traces on the display? I don't see any embedded wires in the rubber... is each rib designed to conduct along its length but be insulated from its neighbors? The spacer looks and behaves just like a simple piece of rubber.
What is this technology (both the "spacer" and the invisible traces on the LCD) called?
AI: It's called "zebra strip", and yes, the black areas are conductive while the white areas are insulating. The strips do not need to line up one-for-one with the contacts on the board and the glass, as long as there is at least one for each connection (usually several) and there's enough space between the contacts so that they don't get bridged by a black zone. |
H: Why is this a 7th order circuit?
This is the circuit:
I saw it in a book. It said that this is a 7th order circuit.
From theory we know that the order of linear passive circuits is determined by the sum of capacitors and inductors, minus the number of Inductor-nodes (a node where only inductors meet), minus the number of capacitor-meshes (a mesh that has only capacitors on it's branches).
This is my attempt to verify the order.
Capacitors + Inductors = 11
That component to the leftmost part of the schematic, judging from the way the book is illustrated previously, is just a complex electric impedance, so I believe that we can't do anything with that component. It doesn't count neither as capacitor, or inductor. It may contain 10 inductors inside but that's irrelevant, in order to find the order of the circuit (I'm not sure about that though).
Far to the right (my rightmost arrow) the inductor and capacitor can change their place without the circuit being affected in any way, so we have an inductor node.
Another inductor node exactly to the left of the previous one.
And one capacitor mesh, that I have marked to the left.
Therefore the order is 11 - 2 inductor nodes - 1 capacitor mesh = 8, not 7. So I'm clearly missing something here and I have no idea what it is. The way this problem was presented in the book seemed more like a trick question.
I will appreciate any help on this! Thanks in advance!
AI: You are missing the mesh/loop which includes the left-most capacitor, the upper capacitor and the right-most capacitor. 11 reactive components - 2 inductor nodes - 2 cap meshes = 7.
If you're feeling up to the challenge you can also attempt to find the transfer function of the circuit (s-domain). The circuit order is whatever is higher: the order of the numerator polynomial or the order of the denominator polynomial. |
H: High Drain Current MOSFET vs Low Drain Current MOSFET for Synchronous Buck Converter
For a battery charging application, i have to build a synchronous buck converter (i/p voltage = 12V , o/p Voltage = 4.5V) which would be driven by a PWM signal from the micro-controller. This Buck converter's operating frequency would be around 62kHz. I am planning to use both the NMOS for high and low transistors, which would be driven by a suitable gate driver.
My question is regarding the selection of NMOS device w.r.t their Drain current rating. For e.g lets say my maximum current to charge the battery would be 4A. So i have to select a MOS device whose Id >= 4A . And here are two power MOSFET devices who have a quite high current rating : IRLB8748 (comparatively high Drain current capability) and IRL2703 (comparatively low Drain current capability).
Now both of these devices fulfill my requirement w.r.t drain current (and they dont differ much in pricing). Lets say if i use IRLB8748 (having RdsonMAX = 4.8 mOhms), for 4A (maximum current) the power being dissipated will be IxIxR = 0.0768 Watts. And if i use IRL2703 (having RdsonMAX = 40 mOhms) the dissipated power for 4A current = 0.64 Watts. As it can be seen that for 4A, IRLB8748 dissipates almost 10 times less power than IRL2703 does.
So if i want my transistors to dissipate lesser power (less power dissipation = lesser heat produced = better), should i go for IRLB8748 ? Or can I ? I mean i might be wrong here, but can we use high current rating power transistors in our low current applications to dissipate lesser power (in some cases that can may be also let us avoid using heat sinks) ? Also is it true for my case (i mean can i use IRLB8748 so that my circuit may dissipate less power) ?
Your helpful comments and suggestions would be appreciated.
Thankyou!
AI: Absolutely no problem at all. The high current FET does not know to behave any differently just because you are running less current through it. Provided that you have correctly calculated Rds(on) at the correct gate voltage, it is up to you to decide what to use.
Generally speaking, higher performance (lower Rds(on)) devices are more expensive, and higher current devices are both more expensive and physically larger. If neither of those applies or bothers you, crack on. |
H: composite (RCA or A/V jack) output Passive splitter
Im trying to connect one CCTV camera feed to a TV and an USB composite encoder at the same time.
my question is, would something like this do it?
I have doubts about impedance issues, in which case what would be cheap DIY solution?
AI: Traditionally multiple devices would be connected in a daisy chain fashion with a terminating resistor at the end of the chain matching the cable, connectors and source impedance.
You will find that the typically 1.5V open circuit (0.75V terminated) signal will be reduced in value if you add two (or more) terminating resistors in parallel.
The wiring could be effected by the adapter you show and would often work if the device automatic gain control circuits are forgiving (a gamble). You would have a much higher likely hood of it working if you were able to remove the matching resistance from the devices along the chain. In older video equipment that had a passive line in and line out socket there would often be a switch that was used to connect the terminating resistance if it was the last device in the chain. The terminator could also just be a resistor plugged into the OUT socket as was typical of Thinnet and Arcnet cabling.
Modern equipment is more likely to have a active (buffered) OUT connection that often may include injected on screen display information and this can be connected directly to the next device.
Alternately you could get a video fan out buffer that has a powered driver circuit for this purpose. |
H: Have bypass cap recommendations already taken derating into consideration?
Datasheets often specify specific values for bypass caps. My assumption is that these values reflect the actual value (after derating), however, I often see on evaluation boards the same nominal value components being used. X5R caps can lose up to 80% of their nominal value under normal dc biases. How are recommended values in datasheets supposed to be interpreted? I can upload specific examples if necessary.
AI: EDIT:
I had written before that I remember a section about this topic in a Microchip datasheet, but didn't have a way to search for it.
Now, I have, an here it is.
Section 2.4.1 of Microchip's PIC18(L)F2X/45K50 datasheet says:
So, if the internals of your MCU require 220nF (as in this case for VUSB3V3), the simplest way is to just connect a 16V 220nF cap. This is by far simpler than studying datasheets to find out what 6.3V cap has about 220nF at 3.3V (here, you would use a 470nF cap, but other caps may behave different...) |
H: VHDL - converting types and integer subtraction
I am preparing a program in VHDL and I got stuck in type-conversion. I tryed google-search and also here at stack exchange, but I am quite confused since one answer contradicts other and neither one I can get to work. But finally to the question of mine:
I have to display ordinary digital clocks. I have got from my professor decoder for 7 segment display which takes as input std_logic_vector(3 downto 0). And my part is to provide data (more specifically set of digits) to display. Most of work is already done but I am struggling to convert from my variables e.g. minutes (it is std_logic_vector(4 downto 0)) to two decimal digits. I have done separation this way:
if (min >= 50) then
d3 <= 5;
d4 <= min - 50;
elsif (min >= 40) then
d3 <= 4;
d4 <= min - 40;
elsif
...
end if;
(Maximal value of min is 59 and if it get this high, it resets to 0 and hours counter get +1, just like ordinary clocks). Thus d3 should display tens of minutes and d4 unites of minutes. As you probably had already guessed, since min has length of 5, I can not compile it (d4 accepts length of 4 tops). Thus my idea is to convert min to integer, subtract number (e.g. 50) and convert back to std_logic_vector with right length (actual value would be in range 0 to 9, thus no problem with length of four bits). I tried to preform something like this:
d4 <= std_logic_vector(unsigned(integer(unsigned(min)) - 50));
but without success. I had always ended with errors like unknown function, type mismatch or no matching overload for method, no matter what combination I tried. Apparently I got somewhere some trivial error, but I fail to see it.
I use those:
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
Please can you point me to the right direction? I am running out of ideas.
Thank you very much for your time,
Michal
EDIT:
Inputs, outputs, variables declarations as requested are:
port (sw2, sw1, sw0: in std_logic; -- input switches
clock: in std_logic;
reset: in std_logic;
d0, d1, d2, d3, d4, d5, d6, d7: out std_logic_vector(3 downto 0); -- outputs for eight units of 7segment display decoders
dp0, dp1, dp2, dp3, dp4, dp5, dp6, dp7: out std_logic); -- outputs for decimal points
attribute loc : string;
attribute loc of sw0 : signal is "P7";
attribute loc of sw1 : signal is "P9";
attribute loc of sw2 : signal is "P10";
attribute loc of clock : signal is "P2";
attribute loc of reset : signal is "P11";
end main_1048;
architecture main_1048arch of main_1048 is
begin
process(sw2, sw1, sw0, clock, reset)
variable yrs: std_logic_vector(11 downto 0);
variable min, sec: std_logic_vector(4 downto 0);
variable hrs, day, mth: std_logic_vector(3 downto 0);
begin
EDIT2:
After deleting libs std_logic_arith a std_logic_unsigned as sugested by Brian Drummond and redefining variables so they are now naturals. New errors were No matching overload for "-". According to the specifications I found, "-" should work:
function "-" (L: NATURAL; R: UNSIGNED) return UNSIGNED;
-- Result subtype: UNSIGNED(R'LENGTH-1 downto 0).
-- Result: Subtracts an UNSIGNED vector, R, from a non-negative INTEGER, L.
Thus final edit was to d4 <= std_logic_vector(min - to_unsigned(50,4)); (with declaration variable min: natural range 0 to 59;) and this (concerning typecast) works.
Thank you all for your help!
AI: First delete the non-standard std_logic_arith and std_logic_unsigned libraries, leaving std_logic and numeric_std.
As well as being non-standard, they cause problems through a VHDL rule that - if two definitions of a type (or procedure or operator or whatever) are visible - like unsigned or <= - VHDL will try to discover which you intended (e.g. by the parameter types of the operator, because overloaded operators are legal).
But if two definitions are visible and indistinguishable - both are considered to be hidden. This makes you FIX the problem instead of allowing the compiler to pick one - probably wrong - at random.
So with only the standard libraries, things get a lot simpler.
Now another basic rule is that if you are fighting with lots of type conversions, something is declared the wrong type, which points to a design error.
I'm going to guess the mistake : min should be declared as unsigned but isn't. (Ditto d3 etc). It represents an unsigned number in bit (std_logic) form. So declare it as such.
Fix that and see what happens. But first, find the source for the numeric_std package (the package spec, don't bother with the package body). You will see a lot of operators that allow unsigned and integer to interact directly.
Then I would expect your code snippet to work directly, without any type conversions.
If you don't actually need the bits of min, go further and declare it as a subtype of natural with range 0 to 59. There is no reason not to do so, even for synthesis, and for ports on a component.
It is usually appropriate to use unsigned (or even std_logic_vector if you must) for ports at the very top level, where you need to connect each bit to an FPGA pin. But internally, convert to the types most appropriate to the design as soon as you can. |
H: Can anyone please explain how this Zener diode circuit works?
I am learning how a Zener diode works.
Can anyone please explain me how to analyze this circuit (with equation if possible)?
Thanks.
AI: I don't find your circuit very helpfull in understanding / explaining what a Zener diode does.
I would suggest you try this circuit instead and see if that helps you to understand:
simulate this circuit – Schematic created using CircuitLab
And forget about equations for a moment, and before you simulate this circuit just think about: what happens if the sinewave is -10 V, 0 V, + 10 V ???
No need to be precise, just think: will there be a current flowing or not, what will be the voltage across the zener diode ?
Real engineers first think: What will happen ? Only then simulate to confirm that ! |
H: Step up voltage converter / transformer sizing for electric oven
I am considering using a step-up voltage converter/transformer to increase the voltage of an outlet (in Los Angeles) from 110 VAC to 220 VAC for use with a 220 VAC electric oven/range (Samsung Model#NE59J3420SS). I'm trying to size/choose the appropriate converter but I'm a little confused on what size I should choose after looking through the oven's specifications and doing some calculations.
The specs say the two front ranges are 3 kW each, the two rear ranges are 1.2 kW each, and the oven heating element is 800 W. I am thinking that to size the converter, I would need to add these wattages up, giving a total of 2*3+2*1.2+0.8=9.2 kW. But if I calculate the amperage of 9.2 kW with 220 VAC, then I get a current of 9200/220=42 Amps.
Considering that these things would usually be used in a house with a 15-20 Amp circuit breaker, I am left wondering if I'm sizing this incorrectly. It seems to me that no one would be able to operate this thing in a house if they operate at such high amperage, so am I not supposed to add all of the power ratings or am I doing this right but people would just need to have a dedicated high-amperage circuit to operate this in their house?
Lastly, I have read that these converters should be sized two to three times the wattage of the equipment that will be used on the converter. So if I calculate 9.2 kW, then should the converter really be sized for 27.6 kW (if I can even find one that big)? Is the large safety factor of 3 here really necessary, or is it more for applications involving compressors or motors? Are there any special considerations that should be taken into account with these types of converters when sizing them for an application?
AI: In North America, an electric stove will normally have a dedicated 120/240 volt circuit with a 50 Amp two-pole circuit breaker. Electric stoves are not intended to be operated from a single 120 volt circuit.
A stove (range) outlet looks like: |
H: Why is the load voltage greater than the supply voltage in an AC circuit?
I was playing with electronics and testing the equation:
$$X = \frac{1}{2\pi f C}$$
where \$X\$ is the resistance of the capacitor, \$f\$ is the frequency, \$C\$ is the capacitance.
The supply is just a 220V/10V transformer without a rectifier, so it produces an AC current. Frequency is 50-60 Hz.
I calculated \$X\$ from the equation and it is equal to 2.8 K .
I wanted to test my calculations so I measured the AC voltage on both \$R\$ and \$C\$, and I would expect that the ratio between voltages will indicate the ratio between resistances as.
I noticed something strange, which is the sum of the voltage across \$R\$ and the voltage across \$C\$ is really greater than the supply voltage: \$V_C + V_R = 14.5\$ volts !! And when I measure the total voltage across \$R\$ and \$C\$ together it is 10.5 V.
Also, the ratio between voltages does not indicates the ratio between resistances.
I made this experiment with different resistors and caps but I got the same issue.
Why is the sum of voltages is greater than the voltage of the supply? Am I missing something?
simulate this circuit – Schematic created using CircuitLab
AI: The resistor and capacitor voltages are out of phase. Their peak values don't happen at the same time. You can see this in the CircuitLab simulation:
Your equation for the reactance of the capacitor ignores the phase. To include it, you need to use complex numbers:
$$X_C = \frac 1 {j 2 \pi f C}$$
where \$j = \sqrt {-1}\$. For a 1 microfarad capacitor at 55 Hz, this gives:
$$X_C = \frac 1 {j 2 \pi (55\ \mathrm{Hz} \cdot 1\ \mathrm {\mu F})} = -j2.89\ \mathrm{k\Omega}$$
To find the voltage across the capacitor, use your complex reactance in the voltage divider equation:
$$V_C = V_{in} \frac {X_C} {X_C + R} = 10.5\angle 0^\circ\ \mathrm {V} \frac {-j2.89\ \mathrm{k\Omega}}{-j2.89\ \mathrm{k\Omega} + 10\ \mathrm{k\Omega}} = 2.92\angle 74^\circ\ \mathrm V$$
The resistor voltage is the difference between the input voltage and the capacitor voltage:
$$V_R = V_{in} - V_C = 10.5\angle 0^\circ\ \mathrm {V} - 2.92\angle 74^\circ\ \mathrm V = 10.09\angle 16^\circ\ \mathrm V$$
So the peak resistor voltage is about 10 volts, the peak capacitor voltage is about 2.9 volts, and the phase difference between the two voltages is exactly 90 degrees.
The reason for the phase difference is that the capacitor voltage is always 90 degrees out of phase with its current, while the resistor voltage is always in phase with its current. Since the two components share the same current, their voltages must be 90 degrees out of phase with each other. |
H: What does it mean by "storage clock" of a shift register?
I read the data sheet of a shift register and I saw some tutorials on the internet. I can use all pins of my new shift register except pin 12. because I still don't understand what is the meaning of storage clock and how can I use it ? I use the clock of Pin 11 and I understand How a shift register works, only pin 12 is missing.
Datasheet :
http://elinux.org/images/2/2d/74hc595.pdf
https://www.sparkfun.com/datasheets/IC/SN74HC595.pdf
Thanks in advance,
AI: The storage register holds the data that is output from the 74HC595, and a rising edge on the ST_CP transfers the data currently in the shift register, into the storage register.
Without the storage register, the outputs would be driven directly from the shift register, and would therefore display the new data as it is being shifted into the chip. This could have undesirable results as the outputs would turn off or on unexpectedly.
With the storage register, the outputs don't change until you set ST_CP. |
H: IR photodiode doesn't show 38kHz carrier wave on oscilloscope
I have an IR photodiode, part number PDB-C134F, as shown here. I'm trying to use it to retransmit a remote control signal that uses a carrier frequency of 38 to 40kHz. However, when I connect the diode to an oscilloscope and look at the received signal, the carrier is lost. I simply see a square wave encoding the data
(with a pulse width of 0.5ms and an amplitude of about 0.4V) but no finer square wave (which should have a pulse width of around 12us). My oscilloscope is very basic (the Xminilab), but it is sampling at 2MS/s, and is rated at 200kHz, so I would think that it should be able to see the signal. It can see a 40kHz signal that it generates on its waveform generator output.
In my test, the diode pins are connected directly to the scope inputs, and there are no other elements in the circuit. I've also tested it after amplification with an opamp, and see the same thing.
Am I misunderstanding how this part works? Or misusing it or the scope?
Thanks for any advice!
AI: Probably the photodiode is acting (with the 'scope input capacitor) as a rectifier for its own signal.
Photo current will only flow one way from the photodiode. This will charge up the input capacitor of the 'scope. When no light is present, the charge will only bleed away slowly through the scope's input resistance, which is maybe 1 or 10 megohms.
Apparently the bleed is fast enough to let you see the data signal, but not fast enough to let you see the 38 kHz carrier.
As for a solution, try adding some lower-value bleed resistor (maybe 1 kohm), but realize this will likely also reduce the signal amplitude, maybe too low to measure. If that's the case, you'll need to build a real bias circuit or even a transimpedance amplifier to condition the output of the photodiode before measuring it. |
H: Dark Sensing LED Light
This is a Dark Detecting LED light schematic I found here
Few Questions(As I'm new to electronics),
Can I use this circuit with a 6v input ?
When there is light on the LDR(Photo-resistor) curent will flow
through R2 and PH1 (LDR) right ? So when there is light power will
be wasted ? If so, how many Ma(Mili-amperes)?
What to change if I want to use a 5v led(70ma @ 5v while input is 6v as stated in question No.1. It's 4Leds removed from a torchlight) ? (The resistor values)
Edit : I edited the questions after "Peter Bennett" answered.
Edit: I (Peter Bennett) edited my answer after the OP's edit.
AI: I expect that the supply voltage is not very critical - 6 volts should be fine.
You can determine using Ohm's Law, that the maximum current through R2 will be about .05 mA.
An LED advertised as "5 volt" will be a bare LED with a suitable resistor or current limiting circuit so that it can be operated from 5 volts with no additional current limiting components. (I believe the highest voltage bare LEDs are blue (or white, which is just blue with a white phosphor) which have a forward voltage of 3.0 - 3.5 volts) |
H: ATSAM3N Cortex-M3 RAM Bit Banding
If i do not use Bit Banding feature on ATSAM3N, this region, it will used by the compiler for the program? Or it will stay unused?
What if my program, randomly (by itself) should need to assign and access this region?
AI: The linker controlled by a link script (not the compiler), places variables and code at specific memory locations. Normally, the linker script does not attempt to place variables or code, within the Bit-band regions.
So, unless you write a liner script to explicitly place something into the bit-band regions' address ranges, the linker will not normally place anything there.
However, those regions are just 'overlays'; bit-banding only provides an alternative address range to access the RAM or peripherals which are already accessible with their own 'real' addresses. The Bit-band regions do not provide any extra storage, just a different access mechanism, so IMHO it is a bit misleading to ask "Or it will stay unused?".
Put another way, the compiler+linker can use all available RAM, irrespective of using Bit-band addresses to access it. Bit-band addressing is only extra addressing hardware.
Bit-band addressing is used to access peripheral registers or RAM as individual bits. This can be very useful to implement atomic bit-access, or faster access to individual bits, for example to control pins connected to ports.
Each Bit-band address contains a 1-bit value. So they are useful for boolean values, but little else.
The easy way to take advantage of bit-band functionality to test or update bits within RAM or peripherals is via C/C++. ARM documentation, and the books by J.Yiu, explain how to exploit bit band addressing; set the value of unsigned int (32 bit) pointer to an address within the bit-band range, e.g.
volatile uint32_t GPIOA_BASE = (uint32_t*) 0x40010800; (not correct bit-band address)
Then any access to memory or peripheral registers via a correctly initialised pointer variable will actually read or write a single bit within the real RAM or peripheral register:
*GPIOA_BASE = 1; // set bit to true |
H: Reason why polarized electrolyic on audio line doesn't blow up
I've seen the low-end IC audio amp datasheets recommending a simple (polarized) electrolytic on signal input, even for a split supply circuit that doesn't DC-bias the input. For example the datasheet of TDA2030 does that.
I've actually built that circuit out of curiosity if the capacitor C1's anode might get (significantly) DC biased by the opamp input, but I've measured a rather insignificant 1.7mV in my circuit at C1's cathode. Looking at the datasheet, the max input current for this IC is 2uA, so going through 22kOhm would max at 4.4mV. So neither theoretically nor in practice is it enough to ensure that the electrolytic capacitor is always biased the right way on sound/AC signals. My guess is it doesn't matter because the AC swings of the typical audio line are below the 1.5V reverse voltage usually needed to make electrolytics blow up fast enough to be entertaining/detectable. Am I correct or is there something else going on?
I've also connected C1 the "wrong way around" (on purpose, as a 2nd experiment) in this circuit, to see if anything bad might happen, and... nothing.
I've even put on it the max AC signal my sound card can dish (which exceeds my phone etc.), at a respectable 1.7V RMS, which is way more than what's needed to make the TDA2030 output clip like crazy, because it has high input sensitivity. Still nothing measurable/observable happened to the input cap.
AI: Although it is desirable to bias electrolytic capacitors with a DC voltage they will work without problem with zero bias. The aluminum oxide layer that acts as the dielectric is created during manufacture and is fairly robust and long lasting.
They will even survive a short amount of low level reverse bias although it is not recommended.
Electrolytic capacitors can blow up if reverse voltage is applied or excessive bias in the correct polarity but in general that will only happen if there is enough current to cause significant power dissipation such that the device heats up significantly. |
H: Transistor Circuit project
I am a unskilled in this domain, so I hope you can bear with me a little.
I am doing a project for my teacher and I chose to do this
I tried to search for the best suitable values for the components and I put them on Pspice.
V5.Vamp=0.8v,fre=1k,Voff=0v.
After stimulating using
I get this graph
I am not sure if this is how it supposed to be. Is there anything wrong that I did?
Thanks in advance.
AI: Due to C2 the amplification of the circuit is very high. Russell's comment about the gain being 4.7 is correctly based on the ratio of collector resistor to emitter resistor BUT the emitter resistor is shunted with 20 uF and that has an AC impedance of 8 ohms at 1kHz hence your gain is through the roof. Remove C2 and check that the gain is about 4.7.
What you do next depends on what you want the circuit amplification to be and where the low frequency gain starts to reduce but, needless to say it usually involves restoring C2 to its former position but placing a resistor in series with it.
I estimate that you should be able to get a clean 7 or 8 volts p-p on the output and, with a suitable resistor in series with C2 you could achieve gains of up to 20 without much distortion. Without C2 the gain is approximately 4.7. |
H: 555 AM transmitter
I looked on instructables and I found an interesting(at least for me) AM transmitter made with a 555 timer which acts as the oscillator:http://www.instructables.com/id/555-AM-Transmitter/ Is this idea feasible?Will it work?
AI: No, it's rubbish: -
Look at the circuit - where do you connect a modulating input (such as a microphone or signal generator) - if you attached its output to an antenna it would be creating so many harmonics the whole of the AM broadcast band would be corrupted in the near vicinity.
Accepting that it's likely illegal to connect an antenna to the circuit there are far more practical circuits around like this: -
Taken from here. Or, there is this FM (not AM) one: -
Taken from here. Just Google "Simple AM transmitter" and look at the images of circuits you get. Choose one that is within your capabilities and go to the source page for instructions and help. |
H: Is low humidity bad for CMOS camera?
I'm searching for camera modules using CMOS image sensor. But I found something interesting. Some vendors specified operation humidity between 20~80%. But does it make sense that low humidity affect to camera? Could anyone please explain what happens when you put camera in such environment?
Here are examples
http://astronomy-imaging-camera.com/products/usb-3-0/asi224mc/#comment-4142
https://www.leopardimaging.com/uploads/LI-USB30-M021X_datasheet.pdf
AI: It's not specific to cameras that low humidity causes problems: -
Too low humidity may make materials brittle
Also this: -
a very low humidity level favors the build-up of static electricity, which may result in spontaneous shutdown of computers when discharges occur
This is stated on this wiki page and I read "computers" as any non-trivial electronic circuit.
The full paragraph is: -
Many electronic devices have humidity specifications, for example, 5%
to 45%. At the top end of the range, moisture may increase the
conductivity of permeable insulators leading to malfunction. Too low
humidity may make materials brittle. A particular danger to electronic
items, regardless of the stated operating humidity range, is
condensation. When an electronic item is moved from a cold place (e.g.
garage, car, shed, an air conditioned space in the tropics) to a warm
humid place (house, outside tropics), condensation may coat circuit
boards and other insulators, leading to short circuit inside the
equipment. Such short circuits may cause substantial permanent damage
if the equipment is powered on before the condensation has evaporated.
A similar condensation effect can often be observed when a person
wearing glasses comes in from the cold (i.e. the glasses become
foggy).[23] It is advisable to allow electronic equipment to
acclimatise for several hours, after being brought in from the cold,
before powering on. Some electronic devices can detect such a change
and indicate, when plugged in and usually with a small droplet symbol,
that they cannot be used until the risk from condensation has passed.
In situations where time is critical, increasing air flow through the
device's internals, such as removing the side panel from a PC case and
directing a fan to blow into the case, will reduce significantly the
time needed to acclimatise to the new environment.
In contrast, a very low humidity level favors the build-up of static
electricity, which may result in spontaneous shutdown of computers
when discharges occur. Apart from spurious erratic function,
electrostatic discharges can cause dielectric breakdown in solid state
devices, resulting in irreversible damage. Data centers often monitor
relative humidity levels for these reasons. |
H: USB hub and slave on same pcb - are serial resistors and capacitors needed?
I'm building a device using
TUSB2046B hub controller
4x FT230X USB to UART controller
First, let's look on Hub controller sample application:
Note D:
All USB DP, DM signal pairs require series resistors of approximately
27 Ohm to ensure proper termination. An optional filter capacitor of
about 22 pF is recommended for EMI suppression. This capacitor, if
used, must be placed between the hub terminal and the series resistor,
as per section 7.1.6 of the USB specification.
Then let's look on FT230X sample application:
My questions:
What is the purpose of 15kOhom resistors to ground on first image? Are they necessary in single pcb layout?
How should I connect those two devices assuming single pcb layout with no more then 5cm distance?
This is the most intuitive idea:
simulate this circuit – Schematic created using CircuitLab
And some questions:
Can I safely remove one 27 Ohm resistor on each line? Must I change the remaining one to 54 Ohm?
Is there any difference whether capacitors are 22pF or 47pF?
Are those capacitors necessary?
AI: The 15kOhm pull-down resistors are most definitely required. The slave device has internal pull-up resistors on one or both of the DM/DP lines which are used by the host to detect that a slave has been attached and its type - low, full or high speed. You need these pull-down resistors to ensure the line isn't left floating or this detection won't work properly.
You can omit the termination resistors and capacitors. They have two purposes: the first is to prevent reflections from the end of the lines which would cause fading interference with the signal. However, since you are only running the bus in full speed mode (12Mbps) and the line length (5cm) is much much shorter than the wavelength of the signal and its main harmonics, reflections aren't going to be an issue. The second purpose is as a line filter to reduce the EMI generated by the USB cable. You might need some sort of filter to pass EMC tests, but you should just treat the bus lines as you would any other digital lines you have on your board. Note that most USB drivers are slew rate limited so you are already much better off EMC wise than a GPIO line driving your LCD or whatever. |
H: Floating LM317 (used at high voltage) protected by two Zener diodes
In Marty Brown's Power Supply Cookbook, I found the following variation of the floating linear regulator. I'm aware this topic has been discussed in at least one other question; the two-Zener wasn't mentioned in that discussion though. My question for this schematic is why use those particular voltage and power values for the "lower" 5.6V, 500mW Zener. There isn't really an explanation in the text in that regard.
AI: As per the LM317 data sheet, the max input-output voltage differential is 40V. This is why a 39V zener is placed across the device because, when 100V is first applied, the output is zero volts and therefore the zener rapidly charges the 100uF but maintains 39 volts across the device as a limit. Having said that I think 39 volts is a poor choice and I question its efficacy however, this is what the author of the circuit did intend I believe.
As for the 5.6 v zener, well the normal running voltage between output and adjust pins is 1.25 volts so clearly a 5.6 v zener is not going to be a problem to normal operation so, I would also say that this diode is here to limit voltage across these pins although the data sheet doesn't appear to state a maximum rating for this voltage. However, it's not uncommon to apply normal diodes to these positions to prevent another problem. See this: -
The diodes above are to protect the device from input voltage shorts when the output capacitor is fully charged. See also figure 24 and figure 37 of the data sheet for this information. |
H: Correct MOSFET choice for brushed DC motor
I'm looking for a few MOSFETs for a really small motor. This question is exactly what I am asking but I'm afraid this might be marked as a duplicate.
Basically, I have really small motors rated more or less 1A 3.7V. The answer provided in the question was to use a SSM3K123TU mosfet but I'm having a hard time looking for the specific piece. What I found instead while roaming around eBay were these:
IRF9540 IRF9540N Power MOSFET P-Channel 23A 100V
IRF3205 TO-220 IRF 3205 Power MOSFET 55V 110A
IRFZ44N IRFZ44 N-Channel 49A 55V Transistor MOSFET Component TO-220
IRF840N IRF840 N-channel 8A 500V MOSFET TO-220 IR Transistor
2N7000 MOSFET N-CHANNEL 60 Volts 0.2 Amps TO-92
IRF510NPBF IRF510N IRF510 Power MOSFET N-Channel 5.6A 100V
I'm guessing that these are extremely overkill for my purposes, but I might be wrong. I'm just looking to control a 1A 3.7V motor using PWM. I'm concerned that these might be too inefficient and there might be smaller ones available.
Are these okay to use with a small load or should I go look for smaller ones?
This might/might not help:
Power source: 3.8V to 5V
Max motor current: <1.5 A
AI: I'm not going to do a direct answer: -
A good start is to look at absolute maximum voltages and current and check that any potential MOSFET you choose is ~ twice as good as what you believe you need for your circuit.
Next, I'd look at what the SSM3K123TU device does for you and this graph is very important: -
It tells you plenty of things about how good it will be at delivering power to the motor whilst not getting too warm itself. For instance, with a 1.2 volt gate-source drive and a 1A load (motor) you might expect to see an 70mV drop across the MOSFET. This is a power dissipation of 70mW. However, if your circuit could drive the gate with 4 volts, expect only a 20mV drop across the MOSFET when delivering 1A to the motor.
So that's it in simple terms - choose a MOSFET that matches what the SSM3K123TU delivers in these respects and you are likely to be able to make a long list of potential mosfets turn into a short list. |
H: Signal generator: PWM or R2R?
I want to build a signal generator using a ATmega 328P on an Arduino. Which way would be better. Using one of the timers (8bit or 16bit) built in to generate a PWM and then low-pass filter it, or using a R2R ladder system?
I care more about harmonics than frequency, but I'm hoping for about 10kHz or above.
Thanks for your advice.
AI: If you are worried about harmonics, you should definitely avoid PWM. Rectangular waves are jam-packed with harmonics that extend as far as pin slew rates permit. Although low-pass filtering will get rid of the higher order stuff easily, the lower order stuff will be harder to remove without some serious filtering. You don't specify how much harmonic distortion you could live with or what frequency range and waveshapes you are trying to generate (10kHz makes me think that you are trying to make an audio waveform generator), but you're fighting a losing battle that is going to end up with you needing external active components anyway - so why not add a DAC?
I'm also going to guess that you don't want to write any code, so a quick Google shows that Adafruit offer a MCP4725 breakout board with a prewritten library and tutorial. The MCP4725 is a 12-bit DAC. Even though its INL leaves something to be desired, you'll be a good order of magnitude better off than even your best efforts with the onboard PWM.
As Leon Heller says, if you really want to generate high quality signals (and over a much broader frequency range) you could go for a DDS solution. Analog Devices do some nice ones with onboard SRAM for arbitrary waveform storage, so you simply set the chip up, tell it to go and you're done - no need for a constant datastream. This is probably beyond your requirements at this stage, however. There are also a bunch of cheap Chinese boards based on the AD9850 all over eBay which might be of interest. |
H: how to store array of long integer values to 16 bit memory
I am trying to store "long int" values to memory (SM28VLT32) via SPI communication. I am using IAR compiler. Memory is 16 bit read or write access. I would like to store bigger than 16 bit value like "3245672341" and some times float values. ex: "5008.456". I can convert float to int then the integer will be bigger than 16 bit value. I have to store an array of [6] "long int"values every minit to memory.
I can not store long integer value to memory as it has 16 bit read and write access.
I am thinking to convert "long int" to "string"! Any suggestions on how can i store those values and should use less memory?
Presently i am able to store 16 bit integer value using the below coode.
unsigned int sampledata[5]= {34586, 43877,53780, 64879,1};
FlashPointer = 2;
int StoreToFlash(unsigned int sampledata[], int StartAddress); // Strore Sample to flash
StoreToFlash(sampledata, FlashPointer); //function calling
int StoreToFlash(long int sampledata[], int StartAddress)
{
int iCtr;
int ErrorCode = 0;
int address = StartAddress;
// Write to flash
for(iCtr=0;iCtr<5;iCtr++)
{
ErrorCode = Flash_Write(address++, sampledata[iCtr]);
if((ErrorCode &0x45)!= 0)
{
Flash_ClearError();
}
}
return ErrorCode;
}
int Flash_Write(int Address, long int Data) //Flash wirte function
{
int error ;
int data0 = 0;
// Make chip select Low
Flash_Set_CS_Status(0);
// Send Command ID 0x17
data0 = Flash_SPI_SendByte(0x17);
// Send Address Byte 3
data0 = Flash_SPI_SendByte((Address & 0xFF0000) >> 16);
// Send Address Byte 2
data0 = Flash_SPI_SendByte((Address & 0xFF00) >> 8);
// Send Address Byte 1
data0 = Flash_SPI_SendByte(Address & 0xFF);
// Send Data Byte MSB
data0 = Flash_SPI_SendByte((Data & 0xFF00) >> 8);
// Send Data Byte LSB
data0 = Flash_SPI_SendByte(Data & 0xFF);
// Send Dummy Byte
data0 = Flash_SPI_SendByte(0);
// Make Chip select high
Flash_Set_CS_Status(1);
}
How can i store sampledata[5]= {3456782676, 3890.345, 5035.675, 1, 64534}?
AI: So the flash you are using only supports writes to a 16-bit word at a time and cannot be accessed in another way (that is a bit odd). Because of that you will have to do some manual address management, but the flash luckily comes with an address auto-increment write.
So as you can transfer just a byte via SPI anyways (there are some 16-bit variants but let's forget about them for a minute, although it would be most fitting here), the most natural way to interface with it is with byte arrays.
So I'd change the Flash_Write like so:
long int Start_Flash_Write(int StartAddress, unsigned char* Data, long int Datacount, const unsigned char FINISH_BYTE)
{
long int dataSent = 0;
// Make chip select Low
Flash_Set_CS_Status(0);
// Send Command ID 0x17
data0 = Flash_SPI_SendByte(0x17);
// Send Address Byte 3
data0 = Flash_SPI_SendByte((StartAddress & 0xFF0000) >> 16);
// Send Address Byte 2
data0 = Flash_SPI_SendByte((StartAddress & 0xFF00) >> 8);
// Send Address Byte 1
data0 = Flash_SPI_SendByte(StartAddress & 0xFF);
// Send first two DataBytes
data0 = Flash_SPI_SendByte(Data[dataSent++]);
if (dataSent < (Datacount))
{
data0 = Flash_SPI_SendByte(Data[dataSent++]);
}
else
{
data0 = Flash_SPI_SendByte(FINISH_BYTE);
}
// Send Dummy Byte
data0 = Flash_SPI_SendByte(0);
// Make Chip select high
Flash_Set_CS_Status(1);
return dataSent;
}
int Flash_Write(int StartAddress, unsigned char* Data, long int Datacount) //Flash wirte function
{
int error ;
int data0 = 0;
long int dataSent;
const unsigned char FINISH_BYTE = 0xFF;
if (Datacount == 0)
{
return 0; // writing nothing is easy
}
// First Write sets StartAddress
dataSent = Start_Flash_Write(StartAddress, Data, Datacount, FINISH_BYTE);
while (dataSent < (Datacount))
{
// Make chip select Low
Flash_Set_CS_Status(0);
// Send Command ID 0x18 (auto increment write)
data0 = Flash_SPI_SendByte(0x18);
// Send first two DataBytes
data0 = Flash_SPI_SendByte(Data[dataSent++]);
if (dataSent < (Datacount))
{
data0 = Flash_SPI_SendByte(Data[dataSent++]);
}
else
{
data0 = Flash_SPI_SendByte(FINISH_BYTE);
}
// Send Dummy Byte
data0 = Flash_SPI_SendByte(0);
// Make Chip select high
Flash_Set_CS_Status(1);
}
}
And you would then call it like this:
Flash_Write(0x1234, (unsigned char*)(sampledata), sizeof(sampledata))
How it works:
It starts with writing the StartAddress and the first two bytes to the flash. Afterwards it writes the bytes as a pair to the next address using the auto increment mode of the flash.
As the byte count of data might not be even, I check if the data count has been reached after each byte is written. If that is the case, a constant FINISH_BYTE is used to end the transfer in a normal way.
Notes:
I'd strongly advice against the use of integral data types directly as no one can tell how big they really are (is an int 16 or 32 bit wide?).
The datacount has to be passed to the function as information on the size of the array gets lost when it is cast to a pointer and out of scope.
The function does not return something, that should be fixed. Error is unused. |
H: PowerDI-123 socket pin assignment
Does anybody know which pin is cathode at PowerDI-123 socket? Diodes Inc. datasheets are rather confusing and I have no real diode in hands to measure it. (I suppose larger pad is cathode because there is mark and suggested pad layout is reversed.)
AI: The stripe on the right is indicating the cathode. On the very first page of the datasheet, it is stating:
Polarity Indicator: Cathode Band |
H: Basic questions about chassis grounding
I am uncomfortable with the notion of chassis ground but I can't pin down what exactly bugs me. So I'll start with an example and ask a couple of questions on the way. My background is this: I have studied quite a bit of advanced physics at college but somehow I dodged electronics and the practical aspects of electromagnetism almost completely.
Let's suppose we have a battery which is realized as a simple galvanic cell. Because of the difference in electronegativity, there are more electrons in the anode than there are in the kathode. Now if I connect the anode to the chassis, electrons flow from the anode to the chassis until both have the same charge density, right? And if I connect a load to the battery, electrons from the chassis and the anode are exchanged such that the charge density remains approximately the same? So could I say that after chassis grounding, I have the same kathode as before but a bigger anode which consists of the former anode and the chassis?
If the whole chassis gets charged, isn't there a problem that the charges may somehow escape to the environment? Do we have to pay attention to isolate the chassis from the environment?
AI: I should start of by pointing out that when we talk about a "chassis ground" we usually mean we are connecting the chassis to some larger and better established ground potential like the earth itself. The reason to do this is for safety. If a high-voltage wire inside the equipment gets loose and contacts chassis, you'd rather the current be diverted to ground and a breaker gets thrown, than for the chassis to be sitting at high voltage waiting to electrocute the next user who touches it.
You are talking (sort of) about connecting the circuit ground to the chassis, which is not the usual meaning of "chassis ground".
Now if I connect the anode to the chassis, electrons flow from the anode to the chassis until both have the same charge density, right?
Charge will flow in a conductive structure until the two parts are at equal potentials.
Charge density will not be uniform throughout the structure. Charge will tend to accumulate near where there are external charges of opposite polarity, and will be depleted near where there are external charges of the same polarity.
And if I connect a load to the battery, electrons from the chassis and the anode are exchanged such that the charge density remains approximately the same?
Electrons are exchanged until the potential is equal between the battery's anode and the chassis.
So could I say that after chassis grounding, I have the same kathode as before but a bigger anode which consists of the former anode and the chassis?
Yes, that's reasonable.
If the whole chassis gets charged, isn't there a problem that the charges may somehow escape to the environment?
No. Kirchoff's current law says that current only flows in completed circuits. Charge may find a path back to the battery's cathode, and that would tend to deplete the battery. But it won't just flow away "into the environment" without the environment being connected back to the battery's cathode.
Do we have to pay attention to isolate the chassis from the environment?
Not particularly.
Edit:
how the potential can be equal if the charge density isn't.
See the electrostatic Poisson equation:
$$\nabla^2\varphi=-\frac{\rho}{\epsilon}$$
In fact, if the charge density is non-zero, then the potential will be nonuniform.
Only when the net charge density is zero (which I guess is one example of a uniform charge density) will the potential be uniform.
In a condutor, the static behavior is for the free charge to move to the surfaces of the material, leaving zero net charge and a uniform potential within the bulk of the material. |
H: Solving for a current using node-voltage analysis
I wish to know how I can find out what \$i_a\$ is. The answer is, according to the textbook, supposed to be 1.33 A.
If I select the top node as a reference node, my understanding is that we then know the voltage over \$R_2\$ is 10 volts as well? I'm very confused as to how I can analyze this simple circuit.
Any help appreciated.
AI: You have two independent sources, so you can use superposition to simplify this problem. Superposition says you can turn off all but one independent source and compute the contribution of the source that is on to the output (\$i_a\$ in this case); then turn on the next source with all other sources off and compute its contribution; once you have all the contributions you can sum them together for the final result.
First, turn off the current source to find the voltage source's contribution (this means the current source is set to 0A, which is equivalent to an open circuit). Now you just have one loop consisting of the voltage source and two resistors in series. I'll leave it to you to compute \$i_a\$ in that case...
Second, turn off the voltage source to find the current source's contribution (this means the voltage source is set to 0V, which is equivalent to a short circuit). Now you have a current source driving two resistors in parallel. Again, I'll leave it to you to compute \$i_a\$ in that case...
The final answer is the sum of the two contributions you found. |
H: Circuit Check Please (LED driver)
So im Building a project these leds will be arranged in a circle there will also be about 15 more of these. with inputs to activate them the 3.3 volts will be from a raspberry pi gpio pin. The 12v sorce is a power supply to light all the leds that ill be using. Just want someone to look over this before i buy everything. to double check me and also help me find the value of the Resistor on the 3.3v for the transistor. Each Led in this will be blue.
Led forward voltage is 3.8v and they are all 20ma
Transistor is a TIP120
Thanks for you help
AI: There is a big problem with this circuit - the \$V_{CE(sat)}\$ of the TIP120 is 0.7V at ~100mA (near our operating point).
That means that there will only be \$12-0.7 = 11.3V \$ across each LED string. Since \$3\times3.8=11.4V\$, this means you won't quite have enough voltage available to power the 3-LED strings. Bummer.
Never mind, we can fix this. Since the total current through the three strings is only around 60mA, we don't need a Darlington transistor like the TIP120 - we can do it with a standard NPN BJT. Let's choose the BC547 (because it's readily available and has a maximum collector current of 100mA - enough for us). It's \$V_{CE(sat)}\$ at 60mA collector current is 0.1V - much better.
So now we have 11.9V across each LED-string + resistor combo. Therefore, the current through each 3-LED string is \$(11.9-(3\times3.8)) \div 33 = 15mA \$. Current through each 2-LED string is \$(11.9-(2\times3.8)) \div 220 = 20mA \$. This means that the two sets of LEDs will have different brightnesses. If you want to match them better, make 3x 3-LED strings and just don't use one of the LEDs. You can reduce the resistors to get your forward current back up towards 20mA per LED if you want.
Now, let's calculate the base resistor. We want the BJT in saturation mode, which means we want \$I_C << I_B \times H_{FE}\$ - that is, we want to overdrive the base current a bit. if we set them to equal, that gives \$(2 \times 15mA) + 20mA = I_B \times H_{FE}\$. We look up \$H_{FE}\$ from the datasheet:
We see it given as minimum 110 (worst case). So \$(2 \times 15mA) + 20mA = I_B \times 110 \to I_B = \frac{(2 \times 15mA) + 20mA}{110} = 0.45mA \$. But actually, as said, we want to overdrive it to ensure saturation - let's overdrive by a factor of 5 (still well within the maximum base current specified in the datasheet). So \$I_B = 2.3mA\$, and we know that \$V_{BE} \approx 0.7V \$ (one silicon diode drop). So \$I_B = 2.3mA = \frac{3.3-0.7}{R} \to R=\frac{3.3-0.7}{2.3mA} = 1130 \Omega\$. The nearest E24 value is \$1.1k\Omega\$ - so use that. And we're done!
The big takeaway point from this is not to neglect the voltage across your "switch" device - it's always going to be there, and if you're running close-to-the-wire in terms of voltage overhead for diode-type devices, you need to be sure you're not throwing away voltage you can't afford. The minor takeaway is that Darlington transistors come with drawbacks - higher \$V_{CE(SAT)}\$ and also a higher \$V_{BE}\$ - but we didn't get on to that in this answer. The Darlington transistor Wikipedia page covers the basic difference - worth a read. |
H: Trouble ramping up stepper motor
I am using a bipolar stepper motor with Fs = 238Hz, I want to ramp it up above its Fs, for this purpose I am stepping it up with an interval of 100ms but as soon as the motor reaches 240Hz it starts vibrating on its place and the motor stops, what am I doing wrong here? I am following TI's application note here.
http://www.ti.com/lit/an/slyt482/slyt482.pdf
AI: The relatively high inductance of stepper motor windings means that as you increase the step speed for a given supply voltage, the current (and hence torque) produced falls off dramatically. Basically what you've done is step it at such a high frequency that the current in the winding cannot build to a point where enough torque is produced to overcome the magnetic detent force.
To fix this you need to increase the supply voltage to the motor when it is operating at the higher speeds.
Also note that the motor will become extremely inefficient at high speeds due to the large hysteresis/eddy current losses in the iron core from the high switching speeds. It is probably much better to either use a gearbox or some other type of motor if you want to run it above Fs. |
H: In an ADC what are the units of resolution called?
I have a signal whose full scale output on the 12bit ADC is 4095. If I reduce the signal so I see the output number is (say) 4000 the output has decreased by 95. But 95 what? What are those divisions called? It is clearly (?) not bits.
AI: Speaking as an applications engineer at a company that makes ADC chips... the unit is called LSB (least significant bit), so in your example the ADC output code would be 4000 LSB. (A commenter notes that this could also be called Counts; this would also make sense for dual-slope ADC.)
This is normally only interesting when reading the ADC's datasheet, where there's usually a specified level of accuracy for INL (Integral Non-Linearity) / DNL (Differential Non-Linearity) / offset error / gain error. See for example the datasheet for MAX11300, the ADC Electrical Specifications. (Disclosure: I am a Maxim applications engineer, and this is one of the products I support.) Maxim gives the INL/DNL units as LSB.
Note this isn't a physical unit, it's just a name for the raw count value returned by the ADC. There doesn't seem to be a real consensus as to what to call this raw ADC code unit. Typically an application would use some linear mapping (and possibly calibration values) to convert the ADC LSB code into a meaningful physical unit. For example, 4000 LSB * 5.00 Volts / 4096 LSB = 4.88 Volts.
When I write software to do this kind of conversion, I usually name the raw ADC value something like ADC_Code and the voltage as ADC_Voltage. I would be concerned that in the context of software, "count" could be mis-interpreted as an iteration count (which is valid inside a DVM or other dual-slope ADC that actually counts how long it takes to charge/discharge a capacitor). |
H: Capacitance in serial communication
When we say capacitance is important in serial communication, whether we think of parasitic capacitance? So the lower parasitic capacitance in cable, less is voltage drop and the longer distance we can pass over? Or we are talking about some other capacitance?
I assumed that because we have two parallel conductors close together and air between them, so it acts like capacitor, am I right?
AI: I think you answered the question already :) Capacitances will influence your communication system in two ways:
Parasitic capacitances: Influences the frequency behaviour(more specifically, the cutoff frequency) of your communication system and if you are unlucky it will do this in the bandwidth of your system, so your signal will be partially filtered/weakened.
Capacitance of the transmission line: In high frequency communication, the data line and ground will form a transmission line, which indeed, as you stated, has a per length capacitance, but also inductance, resistance and conductance. These determine the characteristic impedance. Mismatch between the characteristic impedance of the communication line and impedance at the load, will cause reflections that distort the data.
So yes, The per length capacitance influences the characteristic impedance and thus signal integrity. Parasitic capacitance in other places of the circuit in the communication system will influence the cutoff frequency of the system and can weaken the data signal if this frequency is within your bandwidth. |
H: Help to build a circuit to trigger event only after input signal changes from "1" to "0"
I'd like to build a kind of logic as shown in the picture ,but I can't do it and I really appreciate if someone can help on that.
Basically what I'd like to achieve is that when the input signal changes from 1 to 0 it must trigger a switch at last 2-3 seconds and after everything released.
The input signal is not synchronous which means that it might last undefined time.
Thanks !
Thanks to comments and based on the link HandyHowie provided at paragraph "8. More about triggering" as shown in the picture above it looks it might be the right solution ,but I'm not 100% sure. Please let me know if this might do the job.
AI: Sounds like a job for a 555 timer configured as a monostable, see for example - http://www.doctronics.co.uk/555.htm#monostable |
H: UART weird characters
What FD, FE and FF hex values of chars represent in UART communication? For some time my UART won't work, and always returning me those three?
AI: They often mean that communications do not work properly. The very first bit (the start bit) appears, but the data bits do not. Common reasons for that are:
Bad connection in ground or data line (high resistance or capacitance)
Sender's baudrate is way too high (sender sends at 57600, receiver listens at 9600)
Sender's voltage is too low (1.8V sender sends data to 5.0V receiver)
Power supply problems (regulator is overloaded or oscillating because capacitors are not big enough) |
H: Should I run a relay continuously?
I have a mission-critical device, which involves a micro and mosfet controlling a pump. I want to implement a failsafe, so that if basically anything happens to the micro, or the mosfet blows, the system will engage and turn on a backup pump. The easiest way to do this, it would seem to me, would be to have an always-engaged (NC) relay that is disengaged by a failure, energizing the backup pump. So, my question is, is it a good idea to have a relay on continuously for what may amount to years? The extra 20ma for the coil is negligible in this application, but are there any other consequences to doing this?
AI: Look for a high quality relay that has a rated maximum continuous coil voltage. As long as the voltage driving the coil stays below this value and the environment (temp, humidity, etc) stays within the rated ranges then you should expect to be able to drive the coil continuously for its rated lifetime.
One failure mode to consider is that relay contacts can become "stuck" shut. In this case, the relay does not open even though the coil is deenergized. This happens usually because of sparking across the contacts when they are connected to an inductive or high voltage load when they open. It can also happen if you over heat the contacts by driving too much current though them and getting them hot.
It might be a good idea to periodically deenergize the relay both to exercise and to test it. Ideally, you'd do with without a connected load to minimize wear the contacts. |
H: What is the dead time in between two subsequent outputs in the CD4017 counter?
I would like to find out the dead time between subsequent outputs in a cd4017 counter set up in astable mode.I unfortunately do not have a scope to run an experiment myself.
AI: The Timing Diagram in the Datasheet shows there is a slight delay as each output changes, so Q1 will be high for a fraction of a second before Q0 is low. In practical terms they are instantaneously done.
From the Datasheet, the longest possible Low to High or High to Low transition time is 650 nano seconds @ 5V. |
H: Can anyone tell me what these parts are and what they do
On the bottom of this picture there are two boxes. One with what looks like the letter y in a circle and another box which you can turn with a screw driver beside it.
What I want to know is what are these parts and what do they do?
The circuit in the picture is the photographing cell that takes the video (don't know the technical name) from a JVC GR-65 (magnetic tape camcorder)
AI: Those are inductors or transformers. Sometimes they can also contain an internal capacitor. They are used for interstage coupling and as filters. The ferrite core in some of these is adjustable - it is threaded like a screw and can be moved in and out of the core to tune the frequency response. |
H: Simple Regulated Power Supply
I was trying to make a simple regulated power supply using 4 diodes (0.6v), 2 Resistance, 1 capacitor, 1 transformer (15:1), 1 zener diode. My input is 240v 50hz. I have to get 12V 100mA output so i have figured out that the Zener Diode must be 12v in parallel with the load (one resistor) and there must be a resistor before these two in parallel and all of this must be in parallel with the elctrolytic capacitor which i have been trying to calculate by C = It/v taking v as 0.02. i get 0.05F which is a lot!!! so can anyone correct me with these components and tell where i went wrong. The circuit is like this http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/ietron/zenereg2.gif.
NOTE: There is always 2 diodes in use like this https://upload.wikimedia.org/wikipedia/commons/1/13/4_diodes_bridge_rectifier.jpg.
I must calculate the power rating of these component with and without the load
AI: Please provide a schematic.
What assumptions are you making with regard to the range of voltage across the capacitor.
To design the type of shunt regulated power supply I would choose a voltage out of the rectifier capacitor at about 20V - this actually is virtually identical to your design.
The capacitor must be selected to give a suitable ripple voltage. It sounds like you are using the correct approach but probably not made ideal assumptions.
If you use a bridge rectifier with a 50Hz supply the time between charging of the cap is 10ms (twice per cycle). The voltage at the capacitor will be sort(2) time the RMS voltage at the output of the transformer minus the voltage drop of the two diodes in the bridge rectifier.
Capacitor voltage = 240/15 * sqrt(2) - 2*1V = 20.4V.
To estimate the ripple you can assume that the capacity is fully recharged at the peak of every half cycle (10ms apart in our case) then the capacitor discharges at constant current until the next peak. The larger the capacitor the slower the rate the voltage drops and the lower the ripple, the larger the load the higher the ripple Full wave rectifier
In this example with a 15:1 transformer it will result in ~20V at the capacitor.
Ripple voltage = time * Capacitance * (load current + zener current)
Using our values: 0.01 * 0.15/C.
Solving this for 1V ripple and 50mA through the zener we need a 1500uF capacitor.
The zener current will vary from 150mA with no load to 50mA at full load. The zener dissipation will be 1.8W with no load so we need a 3W or so Zener.
The calculated resistor is 53 ohm - a preferred value is 49 ohm or 50ohm wire wound to dissipate the heat.
The resistor will normally dissipate 1.2W but if the output is shorted it will dissipate ~8W. So you could select a 10W resistor.
Notice that the power consumption is the same independent of the load. The circuit is inherently short circuit protected.
These days a preferable design would not use a zener shunt regulated design but instead use an integrated voltage regulator such as a 7812. This one IC would dissipate less power and provide a better regulated output. It will also provide short circuit protection.
simulate this circuit – Schematic created using CircuitLab |
H: How to find which one is master/slave? - PIC
Im using PIC24FJ64GA002 microcontroller interfacing with EEPROM(24C256). EEPROM's SDA and SCL pins are connected with respective PIC24F I2C1's SDA and SCL. All other pins of eeprom are grounded. Here i have EEPROM address that is 0xA0. Now, how to find which one is slave and master? Is PIC or eeprom? I've heard which has clock that is a master. Both have clock pins.
AI: The EEPROM is the slave.
In the On Semi 24C256 datasheet, for example, it says
The CAT24C26 acts as a Slave device.
However it should be obvious that this is the case, because the EEPROM has no idea what I2C address the PIC is using, nor which storage address should be read or written, until it is told, and the master is responsible for providing this information.
Also, under I2C, only the slave has an address. Since the EEPROM has an address (often even called a "slave address") it is clear the EEPROM acts as the I2C slave. |
H: An appropriate voltage regulator / limiter for a 5V solar panel for USB charging?
I'm building a USB solar charger for my tablet, which has so far worked well.
I'm using a 5 Volt, 5 watt solar panel (same as this one), which outputs about 4.5V and 0.6A in real use when charging my device, together with a 5.1V, 5w Zener diode (1N5338B) to regulate / limit the voltage, as it goes up to ~7V when not under load, which I presume could damage my tablet.
Now, I want to add a second identical solar panel (in paralell), to get more current to charge my tablet faster.
I need an appropriate voltage regulator, as this 5 watt zener diode would no longer work with (up to) 10w of power.
So far, I've looked into:
10w Zener diode, but I have not been able to find one.
LM7805, But they require a higher input voltage than my panel produces, and have a ~1v voltage drop.
A DC-DC voltage converter, such as this one. Would this work ? Does it have a voltage drop ?
Any other possibilities ? What do commercially available USB solar chargers use ?
Essentially, I'm looking for an appropriate component to prevent the voltage from the solar panel going over 5V and damaging my device.
Any recommendations ?
AI: My first reaction is to put the two panels in series, then use a off the shelf buck regulator chip. If the two panels can't even put out 6 V or so in series (3 V per panel), then there is so little power available that it doesn't matter if the output is just shut off. |
H: MOSFET Vg not zero?
I have this simple circuit with a 5V power source, a MOSFET, a diode and a resistor.
With the diode already blocking, how come Vg isn't 0V but 2.06V? If the circuit is modified to become this, Vg is then 0V:
Any idea?
Thanks
AI: If you assume the the diode is fully blocking all current, then the MOSFET gate is floating. There is nothing to make a floating node automatically prefer 0V. It would read as 0V on a multimeter because meters include a high resistance (10Mohm+) in parallel.
However, diodes do not block all current flow: if there is any voltage across the diode (forward or reverse) then some amount of current will pass through it from the higher voltage side to the lower voltage side. So in a steady state, the voltage on the left side of the diode should equal the voltage on the right side of the diode, and the current through the diode will be 0. |
H: Can´t get 8-bit shift register working (CD4014BE)
I can't seem to get my 8-bit shift register working. It's the CD4014BE.
The datasheet can be found here.
I've confirmed that the clock (pin 2) is ticking and the input (pin 4) is continuously switching between 0 and 1 on every clockcycle. I've tried multiple different setups, swapped components, but nothing works.
My code:
int clockPin = 2;
int dataPin = 4;
void setup() {
pinMode(clockPin, OUTPUT);
pinMode(dataPin, OUTPUT);
}
void loop() {
digitalWrite(dataPin, HIGH);
delay(100);
digitalWrite(clockPin, HIGH);
delay(400);
digitalWrite(clockPin, LOW);
delay(400);
digitalWrite(dataPin, LOW);
delay(100);
digitalWrite(clockPin, HIGH);
delay(400);
digitalWrite(clockPin, LOW);
delay(400);
}
AI: Your LED is connected to an input. It needs to be connected to an output to work.
All the Px pins are inputs and should be connected to 0V or 5V. You can take outputs from pins 2, 12 or 3. Your LED should have a series resistor of a few hundred ohms, but this chip is wimpy enough it won't likely hurt anything. |
H: Ideal Operational Amplifier excercise
Having an ideal operational amplifier on the circuit below, i need to find the power at R3. Can you help me? Isn't it 0? I couldn't find anything similar on my books.
AI: Please see this image for detailed analysis of the answer |
H: Is it safe to boost output voltage to the maximum limit?
I'm going to be using the MCP1640 for boosting one AA battery to 5.5V. However, its max output voltage is 5.5V. Will it be safe to boost the output to the maximum limit and not cause damage to the chip?
Thanks
AI: Having done exactly this in the past, I can say with great confidence that this is fine. Efficiency isn't the best at the top end of output but it will work fine taking that into account. |
H: QFN Standoff (Solder Joint) Height
When designing a QFN footprint, I've read from (reputation limited, only 2) sources...
http://www.freescale.com/files/analog/doc/app_note/AN1902.pdf
http://www.atmel.com/images/doc8583.pdf
...that the QFN should sit approximately 50-75um (2-3 mil) high off the board for reliable solder joints. I assume that this "standoff" height is created by the solder joints themselves.
So far I have gathered:
Use ENIG or OSP finish. This provides the most flat surface (necessary for applying the stencil, paste and placing the package).
For the center pad (a.k.a. exposed pad, EP, thermal pad), use a SMD (solder mask defined) pad.
For outside (a.k.a perimeter) pads, use non-SMD pads. NSMD pads will result in a pad that is most accurate to your design because copper etching has a tighter tolerance than solder mask.
Extend perimeter pads towards center of package 0.05mm and away from package ~0.2-0.6mm. This provides a more reliable solder joint and potentially allows for easy rework since the pad will extend outside the package.
For QFNs at a pitch of 0.5mm and below, keep PCB footprint pad width equal to package pad width. For 0.65mm and above.
For QFNs at a pitch of 0.5mm and above, you can define the solder mask between pads. For QFNs at a pitch of 0.4mm and below, define an area that keeps mask out for each row of pads on the QFN.
There are many variables here.
The answer I am looking for would define a stencil thickness and aperture opening relative to pad size and pitch. Does the center pad or do the perimeter pads have the most effect on standoff height?
How important is the standoff height? Are the datasheets simply warning us not to float the part with too much solder in the middle?
Past experiences in production environments as well as prototype (DIY, applying stencil and paste by hand) would be incredible.
What design parameters influence the "standoff" (or solder joint) height?
AI: That's going to be determined by the thickness of the stencil and the opening size, or if no stencil the thickness of the solder paste printed on the board. I believe it's a warning that too much paste will float the part and then you might not get good joints all around, or maybe the part might be uneven etc.
The only way you could affect it is if you are defining the paste layer yourself then you define the opening and put an assembly note in about stencil thickness.
But really I would say you should leave this to your assembly house to adjust correctly for their process when they order the stencils. They have to look at all the parts in the board and find a method that will work for all of them, it's part of the magic of being a good assembly house.
Here by the way is a link that talks about it more. Note that their guideline if a 2-3 mil standoff is "after assembly". Not a you should have a 2-3 mil standoff before assembly... |
H: Can adding power storing capacitors burn up an adapter?
I have been working on a circuit board for an Arduino project. It contains an LCD screen, linear regulators and several relays. In an attempt to remove voltage spikes and dips, I have added several capacitors with several different values all around the circuits. I may have over done it.
I am wondering if having lots of capacitance on my power lines will cause an unsafe draw of power from my transformer when I turn it on? How can I prevent this? Also, will having lots of capacitance cause problems for the Arduino and the LCD circuit at start-up (because of a lack of power availability at first)?
I am powering an:
One Arduino Mega
One 32 character LCD screen
Two 9 volt to 5 volt linear regulators
16 relays
Two large 8 segment LED displays
About 20 LED strip segments
with a 2 amp, 9 volt power supply.
Near the power supply: 100 uF and 10 uF
Near the Arduino Mega: 100 uF and 10 uF
Near both linear regulators: 10 uF and 1 uF on both sides
Near Relay power lines: 1 uF and a zener diode
Near LCD Power lines: 1 nF and 100 nF
Near all 9 digital in/out lines: 100 pF and a zener diode
Near all 20 switches: 100 nF
Total is getting close to 300 uF
AI: You will have no problem with only 300uF of capacitance. Although the comments by other posters are true you won't see any problems at this level.
300uF from a 2Amp supply will meant it will only take ~2ms to charge up to 5V. The amount of energy involved will not cause any trouble.
The comment about conduction angle for the rectifier is true but there is invariably enough resistance and leakage inductance in the transformer and series resistance in the capacitor so that it is not a problem in low power supplies - if you were designing a supply for many tens of Amps then other configurations would need to be considered. |
H: How can I use an analog switch to control a higher voltage than vcc?
I am using an Arduino and several analog switches (TEXAS INSTRUMENTS CD74HC4066E) to control several items (LEDs and other devices.) The switching voltage that comes out of the Arduino is 5v, but several of the voltages that I need to switch are higher (typically 9 volts for LED strips.)
Will these analog switches be able to control 9 volts if 5 volts is used to switch it?
Should VCC be 5 volts or 9 volts?
is 12 volts and option?
AI: The simple answer is "No". If you want to switch 9 volts, the CD74HC4066E can do it, but Vcc must be 9 volts. If you look at Figure 1 (Typical "ON" resistance vs input signal range) you'll see that the input is essentially limited to Vcc, so a Vcc can handle 0 - 4.5, and Vcc can handle - 9. In this case, Vih (input "HIGH" voltage) must be a minimum of about 6 volts, and this is more than your Arduino can provide.
There are a number of alternatives available. First, you can get a level shifter. For instance, an MC14504 will do what you want, assuming you don't need to provide more than about 2 mA of current.
If you want more current, there are other level shifters available, or you can use a MOSFET driver chip. I'm personally partial to the Maxim MAX4426 - MAX4428 series, but that's just because I've used them before and am lazy.
Finally, of course, you can roll your own using a transistor or 2. Depending on how much current you need to source or sink you can try either of
simulate this circuit – Schematic created using CircuitLab
these circuits. |
H: (Basic) BGA Multi-layer stack-up/PCB layout question
Getting into BGA's recently if nothing more than necessity as all the 'cool chips' are only today offered that way.
Still, I am missing something I feel essential when it comes to the layout/design/understanding of now layered power/ground planes. SMT alone is pretty straight forward and simple and I feel I gather the concept, but don't yet understand the implementation....
As an example reference a pic from this Lattice BGA layout guide:
Signal planes, fan-out, top and bottom vias are very clear... But, to be honest, I cannot figure out exactly what is 'happening' with the power and ground planes... Or for EX for the power layer there are obviously two domains here [VCCCore and VCCio], which are connected/separated... But obviously no 'traces' otherwise.... I mean are the red and green areas just a 'copper pour' ? and if so why do the vias to the same plane need to overlap ?
There may be other, more complex reasoning behind this, but I feel as if the 'basic' answer ought to be simple, but I am just not 'getting it'... 'seeing it'... (i.e. even as referenced above, well, okay, separate power planes-- Either the trace is inverted in black or there is only a single isolated pin (to the right) in that one domain or I am just really not understanding....
Would appreciate any advice, resources, references to better my understanding.
AI: In these images, everything that's not black is something - either a via drill, a copper trace or pour, or a silkscreen mark. Unfortunately, it seems that the via drills are not displayed in all of the images - namely the power layer - which makes it a bit confusing. The two dark green circles near the center of the chip on the ground layer are two vias connecting to the ground plane. All of the interconnected black circles are clearances between the plane and other signal and power vias that do not connect to the ground plane.
This particular chip requires one ground and two power supplies, vcccore and vccio. Layer 5 gives the best picture of the vias. Mentally scoot this over on top of the power planes and then you can see which pins are connected to the planes and which ones pass through holes in the planes. For example, the group of vias in the lower left corner on layer 5, two of them are connected to vcccore. They also appear to be connected to bypass capacitors on layer 6. For the little group in the center, two pins go to ground, two to vccore, one to vccio, and one is a signal pin of some sort that's routed out on layer 2. I'm sure this would make more sense if you could play around with the layout in the CAD software instead of just looking at some pictures.
Planes are nice because they can act as isolation between the signal layers. Interestingly, it doesn't matter if a plane is power or ground, they both provide the same isolation properties. Large power and ground planes placed close together also provide a small amount of high frequency decoupling. Planes also have lower impedance than traces and as such don't require as much bypassing while also being able to carry quite large currents, which can be required for large ASICs and FPGAs where core supply currents can be 10A or more per chip.
Here is a picture of another BGA footprint with several different copper pours and more obvious vias:
Image source: http://techdocs.altium.com/display/ADOH/Unused+Pad+Shape+Removal
Many of the vias in that image do not have pads as they are not connected on that particular layer. This provides more clearance for the copper pour to go between the padless holes.
Here is a screenshot of the same PDF file with the vias highlighted in white on all layers:
From this picture, you can plainly see that two vias connect to ground, two connect to vccio, and 4 connect to vccore. You can also see that the two vias that connect to GND pass directly through the vccore and vccio planes without connecting. No blind or buried vias are used here, the vias pass through all 6 layers, all the way from layer 1 on the top of the board to layer 6 on the bottom of the board. You can also see the ground vias that connect the bypass caps on layer 6 to the ground plane, though I did not highlight these vias.
I do note that it is very strange that the chip has 6 power pins but only 2 ground pins. Generally chips (especially in BGA packages) will have at least as many ground pins as power pins. |
H: 7 segment LED display not working when using common pin as cathode?
I am trying to wire up a 7 segment LED display but when I connect the common pin to ground and the LED pins to V+ the display doesn't work. However when I use the common pin as an anode and connect it to the positive rail and use a lower voltage for the LED pins then it works, how do I make it work with the common pin as a cathode
AI: You don't. Multisegment LEDs with common pins are manufactured in a specific arrangement, and this cannot be changed after fabrication. |
H: Second order RLC filter and load resistance choice
In this 2nd order, low-pass filter circuit
simulate this circuit – Schematic created using CircuitLab
I am interested in the transfer function
$$ H(s) = V_L (s) / V_g (s) $$
which is (hoping that I didn't make mistakes)
$$H(s) = V_g \displaystyle \frac{R_L}{s^2 L C R_L + s(C R_g R_L + L) + R_L + R_g}$$
Which could be the benefits of having
$$ R_L = \sqrt{L/C} $$
?
I have some notes referring to this condition as to a "matching condition" and this recalls some transmission lines concepts, but I don't know how the transfer function could be simplified by applying that condition.
Even with \$ R_g = R_L = \sqrt{L/C} \$ it can be written as
$$H(s) = V_g \displaystyle \frac{1}{s^2 L C R_L + s(C R_L + L / R_L) + 2}$$
$$H(s) = V_g \displaystyle \frac{1}{s^2 LC + 2s\sqrt{LC} + 2}$$
but, again, I don't see anything useful.
Does the complex conjugate poles have a particular position? Or what else?
AI: Your selection \$R_g=R_L=\sqrt{L/C}\$ gives a conjugate-complex pole pair with a quality factor \$Q_p=0.707\$. Hence, this dimensioning gives you a passive second-order lowpass with Butterworth response (maximally flat). More than that, it can been shown that for each passive ladder structure (and your circuit is the simplest form of a ladder) the sensitivity to parts tolerances is at its theoretical minimum for \$R_g=R_L\$ (matched input and output terminations).
"Does the complex conjugate poles have a particular position?"
Yes - the position of the pole pair has an extraordinary property: The poles are located in the complex \$s\$-plane with a (negative) real part which is identical to the imaginary part (Re=Img). Hence, there is an angle of \$45^{\circ}\$ between a line pointing to the pole and the real axis.
UPDATE: The classical second-order function is \$H(s)=N(s)/D(s)\$. For a lowpass we have \$N(s)=A_o\$ (gain at \$\omega=0\$) and \$D(s)=[1+s/(\omega_pQ_p)+(s/\omega_p)^2]\$.
For finding the maximum of \$H(s)\$ we have to write down the magnitude of the complex function \$H(s=j\omega)\$. As a next step we find the first derivation (differential quotient) and set it to zero. So we find the frequency \$\omega\$, max where \$|H(j\omega)|\$ has its maximum - and inserting this frequency \$\omega\$, max into the expression for the magnitude \$|H(j\omega)|\$ we find the VALUE of the maximum, which is:
$$|H,\text{max}|=\frac{A_oQ_p}{\sqrt{1-1/(2Q_p)^2}}$$
From these expressions we can derive that we have \$\omega\$,max=0 and \$|H,\text{max}|=A_o\$ for the special case \$Q_p=\sqrt{0.5}=0.7071\$. This allows the following interpretation:
For \$Q_p=0.7071\$ there is no amplitude peaking and the maximum is reached at \$\omega=0\$. More than that, the magnitude response for this 2nd-order filter has a "maximum flat" characteristic (Butterworth response). |
H: What's the name of this NPN configuration?
I can't find it anywhere. I know it's not a darlington pair. I tried looking at the 'common emitter' configuration but the explanations of that all talk about a single transistor.
The switch on the left is actually the collector of an optocoupler and I'm trying to switch the load (the 50 ohm resistor and the LED) so that the load is connected when the optocoupler LED is on.
I should have used a PNP and switched the load from the high side but I didn't have a suitable transistor at hand so I came up with this. I did build this circuit and it works, but I don't know whether I just got lucky.
Do you think there is anything wrong with this circuit? I don't know much about the internal workings of transistors, so I might be missing something very important.
AI: This is a cascade amplifier circuit.
https://en.wikipedia.org/wiki/Cascade_amplifier |
H: Calculating required thermal resistance (rsa)
If I have a TO-220, with max power dissipation of 10w and the worst case ambient temp is 50°c, with a \$R_{jc}\$ of 4°c/w and a max allowed junction temp of 150°c (ignore any thermal resistance between case and heatsink).
Would the heatsink's required thermal resistance \$R_{sa}\$ be 6°c/w?
AI: How is this not just a straight forward math problem? Work it out:
You say the thermal resistance from junction to case is 4°C/W, and that the junction is producing 10 W of heat. It will therefore be 40° hotter than the case. The max allowed junction temperature is 150°C, so the max allowed case temperature is 110°C.
You say the worst case ambient temperature is 50°C, so that means 10 W of heat flow from the case to ambient can't drop more than 60°C. Overall the case to ambient path must have (60°C)/(10 W) = 6°C/W thermal resistance or less.
Of course in practise you'd want to make sure the case to ambient resistance is some margin below the absolute maximum of 6°C/W. |
H: Object tracking using mobile devices
We are creating a product that we would like to place a microchip into so that it can be easily found using an iPhone or android device. The product we are creating is about the size of a small watch.
The radius we would need is up to 100m.
Precision needs to be within 1m.
We want to keep costs as low as possible because the product itself will be sold for around £5-10.
Does anyone know where I can start looking for manufacturers of this kind of tracking chip?
I have tried Alibaba but can't seem to find anything.
Thanks in advance.
AI: Since your intention is to "find" the device, I am going to tell you how I would do this. Given your price point and wish for it to work (presumably without extra hardware) on an iPhone or Android device, I would put a microcontroller with built-in Bluetooth Smart (used to be called Bluetooth Low Energy) in your device to be found.
I would also include a buzzer or LED in your target device. In whatever app you have running on the phone, you have the ability to send a BT Smart message to your target device. When your target device receives the message, it beeps / flashes to help you find it.
Microcontrollers with BT Smart hardware built in are available from lots of different manufacturers including (but not limited to) Texas Instruments, NXP, Nordic Semiconductor, Microchip and Atmel. |
H: Efficient, Concise PIC C Code Help
I'm fairly new to programming PIC Microcontrollers, but am getting real stuck into it and loving it. Today my little project was to make a 7 segment display count from 0 to 9, multiplexing each segment as the numbers progressed.
I ended up with this huge chunk of code. Now since I'm fairly new to this, I'm 100% sure there is a better way to make a 7 segment display count, using multiplexing, because I just bogged together what I knew. I got timers and loops and idk stuff all over the place - it works though. I'd love to put everything into folders, make it neat and make sure my code is as efficient as it gets (and not have function declared implicit warnigs in the build!)
Please help a brother out!
Thanks.
Here is what main.c looked like:
(definitions.h contains _XTAL_FREQ and PORTbits, and config.h contains config bits)
#include <xc.h>
#include "config.h"
#include "definitions.h"
void delay(void)
{
INTCONbits.T0IF = 0; //Clear the Timer 0 interrupt flag
TMR0 = 0b11111010;
INTCONbits.T0IE = 1; //Enable the Timer 0 interrupt
while(INTCONbits.T0IF == 0) //Wait for the interrupt to occur. This
{ //happens when the TMR0 register rolls over.
NOP();
}
}
int main(void)
{
TRISD=0x00;
OPTION_REGbits.PSA = 0; //Prescaler assigned to Timer 0 (other option is to
//the Watchdog timer (WDT))
OPTION_REGbits.PS = 0b111; //Set the prescaler to 1:256
OPTION_REGbits.T0CS = 0; //Use the instruction clock (Fcy/4) as the timer
//clock. Other option is an external oscillator
//or clock on the T0CKI pin.
while(1)
{
no0();
__delay_ms(1);
no1();
__delay_ms(1);
no2();
__delay_ms(1);
no3();
__delay_ms(1);
no4();
__delay_ms(1);
no5();
__delay_ms(1);
no6();
__delay_ms(1);
no7();
__delay_ms(1);
no8();
__delay_ms(1);
no9();
__delay_ms(1);
}
}
int no0()
{
unsigned int a;
for(a=0;a<100;a++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=1;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no1()
{
unsigned int b;
for(b=0;b<300;b++)
{
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
}
}
int no2()
{
unsigned int c;
for(c=0;c<120;c++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=1;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no3()
{
unsigned int d;
for(d=0;d<120;d++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no4()
{
unsigned int e;
for(e=0;e<150;e++)
{
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
}
}
int no5()
{
unsigned int f;
for(f=0;f<120;f++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no6()
{
unsigned int g;
for(g=0;g<100;g++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=1;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no7()
{
unsigned int h;
for(h=0;h<200;h++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
}
}
int no8()
{
unsigned int i;
for(i=0;i<86;i++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=1;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
int no9()
{
unsigned int j;
for(j=0;j<100;j++)
{
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=1;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=1;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=1;
SEG5=0;
SEG6=0;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=1;
SEG7=0;
delay();
SEG1=0;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=1;
delay();
}
}
AI: There are a few things that I can see straight away that I would do - but I feel this is more of a general programming question.
You have lots of code repeats
This fragment:
SEG1=1;
SEG2=0;
SEG3=0;
SEG4=0;
SEG5=0;
SEG6=0;
SEG7=0;
appears again and again, along with others like it. Put it in its own function and call it where necessary. This will help you two ways - one is that your code will be easier to read, and secondly if you wish to change this fragment you only have to do it in one place. You could also put this function into an external included file.
You have magic numbers in your code
for(a=0;a<100;a++)
What if you want to display the number for a longer or shorter duration of time? Make the repeat number variable, and either pass it to the function or (because it varies by the number of segments you are illuminating) pass a unit of time (for example milliseconds) you wish to delay to the function and calculate the loop count in the function.
Your code is not well commented
How long does your delay function run for? What about when you come back to this code in 2 months time? Or a year?
You sit stuck idling in delays a lot
This is a bigger question, but your code is not very portable to use it something like a clock (for example) because it can't respond to external events. I would set up a timer linked to an interrupt service routine (ISR) which ticked at intervals I defined. I would implement a state machine with all the behaviour I needed and update this machine at each ISR tick. For example, you could have a state machine which took two inputs - the number of ticks (which you increment each time the ISR runs) and the seven-segment number to output. Every time you check the machine, depending on these two you decide which segment to illuminate and then return - not wasting time sat in the delay loop. This would allow you to respond to events like button presses etc in your main loop, and update the display only via the ISR.
I realise that this last point is a big leap and uses a couple of programming techniques you may not be familiar with. I do suggest making yourself familiar with all of the following (these are Wikipedia links that introduce the general principles - you will want to seek out more information and examples that are more specific to the type of processor you are using).
Finite State Machine
Interrupt Service Routine |
H: 32/16 Bit XOR gate
Has someone of you seen a XOR gate with 16 or 32 inputs? (Integrated in a single chip, of course)
I would need it to compare two 16bits variables to each other.
Or are there better options for comparing such a high input count?
Clock would be 40MHz so it should be really fast (5-10ns delay).
Logic level: preffered 5V or 3.3V
AI: You can cascade 2 or 4 74HC85 chips which will give you an '=' output as well as magnitude comparison.
Edit: Total delay will be much too long for your 5-10ns requirement, if you can't work with the propagation delay, I think some kind of programmable logic will be about your only choice.
You could use a small CPLD such as the XC2C32. |
H: interfaciing with a 5mp csi camera
I'm trying to interface an intel edison board with a 5mp mipi camera (https://www.sparkfun.com/products/13249)
The camera uses an OV5640 imaging sensor, and is used with a pcduino v3. It interfaces with the pcduino via csi interface. I'm trying to have the intel edison interface with the camera. Is it possible to interface it with I2C with the sda and scl pins from the camera module? Or do I have to use csi?
AI: I don't have the OV5640 datasheet in front of me but I can assure you won't be getting video over I2C. Most sensors use I2C or SPI sometimes just to configure the sensor's many, many settings registers. This control interface is also often used by the ISP (image signal processing) portion of the design, that attempts to make a pretty picture out of what you get back from the camera by adjusting all of those settings.
So short answer is I2C is for config the other interface is for image data which will be coming at a much higher rate. |
H: Active and Passive Filter
How does the transfer function of a filter change if I change it form active to passive keeping the order and cutoff frequencies unchanged?
AI: If you keep all the poles and zeros the same, and use ideal components, the transfer function will not be changed.
If you use real components instead of ideal components, then the parasitics will likely change the transfer function somewhat. This could happen, though, even if you just changed from one active realization to another. If the components are well chosen, the parasitic effects should not have a large effect on the transfer function in the frequency bands you care about. It's unlikely you'll be able to avoid parasitics having some effect at very high frequencies (relative to your operating band), though. |
H: What is the purpose of the brown pads on this PCB?
This PCB has wire connections to external coils that are soldered to pads on the board. Each of the connections has a patch of brown material carefully placed in between the two pads. What is the brown stuff and what function does it serve?
Guesses:
The brown stuff is an extra heavy duty resist to ensure that no solder bridges form between the pads when the wires are soldered on. This is plausible, but the pads are far enough apart that bridging seems unlikely.
There are versions of the board that have connectors for the coil connections rather than having the wires directly soldered to the pads. The brown stuff is a heat activated adhesive that is laid down to bond these connectors. The version of the board that I have does not have connectors, so the adhesive is unused.
Some kind of spark suppression for flyback kick from the coils? Like a poor man's spark barrier?
Exclude condensation or dirt from that spot?
Physically prevent a short from errant metal falling on top of the pads? The blob acts like a little fulcrum so that a flat piece can't touch both at once?
Here is the whole board with 6 of these blobbed connections:
AI: It's an epoxy adhesive e.g Surface Mount Adhesives (SMA) for SMD components. It's typically used in surface mount Printed Circuit Board (PCB) assemblies to hold the passive, (and sometimes active), components on to the bottom side of the board during wave soldering. It can also be used to increase the thermal conductivity from the component to the PCB for better heat transfer.
If you look closely at the board you may notice that other SMD components on this same side of the board are glued in place with the epoxy. For example look at two other non-populated sites at J1 and J2. You can see some of the brown material there too:
The process being used to apply the adhesive could be using a screening procedure that was designed do the whole bottom of the assembly at once. And rather than having several screens only one is used despite the component population configuration. |
H: Why should one add 180° to the arctan() result of a complex number?
I am now studying phasors and my teacher told us that when you find in an exercise, for example the current and that current is for example \$ -2 + 3j \$ , then, when you want to find the angle, which is \$ \theta = arctan(-1.5) \$, you have to add to the result angle 180 degrees to find the final angle.
My question is, how do I know when to add and when not to add 180 degrees to the angle?
AI: The one-argument arctangent function (atan()) can only return answers in quadrants I and IV. If you know that the point is in quadrant II or III (i.e. the real component is negative) then you need to transform the result via rotation by \$\pi\$ around the origin.
The two-argument arctangent function (frequently known as atan2()) does not have this caveat. |
H: How to roll of dc gain to unity via an opamp ac amplifier..?
The following circuit is of an opamp ac amplifier..
The text says:
If only ac signals are being amplified, it is often a good idea to "roll off' the gain to unity at dc, especially if the amplifier has large voltage gain, in order to reduce the effects of finite "input off- set voltage.
How exactly the capacitor help in putting the gain of amplifier to unity at dc inputs(input bias currents)..i mean..look the capacitor is attached in parallel acting as low pass filter i.e shorting all AC to ground..which means attenuated dc output voltage will pass to the inverting input of the opamp causing dc amplification(opamp action)..which is against what is said in the text...
please help....
AI: The capacitor blocks DC therefore the only parts left (at DC) to consider are the op amp and R2. R1 is in series with an "infinite" impedance caused by C1 and is therefore not part of the DC analysis.
With only R2 present (at DC) the op-amp gain is unity. |
H: IDE to upload code to LPC1343 over USB
LPC1343 when connected to PC acts like a mass storage device.How can I upload code to the microcontroller.Is there any IDE which converts the C program to .bin for uploading the code?If so,please tell me the IDE names.
AI: You can check the LPCXpresso IDE from NXP. Once you compiled your code, you can drag the bin to LPC1343 mass storage device for flashing.
Check this manual too. |
H: Multiple ground planes with optocoupler
I'm designing a circuit that uses an optocoupler to isolate a relatively noisy H bridge from the USB circuitry also present on the board. Clearly in this case I will have two grounds - what is the norm for dealing with these in terms of ground planes?
My initial thought is to have 2 ground planes, 1 on the USB side and 1 on the H Bridge side of the board (isolated from each other), but could this cause problems with capacitance if one of the grounds were to rise above the other?
AI: Your concerns are justified, as two adjacent ground planes are just perfect for capacitive coupling of high-frequency noise from one to the other.
The standard approach is called a split plane. A split plane is just what it sounds like: your ground plane is divided into two separate areas which are not connected except for one point. This keeps the bridge noise (on one ground plane) separate from the signal processing (on the other plane). The disadvantage with this approach is the need for isolated IO. Your power connections, for instance, have to come in on two separate connectors, one for each plane. Likewise with signal connections. And, of course, you need to restrict the circuits to the area above the appropriate ground plane. |
H: FM Carrier Wave Generation
I'm trying to understand how the following FM radio schematic works.
Specifically, I want to know how the carrier wave is generated. I understand the concept of an LC tank and I think I see it there in the upper right, but what I don't understand is how the oscillation / resonance gets started. All of the examples that I'm seeing online show the use of a frequency generator to make a LC tank "go". Obviously there is no frequency generator attached to this small (simple) circuit.
I asked a friend and he told me he suspected that the transistor(s) were involved, which makes sense, but I'm hoping someone can either explain that to me in more detail or if it's too involved to answer here, point me at some resources (books, web sites, videos, etc.) to get me moving in the right direction.
Thanks!
Update
Many thanks for all of the great information. After learning that this is a Colpitts Oscillator I was able to find the following resources that give even more details. I'm posting here for my future reference and for those that might find this question useful:
Wikipedia
Learn About Electronics
YouTube Video
A breadboard based example
Falstad Circuit Simulator
Learn about electronics
AI: Q2 and the circuit around it form a Colpitts oscillator. This makes use of the fact that a transistor in the common base configuration can have voltage gain from emitter to collector. Consider this simple circuit:
When IN is biased so that OUT is near the middle of its range, then small voltage changes in IN cause large voltage changes in OUT. The gain is in part proportional to R1. The higher R1, the larger the resulting voltage change from a small current change. Note also that the polarity is preserved. When IN goes down a little, OUT goes down a lot.
A Colpitts oscillator exploits this greater than unity gain of a common base amplifier. Instead of the load being R1, a parallel resonant tank circuit is used. A parallel resonant tank has low impedance except at the resonant point, at which it has infinite impedance in theory. Since the amplifier gain is dependent on the impedance tied to the collector, it will have a lot of gain at the resonant frequency, but that gain will quickly fall below 1 outside of a narrow band around that frequency.
So far, that explains Q2, C4, and L1. C5 feeds a little of the output voltage of the common base amplifier from OUT to IN. Since the gain at the resonant point is greater than one, this causes the system to oscillate. Some of the change in OUT appears at IN, which is then amplified to make a larger change in OUT, which is fed back to IN, etc.
Now I can hear you thinking, but the base of Q2 isn't tied to a fixed voltage as in the example above. What I showed above works at DC, and I used DC to explain it because that's easier to understand. In your circuit, you have to think about what happens at AC, particularly at the oscillating frequency. At that frequency, C3 is a short. Since it is tied to a fixed voltage, the base of Q2 is essentially held at a fixed voltage from the point of view of the oscillating frequency. Note that at 100 MHz (in the middle of the commercial FM band), the impedance of C2 is only 160 mΩ, which is the impedance the base of Q2 is being held constant with.
R6 and R7 for a crude DC bias network to keep Q2 close enough to the middle of it's operating range for all the above to be valid. It's not particularly clever or robust, but will probably work with the right choice of Q2. Note that the impedances of R6 and R7 are orders of magnitude higher than the impedance of C3 at the oscillating frequency. They don't matter to the oscillations at all.
The rest of the circuit is just a ordinary and not particularly clever or robust amplifier for the microphone signal. R1 biases the (presumably) electret microphone. C1 couples the microphone signal into the Q1 amplifier while blocking DC. That allows the DC bias points of the microphone and Q1 to be independent and not interfere with each other. Since even HiFi audio only goes down to 20 Hz, we get to do what we want with the DC point. R2, R3, and R5 form a crude bias network, working against the load of R4. The result is that the microphone signal is amplified, with the result appearing on the collector of Q1.
C2 then couples this audio signal into the oscillator. Since the audio frequencies are much lower than the oscillating frequency, the audio signal passing thru C2 effectively perturbs the bias point of Q2 a little. This changes the driving impedance seen by the tank slightly, which slightly changes the resonant frequency the oscillator runs at. |
H: This flip flop does not work properly
I'm trying to make a "Toggle Latch" or toggle flip flop. The S-R latch works properly (The two NOR gates). when I add the two AND gates, the output led turns off and it does not respond to the inputs J and K !
I tried to add pull-up or pull-down resistors but it does not work too.
The IC's I'm using are 7408 and 4001 and I'm sure they are working.
AI: I can think of several possible reasons why you're having problems.
The first is that you are trying to connect 7400 and CD4000 series directly, and that is not a good idea. At the least, put a 1k pullup on the outputs of the 7408s. If you check the data sheet, you'll see that Voh (high output voltage) is only guaranteed to reach 2.4 volts, which is not enough (3.5) to reliably drive 4000-series gates. Even better, replace your 7408s with CMOS gates such as 74HC08.
The second possibility is the fact that you haven't shown your LED connections (and worse, you apparently are driving your LED directly from your logic - 4000 gates have very low current capabilities, especially when sourcing current. Try this instead:
simulate this circuit – Schematic created using CircuitLab
This also addresses the third possibility - you are letting your 7408 inputs float, and think that this will be seen as a low input. It's not. 7400 ICs will generally see floating inputs as a logic HIGH, although they are susceptible to noise when you do this.
The fourth possibility (a low probability, but not zero) is that you have left your two unused NOR gates with their inputs floating. This is a major no-no with CMOS. ALL inputs to a chip must be tied high or low or to a gate output. Unused gates too - I've had unused floating gates corrupt the used gates on a chip, so don't think you can skip this. |
H: When a load draws more current than a source can give
I'm planning to use the LM2623 to boost a single AA for a 5V load that draws 400mA. This graph seems useful
The graph seems to suggest that at Vin=1.5V, there's no way 400mA could be drawn without a large voltage drop. At 200mA, Vout can be kept at 5V. I'm guessing that the load (if USB) will refuse to draw if the voltage is too low (<4.4V).
Is there a way to let it draw as much as it can from the input source? Could two DC/DC converters be used so that the first boosts the input from 1.5V to, e.g., 3V, and the second boosts the 3V to 5V. This way, at Vin=3V, the load could draw higher current (not for very long though).
AI: There is a way, but it only works if your load is intermittent. You can use your source to charge up an electrolytic capacitor. When your load draws current, it'll draw from both the source and the capacitor at the same time, providing far more available current but only for short duration. Depending upon the current/duration you require, you may need to tweak the capacitor's charging rate or discharge rate, whether by capacitor selection and/or adding series resistance to the capacitor. |
H: How to reduce the AVR MCU footprints on PCB?
I want to make my circuit board very small. I have seen many smaller boards with complex circuit. But I am not sure how do they do it? Is it all Custom circuit implemented on VHDL or some micro controller core printed on circuit board like the Black portion on the image below. I am new to PCB designing. Any suggestion would be appreciated.
AI: If you are using an AVR, you might be able to significantly reduce your footprint by using a Wafer Level Chip Scale package (WLCSP).
These can end up using even less board space than a Chip-on-board since you don't need room for the bonding wires. Instead, you fanout the connections from directly under the package, similar to a BGA.
The parts are much easier to work with than COB and you can order them from normal distributors like Digikey...
http://www.digikey.com/product-search/en?keywords=attiny%20wlcsp
You can read more about Atmel's WLCSP in this app note...
http://www.atmel.com/Images/doc42007.pdf |
H: Adding an anti-aliasing filter to op-amp before ADC
I am designing a circuit that is intended to capture audio samples from multiple channels for sound source localisation.
Each channel has the following 2 stage op-amp circuit, before going into a 13bit ADC:
I would like to be able to localise sound sources up to about 10KHz but the larger the bandwidth the better (I think the condenser mics can handle up to about 16KHz, not 100% sure)
The faster I sample the better the spatial resolution I can get. I am able to squeeze a sample rate of about 75KHz.
Question
Do I need to worry about anti-aliasing filters before the ADC? As I understand it aliasing only occurs when you operate below the Nyquist limit, so a theoretical maximum frequency component of 75KHz/2 would be my limit, which is much higher than I need.
If I don't need any anti-aliasing filters is there anything else I should be doing to remove unwanted noise on the output? When I look on a scope it seems to be OK but this is only with 1 channel built, I am worried when I add all five channels on the same board that they are going to interfere with each other.
AI: It is always good practices to use anti-aliasing filter before digitizing a signal. Although your target signal does not contain frequency components above the Nyquist rate, there might be other sources of noise which do.
First of all you need to decide which bandwidth you want to cover. If your ADC samples at 75kHz, then there should not be any frequencies above 37.5kHz. Next, we calculate the needed attenuation and order of your anti-aliasing filter. For this consider following figure:
This figure presents two cases one with a sampling rate fs and one with K * fs. Due to the sampling of the input signal (digital mixing), all frequency components higher than fs/2 will be "folded" back. Frequency components higher than fs-fa will then be aliased into the signal of interest (red).
In figure (A), we assume you want to sample a signal with a bandwidth (fa) close to the Nyquist rate (fs/2).
To guarantee a certain dynamic range (DR) we need a steep roll-off e.g. a high filter oder which attenuates any noise with frequencies higher than fs-fa. In figure (B) we use a higher sampling rate (K * fs) which relaxes the required order of the filter and simplifies circuit design.
As you mentioned, your ADC has a resolution of 13dB. Your ideal SNR (Signal to Noise Ratio) or in this case your DR is then:
$$SNR=N \cdot 6.02 + 1.76[dB] = 80dB $$
So, in the ideal case your want an attenuation of at least 80dB at fs-fa. A basic first order low-pass filter has an attenuation of 20dB/dec. If you restrict your signal bandwidth to say 20kHz, your ideal sampling frequency lies then at 200MHz.
$$f_{-80dB} = f_a \cdot 10^{\frac{80dB}{20dB}} = 200MHz$$
To satisfy this restriction with your sampling rate of 75kHz you would need an low-pass filter 8th order. This is certainly a lot but all this calculations assume noise equal in amplitude as your signal of interest. In practice a second or third order filter is most likely sufficient.
For additional information see:
W. Kester, Data conversion handbook: Analog devices. Amsterdam u.a.: Elsevier Newnes, 2005. |
H: Transformer dimensioning for SMPS (not the Aw Ae way)
There's a lot of documents that talks about dimensioning of the transformer for a SMPS power supply (in this case one quadrant only is not of my interest).
this site cites the following:
The main constraint in all cases (except for saturable inductors) is that peak magnetic
flux density Bmax should not approach the core material's saturation flux value Bsat.
(more)
Contrary to popular misconception, Bmax does not depend on the magnetic material
properties or air gaps. It does not depend on the transferred power neither. However,
for thermal reasons, we have to limit ohmic losses in the wires. Most textbooks
provide formulas for estimation of the core size based on the product of magnetic cross-section
area by the window area available for the winding. Unfortunately, this method is not
very helpful because these formulas are based on pretty much arbitrary selection of
current density and on an assumption of a certain window utilization (fill) factor.
So, I calculated the Bmax for my project, and it gives-me similar results to that of poweresim.com. But with the AwAe method it requires more than 4 times the core size!
Anyway, the Bmax formula being close to the results, it does not have the current included in the formula. So that any power (respecting the Vpk and f in the formula) could be used with the same Ae transformer.
Is the core size not dependent on H, just B? That is, having enough space for windings for the projected currents/potentials and getting Bmax below saturation Bsat, and dis-considering hysteresis, eddy-current losses, what should I consider?
If not what should I consider then? If I try to calculate H, it will give-me values really above saturation (from B-H curve), for near most materials, so I think thats wrong.
AI: I don't know if you have miscalculated but it works like this.
H is ampere turns per metre and the metre part is the mean length around the core that the magnetic lines of flux follow: -
So, amps (peak) x turns (primary) divided by core length gives you H (peak). Note that the "amps" number chosen is the magnetization current i.e. NOT THE SECONDARY LOAD CURRENT (referred to the primary).
Next you have: -
B = \$\mu H\$ where \$\mu\$ is the effective magnetic permeability of the transformer core in absolute units. Effective permeability depends on several factors such as length of core (mentioned above), the cross section, the material type and if any gaps are present.
The manufacturer of the core will tell you the effective permeability of the core you choose. You may also choose to gap the core and this dramatically changes effective permeability.
Next, look at the data sheet for the core and see what flux density will be produced for the given H field. If it looks like it's beginning to heavily saturate then increase turns a tad.
If turns are (say) doubled, primary inductance quadruples and current quarters. This is useful because, for a given primary drive frequency, if you double the turns you half the H field. If really pushing the core you will have to consider gapping. |
H: Trouble Identifying Electrolytic Capacitor
I believe this is a 33pF ± 5% 100v SMD Electrolytic Capacitor, but I'm unsure because of the value of the second line:
Am I reading it wrong? And where could I find such a replacement capacitor?
AI: Second line - capacitance in uF, third line - voltage. So, 33 uF 100V. Not sure about 1st line, it must be series name or code which describes structure type. |
H: Do all digital potentiometers have discrete resistance options?
I'm looking at the MCP4017 and some others, but they all seem to have discrete resistance options. The MCP4017 offers 5k, 10k, 50k and 100k. Are there digipots out there that offer a continuous spectrum to 100k or 200k? It seems very limited if there's only half a dozen of choices.
Thanks
AI: The MCP4017 is a 7 bit digital pot. That means it has 127 steps between the low end and the high end of the pot resistance. The 5k, 10k, 50k and 100k options refers to the total resistance between the low and high ends.
So if you get the 100k pot, it provides 100,000Ω / 127 Steps = ~787Ω per step (linear pots).
This is how all digital pots work, accounting for resistance and resolution of course.
Standard parts are only going to have standard values, like analog pots, but most companies will make custom ranged parts if you pay them enough.
Of course, a quick look on Digikey shows digital pots available in various resistance ranges from 1kΩ to 1MΩ. As an arbitrary value, they have 16.5k pots like the DS3930E or a 18.5k ISL22102IV20Z. |
H: What does it mean when "Adoption of MBIT processes" is listed as a feature of a component?
What is the "MBIT processes" and what does it mean when it's a feature of a transistor like below?
AI: MBIT is a process developed in the early 1980s, quoting from some sanyo document (SY204A):
MBIT : Multi-base island transistor
MBIT transistors are composed of a large number of
island-like bases and emitters. As the MBIT structure
is an aggregate of "unit transistors", the emitter
region is sub-divided and its total area and total
peripheral length are increased. This means that
these transistors can operate at higher withstand
voltages and larger currents. In addition, they operate
with uniform emitter current density. The distance
between the base electrode and the transistor base
itself is short, reducing the switching time
It is merely a marketing hint as to what kind of process was used to judge how reliable its features might be (if you know details about the process involved). |
H: Dmultiplexer truth table and boolean expression
As the title says I have problem with understanding how to make the truth table for demultiplexer and how to make a Boolean expression from it. The thing that bothers me is how to make a truth table with more than one outputs. I search through google and I've found this answer
However I can't understand it, and I have no idea what to do. Any help is appreciated.
I got it, in case anybody came here with search engine, read the comments, and don't Or(+) the outputs.
AI: Following is the truth table for a sixteen-to-one demultiplexer.
A0 through A3 are the output address select inputs, and are used to steer the digital input signal on E1 bar to the output corresponding to the port pointed to by the address select inputs, as long as E2 bar is low.
If you need to construct the Boolean equation for each state, then all you have to do is to collect the terms required to make that state unique and relate them properly. |
H: Modifying Wall-Wart for 5.5V
When I use my tablet on my balcony I would like to have it connected to the charger, but using a long (3m) USB cable seems to drop the voltage so that it doesn't charge.
I am wondering whether I can modify a wall-wart to give (say) 5.5V, thus compensating the voltage drop. I reckon I can open a wall-wart with a hacksaw (and a great deal of care), and later glue/tyrap it shut, but is there any chance of adjusting the voltage when I am inside?
I have an electronics background, can (de)solder regular components (but not SMD), and can use a multimeter. I am also aware that playing silly-buggers with mains voltages carries the death penalty; ie I shan't do anything dangerously stupid.
Is it worth my while to spend half an hour opening a wall-wart (obviously a 2A unit so that the available current is sufficient) in the hope of finding a twiddle-pot or a location where I can add a 0.7V diode, or is there an alternative?
AI: Honestly, I would not bother trying to open up the wallwart. Why?
it's likely to be in a snap-fit or ultrasonically welded plastic case, which will take some opening and not want to go back together
the circuitry inside will be cost optimised - not optimised for easy modification or repair
Your quickest bet is to either create a custom USB extension by splicing in some heavy gauge wire to lessen the voltage drops or to extend the mains voltage (into a weatherproof enclosure / socket if you're looking to make a permanent solution).
Failing that, you could look at finding a variable output power supply module and then splicing on a USB connector at the end, but you might as well just go the "bigger cable splice" route if you're going to bother cutting and splicing anything. |
H: a queries of Sensors on i2c
I saw the sensors on i2c statement and problem as following.
-Interrupt or trigger sent OOB to host using GPIO wire
-Host timestpamps or triggers the event
● host controls the accuracy and latency.
But actually, I want to know that
1.What is the OOB?
2.What is the timestapms?
AI: I expect that OOB in this context means "Out Of Band" meaning it is sent using a separate mechanism from that used for data transfer.
I2C can transfer data but does not inherently have any way of a slave sending an alert back to the master, so a separate line can be used going back to a GPIO (General Purpose Input/Output) at the master CPU.
"timestpamps" is a mis-spelling of "timestamps" meaning to record the time at which the host receives the signal. Or alternatively the host can act on the signal directly.
If the host puts a timestamp on the signal it will probably place it in a queue to be processed later - the timestamp will inform the processing software when the signal arrived. This implies that the host has a concept of time, such as a register that is incremented whenever an interrupt is received from a real-time clock. |
H: Digital Modulation
Hey I have an exam tomorrow and I cant work out this past question and I would appreciate any help.
A black and white TV picture consists of approx. 3x10^5 elements, each of which may occupy one of 16 distinct brightness levels with equal probability. Assume the rate of transmission is 30 frames/s and the signal to noise ratio is 30dB.
Using the information capacity law, calculate the minimum bandwidth required to support the transmission of the resulting video signal
AI: You can reverse the formula to get the bandwidth needed in terms of the data rate and SNR:
$$B = \frac{C}{\log{}_2\left(1+\mathrm{SNR}\right)}$$
You've been told enough to work out how much information each image frames contains, and how many frames are transmitted per second, you can work out the data rate.
Note, however, that using this result is not really practical. The Shannon-Hartely formula tells us in principle that it's possible to carry a certain amount of data over a channel with a given bandwidth and SNR. But it tells us nothing about what coding scheme might allow us to do so. And in practice, real encoding schemes only approach the Shannon capacity asymptotically, so a real system will need slightly more bandwidth than what's given by the formula. |
H: How do Ethernet cables/USB cables send binary 0?
I was wondering how your computer sends binary zero as an electrical signal. Is there a certain delay or does it do something unique.
AI: The most basic CMOS/TTL logic uses a voltage within a specified min/max range to represent either a "logic low" 0 or a "logic high" 1. These include the discrete logic gates like 7400 / 7402 / 7432 that were used in the 1970's (and are still used sometimes on solderless breadboards), as well as more modern higher-integration chips. The exact voltage range is listed in the device's datasheet Electrical Characteristics table:
- VOH = voltage output high; specified as a minimum limit
- VOL = voltage output low; specified as a maximum limit
The device that is driving the output, is guaranteed to drive a logic low 0 as some voltage between GND and VOLmax; and also to drive a logic high 1 as some voltage between VOHmin and VCC (power supply rail). The gap between VOLmax and VOHmin is a dead band where the output is undefined -- this is what provides the noise immunity of digital signalling as compared to analog signals.
- VIH = voltage input high; specified as a minimum limit
- VIL = voltage input low; specified as a maximum limit
The device that receives the input, will interpret a voltage between GND and VILmax as meaning a logic low 0, and interpret a voltage between VIHmin and VCC as meaning a logic high 1. Any input between VILmax and VIHmin is not valid. And any input below GND or above VCC may violate the Absolute Maximum Ratings (i.e. permanently damage or degrade the device).
For CMOS, the VOH/VOL and VIH/VIL thresholds are usually a percentage of the power supply, like 30%VCC / 70%VCC. For TTL, the thresholds are absolute with 2.4V the usual VOLmin voltage.
Timing is a separate concern. If the logic is just implementing some Boolean equation ("glue logic"), the output signal simply follows the input after some specified propagation delay time. If the logic implements a state machine or a CPU, there will be a clock signal that determines the system's timing.
You also mentioned the Ethernet and USB communications protocols; these are a lot more complicated. It's a lot harder to even frame the question in terms of sending a single binary bit, since there is a lot more information that is required (such as host IP address, frame number, etc.) These build on the basic idea I described above, but add a lot more layers that are specific to each standard.
Ethernet has several layers of communications protocols; the datalink layer is different even for different types of Ethernet -- 10Mbit and 100Mbit are not just different speeds but different signalling protocols. This is described in IEEE standard 802.3
The USB protocols are described in the USB Standard, as well as on Jan Axelson's USB Complete website.
If you've never read a standards specification document before, I'd recommend starting with USB -- it's comparatively a bit simpler than Ethernet. |
H: How to interpret op-amp differential amplifiers intuitively
I was looking for a simple way to understanding why the classic op-amp amplifier works the way it does. I've only found algebra-oriented explanations, but not one that gives an "electronics" argument.
AI: You may try to look, roughly and without taking the schematic notation word by word:
simulate this circuit – Schematic created using CircuitLab
Suppose that the magic diode in the center shifts the voltages to zero (by modifying the whole structure's reference/ground voltage to make it exactly that!). What's the voltage of the output node? Well, we have \$V_1\$ amplified by a factor of \$\frac{R_2}{R_1}\$ and \$V_2\$ amplified by a factor of \$\frac{R_2}{R_1}\$ as well! Now simply measure the voltage from \$V_o\$ by taking the amplified voltage over \$R_2\$, negative, and add the voltage over the other \$R_2\$, positively. Ta-da! The output voltage from that node to ground is \$\frac{R_2}{R_1}(V_2-V_1)\$.
I hope this helps whoever looks for another perspective to the circuit. |
H: Is there a wire (a bus), albeit a very short one, between the CPU and its level-1 cache?
I was wondering what is the specific connection mechanism between the CPU and its level-1 cache so that in practice level-1 cache access time is reduced to match the CPU clock frequency?
Do level-1 caches avoid connection with the CPU by wires to achieve that speed, or is some other special mechanism in place for that?
Or there is a wire, but it's so short as to have negligible effect on the speed of the signal going through it?
AI: No wires at least for the L1 and L2 caches, which nowadays are always on the CPU chip itself, and so they are connected to the rest of the circuitry with the same interconnects in silicon used for any integrated circuit, and are located as close to the cores as possible. (Note: I am not considering the silicon interconnects within an IC to be wires, nor the traces on a PCB even though they function like wires. Wikipedia doesn't either.)
L3 caches may be found either on the chip itself (as in the example below) or on the mother board. In the latter case, where the connections to the from the CPU to the L3 is external, then these connections between the integrated circuit die and the pins on the chip are done with gold wires as shown below:
.
So for a relatively short distance, yes there can be real wires involved. But not for an L1 cache, which was the subject of your question.
The very first Intel processor to have an L1 cache was the 80486. It was 8K and located on the chip. The L2 cache was 256K, and located on the motherboard.
Here is a picture of a four-core CPU:
The smaller ellipses are the L1 caches. The larger ellipses are the L2 caches. They are each private to each core. The large area is the L3 cache, which is shared between all of the cores.
Note that the caches take up nearly half of the area of the chip.
On my I7 CPU with four physical cores, there 4 x 64K L1 caches, 4 x 256K L2 caches, and one 8MB L3 cache. |
H: PIC MCU: Two ADC inputs help
So currently mucking around with the ADC on my PIC16F917. I got single button functions going and all works well.
What I'd really love help with, is how to make the MCU accept 2 inputs, without the second being an ISR.
How can I modify this code, to make it so when, say AN1 goes > 512, PORTDbits.RD1 goes high, alongside AN0 and RD0. Acting like two separate systems, but working simultaneously. Is it actually even possible?
Thanks again, Ezra
#include <xc.h>
#include "config-bits.h"
#define _XTAL_FREQ 4000000
void delay()
{
int i;
for(i=0; i<5000; i++)
{
/*Timer Stuff*/
}
}
int main()
{
TRISD=1; //Set all D pins to input
TRISDbits.TRISD0 = 0; //LED output
ANSELbits.ANS0 = 1; //Select ADC input
ADCON0bits.ADFM = 1; //ADC result is right justified
ADCON0bits.VCFG = 0; //Vdd is the +ve reference
ADCON1bits.ADCS = 0b001; //Fosc/8 is the conversion clock
//This is selected because the conversion
//clock period (Tad) must be greater than 1.5us.
//With a Fosc of 4MHz, Fosc/8 results in a Tad
//of 2us.
ADCON0bits.CHS = 0; //select analog input, AN2
ADCON0bits.ADON = 1; //Turn on the ADC
int result;
while(1)
{
__delay_us(5); //Wait the acquisition time (about 5us).
ADCON0bits.GO = 1; //start the conversion
while(ADCON0bits.GO==1){}; //wait for the conversion to end
result = (ADRESH<<8)+ADRESL; //combine the 10 bits of the conversion
if(result > 512)
{
PORTDbits.RD0 = 1;
delay();
PORTDbits.RD0 = 0;
delay();
}
else
{
PORTDbits.RD0 = 0;
}
}
}
AI: With this PIC true simultaneity is not possible, as there is only one sample and hold and one converter. If nearly is good enough, then adjusting your code to simply switch between inputs would work. If not, then a PIC with more than one ADC/Sample and Holds would be the way to go, e.g. a dsPIC such as the dsPIC33FJ128GP802.
Or of course you could add an external ADC. |
H: Connecting batteries in parallel doesn't produce greater amperage
Having two 3.7V "3000mAh" Rechargeable Li-ion batteries, I tested connecting them in series and parallel.
Using a multimeter, I measured the amperage of single batteries and it's about 6A. When connecting them in series, the voltage is doubled (it becomes 7.4V).
When connecting them in parallel, I expected that the amperage will be doubled, but it's not. It remains 6A.
Why does this happen? How can I increase the amperage using more batteries?
From what I know, when connecting batteries in series makes the voltage to be increased and when they are connected in parallel, the amperage is increased–but in my tests this last expectation didn't happen. Why?
This is how my circuit looks like:
My two batteries, in parallel, connected to ampermeter.
AI: As the comment mentions, paralleling and short circuiting lithium batteries is potentially very dangerous if you don't know exactly what you are doing. Most Li-Ion batteries have a protection circuit which includes overvoltage and overcurrent protection, but it's still not a good idea at all. Much better would be to test this using a couple of small alkaline batteries (e.g. AAA) and still do it briefly.
If you absolutely must test the current on the Li-ions, then read the datasheet, see what the maximum current rating is and for how long, then use external current limiting on each battery. |
H: Xilinx ISE Synthesis taking too long
I just finished to write a pretty complete design on ISE 14.7 targetting a Virtex7 device. The behavioural simulation (on Isim) takes a while but works perfectly.
Therefore, I tried to move to the next step adding a Time Constraint by double clicking on my top module -> User Constraints -> Create Timing Constraints in the ISE interface. This action triggered the synthesis and it's now more than 24 hours that ISE is trying to "Optimize" one of my module.
I don't mind about letting the program running for other 24 or 48 hours but I am suspecting that something is wrong with my design ... I know that it might be pretty eavy since I use many logic cores instances but I am afraid it doesn't justify the delay for the synthesis.
My design can be found at the following link:
https://dl.dropboxusercontent.com/u/12734577/fourier_QAM_modulator.zip
Does anyone have an idea about how to solve my problem ?
I thank you in advance,
Best regards
Edit:
For posteriority, the full code is available here; details and explanations can be found in the paper.
AI: I finally solved my problem and I post my answer here for futur generations.
Consistently to the advice of Brian Drummond, I created a small testbench for each module of my system and I ran the synthesis as well as the post-synthesis simulation on each on of them. Everything was working fine, none of the synthesis were taking an excessive amount of time.
Subsequently, since my device contains a large number of loops, I have made the following modifications:
- removing some input/output pins by using serialisation instead
- configuring the IP cores to use DSP instead of the fabric
My design could finally synthesise after a large amount of time.
I hope this may help someone else |
H: Voltage across a capacitor.(steady state)
At the circuit above I built a simulation that shows the voltages on both sides of the capacitor(in red and green).
However the voltage measurement shows that the voltage on the 3u capacitor is only 1[V]
I couldn't understand why is that (and not 6[V])?
Important fact - it is a steady state condition.
Thanks a lot.
AI: Your nodal analysis is incorrect. For steady-state resistive analysis, we can remove all of the capacitors from the circuit. This quickly shows us that the green node is at 4V with respect to the negative terminal of the 12V supply. This bold part is important.
Now, on the left hand side, we effectively have a 15V supply into three series 5k resistors - the 2k and the 3k combine in series and the capacitor has no effect. This puts the red node at 10V with respect to the negative terminal of the 15V supply. Notice that our reference point for the potential is different for the red and green node - so the voltages can not be used in the same equation just yet.
For that, we have to pick a common reference point (which if I were doing this analysis I would mark using a signal ground symbol to help me think). For convenience, let's make the negative terminal of the 12V supply the reference point - which means the green node voltage needs no transformation.
The red node does, however. We know that 5V is dropped across each of the 5k resistors from Kirchoff's laws, so across the 5k resistor between the red node and our newly chosen reference is 5V. So now we can see that with 5V wrt our reference at the red node and 4V wrt the same reference at the green node, we have 5V - 4V = 1V across the 3uF capacitor. |
H: What is the effect of this delayed statement in the following process?
Hi guys in the following process how the delayed assignment should be interpreted?
clk_process : process
begin
clk <= '0','1' after 5 ns;
wait for 10 ns;
end process;
Is it intepreted as...
clk is set to '0' for 5 ns then i changes into '1' and after 10 ns it is set again to '0'?
or it is simply '0' for 5 ns and '1' for 5 ns?
I'm a bit confused...
AI: The process has no sensitivity list, and a wait statement. It will therefore run repeatedly. The following stages can be seen:
Time = 0; set clk to '0', with a delayed assignment to '1' after 5 ns.
Start 10 ns wait.
Time = 5 ns. perform delayed assignment to '1'.
Time = 10 ns, wait statement has completed.
Go back to the start of the process
The end result is a clock, starting at '0', with a period of 10 ns. |
H: What is the most common reason I lose 4G?
I only transiently have 4G on my phone. What is the main cause of its unavailablity?
I would have thought it was caused (in reality) by a weak signal from the base station that cannot carry the phones data above a critical error rate. Is this right?
AI: Yes sometimes having no 4G means that the signal is too weak.
It works both ways, also the signal from your phone to the base station has to be strong enough to make the connection.
It might be possible to force your phone to stick to 4G but then the resulting data rate might be so low that 3G is a better option. |
H: PIC MCU: Triggered Counter from ADC
Basically, I'm looking to program a PIC16F917, so that a particular int will increment by one every time I press a button.
Now I got the ADC up and running, I got loops to count, but I seem to be lacking the knowledge and experience to put it altogether, and latch the input back to zero before the int increases by a number greater than one.
The following code is what I have written so far. The problem with it is that it increments multiple times per push (as many delay cycles that the button was held for), and I'd love to make it only count by one. I was thinking of creating a new function and int but I just can't seem to put it together - much help needed.
Thanks for helping, Ezra
#include <xc.h>
#include "config-bits.h"
#define _XTAL_FREQ 4000000
int result;
int output;
void delay()
{
int i;
for(i=0; i<100; i++)
{
/*Timer Stuff*/
}
}
int main()
{
TRISA=1; //Set all pins to input
TRISB=1;
TRISC=1;
TRISD=1;
TRISE=1;
TRISDbits.TRISD0 = 0; //LED output
ANSELbits.ANS0 = 1; //Select ADC input
ADCON0bits.ADFM = 1; //ADC result is right justified
ADCON0bits.VCFG = 0; //Vdd is the +ve reference
ADCON1bits.ADCS = 0b001; //Fosc/8 is the conversion clock
//This is selected because the conversion
//clock period (Tad) must be greater than 1.5us.
//With a Fosc of 4MHz, Fosc/8 results in a Tad
//of 2us.
ADCON0bits.CHS = 0; //select analog input, AN2
ADCON0bits.ADON = 1; //Turn on the ADC
while(1)
{
delay(); //Wait the acquisition time (about 5us).
ADCON0bits.GO = 1; //start the conversion
while(ADCON0bits.GO==1){}; //wait for the conversion to end
result = (ADRESH<<8)+ADRESL; //combine the 10 bits of the conversion
if(result > 512)
{
PORTD=output++;
delay();
}
else
{
NOP();
}
}
}
AI: Use a variable to remember whether the last result was < than 512. Prior to incrementing the output variable, check if the previous result was < 512. Could you have used a digital input rather than an analogue one? |
H: Interfacing VoltageREF IC with the ADC
In a Battery Charging application, i am using ADS8319 ADC from Texas Instruments for digitizing the charging voltage and current signal, and providing it to the Microcontroller via SPI interface. (Battery charging will be done via synchronous Buck converter running at 62.5kHz, and ADC's sampling frequency would be a few Hz considering its a battery charging application). I will be using 2 of these ADCs (one for current and one for voltage measurement) as its a single channel ADC. For reference signal to this ADC i will be using the reference voltage IC REF5050 from TI. Two of these IC's will be used to provide reference to the ADS8319 seperately.
If you see in ADS8319's data sheet at page 21 Figure 59 and at page 22 Figure 60, two different methods of interfacing this REF5050 with the ADS8319 have been used (one is using OPA365 as a buffer i guess, and the other one is interfaced directly with the ADC). However i couldn't find the significance of (using or not using) the OPA365.
So my question is, should i consider using this OPA365 in between the REF and ADC ICs ? Would it (using it or not using it) effect in my case ? Offcourse i'd find it easy NOT to use it (less work @ circuit design + less circuit cost). So i just want to know what effect does it (OPA365) have on the circuit (especially in my case) ?
Your helpful comments and suggestions would be appreciated.
Thankyou!
AI: Perusing the datasheets, the only place where the OPA365 is used to buffer the REF pin is in the ADS8319 datasheet. The OPA365 datasheet specifically requires a series resistance for any significant capacitance (see page 11 and figure 7 of the datasheet). This amplifier is stable for pure capacitive loads up to 1nF, a far cry from the 10 microfarad it is driving in this schematic.
I personally think this may be an error in the ADS8319 datasheet as the OPA365 device is not stable with such a large capacitance being directly driven; the 50 ohm feedback resistor may be there to form a compensation network, but given the variation of typical large capacitors (10% is standard) I would not trust the circuit to be unconditionally stable.
The reason for buffering the reference input could be due to the fact that the ADS8319 is a charge redistribution device (unlike the resistive types of yore) which leads to lower power at the expense of taking pulses of current during the charge stage of the conversion.
As the reference pin has to be bypassed by a large capacitor (acting as a reservoir for said pulses of current, which will be taken from both here and the input signal), you will need a setup that is stable; the diagram without the OPA365 achieves that (the reference you are using is stable with large capacitors provided you choose the correct device - see below).
So I would not use the OPA365 to buffer the REF input on the grounds that I could not guarantee the stability of the amplifier (which is at its most vulnerable in unity gain).
Note the output ESR requirement for the reference; it should be below 1.5 ohm (see page 10 of the REF505 datasheet) for stability. If you desire the lowest possible noise (probably not an issue in your application) then follow the guidance, but rather than relying on the capacitor ESR (where usually only the maximum is stated), specifically add a 1 ohm series resistor to the capacitor, which if ceramic, will yield the 1 ohm of output ESR.
Update. Added an option for those times when a distributed reference is required.
When using a distributed reference, it can be desirable to buffer the reference and decouple this buffered reference at multiple locations. For those scenarios, devices such as the LM8261 are excellent choices.
HTH |
H: Seperate Signal Planes in Eagle
I am trying to make separate signal planes in eagle using the polygon tool. The problem is that when I draw the first polygon, regardless of whether I draw it small or large once I name it to GND and hit the "Ratsnest" tool, it will just occupy the whole space of the PCB leaving no space for other planes. How can I fix that?
Also I need one of the planes to be exposed copper, by drawing a polygon on either the bstop or tstop layers, I am getting what I need. The problem is that I don't know how to connect it to another part (say a transistor)?
AI: Give each one a seperate rank (found in the properties dialogue). The lower the number the higher the priority. So a polygon of rank 1 will be drawn first, then ones with a rank of 2 will be drawn next (being cut away by the higher priority polygon outlines).
This will allow you to have polygons inside polygons.
The second part of your question, if you name the polygon with the same name as the net you want it to connect to, then you can just route a trace staring from anywhere within the polygon and Eagle will know they are meant to be connected. |
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