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H: Max Serial Cable Length?
What is the maximum length of serial cable I can use, to connection work properly? Is length of serial cable in connection with baud rate? I am using about 5 meter cable at speed 38400 bauds and RS232 communication, is it too long?
AI: Capacitance in the cable begins to affect serial communications, typically many manufacturers/devices set a limit of approximatly 15m or 50ft on cable lengths for anything up to 9600 baud, and about 4m for 38.4k. That being said, with decent cable it is easily possible to go longer in tested or non-commercial use, but I would stick to the guidelines for a commercial product, if only to leave an out for support calls.
If you really need length, RS232 to RS422/485 converters are very inexpensive, and you can run the differential modes (422/485) over two wires for well over 100m.
In your case, 5m really shouldn't be a problem at 38.4, as long as your cable is of reasonably quality. Almost any shielded multi-conductor cable should work at that distance, and probably three times it. |
H: BeagleBone Black User Leds
Is it possible to set some of four available user leds to show serial port activity, like we can set it to show mmc activity?
AI: Based on Ubuntu linux on BBB, but other Linux will work similarly.
The user LED mode can be accessed using the following command:
echo none | sudo tee /sys/class/leds/beaglebone\:green\:usr3/trigger > /dev/null
Where none can be replaced with one of the following:
none nand-disk mmc0 mmc1 timer oneshot heartbeat backlight gpio cpu0 default-on transient
I am unaware of any option to "connect" a user LED to a serial port. The only option I see is "manually" writing 0 or 1 to one of the brightness files upon receiving data in your program.
Optionally work around running as root by issuing a sudo chown ubuntu:ubuntu /sys/class/leds/beaglebone\:green\:usr3/brightness once.
In Perl you can blink the LED as follows:
my $ledState = 0;
while( 1 ) {
$ledState ^= 1; # toggle state
open( LED , ">" , "/sys/class/leds/beaglebone\:green\:usr3/brightness" ) or die "Cannot open file for LED control: $!\n";;
print LED $ledState;
close( LED );
sleep( 1 );
} |
H: Can I use electrolytic capacitor in a schmidt trigger oscillator
I want to build this cricket chirping circuit that I found on Happy Lab.
The values are specified as follows
R1: 100 k
R2: 39 k
R3: 290 k
C1: 100 nf
C2: 10 µf
C3: 10 µf
C4: 100 µF
D1,D2: 1N4148
IC: 74HC14 (6x inverter with Schmitt trigger)
I have sourced all the parts except am having trouble getting 10uF ceramic capacitors for C2 and C3 in time for my deadline. Happy Lab application notes say
Since the use of polarized capacitors for C2 and C3 is kind of
unskilled (it works most the times especially when using higher
voltage capacitors ie. 63 volts) it is better to use non-polarized
capacitors. 10µF non-polarized ones are expensive and or bigger. So
much smaller capacitors can be used when increasing the value of the
corresponding resistor at the same time.
I don't follow this. Does this mean I can use 16V 10uF electrolytics (which I do have) for C2 and C3? I am aware electrolytics can explode with reverse polarity which obviously would be bad.
If I can use the electrolytics, which side of C1 is +ve? The trigger output or diode facing side? My analogue circuitry is very rusty.
I plan to drive this circuit not with a solar panel but 2 x AA's in series (3V).
AI: I would just lower the capacitor values C2 and C3
by a factor 10 and compensate by multiplying the values of
R2 and R3 by a factor 10. The 74HC14 is CMOS so it will also
work with such an increased impedance.
If you keep the R x C value constant then timing will not change (within
reason but the values I propose are still OK).
Then the largest timing capacitor becomes 1 uF which is easy to find in a
non-polarized version.
For C4 you can just use a polarized electrolitic capacitor. |
H: In MIPS Instruction set, why do we sign extend the immediate data instead of zero extend in I type instructions?
Recently I was reading the "Computer Organization and Design" Book By Patterson and Hennessy, and I came across the question that in order to make the immediate data 32 bit in Immediate type instructions(generally load/store), we sign extend it, but why we do not zero extend it instead?
thanks in advanced
AI: You have a limited number of bits in a 32-bit instruction word to create a 32-bit immediate value. If you can't create it this was, you will have to use multiple instructions or other tricks (slower, take more memory). So let's say you have 10 bits. What would be more usefull, being able to create
0 .. 1023, or
-512 .. 511 ?
You can decide from intuition, or from data gathered from compiler back-ends, but in most cases people have concluded that including at least -1 is more usefull than doubling the range on the positive side.
IIRC ARM decided to use a slightly more complex scheme, using a few of the available bits to specify how much places the value must be shifted to the left. This sacrfices the number of small values that can be made, but gains a few (widely separate) larger values, which is nice for instance for bit fields within a word. But it requires barrel shifter hardware. The MIPS designers thought the transistors needed for a barrel shifter would be better used for other purposes.
The very good aspect of the H & P books is that they quantify the effects of such design decisions. Do read all their books, not just this one. |
H: Can a radio transmitter somehow detect the number of receivers in its area?
During conversation, a colleague proposed that over-the-air television and radio broadcasters can determine the number of viewers or listeners based on the "load" on their signal. This seems to me like total bupkis, but he's piqued my curiosity and I've not been able to find a discernible answer when searching the web to prove him right or wrong.
Is such a thing even possible? Do the number of receivers within the broadcast range of a transmitter put any "load" on that signal? I always thought that the amount of power required for a transmitter simply determined the distance at which the signal could still be reliably received. AFAIK receiving a radio signal does not require any actual power at the listener's end, except to filter and amplify that signal into something useful, and that power is provided locally.
If this were true, it seemed plausible to me that one could place several signal monitors at a fixed radius from the transmitter and measure the signal strength at each. Monitors with weaker signal must have more receivers between that monitor and the transmitter, which could be used to extrapolate the number of receivers within that arc of the radius at, say, -3 dBm per receiver.
What I do know is that obstructions between the transmitter and receiver degrade the strength of the signal, so in that situation, one would have to account for buildings, trees, mountains, birds, precipitation, clouds, airplanes, helicopters, low-flying kayaks, large snowmen, and Santa Claus.
AI: Actually, yes, a receiver can affect the transmitter. Passive RFID is based on this principle.
However, RFID only works at very close distances, where the receiver is absorbing something on the order of 10-4 to 10-5 of the transmitter's signal. In other words, the transmitter is sending out hundreds of milliwatts, while the receiver is absorbing a few microwatts. Such changes are just barely detectable at the transmitter with careful techniques.
However, for general broadcast radio, the transmitter is sending out tens to hundreds of kilowatts, while the receiver is absorbing tens to hundreds of femtowatts, which is a fraction on the order of 10-18. This is completely undetectable at the transmitter. Furthermore, receivers absorb signal regardless of whether they're turned on or not, so even if it were detectable, it would tell you nothing about how many people were actually listening. |
H: Adding a resistive path between live conductors and earth - safety issues
(Note: I am in the UK so the terms 'line' and 'neutral' refer to the two live mains conductors)
I am trying to establish a list of safety issues which I should be aware of if I decide to introduce a resistive path between either of the live mains conductors and earth in a Class I device, or to decide whether I should avoid the idea completely!
The reason for this is that I am working on a circuit which performs a number of diagnostic measurements on the mains supply to be built into a device (earth resistance, correct line/neutral polarity and AC voltage), the circuit will disconnect the supply in case of a fault. One idea for the circuit involves resistive paths between both live conductors and earth (other versions use capacitive sensing but have a number of issues) - see 'Scenario 1' in the image below for a simplified schematic. I can also think of other situations where someone might consider using a resistor between a live conductor and earth - for instance to ensure Y-capacitors in a CM filter are drained ('Scenario 2' below) - so I'm interested in getting to the bottom of the general issue here of allowing a DC conduction path between the live conductors and earth.
The earth in the device is bonded to the chassis and appears on a number of external conductors. I was initially against the idea of using a resistor between live conductors and earth as this compormises galvanic isolation, however as I thought about it more I started to sway towards the opinion that this is possible if done carefully. I have not found any sources which deal specifically with this issue, however indirectly by reading about electrical safety testing and regulations as well as using some common sense I have compiled a list of requirements, which, if met, might make this acceptable:
The resistance should be sufficiently high to minimise leakage current - most obviously so as not to trip the RCD (the threshold in the UK is 30 mA), however a much more restricting constraint is an insulation test: for instance, if I understand correctly during a PAT test 500V DC is applied between the live and earth connectors, and the measured insulation resistance must not be below 1 MOhm. From this follows that the total resistance of the resistive path must be at least 1 MOhm plus a safety margin (perhaps 2 MOhm?)
The components in the resistive path must be of a sufficient power rating to handle both dissipation under normal use and dissipation during an insulation test such as above.
The resistive path should not introduce a risk of voltage spikes on the live conductors reaching the earth conductor, so appropriate transient voltage suppression should be used before the resistive path and/or incorporated into it. In my circuit as drawn in 'Scenario 1', I would use higher-voltage transient suppression between the live conductors and earth, as well as lower-voltage transient suppression between the sense inputs and earth.
The physical construction of all resistors should be such that clearance and creepage requirements between live conductors and earth are met (e.g. use a through-hole resistor where the distance between leads is greater than 5 mm).
After coming up with this list, I'm still not confident that this is a good idea, partly because I have never seen this done - so the question is have I missed anything, or is there any other reason why resistors between live conductors and earth should be avoided?
Of course I'm aware that insulators always have finite resistance and Y-capacitors have a leakage resistance which in this context is theoretically identical to having very high-valued parallel resistors, but these resistances are much higher than the megaohm range considered here!
AI: (This answer refers to UK regulations, as the questioner is in the UK.)
Given 2MOhm resistance as discussed in your question, earth leakage current would be acceptable at 0.1mA.
Another point to consider is that the class-Y/class-X capacitors which are typically used for RFI suppression are put through safety testing, and are required to fail open circuit. The same may not be true of the resistors you choose to use.
According to the 16th edition wiring regulations, there is a limit on earth leakage current for class 1 appliances:
5.9.3
Maximum permitted leakage currents are listed in Appendix L of the 2nd
Edition of Guidance Note 1, and vary from 0.25 mA for Glass II
appliances to 3.5mA for information technology equipment (see {7.8.2})
Appliances with higher leakage must have warning labels and a high integrity earth connection.
7.8.2
Any piece of equipment having a leakage current exceeding 3.5 mA must
be fitted with a label adjacent to the primary power connection which
reads:-
HIGH LEAKAGE CURRENT
earth connection essential
before connecting the supply
5.9.3
7.8.2 |
H: Find the 'Effective Voltage' with only the surface under and above the 't' axis
To find the 'Effective Voltage' and the 'Average Voltage' of a voltage over time we have the following functions:
$$V_{eff}=\sqrt{\frac{1}{T}\int_{0}^{T} f(t)^2 \text{d}t}$$
$$V_{av}=\frac{1}{T}\int_{0}^{T} f(t) \text{d}t$$
But in my case it is impossible to find a general function for my voltage so can I use the surfaces? And if I can how can I find the 'Effective Voltage' and the 'Average Voltage'?
Thanks in advance
AI: As you might know the definition of the definite integral \$\int_{a}^{b} f(x)dx\$ in layman's terms is area under the curve (and above the horizontal axis).
So, yes you could approximate the average value by just manualy calculating the area under the curve. But effective value contains \$f(x)^2dx\$, so you would first have to square the curve to get a new one and then calculate that area.
If the reason you cant solve the integral is that it is too complex you can use one of the online calculators, such as WolframAlpha or Symbolab to calculate it for you. |
H: Connecting unused logic gates
Logic gates like AND, OR, NOT etc. often come packed as arrays in ICs.
Sometimes not all gates are used in a project. I would like to know how the remaining unused gates should be connected to achieve minimal influence on the system (energy consumption, interference) based on which technology (CMOS, TTL,...) is used.
My application uses a CMOS based hex inverter (CD4069) and the documentation doesnt provide this information.
Note: This is not about several inputs to a single logic gate. In this case connection of the unused pins would be the consequence of keeping the gate functional.
AI: Like others have already said (I'll just be a little more elaborate), unused CMOS input pins must never be unconnected, because they tend to float towards the dangerous region which is in the middle between VDD and GND. The input pin invariably is connected to another complementary MOS pair's gates, and the process parameters are often optimized for performance so that both the high side and the low side will start conducting a little earlier than in the exact middle point. So in this "middle gray area", both the high side and the low side FETs will conduct some electricity, which results in current consumption, or in some cases, even oscillation if there's a positive feedback path to be found somewhere.
The easiest case and electrically the most stable case is to connect all unused CMOS inputs to ground. But in microcontrollers this can be a little dangerous, because software may make use pins as inputs or outputs. A software update might then make an output from a pin which has previously been unused. In this case, the safest option is to use separate pull-down resistors for each pin. If that is too costly due to the number of resistors and PCB space needed, you can also connect a group of adjacent pins together and pull them low with a single pull-down resistor. In that case, the extra current consumption caused by the surprise software change is usually not that big a problem.
In your specific case of using a hex inverter, there is yet another possibility, which is often used. You can connect the unused inverter inputs and outputs together with some inverter, which is used in the system: connect several inverters in parallel. This is often done to increase the drive capability and thus speed of the inverter, especially when driving large MOSFET gate loads. |
H: What are the differences between optoisolator output styles?
Digikey lists optoisolators with several output types:
Darlington
Darlington with base
Photo FET
Photovoltaic
Photovoltaic, linearized
Transistor
Transistor, with base
What are the differences among these, and in what circumstances would I use one or another?
AI: Phototransistor
This is the most basic variant. When there is an input signal, the phototransistor switches on like a normal transistor, i.e., creates a low-impedance connection between its collector and emitter (up to a certain current limit).
However, a transistor optocoupler does not amplify signals as much as a normal transistor. Typically, the ratio of output current to the LED input current (CTR = current transfer ratio) is about 100 %, i.e., there is no amplification at all.
Phototransistors have a very large collector-base junction (to be able to catch much light), which implies a large collector-base capacitance, which makes phototransistor optocouplers comparatively slow, especially when switching off from saturation.
Phototransistor optocouplers are cheapest, so they are used unless some other type is needed.
Phototransistor with base
On optocouplers with a base pin, it is possible to connect the base to the emitter through a large resistor (typically 1 MΩ). This allows the charges in the base to be removed faster when the transistor needs to be switched off, i.e., switching off happens somewhat faster. (Also, switching on is delayed by a little bit.)
It would be possible to inject feedback into the base pin to speed up switching, but this is hard to do in practice because of large manufacturing variations that result in very loose CTR specifications.
When the base pin is not used, it might pick up noise (depending on the environment).
Darlington
This is essentially a phototransistor with lots of extra amplification.
Typical darlington optocouplers have a minimum CTR of several hundreds percent.
Darlington optocouplers work with very small input currents, but they also amplify noise, and having two saturated transistors makes the time needed to switch off even larger than with a single transistor.
Darlington with base
See phototransistor with base.
Photovoltaic
Photovoltaic optocouplers do not switch a current between their output pins, but just use many photodiodes to generate a current. There is no transistor for amplification, so this current is very small.
Photovoltaic optocouplers are typically used to charge the gate of a FET.
Photo FET
This is a photovoltaic optocoupler with built-in FETs.
Two FETs make it possible to switch AC current between the output pins.
Phototriac/SCR
Allows to directly switch an AC current.
Typically allows less current than a photo FET, but is cheaper.
(A common way to switch a large AC load is to use a small phototriac to switch a large triac.)
linearized optocouplers
Optocouplers have large CTR variations due to manufacturing deviations.
Linearized optocouplers do not have much tighter specifications, but they have two similar photodiodes that generate two similar output currents. One of them can be used to construct a feedback circuit to control the input signal to get the desired linear behaviour.
However, in practice, the most widely used mechanism to transfer an analog signal is not through a linear optocoupler but with a PWM signal.
high-speed/digital optocouplers
The linear behaviour of phototransistors is often not needed.
Digital optocouplers use more integrated components (e.g., separate photodiodes, non-linear amplifiers, and/or Schmitt triggers) to allow faster switching. |
H: AC power cord different on a laptop and a desktop, other appliances
If I look at the power cord plugged from the wall socket to desktop computers, monitors, etc. at the office, it looks like (North America):
Now, if I look at the power cord plugged into my laptop's power supply (North America again):
I checked with my colleagues and it seems all the laptops (from many different manufacturers) use the same power cord, while the other appliances (desktop, monitors, etc.) use the first model.
Is there a standard governing this? If yes, what are the electrical reasons for this? Maybe the laptop version fits more snugly in the socket and is thus less prone to being unplugged by accident?
I am eager to improve my knowledge of electronic design so...
AI: Yes. IEC 60320 covers these connectors. The Mickey Mouse connector is C5/C6 (Female/Male). The boxier connector is C13/C14. The reason for one over the other is mainly size and Amperage (and therefor temperature). C5 is rated for 2.5 Amps Main Voltage. C13 is rated for 10 Amps Main Voltage. Any power supply over 300W will not be able to use the C5. Most laptops are under 100W.
Additionally the ATX computer form standard calls for the C13 connector. Even smaller than 300W power supplies in ATX format uses them. |
H: Connection of the circuit breaker
Where is the circuit breaker connected in an electrical installation? Is it on the live line or on the neutral line of the generator? Why?
AI: Circuit breakers are always found at the location where the size of the wire changes. For example, when wiring enters your house and splits off to your lights and outlets the gauge of the wire is reduced to make running that wire more practical. When the gauge of the wire is reduced a circuit breaker is installed. This is evident in the circuit breaker panel of the house. The reason for this location is because when the size of the wire is reduced the safe current capacity is also reduced. If the circuit into your house is 400A capable, the wires in your walls could glow red hot and not blow the 400A fuse on the electric pole outside. Therefore the breaker is sized in a way to protect the wiring.
The circuit breaker is always on the hot side. The neutral line is just a return line. If the circuit breaker was on the neutral side then only the wiring from the breaker to point were the neutral wires all tie together would be protected. This is because a circuit breaker is meant to protect not just form over current but also against a short to ground. If a short were to occur on the hot side then the current would bypass the breaker on the neutral side. Further if the breaker was on the neutral side and turned off, everything else would still be electrified. When the breaker is on the hot side and is turned off only the bus bar inside the panel remain electrified. |
H: Do I need a decoupling cap for a line buffer gate?
The data sheet does not say anything about the decoupling capacitors for this buffer gate. Would it be correct to assume that no caps needed? Please, explain.
AI: In theory the chip does not need a decoupling capacitor, what it needs is a power that is within its specifications. To achieve that you can use any means you want, including magic. But the most common way to do that is to have a decoupling capacitor (or mybe more than 1) nearby, and not too much inductance in the feed line and ground.
So you can say that the power specification in the datasheet indirectly asks for a decoupling capacitor. |
H: Is programmable gain amplifier(PGA) in ADC enought to get me precision
I have 4 x 3wire load cells from a old weight scale connected as a full-bridge and I want to connect them in my uC ( Atmega328P, but not arduino ).
I want to measure weight under these specs:
Precision is the first most important spec
Error due to sensor is not important. I will change them in the future.
Measuring 0-200kg ( Each load cell is 50 kg so 4x50 = 200kg. Am I right? )
5g resolution ( calculated 16bit ADC = 3,052g )
I2C interface ( ADCs: LT2451, ADS1113 or similar )
Update: Load cells work at 3-6Volts
In most of similar ADCs IC there is a programmable gain amplifier capable of gaining up to 8 times. Some have external some internal Vref.
I would like guidance in these areas:
Vref source
Use 3.3 Volts from DC-DC converter?
Use uC Aref pin?
Use new IC voltage reference?
Best method for minimizing signal error
Use PGA provided by ADC?
Use instrumental amplifier?
I have no great expierience in ADCs but from my point of view I see it as using the smallest Vref source i can find that is also bigger than the bridge output( 200 milli Amps ) and having a opamp before the ADC with a fixed gain and not just putting PGA which is max 8 times.
I find it a little complicated task so I seek guidance in learning from the process...
simulate this circuit – Schematic created using CircuitLab
Update:
What I understood so far is that I get a 20bit or bigger ADC in order to minimize the error use Vref from a voltage reference dedicated IC and use no amplifier. If there is a better answer I will wait some days. Am I right? Feel free to edit this assumption if I made a mistake.
Update 2:
After some thought I do not like having 20bit ADC for error free signals. There must be a more professional way to do my math.
AI: Well, let's start with your range and accuracy specification (and circle back to some other things later):
5 grams out of 200kg full scale is a factor range of 200 / 0.005 = 40000 or put differently, that's 1/40000 = 0.0025%. That's a pretty tall order for noiselessness, so you will need some form of ranging, which you apply externally. Just amplifying the result of your load-cells will also amplify the noise, which will still give you the need for a below 0.0025% noise.
I'm not saying that's impossible, but it certainly is very highly impractical. In design time and component cost.
That leads me to Least Significant Bit enthusiasm, that you seem to have. You can get "approximately 1LSB" accuracy, which as you say is about 3g, but only with good averaging and heavy calibration. ADCs are always very slightly mistaken, they are offset a tiny bit, they are very very slightly not linear and they may also have a tiny bit of gain.
If you have the datasheet it will mention numbers for "non-linearity" and "offset error" and all such, they all combine through fancypantsy maths to get you a number of confidence expressed in an amount of LSB. I would, without looking at the datasheets (because I'm tired after a long day), not expect much better than 5LSB. That means that the measurement will be off by up to 15g at least. You can potentially calibrate that out, if you have the tools. (EDIT: Or as Olin suggests just go for the 20bit+ sigma/delta ADC)
This then leads me to advise you to find out what the specifications of the load-cells are at smaller numbers. I can very easily imagine the cells being manufactured to a 50g accuracy in a commercial scale, or even worse (250g wouldn't even surprise me). Which also means the manufacturer stopped looking at non-linearities and correcting them in the manufacturing process once they fell within a +/-25g range.
Then, there's the sharing of the load.
If you put the weight on 4 load-cells and each can handle a maximum of 50kg, what happens if you put 200kg on, but not EXACTLY in the middle of the square made by the cells? More weight goes to the one closest to the centre of mass. Usually a 200kg scale will contain load-cells at the least capable of 100kg each, if it's a professional one.
With regards to the reference voltage:
Do not use a simple 3.3V regulator, they are 5% off, and if it's a DC/DC switching type they will also increase the amount of HF noise, they are the worst possible choice for a reference voltage
The Vref pin of your processor will also not be very accurate, since the processor is made for processing, not for referencing. The reference is just a fun extra they added in. In some cases they can still be the same 5% off that a 3.3V regulator is, especially over temperature.
If you want high accuracy, get a low-noise, stable, high precision reference, either from a circuit using a programmable zener type thing, or just by buying a chip for it from Linear, TI or Analog Devices. |
H: How do I enable the internal 32MHz clock on an XMEGA avr in assembly?
This is the C code that I currently use to enable the 32MHz clock:
CCP = CCP_IOREG_gc;
OSC.CTRL = OSC_RC32MEN_bm;
while(!(OSC.STATUS & OSC_RC32MRDY_bm));
CCP = CCP_IOREG_gc;
CLK.CTRL = CLK_SCLKSEL_RC32M_gc;
But this code needs to be compiled with some form of optimization enabled (-Os is suggested). Is there a way to do this in assembly without optimizations enabled?
AI: Sure, if you are using Atmel Studio, the easiest way to do this is to compile your project using -Os and then view the contents of the *.lss file inside the debug directory. This file contains the C code in conjunction with the compiled assembly code:
CCP = CCP_IOREG_gc;
3226: 88 ed ldi r24, 0xD8 ; 216
3228: 84 bf out 0x34, r24 ; 52
OSC.CTRL = OSC_RC32MEN_bm;
322a: 82 e0 ldi r24, 0x02 ; 2
322c: 80 93 50 00 sts 0x0050, r24
while(!(OSC.STATUS & OSC_RC32MRDY_bm));
3230: 80 91 51 00 lds r24, 0x0051
3234: 81 ff sbrs r24, 1
3236: fc cf rjmp .-8 ; 0x3230 <main+0x2c>
CCP = CCP_IOREG_gc;
3238: 88 ed ldi r24, 0xD8 ; 216
323a: 84 bf out 0x34, r24 ; 52
CLK.CTRL = CLK_SCLKSEL_RC32M_gc;
323c: 91 e0 ldi r25, 0x01 ; 1
323e: 90 93 40 00 sts 0x0040, r25
Using the information from this file, you can modify your C code to this:
__asm__ __volatile__("ldi r24, 0xD8");
__asm__ __volatile__("out 0x34, r24"); // CCP = CCP_IOREG_gc;
__asm__ __volatile__("ldi r24, 0x02");
__asm__ __volatile__("sts 0x0050, r24"); // OSC.CTRL = OSC_RC32MEN_bm;
__asm__ __volatile__("lds r24, 0x0051");
__asm__ __volatile__("sbrs r24, 1");
__asm__ __volatile__("rjmp .-8"); // while(!(OSC.STATUS & OSC_RC32MRDY_bm));
__asm__ __volatile__("ldi r24, 0xD8");
__asm__ __volatile__("out 0x34, r24"); // CCP = CCP_IOREG_gc;
__asm__ __volatile__("ldi r25, 0x01");
__asm__ __volatile__("sts 0x0040, r25"); // CLK.CTRL = CLK_SCLKSEL_RC32M_gc;
This inline assembly was tested working against an ATXMEGA32A4U with no optimizations enabled. Alternatively, you could add an assembly file to your project and create a function in assembler, but this requires no knowledge of assembly to implement.
If you are interested in the avr instruction set, more information can be found here. |
H: phase-stability two op-amps
I'm trying to simulate two op-amps back-to-back (G=30 each) in LTSpice and work out if they will be stable. If I look at the .ac analysis after the fist op-amp I have good phase margin (about 60 degrees). If I look at the phase-margin after the second op-amp my phase is now -200 degrees - i.e. unstable
Do I have to consider the total phase from both opamps (which I think is what LTSpice is doing) or is only the phase around each op-amp important. i.e to first order I can consider each op-amp independent? Is the number I should be looking at is -123 in the ratio and hence I should be fine.
Circuit and plots below:
AI: You only need to consider the phase around the feedback loop. Since you don't have feedback from the output of the second to the input of the first you can treat the two independently.
If you wanted to feedback from the output back to the input you would have problems.
You have rather low feedback resistors - is there a reason for that? They will consume a large amount of power and of your output current capability just to drive the feedback.
It will help reduce Johnson noise but is not really necessary in the second stage as noise there will be dwarfed by that in the first stage. |
H: Do op amps need one bypass capacitor or two?
As with other ICs, it's standard practice to place bypass capacitors near the supply voltage pins of op amps. But I've seen conflicting opinions on how to properly bypass an op amp (here, for example). Some people suggest putting a single capacitor between the V+ and V- pins. Others suggest using two capacitors, one from V+ to ground and one from V- to ground. Which of these methods gives the best result? I'm using OPA827s as unity-gain voltage followers for audio signals, but I'd like to know whether the answer's the same for other situations as well.
simulate this circuit – Schematic created using CircuitLab
AI: If the output load is primarily to ground, then two capacitors. If it's to either supply, then one capacitor will suffice.
The purpose of bypass capacitors is to provide a low-impedance close to the chip (bypassing any series inductance to the supply rails). Since most op-amps do not have a ground pin the internal circuitry does not care about the ground level, however when you apply a load to ground the current path is from the positive or negative supply, through the circuitry on the chip, out the output and through the load to ground. A capacitor from the positive and negative supplies will make sure that loop is physically small and thus low inductance.
simulate this circuit – Schematic created using CircuitLab
The left two schematics show an op-amp driving positive and negative current into a load connected to ground, and how the bypass capacitor appears in the loop. The right hand one shows a load connected to the negative rail. The capacitor in the right hand schematic is twice as effective with the load connected this way (1uF rather than 500nF) and it saves a part. |
H: Why would you use a non-contact voltage detector if you have a multimeter?
I was reading this Fluke multimeter safety manual and I came across this sentence: http://faculty.riohondo.edu/jfrala/fluke_multimeters_-_abcs_of_multimeter_safety_multimeter_safety_and_you_application_note.pdf
"Non-contact voltage detectors are a quick, inexpensive way to check for
the presence of live voltage on ac circuits, switches and outlets before
working on them."
Question 1: Why exactly is this relevant? If you are going to work on a circuit, why not use your multimeter directly to check the presence of voltage?
I thought about safety but I can't see a real reason. If you are worried about safety, once you measure the presence of voltage with the non-contact voltage detector you would need to use your multimeter next anyway (and the "safety" you supposedly got from measuring it with the the non-contact detector would becomes useless).
What am I missing?
Question 2: Why exactly are these called "non-contact" voltage detectors? You still need to physically insert them into an outlet (or somewhere else you want to check) in order for it to work.
AI: Q2: Non-contact voltage detectors don't need to physically touch the measured hardware. They work by sensing the AC electric field created by live AC wires. They're used to quickly see if there is something live, e.g. connected to a wall outlet, inside a device. You can also use them to track where power wiring is going inside a wall etc. They often also have a metal detector so you can also track wires which are not live.
Q1: "Working on a circuit" doesn't necessarily mean "debugging a circuit" here; you might not have a need to measure the circuit electrically. You might be replacing a broken plastic casing for example, and you'd use the detector to see if there's something that could give you an electric shock at the other side of the plastic before you start to fix it.
Obviously you shouldn't rely just on the meter for your safety. You'd disconnect wall fuses or kill main switches before you start, using the meter just gives you some extra protection: with the meter you might notice for example that you've disconnected the wrong fuse and the unit is still live. |
H: What hole size for test probe to get a snug fit?
I’m designing a bed of nails test jig. I want my test probes to fit snugly in the circuit board, but want to allow for variation in the through hole plating of the hole.
In Altium, when you specify a hole size, is that the drill hole diameter the hole size after or before through hole plating? i.e. does the PCB manufacturer make an allowance for the plating and actually drill a slightly larger hole?
I am going to use the RC50-SC and RC100-SC receptacles to hold my test probes. What would be an appropriate hole size to specify in Altium in order to get a snug fit?
http://www.farnell.com/datasheets/1680275.pdf
http://www.farnell.com/datasheets/1662754.pdf
Cheers
Phil
AI: You would be best advised to not specify plated through holes for your pogo pin receptacles. Carefully toleranced and drilled holes of the manufacturer specified size are required for mounting this type of receptacles. There are a number of solid reasons behind this:
Pogo pins and their receptacles need to be located with very good precision so that the probe tips line up perfectly with the device being tested. The sloppy tolerance of plated holes will not suffice for maintaining close pin placement.
The pogo pins need to be mounted almost as close to perfectly vertical as possible to maintain a minimum of spring pin binding as the device under test is clamped down over the pogo pin fixture. Normal circuit board thicknesses are not adequate to holding the pins in the optimum positions. Properly built and reliable fixtures often use a substrate material that is 0.375 to 0.500 inches thick.
Pogo pin receptacles are not normally soldered into their mounting holes. They are meant to be press fitted into their precision hole and pushed down to a depth of a collar around near the upper edge. This allows for the receptacle to be pushed out and replaced should repair become necessary.
The types of receptacles that you linked to are meant to have descrete wires attached to the solder cup end of the component. Other types will come with a 25 mil square post welded or cripped to the bottom end of the unit. These are often used with a wire wrap technique to attach the test probe wires.
Lastly the typical receptacle is designed with special features formed into its sides to permit the inserted pogo pin to get firm contact in the socket area while also not being a total interference fit. This permits pins to be removed and replaced should they get damaged during use. Trying to solder the barrel of a receptacle of this type into a plated hole can render the side wall features to become non flexible. Two things can happen - it can be hard to insert new pins - and the rigidity of the receptacle can lead to premature pin and/or socket failure. |
H: BeagleBone Serial Communication
I have a problem seeing characters written in /dev/ttyS8 on my PC terminal with this C code:
void main (void)
{
int file, i;
unsigned char receive[100]; // declare a buffer for receiving data
char buf[20];
size_t nbytes;
ssize_t bytes_written;
if ((file = open("/dev/ttyS8", O_RDWR))<0)
{
printf("UART: Failed to open the file.\n");
return;
}
//
struct termios options; // the termios structure is vital
tcgetattr(file, &options); // sets the parameters associated with file
// Set up the communications options:
// 9600 baud, 8-bit, enable receiver, no modem control lines
options.c_cflag = B9600 | CS8 | CREAD | CLOCAL;
options.c_iflag = IGNPAR | ICRNL; // ignore partity errors, CR -> newline
tcflush(file, TCIFLUSH); // discard file information not transmitted
tcsetattr(file, TCSANOW, &options); // changes occur immmediately
strcpy(buf, "This is a test\n");
nbytes = strlen(buf);
while (1)
{
bytes_written = write(file, buf, nbytes);
sleep(10);
}
close(file);
}
I tested if maybe type of serial cable is a problem, but it behaves the same.
/dev/ttyS8 is my UART output, but I cant determine what I'm doing wrong. Any idea what to test will be helpful, or on what to pay attention when trying to do something like this.
Thanks for your help!
AI: I found the solution it was in too big difference between baudrates of receiver and transmitter.
I would add that it is very recommended that when you open any file in Linux, you need to close it or you'll have a problems. |
H: Is it OK to leave some part out of the schematic if noted?
When I make schematic drawings for my projects I tend to leave things like the power switch, fuse etc. out of the schematic. I do it because I don't feel it's an important part of the circuit, one might argue that it's not actually a part of the circuit at all. And I like keeping the schematics as clean as possible.
Is this OK? Or considered bad practice? I do make a note of that I have left out, like on the image below.
AI: A schematic is an abstraction of the real circuit. We use abstractions because we want to communicate something to other people (including our future self). If what you want to tell to other people about your circuit does not involve the fuse, then it is fine to leave it out.
But if you want to use your schematic as input for making a PCB and you want the fuse on the PCB, then it is silly to leave it out in the schematic.
So it all about the intented use of your schematic. |
H: Out-of-band communication between two PCs
I'm working on a little project. In the project, data must be sent from a PC to another device. Initially, I used a Raspberry Pi and life was good. I could communicate Python between the RPi and the PC via a USB to serial interface as the RPi has serial I/O pins. Eventually, my application out-grew the RPi and I needed more processing power. I am considering moving up to something like a NUC (chromebox).
I really DON'T want to use typical TCP/IP comms, I'd like to use something like a serial connection. Something like USB-A to USB-A would be great but from what little reading I've done, that doesn't seem to work. If you had to use something other than a NIC to talk between two computers, what would you use?
AI: If you REALLY don't want to use TCP/IP and you want an off-the-shelf solution, then a USB-to-USB null modem cable will work. This is effectively two USB-to-serial adapters with Rx and Tx crossed in the middle. This page has one option that you might like to try - there are likely many others available, and you could make your own from 2 USB-to-serial adapters as described.
That said, I would generally always choose TCP/IP over USB serial for convenience, unless there was some extraordinary reason not to. |
H: Comparison between uint8_t and String
I have a very fundamental question regarding string comparison..
I implemented a USART to PC with STM32L0 Nucleo board, and I can type something in terminal and receive it on the micro as follows:
#define RXBUFFERSIZE 1
uint8_t aRxBuffer[RXBUFFERSIZE];
/** Put UART peripheral in reception process */
if(HAL_UART_Receive(&huart2, (uint8_t *)aRxBuffer, RXBUFFERSIZE, 0xFFFF) != HAL_OK)
Error_Handler();
I want to compare the received data with a string, but the comparison doesn't work.
char *is_correct= "Y";
if (strcmp((char*) aRxBuffer, is_correct) == 0)
DoSomething();
else
DoSomethingElse();
What am I doing wrong? Thanks
How I set up the USART:
/* USART2 init function */
void MX_USART2_UART_Init(void)
{
huart2.Instance = USART2;
huart2.Init.BaudRate = 9600;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONEBIT_SAMPLING_DISABLED;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
HAL_UART_Init(&huart2);
}
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(huart->Instance==USART2)
{
/* Peripheral clock enable */
__USART2_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF4_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
}
AI: For the strcmp function and all other string functions the string must be null-terminated. For your example one way to do that would be something like the following to allocate one extra byte in the array and put a null-terminator at the end:
#define RXBUFFERSIZE 1
uint8_t aRxBuffer[RXBUFFERSIZE + 1];
if(HAL_UART_Receive(&huart2, (uint8_t *)aRxBuffer, RXBUFFERSIZE, 0xFFFF) != HAL_OK)
....
aRxBuffer[RXBUFFERSIZE] = 0;
Although for a single character compare like you have at the moment there's no need for a string comparison, you could use a character compare on the first and only element of the array:
if (aRxBuffer[0] == 'Y')
DoSomething();
else
DoSomethingElse(); |
H: Voltage regulator question
I have made a portable device charger with a 5 volt voltage regulator(7805-TO220 package),a 9 volt battery and a few capacitors.The problem is,when I connect the charger to a certain device(whose original charger outputs 5 volts and 2A) and the device starts charging, after a few minutes,the image starts flashing and then it shuts down,then the start-up screen appears,then the screen turns black and so on a few times,then it shuts down completely and remains in this state.I connected the circuit to another device whose original charger outputs 5,1 volts and 700 mA and all works just fine.
simulate this circuit – Schematic created using CircuitLab
Why does the first device behave this way?
I don'think it's about the voltage or current.
The 9 volt battery is a Varta High Energy model-6LP3146.
EDIT:I noticed that when charging the second device,its battery drops after a while,whether discharging on its own or being discharged by my charger(I added a diode between the output pin of the regulator and the positive terminal of the device,so it's unlikely).
AI: You don't mention what case style of 7805 you have. If i was guessing you are using a TO220. That case can only support up to 1A output current and even then requires substantial heat sinking to do so. Some 7805s had thermal protection and would shut down if overheating. Check the voltage to the device when it shuts down. Perhaps the voltage drops out.
Also you cryptically say that it's a 5v device. If i also had to guess it's a USB device. Some USB devices require that an identified is detected on the data lines to announce that the device is connected to a charger. For example my HTC phone charger shorts the data lines together. Also my Galaxy tab doesn't like my HTC charger because Samsung uses a different scheme to identify the charger. |
H: Jumper or resistor?
I have in my BOM (Bill of materials) the following component CR21- 000-T and in the datasheet of the component : CR, CJ series is specified CR21 series as 0805 resistor.
But the 000 is specified as a chip jumper
Blank = jumper chips.
Is this a resistor or a jumper?
AI: I would expect it is a 0-ohm resistor (hence the "000"), which is often used as a jumper in all sorts of board layouts. It allows traces to be laid where they couldn't normally be laid due to another trace on the same layer.
Here is an example:
R2 is being used to jump over the trace connecting D1 to R1 (Signal 2) so that the trace between IC1 and C1 (Signal 1) doesn't have to be on another layer. |
H: Chassis Grounding a Bipolar Floating Power Supply
I'm building a simple function generator powered from a 24V AC wall adapter. I've rectified the incoming AC to 24V DC using a full wave bridge and an LM317. I intend to split the supply into +/-12V rails with a virtual circuit ground (see image below).
My BNC connectors need grounding and my idea is to ground the chassis to circuit ground as shown in the diagram. Are there any problems doing this? More specifically, are there any safety issues and will it cut down on interference? The point where the circuit ground (from the supply board) meets the chassis will also be a star-ground point for all grounds in the system.
AI: Generally speaking, you would connect the circuit ground (which is your virtual earth point) to the chassis. The BNC connectors are also usually connected to the chassis.
Because this is a signal generator, I would NOT connect the chassis to an external Earth ground to help avoid ground loops. Because you are using a wall-wart transformer as your power supply, this is an easy decsision. |
H: How can an ADC measure below its resolution?
An ADC's resolution is set by the maximum input voltage divided by 2b where b is the number of bits. In that way, a 16-bit ADC with 20V input can measure a voltage of 20/65536 = 0.3mV (corresponding to the ADC level 0000000000000001). However, I know an ADC can be used to measure voltages down to the ADC's own quantisation noise, which is typically a number more like 5uV.
I guess you could measure a very noisy signal with mean value lower than 0.3mV, as long as you averaged many measurements. Is this true? Does the noise have to be large enough to tip the signal above 0.3mV (in this case) so that the ADC can register a non-zero signal? Does this relate to dithering?
AI: A simple example would be a regular voltage comparator, which will output 0 if below 0.5V and 1 if equal or above 0.5V. You can view it as a 1-bit ADC working in a range 0-1V.
Now consider a perfect input signal of 0.5V exactly. By our definition it will give 1 in the output. Now, we introduce a low amplitude white noise averaged at zero added to the signal. In this case the output will "jump" between 1 to 0 with probability of 50% at each point of time. If we sample this output over the time and then compute the average, we will eventually get a value 0.5 which is out of the original resolution we had with a single sample.
...And dithering is a method of introducing some artificial noise if the natural one is insufficient. |
H: Do all USB Type C cables support full power delivery?
USB Power Delivery is able to work over USB Type A/B cables which are specifically designed to support it.
Since the USB Type C was designed much later, I am curious: Do all USB Type C cables support USB PD by default? And do they support a certain level, or the full 100 W?
Related: Does USB Power Delivery handle USB cables that are not PD-aware?
AI: Yes they are assuming they are certified by the USB group. It is noted in the USB PD 1.0 presentation that it is "compatible with USB 2.0 and 3.0 cables" so they should be fine. The USB-PD spec confirms they are compatible assuming they are spec-compliant.
The USB Type-C mechanical/electrical standard dictates the connector and the physical pinout of the connector. USB-PD doesn't alter any of that but rather is an extension of the USB Type-C protocol.
What you'll most likely see in the future is microcontrollers coming out with USB Type-C support/engines that may or may not include the USB-PD extension standard.
Give this article a read, it should help out |
H: What is the name for an IC that accepts an analog voltage and outputs a proportional PWM signal?
I want to isolate an analog signal. One way of doing this is to convert the analog signal to PWM, isolate the pulses with an optoisolator, and filter the PWM on the other side. Obviously I could do this with a microcontroller, but I feel like "convert analog to PWM" is a generic enough function that there should be an IC to do exactly that. Like most things, it's difficult to google something if you don't already know the name. What am I looking for?
AI: You can refer to this post: Easiest way to go from analog input to PWM output?
The LTC6992 is the specific IC that`s suggested, and seems to fit your application |
H: Protect Beaglebone Black from Power Outage
I am using a BBB (Rev C) as a web server, powered by a 5V power supply connected to the 5V jack. I read in several locations that disconnecting the power supply to turn off the board can damage the board.
Is this an issue if the BBB is running and there is a power outage? The web server is used as a web front-end to a MySQL database and is used fairly infrequent. Most of the time, the BBB is idle.
AI: @jippie is right. the issue is the filesystem. If your OS is actively writing at the point when power is lost then you have the potential for issues. The risk is lower if the system is not heavily used and the frequency of power outages is low. But it is still there.
The best defense is to provide a battery backup that can run your BBB for a few minutes and get the BBB to monitor the input power. As soon as it drops initate a controlled shutdown.
This is essentially what commercial Uninteruptable Power Supplies do. So you can eother roll your own or choose a UPS with a linux agent and use that. |
H: Proper Method of Powering Nokia 5110 LCD
I am considering getting some Nokia 5110 displays for use with my Arduino Nano board but I am in a pickle because I can't tell the correct way to wire it.
Some people say to power it with 3.3V and only 3.3V and to use 3.3V logic or else. But other people claim running it on 5V just fine. The data sheet for the Philips IC that controls it says that it can have a maximum input voltage of 7V so it looks like I would be fine. However, some people report abnormal behavior and short life span of the screen. If I used the circuit below except with Vcc and LED going to 3.3V, would that be OK?
The nano runs on 5V logic so I would keep the 10k's. If that is correct, is it saying I need the equivelent of a 40k on the RST pin of the LCD? Why? Any ideas much appreciated!
AI: According to the datasheet for the LCD controller it should run happily from 5V supply. The controller accepts logic levels up to Vdd, so I see no problem with that either. I also never had any issues with a Nokia 3310 display, which uses the same controller, operating at 5V.
If you really want to run the LCD at 3.3V, then the proper way would be to use a level shifter (like 74HC4050) and external 3.3V voltage regulator.
I would be more concerned about the LCD driver implementation instead, here is a quote from the datasheet, page 15:
Immediately following power-on, the contents of all internal
registers and of the RAM are undefined. A nRES pulse
must be applied. Attention should be paid to the
possibility that the device may be damaged if not properly
reset.
...
The nRES input must be ≤0.3VDD when VDD reaches VDDmin
(or higher) within a maximum time of 100 ms after VDD
goes HIGH.
Therefore, be careful when implementing the driver and especially if you are planning on using someone else's implementation. |
H: Are steady-state values in LTI systems differentially influenced by the rate an input is introduced?
I have a general question about LTI systems I was hoping someone could clarify.
I'm currently learning about steady state behavior in LTI systems, and how you can evaluate them with different inputs. So here's my question-say we have an LTI system, and let's consider 2 different inputs: a step input with a long duration (say maybe 150 time steps), let's call this A. And another input that gradually increases from 0 to 1 (maybe this gradual increase is logarithmic or linear-I wonder if it matters?), in 135 time steps, and then remains at that value for an additional 15 steps-let's call this B. So that means it takes B 135 steps to reach A's value, but it does maintain that value for a little while at least. Are there general features of LTI systems that could help you predict the behavior of the system in response to the abrupt vs. gradual introduction of an input? Will they reach the same steady state values?
My intuition is that they should both give for the same steady state, but that abruptly introducing an input should reach steady state faster. Although I wonder if the gradual case would allow for a more stable system? Does anyone have any thoughts? I'd appreciate it, this has been bothering me for a while now haha
AI: Whenever the inputs to an LTI system stay constant for a time that is greater than the length of the impulse response, the system will reach the steady state for these inputs, regardless of history.
Whenever that is not the case, history matters. How the system reacts to different inputs is completely dependent on the system -- if you look at discrete time systems, [ 5 -5 0 0 0] will react differently than [ 1 1 1 1 1].
The first system will reach steady state after just two ticks, but produces fairly violent spikes on every input change:
[ 1 1 1 1 1 6 6 6 6 6 11 11 11 11 11] -> [ 5 0 0 0 0 25 0 0 0 0 25 ...]
[ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15] -> [ 5 5 5 5 5 5 5 5 5 5 5 ...]
The second takes five ticks, and smooths out steps of length 5:
[ 1 1 1 1 1 6 6 6 6 6 11 11 11 11 11] -> [ 1 2 3 4 5 10 15 20 25 30 35 ...]
[ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15] -> [ 1 3 6 10 15 20 25 30 35 40 45 ...]
You can see that apart from the start the outputs are the same (a ramp increasing by 5 each step). |
H: Using Single-Phase and 3-Phase Equipment?
Let's say I have a single-phase facility and I plug in a piece of 3-phase equipment, what happens?
Is it dangerous?
Is it less efficient (if so, approximately how many percent less in efficiency)?
What kind of adjustments, if any, would I have to make to make this setup work?
Would it increase or decrease the number of amps I use compared to a piece of single-phase equipment?
Likewise, if I have a 3-phase facility and I plug in a piece of single-phase equipment, what happens?
Is it dangerous?
Is it less efficient (if so, approximately how many percent less in efficiency)?
What kind of adjustments, if any, would I have to make to make this setup work?
Would it increase or decrease the number of amps I use compared to a piece of 3-phase equipment?
The power company charges based on wattage, so how would I calculate to find out which setup would be most cost-effective?
Are there any basic ground rules that I should follow when trying to work out these relationships?
AI: If you have a single-phase facility, you can't just plug in a piece of 3-phase equipment. You will need to find a way to adapt it for single-phase power. That will probably not be particularly easy and might not be possible at all. It could be done with no loss in efficiency and performance, but is more likely to be less efficient and not perform as well.
1A. If it can be adapted, that can be done safely.
2A. The efficiency reduction will probably be in the range of 0 to 15%.
3A. It is not a matter of adjustment, it a matter of changing the design in some way.
4A. The current increase will probably be in the range of 0 to 15%.
It is relatively easy to use single-phase equipment in a 3-phase facility. Three-phase facilities usually have some single-phase equipment connected. The only concern is that you should try to keep the overall usage balanced among the phases.
1B. Safety is not an issue.
2B The single phase equipment may be less efficient than equivalent 3-phase equipment by as much as 15%.
3B No adjustments will be required.
4B The current increase will be somewhat comparable to the efficiency decrease.
The basic ground rule and method for determining cost effectiveness is to list all the anticipated equipment required and get prices and specifications from the suppliers. Also get information from the utility that will supply the power and from installers.
Edit:
You can not really make a good decision with out learning more specifics. The more specific information you put int your planning, the more likely you can make a good decision. |
H: VHDL how to make a redundant case statement simpler?
I'm using case statements to check the bits of a word. Is there any way to write this more compact since it uses a lot of space (I have other signals on which I want to do this aswell).
...
case a(1 downto 0) is
when "00" =>
r(3 downto 0) <= "0000";
when "01" =>
r(3 downto 0) <= "0001";
when "10" =>
r(3 downto 0) <= "1100";
when "11" =>
r(3 downto 0) <= "1101";
when others =>
null;
case a(3 downto 2) is
when "00" =>
r(7 downto 4) <= "0000";
when "01" =>
r(7 downto 4) <= "0001";
when "10" =>
r(7 downto 4) <= "1100";
when "11" =>
r(7 downto 4) <= "1101";
when others =>
null;
case a(5 downto 4) is
when "00" =>
r(11 downto 8) <= "0000";
when "01" =>
r(11 downto 8) <= "0001";
when "10" =>
r(11 downto 8) <= "1100";
when "11" =>
r(11 downto 8) <= "1101";
when others =>
null;
case a(7 downto 6) is
when "00" =>
r(15 downto 12) <= "0000";
when "01" =>
r(15 downto 12) <= "0001";
when "10" =>
r(15 downto 12) <= "1100";
when "11" =>
r(15 downto 12) <= "1101";
when others =>
null;
...
AI: You're basically coding a whole bunch of 4-input multiplexers, so you could either write a function or create a submodule that you instantiate for each one.
function map4 (sel: in std_logic_vector (1 downto 0);
constant v0, v1, v2, v3 : in std_logic_vector (3 downto 0))
return std_logic_vector is
begin
case sel is
when "00" => return v0;
when "01" => return v1;
when "10" => return v2;
when "11" => return v3;
when others => return "XXXX";
end case;
end map4;
...
r( 3 downto 0) <= map4 (a(1 downto 0), "0000", "0001", "1100", "1101");
r( 7 downto 4) <= map4 (a(3 downto 2), "0000", "0001", "1100", "1101");
r(11 downto 8) <= map4 (a(5 downto 4), "0000", "0001", "1100", "1101");
If the map values are all the same, then you don't need to pass them as parameters.
Of course, with the specific mapping you give as an example, the logic is trivial: bit 0 of the output is simply bit 0 of the input, bit 1 is always 0, and bits 2 and 3 of the output are bit 1 of the input. |
H: Circuit Analysis of Op-Amp Offset Voltage Tester
I am reading Understanding Op-Amp Parameters section 11-9. I would like to get my work checked.
My assumptions:
The servo-loop, presumably the op-amp configuration right before V_out, maintains the V_out of DUT at 0V with the virtual earth of -ve input.
The feedback capacitor (10nF) should effectively open-circuit the feedback of the servo-loop.
With the above, I have worked on a numerical analysis to be this:
$$
V_{offset} = \frac{V_{out}}{R_f/R_{os} + 1}
$$
$$
V_{offset} = \frac{V_{out}}{10K/10 +1} \approx \frac{V_{out}}{1000}
$$
I am unsure of my answer, because 10k/10 + 1 is actually 1001, not 1000. It's close but I'd want a very accurate result for this sort of testing circuit? Or perhaps my calculation is wrong somewhere.
Also, if the feedback capacitor is indeed a DC block, what's the point of it?
AI: Your calculation is correct - and as you say the exact gain is 1001.
The capacitor is to provide a high gain at DC for the second stage but a lower gain at higher frequency to keep the overall circuit stable.
If the capacitor was not present the gain of the second stage would be 1/10 so any output voltage would mean that there was a large non-zero output voltage from the first stage - in that case the offset voltage would not be nulled completely resulting in an error.
If the 1K resistor was not present the second stage would be an integrator and it is possible that the combined circuit again would be unstable, the resistor adds a zero in the feedback so that at medium frequencies the second stage has only a small phase shift. Combined with the dominant pole in the first stage the combination is probably stable. |
H: How to control RC Servo motor using 8051?
I'm using an 8051 MCU and I wish to control an RC servo motor with 2 push buttons for an RC toy car.
I have code to use two buttons, one for right and another for left.
When I click one button, the servo motor moves in one direction but then remains at this position.
What I want is that when I push the button the servo motor should move in one direction and return to its initial position upon button release.
I tried this code, but it did not work for me.
#include<reg51.h>
sbit output=P1^0;
sbit S1 = P2^0;
sbit S2 = P2^1;
void timer(int msec) // Function for timer
{
int i;
for(i=0;i<msec;i++)
{
TMOD=0x20; // Mode2
TH1=0xFF;
TL1=0xD1;
//TH1= -23; // 50usec timer
TR1=1;
while(TF1==0);
TF1=0;
TR1=0;
}
}
void main()
{
int i;
output=0;
while(1)
{
//move to LEFT
if (S1==0)
for(i=0;i<300;i++)
{
output=1;
timer(20);
output=0;
timer(40);
output=1;
timer(40);
output=0;
timer(40);
}
//move to RIGHT
if (S2 == 0)
for(i=0;i<300;i++)
{
output=1;
timer(40);
output=0;
timer(40);
output=1;
timer(20);
output=0;
timer(40);
}
}
}
AI: The position of a standard RC servo is controlled by a pulse whose width varies from 1 to 2ms, repeated about every 20ms. When the servo receives pulses it will move towards the commanded position (eg. 1ms = left 45°, 1.5ms = center, 2ms = right 45°) and stop when it reaches it. While pulses are being received the servo will try to hold its commanded position. If the pulses stop then the servo will turn off, only holding its position mechanically.
Your code appears to produce a series of alternating length pulses with small gaps, eg. for left:- 1ms pulse, 2ms gap, 2ms pulse, 2ms gap (repeated 300 times). The servo requires a single pulse of length 1~2ms, followed by a long gap to make 20ms total, eg:-
output=1;
timer(20); // 1ms pulse
output=0;
timer(380); // 19ms gap
This code segment should be executed whenever the 'Left' button is held down. To move right, make the pulse width 2ms and the gap 18ms.
To return to center, execute the following code continuously whenever no buttons are pressed:-
output=1;
timer(30); //1.5ms
output=0;
timer(370); // 18.5ms
Note: This is the correct timing for controlling a servo directly. If you are operating the car via a standard RC transmitter then you may have to encode the signal into PPM (Pulse Position Modulation). This consists of short pulses (~400us) marking the start and end of each servo channel. A 2 channel radio would send 3 pulses per frame. |
H: Simplest way to produce a lagging pulse (latch trigger) after receiving another pulse (clock trigger)?
I am teaching myself how to use a 74HC595 shift register, and am fairly new to proper digital circuit design. I ran into a question. I am using a simple circuit involving a few LEDs, a switch for data, and a couple of pushbuttons to pulse the register clock and the latch clock. Basically, I can clock in the data, but it won't update the output LEDs until I pulse the latch clock.
I would like to get rid of the latch pushbutton and have it automatically latch pulse after each clock pulse high trigger. I am wondering what the easiest way is to "echo" a pulse from one clock to the next using simple parts? I.e., when I send a Low-to-high on the clock pin, I want another low-to-high-to-low to immediately follow on the latch signal. The latch signal just needs to stay high long enough for the register to recognize it, not necessarily for the same duration as the original pulse. Half a microsecond should be sufficient for the delay and the duration of the following pulse.
It is not simple enough to tie the clock and latch to the same signal. This results in the display always being one pulse behind (as described in the data sheet).
___/-\_________/----\________ Leader clock
____/-\_________/-\__________ Follower latch
... or perhaps some sort of delay line...
___/-\_________/----\________ Leader clock
____/-\_________/----\_______ Follower latch
Could I clone the clock pin to the latch using some sort of MOSFET with a capacitor for delay?
AI: You did not supply a schematic, and that image thing is incomplete .. but anyway.. the maximum rise rate for the clock input is about 100ns/volt with a 5V supply, and setup time is only about 24ns, so a simple circuit can be used- something like this:
simulate this circuit – Schematic created using CircuitLab
If you don't properly debounce the pushbutton switches you will have issues. |
H: How is the resistor value for boost conversion calculated?
I'm looking at MCP1640 and in Section 5.2, an equation for calculating RTOP is presented. However, the two examples underneath have RBOT = 309kOhm. How did that come about? Is 309kOhm some standard value? Without fixing a value for RBOT, one could only derive a ratio between RBOT and RTOP.
The second circuit on page 2 uses RBOT = 562kOhm though. Is RBOT meant to be arbitrary?
Thanks
AI: You are free to choose \$R_\mathrm{BOT}\$ such that
(a) you can find close-enough standard resistor values for both \$R_\mathrm{BOT}\$ and \$R_\mathrm{TOP}\$, and
(b) \$R_\mathrm{BOT}\$ and \$R_\mathrm{TOP}\$ are the right order of magnitude.
About the order of magnitude, cf. the explanation on section 5.2:
There are some potential issues with higher value resistors. For small surface mount resistors, environment contamination can create leakage paths that significantly change the resistor divider ratio and modify the output voltage tolerance.
Smaller feedback resistor values will increase the current drained from the battery by a few μA, but will result in good regulation over the entire temperature range and environment conditions.
So if you pick 1 K or 10 K resistors instead of 100 K resistors you will have a bit more current drain* but it will otherwise work fine. If you pick 1 M resistors or more, you may have issues with noise and stability.
They mention contaminants: moisture and dirt on the PCB can create parasitic resistors of some 10s or 100s of MOhms. You want your divider network to be lower than that so that it "wins" over these parasitic current paths.
* estimate it as \$I_\mathrm{drain}=\frac{V_\mathrm{out}}{R_\mathrm{BOT}+R_\mathrm{TOP}}\$ |
H: Portable phone/device charger
I am doing my best to make a portable charger.
Here is the link with the schematic of the circuit I am working on:Voltage regulator question
.I was told that the 9 V battery I was using didn't have enough capacity to charge any device,so I decided to connect 5 1,2 rechargeable batteries(NiMh and one NiCd) is series in its place,the lowest capacity one having 800 mAh.Here are the questions:
1)Will these batteries perform better?If not,what kind of battery would I need(mAh and voltage)?
2)I suspect that the device,when connected to my circuit may be losing energy at the same time while it charges.Would I need a diode somewhere to prevent this?
3)I would appreciate a few examples of how to make this charger better(without changing the battery's parameters).
AI: Frankly, if you want to use rechargeable batteries, I'd suggest to go for Li-ion batteries. A single-cell (3.7V nominal) or a double-cell (7.4V nominal) sound like good choices. For the single-cell version, you'd need a DC-DC boost step-up converter to get 5V, for the double-cell you can either use a "normal" dissipative power regulator (something similar to the 7805, but with a lower dropout voltage, since the minimum output voltage of a double-cell Li-ion battery is about 6V, and that's not enough for the 7805), or, if power loss is an important factor (I'd guess it is), you should use a DC-DC buck step-down converter. Also, if you don't want to prematurely kill your Li-ion batteries, you should use a power converter which shuts down when the minimum input voltage is reached (3V for a single-cell, 6V for a double-cell).
So I'd look for a battery with the proper capacity (you should do a rough calculation for the expected minimum milliamp-hours: Pout / efficiency / battery voltage * run time), and a circuit designed for converting from that battery into 5V. Ebay is for example full of these components (both Li-ion batteries and circuits designed for this purpose). |
H: How to ensure the two schematic diagrams are equivalent?
I've tried copying the schematic diagram of a typical circuit from the datasheet, but I'd like to ensure the correctness of each connection. Is there a way to somehow match one schematic diagram against another?
If simulation is the only thing closest to such a test, which simulation is most useful?
Thanks
AI: The "canonical" form of a schematic diagram is a netlist. However, in order to compare two netlists, you need to make sure that the component names and the node names of the two schematics are identical, which may require setting up a mapping of some sort between the two. Then, you go through the netlist node by node, and make sure each node connects to the same pins of the same components.
I don't know of any existing tool that does this, but it would be fairly easy to set up in any scripting language (Perl, Python, Ruby, etc.). |
H: Uninterrupted current triggering transistor base
I'm still pretty much a electronics-beginner, I'm currently working on modifying a USB game-pad to use switches instead of buttons and I want LEDs to accompany the switches. The basic solution I was hoping to use looked like the following:
simulate this circuit – Schematic created using CircuitLab
Note that when Input 5V to GND is shorted then IC transmits the button as pressed. The current through the LED is 20mA.
The schematic above makes the LED work but the controller no longer recognizes it as being switched on. So, unable to modify the current going through the switch I instead tried to add a transistor with the resistor and LED separate from the switch, similar to the solution here:
simulate this circuit
This makes the switch work again but the LED does not power on. It does work when I remove the connection between the switch and GND so I'm assuming all the current goes through the GND-connection and nothing goes to the transistor base. Am I thinking incorrectly or how should I solve this?
AI: Your original schematic is somewhat confusing, as it does make it look like you are trying to short-circuit the USB power rail. I have redrawn it below with a circuit that should do what you want. It uses the switch to pull down the gate of a P-channel enhancement mode MOSFET.
simulate this circuit – Schematic created using CircuitLab
The main point to note is that the current to drive the LED no longer comes from the switch IC, but instead directly from the USB power rail. The switch input is not intended to provide significant power, and to get the current amplification benefit from the transistor it needs to get its current from a higher amperage source.
You could achieve this using a PNP BJT, but that will have a fixed saturation voltage across the collector and emitter of the PNP transistor (around 0.15V) requiring a recalculation of R1. It also requires a series base resistor whose value must be calculated with the Hfe of the BJT in mind. It does have the advantage of not placing a low gate threshold voltage requirement on the transistor, and more suitable PNP BJTs are available in through-hole packages than P-channel MOSFETs.
simulate this circuit
This circuit uses the BC557 purely because it is the complementary part to the BC547 you used in your original attempt. The guaranteed Hfe of the lowest grade (A) parts is 110, so for -20mA collector-emitter current we need at least 180uA of base current. Using a 4k7 base resistor we have 5-0.7 = 4.3V across it, giving a base current of 4.3/4.7k = 915uA. This is enough to drive the BJT hard into saturation without excessive base current flowing. Note that with the MOSFET version of this circuit there would be practically no gate current flowing, so you would gain greater efficiency that way. I haven't changed R1 to allow for the collector emitter saturation voltage - the required reduction would likely be around 10 ohms, so you may choose to neglect this. |
H: set one output high at a time when multiple inputs are high
I'm making a small circuit for detect water level of our home water tank .here is the diagram.
when water level is low i want to turn red led when water level is max i want to turn green one on and so on.but current circuit turn both red/yellow/green when water level is max because when water level high all terminals sink .
how can i turn only one led instead of all .for example when all terminals are sunk i want to turn only green led. how to turn only one led instead of all ?
AI: I hope you have series resistors in your circuit that you left out in your picture? Otherwise you are pushing an undetermined amount of current through the transistors and LEDs.
To 'block' a lower LED you could use this basic circuit (untested):
simulate this circuit – Schematic created using CircuitLab
As others have stated in the comments, if you use copper electrodes they will over time dissolve. How fast depends on the current, which you can minimize for instance by using darlington transistors and higher values for the base resistors.
But not all electrodes will be etched away, only those that can be oxidized easier than the abundantly available H+/H3O+. This includes copper, but not platinum or (cheaper and more readily available) carbon. |
H: Is there a way to Divide two 8 bit number in PIC 18fXXX assembly language not C?
I Can easily do the division in C of PIC micro controller.
But is there a way to divide two number stored in two 8 bit registers.
For example look at this code.
I have to do it in PIC assembly for 8 bit Microcontrollers.
ORG 0H
R1 EQU 0X06
R2 EQU 0X07
MOVLW D'64'
MOVWF R1
MOVLW D'8'
MOVWF R2
; We want to Do R1/R2 We can assume that R1>R2 and we don't need Decimal Values
;SUGGESTIONS?
END
AI: If you don't need speed you can use 'repeated subtraction', essentially
Q = 0
while( R1 > R2 ){
R1 = R1 - R2;
Q = Q + 1;
}
I'll leave it to you to translate this to PIC assembly |
H: What is the significance of Common Mode Signals?
I don't understand the physical significance of Common Mode Voltage.
It is arbitrarily defined as the average of two voltages and is expected to be rejected by a differential amplifier. Why? What is its physical significance?
EDIT
my question was specific to differential amplifiers. Both inputs to the differential amplifier need not be equal and opposite. What would be the meaning of common mode voltage in such case?
AI: For common mode signals you get two wires: one with a signal and one with the inverse of that signal. If you add them you'll get zero, if you'd take the difference you'll get the signal.
What's the cool thing about this. If the two wires (the pair of wires) picks up some noise.
Than the noise will be added on both wires. If you add the two signals you only keep the noise.. But if you take the difference you'll get the signal without the noise.
Signal is S (without noise)
Cable a => S
Cable b => -S
The Difference is S - (-S) = 2*S
Signal is S (with noise)
Cable a => S + noise
Cable b => -S + noise
The Difference is (S+noise) - (-S+noise) = S+S+noise-noise = 2S
So the noise will be cancelled.
example image:
When Common mode signals are used they are mostly transferred with twisted pair cables like this: |
H: LM317 current source
I want to use an LM317 to make a current source circuit for driving high power LEDs (500-700mA.) The schematic in its datasheet has no capacitor, but in some schematics there are one or two capacitors like the one below:
Are they necessary? If I omit them, can the possible ripples damage the high power LED?
I quote from a forum:
"Don't use a capacitor on the output when you are using the LM317 as a constant current source.
A theoretically ideal current source has an infinite output impedance, whereas a theoretically ideal voltage source has an output impedance of zero.
If you use a capacitor on the output of your current source, then your "real world" current source is further away from the theoretically ideal current source, which is not a good thing."
Is it correct?
AI: True, but irrelevant in your case. An LED does not change forward voltage quickly- there is a slow (thermal) change, but nothing on the order of microseconds where the caps have some effect. The caps may effect better stability so I'd suggest using them.
Edit: In simulation, with 100uH inductance (long wires with some loop area) in series with an LED load (3 x 1N4004) the circuit is close to being unstable (or at least it rings- the current overshoots as well as the voltage). 10uF in C2 position completely eliminates the overshoot- as you might expect all you can see is the 25mA current charging the capacitor. Below trace is without C2 and short across load removed at t= 100usec.
Now, with 10uF in C2 position:
Same thing but with 4 ohms rather than 50 ohms and only 30uH inductance (no cap), showing current. |
H: Relationship between band gap and built in potential for PN Junction Diode in equilibrium?
I wanted to know the relationship between the band gap (Eg) of the p/n regions in a diode and the built in potential in equilibrium.
My intuition says that Eg = e*Vo. I did a small calculation for silicon at T=300K. I got the relation to be approximately correct.
Looking at the band gap diagram, the valence band of the p side seems to coincide with the conduction band of the n side in equilibrium.
Is my intuition correct? What is the actual relationship?
AI: No --- the built-in potential is equal to the difference of the Fermi levels in bulk semiconductor N and P, so for a given material it basically depends on the doping of the P and N zones. See the figure in In band diagram, why the Fermi energy (EF) is constant along the device?
Think about it --- if you were right, all the diodes of a given material would have the same built-in potential.
So the answer is that (using the simply common model of the diode):
$$
V_0 = \frac{k_BT}{q_e} log (\frac{N_AN_D}{n_i^2})
$$
with the usual meaning of the symbols. Notice though that in the term \$n_i^2\$ lie a dependency to the band-gap of the material, too.
(And be sure to not mistake the built-in potential with the threshold voltage, they are completely different beasts). |
H: Using bit fields in interrupt-driven applications
When implementing interrupt-driven applications I usually create a bitfield to keep track of different interrupts. For example:
volatile struct {
unsigned char ISR0: 1;
unsigned char ISR1: 1;
...
unsigned char ISR7: 1;
} ISRstatus;
The rest of the application might have the following structure:
ISR(ISR0) {
// set status flag
ISRstatus.ISR0 = 1;
}
void main() {
while(1) {
if (ISRstatus.ISR0){
// serve interrupt
/* ... */
// clear status flag
ISRstatus.ISR0 = 0;
} /* ... */
}
}
Recently I came across a few articles that suggested avoiding bitfields due to their unexpected behavior across different compilers and architectures.
Assuming my compiler is GCC, is it a bad idea to use this approach?
AI: CORRECTION: As Ben (and other commenters) have pointed out, clearing the status flag in the main code is a problem. Writes to bit fields are normally implemented as a read-modify-write, where (in your case) the full byte is read, then one bit is set or cleared, then the modified byte is written back. In pseudo-code, ISRstatus.ISR0 = 0 would become:
char temp = ISRstatus;
temp &= ~0x01;
ISRstatus = temp;
The problem here is that an interrupt can come in the middle of this sequence. For example, let's say that the ISR0 flag is set and interrupt 5 comes in. What happens is:
<interrupt 0>
ISRstatus |= 0x01; //Not really atomic, but it doesn't matter here
<exit interrupt 0>
if (ISRstatus.ISR0)
{
char temp = ISRstatus;
temp &= ~0x01;
<interrupt 5>
ISRstatus |= 0x20; //Not really atomic, but it doesn't matter here
<exit interrupt 5>
ISRstatus = temp;
}
In this example, ISRstatus should be equal to 0x20 after the if statement, but instead it's equal to 0x00. The ISR5 flag got lost.
The way to fix this is to disable interrupts when writing to the global variable in your main code. (Reads are safe as long as the entire structure is loaded at once, which it should be for an 8-bit structure.)
The C standard does not guarantee any particular ordering or packing of bit fields. This means that using bit fields to access data stored in a specific format (like register or packet header fields) is not portable. If there's only one compiler for your CPU, portability won't be a problem, so you can get away with it.
My reading of the standard is that bit fields are intended to be used in exactly the way you're using them. Just keep the limitations in mind.
EDIT v2: The compiler probably won't let a single bit field cross a storage unit boundary. Your compiler manual should have more information, but it might take some trial and error to figure out the edge cases. Since all you care about is the data in the individual fields and not their arrangement within the storage unit, this shouldn't matter.
All that being said, portability is usually not a huge concern for interrupt code, and it's unlikely for a compiler to change the way it handles bit fields in a newer version. |
H: Combining resistors in series with a voltage source in between
Am I allowed to combine the resistor R and coil Xl as if they were right next to each other? I want to make this into a current generator, without many transformations.
AI: You can only combine two single elements into one for sake of analysis if they are in series with nothing else connected to the node between them, or if they are in parallel with nothing else connected in series between them.
So, do Xl and Z meet either of these criteria? If not, why not? |
H: DPDT switch using only transistors
I have seen a number of similar questions but no one ever seems to actually answer this question, so let me pose it a different way. Let's suppose I am stuck on a space ship (so I can't go buy some other parts) and I must replace a blown DPDT relay. I have a handful of NPN and PNP transistors, a few resistors and capacitors of various sizes, and some diodes. I have to replace the relay using only the parts I have. For the sake of argument, assume the components I have will handle the same voltage and current as the relay.
What I thought would work is to create a sort of H-bridge using NPNs for two of the switches and PNPs for the other two. That way, when the switch controlling the old relay's coil was on, the NPN circuit would activate, and when the switch was off, the PNP circuit would activate. I added a pull-down resistor to make sure the circuit was grounded when the coil switch was off. I have only tried this in iCircult so far, but it doesn't seem to work. I tried adding some diodes like I have seen in some h-bridge diagrams (even though I don't think they should be necessary for this configuration) and it didn't help.
Here is my example circuit diagram. I'm showing an unknown device in the center of the h-bridge that could represent a DC motor but doesn't have to. I don't want to get into discussion about flyback diodes and inrush current. The important thing is that current flows one direction when the coil switch is on and the other way when it is off. I know I probably need a base resistor in addition to the pull-down but, as a general concept, I don't understand why this doesn't work when I simulate it.
simulate this circuit – Schematic created using CircuitLab
Here is the original circuit with the relay I need to replace:
simulate this circuit
AI: Your basic problem is PNP1/NPN2. With the bases tied together, you are getting maximum current flow through the two emitter-base junctions from +12 to ground. Any real transistors in this configuration will die instantly.
If you must use BJTs and want to keep your circuit ideas as much as possible, replicate NPN1/PNP2, and use a fifth transistor to invert the base drive signal between the right and left sides of the bridge. Also, you'll need to either use a 12-volt coil voltage or provide a 6th NPN as a level shifter. But be aware that this will not work well, since the NPNs will not get enough base voltage to turn on hard, and you won't get very good performance.
A better idea is something like
simulate this circuit – Schematic created using CircuitLab
You will have noticed, with some frustration, that none of the resistors have values. There's a very good reason for that: you haven't specified your load current requirements. At any rate, Q1 - Q4 are power transistors, able to handle the load current, while Q5 - Q9 are smaller signal transistors able to handle about 1/10 the load current. |
H: Difference between High- and Low- side switching of power?
Is there any real difference between high- and low-side switching?
Assume:
Switching is for on/off control of an object (My case RPi)
Base/Gate can be driven to Vcc and GND
AI: The only real differences are the ground level and maximum current available:
Low-side switching means that the two subcircuits will have different ground levels since the switching element will have a (small) non-zero voltage drop.
High-side switching will have a lower maximum current limit since P-type (high-side) switching elements usually have a higher on resistance than N-type (low-side) switching elements. |
H: Extending 500us pulse for multiple input signals and minimum IC count
I need to extend as fast as 500us input pulses to ~150ms for them to be detected by a downstream circuit. Pulses are coming from sensors.
I've found other answers in this site and others about using retriggerable monostable multivibrators, but the problem with those solutions is that they don't have enough density, I need to do this for 16 input signals and I haven't found a package with more than 2 monostables, and then I would require to also have an RC circuit for each one.
My current solution is using microcontrollers to detect the signal and set the output high for 150ms for each pulse detected in the corresponding input. Problem is that I'm having some misses with this design at higher speeds, and although I think it should theoretically work, I'm thinking that there might be a discrete solution that more efficiently solves this problem.
Currently, and assuming I get it to work well, I'm using 2x18 pin ICs for this, so looking for something around those numbers, can be higher if it results in more reliable results.
AI: A single-chip solution requires a microcontroller with at least 16 inputs and 16 outputs.
500us is a really long time in terms of microcontroller clock cycles. You can use interrupts that react to input changes or simply poll the inputs, then trigger individual timers for each of the outputs.
Even a lowly PIC running at 4 MHz (1us instruction rate) can do this easily. Look at groups of 8 inputs (1 byte) and look for changes. Then reset the timer(s) for any inputs that triggered - while a timer is running, that output pin is active. When the timer expires, the timer freezes at that count and the output pin is reset.
If you want to do it in hardware instead, consider using the cd4043 quad R-S latch. Your rising input pulse goes to the Set input of one latch and there is a RC network from each output back to that latch's Reset pin.
16 pulses will cost you 4 IC packages and 16 each resistors and capacitors.
It is permissible to use a 4043 quad latch in this fashion because there aren't any edge-sensitive clock inputs. This is a reliable technique that has been used in thousands of designs over the years.
Quick, easy, no software to write. |
H: MOSFET driving MOSFET for reduced reduced Rds
I am using a PIC to drive the gate of a logic level MOSFET. Although the 5V logic output of the pic is sufficient to exceed the threshold voltage I would like to drive the gate using 12V to reduce the Drain-Source resistance.
In order to achieve this I have drawn up the following circuit using two MOSFETs in series (as highlighted). Will this design work, and is it the best approach (keeping in mind i want to minimize the number of components).
AI: This doesn't drive the output MOSFET with a higher gate voltage - it will only see about 2V as the first MOSFET is acting as a source follower - the 5V from the MCU will be reduced by the threshold.
To drive the output stage with a higher voltage will require a couple of stages. Something like the following schematic. Bec careful about exceeding the VGS of the output stage.
You don;t say if you are using PWM modulation, if you are you will need to ensure fast charge and discharge of the MOSFET gate capacitance - this circuit may not be adequate.
simulate this circuit – Schematic created using CircuitLab |
H: Mixing 2v and 3V LED's and calculating resistors
Are series groups in parallel better than strictly parallel with a resister on each leg? And for parallel do I calculate Ω just for each voltage LED or do I need to somehow do a calculation that takes into account the total number of LED's and their different voltage? But then what do I do for groups in series in parallel?
So I have 8x 2v LED's each with a 360Ω resistor and 3x 3v LED's each with a 300Ω resistor, all in parallel, powered by a 9v battery. Is this the best way to do this to get the most brightness out of all the LED's, or is there a better way? See diagram directly below.
simulate this circuit – Schematic created using CircuitLab
Or would it better to wire them in series groups, in parallel. For instance the 3x 3v with a 1Ω resistor in one series group, in parallel with 2 more series groups each with 4x 2v LED, and a 56Ω resistor in both series groups? So that would make 3 series groups wired together in parallel. Does this math add up for my resistors? See diagram below.
simulate this circuit
Which makes the most sense? Is this resistor math correct? And which is best for brightness? Thank you!
AI: Each chain consumes 20mA of current. Given that, your goal should be to reduce the number of chains. This is what your second layout does, hence it is more efficient.
The number of chains does not affect the calculations; each chain is restricted to the maximum desired current using the exact same equations. |
H: Audio Grade Capacitors - Marketing Hype or Better Technology
I have been reading a lot about audio grade capacitors lately, and I cannot find very good information about them. I have read many posts from different sites saying that audio grade capacitors are just a marketing hype, and that there is nothing new inside of them. Is this true? Or is there something special about these audio grade capacitors that I am missing?
If they really are better for audio than traditional capacitors, what then makes them better? Also, what would be a good test circuit to compare the differences between traditional capacitors and audio grade capacitors?
If anyone reading this has experience with audio grade capacitors please share your thoughts and experiences below. I really want to figure out if this is a marketing hype or not.
AI: Just as Andy says, ceramic capacitors can exhibit microphonics, which is less than ideal in audio circuits. Large value, physically small surface mount MLCC ceramics also exhibit quite profound decrease in capacitance with applied voltage - take a look at this article from Maxim.
This is a very good reason not to use them in filter circuits, where cutoff frequencies will become voltage-dependent. However, as decoupling capacitors you just need to be aware that this derating occurs and consider using multiple parts in parallel, as well as choosing parts with a higher voltage rating (and hence larger physical size) to achieve practical performance close to the nominal value.
I have not read about dielectrics altering their permittivity with applied voltage, but all parts have non-ideal characteristics and understanding them is part of designing well with them. This sales pitch from NIC Components has a useful table showing some of the pros and cons of different capacitor types.
It is important to consider where the capacitor is being used and what kind of signals it will see, however. For example, an AC-coupling capacitor experiencing a fairly fixed bias voltage and less than 1V pk-pk of superimposed signal will suffer less from voltage coefficients than a capacitor in a power output stage experiencing tens of volts pk-pk across it.
Rod Elliott has a very good article on capacitors in audio circuits on his site. His site is also a very useful reference for lots of practical audio circuits and general audio myth debunking.
In general, the most "ideal" performance capacitors are plastic film parts. They are very stable over differing operating voltages and temperatures. However, their size and cost can prohibit them from use everywhere in audio circuits. You need to consider what performance is acceptable and choose the part appropriately. With all that said, "audio grade" components are almost universally bunkum unless they can point you clearly to measurements and sensible physical phenomena to prove otherwise. |
H: Is it possible to use a USB Wifi dongle with STM32F429I Discovery board?
I have been using wifi modules like ESP8266 and EMW3162, but this increases the load of work. I would like to use a usb wifi dongle (because discovery board has extra usb interface).
Is it possible? Do I need some kind of specific driver or a standard driver exists for such peripherals?
AI: Usb wifi devices require their specific usb drivers to work. There is no generic driver 99% of the time. The ESP 8266 works easily because it has a serial interface, which can be bit banged of needed from most microcontrollers. |
H: battery overdischage oscillation protection
I previously asked asked an advice on power control of battery operated system.
The problem was to cutoff the battery when low to avoid overdisharge.
I have built the device according to Olin Lathrop's advice to add hysteresis to avoid oscillations. Unfortunately this does not work. The oscillations still appear in very unpredictable way.
Is there a way to add a control with stable hysteresis and preferably with reset button.
My current schematic is: stable voltage is compared with battery voltage at the comparator, when certain threshold is achieved the comparator switches and switches off the load via power mosfet, 200mV positive feedback from is added to input of comaparor to add hysteresys. It work perfectly fine in simulation software but still oscilates in real life.
The problem might be in capacitance of the load or whatever. I need a different approach, something that would latch and hold the OFF state.
AI: Solved this with a circuit similar to this one.
Works fine in sumulation. All circuitry including comparator and latch consuming 50mW, that's nothing for big lead acid battery that I am using. I decided to use both techniques, hysteresis and latch, since it requires only one resistor to add for hysteresis. |
H: Separating power ground from control ground
I'm looking at the 'layout considerations' for TPS61030. On p.18, it says
Use a common ground node for power ground and a different one for
control ground to minimise the effects of ground noise
Aren't the power ground and control ground connected to the negative of the battery anyway? It seems to imply the 2 grounds should be somehow separated.
Thanks
AI: Yes, the grounds do come back to the battery if you follow the traces or conductivity.
But that is not what they are really saying.
What they are are saying is separate the loop currents for power and control. You want to ensure that they are separated.
Notice how the PGND is kept away from everything else ? The high frequency nature of SMPS means that there can be some noisy current paths and by controlling their path, and what they are allowed to interfere with, helps control noise, and EMI. |
H: Mosfet identification
What mosfet is this? I know that it's N-Channel but where's the side of Source and Drain? I think, Source it's at right side, because of shifted Gate line... What's the usage of the two opposite diodes?
AI: The two diodes exist in any MOSFET (and as @MrBit points out, they actually should be the other way around in an N-channel device), but in most discrete devices, the substrate is shorted to the source, which effectively eliminates the right-hand diode. If the substrate is brought out to a separate terminal, it must be connected to the most negative point in the circuit in order to keep those diodes reverse-biased. (Or the most positive point for a P-channel device.) |
H: Forming Norton generator from a voltage source and two resistors
Can I combine the E,R and Xl to form a current generator, with R and Xl in parallel. I need to find the impedance of Z so it develops most power, R-jX, or Z*, if Z is the impedance of the rest of the circuit.
EDIT: That is whether it can be transformed into this:
simulate this circuit – Schematic created using CircuitLab
AI: Can I combine the E,R and Xl to form a current generator,
Yes. Any 1-port linear network, other than an ideal voltage source, can be modeled by a Norton equivalent circuit.
... with R and Xl in parallel.
No.
To find the Norton equivalent circuit, you need to find two points along the one-port networks' I-V curve, and then determine the equivalent current source and shunt admittance from that. Typically it's easiest to use the short-circuit output current and open-circuit output voltage as the two points. |
H: STM32: Timer Modes
Is is possible to measure the frequency of an input analog signal with the input capture mode of Timers in STM32F4 ? If not, then what is the alternative ? Thank you in advance.
AI: Introduction
It seems like you are trying to build a frequency counter. You can achieve such a device with the timer module in a microcontroller. Be aware that it will have some limitations in terms of how fast of a signal it can observe.
Analog Processing
You will need to first condition the input signal. To know what is required, I would first need to know a bit more about your signal, but I will assume you are trying to measure the frequency of something that is basically a sine/square wave perhaps with some DC offset. We need to get from this general analog signal to a digital square wave that represents the same edges. We can do that with the following comparator circuit:
simulate this circuit – Schematic created using CircuitLab
Microcontroller Configuration
Configure your microcontroller to count up until it sees a rising edge on the output of the comparator. Increase the timer frequency as high as possible to achieve the frequency resolution you require. You will also want to fire an interrupt on a capture event so you can do something with the new data.
Algorithm
When the interrupt is fired grab the value in the capture register and compute the frequency of the signal as follows:
$$f_{in} = \frac{f_{timer}}{count}$$
You may then wish to average several of these readings. |
H: If adding resistors in parallel decreases total resistance, why doesn't the voltage in the circuit change?
I'm sure I'm missing something basic, but here we go:
If adding resistors in parallel decreases total resistance, why doesn't the voltage in the circuit change?
Does the current increase to match the decreased resistance?
Thanks!
AI: Does the current increase to match the decreased resistance?
Absolutely correct. KVL says that the voltage doesn't change, so the current must change instead in order to compensate. |
H: Tranmission line equations when initial conditions are not zero
A high voltage DC line is in steady state sufficiently long time after applying 1 MV at the input terminals through a DC voltage source of 30 ohm impedance with an open circuit at the load end. The characterstic impedance of the line is 20 ohms. The line length is 1000 Km. The line capacitance is 0.2 nF/m. The line may be treated as lossless.
To this charged line a 30 ohm load is connected at t=0 . Find an expression for the voltage on the line after t = 0 at various points on the line with usual labeling : position of sending end is –L and load end position is 0 and any arbitrary location is –
I cam across this question my college assignment, I couldn't solve it any suggestions how to solve it? Any reference material?
AI: The initial conditions are that the 20 Ω line is charged to 1 MV, and at t=0 you connect a 30 Ω load.
The immediate effect is that the line and the load form a voltage divider, so the terminal voltage at the load end immediately becomes 600 kV. This -400 kV step is the initial disturbance that propagates back up the line toward the source.
Both the source impedance and the load impedance are 30 Ω, so the reflection coefficient is the same at both ends:
$$\Gamma = \frac{Z_T - Z_0}{Z_T + Z_0} = \frac{30 \Omega - 20 \Omega}{30 \Omega + 20 \Omega} = 0.2$$
At the source, the initial -400 kV step is reflected as a -400 × 0.2 = -80 kV step, bringing the line to 520 kV.
At the load, this step is reflected as an additional -80 × 0.2 = -16 kV step, bringing the line to 504 kV.
The next steps are 500.8 kV, 500.16 kV and 500.032 kV.
After a large number of steps, the line voltage converges on 500 kV, just as you'd expect. In the steady state, you have a simple voltage divider between the source impedance and the load impedance.
So now we know what happens, but how fast does it happen?
Knowing the capacitance allows us to also calculate the line's inductance from its characteristic impedance:
$$Z_0 = \sqrt{\frac{L}{C}}$$
so,
$$L = Z_0^2 C = 20^2 0.2nF/m = 80nH/m$$
Knowing both of these values allows us to calculate the velocity factor for a lossless line:
$$VF = \frac{1}{c \sqrt{L C}} = \frac{1}{3\cdot10^8 \sqrt{0.2 nF \cdot 80 nH}} = 0.8333$$
Those two formulas can be combined into a simpler formula that gives the same answer:
$$VF = \frac{1}{c Z_0 C}$$
Knowing this, plus the length of the line, allows you to calculate the time between the reflections. |
H: Running 2 5V USB battery power packs, Can I use them in parallel
Can I run two 5v power packs in parallel to give me more mAh's (Time)? Or will one try and charge the other?
Example
I.E. connect both 5V lines together, both GND lines together to my device
AI: I would highly recommend against paralleling two of the typical "power bank" devices. A far better strategy is to use one till it is depleted and then unplug it and switch over to the other one.
There are a good number of reasons for not doing this:
1) Many power banks use voltage converter circuits of questionable design. I've tested a few that cannot even output 5V unless they have no load and under even moderate load will drop to even as low as 4.6V.
2) Power banks are highly likely to output different voltages that vary with the amount of charge left in their internal batteries. This is due in part to the crappy circuit design as mentioned above. When the voltages are not the same on the outputs then trying to parallel the outputs will lead to problems. The least of which could be that one unit supplies all the load till it has depleted more than the others.
3) It is never a good idea to parallel up the outputs of switching power supplies. The behavior of one in trying to adjust the output voltage could interact with the other and even lead to a detrimental oscillatory behavior. Only parallel supplies that are manufacturer specified by design to support parallel operation. The most robust of these have a shared sense line that strings between the paralleled supplies to make them all play nice with each other. Power banks, which do contain switching power outputs, most certainly do not have that sharing capability. |
H: Search for matching string on the other string
I have a problem with strstr function, I receive characters from UART with interrupt & save them in the n length array(buffer array). Then in main loop I check the buffer with strstr function from string.h for finding a special sequence of characters(for example" hello"). It works fine for the first time but sometimes it dosen't work and without receiving that array of string acts like when find matching.
Sample code :
Interrupt handler, when a character is received, it saves that in the buffer:
Code:
void USART1_IRQHandler(void)
{
/* RXNE handler */
if(USART_GetITStatus(USART1, USART_IT_RXNE) != RESET)
{
Rx_Buffer[Counter_Num1]=(char)USART_ReceiveData(USART1);
Counter_Num1++;
if(Counter_Num1==100)
{
Counter_Num1=0;
}
}
}
main loop: in some primary matching it works fine (when I type "hello",it returns "1234") but after some tries it permanently returns "1234" without matching
Code:
while(1)
{
//--------------------------------------
do
string_pointer = strstr (Rx_Buffer, "hello");
while(string_pointer==NULL);
USART_SendData(USART1, '1');
delay_ms(50);
for(loop_counter=0;loop_counter<100;loop_counter++)
{
Rx_Buffer[loop_counter]=' ';
}
string_pointer=NULL;
USART_SendData(USART1, '2');
delay_ms(50);
USART_SendData(USART1, '3');
delay_ms(50);
USART_SendData(USART1, '4');
delay_ms(50);
//-----------------------------------
}
I am using stm32 & keil.
AI: Step 1: Make your do{}while() loop a do{}while() loop, in stead of a do and infinite while() loop if you want that behaviour to be predictable.
Step 2: Stop overwriting your 100 place string with spaces to blank it, as internal str functions look for a '\0' to stop. So they now walk into unknown memory once you have had one match. Set it all to '\0'. Google memset().
Step 3: Actually initialise the array when you begin to '\0' with memset (you happily don't show all your code, but I'm just going to be assuming here), or similar, so you actually know what will happen.
Step 4: Consider what happens when you start sending hello when the loop is at count 98. You might want to manage the numbering upon match as well. |
H: Dependence of Inductance of a Coil on the gap between turns?
I was wondering how does inductance of a coil say wrapped around a core change by increasing the gap between turns ?
Usually it shouldn't depend on it from the Formula of L being equal to (uN^2A)/L
but is it affected ?
Also Part 2: Say if it was an iron core for a transformer and we were to introduce a small air gap in the transformer, then does it in anyway affect the inductance of the coil ?
AI: This is the formula for a simple solenoid: -
Basically if you space the (same number of) turns out, the length dimension (l) increases and inductance reduces.
As for a transformer core, adding an air gap significantly reduces the inductance. You have to think about the first formula and imagine that the solenoid was wound on a piece of ferromagnetic material such as ferrite or steel laminations. The dominant material that affects the inductance is not the core material but the air gap from one pole end to the other - imagine it like putting a 1k resistor in series with a 1 ohm resistor - the 1k dominates and represents the air gap; the 1 ohm is the core material and is totally dominated by the air gap.
For a closed transformer core a different formula is used because the core has no gap (or a very small gap) and the core dominates. However, introducing a small gap does reduce the effective permeability of the core significantly.
Usually this is specified on core data sheets but there are formulas that can be used to work this out. Ultimately, as gap becomes much more significant, that formula becomes the one at the top of this answer.
For an ungapped toroid: -
You can see it bears strong similarities with the solenoid formula but "mu" is the permeability of the core material and not air (or vacuum).
Pretty toroid pictures stolen for here
This is a good explanation for inductance with an air gap. |
H: Flip Switch with transistor and push button
Sorry if this is a duplicate, I don't know the actual term for what this is called.
I am trying to create a circuit where the push button will switch the current from Red LED to Blue LED on right. Currently the blue LED lights up but Red one doesn't go off. I know I am missing something small which is apparently big enough.
What am I missing?
Resistors:
LEDs: 200 ohm
Transistor Base: 1K
Working Voltage: 5V
Transistor: Generic NPN
Simulation of the circuit below
AI: Your idea 'current follows the path of least resistance' is an approximation, and it holds only when there is a limited amount of current. In your case you use a lab power supply, which is a constant voltage source, which will supply all the current you ask from it. Hence both the transistor and the red LED parts get current.
A way to switch the other LED of when you press the switch is show below.
simulate this circuit – Schematic created using CircuitLab
The principle is that with the switch open, Q1 gets a base current via R1 and D1, so it conducts, and current flows through R2, D2, Q1, so D2 lights up. But the base current is too small for D1 to light up.
When you close the switch, Q1 gets no base current, and the current through D1 is large enough to light it up. |
H: Stereo-Mono circuit after passive bandpass filter
If i put a passive RC band pass (high pass + low pass) filter before the amplifer and right next to it I sum the channels with 1-5 k ohm resistors, then the amplifier is turned on,is there a possibility that those summing resistors could act as a filter prolongation?
Filrer:
Summing (witch is right after filter)
Resistor values will be 1 - 5 kohm
AI: The low input impedance of the summing stage will affect the filter response. To fix this without additional components such as a buffer, you can sum the signals before the filter (and then use only one filter).
Just select R1a and R1b such that the thevenin equivalent resistance (the parallel combination) is the same as R1 that you desired for the filter.
simulate this circuit – Schematic created using CircuitLab |
H: Importance of phase angles when analysing AC circuit
Freshmen EE circuit. Resistance, inductivity, capacitance are given and effective value of voltage. No phase angles are given.
When calculating complex power, may I assume the phase angle of the voltage source? Current should adjust accordingly and give me the same power no matter which angle I assume.
Am I right? (I know there are formulas with effective U)
AI: Yes, it's typical to assume a phase angle of zero for the source, but it really doesn't matter- you should get the same results if the math is done right. |
H: Why is it usually the case that the negative rail for ICs needs more decoupling capacitance (has worse PSRR) than the positive rail?
That the premise in the question seems to hold can be seen from various sources, including:
comparing the datasheets of various clones of LM317 and LM337 (too many to list, but generally the datasheets for the latter recommend more decoupling on input, about an order of magnitude more than for the former, e.g. TI's datasheet for LM317 recommends 0.1uF input/supply bypass, whereas the one for LM337 recommends 1uF for the same.)
related to the above, the TI datasheet for uA78xx has a split rail power supply schematic where the decoupling for the positive regulator is less than that of the negative one. This is reproduced below.
the Analog appnote MT-101 shows worse PSRR for the negative pin than the positive pin:
So the question is why is this asymmetry usually present.
AI: This is true because the LM7815 is stable with any output capacitance- the capacitor is just there to reduce the output impedance at high frequencies. Vout comes from the emitter of the NPN pass transistor.
The LM7915, on the other hand, is made with a similar semiconductor process but has to produce a negative output voltage. Vout comes from the collector of the NPN pass transistor. It's not stable without a largeish capacitor on the output. With only 100nF on the negative regulator it will likely oscillate under some conditions, whereas the positive regulator will be fine.
LM78xx
LM79xx
As far as the AD8099 goes, it probably has to do with the (internal) compensation capacitor being connected to the negative supply. Op-amps do not have ground pins generally.
So, any change of the negative supply pin relative to 'ground' is coupled to the amplifier.
What appears to be a pattern is actually from two quite different root causes. |
H: Allowed error in baud rate between pic and Bluetooth module
I'm trying to connect a dsPIC33FJ128MC804 - 16 bit pic - with a Bluetooth module
the problem is i have few baud rates of Bluetooth to choose between them , searched the net but could not find the allowed baud rate error due to baud rate generator register takes only integer values as you know , so what is the maximum allowed error ?
Edit: i read the related section of data sheet and family reference to UART but i do not think i found any information regarding this point.
AI: As a general rule of thumb, the total error between a transmitter and a receiver cannot exceed ±5% — half a bit time either way after a total of 10 bit times. Splitting this evenly between the two, and making allowances for crystal errors, synchronizer delays, etc., we usually say that each device needs to be within ±2% of the nominal frequency. |
H: Skew angle in squirrel cage induction motor
The rotor in the squirrel cage induction motor are shorted end to end by aluminium bars; however the are placed parallel at a certain skew angle.
Wikipedia states that "The conductors are often skewed slightly along the length of the rotor to reduce noise and smooth out torque fluctuations that might result at some speeds due to interactions with the pole pieces of the stator ."
However I am unable to understand the above statement.
AI: The problem is that the rotor and stator must have spaces called slots, in the iron for the conductors. The conductors and air in the slots have a lower reluctance than the reluctance of the iron. There are more slots than there are poles in the stator. The windings are distributed among the slots to form distributed poles. Their is a different numbers of slots used for the stator and rotor. Those two features prevent the rotor from becoming locked or "cogged" in the minimum reluctance position that would otherwise exist.
Even with proper selection of the number of stator and rotor slots, there can be reluctance variations at different rotor angles that cause torque fluctuations and inflections in the torque vs. speed curve. Skewing the rotor slots mitigates that effect.
Here is a picture of the rotor and stator of a 4-pole, permanent-split capacitor, single-phase induction motor. |
H: Implementing Safety Shut-Off Relay In Project
I am working on a project which I have poured lots of cash into that involves water, pressure and electronics in very close proximity of each other... Lately, I have been considering adding some fail-safe mechanism which will cut all power to the machine if any water is detected by some carefully placed water sensors. I am no electrical genius (really far from it) so I was curious if there was a way to create a toggle circuit which the brain(arduino) could trigger that would manipulate a relay cutting power to the device; ultimately requiring human intervention to reset.
I realize that this is most likely impossible/not ideal, and that some of you may suggest a secondary, battery-powered system to do the job.
Thanks
AI: You can use an Latching relay and a momentary switch.
So this would operate as follows, to get the system started you would have to press the momentary switch and hold it until the arduino latched the relay to the position where power is supplied to the machine. Once the system was running and water was detected by the sensor then the arduino would latch the relay into the position where power is no longer being supplied and it would take a human to come and press the momentary switch to start the system again
simulate this circuit – Schematic created using CircuitLab |
H: Create a CMOS circuit from a logic function F=~A+B
I tried to draw the a CMOS logic circuit, but I don't know whether is is right or not.
The function is: \$ F = \overline{A} + B \$
$$ F = \overline{A} + B $$
$$ \overline{F} = \overline{\overline{A} + B} \Rightarrow A \times \overline{B} $$
simulate this circuit – Schematic created using CircuitLab
Link to original paper.
AI: Here's your circuit:
simulate this circuit – Schematic created using CircuitLab
Please note that since the high side mos are P mosfets they are on when the input is low.
How did I draw that? First of all you need to fill the truth table, then you build the pull down network, i.e. the NMOS part, and the pull up network separately.
Let's make the table:
A B F
0 0 1
0 1 1
1 0 0
1 1 1
Inspecting the table you can see that the output is low when A=1 and B=0. Your pull down network will consist of two series (logical AND) transistors, one connected to A, the other to /B.
The output is high if A=0 or (A=1 and B=1). Note that here I have already simplified the formula (search for karnaugh maps, minterms, maxterms, product of sum, sum of product).
Your pull up network will consist of the parallel (logical OR) of:
the series (AND) of two transistors, one connected to /A, the other to /B
a single transistor connected to A
Note that i inverted the signals for the pull up network because P mos turn on when input is LOW. |
H: Vcc and multiple USB Devices on one board
I'm working on a prototype board which has multiple USB device connectors (e.g. the one for a microcontroller thing I'm communicating with, and a second one for JTAG).
Now I wonder how I should treat the VCC line, because I'd like to power the board from either USB connector.
Sure, I can put a Schottky diode in line with each VCC and call it a day. I don't want the voltage drop though. I power some things from 5V and on some USB hosts I already see voltages as low as 4.5V instead of 5V. Loosing another 0.3V or so would be critical.
Since I'm going to power the device from a single USB Hub anyway, would it be okay to just connect the two VCC lines? The only other option I can see now is to forget about USB power, leave VCC open and use an external power supply.
AI: Directly connecting the power from multiple USB hosts is not a good idea. If you want well regulated power voltage, you'll need to have a separate power supply for that purpose anyway since USB voltage can vary quite a bit. If I remember right, the lowest is around 4.3 V, and the highest over 5.
Put a Schottky diode in series with each USB power feed, then regulate from there. Even with a diode drop, there is still room for a LDO to make a clean and regulated 3.3 V. If you really need 5 V (do you really need 5 V?), use a small boost converter to make reliable 5 V from the USB power after the diodes. You'd have to do that anyway if you want reliable 5 V. |
H: Difference between Micro-Operations in RISC and CISC processors
I've read that the modern Intel processors use the CISC instructions on the top, which are converted into RISC-like simpler instructions in the form of Micro-Operations at the back-end.
So if Intel micro-ops are RISC-like simple hardware level controls, then what do the ARM Micro-Operations do?
Because ARM instructions are already quite RISC-like, what would their Micro-Operations form look like?
AI: All microprocessors, and indeed all synchronous digital circuits work in what is called a "Register Transfer Level". Basically all that any microprocessor does is loading values into registers from different sources. Those sources can be memory, other registers or the ALU (Artihmitical-Logical Unit, a calculator inside the processor). Some of the registers are simple registers inside the procesor, some registers can be special function registers that are located around the CPU, in 'peripherals' such as I/O ports, memory management unit, interrupt unit, this and that.
In this model, 'Instructions' are basic sequences of register transfers. Normally it doesn't make sense to give the programmer the ability to control each register transfer individually, because not all of the possible register transfer combinations are meaningful, so allowing the programmer to express them all would be wasteful in terms of memory consumption. So basically each processor declares a set of sets of register transfers that it allows the programmer to ask the processor to do, and these are called 'Instructions'.
For example ADD A, B, C might be an operation where the sum of registers A and B is placed into register C. Internally, that would be three register transfers: Load adder left input from A, load adder right input from B, then load C from adder output. Additionally, the processor makes the necessary transfers to load memory address register from program counter, load instruction register from memory data bus, and finally load program counter from program counter incrementer.
The 8086 used an internal ROM look-up table to see which register transfers make each instruction. The contents of that ROM were quite freely programmable by the designers of the 8086 CPU so they chose instruction sequences, which seemed useful for the programmer, instead of choosing sequences which would be simple and fast to execute by the machine. Remember, that in those days most software was written in assembly language, so it made sense to make that as easy as possible for the programmer. Later on, Intel designed 80286, in which they made, what now seems, a critical error. They had some unused microcode memory left and they thought that they might as well fill it with something, and came up with a bunch of instructions just to fill the microcode. This bit them in the end, as all those extra instructions needed to be supported by the 386, 486, Pentium and later processors, which didn't use microcode any more.
ARM is a lot newer processor design than the 8086 and the ARM people took a different design route. By then, computers were common and there were a lot of compilers available. So instead of designing an instruction set that is nice for the programmer, they chose an instruction set which is fast for the machine to execute and efficient for the compiler to generate code on. And for a while, the X86 and ARM were different in the way that they execute instructions.
Time then goes by and CPUs become more and more complex. And also microprocessors are designed using computers and not pencil and paper. Nobody uses microcode any more, all processors have a hardwired (pure logic) execution control unit. All have multiple integer calculation units and multiple data buses. All translate their incoming instructions, reschedule them and distribute them among the processing units. Even old RISC instruction sets are translated into new RISC operation sets. So the old question of RISC versus CISC
doesn't really exist anymore. We're again back in the register transfer level, programmers ask CPU's to do operations and CPU's translate them into register transfers. And whether that translation is done by a microcode ROM or hardwired digital logic, really isn't that interesting any more. |
H: Doped PNP Bipolar Transistor
When doping a PNP bipolar transistor, does it matter which parts are doped by what amount? The picture below will show my question. Am I right in saying that the Emitter is connected to one P region, the Base is connected to the N region and the collector is connected to another P region?
The confusing part in the question is that it says "not in that order". So can I just use the values given to dope the regions in any random way. Or does the Emitter area require the highest doping amount or the base area the lowest amount etc.
Thanks
AI: Any Bipolar junction transistor (BJT) constitutes :
a heavily doped emitter
a lightly doped and small size base
a moderately doped collector
So according to your question, the emitter should have been doped to a concentration of 10^23/cm^3, the base doped to 10^16/cm^3 and the collector doped to a concentration of 10^18/cm^3.
Now your assumption about the emitter being connected to a P region, the base to a N region and the collector to a P region is correct.
And keep in mind that a Si atom has 4 valence electrons and that hole concentration will be in the order: emitter > collector > base and reverse for electron concentration.The calculations are quite easy to do. |
H: Specific Questions Regarding Use of Regulated Switching Supplies
For a project I am working on, I have 3 regulated switching supplies, 5v 5a, 12v 5a, 24v 2a. They are the standard, passively-cooled type which look like this
My question:
Can I stack these/have them making contact with each other? I have a very small space to work within, and don't want to screw anything up!
AI: The chassis should be connected to the earth ground terminal (see the datasheet to verify this). As long as they are all connected to the same earth ground and there is plenty of access by air for cooling (or if a fan is added in order to augment cooling and there is still enough airflow through them) there should be no problem. |
H: How to represent a 3 bit counter in Data flow style?
I want to represent a 3 bit counter in Data Flow style in VHDL. But I am getting confused.
Any hints how it is going to be represented.
AI: If you were to examine the link provided in Dave Tweed's comment -
It depends on exactly what you mean by "Data Flow style". As you can
see in this
discussion,
it is not a well-defined concept. – Dave Tweed♦
You might find that none of the three answers (as of this date) are incompatible with each other describing a dataflow expression of a design specification. For a three bit counter such a design specification might look like this:
library ieee;
use ieee.std_logic_1164.all;
entity ctr3 is
port (
input: in std_logic_vector (2 downto 0);
load: in std_logic;
reset: in std_logic;
enable: in std_logic;
clk: in std_logic;
q: out std_logic_vector (2 downto 0)
);
end entity;
architecture behave of ctr3 is
signal cntin,cntd,cntq: std_logic_vector (2 downto 0);
begin
cntinc: -- 3 bit incrementer
process(cntq)
begin
cntin(0) <= not cntq(0);
cntin(1) <= cntq(1) xor cntq(0);
cntin(2) <= cntq(2) xor (cntq(0) and cntq(1));
end process;
cntdin:
cntd <= (others => '0') when reset = '1' else
cntq when reset = '0' and enable = '0' else
input when reset = '0' and enable = '1' and
load = '1' else
cntin when reset = '0' and enable = '1' and
load = '0' else
(others => 'X');
cntreg:
process
begin
wait until clk'event and clk = '1';
cntq <= cntd;
end process;
cntout:
q <= cntq;
end architecture;
No. This question is too vague and broad. – Olin
Lathrop
7 hours ago
The part of the question that is vague is what features the counter has, and the above example provides synchronous load, synchronous reset and an enable. Within those bounds it does provide 'hints how it is going to be represented'.
The broad part is in describing what a dataflow description entails.
Brian's referenced and accepted answer:
"Dataflow" I think is fairly clear here; it DOES describe the flow of data, and it describes it in terms of concurrent statements. But I would add that each concurrent statement is woken by changes on its inputs and delivers its outputs; therefore (the important bit:) there is no correspondence between the order of things happening and the order of elements in the source code. In that respect it has a lot in common with functional programming. And both the first two models are dataflow; in (I) the elements are in logical order while (II) is not.
sensor's referenced answer:
Dataflow – describes how the data flows.
My referenced answer:
Dataflow – describes how the data flows from the inputs to the output most often using NOT, AND and OR operations.
And the above design specification meets all three definitions.
All three answers are derived educational institution observations on the structure of VHDL design descriptions from particular perspectives that don't lend themselves to generalization without explanation.
I extracted this paraphrase of a larger counter from a design done before the turn of the millennium in an era where an arithmetic expression synthesis license was an additional cost.
This design description analyzes and a simple testbench:
library ieee;
use ieee.std_logic_1164.all;
entity ctr3_tb is
end entity;
architecture foo of ctr3_tb is
signal input: std_logic_vector (2 downto 0);
signal load: std_logic;
signal reset: std_logic;
signal enable: std_logic;
signal clk: std_logic := '0';
signal q: std_logic_vector (2 downto 0);
begin
CLOCK:
process
begin
wait for 5 ns;
clk <= not clk;
if NOW > 100 ns then
wait;
end if;
end process;
DUT:
entity work.ctr3
port map (
input => input,
load => load,
reset => reset,
enable => enable,
clk => clk,
q => q
);
STIMULUS:
process
begin
wait for 6 ns;
input <= "001";
load <= '0';
reset <= '1';
enable <= '0';
wait for 10 ns;
reset <= '0';
wait for 10 ns;
enable <= '1';
wait for 30 ns;
load <= '1';
wait for 20 ns;
load <= '0';
enable <= '0';
wait;
end process;
end architecture;
demonstrates it elaborates and runs with functional results:
(clickable) |
H: per-charge cost to charge a battery bank at $0.10/kwhr
Am I forgetting my EE knowledge?
I have a 10400mAh battery bank at 3.8v so it's ~40kwhr?
$4 to charge once? assuming perfect charger efficiency and no power loss to heat
AI: No, just your SI prefixes. 10.4 Ah * 3.8 v = 40 Wh = 0.04 kWh = $0.004. |
H: How to make 1 bit permanent memory circuit?
I would like to make a simple circuit to store or save 1 bit of data. The circuit should be able to remember the state of an LED ( on or off ) even if the supply is disconnected from the circuit. I need it to work like a hard drive, flash memory or SD memory card of cell phones.
I made a circuit as shown in the picture, The output is an LED in series with 470 ohm resistor. I use two bush buttons to charge or discharge the capacitor so the output LED is on or off.
After disconnecting the supply or turning off electricity, The circuit was able to remember the state of the LED for few minutes.
After 2 or 3 minutes, the capacitor discharged completely and the circuit lost its data.
How can I stop the capacitor from discharging ? or how can I slow the rate of discharging so that the circuit lose its data after a week or more ?
In this circuit I uses 555 as an inverter ( not gate ) but I may use any other IC's , My aim is just making a simple permanent memory.
AI: The original electronic nonvolatile memory is based on ferrite cores. While it's relatively easy to magnetize such a core in one direction or the other to store a one or a zero, it takes some fairly sophisticated circuitry to read it back reliably.
Modern nonvolatile chips rely on charge storage, but in order to make this work, you need to be able to create a capacitor that has essentially zero leakage, and a way to read out that charge. This can only be done in the context of microelectronics, where the capacitor is a tiny piece of metal (the "floating gate") that's completely encased in glass (silicon dioxide), and is read out by means of its influence on a nearby transistor.
Another choice is ferrorelectric RAM (FRAM), which uses a special dielectric material that has two distinct, stable polarization states. Again, this only works in microelectronics.
Therefore, you need to pick some other physical phenomenon to store your bit of information. One obvious choice is the latching relay, which stores information in the physical position of its armature, which is held in either of two stable positions by a permanent magnet or a spring. The position can be changed by applying a relatively short pulse of current, and the readout is accomplished by attaching electrical contacts to the armature. |
H: What is the maximum power an inductor can transfer in a SMPS?
I'm trying to analyze a boost converter circuit. I have all the specs for the inductor used, including inductance (6.8uH) and saturation current (1A). This runs from a 3V supply. I'm wondering if there is a formula for the maximum power than an inductor with a certain inductance and saturation current can transfer when operated from a fixed supply voltage, regardless of at what frequency/duty cycle it is being driven? In other words, what is the theoretical maximum power of a boost converter using that particular inductor and running off of 3V?
The boost converter in this case is usually operating in discontinuous mode, but apparently may switch to continuous mode some of the time.
AI: With a fixed supply voltage and a fixed inductance and a known saturation current, you not only have the maximum energy that the coil can store:
$$E = 0.5 I_{sat}^2 L$$
but also how long it takes to charge the coil with that amount of energy:
$$t_{charge} = \frac{I_{sat} L}{V_{supply}}$$
The power transferred is equal to the energy per cycle divided by the cycle period, \$t_{charge} + t_{discharge}\$.
The discharge time depends on the output voltage, with higher voltages giving shorter times, but in any case, the total period cannot be shorter than \$t_{charge}\$, so this puts an upper limit on the maximum power transfer.
Continuous conduction mode does not change this; while it allows higher switching frequencies, the energy transferred per cycle is proportionally less. |
H: How do I use the on board oscillator?
I have the MAX II EPM240 CPLD Minimal Development Board which has an on-board 50 MHz oscillator. According to the "EPM240MAINBOARD Schematic Diagram" file, the output of the oscillator goes to PIN 63, but there is no PIN 63 on the board. How do I use it? What modifications should I make to my VHDL file to enable it? Thanks.
AI: This "minimal development board" is set up as a barebones breakout for the CPLD, the clock is already directly connected to the CPLD, its up to you to use that CLK in for your purposes
Most of the pins are wired directly to the MAXII, Pin 64 is the GCLK3 pin on the Max II
Pin 64 is seen on the left of the screenshot in component U1B (which is one bank of the CPLD pins) It is also connected to Pin 34 on Header P2 as seen in the screenshot below it.
To use it you have design your core to use PIN64 (using TQFP numbering) which is named IO_GLK3 in your CPLD definition |
H: How do I avoid interference in 433 MHZ RF transmission (in my case)
I suppose to do remote keyless entry (RKE) for door opening as a commercial product, there is DC motor which drive the door to open or close (receiver side), on transmitter side (remote) three button for 'OPEN' ,'CLOSE' and 'STOP'.
I'm new to RF, but I completed this project using a cheap 433 MHz transmitter and receiver model, and made compact size remote with that tx module, both tx and rx module is interfaced with ATmega88PA SMD package. For data processing I used the USART protocol for data transmission.
I'm using 3 V coin cell battery so it has a low range of transmission, but I overcome this with the antenna set, and now I'm getting the expected range (not bad).
The problem comes here: It is interfering with other 433 MHz. There is a water level controller in my company, and it will transmit data continuously for 30 min from the water tank to motor control room. During that time my receiver is not taking my signal since my remote is powered with 3 V, and that water level controller is powered with 9 V using HOLTECH encoder also.
So it's not good idea for selecting modules for commercial products. I want an RF IC for overcoming these problem. It should have its own protocol, since I wasted a month with these modules. It should be easy to configure.
AI: Changing the protocol will not help ! The water tank system is disturbing the 433 MHz band no matter what protocol you use. The protocol only determines HOW the data is transferred on the channel you're using. You still use the same channel so both systems will still disturb each other.
A solution could be to have your device on a different channel in the 433 MHz band. Here is a list of 433 MHz channels. Try to find out what channel each device uses, maybe they use the same channel maybe not. If they use the same channel maybe you can use a different channel for your device. You probably would have to buy a different transmitter then. Not sure how to determine what channel that transmitter will use. Maybe all cheap transmitters use the same channel.
Another solution will be to use a different frequency band. If the use of the 315 MHz band is allowed in your country (you must check !) you could get a receiver and transmitter at 315 MHz. This will be insensitive to 433 MHz so it will not be disturbed by the other 433 MHz signal. |
H: Is it safe to use PC analog output card as current source?
I have a very PCI analog output card which could output a voltage ranged from 0 to 5V. I need a circuit to output a current ranged from 10mA to 90mA. The load is about 45 Ohm.
So is it safe to connect directly the analog output to the load and change the voltage until we get the desire current? Will it burn the card if it is not correctly connected?
I am sorry that I don't have much experience in circuit building. But I read other article about using op-amp to control the output current by input voltage.
simulate this circuit – Schematic created using CircuitLab
I wonder if the above schematic is a correct setup to apply a current to a load? What's the advantage to the op amp for this purpose?
AI: Your circuit makes no sense - feedback resistor connected to some point half way along the op-amp is the problem but, even if it were connected to the output this would be a voltage buffer. If you want a ground referenced current source consider this: -
The voltage across R1 dictates the current thru the load (shown as a box with "current out" written in the middle. However, it is a little inconvenient to have current out controlled by the voltage across R1 and so people tend to make a positive rails referenced current source that feeds R1, then your input voltage (ground referenced) controls a ground referenced load with respect to current.
The circuit directly above controls a current from a ground referenced control voltage. Where it says Iload, this feds into R1 in the upper circuit and R3 is discarded.
There are plenty of different ideas for current sources as can be found here. |
H: How do I learn to design a 50Ω coaxial interconnection/interface?
I've designed an electronic load for testing power supplies (circuit and photo in this post: Designing a *linear* MOSFET driver stage).
The load can be controlled (programmed) using an arbitrary waveform from a function generator; a typical example would be using a 100mV square wave to test the small-signal step response of the power supply, although large steps, ramps and other wave forms are interesting too.
I used a panel-mount BNC connector to provide the function generator interface, wiring it to the circuit board with a few inches of 24 AWG twisted pair taken from a CAT-5 cable. I connect it to the function generator with a standard Pomona 2249-C-36 RG 58 C/U coax cable.
The external programming seems to work just fine, but I undertook the project for the sake of motivating my learning, so I want to proceed now to study how this aspect would be done by a practicing engineer and learn about the general realm of cable interface design or whatever it's called.
And that brings us to my question: "How do I find the learning resources I need to study this topic?"
A good start would be knowing what the topic is called :) I found some questions that talked about transmission theory, but searches on that term seem to be focused on high-voltage power transmission. I also consulted my trusty copy of The Art of Electronics, but this topic doesn't seem to be included.
How can I bootstrap myself on this? I vaguely expect I should be adding a 50Ω resistor in there to match impedance, but wonder if maybe running coax with high impedance on both sides is fine too, since my oscilloscope and function generator both seem to do that by default and they use BNC-terminated coax. Also I wonder if twisted pair is appropriate or if maybe I'm introducing some possible quirks in the signal (although I don't think I can see any).
AI: Have you read Wikipedia: Impedance matching and particularly the part about transmission lines ?
An example of a transmission line is the RG58 coaxial cable you mention. The confusion start with the fact that this cable is a transmission line with a characteristic impedance of 50 ohms. Yet when you measure it with your multimeter, there's no 50 ohms to be measured ! It either open (between core and shield) or a near short (couple of ohms, depending on how long the cable is) between both ends of the core and both ends of the shield. Where's that 50 ohms ???
Well, if you would like to transport signals over this cable this is where the 50 ohms comes in. Only if you apply the signal from a source with a 50 ohms source impedance and at the other end terminate the cable with 50 ohms to ground, will you be able to transfer the signal properly ! If you omit either of the 50 ohms resistors the signal will reflect and disturb itself. The value of 50 ohms is a property of the cable, an RG 58 cable needs 50 ohms. There are also cables that need 75 ohms or 600 ohms.
Transmission lines is a subject that is not so much a part of "transistor electronics" so that's why it's not mentioned in The Art of Electronics. If you search for books on RF-design then for sure you will find books on this subject.
Note that many RF-design books are on RF-IC design, most of these do not include information on transmission lines (except for on-chip transmission lines maybe). |
H: How to measure resistance of resistor in PCB?
I have a resistor 1MOhm soldered in a PCB that looks like that
And the schematic is looking like that:
When I measure the resistance by touching the a multimeter on the two ends of the resistor the measured value is around 500KOhm. When the resistor is not soldered the value is the correct one 1MOhm measured by the same multimeter in the same way. Why is that and what is the resistance value seen from the resistor "input"?
If we make the equivalent circuit of the measurement it looks like that, doens't it?:
simulate this circuit – Schematic created using CircuitLab
AI: If the resistor is placed in a circuit. Then you'll measure the
equivalent resistance value of the resistor parallel with the rest of
the connected circuit. Just like here every component has it's own static or dynamic
resistance, a diode, transistor, ic... If you now measure the
resistance of a component none of them will show it's own resistance
but only the circuit resistance.
It can also be that you've made a bad
soldering connection and short the other end also to the
ground-plane.
Another option is maybe a residue of soldering flux around your
component shorting it's terminals. You can remove this with a cotton-tip and the right product.
If you can upload the whole schematic and provide a picture of your
soldering connection, maybe we can help you better. |
H: Powering a LED off a 1,2 volt rechargeable battery
I would like to power a LED off a 1,2 volt rechargeable battery,850mAh,energizer without any resistors.Since the LED has a forward voltage around 2 volts,working fine when connected to a 1,5 volt alakaline AA battery,it's obvious that the voltage isn't a problem.However,I am not so sure about the current.Would the LED be fried if I connected it to this battery?
AI: Would the LED be fried if I connected it to this battery?
Depends on two factors. The Battery's Internal Equivalent Series Resistance, and the IV Curve of the LED. The 2V stated Forward Voltage of the LEDis likely at 20mA, the typical Forward Current for the stated expected life of the LED.
At 1.2V fully charged, the LED likely won't be damaged, but the brightness will be considerably dimmer than it would be at a voltage and current close to 2V @ 20mA.
For example, super cheap led flashlights are composed of an Led (Lets say Blue at 3.4V) and a 3V Coin Cell Battery (CR2032). The Battery's lower voltage and high ESR (about 20 Ohms) allow the LED to be nice and bright without needing a resistor.
Frankly, just sacrifice an LED in the name of scientific experimentation, and try it. If it blows, you know you need a resistor. If it doesn't, you are all good*. A quick test of a red LED and a brand new 1.5V AA Alkaline battery shows it working. How long the LED would last like would take long term experimentation to know. |
H: Common Serial Port Issues
What are some of reasons that PC terminal receives garbage characters from one microcontroller?
I am using BeagleBone and UART works okay, but after few transmitted command characters from PC terminal to microcontroller, PC terminal starts to receive weird characters while I am trying to send those char commands? What can be the problem?
UART won't work properly for some time, but after few minutes it starts again to work and respond to char commands.
Bauds are same on both sides.
UART acts the same on every PC terminal software.
AI: Common issues that came immediately to mind:
Ground connection: you need a shared ground to get a usable communication, this gives very weird issues like the ones you describe
Unstable clock on either side: as UART has no clock sharing mechanism the clock must be fairly well defined and may not drift much. If you are running from an internal RC oscillator this might be a problem. Better use a resonator or oscillator.
Wrong signal levels: Make sure both sides are working with the same signal levels and you are not trying to feed a TTL signal to a RS232 port.
Polarity setting: define inactive high/low on both sides the same (normally you won't get anything useful if this is wrong)
Correct communication parameters otherwise: baudrate, number of bits, parity, number of stopbits, flowcontrol
RX / TX mixed up: Often the signals are called RX and TX for receive and transmit. It also often happens to just connect RX to RX, but it should be RX to TX (receive on one end is transmit on the other) (can also happen the other way round, depending on how people look at it, it's a mess) |
H: In the given circuit of a regulated power supply, why is error computed twice, i.e., before and after isolation?
Circuit Operation
\$R_4\$ and \$R_5\$ constitute the potential divider which is fed to the error amplifier \$A_1\$. The reference voltage is generated by the Zener diode \$Z_1\$. The error signal is fed to the controller using an opto-coupler. The + and - in the controller indicates the corresponding terminals of the error amplifier inside the PWM IC.
Question
Why does this circuit compute error twice?
AI: It doesn't. A1 at the secondary side computes the error, and transfers it to the primary side using the optocoupler, which is used to pull the Vref lower, to decrease the activity of the PWM circuit, which closes the loop. At the primary side, there is no comparing to any reference volatge, and the operation (coupling factor) of the optocouple is so variable that it would not make sense anyway.
What might confuse you is that OC1 interfaces to the PWM circuit via its Vref output. This is just a way of gradually shutting down the PWM circuit. |
H: AVR SPI shift register not clocking
I'm trying to generate parallel output by writing serial data into a shift register (SN74HC595) via SPI on an ATMega328 (SPI master) running at 20MHz and SPI running at 10MHz. The bare minimum schematic to reproduce my issue is below (VCC = 5V).
The code generates the correct waveforms as viewed on an oscilloscope but the SN74HC595 does not appear to be clocking, or is interpreting the data differently to how I expect.
I have observed that the serial output QH' is always a logic 1, and so are the parallel outputs QA through QH.
I have reduced the problem to the following bare minimum code which configures SPI in master mode, MSB-first, and SCK = \$f_{osc} / 2\$:
#include <avr/io.h>
volatile uint8_t counter = 0;
int main(void)
{
DDRB = (1 << PINB3) | (1 << PINB5) | (1 << PINB1);
SPCR = (1 << SPE) | (1 << MSTR);
SPSR = (1 << SPI2X);
while(1)
{
PORTB &= ~(1 << PINB1); //pull SS low
SPDR = counter++;
while(!(SPSR & (1 << SPIF)))
{
;//Busy wait
}
PORTB |= 1 << PINB1; //pull SS high
}
}
This generates the waveforms SRCLK (yellow), SER (cyan), and RCLK (magenta). The oscilloscope correctly decodes the data as a sequence of ascending bytes so the SPI transmission appears to be working correctly.
Further detail of a single byte transmission is shown in the following screen capture. Note the clock period of SRCLK is 100ns, which matches the SPI clock rate of 10MHz. Also note that RCLK (not shown here) is held low for 200ns between successive writes and high for 1600ns during each write.
I have tried:
Increased decoupling
Reduced clock rate - both system clock and SPI clock
Swapping another SN74HC595
Reversing pull-ups/downs on the active-low pins OE and SRCLR in case I have confused the two pins
I don't appear to be exceeding the timing requirements of the SN74HC595 and the behaviour is the same if the CKDIV8 fuse is programmed to 1. The SPIEN fuse is also set to 1.
What are some possible reasons for this behaviour?
Interesting note: if I bit-bang the same interface, the shift register operates as expected - though the performance is obviously not great.
AI: SRCLK and RCLK are reversed.
It's not shown in the schematic but the two pins have been reversed in my prototype - despite countless checking for the correct connections. Funny how you only figure these things out after you've asked for help. |
H: Reading a 32bit IC counter on from a computer
I am working on a design to count the mechanical cycles of a piece of equipment. It has to be a 32 bit counter and be robust. I have a working prototype using a sn74lv8154 IC, configured as 32bit.
There are 2 main issues with the design
1. Reading the count
2. Losing the count
Reading the count
For testing and prototyping purposes I have used an Arduino to access the 4 byte registers, and display the count value on a lcd screen. However, the Arduino is proving to not be robust enough. Ideally I would like to read the count data using a laptop, but I have no experience directly interfacing a PC with an IC. Someone has suggested HyperTerminal, but again, I have no experience at all with this.
The prototype uses a battery to power the device. If the battery runs flat or is disconnected the count value is lost. This is a major problem, a solution using a non-volatile counting IC would be preferable but I have not been able to find one from searching. I came across a solution using EEPROMS configured to work as EPROMS. This had potential, but I faced the same issue as problem 1, as well as using a lot of space on a circuit board.
I am keen to find solutions to these problems, so please let me know if this question is too vague!! I can provide dropbox links to the Arduino code or circuit schematic if this is useful (and allowed!) I didn't want to violate terms of use accidentally.
update:
Thank you all for your answers and help.
I will go forward with embedding an Arduino Nano into the mechanism for the next prototype.
The reliability issues are currently being caused because the Arduino Uno and screen are in the form of a handheld reader, rather than inside the mechanism. This was bought before I started on this project http://hobbycomponents.com/boards/269-uno-enclosure-kit-r3-revision-3-arduino-compatible-uno-1602-serial-lcd-module-and-case
I agree that this can be solved with a micro approach rather than with counter ICs
AI: Use Arudino Nano with USB that emulates a serial port would be perfect for that.
For the laptop app download Visual Studio Express for free and use their serial port module.
Watch the youtube video on how to write a simple C++ application in VS that uses the serial port. |
H: How can a high-voltage transistor be in such small packaging?
For example:
STN0214 - Very high voltage NPN power transistor
It is said to accept more than 1 kV between its collector and emitter. It comes in a SOT-223 package (3 pins plus a tab). With a dielectric strength of 1 kV/mm for humid air, cannot an arc appear between the electrodes?
Or do you have to enclose the package in glue or other material with higher dielectric strength than air?
AI: Hmm, it does seem tight. The pin pitch is 2.3 mm, and the maximum pin width is .85 mm, leaving 1.45 mm minimum space between pins. The transistor is specified for 1.4 kV C-E, which are on adjacent pins, so that's just about 1 kV/mm. As I said, that seems tight, and you'd have to be careful in designing the PCB footprint to not make this worse.
Usually I make PCB pads a little wider than the pins, but in this case I wouldn't. Even if you make the pads the same width as the pins, then any alignment error cuts into the spacing.
Overall, I'd prefer a larger package with more space between pins to get somewhat below 1 kV/mm. |
H: Saleae analyzer problem
I have a SPI protocol and i can't analyze it. The at the beginning there is starting transition from 0 to 1 of the clock signal. The analyzer is treating this transition as information and analyzes from that point. But it is just a hardware clock transition on the power on. It carries no information.
How could i solve that problem. My version is Saleae Logic 1.1.15
AI: Update to version 1.1.34, then place a time marker where you want the protocol to start being analyzed, the in the Analyzers section click on the gear button and hit "Re-run starting at timing marker..." and it reanalyzes the data starting from the marker... Hope this helps |
H: Energy in active noise cancellation
In an active noise cancellation system, to what form of energy is noise converted and how is the energy produced?
AI: Active noise cancellation works by generating a sound with 180 degree phase shift from the original sound. It's effectively an interference effect.
Like any interference effect, it doesn't produce cancellation everywhere. If the phase shift is 180 degrees at one location, it will be 0 degrees at some other location, resulting in a greater sound intensity there. So it doesn't convert the energy to another form, it just moves sound energy from one location to another. |
H: Noobie is trying to match a solar power bank and a wireless camera
my dear friends all around the world!
I'm very interesting about this cool solar power thing, and I really want to start connecting all of my stuff to panels and so.
But for my first and ,hopefully, successful try, I will simply use a simple (apparently not so simple for me, otherwise I wouldn't be here..) solar power bank. No need for charger regulators and other exciting things that might burn down my roof top..
The solar power bank is 20Ah (but I don't know how much watt per hour. The nice seller hasn't replied me yet) -
http://goo.gl/0svXM6
The camera is 12v/2A and 6-7W, and have to work 24*7 -
http://goo.gl/MKM0yR
That is the question.
I really appreciate your kindly help. A lot.
Thanks,
Roni
Note:
I really did tried to understand it by myself, but I still have doubts (and those items aren't cheap at all when buying bulks of them as need to). I'm a programmer, so I did have a few lessons in electronics. 10 years ago..
Few of the posts here that help me the most -
Solar panel & battery math verification
Solar panel and 120mm Computer fan
Why isn't the solar panel charging the battery?
Battery recharging via solar panel
AI: First thing is to match a solar panel to the load.
You need 7 W, but your panel should be rated for much more, because the average solar energy per day (taking into account the night, clouds and seasons) is a small fraction of the peak power; in the winter in high latitudes you might get 10 to 20 times less. In that case you're looking at a solar panel rated around 100-150 W. If you're restricting yourself to the summer time in bright climates you'd need around 30 W.
The solar panel in the item you posted is said to be 1.5 V, 150 mA. If that's correct, then it can only produce 0.2 W. That is 10-100x too little. No matter what kind of battery is inside, it will never be able to recharge.
Once you have a suitable panel you can start to think about the battery size you need to get you through the night and the cloudiest days. Your camera is a 12V system, which is good because you can buy parts meant for 12V off-grid systems, eg. a solar charge regulator and a battery. |
H: Raspberry Pi 2 vs STM32f429I Discovery?
I couldn't really figure out this issue. Raspberry Pi 2 has 1GB of RAM, 900 Mhz Quad Core ARM Cortex-A7 processor and so on. On the other side we have Cortex-4 processor 256Kb RAM. Other peripherals also points to Raspberry pi. However they have almost the same price.
Please do not judge me, because I think I am missing some point here and I think there is a reason it is so. Can someone enlighten me in this topic please?
AI: RPi is a full-featured, ready-to-use product. It is mass-produced and used widely mostly by individuals. Contrary, Discovery boards , as many of other evaluation boards are development tools used, as named, for evaluation of a specific technology in order to make another product, potentially with much lower cost. Being a tool, it is produced in much lower volumes and targeting mostly companies rather than individuals. So the volume and the target consumers are the factors setting the price. |
H: What's the difference between PWM and VPW?
What's the difference between pulse-width modulation (PWM) and variable pulse width (VPW)?
AI: The word 'width' in Pulse Width Modulation is a bit misleading. PWM actually encodes an analog value as the ratio of High or On time ('pulse width') to the total period of a rectangular waveform.
VPW is another name for Pulse Length or Pulse Duration Modulation (PDM). It encodes an analog value in the absolute width of the pulse. The period between pulses is unimportant.
PDM is used in RC servos, which typically respond to a pulse width varying from 1 to 2ms. The nominal repetition frequency is 50Hz (20ms between pulses) but most servos will work between 40~70Hz - and some go up to almost 500Hz (the theoretical maximum repetition frequency of a 2ms pulse). |
H: Does PWM affect current?
How does PWM affect current? Since current is dependent on voltage (higher voltage allows for more current) decreasing analogue voltage reduces current, but what about PWM? If the actual voltage is only full/none, is the current also full/none or what?
AI: The current at any instant will be either full or none, but the average current over one cycle of PWM will depend on the pulse width.
If the pulse is high for 25% of the PWM cycle, the average current during that cycle will be 25% of the maximum ("full") current. |
H: Circuit to remove dc and extract AC signal
I just started working in the Power Electronics domain and I am learning and understanding the concepts of electrical and electronic circuits.
Attached is the circuit diagram I am trying to understand and design.
At the Point_of_Interest, I want a circuit that extracts the AC signal (Sinusoidal 50V 60Hz in this case). Is it possible to design such a circuit? If so, can anyone please suggest me how to extract this signal?
Thanks.
AI: you can use a coupling capacitor or a high pass filter
The capacitor will block the DC but AC will pass. |
H: Why don't LiPo charger chips isolate the output during shutdown?
From what I've gathered, boost regulators from MCP1640 to TPS61090 disconnect the load during shutdown so that the battery is not drained during shutdown.
However, charger chips like BQ24295 don't seem to isolate the output during shutdown (at least I can't find it on the datasheet). If my reading is correct, why is the output not isolated? Don't charger chips face the same issue on this front as boost regulators do? It shouldn't be difficult to incorporate some shutdown logic.
Thanks
AI: If I'm reading the BQ24295 datasheet correctly, it can actually isolate the load from the battery. It does this using an internal switch BATFET, which can be commanded through I2C to turn off (see section 8.3.1.2.1 in the datasheet).
(snippet from the functional diagram on p.14)
p.s. BQ24295 is a curious beast, because it can create a 5V supply for USB OTG from a single cell. |
H: Is there a software program that calculates the Transfer Function for a given circuit?
I'm asking for a program (either freeware or not) where you can draw your circuit as the input, as it happens in PSPice, Multisim, LTSpice etc.., then specify two nodes of reference, say \$ V_{out} \$ and \$V_{in}\$, or \$V_1\$ and \$I_2\$ and then the program outputs the transfer function e.g. \$ V_{out}(s)/V_{in}(s) \$ (preferably in the s-plane), or some impedance function \$V_{in}(s)/I_{in}(s)\$ or any function accordingly. In my opinion this would be the perfect program to check your circuit analysis on the s-plane.
For example if you draw this Sallen-key circuit in the following picture
and specify your nodes of reference \$ V_{out} \$ and \$V_{in}\$, it will output the transfer function above (in terms of the circuit components not the values they have, just like in the picture). Thanks in advance.
AI: If you're looking for software that gives you the symbolic (i.e. formula) result, none of those mentioned in the comments can do that, as far as I know. What you're looking for is called a symbolic (as opposed to numerical) circuit analysis software.
In practical terms, there's free, education-oriented piece of software which does it, well there's two of them in fact
the original SapWin, free but not open source
and the open source variant/successor/reimplementation QSapecNG
Both have usability/interface quirks but are basically usable and save time in some cases of more complex non-standard networks.
There's also a non-free Mathematica plugin called Analog Insydes which can do this and is the Cadillac version basically because it can make use of Mathematica's formula simplification engine etc., which helps in some more hairy cases; they have a 30-day demo version freely available.
The list above in non-exhaustive, but stuff I've used occasionally and know to work. Besides those, supposedly TINA v10 (this is not the v9 free TI version) can do it too but I've not tried it. Also Syrup for Maple is a free add-on but not terribly well maintained. MATLAB by itself has no built-in function for this as far as I know; well, I found a free add-on for it called SCAM just now, but I haven't tried it. |
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