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H: What are the jitter characteristics of PLLs internal to Stratix V FPGAs?
I am interested in knowing the deterministic and random jitter characteristics of PLLs internal to Stratix V FPGAs. I have looked through the Stratix V handbook but could not find numbers quantifying the jitter of their PLLs.
What are the jitter characteristics of PLLs in Stratix V FPGAs?
AI: Found it! See page 38 of this document. |
H: Reducing voltage using a resistor
I want to know how to reduce an AC voltage of 175 V to 110 V using a resistor. The device I am using is 200 Watts, 110 V but the voltage from the source is 175 V. What value of resistor should I use to shed about 60 volts AC?
AI: Assuming your device is resistive (which might not be the case) and really draws 200 W (note that the type plate often states the maximum power drawn, which might not be the same) your device draws 200 W / 110 V = 1.8 A. The resistor must hence be 60 V / 1.8 A = 22 Ohm.
But here comes the catch: it must be able to dissipate 1.8 A * 60 V = 108 Watt!!
Your best approximation might be to use one or more 60V light bulbs, totaling ~ 108 Watt.
That was the literal answer, the more appropriate answer is: what is this for, do you really want to dissipate away 106 W in a resistor? |
H: Will this relay handle my current and voltage requirements?
I have this relay: SONGLE SRA-24vdc-cl
I want to use it to run 240V 11A device.
I can see in the datasheet it can be up to 20A (section 7, line 4-5), but the relay is so small and its legs so thin, so I am asking here before connecting it.
The 240V device should operate for 1 - 1.5 hours with 11 - 12A.
The coil is 24VDC, which I will use MOSFET to give it power (I have 300mA 24VDC adapter), and the gate will be connected to AVR MCU.
AI: This relay is inappropriate for what you want to do. You need to actually read the datasheet. In the middle of the first page for #4, RATING, it clearly says 125 VAC. Therefore 240 V is well out of spec.
What part of this is so confusing?
As for the current rating, if it says it's good for 20 A, then you can run 20 A thru it. 11 A would be fine, if you weren't violating other specs. |
H: Circuit analysis?
So far I've learned these circuit analysis techniques for:
Tellegen's Theorem
Using only KCL
Using only KVL
Solving a system of equations that consist of all KCL equations and all KVL equations
Nodal Analysis
Superposition
Mesh Analysis
When do these techniques allow you to completely analyze a circuit? Please note, I'm not asking when I should to use each technique. I'm asking what conditions must the circuit fulfill for a technique to allow me to solve the circuit. For instance, I noticed that in some circuits only using KCL is enough to solve for everything but in other circuits using only KCL doesn't allow you to completely analyze the circuit.
I've only done resistive circuits so far.
Circuit that can't be solved using only KCL:
because using KCL at the nodes gives:
which are three linearly independent equations with 5 variables, so can't be solved.
AI: "Superposition" is not a method for solving a circuit. It is a part of the other methods that is used when multiple sources are present in the circuit.
"Tellegen's Theorem", although I don't recall it from school, doesn't seem to produce a practical method of solving circuits since it only produces one equation for the circuit (according to a quick scan of Wikipedia). However I'd be glad to corrected on this point --- its not something you run into often in the real world.
Nodal analysis can not solve a circuit that contains a voltage source.
Mesh analysis can not solve a circuit that contains a current source.
If you want to solve a network that contains both voltage sources and current sources, you will need the modified nodal analysis. Using duality you could also imagine a "modified mesh analysis", however this method is not commonly used. The modified nodal analysis is the most commonly used method of solving circuits because it is easier to set up the equations for a computer.
Edit
You clarified,
"just KCL", I mean not using Ohm's Law to rewrite the equations in terms of voltages. Instead, keeping the equations in terms of currents and solving the equations for the currents.
Just the KCL and/or KVL equations are not sufficient to solve any circuit. These equations can be written simply from the topology of the circuit and take no account of what kind of elements are on each branch. For example they don't make any distinction between a branch being a resistor or a voltage source or a current source. You will always need to also include the characteristic equations for the elements on the branches to fully describe a circuit. |
H: What is a Charge?
I'm a high school student. I love computers and electronics. Few weeks ago, I thought to build my own electronic gadget but, unfortunately I had not much knowledge in electronics. So, I decided to learn. After Googling here and there, I came across a large amount of information. Nothing, except one thing, that daunts and intimidates me is that what the term Charge means? None of the books tell what it means. Some tell that it is the basic property of the matter and just it and don't define further about it. Whereas some don't even bother to tell about it. On Wikipedia it is defined as:
Electric charge is the physical property of matter that causes it to experience a force when close to other electrically charged matter.
The definition is quite bit difficult and confusing. Similarly from All About Circuits Website tutorials I got a different type of definition and understanding.
From books, I came to know that we still don't know much about charges even great scientists like Sir Stephen Hawking doesn't known much about it. Is it correct?
If not, then why was it written in the books (I mean here books not a book), what is its correct definition? Why majority of books don't define what charges is/are?
AI: Like Ali said, charge is a property (or characteristic or feature) of a particle. The particle could be an atom, or it could just be a part of an atom like an electron or a proton.
Unfortunately, we can't really say much about why particles have this property, or what causes this property to exist. We can only describe some things we observe about this property that we call charge.
Charge comes in two types, which we arbitrarily label as "positive" and "negative".
Positive charges repel each other with a force that we can measure, negative charges repel each other similarly, and opposite charges attract each other.
We find that there are components of atoms called "protons" and "electrons" that are always positively and negatively charged, respectively.
Charge is conserved. That means, in all the experiments we have tried, the difference between the amount of positive and negative charge in a closed system is the same at the end of the experiment as it was at the beginning of the experiment, and we therefore believe this is true of all closed systems in the universe.
Even though we don't know what charge is or where it originally comes from, the description of what it does is enough for us to predict lots of useful things and make lots of useful tools like radios and computers. |
H: How multimeters measure current in this circuit?
simulate this circuit – Schematic created using CircuitLab
In the circuit shown if current is flowing from negative side of battery to positive side
how multimeter can know the existence of resistor before electrons in wire hits the resistor?
I mean how multimeter measures current before it reaches the resistor? How it knows that a resistor exists?
AI: The meter is only measuring the amount of charge per unit time that is passing through its internal shunt resistance. It doesn't know or care that there is a resistor in the way.
Your resistor is just limiting the current (charge/second) that the voltage source can "push" through the meter. Think of a water meter measuring water flow. If you put a kink in the hose upstream, the water flow slows down and the meter measures less flow. |
H: Can I determine if my Electro magnetic field (EMF) measuring device is in very close proximity to the source of EMF?
I am trying to solve a problem of identifying programmatically if I (or my measuring device) is in very close proximity to an EMF source.
The situation is, I have an EMF emitting source (sorry if I got the terminology wrong, I am not a physics student) and I also have a device which can measure the EMF in milli Gaus.
The device gives the value of EMF in x, y and z direction and also the total EMF (don't know how it gets this value).
Based on this setting, I am trying to figure out if I can find if my measuring device is in close proximity of the EMF source. By proximity, I mean lower than some preset distance from the source. So a distance measure would be useful. My questions are
Is there a way to know if I am close to the source by getting a measure of the EMF values from my measuring device?
Given that there is lot of interference, what is the best way to tag a set of EMF values for the source so that I can detect when I can (programmatically) determine if I am in close proximity of the device?
AI: I think what you are asking is "How can I improve my emitter so I can detect it unambiguously in the presence of background noise or interference"?
Ok, so your detector is a magnetic flux density measuring device hence it produces an output in gauss (these days magnetic flux density is measured in teslas or webers per sq metre). I am also presuming your source is something that is either a permanent magnet or something like a coil of wire excited with an AC signal.
If it's a permanent magnet I can't help you but if it is a coil of wire and it is producing an alternating magnetic field then it is detectable by using another coil and measuring the induced voltage. To avoid interference you can resonant tune the receiver coil to be mainly responsive to the frequency produced by the emitter. I don't think your sensor will help you in this respect - I'd use a coil of wire - It all depends what is more important to you; using your sensor or getting good results by a better technique.
So if you have a "send" coil and a "receive" coil, the basic maths is like this: -
Looking at the transmitter, if the distance from the loop/coil is small (Z a lot less than R) the flux density (B) is nearly constant but, as distance increases B reduces as the cube-root of Z.
On the receiver side, and assuming the received flux is constant across its area (not really too much of an approximation beyond certain distances), the induced voltage is proportional to the area of the loop, the peak flux density and the frequency of excitation.
Basic conclusion - up close the flux density can be almost constant and hence the induced voltage won't change too much but, further away you can use the induced voltage level to determine the distance. |
H: Mysterious voltage drop then slows climbs back up when powered off
Ive built a simple circuit on some strip board, just a motor and a micro controller and LED and powered by 6 AAA batteries. The motor takes its power straight from the battery and the micro and LED go through a 5V LDO. I also have a slide switch to turn off the power.
The problem is when the power is turned on the voltage I measure across the batteries drop at a steady rate, about 0.01V a second, if I turn the switch off the voltage jumps up and also starts to climb back up to the real voltage across of the batteries. If I wait long enough the voltage is back to the real voltage of the batteries. If I switch it on the process starts again.
Will there is enough voltage for the LDO the circuit works perfectly so im sure there isnt a short, and from what I can see there isnt a short anywhere. Nothing is getting hot at all either. Im not quite sure what to look for or what it could be..
AI: That's how batteries work. As you draw current from them, you deplete the chemical reactants near the plates, and it takes time for new reactants to take their place. This creates a gradient in the reactant concentration within the volume of the battery.
The terminal voltage is a function of both the reactant concentration at the plates and the voltage drop across the internal resistance of the battery (which rises a bit with reactant depletion). If you let it run long enough, the terminal voltage should stabilize at some lower value, although the overall depletion of the battery will eventually become a factor.
When you switch off, the voltage drop across the internal resistance disappears immediately, but it takes some time for the reactant concentration gradient to disappear, which is why you see the sudden jump up followed by the slow recovery to the original terminal voltage. |
H: High-Sensitivity, Low-Latency Imaging Sensor
This might be a bit of a long shot for this venue, but: I'm looking into sensors for a scientific imaging application where the key is excellent sensitivity (quantum efficiency and noise performance) combined with low readout latency.
I don't need a lot of pixels, something like 64x8 or even a 32x1 line sensor would be just fine. However, readout of these pixels must be quick, not in terms of frame rate (throughput), but in terms of latency. Ideally, the readout latency would be well below 100 µs, so that together with an exposure time on the order of 50 µs, I'd get the result within less than 100 µs of the trigger event (on a custom FPGA board, so the exact interface does not really matter). Also, the short exposure times, compared with the fact that the observed process is rather faint in intensity, necessitate a very good sensitivity.
Traditionally, photo-multiplier tubes would be used for detecting the process, but my goal is (spatially resolved) imaging instead of just counting photons. For this, electron-multiplying CCDs (EMCCDs) seem to be an interesting option.
To give you an idea what this is all about, take a look at Andor's iXon 897 Ultra camera. It would be a near perfect match for the application, if it was not for the long readout latency of >500 µs. The main cause the long latency seems to be the fact that the CCD operates in frame-transfer mode, so that even if only a small region of the camera's 512x512 sensor is used, the image still has to be shifted through the whole storage area.
Are there EMCCD sensors that do not use a frame transfer setup? Or sensors in an oblong/line shape? The target application uses wavelengths just below 400 nm, so good quantum efficiency on the short end of the spectrum would be necessary, even though latency is the key factor. Whether it is a finished camera product or a bare sensor is ultimately not that important, as throwing together some readout electronics for this specific application would be doable.
Another product I stumbled upon is the FirstLight OCAM² camera. It seems to use a custom EMCCD sensor design manufactured by e2v with several readout stages to reach a latency of under 60 µs. However, the used sensor only has a very mediocre quantum efficiency in the near-UV, and while the website mentions that custom developments are possible, custom-ordering a sensor might be prohibitively expensive.
I still think that I'm missing a much more obvious solution, though.
AI: The optical SETI project at Harvard uses multi-pixel PM tubes (64 pixels per tube, 16 tubes total) from Hamamatsu. Would these be suitable for your project? |
H: What does FCY / F_CY stand for?
I've come across many equations in microchip datasheets that are based on this value and am looking for a central place to lookup definitions.
F_OSC = oscillator frequency
T_CY = 1 / F_CY = time to execute one assembly instruction?
AI: Microchip has a glossary here. "FOSC" is listed, as well as "TCY" ("The time for an instruction to complete."). |
H: Reduce voltage on PSU from 52V to 12V
I'm building a mining rig and is planning on using a ESP120 HP 3kW 52V power supply. I've seen someone get it down to 48V with this mod, but I wonder some one got it down to 12V? Or is it not possible?
AI: You would be better off to distribute the 48V-52V to the motherboards individually (about 3A per wire), and use a point-of-load DC-DC converter (there are many available commercially, and they aren't all that expensive) on each one to produce the 12V @ @13A that the motherboard needs.
This not only reduces the wiring losses, it also makes it easier to work on one motherboard at a time without shutting down the entire farm. |
H: Can an electrostatic loudspeaker be considered as a capacitor?
A basic capacitor works as two parallel plates carrying opposite charges and have an electrostatic force holding the charges in place (without making any contact); can't an electrostatic loudspeaker be considered a capacitor since it works by having a charged diaphragm between two plates of opposite charge?
AI: Yes, an electrostatic speaker is a capacitor. From the Wikipedia article "Electrostatic loudspeaker":
The electrostatic construction is in effect a capacitor, and current
is only needed to charge the capacitance created by the diaphragm and
the stator plates
There are, as you might expect, microphones that are essentially capacitors too. |
H: Detect Arduino power failure and save data
Prologue
On an Arduino Mega, I need to save data into the EEPROM (about 40 bytes) in case of power failure. The data is constantly changing (steppers position, speed, etc), but since the EEPROM has limited write cycles, the data needs to be written only when a power drop is detected, so periodic writes in the main loop or on a timer are out of the question.
The setup
Arduino Mega 2560 board
PC supply (from a Dell), using its 12V rail
Arduino inputs:
A lot of buttons / microswitches (each with 10K pulldown resistors)
IR receiver
Arduino outputs:
2 stepper driver outputs
3 LEDs
serial connection to graphic LCD (powered externally)
Other components powered from the same 12V PSU rail (besides the Arduino board):
6V (~220mA max) graphic LCD (fed through a L7806 regulator)
12V (0.65A) 120mm fan
Possible solution
I don't know too much about electronics, I've just learned about what a voltage divider is, so please bare with what I'm about to say.
Normally, a supercapacitor would be needed as a backup for when the power goes down, but I'm thinking it's not needed as the PSU already has them and it takes 1-2 seconds to discharge when swithed off, even with a 12V fan running off of the PSU. We'll assume the maximum 2 seconds scenario, implying the PSU being switched on for at least a few minutes for the caps to be fully charged.
As a voltage drop detection mechanism, I thought of a voltage divider with 2 resistors, in parallel with the Arduino VIN supply (meaning totally separate, non-dependent circuit), with the divider output going to an Arduino analog pin. The input from the PSU being Vin=12V, I would choose the 2 resistors values R1=10K and R2=5K. That would mean a max 0.4mA for the pin and would be well below the recommended 20mA sinking current an Arduino pin supports. A 1:2 ratio for the resistors would then give a Vin/Vout=1/3 ratio, and that means a Vout=4V maximum going to the analog pin. Reading the pin value, with the Arduino voltage reference to the default 5V, the "normal" value would be around 819 (on the 0-1023 analog scale).
The accepted voltage for the VIN pin on the Arduino Mega is 7-12V as recommended in the specs, but, as reading on the forums, the actual minimum voltage for the Mega VIN is around 6V. The Mega has a lower dropout 5V voltage regulator than other boards, with the dropout of around 1V. In case of power failure, the voltage from the PSU would drop slowly (in 1-2 seconds) from 12V to 6V when the Arduino wouldn't be supplied and it would shutdown. Divider Vout = 6V / 3 = 2V, so I should save the data when the analog value read would be somewhere between 819 and 410, but enough above 410 so that there would be plenty time for saving about 40 bytes of data (EEPROM writes are slow - I should look into the exact timings, but I think the full write wouldn't take more than 100ms).
[UPDATE] It takes 3.3ms/write. But to increase EEPROM life-span, I don't write the full chunk at once but do byte-by-byte updates and write only if the byte value differs, so it would be max ~130ms for writing 40 bytes (if all 40 actually changed), plus whatever time is needed for reading them.
Also, to make things by the book and fast enough, instead of constantly polling the analog pin (as analog readings are slow and an overhead), the analog read should be interrupt driven, on a CHANGE trigger.
Questions
Are the above solution and statements correct? Are the resistor values for the divider chosen correctly? Do you have any suggestions?
Would powering the Arduino by USB a) along with VIN b) alone (USB only) interfere with the voltage dropout reading on the analog pin?
An even better solution would be a FALLING triggered interrupt (HIGH to LOW), but the external hardware should include something more besides a voltage divider. A diode maybe? What kind / parameters?
.
Note: I know I should have powered the Arduino through the power connector and not the VIN pin, as the connector features reverse current protection diodes, but for this project I built a shield holding external connectors and it made sense to also feed the board using the VIN pin. I took care not to reverse the input while testing and the power connector is one way only so as to avoid eventual mistakes.
UPDATE
Thank you for all the suggestions, but I would still like to go the voltage divider way. I particularly like this approach because it's non-intrusive - basically it's just another sensor on the Arduino, powered from the same supply, but not interfering / getting between the Arduino and power supply.
AI: A simple battery backup IC will do what you want.
Essentially, a comparator samples two voltage inputs, the main power, and a backup power supply (Batteries). Based on that, two cascading inverters paired with two p-channel fets power the circuit at Vo, while two n-channel fets are used as open-drain outputs. Pull them up with a resistor, and they are the perfect interrupt source for your arduino.
The specific one shown is the ICL7673, but it's maximum current is 38mA. It's designed for rtc and ram with a coincell, but an extra pair of P-channels can be used to increase the current.
There are other battery backup or power switches which will do higher current builtin. |
H: Switching LED with a transistor
I would like to switch a 350mA LED with a transistor. Switching is done by a 5V microcontroller and the main voltage is provided by a 24V power supply. To play around and see what works I used Yenka, so I'll use screenshots from that.
As I understand this is the conventional way to do such a thing - assuming that the LED voltage drop is ~4V, it's connected to the collector along with a resistor to eat up the excess voltage:
However I noticed that in the simulation connecting the LED straight to the 24V supply works as well if we use more resistance to the base:
Shouldn't connecting a 4V LED straight to a 24V supply damage the LED, or do I have some fundamental misunderstanding about this? All answers, thoughts and tips are appreciated, I'm still learning the basics here.
Tl;dr version: will the circuit in the second image work, or is this evil program trying to make me burn my fancy LEDS?
AI: The answers already here describe the behavior you saw, but perhaps don't illuminate the "conventional" way of doing things.
The key behavior of a bipolar transistor (as opposed to FET) as wired here (common emitter) is that the transistor will attempt to draw an amount of current into the collector equal to Hfe (the transistor's current amplification factor, sometimes called beta) times the current into the base. Hfe is some more-or-less constant number in the range of 25 to 100 or more. With this behavior the transistor is useful for amplifying ("multiplying") analog signals, like audio.
However, we often want to just switch a current on or off, like for an LED. In that case, we want the transistor either off (conducting no current) or fully on (maximum current, given some series resistor, and the overall supply voltage) To arrange that state, we just have to apply a base current large enough that the transistor, in an effort to draw Hfe X Ib into the collector, would trying to set the collector voltage below the minimum possible, which is about Vemitter + 0.2 (so 0.2V in your example). When the transistor is in that state, it is said to be saturated.
A circuit is normally designed to employ each transistor in only one of these modes, either amplifying, or switching, with surrounding components selected to ensure that mode, and to focus on the particulars of that mode. So, in a circuit such as yours, a designer would make a rapid calculation of the LED (and thus collector) current required, divide by a low guess for transistor beta (say 40), arriving at the minimum needed base current, and arrange the base resistor to deliver that or more.
Exact base current is not important, but we do need to ensure that the transistor is saturated when on, because if it isn't, the collector will not sink to its lowest voltage, allowing a higher collector-emitter voltage. Though the current will be somewhat less, the voltage across the transistor will be substantially higher, requiring the transistor to dissipate much more heat (V x I) than necessary. That heat would either destroy a small transistor, or require a larger transistor or addition of a heat sink.
So, your first schematic is the sensible way to use the transistor for switching an LED. (Setting aside the waste of using a 24V supply requiring a large voltage drop somewhere.)
In the second schematic you stumbled upon use of the amplifier part of the transistor's range of operation. As noted, this is disadvantageous to the transistor heat wise if it actually worked. However, it won't work satisfactorily because, as others have mentioned, the Hfe value varies quite a bit from one transistor to the next, and also with heat. So you would not be able to set an accurate stable LED current that way anyway.
(To create an actual amplifier with a consistent and stable amplification factor, additional resistors and capacitor are needed to address the effect of Hfe variation.) |
H: Why is my simple counter VHDL not working? Where did my signals go?
I'm a complete beginner with VHDL and an almost beginner with digital logic and I'm having a problem working through a book I'm reading. In particular, an exercise asks to build a counter with an enable and a reset switch. I implemented it one way and the compiler (Xilinx ISE) complained about it enough that I took the path of least resistance and changed it to something that I thought was sub-optimal. But now I'd like to know what's wrong with my original code.
Here's the 'working' example:
-- EXAMPLE 1
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity clocks is
Port (
switch0 : in STD_LOGIC;
switch1 : in STD_LOGIC;
LEDs : out STD_LOGIC_VECTOR (7 downto 0);
clk : in STD_LOGIC
);
end clocks;
architecture Behavioral of clocks is
signal counter : STD_LOGIC_VECTOR( 29 downto 0 ) := ( others => '0' );
begin
LEDs <= counter( 29 downto 22 );
clk_proc: process( clk, switch1, switch0 )
begin
if rising_edge( clk ) then
if switch0 = '1' then
counter <= counter + 1;
elsif switch1 = '1' then
counter <= ( others => '0' );
end if;
end if;
end process;
end Behavioral;
So basically you set switch0 and the counter begins counting up. Clear switch0 and it stops counting up. Set switch1 while switch0 is clear and the counter will reset to 0. Set switch1 while switch0 is set and the counter doesn't reset.
What I really wanted was for the reset switch1 to be able to clear the counter even if switch0 was set. I wanted the reset switch1's rising edge to reset the counter back to 0 while the counter keeps climbing if the enable switch0 is still set.
I thought I could get a bit closer by changing the process to this:
-- EXAMPLE 2
clk_proc: process( clk, switch1, switch0 )
begin
if rising_edge( clk ) then
if switch1 = '1' then
counter <= ( others => '0' );
elsif switch0 = '1' then
counter <= counter + 1;
end if;
end if;
end process;
But strangely, on the Spartan 6 chip I'm using, the enable switch0 still overrides the reset switch1? Then I tried this:
-- EXAMPLE 3
clk_proc: process( clk, switch1, switch0 )
begin
if rising_edge( switch1 ) then
counter <= ( others => '0' );
else
if rising_edge( clk ) then
if switch0 = '1' then
counter <= counter + 1;
end if;
end if;
end if;
end process;
This should be exactly what I want, but Xilinx ISE is even less happy with this - I get these warnings from the compiler:
WARNING:Xst:647 - Input <switch0> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:2404 - FFs/Latches <counter<1:30>> (without init value) have a constant value of 0 in block <clocks>.
WARNING:Par:288 - The signal clk_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal switch0_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal switch1_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:283 - There are 3 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
switch0 is never used? Neither is clk? Where did they go? And when I ran it on my spartan 6, it did the same thing as the 'working' example. I tried this too:
-- EXAMPLE 4
clk_proc: process( clk, switch1, switch0 )
begin
if rising_edge( switch1 ) then
counter <= ( others => '0' );
end if;
if rising_edge( clk ) then
if switch0 = '1' then
counter <= counter + 1;
end if;
end if;
end process;
This won't even build - in implementation I get these warnings/errors:
WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:3002 - This design contains one or more registers/latches that are directly
incompatible with the Spartan6 architecture. The two primary causes of this is
either a register or latch described with both an asynchronous set and
asynchronous reset, or a register or latch described with an asynchronous
set or reset which however has an initialization value of the opposite
polarity (i.e. asynchronous reset with an initialization value of 1).
Can anyone clue me in as to what is it about these re-worked processes that isn't kosher? I understand that there are a lot of things that can be coded in VHDL but that can't be translated to a hardware design, and the second of my revisions seems to fall into that category, but can anyone explain to me what's going on here? What's wrong with a latch with async resets and sets? What's wrong with nested if-then-end blocks? What am I doing wrong here?
UPDATE: As in the answer, examples 3 and 4 could never have worked because a process can't be clocked multiple times - it can only have one signal with a rising_edge() or 'event on it. Example 2, it turns out, does actually work and do what I want it to do. I ran it through the simulator and it seemed ok, and then when I synthesized it again for hardware, it worked just fine on my spartan 6. I must have done something strange the first time I tried it?
AI: the rising_edge() parameter is only really for clock signals. One option would be the following:
clk_proc: process( clk, switch1, switch0 )
begin
if switch1 = '1' then
counter <= ( others => '0' );
elseif rising_edge( clk ) then
if switch0 = '1' then
counter <= counter + 1;
end if;
end if;
end process;
This is known as an asynchronously reset process, which means that it'll reset the counter whenever reset (switch1) is high, regardless of clock state. A synchronously reset process would look the same as your second example:
clk_proc: process( clk, switch1, switch0 )
begin
if rising_edge( clk ) then
if switch1 = '1' then
counter <= ( others => '0' );
elsif switch0 = '1' then
counter <= counter + 1;
end if;
end if;
end process;
You did state though that your second example didn't work as expected. My suspicion is that this is because the signals driving it are switches rather than clocked logic signals. Switches don't actually switch instantaneously, instead bouncing between on and off a few times before settling. You need to implement some sort of debounce process to produce a signal which is synchronous with your clock and can control your timer.
It's also worth mentioning that FPGA design is a lot easier if you simulate stuff first. Xilinx ISE includes a simulator - create a testbench and use it! That lets you easily see what's happening in your implementation before you ever get near hardware. |
H: Do unintended latches only happen for signals in the process sensitivity list?
I read in one book that an unintended latch requires you to have a process section where there is a signal in the process sensitivity list but don't assign to in every path. But that doesn't make sense to me, because for example you don't assign a value usually to the clock or reset. Also I've read other examples that don't meet this criteria. What is required?
AI: NO.
Latches are generated for the "assigned to" signals.
You could define these, as Dave Tweed said, as output signals.
Latches appear if you have combinatorial logic where a variable does not get assigned a value in every possible path.
You find latches by checking every if, else, case, when etc. to see if at that point in the code a value has been assigned to every variable.
This is not required for clocked sections. There a variable holds its previous value if no assignment has been made. |
H: Applying heat to a transistor
I witnessed an experiment in which a transistor was connected to an led and a power supply.
A lighter was used to heat up the transistor and this reduced the resistance of the circuit and made the led light up brightly.
Why does heating the transistor do this ?
And if this works with a transistor then why is a thermistor needed ?
AI: A transistor essentially lets through as much current (that's charge per time) as it has charge carriers available in a specially crafted thin zone.
The number of these carriers can, depending on the type of transistor, be changed by running a current through the base of the transistor, or by applying a potential between the gate and one of its other terminals.
But: Charge carriers also form spontaneously in semiconductors when the temperature is above absolute zero, and the speed at which that happens increases very much with the temperature. Thus, you can make a transistor act very well as a temperature sensor. |
H: Isolating 220V AC from low voltage DC on the PCB
Below picture is the rectifier section of design on the PCB:
The space between AC and DC voltage is ~2 cm, except at the bottom that I put four M3 holes which I'm going to drill and connect them to each other.
The relay control part is going to connect to an opto-isolator and from there to the MCU.
Is the taken precaution steps enough for isolating AC from DC? any tips for improvement?
AI: If you want it safe, most likely not.
When you have AC Line and low voltage on the same board, you need to have a clear separation of the two sections. Here it is not the case.
The AC side and the low voltage side need to be isolated from each other, and from the circuit, it seems not to be the case. You need to have optical or galvanic isolator between the two sides.
It is recommended to use cutout through the board to separate the section and without having any trace going to either section. This has several advantages from having a clear boundary, to avoid having PCB defect that might short AC to the low voltage side.
Few example: |
H: Will this UVLO work?
I'm referring to one answer here
What if (power supply) was 24V, the VCC is 3v3 delayed by 1 second?
If you apply power then your (power loss detect) will be higher than the Vcc rail for 1 second? I don't imagine this to end up well.
In my mind i need an (and gate) that is activated by the CPU. But that will cost one more GPIO, so we can activate it from VCC itself.
However, is that and gate really required or there is better solution?
AI: Yes your circuit can work but could be improved.
If you apply power then your (power loss detect) will be higher than
the Vcc rail for 1 second? I don't imagine this to end up well.
If your potential divider impedances are high enough, the current that could be pushed into an IO pin will be low. The data sheet will hopefully advise you that, in the event of Vcc still rising on the CPU, you should be OK. However, if you use a schottky diode from the R1/R2 node to the CPU's Vcc rail AND put an extra resistor in series with the input pin you should be fine: -
Also, if your input pin can be configured to "use" hysteresis (like a Schmitt trigger) then that would be better because, you will have more defined logic levels and most (if not all) UVLO circuits I have seen have hysteresis to prevent a series of glitchy "detections" as the supply is falling through the area where the input gate is most sensitive to non-digital levels. |
H: Signed Overflow Detection
I am a beginner at verilog and encountered this problem:
Assume that you have two 8-bit 2's complement numbers, a[7:0] and b[7:0]. These numbers are added to produce s[7:0]. Compute whether a (signed) overflow has occurred.
Now my answer to the asked value of overflow was
assign overflow = ~(s[7]&a[7]&b[7]);
While the correct answer shown was
assign overflow= (~s[7]&a[7]&b[7])|(s[7]&(~a[7])&(~b[7]));
I want to know where I went wrong.
AI: Signed overflow occurs when the result of addition is too large for a given type to represent.
This occurs when either:
Addition of two positive integers result in a negative integer result (so the result msb - the sign bit - is 1 when it should be zero)
or
Addition of two negative integers result in a positive integer result (so the result msb is 0 when it should be 1).
For each condition, we would then have:
(Positive integers input)
s[7] would be '1' for a[7] and b[7] both being '0' given by (s[7] [1 if result is negative] & (~a[7]) [result is 1 if input was positive] & (~b7)) [result 1 if input was positive]; the logical and would show that two positive inputs resulted in a negative output.
(Negative integers input)
Overflow occurs if we have a positive result, so:
s[7] would be zero for a[7] and b[7] both being 1. This is given by (~s[7] [result is 1 if positive result] &a[7] [would be 1 for negative input] &b[7]) [would be 1 for negative input. if all these bits evaluate 1, overflow has occurred.
Your assignment captures the negative input case and not the positive input case where the quoted answer captures both. |
H: Unknown characters in the serial monitor
I am trying to sniff the UART communication line of a commercial BLDC controller. The UART port connects to the Bluetooth module and the Bluetooth module connects to an Android App. I am able to get the baud rate right with some hacking, but it seems that after the successful connection of the Bluetooth module to the app, the app sends some characters to the Bluetooth module, and expects some characters in return because the Bluetooth module is connected to my PC via FTDI converter and not the controller.
It does not get the desired reply hence, the Android application shows "Open Flash Error." Now I do not exactly know what the error is but, in the Arduino serial monitor I see four characters (when the Bluetooth module is connected to app) represented by blocks as the serial monitor does not have the right font I guess.
What should I do in order to decipher what are those characters or how should I get the ASCII values of the characters received?
AI: You are probably looking at a binary transmission protocol, rather than the ASCII protocol you were expecting.
You might want to investigate further with the module in circuit to capture successful transactions. These transactions could be generated using the app. Since the protocol seems to be binary, be sure to use a serial monitor that can yield the data in hexadecimal or bin format.
BLDC controllers I know of use simple ttl-level binary serial communication, with a start-checksum, databyte and stop bit. Many of their protocols have already been reverse-engineered and can be found online. You may want to look up for yours. |
H: The Intuition for RLC circuits
I'm reading through Hayt's Engineering Circuit Analysis 9e and it does a fairly good job of giving the intuition for "where" the energy is going in a damped RLC circuit, but I'm hoping that someone here can help me get full closure.
Consider a parallel RLC circuit with no input and where the capacitor is initially at some non-zero i(0).
First of all, I'm hoping to clarify why the maximum voltage achieved by the system occurs in the underdamped case. Intuitively, is this because the resistor's value value is so large that most of the current will flow between the capacitor and the inductor (and thus energy is just exchanged between the two rather than being dissipated by the resistor).
If the above is true, then I am trying to square that with the fact that the slightly underdamped or critically damped case has the shortest settling time. My understanding is that settling time corresponds to the time required for all of the energy to be dissipated. If, in the slightly underdamped case, we are exchanging energy between the capacitor and the inductor in an oscillatory manner and the resistor is therefore not dissipating much energy, how does that system settle (well) before the overdamped case where the resistor (I think) dissipates a large amount of energy because resistance is low and much current therefore flows through the resistor? Or am I somehow confusing energy dissipation with the voltage here.
Generally, I'm looking for an intuitive explanation of "where the energy is going" and why it "goes away" quickest in the critically damped or slightly underdamped cases, rather than a mathematical demonstration.
AI: [!Quote] by a ConcernedCitizen
Resistors are the electrical equivalent of friction and produce losses to remove energy from the system.
If you drop a frictionless pendulum to swing it, how long does it take to settle?
Infinite time, because there are no losses so it just swings back and forth and oscillates around the bottom position forever.
How about the flip-side: what happens if the pendulum has infinite friction?
Well it just sits there at the high position forever, taking infinite time to reach the bottom i.e. never reaching it, but forever hanging on to its potential energy.
If you have non-infinite but high friction, your pendulum is going to take a VERY long time to reach the bottom position. It will never overshoot but it will take a very long time to get there. And if you have too little friction it will reach the bottom point faster but overshoot and then proceed to swing continuously about the bottom position for a very long time too.
There is a middle ground that mutually minimizes the time it takes for energy to dissipate and the time it takes for the pendulum to travel one cycle to the bottom position.
Resistor = friction. Dissipated as heat (for the most part) in both systems.
Inductor = kinetic energy storage. In the pendulum this is the velocity of the weight combined with the mass.
Capacitor = potential energy storage. In the pendulum this is the gravitational potential energy due to the mass being at a height.
You might be wondering why the capacitor is the potential energy storage and why the inductor is the kinetic energy storage…
This is because you can put charge in the capacitor and then just keep the energy there statically by disconnecting it (like sealing air in a pressurized tank or just holding the pendulum at a height). But in an inductor requires current to flow constantly through it to store energy in its magnetic field. Otherwise the field collapses (just like a pendulum requires constant motion to store kinetic energy). You can't store energy in an inductor or kinetic energy in an object statically. You can only store it dynamically.
So in a pendulum energy is being exchanged between kinetic and potential. The pendulum exchanges speed for height back and forth. In the RLC circuit, the capacitor is exchanging energy with the inductor. With overly low resistance (parallel RLC), high resistance (series RLC), or high friction it takes a very long time for energy to completely transfer from one medium to the other, but it overshoots very little once the transfer is complete because so much is dissipated during the transfer with only one transfer occurring at the extreme but taking a very long time to do so. With very high resistance (parallel RLC), low resistance (series RLC), or low friction, a single transfer completes very quickly but so little energy is lost that much of it remains to be transferred back in the other direction. So many-many transfers can occur. |
H: Connect a Switchboard to Arduino
Sorry if this is a simple question, but I‘m quite new to Arduino. What I‘m looking for is a way to connect 100+ strain gauges to one Arduino board.
Now, those each need a separate ADC (HX711) to convert the input from snalog to digital (best would be if only 1 was needed)(Also, I use 3 resistors to make it a quarter-bridge, so only 1 strain gauge per HX711 is needed.)
What I thought would be a good way, is to connect the HX711 to the Arduino like normal, but also connect the Arduino and the HX711 to something like a switchboard, in which the Arduino tells it to which setup to connect to, and the switchboard then changes the connections (pretty much like a transitor.)
Not sure if I‘m clear here, so something like this:
(This - means connected to)
Arduino - HX711
Arduino - Switch
HX711 - Switch
Switchboard - StrainGaugeQB [1,2,3,4...100] (All 100+ quarter bridges = 400 wires.)
Something like this:
Basically, the Arduino switches between which strain gauge is to be read currently. Although they should at the end still each be read at least 4-5 times a second.
I read something about multiplexers, but they don‘t seem to be exactly what I‘m looking for. They seem to be only serial, or did I get that wrong? They only have one in/out connected, but if it‘s not serial, could I maybe use 4 or those each getting one of the wires of the HX711? Something like multiplexer 1 being connected to wire e+ of multiple quarterbridges, 2 being e- of those, 3/4 being connected to their a+/a-?
AI: i use 3 resistors to make it a quarter-bridge
I don't see your wiring in the schematics, but if what you are doing is what I think, then you basically killing the performance of the strain gauge. Not a good idea. You need to switch all four lines.
Also, i read something about multiplexers, but they don‘t seem to be
exactly what i‘m looking for
You were reading about wrong multiplexers. What you are looking for is called analog switch, and it is designed exactly for switching analog signals.
Some of them controlled by binary address lines (e.g. ADG726), others have internal shift register (e.g. ADG725). In first case you need more free control lines but can randomly access any specific gauge. In the second case you save control lines but an access is sequential.
The problem, however, is that analog muxes will affect the signals somewhat, reducing precision and linearity of your measurements. So, it all depends on your requirements.
For better precision you could use a hundred 4PST relays, but those are more expensive than HX711 modules and need additional switching circuits.
I think the best solution would be to use multiple HX711 permanently connected to their gauges. Since you are talking about hundreds of gauges, they cannot possibly be located in close proximity to the control board. Running analog signals all the way from the gauges to your "switchboard" will be another way to look for troubles.
By placing HX711 next to each gauge you will be shifting wiring into digital domain, greatly improving resolution and simplifying switching. In this case you can still use analog muxes mentioned above but since you only be switching 2 lines you need only half of chips and wiring is easier.
UPDATE:
You've commented that you are going to look into ADG725. Unfortunately, ADG725 does not have carry output, so you'd need additional lines to select groups of MUXes. Using directly addressable ADG726 MUX might be more convenient.
Connect clock pin to 7-bit counter (74HC4024), connect first 5 bits of counter to address inputs of all muxes, then use decoder chip (74HC138D) to convert next two bits into 4 enable lines for groups of muxes. This will enable you to switch up to 128 gauges with only 2 pins (3 if you count optional "clear" signal). |
H: Copper Coil and Electromagnetic Induction
Waiting for answer
Does mixing thickness of wires affect the Induction?
What I mean is that I've like some 2mm and 1mm copper wires joined together.
Basically I remove insulation on copper wire ends and then I just tie those wires. After that I just tied those 2 wire ends.
When making a coil out of copper wire, what could increase efficiency of electromagnetic induction, the thickness of coil (Gaps between windings) or surface area.
Answered
Why copper is most common in electronics? Is it because of it's valence electrons that makes him more conductive?
I will be waiting for your answers :)
AI: induction: When magnetic field changes, no matter what's the reason of the change, a simultaneous electric field exists. Induction happens in magnetic field, it's one of the basic relations between magnetic and electric field.
Some common reasons for a change in a magnetic field:
someone moves a magnet or a wire or coil which has current
the observer of a magnetic field moves, he sees an electric field
current in a wire or coil changes
As you know, metallic coils are often used to create the changing magnetic field, but the induction happens in the field, it's as well outside the coil. As said, no coil is needed to make induction to happen, a changing magnetic field is enough.
If a wire is in electric field, a voltage is generated between the ends of the wire. Electric field created by induction is circularly around the lines of the magnetic field. That's why a coil is useful to collect substantial voltage. The thickness of the wire isn't essential, the voltage depends on the strength of the generated electric field and how long wire there's placed along the electric field. In transformers the voltage is proportional to the number of turns in a winding.
It's useful to make tight windings to get intensive magnetic fields and catch effectively power from the electric field caused by induction. Transformer and electric machine engineering is very much an art of these. As well one wants to keep the winding resistance low to keep losses low and have low cost materials which are easy to work with. Minimizing total costs guides us to have windings made of copper instead of gold, silver or aluminium which also have low resistance when compared to iron. |
H: Unexpected output voltage in opamp (LM741, DC, single supply) circuit
As a beginner I tried to make a simple DC circuit with an opamp on a single supply. This is what I came up with:
simulate this circuit – Schematic created using CircuitLab
I use R3 and R4 as a voltage divider to get 1V between the inputs of the opamp, and R1 and R2 in the noninverting configuration. I tested this circuit in a few simulators and they show 3V at the output.
$$ Gain = 1 + \frac{R2}{R1}=1+\frac{560}{270}\approx3 $$
I built the circuit and measure 5.64V where I expected 3V. What am i doing wrong?
AI: The LM741 (datasheet here) has a "common mode" input voltage range of not within about 3V of either supply.
In your example, with a 9V supply, you must have an input voltage in the 3V-6V range (0+3, 9-3) for the opamp to function correctly.
The absolute maximum input common mode range varies with supply voltage. It is usually not well covered in data sheets and if stated is usually specified at a single relatively high supply voltage. I specified a Vcm of "not within 3V of either supply", based on a Vcm of +/-12V for a supply of +/-15V in the above cited datasheet. AT lower supply voltages some suggest that Vcm may be within 2V of either supply - you'd need to establish this from a relevant datasheet spec - which may not be available. It's a lot easier to use an eg LM324/358 (see below) which has a Vcm range of 0-(Vcc-1.5V).
The recommended minimum supply voltage is +/- 10V = 20V total, but a lower supply voltage can be used. How much lower is not always well specified in datasheets but a lower limit is obviously not less than the common mode input range - ie with a supply of 6.1V, if Vcm is +/-3V, you will have
6.1-6 = 0.1V of allowed input swing.
SOLUTION
The best solution to most LM741 problems is to use some other device. The LM741 is an extremely old design that has been superseded by several generations of devices with improved performance in various areas.
An excellent alternative, also very old but newer than the LM741, is the LM324 (quad) or LM358 (dual) opamp. (LM324 datasheet here
These are highly available, low cost, single supply (with some limitations) and generally well behaved and easy to use.
The LM324 is obsolete but still exceedingly useful.
The LM741 is exceedingly obsolete and, while an extremely marvellous and extremely widely used opamp in its day, is now so much harder to use and more limited in capabilities than many more modern devices that it should be allowed to bask in its historical glory. |
H: Transformer open circuit output voltage and current limiting resistor at gate of Triac
Im kinda new to electronics and have some questions before i solder my projekt together. I want to make an Arduino controlled soldering iron and designed the circuit below. The optocoupler i used is a LTV-817 and by iron i mean the heating element at around 3Ω.
My problem is that the transformer features an open circuit voltage of around 50V AC peak to peak and I am not sure how the optocouler IC1 is able to handle this. Do I have to choose a different resister value?
The second Problem is the current limiting resistor at the gate of the triac. How is the value calculated?
AI: One thing that jumps out is that you are using a transistor opto-isolator to turn on the triac. This won't end well because
It could, at best, only turn on when the collector is positive so it would only switch on positive half-cycles of the transformer output.
The LTV-8X7 datasheet, section 4 gives absolute maximum ratings as
Collector - Emitter Voltage, VCEO: 35 V
Emitter - Collector Voltage, VECO: 6 V
The first parameter means it will be destroyed by your 50 V supply on the first positive half-cycle it sees.
The second means that it will be destroyed on the first negative half-cycle it sees.
Either way you're doomed.
What you need is an opto-triac.
Figure 1. A sample opto-triac controlled circuit (for mains voltage). Source: Triac Switching circuit with Optocoupler.
You may need to modify the circuit a little to work with your lower transformer voltages.
For more reading on the matter have a look at my article Opto-triacs, solid-state relays (SSR), zero-cross and how they work which may be of help. You may decide that a zero-cross opto-triac means that you don't need to monitor the zero-cross of the transformer. |
H: Design an emitter follower to operate in the audio range (20 Hz - 20 kHz)
I am now self-learning with the "Art of Electronics" book by Holowitz and Hill, and I encountered a problem understanding one example from the book. Here it is:
And here is the explanation for the calculation of the circuit:
A. Emitter follower design example
As an actual design example, let’s make an emitter follower for audio
signals (20Hz to 20 kHz). VCC is +15V, and quiescent current is to be
1 mA.
Step 1. Choose VE. For the largest possible symmetrical swing without clipping, VE = 0.5VCC, or +7.5 volts.
Step 2. Choose RE. For a quiescent current of 1 mA, RE = 7.5k.
Step 3. Choose R1 and R2. VB is VE +0.6V, or 8.1V. This determines the ratio of R1 to R2 as 1:1.17. The preceding loading criterion
requires that the parallel resistance of R1 and R2 be about 75k or
less (one-tenth of 7.5k×β ). Suitable standard values are R1 = 130k,
R2 =150k.
Step 4. Choose C1. The capacitor C1 forms a highpass filter with the impedance it sees as a load, namely the impedance looking into the
base in parallel with the impedance looking into the base voltage
divider. If we assume that the load this circuit will drive is large
compared with the emitter resistor, then the impedance looking into
the base is β RE, about 750k. The divider looks like 70k. So the
capacitor sees a load of about 63k, and it should have a value of at
least 0.15μF so that the 3 dB point will be below the lowest frequency
of interest, 20 Hz.
Step 5. Choose C2. The capacitor C2 forms a highpass filter in combination with the load impedance, which is unknown. However, it is
safe to assume that the load impedance won’t be smaller than RE, which
gives a value for C2 of at least 1.0μF to put the 3 dB point below 20
Hz. Because there are now two cascaded highpass filter sections, the
capacitor values should be increased somewhat to prevent excessive
attenuation (reduction of signal amplitude, in this case 6 dB) at the
lowest frequency of interest. C1 = 0.47μF and C2 = 3.3μF might be good
choices.
My questions are:
they only mention high-pass filtering (below 20 Hz). But what ensures filtering above 20 kHz, namely where is the low-pass filter here?
Will this modification will do the job (adding C3 to form a low-pass filter with the Re)?
If no, than how to add high-frequency filtering properly here and calculate the values of additional components (if needed)?
AI: Win Hill et al. are not really talking about deliberately filtering the signal, rather about the requirement that the amplifier must work over that frequency range.
As you've correctly stated, none of the parts there deliberately restricts the upper frequency range, and one could expect it to work up at least into MHz even with a jellybean BJT and a hearty 1mA of bias current. At higher frequencies (tens or hundreds of MHz), the transistor characteristics and parasitic capacitances will come into play.
While you could add a capacitor as you suggest, it might be better to filter the signal before it is amplified. Otherwise you'll be wasting a lot of power in the transistor if it encounters a lot of high frequency input. For example, a series resistor on C1 and a capacitor across R2. |
H: Can transformers be used to adjust capacitors?
It seems capacitors are subject to a "quality triangle", where we can only pick two out of three desirable traits:
High voltage rating
High capacitance
Cheap
For example, a high-voltage high-capacitance capacitor is not likely to be cheap.
But, can we get around that by adding a step-up transformer with a cheap high-voltage low-capacitance capacitor on the secondary? Since
$$Z_{reflected} = \left(\frac{N_P}{N_S}\right)^2 Z_{secondary}$$
then that low-capacitance capacitor will reflect a much greater
$$ \frac{1}{j\omega C_{reflected}} = \left(\frac{N_P}{N_S}\right)^2\frac{1}{j\omega C} \Rightarrow C_{reflected} = \left(\frac{N_S}{N_P}\right)^2 C $$
Not sure if this is a common practice or not (or, if the cost of getting a properly-rated transformer would exceed that of just getting the more expensive, high-voltage, high-capacitance capacitor in the first place!)
AI: Yes you can Place the cap bank on the end of a transformer or even an auto transformer .Remember that the windings must handle the leading reactive capacitor current .So if your Cap bank is rated for say 100KVAr then 100KW is your required transformer rating .This at power frequencies looks expensive .I have not seen this done .I have seen tertiery windings on an existing transformer at 60Hz allowing for cheaper low value high voltage film caps and have done this on a resonant mode powersupply at 150 KHz .I do not think that the economics will stack up for your job . |
H: 1N4148W-7-F Diodes
I'm building a DIY keyboard. All the build logs I've seen use these diodes:
https://www.digikey.com/product-detail/en/diodes-incorporated/1N4148W-7-F/1N4148W-FDICT-ND/815280
I'm trying to source the diodes locally, and have found these:
https://www.reichelt.de/schalt-diode-100-v-150-ma-sod-123-1n-4148w7f-dii-p219381.html?&trstct=pos_2
I can solder, but I need a little help. I am a little worried, as the part number differs slightly, and I'm unsure of the 150mA vs 300mA (is that the forward current?)
With these be fine in a low power project like a diy keyboard build (running a teensy 2)
Thanks all.
AI: There's no difference between the diode types for your purposes. They're just cheap but very, very good common switching diodes.
Current rating, switching speed, voltage rating, leakage and so on are far more than enough in every case. |
H: Figure out the Resistance Value With Known Device Specs
I'm learning electronics and trying to find the right resistor value for my device: a Eachine Rotg01 Receiver.
The specs
Working Current 200mA/5V
Power Supply 5V(by smart phone)
I don't want to fry my receiver so I was hoping to get some confirmation that my math is correct. Let's say I want to use a 9 volt battery as my power supply. From the specs, I am assuming 5V is the voltage drop so V = 9-5 = 4. Plugging this into Ohms Law 4 = R*.2 So that would work out ot a resistor of 20 ohms. Is this right ?
I'm not sure if 5V is the voltage drop of the device. I tried measuring with my multimeter, but got OL. Any help is much appreciated.
AI: From the specs, I am assuming 5V is the voltage drop so V = 9-5 = 4. Plugging this into Ohms Law 4 = R*.2 So that would work out ot a resistor of 20 ohms. Is this right ?
200mA is the maximum current. The minimum is zero (device off), so your voltage will vary between 9-(20*.2) = 5v and 9-(20*0) = 9V. Since average current is usually a lot less than maximum, you'll mostly be giving the device too much voltage.
That might or might not be ok (most devices that use USB tend to be robust), but the best solutions here are to either get a 5v supply, or to get a voltage regulator (a device that takes one voltage and turns it into another). A linear regulator such as the 7805 is the most simple, but will waste some battery life. |
H: How Power measured by Meters is affected by Harmonics?
I want to know how energy meters (Electro-static or electronic) measure Energy (let's assume power, ignore time) when there are harmonics present.
I know what are harmonics, how are they generated and how do they affect actual power. I read that harmonics power (in most cases) is in the opposite direction of Actual Power. That means if the utility is providing power to a consumer who has a dominant non-linear load, and in-between them is an energy meter (plz ignore class, type, etc.). So energy meter would record less power. That is understandable.
I tested this scenario like this,
I applied a linear load to meter and recorded power of ~2.3KW (230V x 10A x 1.0 P.F). But when I applied Phase-fired (90 degrees) waveform which contains odd harmonics, the power recorded by meter was ~1.1KW given the same set of V, I and P.F.
I know meter records power accurately because you can see from the waveform that rms have been decreased (as each half-cycle is 50% clipped to zero). But there lies my question.
If meters are recording less power in the presence of harmonics, then isn't it a loss of utility and benefit of consumers? While consumer is responsible for generating harmonics and is getting profit on top of it?
Should meter record actual power while filtering out the harmonics?
To me, it sounds really confusing, and I tried to search for utilities and meter manufacturer point of view, and they seem to agree that meter should consider harmonics effect while measuring power as it would be beneficial to both? How?
I tried to raise my question as much as I could find the write words, I hope that people here would understand, and help me find the answer.
Thank You
AI: There are electromagnetic energy meters with rotating aluminum discs and electronic energy meters, but I have never heard of an "electro-static" energy meter.
Electromagnetic energy meters measure real power and ignore harmonics because they measure power as the speed of a small motor that has a synchronous speed that is proportional to frequency. In effect, they can not measure harmonic volt-amperes because they can not tour at more than one speed at a time. There are torques developed due to harmonics, but some tend to drive the disc in the same direction as the fundamental and some in the opposite direction. The torques and counter-torques do not match, but they apparently don't interfere with the proportionality between speed and real power.
Electronic energy meters work by calculating instantaneous power at short sampling intervals. They multiply instantaneous voltage by instantaneous current. The result is integrated to calculate average power. If the voltage waveform is sinusoidal, no real power is transmitted and the result of the calculation is the fundamental power. If the voltage waveform is distorted, there is real power transmitted at both the fundamental and the harmonic frequencies and that is correctly included in the calculation.
If the objective is to calculate the power separately for each harmonic, the individual harmonic voltages need to be determined. I believe that fourier transform methods can do that.
I hope that provides a satisfactory intuitive explanation. Perhaps someone else can provide a rigorous explanation. |
H: Mean Well power supply gives wrong voltage output?
I have the Mean Well PT-45B power supply (data sheet here). It has three channels, which should give 5V, 12V and -12V, as I understand.
Pin 1 and 4 or 5, and pin 6 and 4 or 5 should give 12V and -12V respectably (as of my understanding).
The issue is when I connect the power, and try to measure the DC voltage, I get wrong outputs.
Pin 1 and 4 gives -17V and pin 6 and 4 gives 7V (see pictures). There is a potentiometer to adjust the output somewhat, but If I adjust it away from center to the left or to the right, the readings get really jumpy (see gif).
AI: Pin 1 is on the right side of the connector which is a bit unusual, and from the pictures I guess you thought pin 1 was on the other side, so that explains the wrong polarity.
The power supply has a minimum load on two channels, notice it says "0.4-5A" on channel 1, not "0-5A". This is common on this type of switching supplies.
It only has feedback (and thus regulation) on +5V output, so the other outputs will be less accurate, especially if the minimum load requirement is not met.
So you need to make sure your load draws the minimum load current if you need accurate output voltage. Probing the supply unloaded (as in the pictures) will result in too high voltage. |
H: Return path for current flow in transmission lines?
We know that all current flow in loops, i.e. if they start at a source they must come back to the source. So for transmission lines, does the current that flow through our appliances in our homes go back to the generating station? If yes, how?
AI: Transmission lines for our home appliances have multiple lines and the current return path is shared among these lines because in alternate current (AC) transmission, each line is a send and return path for current.
When it comes to transmission lines for trains, it is often seen that the ground send is one single line up in the air, while the return path is the train railway (and to some extent also the earth). |
H: Star to delta transformation circuit
Is it possible to use star-to-delta transformation on this specific circuit below? If it is possible, can someone give me a hint on how to do it?
I tried to do delta-to-star transformation and got the answer, but unsure with doing star-to-delta transformation on this circuit shown below. Please enlighten me on this. Thanks!
AI: See below. I've transformed the 24 ohm, 120 ohm and 60 ohm into R1, R2 and R3 positions: -
If you do the math in value translation you can find current \$i_2\$ because: -
R2 is in parallel with R4 and R3 is in parallel with R5
they are then in series
they are then in parallel with R1
this means you can calculate the currents through 5 ohm and 43 ohms
it follows that you can calculate the voltage on each node
it then follows you can calculate \$i_2\$
I'll leave you to do the rest and don't forget, once you have \$i_1\$ and \$i_2\$ you transform back to star to get the voltage across the 60 ohm. |
H: Why does LED dim when adding second LED in parallel with a single resistor
If I have a led hooked up to a 12v DC supply with a single resistor it runs nicely as you would expect. If I add a second LED in parallel the brightness drops, slightly, the brightness on both is (to my eye at least equal). My antiquated primary school knowledge tells me in parallel they should draw more current and stay the same brightness.
What's more if I add any number of additional LEDs the brightness doesn't drop again, its only after the second one.
I've found some questions and answers that indicate that running multiple LEDs with a single resistor isn't a good idea because the current will be different on each LED and that makes sense. However I'm keen to understand what is actually happening to cause the LEDs to dim.
What is wrong with my understanding of bulbs in series vs in parallel and why does a second bulb cause the brightness to drop and additional bulbs not?
AI: The voltage across an LED is about 2V and stays at just about 2V.
With a fixed power supply voltage it means that you have a fixed voltage across (and therefore a fixed current through) the series dropper resistor.
The resistor is acting as a constant current source and its current is shared between however many LEDs you have in parallel.
Lets say you have a 12V supply and a 1k Ohm series resistor. You then have 10mA through the resistor. With one LED there is also 10mA through this LED. Now if you add another LED there is 5mA through each LED and the brightness will drop noticibly. The current through each of the two LEDs is 50% what it was through the single LED.
Now adding a third LED the current through each LED drops to 3.333mA but the % drop in current is less than the drop when you added the second LED. The more LEDs you add the less the % drop in current.
So when adding more LEDs than two there will still be a brightness drop but it becomes less and less perceptible the more LEDS that you add.
Because the voltage which an LED 'wants' to have across itself varies slightly from LED to LED it means that you shouldn't run LEDs in parallel off a single series resistor. If you do it forces all the LEDs to have the same voltage across them which can cause differing currents between the LEDs. Some will have low currents and some will have high currents. Perhaps too high for there specification limit. |
H: How to design wireless charging coils so they are resonant?
I am continuing from this question: What can I use to increase efficiency of inductive wireless energy transfer instead of factory manufactured ferrite plates?
I am trying to make somewhat efficient wireless energy transfer for charging a 190mAh 3.7V battery. The plan is to use a rectifier, a voltage regulator and a charging IC MCP738312(datasheet) in the device and generate AC at a few hundreds of kHz from a 12V coming from a 1A regulated wall power adaptor in the charger device.
I am making my own coils because of the size I want them to be by etching multiple layers of copper foil:
A new question arose: how do I design the coils so that they are resonant? It would be great to get an answer that would be easy to understand for someone without education in electrical engineering, if that's possible, as much as it is possible.
AI: how do I design the coils so that they are resonant? It would be great
to get an answer that would be easy to understand for someone without
education in electrical engineering, if that's possible, as much as it
is possible.
What you have without resonance is something like this: -
Image source
With a capacitor that resonates the receive coil you get a circuit like this: -
And this magnifies the induced voltage in the receive coil (\$V_{IN}\$ below) because it acts as a very resonant low pass filter like this: -
\$R\$ represents the coil and transmit driver losses.
\$V_{OUT}\$ can be made to peak at magnitudes like this: -
Interactive filter tool
With the values chosen, the circuit resonates at about 411 kHz with an amplitude gain (\$G_P\$) of 77.5 or nearly 38 dB. But, bear in mind, that when loading the circuit and taking real power from it, the peaking may drop to a few dB. However, even 6 dB (a doubling of voltage) is a great benefit for the selection of one or two parallel capacitors to hit the sweet-spot.
Also remember to use high-speed diodes in the receiver power rectifier. Something like the ubiquitous 1N400x type diode is wholly unsuitable because of its reverse recovery time.
You can also do a similar trick for the transmit coil but now, what happens is that you "tickle" a parallel coil and capacitor with a low current and get a much higher current. Sure, it can take several milliseconds to build up but who cares about that? |
H: Why parallel resistor for oscillator?
I have a design with a W65C51S ACIA IC, which uses a 1,8 crystal MHz for serial communication. The clock generation example in the datasheet shows an external 1 MOhms resistor in parallel to the crystal.
It seems that the crystal doesn´t produce any clock signal if the resistor is missing. So what does this resistor do?
AI: The datasheet of the W65C51S doesn't provide enough details to be sure but my guess is that the crystal oscillator circuit inside the IC doesn't have a 1 M ohm feedback resistor.
This is a typical example of a commonly used crystal oscillator circuit:
This is a Pierce oscillator circuit.
My guess is that on the W65C51S the feedback resistor \$R_f\$ isn't implemented.
It might have been impossible or too costly to do so. So an external resistor is needed.
The function of the resistor is to DC bias the inverter such that it has a high gain (large amplification) which is needed to make the oscillator work. |
H: Is the voltage divider in this circuit backwards for what I'm attempting to achieve?
This circuit is from another post (from long ago) where a user helped me build a circuit which would use a BJT as a switch.
simulate this circuit – Schematic created using CircuitLab
The problem was that I needed to lower the voltage on the base pin of the BJT so the user suggested I add the voltage divider (R2, R3).
Target
The original target was to apply 0.5 - 0.7 V on the base pin.
Should Those Resistors Be Flipped?
I've recently begun looking at the circuit again and I now believe that the two resistors should be flipped.
It looks to me like this might put 4.54 volts on the base pin (instead of the @ .5 volts) that the user was trying to get onto the base pin.
I used the AllAbout Circuits voltage divider calculator and it seems to back this up. But, maybe I'm not looking at that properly?
Logically, it seems like you'd have the larger drop connected directly to the base pin too?
Should those two resistors be switched or is this correct? If they are correct, can you please provide a bit of explanation of how to think about this the correct way?
AI: The problem was that I needed to lower the voltage on the base pin of the BJT so the user suggested I add the voltage divider (R2, R3)
That's not really what's going on here, but I guess that's what you're asking about.
To use a voltage divider to lower the applied voltage you'd need a resistor in series with the switch, so that when the switch closed it would be between the supply node and the divider node.
The original target was to apply 0.5 - 0.7 V on the base pin.
Your circuit as drawn should already achieve this, because the transistor itself will limit the voltage on the base pin to ~0.5 - 0.7 V, if you limit the amount of current supplied (which you are doing due to R2)
In the circuit you have, R3 is really just providing a path to discharge the base node when the switch is open. In a MOSFET circuit this would be important if you needed a quick shut-off after opening the switch. In a BJT circuit it's not as important since current can be sunk through the base-emitter junction. But it will still somewhat speed up the shut off. It will also waste about 2.5 mW when the switch is closed.
Edit
Now that you've linked the original question, I can point out that the answer you got there never said this was a voltage divider.
What he said was,
R2 will limit the base current when thet switch is closed. R3 pulls the base low when the switch is open, to ensure the transistor is not conducting.
Which is exactly the same as what I'm telling you now.
You don't need a voltage divider to reduce the voltage at the base of the BJT. If you limit the current (using R2), the properties of the BJT will take care of the voltage for you. |
H: 3.5/3.81 pitch connectors
I've got a device that the manufacturer claims uses a 3.81mm pitch connector. I measured the actual distance between pins, and it appears to be 3.5. I'm now noticing that some connector manufacturers refer to a "3.5/3.81" connector. I obviously don't want to buy the wrong one. If a connector is listed as "3.81mm pitch", is that the same as a 3.5/3.81mm connector? If it matters, I need these connectors for an NI-USB-6001 DAQ
AI: 3.5 is obviously not the same as 3.81, and anything with more than about 2 pins is not going to fit, even if you force it on. Some manufacturers make series which are similar in size (eg. 5mm/5.08mm pitch) and combine the two in their literature because the construction is very similar between the two. When you drill down to the part numbers, they will be different for the two pitches.
I happen have a NI 6216 (different model but the same series) in front of me and the pitch is definitely 3.81mm (0.15") for the 16 pins/15 spaces. It also has mounting ears with captive screws and customized markings.
If you buy NI's terminal blocks you get whatever customization they do, the correct part, and a nifty screwdriver. For a price. |
H: Mosfet LC oscillator
I'm looking at the following circuit:
simulate this circuit – Schematic created using CircuitLab
It consists of an oscillation whose frequency depends on the tank circuit (C1, L1 and L2). When the voltage of the tank circuit reaches 0v the mosfet that was conducting stops conducting and the one that wasn't starts conducting. This process is repeated continuously at the resonance frequency. What I don't understand is how does the voltage at node A or at node B get to 0v?
For comparison, take this circuit:
simulate this circuit
In this case there is AC through the circuit however the voltage across the capacitor is only 0 at time=0s. Afterwards, it starts increasing, but never decreasing, until it reaches the supply voltage where it would stop oscillating.
In the first circuit the continuous change of mosfets conductance results in a steady oscillation instead of it eventually dying as is the case for the second circuit. Still, I'm unable to see how nodes A/B (from the first circuit) get to 0v. I would expect that the mosfet that firsts starts conducting would charge up the capacitor to the supply voltage which would result in killing the oscillation, that however isn't the case.
Thanks
AI: Ringing...In your second circuit, once C is charged to V, there's still current flowing in L. In an ideal world, that will continue to pump C up to 2V, at which point the current reverses and it goes back down to zero. It would repeat indefinitely in an ideal world, but in the real world the AC will be damped out by resistive losses--so your circuit starts again in the other direction every cycle. |
H: Circuit Analysis of an Outlet Tester
I have an Outlet Tester like this:
It is used to see the mains electric connection, it has the next states:
I opened it and then I reversed engineer it. The diagrams I obtained are these:
I would like to make the circuit analysis (Kirchoff's Laws) but I don't know how to apply them in this case, I don't see a well defined voltage source, like in other cases:
I mean, yes, there is a Hot (+) and a Neutral (-), but, what about ground? .. Let's suppose that Hot is 127 Vrms and 60 Hz, How do I apply KVL and KCL here?
AI: First of all, analyzing an AC circuit with purely real ohmic impedances is just as straight forward as analyzing a DC circuit, you just let neutral be ground, and use the RMS voltages and currents as if they were DC values.
In your case you have four basically different circuits, because you have three circuits where one of the terminals are disconnected, these are all unique, and three circuits where all three terminals are connected to some voltage source with the same reference. This means that we need to solve four different circuits individually to find the solution for each configuration.
I will leave "Open Line", "Open Neutral" and "Open Earth" for you to solve, this should be easy now that you know that you need to solve all these three individually.
However it might not be obvious to you how you can solve the remaining three in one go, so I will go ahead and give you a hand.
simulate this circuit – Schematic created using CircuitLab
In the schematic above I have made an abstraction, and avoided thinking of the three terminals as being connected to either line, neutral or earth, and just thought of them all as connected to arbitrary voltage sources V1, V2 and V3, this allowes me to solve the circuit ones, and then substitute the voltage values afterwards to find the final solutions.
When we solve circuits with multiple sources we use the principal of superposition, which to put it in short terms, means that we calculate the voltages and currents that we are interrested in as a function of each source individually, and then we add those results together in the end to get the final solution with all the sources acting on the circuit. This is always valid to do if your cirucit is linear.
For voltage sources, when they are not part of the particular solution being calculated, they are shorted. So to calculate the solution we get with only V1 we do as follows.
simulate this circuit
Let's reference the currents in all the resistors in the direction going from the top to the bottom of the diagrams, and let's reference the voltages accordingly, going from the top down, I will call the currents in the resistors I1, I2 and I3, to denote the currents in resistors R1, R2 and R3.
In the diagram above, where we only considder V1, the currents are as follows;
$$I_1=\frac{V_1}{R_1}$$
$$I_2=\frac{V_1}{R_2}$$
$$I_3=0$$
Now the diagram drawing tool is really cumbersome, so I wan't draw all the diagrams, but the soluting when considdering V2 and V3 are:
$$I_1=-\frac{V_2}{R_1}$$
$$I_2=0$$
$$I_3=\frac{V_2}{R_3}$$
$$I_1=0$$
$$I_2=-\frac{V_3}{R_2}$$
$$I_3=-\frac{V_3}{R_3}$$
Now we add the solutions together:
$$I_1=\frac{V_1}{R_1}-\frac{V_2}{R_1}$$
$$I_2=\frac{V_1}{R_2}-\frac{V_3}{R_2}$$
$$I_3=\frac{V_2}{R_3}-\frac{V_3}{R_3}$$
Above is the final solution of the KVL/KCL analyzis, for the three circuits where all terminals are connected.
Now to find the particular solutions for the three individual configurations we just substitute V1, V2 and V3 with the voltages of the terminals that they are connected to, for this purpose we considder neutral and earth to both be at 0V, and line to be at Vl.
Line/Earth Reversed
$$I_1=\frac{0}{R_1}-\frac{0}{R_1}=0$$
$$I_2=\frac{0}{R_2}-\frac{V_l}{R_2}=-\frac{V_l}{R_2}$$
$$I_3=\frac{0}{R_3}-\frac{V_l}{R_3}=-\frac{V_l}{R_3}$$
Line/Neutral Reversed
$$I_1=\frac{0}{R_1}-\frac{V_l}{R_1}=-\frac{V_l}{R_1}$$
$$I_2=\frac{0}{R_2}-\frac{0}{R_2}=0$$
$$I_3=\frac{V_l}{R_3}-\frac{0}{R_3}=\frac{V_l}{R_3}$$
Correct
$$I_1=\frac{V_l}{R_1}-\frac{0}{R_1}=\frac{V_l}{R_1}$$
$$I_2=\frac{V_l}{R_2}-\frac{0}{R_2}=\frac{V_l}{R_2}$$
$$I_3=\frac{0}{R_3}-\frac{0}{R_3}=0$$
Since we are dealing with AC we don't care if the sign is positive or negative, as this just means that the AC waveform is phase shifted 180 deg, and we only care about the RMS values in this case.
If we match the solutions above with your original truth-table, we see that they match up, indeed the solution gives us currents in the lamps that we are expecting.
Now as I sayed I will leave it for you to solve the remaining three where one of the terminals are disconnected, for these you need to do the same thing that I did, but just leaving the disconnected terminals floating throughout the calculations, so for example when Line is disconnected, R1 and R2, and their lamps, will be in series. |
H: Latching Switch Pinout
I'm planning on incorporating a latching switch into my design:
https://lcsc.com/product-detail/Electrical-Switches_XKB-Enterprise-XKB8080-Z_C318860.html I also found the corresponding datasheet: https://datasheet.lcsc.com/szlcsc/1912111437_XKB-Enterprise-XKB8080-Z_C318860.pdf However, the pinout is really confusing to me and I honestly don't understand how to connect it properly:
Any help would be appreciated.
AI: On their website http://www.helloxkb.com they have seemingly the same switch with different heights.
If so, the diagram of the XKB8585-X-140 and the XKB8585-X-110
should equal the diagram of the [XKB8585-X-150] and the XKB8585 with bigger heights(http://www.helloxkb.com/uploads/ajkg/XKB8585-X-150.pdf)
Note the XKB5858-X-80 has drawn the solid and dashed lines differently.
If they are consistent in their drawing, based on the drawing above, on can conclude for the XKB8080 that:
pin 3 and pin 4 are common indeed.
since the drawing XKB8080 has no dashed lines, no conclusion can be drawn which connection is made when released and which when pushed.
You could try their chat or pick one of the other key switched with slightly better documentation. |
H: Schottky diode / Rectifier Diode difference and how to test them?
I have 3 diodes that I would like to test
1x USD935
2x USD2009
USD935 is identified by its datasheets as a "Power Schottky Rectifier Diode". I cannot find the datasheet of the USD2009 but they have similar test readings. So I'm assuming they are also a "Power Schottky Rectifier Diodes"
I am a bit confused by the name, as I thought a Schottky diode and Rectifier Diode were 2 different things. (different symbols).
Some make a distinction between the 2 , others say that a Schottky diode can be used as a rectifier.
To add to the confusion, I have them out of circuit and read that they can be tested using a multimeter in Ohms mode, as well as using the Diode function of the multimeter.
I tested them and got the following results
Diode test
black lead kathode / red lead anode : 0.18v (beep)
Black lead anide / red lead kathode : OLD
Resistanse test
black lead kathode / red lead anode : 170k ohm
Black lead anide / red lead kathode : 1k ohm
In terms of interpreting the results I found the following :
In How to Test a Diode Rectifier a forward voltage of 0.5 to 0.8 volts is mentioned when using the diode function of the multimeter. (mine is only 0.18v).
They also say that with the resistance test (black lead on the anode and the red lead on the kathode) there should be an OL where instead I have 1k ohm.
In How to Test a Schottky Diode it is mentioned that Shottky diodes can be tested using the continuity test on the diode. Is that the case ? With mine there is no continuity between the anode and kathode.
Are my diodes bad, or am I misinterpreting the test-results / executing the test in the wrong way?
AI: Looking at how Microsemi makes part numbers
USDaavv aa is the Max Amps and vv is the reverse V rating
so USD2009 20A 9V is obsolete.
Diode, Rs is inverse to Imax but V=0 capacitance increases with Rs such that in same voltage family Rs*C = constant.
The way to test them is to pulse current thru them and measure peak voltage drop @ 25'C or so a VI plot with pulses so temp. rise does not reduce Vf much.
They should all be 0.3V @ 1A but different at 10A.
Being metallized on one electrode Schottky diodes are approx 50% of Vf of Silicon Diodes but much higher leakage Rp. |
H: How to increase output voltage of an op amp well above the supply voltage
I have a circuit which produces a (not high speed) signal between 0 and 9 volts with an adjustable slope, and I would like to increase this output voltage to between 0 and 200 volts, which keeping it ground referenced.
Currently, I am using a PNP transistor connected as a common emitter, which is controlled by an NPN transistor and the output of the lmv358 op amp (the spice model I'm using comes from this website. Here is the schematic in LTSPICE:
Everything works as expected when I run an operating point simulation, but when I try a transient simulation, I get huge oscillations and the simulation rarely has time to finish:
(this is the voltage accross R3; it should be 4 volts).
What have I done wrong? I haven't been able to find similar circuits online, which suggests that maybe I'm missing something sort of obvious. How is something like this usually done?
Thanks!
AI: You’ve added a whole lot of gain and some phase shift, both of which negatively affect closed-loop stability, notwithstanding the internal compensation in the op-amp. How it is done depends on the requirements, frequency response and load driving capability in particular. Driving piezo actuators, for example, is more challenging because they are capacitive and add even more phase shift.
Speaking of the op-amp, you are applying almost double the absolute maximum supply voltage of 5.5V to it, so it would likely fail instantly in real life. |
H: Upgrading Xiaomi HIMO C20 battery
Does any one know what is the charger port is for Himo C20 Ebike battery?
I ordered mine it's on its way now I couldn't find the information online.
Also I was wondering if I can add this battery to my Himo C20.
Aliexpress - 36V 20Ah E-Bike Battery 18650 Lithium ion Frog Batteries For 36Volt Bafang 500W BBS02 250W BBS01 TSDZ2
They are both 36 volts but Himo C20 battery is 10ah and this one is 20ah is that gonna be a problem?
Also how do I do it? Should I just connect the second battery's discharge cable the main battery's charge port?
AI: As long as your ebike controller doesn't check if the "correct" (original) battery is installed you shouldn't have an issue replacing the 10ah battery with the20ah battery. If however it does check you could theoretically swap the BMS from the 20ah to the 10ah battery but this will most likely not be needed.
The difference in capacity shouldn't be an issue (when using both batteries) as long as both batteries (or at the least the smaller capacity battery) have a BMS (battery management system) or PCM (protection module) with a low voltage cutoff function (to prevent the cells from overdischarhing). |
H: Two devices from a common power supply
I would like to supply two devices from a single power supply. The devices are connected to the power supply in parallel. Device1 uses a much higher current than device2. The power supply can safely handle the combined current draw. My question is if say device1 starts to draw a current (i1, which is larger than device2 can handle), will that current i1 be 'pushed' to device2 and damage it?
AI: No.
A power supply connected to two devices is perfectly fine if power supply can supply enough current to power up both devices simultaneously.
That's how all ac appliances are wired up. Your bulb is in parallel with your air conditioner and they work fine together.
Problem might occur when one device gets damaged and it further damages the power supply (rare chance because typically power supplies have short protection. things should start working fine if you disconnect the faulty device). In this case your second device might not get sufficient power to perform its tasks correctly. |
H: Electromagnetic door locks in series or parallel
I am planning to add two 12V electromagnetic door locks to a door. Should they be connected in series or parallel to the power supply? Or is it advised for each to have its own power supply?
The Power supply is a 24V power supply.
AI: If it's a 12V power supply, then connect them in parallel, or use two power supplies if that's easier.
If it's a 24V DC power supply, and the locks are identical, then connect them in series.
If they are AC locks, or not identical, then connect each to their own supply. |
H: How to control ESP-05 power using Arduino (both are 3v3 devices)
I have ESP-05 connected to Arduino Pro Mini. Both are 3v3 devices. I need Arduino to power on/off ESP-05 device using GPIO when needed. Please suggest.
I tried to use N Mosfet but that did not work possibly because example is with different power supplies.
AI: You're on the right track, but what N-FET did you use?
First: how much power?
The article here suggests you might need to switch 500 mA. ESP8266EX has a typical transmit current of about 170 mA and no listed maximum.
You don't say how much time you'll have the ESP-05 enabled nor how much power you can allow during its off-time.
Second: What threshold voltage?
Fundamentally an nFET is a voltage controlled switch. The level at which it switches is the VGS(thresh) and you need one which will switch at 3.3V, often called a "3.3V logic-level MOSFET" (watch out for those which are good for 5V logic). Many FETs, especially those for larger currents and voltages, have a much higher switching threshold.
Two questions about this specifically:
https://electronics.stackexchange.com/a/106443
https://electronics.stackexchange.com/a/235680
Sparkfun shows modules for which might immediately do what you need, if you don't mind using a ready-made module. Seach for MOSFET on that site.
One product there uses FDS6630A which has VGS(thresh) of min=1.0V, typ=1.7V, max=3.0V.
Once you've chosen a MOSFET, you look for examples for the details of its required current limit and bias resistors. (You won't need the diode of your example circuit, that's for the back-EMF of the inductive load.) The FDS6630A example above uses
Source: Sparkfun documentation
Other possibilities
SLEEP The ESP8266EX has various sleep modes its various sleep modes is 15 mA down to 0.5 μA according to its datasheet. You can enable these with AT commands, and perhaps that will work for your application.
RESET Some ESP-05 models have a 5-pin connector with RESET signal. If you assert this, I'll guess the power consumption will be very low (but couldn't find a value in the documentation) and perhaps that would work for you.
Article about ESP-05 https://blog.startingelectronics.com/esp8266-esp-05/
ESP-05 chip is ESP8266EX: datasheet
ESP8266 AT Commands manual |
H: Need a method for synchronization of galvanically separated microcontrollers
I would like to get some ideas for my problem. I have a HW which has a main processing unit (Beaglebone, host controller) which is connected to four galvanically seperated STM32 microcontrollers. All of the STM32 microcontrollers are doing analog measurement with the same sampling frequency (100ksps). The STM32 mcus are doing the acquisition and the Beaglebone collects the data over SPI and evaluates it. The acqusition is started on all of the microcontrollers almost the same time. I would like to run the measurements over multiple hours. All STM32 has a 16MHz external crystal for clock source, with PLL the core is running at 100MHz. But because the crystals have tolerance the sample points will be shifted between the stm32 microcontrollers. After some minutes the differences are significant. It would be nice if the delay between the microcontrollers would be between +-10us - 100us.
The acquisition is continuous. I do not want to miss any samples.
Question 1: is there a method to do sampling correction/syncronization between the microcontrollers? Can you suggest a literature in this topic?
Question 2: if hardware redesign is possible, currently I am thinking in software solution, how can I put syncronization between the seperated microcontrollers?
Remark:
what if the main processing unit measures somehow the delay between the microcontrolers. Then it sends a number to each of the microcontroller about how much is the difference referenced to an ideal frequency (sampling frequency or the operation frequency of the host). And then each microcontroller would change the sampling frequency a bit (100.1ksps or 99.9ksps). Something like this is in my mind. Can this work? Did anyone do something before?
Every comment are welcomed!
AI: Both of these work on the idea that there is at least some delay in the sample loop of the slaves, which could be adjusted to make the slowest slave catch up with the fastest. That is, that there's a software timer which triggers an individual capture of the ADC.
Pure software You could read about the Network Time Protocol, and borrow/adapt as much of it as you thought necessary. At base, a master sends out time signals and the slaves calibrate themselves by a (software) phase-locked loop. With dedicated microprocessors and SPI communications, those mechanisms should get your your accuracy.
Explanation of NTP mechanisms Documentation, Presentation. NTP has quite a number of modes. The ones which might have mechanisms you can borrow are making the control host a fake reference clock (deemed to be correct) and having the slaves work like broadcast clients (even if they are receiving the messages one at a time). The main thing to read about is the clock discipline algorithm, which explains how the client gets its clock in sync with the master.
I'd consider using one of the STM32s as a clock master, and the host controller gets a nominal time from that, rather than using the host controller's clock. This is because we're not trying to sync the slaves to the real time, we're trying to remove time skew from the multiple samples. (As far as I've understood your goal.)
If you find you want to do it according to standards, NTP is defined as an internet RFC 5905, though you might want to also read the earlier versions which are a bit simpler. You might also want to look at PTP (precision time protocol), which is an IEEE standard IEEE Std 1588-2002. It's much more accurate, also much more complex, and much more expensive!
At the higher end of your resolution (0.1 ms), it should be entirely possible to simply get the host to tell each slave periodically "the time is X ns", and leave them to sample on X % 10000 = 0. All the jitter will be in the host controller. Assuming Linux kernel, you'll need to read clock_gettime(3) and pay attention to CLOCK_MONOTONIC or perhaps CLOCK_MONOTONIC_RAW settings.) The only thing to fret about is how to deal with a slave smooths the changing of its clock so it doesn't miss any sampling: I'd guess you can just sample "right now" if you have to jump. It depends on how much spare time the slaves have between samples.
Hardware If you can afford a wire and an input on the slaves (and the additional isolation), run an extra wire to tell all the slaves to sample. If that generates interrupts on the slaves, they will be about as synced as it's possible to get in software, and could be much better than your target. The optimal syncrhonisation (given in Jeroen3's answer), is to trigger the ADC capture directly from an IO pin. |
H: BAT60A diode allows reverse voltage
I have designed a board and it can be supplied by USB and/or D-Sub connector. The board gets the 5V from USB or another board via D-Sub connector.
I have placed 2 Schottky diodes to prevent reverse voltage between these 2 connectors in case of they are both connected.
This is the circuit:
USB 5 V and connector 5 V both enter diodes and they get connected as 5 V on the cathode side of diodes. My first question is, does this circuit make sense?
I have supplied the board via USB and checked the D-Sub diodes anode voltage. It was same as cathode. Don't the diodes block the voltage? I placed them for this purpose.
I assumed there is a mistake on my PCB and tried the circuit on a breadboard.
This is the first circuit I have tried:
I have read 4.9 V on the cathode of diode.
This is the second circuit I have tried.
I have supplied 5 V from the cathode of diode to check does it allow reverse voltage. I have read 5 V on the probe.
After that I have reversed the diode to see what happens.
I do not understand why it behaves this way. This is the datasheet of the diode.
What I was expecting was when I applied the 5 V to the anode, I would see 4.9-4.8 V on the cathode. This part is ok. If I apply 5 V to the cathode, I should read 0 V since the diode won't allow any voltage/current to that way. Is there something wrong with my circuit or did I misunderstand the behaviour of the diode?
AI: Starting at the bottom with the 1.5 volts being developed across the 3k3 resistor when fed 5 volts via a reverse connected BAT60A. Look at the data sheet: -
The reverse current might be (say) 0.5 mA and, that current forced into a 3k3 resistor produces a volt drop of 1.65 volts. Just throwing numbers together.
Prior to that you did an open circuit test of a reverse biased BAT60A and you saw the same voltage at the output and input. Should this surprise you given that schottky diodes have high leakage current and your meter might have an input impedance of 10 Mohm?
Doesn't the diodes block the voltage?
They don't block reverse current or voltage anywhere near as well as regular silicon diodes but, regular silicon diodes have a larger forward volt drop. |
H: How do I calculate the average voltage of this wave?
I need to calculate the average voltage of the wave below, the DC voltage is 120 V , the curve starts at 21.65 degrees and the peak voltage is 325.269 V. The solution is 221.3 V. This is from a uncontrolled full-wave bridge rectifier with RE load, the source is 230V rms at 50Hz, R=2 ohm and E=120V. I tried calculating the average voltage of the rectified sine wave and subtracting the average voltage of the portions before the curve starts.
AI: Here's a more mathematical approach to your problem. I understand your graph as the flat parts are at 120V. We can divide the area of the half period into a DC part before and after the sine wave (green) when the sine voltage is higher than 120V (blue).
We start by finding the angles, \$\theta_1\$ by setting the sine voltage equal to the dc voltage and \$\theta_2\$ by symmetry:
\begin{align}
V_{dc} = \sqrt{2} V_{RMS} * sin(\theta_1) \rightarrow \theta_1 &= sin^{-1} \left( \frac{V_{dc}}{\sqrt{2} V_{RMS}} \right) \\\\
\theta_2 &= \pi - \theta_1
\end{align}
Using \$V_{dc}=120V\$ and \$V_{ac}=230V\$, we get the values \$\theta_1 = 21.649^o \$ and \$\theta_2 = 158.35^o\$. We then calculate the average voltage from the basic formula:
\begin{align}
V_{avg} &= \frac{1}{T_p} \int^{T_p} v(t) d \theta \\\\
&= \frac{1}{\pi} \left[ \int_0^{\theta_1} V_{dc} d \theta + \int_{\theta_1}^{\theta_2} \sqrt{2}V_{ac}sin(\theta) d \theta + \int_{\theta_2}^\pi V_{dc} d \theta \right] \\\\
&= \frac{1}{\pi} \left[ V_{dc} \theta \bigg\rvert_0^{\theta_1} - \sqrt{2}V_{ac}cos(\theta) \bigg\rvert_{\theta_1}^{\theta_2} + V_{dc} \theta \bigg\rvert_{\theta_2}^\pi \right] \\\\
&= \frac{1}{\pi} \bigg[ V_{dc} (\theta_1 + \pi - \theta_2) - \sqrt{2}V_{ac}\Bigr(cos(\theta_2) -cos(\theta_1)\Bigr) \bigg] \\\\
&= \underline{\underline{221.33V}}
\end{align} |
H: ATTiny1616 writing the SUT fuse in SYSCFG1 with AVRDude Command Line
I want to write the SUT fuse in SYSCFG1 to be 0x0 for 0ms startup time as per page 40 of the datasheet:
http://ww1.microchip.com/downloads/en/DeviceDoc/ATtiny1616-3216-DataSheet-DS40001997C.pdf
I am using the following command to look at the ATTiny1616 fuses but I am not sure which fuse I should write as I don't see any named SYSCFG1:
avrdude.exe -c jtag2updi -p attiny1616 -P com9 -U fuses:r:-:i -v -C ..\etc\avrdude.conf -b 19200
Which is giving me the following output:
avrdude.exe: Version 6.3-20190619
Copyright (c) 2000-2005 Brian Dean, http://www.bdmicro.com/
Copyright (c) 2007-2014 Joerg Wunsch
System wide configuration file is "..\etc\avrdude.conf"
Using Port : com9
Using Programmer : jtag2updi
Overriding Baud Rate : 19200
JTAG ICE mkII sign-on message:
Communications protocol version: 1
M_MCU:
boot-loader FW version: 1
firmware version: 6.00
hardware version: 1
S_MCU:
boot-loader FW version: 1
firmware version: 6.00
hardware version: 1
Serial number: 00:00:00:00:00:00
Device ID: JTAGICE mkII
AVR Part : ATtiny1616
Chip Erase delay : 0 us
PAGEL : P00
BS2 : P00
RESET disposition : dedicated
RETRY pulse : SCK
serial program mode : yes
parallel program mode : yes
Timeout : 0
StabDelay : 0
CmdexeDelay : 0
SyncLoops : 0
ByteDelay : 0
PollIndex : 0
PollValue : 0x00
Memory Detail :
Block Poll Page Polled
Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack
----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- ---------
signature 0 0 0 0 no 3 0 0 0 0 0x00 0x00
prodsig 0 0 0 0 no 61 61 0 0 0 0x00 0x00
fuses 0 0 0 0 no 9 0 0 0 0 0x00 0x00
fuse0 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse1 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse2 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse4 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse5 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse6 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse7 0 0 0 0 no 1 0 0 0 0 0x00 0x00
fuse8 0 0 0 0 no 1 0 0 0 0 0x00 0x00
lock 0 0 0 0 no 1 0 0 0 0 0x00 0x00
data 0 0 0 0 no 0 0 0 0 0 0x00 0x00
usersig 0 0 0 0 no 32 32 0 0 0 0x00 0x00
flash 0 0 0 0 no 16384 64 0 0 0 0x00 0x00
eeprom 0 0 0 0 no 256 32 0 0 0 0x00 0x00
Programmer Type : JTAGMKII_PDI
Description : JTAGv2 to UPDI bridge
M_MCU hardware version: 1
M_MCU firmware version: 6.00
S_MCU hardware version: 1
S_MCU firmware version: 6.00
Serial number: 00:00:00:00:00:00
Vtarget : 5.0 V
avrdude.exe: jtagmkII_initialize(): Cannot locate "flash" and "boot" memories in description
avrdude.exe: AVR device initialized and ready to accept instructions
Reading | ################################################## | 100% 0.16s
avrdude.exe: Device signature = 0x1e9421 (probably t1616)
avrdude.exe: reading fuses memory:
Reading | ################################################## | 100% 0.28s
avrdude.exe: writing output file "<stdout>"
:09000000000002FF00C70300002C
:00000001FF
avrdude.exe: safemode: Fuses OK (E:FF, H:FF, L:FF)
avrdude.exe done. Thank you.
Is it possible to write the SYSCFG1 fuse with a command parameter like:
-U <fusenamehere>:w:0x0:m
Or do I need to look at some other way of doing this?
EDIT
Some more background. I have been using the Arduino IDE to write the programs and program the 1616 with ElTangas' jtag2updi on an Arduino UNO.
AI: I have discovered in the boards text for the board defintion in the Arduino IDE the following line:
atxy6.bootloader.SYSCFG1=0x03
So I have been able to amend this line to set the fuse as required.
EDIT
Well I can only give more detail from a windows perspective:
I found this file by opening the Arduino IDE. Going to File => Preferences.
In the dialog that opens you will see at the bottom a link to your preferences.txt (e.g. C:\Users\User.Name\AppData\Local\Arduino15\preferences.txt. Click this and it opens location of the file in file explorer.
From here go into: packages => megaTinyCore => hardware => megaavr => 1.1.4 (or whatever version you have).
In this folder you will see boards.txt.
Close the arduino IDE and then edit boards.txt. In this file you can find the line: atxy6.bootloader.SYSCFG1=0x03. This is the line I changed to atxy6.bootloader.SYSCFG1=0x00 to change the SYSCFG1 fuse for SUT0.
Hopefully this is a little more helpful. |
H: BT136 inner resistance
I found two datasheets for the BT136 triac:
Datasheet one
Datasheet two
But those datasheets didn't mention the inner resistance of the triac (or I couldn't find it.)
What's the resistance between pin T1 and T2 of BT136 triac when the gate is activated?
Edit:
I found another datasheet which mentioned the resistance:
If I pull 2 A from the BT136 what the resistance will be? how to calculate it?
AI: What you might be looking for is this: -
On-resistance isn't quoted for triacs because they are highly non-linear when \$V_T\$ drops to around a volt or so (unlike MOSFETs in their "ohmic" region). |
H: Is volume controlled through a potentiometer?
Eletronics newbie here.
I am building my first prototype (using an Arduino) that includes a volume knob. I want to know if volume is controlled by a potentiometer because I saw this video and it got me curious how a device like that can handle audio so easily.
So the question is: the majority of equipment today that have a volume knob, control the volume through a potentiometer? i.e the greater the resistance, less volume I will have in a speaker?
If so, why? Does that means the speaker will vibrate with less intensity?
AI: OK, I think there's many questions "hidden" in this one.
First of all, yes, lower volume means that the amplitude of your speakers vibrations is lower.
Why? Because the device with the knob is designed to change the way it operates the speaker when you turn the knob.
That can be as directly as "the potentiometer is used as a series resistor, so when that resistor has a higher value, less current flows". But, honestly, that's not going to happen in any practical device (aside from maybe headphones), since that means that instead of telling your amplifier to produce less amplitude, you take the high-amplitude output of the amplifier (which you used up power for!) and then attenuate it. Bad idea. That's like buying a fast car, and instead of letting go of the gas pedal, you just throw out an anchor when you enter a residential area because you want to go slower...
However, it's fine when used in a line-level audio connection - there's no amplifier really driving that, and the potentiometers are just used as voltage dividers, so that if \$V_\mathit{out}\$ and \$V_\mathit{is}\$ are respectively the output and input voltages,
$$
V_\mathit{out} = V_\mathit{in} \cdot C,\:\text{ with }\:C < 1.
$$
So, in most devices, a potentiometer controls the gain of that amplifier, i.e. how much it amplifies. That, again, can be a pretty direct thing – for example, you could "pre-attenuate" the input with that potentiometer, effectively reducing the gain. Or, it can be pretty complicated, if the amplifier is more complicated and allows you to actually modify its amplification.
Or, and that will be the case for many, if not most, modern Hifi components: that knob isn't actually a potentiometer, but just something that counts the times you turn it by a specific angle. Then, some controller takes that count, and calculates what it should mean ("the user turned the knob 10 times, so increase gain by factor so and so"), and adjusts what the amplifier does ("increase the supply voltage to the amplification stage; change the transfer function of the digital preprocessing and make the negative feedback less sensitive"). It really depends. |
H: Shared bus in FPGA (arbiter + peripheral bus) [VHDL]
I am trying to implement shared bus in my fpga design. I am thinking about something similar to the microcontroller bus.
I see two possibilies:
Second option is easier to implement but if bus is wide it will be more resources used.
Something which is in my opinion optimal for my requirements is proposed in "Option 1". This approach requires three state buffers. Do you think it is achievable on FPGA ? Does anybody have some examples of code for design like this ??
Best regards,
Kamil
AI: As FPGAs* do NOT support on-chip tri-state drivers you can not implement option-1 on them.
You should go for the MUX version.
*At least I don't know any FPGA of reasonable size which still has them. |
H: How to run a circuit with both 5V and 3V3 supply voltage?
I'm currently designing a circuit requiring 3V3 (an ARM MCU) which should run on both 5V and 3V3 input.
Since the power requirements are fairly low, a linear voltage regulator should suffice.
I want to use L78L33 but I cannot find information regarding the voltage drop and minimum voltage requirement. Especially the graphs on page 26 only specify output characteristics of L78L05/12/24 but not L78L33.
Which regulator can be used to provide 3V3 with input voltage as low as 3V3?
AI: 78Lxx Datasheet does show dropout vs current:
Note the 78Lxx (and 78xx) series chips set output voltage via their internal feedback resistor divider (see datasheet p. 3, R10/R11 on schematic) which is pretty much the only difference between all the output voltage variants in the series. So it is safe to assume the dropout voltage from 78L05 on the graph will be the same for 78L33.
EDIT: I should have read the datasheet a bit better. It's only a typical value, there is no maximum dropout specified, and both 3.3V and 5V versions spec 2V typical dropout in the characteristics table, which disagrees with the graph.
So you'll have to use a LDO like this one.
If you have two different power inputs for 3.3V and 5V then you can route the 5V input through a regulator to make 3.3V, and route the 3.3V input directly to the circuit, bypassing the regulator. Then use the appropriate power input. This is the best solution.
If you have only one power input then you'll need a regulator with very low dropout voltage. Losing 50-100mV on 3.3V shouldn't be too much of a problem (check the datasheet of your micro and other chips you use for allowed voltage range, and pay special attention if you use VCC as ADC reference).
You can filter and sort LDOs by dropout voltage on digikey.
However, be aware that a 3V3 LDO which is powered from 3V3 will be in dropout mode, it will not regulate the output voltage. It will essentially be a fully turned on FET in series with the supply, ie pretty much a resistor, without any PSRR or voltage regulation.
Vocabulary notes:
1) Dropout voltage is the minimum difference between input voltage and output voltage to maintain proper regulation according to datasheet specs.
2) When the regulator is "in dropout" it means the difference between input and output voltage is too low for it to properly regulate. The output voltage will drop below spec, and the pass transistor will be saturated (if it's a BJT) or fully turned on and behave like a resistor (if it's a FET). The error amp will also be clipped. In this state the LDO no longer functions and does not honor its specifications, there is no regulation and PSRR is non-existent. |
H: Matching S22 with a metal plate at the output
So assume we have a highfrequency device which has a missmatch at S22. Some of my colleagues solder a little round metal plate, placed on top of the signalpath it self (shortly before the SMA Connector) to improve S22 by 5 to 10dB.
My question is, why is this improving the signal that much?
Is it behaving like a capacitor? Does it depend on the resonance frequency?
AI: If the metal plate is 'little', then it's behaving like a small capacitance.
If the connection has excess inductance, or in other words is high impedance, then this extra capacitance can form a low pass filter with the inductance to match it across the frequency range of interest.
Ask your colleagues how they knew where to add the extra capacitance. It may be that that particular assembly always needs a bit of extra C there. Or they may have measured the S22, and noticed some ripple, with a frequency that told them how far the defect was from the connector, and a phase that told them whether it was high or low impedance. They may have measured the S22 with a TDR, which basically does the sums of the last sentence for you. Or they may have been dabbing a bit of extra C around experimentally, to see if anything improved the S22 (it's not illegal and it's quick to do, I'm not ashamed to do it!) |
H: How to use analog mode GPIO pin(not ADC input channel) for ADC?
I want to use a GPIO pin which is configured to be "Analog Mode" for ADC.
I am working on STM32L073 series microcontroller. The pins with ADC input channels
are used already. So I need to choose another pin to use ADC.
I could not find any information about how to use the analog mode gpio pin for ADC.
Is there anyway to configure a GPIO pin other than the pins with ADC input channels for ADC?
AI: The pins with ADC input channels are used already.
The analog mode for a GPIO pad is just a multiplexer setting. You still need the internal wiring to the ADC, which is only available for pins specified with an ADC channel marked ADC_INxx as additional function in table 16 of the datasheet. |
H: How can we measure the quality of a capacitor?
There are various brands of capacitors on the market. Made in China, made in Taiwan, Korean and Japan brands.
Although the values of the capacitors are the same (eg. 35 volts 2200 uf) some capacitors come out more robust and longer life.
How can I measure the difference in quality?
I can measure the capacitance with a multimeter, and I can measure the ESR with an LCR meter. How else do you check?
For example, I cannot test the operating voltage. It says 35 volts, but is it really 35 volts?
AI: Some of the common causes of capacitor failure are due to voltage and current overloads, high temperature and humidity, shock, vibration pressure, frequency effects, and aging. The voltage overload produces an excessive electric field in the dielectric that results in the breakdown and destruction of the dielectric. The current overload caused by rapid voltage variations results in current transients. If these currents are of sufficient amplitude and duration, the dielectric can be deformed or damaged, resulting in drastic changes in capacitance values, and thus leading to equipment malfunction. The high temperatures are mainly due to voltage and current overloads. The overheating and high temperatures accelerate the dielectric aging. This causes the plastic film to be brittle and also introduces cracks in the hermetic seals. The moisture and humidity due to severe operating environments cause corrosion, reduce the dielectric strength, and lower insulation resistances. The mechanical effects are mainly the pressure, variation, shock, and stress, which can cause mechanical damages of seals that result in electrical failures. Aging deteriorates the insulation resistance and affects the dielectric strength. The aging is usually determined by shelf-life; information about aging is supplied by the manufacturers.
For e-caps the most common lifespan spec is the accelerated life-test of hours @ temp somewhere between 85'C to 115'C. where MTBF x2 for every 10'C drop down to 25'C based on Arrhenius Law and standard test methods.
Knowing how to verify quality means you understand what can make them fail and how to measure MTBF. It means accelerated failures with operating near rated voltage, low ESR circuits, high ripple current, high temperature, high vibration, high solder thermal shock to understand how to measure and verify if the MTBF is acceptable.
If you understand how to perform DVT's on anything and how to do failure analysis on any component down to the Root Cause and how to measure confidence levels of MTBF, then you will have begun to learn how to compare quality on capacitors.
First-Tier Caps
Even the Japanese manufacturers include some mainstream lines in their portfolios, which aren't as good as their top-of-the-line products. So, in addition to the brand, we always take a closer look at the product family and its specifications to better judge capacitor quality and to make a rough estimation of their lifetime.
All Japanese caps are considered of high quality, and we like to see the following cap brands:
Rubycon
United Chemi-Con (or Nippon Chemi-Con)
Nichicon
Sanyo/Suncon
Panasonic
Hitachi
FPCAP or Functional Polymer Capacitor (ex-Fujitsu caps segment, which was bought by Nichicon)
ELNA
Besides Japanese manufacturers there are also several US and European vendors that make high-quality capacitors. Probably we won't meet any of the below cap brands inside a consumer grade PSU, at least their electrolytic offerings, but we decided that it still worth mentioning them.
Cornell Dubilier (USA)
Illinois Capacitor (Currently owned my Cornell Dubilier)
Kemet Corporation (USA)
Vishay (USA)
EPCOS (TDK company, Germany)
Würth Elektronik (Germany)
Second-Tier Caps
On this list you will find capacitors made by some of the Taiwanese manufacturers, which often use factories in China. These caps perform well, so they are usually used in mid-level PSUs and sometimes even in high-end units, and they strike a balance between good performance and affordable prices.
Taicon (belongs to Nichicon)
Teapo
SamXon (except GF series which belongs to a lower Tier)
OST
Toshin Kogyo
Elite
Third-Tier Caps
These third-tier capacitors, according to information from various PSU manufacturers and people with knowledge of RMA statistics, along with our own experiences with caps, might not be among the best choices, but are still a grade above the caps that belong to the last category.
Jamicon
CapXon
Fourth-Tier Caps
This group includes the rest of the capacitor brands. When you see one of these brands in a contemporary PSU, you’ll know that the manufacturer set lower-cost production as a priority instead of reliability over time. We are listing only the popular cap brands that are usually found in low-cost PSUs, but we are well aware that many other low-cost cap brands exist and there is a good chance that you'll find them in non-branded PSU, and even in some branded units.
G-Luxon
Su'scon
Lelon
Ltec
Jun Fu
Fuhjyyu
Evercon
ref |
H: Understanding PLL VCO Integrator Phase-shift
In many PLL phase loop theory discussions, it's often said that the VCO acts as an integrator and therefore has a 90 degree phase shift. I've seen derivations of the VCO transfer function and this image (taken from here) is particularly enlightening:
Here we see the integrating behaviour of the VCO where Vcontrol is integrated to produce a phase that rotates forever around the time axis.
So, $$\theta(s)=K_{vco}\cdot \frac{V_{control(s)}}{s}$$
What I'm having problems with is the "90 degree phase shift" part. I understand that integrators have a 90 degree phase shift and the classic example is the RC low-pass filter. Here the phase shift between input and output voltage can be understood by the voltage/current phase relationship of the capacitor.
But, I'm struggling to understand the 90 degree phase difference of the VCO in a similar intuitive way (especially since the product of the integration is phase). I assume it's between the phase output and some reference. But, I'm struggling to see what that reference is. Is it the control voltage? But, then that's a DC voltage, right? Can anyone help me out?
AI: In the time domain, the VCO output is
w(t)=w,n + Ko*Vc(t) with VCO constant Ko and control voltage Vc(t)
For Vc(t)=0 the nominal frequency is w,n.
With w=d(phi)/dt
we arrive at an integral function for phi(t).
Applying the Laplace transform, we have
PHI(s)=Ko*Vc(s)/s.
That means: The 90 deg phase shift is between the VCO phase and the control voltage Vc(t). Note this control voltage is not a DC voltage but can vary - in particular during the lock-in process. Even under locked conditions Vc(t) is not a fixed DC voltage but swings (a little) around the "locked" point. |
H: Permeability Discrepancy of an Inductor
Background:
I bought a material 77 ferrite rod for a homemade inductor. The core was 0.5" in diameter and 7.5" long with a claimed initial permeability of 2000.
When I recieved it, I tested it out using 18 AWG wire that I wrapped around the ferrite core for the entire length. Granted, the windings were not perfect and had some gaps between parts of the wire and the ferrite core (probably 1 cm max),
Upon testing the inductor with my LCR meter, I measured a mere 0.04 mH.
QUESTION:
How come my inductor isn't exhibiting a relative permeability of 2000?
Here are a few pictures of my set up:
AI: You can find some calculators to allow you to approximate the inductance of coil wrapped on an open rod. If I plug your numbers into this one, I find 15 turns should be sufficient to yield 40uH with your stated dimensions (it won't let me spread the turns out as much as yours).
There is a link in the calculator to the equations they've implemented and I suggest you study the equations rather than trusting this (or any other) online calculator.
The inductance is much less than it would be with a closed magnetic path because the permeability of air is 1/2000 that of your rod.
A rather thorough treatment of how the effective Al varies with parameters can be had in this document. |
H: circuit to detect chess clock toggle change to fire BT button
I was looking for simple circuit: (SamGibson's idea to add a 2nd reed switch proved possible, see update below.)
to detect transition to flat 0 V when player B's clock is running.
to detect transition to periodic 200 mV pulses when player A's clock is running.
When either detection occurs I want to 'fire' a blue tooth button click.
I am measuring at each end of the reed switch.
I am not really seeking whole project but seeking how to best/cheapest/easiest way to detect the change as shown and described. There is not a lot of space inside the clock for another magnet and reed switch and if the existing signal could be detected that would be cool/simple, no? The clock is driven by one AA battery so that is probably why the signal is on 1 V (I was thinking it was showing 200 mV pulses actually? Other solutions - this is an R&D effort - I just opened and measured the clock last night and found FLAT for B's clock running and 200 mV pulses when A's clock is running.
And the firing of the BT button I know how to do.
Update 1-19-20
I was able to squeeze and gluegun in place a 2nd reed switch on the A side using the same rocker magnet.
Please see here -> chess clock toggle showing detection by 2nd reed switch
And there are some added images below.
Btw: The clocks original reed switch only has two leads.
I am next going to use this circuit to fire the BT button.
Please see here:
double xor "chess clock - simple pulse generator from switch state change"
AI: Instead of trying to interface with existing electronics (with the risk you might affect its behaviour) one possible solution is to add your own extra reed switch controlled by the player A/B rocker mechanism (and add another magnet for your additional reed switch, if the mechanical layout needs one).
That would be my initial approach (unless it was totally impractical, when more details are shown), as using a dedicated reed switch should allow you to avoid damaging to the existing electronics (and removes the need to reverse-engineer any of it).
It's unclear where you are connecting those orange & yellow cables inside the chess clock. The signal you show when player "A" clock is running only reaches approximately 1V and so cannot be relied upon to be recognised as changing between logic states. And without knowing the design of the clock's electronics, we don't know what is driving that signal, to see if it could be modified (while still allowing the clock to work normally).
What other possible solutions did you consider (and presumably reject) so far, and why?
For the Bluetooth "button press" that you want to perform, I presume you have already got a solution for that. |
H: Why did my meter read 6 volts dc in the speaker output of a car radio?
While probing a "live" car stereo pins, I also probed the speaker output pins but left the meter in dc volts mode and got a reading of 6v, wich I think is odd, as I asume the output should be considered AC.
I want to know why would the meter show that reading? Is it the meter or could be the radio?
I had the black probe connected to vehicle ground and was probing all the unused pins with the red one (trying to find is the radio had a 12v pin that where "hot" when the radio was ON, like the connection used to turn on external amps...) The back of the radio has three connectors but only one is used in my car (I know one is for external CD changer and the other for rear speakers) however, I could not find the exact information for my unit but for a similar one, that's why I probed all the pins, in case some of them didn't match the description I had.
It was the same reading regardless of how much I Increase the volume, but if I turned the radio off, the voltage reading would slowly drop to zero (taking somewhere beetween 30 seconds to a minute to get to zero). Any of the speaker pins would give out that reading, the marked as negatives included.
I do not think the radio puts a DC voltage through it output as it would make the speaker cones go up (or down) and "stay there" or oscilate around that offset position, wich it doesn't. It also does not pop or click the speakers when powering on or off.
The radio is a factory unit made by Panasonic Automotive Systems (Thailand), (Model no UN36 66 9CO, CQ-LM8282TA) and is labeled to use 4Ohm speakers.
AI: Your car radio's output amplifier is working in "bridge mode".
Figure 1. A typical bridge mode configuration.
Bridge mode amplifiers are popular in car audio systems. The output of each amplifier is biased to half-supply. (Since both sides of the speaker are at the same voltage in the quiescent state, no current will flow through the speaker.) One amplifier is fed directly with the signal while the other is driven with an inverted version. The output then "see-saws" about the mid-supply voltage.
The advantage of this arrangement is that the peak to peak voltage across the speaker is almost double that of when one end of the speaker is grounded. Since P = V2/R doubling the voltage gives four times the power for the same loudspeaker. Elimination of the DC decoupling capacitor (which you were expecting) eliminates a bulky component and eliminates the bass roll-off that the capacitor would introduce. |
H: What are these female 2.54mm (0.1") crimp terminals?
So I but some crimping terminals to make my own custom cable connections for the first time today for an Arduino project I'm currently working on.
Comparing to some older ones I have from premade jumper wires I had lying around, I found that they are definitely not the same shape, and I'm unsure they'll even be usable for my goals.
The terminals I'm used to seeing are in the center, the new ones I bought are on the left, and the sockets I have are like that one on the right.
I have tried fitting a new terminal into the socket, but as it was not crimped, It wouldn't fit, though the weird bent part did appear to go in, albeit relunctantly.
Are these usable with this kind of sockets? Did I screw up? Is there a common name for these types of crimp terminals so that I won't mess up while buying them in the future?
AI: You screwed up. There is no common name that I know of, at least not one used by a reputable manufacturer. The description you need is a crimp terminal that mates with 0.635mm/0.025" square post headers. The crimp terminal on the left clearly does not mate with a square post.
One example is the from Molex which is the "SL Series". |
H: can you please help me to identify this smd component marked M 412 727a?
Hi please help me identify this smd component marked M 412 727a thanx
AI: Micrel (now Microchip) optocoupler? |
H: KVL equations for this small signal model
I could figure out how the small signal pi model is obtained from the large signal model and below shows an example circuit where I also draw the pi model:
But from this point does KVL hold? How can we write the KVL equations? The change in small signal vin is not the same thing with the change in vpi. What kind of KVL would be meaningful to form in this case? Or we should use KCL?
AI: Why do you think that KVL and KCL do not hold anymore?
For your circuit we can write using KVL and KCL and because \$ v_\pi = i_b \times r_\pi\$ we can write:
$$i_e = i_b + i_c = i_b + g_m i_b r_\pi = i_b(1 +g_mr_\pi) $$
$$v_{in} = i_b r_\pi + i_e R_E = i_b r_\pi + i_b(1 +g_mr_\pi)R_E $$
And if we treat the voltage across the emitter as an output wee will have:
$$v_o = i_e R_E = i_b(1 +g_mr_\pi)R_E$$
And the voltage gain is:
$$\frac{v_o}{v_{in}} = \frac{i_b(1 +g_mr_\pi)R_E}{i_b r_\pi + i_b(1 +g_mr_\pi)R_E } = \frac{(1+g_mr_\pi)R_E}{ r_\pi + (1 +g_mr_\pi)R_E }$$
Also you should remember that :
\$g_m r_\pi = \beta\$
Why?
Because the BJT transconductance is equal to \$\large g_m = \frac{dI_C}{d V_{be}}\$ and \$\large r_\pi =\frac{d V_{be}}{dI_B} \$ therefore:
$$ g_m \times r_\pi = \frac{dI_C}{d V_{be}} \times \frac{d V_{be}}{dI_B} = \frac{d I_C}{d I_B} = \beta$$ |
H: Electromagnetic 7-segment flip display: H-Bridge alternatives?
I have an electromagnetic 7-segment flip display which has 28 electromagnets for 4 digits.
They run on 20V, have a 7.5W power rating and need alternate polarity applied to switch between the 'on' and 'off' states.
I tried using a Raspberry Pi with 14 x L298N Dual H-Bridge Driver Modules to run the electromagnets and it usually works, but there's a lot of wiring involved with the H-Bridge modules, making fault-finding tricky, and I've had a few fail on me already.
Is there a better/tidier way of controlling them that I haven't come across? I've done research online but can only really find these H-Bridge modules as being the answer.
Thanks.
AI: Another possibility would be to use the DMOS power shift registers in TI's TPIC series. This shows active pullups on each output. You could use resistors but that would come with other issues.
simulate this circuit – Schematic created using CircuitLab
7 is the minimum number of shift registers required, but it might be better to use 8 and then each digit would be identical. |
H: Could 48V arc across this small gap?
I have soldered two wires onto this Cree XHP 70.2 LED, tested it in a circuit, and everything works fine. I intend to wire four of these LEDs in series and drive them together at about 48V and 2.4A (12V each). My only concern is how close the solder is to the copper LED backplate (see images below).
I'm worried that it might arc to the backplate and create a short circuit, bypassing the LED. Is this a legitimate concern?
AI: Even a very small gap is sufficient to stop quite a bit of voltage. IPC-2221B would specify 0.6mm for 48V for an exposed gap on a PCB.
Breakdown voltage of an air gap is much higher than that-- 48V will hardly start an arc over any non-microscopic gap.
Of course if you get conductive dirt or liquid on it, all bets are off. For example, by using plumber's solder with acid flux. |
H: What is the use of the fourth leg, the one with igbt in series with the diode, in the infineon power module?
The circuit shown below is the schematic of infineon PIM module. I am specifically interested in FP15R12W1T4. From the schematic I could understand all elements other than the 4th leg which has an igbt in series with a diode. I am new to this field. I assume, that leg and terminals are provided to feedback the present voltage level under a specified switching frequency.
AI: By applying a DC shunt to the battery, the motor instead of free wheeling can regenerate and brake the motor. using the back EMF of the motor/generator.
There are different implementations including Battery Regen and single phase Remanence braking.
This is why there is a single B phase brake on a 3 phase UVW phase rectifier or bridge driver. |
H: Requirements for NPN, PNP transistors
Is the following a correct understanding of what makes a NPN/PNP transistor turn on or off?
NPN (more common)
Must have voltage > ~0.7V on base
Must have (conventional) current flowing into collector (top)
PNP
Must have zero voltage on base
Must have (conventional) current flowing into emitter (top)
Are the above two conditions accurate for each? And Are there any other 'requirements' to turn on a NPN/PNP transistor?
AI: No. The amount of conventional current (not electron current) entering the base and flowing out through the emitter determines whether an NPN turns on (i.e. how much current passes from the collector to the emitter). For a PNP, it is the amount of conventional current flowing into the emitter and out of the base that determines how much current passes from the emitter to the collector). The base-emitter junction behaves like a diode which is where the typical 0.7V value across the base-emitter comes from.
Note that things like "the voltage on the base" have no meaning for a transistor. The voltage relative to what? Relative to ground? What if neither of the other two pins are at ground? Voltage is relative and the transistor does not know what the voltage is anywhere except between two of its pins.
Saying "the voltage at X pin" is like saying "the distance at your house". It doesn't mean anything. |
H: Path of a signal traveling on a mismatched transmission line
I have a basic question about the path of a signal traveling on a transmission line with a short circuit as termination.
Suppose that this line is driven by another line (at left) with Zc = 50 Ohm characteristic impedance. The line in my scheme is matched with it but its termination is not, so there will be reflection (in this case total reflection because it is a short circuit load).
I'd say that the signal which comes from left travels along al the line in the scheme, arrives at the short circuit, and then it is reflected back.
But if you evaluate the input impedance of the transmission line and then find the correspondent reflection coefficient, you see that there is total reflection also at the beginning of the line (as shown in the scheme with the equation |Ґ(0)| = 1). From this consideration, it seems that the signal is reflected at the beginning of the line.
It's seems not correct for me since the signal knows the presence of the short circuit only when it arrives at it, but math says that |Ґ(0)| = 1. Which is the solution? And why do people often evaluates the input reflection coefficient, since the reflection will be in other positions (I think so)?
AI: There are two useful models for this situation:
The input wave enters from the left, travels rightward, is reflected by the short, travels back to the left and exits via the cable.
There’s a standing wave with a voltage zero at the short which extends through the entire cable.
In the linear, no loss limit these are exactly the same both mathematically and physically.
Both are useful for calculation, but you can only use one at a time. Combining them leads to confusion.
If you want to think about the conditions at different points on the line, the standing wave model is often simpler. In this case, it shows that the conditions of the short repeat every half-wavelength. |
H: Visual example of PNP transistor
Following this question, Visual example of NPN transistor, is the following a correct understanding of a PNP transistor?
To be honest, I have no idea why the top of the transistor (where the current flows into) is called the Collector for an NPN transistor and an Emitter for a PNP transistor. Why isn't it just called the same thing, if it's "where the conventional current flows in" ? That part seems incredibly confusing to me (aside from understanding the actual current flow in the two transistors).
AI: Yes, it's correct. In a real design you'd want more base current to ensure the transistor is fully turned on, maybe 5% of the collector current.
The collector and emitter are different (usually) on transistors. It's possible to make a transistor that is symmetrical where they are the same, but few available BJTs are made that way. JFETs, on the other hand, are symmetrical.
One difference is that the emitter-base breakdown voltage is typically much less than the collector-base breakdown voltage (when the respective junctions are reverse biased). That's a side effect of optimizing the gain, which is much higher when the transistor is used the right way 'round. On a 5V circuit, you could swap the collector and emitter on most transistors and the above circuit would sort-of work, but you'd see the LED illuminate much more dimly when the switch is closed because the gain (reverse beta) would be much less than 100.
For example, the gain of a 2N4401 might be 250 in the forward direction (under specified conditions of gain and voltage drop) but maybe only 5 or 10 in the reverse direction, so it's not a very good transistor at all. The C-B breakdown might be 60V (guaranteed to be better) but the E-B breakdown more like 6 or 9V typically. The reverse typical figures are not given on the datasheet (they do tell you 5V is okay for the E-B) because most people don't care about the characteristics in that mode. |
H: Where is the correct place for a body pad of a TO220 linear regulator in Eagle
In my two-layer pcb design I have an LM317 with a TO220 package. I took the generic TO220 package from the default "linear" Eagle library which does not have a polygon copper pad under the body of the part. However, since the body is connected internally to pin 2 (middle pin) which is the regulator output, the current design would short output to ground (top layer, red).
But I am not really sure where to put the polygon under the part body. If I manually put it to the top layer of the board itself, this does not seem like a robust solution because on the next board I will have to remember again in order not to short supply voltage.
On the other hand, if I put the polygon on the pad layer (green) of the package of the part, it is going to be on the bottom pcb side as well where I probably want to place other traces (like for the design below, blue).
And finally if I put the polygon on the top layer of the package, I won't be able to place the part on the bottom side of the board, if I ever wanted to (or at least the polygon will be on the wrong side then). Edit: I was wrongly assuming that the top layer would stay the top layer when the part is mirrored (placed on the bottom of the board). On the contrary, it is going to become the bottom layer (quite logical...). So placing the pad on the top layer inside the package (like it is the default for SMD parts) is my solution.
So what is the right way of placing the poylgon under the regulator body?
AI: So what is the right way of placing the polygon under the regulator
body?
The right way would be to choose correct part package first.
If you want the part to be placed flat on the board, use SOT-223 or TO-263 package. The TO-220 is designed to be mounted vertically and bolted to the heatsink above the PCB. That's exactly the reason why Eagle library does not have a pad for it.
UPDATE:
The hole in the package is for mounting on heatsink. The manufacturers usually have guidelines for mounting their products, see for example the one from ST, or from Motorola.
FWIW, I think that footprint should not have been in the library to begin with. While bending TO-220 leads is possible, it is hard to do consistently in mass production without special fixture (the guidelines above call this fixture a "clamping tool"). Some companies offer customized lead bending, but it is for huge orders only.
One possible solution is to modify the footprint to make a hole in the PCB larger than necessary and use washers. Otherwise if you bend leads slightly off-place and force them into holes there will be a strain on the plastic body that can develop into crack overtime. |
H: Non-sinusoidal waveforms: relationship (resistance, capacitance)\$\xrightarrow{\text{affects}}\$ (amplitude, frequency)
During the laboratory we have analyzed the following two non-sinusoidal generators:
square-wave generator
triangular-wave generator
Sadly we didn't have enough time to complete the last task.
My question: What is the relationship between the values of resistance/capacitance, and the amplitude/frequency of the generated waveforms? (e.g. inverting input wave of square-wave generator).
$$\Big(\text{resistance, capacitance}\Big) \xrightarrow{\text{affects}} \Big(\text{amplitude, frequency}\Big)$$
Is there any general rule-of-thumb to follow for the two above circuits? For example that increasing/decreasing the capacitance increases/decreases the amplitudes of all waveforms?
AI: Acting as if your opamps are ideal comparators, yes, that's possible, so let's start you in the right direction (I'd have to calculate the whole equation myself, so, I'll let you do that instead :) ).
Looking at your upper schematic:
Assume that at t=0 the capacitor is charged to half the voltage across it is U_out, U_N = U_out /2. Logically, that's the same voltage as U_p, since R_1 and R_2 form a voltage halver. Therefore, u_d is 0 V at exactly that point. Prior, it had to be negative (since the capacitor was in the process of being charged), and later it will be positive.
Now, what happens the next instant, now that u_d becomes positive? The negative input of your opamp becomes higher than the positive: the output toggles to -U_out.
So, we have a capacitor still charged to U_out/2, connected via R to a potential of -U_out, so there's a voltage drop of 3/2 U_out across R.
Now, all you have to do is take the equation that describes the current flowing out of the capacitor through R in relation to the temporal development of the voltage across the capacitor; that's the fundamental equation of
$$I(t) = C\frac{\mathrm d\, V(t)}{\mathrm dt}\text,$$
which you only have to fill in with \$I(t) = \frac{V(t) -(-U_\text{out})}{R}\$, yielding
$$\frac{V(t)}R +\frac{U_\text{out}}{R} = C\frac{\mathrm d\, V(t)}{\mathrm dt}\text,$$
which is a differential equation in V(t), and the solution to it is the well-known "RC discharge" equation, with 3/2U_out being the initial voltage (for t=0),
$$V_N(t>0)= \frac32 V_\text{out} e^{-\frac{t}{RC}}\text.$$
You only need to find the point when u_d changes sign again (i.e. the \$t\$ when \$V_N(t>0) = \frac{-U_\text{out}}2\$ and tadah, ways to calculate your oscillation's period. |
H: Find voltage across inductor in RL circuit
I have this circuit in wich I try to find the voltage across the inductor (VL) at t = 0+ and the switch OPENS at t = 0
simulate this circuit – Schematic created using CircuitLab
Here are my calculations below, but I can't seem to get a correct answer. Can anyone help me? or tell me how to do it?
I know that if t tends to infinity, the inductor acts as an short circuit, which allows me to calculate the equivalent resistor: $$R_{eq} = 3.75 \mbox{ kOhm}$$ ((4+2)//(6+4)) and the general voltage when the switch is open: $$V=3.75*10=37.5V$$
So I have $$I_{R1} = 6.25 mA$$ and $$I_{R2} = 3.75 mA$$
And I know that on resistor R2, the current is $$\frac{V_L-V}{6} = 3.75$$ wich gives me $$V_L = 3.75*6+V = 3.75*6+37.5 = 60V$$
I do not have the answer but I know that this answer is not correct (we submit our responses to an online quiz which is corrected directly). Is there an error in what I did?
Thanks a lot.
AI: If I told you that there is 5 mA flowing through the inductor just before the switch opens can you see that? It’s based on the assumption that the switch has been closed for a long time. Do you understand that bit?
Can you also see that as the switch opens, in that instant there will still be 5 mA flowing in the inductor?
Based on that, you can calculate the voltages across R2 and R3 and the current source. The voltage across the current source is defined, in that instant, by 5 mA also flowing through R1 and R4.
Can you take it from here? |
H: Do I use this equation for a Friis law question
I am just puzzled as the question gives two gains.
The question is below
input receiver has a noise figure of 4db and a power gain of 5db. It is followed by a mixer stage of with a noise figure of 3.5db and a gain of 3db. what is the composite noise figure for the two stages
AI: The gain of the first stage is included in NF1.
Noise figure is the noise factor converted to dB.
Noise factor for an amplifier is (SNRin)/(SNRout). SNRout already includes the gain (plus additional noise contribution) of the first stage.
This is why (other posts here have described this) it's important that the first amplifier or device in a chain have the lowest noise figure. |
H: Unknown black component on PCB
This black component becomes very warm and I have a feeling it is broken since it becomes very hot compared to the other two similar ones.
Can't find any part number or anything.
AI: simulate this circuit – Schematic created using CircuitLab
The patent
The purpose of this ferrite Balun here is to attenuate unwanted noise in RF band on the DC line used by RF amplifiers.
Heat is an indication of high RF CM noise either radiated or conduction on DC power line from card edge due to unbalanced , unshielded DC external wires acting as antenna.
There may be a fault in the load causing this to heat up. |
H: Short circuit protection of a controller for flyback converter
I would like to have your opinions about this short circuit protection. Here is the schematic associated given into the datasheet.
And you can find into the same datasheet how their short circuit protection works.
Here are my questions:
1 - " When the output of a flyback power supply is shorted, the primary VDD decreases due to the coupling polarity between the aux winding and the secondary winding of a
transformer"
It means that the current flowing through the secondary windings which is high produces a flux (according to the Ampere's theorem) which can cross the inductance of the auxilliary winding and then have an influence on the auxilliary voltage? Theoritically, the mutual inductance between the secondary winding and the auxilliary inductance should be null? I.e. coupling factor = 0? So the datasheet assumes that the transformer is not well designed.
2:nd question:
"However, it is possible that the VDD voltage remains higher than the UVLO level even if the output is shorted. This happens when the coupling between the aux and the primary winding is too good." Is it asking to reduce the mutual inductance between primary and auxilliary, ie to increase the leakage inductance on the primary side? What it really asking is to have a lower coupling between the primary and the aux and a better coupling between the output and the aux. Imagine I follow the instructions, as the current sink by the auxilliary winding is low, even if the coupling factor is poor, the flux which will not be tranfered to the auxilliary side and so will remain to the primary would not be able to produce a high leakage inductance? As Lleakage = remaining_flux/I_primary (I’m not sure of this last definition)
AI: This is a classic in switching power supplies. The auxiliary \$V_{cc}\$ is an image of \$V_{out}\$ and is dependent upon the transformer turns ratio linking the auxiliary and power windings. That is to say, if you have a 12-V output and a turns ratio of 1:1 on the auxiliary winding, then the auxiliary will be 12 V also. This is a theoretical approach because the transformer hosts many parasitics such as leakage inductances, ohmic drops and capacitances properly modeled via a cantilever model (see this paper).
When you create an output short circuit, the peak current goes to a maximum value (clamped by the PWM controller but dependent upon \$V_{in}\$ and the propagation delay) and the energy stored in the leakage terms is maximum. A peak appears on the auxiliary winding which is peak-rectified by the diode and \$V_{cc}\$ increases even if the "clean" plateau is closer to \$V_{out}\$ which is theoretically 0 V in short circuit (you still reflect a bit of voltage made of the power diode drop and the drops in the PCB traces). The picture below is an excerpt from the book I wrote on power supplies:
Despite an output short circuit, the voltage cannot collapse to trigger the controller under voltage lockout (UVLO) and there is not much you can do beside trying to better couple the two windings. The peak lasts until the leakage inductance is reset. To appease its effects, you can add a small resistance in series with the diode (not really effective with a badly-coupled transformer), insert a small \$LC\$ filter to get rid of the peak (damp the filter properly) or better, resort to a more modern controller which monitors the feedback pin rather than the \$V_{cc}\$ for fault detection. If the FB pin goes to the max, it means that the loop is no longer closed (like in a short circuit where the LED bias disappears) and a timer starts. At the end of the timer (usually around 30-50 ms), all pulses are stopped and the IC either latches off or, more commonly, goes into an auto-recovery hiccup mode (you can hear the tic-tic noise). |
H: Leading edge blanking does not depends on primary leakage inductance?
Here are the following advices for designing the leading edge blanking of a flyback converter. There is also the schematic:
It tells us that there is reverse recovery current which occurs from the output rectifier diode, I suppose or from the snubber diode (which is not represented on the schematic). If they are considering the output reverse recovery current of the rectified diode I do no think that It will be high as in general the primary has a higher turn number than the secondary. (There is reverse recovery diode only in CCM mode, no?)
It does not mention about primary leakage inductance too? If the flyback works in CCM mode it should have an influence on the voltage spike, no? By contrast, it mentions about leakage source inductance.
AI: The leading-edge blanking circuitry or LEB is a common circuit found in modern switching power supplies. It is usually built as shown in the below circuit:
When the drive goes high, a short pulse of \$t_{LEB}\$ duration blinds the IC for a small period of time. We are talking about 250-350 ns for ac-dc controllers operating below 100 kHz and around 100-150 ns for high-frequency controllers. This is to prevent the controller from being reset by a current peak happening at the switch closing time:
This peak is contributed by:
the MOSFET gate capacitance current which circulates through the sense resistance when the drive goes high
the sudden discharge of the total capacitance lumped at the drain. This capacitance is made by the MOSFET capacitance seen at its drain (\$C_{rss}\$ and \$C_{oss}\$), the transformer capacitance and the output diode capacitance.
if the converter operates in heavy CCM, then the reverse recovery current (the diode is a short circuit for a small moment of time, half the \$t_{rr}\$) is seen in the primary side as a peak.
The LEB can sometimes be too short and an extra \$RC\$ network needs to be added. I recommend to always include it in designs, with \$R_2\$ and \$C_1\$ very closely located to the control IC and its ground. It will improve noise immunity and attenuate any unwanted negative ringing which can be highly detrimental to a sound operation. |
H: Capacitor to discharge upon switch open
Update Please evaluate this third attempt:
This is my first electrical project, so please be gentle with me. I know very little about electronics.
I'm building a machine that has a crank that users pull. The ideal behavior is that when a user releases the crank from its lowered position, the circuit will drive the load (represented by the lamp) for a few seconds, then turn off. Translated: When S1 is first opened, C1 drives X1 for a few seconds, then X1 shuts off. When S1 is closed momentarily, the cycle repeats. To be clear, X1 isn't driver while S1 is closed. I expect that there are better solutions with a different type of switch than S1 (instantaneous button), but in the greater mechanical context, it seems like the only practical choice for the project.
Here's a diagram of my first attempt at the circuit. Please ignore the actual quantitative values, I just want to get the circuit working conceptually. Please let me know if I got the diode directions right. Also, the load is actually a relay, I just wasn't able to find the symbol for that.
My conception is that when S1 is closed, C1 charges via D1. When S1 opens, C1 discharges via X1. I think the main weakness is that C1 is connected in parallel with the short circuit to V1. What do you think?
2nd attempt:
AI: We can simplify your requirement specifications with a simple timing diagram.
__ __________ __ __
Button ___| |__________________| |___________| |__| |_________
_____ _____ __ _____
Output ______| |_______________________| |________| |__| |___
Figure 1. Timing diagram. This shows us that the load is off while the button is pressed and turns on for a preset time when the button is release unless the button is pressed again (as shown on the right of the diagram).
The challenge, as you have discovered, is to do this with a single-pole, single-throw (SPST) switch or simple push-button. A common solution to the limits of a switch - it might not have adequate current or voltage rating or may have the wrong contact arrangement - is to use a relay.
simulate this circuit – Schematic created using CircuitLab
Figure 2. Using a relay to convert an SPST button into a SPDT (single-pole, double-throw) device.
How it works:
SW1 you have already.
RLY1 is a 12 V relay with a changeover contact. You should be able to find one in a car parts shop or at the scrapyard.
In the normal position C1 is discharged into the load.
When SW1 is pressed the relay is energised and C1 is charged via R1 which limits the current into C1. (When C1 is completely discharged it appears as a short-circuit at the moment of switch-on.) Note that the load is completely disconnected during the charging cycle.
When SW1 is released C1 discharges through the load.
Note also that if SW1 is pressed again before C1 is completely discharged that the load will be switched off as shown on the right side of the timing diagram.
D1 protects the contacts of SW1 from sparking that would be caused by the inductance of RLY1 during releasing of the switch.
One big problem with this circuit is that the voltage will fall as the capacitor discharges and in the case of a bulb, for example, it will flash brightly and then fade away over a period of time determined by the lamp resistance and the capacitor value. |
H: Why is voltage drop independent of this 4 Ohm resistor?
I have this resistor which is connected to some battery (not very important). I don't understand why the total voltage is equal to the voltage drop over the 3 \$ \Omega \$ and 2 \$ \Omega \$ resistors. Why is it not dependent on the resistor in the middle with 4 \$ \Omega \$ . I do understand it if the 4 \$ \Omega \$ were substituted with a wire. But how can it be that there is no difference whether it is 4 \$ \Omega \$ or 0 \$ \Omega \$?
AI: I don't understand why the total voltage is equal to the voltage drop over the 3 Ω and 2 Ω resistors.
Normally on these exercises we are dealing with ideal voltage sources. This means that they will hold their output voltage no matter what the load is. That means that any pattern or combination of resistors can be connected across the voltage source and it will stay constant. (Any value except 0 Ω directly across the battery terminals since that will give an invalid result for \$ I = \frac {V}{R} \$.)
What will change is the current. Removing, changing or short-circuiting the 4 Ω resistor will affect the current drawn from the voltage source. |
H: How does current flow in this circuit, and why?
I'm new to EE. I know this is a simple question, but I would like to know how the current flow in this circuit. My textbook says that the current does not pass through the capacitor, but I don't know why. Any help is appreciated, thanks!
AI: Figure 1. A classic capacitor diagram. Image source: Electronics Tutorials.
A capacitor consists of two conductive plates, foils or conductive materials, separated by an insulator or dielectric. No current (other than some leakage) can pass from one plate to the other when run inside the designed parameters.
The symbol for the capacitor represents the two plates with a gap between them. DC current can't flow. Current does flow to charge or discharge the capacitor when the voltage across the plates changes. That's why capacitors can "pass" alternating current and their apparent impedance (AC resistance) decreases with higher frequency. (Incidentally, the resistor symbol represents a wirewound resistor and the inductor symbol represents a coil of wire.)
Tip: when analysing a circuit like that you can think of capacitors as blocking DC and passing high frequency. Inductors, on the other hand, will pass DC but block high frequency.
The linked article is worth reading. |
H: Closed loop circuit vs open loop circuit can current flow?
So this has been bothering me. Lets say we have a circuit which looks like this below:
If the connection to ground is earth ground, and the positive side of the voltage source is connected so there is a potential difference over the resistor, would current flow to ground with a SINGLE (just one connection important!) to ground. This circuit would be considered an "open loop" in the conventional sense. Thanks!
AI: In your example, no. Not continuous current as you know it. This would be like air trying to circulate continuously in a looped pipe with a pump somewhere in the middle...except the pipe is blocked off somewhere along its length. A momentary equalizing charge (we don't really call it current in that context) can flow in the same way air fill flow into an empty tank (or dead-end pipe) and pressurize it. That is what most antennas are. There are multiple increasing layers of complexity and the first one introduced is that "current must flow in a loop". What is often omitted for simplicity is that continuous current must flow in a loop.
The momentary charge would flow until the source and the ground would be considered to be the same potential correct? Where Im going with this is when we connect the chassis of a device to a single ground connection, and lets say a power rail somehow got connected to the chassis, then the current would flow through the chassis to ground without the need for an "closed circuit". Thats what the circuit up there is trying to demonstrate.
Voltage is always measured relative to something else, so prior to connection the positive and negative terminals of the supply will be floating at some offset to your earth, whatever it is. When you connect the + terminal to GND, a momentary equalizing charge will flow to earth (or from earth) to cause the + terminal to be at the same potential as earth. Since the - terminal is always some constant voltage relative to +, it follows accordingly. So in other words, yes you can think of it that way.
Getting shocked by static is something similar. It's the pressure suddenly releasing and equalizing.
If a source you connected this to is AC instead of DC, then this momentary equalizing charge flows back and forth repeatedly trying to equalize the charge in "the dead end" which would be the negative stub of your power supply in this case. This is what most antennas basically are.
It is similar to repeatedly dumping and sucking water into and out of a bucket.
Note that this is contrasted with continuous AC current which also has an oscillatory nature but does flow continuously in a loop. There's no real mechanical-analog for this...unless you think of alternating localized pockets of higher and lower pressure air circulating around inside a pipe loop. But in real life the air pressure distribution would equalize. out inside the pipe loop. I think it would have flow at supersonic speeds so the pressure distributions won't dissipate. Strangely, it begins to feel start to feel similar to electrical transmission lines where you also can no longer ignore the speed of propagation. |
H: Transistor as a heater device and measured by LM35 temperature sensor?
The aim is to make a temperature control circuit using an Arduino Uno as a controller, an LM35 sensor as feedback to measure the actual temperature, a TIP31C transistor as actuator to control the power dissipated (heat.) I have a 12V,1A power supply.
Note: The transistor and sensor are near to each other.
I know that the Arduino Uno should send PWM through a resistor to the base of transistor, but what about collector and emitter?
Should I put 12V to the collector and ground to the emitter? But that would mean a short circuit.
AI: You can use a transistor as a heater, however you would be better off to add at least one resistor to control the collector current. Given that, you might want to use the resistor itself as the heater and drive the BJT or MOSFET fully on to minimize the power dissipation in the switching device.
Dale makes suitable chassis-mount wire-wound resistors, and you can find other suppliers with similar products. Photo from Digikey:
If you still want to use the transistor for some reason, you can make the transistor into a current sink and connect the collector to a fixed voltage, so power dissipation is more-or-less fixed when 'on' Look elsewhere here for ideas on how to do that. The easiest way would be to drive the base to +5 and add a resistor in the emitter so you'd get a current of 4.3V/Re and a transistor power dissipation of P=(12V-4.3V)*4.3V/Re. That doesn't count the power dissipated by the emitter resistor.
If you reduce the drop on the emitter resistor to something less, like say 100mV you can put more of the dissipation in the transistor, but that requires a more complex circuit (we'd probably use an op-amp). An intermediate solution would have 600mV drop in an emitter resistor and use a BJT to throttle current to the base or voltage to the gate of a power transistor. |
H: How often are inductors used in electronics
I am a relative beginner at using electronics, and am tight on money for my first load of electronics that I am going to buy.
I was wondering if I should get some inductors now or wait for a bit later when I need them.
In other words: Are inductors used frequently enough to warrant buying a couple in advance?
Also, important to note: I live in a rural area, and the nearest RadioShack is at least a 45-70 min drive away, and I do not have legal access to a car (I’m under 16), so I would have to wait on delivery from Amazon or Adafuit.
Thanks for any help! Have a good day!
P.S. I have no projects in the near future that will likely need an inductor.
AI: While inductors are fairly ubiquitous in electronics equipment the typical electronics hobby enthusiast is best off waiting to buy them until he/she has a specific need.
Most of the typical Arduino, op-amp, sensor, blinking LED etc. type intro to electronics circuits don't need inductors. But they usually require resistors and capacitors. Capacitors can be stocked in advance because values like 0.1uF/50V ceramic and 10uF/25V electrolytics are so commonly used. Inductors tend to be more application-specific in terms of construction, value, current rating and other parameters. I have literally hundreds of inductors on the shelf but almost every project that uses an inductor it seems like I have to order yet another.
Good luck, enjoy the hobby! |
H: Circuit for reversible motor controlled using relays
I am very new to electronics and drawing isn't my strength either, so please forgive the bad diagram. But I hope it makes sense.
I want to be able to control a motor using relays and be able to change the direction of the rotation. From what I know, the rotation can be reversed by changing the power to negative and positive terminals. As far as I could understand, I won't be able to do that with one relay. So I plan on using two relays. The diagram shows this (badly). Basically the dashed lines represent circuit for one directional control and the solid lines show circuit for opposite direction.
As I am sharing the battery for both relays, when either of the relays are in open state the cable for the other circuit that is connected from motor to the battery would cause a short. To overcome this issue I will use a diode on both cables that run from motor to battery terminals.
So I guess the questions are,
Does my plan seems reasonable?
Is there a better way of doing what I want?
AI: I suggest:
simulate this circuit – Schematic created using CircuitLab
With both relays off or both on, both motor terminals are connected to the same voltage, so the motor doesn't run. Operate either relay to connect its end of the motor to the other voltage to make the motor run in the desired direction. |
H: A two-pole system can never be unstable?
I was reading in some textbooks and places online that a single pole introduces a -90 degree phase shift and that in the phase plot, it never actually reaches -90, it goes asymtotic to it.
Similarly, for a two-pole system, it never reaches -180 degrees, just reaches very close to it.
Does that mean that single-pole and two-pole systems can never be unstable since there is no phase crossover frequency?
AI: Unless there is more to your question, here it goes,
If a system is unstable, with any pole on the open right plane, you will not be able to plot its bode plot (or at least that plot will not have any physical meaning, since for any sinusoidal/DC input the system will grow unbounded).
If a system is unstable, with no poles on the open right plane but some on the imaginary axis, you will be able to plot most of its bode plot, but for some frequencies it will grow unbounded. But in this case, the indication that the system is not stable will come from an infinite peak at some frequencies.
There are plenty two pole systems that are unstable, such as,
$$ H(s) = \frac{1}{(s-1)(s+1)}, ~~ H(j\omega) = \frac{1}{(-1+j\omega)(1+j\omega)}.$$ |
H: Is this resistor routed correctly?
For a friend I'm trying to make a fuzz pedal and found this very flexible fuzz circuit, called "The Fuzz of 1000 Faces," at instructables, credits to Randofo.
However, since it's an old post, I ask the question here (since it's more generic).
Why is the 100 K resistor (in the red circle) used for all transistors under it? Because how I read it, is that it is connected to the collector of the first (2N2222), and then the emitter is connected to all other emitters. But it seems to me, the first is different (why is it not connected to the emitter of the first for example?).
The original circuit can be found here: http://www.home-wrecker.com/multiface.html (thanks jsotola).
It seems to me, if the 2N2222 is not selected (switch is off), there will be no current flowing out of the emitter of 2N2222 so all subsequent transistors will not function, either.
Because for double checking the complementary comment and answer, I added the following possibilities (changes in Red).
1A Resistor to all emitters:
1B Resistor to each switch (collectors):
AI: Yes, it looks like the circled 100K resistor & the 10K resistor should be on the moving contact of their respective switches.
Edit: Like so: |
H: RLC equivalent model and Impedance Smith Chart
I have done some impedance measurements on an unknown 1 port device. I have measured its impedance at different frequencies (from 10 MHz to 600 MHz) and I have seen it on the normalized (on 50 Ohm) Impedance Smith Chart:
At Low frequencies we are at the short circuit point (left). Then, the device offers an inductive impedance, until, at about f0 = 470 MHz, we arrive at the real axis (right). It seems it arrives at the open point but it is not: if you see the following graph you see that the impedance is, obviously, purely real, but not infinite. It is equal to about 471 Ohm (absolute value).
You may see these results also in the following graphs (the first one contains real and imaginary parts of the impedance, while the second one its absolute value).
So, at f0 the devices resonates and offers a purely real impedance. Now my question is: which is the equivalent RLC circuit of this device according to this analysis?
Precisely:
from the Smith Chart I may get the value of L: I should take the Imaginary Part of Zin at low frequencies (in which the device is almost purely inductive) and divide by 2*pi*f.
from the Smith Chart I may get the value of R (it is 471 Ohm, as told before)
from the Smith Chart I may get the value of C (at high frequencies, where the device is almost purely capacitive)
So, which is the equivalent model? A parallel RLC, a series RLC?
Moreover, at f0, does the device offer a parallel resonance, or a series Resonance? I have been told that if I measure R,L,C through the Impedance Smith Chart, they are the values of the RLC series model, but I am not sure about it because I can also do my measurements on the Impedance Smith Chart for a device which is not a RLC series circuit. For instance, something like that:
Moreover, I'd say it cannot be an RLC series circuit, because at low frequency we are at short circuit point, and not open circuit point.
AI: That characteristic looks awfully like a parallel RLC circuit. At resonance the LC part becomes infinity and, because it is shunted with R, the effective impedance is R, possibly a 470 ohm resistor. At DC and low frequencies the inductor dominates with its low impedance and, if you went significantly higher than 1 GHz the parallel capacitance would dominate and start to act as a low impedance shunt.
Below is just a convenient graph I found for a parallel RLC circuit: -
The difference between series and parallel resonance is shown side-by-side here: -
Picture from here. |
H: Differences between 2nd order low pass filters
I don’t know how to design filters, but I need a second order low pass filter. I searched them on the internet and found two schemes. One is Sallen-Key, and the other I don’t know what is called. Question: what is the difference and which is better to use? How is the filter calculated in Figure 42?
AI: One is Salena Kay, and the other I don’t know what is called.
Sallen Key with unity low pass gain: -
Pictures taken from this useful web calculator.
Sallen Key with gain setting resistors: -
Pictures taken from same calculator page as above - scroll down
MFB or multiple feedback: -
Note that the low frequency gain of the above MFB circuit is \$-\frac{R3}{R1}\$
Pictures taken from this useful web calculator.
Question: what is the difference and which is better to use?
The MFB uses one more component but can operate at higher gains. I suggest you use this information (and knowledge of your application) to google for further information. |
H: Current Probe with 1mA precision
I've designed this circuit for a 1 mili amp precision current probe, what change should I apply to it?
AI: There's no spec of the wanted functionality, accuracy nor precision, only some contradictions can be shown.
There's a 100pF capacitor C1. Only sub-microsecond pulses get through it undisturbed because there's about 10kOhm loading. Those pulses are well beyond the useful frequency range of your U1. You shouldn't assume the amp is automatically a well working low pass filter and a precision amp at the same time. The result is very difficult to predict.
It could work if part P4 had high enough inductance AND the drive for it were redesigned to eliminate the inductive kickback.
ADD due the given details:
Part P4 obviously is the inductor which should neutralize the existing magnetic field in the test point. Neutralization is possible if the coil produces a field which has exactly right direction and the field to be neutralized doesn't change too fast.
You have class AB amp which can have whatever current through from Vcc to GND directly through the output transistors. The lower transistor is useless because without negative supply your circuit can push only one directional current through the coil.
You have no attempt to kill possible high voltage peak that occur if the feeding circuit suddenly tries to stop the current of the coil. I guess sooner or later something will be destroyed.
You have no actual controller which searches the total zero field current for your coil. Designing such controller needs some knowledge of the control theory. |
H: What is the difference between F5AL250V and F5L250V fuses?
In the glass fuses' code F is for fast blown the second number is the current, but I do not know what is the difference between L an AL (if there is any).
Could someone explain this.
AI: They are the same 5A 250V fast acting low breaking capacity fuses (just one omits the A of ampere)
The glass cartridge fuse code is structured in this way
|Acting Speed| |Current rating| |Breaking capacity| |Voltage rating|
or
|Package size code| |Acting Speed| |Current rating| |Breaking capacity| |Voltage rating|
Acting speed
The time it takes for the fuse to open when a fault current occurs.
It code could be:
FF - Very Fast Acting (Flink Flink)
F - Fast Acting (Flink)
M - Medium Acting (Mitteltrage)
T - Slow Acting (Trage)
TT - Very Slow Acting (Trage Trage)
Fuse Breaking Capacity
It is the current that a fuse is able to interrupt without being destroyed or causing an electric arc with unacceptable duration. The capacity of a fuse to operate between the lowest and the Rated Breaking Current code could be:
H - High Breaking Capacity
L - Low Breaking Capacity |
H: Minimum g9 led current
I am trying to find out the minimum current of a LAP 220V 2.78W g9 led. Is there an IV curve available for this product? None of the data sheets I have found show any minimum current requirements or an IV curve.
I have carried out simple current experiments using a Variac and have recorded at 185V around 10mA and then on another day, same lumen output,185V at around 1mA, same LED same setup etc. Could the LED have been damaged or is there another reason why the current has varied substantially?
Does anyone know the minimum current requirement of a g9 led or can link an IV curve?
AI: I've found a few IV curves for normal 3V LEDs just can't seem to find one for these 220 V G9 LEDs.
As explained in the comments, it's not an LED, it's a lamp using LEDs.
Figure 1. Screengrab from Big Clive's Teardown of a G9 LED lamp.
Figure 2. The results of Big Clive's reverse engineering.
You can work out the impedance of the 470 nF capacitor from \$ Z = \frac {1}{2 \pi fC} \$ where f is your mains frequency.
From the comments:
Does the circuit system mean I can directly connect to a 220 V supply and the circuit will regulate the current required?
The schematic (which is for Clive's lamp - not yours) shows that there is no regulator. Current is limited by the impedance of the 470 nF capacitor and
the 330 Ω resistor. As voltage is reduced the current will fall too. |
H: Why does writing 0 to IOSET (ARM7) has no effect?
I am learning ARM7-TDMI using NXP LPC2148.
While studying the reference manual, I came across these two functions - IOSET AND IOCLR , used to set and clear the port bits respectively,
As per the reference manual:
" This register controls the state of output pins in conjunction with the IOCLR register. Writing ones produces highs at the corresponding port pins. Writing zeroes has no effect"
Reading this I got curious as to why they had to define two different functions to do this? Wouldn't it take more memory? I mean they could have used IOSET and a single function where writing 1 produces high at pin while 0 produces low.
Additionally, why writing 0s to IOSET has no effect? I tried Googling this question but it is not explained anywhere.
Anybody got an explanation with respect to soft/hardware reasons?
AI: why they had to define two different functions to do this?
It allows for more atomic control of the bits. Alternative is that you need a read-modify-write sequence. You would need to use semaphores to make sure no other process gets in between your read and write.
For the ARM7TMI this is possible but if you have multiple processor cores this gets a lot more complex as just disabling interrupts does not prevent another processor from getting in between you read and your write
Wouldn't it take more memory?
Yes, it use a bigger part of the memory map. But most CPUs/controllers take a big chunk out of the address map for all the I/O ports. A hundred more locations is noise in the whole design. (If you check you find that most I/O maps are very, very sparsely populated)
why writing 0s to IOSET has no effect?
As the register only sets bits, you need some sort of condition which bits to set and which bits to leave unmodified. The designers decided if you write has a '1' it sets the bit. Thus writing '0' leaves the bit the same.
If you are interested here is a diagram how it works in hardware. Maybe that is easier to understand.
For setting bits this is seen as logic by most users. It becomes more difficult if you want to clear a bit. Normally of you 'AND' with '0' the bit is cleared. So how, as a designer of the logic, should you make a 'bit clear' function. Does a '1' clear the bit or does a '0' clear the bit. I have always used the former in my designs |
H: Using LVC logic instead of AHCT
I need to power a 5V LCD display from a 3.3V microcontroller. On my breadboard I used 74AHCT125 level shifters powered at 5V. This worked fine.
For the PCB version I have - mistakenly - ordered 74LVC125 chips. With a 5V power rail can I still use them (the data sheet seems to me ambiguous)?
AI: LVC inputs are 5V tolerant so they can be used as level shifters from 5V to 1.8-3.3V.
However power supply voltage is 1.65-3.6V so you can't power them from 5V. Although the absolute max rating for VCC is 6.5V... But even if you powered it from 5V and it didn't smoke, LVC (just like HC or AHC) has CMOS input thresholds, so with 5V VCC the 3V3 logic levels would not satisfy Vih properly.
So unfortunately the answer is no, AHCT was the correct choice for 3.3 to 5V translation due to input levels compatible with 3V3 logic... |
H: AC to DC power supply - earth ground capacitance on DC output
I have a mains to 60v DV power supply that I’m using for a project. Needless to say it managed to give me a bit of a shock. This surprised me as it’s supposed to be floating.
With no load the power supply seems to show a -60v potential to earth ground from DC -ve.
With the power supply off. Measuring Resistance between the DC -ve terminal and the earth ground there seems to be some capacitance as resistance goes from 1m to 0 ohms.
Measuring for capacitance there seems to be about 400uf capacitor between earth and the -ve terminal.
Putting a 5k ohm resistor between DC -ve and ground shows about 11mA flowing...
Obviously measuring anything with my bench oscilloscope is out of the question as this power supply -vs has a current path to earth.
Is this a poorly designed power supply?
AI: There's plenty of mains AC powered equipment which behave as yours. They have metallic shield to reduce electromagnetic interference. That shield is connected directly or with a big capacitor to the output which the designer considered to be the signal ground or the voltage ground.
In addition it's connected to the protective earth wire of mains AC input. Finally they have a LC filter in the mains AC wires which has substantial capacitors connected from the shield to both mains AC wires.
If you connect a device like this to unearthed mains AC socket, you will have perfect 50% of the local AC voltage at the output and the shield. A lot of people have destroyed loads of equipment when they were plugging or unplugging devices to other devices without knowing this.
Especially disastrous are attempts to get rid of noise gathering ground loops by breaking somehow the protective earth connection. I have seen several audio systems silenced with this method. Connect or disconnect a cable or cables in a wrong order = kaputt.
Is it poor design? It is poor if one has a reason to assume it will work safely without a connection to the protective earth. |
H: How does a microwave oven modulate its output power?
My microwave has multiple power settings, ranging from 500 watts to 1500 watts. My question is how is the power reduced/modulated?
I can think of a few options (but I don't know which one is correct/most common):
Is the microwave constantly switched on and off with different 'duty cycles' (similar to PWM) (different on/off times with longer total 'off time' when the microwave is set to a lower 'power level') in order to create lower power output?
Is the electromagnetic frequency of the photons being emitted by the microwave altered resulting in more or less energy per photon? *
Is the amplitude of the waveform (in other words the amount of photons per second) altered resulting in more total energy per second? *
Have I made any wrong assumptions in the three options listed above? Are all three options above theoretically possible in order to achieve modulation of the microwave's power output? Are any of these options used in a microwave oven in order to handle the modulation, if so which is most common?
According to this forum post photon energy is determined by a photon's electrical frequency and a waveform with same frequency/wavelength and different amplitude has more photons being emitted per second.
AI: It's really simple. They have one fixed power level, and turn it on and off. You can hear it when it is on low power. It'll hum louder for a few seconds, then have a longer period when it is a little quieter. On is louder, off is quieter.
On full power, it is on all the time. Lower power switches it off for a short pause with a longer on period. Low power is a short on period followed by a longer off period.
It is sort of pulse width modulation, but real slow.
The frequency of the microwaves is fixed. More or less - it isn't strictly controlled because it isn't critical. The construction of the magnetron sets the frequency - you can't easily vary it. The frequency is more of a range of frequencies.
Modulating the power of a 1000 watt transmitter isn't easy, so the manufacturers don't try. A fixed power level is enough, if you can turn it on and off.
They don't even closely regulate the power all that closely. The transformer is made such that it limits the current to the magnetron, and that's about all the regulation there is. |
H: Why does my MIC4605 keep blowing up?
I'm trying do design a mini-PCB, replacable half-bridge for motor control applications. The primary application is to use it with my modular inverter/BLDC/BDC controller. The controller design assumes 6 signals going to the bridge: GND, OUT, Low Side EN (optional), PWM, Gate Drive V (12V) and High Voltage (up to 60-70V DC), plus additional connectors for high-current HV and GND (up to several 10s of Amps).
The initial design was made around MIC4102YM, thus the LSEN and only one PWM:
During tests with real hardware, either the MICs or the 5 ohm resistors kept blowing up, even with rather low "HV" of 12V. I thus replaced MIC4102YM with MIC4605-2YM (replaces LSEN with NC) and R1 with a 0.1A 10V linear regulator (78L10). Additionally, I've added another small capacitor between the regulator's GND and OUT legs. I also soldered only 2 out of 6 possible MOSFETs in case my problems were caused by too much gate charge. The MOSFETs are IPD60N10S4L-12.
This time, the tests with 12V input passed flawlessly. The PWM signal was at 10kHz with duty cycle between 0 and 99%. However, when tested with higher voltage (about 50V), "something" blew up and I must say I'm quite out of ideas as to why. The regulator and the resistors seem to be OK, but when testing with 12V again, I'm getting only ~0.5V gate voltage on the high side. The current drawn also seems to be higher than it should, as when PWM is pulled high, the voltage on the OUT leg drops to about 4-5V.
I'm currently ready to re-design the mini-board, but I'm not even sure what went wrong this time. Previously I could blame currents too high for the driver, but it doesn't seem to be the case this time (as it was working just fine with lower voltage on the driven side). Am I missing some crucial filters/safety features?
P.S. I'm open to suggestions regarding using other parts or more/less integrated solutions, as long as they can handle >100A peaks with 60V DC.
Edit: The original PCB layout (bottom layer, top layer contains 2-6 FETs only):
My crude fix w/ 78L10:
AI: On your layout the decoupling cap (finger-painted red) is very far away from the chip, there is a 5R resistor in series (purple) and the current loop area (highlighted in yellow) is quite large.
This large loop area adds inductance to the power supply impedance as seen from the chip. Wet finger in the wind, about 10-20 nH. With a di/dt around 1A per 1-2ns and \$ e=L di/dt \$ plus the 5R resistor this means power supply voltage will collapse when the chip pulls high transient from it. I don't know what it will do, maybe it will slow down or latch up, but it's probably not what you want.
A significant part of the datasheet is about high speed layout/decoupling stuff, and they really insist:
So you have to re-read all this, and study the recommended layout from the datasheet:
Notice CVDD is placed very close to the chip with fat traces to lower inductance. CB is also very close.
Personally I'd remove the useless portions of the copper pour (highlighted in yellow) and route HO trace under CB instead of using a via, which would allow moving CB even closer to the chip. I'd also add more ground vias to the ground plane on layer 2.
Most likely the reason why it worked better with the 3-terminal regulator was that you soldered a cap on the output of the regulator, and that cap ended up much closer to the chip than the original cap !
Also:
You need a separate gate resistor per FET. This adds real impedance (ie, the opposite of imaginary or reactive) into each gate and prevents them from oscillating. Without resistors, each gate is a capacitor and traces between the gates are inductors. This makes a LC tank and it can ring.
You need a ground plane, and a lot more decoupling on the high voltage supply than in the original schematic, which has no capacitors at all. If you have an inductive load and you turn off the FETs, the energy stored in the inductor will be dumped in the high voltage rail. If this has high inductance in series (ie, wires) there will be a voltage spike and your FETs may avalanche or just die.
Also if you cool the FETs with a heat sink pressed on top of them, the heat will have to flow through the plastic package, which has really bad thermal conductivity. TO220 FETs are much easier to cool.
If you use a low switching frequency (10kHz) conduction losses via RdsON will dominate over switching losses, so I'd recommend using TO220 FETs with lower RdsON and higher Qg. TO220 has higher inductance so it can't switch as fast as SMD FETs but... this is not important at 10kHz. |
H: High torque low rpm BLDC Motor
I am creating follow focus system (motor with gears that moves camera lens ring).
Vast majority of such systems use low Kv high torque BLDC motors - similar to the ones used in gimbals. I think it is mostly because higher Kv motors require gearing to provide enough torque which introduce noise.
I bought such module from FeyiuTech to reverse engineer it. The BLDC motor is very small (28x8mm stator) but has 5ohms resistance and about 150Kv. At the same time It is impressively small. It has no symbols.
From my research the torque approximation can be calculated as follows (simplified):
T = I/Kv = (U/R)/Kv
Therefore my understanding is I need to buy motor with as small resistance and Kv as possible. The best motor I could find was emax 87Kv. It has 6.5omh resistance and 87Kv so it should have more torque at the same voltage compared to 5ohm 150Kv FeyiuTech, right? I measured it and turns out it is actually slightly lower. Dissapointing. On top of that it is twice as big as FeyiuTech.
My questions are therefore:
Why would 150Kv 5ohm motor have more torque than 87Kv 6.5ohm?
Where can I buy such motor? I could not find similar motors anywhere. They are either too big or have insufficient ratings. Where do companies get such custom motors?
AI: Why would 150Kv 5ohm motor have more torque than 87Kv 6.5ohm?
As your research showed, Kt (torque constant) is the inverse of Kv (velocity constant). Therefore a 150Kv motor should have 150/87 = 1.72 times less torque than an 87kV motor at the same current. However at 5 Ω vs 6.5 Ω it should draw 6.5/5 = 1.3 times more current at stall, so at the same voltage it should have 1.72 / 1.3 = 1.32 times less torque, or 76% of the 87Kv motor's torque.
I measured it and turns out it is actually slightly lower.
Dissapointing.
There could be several reasons for that, eg. Kv specification error, torque ripple (varies with rotor angle), resistance error, different drive voltage or waveform, torque measurement error. With only 24% difference it wouldn't take much to wipe out that theoretical advantage (some of the small 'hobby' motors I have tested had measured Kv up to 18% higher or lower than spec).
On top of that it is twice as big as FeyiuTech.
One problem with gimbal motors is that they 'run' at 0% efficiency, so all the power they use has to be dissipated as heat. A physically larger motor should stay cooler and maintain full torque better because the windings don't heat up as much (copper has a positive temperature coefficient, so resistance increases and maximum torque decreases as the temperature rises). If the windings get too hot they may burn off their insulation and short out, or cook the magnets and reduce them to junk.
A motor with a 28 mm diameter stator probably won't be able to handle nearly as much continuous power as one with a 40 mm stator. On top of that the FeyiuTech is (theoretically) consuming 30% more power. At 11.1V it should be drawing ~25 Watts, which is a lot for a small motor.
I could not find similar motors anywhere.
They are either too big or have insufficient ratings.
Probably because your motor is actually insufficiently rated for what you are expecting it to do. There is only so much that can be done to get more torque out of a motor. More turns produces more magnetic force, but increases resistance. More poles reduce the magnetic distance, but makes the stator arms smaller so they can't take as many turns. Gimbal motors try to have the greatest number of poles practicable. After that the main limiting factor is power dissipation, so the ultimate solution for more torque is a larger motor. |
H: Why does this transistor circuit work?
In the following circuit, why does a certain amount of current flow into the transistor in the below circuit?
I can understand once the push-button switch is turned on, there would be current flowing through it:
But what does it flow in before then?
AI: The transistor is like all things in the real world...it is not perfect. Even when we expect that no current at all should be flowing there is a tiny leakage current. Note that the current flowing when the transistor is active is about 6,000,000 times greater than the leakage current. In most practical situations the leakage current is negligible. |
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