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H: What quantity changes when the signal is amplified without changing SNR in this case?
This is a conceptial question and I want o ask via an example in my mind. So I neglect any other factors which are possible for the sake of simplification. Let’s assume an analog signal through a channel can handle 1V variation and has a noise level of 1mV.
And lets assume this analog signal will be sampled by a 10 bit ADC which has 10V input range.
We can directly couple this 1V signal and sample by the ADC or we can amplify the signal by 10 and match it to the ADC range.
If we assume the SNR remains the same before and after the amplification, what do we obtain better by matching the signal to the ADC range by amplification? What improves? Can you give some insight by using my example?
AI: I assume you mean a noise level of 1mV RMS.
A 10-bit ADC with a 10V input range will have quantization steps of 10mV. If you treat the quantization as random (which may underestimate the effect) then that works out to an RMS noise of 3.46mV. So your 1V signal, 1mV noise input signal will have a 60dB SNR going in to the ADC, and around a 49dB SNR coming out.
If, however, you amplify your signal to 10V signal + 10mV noise, then the total noise after quantization will be the equivalent of 11.6mV RMS, for a 60dB SNR going in and a 59.5dB SNR coming out. That half a dB of degradation is practically negligible, unless you're locked in a specifications duel with a competing vendor. |
H: Powering ETH Controllers
I began working with Ethernet controllers and there is a recurring theme that keeps confusing me.
Currently I am incorporating the KSZ9031RNX into my design. The data sheet calls for digital and analog voltage supplies. My first thought is that I will need to incorporate a DAC in my PM circuitry.
However, when looking at the reference design for said chip, I notice that both supplies come from the same DC source, only to be separated by a FB. So does this mean the IC is taking care of the digital to analog conversion? I am just trying to understand this so I can move on.Thanks in advance.
AI: DVDDH is the digital IO supply, which must match the other device's RGMII IO voltage. AVDDH is the tranceiver analog supply. They can come from same 3.3V supply if they both need to be 3.3V anyway. Decoupling one supply voltage into the digital and analog supplies with ferrite beads is good enough like in the reference design. There is no mention that these supplies should be separate. |
H: VCO SN74LS624 - understanding pin out / how to read datasheet?
I have a SN74LS624 chip and I am trying to get it working on a simple breadboard with an oscilloscope.
I have read the datasheet here: http://www.ti.com/lit/ds/symlink/sn54ls629.pdf
I can not understand a few things from the data sheet:
1) The intro paragraph mentions you need an external capacitor. Where does this capacitor go exactly and how do you wire it up after determining the value for C
2) What are the pins CX1 and CX2 for? How should you connect them?
3) How to use the RNG and FREQ COUNT pins?
Can somebody please explain how I am supposed to determine the answers to these questions simply from reading the datasheet.
It appears to me that not enough information is in the datasheet to use this chip successfully by the enduser.
Thanks in advance.
AI: CX1 and CX2 can be used to connect to an external capacitor or crystal to set the frequency. Figures 3 contain the information needed to select the value for the 'LS624:
If you want a 100KHz center frequency, you are half way between 10^-8 and 10^-9 F (non-linear scale, so 3.3nF is probably the right value.
If you are building this on a breadboard, you will want to stay with lower frequencies (100KHz, or 1MHz if you are bold).
(V)RNG determines the sensitivity to the FC input (slope) for the '624. Figure 1 contains the information you need to choose this value:
For maximum sensitivity (maximum frequency swing), use a lower voltage. If you don't need the range or you have stability problems, increase the voltage on this pin.
I think RC = RNG, the datasheet does appear a little ambiguous on this.
(credit) All pictures taken from the referenced TI datasheet. |
H: quartz crystal - figure of merit
What represents this formula in terms of an RLC series circuit that forms a resonator? It is called figure of merit and it is defined like this:
M = 1/ w*C1*R1
where w = 2*pi*f
AI: Your equation for figure of merit M, AKA the Q of the circuit, is correct as long as you recognize that \$f\$ is the resonant frequency, and \$C\$ is the capacitance that sets the resonant frequency. In this case the resonant frequency is set by the motational capacitance and inductance, \$C_1\$ and \$L_1\$.
So \$\omega = \frac{1}{\sqrt{C_1 L_1}}\$, and \$Q = \frac{1}{\omega C_1 R_1}\$. |
H: Opto-isolator to read 30V with ESP8266 3V3 input
I've an old board with an output of 30-31V or 0. I need to read these high and low values with an ESP8266 that works at 3V3.
Do you think I can use a PC817 opto-isolator or something similar?
Can you point me to some schematics?
AI: To use an opto-isolator you can use this circuit:
simulate this circuit – Schematic created using CircuitLab
The current through R1 is approximately (Vin-1.2V)/R1. Something like 5mA is reasonable for that particular optoisolator and for long life, so for 30V you want something of the order of 5.6K or 4.7K. Power dissipation is less than 200mW so a 1/4-W resistor is fine, but don't use a tiny SMT part without checking.
R2 is a bit trickier, it depends on safety margin, allowance for aging and the initial CTR (Current Transfer Ratio) for the particular optoisolator bin. If we look at this datasheet, there are four CTR ranks available, and the lowest performance one has a CTR of 50%. So if we assume that is the one, we might allow something like >5:1 for the margin and aging and temperature (higher temperatures are worse) and full saturation, so the current through R2 should be no more than 0.1*5mA = 0.5mA, so with a 3.3V Vdd, that implies 6.6K or more. So 10K should be fine.
You could choose to use 1mA rather than 5mA and increase both resistors by about 5:1, but that will reduce the speed by a similar factor and put it in the milliseconds range most likely. The CTR is actually guaranteed at 5mA only, but it should follow the relationship in figure 9, from whatever value it is at 5mA. Note that CTR deteriorates more in relative terms at high temperature at 1mA than at 5mA.
D2 is not necessarily required, but it protects the LED from damage if the voltage can be more negative than few volts (for example if it is connected incorrectly). |
H: Capacitor Numbers, What do these markings mean?
I have this capacitors and I tried learning how to read them but I am still unsure. I believe these are 330uf 16v capacitors but I dont know what the 282 means. Or if I am even correct.
What do these markings mean?
AI: I would agree its a 330uF 16V capacitor.
The 282 appears to be a production or lot code.
The information is found in datasheets, so you would need to determine the manufacturer and series to be sure.
Just as an example. Here is a snippet I took out of a datasheet for a capacitor with similar markings. The brand in this example is Cornell Dubilier. |
H: Power-supply made of battery+solar cell, ultra low power
In various scientific calculators, we can see that they have "twin" power, basically a mixture of a solar cell and a battery. I would like someone to tell me what kind of circuit usually takes both power sources to power efficiently a small low power MCU for example.
I would like to replicate this kind of circuit. I suppose there are ICs for that, as that would make sense in order to lower the quiescent current to the maximum, but I'm not much knowledgeable in this area. Take my Sharp EL-546w (picture here for example. I can put two LR44 or SR44 button batteries inside, and they last a few years even with frequent usage. What I don't understand as well is that these batteries are technically not rechargeable (is it only a trickle charging solution found on these calculators then?).
I would really be interested in a solution that always takes the solar panel current first and somewhat "mixes" it with the battery current, while also making the voltage somewhat constant without the need to sink the excess current with a diode (as it draws power uselessly).
AI: It is generally a diode OR circuit, a diode from the battery and a diode from the solar panel, when ever the solar panel has enough light, its voltage is higher than the batteries, so it stops it discharging and runs off only the panel, the earlier devices would also have a shunt regulator to keep the maximum solar panel voltage from getting too high,
A more modern approach would be something like a power ORing IC, it monitors the voltages of both sources and switches to whichever is higher, and some of them can be quite low power,
These calculators generally run on nano-amps, so the power lost through diodes is practically 0, as the voltage drop is much lower at these currents, you still get the same mAh capacity, just at a lower voltage that the device was already designed to run on, most IC's current does not change significantly with supply voltage. |
H: Best way to connect 5V to GND from ESP (3.3V) - transistor or optocoupler?
First of all: I read through some of the suggested topics (i.e. connecting a 5V relay to an ESP), but to my (limited) understanding, this seems not to be the problem I'm trying to solve. If it is, please accept my apologies.
What I'm trying to do: I want to emulate an Atari-style joystick (which runs on 5V) with an ESP32 (3.3V). To do that, the direction pins of the joystick port need to be connected to the GND pin.
First I was thinking of using optocouplers because they provide galvanic isolation. However, since the ESP will be powered by the joystick port's 5V pin eventually, this might not be really necessary. So I thought about using transistors and supply the base of the transistor with the current from one of the ESP's GPIO. Collector and emitter would then be connected to GND and the respective direction pin of the joystick port.
Would that work as well and as reliable/fast as an optocoupler? I read about leakage current that can occur on transistors even if the GPIO connected to the transistor's base is off?
And could I use BC547 (NPN) transistors for that purpose, as I have lots of them laying around here? Or would a different type be better? And last question: In some of the examples using a transistor as a switch, I saw that GND would be connected to the collector and the load to the emitter. I thought that current flows from the collector to the emitter via the base, so I would have expected GND to be connected to the collector?
Thanks in advance for any suggestions/explanations!
AI: You only need a single transistor on each output, and it doesn't need (or want) a pullup. Like this:-
simulate this circuit – Schematic created using CircuitLab
If you are reading the joystick switches directly then the signal will have to be inverted, but that is easily done in software. A small signal switching transistor like the BC547 or 2N3904 has negligible leakage current and is much faster than an optocoupler, as well as requiring a lot less drive current.
If the problem you are trying to solve is what I think it is, you will need to synchronize joystick movements to the game running on the computer. Most games only read the joystick port once during each vertical blank (or close to it), so if you latch the joystick input before this time, then update and hold the output until after the computer has read the port, you should be able to achieve perfect 'playback' of movements (provided the game's timing is consistent).
At 50 or 60Hz frame rate the switching speed isn't critical, so long as you are producing a stable output during the time that the joystick is being being read by the computer. If the game is running at a lower update rate (eg. 25Hz) you still need to provide a new output on every frame because you don't know which frames are 'active'.
To summarize:- detect the vertical blanking pulse and wait for some time afterwards (after the game has finished reading the joystick port), then sample the joystick state and transfer it to the output, latching the output until the next sample time. |
H: Brushed motor with shorted contacts can still rotate
From what I read here and on the internet I understood that shorting or adding a big load to the contacts of a DC motor will make it very hard to turn as a generator.
I have a 500W brushed DC motor that is considerably hard to turn by hand as is. Upon shorting its contacts I imagined it would be impossible to turn, however in reality I observe that it is just as easy (or as hard) as before. Why is that and how can I prevent the motor from turning (a.k.a. parking brake)?
AI: You are not getting much breaking torque because your motor does not generate enough back EMF at low velocities, and because it has a bad power factor when connected to a small real load.
simulate this circuit – Schematic created using CircuitLab
This is a simplified equivalent circuit showing a DC motor on the left side and a load on the right side connected through a switch, this circuit does not include any parasitic effects.
In an ideal DC motor V_BackEMF is proportional to the angular velocity of the motor, the proportionality factor depends on the specific motor.
In an ideal DC motor the current through L_coils and R_coils is proportional to the torque imparted on the shaft of the motor, again the proportionality factor depends on the specific motor.
When you turn the shaft manually without the coils being energized you create a voltage V_BackEMF which gives rise to a current through L_coils and R_coils and which in turn gives rise to a torque on the shaft of the motor.
The voltage V_BackEMF can be easily measured by turning the shaft at a fixed angular velocity and measureing between the poles of the motor with an RMS voltmeter or an oscilloscope.
The resistance R_coils can be easily measured with a ohm-meter.
The current is a bit more complicated to understand, because due to the inductance L_coils the current is not in phase with the voltage, if you look up the equation for an inductor in the time domain you will find that the voltage across the inductor is the product of the derivative of the current through the inductor and the inductor value. If we swap the equation around we get that the current is the product of the integral of the voltage and the reciprocal of the inductor value. Now if we let the voltage be a cosine function then we know that the integral of a cosine function is a sine function, which corresponds to a phase shift of pi/2. In other words the current comes pi/2 (90 deg.) after the voltage.
Due to the voltage and current being out of phase the power factor of the motor is not very high when connected to a very small real load (a short), consisting of R_coils and R_load in series, and hence the current is not going to be as high as possible. This can be compensated by ether passive or active power factor correction, but I am not going to go into that now, as it is a very large topic all on its own.
So with this background let me give my educated guess as to why your motor is not generating much breaking torque;
1) Your motor probably has a low voltage to angular velocity factor (as most brushed DC motors)
2) Your motor probably has a bad power factor when connected to a small real load (as most brushed DC motors)
The solution is definitely NOT as Reroute suggests to put a larger real ohmic load on (as 10 ohm) this is only going to reduce the current and hence the breaking torque. A better solution is to put an appropriately sized capacitor across the poles instead of a short, but even if you do that I don't believe that you are going to get much breaking torque at low speed.
The reason some motor drivers can provide "parking breake" is because they can put in energy to increase the breaking current in the motor, and they can also actively correct the power factor. |
H: Power consumption problem in high-voltage power audio amplifier
I have a problem with my power audio amplifier.
I am unfortunately forced (because of the specifications I have been given) to make it work at a dual voltage of +-90V.
Finding the components to do it was not difficult, I built it, I balanced the currents of the whole amplifier and now it is perfectly stable at that voltage.
The problem, however, I have in the final stage:
My drivers are, as you can see, KSC3503 and KSA1381, and the power transistors are 2SC5200 and 2SA1943.
The problem: the amplifier is current and thermally stable. But the power transistor power dissipation is too high. For only 10W of output in 8 Ohm I have to dissipate 24W of heat. I tried to increase the resistance of degeneration (0.1 ohm even up to 47 ohms), but the problem is not solved: what the transistors should dissipate, the resistors dissipate. Did I forget something somewhere? I should be able to deliver about 200W with this amplifier, but I can't dissipate 480W of heat. (P.S. variate R89 does not solve)
AI: Class B has a maximum theoretical efficiency of 78.5% at maximum undistorted sine wave output. However at lower power output the efficiency drops because there is more voltage across the transistors and less across the load. At very low power the quiescent power consumption also becomes significant, so a high power amp will have lower efficiency than a low power amp at low output.
Here's an example of efficiency and power dissipation vs power output for a 12W audio power amp IC (TDA7240):-
We see that power dissipation actually increases at lower output power, and is the same at 1.5W output as it is at 12W.
An amp that delivered 500W into an 8 ohm load at 75% efficiency would dissipate 167 Watts. It might also dissipate 167 Watts at 60W. Your 24W for 10W output sounds quite reasonable. |
H: How to decide CPOL and CPHA values in SPI configuration
I am working on a slave device for which I have to write a Master configuration.
In the datasheet of the slave, it is mentioned, "The SDO data changes on the falling edge of the SCLK signals. The devices sample the SDI data on the rising edge of SCLK"
Can you please tell me the values of CPOL and CPHA for this slave.
Thank you
AI: This is the first (oldest) answer to this question: Based only on the informations you provided (for a slave device); your statements are equivalent to:
The setup of SDO (Serial Data Out) or MISO (Master In, Slave Out) occurs in the falling edge of SCK.
The sample of SDI (Serial Data In) or MOSI (Master Out, Slave In) occurs in the rising edge of SCK.
This can be either Mode 0 or Mode 3 of SPI. The exact Mode depends on value of
SCK in idle state .
Could be:
Mode 0: CPOL =0 (SCK=0 in idle), CPHA =0
Mode 3: CPOL=1, (SCK=1 in idle), CPHA=1
Again: Only based on informations you provided. The doubt would be removed knowing the logic state of SCK pin in idle state (no transmissions). |
H: Power supply circuit for a PIC16F88 Microchip
I'm coming from the world of software, where I feel quite at home - I spend a lot of time writing code. I do not feel at home in the world of electronics and designing circuits. I really REALLY would like to learn more about electronics and designing circuits. I know I could be good at it, too, if only I had the intuition for it - which I'm so obviously and desperately lacking.
One project I thought up to try and bridge the gap between these two worlds is by programming a Microchip, specifically the PIC16F88 (not super attached to this model in particular, I just picked this one because from what I've heard it's relatively straight-forward to play around with). I'm sure that once it comes to writing code I'll be more comfortable, but first I'd like to build the circuit.
I'm guessing there won't be a lot of components involved. I was thinking the first thing I'd like to try and do is to simply have the microchip toggle an LED on and off at 1-second intervals. Cool, so now what? That's kind of where my problem starts.
My first impulse is to design the circuit the same way I'd design a simple LED-light-up-circuit. Pick the desired current (in the case of a single garden-variety LED ~20mA), determine the corresponding voltage drop from the LED's datasheet, subtract the voltage drop from the total voltage provided by the power supply / battery, and finally use Ohm's law to determine the required resistance to limit the current to the desired value.
Well, how much current does an IC draw? How much is too little, how much is too much? I realize an IC is a completely different animal from an LED, but that's where my understanding ends.
Obviously there must be something wrong with my approach - the datasheet doesn't even mention current (at least not in any terms I can understand), however, other people are obviously able to design and power this chip just fine. I'm aware that how much current an IC draws depends on the IC and the application, and that there's things like Quiescent current and Input Sink / Output Source currents (just because I know these words doesn't mean I understand them fully) - so where do I find this information? Concrete numbers? Should I even be using this naive approach to build this more complex circuit? I know there isn't a conspiracy trying to hide information from me, but honestly sometimes in my journey through electronics and circuit design it feels as though there is hidden knowledge that's being denied to me.
If anyone can shed some light on my issue(s), or provide an intuition or general guidelines for knowing how to find the information you need to build a circuit, I would appreciate it. Also, if possible, explain it like I'm five years old.
AI: Your LED design approach is generally correct.
A LED data sheet might suggest 20mA current is a maximum value. A modern, efficient LED is very bright with 20mA. In darkness, with dark-adapted eyes, you might be able to see the LED begin to glow with 0.05 mA.
A rough design current for an efficient LED might be around 1 mA...that won't stress the PIC's I/O pin. 20mA is requiring the I/O pin to work rather hard.
Microchip's data sheet for PIC16F88 shows the DC specifications that set some limits on GPIO (input/output) pin voltages and currents (a portion snipped below). The pertinent part is \$V_{OL}, V_{OH}\$ for I/O ports:
It appears that an I/O pin can sink current (8.5mA) with less stress than it can supply current (1.6mA). These are not limits, but are a single data point within the maximum limits stated elsewhere (Section 18.0 states that maximum current on any one I/O pin shouldn't exceed 25mA).
Sinking-better-than-sourcing is a common trait of GPIO output pins. So you're better off to sink...that means lighting up a LED by pulling current to ground - the LED's anode is attached to the +5V DC supply, and the GPIO pin pulls it ON by switching from logic high to logic low, through a series-connected resistor.
Example design:
A LED (when lit) requires about 2V when 1mA flows. Look to the LED's data sheet.
The PIC is powered from a +5v supply, which is also the point from which the LED anode draws its current. So VDD is +5v compared to VSS at zero volts.
A GPIO pin is set as "OUTPUT" and is pulled to logic LOW to turn on the LED.
The series resistance for 1mA LED current would be \$ (5.0 - 2.0)\over (.001)\$. That's 3000 ohms.
A more exact solution might account for the internal ON resistance of the PIC's I/O pin. This would be the ON-resistance of a N-channel MOSfet.
The data sheet (above) suggests this resistance is \${0.6V}\over{8.5mA}\$, about 71 ohms.
So a proper series resistor would be \$ 3000 - 71\$ ohms. But you wouldn't notice the difference in LED brightness compared to a 3000 ohm resistor.
simulate this circuit – Schematic created using CircuitLab
Note that a blue LED requires more voltage to light up than a RED LED, perhaps 3.4V instead of 2.0V....NO current flows until you exceed a LED's turn-on voltage. It is current that produces light. If your DC supply was low (perhaps 3.3V), the blue LED could not be reliably lit.
Well, how much current does an IC draw? How much is too little, how
much is too much?
The PIC itself will draw current from its DC supply just to operate. Current flow depends a great deal on how fast it is operating...the data sheet can be confusing and has many charts showing current pulled from the DC supply under many operating conditions. While asleep, with no clocks running, it may pull a few microamps. A fast clock (20 MHz) with +5V supply might pull 5mA.
In the example circuit with LED ON, and a 20MHz clock, 5mA might enter VDD pin. This current would also exit VSS pin. But the VSS pin would also include the 1mA LED current, so 6mA exits VSS. From the power supply, 6mA flows.
Data sheet section 18.0 shows maximum limits. These are pain-of-death limits. For VDD, VSS, the limit is 200mA. That'd be one very hot PIC!. How could so much current flow? If you tried to light up many LEDS very brightly with all the available GPIO pins, with small-value series resistors (like zero ohms), a great deal of current might try to flow.
A caution regarding GPIO pins. They default to input rather than output. A GPIO pin can float around at any voltage between VDD and VSS. The electric field of a hand waving over the chip can change its voltage. It is not good to have a GPIO pin float near half-way between VDD-VSS. Excess current can flow. An unconnected input pin should be dragged down to VSS or dragged up to VDD. Dragging might be done with a resistor, in case the pin gets set to "output". |
H: Can long-range radio waves from an RTV tower penetrate thin plastic composite material next to its source?
We are currently developing a conceptual design for the renovation of Croatia's main RTV tower located on 1033 meter tall peak Sljeme at the Medvednica mountain north of Zagreb. The idea is to renovate and reopen its upper gondola for touristic purposes (as a revolving restaurant and viewpoint towards Zagreb metropolitan area, as it was initially intended) and to build another floor of apartments on the roof-top level of a lower maintenance and equipment gondola. Basically, the wish of the investor is to make it an important landmark of Zagreb and place its touristic purpose, which it was lacking since its construction ended in 1976, because it was only opened for public 2 years, above its primary function which is receiving, boosting and transmitting radio, ATC and television signals in a radius of approximately 100 kilometres.
However, after our social studies and researches, we determined that this investment would be absolutely useless because nobody considers it as an important landmark which tourists should, or would want to visit just because of that, considering its distance from the city and long drive to reach it. As you can see in the picture below, the body of this monstrosity is completely covered with antennas and aesthetically it looks unpleasant and way too much utilitarian. My problem is that I absolutely have no idea what these devices are. Are those receivers or transmitters?
Our concept and solution is as follows: we want to envelop the tower's central body, beneath the upper gondola and part of its lower gondola with organic, deconstructivistic "curtain facade" made out of highly perforated (ca. 60%) approximately 5 mm thick lightweight plastic composite material panels, to visually "hide" those antennas behind, and to give the tower a brand new vibrant composition mixed with LED lights for night light shows, which will make it very eye-catchy from Zagreb and all surrounding cities.
From my personal research and previous general knowledge about long-range radio waves, which are transmitted and received by this tower, is that this should not affect its performance, because of the wavelengths and frequencies of those waves as such, they would just slice through this median without reflection and deviation of direction with minimal losses in strength. There are also some radome plastic materials which we could use to implement this, in which antennas are usually covered and that could be used for this.
Is that all above correct, or will our intervention of this kind render the tower completely useless and we will leave half of Croatia without ATC, radio and TV broadcast coverage? Keep in mind that this is only a conceptual idea we are considering to implement, and it will anyways probably be rejected and scrapped by the investor. We just want to know if it's okay to go out publically with this project as we imagined, or will we embarrass ourselves proposing something as ridiculous as that? I'm still just architecture and civil engineering student with minimal knowledge in electrical engineering and stuff alike, so if someone could give me some advice or answer my doubts about the idea above, it would be highly appreciated. I am sending you a link to some public documentation and specifications about the tower and the channels types it is broadcasting.
Wikipedia: Zagreb TV Tower
Technical documentation with diagrams and illustrations:
https://hrcak.srce.hr/file/18627
Recent image of the tower and antenna cluster it is equipped with:
The upper steel antennas painted in anti-collision red and white pattern are none of our interest, only the antennas installed on the platforms around the tower's central body. Can someone recognize what are those for, and can their path be obstructed with described panels above, without significantly influencing their work on a daily basis?
Many thanks in advance for your time and understanding, I would highly appreciate any feedback and thoughts about our idea and if it can eventually be implemented.
AI: covered with antennas and aesthetically it looks unpleasant and way too much utilitarian.
… I heartily disagree, but that's just a matter of taste.
My problem is that I absolutely have no idea what these devices are. Are those receivers or transmitters?
These things are antennas; some are used for receiving, others for transmitting, most for both.
The red longish ones look like common 2G/3G/4G cellular antennas.
The smaller rectangular antennas might be the same
The large dishes on the left of the tower pointing into roughly the same direction are probably satellite dishes pointed at geostationary satellites.
The "drum-like" round ones are high-directivity microwave antennas for stationary point-to-point links. They provide such things like giving cell towers elsewhere an uplink to the cell provider's backbone, or directly attaching factories to company networks, or are the link used by a radio station to bring the radio signal to the broadcasting tower. They are also dish antennas, but in a protective housing with a relatively RF-transparent shield against weather in front.
Then there's things I can't assess:
There's the big, dark-gray "sphere" on the lowest level. That's probably a radom, i.e. a housing for a movable antenna. The fact that it's dark might indicate it's actually usually used in naval or military applications. It might be tracking a satellite, or ships on the sea, or troops on the move.
The second level has these gigantic "cut-off tubes"; I've never seen something like this; these might be military high-bandwidth antennas, but that's pure speculation.
We want to envelop the tower's central body, beneath the upper gondola and part of its lower gondola with organic, deconstructivistic "curtain facade" made out of highly perforated (ca. 60%) approximately 5 mm thick lightweight plastic composite material panels, to visually "hide" those antennas behind, and to give the tower a brand new vibrant composition mixed with LED lights for night light shows, which will make it very eye-catchy from Zagreb and all surrounding cities.
First of all: you're asking the wrong folks. These platforms have been rented out to companies operating these antenna systems, and all hinges on them agreeing to your plans – it's very unlikely a touristic attraction would ever generate as much revenue as the infrastructure is worth here. If at all possible, you need to have goodwill of whoever owns these platforms they rent out, and political support from above. The operators have rented the platform with guarantees about unhindered line of sight, with power reliability levels, and with a guarantee that the antennas are easy to access for maintenance, and access to the antennas is strictly regulated.
Then: I like the idea, aesthetically :) !
So, plastic will absorb RF, and that will be hard to sell to the people using these antennas. However, that effect scales with the percentage of that plastic that's actually holes, and there's worse and better plastics, so there's potential for compromise. However, expect things to become more expensive than thought.
Then: "Composite" is a bit too vague. There mustn't be any metal in front of these antennas. That rules out the possibility of putting LEDs directly in front of them.
Apropos in front: Human workers mustn't accidentally happen to end up in the beams of these dishes. That's microwave. In your microwave oven, you use that to cook soup.
So, all in all, I don't think that putting something in front of these antennas is actually feasible, and especially politically much less feasible then technologically. I still think your concept could work – just exclude the platforms from the enclosing, and maybe work with conformal light projection on these surfaces. The operators don't get a word about which pictures are projected onto their antennas :) |
H: Why does unaligned memory read require extra clock cycles?
I believe I understand how memory reads work with the 8086 processor.
The 8086 has a 20-bit address bus and 16-bit data bus (multiplexed).
The memory module consists of two memory banks, and the LSB of the address bus is used to select which bank to access when reading a single byte. The remaining 19 bits provide the address within the memory bank.
When reading two bytes from a two-byte-aligned address, each memory bank contributes a single byte onto the 16-bit data bus.
As I understand, when reading two bytes from an unaligned address, the read is done in two clock cycles - first, the odd-address byte, and then the even-address byte, from the modified address (i.e. the original 19 bit address plus one).
My question is: why are two clock cycles required to accomplish this?
Can't it be done in a single clock cycle, using a simple adder and multiplexer, to put the two bytes in the correct order on the data bus?
Something like this:
AI: You proposed idea would require a 20-bit adder in the address path, which is a critical path for determining RAM R/W access time. In the 8086 time frame, 20-bit adders were slow enough that the memory access time could be significantly impacted, thus slowing down all aligned reads, increasing costs and decreasing benchmark performance numbers (since aligned reads are far more common). |
H: Is an op amp voltage follower better than one made with discrete (MOS)FETs?
Is there any advantage of the following op amp based voltage follower:-
over one made with discrete MOSFET components such as:-
other than component count?
AI: Yes opamps are better. the opamp is two components: the opamp and the bypass capacitor.
the mosfet follower is 5 components.
Additionally, opamps have lower offset voltages and better linearity, and better accuracy because of large amounts of negative feedback.
The only case where I would use a discrete follower would be with high voltages. Because it is more difficult to get high-voltage opamps that are cheap. |
H: Why does 50 Ω termination result in less noise than 1 MΩ termination on the scope reading?
Regarding the following section from the Keysight document "Making Your Best Power Integrity Measurements":
It says that using 50 Ω termination we will see less noise on the scope compared to 1 MΩ.
Can this be explained by modeling what is meant here as an electrical circuit? I'm trying to understand why lower resistance causes less noise on the scope screen.
AI: The first thing to consider is the Johnson noise of the resistor which cannot be eliminated. The higher the resistance the greater the noise. Reducing bandwidth will also reduce Johnson noise. So if your scope has bandwidth settings, and if you don't need high bandwidth for your signal, you can get cleaner results using the reduced bandwidth modes.
The second thing to consider is noise which couples in to the oscilloscope, particularly if it couples through the probe wiring arrangement by way of a magnetic field. The time-varying magnetic field will induce a current in the probe. The termination resistance inside the oscilloscope will convert that current to a voltage. If the termination resistor is 50 Ohms, that will lead to a much smaller voltage than if it is 1M Ohm.
In general, lower impedance termination is more resistant to noise. This is a very important concept when you encounter situations where noise immunity is required. Usually any noise coupling path will have some series resistance or fundamental power limiting just by its nature. So the lower your termination resistance, the lower the voltage due to noise coupling. Sometimes a 20 pF capacitor on a digital input can make the difference between a flaky and totally unreliable piece of junk and a rock solid product.
Often if I need to put the oscilloscope on a shunt resistor, I will use the 50 Ohm termination feature of the oscilloscope. This greatly reduces noise, and since the shunt resistance is much less than 50 Ohms (for the shunts I deal with) there is no worry of excessive current flowing into the oscilloscope, even if the shunt current may be high.
This image was formally assigned to the public domain by its creator (not me). Retrieved here: https://upload.wikimedia.org/wikipedia/commons/f/f6/JohnsonNoiseEquivalentCircuits.svg) |
H: Why do fuses burn at a specific current?
We usually specify the maximum current that a conductor (such as a fuse) can handle without burning. But doesn't the conductor really fail when a certain amount of energy/heat has been dissipated in the conductor? Then the conductor is at a too high temperature and burns/melts.
Let's say I have a fuse that's rated for 10A. Why is it then that I can operate the fuse continuously at a lower current like 9A without the fuse burning too, but just a bit later?
We also know that power, voltage and current are related by Ohm's law. So if we have a 10A fuse, and it has some arbitrary resistance such as 100 ohms, why don't we instead call it 1kV fuse (10A * 100 ohms), or 10kW fuse (10A * 10A * 100 ohms)? These numbers are completely arbitrary so I know they don't reflect reality but they make my point clear.
AI: So if we have a 10A fuse, and it has some arbitrary resistance such as 100 ohms, ...
This typical 10 A fuse has a resistance of 5 mΩ. So your guess was out by a factor of about 20,000. At 10 A the power dissipated is given by \$ P = I^2R = 10^2 \times 5m = 500 \ \text {mW} \$.
RESISTANCE: The resistance of a fuse is usually an
insignificant part of the total circuit resistance. Since the
resistance of fractional amperage fuses can be several
ohms, this fact should be considered when using them
in low-voltage circuits. Actual values can be obtained by
contacting Littelfuse. Source: Littlefuse Fuseology Application Guide (which is well worth a read).
The reason for higher resistance in fractional ampere fuses is that the fuse wire is about the same length as the 10 A version but would have to be much finer to blow at, for example, 100 mA. A 100 mA fuse may be protecting a circuit normally drawing, say, 50 mA. If the fuse resistance was 1 Ω then there would be a 50 mV drop across it in service.
The required diameter of a fuse wire can be calculated from $$ d = \left( \frac {I_f}{C} \right)^{\frac {2}{3}} $$ where where If is the fusing current in amps, C is Preece’s Coefficient for the particular metal in use. (Source: Ness Engineering.)
From this we can see that a 10 A and 0.1 A (a factor of 100) fuses of the same material would result in the 10 A fuse having a wire diameter \$ 100^{\frac {2}{3}} = 21.5\$ times that of the 0.1 A fuse.
... why don't we instead call it 1kV fuse (10 A * 100 ohms), or 10 kW fuse (10 A * 10 A * 100 ohms)?
Because it is an over-current protection device. Fuses already have a voltage rating that means something completely different. See below.
The fuse needs several ratings:
The current (which I think is obvious enough).
The voltage rating of the fuse. This specifies the maximum voltage it can break reliably without forming and sustaining an internal arc.
The time rating - how quickly it will blow.
The Littlefuse article covers all of these in great detail so there is no need to reproduce it here. |
H: FPGA input capacitance
I want to estimate power consumption of a battery powered digital circuit that has a CPLD (Lattice LCMXO2-256HC). It receives 64 MHz signal into LVDS input and 10 MHz, 2.5V into a schmitt trigger input. Its output is ~50 kHz so I'm not concerned about the output capacitance. So the question is, how does the input capacitance depend on the input settings, supply voltage, packaging etc or its just the process variation? The datasheet specifies 3-9 pF at 1 MHz, 25°C but that's too broad for me, maybe I can narrow it down somehow?
AI: Most of the capacitance comes from the packaging, and then from the gate/drain/source capacitance of the transistors. I don't think anyone but the manufacturer will be able to narrow the range for you. Someone on the internet may have anecdotal numbers to offer, but the manufacturer is free to change the package or the process at any time as long as the part still falls within the specified range. If you only need a few parts, measure the capacitance yourself. |
H: Circuit exercise with diodes
So , I found this exercise online :
I am having having a hard time finding the conducting values of the diodes . Will D1 conduct for Vin>=10 and D2 for Vin<=-10? And what will be the value of Vout when both of the diodes don't conduct? (Assume that both of the diodes are ideal ,V2=Vin and V=Vout)
AI: You can't solve these kinds of problems with a simple equation because the diodes are non-linear.
You need to consider (analyze) four separate cases: both diodes conducting, neither diode conducting, only D1 conducting, and only D2 conducting. Find the currents through the diodes and the voltages across them in all four cases.
If you assumed that a diode was conducting and you find that a positive current is in fact flowing through it, and if you assumed that a diode was non-conducting and you find that the voltage across it is negative (or less than \$V_f\$), then your assumption is correct. If you analyze a particular case and find that the voltages or currents are inconsistent with the assumptions then you can reject that case.
Once you find the only set of assumptions that is consistent with your analysis, you can go ahead and find \$V_{out}\$. |
H: Help finding voltage between two points
So, how should I proceed to find U_ab (or V_ab)?
I have found I = -0.5mA, U_1=-2.5V, U_2 = -0.5V, U_3 = 2.0V.
How would I even find U_a and U_b separately so I can apply U_ab = U_a - U_b?
Also, does the 10v source receive or deliver power?
AI: Start at point b and walk to point a, adding up the voltages across components as you go.
You have two paths, so if you're being thorough walk both paths and make sure you get the same answer -- if you don't, you made an error. |
H: Is it misleading to say "holes in semiconductors jump to the other side"?
I'm getting a little confused with the convention of saying that "holes in a semiconductor will move from p-side to n-side and electrons will move the opposite way". I have no trouble with the concept itself, it just seems to me that an electron moving from one side to the other would mean it left a hole behind where it used to be?
Am I understanding it correct that we just think of electrons leaving behind holes as "holes moving" or do I actually misinterperet the way this works?
AI: From your quote it sounds like you are learning about charge carrier diffusion in a P-N junction. When those electrons and holes diffuse they don't leave behind a mobile charge carrier of the opposite type. They do however leave behind an ionized dopant atom, which is a fixed charge of the opposite type.
When dealing with semiconductors we two different mobile charge carriers: electrons and holes, as well as two energy bands where they can exist: valence and conduction. When talking about electrons and holes in a semiconductor, we mean electrons in the conduction band, and holes in the valence band. When these carriers are in the other band, they don't contribute to conduction, so we ignore them.
Many people like to think of a hole as a missing electron, but I think that is a bad description of the system for a few reasons. First, it is important to treat electrons and holes separately as their own individual particles. You can't rewrite all of semiconductor physics to work with just one carrier type (you probably can, but it would be much more complicated) Second, as previously mentioned, electrons and holes contribute to current when they are in different energy bands. So, a hole in the valence band moving is very much not the same thing as an electron in the conduction band moving in the opposite direction. In fact, the Hall effect relies on this to be the case.
Am I understanding it correct that we just think of electrons leaving behind holes as "holes moving" or do I actually misinterperet the way this works?
You can generate an electron-hole pair by moving an electron from the valence band to the conduction band, which results in +1 electron in the conduction band, and also +1 hole in the valence band. But from your quote it sounds like you are talking about carrier diffusion. In which case, no, electrons and holes moving around within a single band do not leave behind a carrier of the other type. They might, however, leave behind an ionized dopant atom, which is a fixed charge.
You are going to have a much easier time with semiconductor physics if you think of holes as just another type of particle, similar to electrons but with a positive charge (and a different mass).
To address some concerns from the comments I have included here some quotes from Solid State Physics by Ashcroft and Mermin page 227-228. This discussion relates to where holes come. Once you determine your material's electronic band structure you may do the following:
It therefore suffices to examine how electrons respond to applied fields to learn how holes do. The motion of an electron is determined by the semiclassical equation:
\$\hbar \mathbf{\dot k}=(-e)\left(\mathbf E+\frac{1}{c}\mathbf{v}\times\mathbf H\right)\$ (12.22)
Whether or not the orbit of the electron resembles that of a free particle of negative charge depends on whether the acceleration , \$d\mathbf v/dt\$, is or is not parallel to \$\mathbf{\dot k}\$. Should the acceleration be opposite to \$\mathbf{\dot k}\$, then the electron would respond more like a positively charged free particle. As it happens, it is often the case that \$d\mathbf{v}/dt\$ is indeed directed opposite to \$\mathbf{\dot k}\$ when \$\mathbf{k}\$ is the wave vector of an unoccupied level
It goes on to explain why this happens which is outside the scope of this question, and ends with:
we find that as long as an electron's orbit is confined to levels close enough to the band maximum for the expansion (12.23) to be accurate, the (negatively charged) electron responds to driving fields as if it had a negative mass \$-m^*\$. By simply changing the sign of both sides, we can equally well (and far more intuitively) regard Eq (12.22) as describing the motion of a positively charged particle with a positive mass \$m^*\$.
So yes, the electron/hole model allows for you to look at the system as two different particles of the same charge, but one has a negative mass, or you can model the system as two particles with the same sign mass, but opposite sign charges.
The takeaway is still that electrons and holes are two different things and the "holes are just missing electrons" model is inaccurate and does not work (again, see the Hall effect). |
H: Modification to Arduino 12V Detection Circuit
I'm upgrading the interior lights on an older model vehicle. The plan is to tap into the very simple lighting circuit (always hot with a switch for on-off-door) to detect each scenario. Light switch on, stock lights come on = Arduino does something; Light switch in door position and doors open = stock lights come on, Arduino does something different.
In response to a similar question a few years ago, Phil Frost uploaded the following diagram, which uses a pull-up resistor before the optocoupler:
I would like to modify this circuit, such that current only flows on the Arduino side if it is also flowing on the 12V side. Here's what I've come up with:
There are a lot of other details to this project, but the questions I have are just regarding this circuit:
Will this work just as well as the original?
Is there any benefit to using the modified version over the original?
AI: An arduino input is very high resistance, generally in the multiple Mega-ohm to Giga-ohms, so the consumption through the arduino input will be very low, the arragements just change whether it is idle high or idle low, which as far as the arduino's actual power consumption is a hair lower if the pin is towards its positive supply rail,
If you wanted to simplify things, you could likely use the arduino's pin pullup instead of an external resistor, this way you could turn off that sensor when the lights are on, and just poll it occasionally.
The 4N25 will actually leak some current, it never fully switches off, however its generally pretty low, |
H: Weird component in load cell Wheatstone bridge
While trying to repair a cheap digital kitchen scale, I came across this component (see picture below). AFAICT, this is 95% identical to the standard Wheatstone bridge interconnect for combining 4 individual load cells with 3 leads each; the red wires directly lead to the scale's controller. However, it has one additional twist: one of the red wires is connected to something below the white resin blob, and then continues to the controller. Unfortunately, even very carefully trying to remove a bit of resin seems to already have destroyed that component, I also removed something looking like Kapton tape with a trace on it. Before, the two leads going in and out of the resin blob measured about 65 Ohms of resistance; afterwards, it's more like 17 kOhm.
I already had sort of given up on the scale, so as a last-ditch attempt, I just bridged the mystery component with a bit of wire, but that didn't help either, the scale doesn't calibrate properly anymore.
But my curiosity has been piqued: can anybody venture a guess what that component is? I was guessing something like a PTC resistor to compensate for environment temperature, but isn't that the reason why these cheap scales self-calibrate on powerup, because you can save the temperature sensor?
AI: The way to remove this kind of resin is generally with a solvent like methelated spirits and a toothbrush, just takes a long time, have a small jar or similar, place the board in it, and let it soak for a half hour, pull it out and brush away the few 10's of microns of surface material that softened, then put it back in the jar, and repeat
My guess is that component is a laser trimmed resistor, its made of a white ceramic from what I can see, that is likely there factory calibration, to trim the gain of the scale,
The device only corrects its zero every power up, not its gain, so you may have to work out what that resistance was. |
H: How to read this capacitor
https://i.stack.imgur.com/mjF4e.jpg
This is in a 2004 manufactured motherboard, Sanyo brand capacitor
Can anyone help me identify the mf rating and volt. And why it’s written like this
AI: Top right corner, 620uF 6.3V,
Left, 750uF 4V
As to why I read it that way, there are a few hints, first it is a motherboard, so it won't have multiple hundreds of volts, next low capacity high voltage capacitors are much larger than high capacity low voltage capacitors, |
H: Data Bus and High Impedance
Let's consider an interface between a simple microprocessor and a certain memory. For instance, let's assume that the microprocessor drives the address bus, a read signal, a write signal, and that the data bus is a bidirectional signal, which can be driven by the processor or by the memory depending on if it is doing a reading or a writing.
In that case, it is necessary that after a reading, the memory puts its output on data bus at high impedance, and that after a writing, the processor puts its output on data bus at high impedance. Both operations to avoid conflicts.
But what if for instance we have a data bus for reading (driven by the memory) and a data bus for writing (driven by the processor)? Is it necessary (or anyway better) that the processor puts its output on the databus he drives at high impedance after a writing operation?
AI: You only need to set a bus to high impendance if you have more than one device with drivers for that bus. It doesn't matter if this device is a processor or a memory.
In the case of multiple devices being capable of driving the bus, it is an error if more than one of them do this at the same time. That's why data bus drivers usually go to high impedance after being active.
Many processors are able to put their address bus into high impedance, too. This is necessary for example if you have DMA devices, DMA = direct memory access. |
H: How to correctly set logical high level on a PS/2 port?
I'm trying to make a keyboard emulator on ATmega16A. I'm currently implementing logical low as output-zero, and, since the host(?) is supposed to pull up the line, I send logical high state as input mode of my pins. This lets me easily check that inhibit condition hasn't happened while I'm transmitting data, in addition to outputting "1".
But the problem is that in this mode, the time to raise the voltage to 95% VCC appears to be about 25 μs, which is quarter of the maximum allowed clock period (minimum frequency is 10 kHz). So I've now tried to actively drive the pin to VCC, and only then switch it to input mode to check for inhibit condition.
Is this kludge of actively driving the bus high actually legal from the protocol POV? I'm following this document and have failed to find how exactly one should output logical high level.
Should I instead use a lower-resistance pull-up resistor on the keyboard side and leave the pin in input state when trying to output logical high value?
AI: With PS/2 interfaces, both the host and the device should have pull-ups. So put stronger pull-ups on AVR side. Pulling it high even for a moment is just wrong. |
H: D Flip-Flops at MCU IOs
I found below PCB from a machine. It has a MCU for control all inputs and outputs and MCU inputs and outputs go through HCT374 IC to optocouplers that isolate all inputs and outputs.
What is the application of this D Flip-Flops?
AI: The fact that there's a multi-flipflop IC in the path between MCU output and optocoupler will have multiple reasons:
drive strength: The LED within an optocoupler needs some defined current – the MCU might simply not be able to supply or sink current for each LED or for the sum of all. The flipflop output might be able to do that!
level translation: The LEDs might want a different voltage than what the MCU can directly supply; a flipflop with a different supply voltage might solve that. Same in the opposite direction.
stability: If the MCU crashes or browns out, these flip flops would ensure the output state gets preserved. Some flipflop ICs (not this, I think) do also have Schmitt-trigger inputs to increase noise/ringing immunity
synchronicity: This very much depens on the MCU, but usually, you can switch only a limited amount of outputs at a given time (for example, one output bank a 8 outputs, at most). If it's critical that switching of a greater number of output happens within a very short time frame, it would make sense to switch the MCU outputs in what ever order and time you want and can, and then latch all flipflop outputs at once using a single latch output.
versatility: as long as you don't touch the latch line, you can do whatever you want to the MCU outputs without changing the state of the optocouplers' inputs. So, if your MCU has run out of pins, and you don't have to switch the optocouplers all the time, then this is an easy way of getting two usable outputs out of one pin. This theory is supported by the fact there's vias in the signal lines going to the flipflops on your photo. |
H: Is this an active or a passive circuit?
Is this an active or a passive circuit?
AI: The two 5V sources cancel, lets say you feed in 1V, the right 2 Ohm resistor ends up only seeing a difference of 1V, same if you feed a current in at "I", the offsets do not prevent the current from flowing through this right resistor, so for all purposes you can remove them, they neither affect nor influence the circuit in any way.
This leaves you with 2 resistors in parallel, a passive and linear circuit. |
H: Polarity of gas discharge tubes
Do gas discharge tubes used e.g. for surge protection have a polarity, i.e., do they protect in both directions (i.e., depending which wire is hit, or if it is a positive/negative lightnings?
The symbol (see below, from Wikipedia) has a dot that suggests some asymmetry. Electrons should be able to jump in any direction, but how are the positive/negative electrodes engineered to facilitate/stand the discharges?
AI: Photo attribution:By Ceinturion 17:47, 19 August 2007 (UTC) - Own work, CC BY-SA 3.0, https://commons.wikimedia.org/w/index.php?curid=2587926
Small dot indicates "gas-filled". Likely at sub-atmosphere pressure. Its position within the schematic symbol doesn't suggest polarity.
These devices may include thoriated electrodes to reduce striking voltage.
So for this example: it is bipolar....strikes with either polarity. |
H: what is this type pulses called?
I was wondering what is this type of pulses is call. Is it a sin wave? I know its the result of sinusoidal pulse modulation. is it considerd a quasi-sin wave?
I would like to know the name to research it more.
AI: I think this pattern is called "wave packet".
https://en.wikipedia.org/wiki/Wave_packet |
H: Are there any modern tradeoffs that come with designing more efficient DC-DC switching power converters?
Are there common metrics that usually degrade (ex. ramp time, line/load regulation, low-load efficiency) when pursuing more efficient designs, especially for isolated converters?
If you saw a new isolated high-power DC-DC converter advertising 99% efficiency, what performance factors would you be skeptical about?
(sorry if this is too broad again, still getting used to what scope I should write my questions at, and I have a lot of questions I'd like to ask.)
AI: The high edge rates that high efficiency high frequency DC-DC converters usually require can potentially generate harmonic EMI/RFI across a vast range of EM spectrum (multiple HF shortwave bands and up), even if within legal (U.S. FCC, Part 15) RF limits. Good EMI/RFI filtering on the output and shielding of both the converter and the input feed cabling, both in design, and across component tolerances over a large production run can add to product cost. Mechanical stress, aging, and connection oxidation can allow an increase in any emitted EMI over time. |
H: Photodiodes: the "generation" mechanism behind photocurrent
Assume I use a photodiode under zero-bias (that is in photovoltaic mode). How/why can a current flow in this bias condition?
As far as I have understood the working principle of photodiodes, when photons hit the depletion region of the P/N junction, the energy absorbed causes the creation of electron/hole pairs. Due to the electric field in the PN junction those charge carriers are separated and "flow out" at the terminals of the diode.
This somehow makes sense to me when a diode is used in photoconductive mode, where an external voltage source provides an electromotive force (and therefore an E field in the diode), but under zero-bias, there is no E field inside the diode that could "pull-apart" the created electron/hole pairs?
AI: Actually, there is an electric field in the depletion region in a diode with zero bias. Depending on what problem you're trying to solve at the moment, it's either the cause of the depletion region, or a necessary effect of the cause of the depletion region. Either way, it sweeps the depletion region free of carriers.
So when a photon smacks into a diode junction and succeeds at creating a hole/electron pair, the usual consequence is that the hole is swept into the cathode, the electron is swept into the anode. Thus, light drives current.
In fact, a pretty good model for a photodiode of any kind, whether it's an itty bitty super-fast diode for receiving laser pulses, or a component of a solar cell, is a plain old diode in parallel with a current source. The actual photocurrent is fairly constant (I'm sure the actual number of electron/hole pairs generated per photon varies somewhat, but to a 1st-order approximation it ain't much). Most of the differences in photodiode behavior as a function of operating point have to do with the behavior of that virtual "dark diode" that's in parallel with the current source.
simulate this circuit – Schematic created using CircuitLab |
H: Ramp compensation for UC1843 and UCC38C44
When we pick up the datasheets of UC1843B-SP and UCC38C44, we notice that they have the same functional block diagram, specially the PWM generator circuit (Error amplifier, current sensing PIN and the comparotor), the error amplifier of both devices goes through a divider by 3. But when we come the "slope compensation design", we notice that there is a diffence in the design process between the two devices.
*In UC1843B-SP, in page 18/27 of the datasheet, a gain "Gcs=3" is incorporated in the slope compensation design (See equations 46 to 51).
*In UCC38C44, in page 30/50 of the datasheet, we do not see any gain in the design of slope compensation(See equations 31 to 38).
Why there is a difference in the design of current sensing and slope compensation between these devices eventhough they have the same functional block diagrame?
What is the effect of the divider on the output of "Error Amplifier" to the current sensing and slope compensation PIN ?
datasheet of uc1843B-SP: http://www.ti.com/lit/gpn/UC1843B-SP
Datasheet of UC38C44 : http://www.ti.com/lit/ds/symlink/ucc38c44.pdf
AI: There should not be a difference between the two circuits beside the rad-hard qual for one of them provided that the external slope is added to the CS pin. Slope compensation consists of reducing the current loop gain by adding an external positive slope to the CS pin. It helps taming the double sub-harmonic poles located at \$F_{sw}/2\$. If you now decide to subtract the ramp from the CMP pin instead, then yes, the divide-by-three gain enters the picture as it reduces the internal slope effectively applied at the CS comparator.
Rather than taking a portion of the oscillator ramp, it is more rugged to actually build a lower-impedance ramp generator from the DRV pin. It has been implemented by R. Ridley in the 90' I think and has proven to be an excellent solution versus the solution from Unitrode.
The ramp is generated using a simple \$RC\$ network and a switching diode. See the below slide excerpted from this APEC 2018 seminar:
The divide-by-3 circuit affects the loop gain and enlarges the dynamics of the feedback signal: 0 to 3 V to produce a 0-to-1-V setpoint versus no divider which would produce a 1:1 CMP to CS setpoint, constraining the op-amp dynamics. The two series diodes provide a true 0% duty ratio setpoint when the CMP pin falls below \$\approx 1.2\;V\$. |
H: different threshold value of 2 inverters
What is the meaning of having 2 series inverters, one with the switching threshold at 1.025 V and the other with the threshold at 0.3V?
What does this difference between the switching levels mean?
The circuit has a sine wave at the input of the inverters and it makes a clock signal from 1.8V to 0V.
Thank you!
AI: Switching threshold means inverter is working when the input more than threshold (kind a comparator) . So In your circuit 1.035v inverter's duty cycle is %43.5 other's duty cycle is %83.If you want %50 duty cycle you should chose a inverter with 0.9V switching threshold.Also if you connect these inverters parallel they short circuit each other because of phase difference (one is positive when the other negative (or ground)) |
H: Single Supply Class-A-Amplifier circuit to amplify voltage signal alternating around ground
I have a sensor which outputs a voltage signal alternating a few millivolts around zero volts and want to design a circuit which prepares this signal for processing by a microcontroller like in the picture below:
Now the problem is that i only have a supply voltage range between 0V and 3.3V and therefore need to add some DC offset to my signal and then amplify the alternating part.
I think that op amps are not suited for my application because they amplify the DC signal as well as the AC Signal and so I thought of a class-A-amplifier circuit like this:
simulate this circuit – Schematic created using CircuitLab
Now the question:
Is it possible with the class-A-amplifier to process my millivolt input signal to the larger one in the picture at the top or are there any better methods?
AI: Use an opamp circuit, non-inverting config, with a gain of 30. I. E. R2/R1 = 29
Connect R1 to gnd through a large cap.
Make a resistive divider across your Vsupply to get midpoint of 1.5v
Connect your signal through sufficiently large cap to non-inverting pin.
Connect resistive divider centre point also to inverting terminal through large resistor (say 1Meg)
That's your circuit.
Choice of opamp and of caps depends on your pulse width and spacing etc etc. Also opamp power supply should be properly selected for opamp chosen. |
H: Can a 74AHCT IC be a drop-in replacement for 74HCT IC
I have a circuit in which I interface a radio module running on 3.3V indirectly from a 5V supply.
I use a regulator to provide the 3.3V module VCC and the data is exchanged between both circuits through double-inverters (74HCT04).
This setup does work, but I read that if I used 74AHCT parts in place of 74HCT then the speed of operation will be 2-3x faster.
If I exchanged the 74HCT04 with a 74AHCT04, would the part still work or would there be special clamping diodes (like in the 74HC series) that would prevent the voltage conversion on the data signals to take place?
The data being exchanged between the radio module and the rest of the circuit is continuous and digital at the speed of 38400bps.
AI: The 74HCT04 is plenty fast enough (~25ns) for 38.4k transmission speed (26usec/bit). 8ns vs. 25ns will not be noticable, though as analogsystemsrf points out, it may cause more ringing that may or may not be a problem.
The main difference you may notice is that the AHCT part draws about double the supply current when the inputs are at ~3.3V (~1.5mA per input at ~3.3V vs. ~0.75mA per input at ~3.3V).
Clamps do not come into play when the IC is powered from +5 (and it is not specified for 3.3V power). The HCT has diode clamping to Vcc. |
H: Why does the measured current differ from the calculated current in this circuit?
I have the following schematic:
Now I want to know the (more or less) exact current flow in my circuit. For this I did the following calculations:
I = V / R
I = 5V / 330 Ohm
I = 0.015A = 15mA
So with what I now know I expect approximately 15mA to flow across all the wires. However, when I try to measure the current flow by placing my multimeter (in series) between the LED and the resistor I measure I = 9.4mA.
This difference of 5.6mA between the calculated 15mA and the measured 9.4mA seems too large to be due to manufactering deficiencies of the parts of the circuit. Therefore I assume I am making some error in my assumptions/logic, but I cannot figure out what. Can someone help me with this?
Thanks in advance.
edit
As per comments/answers I measured the voltage over the LED and the resistor:
- Resistor: 3.18V
- LED: 1.94V
Also the resistor's actual resistance:
- 325 ohm
Now the calculation indeed does make sense:
3.18V/325 Ohm = 9.8mA
Which is close enough to the measured 9.4mA.
Thanks everyone for helping out!
AI: $$I=\dfrac{V_{CC}-V_{F}}{R} = \dfrac{5V-1.8V}{330\Omega} = 9.7 mA$$ As example the LED forward voltage drop is 1.8V.
An easier approach is to calculate the required resistance:
$$R=\dfrac{V_{CC}-V_{F}}{I_F}$$
For example: I have orange LED and I want 10 mA current through: If=10ma -> Vf=1.7V
Image source |
H: How does electrocution (fatal) happen?
I'm trying to make my workshop safer but I can't understand how electrocution happens.
For example, one hand is touching to live wire and neutral wire is not touched. If I know right, current flows from live wire to my body and to ground wire or earth but dry human hand's resistance is between 10-40k ohm so even my feet is touching directly to ground current is between 5.5-22mA and fatal dose is 30mA but how people get electrocuted from live wire without touching to ground or neutral wire?
Also can I measure resistance between live wire (or my hand) and ground? So I can get more accurate results.
I think I wasn't clear about my question : In my scenario neutral wire is insulated so current "have to" flow into ground , I understand my body's resistance not enough but floor or house have resistance too .
I made a small test for measuring resistance between my house and ground and I got three results :
1)One probe of multimeter connected to ground wire other probe connected to floor (I tried radiator too same result) multimeter showed more than 20M ohm resistance
2)One probe of multimeter connected to ground wire other probe connected my hand (feet touching to floor) multimeter showed 5M ohm resistance
3)One probe of multimeter connected to ground wire other probe connected to my left hand and my right hand touching to ground wire ,multimeter showed 200k ohm resistance
So only third scenario allows 1-2mA current other scenarios seem safe . if you see any mistakes in my tests please notify me so I can learn the truth.
Also when I making these tests I used special extension plug which only conducts ground wire other wires isolated from plug
AI: The amount of current needed to kill is not some exact number. It is around 20mA. One person will die at 20mA, another lives despite more current flowing through his body.
Body resistance is not fixed, either. On a cool, dry day where you don't sweat your skin resistance will be higher than on a muggy day with the sweat pouring off your body.
220VAC can push enough current through your body and through the ground (the literal ground or floor under your feet) to kill you.
Never work on live 220V circuits.
Have all 220V circuits in a closed, insulated or grounded container when they are operating.
Have a ground fault interrupter installed in the house wiring or outlet you use when experimenting.
Your "theory" that people are only killed by touching live and neutral is wrong. If you rely on live to ground being safe, then it will kill you one day - and before that, you will experience painful shocks from the current that isn't quite high enough to kill you.
The ground wire in your house is connected to the ground (literal ground made of dirt outside your house.)
The ground wire is connected to the neutral wire in your house.
Your house and the floor are connected to the ground, and thus to the neutral.
Grabbing the live wire while standing in your house is therefore the same as touching live and neutral. |
H: LED lights on 1.2 V battery
Hello.
I hope this is not too novice question. IKEA got stuck with piles of garden solar lighting (their product no 21777) which they sold for 1€ each.
Looking at the back (large solar panel, 2000 mAh NiMH battery, switch etc.) I took seven home (I wish I had taken 20...). I Took one apart to play with it and found a 3-LED block which gets 1.2 V and produces very strong light. What am I missing?
The block does not appear to have any electronics on it apart of the three parallel LEDs. How does the LED work on 1.2 V?
Hello again. I think that SamGibson's answer (with the Scope wave pic) is the right one. The battery is normal size as can be seen in the pic (it also say on it HR6/AA) and the module does not have any electronics on it. BUT the 1.2V DC I measured seem to be wrong (I use basic digital multimeter). as an experiment, I decided to connect the module outside, directly to the battery poles. Nothing !! but when I connected to the circuit it works fine. Changing the setting on the multimenter to AC shows 2.5V. As it is a basic multimeter, I assume that this is also very not accurate, but the the basic experiment shows that there is some sort of boosting circuit on the main board to drive those leds. (Now I just need to figure out why this does not drive my 5mm, flashing blue, LED...)
Many thanks to all that help and contributed.
All the best.
AI: The block does not appear to have any electronics on it apart of the three parallel LEDs
There will be electronics, since you can't light a white LED directly with the 1.2V from a rechargeable cell - around 3V is needed to light a typical low-power white LED with a low current (a higher voltage is needed for higher-power white LEDs). This has been covered in previous questions on the topic.
As mentioned in comments, you can expect to find a small boost converter as part of a solar cell LED controller - it might look like a 4 pin transistor with an external inductor, or it might be under a black epoxy "blob" (COB), again with an external inductor.
One example of such a component (there are many different types you could find in your solar light, so this is just one example) is the YX8050 - a typical solar light uses the schematic 1-2 below from that datasheet:
On my bench, I just captured this LED drive waveform from a YX8050 with a single white LED in a solar garden light (battery voltage = 1.2 V):
As you can see, the voltage to the LED reaches 3V with a duty-cycle of around 40% at a frequency of 788kHz. So the LED is flashing, but it's flashing so quickly that it appears to be lit continuously, due to the persistence of vision.
If you try to measure the DC voltage across the LEDs with a multimeter, you will measure a much lower voltage (I measured 1.2V), even though the LED is being driven with 3V pulses. If you could use an oscilloscope to measure the LED drive waveform on your LEDs, you would see something similar to the waveform above. |
H: Why would a Intel 8080 chip be destroyed if +12 V is connected before −5 V?
The Intel 8080 is a classic microprocessor released in 1974, fabricated using an enhancement-mode NMOS process, and shows various unique characteristics related to this process, such as the requirement of a two-phase clock, and three power rails: −5 V, +5 V, and +12 V.
In the description of the power pin from Wikipedia, it says
Pin 2: GND (VSS) - Ground
Pin 11: −5 V (VBB) - The −5 V power supply. This must be the first power source connected and the last disconnected, otherwise the processor will be damaged.
Pin 20: +5 V (VCC) - The + 5 V power supply.
Pin 28: +12 V (VDD) - The +12 V power supply. This must be the last connected and first disconnected power source.
I cross-referenced to the original datasheet, but the information is a bit contradictory.
Absolute Maximum:
VCC (+5 V), VDD (+12 V) and VSS (GND) with respect to VBB (−5 V): −0.3 V to +20 V.
Even if VBB is 0 V when it's unconnected, VDD would be +17 V, and it shouldn't exceed the absolute maximum. Is it the original claim on Wikipedia that a Intel 8080 chip be destroyed if +12 V is connected before −5 V correct?
If it is correct, what is the exact failure mechanism if I do this? Why would the chip be destroyed if +12 V is applied first without −5 V? I suspect it must has something to do with the enhancement-mode NMOS process, but I don't know how semiconductors work.
Could you explain how the power supply is implemented internally inside Intel 8080? Did the problem exist among other chips in the same era built using a similar process?
Also, if I need to design a power supply for the Intel 8080, let's say using three voltage regulators, how do I prevent damages to the chip if +12 V rail ramps up before −5 V?
AI: I don't have a complete answer for you, but the 8080 was one of Intel's first chips to use an NMOS process rather that the PMOS process of the 4004, 4040, and 8008 chips. In NMOS, the substrate must be the most negative point in the entire circuit, in order to make sure that the isolating junctions of other circuit elements are properly reverse-biased.
So, I suspect that the -5V supply, among other things, is tied directly to the substrate, and if the other voltages are supplied without this bias present, there are all kinds of unintended conduction paths through the chip, many of which could lead to latch-up and self-destruction.
To answer your last question, if your power supply doesn't have the correct sequencing by design, then you need a separate sequencer — a circuit that itself requires the -5V supply to be present before it allows the other voltages to reach the chip.
To echo some of the comments on your question, I don't recall any special care being taken in the actual 8080-based systems of the day.
However, such systems were usually built with four power supplies — or more precisely, two pairs of power supplies: ±5V and ±12V (-12V would have been used in any serial interfaces), each driven from a transformer winding and a bridge rectifier. It would have been natural for the 5V supplies to come up before the 12V supplies — and of those two, -5V would be quicker than +5V, being far less heavily loaded.
So (again I'm guessing), the power supplies either "just worked" in terms of sequencing, or the danger was not really as severe as the datasheet writers would have you believe. |
H: How safety capacitor replaces optocoupler
I see some phone chargers using safety capacitor (after some research I found its safety capacitor)But not optocoupler to isolate in and out . How safety capacitors replace the optocoupler
AI: It generally does not replace the function of an optocoupler, it's to control EMI by capacitively coupling the output ground with the input DC ground (after filter and rectifier etc.).
It should be a "Y" type safety capacitor. Usually it's around 1nF. For example, this one (from a Power Integrations datasheet):
The optocoupler function (when present) is to isolate the output voltage error (as a current) and send it to the controller which runs from the mains. If there is no optoisolator it may be using a transformer winding as feedback, which can work, but it's not as accurate. |
H: Power Supply Earth for Bench Testing
I work in a typical electronics lab, with resistive earth mats, ESD straps and isolated DC power supplies to test prototype PCBs. I prefer not to use the power supply earth-ground, and to leave the test setup "floating".
Mobile phones and laptops do it just fine, so why can't my PCB, and all its connected equipment? However my colleague is uncomfortable having things floating and says they need a reference (connect Earth to the 0V rail).
1) What are the pros and cons of connecting the power supply to Earth?
2) The oscilloscope ground pin has continuity to Earth. Why?
3) Any relevant referece materials available?
Many thanks!
AI: Ungrounded devices float at some potential. This potential may be set by AC line filtering capacitors or just stray capacitance in the mains transformer or safety capacitor that is from the primary to secondary side.
Connecting two floating devices together makes their potential difference equal but there will be a surge of current at the moment of contact to charge/discharge the capacitances. This is fine if connectors have grounds contacting first and they stay connected while data connections mate. But if there is a break in the ground connection due to bad connection, all that potential difference between data pins may damage chips.
This can be witnessed even at home; try taking for example a TV and some source device that are both ungrounded. Touching their metal cases can cause a tingling or stinging sensation (leakage current) and sometimes a small spark can be seen when connecting the equipment cases with wire. This is the reason it reads in the manuals that equipment must be connected to other equipment while devices are unpowered.
A mobile phone is not connected to other equipment than the charger so having a floating device is not a problem or a hazard by itself.
Laptops have grounded power supplies so they are grounded.
1) Having a grounded/earthed supply means your prototype is always at ground/earth potential so it is safe to connect to other grounded/earthed equipment like PC JTAG adapter or oscilloscope. But there is also a downside for having ground-referenced power supply as it could also create a ground loop. Imagine that power supply is driving 2A into load and the ground wire between power supply and load disconnects. If load is connected to other equipment like grounded PC or grounded oscilloscope, the 2A would keep flowing via earth wiring, oscilloscope ground lead or PC USB cable. This is why I keep my lab power supply ground potential floating when I don't need earth ground referenced supply.
2) Oscilloscopes are grounded for many reason, one of them is safety. Imagine accidetally connecting one scope ground lead to mains live voltage. All metal parts and other scope channels grounds and equipment they are connected to would then become live. |
H: How are OTP fuses in ICs implemented?
One-time programmable (OTP) fuses are common in ICs. How are they typically implemented, on the silicon level? I know that they generally work like larger fuses, i.e. they can be blown but not repaired, but how is this actually accomplished when thousands need to be fit in the die area (e.g. Intel chipsets)?
Is there a difference between how they are implemented between low-power cheap microcontrollers (which might have a few OTPs for lock bits) and high-end x86 chipsets (with potentially thousands of OTPs to store manufacturing settings and even entire RSA keys)?
AI: In the IC processes I have worked with, the fuses which are used for OTP memory are made from polysilicon.
They're simply polysilicon resistors with a value of a few hundreds of ohms when intact. After such a fuse is blown the resistance increases by a factor 100 or so to at least 50 k ohms if I remember correctly.
It is mentioned in the comments that metal can be used for the fuses and that is true, see this article.
So the OTP fuses can be made from polysilicon or metal. Other materials might be possible as well.
Is there a difference between how they are implemented between low-power cheap microcontrollers (which might have a few OTPs for lock bits) and high-end x86 chipsets (with potentially thousands of OTPs to store manufacturing settings and even entire RSA keys)?
There probably is, the "fuse based" OTP memory is quite "expensive" as it needs a lot of silicon area per stored bit. On a microcontroller chip where there is already flash memory available it might be easier to implement the OTP lock bits using flash memory as well. The logic circuits then simply prevent further programming when a lock bit prevents it. That way no fuse is blown but you cannot program the chip anymore.
A similar scheme can be used for manufacturer programmed settings, once set the chip prevents the settings to be changed. |
H: LoRa and Manufacturing Technology
Which manufacturing technology do the LoRa (Semtech SX1276) belong to? Is it a CMOS based chip?
AI: Yes, this chip will be based on a CMOS process, it is the only way to make such a chip in an economic way. This chip has a transceiver working up to 1020 MHz which is perfectly possible in most common CMOS processes.
Anyway, why would you need to know this? How does it matter what manufacturing technology is used? Read the datasheet to learn how to use this chip. I do not see how the process technology that is used is relevant to anyone else than the manufacturer and maybe a competitor that wants to develop a similar chip. |
H: Did I damage my temperature sensor?
The sensor is a DS18B20, I accidentally connected the positive and negative inverted to the sensor and it became very hot then I quickly disconnected the power.
I don't have any other calibrated temperature sensor at hand to check if the temperature reading is correct or not, only a mercury thermometer. The temperature reading from mercury thermometer is around 1.3°C less than the reading from DS18B20...
How can i tell if I damaged the sensor or not?
AI: i accidentally connected the positive and negative inverted to the sensor
You mean you applied a negative supply voltage to GND and VDD pins?
If you did that without proper current limiting from the supply then chances are you have damaged the sensor.
This sensor is actually an IC and all ICs have ESD protection consisting of diodes between GND and VDD pins. In normal operation these diodes are in reverse mode. However when the supply voltage is reversed these diodes operate in forward mode so a voltage above about -1.2 V (there are generally two diodes in series) will make the diodes conduct. If the supply has no current limiting then a high current can flow which will damage the diodes and the rest of the IC with it.
When experimenting with circuits it is good practice to limit the current that the supply can deliver. Often a maximum current of 100 mA can prevent most damage.
Since you only see an error of 1.3 degrees, you are probably lucky and the sensor still works. The sensor has an accuracy of 0.5 C that leaves 0.8 C for the mercury thermometer which could be correct. Does the sensor still change its output voltage over temperature? If so it could still work. However, the reverse supply could have done "something" so accuracy is certainly no longer guaranteed! |
H: Should I get rid of my bias towards active high?
I realise that in all my circuits I consider active-high the "natural" default and active-low a goofy situation that needs to be inverted. I pull down all data and control lines (resets, output enable, input enable, inputs for an ALU or adder...), put inverters all over the place, and generally experience a lot of annoyance over every active-low pin.
Can you enlighten my what the advantages of an active-low architecture might be, or why I shouldn't care? It seems that wildly mixing avtive-high and active-low, based on the ICs demands, can be a nightmare to interpret, document and debug.
AI: Active low signals were very often used in TTL circuits for noise immunity (apart from the drive capability as mentioned by Neil_UK).
The input of a TTL gate is guaranteed to recognise any level of 0.8V or lower as a low, and any input of 2V or higher as a high.
If the signal is taken true for only a short time relative to the false state (common in many memory systems) then the idle state (false) will have Vcc - 2V of noise immunity if the signal is active low (which was 3V in 5V circuits, 1.3V in 3.3V circuits) as opposed to 0.8V of immunity in the low state.
This assumes that the idle state is at the rails (a reasonable assumption for a single gate load).
So idling in the high state gave better noise immunity and this remains true for devices that have 'TTL compatible' inputs.
For the situation where the logic is difficult to understand, I suggest using assertion level logic notation which then makes the intent of the circuit quite clear. |
H: Unkown DIP IC (OP277PA)
I stumbled upon the most uncommon thing. An 8-PIN DIP IC with part number (OP277PA.)
However, the datasheet is nowhere to be found and I've done my research.
Is it possible that it is an OPA277P, or is it its own thing?
Does anybody have a clever way to test if it is a low noise precision opamp?
AI: The OP277PA is an earlier version of the OPA277 precision opamp (Datasheet)
If you scroll down to the orderable information you will find this the orderable part number for the device in a plastic DIP package.
The final A refers to the die revision. |
H: Error in Practical Electronics for Inventors?
I’ve been studying this book for digital electronics.
I think that the highlighted values in the operation of the shown AOI gate are not correct and should be 0 instead.
AI: I think you are correct.
From the block diagram of the 74LS54 datasheet, it clearly shows a single "1" output from the AND gate would cause the next NOR gate be "0" forever. |
H: Why parallel diodes on the output of a switch-mode?
I am looking at buck-boost converters on the Texas Instruments design tool, and multiple of these topologies have parallel diodes on the output. I cannot see any reason to do this.
Can anyone explain the purpose of paralleling D4 and D2 on the output?
AI: The parallel Schottky diodes are there to allow a higher forward current through the load. Usually done to prevent scenarios where the load current exceeds the maximum current rating of a single diode.
https://www.daenotes.com/electronics/basic-electronics/diode-in-parallel
EDIT: You can refer to the datasheet, page 23 for a similar design example. The diode packaging is shipped as a single component (MBRD1035). http://www.ti.com/lit/ds/symlink/lm25118-q1.pdf |
H: LM317 to step voltage up
I am sorry for questioning the "law of conservation of energy" first of all.
The expression for the output voltage of the LM317:
Vout=1.25*(1+R2/R1)
contains no any relation to the input voltage. It doesn't care what's the input voltage. It only cares about the two resistors R1 and R2 (in my simulation). Increasing the value of R2 increased the output. But once I get the output equal to the input, further increasing the value of R2 doesn't increase the output voltage. What is the factor that doesn't let the output voltage go beyond the input voltage. I know it won't go (law of conservation of energy) but why?
I have attached the snippets of the output voltage for two different values for the R2 resistors.(I don't know whether those large valued resistors are available. Please bear with me for this simulation)
Edit: So its all the matter of 'Minimum Dropout voltage' (Vin-Vout). But going through this datasheet shows the difference of -0.3 which indicates higher output voltage.
AI: All the LM317 can possibly do is act like a (controlled) variable resistor between the input and output, it cannot create energy out of thin air.
And it can't even do that, being a bipolar part it will have some significant voltage drop at best with even moderate currents (some CMOS-output LDO regulators have a few mV dropout at low currents such as a few mA).
In the case of the LM317 (which is not an LDO = Low Drop Out) part, there is a Darlington transistor pair between input and output, and the drive can't go all the way to the input voltage.
See this "representative" schematic from this datasheet:
In general you should have 3V or more between input and output, as specified under the "line regulation" parameter in the datasheet. |
H: "Increase" of a register in VHDL and hardware synthesis
Suppose you have already defined a register (for instance called "reg") in VHDL, for instance as a vectors of 4 bit.
Now consider the operation: reg <= reg + 0001; it is like reg ++ in C.
My questions are:
1) how can reg store the result of the sum between reg itself and another number? The result is expressed by 4 sum bits and 1 carry bit, so there are 5 bits...
2) how will the synthesis be? An adder which takes 0001 and reg as input will give 5 output wires... How will they be connected to reg (which has only 4 input wires)?
AI: The carry-out is ignored in such expressions. If you care about it, you need to account for it explicitly. For example, you could write something like this:
-- perform the addition, making room for the carry-out
signal sum : std_logic_vector (4 downto 0);
sum <= ("0" & reg) + "00001";
-- update the register and capture the carry-out at the same time
process ...
reg <= sum (3 downto 0);
carry <= sum (4);
end |
H: Should I connect the computer VBUS line to the 5V line of the board?
I am doing a project that needs USB communication with my microcontroller.
On the board there is already a 5V power supply. I would like to know if it is correct to connect the VBUS line from the computer with the 5V line that already exists on my board (put L4). Or should I leave VBUS floating? (remove L4).
I have no experience with USB development, I know the need for U10, but how I should feed U10 pin 5 to me is still dubious.
AI: If your board has it's own power, the VBUS from upstream connector should NOT be used as power source and should NOT be connected to the +5V rail. It will cause unpredictable conflict between your on-board power source and USB host-supplied VBUS.
However, your device must have a circuitry (typically a GPIO input with proper level translation and additional ESD protection) to sense the VBUS presence. This function is defined in Section 7.1.5.1 of USB 2.0 Specifications,
The voltage source on the pull-up resistor must be derived from or
controlled by the power supplied on the USB cable such that when VBUS
is removed, the pull-up resistor does not supply current on the data
line to which it is attached.
and further explained in Section 7.2.1, p.171:
They [devices] may not provide power to the pull-up resistor on D+/D- unless
VBUS is present (see Section 7.1.5). When VBUS is removed, the device
must remove power from the D+/D- pull-up resistor within 10 seconds.
If you have a concern about pin5 on ESD protector U10, then it would be the best to keep this pin at 3.3V form some internal rail, it will provide somewhat better level of protection.
There are more answers on this topic, like here. |
H: Measuring the external memory power consumption in FPGAs?
I am trying to get a power/energy breakdown of DDR3 and core logic. I used Quartus power analyzer tool to get the power estimates, but I am not sure whether it includes the power consumption of external memory like DDR3, HBM. In general, how do we measure/model the power consumption of the external memory access in Intel FPGAs?
AI: Power analyser tool estimates the power consumption by the FPGA alone due to all the connected peripherals. To calculate the power consumption of the off chip peripherals, datasheets are really your friends
Consider all static power consumptions
Calculate dynamic power consumptions due to switching load (\$n \times V^2 \times f \times C\$)
how exactly to calculate depends on teh applicaiton, components and the usage
For example, if there is an external flash, you can calculate current needed for a simple read, fast read, idle condition and write at particular planned clock frequency. and then, estiamte how much percentage each task will happen over a period of time. the current consumtion than can be scaled accordignly.
Also, consider quiscent current for deivces which are not switched during operation
Other loads such as toggling LEDs, RF transmission etc
All theory can be well verified with practical current mesurement. Consider datasheet maximum for worst case. |
H: Atmega328p ADC - value keeps returning zero when connected
I'm currently try to connect a DS18S20 temperature sensor to the atmega328p. I have wired AVCC and AGRD to the same power rail on my breadboard as normal VCC/GRD and AREF is not connected.
When I try to connect the data pin of the temperature sensor to the first channel of port A, the value changes to zero and stays zero. Before connecting the data pin, the value jumps around randomly. I have the following code:
volatile uint16_t vOutADCReading = 0U;
void setupAnalogDigitalConversion(){
ADMUX |= 1<<REFS0;
ADCSRA |= 1<<ADEN;
ADCSRA |= 1<<ADPS0 | 1<<ADPS1 | 1<<ADPS2;
ADCSRA |= ( 1 << ADSC );
}
void adc_read(uint8_t channel){
ADMUX &= 0xf0;
ADMUX |= channel;
ADCSRA |= (1<<ADSC);
while(ADCSRA & (1<<ADIF));
// Set voltage output
vOutADCReading = ADC;
// Clear ADIF flag
ADCSRA |= ( 1 << ADIF );
_delay_ms(1000);
}
void main(){
while(1){
adc_read(0);
displayOnSegmentDisplay(vOutADCReading);
_delay_ms(1000);
}
}
Are there any errors in this code?
AI: The DS18x20 series are digital thermometers using the One-Wire protocol on their data pin. Look up any of the Dallas/Maxim DS18b20 libraries to use this one.
If, on the other had, you want an analog thermo-sensor, try the LM34/LM35 series of analog sensors (Fahrenheit/Celsius, respectively) which put voltage, proportional to temperature, on their data pin. |
H: How does the quantization error decrease when the input signal is matched to the ADC input?
Assuming a theoretical example imagine that we at first feed a 1V pk-pk noiseless sine to a 10V ADC. And in the second case we feed a 10V pk-pk noiseless sine to that 10V ADC. As far as I understand from other questions, the quantization noise decreases in the second case.
Im trying to understand why by using the above example in a step by step explanation. How can we mathematically show explicitly that in the second case the quantization noise is lower?
AI: The quantization error is typically equal to one-half the value of the LSB. That is an absolute error.
However, for a large signal the relative error (the error as a percentage of the peak signal value) is smaller. |
H: Can I use an h-bridge as a changeover circuit?
I have solar controller which outputs battery voltage when available.
I also have a switching psu as backup.
What I would like to do:
Use an h-bridge, connecting its battery negative terminal to my load and the two motor terminals one to psu negative and the other to solar controller negative.
The idea is:
When solar controller is active, feed a voltage to the h-bridge direction input so that I can select my power source.
Can this work?
AI: The idea is: When solar controller is active, feed a voltage to the
h-bridge direction input so that I can select my power source.
H-Bridge circuits typically use power MOSFETs, which have internal body diodes (shown in the simplified circit below as D1..D4). The diodes are intrinsic in FETs, but would still be necessary anyway to steer back-emf current through a motor or other inductive device.
Unfortunately, even if all the FETs are 'off' both supplies are connected to the load via diodes D2 and D4. So you cannot select the source using this method. It will however automatically pass through whichever source has the highest voltage.
Another problem is that the H-Bridge controller circuit is not getting power (normally supplied through B+ and B-). To power it properly you would need an isolated DC/DC converter with output voltage equal to or higher than both the solar charge controller and power supply.
simulate this circuit – Schematic created using CircuitLab
So all-in-all your idea just won't work. A practical solution for automatic switch-over would be to just use two high current Schottky diodes, possibly with individual FETs across them to get lower voltage drop. "Ideal diode" controllers such as the LTC4357 can be used with external FETs for low-loss automatic switch-over. |
H: How does a computer chip read code, interpret it, and convert it into action?
I understand that binary is effectively functioning as a “virtual representation” of low voltage and high voltage. However, I do not understand how the instruction set to MAKE the voltage high or low is being executed. Within a computer, what is physically happening to change a circuit to a “high voltage state” or a “low voltage state”?
This is presumably the lowest level instruction set that exists within computers...and I’m not quite sure I understand how it is being implemented. What is making the circuit change between high and low voltage states...and, moreover, how are these instructions designed to ENACT such a change in voltage state actually being carried out?
This is like the “instruction set that proceeds all other instruction sets”...or the “instruction set that exists BEFORE binary instruction sets can even be formed”. How does one program a circuit to do something before a programming language even exists?
In other words: How does a computer chip convert the "text" or bits that make up the program into action? How does it read the code, decide what the code is saying, and then act on what the code is saying?
AI: Opcode - the unique identifier for each possible instruction that a computer can run. Physically, it is a unique string of binary bits which is represented in Assembler as a token (so a human can read it without memorizing a string of ones and zeroes)
Program - a bunch of ones and zeroes (or low and high electrical signals) consisting of the sequence of opcodes and their arguments (numbers) to be executed when the system runs.
Opcode circuitry - the physical manifestation of the opcode. It is circuitry that reads the appropriate arguments that it will operate with or on from the instruction register, processes them, and loads the result somewhere. Each opcode has one and the this circuitry will processes the data and delivers the result into a register somewhere.
Instruction Register - the register that stores the instruction line which is about to be parsed and read/decoded/translated. It is loaded from wherever the program counter register is pointing at in the bits that form the program memory
Instruction Decoder - this circuitry reads the opcode ID field in the instruction register and sends a signal to activate the appropriate opcode circuitry which results in execution of the opcode.
It's basically a giant comparison engine with output signals to trigger each opcode. One way to imagine it is as an array of multi-bit comparators with each comparator having an output to trigger one of the opcode circuits. Each comparator examines the bits in the field of the instruction register that represents the opcode ID and compares it against a fixed value which is the bits for the opcode ID it is responsible for. If it matches, it fires a signal to the opcode circuitry to trigger it.
Or you can imagine it as a giant lookup table that takes the bits in the opcode ID field of the instruction register as an input. It's output consist of one signal line going to each opcode circuit to trigger it. The lookup table is such that only one signal line is active for any given valid input (after all, you don't want a single opcode to end up triggering two opcode circuits to run. That just doesn't make sense.)
The decoder also reads the bits in the fields of the instruction register that represent the arguments for that opcode and passes them on to the opcode circuitry so it knows what it is working with. It is a crazy, chip spanning network of signals. |
H: Question about the common mode
After introducing the two-stages op-amp and frequency compensation for this circuit, during lecture the Professor asked us to find as an exercise a possible polarization of the following circuit:
in which by hypothesis Vdd=1.8V and the input dc common mode is 0.9V.
While solving together this exercise, the Professor said that, in order to use this circuit in the unity gain buffer configuration, the output dc voltage must be set equal to 0.9V. In this way the input dc common mode coincides with the output dc voltage, as required by the unity gain buffer configuration.
Question: why do I have to "artificially" impose that the output dc voltage is equal to the input dc common mode in order to have unity gain buffer configuration? Is not the negative feedback which imposes Vout=Vin?
AI: I agree with you that the Professor's statement is unclear and confusing.
When used as a voltage buffer, the DC voltage at inverting and non-inverting inputs and the output are determined by the DC voltage at the non-inverting input. As you mention, the feedback loop takes care of that.
Designing the output to be biased at Vdd/2 by itself (without feedback) isn't even possible with this circuit as the output's DC voltage depends on the output current of two current sources (M5 and M6) into a high impedance point. Even if the drain currents of M5 and M6 would be exactly identical, the voltage at the output would be undefined. In the real world these currents are never identical so the output will clip to Vdd or ground.
Only a feedback loop can control the output voltage at the output such that it will have a predictable value. |
H: What connections do I make to this Through hole DC Power connector
I'd like to have one of these on a PCB I'm designing but I'm not completely sure how it works. Can somebody please explain to me how to connect this power jack to my circuit?
AI: Centre pin is, well, the centre pin. Usually this is the positive supply voltage, but sometimes it's earth (ground, 0 V) - you need to check the details of the supply you're going to plug in to it.
Sleeve connects to the other contact on the plug - usually earth (ground, 0 V) but sometimes positive supply.
Sleeve shunt is probably a spring-loaded contact which connects to the sleeve pin when there is no plug inserted, but is open circuit when a plug is present - this can be used to disconnect an internal power source, for example. Test your connector with a resistance meter though, to check how it actually behaves. |
H: Confusion in understanding control system?
I am learning basics of control systems from following link
http://instrumentationandcontrollers.blogspot.com/2010/11/types-of-control-systems.html
It says that automatic washing machine & traffic signal system are example of open loop system. It does not gives detail why??
Despite the fact that "automatic" appears before washing machine
Also please kindly find attached photo of a common door closer. What type of control system is being used by it?open loop or close loop?
AI: Both, the automatic washing machine and the traffic signal system are open-loop for the same reason the website mentions for the home heating system.
An open-loop system usually has a timer which instructs the system to switch on the furnace for some time and then switch it off.
The Washing machine uses a timer to turn on and turn off washing and drying without measuring how washed or dried the clothes are.
The traffic light uses timers to switch lights without measuring how many cars are actually on the road. |
H: PNP linear regulator problem
I am designing a linear step-down regulator using a PNP pass transistor. The output of the regulator is good at no load.
When I connect my regulator to a battery supply, leave it for 2 seconds and then I connect my load (say a 12 V DC motor or a microcontroller), it works good.
But when I attach my load to the circuit and then supply power, my output drops to almost 0 V.
Here is my regulator circuit...
There is a problem in my design. I am trying to analyse it. It would be appreciated if someone could help me.
Above one is a reference image from Texas Instruments.
Input supply (battery) = 40-50 v
Output volt (for controller) = 12 v (500 ma approx)
Edited:
I connected the input for 7805 in source side by using a transistor to get a constant supply as shown in the image. Now my circuit works better.But pnp transistor heats quite a lot by connecting load. Since it's a low dropout regulator, why it heats much.
AI: I Assume there's no other loads for the 7805.
You can take the input to the 7805 from +50V through about 40V zener diode. I guess the 7805 sinks few milliamperes only, so the dissipation in the zener diode is well below one watt. It would be one watt if the current were 25 mA.
To be sure how much the zener dissipate, measure the current consumption of the 7805+what's now connected to it.
I guess you want to use the 7805 because you have them freely available. If a zener diode is an impossible option, you can surely replace it with a voltage divider.
ADD: Just saw the edit which says the PNP transistor gets hot. If you take continuously 500 mA through it, the dissipated power is about UI = (50V - 12V)500mA = 19W. I guess it will burn soon because in a datasheet the absolute maximum allowed dissipation is 12,5W. That means you should have infinitely large and thick heatsink to avoid burning when the dissipation is 12,5W.
My final guidance: Get a switching regulator. It dissipates 90% less. If that's impossible, do as the commentators already have said - get a bigger transistor and a big enough heatsink. |
H: Identify specs of this filter coil and enable independent use of PSUs fed through it?
Shown in the pictures is a power supply and distribution system from an old Fuji Xerox all-in-one copier/printer/binder/etc.
In the image that shows multiple components you will see the components laid out with red arrows indicating the connection path from mains in to the 3.5v and 5.5v PSUs. All black and white wires are AC.
Note: The 24.5v PSU and the Filter Board are NOT fed through the Filter Coil. ( I have traced the circuits.) Only the 3 lower-voltage PSUs are fed by it.
Those 3.5 and 5.5v PSUs are each 8A output supplies. Fittingly, the Filter Coil has very heavy gauge copper as its winding, and has these markings on the top:
"104E94220" and TAM 4KO3K"
I am interpreting the O as an "oh" not a
zero based on comparison of zero in top line with O in bottom
line (see picture).
Googling the part numbers of the coil has been no use. Proprietary/custom part.
So, to my question(s):
Can I test to determine the properties of this coil, and how do I do that?
Can I divide that/those specs into thirds to determine what coil would suit each of the three PSUs that were fed through it? (To create standalone power supplies.)
Alternately, just good advice on what filter coil to purchase to place in front of these PSUs would do, though improving my understanding is always better.
EDIT:
Added a screen cap of the circuit from the engineering handbook for the original device. The coil is circled in red. The machine was on 230V mains before deconstruction, which by the diagram means there should be a resistor there? Gotta admit I'm very confused by that. A coil is a resistor? Can't be can it?
ALSO- The picture of all the components has the Mains straight to the board, but it actually goes through the Filter Block before going to the distribution board. Anyway, hope the new info helps.
AI: As the modules say they are standard power supply modules that can be directly fed with 230VAC mains. The choke might just be to limit inrush current as there are multiple power supplies in parallel. If you are worried about mains filtering then put a mains input filter module there. if you experience bad noise on DC output, it won't be removed by input filter as these are switching mode power supplies.
The inductance and resistance of the original filter coil can be measured with LCR meter, but there is no way to figure out the surge and operating current rating. Only hope to know them is by finding the AC input surge and operating currents of the power supply modules and add them up. But the power supply modules already seem to have proper mains filtering and NTC surge limiting so unless you intend to power all of them with a single mains switch or plug you don't need extra surge filtering. |
H: UTD2025CL oscilloscope - help with these displays
I have some concerns about a UNI-T UTD2025CL oscilloscope:
Why there is more than 1 sine wave in the screenshots? Is that normal? The screenshots show a TL431 regulator output. The coupling is set to AC, the trigger is set to CH1.
While measuring output of a 50Hz 24Vac transformer, the trigger notification on the DSO screen is switching quickly between "Trig'd" and "Armed"? Is that normal?
AI: 1) There are several waves plotted on top of each other. If you want that: it is normal. If you don't want that: try adjusting the scope settings such that you get only one trace. For example use "single shot" mode.
2) It might be normal, depending on how you set the triggering to work the scope might not trigger reliably making it wait in between. If you don't like this: adjust the trigger settings such that you get reliable triggering.
General remark: an oscilloscope is a complex (to use) instrument, it requires practice. Don't be afraid to try changing some settings to see what they do. Read the manual of the oscilloscope!
Don't ask "is this normal" because if you set the scope in the wrong way you will get a weird/wrong/no plot on the screen. That is normal. You have to use the scope properly to get a usable picture. That also is normal. |
H: What is conductor to conductor to shield capacitance?
I am using 6.5 ft (2 meters) BELDEN 9154 shielded twisted pair cable for a sub 1 MHz application and I wanted to make a model of the cable for some simulations. The datasheet of the cable lists two capacitance as shown below:
How to interpret these capacitance? For a 1 ft segment what values of capacitance is observed across the conductors and across shield and one of the conductors?
AI: The specification you're refering to must be interpreted in the following way:
You take one conductor and connect it to shield.
Then you take the other conductor and measure the capacitance across it and the other one.
Now take a look at this diagram:
Source of image: this paper. Ignore capacitances \$C_1\$, \$C_2\$, \$C_E\$, and assume that \$C_{S1}=C_{S2}\$.
From the diagram we can see that, because you're shorting one of the conductor to shield, the capacitance measured must be then the parallel of the conductor-to-conductor capacitance \$C_{12}\$ and the conductor-to-shield capacitance \$C_{S1}\$.
Capacitances in parallel add together, so we can calculate the conductor-to-shield capacitance \$C_{S1}\$ from the specification, just subtracting. In this case, the conductor-to shield capacitance \$C_{S1}\$ is just 100 pF/ft - 60 pF/ft = 40 pF/ft. That's a 40 pF/ft from each conductor to shield (two capacitances) in your model. Exactly like analogsystemsrf has outlined in his answer.
This is only for the capacitance. If you want a complete lumped model don't forget the rest of parameters (inductance and resistance per length unit) that you can find in the datasheet. |
H: Is it possible to use PIC10Fxx internal flash to store data between deep sleep?
I want to store a single bit with rare rewrite. It's possible for STM32 without EEPROM, but how about PIC microcontroller?
And is there examples with configuration and code?
AI: What you need to look for is if the processor can perform reads and writes to its own flash. I don't know of all members of the PIC10Fxx family do, but according to this page (https://www.microchip.com/wwwproducts/en/PIC10F322) the PIC10F322 does. A bullet point on that page says "Flash Program Memory with self read/write capability". Additionally, this part also has a separate 128 bytes of "high endurance flash memory" specifically for non-volatile storage.
MCU vendors often have white papers or application notes for this sort of thing. |
H: Question - Change in brightness
I have a circuit with two identical lamps, one battery and one switch (see image). I'm pretty sure that if the switch is closed the lamp marked A would get brighter (due to the power being able to take a path with less resistance than going over the other lamp).
What I'm wondering about is how I should properly explain this result. Which laws are involved with it? I need to be able to make a rather formal explanation that brings up exactly why lamp A gets brighter when the switch closes.
Anyone can point me in the right direction?
PS: I know this is probably a rather basic question, but it's part of a large number of very mixed questions that deal with my ability to explain stuff, so I don't actually know much about electrical circuits overall...
AI: So you have selected two bulbs with identical resistance. When the switch is open, these two bulbs form a voltage divider. In your case, the voltage is divided equally due to same resistance. Also, same current is flowing through both of those bulbs. So the circuit consists of two resistors in series. And the current flows accordingly.
Now, you close the switch. Notice how the ends of the "not A" bulb are shorted. This implies there is no any voltage across this bulb so it should not glow ideally. But due to certain resistance of the wires and the switch itself, there is small potential difference across this bulb giving slight glow.
The cicuit after closing the switch now has only one resistance in its path.
The bulb A now has full battery voltage across its terminals. Since the circuit now has only one resistacne, more current flows through the circuit giving you the brighter glow of the bulb.
simulate this circuit – Schematic created using CircuitLab
In the first case you have the current of 5mA. In the second case you have the current of 10 mA. Twice the current !!. Do calculate the power now yourself and see the result.
The resistances are only for demonstrating the problem. The actual resistance of the bulbs is different from those I have used. |
H: Is it possible to use ESP32, BLE4 or BT 2 and WiFi same time?
I am planning to use ESP32 module to transfer data using wifi (ESP32 web server AP)to remote PC and also the same time I need BLE to communicate with a mobile app and get some data to eps32.
so I will be needing to use both wifi connection and ble same time
is it possible to use or establish wifi and ble same time (in the loop WIFI data transmission 1st and then BLE date receive)?
AI: There is only one antenna/radio unit but it is possible to use the special option "Software controls WiFi/Bluetooth coexistence" to allow both protocols to be used within the same system. You can quickly run into issues if you are trying to have a high throughput or low latency but from the espressif FAQ:
"At the moment, ESP32 can simultaneously function as a Wi-Fi module
and as a Bluetooth speaker, playing music smoothly"
For more details see section 5.3 on Coexistince from the Espressif FAQ:
https://www.espressif.com/sites/default/files/documentation/ESP32_FAQs__EN.pdf
If you expect to have fairly high throughput and require low latency for near real-time data you may want to explore using an external bluetooth module like the HC-05 (master+slave) or HC-06 (slave only) for bluetooth communications and enable only wifi on your base ESP32 device. |
H: How to interpret this IC diagram?
Taken from Practical Electronics for Inventors is the following diagram:
I’m little confused here. The pinout diagram shows pin 1 with \$\bar E_a\$. The functional diagram also shows a bubble with the corresponding pin with the inner label being \$E_a\$. So does that mean that we will have to supply inverted input, i.e., \$\bar E\$ to the pin?
Similar questions for the output pins.
AI: That notation is indicating the "Enable" pin expressed by "E" is active low. Meaning to enable each decoder, you must pull the "Enable" pin low. Check out the pin descriptions on page 3 of the datasheet here. This type of notation is common. You will see this type of thing implemented in several ways across different IC manufacturers. i.e.
\$\text{Enable}\$,
\$\overline{\text {Enable}} \$,
\$\text{SD}\$ (Shutdown), and
\$\overline{\text{SD}}\$ (barShutdown).
You just have to the reason through the language. \$\text{Enable}\$ is active high enable,
\$\overline{\text{Enable}}\$ is active low enable,
\$\text{SD}\$ is active high shutdown,
\$\overline{\text{SD}}\$ is active low shutdown. |
H: Capacitive load - Circuit protection
I have a circuit which drives capacitve loads (they vary from around 800pf to 1600pf) and because of circumanstances like air polution and dust it can come to electrical contact to the surroundings or even short circuits.
The circuit uses a MP104 to drive the load and when something happens, this is the part which is destroyed.
The output is driving 150V with a 50V/µs slew rate for falling and rising and holds the voltage for about 1µs. Between 2 Pulses there is a minimum of 1 µs pause. The Input of the amplifier is controlled by a DAC to control slew rate and so on.
Where +VS is 150V and -VS the 0V potential for +VS.
I am searching for a circuit protection.
Conventional fuses are too slow for the driver.
Currently I am exploring OCP possibilities like using a LMG3411 to control +VS of the driver. It can even be a replacement for the MP104.
I can't tell the exact circumstances where the driver breaks because I just get feedback when it's too late. Also I am able to destroy the driver by making a short as load but wasn't able to determine an exact current where it breaks.
AI: The Safe Operating Area curve does not tolerate arcing.
Using that plot Figure 16, at 150 volts from the plot, less than ONE AMP is allowed.
You may need to insert series current limiting resistance: non-inductive.
Different power transistors have different ability to tolerate pulse-energy overloads. NASA and the automotive manufacturers uncovered this, for oldstyle versus newstyle MOSFETS, about 20 years ago; the oldstyle MOSFETs were much more robust.
==========================================================
Can we do better? Can we detect the high current, and shut off the input? Yes.
simulate this circuit – Schematic created using CircuitLab
If you wish to use this circuit, I suggest you simulate it to ensure the pulse (short circuit detection) will propagate thru the 3 transistors quickly (10 or 20 nanoseconds). The 100pF caps may be needed.
To first test at 50 volts and 75 volts and 100 volts and 125 volts, reduce the resistor values of R13,14,15,16 proportionately; thus at 50 volts, make the resistors 1/3 of what I've suggested. |
H: Non-reentrant Functions as Macros for utilities used in both Main and Interrupts
When compiling software with xc8 for a PIC which has functions which are called in both interrupts and in the main function the compiler gives an advisory:
non-reentrant function "foo" appears in multiple call graphs and has been duplicated by the compiler
Although this is not necessarily an issue, I understand from some reading that it is bad practice to call functions from both an interrupt and main.
Does this extend to pre-processor macros?
Most of the functions that I implement and are used in both are simple aliases for some simple maths, for example:
uint16_t timer3_get_value(void)
{
return (uint16_t) (TMR3H << 8) | TMR3L;
}
Would making this function inline or changing it to a macro make a difference and/or be better practice?
#define TIMER3_GET_VALUE() (uint16_t) (TMR3H << 8) | TMR3L
AI: Like the compiler message tells you, the code is duplicated. This has the very same effect as being inlined, put aside the overhead for call and return. Both versions are independent and can't influence each other.
So it's up to you to choose.
Relying on the compiler's capability makes your code less portable. And you get the compiler message which might be disturbing.
AFAIK inline just gives the compiler a hint. It does not have to obey it.
You best bet would be to use your last idea of making it a macro expression / statement.
For the latter this is common style:
#define function_name() do { /* anything it should do */ } while (0)
so you could use it like a void expression. If you accidentally try to assign it you'll get an error message. Please note the missing semicolon at the end. This will be provided at the place of the usage:
function_name(); |
H: STM32 HAL vs LL
I'm exploring the world of STM32 microcontrollers. I must say, so far it's a huge puzzle. I find that there are many documents provided by ST, but none of them really teach me anything. And it's really confusing that there is so much information that points me to tools that seem to be superceeded by STM32 Cube IDE (Which I only found out after I spend days to get eclipse/GNU plugin working....)
I bought the book 'mastering STM32' which is a huge source of information.
This book has a strong focus on the HAL drivers, while I also read a lot on the low level drivers. The two are supposed to be complementary.
Now when I read about the UART peripheral on this page which gives me the impression that I should not use the HAL driver.
I have timing requirements to take into account (1 milisecond response time).
Are there serious drawbacks in using the HAL?
Is there some rule of thumb how to choose between HAL/LL drivers?
Can I find some more in depth documentation on either solution? I am not finding much more useful than the blinky app...
AI: Are there serious drawbacks in using the HAL?
Is there some rule of thumb how to choose between HAL/LL drivers?
I've not yet found a one-size-fits-all guide to this particular issue... that is "Should I use a HAL"? But I would offer my experience with this issue.
Let's boil down this question a bit more:
"Should I use a HAL?" broken down is:
"Should I create a hardware abstraction layer?"
"Should I use a 3rd Party HAL?"
In my opinion, it is generally good practice to create "layers of software". These layers create obvious and logical organization in any software design, embedded firmware included.
With that being said, the answer to part of your decomposed question "Should I create a hardware abstraction layer" is "yes". It is good practice to separate all hardware calls and direct register accesses into a HAL. Not only is this a good organizational scheme, but it also makes the software more easily portable and reduces the amount of "stuff" you need to keep in your head at once. If you really need that bare metal, ultra-optimized, direct register accessing performance, then try to keep it limited to as few functions as possible.
What's more readable and reusable?
PORT0->IOCR8 |= 1<<13; //enable push-pull output on pin 13
or
PORT0_Configure_Output_Push_Pull(13);
This is a trivial example, but it serves to illustrate my point that HAL's make firmware more readable and less prone to bugs since it makes the software more "human readable". There are techniques to minimize or even eliminate the function call penalty through static inline functions.
The second decomposed question "Should I use a 3rd party HAL?" is a bit more complicated and subject to years of biases and opinions. So I will offer my own.
In my experience, 3rd party HAL's are not true HAL's in that they still lock you into a specific vendor. They aren't abstract in the purest sense. They likely will only be portable between a particular MCU vendor's portfolio.
3rd party HAL's work great for configuring peripherals and other initialization schemes. Then there's a middle ground where moderately complicated functions like UART tx/rx, I2C tx/rx, and even DMA, where the HAL's try to get tricky and write ISR's for you to provide a convenient API. I've had mixed experience here. You open yourself up to vendor bugs and possible performance issues at the expense of quicker time-to-market. Finally, once you move onto things like wifi or bluetooth stacks, there's not really a choice and you must use 3rd party libs.
So, unfortunately, the answer is: "it depends". Perhaps we can address your question with more information about your specific needs.
If you're interested, Jacob Beningo's book "Reusable Firmware Development" offers some valuable insight into this subject. (I apologize if recommendations are frowned upon). UPDATE 3/31/22, Another book I highly recommend on this subject is "Patterns in the Machine" by John and Wayne Taylor. It covers architecture at an embedded level very well, including how to capture hardware->software interfaces. |
H: STM32 UART How to receive 9 bit?
I am trying to understand how I can setup the UART peripheral to receive 9 bit data blocks.
I am using the ST IDE (STM32 cube IDE) and the Nucleo-F103RB board. I can setup the peripheral in 9bit mode using the STM32 Cube. But the HAL function to transmit/receive data still uses an 8bit pointer to a data buffer.
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
How can I receive the 9th bit?
AI: If you are trying to stuff 9 bits of data into an 8 bit integer, that simply wont work. The compiler would likely cut off the 9th bit, or complain you didn't pass it an array.
You will need to pass it an array of 8 bit integers large enough to capture your received data. In this case, you would need 2 8 bit integers, giving you 16 bits of bit-space for the API to stuff its 9 bits into. The HAL function will write to both integers in the array you passed it. You will need to apply some fancy bit-masking and typecasting to massage the buffer into a native type, or decompose it further into whatever schema you have devised. |
H: Is it possible to control a PWM computer fan with a resistor? If yes, how?
I have a video card that is loud while idle, because the fan curve appears to be set rather aggressively. Unfortunately, this can not be changed via software.
The fan is connected with a regular 4-pin PWM header (black, red, yellow, blue).
I have some low-ohmage resistors (20-40 Ohms) and would like to try to limit the voltage supplied to the fan to find out if it solves the issue.
Normally, such adapters are available for 3-pin fans with a resistor on the positive lead. However, I am unsure if the same is possible with a PWM-controlled fan.
AI: When a PWM fan doesn’t have a chop signal being fed to it, it functions exactly like a 3-wire fan.
So, sure, try the resistor drop. Not guaranteeing it will work but it’s worth a shot. It won’t damage the fan in any event. It may cause your GPU to overheat though, so use with caution.
Your motherboard may have spare fan plugs that do have PWM control that you can set with your BIOS. If you have a spare that could drive your GPU fans. |
H: Simple questions about current flow and superposition
So I was doing this exercise to prepare (not homework, school hasn't even started yet), and I think I got the math and the logic right, but there are a few things that I didn't understand, and since my teachers are on vacation I was hoping you could help. Below is a picture with the question that I transcribed and all of my work after it, including my questions: what's the best way to find the direction of the current, if it's positive or negative, and a minor uncertainty that I got regarding simple circuit analysis.
Please correct me if you see any errors.
Thank you so much for reading this far, if there is something you don't understand please ask!
AI: +1 for showing all your work, that's excellent. -0.01 for the low contrast -- I did have to squint a bit, but it was worth it.
The intuitive way to figure out the sign of the voltage contributions of each source is to start at the '+' sign on a voltage source, or the point of the arrow on a current source, and trace through your \$V_x\$. If your finger hits '+' and then '-', it's a positive contribution; if your finger hits '-' and then '+', it's negative.
The dreadfully formal way is to label all the nodes or draw in the currents and then do nodal or mesh analysis. |
H: Current sensing using XADC
AC701 Schematics
Refer page 40 of the schematics. Here for Vccint- the regulator is switching at 250 kHz.
page 34 has the sensing signal conditioning for that the inst. amp used is INA333 which has BW of 150 kHz, the BW decreases to 35 kHz when gain is set to 10.
They also are using anti-aliasing filter of ~3MHz cut-off.
Now my question is, considering the cross-over frequency of the regulator be 250/5 = 50 kHz and sampling used here [my assumption] 1MS/s. Using INA333 in the path would degrade the signal isn't it? We should have amp having greater BW than the sampling freq isn't it?
AI: In general the analog signal chain (combination of passive filter networks and/or active amplifiers) feeding an ADC should have a bandwidth less (preferably significantly less) than half the sampling frequency, to avoid aliasing.
Furthermore, in this type of power rail monitoring application you usually want to reject the power supply switching frequency, so it makes sense to have a cutoff frequency significantly below that. |
H: Eagle UI: updating silkscreen of library component
I just finished a schematic in the free version of Eagle that contains 20+ 0402 resistors and about a hundred 0805 capacitors.
I switched over to the board layout and found that the footprint of all these passives contains the part value, which I don't want as there isn't room on the PCB.
So, I edited the library and removed the ">VALUE" text. I then ran library->update all. However, the value text was not removed from any of the footprints.
If I right click on the component -> "open footprint" it shows me the updated footprint with silkscreen text removed. But the actual footprint in the board layout is not updated.
How do I fix this without having to manually change every. single. footprint?
AI: >VALUE is a placeholder for text that you can assign to a component with the value tool. You should not remove this field from the library. As it may be helpful in the assembly drawing.
Instead, just hide layer 27 and 28, and also omit them when generating the silkscreen gerber files. |
H: Eagle UI: separating hundreds of components that are stacked on top of each other
I finished a complicated schematic in the free version of Eagle, switched over to the board editor and was encountered by this:
In case the image doesn't say it all, there are about 100 components all stacked on top of each other with the same origin.
Separating them manually will take ages, is there a way I can fix this automatically so I can place my components?
AI: Select the move tool and type the component designator you wish to place.
Eg: click on move, then type D5, and you're holding D5 ready to place somewhere.
Autoplacers are a feature of more expensive tools. |
H: Displaying different numbers in 4-Digit 7-Segment Display using VHDL
I am trying to display 4 different numbers on my display. Currently I am using a dip switch to input the number and displaying the same number in all of the digits. Now i want to change it and not input it from the dip switch. Instead I want to give 4 different signals. For example I was thinking S1 <="0001";, S2 <="0011"; , S3 <="0011"; , S4 <="0111"; .
The problem is that from what I see in the design there are not 7(actually 8) pins for each display, but 8 for all of them. So how do I display different numbers at the same time?
Current working code (it does what you see in the second picture) :
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity seven_segments is
port(
clk : in std_logic;
bcd : in std_logic_vector(3 downto 0);
dig_pins : out std_logic_vector(3 downto 0);
segment7 : out std_logic_vector(6 downto 0)
);
end entity;
architecture Behavioral of seven_segments is
begin
BCD_process : process (clk)
begin
if rising_edge(clk) then
case bcd is
when "0000"=> segment7 <="1000000"; -- '0'
when "0001"=> segment7 <="1111001"; -- '1'
when "0010"=> segment7 <="0100100"; -- '2'
when "0011"=> segment7 <="0110000"; -- '3'
when "0100"=> segment7 <="0011001"; -- '4'
when "0101"=> segment7 <="0010010"; -- '5'
when "0110"=> segment7 <="0000010"; -- '6'
when "0111"=> segment7 <="1111000"; -- '7'
when "1000"=> segment7 <="0000000"; -- '8'
when "1001"=> segment7 <="0010000"; -- '9'
when others=> segment7 <="1111111";
end case;
end if;
end process;
DIG_pins_process : process (clk)
begin
if rising_edge(clk) then
end if;
end process;
end architecture;
AI: They are multiplexed.
This means that you have to drive them in sequence.
You have to output on pin SEG0-7 what you want on the first digit.
Then you enable DIG1. wait a little bit.
Then disable DIG1 and output on pin SEG0-7 what you want on the second digit
Then you enable DIG2. wait a little bit.
Then disable DIG2 and output on pin SEG0-7 what you want on the third digit
Then you enable DIG3. wait a little bit.
Then disable DIG3 and output on pin SEG0-7 what you want on the fourth digit
Then you enable DIG4. wait a little bit.
Then disable DIG4 and start over.
This is likely to be implemented as a state machine.
Depending on your choice of the clock for that process, the digit could be blinking faster than your eyes can notice. This would give the illusion that they are all on when in fact only one digit is enabled at a given time. |
H: Convert ringing frequency to phase margin for LDO stability
Based on ROHM document "Simple Test Method for Estimating the Stability of Linear Regulators", it showed that in page 2/4, the phase margin for Fig.5 Phase Margin = 0 deg, Fig.6 Phase Margin = 9.9 deg and so on.
Simple Test Method for Estimating the Stability of Linear Regulator
My question is, how does they convert the ringing frequency to the phase margin? I know the relation between ringing to stability but i cant find the exact formula to convert this ringing to the phase margin.
AI: What they're doing in the article is a step-response analysis. The load current is suddenly increased and on an oscilloscope the step response is examined.
What matters in that response is not the frequency but the amount of ringing. How many sine waves does it take for the response to become flat again?
Infinite sine waves means oscillation so an unstable system.
A few sine waves might indicate marginal stability (on the edge).
Less than one sine wave usually means that the system is quite stable.
Read more in this article from TI about the relation between stability and ringing. |
H: Help with understanding the Memory Map of MLX90393
(Using a Raspberry Pi 3 Model B+ and python)
I needed some assistance in understanding the memory map of MLX90393
I've attached the memory map here and you could also find it in the datasheet.
I'm a newbie especially for data processing. The information provided in the datasheet is a problem to me. I've spent last 7 days trying to understand it with nothing solid to work with. The sample code from the product page works very well and gives intended output. So far I've been just able to change just GAIN_SEL property because it's already in the sample code and has a variable for it to be changed and done a lot of trial and errors with non-sensible output. I know Bitwise conversions and I've worked with them before but I can't understand how exactly the host specifies the address register and the values for it in reference to the memory map. I've gone through all of the tutorials on Sparkfun and Adafruit and some other websites to understand I2C again. I know how I2C works about sending bytes and waiting for the responses and then reading data blocks but I simply don't know how to configure the sensor.
(For example, how am I supposed to set DIG_FILT (digital property)?, How do I start it in burst mode?)
It really seems like a stupid question to me as well but I just don't know what I'm doing wrong.
If you guys can help me understand it or point me to link which will be useful that'll be great!
Here is the sample code for your reference :
# Distributed with a free-will license.
# Use it any way you want, profit or free, provided it fits in the licenses of its associated works.
# MLX90393
# This code is designed to work with the MLX90393_I2CS I2C Mini Module available from ControlEverything.com.
# https://www.controleverything.com/products
import smbus
import time
# Get I2C bus
bus = smbus.SMBus(1)
while True:
# MLX90393 address, 0x0C(12)
# Select write register command, 0x60(96)
# AH = 0x00, AL = 0x5C, GAIN_SEL = 5, Address register (0x00 << 2)
config = [0x00, 0x5C, 0x07]
bus.write_i2c_block_data(0x0C, 0x60, config)
# Read data back, 1 byte
# Status byte
data = bus.read_byte(0x0C)
# MLX90393 address, 0x0C(12)
# Select write register command, 0x60(96)
# AH = 0x02, AL = 0xB4, RES for magnetic measurement = 0, Address register (0x02 << 2)
config = [0x02, 0xB4, 0x08]
bus.write_i2c_block_data(0x0C, 0x60, config)
# Read data back, 1 byte
# Status byte
data = bus.read_byte(0x0C)
#FROM HERE
# MLX90393 address, 0x0C(12)
# Start single meaurement mode, X, Y, Z-Axis enabled
bus.write_byte(0x0C, 0x3E)
# Read data back, 1 byte
# Status byte
data = bus.read_byte(0x0C)
time.sleep(0.096)
# MLX90393 address, 0x0C(12)
# Read data back from 0x4E(78), 7 bytes
# Status, xMag msb, xMag lsb, yMag msb, yMag lsb, zMag msb, zMag lsb
data = bus.read_i2c_block_data(0x0C, 0x4E, 7)
# Convert the data
xMag = data[1] * 256 + data[2]
# if xMag > 32767 :
# xMag -= 65536
yMag = data[3] * 256 + data[4]
# if yMag > 32767 :
# yMag -= 65536
zMag = data[5] * 256 + data[6]
# if zMag > 32767 :
# zMag -= 65536
# Output data to screen
print "Magnetic Field in X-Axis : %d" %xMag
print "Magnetic Field in Y-Axis : %d" %yMag
print "Magnetic Field in Z-Axis : %d" %zMag
AI: This datasheet can be a bit confusing, but I have figured this out.
Here is the format of the Write Register command:
The actual command is 0x60 (bits abc zero as recommended in the datasheet)
From page 18:
The argument for the volatile memory access commands (RR/WR) «abc»
should be set to 0x0h, in order to get normal read-out and write of
the memory.
Looking at the code for the first write, we have:
config = [0x00, 0x5C, 0x07]
bus.write_i2c_block_data(0x0C, 0x60, config)
The bus_write_i2c_block() specifies the device address (0x12), the command (0x60) and the config block.
The config structure is ordered as Register Address, Data Low, Data High (Look back at the format and you will see that the last command item is the register address; as it is first in this list it is reasonable to see it as in reverse reading order)
The data to be loaded where I have expanded only the least significant byte:
So the gain field has been set to 0x05
So to use the block write function, look at the register you need, set up the bitfields from the memory map as required and separate to high and low byte then use the config this way:
config = [register address, low byte, high byte]
The bitfields are described in section 15.1
The command
bus.write_byte(0x0C, 0x3E)
is command 0x3[zyxt] with the zyxt (Z axis, Y axis, X axis, Temperature) bits set to 1110; measurements will be done on the Z,Y and X axis and the temperature measurements will not be done as the bits enable the first 3 items and not the last.
Note that the address shift left operation (as required by the address field) appears to be implemented in the write function.
The call
config = [0x02, 0xB4, 0x08]
bus.write_i2c_block_data(0x0C, 0x60, config)
Which sets the RES fields has 2 as the register argument, and the actual register with those fields in indeed register address 2.
With devices like this, you need to map the bitfields for each piece of functonality in a given 16 bit word (by using a template and seeing what the final result is).
In this example, the author has used hard coded constants.
You could use something like this (C syntax) for a more generic approach:
typedef struct
{
uint8_t Address;
uint8_t DataLow;
uint8_t Datahigh;
}configdata;
// then a declaration
configdata config;
// and then fill it with:
config.Address = <address>;
config.DataLow = <data low>;
config.Datahigh = <data high>;
That should get you going. |
H: How this close loop control systems work?
I have attached photo of a lecture where a slide is showing a close loop control system(theif repulsion system). But i am confused by the electric eye?how it is working?is the robber/theif so mad that he is carrying an IR source in his hand?(normally a theif is expected to have a pistol or knife in his hand)
AI: The electric eye, in this case, is a PIR sensor (Passive infrared sensor). These type of sensors detect the movement of objects that emit IR radiation. IR radiation is also called heat radiation, and every human emits heat. That's why the "electric eye" in your case detects a thief. The thief does not have any external IR source, he is the actual IR source himself!
You can check a Wiki page for PIRs for more info. Also, there are great videos on YT for a better explanation if you need it:
https://en.wikipedia.org/wiki/Passive_infrared_sensor |
H: To what pins of the relay do I need to connect a device to be able to control that device ? NO or NC? Why?
I am very bad at electrical things, as I don't understand much of electrical engineering.
I was tasked to design a software that will take some inputs, randomize them and give some outputs to some relays. I did the software and somebody else designed the circuit.
The problem is that now that somebody else is on vacation and I need to explain how to make connection to the relay and I have no idea how.
First of all, I found terms of Normally Closed, Normally Open, Active Low and Active High and I have no idea what they mean. I read about them but I do not understand.
Secondly, this is the relay module:
https://www.tme.eu/ro/details/oky3012/module-pentru-relee/okystar/
https://i.postimg.cc/kg9xyGJ6/prime-presentation-pres-0004.jpg
It doesn't say which is NO, COM, or NC.
Thirdly, I understand that I can use a multi-meter to check for resistances from only-God-knows-where to I-have-no-idea-which point.
The program that I did on an ESP32 sets the relays output pin to HIGH, which means that the relay is off or not activated (for me it's output. basically the pin that will control something):
pinMode(Relay1_1,OUTPUT);
digitalWrite(Relay1_1, HIGH);
And when I want to activate the relay or switch it on (make it click) I send a LOW signal to it.
digitalWrite(Relay1_1, LOW);
To what pins of the relay do I need to connect something to be able to control it?
AI: When you activate the relay, it connects the COM and NO connections together. When you deactivate the relay it connects the COM and NC connections together.
If this is your module -
Image from - https://okystar.com/wp-content/uploads/2018/05/1-5.jpg
Then the blue connector on the left is showing two switch symbols. The middle connection in each case is the COM. The one that is show as connected by default is the NC. The one open by default is the NO. |
H: How do you connect a coax cable to a homemade bi-quad antenna?
I want to build antennas because I think they're pretty cool. Like invisible photons that pass through matter. But I'm struggling with basics and considering removing my tinfoil hat very soon.
Here is the not working antenna I built: https://buildyourownantenna.blogspot.com/2014/07/double-biquad-antenna-calculator.html
Does the shield need to contact the reflector ?
Is the reflector connected to something ?
Does the antenna element (the 4 squares) connects the shield and the coax inner cable ? How could it radiate then if it's a closed circuit ?
Many thanks !
AI: Isn't it clear from all of the diagrams and photographs?
The two conductors at the very center of the biquad wire are connected to the center pin and shield of the coax connector. The reflector is also connected to the shield. |
H: Path analysis D-FLIP-FLOP - what is SET?
I have to calculate the clock paths in a circuit and I have a 2 dual positive-edge-triggered D-TYPE FLIP-FLOP with clear and reset called DFF1 and DFF2.
Data sheet: http://www.ti.com/lit/ds/symlink/sn74lvc74a-q1.pdf
what does it mean: the CLR and SET pins of the two flip-flops are set such that {DFF1,DFF2} are reset to {1,0}?
Thanks!
AI: I don't see the sentence you provide in the datasheet. Instead the datasheet says:
A low level at the preset (PRE) or clear (CLR) inputs sets or resets
the outputs, regardless of the levels of the other inputs.
A PRE input sets the Q to 1, a CLR input sets the Q to 0. There are two flip-flops in this chip, so PRE1 and CLR1 are for the first flip-flop while PRE2 and CLR2 are for the second flip-flop. |
H: Current transducer - understanding of turns ratio connection
I'm using a LEM LAH 25-NP current sensor and I don't understand the recommended PCB connections in the table from the datasheet. I understand the first one, but what is with the second and third? What are the input and output pins?
So if there is a trace, I split the trace and put the sensor between the two traces to measure the current. How do I connect the pins with the traces? For 2 primary turns, do I use pins 2,3,6 as IN and pins 4 and 5 as OUT?
And what is with 3 primary turns? Are the input pins 2,6 and the output pins 3,5?
AI: You probably missed this little picture of the input wiring in the data sheet: -
It should make sense now. |
H: Error with Assert statement in Verilog
I have the following assert statement in a for loop, which is within a generate block:
34 assert ((a[j] == 1'b1) || (a[j] == 1'b0))
35 else $error("Input 'a[" + j + "]' is not a digital logic value");
When I try to compile, I get the following error:
Error: file(34): near "(": syntax error, unexpected '(', expecting property
From what I can see, I'm not missing any parentheses in the
AI: It isn't telling you that you're missing any parentheses; it's telling you that it isn't expecting a parenthesis at all in that spot.
You didn't provide any context, but if your assert is outside a procedural block (initial or always), then a property name must appear between the assert and the (. This is known as an "concurrent assert".
The other type (the syntax you used) is an "immediate assert", and can only appear inside a procedural block.
Additional details here. |
H: Create circuit for 12v auto washer pump to 230v mains with push button for art installation
I am creating an interactive art installation in a gallery context using a 12 volts car headlight/windshield washer pump. It basically is a fluid washer pump taken outside of a car into a gallery, activated by the user (or spectator) by a switch (a preferably illuminated momentary push button). The whole setup is to be mounted into an insulated vertical box made of bolted metal racks and transparent plastic, so that no water can really get into it. I chose waterproof components for added safety.
The components are all powered by a 10 amps 12 volts laptop power supply connected to the standard European 220v electrical mains.
I am a total beginner when it comes to electrical engineering. I have never really even connected two cables together but I am quite motivated in learning how to do it.
After doing quite a lot of research, I have designed this circuit prototype (which I join to this post), which includes the pump, a relay, a circuit breaker, a switch and the power supply which is to be connected to 230v European mains electrical outlet. The red cables are positive and blacks are ground. My main question would be: are all the cables connected to the right terminals?
And is my circuit design reliable and safe for random people to use in a gallery context, taking into account the potential presence of a small amount of water ?
Here are the components I am planning on using:
The 10 amps 230v to 12v DC laptop power supply I have (will be isolated from any water by plastic panels): https://www.amazon.de/gp/product/B07JC7MJHV/ref=ppx_yo_dt_b_asin_title_o00_s00?ie=UTF8&psc=1
A switch example: https://www.ebay.co.uk/itm/12V-16mm-LED-Black-Metal-Push-Button-Panel-Momentary-Switch-Light-Car-Boat-/362525441944?_trksid=p2067104.m45210.l46741 (sub question: Can a higher voltage switch than 12 v be used?)
12 v waterproof 40 amps Relay: https://www.amazon.de/gp/product/B00M2QK47Y/ref=ox_sc_act_title_3?smid=A258M9JSP6L6E7&psc=1
12 v waterproof 50 amps Breaker: https://www.amazon.com/ANJOSHI-Circuit-50A-300A-Protection-Inverter/dp/B07K4ZK4VP/ref=pd_day0_hl_107_1/141-5093642-5255831?_encoding=UTF8&pd_rd_i=B07K4ZK4VP&pd_rd_r=b5db5bcd-ff46-4663-a722-b9c2642abb70&pd_rd_w=EMncz&pd_rd_wg=X9N3j&pf_rd_p=ad07871c-e646-4161-82c7-5ed0d4c85b07&pf_rd_r=SSA0CTQK5SBFV77636NM&psc=1&refRID=SSA0CTQK5SBFV77636NM
Waterproof cable connectors: https://www.amazon.co.uk/Waterproof-Electrical-Connectors-Socket-Marine/dp/B01DVQ2ANO?ref_=fsclp_pl_dp_10
The 12 v headlight washer pump to be powered, tested with the laptop power supply I have and works: https://www.amazon.de/gp/product/B006DHWPOI/ref=ppx_yo_dt_b_asin_title_o00_s00?ie=UTF8&psc=1
My questions are:
Is my circuit design correct? Are all the cables connected to the right terminals?
Are these component examples adapted to my usage?
Can a higher voltage rated switch be used in a 12v circuit, all else being equal?
Can I power two systems (the pump and the LED power for the illuminated switch from the same breaker or do I need an additional fuse?
Any advice or help is appreciated to avoid injuring anyone and have a reliable setup that will not break.
Thanks a lot
AI: Is my circuit design correct? Are all the cables connected to the right terminals?
Yes.
Are these component examples adapted to my usage?
The breaker won't do anything. If it's a modern supply, it'll do its own current limiting; if its an older supply it'll burn up long before the current gets to 50A. A 15A breaker would be more appropriate, if you don't trust the supply to limit current.
Can a higher voltage rated switch be used in a 12v circuit, all else being equal?
Yes. For the most part, switch voltage (and current) ratings are maximum, not minimum.
Can I power two systems (the pump and the LED power for the illuminated switch from the same breaker or do I need an additional fuse?
One breaker will do. The rule for a protected circuit is that all the wiring is heavy enough to carry the current that the breaker is rated for, or that the wire is inside an enclosure that'll contain the ensuing fire. It sounds like you'll be satisfying both of those rules of thumb. |
H: Why does the seven segment display have decimal point at the right?
All the seven segment displays I’ve seen so far have their decimal point to the right of the main digit. Why is this so? A decimal point to the left will be able to represent more possible combinations of numbers.
A single digit display with a decimal point on the left can represent nine more possible numbers (\$ .1,\ \ldots ,\ .9 \$) than the common display with decimal point at the right.
Edit: Why also do the digits lean towards right?
AI: I think mike65535 is probably correct, more-or-less.
Of course the argument that there's room on the right of the digit and not the left only makes sense if the digit is slanted to the right. There's some discussion of that over here. What's missing from that discussion is that a slight rightward slant gives characters that are slightly more similar to handwriting.
The idea that one can get another power-of-ten out of a given display by putting the point on the left makes sense, but I don't think it would be a good design decision unless you were already constrained to just one or two digits.
A "bare" decimal (without the leading zero) isn't as easy to read, is more likely to be mis-read, and will always be at the low end of the displayable range. Even if we did have the decimal point on the left, it would still almost always be the rigth decision to pay the cost & space for another display digit. |
H: What will happen if I use higher voltage capacitors in an inverter?
We have old textile machines (Riter ring machine) that have an inverter - very large size and it contains 12 capacitors (400 volt, 2200 uF.)
The problem is we have 20 machines and almost every month an inverter explodes and all the capacitors melt.
As a solution I am planning to use higher voltage (450 volt) capacitors.
Is that solution?
The capacitor link is here or at this link
or are there any alternatives?
AI: Nothing will happen, it is fine to use higher voltage capacitors than the previous capacitors. The voltage rating indicates the max voltage. If the capacitor has a higher max rated voltage, then that's fine, because the product will have an operating voltage lower than 400V.
Check the ESR in the datasheets and make sure its lower than the current capacitors. |
H: PCI card electromechanical specification
I am making an old PCI (5V) form factor card for a product, and am having a hard time finding any sort of reliable drawing showing the official dimensions of the gold fingers, key cutouts, and their relationship to the PCI mounting bracket.
Was there an official PCI specification released that I just am unable to find on the internet? Is there some other resource that has these? I am trying to avoid the mistakes that would come about from manually measuring PCI cards I have in house.
AI: Yes there is a official specification, several versions in fact.
There is also a book about the PCI bus PCI Bus Demystified that is informative.
The specification is published by https://pcisig.com and can be ordered from them or you can search for it and ... https://www.ics.uci.edu/~harris/ics216/pci/PCI_22.pdf
PS. I used the search terms "PCI mechanical specification". |
H: SMB Connector Grounding for S/PDIF Coax
I'm transmitting coax level S/PDIF over an SMB connector, and I'm wondering if the "body" pins (all pins that aren't the center) should be left floating, or if they should be connected to ground.
As I understand it, RCA Coax S/PDIF does expect the ground to be connected, rather than floating, which leads me to believe that the "body" pins should be connected to ground.
I'm using this Molex 73100-0259 connector, FWIW.
AI: Yes, the "body" pins must be grounded in order to ground the shield of the coax cable. |
H: Analyze op amp circuit
I want to know how to calculate the output of the below op amp. I know this is supposed be an inverting amplifier with offset but I have never seen the connection of the offset to the negative side of op amp.
simulate this circuit – Schematic created using CircuitLab
I have come up with this formula:
$$V_{\text{out}} = V_{\text{in}} \times \frac{R_2}{R_1} + \frac{R_2}{R_4+R_7}V_\text{p}$$
Is it correct? \$V_\text{p}\$ is the voltage out of the potentiometer.
AI: R7 does not do anything of value, it is actually harmful (increases output noise and output offset voltage- and related drift). Ideally there is no voltage across R7 so it has no effect, but op-amps are not ideal and if you think about the resistor approaching zero it's clear there will be problems. You can calculate the effects if you model the op-amp with Vos and Vn voltage in series withe one of the inputs (offset and noise).
Vout ~= \$ -V_{IN} \cdot \frac{R_2}{R_1} -V_P \cdot \frac{R_2}{R_4}\$, ignoring op-amp gain and offset voltage.
You can find that by applying KCL to the non-inverting input node, assuming zero input current to the op-amp and then find Vout such that V- = V+ = 0V. |
H: In practical, what really is a memory word in PLC?
I came across some plc code (structured text) being used in an industrial company. When I asked the question, I got a blurry answer. However, what I picked up is that it has something to do with the SCADA and PLC interacting. Although I'm really not sure what exactly a memory word is.
Any information on this will really be appreciated.
AI: Most PLCs use 16-bit words.
A word can be used to represent
a 16-bit unsigned integer (0 to 65,535).
a 16-bit signed integer (-32,768 to 32,767).
16 individual bits (such as a group of boolean values).
... what I picked up is that it has something to do with the SCADA and PLC interacting.
Nope. The PLC uses words for variable storage. A SCADA (Supervisory Control and Data Acquisition System) can be made to read or write to a variable for monitoring or control purposes but the PLC word exists whether there is SCADA or not.
Table 1. IEC 61131-3 data types.
Bit Strings – groups of on/off values
BYTE – 8 bit (1 byte)
WORD – 16 bit (2 byte)
DWORD – 32 bit (4 byte)
LWORD – 64 bit (8 byte)
INTEGER – whole numbers (Considering byte size 8 bits)
SINT – signed short integer (1 byte)
INT – signed integer (2 byte)
DINT – signed double integer (4 byte)
LINT – signed long integer (8 byte)
USINT – Unsigned short integer (1 byte)
UINT – Unsigned integer (2 byte)
UDINT – Unsigned double integer (4 byte)
ULINT – Unsigned long integer (8 byte)
REAL – floating point IEC 60559 (same as IEEE 754-2008)
REAL – (4 byte)
LREAL – (8 byte)
Duration
TIME – (4 byte). Literals in the form of T#5m90s15ms
LTIME – (8 byte). Literals extend to nanoseconds in the form of T#5m90s15ms542us15ns
Date
DATE – calendar date (Size is not specified)
LDATE – calendar date (Size is not specified)
Time of day
TIME_OF_DAY / TOD – clock time(Size is not specified)
LTIME_OF_DAY / LTOD – clock time (8 byte)
Date and time of Day
DATE_AND_TIME / DT – time and date(Size is not specified)
LDATE_AND_TIME / LDT – time and date(8 byte)
Character / Character string
CHAR – Single-byte character (1 byte)
WCHAR – Double-byte character (2 byte)
STRING – Variable-length single-byte character string. Literals specified with single quote, 'This is a STRING Literal'
WSTRING – Variable-length double-byte character string. Literals specified with a double quote, "This is a WSTRING Literal" |
H: Why is the answer .908 W instead of 9.08?
I tried calculating it on my own and end up questioning why 200k * e^-10 becomes .908 W instead of 9.08 which was what I've calculated
AI: why 200k * e^-10 becomes .908 W instead of 9.08
It does not.
Taking as a base and unevaluated assumption that the equations are accurate and applicable, there is a simple math error in the last line of the given solution.
You can verify this yourself with a calculator; the evaluation of the exponential seems correct, but the wrong result is printed for the final multiplication. |
H: Astable Multivibrator - Kalafuna is burning, not switching
I am having problems with circuit, that I designed.
R1=R2=R3=R4= 680 ohm; C1=C2 = 20nF; R5=R6 = 7,3kohm
Circuit works only when voltage is about 0,5-0,7V and resistors r5/r6 are not connected.
It "should" oscillate at 50Khz.
** R5=R6 Are calculated for hfe=306 measured.
Designed for 20V -> 680 ohm -> U/R -> 20/680 = 0,0294A. Thats what transistor should turn on. With hfe 306 -> 0,0294/306 -> 0,000096 A. Thats minimal current for turn it ON. So to bypass turning second transistor On when capacitor rise 0,7V - resistor is calculated for 20V -> 20/0,000096 = 208kOhms.
With resistors connected, there is no switching and i got nice smell from burning resistor R1 when rising voltage to 20V.
AI: R5 and R6 are your problem.
In the standard design for an astable multivibrator reference 1, reference 2 these resistors are not included.
R5=R6 Are calculated for hfe=306 measured.
This is an indication of the problem. As Bimpelrekkie said in the comments, hfe shouldn't matter. In an astable multivibrator the transistors should be acting as pure switches. When they're on, we wish them to be all-the-way "on" i.e. driven into pure saturation, and when they're off we wish them to be all-the-way "off", i.e. driven into complete cutoff mode. For that reason, hfe should be ignored, because we should always design the circuit to wildly exceed the requirements for turn-on and turn-off given a particular hfe value.
If we simulate your circuit on circuitjs it shows the same behavior that you see in your physical circuit... except that it predicts that both R1 and R4 should be burning up.
If you delete R5 and R6 (or just set them to a tiny value like 0.1 ohms) then the circuit will begin oscillating... but in a pretty ugly fashion until you increase the values of R2 and R3 (1k worked for me). Tuning to the correct frequency is left as an exercise for the reader -- reference 1 above tells you exactly how to do it. Also make sure to get some higher-wattage resistors, as noted in the comments. |
H: Running an electric motor beyond its ratings
I ordered a 36V 500W brushed DC motor but unfortunately a 24V one came. I'm faced with the dilemma of returning it and waiting for a month before getting a refund, then ordering a new one and waiting about a month again for it to arrive, totaling 3 months of waiting (with the current one), OR run it beyond its ratings.
I understand that increasing the voltage will increase the rotation speed proportionally. It is currently rated at 2700 rpm @ 24V and ~27A drawn. If I increase the voltage to 36V then rpm will rise to about 4000 and to maintain the 500W power output I will need to supply ~14A.
Questions that arise are:
Are my assumptions correct in the first place?
Is it possible for construction damage to occur when running a motor beyound its rated rotation speed?
Is efficiency compromised in such setup.
AI: It is probably no issue to run a motor beyond its voltage rating.
Electronically seen, you might exceed the break down voltage between two adjecent copper wires in the armature, but it is quite unlikely at this low voltage.
Mechanically seen, as voltage is proportional to rotational speed, a higher speed burdens the bearings more. Contineously running a motor at higher speed will not directly damage the bearings, but the bearings will wear out faster.
Running a motor beyond its current rating will heat up the motor. You can temporarily run it beyond its current rating provided you don't exceed the thermal limits. If the motor becomes too hot, the isolation of the copper wires of the armature degrades or even melts, causing shorts between the windings, which on its turn increases the motor current causing a thermal runaway. The point when this happens depends on the cooling of the motor housing, ambient temperature, etc, so, not easily to predict.
You cannot do simple power calculations with motors: when the motor is running with no load, the current will be low, so the input / output power will be < 500W. When stalling the motor, the motor voltage will be close to zero and the the current high, but still the power will be way lower than 500W.
Read this answer to see how the power and efficiency are related to the torque and only have a local maximum.
To make useful assumptions for a motor, you need its torque vs speed / current / power / efficiency graphs (as in the linked answer above) AND/OR its physical constants (speed constant, torque constant etc) |
H: Is the following N-FET circuit sufficient to act as a power switch for an IC?
I'm trying to build a circuit which will turn an IC on and off using a MCU signal voltage of 3.3V. This is for a low-power circuit, so every coulomb is critical.
I selected the BSS816NW N-type MOSFET for the job. One can see that Vgs minimum is 1.8V for this FET, which worries me with the following circuit:
simulate this circuit – Schematic created using CircuitLab
One can see that as the chip saturates in voltage, the FET will increase in resistance, which is problematic, as there will always be a voltage drop between the gate and source, which may cause brown-outs for U1.
How can I use simple FETS or BJTs to improve this low-power toggle for U1?
There are no other voltage rails besides ground and 3.3V pos.
AI: One way to do this (with a PMOS):
simulate this circuit – Schematic created using CircuitLab
You have to make sure that the PMOS can be properly turned on with a Vsg of 3.3V (i.e look for a logic level PMOS and check the datasheet). This one could work: DMP2035U-7—rated down to 2.5V for turn-on. Since you care about low power, you can increase the value of the 10k pullup, to something like 47k or 100k.
Notice that if the control signal is either 3.3V or left floating, the PMOS will be in the cutoff region and therefore acts as an open switch. If the control signal goes low (0V), then the PMOS will conduct the current required by the load.
Using an NMOS, as you show in your post, would make things a lot more difficult since you'd need to provide a voltage higher than 3.3V at the gate of the transistor—which you probably don't have (google high-side switching with an NMOS or NPN). You can avoid all that by using a P-channel MOSFET. |
H: TM4C123 GPIO_DATA Question
I was watching a tutorial about this MCU (TM4C123 dev board), but I don't understand where they got the memory location address from. All they are doing is switching the built in red LED on the board on and off.
They are setting bit 1 in the GPIODATA register (see attached image of the datasheet for this register) with the address 0x400253FCU and writing a hex value of 0x20U to it. They then clear the bit by writing 0x0U to the same address to switch the LED off (there are time delays in between off course).
My question is, that I don't understand where the offset of '3FC' comes from? I am used to just writing down the offset given in the datasheet. In this case I thought it would have been 0x40025000U.
I think I am misunderstanding something due to the fact that this is a 32-bit MCU.
Thanks for all help everyone.
AI: If you read the section you quoted. You’ll see that bits [9:2] of the address are used as a mask to allow changing only some of the bits on a write. Those bits correspond to a hex value of 3FC. Therefore, they are enabling writes to all 8 bits.
If they wanted to make sure that only the bit corresponding to the LED were changed, the 3FC would be changed to the bit position, shifted left 2 bits.
This is actually a very nice feature as it allows separate execution threads to interact with different bits without having to go use read-modify-write which could clobber the same in another thread. |
H: How can I connect a sensor to two LEDs so that one will work when the sensor's output is HIGH and the other when it's LOW?
(Moved from the Arduino stackexchange)
Let OUT be the sensor's output.
If I connect
LED1 to BAT+ and OUT
LED2 to BAT- and OUT
is this Ok?
Instead of LEDs those could be units that need even less current. I am also interested to know the limits of the offered solution in terms of current and what should I do from units that draw higher current.
Anyway, I look for a solution without a MCU.
AI: Your solution is acceptable within limitations:
Voltage swing of Out needs to be >= Vf = LED on voltage (no surprise)
Vsupply needs to be much less than Vf (LED on voltage). If Vsupply is too high both LEDs will light noticeably when OUT is open circuit.
In almost any real-world case you will get some LED current when OUT is open circuit. This may or may not be acceptable.
OUT needs to be able to source and sink the required LED current.
A resistor is provided between the centre point of the two LEDS and OUT to control LED current.
R1 is sized to suit desired LED current drain.
More can be said but start with the above and ask/comment as required.
simulate this circuit – Schematic created using CircuitLab
___________________________
For higher current than the I/O pin can source or sink a buffer or driver is required. This can be an IC suited to the task or a discrete transistor circuit.
This circuit will work "as shown" with some limitations.
Q1 / Q2 draw a current spike at changeover from high to low and VOUT should not be left open-circuit.
Q1 / Q2 can be any small bipolar transistor with adequate voltage and current characteristrics.
R1 is sized to suit desired LED current drain.
simulate this circuit |
H: Connecting grounds of two LED drivers
I'm using these Mean Well LDD-H DC-DC constant current step-down LED drivers to drive these LEDs.
What I'm seeing is that when the -Vout terminals of the drivers are connected together, both LED strips start being driven in sync (as if the PWM inputs are connected).
If is use a separate ground for each driver-strip pair, it works as expected.
Why is that happening?
Closely related to this question, but with more specifics.
AI: Figure 1. The datasheet suggests that there is no isolation between input and output.
simulate this circuit – Schematic created using CircuitLab
Figure 2. You have added the red link.
It should be clear from Figure 2 that you have "ORed" the power supply switchers and whichever one turns on will turn on both strings of LEDs. Bad idea! |
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