label int64 0 1 | func1 stringlengths 23 97k | id int64 0 27.3k |
|---|---|---|
1 | static int ogg_restore(AVFormatContext *s, int discard) { struct ogg *ogg = s->priv_data; AVIOContext *bc = s->pb; struct ogg_state *ost = ogg->state; int i; if (!ost) return 0; ogg->state = ost->next; if (!discard){ for (i = 0; i < ogg->nstreams; i++) av_free (ogg->streams[i].buf); avio_seek (bc, ost->pos, SEEK_SET); ... | 3,672 |
0 | rdt_free_context (PayloadContext *rdt) { int i; for (i = 0; i < MAX_STREAMS; i++) if (rdt->rmst[i]) { ff_rm_free_rmstream(rdt->rmst[i]); av_freep(&rdt->rmst[i]); } if (rdt->rmctx) av_close_input_stream(rdt->rmctx); av_freep(&rdt->mlti_data); av_free(rdt); } | 3,673 |
1 | static inline void RENAME(yuvPlanartoyuy2)(const uint8_t *ysrc, const uint8_t *usrc, const uint8_t *vsrc, uint8_t *dst, long width, long height, long lumStride, long chromStride, long dstStride, long vertLumPerChroma) { long y; const long chromWidth= width>>1; for(y=0; y<height; y++) { #ifdef HAVE_MMX //FIXME handle 2 ... | 3,674 |
1 | void visit_start_struct(Visitor *v, void **obj, const char *kind, const char *name, size_t size, Error **errp) { if (!error_is_set(errp)) { v->start_struct(v, obj, kind, name, size, errp); } } | 3,675 |
1 | static int encode_nals(AVCodecContext *ctx, uint8_t *buf, int size, x264_nal_t *nals, int nnal, int skip_sei) { X264Context *x4 = ctx->priv_data; uint8_t *p = buf; int i; /* Write the SEI as part of the first frame. */ if (x4->sei_size > 0 && nnal > 0) { if (x4->sei_size > size) { return -1; memcpy(p, x4->sei, x4->sei_... | 3,676 |
0 | static int copy_stream_props(AVStream *st, AVStream *source_st) { int ret; if (st->codecpar->codec_id || !source_st->codecpar->codec_id) { if (st->codecpar->extradata_size < source_st->codecpar->extradata_size) { if (st->codecpar->extradata) { av_freep(&st->codecpar->extradata); st->codecpar->extradata_size = 0; } ret ... | 3,677 |
1 | aio_ctx_finalize(GSource *source) { AioContext *ctx = (AioContext *) source; thread_pool_free(ctx->thread_pool); aio_set_event_notifier(ctx, &ctx->notifier, NULL); event_notifier_cleanup(&ctx->notifier); rfifolock_destroy(&ctx->lock); qemu_mutex_destroy(&ctx->bh_lock); timerlistgroup_deinit(&ctx->tlg); | 3,679 |
1 | void gen_intermediate_code_internal(LM32CPU *cpu, TranslationBlock *tb, bool search_pc) { CPUState *cs = CPU(cpu); CPULM32State *env = &cpu->env; struct DisasContext ctx, *dc = &ctx; uint16_t *gen_opc_end; uint32_t pc_start; int j, lj; uint32_t next_page_start; int num_insns; int max_insns; pc_start = tb->pc; dc->env =... | 3,680 |
1 | static int parse_keyframes_index(AVFormatContext *s, AVIOContext *ioc, AVStream *vstream, int64_t max_pos) { unsigned int arraylen = 0, timeslen = 0, fileposlen = 0, i; double num_val; char str_val[256]; int64_t *times = NULL; int64_t *filepositions = NULL; int ret = AVERROR(ENOSYS); int64_t initial_pos = avio_tell(ioc... | 3,682 |
1 | static void via_ide_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); k->init = vt82c686b_ide_initfn; k->exit = vt82c686b_ide_exitfn; k->vendor_id = PCI_VENDOR_ID_VIA; k->device_id = PCI_DEVICE_ID_VIA_IDE; k->revision = 0x06; k->class_id = P... | 3,683 |
0 | static void vc1_extract_headers(AVCodecParserContext *s, AVCodecContext *avctx, const uint8_t *buf, int buf_size) { VC1ParseContext *vpc = s->priv_data; GetBitContext gb; const uint8_t *start, *end, *next; uint8_t *buf2 = av_mallocz(buf_size + FF_INPUT_BUFFER_PADDING_SIZE); vpc->v.s.avctx = avctx; vpc->v.parse_only = 1... | 3,684 |
1 | int ff_jpeg2000_init_component(Jpeg2000Component *comp, Jpeg2000CodingStyle *codsty, Jpeg2000QuantStyle *qntsty, int cbps, int dx, int dy, AVCodecContext *avctx) { int reslevelno, bandno, gbandno = 0, ret, i, j; uint32_t csize; if (codsty->nreslevels2decode <= 0) { av_log(avctx, AV_LOG_ERROR, "nreslevels2decode %d inva... | 3,685 |
1 | void vhost_dev_cleanup(struct vhost_dev *hdev) { int i; for (i = 0; i < hdev->nvqs; ++i) { vhost_virtqueue_cleanup(hdev->vqs + i); } memory_listener_unregister(&hdev->memory_listener); if (hdev->migration_blocker) { migrate_del_blocker(hdev->migration_blocker); error_free(hdev->migration_blocker); } g_free(hdev->mem); ... | 3,686 |
1 | static void test_validate_fail_union_flat_no_discrim(TestInputVisitorData *data, const void *unused) { UserDefFlatUnion2 *tmp = NULL; Error *err = NULL; Visitor *v; /* test situation where discriminator field ('enum1' here) is missing */ v = validate_test_init(data, "{ 'integer': 42, 'string': 'c', 'string1': 'd', 'str... | 3,687 |
1 | static void spapr_populate_pa_features(CPUPPCState *env, void *fdt, int offset) { uint8_t pa_features_206[] = { 6, 0, 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 }; uint8_t pa_features_207[] = { 24, 0, 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0... | 3,688 |
1 | static void thread_pool_co_cb(void *opaque, int ret) { ThreadPoolCo *co = opaque; co->ret = ret; qemu_coroutine_enter(co->co, NULL); } | 3,689 |
1 | static void pc_dimm_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { int slot; HotplugHandlerClass *hhc; Error *local_err = NULL; PCMachineState *pcms = PC_MACHINE(hotplug_dev); MachineState *machine = MACHINE(hotplug_dev); PCDIMMDevice *dimm = PC_DIMM(dev); PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS... | 3,692 |
1 | int bdrv_aio_multiwrite(BlockDriverState *bs, BlockRequest *reqs, int num_reqs) { BlockDriverAIOCB *acb; MultiwriteCB *mcb; int i; if (num_reqs == 0) { return 0; } // Create MultiwriteCB structure mcb = qemu_mallocz(sizeof(*mcb) + num_reqs * sizeof(*mcb->callbacks)); mcb->num_requests = 0; mcb->num_callbacks = num_reqs... | 3,693 |
1 | static void mov_fix_index(MOVContext *mov, AVStream *st) { MOVStreamContext *msc = st->priv_data; AVIndexEntry *e_old = st->index_entries; int nb_old = st->nb_index_entries; const AVIndexEntry *e_old_end = e_old + nb_old; const AVIndexEntry *current = NULL; MOVStts *ctts_data_old = msc->ctts_data; int64_t ctts_index_ol... | 3,694 |
1 | int ff_win32_open(const char *filename_utf8, int oflag, int pmode) { int fd; int num_chars; wchar_t *filename_w; /* convert UTF-8 to wide chars */ num_chars = MultiByteToWideChar(CP_UTF8, 0, filename_utf8, -1, NULL, 0); if (num_chars <= 0) return -1; filename_w = av_mallocz(sizeof(wchar_t) * num_chars); MultiByteToWide... | 3,695 |
1 | static always_inline target_phys_addr_t get_pgaddr (target_phys_addr_t sdr1, int sdr_sh, target_phys_addr_t hash, target_phys_addr_t mask) { return (sdr1 & ((target_ulong)(-1ULL) << sdr_sh)) | (hash & mask); } | 3,696 |
1 | static void ahci_init_d2h(AHCIDevice *ad) { IDEState *ide_state = &ad->port.ifs[0]; AHCIPortRegs *pr = &ad->port_regs; if (ad->init_d2h_sent) { return; } if (ahci_write_fis_d2h(ad)) { ad->init_d2h_sent = true; /* We're emulating receiving the first Reg H2D Fis from the device; * Update the SIG register, but otherwise p... | 3,697 |
1 | static void acpi_get_pm_info(AcpiPmInfo *pm) { Object *piix = piix4_pm_find(); Object *lpc = ich9_lpc_find(); Object *obj = NULL; QObject *o; pm->pcihp_io_base = 0; pm->pcihp_io_len = 0; if (piix) { obj = piix; pm->cpu_hp_io_base = PIIX4_CPU_HOTPLUG_IO_BASE; pm->pcihp_io_base = object_property_get_int(obj, ACPI_PCIHP_I... | 3,699 |
1 | SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, qemu_irq irq, int baudbase, CharDriverState *chr, int ioregister) { SerialState *s; int s_io_memory; s = qemu_mallocz(sizeof(SerialState)); if (!s) return NULL; s->irq = irq; s->base = base; s->it_shift = it_shift; s->baudbase= baudbase; s->tx_timer = ... | 3,700 |
1 | int qemu_opts_foreach(QemuOptsList *list, qemu_opts_loopfunc func, void *opaque, Error **errp) { Location loc; QemuOpts *opts; int rc; loc_push_none(&loc); QTAILQ_FOREACH(opts, &list->head, next) { loc_restore(&opts->loc); rc = func(opaque, opts, errp); if (rc) { return rc; } assert(!errp || !*errp); } loc_pop(&loc); r... | 3,701 |
1 | void bitmap_set_atomic(unsigned long *map, long start, long nr) { unsigned long *p = map + BIT_WORD(start); const long size = start + nr; int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG); unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start); /* First word */ if (nr - bits_to_set > 0) { atomic_or(p, mask_t... | 3,702 |
1 | static void test_io_channel_ipv4_fd(void) { QIOChannel *ioc; int fd = -1; fd = socket(AF_INET, SOCK_STREAM, 0); g_assert_cmpint(fd, >, -1); ioc = qio_channel_new_fd(fd, &error_abort); g_assert_cmpstr(object_get_typename(OBJECT(ioc)), ==, TYPE_QIO_CHANNEL_SOCKET); object_unref(OBJECT(ioc)); | 3,703 |
1 | e1000e_io_read(void *opaque, hwaddr addr, unsigned size) { E1000EState *s = opaque; uint32_t idx; uint64_t val; switch (addr) { case E1000_IOADDR: trace_e1000e_io_read_addr(s->ioaddr); return s->ioaddr; case E1000_IODATA: if (e1000e_io_get_reg_index(s, &idx)) { val = e1000e_core_read(&s->core, idx, sizeof(val)); trace_... | 3,704 |
1 | static void qemu_mutex_unlock_iothread(void) { qemu_mutex_unlock(&qemu_global_mutex); } | 3,705 |
1 | static int s302m_encode2_frame(AVCodecContext *avctx, AVPacket *avpkt, const AVFrame *frame, int *got_packet_ptr) { S302MEncContext *s = avctx->priv_data; const int buf_size = AES3_HEADER_LEN + (frame->nb_samples * avctx->channels * (avctx->bits_per_raw_sample + 4)) / 8; int ret, c, channels; uint8_t *o; PutBitContext ... | 3,706 |
1 | static int qcow_write(BlockDriverState *bs, int64_t sector_num, const uint8_t *buf, int nb_sectors) { Coroutine *co; AioContext *aio_context = bdrv_get_aio_context(bs); QcowWriteCo data = { .bs = bs, .sector_num = sector_num, .buf = buf, .nb_sectors = nb_sectors, .ret = -EINPROGRESS, }; co = qemu_coroutine_create(qcow_... | 3,707 |
0 | void dump_format(AVFormatContext *ic, int index, const char *url, int is_output) { int i; uint8_t *printed = av_mallocz(ic->nb_streams); if (ic->nb_streams && !printed) return; av_log(NULL, AV_LOG_INFO, "%s #%d, %s, %s '%s':\n", is_output ? "Output" : "Input", index, is_output ? ic->oformat->name : ic->iformat->name, i... | 3,708 |
0 | static void bastardized_rice_decompress(ALACContext *alac, int32_t *output_buffer, int output_size, int readsamplesize, int rice_history_mult) { int output_count; unsigned int history = alac->rice_initial_history; int sign_modifier = 0; for (output_count = 0; output_count < output_size; output_count++) { int32_t x; int... | 3,709 |
0 | void MPV_common_end(MpegEncContext *s) { int i; av_freep(&s->mb_type); av_freep(&s->p_mv_table); av_freep(&s->b_forw_mv_table); av_freep(&s->b_back_mv_table); av_freep(&s->b_bidir_forw_mv_table); av_freep(&s->b_bidir_back_mv_table); av_freep(&s->b_direct_mv_table); av_freep(&s->motion_val); av_freep(&s->dc_val[0]); av_... | 3,710 |
0 | static void mpeg_decode_sequence_extension(Mpeg1Context *s1) { MpegEncContext *s = &s1->mpeg_enc_ctx; int horiz_size_ext, vert_size_ext; int bit_rate_ext; skip_bits(&s->gb, 1); /* profile and level esc*/ s->avctx->profile = get_bits(&s->gb, 3); s->avctx->level = get_bits(&s->gb, 4); s->progressive_sequence = get_bits1(... | 3,711 |
1 | static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr, TCGArg *args, TCGOpDef *tcg_op_defs) { int i, nb_ops, op_index, nb_temps, nb_globals, nb_call_args; TCGOpcode op; const TCGOpDef *def; TCGArg *gen_args; TCGArg tmp; /* Array VALS has an element for each temp. If this temp holds a constant then it... | 3,712 |
1 | long do_rt_sigreturn(CPUPPCState *env) { struct target_rt_sigframe *rt_sf = NULL; target_ulong rt_sf_addr; rt_sf_addr = env->gpr[1] + SIGNAL_FRAMESIZE + 16; if (!lock_user_struct(VERIFY_READ, rt_sf, rt_sf_addr, 1)) goto sigsegv; if (do_setcontext(&rt_sf->uc, env, 1)) goto sigsegv; do_sigaltstack(rt_sf_addr + offsetof(s... | 3,713 |
1 | void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, qemu_irq irq, void* mem_opaque, void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)) { dp8393xState *s; int io; qemu_check_nic_model(nd, "dp83932"); s = qemu_mallocz(sizeof(dp8393xState)); s->mem_opaque = mem... | 3,715 |
1 | static void v9fs_readdir(void *opaque) { int32_t fid; V9fsFidState *fidp; ssize_t retval = 0; size_t offset = 7; int64_t initial_offset; int32_t count, max_count; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dqd", &fid, &initial_offset, &max_count); trace_v9fs_readdir(pdu->tag, pdu->id, fid... | 3,716 |
1 | static int IRQ_get_next(OpenPICState *opp, IRQ_queue_t *q) { if (q->next == -1) { /* XXX: optimize */ IRQ_check(opp, q); } return q->next; } | 3,717 |
1 | int ff_h264_queue_decode_slice(H264Context *h, const H2645NAL *nal) { H264SliceContext *sl = h->slice_ctx + h->nb_slice_ctx_queued; int first_slice = sl == h->slice_ctx && !h->current_slice; int ret; sl->gb = nal->gb; ret = h264_slice_header_parse(h, sl, nal); if (ret < 0) return ret; // discard redundant pictures if (... | 3,718 |
1 | static void end_frame(AVFilterLink *inlink) { GradFunContext *gf = inlink->dst->priv; AVFilterBufferRef *inpic = inlink->cur_buf; AVFilterLink *outlink = inlink->dst->outputs[0]; AVFilterBufferRef *outpic = outlink->out_buf; int p; for (p = 0; p < 4 && inpic->data[p]; p++) { int w = inlink->w; int h = inlink->h; int r ... | 3,719 |
1 | SCSIRequest *scsi_req_find(SCSIDevice *d, uint32_t tag) { SCSIRequest *req; QTAILQ_FOREACH(req, &d->requests, next) { if (req->tag == tag) { return req; } } return NULL; } | 3,720 |
1 | static void vbe_update_vgaregs(VGACommonState *s) { int h, shift_control; if (!vbe_enabled(s)) { /* vbe is turned off -- nothing to do */ return; } /* graphic mode + memory map 1 */ s->gr[VGA_GFX_MISC] = (s->gr[VGA_GFX_MISC] & ~0x0c) | 0x04 | VGA_GR06_GRAPHICS_MODE; s->cr[VGA_CRTC_MODE] |= 3; /* no CGA modes */ s->cr[V... | 3,723 |
1 | static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in, hwaddr dsm_mem_addr) { NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm); NvdimmFuncSetLabelDataIn *set_label_data; uint32_t status; set_label_data = (NvdimmFuncSetLabelDataIn *)in->arg3; le32_to_cpus(&set_label_data->offset); le32_to_cpus(&set_labe... | 3,724 |
1 | static int64_t load_kernel (CPUMIPSState *env) { int64_t kernel_entry, kernel_low, kernel_high; int index = 0; long initrd_size; ram_addr_t initrd_offset; uint32_t *prom_buf; long prom_size; if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, (uin... | 3,725 |
1 | static inline void decode_subband_slice_buffered(SnowContext *s, SubBand *b, slice_buffer * sb, int start_y, int h, int save_state[1]){ const int w= b->width; int y; const int qlog= av_clip(s->qlog + b->qlog, 0, QROOT*16); int qmul= ff_qexp[qlog&(QROOT-1)]<<(qlog>>QSHIFT); int qadd= (s->qbias*qmul)>>QBIAS_SHIFT; int ne... | 3,726 |
1 | static void coroutine_fn aio_read_response(void *opaque) { SheepdogObjRsp rsp; BDRVSheepdogState *s = opaque; int fd = s->fd; int ret; AIOReq *aio_req = NULL; SheepdogAIOCB *acb; uint64_t idx; /* read a header */ ret = qemu_co_recv(fd, &rsp, sizeof(rsp)); if (ret != sizeof(rsp)) { error_report("failed to get the header... | 3,727 |
1 | static void dec_rcsr(DisasContext *dc) { LOG_DIS("rcsr r%d, %d\n", dc->r2, dc->csr); switch (dc->csr) { case CSR_IE: tcg_gen_mov_tl(cpu_R[dc->r2], cpu_ie); break; case CSR_IM: gen_helper_rcsr_im(cpu_R[dc->r2], cpu_env); break; case CSR_IP: gen_helper_rcsr_ip(cpu_R[dc->r2], cpu_env); break; case CSR_CC: tcg_gen_mov_tl(c... | 3,728 |
1 | uint64_t helper_mulldo(CPUPPCState *env, uint64_t arg1, uint64_t arg2) { int64_t th; uint64_t tl; muls64(&tl, (uint64_t *)&th, arg1, arg2); /* If th != 0 && th != -1, then we had an overflow */ if (likely((uint64_t)(th + 1) <= 1)) { env->ov = 0; } else { env->so = env->ov = 1; } return (int64_t)tl; } | 3,729 |
1 | static void pc_init1(MemoryRegion *system_memory, MemoryRegion *system_io, ram_addr_t ram_size, const char *boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, int pci_enabled, int kvmclock_enabled) { int i; ram_addr_t below_4g_mem_size, above_4g_mem... | 3,730 |
1 | static void verify_irqchip_in_kernel(Error **errp) { if (kvm_irqchip_in_kernel()) { return; } error_setg(errp, "pci-assign requires KVM with in-kernel irqchip enabled"); } | 3,732 |
1 | static int ogg_write_header(AVFormatContext *s) { OGGContext *ogg = s->priv_data; OGGStreamContext *oggstream = NULL; int i, j; if (ogg->pref_size) av_log(s, AV_LOG_WARNING, "The pagesize option is deprecated\n"); for (i = 0; i < s->nb_streams; i++) { AVStream *st = s->streams[i]; unsigned serial_num = i; if (st->codec... | 3,733 |
1 | static int write_refcount_block(BlockDriverState *bs) { BDRVQcowState *s = bs->opaque; size_t size = s->cluster_size; if (s->refcount_block_cache_offset == 0) { return 0; } BLKDBG_EVENT(bs->file, BLKDBG_REFBLOCK_UPDATE); if (bdrv_pwrite(bs->file, s->refcount_block_cache_offset, s->refcount_block_cache, size) != size) {... | 3,734 |
1 | static int aiff_read_packet(AVFormatContext *s, AVPacket *pkt) { AVStream *st = s->streams[0]; AIFFInputContext *aiff = s->priv_data; int64_t max_size; int res, size; /* calculate size of remaining data */ max_size = aiff->data_end - avio_tell(s->pb); if (max_size <= 0) return AVERROR_EOF; /* Now for that packet */ if ... | 3,735 |
1 | static target_long monitor_get_ccr (const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu(); unsigned int u; int i; u = 0; for (i = 0; i < 8; i++) u |= env->crf[i] << (32 - (4 * i)); return u; } | 3,736 |
0 | static void yae_clear(ATempoContext *atempo) { atempo->size = 0; atempo->head = 0; atempo->tail = 0; atempo->drift = 0; atempo->nfrag = 0; atempo->state = YAE_LOAD_FRAGMENT; atempo->position[0] = 0; atempo->position[1] = 0; atempo->frag[0].position[0] = 0; atempo->frag[0].position[1] = 0; atempo->frag[0].nsamples = 0; ... | 3,737 |
0 | static int jpeg2000_decode_packet(Jpeg2000DecoderContext *s, Jpeg2000CodingStyle *codsty, Jpeg2000ResLevel *rlevel, int precno, int layno, uint8_t *expn, int numgbits) { int bandno, cblkno, ret, nb_code_blocks; if (!(ret = get_bits(s, 1))) { jpeg2000_flush(s); return 0; } else if (ret < 0) return ret; for (bandno = 0; ... | 3,739 |
0 | void ff_celp_lp_synthesis_filterf(float *out, const float *filter_coeffs, const float* in, int buffer_length, int filter_length) { int i,n; #if 0 // Unoptimized code path for improved readability for (n = 0; n < buffer_length; n++) { out[n] = in[n]; for (i = 1; i <= filter_length; i++) out[n] -= filter_coeffs[i-1] * ou... | 3,740 |
0 | static int decode_b_picture_header(VC9Context *v) { int pqindex; /* Prolog common to all frametypes should be done in caller */ if (v->profile == PROFILE_SIMPLE) { av_log(v, AV_LOG_ERROR, "Found a B frame while in Simple Profile!\n"); return FRAME_SKIPED; } v->bfraction = vc9_bfraction_lut[get_vlc2(&v->gb, vc9_bfractio... | 3,741 |
0 | static int sipr_decode_frame(AVCodecContext *avctx, void *datap, int *data_size, AVPacket *avpkt) { SiprContext *ctx = avctx->priv_data; const uint8_t *buf=avpkt->data; SiprParameters parm; const SiprModeParam *mode_par = &modes[ctx->mode]; GetBitContext gb; float *data = datap; int subframe_size = ctx->mode == MODE_16... | 3,742 |
0 | static void qapi_dealloc_end_list(Visitor *v) { QapiDeallocVisitor *qov = to_qov(v); void *obj = qapi_dealloc_pop(qov); assert(obj == NULL); /* should've been list head tracker with no payload */ } | 3,744 |
0 | static int oss_init_in (HWVoiceIn *hw, audsettings_t *as) { OSSVoiceIn *oss = (OSSVoiceIn *) hw; struct oss_params req, obt; int endianness; int err; int fd; audfmt_e effective_fmt; audsettings_t obt_as; oss->fd = -1; req.fmt = aud_to_ossfmt (as->fmt); req.freq = as->freq; req.nchannels = as->nchannels; req.fragsize = ... | 3,745 |
0 | static void gen_lswi(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2; int nb = NB(ctx->opcode); int start = rD(ctx->opcode); int ra = rA(ctx->opcode); int nr; if (nb == 0) nb = 32; nr = nb / 4; if (unlikely(((start + nr) > 32 && start <= ra && (start + nr - 32) > ra) || ((start + nr) <= 32 && start <= ra && (start + nr) ... | 3,746 |
0 | static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) { struct vmsvga_state_s *s = opaque; switch (s->index) { case SVGA_REG_ID: if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) s->svgaid = value; break; case SVGA_REG_ENABLE: s->enable = value; s->config &= !!value; s->width ... | 3,749 |
0 | static int coroutine_fn backup_do_cow(BackupBlockJob *job, int64_t sector_num, int nb_sectors, bool *error_is_read, bool is_write_notifier) { BlockBackend *blk = job->common.blk; CowRequest cow_request; struct iovec iov; QEMUIOVector bounce_qiov; void *bounce_buffer = NULL; int ret = 0; int64_t sectors_per_cluster = cl... | 3,750 |
0 | static inline int memory_access_size(MemoryRegion *mr, int l, hwaddr addr) { if (l >= 4 && (((addr & 3) == 0 || mr->ops->impl.unaligned))) { return 4; } if (l >= 2 && (((addr & 1) == 0) || mr->ops->impl.unaligned)) { return 2; } return 1; } | 3,751 |
0 | static void bonito_spciconf_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); uint32_t pciaddr; uint16_t status; DPRINTF("bonito_spciconf_writew "TARGET_FMT_plx" val %x\n", addr, val); assert((addr & 0... | 3,752 |
0 | static void i440fx_pcihost_get_pci_hole_start(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { I440FXState *s = I440FX_PCI_HOST_BRIDGE(obj); uint32_t value = s->pci_hole.begin; visit_type_uint32(v, name, &value, errp); } | 3,753 |
0 | static void numa_stat_memory_devices(uint64_t node_mem[]) { MemoryDeviceInfoList *info_list = NULL; MemoryDeviceInfoList **prev = &info_list; MemoryDeviceInfoList *info; qmp_pc_dimm_device_list(qdev_get_machine(), &prev); for (info = info_list; info; info = info->next) { MemoryDeviceInfo *value = info->value; if (value... | 3,754 |
0 | static void blkverify_refresh_filename(BlockDriverState *bs) { BDRVBlkverifyState *s = bs->opaque; /* bs->file->bs has already been refreshed */ bdrv_refresh_filename(s->test_file->bs); if (bs->file->bs->full_open_options && s->test_file->bs->full_open_options) { QDict *opts = qdict_new(); qdict_put_obj(opts, "driver",... | 3,756 |
0 | static int ehci_init_transfer(EHCIQueue *q) { uint32_t cpage, offset, bytes, plen; target_phys_addr_t page; cpage = get_field(q->qh.token, QTD_TOKEN_CPAGE); bytes = get_field(q->qh.token, QTD_TOKEN_TBYTES); offset = q->qh.bufptr[0] & ~QTD_BUFPTR_MASK; qemu_sglist_init(&q->sgl, 5); while (bytes > 0) { if (cpage > 4) { f... | 3,758 |
0 | static void allocate_buffers(FLACContext *s){ int i; assert(s->max_blocksize); if(s->max_framesize == 0 && s->max_blocksize){ s->max_framesize= (s->channels * s->bps * s->max_blocksize + 7)/ 8; //FIXME header overhead } for (i = 0; i < s->channels; i++) { s->decoded[i] = av_realloc(s->decoded[i], sizeof(int32_t)*s->max... | 3,759 |
0 | void ff_vp3_idct_add_c(uint8_t *dest/*align 8*/, int line_size, DCTELEM *block/*align 16*/){ idct(dest, line_size, block, 2); } | 3,760 |
0 | static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { CPUState *env, *envs[MAX_CPUS]; unsigned int i; void *iommu, *espdma, *ledma, *main_es... | 3,762 |
0 | static void mptsas_update_interrupt(MPTSASState *s) { PCIDevice *pci = (PCIDevice *) s; uint32_t state = s->intr_status & ~(s->intr_mask | MPI_HIS_IOP_DOORBELL_STATUS); if (s->msi_in_use && msi_enabled(pci)) { if (state) { trace_mptsas_irq_msi(s); msi_notify(pci, 0); } } trace_mptsas_irq_intx(s, !!state); pci_set_irq(p... | 3,764 |
0 | static int find_pte64(CPUPPCState *env, struct mmu_ctx_hash64 *ctx, target_ulong eaddr, int h, int rwx, int target_page_bits) { hwaddr pteg_off; target_ulong pte0, pte1; int i, good = -1; int ret; ret = -1; /* No entry found */ pteg_off = (ctx->hash[h] * HASH_PTEG_SIZE_64) & env->htab_mask; for (i = 0; i < HPTES_PER_GR... | 3,765 |
0 | static int ds1338_init(I2CSlave *i2c) { return 0; } | 3,767 |
0 | static void qbus_print(Monitor *mon, BusState *bus, int indent) { struct DeviceState *dev; qdev_printf("bus: %s\n", bus->name); indent += 2; qdev_printf("type %s\n", bus_type_names[bus->type]); LIST_FOREACH(dev, &bus->children, sibling) { qdev_print(mon, dev, indent); } } | 3,768 |
0 | static void mvc_fast_memset(CPUS390XState *env, uint32_t l, uint64_t dest, uint8_t byte) { S390CPU *cpu = s390_env_get_cpu(env); hwaddr dest_phys; hwaddr len = l; void *dest_p; uint64_t asc = env->psw.mask & PSW_MASK_ASC; int flags; if (mmu_translate(env, dest, 1, asc, &dest_phys, &flags)) { cpu_stb_data(env, dest, byt... | 3,769 |
0 | static ssize_t nbd_receive_request(QIOChannel *ioc, struct nbd_request *request) { uint8_t buf[NBD_REQUEST_SIZE]; uint32_t magic; ssize_t ret; ret = read_sync(ioc, buf, sizeof(buf)); if (ret < 0) { return ret; } if (ret != sizeof(buf)) { LOG("read failed"); return -EINVAL; } /* Request [ 0 .. 3] magic (NBD_REQUEST_MAGI... | 3,772 |
0 | BlockDriverAIOCB *laio_submit(BlockDriverState *bs, void *aio_ctx, int fd, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque, int type) { struct qemu_laio_state *s = aio_ctx; struct qemu_laiocb *laiocb; struct iocb *iocbs; off_t offset = sector_num * 512; laiocb = qemu_... | 3,773 |
0 | void helper_cpuid(void) { if (EAX == 0) { EAX = 1; /* max EAX index supported */ EBX = 0x756e6547; ECX = 0x6c65746e; EDX = 0x49656e69; } else { /* EAX = 1 info */ EAX = 0x52b; EBX = 0; ECX = 0; EDX = CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CX8; } } | 3,775 |
0 | void ff_vc1_pred_mv_intfr(VC1Context *v, int n, int dmv_x, int dmv_y, int mvn, int r_x, int r_y, uint8_t* is_intra, int dir) { MpegEncContext *s = &v->s; int xy, wrap, off = 0; int A[2], B[2], C[2]; int px, py; int a_valid = 0, b_valid = 0, c_valid = 0; int field_a, field_b, field_c; // 0: same, 1: opposit int total_va... | 3,776 |
0 | static inline void gen_stack_update(DisasContext *s, int addend) { #ifdef TARGET_X86_64 if (CODE64(s)) { gen_op_addq_ESP_im(addend); } else #endif if (s->ss32) { gen_op_addl_ESP_im(addend); } else { gen_op_addw_ESP_im(addend); } } | 3,777 |
0 | void ide_exec_cmd(IDEBus *bus, uint32_t val) { uint16_t *identify_data; IDEState *s; int n; #if defined(DEBUG_IDE) printf("ide: CMD=%02x\n", val); #endif s = idebus_active_if(bus); /* ignore commands to non existent slave */ if (s != bus->ifs && !s->bs) return; /* Only DEVICE RESET is allowed while BSY or/and DRQ are s... | 3,779 |
0 | void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, DeviceState *dev, Error **errp) { PCIDevice *pdev = PCI_DEVICE(dev); int slot = PCI_SLOT(pdev->devfn); int bsel = acpi_pcihp_get_bsel(pdev->bus); if (bsel < 0) { error_setg(errp, "Unsupported bus. Bus doesn't have property '" ACPI_PCIHP_PROP... | 3,780 |
0 | void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) { GArray *table_offsets; unsigned dsdt, rsdt; VirtAcpiCpuInfo cpuinfo; GArray *tables_blob = tables->table_data; virt_acpi_get_cpu_info(&cpuinfo); table_offsets = g_array_new(false, true /* clear */, sizeof(uint32_t)); bios_linker_loader_alloc(tab... | 3,781 |
0 | static void code_gen_alloc(unsigned long tb_size) { #ifdef USE_STATIC_CODE_GEN_BUFFER code_gen_buffer = static_code_gen_buffer; code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE; map_exec(code_gen_buffer, code_gen_buffer_size); #else code_gen_buffer_size = tb_size; if (code_gen_buffer_size == 0) { #if defined(CONFIG_... | 3,782 |
0 | static void spapr_cpu_core_register_types(void) { const SPAPRCoreInfo *info = spapr_cores; type_register_static(&spapr_cpu_core_type_info); while (info->name) { spapr_cpu_core_register(info); info++; } } | 3,783 |
0 | void address_space_rw(AddressSpace *as, target_phys_addr_t addr, uint8_t *buf, int len, bool is_write) { AddressSpaceDispatch *d = as->dispatch; int l; uint8_t *ptr; uint32_t val; target_phys_addr_t page; MemoryRegionSection *section; while (len > 0) { page = addr & TARGET_PAGE_MASK; l = (page + TARGET_PAGE_SIZE) - add... | 3,784 |
0 | float32 int64_to_float32( int64 a STATUS_PARAM ) { flag zSign; uint64 absA; int8 shiftCount; if ( a == 0 ) return 0; zSign = ( a < 0 ); absA = zSign ? - a : a; shiftCount = countLeadingZeros64( absA ) - 40; if ( 0 <= shiftCount ) { return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount ); } else { shiftCount +=... | 3,785 |
0 | void clear_blocks_dcbz32_ppc(DCTELEM *blocks) { POWERPC_TBL_DECLARE(powerpc_clear_blocks_dcbz32, 1); register int misal = ((unsigned long)blocks & 0x00000010); register int i = 0; POWERPC_TBL_START_COUNT(powerpc_clear_blocks_dcbz32, 1); #if 1 if (misal) { ((unsigned long*)blocks)[0] = 0L; ((unsigned long*)blocks)[1] = ... | 3,787 |
0 | static uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri) { /* Raw read of a coprocessor register (as needed for migration, etc). */ if (ri->type & ARM_CP_CONST) { return ri->resetvalue; } else if (ri->raw_readfn) { return ri->raw_readfn(env, ri); } else if (ri->readfn) { return ri->readfn(env, ri); } e... | 3,788 |
0 | static void exec_accept_incoming_migration(void *opaque) { QEMUFile *f = opaque; int ret; ret = qemu_loadvm_state(f); if (ret < 0) { fprintf(stderr, "load of migration failed\n"); goto err; } qemu_announce_self(); DPRINTF("successfully loaded vm state\n"); /* we've successfully migrated, close the fd */ qemu_set_fd_han... | 3,790 |
0 | static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum mainstone_model_e model, int arm_id) { uint32_t sector_len = 256 * 1024; target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, M... | 3,791 |
0 | static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr, bool msix, unsigned req_num) { unsigned i; MSIMessage msg = { .address = addr, .data = 0 }; if (!msix) { msi_set_message(pdev, msg); trace_spapr_pci_msi_setup(pdev->name, 0, msg.address); return; } for (i = 0; i < req_num; ++i) { msg.address = addr | (i << 2); ... | 3,792 |
0 | static SocketAddressLegacy *nbd_build_socket_address(const char *sockpath, const char *bindto, const char *port) { SocketAddressLegacy *saddr; saddr = g_new0(SocketAddressLegacy, 1); if (sockpath) { saddr->type = SOCKET_ADDRESS_LEGACY_KIND_UNIX; saddr->u.q_unix.data = g_new0(UnixSocketAddress, 1); saddr->u.q_unix.data-... | 3,793 |
0 | static uint16_t blizzard_reg_read(void *opaque, uint8_t reg) { BlizzardState *s = (BlizzardState *) opaque; switch (reg) { case 0x00: /* Revision Code */ return 0xa5; case 0x02: /* Configuration Readback */ return 0x83; /* Macrovision OK, CNF[2:0] = 3 */ case 0x04: /* PLL M-Divider */ return (s->pll - 1) | (1 << 7); ca... | 3,794 |
0 | void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label) { if (cond == TCG_COND_ALWAYS) { tcg_gen_br(label); } else if (cond != TCG_COND_NEVER) { tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label); } } | 3,796 |
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