repo_id
stringlengths
5
115
size
int64
590
5.01M
file_path
stringlengths
4
212
content
stringlengths
590
5.01M
stsp/binutils-ia16
1,996
gas/testsuite/gas/i386/avx512bw-opts.s
# Check 32bit AVX512BW swap instructions .allow_index_reg .text _start: vmovdqu8 %zmm5, %zmm6 # AVX512BW vmovdqu8.s %zmm5, %zmm6 # AVX512BW vmovdqu8 %zmm5, %zmm6{%k7} # AVX512BW vmovdqu8.s %zmm5, %zmm6{%k7} # AVX512BW vmovdqu8 %zmm5, %zmm6{%k7}{z} # AVX512BW vmovdqu8.s %zmm5, %zmm6{%k7}{z} # AVX512BW vm...
stsp/binutils-ia16
49,494
gas/testsuite/gas/i386/avx512bw-wig.s
# Check 32bit AVX512BW WIG instructions .allow_index_reg .text _start: vpabsb %zmm5, %zmm6 # AVX512BW vpabsb %zmm5, %zmm6{%k7} # AVX512BW vpabsb %zmm5, %zmm6{%k7}{z} # AVX512BW vpabsb (%ecx), %zmm6 # AVX512BW vpabsb -123456(%esp,%esi,8), %zmm6 # AVX512BW vpabsb 8128(%edx), %zmm6 # AVX512BW Disp8 vpabsb ...
stsp/binutils-ia16
12,268
gas/testsuite/gas/i386/avx512cd_vl.s
# Check 32bit AVX512{CD,VL} instructions .allow_index_reg .text _start: vpconflictd %xmm5, %xmm6{%k7} # AVX512{CD,VL} vpconflictd %xmm5, %xmm6{%k7}{z} # AVX512{CD,VL} vpconflictd (%ecx), %xmm6{%k7} # AVX512{CD,VL} vpconflictd -123456(%esp,%esi,8), %xmm6{%k7} # AVX512{CD,VL} vpconflictd (%eax){1to4}, %xmm6{%...
stsp/binutils-ia16
4,848
gas/testsuite/gas/i386/opts.s
# Check instructions with encoding options .allow_index_reg .text _start: # Tests for op reg, reg add %dl,%cl add.s %dl,%cl add %dx,%cx add.s %dx,%cx add %edx,%ecx add.s %edx,%ecx addb %dl,%cl addb.s %dl,%cl addw %dx,%cx addw.s %dx,%cx addl %edx,%ecx addl.s %edx,%ecx adc %dl,%cl adc.s %dl,%cl adc %dx...
stsp/binutils-ia16
1,926
gas/testsuite/gas/i386/avx512vl_vaes-wig.s
# Check 32bit AVX512VL,VAES WIG instructions .allow_index_reg .text _start: vaesdec %xmm4, %xmm5, %xmm6 # AVX512VL,VAES vaesdec -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES vaesdec %ymm4, %ymm5, %ymm6 # AVX512VL,VAES vaesdec -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES vaesdeclast %xmm4, %xmm5,...
stsp/binutils-ia16
3,251
gas/testsuite/gas/i386/noreg32.s
.macro pfx insn:vararg .ifdef DATA16 data16 \insn .else \insn .endif .endm .text noreg: pfx adc $1, (%eax) pfx adc $0x89, (%eax) pfx adc $0x1234, (%eax) pfx adc $0x12345678, (%eax) pfx add $1, (%eax) pfx add $0x89, (%eax) pfx add $0x1234, (%eax) pfx add $0x12345678, (%eax) pfx and $1, (%eax) ...
stsp/binutils-ia16
11,624
gas/testsuite/gas/i386/avx512f_vl-opts.s
# Check 32bit AVX512{F,VL} swap instructions .allow_index_reg .text _start: vmovapd %xmm5, %xmm6{%k7} # AVX512{F,VL} vmovapd.s %xmm5, %xmm6{%k7} # AVX512{F,VL} vmovapd %xmm5, %xmm6{%k7}{z} # AVX512{F,VL} vmovapd.s %xmm5, %xmm6{%k7}{z} # AVX512{F,VL} vmovapd %xmm5, %xmm6{%k7} # AVX512{F,VL} vmovapd.s %xmm5...
stsp/binutils-ia16
2,092
gas/testsuite/gas/i386/x86-64-avx512bw-opts.s
# Check 64bit AVX512BW swap instructions .allow_index_reg .text _start: vmovdqu8 %zmm29, %zmm30 # AVX512BW vmovdqu8.s %zmm29, %zmm30 # AVX512BW vmovdqu8 %zmm29, %zmm30{%k7} # AVX512BW vmovdqu8.s %zmm29, %zmm30{%k7} # AVX512BW vmovdqu8 %zmm29, %zmm30{%k7}{z} # AVX512BW vmovdqu8.s %zmm29, %zmm30{%k7}{z} # ...
stsp/binutils-ia16
4,259
gas/testsuite/gas/i386/optimize-1.s
# Check instructions with optimized encoding .allow_index_reg .text _start: vandnpd %zmm1, %zmm1, %zmm5{%k7} vandnpd %ymm1, %ymm1, %ymm5 {%k7} {z} vandnpd %zmm1, %zmm1, %zmm5 vandnpd %ymm1, %ymm1, %ymm5 vandnps %zmm1, %zmm1, %zmm5{%k7} vandnps %ymm1, %ymm1, %ymm5{z}{%k7} vandnps %zmm1, %zmm1, %zmm5 vandnp...
stsp/binutils-ia16
1,246
gas/testsuite/gas/i386/x86-64-lfence-load.s
.text _start: vldmxcsr (%rbp) lgdt (%rbp) vmptrld (%rbp) vmclear (%rbp) invpcid (%rbp), %rdx invlpg (%eax) clflush (%rbp) clflushopt (%rbp) clwb (%rbp) cldemote (%rbp) bndmk (%rbp), %bnd1 bndcl (%rbp), %bnd1 bndcu (%rbp), %bnd1 bndcn (%rbp), %bnd1 bndstx %bnd1, (%rbp) bndldx (%rbp), %bnd1 prefetcht0 (...
stsp/binutils-ia16
1,355
gas/testsuite/gas/i386/lea64.s
.text start: lea %fs:(%rax,%rcx), %eax gs lea (%rax,%rcx), %eax .allow_index_reg lea 1(%rax), %ecx lea sym(%rax), %ecx lea sym(,%riz), %ecx lea (%rax,%rax), %eax lea (,%rax,2), %eax lea (%rip), %eax lea (,%riz), %eax lea (%rax), %rax lea (%rax), %rcx lea 1-1(%rax), %rcx lea %gs:(%rax), %rcx lea (%rs...
stsp/binutils-ia16
3,085
gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s
# Check 64bit AVX512VL,VAES instructions .allow_index_reg .text _start: vaesdec %xmm28, %xmm29, %xmm30 # AVX512VL,VAES vaesdec 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES vaesdec 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8 vaesdec %ymm28, %ymm29, %ymm30 # AVX512VL,VAES vaesdec (%rcx), %ymm29, %y...
stsp/binutils-ia16
1,256
gas/testsuite/gas/i386/sse-noavx.s
# Check SSE instructions without AVX equivalent .text _start: crc32 %cl,%ebx cvtpd2pi %xmm3,%mm2 cvtpi2pd %mm3,%xmm2 cvtpi2ps %mm3,%xmm2 cvtps2pi %xmm7,%mm6 cvttpd2pi %xmm4,%mm3 cvttps2pi %xmm4,%mm3 fisttps (%eax) fisttpl (%eax) fisttpll (%eax) lfence maskmovq %mm7,%mm0 mfence monitor movdq2q...
stsp/binutils-ia16
25,770
gas/testsuite/gas/i386/x86-64-avx512f-rcig.s
# Check 64bit AVX512F-RCIG instructions .allow_index_reg .text _start: vcmpeqpd {sae}, %zmm29, %zmm30, %k5 # AVX512F vcmpeq_oqpd {sae}, %zmm29, %zmm30, %k5 # AVX512F vcmpeq_ospd {sae}, %zmm29, %zmm30, %k5 # AVX512F vcmpeq_uqpd {sae}, %zmm29, %zmm30, %k5 # AVX512F vcmpeq_uspd {sae}, %zmm29, %zmm30, %k5 # AV...
stsp/binutils-ia16
115,231
gas/testsuite/gas/i386/avx512_fp16_vl.s
# Check 32bit AVX512-FP16,AVX512VL instructions .allow_index_reg .text _start: vaddph %ymm4, %ymm5, %ymm6 #AVX512-FP16,AVX512VL vaddph %ymm4, %ymm5, %ymm6{%k7}{z} #AVX512-FP16,AVX512VL MASK_ENABLING ZEROCTL vaddph %xmm4, %xmm5, %xmm6 #AVX512-FP16,AVX512VL vaddph %xmm4, %xmm5, %xmm6{%k7}{z} #AVX512-FP16,AVX51...
stsp/binutils-ia16
1,924
gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig.s
# Check 32bit AVX512VL,VPCLMULQDQ WIG instructions .allow_index_reg .text _start: vpclmulqdq $0xab, %xmm4, %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ vpclmulqdq $123, -123456(%esp,%esi,8), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ vpclmulqdq $123, 2032(%edx), %xmm1, %xmm1 # AVX512VL,VPCLMULQDQ Disp8 vpclmulqdq $0xab, %ymm2,...
stsp/binutils-ia16
6,983
gas/testsuite/gas/i386/x86-64-simd.s
.text _start: addsubps 0x12345678(%rip),%xmm1 comisd 0x12345678(%rip),%xmm1 comiss 0x12345678(%rip),%xmm1 cvtdq2pd 0x12345678(%rip),%xmm1 cvtpd2dq 0x12345678(%rip),%xmm1 cvtps2pd 0x12345678(%rip),%xmm1 cvttps2dq 0x12345678(%rip),%xmm1 cvtsi2ss %eax, %xmm1 cvtsi2sd %eax, %xmm1 cvtsi2ssl %eax, %xmm1 cvtsi2sdl...
stsp/binutils-ia16
4,166
gas/testsuite/gas/i386/avx-gather.s
# Check 32bit AVX gather instructions .text _start: vgatherdpd %xmm2, (%ebp, %xmm7, 2),%xmm1 vgatherqpd %xmm2, (%ebp, %xmm7, 2),%xmm1 vgatherdpd %ymm2, (%ebp, %xmm7, 2),%ymm1 vgatherqpd %ymm2, (%ebp, %ymm7, 2),%ymm1 vgatherdpd %ymm5,0x8(,%xmm4,1),%ymm6 vgatherdpd %ymm5,-0x8(,%xmm4,1),%ymm6 vgatherdpd %ymm5,(,...
stsp/binutils-ia16
5,300
gas/testsuite/gas/i386/simd.s
.text _start: addsubps 0x12345678,%xmm1 comisd 0x12345678,%xmm1 comiss 0x12345678,%xmm1 cvtdq2pd 0x12345678,%xmm1 cvtpd2dq 0x12345678,%xmm1 cvtps2pd 0x12345678,%xmm1 cvttps2dq 0x12345678,%xmm1 haddps 0x12345678,%xmm1 movdqu %xmm1,0x12345678 movdqu 0x12345678,%xmm1 movhpd %xmm1,0x12345678 movhpd 0x12345678,...
stsp/binutils-ia16
3,040
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
# Check 64bit AVX512VL,VAES WIG instructions .allow_index_reg .text _start: vaesdec %xmm28, %xmm29, %xmm30 # AVX512VL,VAES vaesdec 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES vaesdec 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8 vaesdec %ymm28, %ymm29, %ymm30 # AVX512VL,VAES vaesdec 0x123(%rax,%r1...
stsp/binutils-ia16
2,184
gas/testsuite/gas/i386/dw2-compress-2.s
.file "dw2-compress-2.c" .section .debug_abbrev,"",@progbits .Ldebug_abbrev0: .section .debug_info,"",@progbits .Ldebug_info0: .section .debug_line,"",@progbits .Ldebug_line0: .text .Ltext0: .cfi_sections .debug_frame .p2align 4,,15 .globl foo2 .type foo2, @function foo2: .LFB1: .file 1 "dw2-compress-2.c" .lo...
stsp/binutils-ia16
1,739
gas/testsuite/gas/avr/gccisr-01.s
.text ;;; Use SREG __start1: set __vec1_start: __gcc_isr 1 foo = __gcc_isr.n_pushed cpi r16,1 __gcc_isr 2 __gcc_isr 0,r0 clt __vec1_end: __data1: ldi r16, foo - 2 .word (__vec1_end - __vec1_start) / 2 ;;; Nothing used. __start2: set __vec2_start: __gcc_isr 1 foo = _...
stsp/binutils-ia16
67,570
gas/testsuite/gas/h8300/t03_add.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;arith_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: add.b #0x12:8,r1h ;8112 add.b #0x12:8,@er1 ;7d108012 add.b #0x12:8,@(0x3:2,er1)...
stsp/binutils-ia16
64,328
gas/testsuite/gas/h8300/t05_cmp.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;arith_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: cmp.b @er3,@er1 ;7c350120 cmp.b @er3,@(3:2,er1) ;7c353120 cmp.b @er3,@-er1 ...
stsp/binutils-ia16
4,982
gas/testsuite/gas/h8300/t06_ari2.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;arith_2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: addx.b #0x12:8,r1h ;9112 addx.b #0x12:8,@er1 ;7d109012 addx.b #0x12:8,@er1- ;01766c189012 addx.b r3h,r1...
stsp/binutils-ia16
66,787
gas/testsuite/gas/h8300/t01_mov.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;mov ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: mov.b #0x12:8,r3h ;f312 mov.b #0x12:8,@er3 ;017d0312 mov.b #0x12:8,@(0x1:2,er3) ;017d1312 ...
stsp/binutils-ia16
16,005
gas/testsuite/gas/h8300/t02_mova.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;mova ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: mova/b.c @(0x1234:16,r3l.b),er1 ;7A891234 mova/b.c @(0x1234:16,r3.w),er1 ;7A991234 mova/w.c @(0x1234:16,r3l.b),er1 ...
stsp/binutils-ia16
67,572
gas/testsuite/gas/h8300/t04_sub.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;arith_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: sub.b #0x12:8,@er1 ;7d10a112 sub.b #0x12:8,@(0x3:2,er1) ;01776818a112 sub.b #0x12:8,@er1+ ...
stsp/binutils-ia16
5,816
gas/testsuite/gas/h8300/t13_otr.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;others ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text .org 0x12 lab_12: .org 0x1234 .global _start _start: bra 0x12+.+2 ;4012 brn 0x12+.+2 ;4112 bhi 0x12+.+...
stsp/binutils-ia16
7,871
gas/testsuite/gas/h8300/t07_ari3.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;arith_3 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: neg.b r1h ;1781 neg.b @er1 ;7d101780 neg.b @(0x3:2,er1) ;017768181780 neg.b @er1+ ...
stsp/binutils-ia16
65,186
gas/testsuite/gas/h8300/t10_and.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;log_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: and.b #0x12:8,r1h ;e112 and.b #0x12:8,@er1 ;7d10e012 and.b #0x12:8,@(0x3:2,er1) ;01776818e012 and.b #0x12:8...
stsp/binutils-ia16
2,177
gas/testsuite/gas/h8300/h8sx_mov_imm.s
.h8300sx mov.b #foo,r2l mov.b #.L1,r2l mov.b #bar,r2l mov.b #foo,@er2 mov.b #.L1,@er2 mov.b #bar,@er2 mov.b #foo,@-er2 mov.b #.L1,@er2+ mov.b #bar,@er2- mov.b #foo,@(2,er2) mov.b #.L1,@(2,er2) mov.b #bar,@(2,er2) mov.b #foo,@(16,er2) mov.b #.L1,@(16,er2) mov.b #bar,@(16,er2) mov.b #foo,@(16,r2l.b) mov...
stsp/binutils-ia16
65,181
gas/testsuite/gas/h8300/t09_xor.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;log_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: xor.b #0x12:8,r1h ;d112 xor.b #0x12:8,@er1 ;7d10d012 xor.b #0x12:8,@(0x3:2,er1) ;01776818d012 xor.b #0x12:8,...
stsp/binutils-ia16
54,653
gas/testsuite/gas/h8300/t11_logs.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;log_sft ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: not.b r1h ;1701 not.b @er1 ;7d101700 not.b @(0x3:2,er1) ;017768181700 not.b @er1+ ...
stsp/binutils-ia16
64,416
gas/testsuite/gas/h8300/t08_or.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;log_1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: or.b #0x12:8,r1h ;c112 or.b #0x12:8,@er1 ;7d10c012 or.b #0x12:8,@(0x3:2,er1) ;01776818c012 or.b #0x12:8,@...
stsp/binutils-ia16
6,896
gas/testsuite/gas/h8300/t12_bit.s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;bit ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .h8300sx .text _start: bset #0x7,r1h ;7071 bset #0x7,@er1 ;7d107070 bset #0x7,@0xffffff12:8 ;7f127070 bset #0x7,@0x123...
stsp/binutils-ia16
10,694
gas/testsuite/gas/or1k/allinsn.s
.data localdata: .word 42 .text localtext: l.nop .data .global globaldata globaldata: .word 43 .text .global globaltext globaltext: l.nop l_j: l.j -4 l.j 4 l.j 0 l.j localtext l.j localdata l.j globaltext l.j globaldata l.j l_j l.j l_jal .text l_jal: l.jal -4 l.jal 4 l.jal 0 l.jal localtext l....
stsp/binutils-ia16
1,449
gas/testsuite/gas/or1k/reloc-1.s
l.movhi r3,hi(x) l.ori r3,r4,hi(x) l.addi r3,r4,hi(x) l.lwz r3,hi(x)(r4) l.movhi r3,lo(x) l.ori r3,r4,lo(x) l.addi r3,r4,lo(x) l.lwz r3,lo(x)(r4) l.lws r3,lo(x)(r4) l.lhz r3,lo(x)(r4) l.lhs r3,lo(x)(r4) l.lbz r3,lo(x)(r4) l.lbs r3,lo(x)(r4) l.lwa r3,lo(x)(r4) l.sw lo(x)(r4),r3 l.sh lo(x)(r4),r3 l.sb l...
stsp/binutils-ia16
1,392
gas/testsuite/gas/riscv/fp-zfh-insns.s
flh fa0, 0(a1) fsh fa0, 0(a1) fmv.h fa0, fa1 fneg.h fa0, fa1 fabs.h fa0, fa1 fsgnj.h fa0, fa1, fa2 fsgnjn.h fa0, fa1, fa2 fsgnjx.h fa0, fa1, fa2 fadd.h fa0, fa1, fa2 fadd.h fa0, fa1, fa2, rne fsub.h fa0, fa1, fa2 fsub.h fa0, fa1, fa2, rne fmul.h fa0, fa1, fa2 fmul.h fa0, fa1, fa2, rne fdiv....
stsp/binutils-ia16
2,238
gas/testsuite/gas/riscv/a-ext.s
target: lr.w a0, 0(a0) lr.w a0, (a0) lr.w.aq a0, 0(a0) lr.w.aq a0, (a0) lr.w.rl a0, 0(a0) lr.w.rl a0, (a0) lr.w.aqrl a0, 0(a0) lr.w.aqrl a0, (a0) sc.w a0, a0, 0(a0) sc.w a0, a0, (a0) sc.w.aq a0, a0, 0(a0) sc.w.aq a0, a0, (a0) sc.w.rl a0, a0, 0(a0) sc.w.rl a0, a0, (a0) sc.w.aqrl a0, a0, 0(a0) sc.w.aqrl a...
stsp/binutils-ia16
4,468
gas/testsuite/gas/riscv/a-ext-64.s
target: lr.w a0, 0(a0) lr.w a0, (a0) lr.w.aq a0, 0(a0) lr.w.aq a0, (a0) lr.w.rl a0, 0(a0) lr.w.rl a0, (a0) lr.w.aqrl a0, 0(a0) lr.w.aqrl a0, (a0) sc.w a0, a0, 0(a0) sc.w a0, a0, (a0) sc.w.aq a0, a0, 0(a0) sc.w.aq a0, a0, (a0) sc.w.rl a0, a0, 0(a0) sc.w.rl a0, a0, (a0) sc.w.aqrl a0, a0, 0(a0) sc.w.aqrl a...
stsp/binutils-ia16
10,038
gas/testsuite/gas/riscv/csr.s
.macro csr val csrr a0,\val csrw \val, a1 .endm # Supported privileged specs, 1.9.1, 1.10, 1.11 and 1.12. # User Counter/Timers csr cycle csr time csr instret csr hpmcounter3 csr hpmcounter4 csr hpmcounter5 csr hpmcounter6 csr hpmcounter7 csr hpmcounter8 csr hpmcounter9 csr hpmcounter10 csr hpmcount...
stsp/binutils-ia16
1,200
gas/testsuite/gas/riscv/zhinx.s
target: fadd.h a0, a1, a2 fadd.h a0, a1, a2, rne fsub.h a0, a1, a2 fsub.h a0, a1, a2, rne fmul.h a0, a1, a2 fmul.h a0, a1, a2, rne fdiv.h a0, a1, a2 fdiv.h a0, a1, a2, rne fsqrt.h a0, a1 fsqrt.h a0, a1, rne fmin.h a0, a1, a2 fmax.h a0, a1, a2 fmadd.h a0, a1, a2, a3 fmadd.h a0, a1, a2, a3, rn...
stsp/binutils-ia16
1,763
gas/testsuite/gas/riscv/csr-insns-read-only.s
# CSRRW and CSRRWI always write CSR # CSRRS, CSRRC, CSRRSI and CSRRCI write CSR when rs isn't zero. # csrrw rd, csr, rs csrrw a0, ustatus, a1 csrrw a0, cycle, a1 csrrw a0, cycle, zero csrrw zero, cycle, a1 csrrw zero, cycle, zero fscsr a0, a1 fsrm a0, a1 fsflags a0, a1 # csrrw zero, csr, rs csrw ustatus, a1 ...
stsp/binutils-ia16
1,121
gas/testsuite/gas/riscv/b-ext-64.s
target: clz a0, a0 ctz a0, a0 cpop a0, a0 min a0, a1, a2 minu a0, a1, a2 max a0, a1, a2 maxu a0, a1, a2 sext.b a0, a0 sext.h a0, a0 zext.h a0, a0 andn a0, a1, a2 orn a0, a1, a2 xnor a0, a1, a2 rol a0, a1, a2 ror a0, a1, a2 ror a0, a1, 2 rori a0, a1, 2 rev8 a0, a0 orc.b a0, a0 sh1add a0, a1, a2 sh2a...
stsp/binutils-ia16
12,677
gas/testsuite/gas/riscv/csr-dw-regnums.s
# Check that CFI directives can accept all of the CSR names (including # aliases). The results for this test also ensures that the DWARF # register numbers for the CSRs shouldn't change. .text .global _start _start: .cfi_startproc nop # user counters/timers .cfi_offset cycle, 12288 .cfi_offset time, 12292 .cf...
stsp/binutils-ia16
44,112
gas/testsuite/gas/riscv/vector-insns.s
vsetvl a0, a1, a2 vsetvli a0, a1, 0 vsetvli a0, a1, 0x7ff vsetvli a0, a1, 0x4 # unrecognized vlmul vsetvli a0, a1, 0x20 # unrecognized vsew vsetvli a0, a1, e8, m2 vsetvli a0, a1, e16, m4, ta vsetvli a0, a1, e32, mf4, mu vsetvli a0, a1, e64, mf8, tu, ma vsetivli a0, 0xb, 0 vsetivli a0, 0...
stsp/binutils-ia16
1,757
gas/testsuite/gas/riscv/insn.s
target: .insn r 0x33, 0, 0, a0, a1, a2 .insn i 0x13, 0, a0, a1, 13 .insn i 0x67, 0, a0, 10(a1) .insn i 0x3, 0, a0, 4(a1) .insn sb 0x63, 0, a0, a1, target .insn b 0x63, 0, a0, a1, target .insn s 0x23, 0, a0, 4(a1) .insn u 0x37, a0, 0xfff .insn uj 0x6f, a0, target .insn j 0x6f, a0, target .in...
stsp/binutils-ia16
1,178
gas/testsuite/gas/bpf/alu.s
# Tests for the ALU64 eBPF instructions .text add %r2, 666 add %r3, -666 add %r4, 0x7eadbeef add %r5, %r6 sub %r2, 666 sub %r3, -666 sub %r4, 0x7eadbeef sub %r5, %r6 mul %r2, 666 mul %r3, -666 mul %r4, 0x7eadbeef mul...
stsp/binutils-ia16
1,389
gas/testsuite/gas/bpf/alu32.s
# Tests for the ALU eBPF instructions .text add32 %r2, 666 add32 %r3, -666 add32 %r4, 0x7eadbeef add32 %r5, %r6 sub32 %r2, 666 sub32 %r3, -666 sub32 %r4, 0x7eadbeef sub32 %r5, %r6 mul32 %r2, 666 mul32 %r3, -666 mul32 %r4, 0x...
stsp/binutils-ia16
10,206
gas/testsuite/gas/z80/ez80_adl_all.s
.text .org 0 ;; eZ80 instructions ; AND A,x group and a,a and a,b and a,c and a,d and a,e and a,h and a,l and a,(hl) and a,0xaa and a,(ix+5) and a,(iy-5) ; CP A,x group cp a,a cp a,b cp a,c cp a,d cp a,e cp a,h cp a,l cp a,(hl) cp a,0xaa cp a,(ix+5) cp a,(iy-5) ; OR A,x group or a,a or a,b ...
stsp/binutils-ia16
2,511
gas/testsuite/gas/z80/bit.s
.text .org 0 ;;; bit manipulation bit 0,a bit 0,b bit 0,c bit 0,d bit 0,e bit 0,h bit 0,l bit 0,(hl) bit 0,(ix+5) bit 0,(iy+5) bit 1,a bit 1,b bit 1,c bit 1,d bit 1,e bit 1,h bit 1,l bit 1,(hl) bit 1,(ix+5) bit 1,(iy+5) bit 2,a bit 2,b bit 2,c bit 2,d bit 2,e bit 2,h bit 2,l bit 2,(hl) b...
stsp/binutils-ia16
1,667
gas/testsuite/gas/z80/ld-group.s
.section .text .org 0 ;; 8-bit load group ld a,i ld a,r ld a,a ld a,b ld a,c ld a,d ld a,e ld a,h ld a,l ld a,(hl) ld a,(bc) ld a,(de) ld a,(ix+5) ld a,(iy+5) ld a,(0x8405) ld a,0x11 ld b,a ld b,b ld b,c ld b,d ld b,e ld b,h ld b,l ld b,(hl) ld b,(ix+5) ld b,(iy+5) ld b,0x11 ld c,a ld ...
stsp/binutils-ia16
6,727
gas/testsuite/gas/z80/z80_doc.s
.text .org 0 adc a,(hl) adc a,(ix+9) adc a,(iy+9) adc a,3 adc a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc hl,bc adc hl,de adc hl,hl adc hl,sp add a,(hl) add a,(ix+9) add a,(iy+9) add a,3 add a,a add a,b add a,c add a,d add a,e add a,h add a,l add hl,bc add hl,de add hl,hl ad...
stsp/binutils-ia16
4,632
gas/testsuite/gas/z80/gbz80_all.s
.text .org 0 ;; Game Boy Z80 opcode test nop ld bc,0xbeaf ld (bc),a inc bc inc b dec b ld b,0xfd rlca ld (0xbeaf),sp add hl,bc ld a,(bc) dec bc inc c dec c ld c,0xfd rrca stop ld de,0xbeaf ld (de),a inc de inc d dec d ld d,0xfd rla jr .+12 add hl,de ld a,(de) dec de inc e dec e ld e,0xf...
stsp/binutils-ia16
1,354
gas/testsuite/gas/z80/arith.s
.text .org 0 ;;; 8-bit arithmetic and logic add a,a add a,b add a,c add a,d add a,e add a,h add a,l add a,(hl) add a,(ix+5) add a,(iy+5) add a,17 adc a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc a,(hl) adc a,(ix+5) adc a,(iy+5) adc a,17 sub a sub b sub c sub d sub e sub h sub...
stsp/binutils-ia16
5,692
gas/testsuite/gas/z80/ez80_isuf.s
call.s VALUE call.s c,VALUE call.s m,VALUE call.s nc,VALUE call.s nz,VALUE call.s p,VALUE call.s pe,VALUE call.s po,VALUE call.s z,VALUE jp.s VALUE jp.s c,VALUE jp.s m,VALUE jp.s nc,VALUE jp.s nz,VALUE jp.s p,VALUE jp.s pe,VALUE jp.s po,VALUE jp.s z,VALUE ld.s (VALUE),a ld.s (VALUE),bc ld.s (VALUE)...
stsp/binutils-ia16
10,056
gas/testsuite/gas/z80/ez80_z80_all.s
.text .org 0 ;; eZ80 instructions ; AND A,x group and a,a and a,b and a,c and a,d and a,e and a,h and a,l and a,(hl) and a,0xaa and a,(ix+5) and a,(iy-5) ; CP A,x group cp a,a cp a,b cp a,c cp a,d cp a,e cp a,h cp a,l cp a,(hl) cp a,0xaa cp a,(ix+5) cp a,(iy-5) ; OR A,x group or a,a or a,b ...
stsp/binutils-ia16
1,888
gas/testsuite/gas/z80/sdcc.s
.module longpolls .optsdcc -mz80 valueadr = 0x1234 .globl function .globl _start .globl _finish .area _DABS (ABS) .area _HOME .area _CODE _start:: ;comment ld hl, #4+0 00000$: adc a, a adc a, b adc a, c adc a, d adc a, e adc a, h adc a, l adc a, ixh adc a, ixl adc a, iyh adc a,...
stsp/binutils-ia16
2,076
gas/testsuite/gas/z80/z80_ii8.s
.text .org 0 ; load group ld a,ixh ld b,ixh ld c,ixh ld d,ixh ld e,ixh ld ixh,ixh ld ixl,ixh ld a,ixl ld b,ixl ld c,ixl ld d,ixl ld e,ixl ld ixh,ixl ...
stsp/binutils-ia16
13,626
gas/testsuite/gas/z80/z80n_all.s
.text .org 0 adc a,(hl) adc a,(ix+9) adc a,(iy+9) adc a,3 adc a,a adc a,b adc a,c adc a,d adc a,e adc a,h adc a,l adc hl,bc adc hl,de adc hl,hl adc hl,sp add a,(hl) add a,(ix+9) add a,(iy+9) add a,3 add a,a add a,b add a,c add a,d add a,e add a,h add a,l add hl,bc add hl,de add hl,hl ad...
stsp/binutils-ia16
1,318
gas/testsuite/gas/z80/fp_math48.s
.data .float 0, -0 .float 1, -1 .float 2, -2 .float 15, -15 .float 100, -100 .float 0.1, -0.1 .float 2.938735877056E-39 ;smallest positive number .float 1.701411834603E+38 ;largest positive number .float -2.938735877056E-39 ;largest negative number .float -1.701411834603E+38 ;smallest negative number ; const...
stsp/binutils-ia16
5,280
gas/testsuite/gas/z80/z80_op_ii_ld.s
.text .org 0 ;; rare unportable instructions which do operation on memory byte ;; changing this byte and copying result to specified register RLC (ix+8),a RLC (ix+8),b RLC (ix+8),c RLC (ix+8),d RLC (ix+8),e RLC (ix+8),h RLC (ix+8),l RLC (iy+8),a RLC (iy+8),b RLC (iy+8),c RLC (iy+8),d RLC (iy+8),e RLC ...
stsp/binutils-ia16
1,816
gas/testsuite/gas/cr16/loadw_test.s
.text .global main main: ###################### # loadw abs20/24 reg ###################### loadw 0x0,r0 loadw 0xff,r1 loadw 0xfff,r3 loadw 0x1234,r4 loadw 0x1234,r5 loadw 0x7A1234,r0 loadw 0xBA1234,r1 loadw 0xffffff,r2 ###################### # loadw abs20 rel reg ###################### ...
stsp/binutils-ia16
3,530
gas/testsuite/gas/cr16/storw_test.s
.text .global main main: ###################### # storw reg abs20/24 ###################### storw r0,0x0 storw r1,0xff storw r3,0xfff storw r4,0x1234 storw r5,0x1234 storw r0,0x7A1234 storw r1,0xBA1234 storw r2,0xffffff ###################### # storw abs20 rel reg ######################...
stsp/binutils-ia16
1,225
gas/testsuite/gas/cr16/cmp_test.s
.text .global main main: ########### # CMPB imm4/imm16, reg ########### cmpb $0xf,r1 cmpb $0xff,r2 cmpb $0xfff,r1 #cmpb $0xffff,r2 // CHCEFK WITH CRASM 4.1 cmpb $20,r1 cmpb $10,r2 cmpb $11,r2 ########### # CMPB reg, reg ########### cmpb r...
stsp/binutils-ia16
2,760
gas/testsuite/gas/cr16/cbitw_test.s
.text .global main main: cbitw $4,0xbcd cbitw $5,0xaabcd cbitw $3,0xfaabcd cbitw $10,0xbcd cbitw $15,0xaabcd cbitw $14,0xfaabcd cbitw $5,[r12]0x14 cbitw $4,[r13]0xabfc cbitw $3,[r12]0x1234 cbitw $3,[r13]0x1234 cbitw $3,[r12]0x34 cbitw $15,[r12]0x14 cbitw $14,[r13]0xabfc cbitw $13,[r12]0x1...
stsp/binutils-ia16
1,035
gas/testsuite/gas/cr16/or_test.s
.text .global main main: ########### # ORB imm4/imm16, reg ########### orb $0xf,r1 orb $0xff,r2 orb $0xfff,r1 orb $0xffff,r2 orb $20,r1 orb $10,r2 ########### # ORB reg, reg ########### orb r1,r2 orb r2,r3 orb r3,r4 orb r5,r6 orb...
stsp/binutils-ia16
1,243
gas/testsuite/gas/cr16/mul_test.s
.text .global main main: ########### # MULB imm4/imm16, reg ########### mulb $0xf,r1 mulb $0xff,r2 mulb $0xfff,r1 #mulb $0xffff,r2 // CHCEK WITH CRASM 4.1 mulb $20,r1 mulb $10,r2 ########### # MULB reg, reg ########### mulb r1,r2 mulb r2,...
stsp/binutils-ia16
2,074
gas/testsuite/gas/cr16/loadd_test.s
.text .global main main: ###################### # loadd abs20/24 regp ###################### loadd 0x0,(r1,r0) loadd 0xff,(r1,r0) loadd 0xfff,(r3,r2) loadd 0x1234,(r4,r3) loadd 0x1234,(r5,r4) loadd 0x7A1234,(r1,r0) loadd 0xBA1234,(r1,r0) loadd 0xffffff,(r2,r1) ###################### # loa...
stsp/binutils-ia16
1,855
gas/testsuite/gas/cr16/sub_test.s
.text .global main main: ########### # SUBB imm4/imm16, reg ########### subb $0xf,r1 subb $0xff,r2 subb $0xfff,r1 #subb $0xffff,r2 // CHECK WITH CRASM 4.1 subb $20,r1 subb $10,r2 ########### # SUBB reg, reg ########### subb r1,r2 subb r2...
stsp/binutils-ia16
2,076
gas/testsuite/gas/cr16/stord_test.s
.text .global main main: ###################### # stord abs20/24 regp ###################### stord (r1,r0),0x0 stord (r1,r0),0xff stord (r3,r2),0xfff stord (r4,r3),0x1234 stord (r5,r4),0x1234 stord (r1,r0),0x7A1234 stord (r1,r0),0xBA1234 stord (r2,r1),0xffffff ###################### # sto...
stsp/binutils-ia16
3,529
gas/testsuite/gas/cr16/storb_test.s
.text .global main main: ###################### # storb reg abs20/24 ###################### storb r0,0x0 storb r1,0xff storb r3,0xfff storb r4,0x1234 storb r5,0x1234 storb r0,0x7A1234 storb r1,0xBA1234 storb r2,0xffffff ###################### # storb abs20 rel reg ######################...
stsp/binutils-ia16
1,077
gas/testsuite/gas/cr16/xor_test.s
.text .global main main: ########### # XORB imm4/imm16, reg ########### xorb $0xf,r1 xorb $0xff,r2 xorb $0xfff,r1 xorb $0xffff,r2 xorb $20,r1 xorb $10,r2 ########### # XORB reg, reg ########### xorb r1,r2 xorb r2,r3 xorb r3,r4 xorb ...
stsp/binutils-ia16
1,375
gas/testsuite/gas/cr16/sbitb_test.s
.text .global main main: sbitb $4,0xbcd sbitb $5,0xaabcd sbitb $3,0xfaabcd sbitb $5,[r12]0x14 sbitb $4,[r13]0xabfc sbitb $3,[r12]0x1234 sbitb $3,[r13]0x1234 sbitb $3,[r12]0x34 sbitb $3,[r12]0xa7a(r1,r0) sbitb $3,[r12]0xa7a(r3,r2) sbitb $3,[r12]0xa7a(r4,r3) sbitb $3,[r12]0xa7a(r5,r4) sbitb...
stsp/binutils-ia16
1,085
gas/testsuite/gas/cr16/and_test.s
.text .global main main: ########### # ANDB imm4/imm16, reg ########### andb $0xf,r1 andb $0xff,r2 andb $0xfff,r1 andb $0xffff,r2 andb $20,r1 andb $10,r2 ########### # ANDB reg, reg ########### andb r1,r2 andb r2,r3 andb r3,r4 andb ...
stsp/binutils-ia16
1,375
gas/testsuite/gas/cr16/cbitb_test.s
.text .global main main: cbitb $4,0xbcd cbitb $5,0xaabcd cbitb $3,0xfaabcd cbitb $5,[r12]0x14 cbitb $4,[r13]0xabfc cbitb $3,[r12]0x1234 cbitb $3,[r13]0x1234 cbitb $3,[r12]0x34 cbitb $3,[r12]0xa7a(r1,r0) cbitb $3,[r12]0xa7a(r3,r2) cbitb $3,[r12]0xa7a(r4,r3) cbitb $3,[r12]0xa7a(r5,r4) cbitb...
stsp/binutils-ia16
1,776
gas/testsuite/gas/cr16/mov_test.s
.text .global main main: ########### # MOVB imm4/imm16, reg ########### movb $0xf,r1 movb $0xff,r2 movb $0xfff,r1 #movb $0xffff,r2 // CHECK WITH CRASM 4.1 movb $20,r1 movb $10,r2 movb $11,r2 ########### # MOVB reg, reg ########### movb r1...
stsp/binutils-ia16
1,011
gas/testsuite/gas/cr16/lpsp_test.s
.text .global main main: ################ # lpr reg, preg ################ lpr r1,psr lpr r2,cfg lpr r2,intbasel lpr r3,intbaseh lpr r4,ispl lpr r5,isph lpr r6,uspl lpr r7,usph lpr r8,dsr lpr r9,dcrl lpr r10,dcrh lpr r11,car0l lpr r0,car0h lpr r1,car1l lpr r3,car1h ################# ...
stsp/binutils-ia16
2,760
gas/testsuite/gas/cr16/sbitw_test.s
.text .global main main: sbitw $4,0xbcd sbitw $5,0xaabcd sbitw $3,0xfaabcd sbitw $10,0xbcd sbitw $15,0xaabcd sbitw $14,0xfaabcd sbitw $5,[r12]0x14 sbitw $4,[r13]0xabfc sbitw $3,[r12]0x1234 sbitw $3,[r13]0x1234 sbitw $3,[r12]0x34 sbitw $15,[r12]0x14 sbitw $14,[r13]0xabfc sbitw $13,[r12]0x1...
stsp/binutils-ia16
1,609
gas/testsuite/gas/cr16/ash_test.s
.text .global main main: ##################################### # ASHUB cnt(left +)/cnt (right -), reg ##################################### ashub $7,r1 ashub $-7,r1 ashub $4,r1 ashub $-4,r1 ashub $-8,r1 ashub $3,r1 ashub $-3,r1 ####...
stsp/binutils-ia16
1,387
gas/testsuite/gas/cr16/lsh_test.s
.text .global main main: ########################### # LSHB cnt(right -), reg ########################### lshb $7,r1 lshb $-7,r1 lshb $4,r1 lshb $-4,r1 lshb $-8,r1 lshb $3,r1 lshb $-3,r1 ########################### # LSHB reg, reg ...
stsp/binutils-ia16
2,760
gas/testsuite/gas/cr16/tbitw_test.s
.text .global main main: tbitw $4,0xbcd tbitw $5,0xaabcd tbitw $3,0xfaabcd tbitw $10,0xbcd tbitw $15,0xaabcd tbitw $14,0xfaabcd tbitw $5,[r12]0x14 tbitw $4,[r13]0xabfc tbitw $3,[r12]0x1234 tbitw $3,[r13]0x1234 tbitw $3,[r12]0x34 tbitw $15,[r12]0x14 tbitw $14,[r13]0xabfc tbitw $13,[r12]0x1...
stsp/binutils-ia16
1,375
gas/testsuite/gas/cr16/tbitb_test.s
.text .global main main: tbitb $4,0xbcd tbitb $5,0xaabcd tbitb $3,0xfaabcd tbitb $5,[r12]0x14 tbitb $4,[r13]0xabfc tbitb $3,[r12]0x1234 tbitb $3,[r13]0x1234 tbitb $3,[r12]0x34 tbitb $3,[r12]0xa7a(r1,r0) tbitb $3,[r12]0xa7a(r3,r2) tbitb $3,[r12]0xa7a(r4,r3) tbitb $3,[r12]0xa7a(r5,r4) tbitb...
stsp/binutils-ia16
1,816
gas/testsuite/gas/cr16/loadb_test.s
.text .global main main: ###################### # loadb abs20/24 reg ###################### loadb 0x0,r0 loadb 0xff,r1 loadb 0xfff,r3 loadb 0x1234,r4 loadb 0x1234,r5 loadb 0x7A1234,r0 loadb 0xBA1234,r1 loadb 0xffffff,r2 ###################### # loadb abs20 rel reg ###################### ...
stsp/binutils-ia16
1,942
gas/testsuite/gas/cr16/add_test.s
.text .global main main: ########### # ADDB imm4/imm16, reg ########### addb $0xf,r1 addb $0xff,r2 addb $0xfff,r1 #addb $0xffff,r2 // CHECK WITH CRASM 4.1 addb $20,r1 addb $10,r2 addb $11,r2 ########### # ADDB reg, reg ########### addb r1...
stsp/binutils-ia16
2,011
gas/testsuite/gas/visium/allinsn_gr5.s
begin: write.l (r2),r1 write.l 0(r2),r1 write.w 1(r1),r2 write.b 31(r3),r7 write.b (r4),r7 eamwrite 0,r4,r5 eamwrite 31,r7,r10 writemd r14,r15 writemdc r9 divs r5 divu r6 divds r10 divdu r11 asrd r12 lsrd r13 asld r14 dsi mults r7,r8 multu r9,r10 eni dsi rfi nsrel: brr fa,nsrel rflag r...
stsp/binutils-ia16
2,089
gas/testsuite/gas/visium/allinsn_gr6.s
begin: write.l (r2),r1 write.l 0(r2),r1 write.w 1(r1),r2 write.b 31(r3),r7 write.b (r4),r7 eamwrite 0,r4,r5 eamwrite 31,r7,r10 writemd r14,r15 writemdc r9 divs r5 divu r6 divds r10 divdu r11 asrd r12 lsrd r13 asld r14 dsi mults r7,r8 multu r9,r10 eni dsi rfi nsrel: brr fa,nsrel rflag r...
stsp/binutils-ia16
1,702
gas/testsuite/gas/visium/allinsn_def.s
begin: write.l (r2),r1 write.l 0(r2),r1 write.w 1(r1),r2 write.b 31(r3),r7 write.b (r4),r7 eamwrite 0,r4,r5 eamwrite 31,r7,r10 writemd r14,r15 writemdc r9 divs r5 divu r6 divds r10 divdu r11 asrd r12 lsrd r13 asld r14 dsi mults r7,r8 multu r9,r10 eni dsi rfi nsrel: brr fa,nsrel rflag r...
stsp/binutils-ia16
2,538
gas/testsuite/gas/crx/arith_insn.s
# Arithmetic instructions. .data foodata: .word 42 .text footext: .global addub addub: addub $0x0 , r1 addub $0x5 , r2 addub r3 , r4 .global addb addb: addb $0x1 , r5 addb $0x6 , r6 addb r7 , r8 .global addcb addcb: addcb $2 , r9 addcb $0x9 , r10 addcb r11 , r12 .global andb andb: andb $0x3 , r13 andb $0x10 ...
stsp/binutils-ia16
1,956
gas/testsuite/gas/crx/gas-segfault.s
# PR 1063 # This source file used to make GAS crash with a seg fault .section .text .align 4 .globl __Z1flllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllllll...
stsp/binutils-ia16
3,049
gas/testsuite/gas/crx/misc_insn.s
# Miscellaneous instructions. .data foodata: .word 42 .text footext: # Multiply instructions. .global macsb macsb: macsb r0 , r1 .global macub macub: macub r2 , r3 .global macqb macqb: macqb r4 , r5 .global macsw macsw: macsw r6 , r7 .global macuw macuw: macuw r8 , r9 .global macqw macqw: macqw r10 , r11...
stsp/binutils-ia16
2,038
gas/testsuite/gas/crx/load_stor_insn.s
# Load/Store instructions. .data foodata: .word 42 .text footext: # Load instructions (memory to register). .global loadb loadb: loadb 0x632, r1 loadb 0x87632, r2 loadb 0xffff1234, r3 loadb 9(r5), r4 loadb 0(sp), r6 loadb 0x456(r6), r7 loadb -0x456(r8), r10 loadb 0x45678(r13), r12 loadb -0x4567892(r9), sp loadb 0x...
stsp/binutils-ia16
1,380
gas/testsuite/gas/crx/br_insn.s
# Branch instructions. .data foodata: .word 42 .text footext: # conditional branch instructions. .global beq beq: beq *+16 beq *+4090 beq *+567890 .global bne bne: bne *-8 bne *+0xf46 bne *-0xf7812 .global bcs bcs: bcs *+250 bcs *-0x2674 bcs *+0x89052 .global bcc bcc: bcc *-250 bcc *+0xfffe bcc *+0xfffffffe ...
stsp/binutils-ia16
3,667
gas/testsuite/gas/crx/cmpbr_insn.s
# 'Compare & Branch' instructions. .data foodata: .word 42 .text footext: .global cmpbeqb cmpbeqb: cmpbeqb r1, r2, 0x56 cmpbeqb r3, r4, 0x4348 cmpbeqb $0, r5, 0x36 cmpbeqb $1, r6, 0x345678 .global cmpbneb cmpbneb: cmpbneb r7, r8, 250 cmpbneb r9, r10, 0xf000 cmpbneb $2, r11, 0x2 cmpbneb $3, r12, 0xfffffe .globa...
stsp/binutils-ia16
1,901
gas/testsuite/gas/crx/bit_insn.s
# Bit instructions. .data foodata: .word 42 .text footext: # cbit instructions. .global cbitb cbitb: cbitb $6, 0x450 cbitb $0x6, 0xffff0450 cbitb $7, 0x41287 cbitb $3, 9(r5) cbitb $0, (sp) cbitb $2, 0xffffe1(r1) cbitb $4, 0xfa(ra,sp,1) cbitb $0x7, -333(r15,r7,8) .global cbitw cbitw: cbitw $0xf, 0x23 cbitw $0x6, ...
stsp/binutils-ia16
4,001
gas/testsuite/gas/z8k/reglabel.s
! labels starting with a valid register name .text sp_label: lda r0,sp_label r0_label: lda r0,r0_label r1_label: lda r0,r1_label r2_label: lda r0,r2_label r3_label: lda r0,r3_label r4_label: lda r0,r4_label r5_label: lda r0,r5_label r6_label: lda r0,r6_label r7_label: lda r0,r7_label r8_label: lda r0,r8_label r9_lab...
stsp/binutils-ia16
10,680
gas/testsuite/gas/z8k/inout.s
.text in r1,#0x4444 inb rh3,#0x123 in r8,@r0 in r9,@r1 in r10,@r2 in r11,@r3 in r12,@r4 in r13,@r5 in r14,@r6 in r15,@r7 in r0,@r8 in r1,@r9 in r2,@r10 in r3,@r11 in r4,@r12 in r5,@r13 in r6,@r14 in r7,@r15 inb rh0,@r0 inb rh1,@r1 inb rh2,@r2 inb rh3,@r3 inb rh4,@r4 inb rh5,@r5 inb rh6,@r6 ...
stsp/binutils-ia16
7,078
gas/testsuite/gas/d30v/inst.s
# test all instructions start: abs r21,r42 add r1,r2,r3 add r50,r51,0x1a add r50,r51,0xdeadbeef add2h r1,r2,r3 add2h r50,r51,0x1a add2h r50,r51,0xdeadbeef addc r1,r2,r3 addc r50,r51,0x1a addc r50,r51,0xdeadbeef addhlll r1,r2,r3 addhlll r50,r51,0x1a addhlll r50,r51,0xdeadbeef addhllh r1,r2,r3 addhll...
stsp/binutils-ia16
3,377
gas/testsuite/gas/d30v/opt.s
# D30V parallel optimization test # assemble with "-O" .text start: abs r1,r2 abs r3,r4 notfg f0,f4 notfg f1,f2 abs r1,r2 notfg f1,f2 # both change C flag add r1,r2,r3 notfg C,f0 # one uses and one changes C flag add r1,r2,r3 notfg f0,C bra . abs r1,r2 abs r1,r2 bra . bsr . abs r1,r2 a...