repo_id
stringlengths
5
115
size
int64
590
5.01M
file_path
stringlengths
4
212
content
stringlengths
590
5.01M
BenaliOssama/vm
164
playground/players_src/pierino_add.s
.name "pierino" .description "stay alive" a: live %-1 ld %2, r2 ld %3, r3 add r2, r3, r4 # after this instruction, r4 is 5 ld %0, r2 zjmp %:a
BenaliOssama/vm
153
playground/players_src/pierino_lldi_dir_dir_reg.s
.name "pierino" .description "stay alive" a: live %-1 lldi %1, %10, r3 # after exec, register r3 is 209 in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
162
playground/players_src/pierino_sti_reg_ind_dir.s
.name "pierino" .description "stay alive" a: live %-1 ld %123, r2 sti r1, -11, %1 # after execution, ff ff ff ff at byte 13 ld %0, r2 zjmp %:a
BenaliOssama/vm
1,161
playground/players_src/crab.s
.name "walker" .description "moving around" st r1,r8 # size: 4 bytes, writes the player_id in r8 # write a pit # - add %0,%0,r1 # 00000110 10100100 [00000000 00000000 00000000 00000000] [00000000 00000000 00000000 00000000] 00000001 -> 11 bytes # | | | | | arg3: reg1 # | | | | arg2: 0 # | | | arg1: 0 # | | pcode: direct,direct,register # | add opcode # - zjmp %-11 # 00000001 00001001 11111111 11110101 -> 1 + 3 bytes # | | | arg1: direct with has_idx: -11 # | | zjmp opcode # | arg3 of add, reg 1 ld %111411200,r2 # size: 5 bytes, load first 4 bytes of add instruction ld %1,r3 # size: 5 bytes, load last 4 bytes of add instruction ld %17432565,r4 # size: 5 bytes, load zjmp + 1 byte left padding # write a live sti r3,%12,%0 # size: 7 bytes, write the opcode of live + 3 bytes left padding sti r8,%9,%0 # size: 7 bytes, write the last 4 bytes of live nop r1 nop r1 sti r2,%28,%0 sti r16,%25,%0 sti r16,%22,%0 sti r4,%17,%0
BenaliOssama/vm
137
playground/players_src/pierino_xor_ind_ind.s
.name "pierino" .description "stay alive" a: live %-1 xor -2, -1, r3 # after execution, r3 should be f7 ld %0, r2 zjmp %:a
BenaliOssama/vm
177
playground/players_src/pierino_and_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %16, r2 and r1, r2, r3 # after this instruction, r3 should be 10 in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
177
playground/players_src/pierino_ldi_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %10, r2 ldi r1, r2, r3 # after this instruction, r3 should be 209 in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
162
playground/players_src/pierino_sti_reg_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %123, r2 sti r1, r2, r3 # after execution, ff ff ff ff at byte 135 ld %0, r2 zjmp %:a
BenaliOssama/vm
178
playground/players_src/pierino_ldi_reg_dir.s
.name "pierino" .description "stay alive" a: live %-1 ld %10, r2 ldi r2, %1, r3 # after this instruction, r3 should be 209ff in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
162
playground/players_src/pierino_sti_reg_dir_dir.s
.name "pierino" .description "stay alive" a: live %-1 ld %123, r2 sti r1, %23, %1 # after execution, ff ff ff ff at byte 36 ld %0, r2 zjmp %:a
BenaliOssama/vm
167
playground/players_src/pierino_and_ind_reg.s
.name "pierino" .description "stay alive" a: live %-1 and 7, r1, r3 # after this instruction, r3 should be ffff9000 (in hex notation) ld %0, r2 zjmp %:a
BenaliOssama/vm
139
playground/players_src/pierino_fork.s
.name "pierino" .description "stay alive" fork %:a # after exec, two twin process should run a: live %-1 ld %0, r2 zjmp %:a
BenaliOssama/vm
167
playground/players_src/pierino_lldi_ind_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %10, r2 lldi -5, r2, r3 # after exec, register r3 is 209 in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
155
playground/players_src/pierino_st_reg.s
.name "pierino" .description "stay alive" a: live %-1 st r1, r2 # after execution, r2 should be ffffffff in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
171
playground/players_src/pierino_sub.s
.name "pierino" .description "stay alive" a: live %-1 ld %2, r2 ld %3, r3 sub r2, r3, r4 # after execution, r4 should be ffffffff ld %0, r2 zjmp %:a
BenaliOssama/vm
146
playground/players_src/pierino_st_ind.s
.name "pierino" .description "stay alive" a: live %-1 st r1, 16 # after this instruction, ff ff ff ff at byte 21 ld %0, r2 zjmp %:a
BenaliOssama/vm
154
playground/players_src/pierino_lldi_ind_dir_reg.s
.name "pierino" .description "stay alive" a: live %-1 lldi 2, %10, r3 # after exec, register r3 is 209ff in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
139
playground/players_src/pierino_lld_dir_reg.s
.name "pierino" .description "stay alive" a: live %-1 lld %1234, r2 # afet exec r2 is equal to 4d2 in hex ld %0, r2 zjmp %:a
BenaliOssama/vm
166
playground/players_src/pierino_or_reg_ind.s
.name "pierino" .description "stay alive" a: live %-1 or r1, -2, r3 # after this isntruction, r3 should be ffffffff in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
143
playground/players_src/pierino_xor_ind_reg.s
.name "pierino" .description "stay alive" a: live %-1 xor -0, r1, r3 # after execution, r3 should be fffff72b ld %0, r2 zjmp %:a
BenaliOssama/vm
139
playground/players_src/pierino_lld_ind_reg.s
.name "pierino" .description "stay alive" a: live %-1 lld -4, r2 # afer exec r2 is set to ffffffff in hex ld %0, r2 zjmp %:a
BenaliOssama/vm
179
playground/players_src/pierino_ldi_dir_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %10, r2 ldi %1, r2, r3 # after this instruction, r3 should be 209ff in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
158
playground/players_src/pierino_xor_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %16, r2 xor r1, r2, r3 # after execution, r3 should be ffffffef ld %0, r2 zjmp %:a
BenaliOssama/vm
174
playground/players_src/pierino_or_reg_reg.s
.name "pierino" .description "stay alive" a: live %-1 ld %16, r2 or r3, r2, r3 # after this instruction, r3 should be 10 in hex notation ld %0, r2 zjmp %:a
BenaliOssama/vm
187
playground/players_src/invalid/instr_not_exist.s
.name "instr not exist" .description "instr not exist" l1: ciao %1 ld %:l1 , r2 l3: ldi %:l2, r2, r4 sti r4, %:l2, r2 add r2, r3, r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l3 l1:
BenaliOssama/vm
138
playground/players_src/invalid/number_too_big.s
.name "number to big" .description "number to big" l1: ld 9999999999999, r2 ld %:l1 , r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l1
BenaliOssama/vm
189
playground/players_src/invalid/register_too_small.s
.name "register too small" .description "register too small" l1: live %1 ld %:l1 , r2 l3: ldi %:l2, r2, r4 sti r4, %:l2, r2 add r0, r3, r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l3
BenaliOssama/vm
210
playground/players_src/invalid/repated_label.s
.name "repeated labels" .description "repeated lables" st r1, :l1 ld %4, r3 l1: live %1 ld %:l1 , r2 l3: ldi %:l2, r2, r4 sti r4, %:l2, r2 add r2, r3, r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l3 l1:
BenaliOssama/vm
203
playground/players_src/invalid/not_existing_label.s
.name "not existing labels" .description "not existing lables" st r1, :l5 l1: live %1 ld %:l1 , r2 l3: ldi %:l2, r2, r4 sti r4, %:l2, r2 add r2, r3, r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l3
BenaliOssama/vm
186
playground/players_src/invalid/register_too_big.s
.name "register too big" .description "register too big" l1: live %1 ld %:l1 , r2 l3: ldi %:l2, r17, r4 sti r4, %:l2, r2 add r2, r3, r2 live: zjmp %:l1 xor r4, r4, r4 zjmp %:l3
BenaliOssama/vm
113
playground/players_src/specials/pierino_r_out_of_range.s
.name "pierino" .description "register out of range!" sti r1, %:a, %1 a: live %23 ld %0, r223 zjmp %:a
benschlueter/platbox_fork
2,557
pocs/AmdSinkclose/sinkclose.S
#define PROTECT_MODE_CS 0x08 #define PROTECT_MODE_DS 0x20 #define LONG_MODE_CS 0x38 #define TSS_SEGMENT 0x40 #define LONG_MODE_DS 0x48 #define ORIGINAL_GDTR 0x1400 #define SQUIRREL_BAR 0xd0800000 #define CORE0_INITIAL_STACK 0x1E00 #define CORE0_PAGE_TABLE_BASE 0x2000 #define CORE0_NEXT_STAGE 0x1031 #define CORE0_LONG_MODE 0x1081 /* 0x1081 */ #define CORE0_LONG_MODE_JMP 0x1081 #define SMM_BASE_OFFSET_CORE0 0xafe39000+0x7ef8+0x8000 #define X64_STAGING_FUNC_VA 0xfffff6fb7dbee000 #define X64_STAGING_RSP 0xfffff6fb7dbef000 #define IA32_EFER 0xC0000080 #define CORE1_MUTEX_SIGNAL_ADDR 0x3220 .global _core0_shell .text /* This code is executed in SMM by Core0 as part of the attack */ _core0_shell: .code32 /* Clear TClose */ movl $0xc0010113,%ecx rdmsr and $0xfffffff3,%eax wrmsr movl $PROTECT_MODE_DS,%eax movl %eax, %ds movl %eax, %es movl %eax, %fs movl %eax, %gs movl %eax, %ss movl $CORE0_INITIAL_STACK,%esp /* Clean the GDT and CS */ movl $ORIGINAL_GDTR,%ecx lgdt (%ecx) pushl $PROTECT_MODE_CS movl $CORE0_NEXT_STAGE,%eax pushl %eax lretl next_stage: jmp ProtFlatMode .code64 ProtFlatMode: mov $0x800,%ebx mov $0x800,(%ebx) wbinvd rsm mov $SMM_BASE_OFFSET_CORE0,%eax mov (%eax),%ecx mov %ecx,4(%ebx) mov $CORE0_PAGE_TABLE_BASE,%eax mov %rax,%cr3 mov $0x668,%rax /* as cr4.PGE is not set here, refresh cr3 */ mov %rax,%cr4 /* Load TSS */ sub $8,%esp /* reserve room in stack */ sgdt (%rsp) movl 2(%rsp),%eax /* eax = GDT base*/ add $8,%esp mov $0x89,%dl movb %dl, TSS_SEGMENT+5(%rax) /* clear busy flag*/ mov $TSS_SEGMENT,%eax ltr %ax mov $IA32_EFER,%ecx rdmsr or $1,%ah /* enable LME*/ wrmsr mov %cr0,%rbx or $0x80010023,%ebx /* enable paging + WP + NE + MP + PE*/ .code32 pushl $LONG_MODE_CS movl $CORE0_LONG_MODE,%eax pushl %eax movl %ebx,%cr0 lret /* .code32 ljmp $LONG_MODE_CS, $CORE0_LONG_MODE_JMP */ .code64 LongMode: movl LONG_MODE_DS,%eax movl %eax, %ds movl %eax, %es movl %eax, %fs movl %eax, %gs movl %eax, %ss rsm mov $X64_STAGING_RSP,%rax add $0xF00,%rax mov %rax, %rsp mov $X64_STAGING_FUNC_VA, %rax call *%rax /* Return from SMM*/ rsm nop nop nop nop .byte 'I' .byte 'O' .byte 'A' nop nop nop nop nop
benwu25/daikon-rustc
4,378
library/compiler-builtins/compiler-builtins/src/hexagon/dfmul.s
.text .global __hexagon_muldf3 .type __hexagon_muldf3,@function .global __qdsp_muldf3 ; .set __qdsp_muldf3, __hexagon_muldf3 .global __hexagon_fast_muldf3 ; .set __hexagon_fast_muldf3, __hexagon_muldf3 .global __hexagon_fast2_muldf3 ; .set __hexagon_fast2_muldf3, __hexagon_muldf3 .p2align 5 __hexagon_muldf3: { p0 = dfclass(r1:0,#2) p0 = dfclass(r3:2,#2) r13:12 = combine(##0x40000000,#0) } { r13:12 = insert(r1:0,#52,#11 -1) r5:4 = asl(r3:2,#11 -1) r28 = #-1024 r9:8 = #1 } { r7:6 = mpyu(r4,r13) r5:4 = insert(r9:8,#2,#62) } { r15:14 = mpyu(r12,r4) r7:6 += mpyu(r12,r5) } { r7:6 += lsr(r15:14,#32) r11:10 = mpyu(r13,r5) r5:4 = combine(##1024 +1024 -4,#0) } { r11:10 += lsr(r7:6,#32) if (!p0) jump .Lmul_abnormal p1 = cmp.eq(r14,#0) p1 = cmp.eq(r6,#0) } { if (!p1) r10 = or(r10,r8) r6 = extractu(r1,#11,#20) r7 = extractu(r3,#11,#20) } { r15:14 = neg(r11:10) r6 += add(r28,r7) r28 = xor(r1,r3) } { if (!p2.new) r11:10 = r15:14 p2 = cmp.gt(r28,#-1) p0 = !cmp.gt(r6,r5) p0 = cmp.gt(r6,r4) if (!p0.new) jump:nt .Lmul_ovf_unf } { r1:0 = convert_d2df(r11:10) r6 = add(r6,#-1024 -58) } { r1 += asl(r6,#20) jumpr r31 } .falign .Lpossible_unf1: { p0 = cmp.eq(r0,#0) p0 = bitsclr(r1,r4) if (!p0.new) jumpr:t r31 r5 = #0x7fff } { p0 = bitsset(r13,r5) r4 = USR r5 = #0x030 } { if (p0) r4 = or(r4,r5) } { USR = r4 } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .falign .Lmul_ovf_unf: { r1:0 = convert_d2df(r11:10) r13:12 = abs(r11:10) r7 = add(r6,#-1024 -58) } { r1 += asl(r7,#20) r7 = extractu(r1,#11,#20) r4 = ##0x7FEFFFFF } { r7 += add(r6,##-1024 -58) r5 = #0 } { p0 = cmp.gt(r7,##1024 +1024 -2) if (p0.new) jump:nt .Lmul_ovf } { p0 = cmp.gt(r7,#0) if (p0.new) jump:nt .Lpossible_unf1 r5 = sub(r6,r5) r28 = #63 } { r4 = #0 r5 = sub(#5,r5) } { p3 = cmp.gt(r11,#-1) r5 = min(r5,r28) r11:10 = r13:12 } { r28 = USR r15:14 = extractu(r11:10,r5:4) } { r11:10 = asr(r11:10,r5) r4 = #0x0030 r1 = insert(r9,#11,#20) } { p0 = cmp.gtu(r9:8,r15:14) if (!p0.new) r10 = or(r10,r8) r11 = setbit(r11,#20 +3) } { r15:14 = neg(r11:10) p1 = bitsclr(r10,#0x7) if (!p1.new) r28 = or(r4,r28) } { if (!p3) r11:10 = r15:14 USR = r28 } { r1:0 = convert_d2df(r11:10) p0 = dfcmp.eq(r1:0,r1:0) } { r1 = insert(r9,#11 -1,#20 +1) jumpr r31 } .falign .Lmul_ovf: { r28 = USR r13:12 = combine(##0x7fefffff,#-1) r1:0 = r11:10 } { r14 = extractu(r28,#2,#22) r28 = or(r28,#0x28) r5:4 = combine(##0x7ff00000,#0) } { USR = r28 r14 ^= lsr(r1,#31) r28 = r14 } { p0 = !cmp.eq(r28,#1) p0 = !cmp.eq(r14,#2) if (p0.new) r13:12 = r5:4 p0 = dfcmp.eq(r1:0,r1:0) } { r1:0 = insert(r13:12,#63,#0) jumpr r31 } .Lmul_abnormal: { r13:12 = extractu(r1:0,#63,#0) r5:4 = extractu(r3:2,#63,#0) } { p3 = cmp.gtu(r13:12,r5:4) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Linvalid_nan if (!p3) r13:12 = r5:4 if (!p3) r5:4 = r13:12 } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x0e) } { p0 = dfclass(r1:0,#0x08) p0 = dfclass(r3:2,#0x01) } { if (p1) jump .Ltrue_inf p2 = dfclass(r3:2,#0x01) } { if (p0) jump .Linvalid_zeroinf if (p2) jump .Ltrue_zero r28 = ##0x7c000000 } { p0 = bitsclr(r1,r28) if (p0.new) jump:nt .Lmul_tiny } { r28 = cl0(r5:4) } { r28 = add(r28,#-11) } { r5:4 = asl(r5:4,r28) } { r3:2 = insert(r5:4,#63,#0) r1 -= asl(r28,#20) } jump __hexagon_muldf3 .Lmul_tiny: { r28 = USR r1:0 = xor(r1:0,r3:2) } { r28 = or(r28,#0x30) r1:0 = insert(r9:8,#63,#0) r5 = extractu(r28,#2,#22) } { USR = r28 p0 = cmp.gt(r5,#1) if (!p0.new) r0 = #0 r5 ^= lsr(r1,#31) } { p0 = cmp.eq(r5,#3) if (!p0.new) r0 = #0 jumpr r31 } .Linvalid_zeroinf: { r28 = USR } { r1:0 = #-1 r28 = or(r28,#2) } { USR = r28 } { p0 = dfcmp.uo(r1:0,r1:0) jumpr r31 } .Linvalid_nan: { p0 = dfclass(r3:2,#0x0f) r28 = convert_df2sf(r1:0) if (p0.new) r3:2 = r1:0 } { r2 = convert_df2sf(r3:2) r1:0 = #-1 jumpr r31 } .falign .Ltrue_zero: { r1:0 = r3:2 r3:2 = r1:0 } .Ltrue_inf: { r3 = extract(r3,#1,#31) } { r1 ^= asl(r3,#31) jumpr r31 } .size __hexagon_muldf3,.-__hexagon_muldf3
benwu25/daikon-rustc
5,659
library/compiler-builtins/compiler-builtins/src/hexagon/dfdiv.s
.text .global __hexagon_divdf3 .type __hexagon_divdf3,@function .global __qdsp_divdf3 ; .set __qdsp_divdf3, __hexagon_divdf3 .global __hexagon_fast_divdf3 ; .set __hexagon_fast_divdf3, __hexagon_divdf3 .global __hexagon_fast2_divdf3 ; .set __hexagon_fast2_divdf3, __hexagon_divdf3 .p2align 5 __hexagon_divdf3: { p2 = dfclass(r1:0,#0x02) p2 = dfclass(r3:2,#0x02) r13:12 = combine(r3,r1) r28 = xor(r1,r3) } { if (!p2) jump .Ldiv_abnormal r7:6 = extractu(r3:2,#23,#52 -23) r8 = ##0x3f800001 } { r9 = or(r8,r6) r13 = extractu(r13,#11,#52 -32) r12 = extractu(r12,#11,#52 -32) p3 = cmp.gt(r28,#-1) } .Ldenorm_continue: { r11,p0 = sfrecipa(r8,r9) r10 = and(r8,#-2) r28 = #1 r12 = sub(r12,r13) } { r10 -= sfmpy(r11,r9):lib r1 = insert(r28,#11 +1,#52 -32) r13 = ##0x00800000 << 3 } { r11 += sfmpy(r11,r10):lib r3 = insert(r28,#11 +1,#52 -32) r10 = and(r8,#-2) } { r10 -= sfmpy(r11,r9):lib r5 = #-0x3ff +1 r4 = #0x3ff -1 } { r11 += sfmpy(r11,r10):lib p1 = cmp.gt(r12,r5) p1 = !cmp.gt(r12,r4) } { r13 = insert(r11,#23,#3) r5:4 = #0 r12 = add(r12,#-61) } { r13 = add(r13,#((-3) << 3)) } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASL(r7:6, # ( 14 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 1 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 16 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 31 )); r1:0 -= asl(r15:14, # 32); r7:6=# ( 0 ); } { r15:14 = sub(r1:0,r3:2) p0 = cmp.gtu(r3:2,r1:0) if (!p0.new) r6 = #2 } { r5:4 = add(r5:4,r7:6) if (!p0) r1:0 = r15:14 r15:14 = #0 } { p0 = cmp.eq(r1:0,r15:14) if (!p0.new) r4 = or(r4,r28) } { r7:6 = neg(r5:4) } { if (!p3) r5:4 = r7:6 } { r1:0 = convert_d2df(r5:4) if (!p1) jump .Ldiv_ovf_unf } { r1 += asl(r12,#52 -32) jumpr r31 } .Ldiv_ovf_unf: { r1 += asl(r12,#52 -32) r13 = extractu(r1,#11,#52 -32) } { r7:6 = abs(r5:4) r12 = add(r12,r13) } { p0 = cmp.gt(r12,##0x3ff +0x3ff) if (p0.new) jump:nt .Ldiv_ovf } { p0 = cmp.gt(r12,#0) if (p0.new) jump:nt .Lpossible_unf2 } { r13 = add(clb(r7:6),#-1) r12 = sub(#7,r12) r10 = USR r11 = #63 } { r13 = min(r12,r11) r11 = or(r10,#0x030) r7:6 = asl(r7:6,r13) r12 = #0 } { r15:14 = extractu(r7:6,r13:12) r7:6 = lsr(r7:6,r13) r3:2 = #1 } { p0 = cmp.gtu(r3:2,r15:14) if (!p0.new) r6 = or(r2,r6) r7 = setbit(r7,#52 -32+4) } { r5:4 = neg(r7:6) p0 = bitsclr(r6,#(1<<4)-1) if (!p0.new) r10 = r11 } { USR = r10 if (p3) r5:4 = r7:6 r10 = #-0x3ff -(52 +4) } { r1:0 = convert_d2df(r5:4) } { r1 += asl(r10,#52 -32) jumpr r31 } .Lpossible_unf2: { r3:2 = extractu(r1:0,#63,#0) r15:14 = combine(##0x00100000,#0) r10 = #0x7FFF } { p0 = dfcmp.eq(r15:14,r3:2) p0 = bitsset(r7,r10) } { if (!p0) jumpr r31 r10 = USR } { r10 = or(r10,#0x30) } { USR = r10 } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .Ldiv_ovf: { r10 = USR r3:2 = combine(##0x7fefffff,#-1) r1 = mux(p3,#0,#-1) } { r7:6 = combine(##0x7ff00000,#0) r5 = extractu(r10,#2,#22) r10 = or(r10,#0x28) } { USR = r10 r5 ^= lsr(r1,#31) r4 = r5 } { p0 = !cmp.eq(r4,#1) p0 = !cmp.eq(r5,#2) if (p0.new) r3:2 = r7:6 p0 = dfcmp.eq(r3:2,r3:2) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_abnormal: { p0 = dfclass(r1:0,#0x0F) p0 = dfclass(r3:2,#0x0F) p3 = cmp.gt(r28,#-1) } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x08) } { p2 = dfclass(r1:0,#0x01) p2 = dfclass(r3:2,#0x01) } { if (!p0) jump .Ldiv_nan if (p1) jump .Ldiv_invalid } { if (p2) jump .Ldiv_invalid } { p2 = dfclass(r1:0,#(0x0F ^ 0x01)) p2 = dfclass(r3:2,#(0x0F ^ 0x08)) } { p1 = dfclass(r1:0,#(0x0F ^ 0x08)) p1 = dfclass(r3:2,#(0x0F ^ 0x01)) } { if (!p2) jump .Ldiv_zero_result if (!p1) jump .Ldiv_inf_result } { p0 = dfclass(r1:0,#0x02) p1 = dfclass(r3:2,#0x02) r10 = ##0x00100000 } { r13:12 = combine(r3,r1) r1 = insert(r10,#11 +1,#52 -32) r3 = insert(r10,#11 +1,#52 -32) } { if (p0) r1 = or(r1,r10) if (p1) r3 = or(r3,r10) } { r5 = add(clb(r1:0),#-11) r4 = add(clb(r3:2),#-11) r10 = #1 } { r12 = extractu(r12,#11,#52 -32) r13 = extractu(r13,#11,#52 -32) } { r1:0 = asl(r1:0,r5) r3:2 = asl(r3:2,r4) if (!p0) r12 = sub(r10,r5) if (!p1) r13 = sub(r10,r4) } { r7:6 = extractu(r3:2,#23,#52 -23) } { r9 = or(r8,r6) jump .Ldenorm_continue } .Ldiv_zero_result: { r1 = xor(r1,r3) r3:2 = #0 } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_inf_result: { p2 = dfclass(r3:2,#0x01) p2 = dfclass(r1:0,#(0x0F ^ 0x08)) } { r10 = USR if (!p2) jump 1f r1 = xor(r1,r3) } { r10 = or(r10,#0x04) } { USR = r10 } 1: { r3:2 = combine(##0x7ff00000,#0) p0 = dfcmp.uo(r3:2,r3:2) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_nan: { p0 = dfclass(r1:0,#0x10) p1 = dfclass(r3:2,#0x10) if (!p0.new) r1:0 = r3:2 if (!p1.new) r3:2 = r1:0 } { r5 = convert_df2sf(r1:0) r4 = convert_df2sf(r3:2) } { r1:0 = #-1 jumpr r31 } .Ldiv_invalid: { r10 = ##0x7f800001 } { r1:0 = convert_sf2df(r10) jumpr r31 } .size __hexagon_divdf3,.-__hexagon_divdf3
benwu25/daikon-rustc
481
library/compiler-builtins/compiler-builtins/src/hexagon/umodsi3.s
FUNCTION_BEGIN __hexagon_umodsi3 { r2 = cl0(r0) r3 = cl0(r1) p0 = cmp.gtu(r1,r0) } { r2 = sub(r3,r2) if (p0) jumpr r31 } { loop0(1f,r2) p1 = cmp.eq(r2,#0) r2 = lsl(r1,r2) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r2) r2 = lsr(r2,#1) if (p1) r1 = #0 }:endloop0 { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r1) jumpr r31 } FUNCTION_END __hexagon_umodsi3 .globl __qdsp_umodsi3 .set __qdsp_umodsi3, __hexagon_umodsi3
benwu25/daikon-rustc
677
library/compiler-builtins/compiler-builtins/src/hexagon/udivmoddi4.s
FUNCTION_BEGIN __hexagon_udivmoddi4 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 { jumpr r31 } FUNCTION_END __hexagon_udivmoddi4 .globl __qdsp_udivmoddi4 .set __qdsp_udivmoddi4, __hexagon_udivmoddi4
benwu25/daikon-rustc
158
library/compiler-builtins/compiler-builtins/src/hexagon/func_macro.s
.macro FUNCTION_BEGIN name .text .p2align 5 .globl \name .type \name, @function \name: .endm .macro FUNCTION_END name .size \name, . - \name .endm
benwu25/daikon-rustc
662
library/compiler-builtins/compiler-builtins/src/hexagon/udivdi3.s
FUNCTION_BEGIN __hexagon_udivdi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 { jumpr r31 } FUNCTION_END __hexagon_udivdi3 .globl __qdsp_udivdi3 .set __qdsp_udivdi3, __hexagon_udivdi3
benwu25/daikon-rustc
4,801
library/compiler-builtins/compiler-builtins/src/hexagon/dfaddsub.s
.text .global __hexagon_adddf3 .global __hexagon_subdf3 .type __hexagon_adddf3, @function .type __hexagon_subdf3, @function .global __qdsp_adddf3 ; .set __qdsp_adddf3, __hexagon_adddf3 .global __hexagon_fast_adddf3 ; .set __hexagon_fast_adddf3, __hexagon_adddf3 .global __hexagon_fast2_adddf3 ; .set __hexagon_fast2_adddf3, __hexagon_adddf3 .global __qdsp_subdf3 ; .set __qdsp_subdf3, __hexagon_subdf3 .global __hexagon_fast_subdf3 ; .set __hexagon_fast_subdf3, __hexagon_subdf3 .global __hexagon_fast2_subdf3 ; .set __hexagon_fast2_subdf3, __hexagon_subdf3 .p2align 5 __hexagon_adddf3: { r4 = extractu(r1,#11,#20) r5 = extractu(r3,#11,#20) r13:12 = combine(##0x20000000,#0) } { p3 = dfclass(r1:0,#2) p3 = dfclass(r3:2,#2) r9:8 = r13:12 p2 = cmp.gtu(r5,r4) } { if (!p3) jump .Ladd_abnormal if (p2) r1:0 = r3:2 if (p2) r3:2 = r1:0 if (p2) r5:4 = combine(r4,r5) } { r13:12 = insert(r1:0,#52,#11 -2) r9:8 = insert(r3:2,#52,#11 -2) r15 = sub(r4,r5) r7:6 = combine(#62,#1) } .Ladd_continue: { r15 = min(r15,r7) r11:10 = neg(r13:12) p2 = cmp.gt(r1,#-1) r14 = #0 } { if (!p2) r13:12 = r11:10 r11:10 = extractu(r9:8,r15:14) r9:8 = ASR(r9:8,r15) r15:14 = #0 } { p1 = cmp.eq(r11:10,r15:14) if (!p1.new) r8 = or(r8,r6) r5 = add(r4,#-1024 -60) p3 = cmp.gt(r3,#-1) } { r13:12 = add(r13:12,r9:8) r11:10 = sub(r13:12,r9:8) r7:6 = combine(#54,##2045) } { p0 = cmp.gtu(r4,r7) p0 = !cmp.gtu(r4,r6) if (!p0.new) jump:nt .Ladd_ovf_unf if (!p3) r13:12 = r11:10 } { r1:0 = convert_d2df(r13:12) p0 = cmp.eq(r13,#0) p0 = cmp.eq(r12,#0) if (p0.new) jump:nt .Ladd_zero } { r1 += asl(r5,#20) jumpr r31 } .falign __hexagon_subdf3: { r3 = togglebit(r3,#31) jump __qdsp_adddf3 } .falign .Ladd_zero: { r28 = USR r1:0 = #0 r3 = #1 } { r28 = extractu(r28,#2,#22) r3 = asl(r3,#31) } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = xor(r1,r3) jumpr r31 } .falign .Ladd_ovf_unf: { r1:0 = convert_d2df(r13:12) p0 = cmp.eq(r13,#0) p0 = cmp.eq(r12,#0) if (p0.new) jump:nt .Ladd_zero } { r28 = extractu(r1,#11,#20) r1 += asl(r5,#20) } { r5 = add(r5,r28) r3:2 = combine(##0x00100000,#0) } { p0 = cmp.gt(r5,##1024 +1024 -2) if (p0.new) jump:nt .Ladd_ovf } { p0 = cmp.gt(r5,#0) if (p0.new) jumpr:t r31 r28 = sub(#1,r5) } { r3:2 = insert(r1:0,#52,#0) r1:0 = r13:12 } { r3:2 = lsr(r3:2,r28) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .falign .Ladd_ovf: { r1:0 = r13:12 r28 = USR r13:12 = combine(##0x7fefffff,#-1) } { r5 = extractu(r28,#2,#22) r28 = or(r28,#0x28) r9:8 = combine(##0x7ff00000,#0) } { USR = r28 r5 ^= lsr(r1,#31) r28 = r5 } { p0 = !cmp.eq(r28,#1) p0 = !cmp.eq(r5,#2) if (p0.new) r13:12 = r9:8 } { r1:0 = insert(r13:12,#63,#0) } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .Ladd_abnormal: { r13:12 = extractu(r1:0,#63,#0) r9:8 = extractu(r3:2,#63,#0) } { p3 = cmp.gtu(r13:12,r9:8) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Linvalid_nan_add if (!p3) r13:12 = r9:8 if (!p3) r9:8 = r13:12 } { p1 = dfclass(r1:0,#0x08) if (p1.new) jump:nt .Linf_add } { p2 = dfclass(r3:2,#0x01) if (p2.new) jump:nt .LB_zero r13:12 = #0 } { p0 = dfclass(r1:0,#4) if (p0.new) jump:nt .Ladd_two_subnormal r13:12 = combine(##0x20000000,#0) } { r4 = extractu(r1,#11,#20) r5 = #1 r9:8 = asl(r9:8,#11 -2) } { r13:12 = insert(r1:0,#52,#11 -2) r15 = sub(r4,r5) r7:6 = combine(#62,#1) jump .Ladd_continue } .Ladd_two_subnormal: { r13:12 = extractu(r1:0,#63,#0) r9:8 = extractu(r3:2,#63,#0) } { r13:12 = neg(r13:12) r9:8 = neg(r9:8) p0 = cmp.gt(r1,#-1) p1 = cmp.gt(r3,#-1) } { if (p0) r13:12 = r1:0 if (p1) r9:8 = r3:2 } { r13:12 = add(r13:12,r9:8) } { r9:8 = neg(r13:12) p0 = cmp.gt(r13,#-1) r3:2 = #0 } { if (!p0) r1:0 = r9:8 if (p0) r1:0 = r13:12 r3 = ##0x80000000 } { if (!p0) r1 = or(r1,r3) p0 = dfcmp.eq(r1:0,r3:2) if (p0.new) jump:nt .Lzero_plus_zero } { jumpr r31 } .Linvalid_nan_add: { r28 = convert_df2sf(r1:0) p0 = dfclass(r3:2,#0x0f) if (p0.new) r3:2 = r1:0 } { r2 = convert_df2sf(r3:2) r1:0 = #-1 jumpr r31 } .falign .LB_zero: { p0 = dfcmp.eq(r13:12,r1:0) if (!p0.new) jumpr:t r31 } .Lzero_plus_zero: { p0 = cmp.eq(r1:0,r3:2) if (p0.new) jumpr:t r31 } { r28 = USR } { r28 = extractu(r28,#2,#22) r1:0 = #0 } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 jumpr r31 } .Linf_add: { p0 = !cmp.eq(r1,r3) p0 = dfclass(r3:2,#8) if (!p0.new) jumpr:t r31 } { r2 = ##0x7f800001 } { r1:0 = convert_sf2df(r2) jumpr r31 } .size __hexagon_adddf3,.-__hexagon_adddf3
benwu25/daikon-rustc
785
library/compiler-builtins/compiler-builtins/src/hexagon/sfdiv_opt.s
FUNCTION_BEGIN __hexagon_divsf3 { r2,p0 = sfrecipa(r0,r1) r4 = sffixupd(r0,r1) r3 = ##0x3f800000 } { r5 = sffixupn(r0,r1) r3 -= sfmpy(r4,r2):lib r6 = ##0x80000000 r7 = r3 } { r2 += sfmpy(r3,r2):lib r3 = r7 r6 = r5 r0 = and(r6,r5) } { r3 -= sfmpy(r4,r2):lib r0 += sfmpy(r5,r2):lib } { r2 += sfmpy(r3,r2):lib r6 -= sfmpy(r0,r4):lib } { r0 += sfmpy(r6,r2):lib } { r5 -= sfmpy(r0,r4):lib } { r0 += sfmpy(r5,r2,p0):scale jumpr r31 } FUNCTION_END __hexagon_divsf3 .global __qdsp_divsf3 ; .set __qdsp_divsf3, __hexagon_divsf3 .global __hexagon_fast_divsf3 ; .set __hexagon_fast_divsf3, __hexagon_divsf3 .global __hexagon_fast2_divsf3 ; .set __hexagon_fast2_divsf3, __hexagon_divsf3
benwu25/daikon-rustc
584
library/compiler-builtins/compiler-builtins/src/hexagon/modsi3.s
FUNCTION_BEGIN __hexagon_modsi3 { p2 = cmp.ge(r0,#0) r2 = abs(r0) r1 = abs(r1) } { r3 = cl0(r2) r4 = cl0(r1) p0 = cmp.gtu(r1,r2) } { r3 = sub(r4,r3) if (p0) jumpr r31 } { p1 = cmp.eq(r3,#0) loop0(1f,r3) r0 = r2 r2 = lsl(r1,r3) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r2) r2 = lsr(r2,#1) if (p1) r1 = #0 }:endloop0 { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r1) if (p2) jumpr r31 } { r0 = neg(r0) jumpr r31 } FUNCTION_END __hexagon_modsi3 .globl __qdsp_modsi3 .set __qdsp_modsi3, __hexagon_modsi3
benwu25/daikon-rustc
7,236
library/compiler-builtins/compiler-builtins/src/hexagon/dffma.s
.text .global __hexagon_fmadf4 .type __hexagon_fmadf4,@function .global __hexagon_fmadf5 .type __hexagon_fmadf5,@function .global __qdsp_fmadf5 ; .set __qdsp_fmadf5, __hexagon_fmadf5 .p2align 5 __hexagon_fmadf4: __hexagon_fmadf5: fma: { p0 = dfclass(r1:0,#2) p0 = dfclass(r3:2,#2) r13:12 = #0 r15:14 = #0 } { r13:12 = insert(r1:0,#52,#11 -3) r15:14 = insert(r3:2,#52,#11 -3) r7 = ##0x10000000 allocframe(#32) } { r9:8 = mpyu(r12,r14) if (!p0) jump .Lfma_abnormal_ab r13 = or(r13,r7) r15 = or(r15,r7) } { p0 = dfclass(r5:4,#2) if (!p0.new) jump:nt .Lfma_abnormal_c r11:10 = combine(r7,#0) r7:6 = combine(#0,r9) } .Lfma_abnormal_c_restart: { r7:6 += mpyu(r14,r13) r11:10 = insert(r5:4,#52,#11 -3) memd(r29+#0) = r17:16 memd(r29+#8) = r19:18 } { r7:6 += mpyu(r12,r15) r19:18 = neg(r11:10) p0 = cmp.gt(r5,#-1) r28 = xor(r1,r3) } { r18 = extractu(r1,#11,#20) r19 = extractu(r3,#11,#20) r17:16 = combine(#0,r7) if (!p0) r11:10 = r19:18 } { r17:16 += mpyu(r13,r15) r9:8 = combine(r6,r8) r18 = add(r18,r19) r19 = extractu(r5,#11,#20) } { r18 = add(r18,#-1023 +(4)) p3 = !cmp.gt(r28,#-1) r7:6 = #0 r15:14 = #0 } { r7:6 = sub(r7:6,r9:8,p3):carry p0 = !cmp.gt(r28,#-1) p1 = cmp.gt(r19,r18) if (p1.new) r19:18 = combine(r18,r19) } { r15:14 = sub(r15:14,r17:16,p3):carry if (p0) r9:8 = r7:6 r7:6 = #0 r19 = sub(r18,r19) } { if (p0) r17:16 = r15:14 p0 = cmp.gt(r19,#63) if (p1) r9:8 = r7:6 if (p1) r7:6 = r9:8 } { if (p1) r17:16 = r11:10 if (p1) r11:10 = r17:16 if (p0) r19 = add(r19,#-64) r28 = #63 } { if (p0) r7:6 = r11:10 r28 = asr(r11,#31) r13 = min(r19,r28) r12 = #0 } { if (p0) r11:10 = combine(r28,r28) r5:4 = extract(r7:6,r13:12) r7:6 = lsr(r7:6,r13) r12 = sub(#64,r13) } { r15:14 = #0 r28 = #-2 r7:6 |= lsl(r11:10,r12) r11:10 = asr(r11:10,r13) } { p3 = cmp.gtu(r5:4,r15:14) if (p3.new) r6 = and(r6,r28) r15:14 = #1 r5:4 = #0 } { r9:8 = add(r7:6,r9:8,p3):carry } { r17:16 = add(r11:10,r17:16,p3):carry r28 = #62 } { r12 = add(clb(r17:16),#-2) if (!cmp.eq(r12.new,r28)) jump:t 1f } { r11:10 = extractu(r9:8,#62,#2) r9:8 = asl(r9:8,#62) r18 = add(r18,#-62) } { r17:16 = insert(r11:10,#62,#0) } { r12 = add(clb(r17:16),#-2) } .falign 1: { r11:10 = asl(r17:16,r12) r5:4 |= asl(r9:8,r12) r13 = sub(#64,r12) r18 = sub(r18,r12) } { r11:10 |= lsr(r9:8,r13) p2 = cmp.gtu(r15:14,r5:4) r28 = #1023 +1023 -2 } { if (!p2) r10 = or(r10,r14) p0 = !cmp.gt(r18,r28) p0 = cmp.gt(r18,#1) if (!p0.new) jump:nt .Lfma_ovf_unf } { p0 = cmp.gtu(r15:14,r11:10) r1:0 = convert_d2df(r11:10) r18 = add(r18,#-1023 -60) r17:16 = memd(r29+#0) } { r1 += asl(r18,#20) r19:18 = memd(r29+#8) if (!p0) dealloc_return } .Ladd_yields_zero: { r28 = USR r1:0 = #0 } { r28 = extractu(r28,#2,#22) r17:16 = memd(r29+#0) r19:18 = memd(r29+#8) } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 dealloc_return } .Lfma_ovf_unf: { p0 = cmp.gtu(r15:14,r11:10) if (p0.new) jump:nt .Ladd_yields_zero } { r1:0 = convert_d2df(r11:10) r18 = add(r18,#-1023 -60) r28 = r18 } { r1 += asl(r18,#20) r7 = extractu(r1,#11,#20) } { r6 = add(r18,r7) r17:16 = memd(r29+#0) r19:18 = memd(r29+#8) r9:8 = abs(r11:10) } { p0 = cmp.gt(r6,##1023 +1023) if (p0.new) jump:nt .Lfma_ovf } { p0 = cmp.gt(r6,#0) if (p0.new) jump:nt .Lpossible_unf0 } { r7 = add(clb(r9:8),#-2) r6 = sub(#1+5,r28) p3 = cmp.gt(r11,#-1) } { r6 = add(r6,r7) r9:8 = asl(r9:8,r7) r1 = USR r28 = #63 } { r7 = min(r6,r28) r6 = #0 r0 = #0x0030 } { r3:2 = extractu(r9:8,r7:6) r9:8 = asr(r9:8,r7) } { p0 = cmp.gtu(r15:14,r3:2) if (!p0.new) r8 = or(r8,r14) r9 = setbit(r9,#20 +3) } { r11:10 = neg(r9:8) p1 = bitsclr(r8,#(1<<3)-1) if (!p1.new) r1 = or(r1,r0) r3:2 = #0 } { if (p3) r11:10 = r9:8 USR = r1 r28 = #-1023 -(52 +3) } { r1:0 = convert_d2df(r11:10) } { r1 += asl(r28,#20) dealloc_return } .Lpossible_unf0: { r28 = ##0x7fefffff r9:8 = abs(r11:10) } { p0 = cmp.eq(r0,#0) p0 = bitsclr(r1,r28) if (!p0.new) dealloc_return:t r28 = #0x7fff } { p0 = bitsset(r9,r28) r3 = USR r2 = #0x0030 } { if (p0) r3 = or(r3,r2) } { USR = r3 } { p0 = dfcmp.eq(r1:0,r1:0) dealloc_return } .Lfma_ovf: { r28 = USR r11:10 = combine(##0x7fefffff,#-1) r1:0 = r11:10 } { r9:8 = combine(##0x7ff00000,#0) r3 = extractu(r28,#2,#22) r28 = or(r28,#0x28) } { USR = r28 r3 ^= lsr(r1,#31) r2 = r3 } { p0 = !cmp.eq(r2,#1) p0 = !cmp.eq(r3,#2) } { p0 = dfcmp.eq(r9:8,r9:8) if (p0.new) r11:10 = r9:8 } { r1:0 = insert(r11:10,#63,#0) dealloc_return } .Lfma_abnormal_ab: { r9:8 = extractu(r1:0,#63,#0) r11:10 = extractu(r3:2,#63,#0) deallocframe } { p3 = cmp.gtu(r9:8,r11:10) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Lnan if (!p3) r9:8 = r11:10 if (!p3) r11:10 = r9:8 } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x0e) } { p0 = dfclass(r1:0,#0x08) p0 = dfclass(r3:2,#0x01) } { if (p1) jump .Lab_inf p2 = dfclass(r3:2,#0x01) } { if (p0) jump .Linvalid if (p2) jump .Lab_true_zero r28 = ##0x7c000000 } { p0 = bitsclr(r1,r28) if (p0.new) jump:nt .Lfma_ab_tiny } { r28 = add(clb(r11:10),#-11) } { r11:10 = asl(r11:10,r28) } { r3:2 = insert(r11:10,#63,#0) r1 -= asl(r28,#20) } jump fma .Lfma_ab_tiny: r9:8 = combine(##0x00100000,#0) { r1:0 = insert(r9:8,#63,#0) r3:2 = insert(r9:8,#63,#0) } jump fma .Lab_inf: { r3:2 = lsr(r3:2,#63) p0 = dfclass(r5:4,#0x10) } { r1:0 ^= asl(r3:2,#63) if (p0) jump .Lnan } { p1 = dfclass(r5:4,#0x08) if (p1.new) jump:nt .Lfma_inf_plus_inf } { jumpr r31 } .falign .Lfma_inf_plus_inf: { p0 = dfcmp.eq(r1:0,r5:4) if (!p0.new) jump:nt .Linvalid } { jumpr r31 } .Lnan: { p0 = dfclass(r3:2,#0x10) p1 = dfclass(r5:4,#0x10) if (!p0.new) r3:2 = r1:0 if (!p1.new) r5:4 = r1:0 } { r3 = convert_df2sf(r3:2) r2 = convert_df2sf(r5:4) } { r3 = convert_df2sf(r1:0) r1:0 = #-1 jumpr r31 } .Linvalid: { r28 = ##0x7f800001 } { r1:0 = convert_sf2df(r28) jumpr r31 } .Lab_true_zero: { p0 = dfclass(r5:4,#0x10) if (p0.new) jump:nt .Lnan if (p0.new) r1:0 = r5:4 } { p0 = dfcmp.eq(r3:2,r5:4) r1 = lsr(r1,#31) } { r3 ^= asl(r1,#31) if (!p0) r1:0 = r5:4 if (!p0) jumpr r31 } { p0 = cmp.eq(r3:2,r5:4) if (p0.new) jumpr:t r31 r1:0 = r3:2 } { r28 = USR } { r28 = extractu(r28,#2,#22) r1:0 = #0 } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 jumpr r31 } .falign .Lfma_abnormal_c: { p0 = dfclass(r5:4,#0x10) if (p0.new) jump:nt .Lnan if (p0.new) r1:0 = r5:4 deallocframe } { p0 = dfclass(r5:4,#0x08) if (p0.new) r1:0 = r5:4 if (p0.new) jumpr:nt r31 } { p0 = dfclass(r5:4,#0x01) if (p0.new) jump:nt __hexagon_muldf3 r28 = #1 } { allocframe(#32) r11:10 = #0 r5 = insert(r28,#11,#20) jump .Lfma_abnormal_c_restart } .size fma,.-fma
benwu25/daikon-rustc
4,337
library/compiler-builtins/compiler-builtins/src/hexagon/dfsqrt.s
.text .global __hexagon_sqrtdf2 .type __hexagon_sqrtdf2,@function .global __hexagon_sqrt .type __hexagon_sqrt,@function .global __qdsp_sqrtdf2 ; .set __qdsp_sqrtdf2, __hexagon_sqrtdf2; .type __qdsp_sqrtdf2,@function .global __qdsp_sqrt ; .set __qdsp_sqrt, __hexagon_sqrt; .type __qdsp_sqrt,@function .global __hexagon_fast_sqrtdf2 ; .set __hexagon_fast_sqrtdf2, __hexagon_sqrtdf2; .type __hexagon_fast_sqrtdf2,@function .global __hexagon_fast_sqrt ; .set __hexagon_fast_sqrt, __hexagon_sqrt; .type __hexagon_fast_sqrt,@function .global __hexagon_fast2_sqrtdf2 ; .set __hexagon_fast2_sqrtdf2, __hexagon_sqrtdf2; .type __hexagon_fast2_sqrtdf2,@function .global __hexagon_fast2_sqrt ; .set __hexagon_fast2_sqrt, __hexagon_sqrt; .type __hexagon_fast2_sqrt,@function .type sqrt,@function .p2align 5 __hexagon_sqrtdf2: __hexagon_sqrt: { r15:14 = extractu(r1:0,#23 +1,#52 -23) r28 = extractu(r1,#11,#52 -32) r5:4 = combine(##0x3f000004,#1) } { p2 = dfclass(r1:0,#0x02) p2 = cmp.gt(r1,#-1) if (!p2.new) jump:nt .Lsqrt_abnormal r9 = or(r5,r14) } .Ldenormal_restart: { r11:10 = r1:0 r7,p0 = sfinvsqrta(r9) r5 = and(r5,#-16) r3:2 = #0 } { r3 += sfmpy(r7,r9):lib r2 += sfmpy(r7,r5):lib r6 = r5 r9 = and(r28,#1) } { r6 -= sfmpy(r3,r2):lib r11 = insert(r4,#11 +1,#52 -32) p1 = cmp.gtu(r9,#0) } { r3 += sfmpy(r3,r6):lib r2 += sfmpy(r2,r6):lib r6 = r5 r9 = mux(p1,#8,#9) } { r6 -= sfmpy(r3,r2):lib r11:10 = asl(r11:10,r9) r9 = mux(p1,#3,#2) } { r2 += sfmpy(r2,r6):lib r15:14 = asl(r11:10,r9) } { r2 = and(r2,##0x007fffff) } { r2 = add(r2,##0x00800000 - 3) r9 = mux(p1,#7,#8) } { r8 = asl(r2,r9) r9 = mux(p1,#15-(1+1),#15-(1+0)) } { r13:12 = mpyu(r8,r15) } { r1:0 = asl(r11:10,#15) r15:14 = mpyu(r13,r13) p1 = cmp.eq(r0,r0) } { r1:0 -= asl(r15:14,#15) r15:14 = mpyu(r13,r12) p2 = cmp.eq(r0,r0) } { r1:0 -= lsr(r15:14,#16) p3 = cmp.eq(r0,r0) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) r9 = add(r9,#16) r1:0 = asl(r11:10,#31) } { r15:14 = mpyu(r13,r13) r1:0 -= mpyu(r13,r12) } { r1:0 -= asl(r15:14,#31) r15:14 = mpyu(r12,r12) } { r1:0 -= lsr(r15:14,#33) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) r9 = add(r9,#16) r1:0 = asl(r11:10,#47) } { r15:14 = mpyu(r13,r13) } { r1:0 -= asl(r15:14,#47) r15:14 = mpyu(r13,r12) } { r1:0 -= asl(r15:14,#16) r15:14 = mpyu(r12,r12) } { r1:0 -= lsr(r15:14,#17) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) } { r3:2 = mpyu(r13,r12) r5:4 = mpyu(r12,r12) r15:14 = #0 r1:0 = #0 } { r3:2 += lsr(r5:4,#33) r5:4 += asl(r3:2,#33) p1 = cmp.eq(r0,r0) } { r7:6 = mpyu(r13,r13) r1:0 = sub(r1:0,r5:4,p1):carry r9:8 = #1 } { r7:6 += lsr(r3:2,#31) r9:8 += asl(r13:12,#1) } { r15:14 = sub(r11:10,r7:6,p1):carry r5:4 = sub(r1:0,r9:8,p2):carry r7:6 = #1 r11:10 = #0 } { r3:2 = sub(r15:14,r11:10,p2):carry r7:6 = add(r13:12,r7:6) r28 = add(r28,#-0x3ff) } { if (p2) r13:12 = r7:6 if (p2) r1:0 = r5:4 if (p2) r15:14 = r3:2 } { r5:4 = sub(r1:0,r9:8,p3):carry r7:6 = #1 r28 = asr(r28,#1) } { r3:2 = sub(r15:14,r11:10,p3):carry r7:6 = add(r13:12,r7:6) } { if (p3) r13:12 = r7:6 if (p3) r1:0 = r5:4 r2 = #1 } { p0 = cmp.eq(r1:0,r11:10) if (!p0.new) r12 = or(r12,r2) r3 = cl0(r13:12) r28 = add(r28,#-63) } { r1:0 = convert_ud2df(r13:12) r28 = add(r28,r3) } { r1 += asl(r28,#52 -32) jumpr r31 } .Lsqrt_abnormal: { p0 = dfclass(r1:0,#0x01) if (p0.new) jumpr:t r31 } { p0 = dfclass(r1:0,#0x10) if (p0.new) jump:nt .Lsqrt_nan } { p0 = cmp.gt(r1,#-1) if (!p0.new) jump:nt .Lsqrt_invalid_neg if (!p0.new) r28 = ##0x7F800001 } { p0 = dfclass(r1:0,#0x08) if (p0.new) jumpr:nt r31 } { r1:0 = extractu(r1:0,#52,#0) } { r28 = add(clb(r1:0),#-11) } { r1:0 = asl(r1:0,r28) r28 = sub(#1,r28) } { r1 = insert(r28,#1,#52 -32) } { r3:2 = extractu(r1:0,#23 +1,#52 -23) r5 = ##0x3f000004 } { r9 = or(r5,r2) r5 = and(r5,#-16) jump .Ldenormal_restart } .Lsqrt_nan: { r28 = convert_df2sf(r1:0) r1:0 = #-1 jumpr r31 } .Lsqrt_invalid_neg: { r1:0 = convert_sf2df(r28) jumpr r31 } .size __hexagon_sqrt,.-__hexagon_sqrt .size __hexagon_sqrtdf2,.-__hexagon_sqrtdf2
benwu25/daikon-rustc
825
library/compiler-builtins/compiler-builtins/src/hexagon/moddi3.s
FUNCTION_BEGIN __hexagon_moddi3 { p3 = tstbit(r1,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_moddi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_moddi3_return: { r1:0 = neg(r3:2) } { r1:0 = vmux(p3,r1:0,r3:2) jumpr r31 } FUNCTION_END __hexagon_moddi3 .globl __qdsp_moddi3 .set __qdsp_moddi3, __hexagon_moddi3
benwu25/daikon-rustc
864
library/compiler-builtins/compiler-builtins/src/hexagon/divdi3.s
FUNCTION_BEGIN __hexagon_divdi3 { p2 = tstbit(r1,#31) p3 = tstbit(r3,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { p3 = xor(p2,p3) r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_divdi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_divdi3_return: { r3:2 = neg(r1:0) } { r1:0 = vmux(p3,r3:2,r1:0) jumpr r31 } FUNCTION_END __hexagon_divdi3 .globl __qdsp_divdi3 .set __qdsp_divdi3, __hexagon_divdi3
benwu25/daikon-rustc
543
library/compiler-builtins/compiler-builtins/src/hexagon/udivsi3.s
FUNCTION_BEGIN __hexagon_udivsi3 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r0 = add(r0,r3) jumpr r31 } FUNCTION_END __hexagon_udivsi3 .globl __qdsp_udivsi3 .set __qdsp_udivsi3, __hexagon_udivsi3
benwu25/daikon-rustc
764
library/compiler-builtins/compiler-builtins/src/hexagon/memcpy_likely_aligned.s
FUNCTION_BEGIN __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes { p0 = bitsclr(r1,#7) p0 = bitsclr(r0,#7) if (p0.new) r5:4 = memd(r1) r3 = #-3 } { if (!p0) jump .Lmemcpy_call if (p0) memd(r0++#8) = r5:4 if (p0) r5:4 = memd(r1+#8) r3 += lsr(r2,#3) } { memd(r0++#8) = r5:4 r5:4 = memd(r1+#16) r1 = add(r1,#24) loop0(1f,r3) } .falign 1: { memd(r0++#8) = r5:4 r5:4 = memd(r1++#8) }:endloop0 { memd(r0) = r5:4 r0 -= add(r2,#-8) jumpr r31 } FUNCTION_END __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes .Lmemcpy_call: jump memcpy@PLT .globl __qdsp_memcpy_likely_aligned_min32bytes_mult8bytes .set __qdsp_memcpy_likely_aligned_min32bytes_mult8bytes, __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes
benwu25/daikon-rustc
5,120
library/compiler-builtins/compiler-builtins/src/hexagon/fastmath2_dlib_asm.s
.text .global __hexagon_fast2_dadd_asm .type __hexagon_fast2_dadd_asm, @function __hexagon_fast2_dadd_asm: .falign { R7:6 = VABSDIFFH(R1:0, R3:2) R9 = #62 R4 = SXTH(R0) R5 = SXTH(R2) } { R6 = SXTH(R6) P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { if ( P0) R4 = #1 if (!P0) R5 = #1 R0.L = #0 R6 = MIN(R6, R9) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) R2.L = #0 R11:10 = #0 } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = add(R1:0, R3:2) R10.L = #0x8001 } { R4 = clb(R1:0) R9 = #58 } { R4 = add(R4, #-1) p0 = cmp.gt(R4, R9) } { R1:0 = ASL(R1:0, R4) R8 = SUB(R8, R4) if(p0) jump .Ldenorma } { R0 = insert(R8, #16, #0) jumpr r31 } .Ldenorma: { R1:0 = R11:10 jumpr r31 } .text .global __hexagon_fast2_dsub_asm .type __hexagon_fast2_dsub_asm, @function __hexagon_fast2_dsub_asm: .falign { R7:6 = VABSDIFFH(R1:0, R3:2) R9 = #62 R4 = SXTH(R0) R5 = SXTH(R2) } { R6 = SXTH(R6) P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { if ( P0) R4 = #1 if (!P0) R5 = #1 R0.L = #0 R6 = MIN(R6, R9) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) R2.L = #0 R11:10 = #0 } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = sub(R1:0, R3:2) R10.L = #0x8001 } { R4 = clb(R1:0) R9 = #58 } { R4 = add(R4, #-1) p0 = cmp.gt(R4, R9) } { R1:0 = ASL(R1:0, R4) R8 = SUB(R8, R4) if(p0) jump .Ldenorm } { R0 = insert(R8, #16, #0) jumpr r31 } .Ldenorm: { R1:0 = R11:10 jumpr r31 } .text .global __hexagon_fast2_dmpy_asm .type __hexagon_fast2_dmpy_asm, @function __hexagon_fast2_dmpy_asm: .falign { R13= lsr(R2, #16) R5 = sxth(R2) R4 = sxth(R0) R12= lsr(R0, #16) } { R11:10 = mpy(R1, R3) R7:6 = mpy(R1, R13) R0.L = #0x0 R15:14 = #0 } { R11:10 = add(R11:10, R11:10) R7:6 += mpy(R3, R12) R2.L = #0x0 R15.H = #0x8000 } { R7:6 = asr(R7:6, #15) R12.L = #0x8001 p1 = cmp.eq(R1:0, R3:2) } { R7:6 = add(R7:6, R11:10) R8 = add(R4, R5) p2 = cmp.eq(R1:0, R15:14) } { R9 = clb(R7:6) R3:2 = abs(R7:6) R11 = #58 } { p1 = and(p1, p2) R8 = sub(R8, R9) R9 = add(R9, #-1) p0 = cmp.gt(R9, R11) } { R8 = add(R8, #1) R1:0 = asl(R7:6, R9) if(p1) jump .Lsat } { R0 = insert(R8,#16, #0) if(!p0) jumpr r31 } { R0 = insert(R12,#16, #0) jumpr r31 } .Lsat: { R1:0 = #-1 } { R1:0 = lsr(R1:0, #1) } { R0 = insert(R8,#16, #0) jumpr r31 } .text .global __hexagon_fast2_qd2f_asm .type __hexagon_fast2_qd2f_asm, @function __hexagon_fast2_qd2f_asm: .falign { R3 = abs(R1):sat R4 = sxth(R0) R5 = #0x40 R6.L = #0xffc0 } { R0 = extractu(R3, #8, #0) p2 = cmp.gt(R4, #126) p3 = cmp.ge(R4, #-126) R6.H = #0x7fff } { p1 = cmp.eq(R0,#0x40) if(p1.new) R5 = #0 R4 = add(R4, #126) if(!p3) jump .Lmin } { p0 = bitsset(R3, R6) R0.L = #0x0000 R2 = add(R3, R5) R7 = lsr(R6, #8) } { if(p0) R4 = add(R4, #1) if(p0) R3 = #0 R2 = lsr(R2, #7) R0.H = #0x8000 } { R0 = and(R0, R1) R6 &= asl(R4, #23) if(!p0) R3 = and(R2, R7) if(p2) jump .Lmax } { R0 += add(R6, R3) jumpr r31 } .Lmax: { R0.L = #0xffff; } { R0.H = #0x7f7f; jumpr r31 } .Lmin: { R0 = #0x0 jumpr r31 } .text .global __hexagon_fast2_f2qd_asm .type __hexagon_fast2_f2qd_asm, @function __hexagon_fast2_f2qd_asm: .falign { R1 = asl(R0, #7) p0 = tstbit(R0, #31) R5:4 = #0 R3 = add(R0,R0) } { R1 = setbit(R1, #30) R0= extractu(R0,#8,#23) R4.L = #0x8001 p1 = cmp.eq(R3, #0) } { R1= extractu(R1, #31, #0) R0= add(R0, #-126) R2 = #0 if(p1) jump .Lminqd } { R0 = zxth(R0) if(p0) R1= sub(R2, R1) jumpr r31 } .Lminqd: { R1:0 = R5:4 jumpr r31 }
benwu25/daikon-rustc
736
library/compiler-builtins/compiler-builtins/src/hexagon/divsi3.s
FUNCTION_BEGIN __hexagon_divsi3 { p0 = cmp.ge(r0,#0) p1 = cmp.ge(r1,#0) r1 = abs(r0) r2 = abs(r1) } { r3 = cl0(r1) r4 = cl0(r2) r5 = sub(r1,r2) p2 = cmp.gtu(r2,r1) } { r0 = #0 p1 = xor(p0,p1) p0 = cmp.gtu(r2,r5) if (p2) jumpr r31 } { r0 = mux(p1,#-1,#1) if (p0) jumpr r31 r4 = sub(r4,r3) r3 = #1 } { r0 = #0 r3:2 = vlslw(r3:2,r4) loop0(1f,r4) } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r0 = add(r0,r3) if (!p1) jumpr r31 } { r0 = neg(r0) jumpr r31 } FUNCTION_END __hexagon_divsi3 .globl __qdsp_divsi3 .set __qdsp_divsi3, __hexagon_divsi3
benwu25/daikon-rustc
1,295
library/compiler-builtins/compiler-builtins/src/hexagon/memcpy_forward_vp4cp4n2.s
.text .globl hexagon_memcpy_forward_vp4cp4n2 .balign 32 .type hexagon_memcpy_forward_vp4cp4n2,@function hexagon_memcpy_forward_vp4cp4n2: { r3 = sub(##4096, r1) r5 = lsr(r2, #3) } { r3 = extractu(r3, #10, #2) r4 = extractu(r3, #7, #5) } { r3 = minu(r2, r3) r4 = minu(r5, r4) } { r4 = or(r4, ##2105344) p0 = cmp.eq(r3, #0) if (p0.new) jump:nt .Lskipprolog } l2fetch(r1, r4) { loop0(.Lprolog, r3) r2 = sub(r2, r3) } .falign .Lprolog: { r4 = memw(r1++#4) memw(r0++#4) = r4.new } :endloop0 .Lskipprolog: { r3 = lsr(r2, #10) if (cmp.eq(r3.new, #0)) jump:nt .Lskipmain } { loop1(.Lout, r3) r2 = extractu(r2, #10, #0) r3 = ##2105472 } .falign .Lout: l2fetch(r1, r3) loop0(.Lpage, #512) .falign .Lpage: r5:4 = memd(r1++#8) { memw(r0++#8) = r4 memw(r0+#4) = r5 } :endloop0:endloop1 .Lskipmain: { r3 = ##2105344 r4 = lsr(r2, #3) p0 = cmp.eq(r2, #0) if (p0.new) jumpr:nt r31 } { r3 = or(r3, r4) loop0(.Lepilog, r2) } l2fetch(r1, r3) .falign .Lepilog: { r4 = memw(r1++#4) memw(r0++#4) = r4.new } :endloop0 jumpr r31 .size hexagon_memcpy_forward_vp4cp4n2, . - hexagon_memcpy_forward_vp4cp4n2
benwu25/daikon-rustc
721
library/compiler-builtins/compiler-builtins/src/hexagon/umoddi3.s
FUNCTION_BEGIN __hexagon_umoddi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_umoddi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_umoddi3_return: { r1:0 = r3:2 jumpr r31 } FUNCTION_END __hexagon_umoddi3 .globl __qdsp_umoddi3 .set __qdsp_umoddi3, __hexagon_umoddi3
benwu25/daikon-rustc
632
library/compiler-builtins/compiler-builtins/src/hexagon/udivmodsi4.s
FUNCTION_BEGIN __hexagon_udivmodsi4 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) p0 = cmp.eq(r6,#0) if (p0.new) r4 = #0 } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r4) if (!p0.new) r0 = add(r0,r3) jumpr r31 } FUNCTION_END __hexagon_udivmodsi4 .globl __qdsp_udivmodsi4 .set __qdsp_udivmodsi4, __hexagon_udivmodsi4
benwu25/daikon-rustc
833
library/compiler-builtins/compiler-builtins/src/hexagon/dfminmax.s
.text .global __hexagon_mindf3 .global __hexagon_maxdf3 .type __hexagon_mindf3,@function .type __hexagon_maxdf3,@function .global __qdsp_mindf3 ; .set __qdsp_mindf3, __hexagon_mindf3 .global __qdsp_maxdf3 ; .set __qdsp_maxdf3, __hexagon_maxdf3 .p2align 5 __hexagon_mindf3: { p0 = dfclass(r1:0,#0x10) p1 = dfcmp.gt(r1:0,r3:2) r5:4 = r1:0 } { if (p0) r1:0 = r3:2 if (p1) r1:0 = r3:2 p2 = dfcmp.eq(r1:0,r3:2) if (!p2.new) jumpr:t r31 } { r1:0 = or(r5:4,r3:2) jumpr r31 } .size __hexagon_mindf3,.-__hexagon_mindf3 .falign __hexagon_maxdf3: { p0 = dfclass(r1:0,#0x10) p1 = dfcmp.gt(r3:2,r1:0) r5:4 = r1:0 } { if (p0) r1:0 = r3:2 if (p1) r1:0 = r3:2 p2 = dfcmp.eq(r1:0,r3:2) if (!p2.new) jumpr:t r31 } { r1:0 = and(r5:4,r3:2) jumpr r31 } .size __hexagon_maxdf3,.-__hexagon_maxdf3
benwu25/daikon-rustc
3,885
library/compiler-builtins/compiler-builtins/src/hexagon/fastmath2_ldlib_asm.s
.text .global __hexagon_fast2ldadd_asm .type __hexagon_fast2ldadd_asm, @function __hexagon_fast2ldadd_asm: .falign { R4 = memw(r29+#8) R5 = memw(r29+#24) r7 = r0 } { R6 = sub(R4, R5):sat P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { R6 = abs(R6):sat if ( P0) R4 = #1 if (!P0) R5 = #1 R9 = #62 } { R6 = MIN(R6, R9) R1:0 = memd(r29+#0) R3:2 = memd(r29+#16) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = add(R1:0, R3:2) R3:2 = #0 } { R4 = clb(R1:0) R9.L =#0x0001 } { R8 -= add(R4, #-1) R4 = add(R4, #-1) p0 = cmp.gt(R4, #58) R9.H =#0x8000 } { if(!p0)memw(r7+#8) = R8 R1:0 = ASL(R1:0, R4) if(p0) jump .Ldenorma1 } { memd(r7+#0) = R1:0 jumpr r31 } .Ldenorma1: memd(r7+#0) = R3:2 { memw(r7+#8) = R9 jumpr r31 } .text .global __hexagon_fast2ldsub_asm .type __hexagon_fast2ldsub_asm, @function __hexagon_fast2ldsub_asm: .falign { R4 = memw(r29+#8) R5 = memw(r29+#24) r7 = r0 } { R6 = sub(R4, R5):sat P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { R6 = abs(R6):sat if ( P0) R4 = #1 if (!P0) R5 = #1 R9 = #62 } { R6 = min(R6, R9) R1:0 = memd(r29+#0) R3:2 = memd(r29+#16) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = sub(R1:0, R3:2) R3:2 = #0 } { R4 = clb(R1:0) R9.L =#0x0001 } { R8 -= add(R4, #-1) R4 = add(R4, #-1) p0 = cmp.gt(R4, #58) R9.H =#0x8000 } { if(!p0)memw(r7+#8) = R8 R1:0 = asl(R1:0, R4) if(p0) jump .Ldenorma_s } { memd(r7+#0) = R1:0 jumpr r31 } .Ldenorma_s: memd(r7+#0) = R3:2 { memw(r7+#8) = R9 jumpr r31 } .text .global __hexagon_fast2ldmpy_asm .type __hexagon_fast2ldmpy_asm, @function __hexagon_fast2ldmpy_asm: .falign { R15:14 = memd(r29+#0) R3:2 = memd(r29+#16) R13:12 = #0 } { R8= extractu(R2, #31, #1) R9= extractu(R14, #31, #1) R13.H = #0x8000 } { R11:10 = mpy(R15, R3) R7:6 = mpy(R15, R8) R4 = memw(r29+#8) R5 = memw(r29+#24) } { R11:10 = add(R11:10, R11:10) R7:6 += mpy(R3, R9) } { R7:6 = asr(R7:6, #30) R8.L = #0x0001 p1 = cmp.eq(R15:14, R3:2) } { R7:6 = add(R7:6, R11:10) R4= add(R4, R5) p2 = cmp.eq(R3:2, R13:12) } { R9 = clb(R7:6) R8.H = #0x8000 p1 = and(p1, p2) } { R4-= add(R9, #-1) R9 = add(R9, #-1) if(p1) jump .Lsat1 } { R7:6 = asl(R7:6, R9) memw(R0+#8) = R4 p0 = cmp.gt(R9, #58) if(p0.new) jump:NT .Ldenorm1 } { memd(R0+#0) = R7:6 jumpr r31 } .Lsat1: { R13:12 = #0 R4+= add(R9, #1) } { R13.H = #0x4000 memw(R0+#8) = R4 } { memd(R0+#0) = R13:12 jumpr r31 } .Ldenorm1: { memw(R0+#8) = R8 R15:14 = #0 } { memd(R0+#0) = R15:14 jumpr r31 }
benwu25/daikon-rustc
872
library/compiler-builtins/compiler-builtins/src/hexagon/sfsqrt_opt.s
FUNCTION_BEGIN __hexagon_sqrtf { r3,p0 = sfinvsqrta(r0) r5 = sffixupr(r0) r4 = ##0x3f000000 r1:0 = combine(#0,#0) } { r0 += sfmpy(r3,r5):lib r1 += sfmpy(r3,r4):lib r2 = r4 r3 = r5 } { r2 -= sfmpy(r0,r1):lib p1 = sfclass(r5,#1) } { r0 += sfmpy(r0,r2):lib r1 += sfmpy(r1,r2):lib r2 = r4 r3 = r5 } { r2 -= sfmpy(r0,r1):lib r3 -= sfmpy(r0,r0):lib } { r0 += sfmpy(r1,r3):lib r1 += sfmpy(r1,r2):lib r2 = r4 r3 = r5 } { r3 -= sfmpy(r0,r0):lib if (p1) r0 = or(r0,r5) } { r0 += sfmpy(r1,r3,p0):scale jumpr r31 } FUNCTION_END __hexagon_sqrtf .global __qdsp_sqrtf ; .set __qdsp_sqrtf, __hexagon_sqrtf .global __hexagon_fast_sqrtf ; .set __hexagon_fast_sqrtf, __hexagon_sqrtf .global __hexagon_fast2_sqrtf ; .set __hexagon_fast2_sqrtf, __hexagon_sqrtf
benwu25/daikon-rustc
11,809
library/std/src/sys/pal/sgx/abi/entry.S
/* This symbol is used at runtime to figure out the virtual address that the */ /* enclave is loaded at. */ .section absolute .global IMAGE_BASE IMAGE_BASE: .section ".note.x86_64-fortanix-unknown-sgx", "", @note .align 4 .long 1f - 0f /* name length (not including padding) */ .long 3f - 2f /* desc length (not including padding) */ .long 1 /* type = NT_VERSION */ 0: .asciz "toolchain-version" /* name */ 1: .align 4 2: .long 1 /* desc - toolchain version number, 32-bit LE */ 3: .align 4 .section .rodata /* The XSAVE area needs to be a large chunk of readable memory, but since we are */ /* going to restore everything to its initial state (XSTATE_BV=0), only certain */ /* parts need to have a defined value. In particular: */ /* */ /* * MXCSR in the legacy area. This register is always restored if RFBM[1] or */ /* RFBM[2] is set, regardless of the value of XSTATE_BV */ /* * XSAVE header */ .align 64 .Lxsave_clear: .org .+24 .Lxsave_mxcsr: .short 0x1fbf /* We can store a bunch of data in the gap between MXCSR and the XSAVE header */ /* The following symbols point at read-only data that will be filled in by the */ /* post-linker. */ /* When using this macro, don't forget to adjust the linker version script! */ .macro globvar name:req size:req .global \name .protected \name .align \size .size \name , \size \name : .org .+\size .endm /* The base address (relative to enclave start) of the heap area */ globvar HEAP_BASE 8 /* The heap size in bytes */ globvar HEAP_SIZE 8 /* Value of the RELA entry in the dynamic table */ globvar RELA 8 /* Value of the RELACOUNT entry in the dynamic table */ globvar RELACOUNT 8 /* The enclave size in bytes */ globvar ENCLAVE_SIZE 8 /* The base address (relative to enclave start) of the enclave configuration area */ globvar CFGDATA_BASE 8 /* Non-zero if debugging is enabled, zero otherwise */ globvar DEBUG 1 /* The base address (relative to enclave start) of the enclave text section */ globvar TEXT_BASE 8 /* The size in bytes of enclave text section */ globvar TEXT_SIZE 8 /* The base address (relative to enclave start) of the enclave .eh_frame_hdr section */ globvar EH_FRM_HDR_OFFSET 8 /* The size in bytes of enclave .eh_frame_hdr section */ globvar EH_FRM_HDR_LEN 8 /* The base address (relative to enclave start) of the enclave .eh_frame section */ globvar EH_FRM_OFFSET 8 /* The size in bytes of enclave .eh_frame section */ globvar EH_FRM_LEN 8 .org .Lxsave_clear+512 .Lxsave_header: .int 0, 0 /* XSTATE_BV */ .int 0, 0 /* XCOMP_BV */ .org .+48 /* reserved bits */ .data .Laborted: .byte 0 /* TCS local storage section */ .equ tcsls_tos, 0x00 /* initialized by loader to *offset* from image base to TOS */ .equ tcsls_flags, 0x08 /* initialized by loader */ .equ tcsls_flag_secondary, 0 /* initialized by loader; 0 = standard TCS, 1 = secondary TCS */ .equ tcsls_flag_init_once, 1 /* initialized by loader to 0 */ /* 14 unused bits */ .equ tcsls_user_fcw, 0x0a .equ tcsls_user_mxcsr, 0x0c .equ tcsls_last_rsp, 0x10 /* initialized by loader to 0 */ .equ tcsls_panic_last_rsp, 0x18 /* initialized by loader to 0 */ .equ tcsls_debug_panic_buf_ptr, 0x20 /* initialized by loader to 0 */ .equ tcsls_user_rsp, 0x28 .equ tcsls_user_retip, 0x30 .equ tcsls_user_rbp, 0x38 .equ tcsls_user_r12, 0x40 .equ tcsls_user_r13, 0x48 .equ tcsls_user_r14, 0x50 .equ tcsls_user_r15, 0x58 .equ tcsls_tls_ptr, 0x60 .equ tcsls_tcs_addr, 0x68 .macro load_tcsls_flag_secondary_bool reg:req comments:vararg .ifne tcsls_flag_secondary /* to convert to a bool, must be the first bit */ .abort .endif mov $(1<<tcsls_flag_secondary),%e\reg and %gs:tcsls_flags,%\reg .endm /* We place the ELF entry point in a separate section so it can be removed by elf2sgxs */ .section .text_no_sgx, "ax" .Lelf_entry_error_msg: .ascii "Error: This file is an SGX enclave which cannot be executed as a standard Linux binary.\nSee the installation guide at https://edp.fortanix.com/docs/installation/guide/ on how to use 'cargo run' or follow the steps at https://edp.fortanix.com/docs/tasks/deployment/ for manual deployment.\n" .Lelf_entry_error_msg_end: .global elf_entry .type elf_entry,function elf_entry: /* print error message */ movq $2,%rdi /* write to stderr (fd 2) */ lea .Lelf_entry_error_msg(%rip),%rsi movq $.Lelf_entry_error_msg_end-.Lelf_entry_error_msg,%rdx .Lelf_entry_call: movq $1,%rax /* write() syscall */ syscall test %rax,%rax jle .Lelf_exit /* exit on error */ add %rax,%rsi sub %rax,%rdx /* all chars written? */ jnz .Lelf_entry_call .Lelf_exit: movq $60,%rax /* exit() syscall */ movq $1,%rdi /* exit code 1 */ syscall ud2 /* should not be reached */ /* end elf_entry */ /* This code needs to be called *after* the enclave stack has been setup. */ /* There are 3 places where this needs to happen, so this is put in a macro. */ .macro entry_sanitize_final /* Sanitize rflags received from user */ /* - DF flag: x86-64 ABI requires DF to be unset at function entry/exit */ /* - AC flag: AEX on misaligned memory accesses leaks side channel info */ pushfq andq $~0x40400, (%rsp) popfq /* check for abort */ bt $0,.Laborted(%rip) jc .Lreentry_panic .endm .text .global sgx_entry .type sgx_entry,function sgx_entry: /* save user registers */ mov %rcx,%gs:tcsls_user_retip mov %rsp,%gs:tcsls_user_rsp mov %rbp,%gs:tcsls_user_rbp mov %r12,%gs:tcsls_user_r12 mov %r13,%gs:tcsls_user_r13 mov %r14,%gs:tcsls_user_r14 mov %r15,%gs:tcsls_user_r15 mov %rbx,%gs:tcsls_tcs_addr stmxcsr %gs:tcsls_user_mxcsr fnstcw %gs:tcsls_user_fcw /* check for debug buffer pointer */ testb $0xff,DEBUG(%rip) jz .Lskip_debug_init mov %r10,%gs:tcsls_debug_panic_buf_ptr .Lskip_debug_init: /* reset cpu state */ mov %rdx, %r10 mov $-1, %rax mov $-1, %rdx xrstor .Lxsave_clear(%rip) lfence mov %r10, %rdx /* check if returning from usercall */ mov %gs:tcsls_last_rsp,%r11 test %r11,%r11 jnz .Lusercall_ret /* setup stack */ mov %gs:tcsls_tos,%rsp /* initially, RSP is not set to the correct value */ /* here. This is fixed below under "adjust stack". */ /* check for thread init */ bts $tcsls_flag_init_once,%gs:tcsls_flags jc .Lskip_init /* adjust stack */ lea IMAGE_BASE(%rip),%rax add %rax,%rsp mov %rsp,%gs:tcsls_tos entry_sanitize_final /* call tcs_init */ /* store caller-saved registers in callee-saved registers */ mov %rdi,%rbx mov %rsi,%r12 mov %rdx,%r13 mov %r8,%r14 mov %r9,%r15 load_tcsls_flag_secondary_bool di /* RDI = tcs_init() argument: secondary: bool */ call tcs_init /* reload caller-saved registers */ mov %rbx,%rdi mov %r12,%rsi mov %r13,%rdx mov %r14,%r8 mov %r15,%r9 jmp .Lafter_init .Lskip_init: entry_sanitize_final .Lafter_init: /* call into main entry point */ load_tcsls_flag_secondary_bool cx /* RCX = entry() argument: secondary: bool */ call entry /* RDI, RSI, RDX, R8, R9 passed in from userspace */ mov %rax,%rsi /* RSI = return value */ /* NOP: mov %rdx,%rdx */ /* RDX = return value */ xor %rdi,%rdi /* RDI = normal exit */ .Lexit: /* clear general purpose register state */ /* RAX overwritten by ENCLU */ /* RBX set later */ /* RCX overwritten by ENCLU */ /* RDX contains return value */ /* RSP set later */ /* RBP set later */ /* RDI contains exit mode */ /* RSI contains return value */ xor %r8,%r8 xor %r9,%r9 xor %r10,%r10 xor %r11,%r11 /* R12 ~ R15 set by sgx_exit */ .Lsgx_exit: /* clear extended register state */ mov %rdx, %rcx /* save RDX */ mov $-1, %rax mov %rax, %rdx xrstor .Lxsave_clear(%rip) mov %rcx, %rdx /* restore RDX */ /* clear flags */ pushq $0 popfq /* restore user registers */ mov %gs:tcsls_user_r12,%r12 mov %gs:tcsls_user_r13,%r13 mov %gs:tcsls_user_r14,%r14 mov %gs:tcsls_user_r15,%r15 mov %gs:tcsls_user_retip,%rbx mov %gs:tcsls_user_rsp,%rsp mov %gs:tcsls_user_rbp,%rbp fldcw %gs:tcsls_user_fcw ldmxcsr %gs:tcsls_user_mxcsr /* exit enclave */ mov $0x4,%eax /* EEXIT */ enclu /* end sgx_entry */ .Lreentry_panic: orq $8,%rsp jmp abort_reentry /* This *MUST* be called with 6 parameters, otherwise register information */ /* might leak! */ .global usercall usercall: test %rcx,%rcx /* check `abort` function argument */ jnz .Lusercall_abort /* abort is set, jump to abort code (unlikely forward conditional) */ jmp .Lusercall_save_state /* non-aborting usercall */ .Lusercall_abort: /* set aborted bit */ movb $1,.Laborted(%rip) /* save registers in DEBUG mode, so that debugger can reconstruct the stack */ testb $0xff,DEBUG(%rip) jz .Lusercall_noreturn .Lusercall_save_state: /* save callee-saved state */ push %r15 push %r14 push %r13 push %r12 push %rbp push %rbx sub $8, %rsp fstcw 4(%rsp) stmxcsr (%rsp) movq %rsp,%gs:tcsls_last_rsp .Lusercall_noreturn: /* clear general purpose register state */ /* RAX overwritten by ENCLU */ /* RBX set by sgx_exit */ /* RCX overwritten by ENCLU */ /* RDX contains parameter */ /* RSP set by sgx_exit */ /* RBP set by sgx_exit */ /* RDI contains parameter */ /* RSI contains parameter */ /* R8 contains parameter */ /* R9 contains parameter */ xor %r10,%r10 xor %r11,%r11 /* R12 ~ R15 set by sgx_exit */ /* extended registers/flags cleared by sgx_exit */ /* exit */ jmp .Lsgx_exit .Lusercall_ret: movq $0,%gs:tcsls_last_rsp /* restore callee-saved state, cf. "save" above */ mov %r11,%rsp /* MCDT mitigation requires an lfence after ldmxcsr _before_ any of the affected */ /* vector instructions is used. We omit the lfence here as one is required before */ /* the jmp instruction anyway. */ ldmxcsr (%rsp) fldcw 4(%rsp) add $8, %rsp entry_sanitize_final pop %rbx pop %rbp pop %r12 pop %r13 pop %r14 pop %r15 /* return */ mov %rsi,%rax /* RAX = return value */ /* NOP: mov %rdx,%rdx */ /* RDX = return value */ pop %r11 lfence jmp *%r11 /* The following functions need to be defined externally: ``` // Called by entry code on re-entry after exit extern "C" fn abort_reentry() -> !; // Called once when a TCS is first entered extern "C" fn tcs_init(secondary: bool); // Standard TCS entrypoint extern "C" fn entry(p1: u64, p2: u64, p3: u64, secondary: bool, p4: u64, p5: u64) -> (u64, u64); ``` */ .global get_tcs_addr get_tcs_addr: mov %gs:tcsls_tcs_addr,%rax pop %r11 lfence jmp *%r11 .global get_tls_ptr get_tls_ptr: mov %gs:tcsls_tls_ptr,%rax pop %r11 lfence jmp *%r11 .global set_tls_ptr set_tls_ptr: mov %rdi,%gs:tcsls_tls_ptr pop %r11 lfence jmp *%r11 .global take_debug_panic_buf_ptr take_debug_panic_buf_ptr: xor %rax,%rax xchg %gs:tcsls_debug_panic_buf_ptr,%rax pop %r11 lfence jmp *%r11
benwu25/daikon-rustc
79
tests/ui/asm/named-asm-labels.s
lab1: nop // do more things lab2: nop // does bar // a: b lab3: nop; lab4: nop
benwu25/daikon-rustc
29
tests/codegen-llvm/asm/foo.s
.global foo foo: jmp baz
benwu25/daikon-rustc
136
tests/run-make/x86_64-fortanix-unknown-sgx-lvi/enclave/foo_asm.s
.text .global cc_plus_one_asm .type cc_plus_one_asm, @function cc_plus_one_asm: movl (%rdi), %eax inc %eax retq
benwu25/daikon-rustc
145
tests/run-make/x86_64-fortanix-unknown-sgx-lvi/enclave/libcmake_foo/src/foo_asm.s
.text .global cmake_plus_one_asm .type cmake_plus_one_asm, @function cmake_plus_one_asm: movl (%rdi), %eax inc %eax retq
bgallois/hypervisor_test
1,153
src/host_entrypoint.S
.intel_syntax noprefix .global _guest_first_entry _guest_first_entry: lea rdi, [rip+.guest_enters_here] mov rax, 0x0000681e // vmwrite Guest rip vmwrite rax, rdi jc .errorc jz .errorz mov rdi, rsp mov rax, 0x0000681c // vmwrite Guest rsp vmwrite rax, rdi jc .errorc jz .errorz vmlaunch jc .errorc jz .errorz .errorz: mov rax, 1 ret .errorc: mov rax, 2 ret .guest_enters_here: xor rax, rax cpuid hlt .global host_entrypoint host_entrypoint: push rax push rbx push rcx push rdx push rbp push rsi push rdi push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 call handle_vm_exit pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop rdi pop rsi pop rbp pop rdx pop rcx pop rbx pop rax vmresume push rax push rbx push rcx push rdx push rbp push rsi push rdi push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 mov rcx, rsp pushf pop rdx call vmresume_failure int3 .global platform_halt platform_halt: cli hlt jmp platform_halt
bieyuanxi/rCoreLearning
1,055
os/src/link_app.S
.align 3 .section .data .global _num_app _num_app: .quad 5 .quad app_0_start .quad app_1_start .quad app_2_start .quad app_3_start .quad app_4_start .quad app_4_end .section .data .global app_0_start .global app_0_end app_0_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/00hello_world.bin" app_0_end: .section .data .global app_1_start .global app_1_end app_1_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/01store_fault.bin" app_1_end: .section .data .global app_2_start .global app_2_end app_2_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/02power.bin" app_2_end: .section .data .global app_3_start .global app_3_end app_3_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/03priv_inst.bin" app_3_end: .section .data .global app_4_start .global app_4_end app_4_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/04priv_csr.bin" app_4_end:
bieyuanxi/rCoreLearning
1,589
os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 __alltraps: csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, sp, -34*8 # save general-purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # we can use t0/t1/t2 freely, because they were saved on kernel stack csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it on the kernel stack csrr t2, sscratch sd t2, 2*8(sp) # set input argument of trap_handler(cx: &mut TrapContext) mv a0, sp call trap_handler __restore: # case1: start running app by __restore # case2: back to U after handling trap mv sp, a0 # now sp->kernel stack(after allocated), sscratch->user stack # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) ld t2, 2*8(sp) csrw sstatus, t0 csrw sepc, t1 csrw sscratch, t2 # restore general-purpuse registers except sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # release TrapContext on kernel stack addi sp, sp, 34*8 # now sp->kernel stack, sscratch->user stack csrrw sp, sscratch, sp sret
BilelGho/compiler-builtins
4,378
src/hexagon/dfmul.s
.text .global __hexagon_muldf3 .type __hexagon_muldf3,@function .global __qdsp_muldf3 ; .set __qdsp_muldf3, __hexagon_muldf3 .global __hexagon_fast_muldf3 ; .set __hexagon_fast_muldf3, __hexagon_muldf3 .global __hexagon_fast2_muldf3 ; .set __hexagon_fast2_muldf3, __hexagon_muldf3 .p2align 5 __hexagon_muldf3: { p0 = dfclass(r1:0,#2) p0 = dfclass(r3:2,#2) r13:12 = combine(##0x40000000,#0) } { r13:12 = insert(r1:0,#52,#11 -1) r5:4 = asl(r3:2,#11 -1) r28 = #-1024 r9:8 = #1 } { r7:6 = mpyu(r4,r13) r5:4 = insert(r9:8,#2,#62) } { r15:14 = mpyu(r12,r4) r7:6 += mpyu(r12,r5) } { r7:6 += lsr(r15:14,#32) r11:10 = mpyu(r13,r5) r5:4 = combine(##1024 +1024 -4,#0) } { r11:10 += lsr(r7:6,#32) if (!p0) jump .Lmul_abnormal p1 = cmp.eq(r14,#0) p1 = cmp.eq(r6,#0) } { if (!p1) r10 = or(r10,r8) r6 = extractu(r1,#11,#20) r7 = extractu(r3,#11,#20) } { r15:14 = neg(r11:10) r6 += add(r28,r7) r28 = xor(r1,r3) } { if (!p2.new) r11:10 = r15:14 p2 = cmp.gt(r28,#-1) p0 = !cmp.gt(r6,r5) p0 = cmp.gt(r6,r4) if (!p0.new) jump:nt .Lmul_ovf_unf } { r1:0 = convert_d2df(r11:10) r6 = add(r6,#-1024 -58) } { r1 += asl(r6,#20) jumpr r31 } .falign .Lpossible_unf1: { p0 = cmp.eq(r0,#0) p0 = bitsclr(r1,r4) if (!p0.new) jumpr:t r31 r5 = #0x7fff } { p0 = bitsset(r13,r5) r4 = USR r5 = #0x030 } { if (p0) r4 = or(r4,r5) } { USR = r4 } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .falign .Lmul_ovf_unf: { r1:0 = convert_d2df(r11:10) r13:12 = abs(r11:10) r7 = add(r6,#-1024 -58) } { r1 += asl(r7,#20) r7 = extractu(r1,#11,#20) r4 = ##0x7FEFFFFF } { r7 += add(r6,##-1024 -58) r5 = #0 } { p0 = cmp.gt(r7,##1024 +1024 -2) if (p0.new) jump:nt .Lmul_ovf } { p0 = cmp.gt(r7,#0) if (p0.new) jump:nt .Lpossible_unf1 r5 = sub(r6,r5) r28 = #63 } { r4 = #0 r5 = sub(#5,r5) } { p3 = cmp.gt(r11,#-1) r5 = min(r5,r28) r11:10 = r13:12 } { r28 = USR r15:14 = extractu(r11:10,r5:4) } { r11:10 = asr(r11:10,r5) r4 = #0x0030 r1 = insert(r9,#11,#20) } { p0 = cmp.gtu(r9:8,r15:14) if (!p0.new) r10 = or(r10,r8) r11 = setbit(r11,#20 +3) } { r15:14 = neg(r11:10) p1 = bitsclr(r10,#0x7) if (!p1.new) r28 = or(r4,r28) } { if (!p3) r11:10 = r15:14 USR = r28 } { r1:0 = convert_d2df(r11:10) p0 = dfcmp.eq(r1:0,r1:0) } { r1 = insert(r9,#11 -1,#20 +1) jumpr r31 } .falign .Lmul_ovf: { r28 = USR r13:12 = combine(##0x7fefffff,#-1) r1:0 = r11:10 } { r14 = extractu(r28,#2,#22) r28 = or(r28,#0x28) r5:4 = combine(##0x7ff00000,#0) } { USR = r28 r14 ^= lsr(r1,#31) r28 = r14 } { p0 = !cmp.eq(r28,#1) p0 = !cmp.eq(r14,#2) if (p0.new) r13:12 = r5:4 p0 = dfcmp.eq(r1:0,r1:0) } { r1:0 = insert(r13:12,#63,#0) jumpr r31 } .Lmul_abnormal: { r13:12 = extractu(r1:0,#63,#0) r5:4 = extractu(r3:2,#63,#0) } { p3 = cmp.gtu(r13:12,r5:4) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Linvalid_nan if (!p3) r13:12 = r5:4 if (!p3) r5:4 = r13:12 } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x0e) } { p0 = dfclass(r1:0,#0x08) p0 = dfclass(r3:2,#0x01) } { if (p1) jump .Ltrue_inf p2 = dfclass(r3:2,#0x01) } { if (p0) jump .Linvalid_zeroinf if (p2) jump .Ltrue_zero r28 = ##0x7c000000 } { p0 = bitsclr(r1,r28) if (p0.new) jump:nt .Lmul_tiny } { r28 = cl0(r5:4) } { r28 = add(r28,#-11) } { r5:4 = asl(r5:4,r28) } { r3:2 = insert(r5:4,#63,#0) r1 -= asl(r28,#20) } jump __hexagon_muldf3 .Lmul_tiny: { r28 = USR r1:0 = xor(r1:0,r3:2) } { r28 = or(r28,#0x30) r1:0 = insert(r9:8,#63,#0) r5 = extractu(r28,#2,#22) } { USR = r28 p0 = cmp.gt(r5,#1) if (!p0.new) r0 = #0 r5 ^= lsr(r1,#31) } { p0 = cmp.eq(r5,#3) if (!p0.new) r0 = #0 jumpr r31 } .Linvalid_zeroinf: { r28 = USR } { r1:0 = #-1 r28 = or(r28,#2) } { USR = r28 } { p0 = dfcmp.uo(r1:0,r1:0) jumpr r31 } .Linvalid_nan: { p0 = dfclass(r3:2,#0x0f) r28 = convert_df2sf(r1:0) if (p0.new) r3:2 = r1:0 } { r2 = convert_df2sf(r3:2) r1:0 = #-1 jumpr r31 } .falign .Ltrue_zero: { r1:0 = r3:2 r3:2 = r1:0 } .Ltrue_inf: { r3 = extract(r3,#1,#31) } { r1 ^= asl(r3,#31) jumpr r31 } .size __hexagon_muldf3,.-__hexagon_muldf3
BilelGho/compiler-builtins
5,659
src/hexagon/dfdiv.s
.text .global __hexagon_divdf3 .type __hexagon_divdf3,@function .global __qdsp_divdf3 ; .set __qdsp_divdf3, __hexagon_divdf3 .global __hexagon_fast_divdf3 ; .set __hexagon_fast_divdf3, __hexagon_divdf3 .global __hexagon_fast2_divdf3 ; .set __hexagon_fast2_divdf3, __hexagon_divdf3 .p2align 5 __hexagon_divdf3: { p2 = dfclass(r1:0,#0x02) p2 = dfclass(r3:2,#0x02) r13:12 = combine(r3,r1) r28 = xor(r1,r3) } { if (!p2) jump .Ldiv_abnormal r7:6 = extractu(r3:2,#23,#52 -23) r8 = ##0x3f800001 } { r9 = or(r8,r6) r13 = extractu(r13,#11,#52 -32) r12 = extractu(r12,#11,#52 -32) p3 = cmp.gt(r28,#-1) } .Ldenorm_continue: { r11,p0 = sfrecipa(r8,r9) r10 = and(r8,#-2) r28 = #1 r12 = sub(r12,r13) } { r10 -= sfmpy(r11,r9):lib r1 = insert(r28,#11 +1,#52 -32) r13 = ##0x00800000 << 3 } { r11 += sfmpy(r11,r10):lib r3 = insert(r28,#11 +1,#52 -32) r10 = and(r8,#-2) } { r10 -= sfmpy(r11,r9):lib r5 = #-0x3ff +1 r4 = #0x3ff -1 } { r11 += sfmpy(r11,r10):lib p1 = cmp.gt(r12,r5) p1 = !cmp.gt(r12,r4) } { r13 = insert(r11,#23,#3) r5:4 = #0 r12 = add(r12,#-61) } { r13 = add(r13,#((-3) << 3)) } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASL(r7:6, # ( 14 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 1 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 16 )); r1:0 -= asl(r15:14, # 32); } { r7:6 = mpyu(r13,r1); r1:0 = asl(r1:0,# ( 15 )); }; { r6 = # 0; r1:0 -= mpyu(r7,r2); r15:14 = mpyu(r7,r3); }; { r5:4 += ASR(r7:6, # ( 31 )); r1:0 -= asl(r15:14, # 32); r7:6=# ( 0 ); } { r15:14 = sub(r1:0,r3:2) p0 = cmp.gtu(r3:2,r1:0) if (!p0.new) r6 = #2 } { r5:4 = add(r5:4,r7:6) if (!p0) r1:0 = r15:14 r15:14 = #0 } { p0 = cmp.eq(r1:0,r15:14) if (!p0.new) r4 = or(r4,r28) } { r7:6 = neg(r5:4) } { if (!p3) r5:4 = r7:6 } { r1:0 = convert_d2df(r5:4) if (!p1) jump .Ldiv_ovf_unf } { r1 += asl(r12,#52 -32) jumpr r31 } .Ldiv_ovf_unf: { r1 += asl(r12,#52 -32) r13 = extractu(r1,#11,#52 -32) } { r7:6 = abs(r5:4) r12 = add(r12,r13) } { p0 = cmp.gt(r12,##0x3ff +0x3ff) if (p0.new) jump:nt .Ldiv_ovf } { p0 = cmp.gt(r12,#0) if (p0.new) jump:nt .Lpossible_unf2 } { r13 = add(clb(r7:6),#-1) r12 = sub(#7,r12) r10 = USR r11 = #63 } { r13 = min(r12,r11) r11 = or(r10,#0x030) r7:6 = asl(r7:6,r13) r12 = #0 } { r15:14 = extractu(r7:6,r13:12) r7:6 = lsr(r7:6,r13) r3:2 = #1 } { p0 = cmp.gtu(r3:2,r15:14) if (!p0.new) r6 = or(r2,r6) r7 = setbit(r7,#52 -32+4) } { r5:4 = neg(r7:6) p0 = bitsclr(r6,#(1<<4)-1) if (!p0.new) r10 = r11 } { USR = r10 if (p3) r5:4 = r7:6 r10 = #-0x3ff -(52 +4) } { r1:0 = convert_d2df(r5:4) } { r1 += asl(r10,#52 -32) jumpr r31 } .Lpossible_unf2: { r3:2 = extractu(r1:0,#63,#0) r15:14 = combine(##0x00100000,#0) r10 = #0x7FFF } { p0 = dfcmp.eq(r15:14,r3:2) p0 = bitsset(r7,r10) } { if (!p0) jumpr r31 r10 = USR } { r10 = or(r10,#0x30) } { USR = r10 } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .Ldiv_ovf: { r10 = USR r3:2 = combine(##0x7fefffff,#-1) r1 = mux(p3,#0,#-1) } { r7:6 = combine(##0x7ff00000,#0) r5 = extractu(r10,#2,#22) r10 = or(r10,#0x28) } { USR = r10 r5 ^= lsr(r1,#31) r4 = r5 } { p0 = !cmp.eq(r4,#1) p0 = !cmp.eq(r5,#2) if (p0.new) r3:2 = r7:6 p0 = dfcmp.eq(r3:2,r3:2) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_abnormal: { p0 = dfclass(r1:0,#0x0F) p0 = dfclass(r3:2,#0x0F) p3 = cmp.gt(r28,#-1) } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x08) } { p2 = dfclass(r1:0,#0x01) p2 = dfclass(r3:2,#0x01) } { if (!p0) jump .Ldiv_nan if (p1) jump .Ldiv_invalid } { if (p2) jump .Ldiv_invalid } { p2 = dfclass(r1:0,#(0x0F ^ 0x01)) p2 = dfclass(r3:2,#(0x0F ^ 0x08)) } { p1 = dfclass(r1:0,#(0x0F ^ 0x08)) p1 = dfclass(r3:2,#(0x0F ^ 0x01)) } { if (!p2) jump .Ldiv_zero_result if (!p1) jump .Ldiv_inf_result } { p0 = dfclass(r1:0,#0x02) p1 = dfclass(r3:2,#0x02) r10 = ##0x00100000 } { r13:12 = combine(r3,r1) r1 = insert(r10,#11 +1,#52 -32) r3 = insert(r10,#11 +1,#52 -32) } { if (p0) r1 = or(r1,r10) if (p1) r3 = or(r3,r10) } { r5 = add(clb(r1:0),#-11) r4 = add(clb(r3:2),#-11) r10 = #1 } { r12 = extractu(r12,#11,#52 -32) r13 = extractu(r13,#11,#52 -32) } { r1:0 = asl(r1:0,r5) r3:2 = asl(r3:2,r4) if (!p0) r12 = sub(r10,r5) if (!p1) r13 = sub(r10,r4) } { r7:6 = extractu(r3:2,#23,#52 -23) } { r9 = or(r8,r6) jump .Ldenorm_continue } .Ldiv_zero_result: { r1 = xor(r1,r3) r3:2 = #0 } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_inf_result: { p2 = dfclass(r3:2,#0x01) p2 = dfclass(r1:0,#(0x0F ^ 0x08)) } { r10 = USR if (!p2) jump 1f r1 = xor(r1,r3) } { r10 = or(r10,#0x04) } { USR = r10 } 1: { r3:2 = combine(##0x7ff00000,#0) p0 = dfcmp.uo(r3:2,r3:2) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .Ldiv_nan: { p0 = dfclass(r1:0,#0x10) p1 = dfclass(r3:2,#0x10) if (!p0.new) r1:0 = r3:2 if (!p1.new) r3:2 = r1:0 } { r5 = convert_df2sf(r1:0) r4 = convert_df2sf(r3:2) } { r1:0 = #-1 jumpr r31 } .Ldiv_invalid: { r10 = ##0x7f800001 } { r1:0 = convert_sf2df(r10) jumpr r31 } .size __hexagon_divdf3,.-__hexagon_divdf3
BilelGho/compiler-builtins
481
src/hexagon/umodsi3.s
FUNCTION_BEGIN __hexagon_umodsi3 { r2 = cl0(r0) r3 = cl0(r1) p0 = cmp.gtu(r1,r0) } { r2 = sub(r3,r2) if (p0) jumpr r31 } { loop0(1f,r2) p1 = cmp.eq(r2,#0) r2 = lsl(r1,r2) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r2) r2 = lsr(r2,#1) if (p1) r1 = #0 }:endloop0 { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r1) jumpr r31 } FUNCTION_END __hexagon_umodsi3 .globl __qdsp_umodsi3 .set __qdsp_umodsi3, __hexagon_umodsi3
BilelGho/compiler-builtins
677
src/hexagon/udivmoddi4.s
FUNCTION_BEGIN __hexagon_udivmoddi4 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 { jumpr r31 } FUNCTION_END __hexagon_udivmoddi4 .globl __qdsp_udivmoddi4 .set __qdsp_udivmoddi4, __hexagon_udivmoddi4
BilelGho/compiler-builtins
158
src/hexagon/func_macro.s
.macro FUNCTION_BEGIN name .text .p2align 5 .globl \name .type \name, @function \name: .endm .macro FUNCTION_END name .size \name, . - \name .endm
BilelGho/compiler-builtins
662
src/hexagon/udivdi3.s
FUNCTION_BEGIN __hexagon_udivdi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 { jumpr r31 } FUNCTION_END __hexagon_udivdi3 .globl __qdsp_udivdi3 .set __qdsp_udivdi3, __hexagon_udivdi3
BilelGho/compiler-builtins
4,801
src/hexagon/dfaddsub.s
.text .global __hexagon_adddf3 .global __hexagon_subdf3 .type __hexagon_adddf3, @function .type __hexagon_subdf3, @function .global __qdsp_adddf3 ; .set __qdsp_adddf3, __hexagon_adddf3 .global __hexagon_fast_adddf3 ; .set __hexagon_fast_adddf3, __hexagon_adddf3 .global __hexagon_fast2_adddf3 ; .set __hexagon_fast2_adddf3, __hexagon_adddf3 .global __qdsp_subdf3 ; .set __qdsp_subdf3, __hexagon_subdf3 .global __hexagon_fast_subdf3 ; .set __hexagon_fast_subdf3, __hexagon_subdf3 .global __hexagon_fast2_subdf3 ; .set __hexagon_fast2_subdf3, __hexagon_subdf3 .p2align 5 __hexagon_adddf3: { r4 = extractu(r1,#11,#20) r5 = extractu(r3,#11,#20) r13:12 = combine(##0x20000000,#0) } { p3 = dfclass(r1:0,#2) p3 = dfclass(r3:2,#2) r9:8 = r13:12 p2 = cmp.gtu(r5,r4) } { if (!p3) jump .Ladd_abnormal if (p2) r1:0 = r3:2 if (p2) r3:2 = r1:0 if (p2) r5:4 = combine(r4,r5) } { r13:12 = insert(r1:0,#52,#11 -2) r9:8 = insert(r3:2,#52,#11 -2) r15 = sub(r4,r5) r7:6 = combine(#62,#1) } .Ladd_continue: { r15 = min(r15,r7) r11:10 = neg(r13:12) p2 = cmp.gt(r1,#-1) r14 = #0 } { if (!p2) r13:12 = r11:10 r11:10 = extractu(r9:8,r15:14) r9:8 = ASR(r9:8,r15) r15:14 = #0 } { p1 = cmp.eq(r11:10,r15:14) if (!p1.new) r8 = or(r8,r6) r5 = add(r4,#-1024 -60) p3 = cmp.gt(r3,#-1) } { r13:12 = add(r13:12,r9:8) r11:10 = sub(r13:12,r9:8) r7:6 = combine(#54,##2045) } { p0 = cmp.gtu(r4,r7) p0 = !cmp.gtu(r4,r6) if (!p0.new) jump:nt .Ladd_ovf_unf if (!p3) r13:12 = r11:10 } { r1:0 = convert_d2df(r13:12) p0 = cmp.eq(r13,#0) p0 = cmp.eq(r12,#0) if (p0.new) jump:nt .Ladd_zero } { r1 += asl(r5,#20) jumpr r31 } .falign __hexagon_subdf3: { r3 = togglebit(r3,#31) jump __qdsp_adddf3 } .falign .Ladd_zero: { r28 = USR r1:0 = #0 r3 = #1 } { r28 = extractu(r28,#2,#22) r3 = asl(r3,#31) } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = xor(r1,r3) jumpr r31 } .falign .Ladd_ovf_unf: { r1:0 = convert_d2df(r13:12) p0 = cmp.eq(r13,#0) p0 = cmp.eq(r12,#0) if (p0.new) jump:nt .Ladd_zero } { r28 = extractu(r1,#11,#20) r1 += asl(r5,#20) } { r5 = add(r5,r28) r3:2 = combine(##0x00100000,#0) } { p0 = cmp.gt(r5,##1024 +1024 -2) if (p0.new) jump:nt .Ladd_ovf } { p0 = cmp.gt(r5,#0) if (p0.new) jumpr:t r31 r28 = sub(#1,r5) } { r3:2 = insert(r1:0,#52,#0) r1:0 = r13:12 } { r3:2 = lsr(r3:2,r28) } { r1:0 = insert(r3:2,#63,#0) jumpr r31 } .falign .Ladd_ovf: { r1:0 = r13:12 r28 = USR r13:12 = combine(##0x7fefffff,#-1) } { r5 = extractu(r28,#2,#22) r28 = or(r28,#0x28) r9:8 = combine(##0x7ff00000,#0) } { USR = r28 r5 ^= lsr(r1,#31) r28 = r5 } { p0 = !cmp.eq(r28,#1) p0 = !cmp.eq(r5,#2) if (p0.new) r13:12 = r9:8 } { r1:0 = insert(r13:12,#63,#0) } { p0 = dfcmp.eq(r1:0,r1:0) jumpr r31 } .Ladd_abnormal: { r13:12 = extractu(r1:0,#63,#0) r9:8 = extractu(r3:2,#63,#0) } { p3 = cmp.gtu(r13:12,r9:8) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Linvalid_nan_add if (!p3) r13:12 = r9:8 if (!p3) r9:8 = r13:12 } { p1 = dfclass(r1:0,#0x08) if (p1.new) jump:nt .Linf_add } { p2 = dfclass(r3:2,#0x01) if (p2.new) jump:nt .LB_zero r13:12 = #0 } { p0 = dfclass(r1:0,#4) if (p0.new) jump:nt .Ladd_two_subnormal r13:12 = combine(##0x20000000,#0) } { r4 = extractu(r1,#11,#20) r5 = #1 r9:8 = asl(r9:8,#11 -2) } { r13:12 = insert(r1:0,#52,#11 -2) r15 = sub(r4,r5) r7:6 = combine(#62,#1) jump .Ladd_continue } .Ladd_two_subnormal: { r13:12 = extractu(r1:0,#63,#0) r9:8 = extractu(r3:2,#63,#0) } { r13:12 = neg(r13:12) r9:8 = neg(r9:8) p0 = cmp.gt(r1,#-1) p1 = cmp.gt(r3,#-1) } { if (p0) r13:12 = r1:0 if (p1) r9:8 = r3:2 } { r13:12 = add(r13:12,r9:8) } { r9:8 = neg(r13:12) p0 = cmp.gt(r13,#-1) r3:2 = #0 } { if (!p0) r1:0 = r9:8 if (p0) r1:0 = r13:12 r3 = ##0x80000000 } { if (!p0) r1 = or(r1,r3) p0 = dfcmp.eq(r1:0,r3:2) if (p0.new) jump:nt .Lzero_plus_zero } { jumpr r31 } .Linvalid_nan_add: { r28 = convert_df2sf(r1:0) p0 = dfclass(r3:2,#0x0f) if (p0.new) r3:2 = r1:0 } { r2 = convert_df2sf(r3:2) r1:0 = #-1 jumpr r31 } .falign .LB_zero: { p0 = dfcmp.eq(r13:12,r1:0) if (!p0.new) jumpr:t r31 } .Lzero_plus_zero: { p0 = cmp.eq(r1:0,r3:2) if (p0.new) jumpr:t r31 } { r28 = USR } { r28 = extractu(r28,#2,#22) r1:0 = #0 } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 jumpr r31 } .Linf_add: { p0 = !cmp.eq(r1,r3) p0 = dfclass(r3:2,#8) if (!p0.new) jumpr:t r31 } { r2 = ##0x7f800001 } { r1:0 = convert_sf2df(r2) jumpr r31 } .size __hexagon_adddf3,.-__hexagon_adddf3
BilelGho/compiler-builtins
785
src/hexagon/sfdiv_opt.s
FUNCTION_BEGIN __hexagon_divsf3 { r2,p0 = sfrecipa(r0,r1) r4 = sffixupd(r0,r1) r3 = ##0x3f800000 } { r5 = sffixupn(r0,r1) r3 -= sfmpy(r4,r2):lib r6 = ##0x80000000 r7 = r3 } { r2 += sfmpy(r3,r2):lib r3 = r7 r6 = r5 r0 = and(r6,r5) } { r3 -= sfmpy(r4,r2):lib r0 += sfmpy(r5,r2):lib } { r2 += sfmpy(r3,r2):lib r6 -= sfmpy(r0,r4):lib } { r0 += sfmpy(r6,r2):lib } { r5 -= sfmpy(r0,r4):lib } { r0 += sfmpy(r5,r2,p0):scale jumpr r31 } FUNCTION_END __hexagon_divsf3 .global __qdsp_divsf3 ; .set __qdsp_divsf3, __hexagon_divsf3 .global __hexagon_fast_divsf3 ; .set __hexagon_fast_divsf3, __hexagon_divsf3 .global __hexagon_fast2_divsf3 ; .set __hexagon_fast2_divsf3, __hexagon_divsf3
BilelGho/compiler-builtins
584
src/hexagon/modsi3.s
FUNCTION_BEGIN __hexagon_modsi3 { p2 = cmp.ge(r0,#0) r2 = abs(r0) r1 = abs(r1) } { r3 = cl0(r2) r4 = cl0(r1) p0 = cmp.gtu(r1,r2) } { r3 = sub(r4,r3) if (p0) jumpr r31 } { p1 = cmp.eq(r3,#0) loop0(1f,r3) r0 = r2 r2 = lsl(r1,r3) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r2) r2 = lsr(r2,#1) if (p1) r1 = #0 }:endloop0 { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r1) if (p2) jumpr r31 } { r0 = neg(r0) jumpr r31 } FUNCTION_END __hexagon_modsi3 .globl __qdsp_modsi3 .set __qdsp_modsi3, __hexagon_modsi3
BilelGho/compiler-builtins
7,270
src/hexagon/dffma.s
.text .global __hexagon_fmadf4 .type __hexagon_fmadf4,@function .global __hexagon_fmadf5 .type __hexagon_fmadf5,@function .global fma .type fma,@function .global __qdsp_fmadf5 ; .set __qdsp_fmadf5, __hexagon_fmadf5 .p2align 5 __hexagon_fmadf4: __hexagon_fmadf5: fma: { p0 = dfclass(r1:0,#2) p0 = dfclass(r3:2,#2) r13:12 = #0 r15:14 = #0 } { r13:12 = insert(r1:0,#52,#11 -3) r15:14 = insert(r3:2,#52,#11 -3) r7 = ##0x10000000 allocframe(#32) } { r9:8 = mpyu(r12,r14) if (!p0) jump .Lfma_abnormal_ab r13 = or(r13,r7) r15 = or(r15,r7) } { p0 = dfclass(r5:4,#2) if (!p0.new) jump:nt .Lfma_abnormal_c r11:10 = combine(r7,#0) r7:6 = combine(#0,r9) } .Lfma_abnormal_c_restart: { r7:6 += mpyu(r14,r13) r11:10 = insert(r5:4,#52,#11 -3) memd(r29+#0) = r17:16 memd(r29+#8) = r19:18 } { r7:6 += mpyu(r12,r15) r19:18 = neg(r11:10) p0 = cmp.gt(r5,#-1) r28 = xor(r1,r3) } { r18 = extractu(r1,#11,#20) r19 = extractu(r3,#11,#20) r17:16 = combine(#0,r7) if (!p0) r11:10 = r19:18 } { r17:16 += mpyu(r13,r15) r9:8 = combine(r6,r8) r18 = add(r18,r19) r19 = extractu(r5,#11,#20) } { r18 = add(r18,#-1023 +(4)) p3 = !cmp.gt(r28,#-1) r7:6 = #0 r15:14 = #0 } { r7:6 = sub(r7:6,r9:8,p3):carry p0 = !cmp.gt(r28,#-1) p1 = cmp.gt(r19,r18) if (p1.new) r19:18 = combine(r18,r19) } { r15:14 = sub(r15:14,r17:16,p3):carry if (p0) r9:8 = r7:6 r7:6 = #0 r19 = sub(r18,r19) } { if (p0) r17:16 = r15:14 p0 = cmp.gt(r19,#63) if (p1) r9:8 = r7:6 if (p1) r7:6 = r9:8 } { if (p1) r17:16 = r11:10 if (p1) r11:10 = r17:16 if (p0) r19 = add(r19,#-64) r28 = #63 } { if (p0) r7:6 = r11:10 r28 = asr(r11,#31) r13 = min(r19,r28) r12 = #0 } { if (p0) r11:10 = combine(r28,r28) r5:4 = extract(r7:6,r13:12) r7:6 = lsr(r7:6,r13) r12 = sub(#64,r13) } { r15:14 = #0 r28 = #-2 r7:6 |= lsl(r11:10,r12) r11:10 = asr(r11:10,r13) } { p3 = cmp.gtu(r5:4,r15:14) if (p3.new) r6 = and(r6,r28) r15:14 = #1 r5:4 = #0 } { r9:8 = add(r7:6,r9:8,p3):carry } { r17:16 = add(r11:10,r17:16,p3):carry r28 = #62 } { r12 = add(clb(r17:16),#-2) if (!cmp.eq(r12.new,r28)) jump:t 1f } { r11:10 = extractu(r9:8,#62,#2) r9:8 = asl(r9:8,#62) r18 = add(r18,#-62) } { r17:16 = insert(r11:10,#62,#0) } { r12 = add(clb(r17:16),#-2) } .falign 1: { r11:10 = asl(r17:16,r12) r5:4 |= asl(r9:8,r12) r13 = sub(#64,r12) r18 = sub(r18,r12) } { r11:10 |= lsr(r9:8,r13) p2 = cmp.gtu(r15:14,r5:4) r28 = #1023 +1023 -2 } { if (!p2) r10 = or(r10,r14) p0 = !cmp.gt(r18,r28) p0 = cmp.gt(r18,#1) if (!p0.new) jump:nt .Lfma_ovf_unf } { p0 = cmp.gtu(r15:14,r11:10) r1:0 = convert_d2df(r11:10) r18 = add(r18,#-1023 -60) r17:16 = memd(r29+#0) } { r1 += asl(r18,#20) r19:18 = memd(r29+#8) if (!p0) dealloc_return } .Ladd_yields_zero: { r28 = USR r1:0 = #0 } { r28 = extractu(r28,#2,#22) r17:16 = memd(r29+#0) r19:18 = memd(r29+#8) } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 dealloc_return } .Lfma_ovf_unf: { p0 = cmp.gtu(r15:14,r11:10) if (p0.new) jump:nt .Ladd_yields_zero } { r1:0 = convert_d2df(r11:10) r18 = add(r18,#-1023 -60) r28 = r18 } { r1 += asl(r18,#20) r7 = extractu(r1,#11,#20) } { r6 = add(r18,r7) r17:16 = memd(r29+#0) r19:18 = memd(r29+#8) r9:8 = abs(r11:10) } { p0 = cmp.gt(r6,##1023 +1023) if (p0.new) jump:nt .Lfma_ovf } { p0 = cmp.gt(r6,#0) if (p0.new) jump:nt .Lpossible_unf0 } { r7 = add(clb(r9:8),#-2) r6 = sub(#1+5,r28) p3 = cmp.gt(r11,#-1) } { r6 = add(r6,r7) r9:8 = asl(r9:8,r7) r1 = USR r28 = #63 } { r7 = min(r6,r28) r6 = #0 r0 = #0x0030 } { r3:2 = extractu(r9:8,r7:6) r9:8 = asr(r9:8,r7) } { p0 = cmp.gtu(r15:14,r3:2) if (!p0.new) r8 = or(r8,r14) r9 = setbit(r9,#20 +3) } { r11:10 = neg(r9:8) p1 = bitsclr(r8,#(1<<3)-1) if (!p1.new) r1 = or(r1,r0) r3:2 = #0 } { if (p3) r11:10 = r9:8 USR = r1 r28 = #-1023 -(52 +3) } { r1:0 = convert_d2df(r11:10) } { r1 += asl(r28,#20) dealloc_return } .Lpossible_unf0: { r28 = ##0x7fefffff r9:8 = abs(r11:10) } { p0 = cmp.eq(r0,#0) p0 = bitsclr(r1,r28) if (!p0.new) dealloc_return:t r28 = #0x7fff } { p0 = bitsset(r9,r28) r3 = USR r2 = #0x0030 } { if (p0) r3 = or(r3,r2) } { USR = r3 } { p0 = dfcmp.eq(r1:0,r1:0) dealloc_return } .Lfma_ovf: { r28 = USR r11:10 = combine(##0x7fefffff,#-1) r1:0 = r11:10 } { r9:8 = combine(##0x7ff00000,#0) r3 = extractu(r28,#2,#22) r28 = or(r28,#0x28) } { USR = r28 r3 ^= lsr(r1,#31) r2 = r3 } { p0 = !cmp.eq(r2,#1) p0 = !cmp.eq(r3,#2) } { p0 = dfcmp.eq(r9:8,r9:8) if (p0.new) r11:10 = r9:8 } { r1:0 = insert(r11:10,#63,#0) dealloc_return } .Lfma_abnormal_ab: { r9:8 = extractu(r1:0,#63,#0) r11:10 = extractu(r3:2,#63,#0) deallocframe } { p3 = cmp.gtu(r9:8,r11:10) if (!p3.new) r1:0 = r3:2 if (!p3.new) r3:2 = r1:0 } { p0 = dfclass(r1:0,#0x0f) if (!p0.new) jump:nt .Lnan if (!p3) r9:8 = r11:10 if (!p3) r11:10 = r9:8 } { p1 = dfclass(r1:0,#0x08) p1 = dfclass(r3:2,#0x0e) } { p0 = dfclass(r1:0,#0x08) p0 = dfclass(r3:2,#0x01) } { if (p1) jump .Lab_inf p2 = dfclass(r3:2,#0x01) } { if (p0) jump .Linvalid if (p2) jump .Lab_true_zero r28 = ##0x7c000000 } { p0 = bitsclr(r1,r28) if (p0.new) jump:nt .Lfma_ab_tiny } { r28 = add(clb(r11:10),#-11) } { r11:10 = asl(r11:10,r28) } { r3:2 = insert(r11:10,#63,#0) r1 -= asl(r28,#20) } jump fma .Lfma_ab_tiny: r9:8 = combine(##0x00100000,#0) { r1:0 = insert(r9:8,#63,#0) r3:2 = insert(r9:8,#63,#0) } jump fma .Lab_inf: { r3:2 = lsr(r3:2,#63) p0 = dfclass(r5:4,#0x10) } { r1:0 ^= asl(r3:2,#63) if (p0) jump .Lnan } { p1 = dfclass(r5:4,#0x08) if (p1.new) jump:nt .Lfma_inf_plus_inf } { jumpr r31 } .falign .Lfma_inf_plus_inf: { p0 = dfcmp.eq(r1:0,r5:4) if (!p0.new) jump:nt .Linvalid } { jumpr r31 } .Lnan: { p0 = dfclass(r3:2,#0x10) p1 = dfclass(r5:4,#0x10) if (!p0.new) r3:2 = r1:0 if (!p1.new) r5:4 = r1:0 } { r3 = convert_df2sf(r3:2) r2 = convert_df2sf(r5:4) } { r3 = convert_df2sf(r1:0) r1:0 = #-1 jumpr r31 } .Linvalid: { r28 = ##0x7f800001 } { r1:0 = convert_sf2df(r28) jumpr r31 } .Lab_true_zero: { p0 = dfclass(r5:4,#0x10) if (p0.new) jump:nt .Lnan if (p0.new) r1:0 = r5:4 } { p0 = dfcmp.eq(r3:2,r5:4) r1 = lsr(r1,#31) } { r3 ^= asl(r1,#31) if (!p0) r1:0 = r5:4 if (!p0) jumpr r31 } { p0 = cmp.eq(r3:2,r5:4) if (p0.new) jumpr:t r31 r1:0 = r3:2 } { r28 = USR } { r28 = extractu(r28,#2,#22) r1:0 = #0 } { p0 = cmp.eq(r28,#2) if (p0.new) r1 = ##0x80000000 jumpr r31 } .falign .Lfma_abnormal_c: { p0 = dfclass(r5:4,#0x10) if (p0.new) jump:nt .Lnan if (p0.new) r1:0 = r5:4 deallocframe } { p0 = dfclass(r5:4,#0x08) if (p0.new) r1:0 = r5:4 if (p0.new) jumpr:nt r31 } { p0 = dfclass(r5:4,#0x01) if (p0.new) jump:nt __hexagon_muldf3 r28 = #1 } { allocframe(#32) r11:10 = #0 r5 = insert(r28,#11,#20) jump .Lfma_abnormal_c_restart } .size fma,.-fma
BilelGho/compiler-builtins
4,337
src/hexagon/dfsqrt.s
.text .global __hexagon_sqrtdf2 .type __hexagon_sqrtdf2,@function .global __hexagon_sqrt .type __hexagon_sqrt,@function .global __qdsp_sqrtdf2 ; .set __qdsp_sqrtdf2, __hexagon_sqrtdf2; .type __qdsp_sqrtdf2,@function .global __qdsp_sqrt ; .set __qdsp_sqrt, __hexagon_sqrt; .type __qdsp_sqrt,@function .global __hexagon_fast_sqrtdf2 ; .set __hexagon_fast_sqrtdf2, __hexagon_sqrtdf2; .type __hexagon_fast_sqrtdf2,@function .global __hexagon_fast_sqrt ; .set __hexagon_fast_sqrt, __hexagon_sqrt; .type __hexagon_fast_sqrt,@function .global __hexagon_fast2_sqrtdf2 ; .set __hexagon_fast2_sqrtdf2, __hexagon_sqrtdf2; .type __hexagon_fast2_sqrtdf2,@function .global __hexagon_fast2_sqrt ; .set __hexagon_fast2_sqrt, __hexagon_sqrt; .type __hexagon_fast2_sqrt,@function .type sqrt,@function .p2align 5 __hexagon_sqrtdf2: __hexagon_sqrt: { r15:14 = extractu(r1:0,#23 +1,#52 -23) r28 = extractu(r1,#11,#52 -32) r5:4 = combine(##0x3f000004,#1) } { p2 = dfclass(r1:0,#0x02) p2 = cmp.gt(r1,#-1) if (!p2.new) jump:nt .Lsqrt_abnormal r9 = or(r5,r14) } .Ldenormal_restart: { r11:10 = r1:0 r7,p0 = sfinvsqrta(r9) r5 = and(r5,#-16) r3:2 = #0 } { r3 += sfmpy(r7,r9):lib r2 += sfmpy(r7,r5):lib r6 = r5 r9 = and(r28,#1) } { r6 -= sfmpy(r3,r2):lib r11 = insert(r4,#11 +1,#52 -32) p1 = cmp.gtu(r9,#0) } { r3 += sfmpy(r3,r6):lib r2 += sfmpy(r2,r6):lib r6 = r5 r9 = mux(p1,#8,#9) } { r6 -= sfmpy(r3,r2):lib r11:10 = asl(r11:10,r9) r9 = mux(p1,#3,#2) } { r2 += sfmpy(r2,r6):lib r15:14 = asl(r11:10,r9) } { r2 = and(r2,##0x007fffff) } { r2 = add(r2,##0x00800000 - 3) r9 = mux(p1,#7,#8) } { r8 = asl(r2,r9) r9 = mux(p1,#15-(1+1),#15-(1+0)) } { r13:12 = mpyu(r8,r15) } { r1:0 = asl(r11:10,#15) r15:14 = mpyu(r13,r13) p1 = cmp.eq(r0,r0) } { r1:0 -= asl(r15:14,#15) r15:14 = mpyu(r13,r12) p2 = cmp.eq(r0,r0) } { r1:0 -= lsr(r15:14,#16) p3 = cmp.eq(r0,r0) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) r9 = add(r9,#16) r1:0 = asl(r11:10,#31) } { r15:14 = mpyu(r13,r13) r1:0 -= mpyu(r13,r12) } { r1:0 -= asl(r15:14,#31) r15:14 = mpyu(r12,r12) } { r1:0 -= lsr(r15:14,#33) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) r9 = add(r9,#16) r1:0 = asl(r11:10,#47) } { r15:14 = mpyu(r13,r13) } { r1:0 -= asl(r15:14,#47) r15:14 = mpyu(r13,r12) } { r1:0 -= asl(r15:14,#16) r15:14 = mpyu(r12,r12) } { r1:0 -= lsr(r15:14,#17) } { r1:0 = mpyu(r1,r8) } { r13:12 += lsr(r1:0,r9) } { r3:2 = mpyu(r13,r12) r5:4 = mpyu(r12,r12) r15:14 = #0 r1:0 = #0 } { r3:2 += lsr(r5:4,#33) r5:4 += asl(r3:2,#33) p1 = cmp.eq(r0,r0) } { r7:6 = mpyu(r13,r13) r1:0 = sub(r1:0,r5:4,p1):carry r9:8 = #1 } { r7:6 += lsr(r3:2,#31) r9:8 += asl(r13:12,#1) } { r15:14 = sub(r11:10,r7:6,p1):carry r5:4 = sub(r1:0,r9:8,p2):carry r7:6 = #1 r11:10 = #0 } { r3:2 = sub(r15:14,r11:10,p2):carry r7:6 = add(r13:12,r7:6) r28 = add(r28,#-0x3ff) } { if (p2) r13:12 = r7:6 if (p2) r1:0 = r5:4 if (p2) r15:14 = r3:2 } { r5:4 = sub(r1:0,r9:8,p3):carry r7:6 = #1 r28 = asr(r28,#1) } { r3:2 = sub(r15:14,r11:10,p3):carry r7:6 = add(r13:12,r7:6) } { if (p3) r13:12 = r7:6 if (p3) r1:0 = r5:4 r2 = #1 } { p0 = cmp.eq(r1:0,r11:10) if (!p0.new) r12 = or(r12,r2) r3 = cl0(r13:12) r28 = add(r28,#-63) } { r1:0 = convert_ud2df(r13:12) r28 = add(r28,r3) } { r1 += asl(r28,#52 -32) jumpr r31 } .Lsqrt_abnormal: { p0 = dfclass(r1:0,#0x01) if (p0.new) jumpr:t r31 } { p0 = dfclass(r1:0,#0x10) if (p0.new) jump:nt .Lsqrt_nan } { p0 = cmp.gt(r1,#-1) if (!p0.new) jump:nt .Lsqrt_invalid_neg if (!p0.new) r28 = ##0x7F800001 } { p0 = dfclass(r1:0,#0x08) if (p0.new) jumpr:nt r31 } { r1:0 = extractu(r1:0,#52,#0) } { r28 = add(clb(r1:0),#-11) } { r1:0 = asl(r1:0,r28) r28 = sub(#1,r28) } { r1 = insert(r28,#1,#52 -32) } { r3:2 = extractu(r1:0,#23 +1,#52 -23) r5 = ##0x3f000004 } { r9 = or(r5,r2) r5 = and(r5,#-16) jump .Ldenormal_restart } .Lsqrt_nan: { r28 = convert_df2sf(r1:0) r1:0 = #-1 jumpr r31 } .Lsqrt_invalid_neg: { r1:0 = convert_sf2df(r28) jumpr r31 } .size __hexagon_sqrt,.-__hexagon_sqrt .size __hexagon_sqrtdf2,.-__hexagon_sqrtdf2
BilelGho/compiler-builtins
825
src/hexagon/moddi3.s
FUNCTION_BEGIN __hexagon_moddi3 { p3 = tstbit(r1,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_moddi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_moddi3_return: { r1:0 = neg(r3:2) } { r1:0 = vmux(p3,r1:0,r3:2) jumpr r31 } FUNCTION_END __hexagon_moddi3 .globl __qdsp_moddi3 .set __qdsp_moddi3, __hexagon_moddi3
BilelGho/compiler-builtins
864
src/hexagon/divdi3.s
FUNCTION_BEGIN __hexagon_divdi3 { p2 = tstbit(r1,#31) p3 = tstbit(r3,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { p3 = xor(p2,p3) r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_divdi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_divdi3_return: { r3:2 = neg(r1:0) } { r1:0 = vmux(p3,r3:2,r1:0) jumpr r31 } FUNCTION_END __hexagon_divdi3 .globl __qdsp_divdi3 .set __qdsp_divdi3, __hexagon_divdi3
BilelGho/compiler-builtins
543
src/hexagon/udivsi3.s
FUNCTION_BEGIN __hexagon_udivsi3 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r0 = add(r0,r3) jumpr r31 } FUNCTION_END __hexagon_udivsi3 .globl __qdsp_udivsi3 .set __qdsp_udivsi3, __hexagon_udivsi3
BilelGho/compiler-builtins
764
src/hexagon/memcpy_likely_aligned.s
FUNCTION_BEGIN __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes { p0 = bitsclr(r1,#7) p0 = bitsclr(r0,#7) if (p0.new) r5:4 = memd(r1) r3 = #-3 } { if (!p0) jump .Lmemcpy_call if (p0) memd(r0++#8) = r5:4 if (p0) r5:4 = memd(r1+#8) r3 += lsr(r2,#3) } { memd(r0++#8) = r5:4 r5:4 = memd(r1+#16) r1 = add(r1,#24) loop0(1f,r3) } .falign 1: { memd(r0++#8) = r5:4 r5:4 = memd(r1++#8) }:endloop0 { memd(r0) = r5:4 r0 -= add(r2,#-8) jumpr r31 } FUNCTION_END __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes .Lmemcpy_call: jump memcpy@PLT .globl __qdsp_memcpy_likely_aligned_min32bytes_mult8bytes .set __qdsp_memcpy_likely_aligned_min32bytes_mult8bytes, __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes
BilelGho/compiler-builtins
4,970
src/hexagon/fastmath2_dlib_asm.s
.text .global fast2_dadd_asm .type fast2_dadd_asm, @function fast2_dadd_asm: .falign { R7:6 = VABSDIFFH(R1:0, R3:2) R9 = #62 R4 = SXTH(R0) R5 = SXTH(R2) } { R6 = SXTH(R6) P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { if ( P0) R4 = #1 if (!P0) R5 = #1 R0.L = #0 R6 = MIN(R6, R9) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) R2.L = #0 R11:10 = #0 } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = add(R1:0, R3:2) R10.L = #0x8001 } { R4 = clb(R1:0) R9 = #58 } { R4 = add(R4, #-1) p0 = cmp.gt(R4, R9) } { R1:0 = ASL(R1:0, R4) R8 = SUB(R8, R4) if(p0) jump .Ldenorma } { R0 = insert(R8, #16, #0) jumpr r31 } .Ldenorma: { R1:0 = R11:10 jumpr r31 } .text .global fast2_dsub_asm .type fast2_dsub_asm, @function fast2_dsub_asm: .falign { R7:6 = VABSDIFFH(R1:0, R3:2) R9 = #62 R4 = SXTH(R0) R5 = SXTH(R2) } { R6 = SXTH(R6) P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { if ( P0) R4 = #1 if (!P0) R5 = #1 R0.L = #0 R6 = MIN(R6, R9) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) R2.L = #0 R11:10 = #0 } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = sub(R1:0, R3:2) R10.L = #0x8001 } { R4 = clb(R1:0) R9 = #58 } { R4 = add(R4, #-1) p0 = cmp.gt(R4, R9) } { R1:0 = ASL(R1:0, R4) R8 = SUB(R8, R4) if(p0) jump .Ldenorm } { R0 = insert(R8, #16, #0) jumpr r31 } .Ldenorm: { R1:0 = R11:10 jumpr r31 } .text .global fast2_dmpy_asm .type fast2_dmpy_asm, @function fast2_dmpy_asm: .falign { R13= lsr(R2, #16) R5 = sxth(R2) R4 = sxth(R0) R12= lsr(R0, #16) } { R11:10 = mpy(R1, R3) R7:6 = mpy(R1, R13) R0.L = #0x0 R15:14 = #0 } { R11:10 = add(R11:10, R11:10) R7:6 += mpy(R3, R12) R2.L = #0x0 R15.H = #0x8000 } { R7:6 = asr(R7:6, #15) R12.L = #0x8001 p1 = cmp.eq(R1:0, R3:2) } { R7:6 = add(R7:6, R11:10) R8 = add(R4, R5) p2 = cmp.eq(R1:0, R15:14) } { R9 = clb(R7:6) R3:2 = abs(R7:6) R11 = #58 } { p1 = and(p1, p2) R8 = sub(R8, R9) R9 = add(R9, #-1) p0 = cmp.gt(R9, R11) } { R8 = add(R8, #1) R1:0 = asl(R7:6, R9) if(p1) jump .Lsat } { R0 = insert(R8,#16, #0) if(!p0) jumpr r31 } { R0 = insert(R12,#16, #0) jumpr r31 } .Lsat: { R1:0 = #-1 } { R1:0 = lsr(R1:0, #1) } { R0 = insert(R8,#16, #0) jumpr r31 } .text .global fast2_qd2f_asm .type fast2_qd2f_asm, @function fast2_qd2f_asm: .falign { R3 = abs(R1):sat R4 = sxth(R0) R5 = #0x40 R6.L = #0xffc0 } { R0 = extractu(R3, #8, #0) p2 = cmp.gt(R4, #126) p3 = cmp.ge(R4, #-126) R6.H = #0x7fff } { p1 = cmp.eq(R0,#0x40) if(p1.new) R5 = #0 R4 = add(R4, #126) if(!p3) jump .Lmin } { p0 = bitsset(R3, R6) R0.L = #0x0000 R2 = add(R3, R5) R7 = lsr(R6, #8) } { if(p0) R4 = add(R4, #1) if(p0) R3 = #0 R2 = lsr(R2, #7) R0.H = #0x8000 } { R0 = and(R0, R1) R6 &= asl(R4, #23) if(!p0) R3 = and(R2, R7) if(p2) jump .Lmax } { R0 += add(R6, R3) jumpr r31 } .Lmax: { R0.L = #0xffff; } { R0.H = #0x7f7f; jumpr r31 } .Lmin: { R0 = #0x0 jumpr r31 } .text .global fast2_f2qd_asm .type fast2_f2qd_asm, @function fast2_f2qd_asm: .falign { R1 = asl(R0, #7) p0 = tstbit(R0, #31) R5:4 = #0 R3 = add(R0,R0) } { R1 = setbit(R1, #30) R0= extractu(R0,#8,#23) R4.L = #0x8001 p1 = cmp.eq(R3, #0) } { R1= extractu(R1, #31, #0) R0= add(R0, #-126) R2 = #0 if(p1) jump .Lminqd } { R0 = zxth(R0) if(p0) R1= sub(R2, R1) jumpr r31 } .Lminqd: { R1:0 = R5:4 jumpr r31 }
BilelGho/compiler-builtins
736
src/hexagon/divsi3.s
FUNCTION_BEGIN __hexagon_divsi3 { p0 = cmp.ge(r0,#0) p1 = cmp.ge(r1,#0) r1 = abs(r0) r2 = abs(r1) } { r3 = cl0(r1) r4 = cl0(r2) r5 = sub(r1,r2) p2 = cmp.gtu(r2,r1) } { r0 = #0 p1 = xor(p0,p1) p0 = cmp.gtu(r2,r5) if (p2) jumpr r31 } { r0 = mux(p1,#-1,#1) if (p0) jumpr r31 r4 = sub(r4,r3) r3 = #1 } { r0 = #0 r3:2 = vlslw(r3:2,r4) loop0(1f,r4) } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r0 = add(r0,r3) if (!p1) jumpr r31 } { r0 = neg(r0) jumpr r31 } FUNCTION_END __hexagon_divsi3 .globl __qdsp_divsi3 .set __qdsp_divsi3, __hexagon_divsi3
BilelGho/compiler-builtins
1,295
src/hexagon/memcpy_forward_vp4cp4n2.s
.text .globl hexagon_memcpy_forward_vp4cp4n2 .balign 32 .type hexagon_memcpy_forward_vp4cp4n2,@function hexagon_memcpy_forward_vp4cp4n2: { r3 = sub(##4096, r1) r5 = lsr(r2, #3) } { r3 = extractu(r3, #10, #2) r4 = extractu(r3, #7, #5) } { r3 = minu(r2, r3) r4 = minu(r5, r4) } { r4 = or(r4, ##2105344) p0 = cmp.eq(r3, #0) if (p0.new) jump:nt .Lskipprolog } l2fetch(r1, r4) { loop0(.Lprolog, r3) r2 = sub(r2, r3) } .falign .Lprolog: { r4 = memw(r1++#4) memw(r0++#4) = r4.new } :endloop0 .Lskipprolog: { r3 = lsr(r2, #10) if (cmp.eq(r3.new, #0)) jump:nt .Lskipmain } { loop1(.Lout, r3) r2 = extractu(r2, #10, #0) r3 = ##2105472 } .falign .Lout: l2fetch(r1, r3) loop0(.Lpage, #512) .falign .Lpage: r5:4 = memd(r1++#8) { memw(r0++#8) = r4 memw(r0+#4) = r5 } :endloop0:endloop1 .Lskipmain: { r3 = ##2105344 r4 = lsr(r2, #3) p0 = cmp.eq(r2, #0) if (p0.new) jumpr:nt r31 } { r3 = or(r3, r4) loop0(.Lepilog, r2) } l2fetch(r1, r3) .falign .Lepilog: { r4 = memw(r1++#4) memw(r0++#4) = r4.new } :endloop0 jumpr r31 .size hexagon_memcpy_forward_vp4cp4n2, . - hexagon_memcpy_forward_vp4cp4n2
BilelGho/compiler-builtins
721
src/hexagon/umoddi3.s
FUNCTION_BEGIN __hexagon_umoddi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_umoddi3_return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) } { r7:6 = sub(r3:2, r13:12) r9:8 = add(r1:0, r15:14) } { r1:0 = vmux(p0, r1:0, r9:8) r3:2 = vmux(p0, r3:2, r7:6) } { r15:14 = lsr(r15:14, #1) r13:12 = lsr(r13:12, #1) }:endloop0 .hexagon_umoddi3_return: { r1:0 = r3:2 jumpr r31 } FUNCTION_END __hexagon_umoddi3 .globl __qdsp_umoddi3 .set __qdsp_umoddi3, __hexagon_umoddi3
BilelGho/compiler-builtins
632
src/hexagon/udivmodsi4.s
FUNCTION_BEGIN __hexagon_udivmodsi4 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) p0 = cmp.eq(r6,#0) if (p0.new) r4 = #0 } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.new) r0 = add(r0,r3) r3:2 = vlsrw(r3:2,#1) }:endloop0 { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r4) if (!p0.new) r0 = add(r0,r3) jumpr r31 } FUNCTION_END __hexagon_udivmodsi4 .globl __qdsp_udivmodsi4 .set __qdsp_udivmodsi4, __hexagon_udivmodsi4
BilelGho/compiler-builtins
917
src/hexagon/dfminmax.s
.text .global __hexagon_mindf3 .global __hexagon_maxdf3 .global fmin .type fmin,@function .global fmax .type fmax,@function .type __hexagon_mindf3,@function .type __hexagon_maxdf3,@function .global __qdsp_mindf3 ; .set __qdsp_mindf3, __hexagon_mindf3 .global __qdsp_maxdf3 ; .set __qdsp_maxdf3, __hexagon_maxdf3 .p2align 5 __hexagon_mindf3: fmin: { p0 = dfclass(r1:0,#0x10) p1 = dfcmp.gt(r1:0,r3:2) r5:4 = r1:0 } { if (p0) r1:0 = r3:2 if (p1) r1:0 = r3:2 p2 = dfcmp.eq(r1:0,r3:2) if (!p2.new) jumpr:t r31 } { r1:0 = or(r5:4,r3:2) jumpr r31 } .size __hexagon_mindf3,.-__hexagon_mindf3 .falign __hexagon_maxdf3: fmax: { p0 = dfclass(r1:0,#0x10) p1 = dfcmp.gt(r3:2,r1:0) r5:4 = r1:0 } { if (p0) r1:0 = r3:2 if (p1) r1:0 = r3:2 p2 = dfcmp.eq(r1:0,r3:2) if (!p2.new) jumpr:t r31 } { r1:0 = and(r5:4,r3:2) jumpr r31 } .size __hexagon_maxdf3,.-__hexagon_maxdf3
BilelGho/compiler-builtins
3,804
src/hexagon/fastmath2_ldlib_asm.s
.text .global fast2_ldadd_asm .type fast2_ldadd_asm, @function fast2_ldadd_asm: .falign { R4 = memw(r29+#8) R5 = memw(r29+#24) r7 = r0 } { R6 = sub(R4, R5):sat P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { R6 = abs(R6):sat if ( P0) R4 = #1 if (!P0) R5 = #1 R9 = #62 } { R6 = MIN(R6, R9) R1:0 = memd(r29+#0) R3:2 = memd(r29+#16) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = add(R1:0, R3:2) R3:2 = #0 } { R4 = clb(R1:0) R9.L =#0x0001 } { R8 -= add(R4, #-1) R4 = add(R4, #-1) p0 = cmp.gt(R4, #58) R9.H =#0x8000 } { if(!p0)memw(r7+#8) = R8 R1:0 = ASL(R1:0, R4) if(p0) jump .Ldenorma1 } { memd(r7+#0) = R1:0 jumpr r31 } .Ldenorma1: memd(r7+#0) = R3:2 { memw(r7+#8) = R9 jumpr r31 } .text .global fast2_ldsub_asm .type fast2_ldsub_asm, @function fast2_ldsub_asm: .falign { R4 = memw(r29+#8) R5 = memw(r29+#24) r7 = r0 } { R6 = sub(R4, R5):sat P0 = CMP.GT(R4, R5); if ( P0.new) R8 = add(R4, #1) if (!P0.new) R8 = add(R5, #1) } { R6 = abs(R6):sat if ( P0) R4 = #1 if (!P0) R5 = #1 R9 = #62 } { R6 = min(R6, R9) R1:0 = memd(r29+#0) R3:2 = memd(r29+#16) } { if (!P0) R4 = add(R6, #1) if ( P0) R5 = add(R6, #1) } { R1:0 = ASR(R1:0, R4) R3:2 = ASR(R3:2, R5) } { R1:0 = sub(R1:0, R3:2) R3:2 = #0 } { R4 = clb(R1:0) R9.L =#0x0001 } { R8 -= add(R4, #-1) R4 = add(R4, #-1) p0 = cmp.gt(R4, #58) R9.H =#0x8000 } { if(!p0)memw(r7+#8) = R8 R1:0 = asl(R1:0, R4) if(p0) jump .Ldenorma_s } { memd(r7+#0) = R1:0 jumpr r31 } .Ldenorma_s: memd(r7+#0) = R3:2 { memw(r7+#8) = R9 jumpr r31 } .text .global fast2_ldmpy_asm .type fast2_ldmpy_asm, @function fast2_ldmpy_asm: .falign { R15:14 = memd(r29+#0) R3:2 = memd(r29+#16) R13:12 = #0 } { R8= extractu(R2, #31, #1) R9= extractu(R14, #31, #1) R13.H = #0x8000 } { R11:10 = mpy(R15, R3) R7:6 = mpy(R15, R8) R4 = memw(r29+#8) R5 = memw(r29+#24) } { R11:10 = add(R11:10, R11:10) R7:6 += mpy(R3, R9) } { R7:6 = asr(R7:6, #30) R8.L = #0x0001 p1 = cmp.eq(R15:14, R3:2) } { R7:6 = add(R7:6, R11:10) R4= add(R4, R5) p2 = cmp.eq(R3:2, R13:12) } { R9 = clb(R7:6) R8.H = #0x8000 p1 = and(p1, p2) } { R4-= add(R9, #-1) R9 = add(R9, #-1) if(p1) jump .Lsat1 } { R7:6 = asl(R7:6, R9) memw(R0+#8) = R4 p0 = cmp.gt(R9, #58) if(p0.new) jump:NT .Ldenorm1 } { memd(R0+#0) = R7:6 jumpr r31 } .Lsat1: { R13:12 = #0 R4+= add(R9, #1) } { R13.H = #0x4000 memw(R0+#8) = R4 } { memd(R0+#0) = R13:12 jumpr r31 } .Ldenorm1: { memw(R0+#8) = R8 R15:14 = #0 } { memd(R0+#0) = R15:14 jumpr r31 }
BilelGho/compiler-builtins
872
src/hexagon/sfsqrt_opt.s
FUNCTION_BEGIN __hexagon_sqrtf { r3,p0 = sfinvsqrta(r0) r5 = sffixupr(r0) r4 = ##0x3f000000 r1:0 = combine(#0,#0) } { r0 += sfmpy(r3,r5):lib r1 += sfmpy(r3,r4):lib r2 = r4 r3 = r5 } { r2 -= sfmpy(r0,r1):lib p1 = sfclass(r5,#1) } { r0 += sfmpy(r0,r2):lib r1 += sfmpy(r1,r2):lib r2 = r4 r3 = r5 } { r2 -= sfmpy(r0,r1):lib r3 -= sfmpy(r0,r0):lib } { r0 += sfmpy(r1,r3):lib r1 += sfmpy(r1,r2):lib r2 = r4 r3 = r5 } { r3 -= sfmpy(r0,r0):lib if (p1) r0 = or(r0,r5) } { r0 += sfmpy(r1,r3,p0):scale jumpr r31 } FUNCTION_END __hexagon_sqrtf .global __qdsp_sqrtf ; .set __qdsp_sqrtf, __hexagon_sqrtf .global __hexagon_fast_sqrtf ; .set __hexagon_fast_sqrtf, __hexagon_sqrtf .global __hexagon_fast2_sqrtf ; .set __hexagon_fast2_sqrtf, __hexagon_sqrtf
binary-bruce/batchos
1,460
os/src/link_app.S
.align 3 .section .data .global _num_app _num_app: .quad 7 .quad app_0_start .quad app_1_start .quad app_2_start .quad app_3_start .quad app_4_start .quad app_5_start .quad app_6_start .quad app_6_end .section .data .global app_0_start .global app_0_end app_0_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/00_hello_world.bin" app_0_end: .section .data .global app_1_start .global app_1_end app_1_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/01_store_fault.bin" app_1_end: .section .data .global app_2_start .global app_2_end app_2_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/02_power.bin" app_2_end: .section .data .global app_3_start .global app_3_end app_3_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/03_priv_inst.bin" app_3_end: .section .data .global app_4_start .global app_4_end app_4_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/04_priv_csr.bin" app_4_end: .section .data .global app_5_start .global app_5_end app_5_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/05_ultimate_answer.bin" app_5_end: .section .data .global app_6_start .global app_6_end app_6_start: .incbin "../user/target/riscv64gc-unknown-none-elf/release/06_print_stack_trace.bin" app_6_end:
binary-bruce/batchos
2,465
os/src/trap/trap.S
.altmacro # save register value to stack .macro SAVE_GP n sd x\n, \n*8(sp) .endm # load the stack value to register .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 # __alltraps is store in stvec register: see trap.rs init function # ecall triggers calling __alltraps by: # 1. save pc in sepc # 2. raise privilege to supervisor mode # 3. jump to stvec __alltraps: # see __restore: `csrrw sp, sscratch, sp` which put kernel stack value to sscratch csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, sp, -34*8 # save general-purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # save sstatus and sepc to trap context # we can use t0/t1/t2 freely, because they were saved on kernel stack csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it on the kernel stack csrr t2, sscratch sd t2, 2*8(sp) # set input argument of trap_handler(cx: &mut TrapContext) mv a0, sp # sp points to pushed trap context call trap_handler # Switch from supervisor mode to user mode # case1: start running app by __restore # case2: back to U after handling trap __restore: # a0 is the address of trap context, see batch.rs: `__restore(ctx as *const _ as usize);` # the address of trap context is actually the kernel stack after pushing the trap context to kernel stack mv sp, a0 # now sp->kernel stack(after allocated) # sstatus in trap context, it has information of the previous privilege which is set to user mode ld t0, 32*8(sp) # sepc in trap context, the entry point of user mode ld t1, 33*8(sp) # user stack ld t2, 2*8(sp) csrw sstatus, t0 csrw sepc, t1 csrw sscratch, t2 # sscratch->user stack # restore general-purpuse registers except sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # release TrapContext on kernel stack addi sp, sp, 34*8 # now sp->user stack, sscratch->kernel stack csrrw sp, sscratch, sp # switch to user mode from supervisor mode sret
binary-bruce/multios
803
os/src/task/switch.S
.altmacro .macro SAVE_SN n sd s\n, (\n+2)*8(a0) .endm .macro LOAD_SN n ld s\n, (\n+2)*8(a1) .endm .section .text .globl __switch __switch: # __switch( # current_task_cx_ptr: *mut TaskContext, # next_task_cx_ptr: *const TaskContext # ) # save kernel stack of current task sd sp, 8(a0) # save ra & s0~s11 of current execution sd ra, 0(a0) .set n, 0 .rept 12 SAVE_SN %n .set n, n + 1 .endr # restore ra & s0~s11 of next execution ld ra, 0(a1) # ra in task context .set n, 0 .rept 12 LOAD_SN %n .set n, n + 1 .endr # restore kernel stack of next task ld sp, 8(a1) # start to run the next task, # jump to instruction specified by ra in the task context ret
binary-bruce/multios
2,038
os/src/trap/trap.S
.altmacro # save register value to stack .macro SAVE_GP n sd x\n, \n*8(sp) .endm # load the stack value to register .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 # __alltraps is store in stvec register: see trap.rs init function # ecall triggers calling __alltraps by: # 1. save pc in sepc # 2. raise privilege to supervisor mode # 3. jump to stvec __alltraps: # see __restore: `csrrw sp, sscratch, sp` which put kernel stack value to sscratch csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, sp, -34*8 # save general-purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # save sstatus and sepc to trap context # we can use t0/t1/t2 freely, because they were saved on kernel stack csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it on the kernel stack csrr t2, sscratch sd t2, 2*8(sp) # set input argument of trap_handler(cx: &mut TrapContext) mv a0, sp # sp points to pushed trap context call trap_handler # Switch from supervisor mode to user mode # case1: start running app by __restore # case2: back to U after handling trap __restore: # now sp->kernel stack(after allocated), sscratch->user stack # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) ld t2, 2*8(sp) csrw sstatus, t0 csrw sepc, t1 csrw sscratch, t2 # restore general-purpuse registers except sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # release TrapContext on kernel stack addi sp, sp, 34*8 # now sp->kernel stack, sscratch->user stack csrrw sp, sscratch, sp sret
binary-bruce/procos
698
os/src/task/switch.S
.altmacro .macro SAVE_SN n sd s\n, (\n+2)*8(a0) .endm .macro LOAD_SN n ld s\n, (\n+2)*8(a1) .endm .section .text .globl __switch __switch: # __switch( # current_task_cx_ptr: *mut TaskContext, --> a0 # next_task_cx_ptr: *const TaskContext --> a1 # ) # save kernel stack of current task sd sp, 8(a0) # save ra & s0~s11 of current execution sd ra, 0(a0) .set n, 0 .rept 12 SAVE_SN %n .set n, n + 1 .endr # restore ra & s0~s11 of next execution ld ra, 0(a1) .set n, 0 .rept 12 LOAD_SN %n .set n, n + 1 .endr # restore kernel stack of next task ld sp, 8(a1) ret
binary-bruce/procos
1,640
os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text.trampoline .globl __alltraps .globl __restore .align 2 __alltraps: csrrw sp, sscratch, sp # now sp->*TrapContext in user space, sscratch->user stack # save other general purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # we can use t0/t1/t2 freely, because they have been saved in TrapContext csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it in TrapContext csrr t2, sscratch sd t2, 2*8(sp) # load kernel_satp into t0 ld t0, 34*8(sp) # load trap_handler into t1 ld t1, 36*8(sp) # move to kernel_sp ld sp, 35*8(sp) # switch to kernel space csrw satp, t0 sfence.vma # jump to trap_handler jr t1 __restore: # a0: *TrapContext in user space(Constant); a1: user space token # switch to user space csrw satp, a1 sfence.vma csrw sscratch, a0 mv sp, a0 # now sp points to TrapContext in user space, start restoring based on it # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) csrw sstatus, t0 csrw sepc, t1 # restore general purpose registers except x0/sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # back to user stack ld sp, 2*8(sp) sret
binary-bruce/tsos
803
os/src/task/switch.S
.altmacro .macro SAVE_SN n sd s\n, (\n+2)*8(a0) .endm .macro LOAD_SN n ld s\n, (\n+2)*8(a1) .endm .section .text .globl __switch __switch: # __switch( # current_task_cx_ptr: *mut TaskContext, # next_task_cx_ptr: *const TaskContext # ) # save kernel stack of current task sd sp, 8(a0) # save ra & s0~s11 of current execution sd ra, 0(a0) .set n, 0 .rept 12 SAVE_SN %n .set n, n + 1 .endr # restore ra & s0~s11 of next execution ld ra, 0(a1) # ra in task context .set n, 0 .rept 12 LOAD_SN %n .set n, n + 1 .endr # restore kernel stack of next task ld sp, 8(a1) # start to run the next task, # jump to instruction specified by ra in the task context ret
binary-bruce/tsos
2,038
os/src/trap/trap.S
.altmacro # save register value to stack .macro SAVE_GP n sd x\n, \n*8(sp) .endm # load the stack value to register .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 # __alltraps is store in stvec register: see trap.rs init function # ecall triggers calling __alltraps by: # 1. save pc in sepc # 2. raise privilege to supervisor mode # 3. jump to stvec __alltraps: # see __restore: `csrrw sp, sscratch, sp` which put kernel stack value to sscratch csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, sp, -34*8 # save general-purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # save sstatus and sepc to trap context # we can use t0/t1/t2 freely, because they were saved on kernel stack csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it on the kernel stack csrr t2, sscratch sd t2, 2*8(sp) # set input argument of trap_handler(cx: &mut TrapContext) mv a0, sp # sp points to pushed trap context call trap_handler # Switch from supervisor mode to user mode # case1: start running app by __restore # case2: back to U after handling trap __restore: # now sp->kernel stack(after allocated), sscratch->user stack # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) ld t2, 2*8(sp) csrw sstatus, t0 csrw sepc, t1 csrw sscratch, t2 # restore general-purpuse registers except sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # release TrapContext on kernel stack addi sp, sp, 34*8 # now sp->kernel stack, sscratch->user stack csrrw sp, sscratch, sp sret
binary-bruce/vmos
803
os/src/task/switch.S
.altmacro .macro SAVE_SN n sd s\n, (\n+2)*8(a0) .endm .macro LOAD_SN n ld s\n, (\n+2)*8(a1) .endm .section .text .globl __switch __switch: # __switch( # current_task_cx_ptr: *mut TaskContext, # next_task_cx_ptr: *const TaskContext # ) # save kernel stack of current task sd sp, 8(a0) # save ra & s0~s11 of current execution sd ra, 0(a0) .set n, 0 .rept 12 SAVE_SN %n .set n, n + 1 .endr # restore ra & s0~s11 of next execution ld ra, 0(a1) # ra in task context .set n, 0 .rept 12 LOAD_SN %n .set n, n + 1 .endr # restore kernel stack of next task ld sp, 8(a1) # start to run the next task, # jump to instruction specified by ra in the task context ret
binary-bruce/vmos
2,038
os/src/trap/trap.S
.altmacro # save register value to stack .macro SAVE_GP n sd x\n, \n*8(sp) .endm # load the stack value to register .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 # __alltraps is store in stvec register: see trap.rs init function # ecall triggers calling __alltraps by: # 1. save pc in sepc # 2. raise privilege to supervisor mode # 3. jump to stvec __alltraps: # see __restore: `csrrw sp, sscratch, sp` which put kernel stack value to sscratch csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, sp, -34*8 # save general-purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # save sstatus and sepc to trap context # we can use t0/t1/t2 freely, because they were saved on kernel stack csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it on the kernel stack csrr t2, sscratch sd t2, 2*8(sp) # set input argument of trap_handler(cx: &mut TrapContext) mv a0, sp # sp points to pushed trap context call trap_handler # Switch from supervisor mode to user mode # case1: start running app by __restore # case2: back to U after handling trap __restore: # now sp->kernel stack(after allocated), sscratch->user stack # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) ld t2, 2*8(sp) csrw sstatus, t0 csrw sepc, t1 csrw sscratch, t2 # restore general-purpuse registers except sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # release TrapContext on kernel stack addi sp, sp, 34*8 # now sp->kernel stack, sscratch->user stack csrrw sp, sscratch, sp sret
binary-bruce/vmos2
699
os/src/task/switch.S
.altmacro .macro SAVE_SN n sd s\n, (\n+2)*8(a0) .endm .macro LOAD_SN n ld s\n, (\n+2)*8(a1) .endm .section .text .globl __switch # __switch( # current_task_cx: *mut TaskContext, # next_task_cx: *const TaskContext # ) # # a0: current_task_cx # a1: next_task_cx __switch: # save kernel stack of current task sd sp, 8(a0) # save ra & s0~s11 of current execution sd ra, 0(a0) .set n, 0 .rept 12 SAVE_SN %n .set n, n + 1 .endr # restore ra & s0~s11 of next execution ld ra, 0(a1) .set n, 0 .rept 12 LOAD_SN %n .set n, n + 1 .endr # restore kernel stack of next task ld sp, 8(a1) ret
binary-bruce/vmos2
2,236
os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text.trampoline .globl __alltraps .globl __restore .align 2 # 1. point sp to trap context(original user stack is saved in sscratch) -> for step 2 # 2. save register values(including user stack) to trap context # 3. switch to kernel stack and kernel memory space(stored data in trap context) # 4. call trap_handler __alltraps: # see __restore: `csrw sscratch, a0` which put kernel stack value(beginning of trap context) to sscratch csrrw sp, sscratch, sp # now sp->*TrapContext in user space, sscratch->user stack # save other general purpose registers sd x1, 1*8(sp) # skip sp(x2), we will save it later sd x3, 3*8(sp) # skip tp(x4), application does not use it # save x5~x31 .set n, 5 .rept 27 SAVE_GP %n .set n, n+1 .endr # we can use t0/t1/t2 freely, because they have been saved in TrapContext csrr t0, sstatus csrr t1, sepc sd t0, 32*8(sp) sd t1, 33*8(sp) # read user stack from sscratch and save it in TrapContext csrr t2, sscratch sd t2, 2*8(sp) # load kernel_satp into t0 ld t0, 34*8(sp) # load trap_handler into t1 ld t1, 36*8(sp) # move to kernel_sp ld sp, 35*8(sp) # switch to kernel space csrw satp, t0 sfence.vma # jump to trap_handler jr t1 # __restore(trap_context: *TrapContext, user_token: usize) # 1. switch to user space(but still in supervisor mode) # 2. point sp to trap context # 3. restore register values in trap context # 4. restore sp to user stack # 5. sret __restore: # a0: *TrapContext in user space(Constant); a1: user space token # switch to user space csrw satp, a1 sfence.vma csrw sscratch, a0 mv sp, a0 # now sp points to TrapContext in user space, start restoring based on it # restore sstatus/sepc ld t0, 32*8(sp) ld t1, 33*8(sp) csrw sstatus, t0 csrw sepc, t1 # restore general purpose registers except x0/sp/tp ld x1, 1*8(sp) ld x3, 3*8(sp) .set n, 5 .rept 27 LOAD_GP %n .set n, n+1 .endr # back to user stack ld sp, 2*8(sp) sret
bludzetelksina/boyjack-os
549
kernel/arch/armv7/boot.s
.section .text .global _start _start: // Отключить прерывания cpsid i cpsid f // Настроить стэк (например, указать SP на верхнюю часть доступной памяти) ldr sp, =stack_top // Очистить регистры (опционально) mov r0, #0 mov r1, #0 mov r2, #0 mov r3, #0 // Передать управление в Rust-функцию ядра (например, kernel_main) bl kernel_main // Если kernel_main вернётся, зациклиться hang: b hang // Определение стэка (например, 16 KB) .section .bss.stack .space 16384 stack_top:
bludzetelksina/boyjack-os
1,337
kernel/arch/x86_64/boot.s
.section .text .global _start _start: cli # Отключить прерывания # Загрузить сегменты в регистры сегментов xor %ax, %ax mov %ax, %ds mov %ax, %es mov %ax, %ss mov %ax, %fs mov %ax, %gs # Загрузка GDT (Global Descriptor Table) lea gdt_descriptor(%rip), %rax lgdt (%rax) # Включить режим Protected Mode (если мы ещё не в нем) # Для простоты считаем, что GRUB уже загрузил в Protected Mode с включённым Long Mode # Установить сегментный регистр кодового сегмента для 64-битного режима mov $0x08, %ax # селектор кодового сегмента в GDT mov %ax, %cs # Переход в 64-битный режим (long mode) # На самом деле, переход выполняется через far jump: jmpq $0x08, $kernel_main .section .data gdt_start: .quad 0x0000000000000000 # NULL descriptor .quad 0x00AF9A000000FFFF # Кодовый сегмент 64-bit .quad 0x00AF92000000FFFF # Данные сегмент gdt_end: gdt_descriptor: .word gdt_end - gdt_start - 1 # size .quad gdt_start # адрес .section .text kernel_main: # Тут начинается Rust код, вызываемый из ASM # Передача управления на функцию ядра (в Rust) extern kernel_main_rust call kernel_main_rust # Если kernel_main_rust вернёт управление, бесконечный цикл .hang: hlt jmp .hang