repo_id stringlengths 5 115 | size int64 590 5.01M | file_path stringlengths 4 212 | content stringlengths 590 5.01M |
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wagiminator/C64-Collection | 6,375 | C64_xu1541/software/tools/opencbm-0.4.99.99/xu1541/bootloader/usbdrv/usbdrvasm.S | /* Name: usbdrvasm.S
* Project: AVR USB driver
* Author: Christian Starkjohann
* Creation Date: 2007-06-13
* Tabsize: 4
* Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH
* License: GNU GPL v2 (see License.txt) or proprietary (CommercialLicense.txt)
*/
/*
General Description:
This module is the assembler part of the USB driver. This file contains
general code (preprocessor acrobatics and CRC computation) and then includes
the file appropriate for the given clock rate.
*/
#include "iarcompat.h"
#ifndef __IAR_SYSTEMS_ASM__
/* configs for io.h */
# define __SFR_OFFSET 0
# define _VECTOR(N) __vector_ ## N /* io.h does not define this for asm */
# include <avr/io.h> /* for CPU I/O register definitions and vectors */
# define macro .macro /* GNU Assembler macro definition */
# define endm .endm /* End of GNU Assembler macro definition */
#endif /* __IAR_SYSTEMS_ASM__ */
#include "usbdrv.h" /* for common defs */
/* register names */
#define x1 r16
#define x2 r17
#define shift r18
#define cnt r19
#define x3 r20
#define x4 r21
#define bitcnt r22
#define phase x4
#define leap x4
/* Some assembler dependent definitions and declarations: */
#ifdef __IAR_SYSTEMS_ASM__
# define nop2 rjmp $+2 /* jump to next instruction */
# define XL r26
# define XH r27
# define YL r28
# define YH r29
# define ZL r30
# define ZH r31
# define lo8(x) LOW(x)
# define hi8(x) (((x)>>8) & 0xff) /* not HIGH to allow XLINK to make a proper range check */
extern usbRxBuf, usbDeviceAddr, usbNewDeviceAddr, usbInputBufOffset
extern usbCurrentTok, usbRxLen, usbRxToken, usbTxLen
extern usbTxBuf, usbMsgLen, usbTxLen1, usbTxBuf1, usbTxLen3, usbTxBuf3
# if USB_COUNT_SOF
extern usbSofCount
# endif
public usbCrc16
public usbCrc16Append
COMMON INTVEC
# ifndef USB_INTR_VECTOR
ORG INT0_vect
# else /* USB_INTR_VECTOR */
ORG USB_INTR_VECTOR
# undef USB_INTR_VECTOR
# endif /* USB_INTR_VECTOR */
# define USB_INTR_VECTOR usbInterruptHandler
rjmp USB_INTR_VECTOR
RSEG CODE
#else /* __IAR_SYSTEMS_ASM__ */
# define nop2 rjmp .+0 /* jump to next instruction */
# ifndef USB_INTR_VECTOR /* default to hardware interrupt INT0 */
# define USB_INTR_VECTOR INT0_vect
# endif
.text
.global USB_INTR_VECTOR
.type USB_INTR_VECTOR, @function
.global usbCrc16
.global usbCrc16Append
#endif /* __IAR_SYSTEMS_ASM__ */
#if USB_INTR_PENDING < 0x40 /* This is an I/O address, use in and out */
# define USB_LOAD_PENDING(reg) in reg, USB_INTR_PENDING
# define USB_STORE_PENDING(reg) out USB_INTR_PENDING, reg
#else /* It's a memory address, use lds and sts */
# define USB_LOAD_PENDING(reg) lds reg, USB_INTR_PENDING
# define USB_STORE_PENDING(reg) sts USB_INTR_PENDING, reg
#endif
;----------------------------------------------------------------------------
; Utility functions
;----------------------------------------------------------------------------
#ifdef __IAR_SYSTEMS_ASM__
/* Register assignments for usbCrc16 on IAR cc */
/* Calling conventions on IAR:
* First parameter passed in r16/r17, second in r18/r19 and so on.
* Callee must preserve r4-r15, r24-r29 (r28/r29 is frame pointer)
* Result is passed in r16/r17
* In case of the "tiny" memory model, pointers are only 8 bit with no
* padding. We therefore pass argument 1 as "16 bit unsigned".
*/
RTMODEL "__rt_version", "3"
/* The line above will generate an error if cc calling conventions change.
* The value "3" above is valid for IAR 4.10B/W32
*/
# define argLen r18 /* argument 2 */
# define argPtrL r16 /* argument 1 */
# define argPtrH r17 /* argument 1 */
# define resCrcL r16 /* result */
# define resCrcH r17 /* result */
# define ptrL ZL
# define ptrH ZH
# define ptr Z
# define byte r22
# define bitCnt r19
# define polyL r20
# define polyH r21
# define scratch r23
#else /* __IAR_SYSTEMS_ASM__ */
/* Register assignments for usbCrc16 on gcc */
/* Calling conventions on gcc:
* First parameter passed in r24/r25, second in r22/23 and so on.
* Callee must preserve r1-r17, r28/r29
* Result is passed in r24/r25
*/
# define argLen r22 /* argument 2 */
# define argPtrL r24 /* argument 1 */
# define argPtrH r25 /* argument 1 */
# define resCrcL r24 /* result */
# define resCrcH r25 /* result */
# define ptrL XL
# define ptrH XH
# define ptr x
# define byte r18
# define bitCnt r19
# define polyL r20
# define polyH r21
# define scratch r23
#endif
; extern unsigned usbCrc16(unsigned char *data, unsigned char len);
; data: r24/25
; len: r22
; temp variables:
; r18: data byte
; r19: bit counter
; r20/21: polynomial
; r23: scratch
; r24/25: crc-sum
; r26/27=X: ptr
usbCrc16:
mov ptrL, argPtrL
mov ptrH, argPtrH
ldi resCrcL, 0xff
ldi resCrcH, 0xff
ldi polyL, lo8(0xa001)
ldi polyH, hi8(0xa001)
crcByteLoop:
subi argLen, 1
brcs crcReady
ld byte, ptr+
ldi bitCnt, 8
crcBitLoop:
mov scratch, byte
eor scratch, resCrcL
lsr resCrcH
ror resCrcL
lsr byte
sbrs scratch, 0
rjmp crcNoXor
eor resCrcL, polyL
eor resCrcH, polyH
crcNoXor:
dec bitCnt
brne crcBitLoop
rjmp crcByteLoop
crcReady:
com resCrcL
com resCrcH
ret
; extern unsigned usbCrc16Append(unsigned char *data, unsigned char len);
usbCrc16Append:
rcall usbCrc16
st ptr+, resCrcL
st ptr+, resCrcH
ret
;----------------------------------------------------------------------------
; Now include the clock rate specific code
;----------------------------------------------------------------------------
#ifndef USB_CFG_CLOCK_KHZ
# define USB_CFG_CLOCK_KHZ 12000
#endif
#if USB_CFG_CLOCK_KHZ == 12000
# include "usbdrvasm12.inc"
#elif USB_CFG_CLOCK_KHZ == 15000
# include "usbdrvasm15.inc"
#elif USB_CFG_CLOCK_KHZ == 16000
# include "usbdrvasm16.inc"
#elif USB_CFG_CLOCK_KHZ == 16500
# include "usbdrvasm165.inc"
#else
# error "USB_CFG_CLOCK_KHZ is not one of the supported rates!"
#endif
|
wagiminator/C64-Collection | 3,727 | C64_xu1541/software/tools/opencbm-0.4.99.99/xu1541/bootloader/usbtiny/crc.S | ; ======================================================================
; Calculate and append CRC
;
; There are two versions of the CRC16 calculation, selectable by the
; USBTINY_FAST_CRC macro. The default implementation calculates one bit
; at a time, and is compact but relatively slow. The "fast" version
; processes 4 bits at a time, and is therefor about twice as fast, but
; 30 bytes larger.
;
; The fast version calculates 4 bits at a time, using a precomputed table
; of 16 values. Each value is 16 bits, but only the 8 significant bits
; are stored. The table should not cross a 256-byte page. The check.py
; script will check for this. An 8 bit algoritm would be even faster,
; but requires a lookup table of 512 bytes.
;
; Copyright 2006-2008 Dick Streefland
;
; This is free software, licensed under the terms of the GNU General
; Public License as published by the Free Software Foundation.
; ======================================================================
#include "def.h"
#if USBTINY_FAST_CRC
; ----------------------------------------------------------------------
; void crc(unsigned char *data, unsigned char len);
; ----------------------------------------------------------------------
#define data r24
#define len r22
#define b r18
#define tmp r19
#define zl r20
#define crc_l r24
#define crc_h r25
.text
.global crc
.type crc, @function
crc:
; crc = 0xffff
movw XL, r24
ldi crc_h, 0xff
ldi crc_l, 0xff
lsl len
breq done
ldi zl, lo8(crc4tab)
ldi ZH, hi8(crc4tab)
next_nibble:
; b = (len & 1 ? b >> 4 : *data++)
swap b
sbrs len, 0
ld b, X+
; index = (crc ^ b) & 0x0f
mov ZL, crc_l
eor ZL, b
andi ZL, 0x0f
; crc >>= 4
swap crc_h
swap crc_l
andi crc_l, 0x0f
mov tmp, crc_h
andi tmp, 0xf0
or crc_l, tmp
andi crc_h, 0x0f
; crc ^= crc4tab[index]
add ZL, zl
lpm tmp, Z+
eor crc_h, tmp
andi tmp, 1
eor crc_h, tmp
eor crc_l, tmp
; next nibble
dec len
brne next_nibble
done:
; crc ^= 0xffff
com crc_l
com crc_h
; append crc to buffer
st X+, crc_l
st X+, crc_h
ret
; ----------------------------------------------------------------------
; CRC table. As bits 1..8 are always zero, omit them.
; ----------------------------------------------------------------------
.section .progmem.crc,"a",@progbits
;;; .align 4 ; avoid crossing a page boundary
crc4tab:
.byte 0x00+0x00
.byte 0xcc+0x01
.byte 0xd8+0x01
.byte 0x14+0x00
.byte 0xf0+0x01
.byte 0x3c+0x00
.byte 0x28+0x00
.byte 0xe4+0x01
.byte 0xa0+0x01
.byte 0x6c+0x00
.byte 0x78+0x00
.byte 0xb4+0x01
.byte 0x50+0x00
.byte 0x9c+0x01
.byte 0x88+0x01
.byte 0x44+0x00
/* ---------------------------------------------------------------------- *\
#!/usr/bin/python
for crc in range(16):
for bit in range(4):
xor = crc & 1
crc >>= 1
if xor:
crc ^= 0xA001 # X^16 + X^15 + X^2 + 1 (reversed)
print "\t.byte\t0x%02x+0x%02x" % (crc >> 8, crc & 0xff)
\* ---------------------------------------------------------------------- */
#else
; ----------------------------------------------------------------------
; void crc(unsigned char *data, unsigned char len);
; ----------------------------------------------------------------------
#define data r24
#define len r22
#define b r18
#define con_01 r19
#define con_a0 r20
#define crc_l r24
#define crc_h r25
.text
.global crc
.type crc, @function
crc:
movw XL, r24
ldi crc_h, 0xff
ldi crc_l, 0xff
tst len
breq done1
ldi con_a0, 0xa0
ldi con_01, 0x01
next_byte:
ld b, X+
sec
ror b
next_bit:
brcc noflip
eor crc_l, con_01
noflip:
lsr crc_h
ror crc_l
brcc noxor
eor crc_h, con_a0
eor crc_l, con_01
noxor:
lsr b
brne next_bit
dec len
brne next_byte
done1:
com crc_l
com crc_h
st X+, crc_l
st X+, crc_h
ret
#endif
|
wagiminator/C64-Collection | 14,385 | C64_xu1541/software/tools/opencbm-0.4.99.99/xu1541/bootloader/usbtiny/int.S | ; ======================================================================
; USB interrupt handler
;
; This is the handler for the interrupt caused by the initial rising edge
; on the D+ USB signal. The NRZI encoding and bit stuffing are removed,
; and the packet is saved in one of the two input buffers. In some cases,
; a reply packet is sent right away.
;
; When a DATA0/DATA1 packet directly follows a SETUP or OUT packet, while
; this interrupt handler is not yet finished, there would be no time to
; return and take another interrupt. In that case, the second packet is
; decoded directly in the same invocation.
;
; This code is *extremely* time critical. For instance, there is not a
; single spare cycle in the receiver loop, and only two in the transmitter
; loop. In addition, the various code paths are laid out in such a way that
; the various USB timeouts are not violated, in particular the maximum time
; between the reception of a packet and the reply, which is 7.5 bit times
; (TRSPIPD2) for the captive cable that is mandatory for a low-speed USB
; device. The worst-case delay here is 55 cycles, which is well below the
; 60 cycles limit.
;
; The interrupt handler must be reached within 34 cycles after D+ goes high
; for the first time, so the interrupts should not be disabled for longer
; than 34-4-2=28 cycles.
;
; The end-of-packet (EOP) is sampled in the second bit, because the USB
; standard allows the EOP to be delayed by up to one bit. As the EOP
; duration is two bits, this is not a problem.
;
; Stack usage including the return address: 11 bytes.
;
; Copyright 2006-2008 Dick Streefland
;
; This is free software, licensed under the terms of the GNU General
; Public License as published by the Free Software Foundation.
; ======================================================================
#include "def.h"
; ----------------------------------------------------------------------
; local data
; ----------------------------------------------------------------------
.data
tx_ack: .byte USB_PID_ACK ; ACK packet
tx_nak: .byte USB_PID_NAK ; NAK packet
.lcomm token_pid, 1 ; PID of most recent token packet
; ----------------------------------------------------------------------
; register definitions
; ----------------------------------------------------------------------
// receiver:
#define count r16
#define usbmask r17
#define odd r18
#define byte r19
#define fixup r20
#define even r22
// transmitter:
#define output odd
#define done fixup
#define next even
// control:
#define pid odd
#define addr usbmask
#define tmp fixup
#define nop2 rjmp .+0 // not .+2 for some strange reason
; ----------------------------------------------------------------------
; interrupt handler
; ----------------------------------------------------------------------
.text
.global USB_INT_VECTOR
.type USB_INT_VECTOR, @function
; ----------------------------------------------------------------------
; This handler must be reached no later than 34 cycles after D+ goes high
; for the first time.
; ----------------------------------------------------------------------
USB_INT_VECTOR:
; save registers
push count
push usbmask
push odd
push YH
push YL
in count, SREG
push count
; ----------------------------------------------------------------------
; Synchronize to the pattern 10101011 on D+. This code must be reached
; no later than 47 cycles after D+ goes high for the first time.
; ----------------------------------------------------------------------
sync:
; wait until D+ == 0
sbic USB_IN, USBTINY_DPLUS
rjmp sync ; jump if D+ == 1
resync:
; sync on 0-->1 transition on D+ with a 2 cycle resolution
sbic USB_IN, USBTINY_DPLUS
rjmp sync6 ; jump if D+ == 1
sbic USB_IN, USBTINY_DPLUS
rjmp sync6 ; jump if D+ == 1
sbic USB_IN, USBTINY_DPLUS
rjmp sync6 ; jump if D+ == 1
sbic USB_IN, USBTINY_DPLUS
rjmp sync6 ; jump if D+ == 1
sbic USB_IN, USBTINY_DPLUS
rjmp sync6 ; jump if D+ == 1
ldi count, 1<<USB_INT_PENDING_BIT
out USB_INT_PENDING, count
rjmp return ; ==> false start, bail out
sync6:
; we are now between -1 and +1 cycle from the center of the bit
; following the 0-->1 transition
lds YL, usb_rx_off
clr YH
subi YL, lo8(-(usb_rx_buf)) ; Y = & usb_rx_buf[usb_rx_off]
sbci YH, hi8(-(usb_rx_buf))
ldi count, USB_BUFSIZE ; limit on number of bytes to receive
ldi usbmask, USB_MASK ; why is there no eori instruction?
ldi odd, USB_MASK_DPLUS
sync7:
; the last sync bit should also be 1
sbis USB_IN, USBTINY_DPLUS ; bit 7 of sync byte?
rjmp resync ; no, wait for next transition
push byte
push fixup
push even
; ----------------------------------------------------------------------
; receiver loop
; ----------------------------------------------------------------------
in even, USB_IN ; sample bit 0
ldi byte, 0x80 ; load sync byte for correct unstuffing
rjmp rxentry ; 2 cycles
rxloop:
in even, USB_IN ; sample bit 0
or fixup, byte
st Y+, fixup ; 2 cycles
rxentry:
clr fixup
andi even, USB_MASK
eor odd, even
subi odd, 1
in odd, USB_IN ; sample bit 1
andi odd, USB_MASK
breq eop ; ==> EOP detected
ror byte
cpi byte, 0xfc
brcc skip0
skipped0:
eor even, odd
subi even, 1
in even, USB_IN ; sample bit 2
andi even, USB_MASK
ror byte
cpi byte, 0xfc
brcc skip1
skipped1:
eor odd, even
subi odd, 1
ror byte
in odd, USB_IN ; sample bit 3
andi odd, USB_MASK
cpi byte, 0xfc
brcc skip2
eor even, odd
subi even, 1
ror byte
skipped2:
cpi byte, 0xfc
in even, USB_IN ; sample bit 4
andi even, USB_MASK
brcc skip3
eor odd, even
subi odd, 1
ror byte
skipped4:
cpi byte, 0xfc
skipped3:
brcc skip4
in odd, USB_IN ; sample bit 5
andi odd, USB_MASK
eor even, odd
subi even, 1
ror byte
skipped5:
cpi byte, 0xfc
brcc skip5
dec count
in even, USB_IN ; sample bit 6
brmi overflow ; ==> overflow
andi even, USB_MASK
eor odd, even
subi odd, 1
ror byte
skipped6:
cpi byte, 0xfc
brcc skip6
in odd, USB_IN ; sample bit 7
andi odd, USB_MASK
eor even, odd
subi even, 1
ror byte
cpi byte, 0xfc
brcs rxloop ; 2 cycles
rjmp skip7
eop:
rjmp eop2
overflow:
rjmp ignore
; ----------------------------------------------------------------------
; out-of-line code to skip stuffing bits
; ----------------------------------------------------------------------
skip0: ; 1+6 cycles
eor even, usbmask
in odd, USB_IN ; resample bit 1
andi odd, USB_MASK
cbr byte, (1<<7)
sbr fixup, (1<<0)
rjmp skipped0
skip1: ; 2+5 cycles
cbr byte, (1<<7)
sbr fixup, (1<<1)
in even, USB_IN ; resample bit 2
andi even, USB_MASK
eor odd, usbmask
rjmp skipped1
skip2: ; 3+7 cycles
cbr byte, (1<<7)
sbr fixup, (1<<2)
eor even, usbmask
in odd, USB_IN ; resample bit 3
andi odd, USB_MASK
eor even, odd
subi even, 1
ror byte
rjmp skipped2
skip3: ; 4+7 cycles
cbr byte, (1<<7)
sbr fixup, (1<<3)
eor odd, usbmask
ori byte, 1
in even, USB_IN ; resample bit 4
andi even, USB_MASK
eor odd, even
subi odd, 1
ror byte
rjmp skipped3
skip4: ; 5 cycles
cbr byte, (1<<7)
sbr fixup, (1<<4)
eor even, usbmask
rjmp skipped4
skip5: ; 5 cycles
cbr byte, (1<<7)
sbr fixup, (1<<5)
eor odd, usbmask
rjmp skipped5
skip6: ; 5 cycles
cbr byte, (1<<7)
sbr fixup, (1<<6)
eor even, usbmask
rjmp skipped6
skip7: ; 7 cycles
cbr byte, (1<<7)
sbr fixup, (1<<7)
eor odd, usbmask
nop2
rjmp rxloop
; ----------------------------------------------------------------------
; end-of-packet detected (worst-case: 3 cycles after end of SE0)
; ----------------------------------------------------------------------
eop2:
; clear pending interrupt (SE0+3)
ldi byte, 1<<USB_INT_PENDING_BIT
out USB_INT_PENDING, byte ; clear pending bit at end of packet
; ignore packets shorter than 3 bytes
subi count, USB_BUFSIZE
neg count ; count = packet length
cpi count, 3
brlo ignore
; get PID
sub YL, count
ld pid, Y
; check for DATA0/DATA1 first, as this is the critical path (SE0+12)
cpi pid, USB_PID_DATA0
breq is_data ; handle DATA0 packet
cpi pid, USB_PID_DATA1
breq is_data ; handle DATA1 packet
; check ADDR (SE0+16)
ldd addr, Y+1
andi addr, 0x7f
lds tmp, usb_address
cp addr, tmp ; is this packet for me?
brne ignore ; no, ignore
; check for other PIDs (SE0+23)
cpi pid, USB_PID_IN
breq is_in ; handle IN packet
cpi pid, USB_PID_SETUP
breq is_setup_out ; handle SETUP packet
cpi pid, USB_PID_OUT
breq is_setup_out ; handle OUT packet
; ----------------------------------------------------------------------
; exit point for ignored packets
; ----------------------------------------------------------------------
ignore:
clr tmp
sts token_pid, tmp
pop even
pop fixup
pop byte
rjmp return
; ----------------------------------------------------------------------
; Handle SETUP/OUT (SE0+30)
; ----------------------------------------------------------------------
is_setup_out:
sts token_pid, pid ; save PID of token packet
pop even
pop fixup
pop byte
in count, USB_INT_PENDING ; next packet already started?
sbrc count, USB_INT_PENDING_BIT
rjmp sync ; yes, get it right away (SE0+42)
; ----------------------------------------------------------------------
; restore registers and return from interrupt
; ----------------------------------------------------------------------
return:
pop count
out SREG, count
pop YL
pop YH
pop odd
pop usbmask
pop count
reti
; ----------------------------------------------------------------------
; Handle IN (SE0+26)
; ----------------------------------------------------------------------
is_in:
lds count, usb_tx_len
tst count ; data ready?
breq nak ; no, reply with NAK
lds tmp, usb_rx_len
tst tmp ; unprocessed input packet?
brne nak ; yes, don't send old data for new packet
sts usb_tx_len, tmp ; buffer is available again (after reti)
lds tmp, usb_new_address
sts usb_address, tmp ; assign new address at end of transfer
ldi YL, lo8(usb_tx_buf)
ldi YH, hi8(usb_tx_buf)
rjmp send_packet ; SE0+44, SE0 --> SOP <= 55
; ----------------------------------------------------------------------
; Handle DATA0/DATA1 (SE0+17)
; ----------------------------------------------------------------------
is_data:
lds pid, token_pid
tst pid ; data following our SETUP/OUT
breq ignore ; no, ignore
lds tmp, usb_rx_len
tst tmp ; buffer free?
brne nak ; no, reply with NAK
sts usb_rx_len, count ; pass buffer length
sts usb_rx_token, pid ; pass PID of token (SETUP or OUT)
lds count, usb_rx_off ; switch to other input buffer
ldi tmp, USB_BUFSIZE
sub tmp, count
sts usb_rx_off, tmp
; ----------------------------------------------------------------------
; send ACK packet (SE0+35)
; ----------------------------------------------------------------------
ack:
ldi YL, lo8(tx_ack)
ldi YH, hi8(tx_ack)
rjmp send_token
; ----------------------------------------------------------------------
; send NAK packet (SE0+36)
; ----------------------------------------------------------------------
nak:
ldi YL, lo8(tx_nak)
ldi YH, hi8(tx_nak)
send_token:
ldi count, 1 ; SE0+40, SE0 --> SOP <= 51
; ----------------------------------------------------------------------
; acquire the bus and send a packet (11 cycles to SOP)
; ----------------------------------------------------------------------
send_packet:
in output, USB_OUT
cbr output, USB_MASK
ori output, USB_MASK_DMINUS
in usbmask, USB_DDR
ori usbmask, USB_MASK
out USB_OUT, output ; idle state
out USB_DDR, usbmask ; acquire bus
ldi usbmask, USB_MASK
ldi byte, 0x80 ; start with sync byte
; ----------------------------------------------------------------------
; transmitter loop
; ----------------------------------------------------------------------
txloop:
sbrs byte, 0
eor output, usbmask
out USB_OUT, output ; output bit 0
ror byte
ror done
stuffed0:
cpi done, 0xfc
brcc stuff0
sbrs byte, 0
eor output, usbmask
ror byte
stuffed1:
out USB_OUT, output ; output bit 1
ror done
cpi done, 0xfc
brcc stuff1
sbrs byte, 0
eor output, usbmask
ror byte
nop
stuffed2:
out USB_OUT, output ; output bit 2
ror done
cpi done, 0xfc
brcc stuff2
sbrs byte, 0
eor output, usbmask
ror byte
nop
stuffed3:
out USB_OUT, output ; output bit 3
ror done
cpi done, 0xfc
brcc stuff3
sbrs byte, 0
eor output, usbmask
ld next, Y+ ; 2 cycles
out USB_OUT, output ; output bit 4
ror byte
ror done
stuffed4:
cpi done, 0xfc
brcc stuff4
sbrs byte, 0
eor output, usbmask
ror byte
stuffed5:
out USB_OUT, output ; output bit 5
ror done
cpi done, 0xfc
brcc stuff5
sbrs byte, 0
eor output, usbmask
ror byte
stuffed6:
ror done
out USB_OUT, output ; output bit 6
cpi done, 0xfc
brcc stuff6
sbrs byte, 0
eor output, usbmask
ror byte
mov byte, next
stuffed7:
ror done
out USB_OUT, output ; output bit 7
cpi done, 0xfc
brcc stuff7
dec count
brpl txloop ; 2 cycles
rjmp gen_eop
; ----------------------------------------------------------------------
; out-of-line code to insert stuffing bits
; ----------------------------------------------------------------------
stuff0: ; 2+3
eor output, usbmask
clr done
out USB_OUT, output
rjmp stuffed0
stuff1: ; 3
eor output, usbmask
rjmp stuffed1
stuff2: ; 3
eor output, usbmask
rjmp stuffed2
stuff3: ; 3
eor output, usbmask
rjmp stuffed3
stuff4: ; 2+3
eor output, usbmask
clr done
out USB_OUT, output
rjmp stuffed4
stuff5: ; 3
eor output, usbmask
rjmp stuffed5
stuff6: ; 3
eor output, usbmask
rjmp stuffed6
stuff7: ; 3
eor output, usbmask
rjmp stuffed7
; ----------------------------------------------------------------------
; generate EOP, release the bus, and return from interrupt
; ----------------------------------------------------------------------
gen_eop:
cbr output, USB_MASK
out USB_OUT, output ; output SE0 for 2 bit times
pop even
pop fixup
pop byte
ldi count, 1<<USB_INT_PENDING_BIT
out USB_INT_PENDING, count ; interrupt was triggered by transmit
pop YH ; this is the saved SREG
pop YL
in usbmask, USB_DDR
mov count, output
ori output, USB_MASK_DMINUS
out USB_OUT, output ; output J state for 1 bit time
cbr usbmask, USB_MASK
out SREG, YH
pop YH
pop odd ; is the same register as output!
nop
out USB_DDR, usbmask ; release bus
out USB_OUT, count ; disable D- pullup
pop usbmask
pop count
reti
|
wagiminator/Development-Boards | 23,229 | CH32V003F4P6_DevBoard_VUSB/software/capsblock/src/usb_handler.S | // ===================================================================================
// Software USB Handler for CH32V003 * v1.0 *
// ===================================================================================
//
// This file contains a copy of rv003usb.S (https://github.com/cnlohr/rv003usb),
// copyright (c) 2023 CNLohr (MIT License).
#include "ch32v003.h"
#include "usb_handler.h"
#define CFGLR_OFFSET 0
#define INDR_OFFSET 8
#define BSHR_OFFSET 16
#define LOCAL_CONCAT(A, B) A##B
#define LOCAL_EXP(A, B) LOCAL_CONCAT(A,B)
#define SYSTICK_CNT 0xE000F008
// This is 6 * n + 3 cylces
#define nx6p3delay( n, freereg ) li freereg, ((n)+1); 1: c.addi freereg, -1; c.bnez freereg, 1b
//See RV003USB_DEBUG_TIMING note in .c file.
#if defined( RV003USB_DEBUG_TIMING ) && RV003USB_DEBUG_TIMING
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x24) // for debug
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#else
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x58) // for debug (Go nowhere)
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#endif
.global test_memory
.global rv003usb_internal_data
.global rv003usb_handle_packet
.global usb_send_data
.global usb_send_empty
.global main
.global always0
/* Register map
zero, ra, sp, gp, tp, t0, t1, t2
Compressed:
s0, s1, a0, a1, a2, a3, a4, a5
*/
.section .text.vector_handler
.global EXTI7_0_IRQHandler
.balign 4
EXTI7_0_IRQHandler:
addi sp,sp,-80
sw a0, 0(sp)
sw a5, 20(sp)
la a5, USB_GPIO_BASE
c.lw a0, INDR_OFFSET(a5) // MUST check SE0 immediately.
c.andi a0, USB_DMASK
sw a1, 4(sp)
sw a2, 8(sp)
sw a3, 12(sp)
sw a4, 16(sp)
sw s1, 28(sp)
SAVE_DEBUG_MARKER( 48 );
DEBUG_TICK_SETUP
c.lw a1, INDR_OFFSET(a5)
c.andi a1, USB_DMASK;
// Finish jump to se0
c.beqz a0, handle_se0_keepalive
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.j syncout
syncout:
sw s0, 24(sp)
li a2, 0
sw t0, 32(sp) // XXX NOTE: This is actually unused register - remove some day?
sw t1, 36(sp)
// We are coarsely sync'd here.
// This will be called when we have synchronized our USB. We can put our
// preamble detect code here. But we have a whole free USB bit cycle to
// do whatever we feel like.
// A little weird, but this way, the USB packet is always aligned.
#define DATA_PTR_OFFSET (59+4)
// This is actually somewhat late.
// The preamble loop should try to make it earlier.
.balign 4
preamble_loop:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // SE0 here?
c.xor a0, a1;
c.xor a1, a0; // Recover a1.
j 1f; 1: // 4 cycles?
c.beqz a0, done_preamble
j 1f; 1: // 4 cycles?
c.lw s0, INDR_OFFSET(a5);
c.andi s0, USB_DMASK;
c.xor s0, a1
// TRICKY: This helps retime the USB sync.
// If s0 is nonzero, then it's changed (we're going too slow)
c.bnez s0, 2f; // This code takes 6 cycles or 8 cycles, depending.
c.j 1f; 1:
2:
j preamble_loop // 4 cycles
.balign 4
done_preamble:
sw t2, 40(sp)
sw ra, 52(sp)
// 16-byte temporary buffer at 56+sp
// XXX TODO: Do one byte here to determine the header byte and from that set the CRC.
c.li s1, 8
// This is the first bit that matters.
c.li s0, 6 // 1 runs.
c.nop;
// 8 extra cycles here cause errors.
// -5 cycles is too much.
// -4 to +6 cycles is OK
//XXX NOTE: It actuall wouldn't be too bad to inser an *extra* cycle here.
/* register meanings:
* x4 = TP = used for triggering debug.
* T0 = Totally unushed.
* T1 = TEMPORARY
* T2 = Pointer to the memory address we are writing to.
* A0 = temp / current bit value.
* A1 = last-frame's GPIO values.
* A2 = The running word
* A3 = Running CRC
* a4 = Polynomial
* A5 = GPIO Offset
* S0 = Bit Stuff Place
* S1 = # output bits remaining.
*/
.balign 4
packet_type_loop:
// Up here to delay loop a tad, and we need to execute them anyway.
// TODO: Maybe we could further sync bits here instead of take up time?
// I.e. can we do what we're doing above, here, and take less time, but sync
// up when possible.
li a3, 0xffff // Starting CRC of 0. Because USB doesn't respect reverse CRCing.
li a4, 0xa001
addi t2, sp, DATA_PTR_OFFSET //rv003usb_internal_data
la t0, 0x80
c.nop
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // Not se0 complete, that can't happen here and be valid.
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle
// a0 = 00 for 1 and 11 for 0
// No CRC for the header.
//c.srli a0, USB_PIN_DP
//c.addi a0, 1 // 00 -> 1, 11 -> 100
//c.andi a0, 1 // If 1, 1 if 0, 0
c.nop
seqz a0, a0
// Write header into byte in reverse order, because we can.
c.slli a2, 1
c.or a2, a0
// Handle bit stuffing rules.
c.addi a0, -1 // 0->0xffffffff 1->0
c.or s0, a0
c.andi s0, 7
c.addi s0, -1
c.addi s1, -1
c.bnez s1, packet_type_loop
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
// XXX Here, figure out CRC polynomial.
li s1, (USB_BUFFER_SIZE*8) // # of bits we culd read.
// WARNING: a0 is bit-wise backwards here.
// 0xb4 for instance is a setup packet.
//
// When we get here, packet type is loaded in A2.
// If packet type is 0xXX01 or 0xXX11
// the LSBs are the inverted packet type.
// we can branch off of bit 2.
andi a0, a2, 0x0c
// if a0 is 1 then it's DATA (full CRC) otheriwse,
// (0) for setup or PARTIAL CRC.
// Careful: This has to take a constant amount of time either way the branch goes.
c.beqz a0, data_crc
c.li a4, 0x14
c.li a3, 0x1e
.word 0x00000013 // nop, for alignment of data_crc.
data_crc:
#define HANDLE_EOB_YES \
sb a2, 0(t2); /* Save the byte off. TODO: Is unaligned byte access to RAM slow? */ \
.word 0x00138393; /*addi t2, t2, 1;*/
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
.balign 4
is_end_of_byte:
HANDLE_EOB_YES
// end-of-byte.
.balign 4
bit_process:
// Debug blip
// c.lw a4, INDR_OFFSET(a5);
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.xor a0, a1;
//XXX GOOD
#define HANDLE_NEXT_BYTE(is_end_of_byte, jumptype) \
c.addi s1, -1; \
andi a0, s1, 7; /* s1 could be really really big */ \
c.jumptype a0, is_end_of_byte /* 4 cycles for this section. (Checked) (Sometimes 5)? */
c.beqz a0, handle_one_bit
handle_zero_bit:
c.xor a1, a0; // Recover a1, for next cycle
// TODO: Do we have time to do time fixup here?
// Can we resync time here?
// If they are different, we need to sloowwww dowwwnnn
// There is some free time. Could do something interesting here!!!
// I was thinking we could put the resync code here.
c.j 1f; 1: //Delay 4 cycles.
c.li s0, 6 // reset runs-of-one.
c.beqz a1, se0_complete
// Handle CRC (0 bit) (From @Domkeykong)
slli a0,a3,31 // Put a3s LSB into a0s MSB
c.srai a0,31 // Copy MSB into all other bits
c.srli a3,1
c.and a0, a4
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
.balign 4
handle_one_bit:
c.addi s0, -1; // Count # of runs of 1 (subtract 1)
//HANDLE_CRC (1 bit)
andi a0, a3, 1
c.addi a0, -1
c.and a0, a4
c.srli a3, 1
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
ori a2, a2, 0x80
c.beqz s0, handle_bit_stuff;
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop // Need extra delay here because we need more time if it's end-of-byte.
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
handle_bit_stuff:
// We want to wait a little bit, then read another byte, and make
// sure everything is well, before heading back into the main loop
// Debug blip
HANDLE_NEXT_BYTE(not_is_end_of_byte_and_bit_stuffed, bnez)
HANDLE_EOB_YES
not_is_end_of_byte_and_bit_stuffed:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, se0_complete
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle.
// If A0 is a 0 then that's bad, we just did a bit stuff
// and A0 == 0 means there was no signal transition
c.beqz a0, done_usb_message
// Reset bit stuff, delay, then continue onto the next actual bit
c.li s0, 6;
c.nop;
nx6p3delay( 2, a0 )
c.bnez s1, bit_process // + 4 cycles
.balign 4
se0_complete:
// This is triggered when we finished getting a packet.
andi a0, s1, 7; // Make sure we received an even number of bytes.
c.bnez a0, done_usb_message
// Special: handle ACKs?
// Now we have to decide what we're doing based on the
// packet type.
addi a1, sp, DATA_PTR_OFFSET
XW_C_LBU(a0, a1, 0); //lbu a0, 0(a1)
c.addi a1, 1
// 0010 => 01001011 => ACK
// 0011 => 11000011 => DATA0
// 1011 => 11010010 => DATA1
// 1001 => 10010110 => PID IN
// 0001 => 10000111 => PID_OUT
// 1101 => 10110100 => SETUP (OK)
// a0 contains first 4 bytes.
la ra, done_usb_message_in // Common return address for all function calls.
// For ACK don't worry about CRC.
addi a5, a0, -0b01001011
RESTORE_DEBUG_MARKER(48) // restore x4 for whatever in C land.
la a4, rv003usb_internal_data
// ACK doesn't need good CRC.
c.beqz a5, usb_pid_handle_ack
// Next, check for tokens.
c.bnez a3, crc_for_tokens_would_be_bad_maybe_data
may_be_a_token:
// Our CRC is 0, so we might be a token.
// Do token-y things.
XW_C_LHU( a2, a1, 0 )
andi a0, a2, 0x7f // addr
c.srli a2, 7
c.andi a2, 0xf // endp
li s0, ENDPOINTS
bgeu a2, s0, done_usb_message // Make sure < ENDPOINTS
c.beqz a0, yes_check_tokens
// Otherwise, we might have our assigned address.
XW_C_LBU(s0, a4, MY_ADDRESS_OFFSET_BYTES); // lbu s0, MY_ADDRESS_OFFSET_BYTES(a4)
bne s0, a0, done_usb_message // addr != 0 && addr != ours.
yes_check_tokens:
addi a5, a5, (0b01001011-0b10000111)
c.beqz a5, usb_pid_handle_out
c.addi a5, (0b10000111-0b10010110)
c.beqz a5, usb_pid_handle_in
c.addi a5, (0b10010110-0b10110100)
c.beqz a5, usb_pid_handle_setup
c.j done_usb_message_in
// CRC is nonzero. (Good for Data packets)
crc_for_tokens_would_be_bad_maybe_data:
li s0, 0xb001 // UGH: You can't use the CRC16 in reverse :(
c.sub a3, s0
c.bnez a3, done_usb_message_in
// Good CRC!!
sub a3, t2, a1 //a3 = # of bytes read..
c.addi a3, 1
addi a5, a5, (0b01001011-0b11000011)
c.li a2, 0
c.beqz a5, usb_pid_handle_data
c.addi a5, (0b11000011-0b11010010)
c.li a2, 1
c.beqz a5, usb_pid_handle_data
done_usb_message:
done_usb_message_in:
lw s0, 24(sp)
lw s1, 28(sp)
lw t0, 32(sp)
lw t1, 36(sp)
lw t2, 40(sp)
lw ra, 52(sp)
ret_from_se0:
lw s1, 28(sp)
RESTORE_DEBUG_MARKER(48)
lw a2, 8(sp)
lw a3, 12(sp)
lw a4, 16(sp)
lw a1, 4(sp)
interrupt_complete:
// Acknowledge interrupt.
// EXTI->INTFR = 1<<4
c.j 1f; 1: // Extra little bit of delay to make sure we don't accidentally false fire.
la a5, EXTI_BASE + 20
li a0, (1<<USB_PIN_DM)
sw a0, 0(a5)
// Restore stack.
lw a0, 0(sp)
lw a5, 20(sp)
addi sp,sp,80
mret
///////////////////////////////////////////////////////////////////////////////
// High level functions.
#ifdef RV003USB_OPTIMIZE_FLASH
/*
void usb_pid_handle_ack( uint32_t dummy, uint8_t * data, uint32_t dummy1, uint32_t dummy2, struct rv003usb_internal * ist )
{
struct usb_endpoint * e = &ist->eps[ist->current_endpoint];
e->toggle_in = !e->toggle_in;
e->count++;
return;
}
*/
usb_pid_handle_ack:
c.lw a2, 0(a4) //ist->current_endpoint -> endp;
c.slli a2, 5
c.add a2, a4
c.addi a2, ENDP_OFFSET // usb_endpoint eps[ENDPOINTS];
c.lw a0, (EP_TOGGLE_IN_OFFSET)(a2) // toggle_in=!toggle_in
c.li a1, 1
c.xor a0, a1
c.sw a0, (EP_TOGGLE_IN_OFFSET)(a2)
c.lw a0, (EP_COUNT_OFFSET)(a2) // count_in
c.addi a0, 1
c.sw a0, (EP_COUNT_OFFSET)(a2)
c.j done_usb_message_in
/*
//Received a setup for a specific endpoint.
void usb_pid_handle_setup( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
{
ist->current_endpoint = endp;
struct usb_endpoint * e = &ist->eps[endp];
e->toggle_out = 0;
e->count = 0;
e->toggle_in = 1;
ist->setup_request = 1;
}*/
usb_pid_handle_setup:
c.sw a2, 0(a4) // ist->current_endpoint = endp
c.li a1, 1
c.sw a1, SETUP_REQUEST_OFFSET(a4) //ist->setup_request = 1;
c.slli a2, 3+2
c.add a2, a4
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_IN_OFFSET)(a2) //e->toggle_in = 1;
c.li a1, 0
c.sw a1, (ENDP_OFFSET+EP_COUNT_OFFSET)(a2) //e->count = 0;
c.sw a1, (ENDP_OFFSET+EP_OPAQUE_OFFSET)(a2) //e->opaque = 0;
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_OUT_OFFSET)(a2) //e->toggle_out = 0;
c.j done_usb_message_in
#endif
//We need to handle this here because we could have an interrupt in the middle of a control or big transfer.
//This will correctly swap back the endpoint.
usb_pid_handle_out:
//void usb_pid_handle_out( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
//sb a2, 0(a4) //ist->current_endpoint = endp;
XW_C_SB( a2, a4, 0 ); // current_endpoint = endp
c.j done_usb_message_in
handle_se0_keepalive:
// In here, we want to do smart stuff with the
// 1ms tick.
la a0, SYSTICK_CNT
la a4, rv003usb_internal_data
c.lw a1, LAST_SE0_OFFSET(a4) //last cycle count last_se0_cyccount
c.lw a2, 0(a0) //this cycle count
c.sw a2, LAST_SE0_OFFSET(a4) //store it back to last_se0_cyccount
c.sub a2, a1
c.sw a2, DELTA_SE0_OFFSET(a4) //record delta_se0_cyccount
li a1, 48000
c.sub a2, a1
// This is our deviance from 48MHz.
// Make sure we aren't in left field.
li a5, 4000
bge a2, a5, ret_from_se0
li a5, -4000
blt a2, a5, ret_from_se0
c.lw a1, SE0_WINDUP_OFFSET(a4) // load windup se0_windup
c.add a1, a2
c.sw a1, SE0_WINDUP_OFFSET(a4) // save windup
// No further adjustments
beqz a1, ret_from_se0
// 0x40021000 = RCC.CTLR
la a4, 0x40021000
lw a0, 0(a4)
srli a2, a0, 3 // Extract HSI Trim.
andi a2, a2, 0b11111
li a5, 0xffffff07
and a0, a0, a5 // Mask off non-HSI
// Decimate windup - use as HSIrim.
neg a1, a1
srai a2, a1, 9
addi a2, a2, 16 // add hsi offset.
// Put trim in place in register.
slli a2, a2, 3
or a0, a0, a2
sw a0, 0(a4)
j ret_from_se0
//////////////////////////////////////////////////////////////////////////////
// SEND DATA /////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
.balign 4
//void usb_send_empty( uint32_t token );
usb_send_empty:
c.mv a3, a0
la a0, always0
li a1, 2
c.mv a2, a1
//void usb_send_data( uint8_t * data, uint32_t length, uint32_t poly_function, uint32_t token );
usb_send_data:
addi sp,sp,-16
sw s0, 0(sp)
sw s1, 4(sp)
la a5, USB_GPIO_BASE
// ASAP: Turn the bus around and send our preamble + token.
c.lw a4, CFGLR_OFFSET(a5)
li s1, ~((0b1111<<(USB_PIN_DP*4)) | (0b1111<<(USB_PIN_DM*4)))
and a4, s1, a4
// Convert D+/D- into 2MHz outputs
li s1, ((0b0010<<(USB_PIN_DP*4)) | (0b0010<<(USB_PIN_DM*4)))
or a4, s1, a4
li s1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16))
c.sw s1, BSHR_OFFSET(a5)
//00: Universal push-pull output mode
c.sw a4, CFGLR_OFFSET(a5)
li t1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16)) | (1<<USB_PIN_DM) | (1<<(USB_PIN_DP+16));
SAVE_DEBUG_MARKER( 8 )
// Save off our preamble and token.
c.slli a3, 7 //Put token further up so it gets sent later.
ori s0, a3, 0x40
li t0, 0x0000
c.bnez a2, done_poly_check
li t0, 0xa001
li a2, 0xffff
done_poly_check:
c.slli a1, 3 // bump up one extra to be # of bits
mv t2, a1
// t0 is our polynomial
// a2 is our running CRC.
// a3 is our token.
DEBUG_TICK_SETUP
c.li a4, 6 // reset bit stuffing.
c.li a1, 15 // 15 bits.
//c.nop; c.nop; c.nop;
c.j pre_and_tok_send_inner_loop
////////////////////////////////////////////////////////////////////////////
// Send preamble + token
.balign 4
pre_and_tok_send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.srli s0, 1 // Shift down into the next bit.
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.addi a4, -1
c.bnez a3, pre_and_tok_send_one_bit
//pre_and_tok_send_one_bit:
//Send 0 bit. (Flip)
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
// DO NOT flip. Allow a4 to increment.
// Deliberately unaligned for timing purposes.
.balign 4
pre_and_tok_send_one_bit:
sw s1, BSHR_OFFSET(a5)
//Bit stuffing doesn't happen.
c.addi a1, -1
c.beqz a1, pre_and_tok_done_sending_data
nx6p3delay( 2, a3 ); c.nop; // Free time!
c.j pre_and_tok_send_inner_loop
.balign 4
pre_and_tok_done_sending_data:
////////////////////////////////////////////////////////////////////////////
// We have very little time here. Just enough to do this.
//Restore size.
mv a1, t2//lw a1, 12(sp)
c.beqz a1, no_really_done_sending_data //No actual payload? Bail!
c.addi a1, -1
// beqz t2, no_really_done_sending_data
bnez t0, done_poly_check2
li a2, 0xffff
done_poly_check2:
// t0 is used for CRC
// t1 is free
// t2 is a backup of size.
// s1 is our last "state"
// bit 0 is last "physical" state,
//
// s0 is our current "bit" / byte / temp.
// a0 is our data
// a1 is is our length
// a2 our CRC
// a3 is TEMPORARY
// a4 is used for bit stuffing.
// a5 is the output address.
//xor s1, s1, t1
//c.sw s1, BSHR_OFFSET(a5)
// This creates a preamble, which is alternating 1's and 0's
// and then it sets the same state.
// li s0, 0b10000000
// c.j send_inner_loop
.balign 4
load_next_byte:
// CH32v003 has the XW extension.
// this replaces: lb s0, 0(a0)
XW_C_LBU(s0, a0, 0);
//lb s0, 0(a0)
// .long 0x00150513 // addi a0, a0, 1 (For alignment's sake)
c.addi a0, 1
send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.beqz a3, send_zero_bit
c.srli s0, 1 // Shift down into the next bit.
//send_one_bit:
//HANDLE_CRC (1 bit)
andi a3, a2, 1
c.addi a3, -1
and a3, a3, t0
c.srli a2, 1
c.xor a2, a3
c.addi a4, -1
c.beqz a4, insert_stuffed_bit
c.j cont_after_jump
//Send 0 bit. (Flip)
.balign 4
send_zero_bit:
c.srli s0, 1 // Shift down into the next bit.
// Handle CRC (0 bit)
// a2 is our running CRC
// a3 is temp
// t0 is polynomial.
// XXX WARNING: this was by https://github.com/cnlohr/rv003usb/issues/7
// TODO Check me!
slli a3,a2,31 // Put a3s LSB into a0s MSB
c.srai a3,31 // Copy MSB into all other bits
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
sw s1, BSHR_OFFSET(a5)
c.li a4, 6 // reset bit stuffing.
// XXX XXX CRC down here to make bit stuffing timings line up.
c.srli a2,1
and a3,a3,t0
c.xor a2,a3
.balign 4
cont_after_jump:
send_end_bit_complete:
c.beqz a1, done_sending_data
andi a3, a1, 7
c.addi a1, -1
c.beqz a3, load_next_byte
// Wait an extra few cycles.
c.j 1f; 1:
c.j send_inner_loop
.balign 4
done_sending_data:
// BUT WAIT!! MAYBE WE NEED TO CRC!
beqz t0, no_really_done_sending_data
srli t0, t0, 8 // reset poly - we don't want it anymore.
li a1, 7 // Load 8 more bits out
beqz t0, send_inner_loop //Second CRC byte
// First CRC byte
not s0, a2 // get read to send out the CRC.
c.j send_inner_loop
.balign 4
no_really_done_sending_data:
// c.bnez a2, poly_function TODO: Uncomment me!
nx6p3delay( 2, a3 );
// Need to perform an SE0.
li s1, (1<<(USB_PIN_DM+16)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
nx6p3delay( 7, a3 );
li s1, (1<<(USB_PIN_DM)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
lw s1, CFGLR_OFFSET(a5)
// Convert D+/D- into inputs.
li a3, ~((0b11<<(USB_PIN_DP*4)) | (0b11<<(USB_PIN_DM*4)))
and s1, a3, s1
// 01: Floating input mode.
li a3, ((0b01<<(USB_PIN_DP*4+2)) | (0b01<<(USB_PIN_DM*4+2)))
or s1, a3, s1
sw s1, CFGLR_OFFSET(a5)
lw s0, 0(sp)
lw s1, 4(sp)
RESTORE_DEBUG_MARKER( 8 )
addi sp,sp,16
ret
.balign 4
// TODO: This seems to be either 222 or 226 (not 224) in cases.
// It's off by 2 clock cycles. Probably OK, but, hmm.
insert_stuffed_bit:
nx6p3delay(3, a3)
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
c.nop
c.nop
sw s1, BSHR_OFFSET(a5)
c.j send_end_bit_complete
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
#ifdef USE_TINY_BOOT
// Absolutey bare-bones hardware initialization for bringing the chip up,
// setting up the envrionment for C, switching to 48MHz clock, and booting
// into main... as well as providing EXTI7_0_IRQHandler jump at interrupt
.section .init
.global InterruptVector
InterruptVector:
.align 2
.option push
.option norelax
la gp, __global_pointer$
mv sp, gp //_eusrstack
#if __GNUC__ > 10
.option arch, +zicsr
#endif
li a0, 0x80
csrw mstatus, a0
c.li a0, 3
csrw mtvec, a0
addi a0, gp, -2048 // will be 0x20000000
c.li a4, 0
1: c.sw a4, 0(a0) // Clear RAM
c.addi a0, 4
blt a0, gp, 1b // Iterate over RAM until it's cleared.
2:
//XXX WARNING: NO .DATA SECTION IS AVAILABLE HERE!
/* SystemInit48HSI */
la a2, RCC_BASE
la a3, FLASH_R_BASE
li a1, 0x00000001 | 0x01000000 | 0x80 /* RCC->CTLR RCC_HSION | RCC_PLLON | ((HSITRIM) << 3) */
c.sw a1, 0(a2)
c.li a1, 0x01 /* FLASH_ACTLR_LATENCY_1 */
c.sw a1, 0(a3) /* FLASH->ACTLR = FLASH_ACTLR_LATENCY_1 */
c.li a1, 0x00000002 /* RCC->CFGR0 = RCC_SW_PLL */
c.sw a1, 4(a2)
la a1, main
csrw mepc, a1
.option pop
mret
// CAREFUL THIS MUST BE EXACTLY AT 0x50
. = 0x52 // Weird... I don't know why this has to be 0x52, for it to be at 0x50.
.word EXTI7_0_IRQHandler /* EXTI Line 7..0 */
always0:
.byte 0x00 // Automatically expands out to 4 bytes.
.align 0
.balign 0
#else
.balign 4
always0:
.word 0x00
#endif
|
wagiminator/Development-Boards | 23,229 | CH32V003F4P6_DevBoard_VUSB/software/mousewiggler/src/usb_handler.S | // ===================================================================================
// Software USB Handler for CH32V003 * v1.0 *
// ===================================================================================
//
// This file contains a copy of rv003usb.S (https://github.com/cnlohr/rv003usb),
// copyright (c) 2023 CNLohr (MIT License).
#include "ch32v003.h"
#include "usb_handler.h"
#define CFGLR_OFFSET 0
#define INDR_OFFSET 8
#define BSHR_OFFSET 16
#define LOCAL_CONCAT(A, B) A##B
#define LOCAL_EXP(A, B) LOCAL_CONCAT(A,B)
#define SYSTICK_CNT 0xE000F008
// This is 6 * n + 3 cylces
#define nx6p3delay( n, freereg ) li freereg, ((n)+1); 1: c.addi freereg, -1; c.bnez freereg, 1b
//See RV003USB_DEBUG_TIMING note in .c file.
#if defined( RV003USB_DEBUG_TIMING ) && RV003USB_DEBUG_TIMING
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x24) // for debug
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#else
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x58) // for debug (Go nowhere)
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#endif
.global test_memory
.global rv003usb_internal_data
.global rv003usb_handle_packet
.global usb_send_data
.global usb_send_empty
.global main
.global always0
/* Register map
zero, ra, sp, gp, tp, t0, t1, t2
Compressed:
s0, s1, a0, a1, a2, a3, a4, a5
*/
.section .text.vector_handler
.global EXTI7_0_IRQHandler
.balign 4
EXTI7_0_IRQHandler:
addi sp,sp,-80
sw a0, 0(sp)
sw a5, 20(sp)
la a5, USB_GPIO_BASE
c.lw a0, INDR_OFFSET(a5) // MUST check SE0 immediately.
c.andi a0, USB_DMASK
sw a1, 4(sp)
sw a2, 8(sp)
sw a3, 12(sp)
sw a4, 16(sp)
sw s1, 28(sp)
SAVE_DEBUG_MARKER( 48 );
DEBUG_TICK_SETUP
c.lw a1, INDR_OFFSET(a5)
c.andi a1, USB_DMASK;
// Finish jump to se0
c.beqz a0, handle_se0_keepalive
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.j syncout
syncout:
sw s0, 24(sp)
li a2, 0
sw t0, 32(sp) // XXX NOTE: This is actually unused register - remove some day?
sw t1, 36(sp)
// We are coarsely sync'd here.
// This will be called when we have synchronized our USB. We can put our
// preamble detect code here. But we have a whole free USB bit cycle to
// do whatever we feel like.
// A little weird, but this way, the USB packet is always aligned.
#define DATA_PTR_OFFSET (59+4)
// This is actually somewhat late.
// The preamble loop should try to make it earlier.
.balign 4
preamble_loop:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // SE0 here?
c.xor a0, a1;
c.xor a1, a0; // Recover a1.
j 1f; 1: // 4 cycles?
c.beqz a0, done_preamble
j 1f; 1: // 4 cycles?
c.lw s0, INDR_OFFSET(a5);
c.andi s0, USB_DMASK;
c.xor s0, a1
// TRICKY: This helps retime the USB sync.
// If s0 is nonzero, then it's changed (we're going too slow)
c.bnez s0, 2f; // This code takes 6 cycles or 8 cycles, depending.
c.j 1f; 1:
2:
j preamble_loop // 4 cycles
.balign 4
done_preamble:
sw t2, 40(sp)
sw ra, 52(sp)
// 16-byte temporary buffer at 56+sp
// XXX TODO: Do one byte here to determine the header byte and from that set the CRC.
c.li s1, 8
// This is the first bit that matters.
c.li s0, 6 // 1 runs.
c.nop;
// 8 extra cycles here cause errors.
// -5 cycles is too much.
// -4 to +6 cycles is OK
//XXX NOTE: It actuall wouldn't be too bad to inser an *extra* cycle here.
/* register meanings:
* x4 = TP = used for triggering debug.
* T0 = Totally unushed.
* T1 = TEMPORARY
* T2 = Pointer to the memory address we are writing to.
* A0 = temp / current bit value.
* A1 = last-frame's GPIO values.
* A2 = The running word
* A3 = Running CRC
* a4 = Polynomial
* A5 = GPIO Offset
* S0 = Bit Stuff Place
* S1 = # output bits remaining.
*/
.balign 4
packet_type_loop:
// Up here to delay loop a tad, and we need to execute them anyway.
// TODO: Maybe we could further sync bits here instead of take up time?
// I.e. can we do what we're doing above, here, and take less time, but sync
// up when possible.
li a3, 0xffff // Starting CRC of 0. Because USB doesn't respect reverse CRCing.
li a4, 0xa001
addi t2, sp, DATA_PTR_OFFSET //rv003usb_internal_data
la t0, 0x80
c.nop
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // Not se0 complete, that can't happen here and be valid.
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle
// a0 = 00 for 1 and 11 for 0
// No CRC for the header.
//c.srli a0, USB_PIN_DP
//c.addi a0, 1 // 00 -> 1, 11 -> 100
//c.andi a0, 1 // If 1, 1 if 0, 0
c.nop
seqz a0, a0
// Write header into byte in reverse order, because we can.
c.slli a2, 1
c.or a2, a0
// Handle bit stuffing rules.
c.addi a0, -1 // 0->0xffffffff 1->0
c.or s0, a0
c.andi s0, 7
c.addi s0, -1
c.addi s1, -1
c.bnez s1, packet_type_loop
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
// XXX Here, figure out CRC polynomial.
li s1, (USB_BUFFER_SIZE*8) // # of bits we culd read.
// WARNING: a0 is bit-wise backwards here.
// 0xb4 for instance is a setup packet.
//
// When we get here, packet type is loaded in A2.
// If packet type is 0xXX01 or 0xXX11
// the LSBs are the inverted packet type.
// we can branch off of bit 2.
andi a0, a2, 0x0c
// if a0 is 1 then it's DATA (full CRC) otheriwse,
// (0) for setup or PARTIAL CRC.
// Careful: This has to take a constant amount of time either way the branch goes.
c.beqz a0, data_crc
c.li a4, 0x14
c.li a3, 0x1e
.word 0x00000013 // nop, for alignment of data_crc.
data_crc:
#define HANDLE_EOB_YES \
sb a2, 0(t2); /* Save the byte off. TODO: Is unaligned byte access to RAM slow? */ \
.word 0x00138393; /*addi t2, t2, 1;*/
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
.balign 4
is_end_of_byte:
HANDLE_EOB_YES
// end-of-byte.
.balign 4
bit_process:
// Debug blip
// c.lw a4, INDR_OFFSET(a5);
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.xor a0, a1;
//XXX GOOD
#define HANDLE_NEXT_BYTE(is_end_of_byte, jumptype) \
c.addi s1, -1; \
andi a0, s1, 7; /* s1 could be really really big */ \
c.jumptype a0, is_end_of_byte /* 4 cycles for this section. (Checked) (Sometimes 5)? */
c.beqz a0, handle_one_bit
handle_zero_bit:
c.xor a1, a0; // Recover a1, for next cycle
// TODO: Do we have time to do time fixup here?
// Can we resync time here?
// If they are different, we need to sloowwww dowwwnnn
// There is some free time. Could do something interesting here!!!
// I was thinking we could put the resync code here.
c.j 1f; 1: //Delay 4 cycles.
c.li s0, 6 // reset runs-of-one.
c.beqz a1, se0_complete
// Handle CRC (0 bit) (From @Domkeykong)
slli a0,a3,31 // Put a3s LSB into a0s MSB
c.srai a0,31 // Copy MSB into all other bits
c.srli a3,1
c.and a0, a4
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
.balign 4
handle_one_bit:
c.addi s0, -1; // Count # of runs of 1 (subtract 1)
//HANDLE_CRC (1 bit)
andi a0, a3, 1
c.addi a0, -1
c.and a0, a4
c.srli a3, 1
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
ori a2, a2, 0x80
c.beqz s0, handle_bit_stuff;
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop // Need extra delay here because we need more time if it's end-of-byte.
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
handle_bit_stuff:
// We want to wait a little bit, then read another byte, and make
// sure everything is well, before heading back into the main loop
// Debug blip
HANDLE_NEXT_BYTE(not_is_end_of_byte_and_bit_stuffed, bnez)
HANDLE_EOB_YES
not_is_end_of_byte_and_bit_stuffed:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, se0_complete
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle.
// If A0 is a 0 then that's bad, we just did a bit stuff
// and A0 == 0 means there was no signal transition
c.beqz a0, done_usb_message
// Reset bit stuff, delay, then continue onto the next actual bit
c.li s0, 6;
c.nop;
nx6p3delay( 2, a0 )
c.bnez s1, bit_process // + 4 cycles
.balign 4
se0_complete:
// This is triggered when we finished getting a packet.
andi a0, s1, 7; // Make sure we received an even number of bytes.
c.bnez a0, done_usb_message
// Special: handle ACKs?
// Now we have to decide what we're doing based on the
// packet type.
addi a1, sp, DATA_PTR_OFFSET
XW_C_LBU(a0, a1, 0); //lbu a0, 0(a1)
c.addi a1, 1
// 0010 => 01001011 => ACK
// 0011 => 11000011 => DATA0
// 1011 => 11010010 => DATA1
// 1001 => 10010110 => PID IN
// 0001 => 10000111 => PID_OUT
// 1101 => 10110100 => SETUP (OK)
// a0 contains first 4 bytes.
la ra, done_usb_message_in // Common return address for all function calls.
// For ACK don't worry about CRC.
addi a5, a0, -0b01001011
RESTORE_DEBUG_MARKER(48) // restore x4 for whatever in C land.
la a4, rv003usb_internal_data
// ACK doesn't need good CRC.
c.beqz a5, usb_pid_handle_ack
// Next, check for tokens.
c.bnez a3, crc_for_tokens_would_be_bad_maybe_data
may_be_a_token:
// Our CRC is 0, so we might be a token.
// Do token-y things.
XW_C_LHU( a2, a1, 0 )
andi a0, a2, 0x7f // addr
c.srli a2, 7
c.andi a2, 0xf // endp
li s0, ENDPOINTS
bgeu a2, s0, done_usb_message // Make sure < ENDPOINTS
c.beqz a0, yes_check_tokens
// Otherwise, we might have our assigned address.
XW_C_LBU(s0, a4, MY_ADDRESS_OFFSET_BYTES); // lbu s0, MY_ADDRESS_OFFSET_BYTES(a4)
bne s0, a0, done_usb_message // addr != 0 && addr != ours.
yes_check_tokens:
addi a5, a5, (0b01001011-0b10000111)
c.beqz a5, usb_pid_handle_out
c.addi a5, (0b10000111-0b10010110)
c.beqz a5, usb_pid_handle_in
c.addi a5, (0b10010110-0b10110100)
c.beqz a5, usb_pid_handle_setup
c.j done_usb_message_in
// CRC is nonzero. (Good for Data packets)
crc_for_tokens_would_be_bad_maybe_data:
li s0, 0xb001 // UGH: You can't use the CRC16 in reverse :(
c.sub a3, s0
c.bnez a3, done_usb_message_in
// Good CRC!!
sub a3, t2, a1 //a3 = # of bytes read..
c.addi a3, 1
addi a5, a5, (0b01001011-0b11000011)
c.li a2, 0
c.beqz a5, usb_pid_handle_data
c.addi a5, (0b11000011-0b11010010)
c.li a2, 1
c.beqz a5, usb_pid_handle_data
done_usb_message:
done_usb_message_in:
lw s0, 24(sp)
lw s1, 28(sp)
lw t0, 32(sp)
lw t1, 36(sp)
lw t2, 40(sp)
lw ra, 52(sp)
ret_from_se0:
lw s1, 28(sp)
RESTORE_DEBUG_MARKER(48)
lw a2, 8(sp)
lw a3, 12(sp)
lw a4, 16(sp)
lw a1, 4(sp)
interrupt_complete:
// Acknowledge interrupt.
// EXTI->INTFR = 1<<4
c.j 1f; 1: // Extra little bit of delay to make sure we don't accidentally false fire.
la a5, EXTI_BASE + 20
li a0, (1<<USB_PIN_DM)
sw a0, 0(a5)
// Restore stack.
lw a0, 0(sp)
lw a5, 20(sp)
addi sp,sp,80
mret
///////////////////////////////////////////////////////////////////////////////
// High level functions.
#ifdef RV003USB_OPTIMIZE_FLASH
/*
void usb_pid_handle_ack( uint32_t dummy, uint8_t * data, uint32_t dummy1, uint32_t dummy2, struct rv003usb_internal * ist )
{
struct usb_endpoint * e = &ist->eps[ist->current_endpoint];
e->toggle_in = !e->toggle_in;
e->count++;
return;
}
*/
usb_pid_handle_ack:
c.lw a2, 0(a4) //ist->current_endpoint -> endp;
c.slli a2, 5
c.add a2, a4
c.addi a2, ENDP_OFFSET // usb_endpoint eps[ENDPOINTS];
c.lw a0, (EP_TOGGLE_IN_OFFSET)(a2) // toggle_in=!toggle_in
c.li a1, 1
c.xor a0, a1
c.sw a0, (EP_TOGGLE_IN_OFFSET)(a2)
c.lw a0, (EP_COUNT_OFFSET)(a2) // count_in
c.addi a0, 1
c.sw a0, (EP_COUNT_OFFSET)(a2)
c.j done_usb_message_in
/*
//Received a setup for a specific endpoint.
void usb_pid_handle_setup( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
{
ist->current_endpoint = endp;
struct usb_endpoint * e = &ist->eps[endp];
e->toggle_out = 0;
e->count = 0;
e->toggle_in = 1;
ist->setup_request = 1;
}*/
usb_pid_handle_setup:
c.sw a2, 0(a4) // ist->current_endpoint = endp
c.li a1, 1
c.sw a1, SETUP_REQUEST_OFFSET(a4) //ist->setup_request = 1;
c.slli a2, 3+2
c.add a2, a4
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_IN_OFFSET)(a2) //e->toggle_in = 1;
c.li a1, 0
c.sw a1, (ENDP_OFFSET+EP_COUNT_OFFSET)(a2) //e->count = 0;
c.sw a1, (ENDP_OFFSET+EP_OPAQUE_OFFSET)(a2) //e->opaque = 0;
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_OUT_OFFSET)(a2) //e->toggle_out = 0;
c.j done_usb_message_in
#endif
//We need to handle this here because we could have an interrupt in the middle of a control or big transfer.
//This will correctly swap back the endpoint.
usb_pid_handle_out:
//void usb_pid_handle_out( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
//sb a2, 0(a4) //ist->current_endpoint = endp;
XW_C_SB( a2, a4, 0 ); // current_endpoint = endp
c.j done_usb_message_in
handle_se0_keepalive:
// In here, we want to do smart stuff with the
// 1ms tick.
la a0, SYSTICK_CNT
la a4, rv003usb_internal_data
c.lw a1, LAST_SE0_OFFSET(a4) //last cycle count last_se0_cyccount
c.lw a2, 0(a0) //this cycle count
c.sw a2, LAST_SE0_OFFSET(a4) //store it back to last_se0_cyccount
c.sub a2, a1
c.sw a2, DELTA_SE0_OFFSET(a4) //record delta_se0_cyccount
li a1, 48000
c.sub a2, a1
// This is our deviance from 48MHz.
// Make sure we aren't in left field.
li a5, 4000
bge a2, a5, ret_from_se0
li a5, -4000
blt a2, a5, ret_from_se0
c.lw a1, SE0_WINDUP_OFFSET(a4) // load windup se0_windup
c.add a1, a2
c.sw a1, SE0_WINDUP_OFFSET(a4) // save windup
// No further adjustments
beqz a1, ret_from_se0
// 0x40021000 = RCC.CTLR
la a4, 0x40021000
lw a0, 0(a4)
srli a2, a0, 3 // Extract HSI Trim.
andi a2, a2, 0b11111
li a5, 0xffffff07
and a0, a0, a5 // Mask off non-HSI
// Decimate windup - use as HSIrim.
neg a1, a1
srai a2, a1, 9
addi a2, a2, 16 // add hsi offset.
// Put trim in place in register.
slli a2, a2, 3
or a0, a0, a2
sw a0, 0(a4)
j ret_from_se0
//////////////////////////////////////////////////////////////////////////////
// SEND DATA /////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
.balign 4
//void usb_send_empty( uint32_t token );
usb_send_empty:
c.mv a3, a0
la a0, always0
li a1, 2
c.mv a2, a1
//void usb_send_data( uint8_t * data, uint32_t length, uint32_t poly_function, uint32_t token );
usb_send_data:
addi sp,sp,-16
sw s0, 0(sp)
sw s1, 4(sp)
la a5, USB_GPIO_BASE
// ASAP: Turn the bus around and send our preamble + token.
c.lw a4, CFGLR_OFFSET(a5)
li s1, ~((0b1111<<(USB_PIN_DP*4)) | (0b1111<<(USB_PIN_DM*4)))
and a4, s1, a4
// Convert D+/D- into 2MHz outputs
li s1, ((0b0010<<(USB_PIN_DP*4)) | (0b0010<<(USB_PIN_DM*4)))
or a4, s1, a4
li s1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16))
c.sw s1, BSHR_OFFSET(a5)
//00: Universal push-pull output mode
c.sw a4, CFGLR_OFFSET(a5)
li t1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16)) | (1<<USB_PIN_DM) | (1<<(USB_PIN_DP+16));
SAVE_DEBUG_MARKER( 8 )
// Save off our preamble and token.
c.slli a3, 7 //Put token further up so it gets sent later.
ori s0, a3, 0x40
li t0, 0x0000
c.bnez a2, done_poly_check
li t0, 0xa001
li a2, 0xffff
done_poly_check:
c.slli a1, 3 // bump up one extra to be # of bits
mv t2, a1
// t0 is our polynomial
// a2 is our running CRC.
// a3 is our token.
DEBUG_TICK_SETUP
c.li a4, 6 // reset bit stuffing.
c.li a1, 15 // 15 bits.
//c.nop; c.nop; c.nop;
c.j pre_and_tok_send_inner_loop
////////////////////////////////////////////////////////////////////////////
// Send preamble + token
.balign 4
pre_and_tok_send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.srli s0, 1 // Shift down into the next bit.
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.addi a4, -1
c.bnez a3, pre_and_tok_send_one_bit
//pre_and_tok_send_one_bit:
//Send 0 bit. (Flip)
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
// DO NOT flip. Allow a4 to increment.
// Deliberately unaligned for timing purposes.
.balign 4
pre_and_tok_send_one_bit:
sw s1, BSHR_OFFSET(a5)
//Bit stuffing doesn't happen.
c.addi a1, -1
c.beqz a1, pre_and_tok_done_sending_data
nx6p3delay( 2, a3 ); c.nop; // Free time!
c.j pre_and_tok_send_inner_loop
.balign 4
pre_and_tok_done_sending_data:
////////////////////////////////////////////////////////////////////////////
// We have very little time here. Just enough to do this.
//Restore size.
mv a1, t2//lw a1, 12(sp)
c.beqz a1, no_really_done_sending_data //No actual payload? Bail!
c.addi a1, -1
// beqz t2, no_really_done_sending_data
bnez t0, done_poly_check2
li a2, 0xffff
done_poly_check2:
// t0 is used for CRC
// t1 is free
// t2 is a backup of size.
// s1 is our last "state"
// bit 0 is last "physical" state,
//
// s0 is our current "bit" / byte / temp.
// a0 is our data
// a1 is is our length
// a2 our CRC
// a3 is TEMPORARY
// a4 is used for bit stuffing.
// a5 is the output address.
//xor s1, s1, t1
//c.sw s1, BSHR_OFFSET(a5)
// This creates a preamble, which is alternating 1's and 0's
// and then it sets the same state.
// li s0, 0b10000000
// c.j send_inner_loop
.balign 4
load_next_byte:
// CH32v003 has the XW extension.
// this replaces: lb s0, 0(a0)
XW_C_LBU(s0, a0, 0);
//lb s0, 0(a0)
// .long 0x00150513 // addi a0, a0, 1 (For alignment's sake)
c.addi a0, 1
send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.beqz a3, send_zero_bit
c.srli s0, 1 // Shift down into the next bit.
//send_one_bit:
//HANDLE_CRC (1 bit)
andi a3, a2, 1
c.addi a3, -1
and a3, a3, t0
c.srli a2, 1
c.xor a2, a3
c.addi a4, -1
c.beqz a4, insert_stuffed_bit
c.j cont_after_jump
//Send 0 bit. (Flip)
.balign 4
send_zero_bit:
c.srli s0, 1 // Shift down into the next bit.
// Handle CRC (0 bit)
// a2 is our running CRC
// a3 is temp
// t0 is polynomial.
// XXX WARNING: this was by https://github.com/cnlohr/rv003usb/issues/7
// TODO Check me!
slli a3,a2,31 // Put a3s LSB into a0s MSB
c.srai a3,31 // Copy MSB into all other bits
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
sw s1, BSHR_OFFSET(a5)
c.li a4, 6 // reset bit stuffing.
// XXX XXX CRC down here to make bit stuffing timings line up.
c.srli a2,1
and a3,a3,t0
c.xor a2,a3
.balign 4
cont_after_jump:
send_end_bit_complete:
c.beqz a1, done_sending_data
andi a3, a1, 7
c.addi a1, -1
c.beqz a3, load_next_byte
// Wait an extra few cycles.
c.j 1f; 1:
c.j send_inner_loop
.balign 4
done_sending_data:
// BUT WAIT!! MAYBE WE NEED TO CRC!
beqz t0, no_really_done_sending_data
srli t0, t0, 8 // reset poly - we don't want it anymore.
li a1, 7 // Load 8 more bits out
beqz t0, send_inner_loop //Second CRC byte
// First CRC byte
not s0, a2 // get read to send out the CRC.
c.j send_inner_loop
.balign 4
no_really_done_sending_data:
// c.bnez a2, poly_function TODO: Uncomment me!
nx6p3delay( 2, a3 );
// Need to perform an SE0.
li s1, (1<<(USB_PIN_DM+16)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
nx6p3delay( 7, a3 );
li s1, (1<<(USB_PIN_DM)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
lw s1, CFGLR_OFFSET(a5)
// Convert D+/D- into inputs.
li a3, ~((0b11<<(USB_PIN_DP*4)) | (0b11<<(USB_PIN_DM*4)))
and s1, a3, s1
// 01: Floating input mode.
li a3, ((0b01<<(USB_PIN_DP*4+2)) | (0b01<<(USB_PIN_DM*4+2)))
or s1, a3, s1
sw s1, CFGLR_OFFSET(a5)
lw s0, 0(sp)
lw s1, 4(sp)
RESTORE_DEBUG_MARKER( 8 )
addi sp,sp,16
ret
.balign 4
// TODO: This seems to be either 222 or 226 (not 224) in cases.
// It's off by 2 clock cycles. Probably OK, but, hmm.
insert_stuffed_bit:
nx6p3delay(3, a3)
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
c.nop
c.nop
sw s1, BSHR_OFFSET(a5)
c.j send_end_bit_complete
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
#ifdef USE_TINY_BOOT
// Absolutey bare-bones hardware initialization for bringing the chip up,
// setting up the envrionment for C, switching to 48MHz clock, and booting
// into main... as well as providing EXTI7_0_IRQHandler jump at interrupt
.section .init
.global InterruptVector
InterruptVector:
.align 2
.option push
.option norelax
la gp, __global_pointer$
mv sp, gp //_eusrstack
#if __GNUC__ > 10
.option arch, +zicsr
#endif
li a0, 0x80
csrw mstatus, a0
c.li a0, 3
csrw mtvec, a0
addi a0, gp, -2048 // will be 0x20000000
c.li a4, 0
1: c.sw a4, 0(a0) // Clear RAM
c.addi a0, 4
blt a0, gp, 1b // Iterate over RAM until it's cleared.
2:
//XXX WARNING: NO .DATA SECTION IS AVAILABLE HERE!
/* SystemInit48HSI */
la a2, RCC_BASE
la a3, FLASH_R_BASE
li a1, 0x00000001 | 0x01000000 | 0x80 /* RCC->CTLR RCC_HSION | RCC_PLLON | ((HSITRIM) << 3) */
c.sw a1, 0(a2)
c.li a1, 0x01 /* FLASH_ACTLR_LATENCY_1 */
c.sw a1, 0(a3) /* FLASH->ACTLR = FLASH_ACTLR_LATENCY_1 */
c.li a1, 0x00000002 /* RCC->CFGR0 = RCC_SW_PLL */
c.sw a1, 4(a2)
la a1, main
csrw mepc, a1
.option pop
mret
// CAREFUL THIS MUST BE EXACTLY AT 0x50
. = 0x52 // Weird... I don't know why this has to be 0x52, for it to be at 0x50.
.word EXTI7_0_IRQHandler /* EXTI Line 7..0 */
always0:
.byte 0x00 // Automatically expands out to 4 bytes.
.align 0
.balign 0
#else
.balign 4
always0:
.word 0x00
#endif
|
wagiminator/Development-Boards | 23,229 | CH32V003F4P6_DevBoard_VUSB/software/rubberducky/src/usb_handler.S | // ===================================================================================
// Software USB Handler for CH32V003 * v1.0 *
// ===================================================================================
//
// This file contains a copy of rv003usb.S (https://github.com/cnlohr/rv003usb),
// copyright (c) 2023 CNLohr (MIT License).
#include "ch32v003.h"
#include "usb_handler.h"
#define CFGLR_OFFSET 0
#define INDR_OFFSET 8
#define BSHR_OFFSET 16
#define LOCAL_CONCAT(A, B) A##B
#define LOCAL_EXP(A, B) LOCAL_CONCAT(A,B)
#define SYSTICK_CNT 0xE000F008
// This is 6 * n + 3 cylces
#define nx6p3delay( n, freereg ) li freereg, ((n)+1); 1: c.addi freereg, -1; c.bnez freereg, 1b
//See RV003USB_DEBUG_TIMING note in .c file.
#if defined( RV003USB_DEBUG_TIMING ) && RV003USB_DEBUG_TIMING
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x24) // for debug
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#else
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x58) // for debug (Go nowhere)
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#endif
.global test_memory
.global rv003usb_internal_data
.global rv003usb_handle_packet
.global usb_send_data
.global usb_send_empty
.global main
.global always0
/* Register map
zero, ra, sp, gp, tp, t0, t1, t2
Compressed:
s0, s1, a0, a1, a2, a3, a4, a5
*/
.section .text.vector_handler
.global EXTI7_0_IRQHandler
.balign 4
EXTI7_0_IRQHandler:
addi sp,sp,-80
sw a0, 0(sp)
sw a5, 20(sp)
la a5, USB_GPIO_BASE
c.lw a0, INDR_OFFSET(a5) // MUST check SE0 immediately.
c.andi a0, USB_DMASK
sw a1, 4(sp)
sw a2, 8(sp)
sw a3, 12(sp)
sw a4, 16(sp)
sw s1, 28(sp)
SAVE_DEBUG_MARKER( 48 );
DEBUG_TICK_SETUP
c.lw a1, INDR_OFFSET(a5)
c.andi a1, USB_DMASK;
// Finish jump to se0
c.beqz a0, handle_se0_keepalive
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.j syncout
syncout:
sw s0, 24(sp)
li a2, 0
sw t0, 32(sp) // XXX NOTE: This is actually unused register - remove some day?
sw t1, 36(sp)
// We are coarsely sync'd here.
// This will be called when we have synchronized our USB. We can put our
// preamble detect code here. But we have a whole free USB bit cycle to
// do whatever we feel like.
// A little weird, but this way, the USB packet is always aligned.
#define DATA_PTR_OFFSET (59+4)
// This is actually somewhat late.
// The preamble loop should try to make it earlier.
.balign 4
preamble_loop:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // SE0 here?
c.xor a0, a1;
c.xor a1, a0; // Recover a1.
j 1f; 1: // 4 cycles?
c.beqz a0, done_preamble
j 1f; 1: // 4 cycles?
c.lw s0, INDR_OFFSET(a5);
c.andi s0, USB_DMASK;
c.xor s0, a1
// TRICKY: This helps retime the USB sync.
// If s0 is nonzero, then it's changed (we're going too slow)
c.bnez s0, 2f; // This code takes 6 cycles or 8 cycles, depending.
c.j 1f; 1:
2:
j preamble_loop // 4 cycles
.balign 4
done_preamble:
sw t2, 40(sp)
sw ra, 52(sp)
// 16-byte temporary buffer at 56+sp
// XXX TODO: Do one byte here to determine the header byte and from that set the CRC.
c.li s1, 8
// This is the first bit that matters.
c.li s0, 6 // 1 runs.
c.nop;
// 8 extra cycles here cause errors.
// -5 cycles is too much.
// -4 to +6 cycles is OK
//XXX NOTE: It actuall wouldn't be too bad to inser an *extra* cycle here.
/* register meanings:
* x4 = TP = used for triggering debug.
* T0 = Totally unushed.
* T1 = TEMPORARY
* T2 = Pointer to the memory address we are writing to.
* A0 = temp / current bit value.
* A1 = last-frame's GPIO values.
* A2 = The running word
* A3 = Running CRC
* a4 = Polynomial
* A5 = GPIO Offset
* S0 = Bit Stuff Place
* S1 = # output bits remaining.
*/
.balign 4
packet_type_loop:
// Up here to delay loop a tad, and we need to execute them anyway.
// TODO: Maybe we could further sync bits here instead of take up time?
// I.e. can we do what we're doing above, here, and take less time, but sync
// up when possible.
li a3, 0xffff // Starting CRC of 0. Because USB doesn't respect reverse CRCing.
li a4, 0xa001
addi t2, sp, DATA_PTR_OFFSET //rv003usb_internal_data
la t0, 0x80
c.nop
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // Not se0 complete, that can't happen here and be valid.
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle
// a0 = 00 for 1 and 11 for 0
// No CRC for the header.
//c.srli a0, USB_PIN_DP
//c.addi a0, 1 // 00 -> 1, 11 -> 100
//c.andi a0, 1 // If 1, 1 if 0, 0
c.nop
seqz a0, a0
// Write header into byte in reverse order, because we can.
c.slli a2, 1
c.or a2, a0
// Handle bit stuffing rules.
c.addi a0, -1 // 0->0xffffffff 1->0
c.or s0, a0
c.andi s0, 7
c.addi s0, -1
c.addi s1, -1
c.bnez s1, packet_type_loop
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
// XXX Here, figure out CRC polynomial.
li s1, (USB_BUFFER_SIZE*8) // # of bits we culd read.
// WARNING: a0 is bit-wise backwards here.
// 0xb4 for instance is a setup packet.
//
// When we get here, packet type is loaded in A2.
// If packet type is 0xXX01 or 0xXX11
// the LSBs are the inverted packet type.
// we can branch off of bit 2.
andi a0, a2, 0x0c
// if a0 is 1 then it's DATA (full CRC) otheriwse,
// (0) for setup or PARTIAL CRC.
// Careful: This has to take a constant amount of time either way the branch goes.
c.beqz a0, data_crc
c.li a4, 0x14
c.li a3, 0x1e
.word 0x00000013 // nop, for alignment of data_crc.
data_crc:
#define HANDLE_EOB_YES \
sb a2, 0(t2); /* Save the byte off. TODO: Is unaligned byte access to RAM slow? */ \
.word 0x00138393; /*addi t2, t2, 1;*/
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
.balign 4
is_end_of_byte:
HANDLE_EOB_YES
// end-of-byte.
.balign 4
bit_process:
// Debug blip
// c.lw a4, INDR_OFFSET(a5);
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.xor a0, a1;
//XXX GOOD
#define HANDLE_NEXT_BYTE(is_end_of_byte, jumptype) \
c.addi s1, -1; \
andi a0, s1, 7; /* s1 could be really really big */ \
c.jumptype a0, is_end_of_byte /* 4 cycles for this section. (Checked) (Sometimes 5)? */
c.beqz a0, handle_one_bit
handle_zero_bit:
c.xor a1, a0; // Recover a1, for next cycle
// TODO: Do we have time to do time fixup here?
// Can we resync time here?
// If they are different, we need to sloowwww dowwwnnn
// There is some free time. Could do something interesting here!!!
// I was thinking we could put the resync code here.
c.j 1f; 1: //Delay 4 cycles.
c.li s0, 6 // reset runs-of-one.
c.beqz a1, se0_complete
// Handle CRC (0 bit) (From @Domkeykong)
slli a0,a3,31 // Put a3s LSB into a0s MSB
c.srai a0,31 // Copy MSB into all other bits
c.srli a3,1
c.and a0, a4
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
.balign 4
handle_one_bit:
c.addi s0, -1; // Count # of runs of 1 (subtract 1)
//HANDLE_CRC (1 bit)
andi a0, a3, 1
c.addi a0, -1
c.and a0, a4
c.srli a3, 1
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
ori a2, a2, 0x80
c.beqz s0, handle_bit_stuff;
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop // Need extra delay here because we need more time if it's end-of-byte.
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
handle_bit_stuff:
// We want to wait a little bit, then read another byte, and make
// sure everything is well, before heading back into the main loop
// Debug blip
HANDLE_NEXT_BYTE(not_is_end_of_byte_and_bit_stuffed, bnez)
HANDLE_EOB_YES
not_is_end_of_byte_and_bit_stuffed:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, se0_complete
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle.
// If A0 is a 0 then that's bad, we just did a bit stuff
// and A0 == 0 means there was no signal transition
c.beqz a0, done_usb_message
// Reset bit stuff, delay, then continue onto the next actual bit
c.li s0, 6;
c.nop;
nx6p3delay( 2, a0 )
c.bnez s1, bit_process // + 4 cycles
.balign 4
se0_complete:
// This is triggered when we finished getting a packet.
andi a0, s1, 7; // Make sure we received an even number of bytes.
c.bnez a0, done_usb_message
// Special: handle ACKs?
// Now we have to decide what we're doing based on the
// packet type.
addi a1, sp, DATA_PTR_OFFSET
XW_C_LBU(a0, a1, 0); //lbu a0, 0(a1)
c.addi a1, 1
// 0010 => 01001011 => ACK
// 0011 => 11000011 => DATA0
// 1011 => 11010010 => DATA1
// 1001 => 10010110 => PID IN
// 0001 => 10000111 => PID_OUT
// 1101 => 10110100 => SETUP (OK)
// a0 contains first 4 bytes.
la ra, done_usb_message_in // Common return address for all function calls.
// For ACK don't worry about CRC.
addi a5, a0, -0b01001011
RESTORE_DEBUG_MARKER(48) // restore x4 for whatever in C land.
la a4, rv003usb_internal_data
// ACK doesn't need good CRC.
c.beqz a5, usb_pid_handle_ack
// Next, check for tokens.
c.bnez a3, crc_for_tokens_would_be_bad_maybe_data
may_be_a_token:
// Our CRC is 0, so we might be a token.
// Do token-y things.
XW_C_LHU( a2, a1, 0 )
andi a0, a2, 0x7f // addr
c.srli a2, 7
c.andi a2, 0xf // endp
li s0, ENDPOINTS
bgeu a2, s0, done_usb_message // Make sure < ENDPOINTS
c.beqz a0, yes_check_tokens
// Otherwise, we might have our assigned address.
XW_C_LBU(s0, a4, MY_ADDRESS_OFFSET_BYTES); // lbu s0, MY_ADDRESS_OFFSET_BYTES(a4)
bne s0, a0, done_usb_message // addr != 0 && addr != ours.
yes_check_tokens:
addi a5, a5, (0b01001011-0b10000111)
c.beqz a5, usb_pid_handle_out
c.addi a5, (0b10000111-0b10010110)
c.beqz a5, usb_pid_handle_in
c.addi a5, (0b10010110-0b10110100)
c.beqz a5, usb_pid_handle_setup
c.j done_usb_message_in
// CRC is nonzero. (Good for Data packets)
crc_for_tokens_would_be_bad_maybe_data:
li s0, 0xb001 // UGH: You can't use the CRC16 in reverse :(
c.sub a3, s0
c.bnez a3, done_usb_message_in
// Good CRC!!
sub a3, t2, a1 //a3 = # of bytes read..
c.addi a3, 1
addi a5, a5, (0b01001011-0b11000011)
c.li a2, 0
c.beqz a5, usb_pid_handle_data
c.addi a5, (0b11000011-0b11010010)
c.li a2, 1
c.beqz a5, usb_pid_handle_data
done_usb_message:
done_usb_message_in:
lw s0, 24(sp)
lw s1, 28(sp)
lw t0, 32(sp)
lw t1, 36(sp)
lw t2, 40(sp)
lw ra, 52(sp)
ret_from_se0:
lw s1, 28(sp)
RESTORE_DEBUG_MARKER(48)
lw a2, 8(sp)
lw a3, 12(sp)
lw a4, 16(sp)
lw a1, 4(sp)
interrupt_complete:
// Acknowledge interrupt.
// EXTI->INTFR = 1<<4
c.j 1f; 1: // Extra little bit of delay to make sure we don't accidentally false fire.
la a5, EXTI_BASE + 20
li a0, (1<<USB_PIN_DM)
sw a0, 0(a5)
// Restore stack.
lw a0, 0(sp)
lw a5, 20(sp)
addi sp,sp,80
mret
///////////////////////////////////////////////////////////////////////////////
// High level functions.
#ifdef RV003USB_OPTIMIZE_FLASH
/*
void usb_pid_handle_ack( uint32_t dummy, uint8_t * data, uint32_t dummy1, uint32_t dummy2, struct rv003usb_internal * ist )
{
struct usb_endpoint * e = &ist->eps[ist->current_endpoint];
e->toggle_in = !e->toggle_in;
e->count++;
return;
}
*/
usb_pid_handle_ack:
c.lw a2, 0(a4) //ist->current_endpoint -> endp;
c.slli a2, 5
c.add a2, a4
c.addi a2, ENDP_OFFSET // usb_endpoint eps[ENDPOINTS];
c.lw a0, (EP_TOGGLE_IN_OFFSET)(a2) // toggle_in=!toggle_in
c.li a1, 1
c.xor a0, a1
c.sw a0, (EP_TOGGLE_IN_OFFSET)(a2)
c.lw a0, (EP_COUNT_OFFSET)(a2) // count_in
c.addi a0, 1
c.sw a0, (EP_COUNT_OFFSET)(a2)
c.j done_usb_message_in
/*
//Received a setup for a specific endpoint.
void usb_pid_handle_setup( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
{
ist->current_endpoint = endp;
struct usb_endpoint * e = &ist->eps[endp];
e->toggle_out = 0;
e->count = 0;
e->toggle_in = 1;
ist->setup_request = 1;
}*/
usb_pid_handle_setup:
c.sw a2, 0(a4) // ist->current_endpoint = endp
c.li a1, 1
c.sw a1, SETUP_REQUEST_OFFSET(a4) //ist->setup_request = 1;
c.slli a2, 3+2
c.add a2, a4
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_IN_OFFSET)(a2) //e->toggle_in = 1;
c.li a1, 0
c.sw a1, (ENDP_OFFSET+EP_COUNT_OFFSET)(a2) //e->count = 0;
c.sw a1, (ENDP_OFFSET+EP_OPAQUE_OFFSET)(a2) //e->opaque = 0;
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_OUT_OFFSET)(a2) //e->toggle_out = 0;
c.j done_usb_message_in
#endif
//We need to handle this here because we could have an interrupt in the middle of a control or big transfer.
//This will correctly swap back the endpoint.
usb_pid_handle_out:
//void usb_pid_handle_out( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
//sb a2, 0(a4) //ist->current_endpoint = endp;
XW_C_SB( a2, a4, 0 ); // current_endpoint = endp
c.j done_usb_message_in
handle_se0_keepalive:
// In here, we want to do smart stuff with the
// 1ms tick.
la a0, SYSTICK_CNT
la a4, rv003usb_internal_data
c.lw a1, LAST_SE0_OFFSET(a4) //last cycle count last_se0_cyccount
c.lw a2, 0(a0) //this cycle count
c.sw a2, LAST_SE0_OFFSET(a4) //store it back to last_se0_cyccount
c.sub a2, a1
c.sw a2, DELTA_SE0_OFFSET(a4) //record delta_se0_cyccount
li a1, 48000
c.sub a2, a1
// This is our deviance from 48MHz.
// Make sure we aren't in left field.
li a5, 4000
bge a2, a5, ret_from_se0
li a5, -4000
blt a2, a5, ret_from_se0
c.lw a1, SE0_WINDUP_OFFSET(a4) // load windup se0_windup
c.add a1, a2
c.sw a1, SE0_WINDUP_OFFSET(a4) // save windup
// No further adjustments
beqz a1, ret_from_se0
// 0x40021000 = RCC.CTLR
la a4, 0x40021000
lw a0, 0(a4)
srli a2, a0, 3 // Extract HSI Trim.
andi a2, a2, 0b11111
li a5, 0xffffff07
and a0, a0, a5 // Mask off non-HSI
// Decimate windup - use as HSIrim.
neg a1, a1
srai a2, a1, 9
addi a2, a2, 16 // add hsi offset.
// Put trim in place in register.
slli a2, a2, 3
or a0, a0, a2
sw a0, 0(a4)
j ret_from_se0
//////////////////////////////////////////////////////////////////////////////
// SEND DATA /////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
.balign 4
//void usb_send_empty( uint32_t token );
usb_send_empty:
c.mv a3, a0
la a0, always0
li a1, 2
c.mv a2, a1
//void usb_send_data( uint8_t * data, uint32_t length, uint32_t poly_function, uint32_t token );
usb_send_data:
addi sp,sp,-16
sw s0, 0(sp)
sw s1, 4(sp)
la a5, USB_GPIO_BASE
// ASAP: Turn the bus around and send our preamble + token.
c.lw a4, CFGLR_OFFSET(a5)
li s1, ~((0b1111<<(USB_PIN_DP*4)) | (0b1111<<(USB_PIN_DM*4)))
and a4, s1, a4
// Convert D+/D- into 2MHz outputs
li s1, ((0b0010<<(USB_PIN_DP*4)) | (0b0010<<(USB_PIN_DM*4)))
or a4, s1, a4
li s1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16))
c.sw s1, BSHR_OFFSET(a5)
//00: Universal push-pull output mode
c.sw a4, CFGLR_OFFSET(a5)
li t1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16)) | (1<<USB_PIN_DM) | (1<<(USB_PIN_DP+16));
SAVE_DEBUG_MARKER( 8 )
// Save off our preamble and token.
c.slli a3, 7 //Put token further up so it gets sent later.
ori s0, a3, 0x40
li t0, 0x0000
c.bnez a2, done_poly_check
li t0, 0xa001
li a2, 0xffff
done_poly_check:
c.slli a1, 3 // bump up one extra to be # of bits
mv t2, a1
// t0 is our polynomial
// a2 is our running CRC.
// a3 is our token.
DEBUG_TICK_SETUP
c.li a4, 6 // reset bit stuffing.
c.li a1, 15 // 15 bits.
//c.nop; c.nop; c.nop;
c.j pre_and_tok_send_inner_loop
////////////////////////////////////////////////////////////////////////////
// Send preamble + token
.balign 4
pre_and_tok_send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.srli s0, 1 // Shift down into the next bit.
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.addi a4, -1
c.bnez a3, pre_and_tok_send_one_bit
//pre_and_tok_send_one_bit:
//Send 0 bit. (Flip)
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
// DO NOT flip. Allow a4 to increment.
// Deliberately unaligned for timing purposes.
.balign 4
pre_and_tok_send_one_bit:
sw s1, BSHR_OFFSET(a5)
//Bit stuffing doesn't happen.
c.addi a1, -1
c.beqz a1, pre_and_tok_done_sending_data
nx6p3delay( 2, a3 ); c.nop; // Free time!
c.j pre_and_tok_send_inner_loop
.balign 4
pre_and_tok_done_sending_data:
////////////////////////////////////////////////////////////////////////////
// We have very little time here. Just enough to do this.
//Restore size.
mv a1, t2//lw a1, 12(sp)
c.beqz a1, no_really_done_sending_data //No actual payload? Bail!
c.addi a1, -1
// beqz t2, no_really_done_sending_data
bnez t0, done_poly_check2
li a2, 0xffff
done_poly_check2:
// t0 is used for CRC
// t1 is free
// t2 is a backup of size.
// s1 is our last "state"
// bit 0 is last "physical" state,
//
// s0 is our current "bit" / byte / temp.
// a0 is our data
// a1 is is our length
// a2 our CRC
// a3 is TEMPORARY
// a4 is used for bit stuffing.
// a5 is the output address.
//xor s1, s1, t1
//c.sw s1, BSHR_OFFSET(a5)
// This creates a preamble, which is alternating 1's and 0's
// and then it sets the same state.
// li s0, 0b10000000
// c.j send_inner_loop
.balign 4
load_next_byte:
// CH32v003 has the XW extension.
// this replaces: lb s0, 0(a0)
XW_C_LBU(s0, a0, 0);
//lb s0, 0(a0)
// .long 0x00150513 // addi a0, a0, 1 (For alignment's sake)
c.addi a0, 1
send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.beqz a3, send_zero_bit
c.srli s0, 1 // Shift down into the next bit.
//send_one_bit:
//HANDLE_CRC (1 bit)
andi a3, a2, 1
c.addi a3, -1
and a3, a3, t0
c.srli a2, 1
c.xor a2, a3
c.addi a4, -1
c.beqz a4, insert_stuffed_bit
c.j cont_after_jump
//Send 0 bit. (Flip)
.balign 4
send_zero_bit:
c.srli s0, 1 // Shift down into the next bit.
// Handle CRC (0 bit)
// a2 is our running CRC
// a3 is temp
// t0 is polynomial.
// XXX WARNING: this was by https://github.com/cnlohr/rv003usb/issues/7
// TODO Check me!
slli a3,a2,31 // Put a3s LSB into a0s MSB
c.srai a3,31 // Copy MSB into all other bits
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
sw s1, BSHR_OFFSET(a5)
c.li a4, 6 // reset bit stuffing.
// XXX XXX CRC down here to make bit stuffing timings line up.
c.srli a2,1
and a3,a3,t0
c.xor a2,a3
.balign 4
cont_after_jump:
send_end_bit_complete:
c.beqz a1, done_sending_data
andi a3, a1, 7
c.addi a1, -1
c.beqz a3, load_next_byte
// Wait an extra few cycles.
c.j 1f; 1:
c.j send_inner_loop
.balign 4
done_sending_data:
// BUT WAIT!! MAYBE WE NEED TO CRC!
beqz t0, no_really_done_sending_data
srli t0, t0, 8 // reset poly - we don't want it anymore.
li a1, 7 // Load 8 more bits out
beqz t0, send_inner_loop //Second CRC byte
// First CRC byte
not s0, a2 // get read to send out the CRC.
c.j send_inner_loop
.balign 4
no_really_done_sending_data:
// c.bnez a2, poly_function TODO: Uncomment me!
nx6p3delay( 2, a3 );
// Need to perform an SE0.
li s1, (1<<(USB_PIN_DM+16)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
nx6p3delay( 7, a3 );
li s1, (1<<(USB_PIN_DM)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
lw s1, CFGLR_OFFSET(a5)
// Convert D+/D- into inputs.
li a3, ~((0b11<<(USB_PIN_DP*4)) | (0b11<<(USB_PIN_DM*4)))
and s1, a3, s1
// 01: Floating input mode.
li a3, ((0b01<<(USB_PIN_DP*4+2)) | (0b01<<(USB_PIN_DM*4+2)))
or s1, a3, s1
sw s1, CFGLR_OFFSET(a5)
lw s0, 0(sp)
lw s1, 4(sp)
RESTORE_DEBUG_MARKER( 8 )
addi sp,sp,16
ret
.balign 4
// TODO: This seems to be either 222 or 226 (not 224) in cases.
// It's off by 2 clock cycles. Probably OK, but, hmm.
insert_stuffed_bit:
nx6p3delay(3, a3)
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
c.nop
c.nop
sw s1, BSHR_OFFSET(a5)
c.j send_end_bit_complete
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
#ifdef USE_TINY_BOOT
// Absolutey bare-bones hardware initialization for bringing the chip up,
// setting up the envrionment for C, switching to 48MHz clock, and booting
// into main... as well as providing EXTI7_0_IRQHandler jump at interrupt
.section .init
.global InterruptVector
InterruptVector:
.align 2
.option push
.option norelax
la gp, __global_pointer$
mv sp, gp //_eusrstack
#if __GNUC__ > 10
.option arch, +zicsr
#endif
li a0, 0x80
csrw mstatus, a0
c.li a0, 3
csrw mtvec, a0
addi a0, gp, -2048 // will be 0x20000000
c.li a4, 0
1: c.sw a4, 0(a0) // Clear RAM
c.addi a0, 4
blt a0, gp, 1b // Iterate over RAM until it's cleared.
2:
//XXX WARNING: NO .DATA SECTION IS AVAILABLE HERE!
/* SystemInit48HSI */
la a2, RCC_BASE
la a3, FLASH_R_BASE
li a1, 0x00000001 | 0x01000000 | 0x80 /* RCC->CTLR RCC_HSION | RCC_PLLON | ((HSITRIM) << 3) */
c.sw a1, 0(a2)
c.li a1, 0x01 /* FLASH_ACTLR_LATENCY_1 */
c.sw a1, 0(a3) /* FLASH->ACTLR = FLASH_ACTLR_LATENCY_1 */
c.li a1, 0x00000002 /* RCC->CFGR0 = RCC_SW_PLL */
c.sw a1, 4(a2)
la a1, main
csrw mepc, a1
.option pop
mret
// CAREFUL THIS MUST BE EXACTLY AT 0x50
. = 0x52 // Weird... I don't know why this has to be 0x52, for it to be at 0x50.
.word EXTI7_0_IRQHandler /* EXTI Line 7..0 */
always0:
.byte 0x00 // Automatically expands out to 4 bytes.
.align 0
.balign 0
#else
.balign 4
always0:
.word 0x00
#endif
|
wagiminator/Development-Boards | 23,229 | CH32V003F4P6_DevBoard_VUSB/software/volumeknob/src/usb_handler.S | // ===================================================================================
// Software USB Handler for CH32V003 * v1.0 *
// ===================================================================================
//
// This file contains a copy of rv003usb.S (https://github.com/cnlohr/rv003usb),
// copyright (c) 2023 CNLohr (MIT License).
#include "ch32v003.h"
#include "usb_handler.h"
#define CFGLR_OFFSET 0
#define INDR_OFFSET 8
#define BSHR_OFFSET 16
#define LOCAL_CONCAT(A, B) A##B
#define LOCAL_EXP(A, B) LOCAL_CONCAT(A,B)
#define SYSTICK_CNT 0xE000F008
// This is 6 * n + 3 cylces
#define nx6p3delay( n, freereg ) li freereg, ((n)+1); 1: c.addi freereg, -1; c.bnez freereg, 1b
//See RV003USB_DEBUG_TIMING note in .c file.
#if defined( RV003USB_DEBUG_TIMING ) && RV003USB_DEBUG_TIMING
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x24) // for debug
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#else
#define DEBUG_TICK_SETUP la x4, (TIM1_BASE + 0x58) // for debug (Go nowhere)
#define DEBUG_TICK_MARK .balign 4; sw x0, 0(x4)
#define RESTORE_DEBUG_MARKER(x) lw x4, x(sp)
#define SAVE_DEBUG_MARKER(x) sw x4, x(sp)
#endif
.global test_memory
.global rv003usb_internal_data
.global rv003usb_handle_packet
.global usb_send_data
.global usb_send_empty
.global main
.global always0
/* Register map
zero, ra, sp, gp, tp, t0, t1, t2
Compressed:
s0, s1, a0, a1, a2, a3, a4, a5
*/
.section .text.vector_handler
.global EXTI7_0_IRQHandler
.balign 4
EXTI7_0_IRQHandler:
addi sp,sp,-80
sw a0, 0(sp)
sw a5, 20(sp)
la a5, USB_GPIO_BASE
c.lw a0, INDR_OFFSET(a5) // MUST check SE0 immediately.
c.andi a0, USB_DMASK
sw a1, 4(sp)
sw a2, 8(sp)
sw a3, 12(sp)
sw a4, 16(sp)
sw s1, 28(sp)
SAVE_DEBUG_MARKER( 48 );
DEBUG_TICK_SETUP
c.lw a1, INDR_OFFSET(a5)
c.andi a1, USB_DMASK;
// Finish jump to se0
c.beqz a0, handle_se0_keepalive
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.lw a0, INDR_OFFSET(a5); c.andi a0, USB_DMASK; bne a0, a1, syncout
c.j syncout
syncout:
sw s0, 24(sp)
li a2, 0
sw t0, 32(sp) // XXX NOTE: This is actually unused register - remove some day?
sw t1, 36(sp)
// We are coarsely sync'd here.
// This will be called when we have synchronized our USB. We can put our
// preamble detect code here. But we have a whole free USB bit cycle to
// do whatever we feel like.
// A little weird, but this way, the USB packet is always aligned.
#define DATA_PTR_OFFSET (59+4)
// This is actually somewhat late.
// The preamble loop should try to make it earlier.
.balign 4
preamble_loop:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // SE0 here?
c.xor a0, a1;
c.xor a1, a0; // Recover a1.
j 1f; 1: // 4 cycles?
c.beqz a0, done_preamble
j 1f; 1: // 4 cycles?
c.lw s0, INDR_OFFSET(a5);
c.andi s0, USB_DMASK;
c.xor s0, a1
// TRICKY: This helps retime the USB sync.
// If s0 is nonzero, then it's changed (we're going too slow)
c.bnez s0, 2f; // This code takes 6 cycles or 8 cycles, depending.
c.j 1f; 1:
2:
j preamble_loop // 4 cycles
.balign 4
done_preamble:
sw t2, 40(sp)
sw ra, 52(sp)
// 16-byte temporary buffer at 56+sp
// XXX TODO: Do one byte here to determine the header byte and from that set the CRC.
c.li s1, 8
// This is the first bit that matters.
c.li s0, 6 // 1 runs.
c.nop;
// 8 extra cycles here cause errors.
// -5 cycles is too much.
// -4 to +6 cycles is OK
//XXX NOTE: It actuall wouldn't be too bad to inser an *extra* cycle here.
/* register meanings:
* x4 = TP = used for triggering debug.
* T0 = Totally unushed.
* T1 = TEMPORARY
* T2 = Pointer to the memory address we are writing to.
* A0 = temp / current bit value.
* A1 = last-frame's GPIO values.
* A2 = The running word
* A3 = Running CRC
* a4 = Polynomial
* A5 = GPIO Offset
* S0 = Bit Stuff Place
* S1 = # output bits remaining.
*/
.balign 4
packet_type_loop:
// Up here to delay loop a tad, and we need to execute them anyway.
// TODO: Maybe we could further sync bits here instead of take up time?
// I.e. can we do what we're doing above, here, and take less time, but sync
// up when possible.
li a3, 0xffff // Starting CRC of 0. Because USB doesn't respect reverse CRCing.
li a4, 0xa001
addi t2, sp, DATA_PTR_OFFSET //rv003usb_internal_data
la t0, 0x80
c.nop
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, done_usb_message // Not se0 complete, that can't happen here and be valid.
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle
// a0 = 00 for 1 and 11 for 0
// No CRC for the header.
//c.srli a0, USB_PIN_DP
//c.addi a0, 1 // 00 -> 1, 11 -> 100
//c.andi a0, 1 // If 1, 1 if 0, 0
c.nop
seqz a0, a0
// Write header into byte in reverse order, because we can.
c.slli a2, 1
c.or a2, a0
// Handle bit stuffing rules.
c.addi a0, -1 // 0->0xffffffff 1->0
c.or s0, a0
c.andi s0, 7
c.addi s0, -1
c.addi s1, -1
c.bnez s1, packet_type_loop
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
// XXX Here, figure out CRC polynomial.
li s1, (USB_BUFFER_SIZE*8) // # of bits we culd read.
// WARNING: a0 is bit-wise backwards here.
// 0xb4 for instance is a setup packet.
//
// When we get here, packet type is loaded in A2.
// If packet type is 0xXX01 or 0xXX11
// the LSBs are the inverted packet type.
// we can branch off of bit 2.
andi a0, a2, 0x0c
// if a0 is 1 then it's DATA (full CRC) otheriwse,
// (0) for setup or PARTIAL CRC.
// Careful: This has to take a constant amount of time either way the branch goes.
c.beqz a0, data_crc
c.li a4, 0x14
c.li a3, 0x1e
.word 0x00000013 // nop, for alignment of data_crc.
data_crc:
#define HANDLE_EOB_YES \
sb a2, 0(t2); /* Save the byte off. TODO: Is unaligned byte access to RAM slow? */ \
.word 0x00138393; /*addi t2, t2, 1;*/
///////////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////////////
.balign 4
is_end_of_byte:
HANDLE_EOB_YES
// end-of-byte.
.balign 4
bit_process:
// Debug blip
// c.lw a4, INDR_OFFSET(a5);
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.xor a0, a1;
//XXX GOOD
#define HANDLE_NEXT_BYTE(is_end_of_byte, jumptype) \
c.addi s1, -1; \
andi a0, s1, 7; /* s1 could be really really big */ \
c.jumptype a0, is_end_of_byte /* 4 cycles for this section. (Checked) (Sometimes 5)? */
c.beqz a0, handle_one_bit
handle_zero_bit:
c.xor a1, a0; // Recover a1, for next cycle
// TODO: Do we have time to do time fixup here?
// Can we resync time here?
// If they are different, we need to sloowwww dowwwnnn
// There is some free time. Could do something interesting here!!!
// I was thinking we could put the resync code here.
c.j 1f; 1: //Delay 4 cycles.
c.li s0, 6 // reset runs-of-one.
c.beqz a1, se0_complete
// Handle CRC (0 bit) (From @Domkeykong)
slli a0,a3,31 // Put a3s LSB into a0s MSB
c.srai a0,31 // Copy MSB into all other bits
c.srli a3,1
c.and a0, a4
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
.balign 4
handle_one_bit:
c.addi s0, -1; // Count # of runs of 1 (subtract 1)
//HANDLE_CRC (1 bit)
andi a0, a3, 1
c.addi a0, -1
c.and a0, a4
c.srli a3, 1
c.xor a3, a0
c.srli a2, 1; // shift a2 down by 1
ori a2, a2, 0x80
c.beqz s0, handle_bit_stuff;
HANDLE_NEXT_BYTE(is_end_of_byte, beqz)
c.nop // Need extra delay here because we need more time if it's end-of-byte.
c.nop
c.nop
c.bnez s1, bit_process // + 4 cycles
c.j done_usb_message
handle_bit_stuff:
// We want to wait a little bit, then read another byte, and make
// sure everything is well, before heading back into the main loop
// Debug blip
HANDLE_NEXT_BYTE(not_is_end_of_byte_and_bit_stuffed, bnez)
HANDLE_EOB_YES
not_is_end_of_byte_and_bit_stuffed:
DEBUG_TICK_MARK
c.lw a0, INDR_OFFSET(a5);
c.andi a0, USB_DMASK;
c.beqz a0, se0_complete
c.xor a0, a1;
c.xor a1, a0; // Recover a1, for next cycle.
// If A0 is a 0 then that's bad, we just did a bit stuff
// and A0 == 0 means there was no signal transition
c.beqz a0, done_usb_message
// Reset bit stuff, delay, then continue onto the next actual bit
c.li s0, 6;
c.nop;
nx6p3delay( 2, a0 )
c.bnez s1, bit_process // + 4 cycles
.balign 4
se0_complete:
// This is triggered when we finished getting a packet.
andi a0, s1, 7; // Make sure we received an even number of bytes.
c.bnez a0, done_usb_message
// Special: handle ACKs?
// Now we have to decide what we're doing based on the
// packet type.
addi a1, sp, DATA_PTR_OFFSET
XW_C_LBU(a0, a1, 0); //lbu a0, 0(a1)
c.addi a1, 1
// 0010 => 01001011 => ACK
// 0011 => 11000011 => DATA0
// 1011 => 11010010 => DATA1
// 1001 => 10010110 => PID IN
// 0001 => 10000111 => PID_OUT
// 1101 => 10110100 => SETUP (OK)
// a0 contains first 4 bytes.
la ra, done_usb_message_in // Common return address for all function calls.
// For ACK don't worry about CRC.
addi a5, a0, -0b01001011
RESTORE_DEBUG_MARKER(48) // restore x4 for whatever in C land.
la a4, rv003usb_internal_data
// ACK doesn't need good CRC.
c.beqz a5, usb_pid_handle_ack
// Next, check for tokens.
c.bnez a3, crc_for_tokens_would_be_bad_maybe_data
may_be_a_token:
// Our CRC is 0, so we might be a token.
// Do token-y things.
XW_C_LHU( a2, a1, 0 )
andi a0, a2, 0x7f // addr
c.srli a2, 7
c.andi a2, 0xf // endp
li s0, ENDPOINTS
bgeu a2, s0, done_usb_message // Make sure < ENDPOINTS
c.beqz a0, yes_check_tokens
// Otherwise, we might have our assigned address.
XW_C_LBU(s0, a4, MY_ADDRESS_OFFSET_BYTES); // lbu s0, MY_ADDRESS_OFFSET_BYTES(a4)
bne s0, a0, done_usb_message // addr != 0 && addr != ours.
yes_check_tokens:
addi a5, a5, (0b01001011-0b10000111)
c.beqz a5, usb_pid_handle_out
c.addi a5, (0b10000111-0b10010110)
c.beqz a5, usb_pid_handle_in
c.addi a5, (0b10010110-0b10110100)
c.beqz a5, usb_pid_handle_setup
c.j done_usb_message_in
// CRC is nonzero. (Good for Data packets)
crc_for_tokens_would_be_bad_maybe_data:
li s0, 0xb001 // UGH: You can't use the CRC16 in reverse :(
c.sub a3, s0
c.bnez a3, done_usb_message_in
// Good CRC!!
sub a3, t2, a1 //a3 = # of bytes read..
c.addi a3, 1
addi a5, a5, (0b01001011-0b11000011)
c.li a2, 0
c.beqz a5, usb_pid_handle_data
c.addi a5, (0b11000011-0b11010010)
c.li a2, 1
c.beqz a5, usb_pid_handle_data
done_usb_message:
done_usb_message_in:
lw s0, 24(sp)
lw s1, 28(sp)
lw t0, 32(sp)
lw t1, 36(sp)
lw t2, 40(sp)
lw ra, 52(sp)
ret_from_se0:
lw s1, 28(sp)
RESTORE_DEBUG_MARKER(48)
lw a2, 8(sp)
lw a3, 12(sp)
lw a4, 16(sp)
lw a1, 4(sp)
interrupt_complete:
// Acknowledge interrupt.
// EXTI->INTFR = 1<<4
c.j 1f; 1: // Extra little bit of delay to make sure we don't accidentally false fire.
la a5, EXTI_BASE + 20
li a0, (1<<USB_PIN_DM)
sw a0, 0(a5)
// Restore stack.
lw a0, 0(sp)
lw a5, 20(sp)
addi sp,sp,80
mret
///////////////////////////////////////////////////////////////////////////////
// High level functions.
#ifdef RV003USB_OPTIMIZE_FLASH
/*
void usb_pid_handle_ack( uint32_t dummy, uint8_t * data, uint32_t dummy1, uint32_t dummy2, struct rv003usb_internal * ist )
{
struct usb_endpoint * e = &ist->eps[ist->current_endpoint];
e->toggle_in = !e->toggle_in;
e->count++;
return;
}
*/
usb_pid_handle_ack:
c.lw a2, 0(a4) //ist->current_endpoint -> endp;
c.slli a2, 5
c.add a2, a4
c.addi a2, ENDP_OFFSET // usb_endpoint eps[ENDPOINTS];
c.lw a0, (EP_TOGGLE_IN_OFFSET)(a2) // toggle_in=!toggle_in
c.li a1, 1
c.xor a0, a1
c.sw a0, (EP_TOGGLE_IN_OFFSET)(a2)
c.lw a0, (EP_COUNT_OFFSET)(a2) // count_in
c.addi a0, 1
c.sw a0, (EP_COUNT_OFFSET)(a2)
c.j done_usb_message_in
/*
//Received a setup for a specific endpoint.
void usb_pid_handle_setup( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
{
ist->current_endpoint = endp;
struct usb_endpoint * e = &ist->eps[endp];
e->toggle_out = 0;
e->count = 0;
e->toggle_in = 1;
ist->setup_request = 1;
}*/
usb_pid_handle_setup:
c.sw a2, 0(a4) // ist->current_endpoint = endp
c.li a1, 1
c.sw a1, SETUP_REQUEST_OFFSET(a4) //ist->setup_request = 1;
c.slli a2, 3+2
c.add a2, a4
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_IN_OFFSET)(a2) //e->toggle_in = 1;
c.li a1, 0
c.sw a1, (ENDP_OFFSET+EP_COUNT_OFFSET)(a2) //e->count = 0;
c.sw a1, (ENDP_OFFSET+EP_OPAQUE_OFFSET)(a2) //e->opaque = 0;
c.sw a1, (ENDP_OFFSET+EP_TOGGLE_OUT_OFFSET)(a2) //e->toggle_out = 0;
c.j done_usb_message_in
#endif
//We need to handle this here because we could have an interrupt in the middle of a control or big transfer.
//This will correctly swap back the endpoint.
usb_pid_handle_out:
//void usb_pid_handle_out( uint32_t addr, uint8_t * data, uint32_t endp, uint32_t unused, struct rv003usb_internal * ist )
//sb a2, 0(a4) //ist->current_endpoint = endp;
XW_C_SB( a2, a4, 0 ); // current_endpoint = endp
c.j done_usb_message_in
handle_se0_keepalive:
// In here, we want to do smart stuff with the
// 1ms tick.
la a0, SYSTICK_CNT
la a4, rv003usb_internal_data
c.lw a1, LAST_SE0_OFFSET(a4) //last cycle count last_se0_cyccount
c.lw a2, 0(a0) //this cycle count
c.sw a2, LAST_SE0_OFFSET(a4) //store it back to last_se0_cyccount
c.sub a2, a1
c.sw a2, DELTA_SE0_OFFSET(a4) //record delta_se0_cyccount
li a1, 48000
c.sub a2, a1
// This is our deviance from 48MHz.
// Make sure we aren't in left field.
li a5, 4000
bge a2, a5, ret_from_se0
li a5, -4000
blt a2, a5, ret_from_se0
c.lw a1, SE0_WINDUP_OFFSET(a4) // load windup se0_windup
c.add a1, a2
c.sw a1, SE0_WINDUP_OFFSET(a4) // save windup
// No further adjustments
beqz a1, ret_from_se0
// 0x40021000 = RCC.CTLR
la a4, 0x40021000
lw a0, 0(a4)
srli a2, a0, 3 // Extract HSI Trim.
andi a2, a2, 0b11111
li a5, 0xffffff07
and a0, a0, a5 // Mask off non-HSI
// Decimate windup - use as HSIrim.
neg a1, a1
srai a2, a1, 9
addi a2, a2, 16 // add hsi offset.
// Put trim in place in register.
slli a2, a2, 3
or a0, a0, a2
sw a0, 0(a4)
j ret_from_se0
//////////////////////////////////////////////////////////////////////////////
// SEND DATA /////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
.balign 4
//void usb_send_empty( uint32_t token );
usb_send_empty:
c.mv a3, a0
la a0, always0
li a1, 2
c.mv a2, a1
//void usb_send_data( uint8_t * data, uint32_t length, uint32_t poly_function, uint32_t token );
usb_send_data:
addi sp,sp,-16
sw s0, 0(sp)
sw s1, 4(sp)
la a5, USB_GPIO_BASE
// ASAP: Turn the bus around and send our preamble + token.
c.lw a4, CFGLR_OFFSET(a5)
li s1, ~((0b1111<<(USB_PIN_DP*4)) | (0b1111<<(USB_PIN_DM*4)))
and a4, s1, a4
// Convert D+/D- into 2MHz outputs
li s1, ((0b0010<<(USB_PIN_DP*4)) | (0b0010<<(USB_PIN_DM*4)))
or a4, s1, a4
li s1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16))
c.sw s1, BSHR_OFFSET(a5)
//00: Universal push-pull output mode
c.sw a4, CFGLR_OFFSET(a5)
li t1, (1<<USB_PIN_DP) | (1<<(USB_PIN_DM+16)) | (1<<USB_PIN_DM) | (1<<(USB_PIN_DP+16));
SAVE_DEBUG_MARKER( 8 )
// Save off our preamble and token.
c.slli a3, 7 //Put token further up so it gets sent later.
ori s0, a3, 0x40
li t0, 0x0000
c.bnez a2, done_poly_check
li t0, 0xa001
li a2, 0xffff
done_poly_check:
c.slli a1, 3 // bump up one extra to be # of bits
mv t2, a1
// t0 is our polynomial
// a2 is our running CRC.
// a3 is our token.
DEBUG_TICK_SETUP
c.li a4, 6 // reset bit stuffing.
c.li a1, 15 // 15 bits.
//c.nop; c.nop; c.nop;
c.j pre_and_tok_send_inner_loop
////////////////////////////////////////////////////////////////////////////
// Send preamble + token
.balign 4
pre_and_tok_send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.srli s0, 1 // Shift down into the next bit.
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.addi a4, -1
c.bnez a3, pre_and_tok_send_one_bit
//pre_and_tok_send_one_bit:
//Send 0 bit. (Flip)
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
// DO NOT flip. Allow a4 to increment.
// Deliberately unaligned for timing purposes.
.balign 4
pre_and_tok_send_one_bit:
sw s1, BSHR_OFFSET(a5)
//Bit stuffing doesn't happen.
c.addi a1, -1
c.beqz a1, pre_and_tok_done_sending_data
nx6p3delay( 2, a3 ); c.nop; // Free time!
c.j pre_and_tok_send_inner_loop
.balign 4
pre_and_tok_done_sending_data:
////////////////////////////////////////////////////////////////////////////
// We have very little time here. Just enough to do this.
//Restore size.
mv a1, t2//lw a1, 12(sp)
c.beqz a1, no_really_done_sending_data //No actual payload? Bail!
c.addi a1, -1
// beqz t2, no_really_done_sending_data
bnez t0, done_poly_check2
li a2, 0xffff
done_poly_check2:
// t0 is used for CRC
// t1 is free
// t2 is a backup of size.
// s1 is our last "state"
// bit 0 is last "physical" state,
//
// s0 is our current "bit" / byte / temp.
// a0 is our data
// a1 is is our length
// a2 our CRC
// a3 is TEMPORARY
// a4 is used for bit stuffing.
// a5 is the output address.
//xor s1, s1, t1
//c.sw s1, BSHR_OFFSET(a5)
// This creates a preamble, which is alternating 1's and 0's
// and then it sets the same state.
// li s0, 0b10000000
// c.j send_inner_loop
.balign 4
load_next_byte:
// CH32v003 has the XW extension.
// this replaces: lb s0, 0(a0)
XW_C_LBU(s0, a0, 0);
//lb s0, 0(a0)
// .long 0x00150513 // addi a0, a0, 1 (For alignment's sake)
c.addi a0, 1
send_inner_loop:
/* High-level:
* extract the LSB from s0
* If it's 0, we FLIP the USB pin state.
* If it's 1, we don't flip.
* Regardless of the state, we still compute CRC.
* We have to decrement our bit stuffing index.
* If it is 0, we can reset our bit stuffing index.
*/
// a3 is now the lsb of s0 (the 'next bit' to read out)
c.mv a3, s0
c.andi a3, 1
// If a3 is 0, we should FLIP
// if a3 is 1, we should NOT flip.
c.beqz a3, send_zero_bit
c.srli s0, 1 // Shift down into the next bit.
//send_one_bit:
//HANDLE_CRC (1 bit)
andi a3, a2, 1
c.addi a3, -1
and a3, a3, t0
c.srli a2, 1
c.xor a2, a3
c.addi a4, -1
c.beqz a4, insert_stuffed_bit
c.j cont_after_jump
//Send 0 bit. (Flip)
.balign 4
send_zero_bit:
c.srli s0, 1 // Shift down into the next bit.
// Handle CRC (0 bit)
// a2 is our running CRC
// a3 is temp
// t0 is polynomial.
// XXX WARNING: this was by https://github.com/cnlohr/rv003usb/issues/7
// TODO Check me!
slli a3,a2,31 // Put a3s LSB into a0s MSB
c.srai a3,31 // Copy MSB into all other bits
// Flip s1 (our bshr setting) by xoring it.
// 10.....01
// 11.....11 (xor with)
// 01.....10
xor s1, s1, t1
sw s1, BSHR_OFFSET(a5)
c.li a4, 6 // reset bit stuffing.
// XXX XXX CRC down here to make bit stuffing timings line up.
c.srli a2,1
and a3,a3,t0
c.xor a2,a3
.balign 4
cont_after_jump:
send_end_bit_complete:
c.beqz a1, done_sending_data
andi a3, a1, 7
c.addi a1, -1
c.beqz a3, load_next_byte
// Wait an extra few cycles.
c.j 1f; 1:
c.j send_inner_loop
.balign 4
done_sending_data:
// BUT WAIT!! MAYBE WE NEED TO CRC!
beqz t0, no_really_done_sending_data
srli t0, t0, 8 // reset poly - we don't want it anymore.
li a1, 7 // Load 8 more bits out
beqz t0, send_inner_loop //Second CRC byte
// First CRC byte
not s0, a2 // get read to send out the CRC.
c.j send_inner_loop
.balign 4
no_really_done_sending_data:
// c.bnez a2, poly_function TODO: Uncomment me!
nx6p3delay( 2, a3 );
// Need to perform an SE0.
li s1, (1<<(USB_PIN_DM+16)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
nx6p3delay( 7, a3 );
li s1, (1<<(USB_PIN_DM)) | (1<<(USB_PIN_DP+16))
c.sw s1, BSHR_OFFSET(a5)
lw s1, CFGLR_OFFSET(a5)
// Convert D+/D- into inputs.
li a3, ~((0b11<<(USB_PIN_DP*4)) | (0b11<<(USB_PIN_DM*4)))
and s1, a3, s1
// 01: Floating input mode.
li a3, ((0b01<<(USB_PIN_DP*4+2)) | (0b01<<(USB_PIN_DM*4+2)))
or s1, a3, s1
sw s1, CFGLR_OFFSET(a5)
lw s0, 0(sp)
lw s1, 4(sp)
RESTORE_DEBUG_MARKER( 8 )
addi sp,sp,16
ret
.balign 4
// TODO: This seems to be either 222 or 226 (not 224) in cases.
// It's off by 2 clock cycles. Probably OK, but, hmm.
insert_stuffed_bit:
nx6p3delay(3, a3)
xor s1, s1, t1
c.li a4, 6 // reset bit stuffing.
c.nop
c.nop
sw s1, BSHR_OFFSET(a5)
c.j send_end_bit_complete
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////
#ifdef USE_TINY_BOOT
// Absolutey bare-bones hardware initialization for bringing the chip up,
// setting up the envrionment for C, switching to 48MHz clock, and booting
// into main... as well as providing EXTI7_0_IRQHandler jump at interrupt
.section .init
.global InterruptVector
InterruptVector:
.align 2
.option push
.option norelax
la gp, __global_pointer$
mv sp, gp //_eusrstack
#if __GNUC__ > 10
.option arch, +zicsr
#endif
li a0, 0x80
csrw mstatus, a0
c.li a0, 3
csrw mtvec, a0
addi a0, gp, -2048 // will be 0x20000000
c.li a4, 0
1: c.sw a4, 0(a0) // Clear RAM
c.addi a0, 4
blt a0, gp, 1b // Iterate over RAM until it's cleared.
2:
//XXX WARNING: NO .DATA SECTION IS AVAILABLE HERE!
/* SystemInit48HSI */
la a2, RCC_BASE
la a3, FLASH_R_BASE
li a1, 0x00000001 | 0x01000000 | 0x80 /* RCC->CTLR RCC_HSION | RCC_PLLON | ((HSITRIM) << 3) */
c.sw a1, 0(a2)
c.li a1, 0x01 /* FLASH_ACTLR_LATENCY_1 */
c.sw a1, 0(a3) /* FLASH->ACTLR = FLASH_ACTLR_LATENCY_1 */
c.li a1, 0x00000002 /* RCC->CFGR0 = RCC_SW_PLL */
c.sw a1, 4(a2)
la a1, main
csrw mepc, a1
.option pop
mret
// CAREFUL THIS MUST BE EXACTLY AT 0x50
. = 0x52 // Weird... I don't know why this has to be 0x52, for it to be at 0x50.
.word EXTI7_0_IRQHandler /* EXTI Line 7..0 */
always0:
.byte 0x00 // Automatically expands out to 4 bytes.
.align 0
.balign 0
#else
.balign 4
always0:
.word 0x00
#endif
|
wa-lang/wa | 1,150 | internal/native/wat2rv/testdata/hello.s | # Copyright (C) 2025 武汉凹语言科技有限公司
# SPDX-License-Identifier: AGPL-3.0-or-later
# 注: 尽量避免使用伪指令和相关特性
.section .rodata
message:
.asciz "Hello RISC-V Baremetal!\n"
.section .text
.globl _start
# QEMU virt 机器 UART0 和 exit device 的基地址
UART0 = 0x10000000
EXIT_DEVICE = 0x100000
_start:
# a0 = 字符串地址
auipc a0, %pcrel_hi(message) # 高20位 = 当前PC + 偏移
addi a0, a0, %pcrel_lo(_start) # 低12位
print_loop:
lbu a1, 0(a0) # 取一个字节
beq a1, x0, finished # 如果是0则结束
# t0 = UART0 地址
lui t0, %hi(UART0) # UART0 高20位
addi t0, t0, %lo(UART0) # UART0 低12位
sb a1, 0(t0) # 写到UART寄存器
addi a0, a0, 1 # 下一个字符
jal x0, print_loop
finished:
# 写退出码 0 到 EXIT_DEVICE，让 QEMU 退出
lui t0, %hi(EXIT_DEVICE) # exit device 地址
addi t0, t0, %lo(EXIT_DEVICE)
# t1 = 0x5555
# addi rd, rs1, imm 的 imm 范围是 [-2048, +2047](12 位有符号立即数)
lui t1, 0x5 # 高 20 位 (0x5 << 12 = 0x5000)
addi t1, t1, 0x555 # 结果 = 0x5000 + 0x555 = 0x5555
sw t1, 0(t0)
# 如果 QEMU 不支持 exit 设备，就进入并死循环
forever:
jal x0, forever
|
wa-lang/wa | 1,150 | internal/native/examples/hello-riscv/hello.s | # Copyright (C) 2025 武汉凹语言科技有限公司
# SPDX-License-Identifier: AGPL-3.0-or-later
# 注: 尽量避免使用伪指令和相关特性
.section .rodata
message:
.asciz "Hello RISC-V Baremetal!\n"
.section .text
.globl _start
# QEMU virt 机器 UART0 和 exit device 的基地址
UART0 = 0x10000000
EXIT_DEVICE = 0x100000
_start:
# a0 = 字符串地址
auipc a0, %pcrel_hi(message) # 高20位 = 当前PC + 偏移
addi a0, a0, %pcrel_lo(_start) # 低12位
print_loop:
lbu a1, 0(a0) # 取一个字节
beq a1, x0, finished # 如果是0则结束
# t0 = UART0 地址
lui t0, %hi(UART0) # UART0 高20位
addi t0, t0, %lo(UART0) # UART0 低12位
sb a1, 0(t0) # 写到UART寄存器
addi a0, a0, 1 # 下一个字符
jal x0, print_loop
finished:
# 写退出码 0 到 EXIT_DEVICE，让 QEMU 退出
lui t0, %hi(EXIT_DEVICE) # exit device 地址
addi t0, t0, %lo(EXIT_DEVICE)
# t1 = 0x5555
# addi rd, rs1, imm 的 imm 范围是 [-2048, +2047](12 位有符号立即数)
lui t1, 0x5 # 高 20 位 (0x5 << 12 = 0x5000)
addi t1, t1, 0x555 # 结果 = 0x5000 + 0x555 = 0x5555
sw t1, 0(t0)
# 如果 QEMU 不支持 exit 设备，就进入并死循环
forever:
jal x0, forever
|
WalkerLau/DetectHumanFaces | 6,680 | software/startup_CM3DS.s | ; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00100000
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00100000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD UARTRX_Handler ; UART RX Handler
DCD UARTTX_Handler ; UART TX Handler
DCD UARTOVR_Handler ; UART RX and TX OVERRIDE Handler
DCD ACC_Handler ; Hardware Accelerator Return Handler
DCD CAM_Handler ; CAMERA Handler
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT main
LDR R0, =SystemInit
BLX R0
LDR R0, =main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
IMPORT NMIHandler
PUSH {LR}
BL NMIHandler
POP {PC}
ENDP
HardFault_Handler PROC
EXPORT HardFault_Handler [WEAK]
IMPORT HardFaultHandler
PUSH {LR}
BL HardFaultHandler
POP {PC}
ENDP
MemManage_Handler PROC
EXPORT MemManage_Handler [WEAK]
IMPORT MemManageHandler
PUSH {LR}
BL MemManageHandler
POP {PC}
ENDP
BusFault_Handler PROC
EXPORT BusFault_Handler [WEAK]
IMPORT BusFaultHandler
PUSH {LR}
BL BusFaultHandler
POP {PC}
ENDP
UsageFault_Handler PROC
EXPORT UsageFault_Handler [WEAK]
IMPORT UsageFaultHandler
PUSH {LR}
BL UsageFaultHandler
POP {PC}
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
IMPORT SVCHandler
PUSH {LR}
BL SVCHandler
POP {PC}
ENDP
DebugMon_Handler PROC
EXPORT DebugMon_Handler [WEAK]
IMPORT DebugMonHandler
PUSH {LR}
BL DebugMonHandler
POP {PC}
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
IMPORT PendSVHandler
PUSH {LR}
BL PendSVHandler
POP {PC}
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
IMPORT SysTickHandler
PUSH {LR}
BL SysTickHandler
POP {PC}
ENDP
UARTRX_Handler PROC
EXPORT UARTRX_Handler [WEAK]
IMPORT UARTRXHandler
PUSH {LR}
BL UARTRXHandler
POP {PC}
ENDP
UARTTX_Handler PROC
EXPORT UARTTX_Handler [WEAK]
IMPORT UARTTXHandler
PUSH {LR}
BL UARTTXHandler
POP {PC}
ENDP
UARTOVR_Handler PROC
EXPORT UARTOVR_Handler [WEAK]
IMPORT UARTOVRHandler
PUSH {LR}
BL UARTOVRHandler
POP {PC}
ENDP
ACC_Handler PROC
EXPORT ACC_Handler [WEAK]
IMPORT ACCHandler
PUSH {LR}
BL ACCHandler
POP {PC}
ENDP
CAM_Handler PROC
EXPORT CAM_Handler [WEAK]
IMPORT CAMHandler
PUSH {LR}
BL CAMHandler
POP {PC}
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END
|
Wandalen/wretry.action | 1,339 | step/ActionWrite.s |
function actionWrite( frame )
{
const run = frame.run;
const module = run.module;
const will = module.will;
const fileProvider = will.fileProvider;
const logger = will.transaction.logger;
const opener = module.toOpener();
/* */
logger.log( `Updating willfile. Setup version "${ module.about.version }".` );
const commonPath = fileProvider.path.common( opener.openedModule.willfilesPath );
will.willfilePropertySet
({
commonPath,
request: '',
selectorsMap: { 'about/version' : module.about.version },
});
/* */
const subdirectories = [ '', 'main', 'pre', 'post' ];
for( let i = 0 ; i < subdirectories.length ; i++ )
{
const slash = subdirectories[ i ] === '' ? '' : '/';
const actionRelativePath = `${ subdirectories[ i ] }${ slash }action.yml`;
const actionPath = fileProvider.path.join( module.dirPath, actionRelativePath );
const action = fileProvider.fileReadUnknown( actionPath );
action.runs.steps[ 0 ].uses = `Wandalen/wretry.action${ slash }${ subdirectories[ i ] }@v${ module.about.version }_js_action`;
logger.log( `Updating action file "${ actionRelativePath }". Setup action version to "${ action.runs.steps[ 0 ].uses }".` );
fileProvider.fileWrite({ filePath : actionPath, data : action, encoding : 'yaml' });
}
}
module.exports = actionWrite;
|
wang-bin/QtAV | 3,591 | src/codec/video/tiled_yuv.S | /*
* Copyright (c) 2014 Jens Kuske <jenskuske@gmail.com>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
#if defined(__linux__) && defined(__ELF__)
.section .note.GNU-stack,"",%progbits /* mark stack as non-executable */
#endif
.text
.syntax unified
.arch armv7-a
.fpu neon
.thumb
.macro thumb_function fname
.global \fname
#ifdef __ELF__
.hidden \fname
.type \fname, %function
#endif
.thumb_func
\fname:
.endm
.macro end_function fname
#ifdef __ELF__
.size \fname, .-\fname
#endif
.endm
SRC .req r0
DST .req r1
PITCH .req r2
CNT .req r3
TLINE .req r4
HEIGHT .req r5
REST .req r6
NTILES .req r7
TMPSRC .req r8
DST2 .req r9
TSIZE .req r12
NEXTLIN .req lr
thumb_function tiled_to_planar
push {r4, r5, r6, r7, r8, lr}
ldr HEIGHT, [sp, #24]
add NEXTLIN, r3, #31
lsrs NTILES, r3, #5
bic NEXTLIN, NEXTLIN, #31
and REST, r3, #31
lsl NEXTLIN, NEXTLIN, #5
subs PITCH, r2, r3
movs TLINE, #32
rsb NEXTLIN, NEXTLIN, #32
mov TSIZE, #1024
/* y loop */
1: cbz NTILES, 3f
mov CNT, NTILES
/* x loop complete tiles */
2: pld [SRC, TSIZE]
vld1.8 {d0 - d3}, [SRC :256], TSIZE
subs CNT, #1
vst1.8 {d0 - d3}, [DST]!
bne 2b
3: cbnz REST, 4f
/* fix up dest pointer if pitch != width */
7: add DST, PITCH
/* fix up src pointer at end of line */
subs TLINE, #1
itee ne
addne SRC, NEXTLIN
subeq SRC, #992
moveq TLINE, #32
subs HEIGHT, #1
bne 1b
pop {r4, r5, r6, r7, r8, pc}
/* partly copy last tile of line */
4: mov TMPSRC, SRC
tst REST, #16
beq 5f
vld1.8 {d0 - d1}, [TMPSRC :128]!
vst1.8 {d0 - d1}, [DST]!
5: add SRC, TSIZE
ands CNT, REST, #15
beq 7b
6: vld1.8 {d0[0]}, [TMPSRC]!
subs CNT, #1
vst1.8 {d0[0]}, [DST]!
bne 6b
b 7b
end_function tiled_to_planar
thumb_function tiled_deinterleave_to_planar
push {r4, r5, r6, r7, r8, r9, lr}
mov DST2, r2
ldr HEIGHT, [sp, #32]
ldr r4, [sp, #28]
add NEXTLIN, r4, #31
lsrs NTILES, r4, #5
bic NEXTLIN, NEXTLIN, #31
ubfx REST, r4, #1, #4
lsl NEXTLIN, NEXTLIN, #5
sub PITCH, r3, r4, lsr #1
movs TLINE, #32
rsb NEXTLIN, NEXTLIN, #32
mov TSIZE, #1024
/* y loop */
1: cbz NTILES, 3f
mov CNT, NTILES
/* x loop complete tiles */
2: pld [SRC, TSIZE]
vld2.8 {d0 - d3}, [SRC :256], TSIZE
subs CNT, #1
vst1.8 {d0 - d1}, [DST]!
vst1.8 {d2 - d3}, [DST2]!
bne 2b
3: cbnz REST, 4f
/* fix up dest pointer if pitch != width */
7: add DST, PITCH
add DST2, PITCH
/* fix up src pointer at end of line */
subs TLINE, #1
itee ne
addne SRC, NEXTLIN
subeq SRC, #992
moveq TLINE, #32
subs HEIGHT, #1
bne 1b
pop {r4, r5, r6, r7, r8, r9, pc}
/* partly copy last tile of line */
4: mov TMPSRC, SRC
tst REST, #8
beq 5f
vld2.8 {d0 - d1}, [TMPSRC :128]!
vst1.8 {d0}, [DST]!
vst1.8 {d1}, [DST2]!
5: add SRC, TSIZE
ands CNT, REST, #7
beq 7b
6: vld2.8 {d0[0], d1[0]}, [TMPSRC]!
subs CNT, #1
vst1.8 {d0[0]}, [DST]!
vst1.8 {d1[0]}, [DST2]!
bne 6b
b 7b
end_function tiled_deinterleave_to_planar
|
wang-edward/teensy-juno | 4,796 | lib/Audio/memcpy_audio.S | /* Teensyduino Audio Memcpy
* Copyright (c) 2016, 2017, 2018, 2019 Frank Bösing
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* 1. The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* 2. If the Software is incorporated into a build system that allows
* selection among a list of target devices, then similar target
* devices manufactured by PJRC.COM must be included in the list of
* target devices and selectable in the same manner.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#if defined (__ARM_ARCH_7EM__)
#include <AudioStream.h>
.cpu cortex-m4
.syntax unified
.thumb
.text
/* void memcpy_tointerleave(short *dst, short *srcL, short *srcR); */
.global memcpy_tointerleaveLR
.thumb_func
memcpy_tointerleaveLR:
@ r0: dst
@ r1: srcL
@ r2: srcR
#if AUDIO_BLOCK_SAMPLES > 8
push {r4-r11,r14}
add r14,r0,#(AUDIO_BLOCK_SAMPLES*2)
.align 2
.loopLR:
//Load 2*4 words
ldmia r1!, {r5,r7,r9,r11} //1+4
ldmia r2!, {r6,r8,r10,r12} //1+4
pkhbt r3,r5,r6,LSL #16 //1
pkhtb r4,r6,r5,ASR #16 //1
pkhbt r5,r7,r8,LSL #16 //1
pkhtb r6,r8,r7,ASR #16 //1
pkhbt r7,r9,r10,LSL #16 //1
pkhtb r8,r10,r9,ASR #16 //1
pkhbt r9,r11,r12,LSL #16 //1
pkhtb r10,r12,r11,ASR #16 //1
//Write 8 Words
stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10} //1+8 -> 5+5+8+9 = 27 Cycles to interleave 32 bytes.
cmp r14, r0
bne .loopLR
pop {r4-r11,r14}
#elif AUDIO_BLOCK_SAMPLES == 8
push {r4-r8,r14}
ldmia r1!, {r5,r7}
ldmia r2!, {r6,r8}
pkhbt r3,r5,r6,LSL #16
pkhtb r4,r6,r5,ASR #16
pkhbt r5,r7,r8,LSL #16
pkhtb r6,r8,r7,ASR #16
stmia r0!, {r3,r4,r5,r6}
pop {r4-r8,r14}
#endif
BX lr
/* void memcpy_tointerleaveL(short *dst, short *srcL); */
.global memcpy_tointerleaveL
.thumb_func
memcpy_tointerleaveL:
@ r0: dst
@ r1: srcL
mov r2, #0
#if AUDIO_BLOCK_SAMPLES > 8
push {r4-r11}
add r12,r0,#(AUDIO_BLOCK_SAMPLES*2)
.align 2
.loopL:
//Load 4 words
ldmia r1!, {r5,r7,r9,r11} //1+4
pkhbt r3,r5,r2 //1
pkhtb r4,r2,r5,ASR #16 //1
pkhbt r5,r7,r2 //1
pkhtb r6,r2,r7,ASR #16 //1
pkhbt r7,r9,r2 //1
pkhtb r8,r2,r9,ASR #16 //1
pkhbt r9,r11,r2 //1
pkhtb r10,r2,r11,ASR #16 //1
//Write 8 Words
stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10} //1+8
cmp r12, r0
bne .loopL
pop {r4-r11}
#elif AUDIO_BLOCK_SAMPLES == 8
push {r4-r7}
ldmia r1!, {r5,r7}
pkhbt r3,r5,r2
pkhtb r4,r2,r5,ASR #16
pkhbt r5,r7,r2 //1
pkhtb r6,r2,r7,ASR #16
stmia r0!, {r3,r4,r5,r6}
pop {r4-r7}
#endif
BX lr
/* void memcpy_tointerleaveL(short *dst, short *srcR); */
.global memcpy_tointerleaveR
.thumb_func
memcpy_tointerleaveR:
@ r0: dst
@ r1: srcR
mov r2, #0
#if AUDIO_BLOCK_SAMPLES > 8
push {r4-r11}
add r12,r0,#(AUDIO_BLOCK_SAMPLES*2)
.align 2
.loopR:
//Load 4 words
ldmia r1!, {r5,r7,r9,r11}
pkhbt r3,r2,r5,LSL #16
pkhtb r4,r5,r2
pkhbt r5,r2,r7,LSL #16
pkhtb r6,r7,r2
pkhbt r7,r2,r9,LSL #16
pkhtb r8,r9,r2
pkhbt r9,r2,r11,LSL #16
pkhtb r10,r11,r2
//Write 8 Words
stmia r0!, {r3,r4,r5,r6,r7,r8,r9,r10}
cmp r12, r0
bne .loopR
pop {r4-r11}
#elif AUDIO_BLOCK_SAMPLES == 8
push {r4-r7}
ldmia r1!, {r5,r7}
pkhbt r3,r2,r5,LSL #16
pkhtb r4,r5,r2
pkhbt r5,r2,r7,LSL #16
pkhtb r6,r7,r2
stmia r0!, {r3,r4,r5,r6}
pop {r4-r7}
#endif
BX lr
/* void memcpy_tointerleaveQuad(int16_t *dst, const int16_t *src1, const int16_t *src2, const int16_t *src3, const int16_t *src4) */
.global memcpy_tointerleaveQuad
.thumb_func
memcpy_tointerleaveQuad:
@ r0: dst
@ r1: src1
@ r2: src2
@ r3: src3
@ r4: src4
push {r4-r11}
ldr r4, [sp, #(0+32)] //5th parameter is saved on the stack
add r11,r0,#(AUDIO_BLOCK_SAMPLES*4)
.align 2
.loopQuad:
ldr r5, [r1],4
ldr r6, [r3],4
pkhbt r7,r5,r6,LSL #16
pkhtb r9,r6,r5,ASR #16
ldr r5, [r2],4
ldr r6, [r4],4
pkhbt r8,r5,r6,LSL #16
pkhtb r10,r6,r5,ASR #16
stmia r0!, {r7-r10}
cmp r11, r0
bne .loopQuad
pop {r4-r11}
BX lr
.END
#endif
|
wanggx/Linux1.0 | 8,651 | Linux1.0/boot/head.S | /*
* linux/boot/head.S
*
* Copyright (C) 1991, 1992 Linus Torvalds
*/
/*
* head.S contains the 32-bit startup code.
*/
.text
.globl _idt,_gdt,
.globl _swapper_pg_dir,_pg0
.globl _empty_bad_page
.globl _empty_bad_page_table
.globl _empty_zero_page
.globl _tmp_floppy_area,_floppy_track_buffer
#include <linux/tasks.h>
#include <linux/segment.h>
#define CL_MAGIC_ADDR 0x90020
#define CL_MAGIC 0xA33F
#define CL_BASE_ADDR 0x90000
#define CL_OFFSET 0x90022
/*
* swapper_pg_dir is the main page directory, address 0x00001000 (or at
* address 0x00101000 for a compressed boot).
*/
startup_32:
cld
movl $(KERNEL_DS),%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
lss _stack_start,%esp
/*
* Clear BSS first so that there are no surprises...
*/
xorl %eax,%eax
movl $__edata,%edi
movl $__end,%ecx
subl %edi,%ecx
cld
rep
stosb
/*
* start system 32-bit setup. We need to re-do some of the things done
* in 16-bit mode for the "real" operations.
*/
call setup_idt
xorl %eax,%eax
1: incl %eax # check that A20 really IS enabled
movl %eax,0x000000 # loop forever if it isn't
cmpl %eax,0x100000
je 1b
/*
* Initialize eflags. Some BIOS's leave bits like NT set. This would
* confuse the debugger if this code is traced.
* XXX - best to initialize before switching to protected mode.
*/
pushl $0
popfl
/*
* Copy bootup parameters out of the way. First 2kB of
* _empty_zero_page is for boot parameters, second 2kB
* is for the command line.
*/
movl $0x90000,%esi
movl $_empty_zero_page,%edi
movl $512,%ecx
cld
rep
movsl
xorl %eax,%eax
movl $512,%ecx
rep
stosl
cmpw $(CL_MAGIC),CL_MAGIC_ADDR
jne 1f
movl $_empty_zero_page+2048,%edi
movzwl CL_OFFSET,%esi
addl $(CL_BASE_ADDR),%esi
movl $2048,%ecx
rep
movsb
1:
/* check if it is 486 or 386. */
/*
* XXX - this does a lot of unnecessary setup. Alignment checks don't
* apply at our cpl of 0 and the stack ought to be aligned already, and
* we don't need to preserve eflags.
*/
movl %esp,%edi # save stack pointer
andl $0xfffffffc,%esp # align stack to avoid AC fault
movl $3,_x86
pushfl # push EFLAGS
popl %eax # get EFLAGS
movl %eax,%ecx # save original EFLAGS
xorl $0x40000,%eax # flip AC bit in EFLAGS
pushl %eax # copy to EFLAGS
popfl # set EFLAGS
pushfl # get new EFLAGS
popl %eax # put it in eax
xorl %ecx,%eax # change in flags
andl $0x40000,%eax # check if AC bit changed
je is386
movl $4,_x86
movl %ecx,%eax
xorl $0x200000,%eax # check ID flag
pushl %eax
popfl # if we are on a straight 486DX, SX, or
pushfl # 487SX we can't change it
popl %eax
xorl %ecx,%eax
andl $0x200000,%eax
je is486
isnew: pushl %ecx # restore original EFLAGS
popfl
movl $1, %eax # Use the CPUID instruction to
.byte 0x0f, 0xa2 # check the processor type
andl $0xf00, %eax # Set _x86 with the family
shrl $8, %eax # returned.
movl %eax, _x86
movl %edi,%esp # restore esp
movl %cr0,%eax # 486+
andl $0x80000011,%eax # Save PG,PE,ET
orl $0x50022,%eax # set AM, WP, NE and MP
jmp 2f
is486: pushl %ecx # restore original EFLAGS
popfl
movl %edi,%esp # restore esp
movl %cr0,%eax # 486
andl $0x80000011,%eax # Save PG,PE,ET
orl $0x50022,%eax # set AM, WP, NE and MP
jmp 2f
is386: pushl %ecx # restore original EFLAGS
popfl
movl %edi,%esp # restore esp
movl %cr0,%eax # 386
andl $0x80000011,%eax # Save PG,PE,ET
orl $2,%eax # set MP
2: movl %eax,%cr0
call check_x87
call setup_paging
lgdt gdt_descr
lidt idt_descr
ljmp $(KERNEL_CS),$1f
1: movl $(KERNEL_DS),%eax # reload all the segment registers
mov %ax,%ds # after changing gdt.
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
lss _stack_start,%esp
xorl %eax,%eax
lldt %ax
pushl %eax # These are the parameters to main :-)
pushl %eax
pushl %eax
cld # gcc2 wants the direction flag cleared at all times
call _start_kernel
L6:
jmp L6 # main should never return here, but
# just in case, we know what happens.
/*
* We depend on ET to be correct. This checks for 287/387.
*/
check_x87:
movl $0,_hard_math
clts
fninit
fstsw %ax
cmpb $0,%al
je 1f
movl %cr0,%eax /* no coprocessor: have to set bits */
xorl $4,%eax /* set EM */
movl %eax,%cr0
ret
.align 2
1: movl $1,_hard_math
.byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
ret
/*
* setup_idt
*
* sets up a idt with 256 entries pointing to
* ignore_int, interrupt gates. It doesn't actually load
* idt - that can be done only after paging has been enabled
* and the kernel moved to 0xC0000000. Interrupts
* are enabled elsewhere, when we can be relatively
* sure everything is ok.
*/
setup_idt:
lea ignore_int,%edx
movl $(KERNEL_CS << 16),%eax
movw %dx,%ax /* selector = 0x0010 = cs */
movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
lea _idt,%edi
mov $256,%ecx
rp_sidt:
movl %eax,(%edi)
movl %edx,4(%edi)
addl $8,%edi
dec %ecx
jne rp_sidt
ret
/*
* Setup_paging
*
* This routine sets up paging by setting the page bit
* in cr0. The page tables are set up, identity-mapping
* the first 4MB. The rest are initialized later.
*
* (ref: added support for up to 32mb, 17Apr92) -- Rik Faith
* (ref: update, 25Sept92) -- croutons@crunchy.uucp
* (ref: 92.10.11 - Linus Torvalds. Corrected 16M limit - no upper memory limit)
*/
.align 2
setup_paging:
movl $1024*2,%ecx /* 2 pages - swapper_pg_dir+1 page table */
xorl %eax,%eax
movl $_swapper_pg_dir,%edi /* swapper_pg_dir is at 0x1000 */
cld;rep;stosl
/* Identity-map the kernel in low 4MB memory for ease of transition */
movl $_pg0+7,_swapper_pg_dir /* set present bit/user r/w */
/* But the real place is at 0xC0000000 */
movl $_pg0+7,_swapper_pg_dir+3072 /* set present bit/user r/w */
movl $_pg0+4092,%edi
movl $0x03ff007,%eax /* 4Mb - 4096 + 7 (r/w user,p) */
std
1: stosl /* fill the page backwards - more efficient :-) */
subl $0x1000,%eax
jge 1b
cld
movl $_swapper_pg_dir,%eax
movl %eax,%cr3 /* cr3 - page directory start */
movl %cr0,%eax
orl $0x80000000,%eax
movl %eax,%cr0 /* set paging (PG) bit */
ret /* this also flushes the prefetch-queue */
/*
* page 0 is made non-existent, so that kernel NULL pointer references get
* caught. Thus the swapper page directory has been moved to 0x1000
*
* XXX Actually, the swapper page directory is at 0x1000 plus 1 megabyte,
* with the introduction of the compressed boot code. Theoretically,
* the original design of overlaying the startup code with the swapper
* page directory is still possible --- it would reduce the size of the kernel
* by 2-3k. This would be a good thing to do at some point.....
*/
.org 0x1000
_swapper_pg_dir:
/*
* The page tables are initialized to only 4MB here - the final page
* tables are set up later depending on memory size.
*/
.org 0x2000
_pg0:
.org 0x3000
_empty_bad_page:
.org 0x4000
_empty_bad_page_table:
.org 0x5000
_empty_zero_page:
.org 0x6000
/*
* tmp_floppy_area is used by the floppy-driver when DMA cannot
* reach to a buffer-block. It needs to be aligned, so that it isn't
* on a 64kB border.
*/
_tmp_floppy_area:
.fill 1024,1,0
/*
* floppy_track_buffer is used to buffer one track of floppy data: it
* has to be separate from the tmp_floppy area, as otherwise a single-
* sector read/write can mess it up. It can contain one full track of
* data (18*2*512 bytes).
*/
_floppy_track_buffer:
.fill 512*2*18,1,0
/* This is the default interrupt "handler" :-) */
int_msg:
.asciz "Unknown interrupt\n"
.align 2
ignore_int:
cld
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $(KERNEL_DS),%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
pushl $int_msg
call _printk
popl %eax
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
/*
* The interrupt descriptor table has room for 256 idt's
*/
.align 4
.word 0
idt_descr:
.word 256*8-1 # idt contains 256 entries
.long 0xc0000000+_idt
.align 4
_idt:
.fill 256,8,0 # idt is uninitialized
.align 4
.word 0
gdt_descr:
.word (8+2*NR_TASKS)*8-1
.long 0xc0000000+_gdt
/*
* This gdt setup gives the kernel a 1GB address space at virtual
* address 0xC0000000 - space enough for expansion, I hope.
*/
.align 4
_gdt:
.quad 0x0000000000000000 /* NULL descriptor */
.quad 0x0000000000000000 /* not used */
.quad 0xc0c39a000000ffff /* 0x10 kernel 1GB code at 0xC0000000 */
.quad 0xc0c392000000ffff /* 0x18 kernel 1GB data at 0xC0000000 */
.quad 0x00cbfa000000ffff /* 0x23 user 3GB code at 0x00000000 */
.quad 0x00cbf2000000ffff /* 0x2b user 3GB data at 0x00000000 */
.quad 0x0000000000000000 /* not used */
.quad 0x0000000000000000 /* not used */
.fill 2*NR_TASKS,8,0 /* space for LDT's and TSS's etc */
|
wanggx/Linux1.0 | 9,187 | Linux1.0/boot/bootsect.S | !
! SYS_SIZE is the number of clicks (16 bytes) to be loaded.
! 0x7F00 is 0x7F000 bytes = 508kB, more than enough for current
! versions of linux which compress the kernel
!
#include <linux/config.h>
SYSSIZE = DEF_SYSSIZE
!
! bootsect.s Copyright (C) 1991, 1992 Linus Torvalds
! modified by Drew Eckhardt
! modified by Bruce Evans (bde)
!
! bootsect.s is loaded at 0x7c00 by the bios-startup routines, and moves
! itself out of the way to address 0x90000, and jumps there.
!
! bde - should not jump blindly, there may be systems with only 512K low
! memory. Use int 0x12 to get the top of memory, etc.
!
! It then loads 'setup' directly after itself (0x90200), and the system
! at 0x10000, using BIOS interrupts.
!
! NOTE! currently system is at most (8*65536-4096) bytes long. This should
! be no problem, even in the future. I want to keep it simple. This 508 kB
! kernel size should be enough, especially as this doesn't contain the
! buffer cache as in minix (and especially now that the kernel is
! compressed :-)
!
! The loader has been made as simple as possible, and continuos
! read errors will result in a unbreakable loop. Reboot by hand. It
! loads pretty fast by getting whole tracks at a time whenever possible.
.text
SETUPSECS = 4 ! nr of setup-sectors
BOOTSEG = 0x07C0 ! original address of boot-sector
INITSEG = DEF_INITSEG ! we move boot here - out of the way
SETUPSEG = DEF_SETUPSEG ! setup starts here
SYSSEG = DEF_SYSSEG ! system loaded at 0x10000 (65536).
! ROOT_DEV & SWAP_DEV are now written by "build".
ROOT_DEV = 0
SWAP_DEV = 0
#ifndef SVGA_MODE
#define SVGA_MODE ASK_VGA
#endif
#ifndef RAMDISK
#define RAMDISK 0
#endif
#ifndef CONFIG_ROOT_RDONLY
#define CONFIG_ROOT_RDONLY 0
#endif
! ld86 requires an entry symbol. This may as well be the usual one.
.globl _main
_main:
#if 0 /* hook for debugger, harmless unless BIOS is fussy (old HP) */
int 3
#endif
mov ax,#BOOTSEG
mov ds,ax
mov ax,#INITSEG
mov es,ax
mov cx,#256
sub si,si
sub di,di
cld
rep
movsw
jmpi go,INITSEG
go: mov ax,cs
mov dx,#0x4000-12 ! 0x4000 is arbitrary value >= length of
! bootsect + length of setup + room for stack
! 12 is disk parm size
! bde - changed 0xff00 to 0x4000 to use debugger at 0x6400 up (bde). We
! wouldn't have to worry about this if we checked the top of memory. Also
! my BIOS can be configured to put the wini drive tables in high memory
! instead of in the vector table. The old stack might have clobbered the
! drive table.
mov ds,ax
mov es,ax
mov ss,ax ! put stack at INITSEG:0x4000-12.
mov sp,dx
/*
* Many BIOS's default disk parameter tables will not
* recognize multi-sector reads beyond the maximum sector number
* specified in the default diskette parameter tables - this may
* mean 7 sectors in some cases.
*
* Since single sector reads are slow and out of the question,
* we must take care of this by creating new parameter tables
* (for the first disk) in RAM. We will set the maximum sector
* count to 18 - the most we will encounter on an HD 1.44.
*
* High doesn't hurt. Low does.
*
* Segments are as follows: ds=es=ss=cs - INITSEG,
* fs = 0, gs = parameter table segment
*/
push #0
pop fs
mov bx,#0x78 ! fs:bx is parameter table address
seg fs
lgs si,(bx) ! gs:si is source
mov di,dx ! es:di is destination
mov cx,#6 ! copy 12 bytes
cld
rep
seg gs
movsw
mov di,dx
movb 4(di),*18 ! patch sector count
seg fs
mov (bx),di
seg fs
mov 2(bx),es
mov ax,cs
mov fs,ax
mov gs,ax
xor ah,ah ! reset FDC
xor dl,dl
int 0x13
! load the setup-sectors directly after the bootblock.
! Note that 'es' is already set up.
load_setup:
xor dx, dx ! drive 0, head 0
mov cx,#0x0002 ! sector 2, track 0
mov bx,#0x0200 ! address = 512, in INITSEG
mov ax,#0x0200+SETUPSECS ! service 2, nr of sectors
! (assume all on head 0, track 0)
int 0x13 ! read it
jnc ok_load_setup ! ok - continue
push ax ! dump error code
call print_nl
mov bp, sp
call print_hex
pop ax
xor dl, dl ! reset FDC
xor ah, ah
int 0x13
jmp load_setup
ok_load_setup:
! Get disk drive parameters, specifically nr of sectors/track
#if 0
! bde - the Phoenix BIOS manual says function 0x08 only works for fixed
! disks. It doesn't work for one of my BIOS's (1987 Award). It was
! fatal not to check the error code.
xor dl,dl
mov ah,#0x08 ! AH=8 is get drive parameters
int 0x13
xor ch,ch
#else
! It seems that there is no BIOS call to get the number of sectors. Guess
! 18 sectors if sector 18 can be read, 15 if sector 15 can be read.
! Otherwise guess 9.
xor dx, dx ! drive 0, head 0
mov cx,#0x0012 ! sector 18, track 0
mov bx,#0x0200+SETUPSECS*0x200 ! address after setup (es = cs)
mov ax,#0x0201 ! service 2, 1 sector
int 0x13
jnc got_sectors
mov cl,#0x0f ! sector 15
mov ax,#0x0201 ! service 2, 1 sector
int 0x13
jnc got_sectors
mov cl,#0x09
#endif
got_sectors:
seg cs
mov sectors,cx
mov ax,#INITSEG
mov es,ax
! Print some inane message
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10
mov cx,#9
mov bx,#0x0007 ! page 0, attribute 7 (normal)
mov bp,#msg1
mov ax,#0x1301 ! write string, move cursor
int 0x10
! ok, we've written the message, now
! we want to load the system (at 0x10000)
mov ax,#SYSSEG
mov es,ax ! segment of 0x010000
call read_it
call kill_motor
call print_nl
! After that we check which root-device to use. If the device is
! defined (!= 0), nothing is done and the given device is used.
! Otherwise, either /dev/PS0 (2,28) or /dev/at0 (2,8), depending
! on the number of sectors that the BIOS reports currently.
seg cs
mov ax,root_dev
or ax,ax
jne root_defined
seg cs
mov bx,sectors
mov ax,#0x0208 ! /dev/ps0 - 1.2Mb
cmp bx,#15
je root_defined
mov ax,#0x021c ! /dev/PS0 - 1.44Mb
cmp bx,#18
je root_defined
mov ax,#0x0200 ! /dev/fd0 - autodetect
root_defined:
seg cs
mov root_dev,ax
! after that (everyting loaded), we jump to
! the setup-routine loaded directly after
! the bootblock:
jmpi 0,SETUPSEG
! This routine loads the system at address 0x10000, making sure
! no 64kB boundaries are crossed. We try to load it as fast as
! possible, loading whole tracks whenever we can.
!
! in: es - starting address segment (normally 0x1000)
!
sread: .word 1+SETUPSECS ! sectors read of current track
head: .word 0 ! current head
track: .word 0 ! current track
read_it:
mov ax,es
test ax,#0x0fff
die: jne die ! es must be at 64kB boundary
xor bx,bx ! bx is starting address within segment
rp_read:
mov ax,es
sub ax,#SYSSEG
cmp ax,syssize ! have we loaded all yet?
jbe ok1_read
ret
ok1_read:
seg cs
mov ax,sectors
sub ax,sread
mov cx,ax
shl cx,#9
add cx,bx
jnc ok2_read
je ok2_read
xor ax,ax
sub ax,bx
shr ax,#9
ok2_read:
call read_track
mov cx,ax
add ax,sread
seg cs
cmp ax,sectors
jne ok3_read
mov ax,#1
sub ax,head
jne ok4_read
inc track
ok4_read:
mov head,ax
xor ax,ax
ok3_read:
mov sread,ax
shl cx,#9
add bx,cx
jnc rp_read
mov ax,es
add ah,#0x10
mov es,ax
xor bx,bx
jmp rp_read
read_track:
pusha
pusha
mov ax, #0xe2e ! loading... message 2e = .
mov bx, #7
int 0x10
popa
mov dx,track
mov cx,sread
inc cx
mov ch,dl
mov dx,head
mov dh,dl
and dx,#0x0100
mov ah,#2
push dx ! save for error dump
push cx
push bx
push ax
int 0x13
jc bad_rt
add sp, #8
popa
ret
bad_rt: push ax ! save error code
call print_all ! ah = error, al = read
xor ah,ah
xor dl,dl
int 0x13
add sp, #10
popa
jmp read_track
/*
* print_all is for debugging purposes.
* It will print out all of the registers. The assumption is that this is
* called from a routine, with a stack frame like
* dx
* cx
* bx
* ax
* error
* ret <- sp
*
*/
print_all:
mov cx, #5 ! error code + 4 registers
mov bp, sp
print_loop:
push cx ! save count left
call print_nl ! nl for readability
cmp cl, 5
jae no_reg ! see if register name is needed
mov ax, #0xe05 + 'A - 1
sub al, cl
int 0x10
mov al, #'X
int 0x10
mov al, #':
int 0x10
no_reg:
add bp, #2 ! next register
call print_hex ! print it
pop cx
loop print_loop
ret
print_nl:
mov ax, #0xe0d ! CR
int 0x10
mov al, #0xa ! LF
int 0x10
ret
/*
* print_hex is for debugging purposes, and prints the word
* pointed to by ss:bp in hexadecmial.
*/
print_hex:
mov cx, #4 ! 4 hex digits
mov dx, (bp) ! load word into dx
print_digit:
rol dx, #4 ! rotate so that lowest 4 bits are used
mov ah, #0xe
mov al, dl ! mask off so we have only next nibble
and al, #0xf
add al, #'0 ! convert to 0-based digit
cmp al, #'9 ! check for overflow
jbe good_digit
add al, #'A - '0 - 10
good_digit:
int 0x10
loop print_digit
ret
/*
* This procedure turns off the floppy drive motor, so
* that we enter the kernel in a known state, and
* don't have to worry about it later.
*/
kill_motor:
push dx
mov dx,#0x3f2
xor al, al
outb
pop dx
ret
sectors:
.word 0
msg1:
.byte 13,10
.ascii "Loading"
.org 498
root_flags:
.word CONFIG_ROOT_RDONLY
syssize:
.word SYSSIZE
swap_dev:
.word SWAP_DEV
ram_size:
.word RAMDISK
vid_mode:
.word SVGA_MODE
root_dev:
.word ROOT_DEV
boot_flag:
.word 0xAA55
|
wanggx/Linux1.0 | 17,689 | Linux1.0/boot/setup.S | !
! setup.S Copyright (C) 1991, 1992 Linus Torvalds
!
! setup.s is responsible for getting the system data from the BIOS,
! and putting them into the appropriate places in system memory.
! both setup.s and system has been loaded by the bootblock.
!
! This code asks the bios for memory/disk/other parameters, and
! puts them in a "safe" place: 0x90000-0x901FF, ie where the
! boot-block used to be. It is then up to the protected mode
! system to read them from there before the area is overwritten
! for buffer-blocks.
!
! Move PS/2 aux init code to psaux.c
! (troyer@saifr00.cfsat.Honeywell.COM) 03Oct92
!
! some changes and additional features by Christoph Niemann, March 1993
! (niemann@rubdv15.ETDV.Ruhr-Uni-Bochum.De)
!
! NOTE! These had better be the same as in bootsect.s!
#include <linux/config.h>
#include <linux/segment.h>
#ifndef SVGA_MODE
#define SVGA_MODE ASK_VGA
#endif
INITSEG = DEF_INITSEG ! we move boot here - out of the way
SYSSEG = DEF_SYSSEG ! system loaded at 0x10000 (65536).
SETUPSEG = DEF_SETUPSEG ! this is the current segment
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
entry start
start:
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
! Get memory size (extended mem, kB)
mov ah,#0x88
int 0x15
mov [2],ax
! set the keyboard repeat rate to the max
mov ax,#0x0305
xor bx,bx ! clear bx
int 0x16
! check for EGA/VGA and some config parameters
mov ah,#0x12
mov bl,#0x10
int 0x10
mov [8],ax
mov [10],bx
mov [12],cx
mov ax,#0x5019
cmp bl,#0x10
je novga
mov ax,#0x1a00 ! Added check for EGA/VGA discrimination
int 0x10
mov bx,ax
mov ax,#0x5019
cmp bl,#0x1a ! 1a means VGA, anything else EGA or lower
jne novga
call chsvga
novga: mov [14],ax
mov ah,#0x03 ! read cursor pos
xor bh,bh ! clear bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! Get hd0 data
xor ax,ax ! clear ax
mov ds,ax
lds si,[4*0x41]
mov ax,#INITSEG
mov es,ax
mov di,#0x0080
mov cx,#0x10
cld
rep
movsb
! Get hd1 data
xor ax,ax ! clear ax
mov ds,ax
lds si,[4*0x46]
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
cld
rep
movsb
! Check that there IS a hd1 :-)
mov ax,#0x01500
mov dl,#0x81
int 0x13
jc no_disk1
cmp ah,#3
je is_disk1
no_disk1:
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
xor ax,ax ! clear ax
cld
rep
stosb
is_disk1:
! check for PS/2 pointing device
mov ax,#INITSEG
mov ds,ax
mov [0x1ff],#0 ! default is no pointing device
int 0x11 ! int 0x11: equipment determination
test al,#0x04 ! check if pointing device installed
jz no_psmouse
mov [0x1ff],#0xaa ! device present
no_psmouse:
! now we want to move to protected mode ...
cli ! no interrupts allowed !
mov al,#0x80 ! disable NMI for the bootup sequence
out #0x70,al
! first we move the system to its rightful place
mov ax,#0x100 ! start of destination segment
mov bx,#0x1000 ! start of source segment
cld ! 'direction'=0, movs moves forward
do_move:
mov es,ax ! destination segment
add ax,#0x100
cmp ax,#0x9000
jz end_move
mov ds,bx ! source segment
add bx,#0x100
sub di,di
sub si,si
mov cx,#0x800
rep
movsw
jmp do_move
! then we load the segment descriptors
end_move:
mov ax,#SETUPSEG ! right, forgot this at first. didn't work :-)
mov ds,ax
lidt idt_48 ! load idt with 0,0
lgdt gdt_48 ! load gdt with whatever appropriate
! that was painless, now we enable A20
call empty_8042
mov al,#0xD1 ! command write
out #0x64,al
call empty_8042
mov al,#0xDF ! A20 on
out #0x60,al
call empty_8042
! make sure any possible coprocessor is properly reset..
xor ax,ax
out #0xf0,al
call delay
out #0xf1,al
call delay
! well, that went ok, I hope. Now we have to reprogram the interrupts :-(
! we put them right after the intel-reserved hardware interrupts, at
! int 0x20-0x2F. There they won't mess up anything. Sadly IBM really
! messed this up with the original PC, and they haven't been able to
! rectify it afterwards. Thus the bios puts interrupts at 0x08-0x0f,
! which is used for the internal hardware interrupts as well. We just
! have to reprogram the 8259's, and it isn't fun.
mov al,#0x11 ! initialization sequence
out #0x20,al ! send it to 8259A-1
call delay
out #0xA0,al ! and to 8259A-2
call delay
mov al,#0x20 ! start of hardware int's (0x20)
out #0x21,al
call delay
mov al,#0x28 ! start of hardware int's 2 (0x28)
out #0xA1,al
call delay
mov al,#0x04 ! 8259-1 is master
out #0x21,al
call delay
mov al,#0x02 ! 8259-2 is slave
out #0xA1,al
call delay
mov al,#0x01 ! 8086 mode for both
out #0x21,al
call delay
out #0xA1,al
call delay
mov al,#0xFF ! mask off all interrupts for now
out #0xA1,al
call delay
mov al,#0xFB ! mask all irq's but irq2 which
out #0x21,al ! is cascaded
! well, that certainly wasn't fun :-(. Hopefully it works, and we don't
! need no steenking BIOS anyway (except for the initial loading :-).
! The BIOS-routine wants lots of unnecessary data, and it's less
! "interesting" anyway. This is how REAL programmers do it.
!
! Well, now's the time to actually move into protected mode. To make
! things as simple as possible, we do no register set-up or anything,
! we let the gnu-compiled 32-bit programs do that. We just jump to
! absolute address 0x00000, in 32-bit protected mode.
!
! Note that the short jump isn't strictly needed, althought there are
! reasons why it might be a good idea. It won't hurt in any case.
!
mov ax,#0x0001 ! protected mode (PE) bit
lmsw ax ! This is it!
jmp flush_instr
flush_instr:
jmpi 0x1000,KERNEL_CS ! jmp offset 1000 of segment 0x10 (cs)
! This routine checks that the keyboard command queue is empty
! (after emptying the output buffers)
!
! No timeout is used - if this hangs there is something wrong with
! the machine, and we probably couldn't proceed anyway.
empty_8042:
call delay
in al,#0x64 ! 8042 status port
test al,#1 ! output buffer?
jz no_output
call delay
in al,#0x60 ! read it
jmp empty_8042
no_output:
test al,#2 ! is input buffer full?
jnz empty_8042 ! yes - loop
ret
!
! Read a key and return the (US-)ascii code in al, scan code in ah
!
getkey:
xor ah,ah
int 0x16
ret
!
! Read a key with a timeout of 30 seconds. The cmos clock is used to get
! the time.
!
getkt:
call gettime
add al,#30 ! wait 30 seconds
cmp al,#60
jl lminute
sub al,#60
lminute:
mov cl,al
again: mov ah,#0x01
int 0x16
jnz getkey ! key pressed, so get it
call gettime
cmp al,cl
jne again
mov al,#0x20 ! timeout, return default char `space'
ret
!
! Flush the keyboard buffer
!
flush: mov ah,#0x01
int 0x16
jz empty
xor ah,ah
int 0x16
jmp flush
empty: ret
!
! Read the cmos clock. Return the seconds in al
!
gettime:
push cx
mov ah,#0x02
int 0x1a
mov al,dh ! dh contains the seconds
and al,#0x0f
mov ah,dh
mov cl,#0x04
shr ah,cl
aad
pop cx
ret
!
! Delay is needed after doing i/o
!
delay:
.word 0x00eb ! jmp $+2
ret
! Routine trying to recognize type of SVGA-board present (if any)
! and if it recognize one gives the choices of resolution it offers.
! If one is found the resolution chosen is given by al,ah (rows,cols).
chsvga: cld
push ds
push cs
mov ax,[0x01fa]
pop ds
mov modesave,ax
mov ax,#0xc000
mov es,ax
mov ax,modesave
cmp ax,#NORMAL_VGA
je defvga
cmp ax,#EXTENDED_VGA
je vga50
cmp ax,#ASK_VGA
jne svga
lea si,msg1
call prtstr
call flush
nokey: call getkt
cmp al,#0x0d ! enter ?
je svga ! yes - svga selection
cmp al,#0x20 ! space ?
je defvga ! no - repeat
call beep
jmp nokey
defvga: mov ax,#0x5019
pop ds
ret
/* extended vga mode: 80x50 */
vga50:
mov ax,#0x1112
xor bl,bl
int 0x10 ! use 8x8 font set (50 lines on VGA)
mov ax,#0x1200
mov bl,#0x20
int 0x10 ! use alternate print screen
mov ax,#0x1201
mov bl,#0x34
int 0x10 ! turn off cursor emulation
mov ah,#0x01
mov cx,#0x0607
int 0x10 ! turn on cursor (scan lines 6 to 7)
pop ds
mov ax,#0x5032 ! return 80x50
ret
/* extended vga mode: 80x28 */
vga28:
pop ax ! clean the stack
mov ax,#0x1111
xor bl,bl
int 0x10 ! use 9x14 fontset (28 lines on VGA)
mov ah, #0x01
mov cx,#0x0b0c
int 0x10 ! turn on cursor (scan lines 11 to 12)
pop ds
mov ax,#0x501c ! return 80x28
ret
/* svga modes */
svga: cld
lea si,id9GXE ! Check for the #9GXE (jyanowit@orixa.mtholyoke.edu,thanks dlm40629@uxa.cso.uiuc.edu)
mov di,#0x49 ! id string is at c000:049
mov cx,#0x11 ! length of "Graphics Power By"
repe
cmpsb
jne of1280
is9GXE: lea si,dsc9GXE ! table of descriptions of video modes for BIOS
lea di,mo9GXE ! table of sizes of video modes for my BIOS
br selmod ! go ask for video mode
of1280: cld
lea si,idf1280 ! Check for Orchid F1280 (dingbat@diku.dk)
mov di,#0x10a ! id string is at c000:010a
mov cx,#0x21 ! length
repe
cmpsb
jne nf1280
isVRAM: lea si,dscf1280
lea di,mof1280
br selmod
nf1280: lea si,idVRAM
mov di,#0x10a
mov cx,#0x0c
repe
cmpsb
je isVRAM
cld
lea si,idati ! Check ATI 'clues'
mov di,#0x31
mov cx,#0x09
repe
cmpsb
jne noati
lea si,dscati
lea di,moati
br selmod
noati: mov ax,#0x200f ! Check Ahead 'clues'
mov dx,#0x3ce
out dx,ax
inc dx
in al,dx
cmp al,#0x20
je isahed
cmp al,#0x21
jne noahed
isahed: lea si,dscahead
lea di,moahead
br selmod
noahed: mov dx,#0x3c3 ! Check Chips & Tech. 'clues'
in al,dx
or al,#0x10
out dx,al
mov dx,#0x104
in al,dx
mov bl,al
mov dx,#0x3c3
in al,dx
and al,#0xef
out dx,al
cmp bl,[idcandt]
jne nocant
lea si,dsccandt
lea di,mocandt
br selmod
nocant: mov dx,#0x3d4 ! Check Cirrus 'clues'
mov al,#0x0c
out dx,al
inc dx
in al,dx
mov bl,al
xor al,al
out dx,al
dec dx
mov al,#0x1f
out dx,al
inc dx
in al,dx
mov bh,al
xor ah,ah
shl al,#4
mov cx,ax
mov al,bh
shr al,#4
add cx,ax
shl cx,#8
add cx,#6
mov ax,cx
mov dx,#0x3c4
out dx,ax
inc dx
in al,dx
and al,al
jnz nocirr
mov al,bh
out dx,al
in al,dx
cmp al,#0x01
jne nocirr
call rst3d4
lea si,dsccirrus
lea di,mocirrus
br selmod
rst3d4: mov dx,#0x3d4
mov al,bl
xor ah,ah
shl ax,#8
add ax,#0x0c
out dx,ax
ret
nocirr: call rst3d4 ! Check Everex 'clues'
mov ax,#0x7000
xor bx,bx
int 0x10
cmp al,#0x70
jne noevrx
shr dx,#4
cmp dx,#0x678
je istrid
cmp dx,#0x236
je istrid
lea si,dsceverex
lea di,moeverex
br selmod
istrid: lea cx,ev2tri
jmp cx
noevrx: lea si,idgenoa ! Check Genoa 'clues'
xor ax,ax
seg es
mov al,[0x37]
mov di,ax
mov cx,#0x04
dec si
dec di
l1: inc si
inc di
mov al,(si)
test al,al
jz l2
seg es
cmp al,(di)
l2: loope l1
cmp cx,#0x00
jne nogen
lea si,dscgenoa
lea di,mogenoa
br selmod
nogen: cld
lea si,idoakvga
mov di,#0x08
mov cx,#0x08
repe
cmpsb
jne nooak
lea si,dscoakvga
lea di,mooakvga
br selmod
nooak: cld
lea si,idparadise ! Check Paradise 'clues'
mov di,#0x7d
mov cx,#0x04
repe
cmpsb
jne nopara
lea si,dscparadise
lea di,moparadise
br selmod
nopara: mov dx,#0x3c4 ! Check Trident 'clues'
mov al,#0x0e
out dx,al
inc dx
in al,dx
xchg ah,al
xor al,al
out dx,al
in al,dx
xchg al,ah
mov bl,al ! Strange thing ... in the book this wasn't
and bl,#0x02 ! necessary but it worked on my card which
jz setb2 ! is a trident. Without it the screen goes
and al,#0xfd ! blurred ...
jmp clrb2 !
setb2: or al,#0x02 !
clrb2: out dx,al
and ah,#0x0f
cmp ah,#0x02
jne notrid
ev2tri: lea si,dsctrident
lea di,motrident
jmp selmod
notrid: mov dx,#0x3cd ! Check Tseng 'clues'
in al,dx ! Could things be this simple ! :-)
mov bl,al
mov al,#0x55
out dx,al
in al,dx
mov ah,al
mov al,bl
out dx,al
cmp ah,#0x55
jne notsen
lea si,dsctseng
lea di,motseng
jmp selmod
notsen: mov dx,#0x3cc ! Check Video7 'clues'
in al,dx
mov dx,#0x3b4
and al,#0x01
jz even7
mov dx,#0x3d4
even7: mov al,#0x0c
out dx,al
inc dx
in al,dx
mov bl,al
mov al,#0x55
out dx,al
in al,dx
dec dx
mov al,#0x1f
out dx,al
inc dx
in al,dx
mov bh,al
dec dx
mov al,#0x0c
out dx,al
inc dx
mov al,bl
out dx,al
mov al,#0x55
xor al,#0xea
cmp al,bh
jne novid7
lea si,dscvideo7
lea di,movideo7
jmp selmod
novid7: lea si,dsunknown
lea di,mounknown
selmod: xor cx,cx
mov cl,(di)
mov ax,modesave
cmp ax,#ASK_VGA
je askmod
cmp ax,#NORMAL_VGA
je askmod
cmp al,cl
jl gotmode
push si
lea si,msg4
call prtstr
pop si
askmod: push si
lea si,msg2
call prtstr
pop si
push si
push cx
tbl: pop bx
push bx
mov al,bl
sub al,cl
call modepr
lodsw
xchg al,ah
call dprnt
xchg ah,al
push ax
mov al,#0x78
call prnt1
pop ax
call dprnt
push si
lea si,crlf ! print CR+LF
call prtstr
pop si
loop tbl
pop cx
lea si,msg3
call prtstr
pop si
add cl,#0x30
jmp nonum
nonumb: call beep
nonum: call getkey
cmp al,#0x30 ! ascii `0'
jb nonumb
cmp al,#0x3a ! ascii `9'
jbe number
cmp al,#0x61 ! ascii `a'
jb nonumb
cmp al,#0x7a ! ascii `z'
ja nonumb
sub al,#0x27
cmp al,cl
jae nonumb
sub al,#0x30
jmp gotmode
number: cmp al,cl
jae nonumb
sub al,#0x30
gotmode: xor ah,ah
or al,al
beq vga50
push ax
dec ax
beq vga28
add di,ax
mov al,(di)
int 0x10
pop ax
shl ax,#1
add si,ax
lodsw
pop ds
ret
! Routine to print asciiz-string at DS:SI
prtstr: lodsb
and al,al
jz fin
call prnt1
jmp prtstr
fin: ret
! Routine to print a decimal value on screen, the value to be
! printed is put in al (i.e 0-255).
dprnt: push ax
push cx
xor ah,ah ! Clear ah
mov cl,#0x0a
idiv cl
cmp al,#0x09
jbe lt100
call dprnt
jmp skip10
lt100: add al,#0x30
call prnt1
skip10: mov al,ah
add al,#0x30
call prnt1
pop cx
pop ax
ret
!
! Routine to print the mode number key on screen. Mode numbers
! 0-9 print the ascii values `0' to '9', 10-35 are represented by
! the letters `a' to `z'. This routine prints some spaces around the
! mode no.
!
modepr: push ax
cmp al,#0x0a
jb digit ! Here is no check for number > 35
add al,#0x27
digit: add al,#0x30
mov modenr, al
push si
lea si, modestring
call prtstr
pop si
pop ax
ret
! Part of above routine, this one just prints ascii al
prnt1: push ax
push cx
xor bh,bh
mov cx,#0x01
mov ah,#0x0e
int 0x10
pop cx
pop ax
ret
beep: mov al,#0x07
jmp prnt1
gdt:
.word 0,0,0,0 ! dummy
.word 0,0,0,0 ! unused
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9A00 ! code read/exec
.word 0x00C0 ! granularity=4096, 386
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9200 ! data read/write
.word 0x00C0 ! granularity=4096, 386
idt_48:
.word 0 ! idt limit=0
.word 0,0 ! idt base=0L
gdt_48:
.word 0x800 ! gdt limit=2048, 256 GDT entries
.word 512+gdt,0x9 ! gdt base = 0X9xxxx
msg1: .ascii "Press <RETURN> to see SVGA-modes available, <SPACE> to continue or wait 30 secs."
db 0x0d, 0x0a, 0x0a, 0x00
msg2: .ascii "Mode: COLSxROWS:"
db 0x0d, 0x0a, 0x0a, 0x00
msg3: db 0x0d, 0x0a
.ascii "Choose mode by pressing the corresponding number or letter."
crlf: db 0x0d, 0x0a, 0x00
msg4: .ascii "You passed an undefined mode number to setup. Please choose a new mode."
db 0x0d, 0x0a, 0x0a, 0x07, 0x00
modestring: .ascii " "
modenr: db 0x00 ! mode number
.ascii ": "
db 0x00
idati: .ascii "761295520"
idcandt: .byte 0xa5
idgenoa: .byte 0x77, 0x00, 0x99, 0x66
idparadise: .ascii "VGA="
idoakvga: .ascii "OAK VGA "
idf1280: .ascii "Orchid Technology Fahrenheit 1280"
id9GXE: .ascii "Graphics Power By"
idVRAM: .ascii "Stealth VRAM"
! Manufacturer: Numofmodes+2: Mode:
! Number of modes is the number of chip-specific svga modes plus the extended
! modes available on any vga (currently 2)
moati: .byte 0x04, 0x23, 0x33
moahead: .byte 0x07, 0x22, 0x23, 0x24, 0x2f, 0x34
mocandt: .byte 0x04, 0x60, 0x61
mocirrus: .byte 0x06, 0x1f, 0x20, 0x22, 0x31
moeverex: .byte 0x0c, 0x03, 0x04, 0x07, 0x08, 0x0a, 0x0b, 0x16, 0x18, 0x21, 0x40
mogenoa: .byte 0x0c, 0x58, 0x5a, 0x60, 0x61, 0x62, 0x63, 0x64, 0x72, 0x74, 0x78
moparadise: .byte 0x04, 0x55, 0x54
motrident: .byte 0x09, 0x50, 0x51, 0x52, 0x57, 0x58, 0x59, 0x5a
motseng: .byte 0x07, 0x26, 0x2a, 0x23, 0x24, 0x22
movideo7: .byte 0x08, 0x40, 0x43, 0x44, 0x41, 0x42, 0x45
mooakvga: .byte 0x08, 0x00, 0x07, 0x4e, 0x4f, 0x50, 0x51
mo9GXE: .byte 0x04, 0x54, 0x55
mof1280: .byte 0x04, 0x54, 0x55
mounknown: .byte 0x02
! msb = Cols lsb = Rows:
! The first two modes are standard vga modes available on any vga.
! mode 0 is 80x50 and mode 1 is 80x28
dscati: .word 0x5032, 0x501c, 0x8419, 0x842c
dscahead: .word 0x5032, 0x501c, 0x842c, 0x8419, 0x841c, 0xa032, 0x5042
dsccandt: .word 0x5032, 0x501c, 0x8419, 0x8432
dsccirrus: .word 0x5032, 0x501c, 0x8419, 0x842c, 0x841e, 0x6425
dsceverex: .word 0x5032, 0x501c, 0x5022, 0x503c, 0x642b, 0x644b, 0x8419, 0x842c, 0x501e, 0x641b, 0xa040, 0x841e
dscgenoa: .word 0x5032, 0x501c, 0x5020, 0x642a, 0x8419, 0x841d, 0x8420, 0x842c, 0x843c, 0x503c, 0x5042, 0x644b
dscparadise: .word 0x5032, 0x501c, 0x8419, 0x842b
dsctrident: .word 0x5032, 0x501c, 0x501e, 0x502b, 0x503c, 0x8419, 0x841e, 0x842b, 0x843c
dsctseng: .word 0x5032, 0x501c, 0x503c, 0x6428, 0x8419, 0x841c, 0x842c
dscvideo7: .word 0x5032, 0x501c, 0x502b, 0x503c, 0x643c, 0x8419, 0x842c, 0x841c
dscoakvga: .word 0x5032, 0x501c, 0x2819, 0x5019, 0x503c, 0x843c, 0x8419, 0x842b
dscf1280: .word 0x5032, 0x501c, 0x842b, 0x8419
dsc9GXE: .word 0x5032, 0x501c, 0x842b, 0x8419
dsunknown: .word 0x5032, 0x501c
modesave: .word SVGA_MODE
.text
endtext:
.data
enddata:
.bss
endbss:
|
wanggx/Linux1.0 | 1,273 | Linux1.0/zBoot/head.S | /*
* linux/boot/head.S
*
* Copyright (C) 1991, 1992, 1993 Linus Torvalds
*/
/*
* head.S contains the 32-bit startup code.
*
* NOTE!!! Startup happens at absolute address 0x00001000, which is also where
* the page directory will exist. The startup code will be overwritten by
* the page directory.
*
* Page 0 is deliberately kept safe, since System Management Mode code in
* laptops may need to access the BIOS data stored there. This is also
* useful for future device drivers that either access the BIOS via VM86
* mode.
*/
.text
#include <linux/segment.h>
startup_32:
cld
cli
movl $(KERNEL_DS),%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
lss _stack_start,%esp
xorl %eax,%eax
1: incl %eax # check that A20 really IS enabled
movl %eax,0x000000 # loop forever if it isn't
cmpl %eax,0x100000
je 1b
/*
* Initialize eflags. Some BIOS's leave bits like NT set. This would
* confuse the debugger if this code is traced.
* XXX - best to initialize before switching to protected mode.
*/
pushl $0
popfl
/*
* Clear BSS
*/
xorl %eax,%eax
movl $__edata,%edi
movl $__end,%ecx
subl %edi,%ecx
cld
rep
stosb
/*
* Do the decompression, and jump to the new kernel..
*/
call _decompress_kernel
ljmp $(KERNEL_CS), $0x100000
|
wanggx/Linux1.0 | 7,455 | Linux1.0/kernel/sys_call.S | /*
* linux/kernel/sys_call.S
*
* Copyright (C) 1991, 1992 Linus Torvalds
*/
/*
* sys_call.S contains the system-call and fault low-level handling routines.
* This also contains the timer-interrupt handler, as well as all interrupts
* and faults that can result in a task-switch.
*
* NOTE: This code handles signal-recognition, which happens every time
* after a timer-interrupt and after each system call.
*
* I changed all the .align's to 4 (16 byte alignment), as that's faster
* on a 486.
*
* Stack layout in 'ret_from_system_call':
* ptrace needs to have all regs on the stack.
* if the order here is changed, it needs to be
* updated in fork.c:copy_process, signal.c:do_signal,
* ptrace.c and ptrace.h
*
* 0(%esp) - %ebx
* 4(%esp) - %ecx
* 8(%esp) - %edx
* C(%esp) - %esi
* 10(%esp) - %edi
* 14(%esp) - %ebp
* 18(%esp) - %eax
* 1C(%esp) - %ds
* 20(%esp) - %es
* 24(%esp) - %fs
* 28(%esp) - %gs
* 2C(%esp) - orig_eax
* 30(%esp) - %eip
* 34(%esp) - %cs
* 38(%esp) - %eflags
* 3C(%esp) - %oldesp
* 40(%esp) - %oldss
*/
#include <linux/segment.h>
EBX = 0x00
ECX = 0x04
EDX = 0x08
ESI = 0x0C
EDI = 0x10
EBP = 0x14
EAX = 0x18
DS = 0x1C
ES = 0x20
FS = 0x24
GS = 0x28
ORIG_EAX = 0x2C
EIP = 0x30
CS = 0x34
EFLAGS = 0x38
OLDESP = 0x3C
OLDSS = 0x40
CF_MASK = 0x00000001
IF_MASK = 0x00000200
NT_MASK = 0x00004000
VM_MASK = 0x00020000
/*
* these are offsets into the task-struct.
*/
state = 0
counter = 4
priority = 8
signal = 12
blocked = 16
flags = 20
errno = 24
dbgreg6 = 52
dbgreg7 = 56
ENOSYS = 38
.globl _system_call,_lcall7
.globl _device_not_available, _coprocessor_error
.globl _divide_error,_debug,_nmi,_int3,_overflow,_bounds,_invalid_op
.globl _double_fault,_coprocessor_segment_overrun
.globl _invalid_TSS,_segment_not_present,_stack_segment
.globl _general_protection,_reserved
.globl _alignment_check,_page_fault
.globl ret_from_sys_call
#define SAVE_ALL \
cld; \
push %gs; \
push %fs; \
push %es; \
push %ds; \
pushl %eax; \
pushl %ebp; \
pushl %edi; \
pushl %esi; \
pushl %edx; \
pushl %ecx; \
pushl %ebx; \
movl $(KERNEL_DS),%edx; \
mov %dx,%ds; \
mov %dx,%es; \
movl $(USER_DS),%edx; \
mov %dx,%fs;
#define RESTORE_ALL \
cmpw $(KERNEL_CS),CS(%esp); \
je 1f; \
movl _current,%eax; \
movl dbgreg7(%eax),%ebx; \
movl %ebx,%db7; \
1: popl %ebx; \
popl %ecx; \
popl %edx; \
popl %esi; \
popl %edi; \
popl %ebp; \
popl %eax; \
pop %ds; \
pop %es; \
pop %fs; \
pop %gs; \
addl $4,%esp; \
iret
.align 4
_lcall7:
pushfl # We get a different stack layout with call gates,
pushl %eax # which has to be cleaned up later..
SAVE_ALL
movl EIP(%esp),%eax # due to call gates, this is eflags, not eip..
movl CS(%esp),%edx # this is eip..
movl EFLAGS(%esp),%ecx # and this is cs..
movl %eax,EFLAGS(%esp) #
movl %edx,EIP(%esp) # Now we move them to their "normal" places
movl %ecx,CS(%esp) #
movl %esp,%eax
pushl %eax
call _iABI_emulate
popl %eax
jmp ret_from_sys_call
.align 4
handle_bottom_half:
pushfl
incl _intr_count
sti
call _do_bottom_half
popfl
decl _intr_count
jmp 9f
.align 4
reschedule:
pushl $ret_from_sys_call
jmp _schedule
.align 4
_system_call:
pushl %eax # save orig_eax
SAVE_ALL
movl $-ENOSYS,EAX(%esp)
cmpl _NR_syscalls,%eax
jae ret_from_sys_call
movl _current,%ebx
andl $~CF_MASK,EFLAGS(%esp) # clear carry - assume no errors
movl $0,errno(%ebx)
movl %db6,%edx
movl %edx,dbgreg6(%ebx) # save current hardware debugging status
testb $0x20,flags(%ebx) # PF_TRACESYS
jne 1f
call _sys_call_table(,%eax,4)
movl %eax,EAX(%esp) # save the return value
movl errno(%ebx),%edx
negl %edx
je ret_from_sys_call
movl %edx,EAX(%esp)
orl $(CF_MASK),EFLAGS(%esp) # set carry to indicate error
jmp ret_from_sys_call
.align 4
1: call _syscall_trace
movl ORIG_EAX(%esp),%eax
call _sys_call_table(,%eax,4)
movl %eax,EAX(%esp) # save the return value
movl _current,%eax
movl errno(%eax),%edx
negl %edx
je 1f
movl %edx,EAX(%esp)
orl $(CF_MASK),EFLAGS(%esp) # set carry to indicate error
1: call _syscall_trace
.align 4,0x90
ret_from_sys_call:
cmpl $0,_intr_count
jne 2f
movl _bh_mask,%eax
andl _bh_active,%eax
jne handle_bottom_half
9: movl EFLAGS(%esp),%eax # check VM86 flag: CS/SS are
testl $(VM_MASK),%eax # different then
jne 1f
cmpw $(KERNEL_CS),CS(%esp) # was old code segment supervisor ?
je 2f
1: sti
orl $(IF_MASK),%eax # these just try to make sure
andl $~NT_MASK,%eax # the program doesn't do anything
movl %eax,EFLAGS(%esp) # stupid
cmpl $0,_need_resched
jne reschedule
movl _current,%eax
cmpl _task,%eax # task[0] cannot have signals
je 2f
cmpl $0,state(%eax) # state
jne reschedule
cmpl $0,counter(%eax) # counter
je reschedule
movl blocked(%eax),%ecx
movl %ecx,%ebx # save blocked in %ebx for signal handling
notl %ecx
andl signal(%eax),%ecx
jne signal_return
2: RESTORE_ALL
.align 4
signal_return:
movl %esp,%ecx
pushl %ecx
testl $(VM_MASK),EFLAGS(%ecx)
jne v86_signal_return
pushl %ebx
call _do_signal
popl %ebx
popl %ebx
RESTORE_ALL
.align 4
v86_signal_return:
call _save_v86_state
movl %eax,%esp
pushl %eax
pushl %ebx
call _do_signal
popl %ebx
popl %ebx
RESTORE_ALL
.align 4
_divide_error:
pushl $0 # no error code
pushl $_do_divide_error
.align 4,0x90
error_code:
push %fs
push %es
push %ds
pushl %eax
pushl %ebp
pushl %edi
pushl %esi
pushl %edx
pushl %ecx
pushl %ebx
movl $0,%eax
movl %eax,%db7 # disable hardware debugging...
cld
movl $-1, %eax
xchgl %eax, ORIG_EAX(%esp) # orig_eax (get the error code. )
xorl %ebx,%ebx # zero ebx
mov %gs,%bx # get the lower order bits of gs
xchgl %ebx, GS(%esp) # get the address and save gs.
pushl %eax # push the error code
lea 4(%esp),%edx
pushl %edx
movl $(KERNEL_DS),%edx
mov %dx,%ds
mov %dx,%es
movl $(USER_DS),%edx
mov %dx,%fs
pushl %eax
movl _current,%eax
movl %db6,%edx
movl %edx,dbgreg6(%eax) # save current hardware debugging status
popl %eax
call *%ebx
addl $8,%esp
jmp ret_from_sys_call
.align 4
_coprocessor_error:
pushl $0
pushl $_do_coprocessor_error
jmp error_code
.align 4
_device_not_available:
pushl $-1 # mark this as an int
SAVE_ALL
pushl $ret_from_sys_call
movl %cr0,%eax
testl $0x4,%eax # EM (math emulation bit)
je _math_state_restore
pushl $0 # temporary storage for ORIG_EIP
call _math_emulate
addl $4,%esp
ret
.align 4
_debug:
pushl $0
pushl $_do_debug
jmp error_code
.align 4
_nmi:
pushl $0
pushl $_do_nmi
jmp error_code
.align 4
_int3:
pushl $0
pushl $_do_int3
jmp error_code
.align 4
_overflow:
pushl $0
pushl $_do_overflow
jmp error_code
.align 4
_bounds:
pushl $0
pushl $_do_bounds
jmp error_code
.align 4
_invalid_op:
pushl $0
pushl $_do_invalid_op
jmp error_code
.align 4
_coprocessor_segment_overrun:
pushl $0
pushl $_do_coprocessor_segment_overrun
jmp error_code
.align 4
_reserved:
pushl $0
pushl $_do_reserved
jmp error_code
.align 4
_double_fault:
pushl $_do_double_fault
jmp error_code
.align 4
_invalid_TSS:
pushl $_do_invalid_TSS
jmp error_code
.align 4
_segment_not_present:
pushl $_do_segment_not_present
jmp error_code
.align 4
_stack_segment:
pushl $_do_stack_segment
jmp error_code
.align 4
_general_protection:
pushl $_do_general_protection
jmp error_code
.align 4
_alignment_check:
pushl $_do_alignment_check
jmp error_code
.align 4
_page_fault:
pushl $_do_page_fault
jmp error_code
|
wanggx/Linux1.0 | 6,387 | Linux1.0/drivers/FPU-emu/reg_u_sub.S | .file "reg_u_sub.S"
/*---------------------------------------------------------------------------+
| reg_u_sub.S |
| |
| Core floating point subtraction routine. |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void reg_u_sub(FPU_REG *arg1, FPU_REG *arg2, FPU_REG *answ, |
| int control_w) |
| |
+---------------------------------------------------------------------------*/
/*
| Kernel subtraction routine reg_u_sub(reg *arg1, reg *arg2, reg *answ).
| Takes two valid reg f.p. numbers (TW_Valid), which are
| treated as unsigned numbers,
| and returns their difference as a TW_Valid or TW_Zero f.p.
| number.
| The first number (arg1) must be the larger.
| The returned number is normalized.
| Basic checks are performed if PARANOID is defined.
*/
#include "exception.h"
#include "fpu_asm.h"
#include "control_w.h"
.text
.align 2,144
.globl _reg_u_sub
_reg_u_sub:
pushl %ebp
movl %esp,%ebp
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi /* source 1 */
movl PARAM2,%edi /* source 2 */
#ifdef DENORM_OPERAND
cmpl EXP_UNDER,EXP(%esi)
jg xOp1_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp1_not_denorm:
cmpl EXP_UNDER,EXP(%edi)
jg xOp2_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp2_not_denorm:
#endif DENORM_OPERAND
movl EXP(%esi),%ecx
subl EXP(%edi),%ecx /* exp1 - exp2 */
#ifdef PARANOID
/* source 2 is always smaller than source 1 */
js L_bugged_1
testl $0x80000000,SIGH(%edi) /* The args are assumed to be be normalized */
je L_bugged_2
testl $0x80000000,SIGH(%esi)
je L_bugged_2
#endif PARANOID
/*--------------------------------------+
| Form a register holding the |
| smaller number |
+--------------------------------------*/
movl SIGH(%edi),%eax /* register ms word */
movl SIGL(%edi),%ebx /* register ls word */
movl PARAM3,%edi /* destination */
movl EXP(%esi),%edx
movl %edx,EXP(%edi) /* Copy exponent to destination */
/* movb SIGN(%esi),%dl
movb %dl,SIGN(%edi) */ /* Copy the sign from the first arg */
xorl %edx,%edx /* register extension */
/*--------------------------------------+
| Shift the temporary register |
| right the required number of |
| places. |
+--------------------------------------*/
L_shift_r:
cmpl $32,%ecx /* shrd only works for 0..31 bits */
jnc L_more_than_31
/* less than 32 bits */
shrd %cl,%ebx,%edx
shrd %cl,%eax,%ebx
shr %cl,%eax
jmp L_shift_done
L_more_than_31:
cmpl $64,%ecx
jnc L_more_than_63
subb $32,%cl
jz L_exactly_32
shrd %cl,%eax,%edx
shr %cl,%eax
orl %ebx,%ebx
jz L_more_31_no_low /* none of the lowest bits is set */
orl $1,%edx /* record the fact in the extension */
L_more_31_no_low:
movl %eax,%ebx
xorl %eax,%eax
jmp L_shift_done
L_exactly_32:
movl %ebx,%edx
movl %eax,%ebx
xorl %eax,%eax
jmp L_shift_done
L_more_than_63:
cmpw $65,%cx
jnc L_more_than_64
/* Shift right by 64 bits */
movl %eax,%edx
orl %ebx,%ebx
jz L_more_63_no_low
orl $1,%edx
jmp L_more_63_no_low
L_more_than_64:
jne L_more_than_65
/* Shift right by 65 bits */
/* Carry is clear if we get here */
movl %eax,%edx
rcrl %edx
jnc L_shift_65_nc
orl $1,%edx
jmp L_more_63_no_low
L_shift_65_nc:
orl %ebx,%ebx
jz L_more_63_no_low
orl $1,%edx
jmp L_more_63_no_low
L_more_than_65:
movl $1,%edx /* The shifted nr always at least one '1' */
L_more_63_no_low:
xorl %ebx,%ebx
xorl %eax,%eax
L_shift_done:
L_subtr:
/*------------------------------+
| Do the subtraction |
+------------------------------*/
xorl %ecx,%ecx
subl %edx,%ecx
movl %ecx,%edx
movl SIGL(%esi),%ecx
sbbl %ebx,%ecx
movl %ecx,%ebx
movl SIGH(%esi),%ecx
sbbl %eax,%ecx
movl %ecx,%eax
#ifdef PARANOID
/* We can never get a borrow */
jc L_bugged
#endif PARANOID
/*--------------------------------------+
| Normalize the result |
+--------------------------------------*/
testl $0x80000000,%eax
jnz L_round /* no shifting needed */
orl %eax,%eax
jnz L_shift_1 /* shift left 1 - 31 bits */
orl %ebx,%ebx
jnz L_shift_32 /* shift left 32 - 63 bits */
/*
* A rare case, the only one which is non-zero if we got here
* is: 1000000 .... 0000
* -0111111 .... 1111 1
* --------------------
* 0000000 .... 0000 1
*/
cmpl $0x80000000,%edx
jnz L_must_be_zero
/* Shift left 64 bits */
subl $64,EXP(%edi)
xchg %edx,%eax
jmp fpu_reg_round
L_must_be_zero:
#ifdef PARANOID
orl %edx,%edx
jnz L_bugged_3
#endif PARANOID
/* The result is zero */
movb TW_Zero,TAG(%edi)
movl $0,EXP(%edi) /* exponent */
movl $0,SIGL(%edi)
movl $0,SIGH(%edi)
jmp L_exit /* %eax contains zero */
L_shift_32:
movl %ebx,%eax
movl %edx,%ebx
movl $0,%edx
subl $32,EXP(%edi) /* Can get underflow here */
/* We need to shift left by 1 - 31 bits */
L_shift_1:
bsrl %eax,%ecx /* get the required shift in %ecx */
subl $31,%ecx
negl %ecx
shld %cl,%ebx,%eax
shld %cl,%edx,%ebx
shl %cl,%edx
subl %ecx,EXP(%edi) /* Can get underflow here */
L_round:
jmp fpu_reg_round /* Round the result */
#ifdef PARANOID
L_bugged_1:
pushl EX_INTERNAL|0x206
call EXCEPTION
pop %ebx
jmp L_error_exit
L_bugged_2:
pushl EX_INTERNAL|0x209
call EXCEPTION
pop %ebx
jmp L_error_exit
L_bugged_3:
pushl EX_INTERNAL|0x210
call EXCEPTION
pop %ebx
jmp L_error_exit
L_bugged_4:
pushl EX_INTERNAL|0x211
call EXCEPTION
pop %ebx
jmp L_error_exit
L_bugged:
pushl EX_INTERNAL|0x212
call EXCEPTION
pop %ebx
jmp L_error_exit
#endif PARANOID
L_error_exit:
movl $1,%eax
L_exit:
popl %ebx
popl %edi
popl %esi
leave
ret
|
wanggx/Linux1.0 | 5,464 | Linux1.0/drivers/FPU-emu/reg_div.S | .file "reg_div.S"
/*---------------------------------------------------------------------------+
| reg_div.S |
| |
| Divide one FPU_REG by another and put the result in a destination FPU_REG.|
| |
| Copyright (C) 1992,1993,1994 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void reg_div(FPU_REG *a, FPU_REG *b, FPU_REG *dest, |
| unsigned int control_word) |
| |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "fpu_asm.h"
.text
.align 2
.globl _reg_div
_reg_div:
pushl %ebp
movl %esp,%ebp
#ifdef REENTRANT_FPU
subl $28,%esp /* Needed by divide_kernel */
#endif REENTRANT_FPU
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi
movl PARAM2,%ebx
movl PARAM3,%edi
movb TAG(%esi),%al
orb TAG(%ebx),%al
jne L_div_special /* Not (both numbers TW_Valid) */
#ifdef DENORM_OPERAND
/* Check for denormals */
cmpl EXP_UNDER,EXP(%esi)
jg xL_arg1_not_denormal
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xL_arg1_not_denormal:
cmpl EXP_UNDER,EXP(%ebx)
jg xL_arg2_not_denormal
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xL_arg2_not_denormal:
#endif DENORM_OPERAND
/* Both arguments are TW_Valid */
movb TW_Valid,TAG(%edi)
movb SIGN(%esi),%cl
cmpb %cl,SIGN(%ebx)
setne (%edi) /* Set the sign, requires SIGN_NEG=1, SIGN_POS=0 */
movl EXP(%esi),%edx
movl EXP(%ebx),%eax
subl %eax,%edx
addl EXP_BIAS,%edx
movl %edx,EXP(%edi)
jmp _divide_kernel
/*-----------------------------------------------------------------------*/
L_div_special:
cmpb TW_NaN,TAG(%esi) /* A NaN with anything to give NaN */
je L_arg1_NaN
cmpb TW_NaN,TAG(%ebx) /* A NaN with anything to give NaN */
jne L_no_NaN_arg
/* Operations on NaNs */
L_arg1_NaN:
L_arg2_NaN:
pushl %edi /* Destination */
pushl %esi
pushl %ebx /* Ordering is important here */
call _real_2op_NaN
jmp LDiv_exit
/* Invalid operations */
L_zero_zero:
L_inf_inf:
pushl %edi /* Destination */
call _arith_invalid /* 0/0 or Infinity/Infinity */
jmp LDiv_exit
L_no_NaN_arg:
cmpb TW_Infinity,TAG(%esi)
jne L_arg1_not_inf
cmpb TW_Infinity,TAG(%ebx)
je L_inf_inf /* invalid operation */
cmpb TW_Valid,TAG(%ebx)
je L_inf_valid
#ifdef PARANOID
/* arg2 must be zero or valid */
cmpb TW_Zero,TAG(%ebx)
ja L_unknown_tags
#endif PARANOID
/* Note that p16-9 says that infinity/0 returns infinity */
jmp L_copy_arg1 /* Answer is Inf */
L_inf_valid:
#ifdef DENORM_OPERAND
cmpl EXP_UNDER,EXP(%ebx)
jg L_copy_arg1 /* Answer is Inf */
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
#endif DENORM_OPERAND
jmp L_copy_arg1 /* Answer is Inf */
L_arg1_not_inf:
cmpb TW_Zero,TAG(%ebx) /* Priority to div-by-zero error */
jne L_arg2_not_zero
cmpb TW_Zero,TAG(%esi)
je L_zero_zero /* invalid operation */
#ifdef PARANOID
/* arg1 must be valid */
cmpb TW_Valid,TAG(%esi)
ja L_unknown_tags
#endif PARANOID
/* Division by zero error */
pushl %edi /* destination */
movb SIGN(%esi),%al
xorb SIGN(%ebx),%al
pushl %eax /* lower 8 bits have the sign */
call _divide_by_zero
jmp LDiv_exit
L_arg2_not_zero:
cmpb TW_Infinity,TAG(%ebx)
jne L_arg2_not_inf
#ifdef DENORM_OPERAND
cmpb TW_Valid,TAG(%esi)
jne L_return_zero
cmpl EXP_UNDER,EXP(%esi)
jg L_return_zero /* Answer is zero */
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
#endif DENORM_OPERAND
jmp L_return_zero /* Answer is zero */
L_arg2_not_inf:
#ifdef PARANOID
cmpb TW_Zero,TAG(%esi)
jne L_unknown_tags
#endif PARANOID
/* arg1 is zero, arg2 is not Infinity or a NaN */
#ifdef DENORM_OPERAND
cmpl EXP_UNDER,EXP(%ebx)
jg L_copy_arg1 /* Answer is zero */
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
#endif DENORM_OPERAND
L_copy_arg1:
movb TAG(%esi),%ax
movb %ax,TAG(%edi)
movl EXP(%esi),%eax
movl %eax,EXP(%edi)
movl SIGL(%esi),%eax
movl %eax,SIGL(%edi)
movl SIGH(%esi),%eax
movl %eax,SIGH(%edi)
LDiv_set_result_sign:
movb SIGN(%esi),%cl
cmpb %cl,SIGN(%ebx)
jne LDiv_negative_result
movb SIGN_POS,SIGN(%edi)
xorl %eax,%eax /* Valid result */
jmp LDiv_exit
LDiv_negative_result:
movb SIGN_NEG,SIGN(%edi)
xorl %eax,%eax /* Valid result */
LDiv_exit:
#ifdef REENTRANT_FPU
leal -40(%ebp),%esp
#else
leal -12(%ebp),%esp
#endif REENTRANT_FPU
popl %ebx
popl %edi
popl %esi
leave
ret
L_return_zero:
xorl %eax,%eax
movl %eax,SIGH(%edi)
movl %eax,SIGL(%edi)
movl EXP_UNDER,EXP(%edi)
movb TW_Zero,TAG(%edi)
jmp LDiv_set_result_sign
#ifdef PARANOID
L_unknown_tags:
pushl EX_INTERNAL | 0x208
call EXCEPTION
/* Generate a NaN for unknown tags */
movl _CONST_QNaN,%eax
movl %eax,(%edi)
movl _CONST_QNaN+4,%eax
movl %eax,SIGL(%edi)
movl _CONST_QNaN+8,%eax
movl %eax,SIGH(%edi)
jmp LDiv_exit /* %eax is nz */
#endif PARANOID
|
wanggx/Linux1.0 | 3,232 | Linux1.0/drivers/FPU-emu/reg_norm.S | /*---------------------------------------------------------------------------+
| reg_norm.S |
| |
| Copyright (C) 1992,1993,1994 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Normalize the value in a FPU_REG. |
| |
| Call from C as: |
| void normalize(FPU_REG *n) |
| |
| void normalize_nuo(FPU_REG *n) |
| |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
.text
.align 2,144
.globl _normalize
_normalize:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl PARAM1,%ebx
#ifdef PARANOID
cmpb TW_Valid,TAG(%ebx)
je L_ok
pushl $0x220
call _exception
addl $4,%esp
L_ok:
#endif PARANOID
movl SIGH(%ebx),%edx
movl SIGL(%ebx),%eax
orl %edx,%edx /* ms bits */
js L_done /* Already normalized */
jnz L_shift_1 /* Shift left 1 - 31 bits */
orl %eax,%eax
jz L_zero /* The contents are zero */
movl %eax,%edx
xorl %eax,%eax
subl $32,EXP(%ebx) /* This can cause an underflow */
/* We need to shift left by 1 - 31 bits */
L_shift_1:
bsrl %edx,%ecx /* get the required shift in %ecx */
subl $31,%ecx
negl %ecx
shld %cl,%eax,%edx
shl %cl,%eax
subl %ecx,EXP(%ebx) /* This can cause an underflow */
movl %edx,SIGH(%ebx)
movl %eax,SIGL(%ebx)
L_done:
cmpl EXP_OVER,EXP(%ebx)
jge L_overflow
cmpl EXP_UNDER,EXP(%ebx)
jle L_underflow
L_exit:
popl %ebx
leave
ret
L_zero:
movl EXP_UNDER,EXP(%ebx)
movb TW_Zero,TAG(%ebx)
jmp L_exit
L_underflow:
push %ebx
call _arith_underflow
pop %ebx
jmp L_exit
L_overflow:
push %ebx
call _arith_overflow
pop %ebx
jmp L_exit
/* Normalise without reporting underflow or overflow */
.align 2,144
.globl _normalize_nuo
_normalize_nuo:
pushl %ebp
movl %esp,%ebp
pushl %ebx
movl PARAM1,%ebx
#ifdef PARANOID
cmpb TW_Valid,TAG(%ebx)
je L_ok_nuo
pushl $0x221
call _exception
addl $4,%esp
L_ok_nuo:
#endif PARANOID
movl SIGH(%ebx),%edx
movl SIGL(%ebx),%eax
orl %edx,%edx /* ms bits */
js L_exit /* Already normalized */
jnz L_nuo_shift_1 /* Shift left 1 - 31 bits */
orl %eax,%eax
jz L_zero /* The contents are zero */
movl %eax,%edx
xorl %eax,%eax
subl $32,EXP(%ebx) /* This can cause an underflow */
/* We need to shift left by 1 - 31 bits */
L_nuo_shift_1:
bsrl %edx,%ecx /* get the required shift in %ecx */
subl $31,%ecx
negl %ecx
shld %cl,%eax,%edx
shl %cl,%eax
subl %ecx,EXP(%ebx) /* This can cause an underflow */
movl %edx,SIGH(%ebx)
movl %eax,SIGL(%ebx)
jmp L_exit
|
wanggx/Linux1.0 | 10,954 | Linux1.0/drivers/FPU-emu/wm_sqrt.S | .file "wm_sqrt.S"
/*---------------------------------------------------------------------------+
| wm_sqrt.S |
| |
| Fixed point arithmetic square root evaluation. |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void wm_sqrt(FPU_REG *n, unsigned int control_word) |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| wm_sqrt(FPU_REG *n, unsigned int control_word) |
| returns the square root of n in n. |
| |
| Use Newton's method to compute the square root of a number, which must |
| be in the range [1.0 .. 4.0), to 64 bits accuracy. |
| Does not check the sign or tag of the argument. |
| Sets the exponent, but not the sign or tag of the result. |
| |
| The guess is kept in %esi:%edi |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "fpu_asm.h"
#ifdef REENTRANT_FPU
/* Local storage on the stack: */
#define FPU_accum_3 -4(%ebp) /* ms word */
#define FPU_accum_2 -8(%ebp)
#define FPU_accum_1 -12(%ebp)
#define FPU_accum_0 -16(%ebp)
/*
* The de-normalised argument:
* sq_2 sq_1 sq_0
* b b b b b b b ... b b b b b b .... b b b b 0 0 0 ... 0
* ^ binary point here
*/
#define FPU_fsqrt_arg_2 -20(%ebp) /* ms word */
#define FPU_fsqrt_arg_1 -24(%ebp)
#define FPU_fsqrt_arg_0 -28(%ebp) /* ls word, at most the ms bit is set */
#else
/* Local storage in a static area: */
.data
.align 4,0
FPU_accum_3:
.long 0 /* ms word */
FPU_accum_2:
.long 0
FPU_accum_1:
.long 0
FPU_accum_0:
.long 0
/* The de-normalised argument:
sq_2 sq_1 sq_0
b b b b b b b ... b b b b b b .... b b b b 0 0 0 ... 0
^ binary point here
*/
FPU_fsqrt_arg_2:
.long 0 /* ms word */
FPU_fsqrt_arg_1:
.long 0
FPU_fsqrt_arg_0:
.long 0 /* ls word, at most the ms bit is set */
#endif REENTRANT_FPU
.text
.align 2,144
.globl _wm_sqrt
_wm_sqrt:
pushl %ebp
movl %esp,%ebp
#ifdef REENTRANT_FPU
subl $28,%esp
#endif REENTRANT_FPU
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi
movl SIGH(%esi),%eax
movl SIGL(%esi),%ecx
xorl %edx,%edx
/* We use a rough linear estimate for the first guess.. */
cmpl EXP_BIAS,EXP(%esi)
jnz sqrt_arg_ge_2
shrl $1,%eax /* arg is in the range [1.0 .. 2.0) */
rcrl $1,%ecx
rcrl $1,%edx
sqrt_arg_ge_2:
/* From here on, n is never accessed directly again until it is
replaced by the answer. */
movl %eax,FPU_fsqrt_arg_2 /* ms word of n */
movl %ecx,FPU_fsqrt_arg_1
movl %edx,FPU_fsqrt_arg_0
/* Make a linear first estimate */
shrl $1,%eax
addl $0x40000000,%eax
movl $0xaaaaaaaa,%ecx
mull %ecx
shll %edx /* max result was 7fff... */
testl $0x80000000,%edx /* but min was 3fff... */
jnz sqrt_prelim_no_adjust
movl $0x80000000,%edx /* round up */
sqrt_prelim_no_adjust:
movl %edx,%esi /* Our first guess */
/* We have now computed (approx) (2 + x) / 3, which forms the basis
for a few iterations of Newton's method */
movl FPU_fsqrt_arg_2,%ecx /* ms word */
/*
* From our initial estimate, three iterations are enough to get us
* to 30 bits or so. This will then allow two iterations at better
* precision to complete the process.
*/
/* Compute (g + n/g)/2 at each iteration (g is the guess). */
shrl %ecx /* Doing this first will prevent a divide */
/* overflow later. */
movl %ecx,%edx /* msw of the arg / 2 */
divl %esi /* current estimate */
shrl %esi /* divide by 2 */
addl %eax,%esi /* the new estimate */
movl %ecx,%edx
divl %esi
shrl %esi
addl %eax,%esi
movl %ecx,%edx
divl %esi
shrl %esi
addl %eax,%esi
/*
* Now that an estimate accurate to about 30 bits has been obtained (in %esi),
* we improve it to 60 bits or so.
*
* The strategy from now on is to compute new estimates from
* guess := guess + (n - guess^2) / (2 * guess)
*/
/* First, find the square of the guess */
movl %esi,%eax
mull %esi
/* guess^2 now in %edx:%eax */
movl FPU_fsqrt_arg_1,%ecx
subl %ecx,%eax
movl FPU_fsqrt_arg_2,%ecx /* ms word of normalized n */
sbbl %ecx,%edx
jnc sqrt_stage_2_positive
/* Subtraction gives a negative result,
negate the result before division. */
notl %edx
notl %eax
addl $1,%eax
adcl $0,%edx
divl %esi
movl %eax,%ecx
movl %edx,%eax
divl %esi
jmp sqrt_stage_2_finish
sqrt_stage_2_positive:
divl %esi
movl %eax,%ecx
movl %edx,%eax
divl %esi
notl %ecx
notl %eax
addl $1,%eax
adcl $0,%ecx
sqrt_stage_2_finish:
sarl $1,%ecx /* divide by 2 */
rcrl $1,%eax
/* Form the new estimate in %esi:%edi */
movl %eax,%edi
addl %ecx,%esi
jnz sqrt_stage_2_done /* result should be [1..2) */
#ifdef PARANOID
/* It should be possible to get here only if the arg is ffff....ffff */
cmp $0xffffffff,FPU_fsqrt_arg_1
jnz sqrt_stage_2_error
#endif PARANOID
/* The best rounded result. */
xorl %eax,%eax
decl %eax
movl %eax,%edi
movl %eax,%esi
movl $0x7fffffff,%eax
jmp sqrt_round_result
#ifdef PARANOID
sqrt_stage_2_error:
pushl EX_INTERNAL|0x213
call EXCEPTION
#endif PARANOID
sqrt_stage_2_done:
/* Now the square root has been computed to better than 60 bits. */
/* Find the square of the guess. */
movl %edi,%eax /* ls word of guess */
mull %edi
movl %edx,FPU_accum_1
movl %esi,%eax
mull %esi
movl %edx,FPU_accum_3
movl %eax,FPU_accum_2
movl %edi,%eax
mull %esi
addl %eax,FPU_accum_1
adcl %edx,FPU_accum_2
adcl $0,FPU_accum_3
/* movl %esi,%eax */
/* mull %edi */
addl %eax,FPU_accum_1
adcl %edx,FPU_accum_2
adcl $0,FPU_accum_3
/* guess^2 now in FPU_accum_3:FPU_accum_2:FPU_accum_1 */
movl FPU_fsqrt_arg_0,%eax /* get normalized n */
subl %eax,FPU_accum_1
movl FPU_fsqrt_arg_1,%eax
sbbl %eax,FPU_accum_2
movl FPU_fsqrt_arg_2,%eax /* ms word of normalized n */
sbbl %eax,FPU_accum_3
jnc sqrt_stage_3_positive
/* Subtraction gives a negative result,
negate the result before division */
notl FPU_accum_1
notl FPU_accum_2
notl FPU_accum_3
addl $1,FPU_accum_1
adcl $0,FPU_accum_2
#ifdef PARANOID
adcl $0,FPU_accum_3 /* This must be zero */
jz sqrt_stage_3_no_error
sqrt_stage_3_error:
pushl EX_INTERNAL|0x207
call EXCEPTION
sqrt_stage_3_no_error:
#endif PARANOID
movl FPU_accum_2,%edx
movl FPU_accum_1,%eax
divl %esi
movl %eax,%ecx
movl %edx,%eax
divl %esi
sarl $1,%ecx /* divide by 2 */
rcrl $1,%eax
/* prepare to round the result */
addl %ecx,%edi
adcl $0,%esi
jmp sqrt_stage_3_finished
sqrt_stage_3_positive:
movl FPU_accum_2,%edx
movl FPU_accum_1,%eax
divl %esi
movl %eax,%ecx
movl %edx,%eax
divl %esi
sarl $1,%ecx /* divide by 2 */
rcrl $1,%eax
/* prepare to round the result */
notl %eax /* Negate the correction term */
notl %ecx
addl $1,%eax
adcl $0,%ecx /* carry here ==> correction == 0 */
adcl $0xffffffff,%esi
addl %ecx,%edi
adcl $0,%esi
sqrt_stage_3_finished:
/*
* The result in %esi:%edi:%esi should be good to about 90 bits here,
* and the rounding information here does not have sufficient accuracy
* in a few rare cases.
*/
cmpl $0xffffffe0,%eax
ja sqrt_near_exact_x
cmpl $0x00000020,%eax
jb sqrt_near_exact
cmpl $0x7fffffe0,%eax
jb sqrt_round_result
cmpl $0x80000020,%eax
jb sqrt_get_more_precision
sqrt_round_result:
/* Set up for rounding operations */
movl %eax,%edx
movl %esi,%eax
movl %edi,%ebx
movl PARAM1,%edi
movl EXP_BIAS,EXP(%edi) /* Result is in [1.0 .. 2.0) */
movl PARAM2,%ecx
jmp fpu_reg_round_sqrt
sqrt_near_exact_x:
/* First, the estimate must be rounded up. */
addl $1,%edi
adcl $0,%esi
sqrt_near_exact:
/*
* This is an easy case because x^1/2 is monotonic.
* We need just find the square of our estimate, compare it
* with the argument, and deduce whether our estimate is
* above, below, or exact. We use the fact that the estimate
* is known to be accurate to about 90 bits.
*/
movl %edi,%eax /* ls word of guess */
mull %edi
movl %edx,%ebx /* 2nd ls word of square */
movl %eax,%ecx /* ls word of square */
movl %edi,%eax
mull %esi
addl %eax,%ebx
addl %eax,%ebx
#ifdef PARANOID
cmp $0xffffffb0,%ebx
jb sqrt_near_exact_ok
cmp $0x00000050,%ebx
ja sqrt_near_exact_ok
pushl EX_INTERNAL|0x214
call EXCEPTION
sqrt_near_exact_ok:
#endif PARANOID
or %ebx,%ebx
js sqrt_near_exact_small
jnz sqrt_near_exact_large
or %ebx,%edx
jnz sqrt_near_exact_large
/* Our estimate is exactly the right answer */
xorl %eax,%eax
jmp sqrt_round_result
sqrt_near_exact_small:
/* Our estimate is too small */
movl $0x000000ff,%eax
jmp sqrt_round_result
sqrt_near_exact_large:
/* Our estimate is too large, we need to decrement it */
subl $1,%edi
sbbl $0,%esi
movl $0xffffff00,%eax
jmp sqrt_round_result
sqrt_get_more_precision:
/* This case is almost the same as the above, except we start
with an extra bit of precision in the estimate. */
stc /* The extra bit. */
rcll $1,%edi /* Shift the estimate left one bit */
rcll $1,%esi
movl %edi,%eax /* ls word of guess */
mull %edi
movl %edx,%ebx /* 2nd ls word of square */
movl %eax,%ecx /* ls word of square */
movl %edi,%eax
mull %esi
addl %eax,%ebx
addl %eax,%ebx
/* Put our estimate back to its original value */
stc /* The ms bit. */
rcrl $1,%esi /* Shift the estimate left one bit */
rcrl $1,%edi
#ifdef PARANOID
cmp $0xffffff60,%ebx
jb sqrt_more_prec_ok
cmp $0x000000a0,%ebx
ja sqrt_more_prec_ok
pushl EX_INTERNAL|0x215
call EXCEPTION
sqrt_more_prec_ok:
#endif PARANOID
or %ebx,%ebx
js sqrt_more_prec_small
jnz sqrt_more_prec_large
or %ebx,%ecx
jnz sqrt_more_prec_large
/* Our estimate is exactly the right answer */
movl $0x80000000,%eax
jmp sqrt_round_result
sqrt_more_prec_small:
/* Our estimate is too small */
movl $0x800000ff,%eax
jmp sqrt_round_result
sqrt_more_prec_large:
/* Our estimate is too large */
movl $0x7fffff00,%eax
jmp sqrt_round_result
|
wanggx/Linux1.0 | 3,764 | Linux1.0/drivers/FPU-emu/reg_u_mul.S | .file "reg_u_mul.S"
/*---------------------------------------------------------------------------+
| reg_u_mul.S |
| |
| Core multiplication routine |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| Basic multiplication routine. |
| Does not check the resulting exponent for overflow/underflow |
| |
| reg_u_mul(FPU_REG *a, FPU_REG *b, FPU_REG *c, unsigned int cw); |
| |
| Internal working is at approx 128 bits. |
| Result is rounded to nearest 53 or 64 bits, using "nearest or even". |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "fpu_asm.h"
#include "control_w.h"
#ifdef REENTRANT_FPU
/* Local storage on the stack: */
#define FPU_accum_0 -4(%ebp) /* ms word */
#define FPU_accum_1 -8(%ebp)
#else
/* Local storage in a static area: */
.data
.align 4,0
FPU_accum_0:
.long 0
FPU_accum_1:
.long 0
#endif REENTRANT_FPU
.text
.align 2,144
.globl _reg_u_mul
_reg_u_mul:
pushl %ebp
movl %esp,%ebp
#ifdef REENTRANT_FPU
subl $8,%esp
#endif REENTRANT_FPU
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi
movl PARAM2,%edi
#ifdef PARANOID
testl $0x80000000,SIGH(%esi)
jz L_bugged
testl $0x80000000,SIGH(%edi)
jz L_bugged
#endif PARANOID
#ifdef DENORM_OPERAND
movl EXP(%esi),%eax
cmpl EXP_UNDER,%eax
jg xOp1_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp1_not_denorm:
movl EXP(%edi),%eax
cmpl EXP_UNDER,%eax
jg xOp2_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp2_not_denorm:
#endif DENORM_OPERAND
xorl %ecx,%ecx
xorl %ebx,%ebx
movl SIGL(%esi),%eax
mull SIGL(%edi)
movl %eax,FPU_accum_0
movl %edx,FPU_accum_1
movl SIGL(%esi),%eax
mull SIGH(%edi)
addl %eax,FPU_accum_1
adcl %edx,%ebx
/* adcl $0,%ecx // overflow here is not possible */
movl SIGH(%esi),%eax
mull SIGL(%edi)
addl %eax,FPU_accum_1
adcl %edx,%ebx
adcl $0,%ecx
movl SIGH(%esi),%eax
mull SIGH(%edi)
addl %eax,%ebx
adcl %edx,%ecx
movl EXP(%esi),%eax /* Compute the exponent */
addl EXP(%edi),%eax
subl EXP_BIAS-1,%eax
/* Have now finished with the sources */
movl PARAM3,%edi /* Point to the destination */
movl %eax,EXP(%edi)
/* Now make sure that the result is normalized */
testl $0x80000000,%ecx
jnz LResult_Normalised
/* Normalize by shifting left one bit */
shll $1,FPU_accum_0
rcll $1,FPU_accum_1
rcll $1,%ebx
rcll $1,%ecx
decl EXP(%edi)
LResult_Normalised:
movl FPU_accum_0,%eax
movl FPU_accum_1,%edx
orl %eax,%eax
jz L_extent_zero
orl $1,%edx
L_extent_zero:
movl %ecx,%eax
jmp fpu_reg_round
#ifdef PARANOID
L_bugged:
pushl EX_INTERNAL|0x205
call EXCEPTION
pop %ebx
jmp L_exit
L_exit:
popl %ebx
popl %edi
popl %esi
leave
ret
#endif PARANOID
|
wanggx/Linux1.0 | 12,190 | Linux1.0/drivers/FPU-emu/reg_u_div.S | .file "reg_u_div.S"
/*---------------------------------------------------------------------------+
| reg_u_div.S |
| |
| Core division routines |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| Kernel for the division routines. |
| |
| void reg_u_div(FPU_REG *a, FPU_REG *a, |
| FPU_REG *dest, unsigned int control_word) |
| |
| Does not compute the destination exponent, but does adjust it. |
+---------------------------------------------------------------------------*/
#include "exception.h"
#include "fpu_asm.h"
#include "control_w.h"
/* #define dSIGL(x) (x) */
/* #define dSIGH(x) 4(x) */
#ifdef REENTRANT_FPU
/*
Local storage on the stack:
Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
Overflow flag: ovfl_flag
*/
#define FPU_accum_3 -4(%ebp)
#define FPU_accum_2 -8(%ebp)
#define FPU_accum_1 -12(%ebp)
#define FPU_accum_0 -16(%ebp)
#define FPU_result_1 -20(%ebp)
#define FPU_result_2 -24(%ebp)
#define FPU_ovfl_flag -28(%ebp)
#else
.data
/*
Local storage in a static area:
Result: FPU_accum_3:FPU_accum_2:FPU_accum_1:FPU_accum_0
Overflow flag: ovfl_flag
*/
.align 2,0
FPU_accum_3:
.long 0
FPU_accum_2:
.long 0
FPU_accum_1:
.long 0
FPU_accum_0:
.long 0
FPU_result_1:
.long 0
FPU_result_2:
.long 0
FPU_ovfl_flag:
.byte 0
#endif REENTRANT_FPU
.text
.align 2,144
.globl _reg_u_div
.globl _divide_kernel
_reg_u_div:
pushl %ebp
movl %esp,%ebp
#ifdef REENTRANT_FPU
subl $28,%esp
#endif REENTRANT_FPU
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi /* pointer to num */
movl PARAM2,%ebx /* pointer to denom */
movl PARAM3,%edi /* pointer to answer */
#ifdef DENORM_OPERAND
movl EXP(%esi),%eax
cmpl EXP_UNDER,%eax
jg xOp1_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp1_not_denorm:
movl EXP(%ebx),%eax
cmpl EXP_UNDER,%eax
jg xOp2_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp2_not_denorm:
#endif DENORM_OPERAND
_divide_kernel:
#ifdef PARANOID
/* testl $0x80000000, SIGH(%esi) // Dividend */
/* je L_bugged */
testl $0x80000000, SIGH(%ebx) /* Divisor */
je L_bugged
#endif PARANOID
/* Check if the divisor can be treated as having just 32 bits */
cmpl $0,SIGL(%ebx)
jnz L_Full_Division /* Can't do a quick divide */
/* We should be able to zip through the division here */
movl SIGH(%ebx),%ecx /* The divisor */
movl SIGH(%esi),%edx /* Dividend */
movl SIGL(%esi),%eax /* Dividend */
cmpl %ecx,%edx
setaeb FPU_ovfl_flag /* Keep a record */
jb L_no_adjust
subl %ecx,%edx /* Prevent the overflow */
L_no_adjust:
/* Divide the 64 bit number by the 32 bit denominator */
divl %ecx
movl %eax,FPU_result_2
/* Work on the remainder of the first division */
xorl %eax,%eax
divl %ecx
movl %eax,FPU_result_1
/* Work on the remainder of the 64 bit division */
xorl %eax,%eax
divl %ecx
testb $255,FPU_ovfl_flag /* was the num > denom ? */
je L_no_overflow
/* Do the shifting here */
/* increase the exponent */
incl EXP(%edi)
/* shift the mantissa right one bit */
stc /* To set the ms bit */
rcrl FPU_result_2
rcrl FPU_result_1
rcrl %eax
L_no_overflow:
jmp LRound_precision /* Do the rounding as required */
/*---------------------------------------------------------------------------+
| Divide: Return arg1/arg2 to arg3. |
| |
| This routine does not use the exponents of arg1 and arg2, but does |
| adjust the exponent of arg3. |
| |
| The maximum returned value is (ignoring exponents) |
| .ffffffff ffffffff |
| ------------------ = 1.ffffffff fffffffe |
| .80000000 00000000 |
| and the minimum is |
| .80000000 00000000 |
| ------------------ = .80000000 00000001 (rounded) |
| .ffffffff ffffffff |
| |
+---------------------------------------------------------------------------*/
L_Full_Division:
/* Save extended dividend in local register */
movl SIGL(%esi),%eax
movl %eax,FPU_accum_2
movl SIGH(%esi),%eax
movl %eax,FPU_accum_3
xorl %eax,%eax
movl %eax,FPU_accum_1 /* zero the extension */
movl %eax,FPU_accum_0 /* zero the extension */
movl SIGL(%esi),%eax /* Get the current num */
movl SIGH(%esi),%edx
/*----------------------------------------------------------------------*/
/* Initialization done.
Do the first 32 bits. */
movb $0,FPU_ovfl_flag
cmpl SIGH(%ebx),%edx /* Test for imminent overflow */
jb LLess_than_1
ja LGreater_than_1
cmpl SIGL(%ebx),%eax
jb LLess_than_1
LGreater_than_1:
/* The dividend is greater or equal, would cause overflow */
setaeb FPU_ovfl_flag /* Keep a record */
subl SIGL(%ebx),%eax
sbbl SIGH(%ebx),%edx /* Prevent the overflow */
movl %eax,FPU_accum_2
movl %edx,FPU_accum_3
LLess_than_1:
/* At this point, we have a dividend < divisor, with a record of
adjustment in FPU_ovfl_flag */
/* We will divide by a number which is too large */
movl SIGH(%ebx),%ecx
addl $1,%ecx
jnc LFirst_div_not_1
/* here we need to divide by 100000000h,
i.e., no division at all.. */
mov %edx,%eax
jmp LFirst_div_done
LFirst_div_not_1:
divl %ecx /* Divide the numerator by the augmented
denom ms dw */
LFirst_div_done:
movl %eax,FPU_result_2 /* Put the result in the answer */
mull SIGH(%ebx) /* mul by the ms dw of the denom */
subl %eax,FPU_accum_2 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_3
movl FPU_result_2,%eax /* Get the result back */
mull SIGL(%ebx) /* now mul the ls dw of the denom */
subl %eax,FPU_accum_1 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_2
sbbl $0,FPU_accum_3
je LDo_2nd_32_bits /* Must check for non-zero result here */
#ifdef PARANOID
jb L_bugged_1
#endif PARANOID
/* need to subtract another once of the denom */
incl FPU_result_2 /* Correct the answer */
movl SIGL(%ebx),%eax
movl SIGH(%ebx),%edx
subl %eax,FPU_accum_1 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_2
#ifdef PARANOID
sbbl $0,FPU_accum_3
jne L_bugged_1 /* Must check for non-zero result here */
#endif PARANOID
/*----------------------------------------------------------------------*/
/* Half of the main problem is done, there is just a reduced numerator
to handle now.
Work with the second 32 bits, FPU_accum_0 not used from now on */
LDo_2nd_32_bits:
movl FPU_accum_2,%edx /* get the reduced num */
movl FPU_accum_1,%eax
/* need to check for possible subsequent overflow */
cmpl SIGH(%ebx),%edx
jb LDo_2nd_div
ja LPrevent_2nd_overflow
cmpl SIGL(%ebx),%eax
jb LDo_2nd_div
LPrevent_2nd_overflow:
/* The numerator is greater or equal, would cause overflow */
/* prevent overflow */
subl SIGL(%ebx),%eax
sbbl SIGH(%ebx),%edx
movl %edx,FPU_accum_2
movl %eax,FPU_accum_1
incl FPU_result_2 /* Reflect the subtraction in the answer */
#ifdef PARANOID
je L_bugged_2 /* Can't bump the result to 1.0 */
#endif PARANOID
LDo_2nd_div:
cmpl $0,%ecx /* augmented denom msw */
jnz LSecond_div_not_1
/* %ecx == 0, we are dividing by 1.0 */
mov %edx,%eax
jmp LSecond_div_done
LSecond_div_not_1:
divl %ecx /* Divide the numerator by the denom ms dw */
LSecond_div_done:
movl %eax,FPU_result_1 /* Put the result in the answer */
mull SIGH(%ebx) /* mul by the ms dw of the denom */
subl %eax,FPU_accum_1 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_2
#ifdef PARANOID
jc L_bugged_2
#endif PARANOID
movl FPU_result_1,%eax /* Get the result back */
mull SIGL(%ebx) /* now mul the ls dw of the denom */
subl %eax,FPU_accum_0 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_1 /* Subtract from the num local reg */
sbbl $0,FPU_accum_2
#ifdef PARANOID
jc L_bugged_2
#endif PARANOID
jz LDo_3rd_32_bits
#ifdef PARANOID
cmpl $1,FPU_accum_2
jne L_bugged_2
#endif PARANOID
/* need to subtract another once of the denom */
movl SIGL(%ebx),%eax
movl SIGH(%ebx),%edx
subl %eax,FPU_accum_0 /* Subtract from the num local reg */
sbbl %edx,FPU_accum_1
sbbl $0,FPU_accum_2
#ifdef PARANOID
jc L_bugged_2
jne L_bugged_2
#endif PARANOID
addl $1,FPU_result_1 /* Correct the answer */
adcl $0,FPU_result_2
#ifdef PARANOID
jc L_bugged_2 /* Must check for non-zero result here */
#endif PARANOID
/*----------------------------------------------------------------------*/
/* The division is essentially finished here, we just need to perform
tidying operations.
Deal with the 3rd 32 bits */
LDo_3rd_32_bits:
movl FPU_accum_1,%edx /* get the reduced num */
movl FPU_accum_0,%eax
/* need to check for possible subsequent overflow */
cmpl SIGH(%ebx),%edx /* denom */
jb LRound_prep
ja LPrevent_3rd_overflow
cmpl SIGL(%ebx),%eax /* denom */
jb LRound_prep
LPrevent_3rd_overflow:
/* prevent overflow */
subl SIGL(%ebx),%eax
sbbl SIGH(%ebx),%edx
movl %edx,FPU_accum_1
movl %eax,FPU_accum_0
addl $1,FPU_result_1 /* Reflect the subtraction in the answer */
adcl $0,FPU_result_2
jne LRound_prep
jnc LRound_prep
/* This is a tricky spot, there is an overflow of the answer */
movb $255,FPU_ovfl_flag /* Overflow -> 1.000 */
LRound_prep:
/*
* Prepare for rounding.
* To test for rounding, we just need to compare 2*accum with the
* denom.
*/
movl FPU_accum_0,%ecx
movl FPU_accum_1,%edx
movl %ecx,%eax
orl %edx,%eax
jz LRound_ovfl /* The accumulator contains zero. */
/* Multiply by 2 */
clc
rcll $1,%ecx
rcll $1,%edx
jc LRound_large /* No need to compare, denom smaller */
subl SIGL(%ebx),%ecx
sbbl SIGH(%ebx),%edx
jnc LRound_not_small
movl $0x70000000,%eax /* Denom was larger */
jmp LRound_ovfl
LRound_not_small:
jnz LRound_large
movl $0x80000000,%eax /* Remainder was exactly 1/2 denom */
jmp LRound_ovfl
LRound_large:
movl $0xff000000,%eax /* Denom was smaller */
LRound_ovfl:
/* We are now ready to deal with rounding, but first we must get
the bits properly aligned */
testb $255,FPU_ovfl_flag /* was the num > denom ? */
je LRound_precision
incl EXP(%edi)
/* shift the mantissa right one bit */
stc /* Will set the ms bit */
rcrl FPU_result_2
rcrl FPU_result_1
rcrl %eax
/* Round the result as required */
LRound_precision:
decl EXP(%edi) /* binary point between 1st & 2nd bits */
movl %eax,%edx
movl FPU_result_1,%ebx
movl FPU_result_2,%eax
jmp fpu_reg_round
#ifdef PARANOID
/* The logic is wrong if we got here */
L_bugged:
pushl EX_INTERNAL|0x202
call EXCEPTION
pop %ebx
jmp L_exit
L_bugged_1:
pushl EX_INTERNAL|0x203
call EXCEPTION
pop %ebx
jmp L_exit
L_bugged_2:
pushl EX_INTERNAL|0x204
call EXCEPTION
pop %ebx
jmp L_exit
L_exit:
popl %ebx
popl %edi
popl %esi
leave
ret
#endif PARANOID
|
wanggx/Linux1.0 | 1,492 | Linux1.0/drivers/FPU-emu/div_small.S | .file "div_small.S"
/*---------------------------------------------------------------------------+
| div_small.S |
| |
| Divide a 64 bit integer by a 32 bit integer & return remainder. |
| |
| Copyright (C) 1992 W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| unsigned long div_small(unsigned long long *x, unsigned long y) |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
.text
.align 2,144
.globl _div_small
_div_small:
pushl %ebp
movl %esp,%ebp
pushl %esi
movl PARAM1,%esi /* pointer to num */
movl PARAM2,%ecx /* The denominator */
movl 4(%esi),%eax /* Get the current num msw */
xorl %edx,%edx
divl %ecx
movl %eax,4(%esi)
movl (%esi),%eax /* Get the num lsw */
divl %ecx
movl %eax,(%esi)
movl %edx,%eax /* Return the remainder in eax */
popl %esi
leave
ret
|
wanggx/Linux1.0 | 17,675 | Linux1.0/drivers/FPU-emu/reg_round.S | .file "reg_round.S"
/*---------------------------------------------------------------------------+
| reg_round.S |
| |
| Rounding/truncation/etc for FPU basic arithmetic functions. |
| |
| Copyright (C) 1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| This code has four possible entry points. |
| The following must be entered by a jmp intruction: |
| fpu_reg_round, fpu_reg_round_sqrt, and fpu_Arith_exit. |
| |
| The _round_reg entry point is intended to be used by C code. |
| From C, call as: |
| void round_reg(FPU_REG *arg, unsigned int extent, unsigned int control_w) |
| |
| For correct "up" and "down" rounding, the argument must have the correct |
| sign. |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| Four entry points. |
| |
| Needed by both the fpu_reg_round and fpu_reg_round_sqrt entry points: |
| %eax:%ebx 64 bit significand |
| %edx 32 bit extension of the significand |
| %edi pointer to an FPU_REG for the result to be stored |
| stack calling function must have set up a C stack frame and |
| pushed %esi, %edi, and %ebx |
| |
| Needed just for the fpu_reg_round_sqrt entry point: |
| %cx A control word in the same format as the FPU control word. |
| Otherwise, PARAM4 must give such a value. |
| |
| |
| The significand and its extension are assumed to be exact in the |
| following sense: |
| If the significand by itself is the exact result then the significand |
| extension (%edx) must contain 0, otherwise the significand extension |
| must be non-zero. |
| If the significand extension is non-zero then the significand is |
| smaller than the magnitude of the correct exact result by an amount |
| greater than zero and less than one ls bit of the significand. |
| The significand extension is only required to have three possible |
| non-zero values: |
| less than 0x80000000 <=> the significand is less than 1/2 an ls |
| bit smaller than the magnitude of the |
| true exact result. |
| exactly 0x80000000 <=> the significand is exactly 1/2 an ls bit |
| smaller than the magnitude of the true |
| exact result. |
| greater than 0x80000000 <=> the significand is more than 1/2 an ls |
| bit smaller than the magnitude of the |
| true exact result. |
| |
+---------------------------------------------------------------------------*/
/*---------------------------------------------------------------------------+
| The code in this module has become quite complex, but it should handle |
| all of the FPU flags which are set at this stage of the basic arithmetic |
| computations. |
| There are a few rare cases where the results are not set identically to |
| a real FPU. These require a bit more thought because at this stage the |
| results of the code here appear to be more consistent... |
| This may be changed in a future version. |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
#include "exception.h"
#include "control_w.h"
/* Flags for FPU_bits_lost */
#define LOST_DOWN $1
#define LOST_UP $2
/* Flags for FPU_denormal */
#define DENORMAL $1
#define UNMASKED_UNDERFLOW $2
#ifdef REENTRANT_FPU
/* Make the code re-entrant by putting
local storage on the stack: */
#define FPU_bits_lost (%esp)
#define FPU_denormal 1(%esp)
#else
/* Not re-entrant, so we can gain speed by putting
local storage in a static area: */
.data
.align 2,0
FPU_bits_lost:
.byte 0
FPU_denormal:
.byte 0
#endif REENTRANT_FPU
.text
.align 2,144
.globl fpu_reg_round
.globl fpu_reg_round_sqrt
.globl fpu_Arith_exit
.globl _round_reg
/* Entry point when called from C */
_round_reg:
pushl %ebp
movl %esp,%ebp
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%edi
movl SIGH(%edi),%eax
movl SIGL(%edi),%ebx
movl PARAM2,%edx
movl PARAM3,%ecx
jmp fpu_reg_round_sqrt
fpu_reg_round: /* Normal entry point */
movl PARAM4,%ecx
fpu_reg_round_sqrt: /* Entry point from wm_sqrt.S */
#ifdef REENTRANT_FPU
pushl %ebx /* adjust the stack pointer */
#endif REENTRANT_FPU
#ifdef PARANOID
/* Cannot use this here yet */
/* orl %eax,%eax */
/* jns L_entry_bugged */
#endif PARANOID
cmpl EXP_UNDER,EXP(%edi)
jle xMake_denorm /* The number is a de-normal */
movb $0,FPU_denormal /* 0 -> not a de-normal */
xDenorm_done:
movb $0,FPU_bits_lost /* No bits yet lost in rounding */
movl %ecx,%esi
andl CW_PC,%ecx
cmpl PR_64_BITS,%ecx
je LRound_To_64
cmpl PR_53_BITS,%ecx
je LRound_To_53
cmpl PR_24_BITS,%ecx
je LRound_To_24
#ifdef PECULIAR_486
/* With the precision control bits set to 01 "(reserved)", a real 80486
behaves as if the precision control bits were set to 11 "64 bits" */
cmpl PR_RESERVED_BITS,%ecx
je LRound_To_64
#ifdef PARANOID
jmp L_bugged_denorm_486
#endif PARANOID
#else
#ifdef PARANOID
jmp L_bugged_denorm /* There is no bug, just a bad control word */
#endif PARANOID
#endif PECULIAR_486
/* Round etc to 24 bit precision */
LRound_To_24:
movl %esi,%ecx
andl CW_RC,%ecx
cmpl RC_RND,%ecx
je LRound_nearest_24
cmpl RC_CHOP,%ecx
je LCheck_truncate_24
cmpl RC_UP,%ecx /* Towards +infinity */
je LUp_24
cmpl RC_DOWN,%ecx /* Towards -infinity */
je LDown_24
#ifdef PARANOID
jmp L_bugged_round24
#endif PARANOID
LUp_24:
cmpb SIGN_POS,SIGN(%edi)
jne LCheck_truncate_24 /* If negative then up==truncate */
jmp LCheck_24_round_up
LDown_24:
cmpb SIGN_POS,SIGN(%edi)
je LCheck_truncate_24 /* If positive then down==truncate */
LCheck_24_round_up:
movl %eax,%ecx
andl $0x000000ff,%ecx
orl %ebx,%ecx
orl %edx,%ecx
jnz LDo_24_round_up
jmp LRe_normalise
LRound_nearest_24:
/* Do rounding of the 24th bit if needed (nearest or even) */
movl %eax,%ecx
andl $0x000000ff,%ecx
cmpl $0x00000080,%ecx
jc LCheck_truncate_24 /* less than half, no increment needed */
jne LGreater_Half_24 /* greater than half, increment needed */
/* Possibly half, we need to check the ls bits */
orl %ebx,%ebx
jnz LGreater_Half_24 /* greater than half, increment needed */
orl %edx,%edx
jnz LGreater_Half_24 /* greater than half, increment needed */
/* Exactly half, increment only if 24th bit is 1 (round to even) */
testl $0x00000100,%eax
jz LDo_truncate_24
LGreater_Half_24: /* Rounding: increment at the 24th bit */
LDo_24_round_up:
andl $0xffffff00,%eax /* Truncate to 24 bits */
xorl %ebx,%ebx
movb LOST_UP,FPU_bits_lost
addl $0x00000100,%eax
jmp LCheck_Round_Overflow
LCheck_truncate_24:
movl %eax,%ecx
andl $0x000000ff,%ecx
orl %ebx,%ecx
orl %edx,%ecx
jz LRe_normalise /* No truncation needed */
LDo_truncate_24:
andl $0xffffff00,%eax /* Truncate to 24 bits */
xorl %ebx,%ebx
movb LOST_DOWN,FPU_bits_lost
jmp LRe_normalise
/* Round etc to 53 bit precision */
LRound_To_53:
movl %esi,%ecx
andl CW_RC,%ecx
cmpl RC_RND,%ecx
je LRound_nearest_53
cmpl RC_CHOP,%ecx
je LCheck_truncate_53
cmpl RC_UP,%ecx /* Towards +infinity */
je LUp_53
cmpl RC_DOWN,%ecx /* Towards -infinity */
je LDown_53
#ifdef PARANOID
jmp L_bugged_round53
#endif PARANOID
LUp_53:
cmpb SIGN_POS,SIGN(%edi)
jne LCheck_truncate_53 /* If negative then up==truncate */
jmp LCheck_53_round_up
LDown_53:
cmpb SIGN_POS,SIGN(%edi)
je LCheck_truncate_53 /* If positive then down==truncate */
LCheck_53_round_up:
movl %ebx,%ecx
andl $0x000007ff,%ecx
orl %edx,%ecx
jnz LDo_53_round_up
jmp LRe_normalise
LRound_nearest_53:
/* Do rounding of the 53rd bit if needed (nearest or even) */
movl %ebx,%ecx
andl $0x000007ff,%ecx
cmpl $0x00000400,%ecx
jc LCheck_truncate_53 /* less than half, no increment needed */
jnz LGreater_Half_53 /* greater than half, increment needed */
/* Possibly half, we need to check the ls bits */
orl %edx,%edx
jnz LGreater_Half_53 /* greater than half, increment needed */
/* Exactly half, increment only if 53rd bit is 1 (round to even) */
testl $0x00000800,%ebx
jz LTruncate_53
LGreater_Half_53: /* Rounding: increment at the 53rd bit */
LDo_53_round_up:
movb LOST_UP,FPU_bits_lost
andl $0xfffff800,%ebx /* Truncate to 53 bits */
addl $0x00000800,%ebx
adcl $0,%eax
jmp LCheck_Round_Overflow
LCheck_truncate_53:
movl %ebx,%ecx
andl $0x000007ff,%ecx
orl %edx,%ecx
jz LRe_normalise
LTruncate_53:
movb LOST_DOWN,FPU_bits_lost
andl $0xfffff800,%ebx /* Truncate to 53 bits */
jmp LRe_normalise
/* Round etc to 64 bit precision */
LRound_To_64:
movl %esi,%ecx
andl CW_RC,%ecx
cmpl RC_RND,%ecx
je LRound_nearest_64
cmpl RC_CHOP,%ecx
je LCheck_truncate_64
cmpl RC_UP,%ecx /* Towards +infinity */
je LUp_64
cmpl RC_DOWN,%ecx /* Towards -infinity */
je LDown_64
#ifdef PARANOID
jmp L_bugged_round64
#endif PARANOID
LUp_64:
cmpb SIGN_POS,SIGN(%edi)
jne LCheck_truncate_64 /* If negative then up==truncate */
orl %edx,%edx
jnz LDo_64_round_up
jmp LRe_normalise
LDown_64:
cmpb SIGN_POS,SIGN(%edi)
je LCheck_truncate_64 /* If positive then down==truncate */
orl %edx,%edx
jnz LDo_64_round_up
jmp LRe_normalise
LRound_nearest_64:
cmpl $0x80000000,%edx
jc LCheck_truncate_64
jne LDo_64_round_up
/* Now test for round-to-even */
testb $1,%ebx
jz LCheck_truncate_64
LDo_64_round_up:
movb LOST_UP,FPU_bits_lost
addl $1,%ebx
adcl $0,%eax
LCheck_Round_Overflow:
jnc LRe_normalise
/* Overflow, adjust the result (significand to 1.0) */
rcrl $1,%eax
rcrl $1,%ebx
incl EXP(%edi)
jmp LRe_normalise
LCheck_truncate_64:
orl %edx,%edx
jz LRe_normalise
LTruncate_64:
movb LOST_DOWN,FPU_bits_lost
LRe_normalise:
testb $0xff,FPU_denormal
jnz xNormalise_result
xL_Normalised:
cmpb LOST_UP,FPU_bits_lost
je xL_precision_lost_up
cmpb LOST_DOWN,FPU_bits_lost
je xL_precision_lost_down
xL_no_precision_loss:
/* store the result */
movb TW_Valid,TAG(%edi)
xL_Store_significand:
movl %eax,SIGH(%edi)
movl %ebx,SIGL(%edi)
xorl %eax,%eax /* No errors detected. */
cmpl EXP_OVER,EXP(%edi)
jge L_overflow
fpu_reg_round_exit:
#ifdef REENTRANT_FPU
popl %ebx /* adjust the stack pointer */
#endif REENTRANT_FPU
fpu_Arith_exit:
popl %ebx
popl %edi
popl %esi
leave
ret
/*
* Set the FPU status flags to represent precision loss due to
* round-up.
*/
xL_precision_lost_up:
push %eax
call _set_precision_flag_up
popl %eax
jmp xL_no_precision_loss
/*
* Set the FPU status flags to represent precision loss due to
* truncation.
*/
xL_precision_lost_down:
push %eax
call _set_precision_flag_down
popl %eax
jmp xL_no_precision_loss
/*
* The number is a denormal (which might get rounded up to a normal)
* Shift the number right the required number of bits, which will
* have to be undone later...
*/
xMake_denorm:
/* The action to be taken depends upon whether the underflow
exception is masked */
testb CW_Underflow,%cl /* Underflow mask. */
jz xUnmasked_underflow /* Do not make a denormal. */
movb DENORMAL,FPU_denormal
pushl %ecx /* Save */
movl EXP_UNDER+1,%ecx
subl EXP(%edi),%ecx
cmpl $64,%ecx /* shrd only works for 0..31 bits */
jnc xDenorm_shift_more_than_63
cmpl $32,%ecx /* shrd only works for 0..31 bits */
jnc xDenorm_shift_more_than_32
/*
* We got here without jumps by assuming that the most common requirement
* is for a small de-normalising shift.
* Shift by [1..31] bits
*/
addl %ecx,EXP(%edi)
orl %edx,%edx /* extension */
setne %ch /* Save whether %edx is non-zero */
xorl %edx,%edx
shrd %cl,%ebx,%edx
shrd %cl,%eax,%ebx
shr %cl,%eax
orb %ch,%dl
popl %ecx
jmp xDenorm_done
/* Shift by [32..63] bits */
xDenorm_shift_more_than_32:
addl %ecx,EXP(%edi)
subb $32,%cl
orl %edx,%edx
setne %ch
orb %ch,%bl
xorl %edx,%edx
shrd %cl,%ebx,%edx
shrd %cl,%eax,%ebx
shr %cl,%eax
orl %edx,%edx /* test these 32 bits */
setne %cl
orb %ch,%bl
orb %cl,%bl
movl %ebx,%edx
movl %eax,%ebx
xorl %eax,%eax
popl %ecx
jmp xDenorm_done
/* Shift by [64..) bits */
xDenorm_shift_more_than_63:
cmpl $64,%ecx
jne xDenorm_shift_more_than_64
/* Exactly 64 bit shift */
addl %ecx,EXP(%edi)
xorl %ecx,%ecx
orl %edx,%edx
setne %cl
orl %ebx,%ebx
setne %ch
orb %ch,%cl
orb %cl,%al
movl %eax,%edx
xorl %eax,%eax
xorl %ebx,%ebx
popl %ecx
jmp xDenorm_done
xDenorm_shift_more_than_64:
movl EXP_UNDER+1,EXP(%edi)
/* This is easy, %eax must be non-zero, so.. */
movl $1,%edx
xorl %eax,%eax
xorl %ebx,%ebx
popl %ecx
jmp xDenorm_done
xUnmasked_underflow:
movb UNMASKED_UNDERFLOW,FPU_denormal
jmp xDenorm_done
/* Undo the de-normalisation. */
xNormalise_result:
cmpb UNMASKED_UNDERFLOW,FPU_denormal
je xSignal_underflow
/* The number must be a denormal if we got here. */
#ifdef PARANOID
/* But check it... just in case. */
cmpl EXP_UNDER+1,EXP(%edi)
jne L_norm_bugged
#endif PARANOID
#ifdef PECULIAR_486
/*
* This implements a special feature of 80486 behaviour.
* Underflow will be signalled even if the number is
* not a denormal after rounding.
* This difference occurs only for masked underflow, and not
* in the unmasked case.
* Actual 80486 behaviour differs from this in some circumstances.
*/
orl %eax,%eax /* ms bits */
js LNormalise_shift_done /* Will be masked underflow */
#endif PECULIAR_486
orl %eax,%eax /* ms bits */
js xL_Normalised /* No longer a denormal */
jnz LNormalise_shift_up_to_31 /* Shift left 0 - 31 bits */
orl %ebx,%ebx
jz L_underflow_to_zero /* The contents are zero */
/* Shift left 32 - 63 bits */
movl %ebx,%eax
xorl %ebx,%ebx
subl $32,EXP(%edi)
LNormalise_shift_up_to_31:
bsrl %eax,%ecx /* get the required shift in %ecx */
subl $31,%ecx
negl %ecx
shld %cl,%ebx,%eax
shl %cl,%ebx
subl %ecx,EXP(%edi)
LNormalise_shift_done:
testb $0xff,FPU_bits_lost /* bits lost == underflow */
jz xL_Normalised
/* There must be a masked underflow */
push %eax
pushl EX_Underflow
call _exception
popl %eax
popl %eax
jmp xL_Normalised
/*
* The operations resulted in a number too small to represent.
* Masked response.
*/
L_underflow_to_zero:
push %eax
call _set_precision_flag_down
popl %eax
push %eax
pushl EX_Underflow
call _exception
popl %eax
popl %eax
/* Reduce the exponent to EXP_UNDER */
movl EXP_UNDER,EXP(%edi)
movb TW_Zero,TAG(%edi)
jmp xL_Store_significand
/* The operations resulted in a number too large to represent. */
L_overflow:
push %edi
call _arith_overflow
pop %edi
jmp fpu_reg_round_exit
xSignal_underflow:
/* The number may have been changed to a non-denormal */
/* by the rounding operations. */
cmpl EXP_UNDER,EXP(%edi)
jle xDo_unmasked_underflow
jmp xL_Normalised
xDo_unmasked_underflow:
/* Increase the exponent by the magic number */
addl $(3*(1<<13)),EXP(%edi)
push %eax
pushl EX_Underflow
call EXCEPTION
popl %eax
popl %eax
jmp xL_Normalised
#ifdef PARANOID
#ifdef PECULIAR_486
L_bugged_denorm_486:
pushl EX_INTERNAL|0x236
call EXCEPTION
popl %ebx
jmp L_exception_exit
#else
L_bugged_denorm:
pushl EX_INTERNAL|0x230
call EXCEPTION
popl %ebx
jmp L_exception_exit
#endif PECULIAR_486
L_bugged_round24:
pushl EX_INTERNAL|0x231
call EXCEPTION
popl %ebx
jmp L_exception_exit
L_bugged_round53:
pushl EX_INTERNAL|0x232
call EXCEPTION
popl %ebx
jmp L_exception_exit
L_bugged_round64:
pushl EX_INTERNAL|0x233
call EXCEPTION
popl %ebx
jmp L_exception_exit
L_norm_bugged:
pushl EX_INTERNAL|0x234
call EXCEPTION
popl %ebx
jmp L_exception_exit
L_entry_bugged:
pushl EX_INTERNAL|0x235
call EXCEPTION
popl %ebx
L_exception_exit:
mov $1,%eax
jmp fpu_reg_round_exit
#endif PARANOID
|
wanggx/Linux1.0 | 2,304 | Linux1.0/drivers/FPU-emu/poly_div.S | .file "poly_div.S"
/*---------------------------------------------------------------------------+
| poly_div.S |
| |
| A set of functions to divide 64 bit integers by fixed numbers. |
| |
| Copyright (C) 1992 W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void poly_div2(unsigned long long *x) |
| void poly_div4(unsigned long long *x) |
| void poly_div16(unsigned long long *x) |
| |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
.text
/*---------------------------------------------------------------------------*/
.align 2,144
.globl _poly_div2
_poly_div2:
pushl %ebp
movl %esp,%ebp
movl PARAM1,%ecx
movw (%ecx),%ax
shrl $1,4(%ecx)
rcrl $1,(%ecx)
testw $1,%ax
je poly_div2_exit
addl $1,(%ecx)
adcl $0,4(%ecx)
poly_div2_exit:
leave
ret
/*---------------------------------------------------------------------------*/
.align 2,144
.globl _poly_div4
_poly_div4:
pushl %ebp
movl %esp,%ebp
movl PARAM1,%ecx
movw (%ecx),%ax
movl 4(%ecx),%edx
shll $30,%edx
shrl $2,4(%ecx)
shrl $2,(%ecx)
orl %edx,(%ecx)
testw $2,%ax
je poly_div4_exit
addl $1,(%ecx)
adcl $0,4(%ecx)
poly_div4_exit:
leave
ret
/*---------------------------------------------------------------------------*/
.align 2,144
.globl _poly_div16
_poly_div16:
pushl %ebp
movl %esp,%ebp
movl PARAM1,%ecx
movw (%ecx),%ax
movl 4(%ecx),%edx
shll $28,%edx
shrl $4,4(%ecx)
shrl $4,(%ecx)
orl %edx,(%ecx)
testw $8,%ax
je poly_div16_exit
addl $1,(%ecx)
adcl $0,4(%ecx)
poly_div16_exit:
leave
ret
/*---------------------------------------------------------------------------*/
|
wanggx/Linux1.0 | 6,156 | Linux1.0/drivers/FPU-emu/wm_shrx.S | .file "wm_shrx.S"
/*---------------------------------------------------------------------------+
| wm_shrx.S |
| |
| 64 bit right shift functions |
| |
| Copyright (C) 1992 W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| unsigned shrx(void *arg1, unsigned arg2) |
| and |
| unsigned shrxs(void *arg1, unsigned arg2) |
| |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
.text
.align 2,144
/*---------------------------------------------------------------------------+
| unsigned shrx(void *arg1, unsigned arg2) |
| |
| Extended shift right function. |
| Fastest for small shifts. |
| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
| right by the number of bits specified by the second arg (arg2). |
| Forms a 96 bit quantity from the 64 bit arg and eax: |
| [ 64 bit arg ][ eax ] |
| shift right ---------> |
| The eax register is initialized to 0 before the shifting. |
| Results returned in the 64 bit arg and eax. |
+---------------------------------------------------------------------------*/
.globl _shrx
_shrx:
push %ebp
movl %esp,%ebp
pushl %esi
movl PARAM2,%ecx
movl PARAM1,%esi
cmpl $32,%ecx /* shrd only works for 0..31 bits */
jnc L_more_than_31
/* less than 32 bits */
pushl %ebx
movl (%esi),%ebx /* lsl */
movl 4(%esi),%edx /* msl */
xorl %eax,%eax /* extension */
shrd %cl,%ebx,%eax
shrd %cl,%edx,%ebx
shr %cl,%edx
movl %ebx,(%esi)
movl %edx,4(%esi)
popl %ebx
popl %esi
leave
ret
L_more_than_31:
cmpl $64,%ecx
jnc L_more_than_63
subb $32,%cl
movl (%esi),%eax /* lsl */
movl 4(%esi),%edx /* msl */
shrd %cl,%edx,%eax
shr %cl,%edx
movl %edx,(%esi)
movl $0,4(%esi)
popl %esi
leave
ret
L_more_than_63:
cmpl $96,%ecx
jnc L_more_than_95
subb $64,%cl
movl 4(%esi),%eax /* msl */
shr %cl,%eax
xorl %edx,%edx
movl %edx,(%esi)
movl %edx,4(%esi)
popl %esi
leave
ret
L_more_than_95:
xorl %eax,%eax
movl %eax,(%esi)
movl %eax,4(%esi)
popl %esi
leave
ret
/*---------------------------------------------------------------------------+
| unsigned shrxs(void *arg1, unsigned arg2) |
| |
| Extended shift right function (optimized for small floating point |
| integers). |
| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
| right by the number of bits specified by the second arg (arg2). |
| Forms a 96 bit quantity from the 64 bit arg and eax: |
| [ 64 bit arg ][ eax ] |
| shift right ---------> |
| The eax register is initialized to 0 before the shifting. |
| The lower 8 bits of eax are lost and replaced by a flag which is |
| set (to 0x01) if any bit, apart from the first one, is set in the |
| part which has been shifted out of the arg. |
| Results returned in the 64 bit arg and eax. |
+---------------------------------------------------------------------------*/
.globl _shrxs
_shrxs:
push %ebp
movl %esp,%ebp
pushl %esi
pushl %ebx
movl PARAM2,%ecx
movl PARAM1,%esi
cmpl $64,%ecx /* shrd only works for 0..31 bits */
jnc Ls_more_than_63
cmpl $32,%ecx /* shrd only works for 0..31 bits */
jc Ls_less_than_32
/* We got here without jumps by assuming that the most common requirement
is for small integers */
/* Shift by [32..63] bits */
subb $32,%cl
movl (%esi),%eax /* lsl */
movl 4(%esi),%edx /* msl */
xorl %ebx,%ebx
shrd %cl,%eax,%ebx
shrd %cl,%edx,%eax
shr %cl,%edx
orl %ebx,%ebx /* test these 32 bits */
setne %bl
test $0x7fffffff,%eax /* and 31 bits here */
setne %bh
orw %bx,%bx /* Any of the 63 bit set ? */
setne %al
movl %edx,(%esi)
movl $0,4(%esi)
popl %ebx
popl %esi
leave
ret
/* Shift by [0..31] bits */
Ls_less_than_32:
movl (%esi),%ebx /* lsl */
movl 4(%esi),%edx /* msl */
xorl %eax,%eax /* extension */
shrd %cl,%ebx,%eax
shrd %cl,%edx,%ebx
shr %cl,%edx
test $0x7fffffff,%eax /* only need to look at eax here */
setne %al
movl %ebx,(%esi)
movl %edx,4(%esi)
popl %ebx
popl %esi
leave
ret
/* Shift by [64..95] bits */
Ls_more_than_63:
cmpl $96,%ecx
jnc Ls_more_than_95
subb $64,%cl
movl (%esi),%ebx /* lsl */
movl 4(%esi),%eax /* msl */
xorl %edx,%edx /* extension */
shrd %cl,%ebx,%edx
shrd %cl,%eax,%ebx
shr %cl,%eax
orl %ebx,%edx
setne %bl
test $0x7fffffff,%eax /* only need to look at eax here */
setne %bh
orw %bx,%bx
setne %al
xorl %edx,%edx
movl %edx,(%esi) /* set to zero */
movl %edx,4(%esi) /* set to zero */
popl %ebx
popl %esi
leave
ret
Ls_more_than_95:
/* Shift by [96..inf) bits */
xorl %eax,%eax
movl (%esi),%ebx
orl 4(%esi),%ebx
setne %al
xorl %ebx,%ebx
movl %ebx,(%esi)
movl %ebx,4(%esi)
popl %ebx
popl %esi
leave
ret
|
wanggx/Linux1.0 | 3,736 | Linux1.0/drivers/FPU-emu/polynomial.S | /*---------------------------------------------------------------------------+
| polynomial.S |
| |
| Fixed point arithmetic polynomial evaluation. |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void polynomial(unsigned accum[], unsigned x[], unsigned terms[][2], |
| int n) |
| |
| Computes: |
| terms[0] + (terms[1] + (terms[2] + ... + (terms[n-1]*x)*x)*x)*x) ... )*x |
| The result is returned in accum. |
| |
+---------------------------------------------------------------------------*/
.file "fpolynom.s"
#include "fpu_asm.h"
/* #define EXTRA_PRECISE // Do not use: not complete */
#define TERM_SIZE $8
#define SUM_MS -20(%ebp) /* sum ms long */
#define SUM_MIDDLE -24(%ebp) /* sum middle long */
#define SUM_LS -28(%ebp) /* sum ls long */
#define SUM_LS_HI -25(%ebp) /* high byte of sum ls */
#define ACCUM_MS -4(%ebp) /* accum ms long */
#define ACCUM_MIDDLE -8(%ebp) /* accum middle long */
#define ACCUM_LS -12(%ebp) /* accum ls long */
#define ACCUM_LS_HI -9(%ebp) /* high byte of accum ls */
.text
.align 2,144
.globl _polynomial
_polynomial:
pushl %ebp
movl %esp,%ebp
subl $32,%esp
pushl %esi
pushl %edi
pushl %ebx
movl PARAM2,%esi /* x */
movl PARAM3,%edi /* terms */
movl TERM_SIZE,%eax
mull PARAM4 /* n */
addl %eax,%edi
movl 4(%edi),%edx /* terms[n] */
movl %edx,SUM_MS
movl (%edi),%edx /* terms[n] */
movl %edx,SUM_MIDDLE
xor %eax,%eax
movl %eax,SUM_LS
subl TERM_SIZE,%edi
decl PARAM4
js L_accum_done
L_accum_loop:
xor %eax,%eax
movl %eax,ACCUM_MS
movl %eax,ACCUM_MIDDLE
movl SUM_MIDDLE,%eax
mull (%esi) /* x ls long */
/* movl %eax,-16(%ebp) // Not needed */
movl %edx,ACCUM_LS
movl SUM_MIDDLE,%eax
mull 4(%esi) /* x ms long */
addl %eax,ACCUM_LS
adcl %edx,ACCUM_MIDDLE
adcl $0,ACCUM_MS
movl SUM_MS,%eax
mull (%esi) /* x ls long */
addl %eax,ACCUM_LS
adcl %edx,ACCUM_MIDDLE
adcl $0,ACCUM_MS
movl SUM_MS,%eax
mull 4(%esi) /* x ms long */
addl %eax,ACCUM_MIDDLE
adcl %edx,ACCUM_MS
/*
* Now put the sum of next term and the accumulator
* into the sum register
*/
movl ACCUM_MIDDLE,%eax
addl (%edi),%eax /* term ls long */
movl %eax,SUM_MIDDLE
movl ACCUM_MS,%eax
adcl 4(%edi),%eax /* term ms long */
movl %eax,SUM_MS
#ifdef EXTRA_PRECISE
movl ACCUM_LS,%eax
movl %eax,SUM_LS
#else
testb $0x80,ACCUM_LS_HI /* ms bit of ACCUM_LS */
je L_no_poly_round
addl $1,SUM_MIDDLE
adcl $0,SUM_MS
L_no_poly_round:
#endif EXTRA_PRECISE
subl TERM_SIZE,%edi
decl PARAM4
jns L_accum_loop
L_accum_done:
#ifdef EXTRA_PRECISE
/* Round the result */
testb $128,SUM_LS_HI
je L_poly_done
addl $1,SUM_MIDDLE
adcl $0,SUM_MS
#endif EXTRA_PRECISE
L_poly_done:
movl PARAM1,%edi /* accum */
movl SUM_MIDDLE,%eax
movl %eax,(%edi)
movl SUM_MS,%eax
movl %eax,4(%edi)
popl %ebx
popl %edi
popl %esi
leave
ret
|
wanggx/Linux1.0 | 1,739 | Linux1.0/drivers/FPU-emu/poly_mul64.S | /*---------------------------------------------------------------------------+
| poly_mul64.S |
| |
| Multiply two 64 bit integers. |
| |
| Copyright (C) 1992 W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void mul64(long long *a, long long *b, long long *result) |
| |
+---------------------------------------------------------------------------*/
#include "fpu_asm.h"
.text
.align 2,144
.globl _mul64
_mul64:
pushl %ebp
movl %esp,%ebp
subl $16,%esp
pushl %esi
pushl %ebx
movl PARAM1,%esi
movl PARAM2,%ecx
movl PARAM3,%ebx
xor %eax,%eax
movl %eax,-4(%ebp)
movl %eax,-8(%ebp)
movl (%esi),%eax
mull (%ecx)
movl %eax,-16(%ebp) /* Not used */
movl %edx,-12(%ebp)
movl (%esi),%eax
mull 4(%ecx)
addl %eax,-12(%ebp)
adcl %edx,-8(%ebp)
adcl $0,-4(%ebp)
movl 4(%esi),%eax
mull (%ecx)
addl %eax,-12(%ebp)
adcl %edx,-8(%ebp)
adcl $0,-4(%ebp)
movl 4(%esi),%eax
mull 4(%ecx)
addl %eax,-8(%ebp)
adcl %edx,-4(%ebp)
testb $128,-9(%ebp)
je L_no_round
addl $1,-8(%ebp)
adcl $0,-4(%ebp)
L_no_round:
movl -8(%ebp),%esi
movl %esi,(%ebx)
movl -4(%ebp),%esi
movl %esi,4(%ebx)
popl %ebx
popl %esi
leave
ret
|
wanggx/Linux1.0 | 4,180 | Linux1.0/drivers/FPU-emu/reg_u_add.S | .file "reg_u_add.S"
/*---------------------------------------------------------------------------+
| reg_u_add.S |
| |
| Add two valid (TW_Valid) FPU_REG numbers, of the same sign, and put the |
| result in a destination FPU_REG. |
| |
| Copyright (C) 1992,1993 |
| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
| Australia. E-mail billm@vaxc.cc.monash.edu.au |
| |
| Call from C as: |
| void reg_u_add(FPU_REG *arg1, FPU_REG *arg2, FPU_REG *answ, |
| int control_w) |
| |
+---------------------------------------------------------------------------*/
/*
| Kernel addition routine reg_u_add(reg *arg1, reg *arg2, reg *answ).
| Takes two valid reg f.p. numbers (TW_Valid), which are
| treated as unsigned numbers,
| and returns their sum as a TW_Valid or TW_S f.p. number.
| The returned number is normalized.
| Basic checks are performed if PARANOID is defined.
*/
#include "exception.h"
#include "fpu_asm.h"
#include "control_w.h"
.text
.align 2,144
.globl _reg_u_add
_reg_u_add:
pushl %ebp
movl %esp,%ebp
pushl %esi
pushl %edi
pushl %ebx
movl PARAM1,%esi /* source 1 */
movl PARAM2,%edi /* source 2 */
#ifdef DENORM_OPERAND
cmpl EXP_UNDER,EXP(%esi)
jg xOp1_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp1_not_denorm:
cmpl EXP_UNDER,EXP(%edi)
jg xOp2_not_denorm
call _denormal_operand
orl %eax,%eax
jnz fpu_Arith_exit
xOp2_not_denorm:
#endif DENORM_OPERAND
movl EXP(%esi),%ecx
subl EXP(%edi),%ecx /* exp1 - exp2 */
jge L_arg1_larger
/* num1 is smaller */
movl SIGL(%esi),%ebx
movl SIGH(%esi),%eax
movl %edi,%esi
negw %cx
jmp L_accum_loaded
L_arg1_larger:
/* num1 has larger or equal exponent */
movl SIGL(%edi),%ebx
movl SIGH(%edi),%eax
L_accum_loaded:
movl PARAM3,%edi /* destination */
/* movb SIGN(%esi),%dl
movb %dl,SIGN(%edi) */ /* Copy the sign from the first arg */
movl EXP(%esi),%edx
movl %edx,EXP(%edi) /* Copy exponent to destination */
xorl %edx,%edx /* clear the extension */
#ifdef PARANOID
testl $0x80000000,%eax
je L_bugged
testl $0x80000000,SIGH(%esi)
je L_bugged
#endif PARANOID
/* The number to be shifted is in %eax:%ebx:%edx */
cmpw $32,%cx /* shrd only works for 0..31 bits */
jnc L_more_than_31
/* less than 32 bits */
shrd %cl,%ebx,%edx
shrd %cl,%eax,%ebx
shr %cl,%eax
jmp L_shift_done
L_more_than_31:
cmpw $64,%cx
jnc L_more_than_63
subb $32,%cl
jz L_exactly_32
shrd %cl,%eax,%edx
shr %cl,%eax
orl %ebx,%ebx
jz L_more_31_no_low /* none of the lowest bits is set */
orl $1,%edx /* record the fact in the extension */
L_more_31_no_low:
movl %eax,%ebx
xorl %eax,%eax
jmp L_shift_done
L_exactly_32:
movl %ebx,%edx
movl %eax,%ebx
xorl %eax,%eax
jmp L_shift_done
L_more_than_63:
cmpw $65,%cx
jnc L_more_than_64
movl %eax,%edx
orl %ebx,%ebx
jz L_more_63_no_low
orl $1,%edx
jmp L_more_63_no_low
L_more_than_64:
movl $1,%edx /* The shifted nr always at least one '1' */
L_more_63_no_low:
xorl %ebx,%ebx
xorl %eax,%eax
L_shift_done:
/* Now do the addition */
addl SIGL(%esi),%ebx
adcl SIGH(%esi),%eax
jnc L_round_the_result
/* Overflow, adjust the result */
rcrl $1,%eax
rcrl $1,%ebx
rcrl $1,%edx
jnc L_no_bit_lost
orl $1,%edx
L_no_bit_lost:
incl EXP(%edi)
L_round_the_result:
jmp fpu_reg_round /* Round the result */
#ifdef PARANOID
/* If we ever get here then we have problems! */
L_bugged:
pushl EX_INTERNAL|0x201
call EXCEPTION
pop %ebx
jmp L_exit
#endif PARANOID
L_exit:
popl %ebx
popl %edi
popl %esi
leave
ret
|
wangjianlin1985/1433_STM32_RFID_Archives | 11,085 | STM/CORE/startup_stm32f10x_md.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00001000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
wangjianlin1985/1433_STM32_RFID_Archives | 15,145 | STM/CORE/startup_stm32f10x_hd.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system and also configure the external
;* SRAM mounted on STM3210E-EVAL board to be used as data
;* memory (optional, to be enabled by user)
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
DCD TIM8_BRK_IRQHandler ; TIM8 Break
DCD TIM8_UP_IRQHandler ; TIM8 Update
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
EXPORT TIM8_BRK_IRQHandler [WEAK]
EXPORT TIM8_UP_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC3_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
wangjianlin1985/1414_heart_stm32 | 12,458 | 相关资料/心率传感器/MAX30102测试资料完整版/MH_MAX30102 STM32 TEST/stm32f103c8t6_max30102/MAX30102/CORE/startup_stm32f10x_md.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1_2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
wangjianlin1985/1414_heart_stm32 | 15,145 | 相关资料/心率传感器/MAX30102测试资料完整版/MH_MAX30102 STM32 TEST/stm32f103c8t6_max30102/MAX30102/CORE/startup_stm32f10x_hd.s | ;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;* File Name : startup_stm32f10x_hd.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x High Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system and also configure the external
;* SRAM mounted on STM3210E-EVAL board to be used as data
;* memory (optional, to be enabled by user)
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD WWDG_IRQHandler ; Window Watchdog
DCD PVD_IRQHandler ; PVD through EXTI Line detect
DCD TAMPER_IRQHandler ; Tamper
DCD RTC_IRQHandler ; RTC
DCD FLASH_IRQHandler ; Flash
DCD RCC_IRQHandler ; RCC
DCD EXTI0_IRQHandler ; EXTI Line 0
DCD EXTI1_IRQHandler ; EXTI Line 1
DCD EXTI2_IRQHandler ; EXTI Line 2
DCD EXTI3_IRQHandler ; EXTI Line 3
DCD EXTI4_IRQHandler ; EXTI Line 4
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
DCD ADC1_2_IRQHandler ; ADC1 & ADC2
DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX
DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
DCD TIM1_BRK_IRQHandler ; TIM1 Break
DCD TIM1_UP_IRQHandler ; TIM1 Update
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
DCD TIM2_IRQHandler ; TIM2
DCD TIM3_IRQHandler ; TIM3
DCD TIM4_IRQHandler ; TIM4
DCD I2C1_EV_IRQHandler ; I2C1 Event
DCD I2C1_ER_IRQHandler ; I2C1 Error
DCD I2C2_EV_IRQHandler ; I2C2 Event
DCD I2C2_ER_IRQHandler ; I2C2 Error
DCD SPI1_IRQHandler ; SPI1
DCD SPI2_IRQHandler ; SPI2
DCD USART1_IRQHandler ; USART1
DCD USART2_IRQHandler ; USART2
DCD USART3_IRQHandler ; USART3
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line
DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend
DCD TIM8_BRK_IRQHandler ; TIM8 Break
DCD TIM8_UP_IRQHandler ; TIM8 Update
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
DCD ADC3_IRQHandler ; ADC3
DCD FSMC_IRQHandler ; FSMC
DCD SDIO_IRQHandler ; SDIO
DCD TIM5_IRQHandler ; TIM5
DCD SPI3_IRQHandler ; SPI3
DCD UART4_IRQHandler ; UART4
DCD UART5_IRQHandler ; UART5
DCD TIM6_IRQHandler ; TIM6
DCD TIM7_IRQHandler ; TIM7
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT WWDG_IRQHandler [WEAK]
EXPORT PVD_IRQHandler [WEAK]
EXPORT TAMPER_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT FLASH_IRQHandler [WEAK]
EXPORT RCC_IRQHandler [WEAK]
EXPORT EXTI0_IRQHandler [WEAK]
EXPORT EXTI1_IRQHandler [WEAK]
EXPORT EXTI2_IRQHandler [WEAK]
EXPORT EXTI3_IRQHandler [WEAK]
EXPORT EXTI4_IRQHandler [WEAK]
EXPORT DMA1_Channel1_IRQHandler [WEAK]
EXPORT DMA1_Channel2_IRQHandler [WEAK]
EXPORT DMA1_Channel3_IRQHandler [WEAK]
EXPORT DMA1_Channel4_IRQHandler [WEAK]
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
EXPORT ADC1_2_IRQHandler [WEAK]
EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK]
EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK]
EXPORT CAN1_RX1_IRQHandler [WEAK]
EXPORT CAN1_SCE_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM1_BRK_IRQHandler [WEAK]
EXPORT TIM1_UP_IRQHandler [WEAK]
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
EXPORT TIM1_CC_IRQHandler [WEAK]
EXPORT TIM2_IRQHandler [WEAK]
EXPORT TIM3_IRQHandler [WEAK]
EXPORT TIM4_IRQHandler [WEAK]
EXPORT I2C1_EV_IRQHandler [WEAK]
EXPORT I2C1_ER_IRQHandler [WEAK]
EXPORT I2C2_EV_IRQHandler [WEAK]
EXPORT I2C2_ER_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT SPI2_IRQHandler [WEAK]
EXPORT USART1_IRQHandler [WEAK]
EXPORT USART2_IRQHandler [WEAK]
EXPORT USART3_IRQHandler [WEAK]
EXPORT EXTI15_10_IRQHandler [WEAK]
EXPORT RTCAlarm_IRQHandler [WEAK]
EXPORT USBWakeUp_IRQHandler [WEAK]
EXPORT TIM8_BRK_IRQHandler [WEAK]
EXPORT TIM8_UP_IRQHandler [WEAK]
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
EXPORT TIM8_CC_IRQHandler [WEAK]
EXPORT ADC3_IRQHandler [WEAK]
EXPORT FSMC_IRQHandler [WEAK]
EXPORT SDIO_IRQHandler [WEAK]
EXPORT TIM5_IRQHandler [WEAK]
EXPORT SPI3_IRQHandler [WEAK]
EXPORT UART4_IRQHandler [WEAK]
EXPORT UART5_IRQHandler [WEAK]
EXPORT TIM6_IRQHandler [WEAK]
EXPORT TIM7_IRQHandler [WEAK]
EXPORT DMA2_Channel1_IRQHandler [WEAK]
EXPORT DMA2_Channel2_IRQHandler [WEAK]
EXPORT DMA2_Channel3_IRQHandler [WEAK]
EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
WWDG_IRQHandler
PVD_IRQHandler
TAMPER_IRQHandler
RTC_IRQHandler
FLASH_IRQHandler
RCC_IRQHandler
EXTI0_IRQHandler
EXTI1_IRQHandler
EXTI2_IRQHandler
EXTI3_IRQHandler
EXTI4_IRQHandler
DMA1_Channel1_IRQHandler
DMA1_Channel2_IRQHandler
DMA1_Channel3_IRQHandler
DMA1_Channel4_IRQHandler
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
ADC1_2_IRQHandler
USB_HP_CAN1_TX_IRQHandler
USB_LP_CAN1_RX0_IRQHandler
CAN1_RX1_IRQHandler
CAN1_SCE_IRQHandler
EXTI9_5_IRQHandler
TIM1_BRK_IRQHandler
TIM1_UP_IRQHandler
TIM1_TRG_COM_IRQHandler
TIM1_CC_IRQHandler
TIM2_IRQHandler
TIM3_IRQHandler
TIM4_IRQHandler
I2C1_EV_IRQHandler
I2C1_ER_IRQHandler
I2C2_EV_IRQHandler
I2C2_ER_IRQHandler
SPI1_IRQHandler
SPI2_IRQHandler
USART1_IRQHandler
USART2_IRQHandler
USART3_IRQHandler
EXTI15_10_IRQHandler
RTCAlarm_IRQHandler
USBWakeUp_IRQHandler
TIM8_BRK_IRQHandler
TIM8_UP_IRQHandler
TIM8_TRG_COM_IRQHandler
TIM8_CC_IRQHandler
ADC3_IRQHandler
FSMC_IRQHandler
SDIO_IRQHandler
TIM5_IRQHandler
SPI3_IRQHandler
UART4_IRQHandler
UART5_IRQHandler
TIM6_IRQHandler
TIM7_IRQHandler
DMA2_Channel1_IRQHandler
DMA2_Channel2_IRQHandler
DMA2_Channel3_IRQHandler
DMA2_Channel4_5_IRQHandler
B .
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
|
WangXuan95/BSV_Tutorial_cn | 8,563 | src/Rv32iCPU/benchmark/qsort_assembly.S | # 概述：对数组进行原地快速排序
# Author: WangXuan
#
# 系统要求：1、具有一个大小至少为0x1000 Byte的数据RAM （该程序中，其高地址用作栈，低地址用作被排序的数组）
# 2、测试该代码时，不需要初始化DataRam，只需要将指令流烧入InstrRam。因为有一系列指令去准备被排序的数组。
# 3、请根据实际情况将a0设置为你的DataRam的地址，例如我的SoC DataRam起始地址为0x00000000，则第一条指令就是 lui a0, 0x00000
#
.org 0x0
.global _start
_start:
main: # main函数开始，在DataRam里初始化一段数据，然后调用QuickSort进行排序，排序后进入死循环。请使用仿真或UART调试器查看排序后的数据
lui a0, 0x00000 # 设置DataRam的起始地址为0x00000000，也用作被排序数组的起始地址是，即DataRam的起始地址
addi sp, a0 , 0x400 # 设置栈顶指针
or a2, a0, zero
addi t0, zero, -3 # 用一系列指令向a0里写入被排序的数组，可以是负数
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 0
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 0
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -8
sw t0, (a2)
or a1, zero, zero # 准备函数参数，a1=0
sub a2, a2, a0 # 准备函数参数，a2=数组最后一个元素的地址偏移
jal ra , QuickSort # 开始排序
infinity_loop:
jal zero, infinity_loop # 排序结束，死循环
QuickSort:
# 函数:QuickSort：以a0为基地址的原地升序快速排序，a1是start即开始下标，a2是end即结束下标
# 例: a0=0x00000100，a1=0, a2=32，则计算从0x00000100开始的32个4Byte数的快速排序
# 注: 以有符号数为比较标准。例如0xffffffff应该排在0x00000001前面，因为0xffffffff代表-1，比1要小
# 之所以使用低13位，因为13位二进制数取值范围位0~8191，不会超过4位十进制数
# 改变数据RAM： 除了被排序的数组外，还使用了以sp寄存器为栈顶指针的栈。使用栈的大小根据排序长度而不同，调用前合理设置sp的值以防爆栈
# 改变的寄存器： t0, t1, t2, t3, t4
bge a1, a2, QuickSortReturn # if a1>=a2, end<=start, jump to return
or t1, a1, zero # t1=i=a1=start
or t2, a2, zero # t2=j=a2=end
add t0, a0, t1 #
lw t0, (t0) # t0=key=lst[start]
PartationStart:
PartationFirstStart: # start of for loop
bge t1, t2, PartationEnd # if i>=j, branch to next step
add t3, a0, t2 #
lw t3, (t3) # t3=lst[j]
blt t3, t0, PartationFirstEnd # if lst[j]<key, branch to next step
addi t2, t2, -4 # t2-=4 j--
jal zero, PartationFirstStart # for loop
PartationFirstEnd: # end of for loop
add t4 , a0, t1 # t4=lst+i
sw t3 , (t4) # lst[i] = t3 = lst[j]
PartationSecondStart: # start of for loop
bge t1, t2, PartationEnd # if i>=j, branch to next step
add t3, a0, t1 #
lw t3, (t3) # t3=lst[i]
blt t0, t3, PartationSecondEnd # if key<lst[i], branch to next step
addi t1, t1, 4 # t1+=4 i++
jal zero, PartationSecondStart # for loop
PartationSecondEnd: # end of for loop
add t4 , a0, t2 # t4=lst+j
sw t3 , (t4) # lst[j] = t3 = lst[i]
blt t1, t2, PartationStart # if t1<t2, branch to while start
PartationEnd:
add t4 , a0, t1 # t4=lst+i
sw t0 , (t4) # lst[i] = t0 = key
addi sp, sp, -4 # sp-=4
sw ra, (sp) # mem[sp] = ra # push ra to stack
addi sp, sp, -4 # sp-=4
sw a1, (sp) # mem[sp] = a1 # push a1 to stack, save start
addi sp, sp, -4 # sp-=4
sw a2, (sp) # mem[sp] = a2 # push a2 to stack, save end
addi sp, sp, -4 # sp-=4
sw t1, (sp) # mem[sp] = t1 # push t1 to stack, save i
addi a2, t1, -4 # a2 = i-4, a parameter for recursive call
jal ra , QuickSort
lw t1, (sp) # pop i form stack
addi sp, sp, 4 # sp+=4
lw a2, (sp) # pop end form stack
addi sp, sp, 4 # sp+=4
lw a1, (sp) # pop start form stack
addi sp, sp, -4 # sp-=4
sw a2, (sp) # mem[sp] = a2 # push a2 to stack, save end
addi sp, sp, -4 # sp-=4
sw t1, (sp) # mem[sp] = t1 # push t1 to stack, save i
addi a1, t1, 4 # a1 = i+4, a parameter for recursive call
jal ra , QuickSort
lw t1, (sp) # pop i form stack
addi sp, sp, 4 # sp+=4
lw a2, (sp) # pop end form stack
addi sp, sp, 4 # sp+=4
lw a1, (sp) # pop start form stack
addi sp, sp, 4 # sp+=4
lw ra, (sp) # pop ra form stack
addi sp, sp, 4 # sp+=4
QuickSortReturn: # 函数结尾
jalr zero, ra, 0 # 返回
#
# QuickSort函数的等效C代码:
# void QuickSort(int *lst, int start, int end){
# if(end>start){
# int i = start,j = end,key = lst[start];
# while(i < j){
# for (;i < j && key <= lst[j];j--);
# lst[i] = lst[j];
# for (;i < j && key >= lst[i];i++);
# lst[j] = lst[i];
# }
# lst[i] = key;
# QuickSort(lst, start, i - 1);
# QuickSort(lst, i + 1, end);
# }
# }
#
#
|
WangXuan95/USTC-RVSoC | 1,598 | asm-code/calculation-test/Fibonacci.S | # 概述：递归计算斐波那契数列的第n个数
# Author: WangXuan
#
# 系统要求：1、具有一个大小至少为0x400 Byte的数据RAM （该程序中，其高地址用作栈）
# 2、请根据实际情况将a0设置为你的DataRam的地址，例如我的SoC DataRam起始地址为0x00010000，则我第一个指令是lui sp, 0x00010
#
.org 0x0
.global _start
_start:
lui a0, 0x00010 # 设置DataRam的起始地址为0x00010000，也用作被排序数组的起始地址是，即DataRam的起始地址
addi sp, a0, 0x400 # 为栈分配0x400Byte的空间
or t0, zero, 8 # t0 = 8
jal ra, Fibonacci # 计算 fib(8) = 34 = 0x22
sw t1, (a0) # 计算结果放在DataRam的首地址
infinity_loop:
jal zero, infinity_loop # 排序结束，死循环
Fibonacci: # 递归计算斐波那契数列的第n项，
# n放在t0寄存器中
# 结果放在t1寄存器中
# 使用ra作为返回地址，并使用堆栈，堆栈指针为sp
ori t4, zero, 3 # t4 = 3
bgeu t0, t4, tag # if t0>=t4(3), jmp to tag
ori t1, t0, 0 # t1 = t0
jalr zero, ra, 0 # pc = ra
tag:
addi t0, t0, -1 # t0--
addi sp, sp, -4 # sp-=4 # push ra to stack
sw ra, (sp) # mem[sp] = ra
addi sp, sp, -4 # sp-=4 # push t0 to stack
sw t0, (sp) # mem[sp] = t0
jal ra, Fibonacci # 计算 Fib(n-1)
lw t0, (sp) # t0=mem[sp] # pop t0 from stack
addi t0, t0, -1 # t0--
sw t1, (sp) # mem[sp] = t1
jal ra, Fibonacci # 计算 Fib(n-2)
lw t2, (sp) # ra=mem[sp] # pop t2 from stack
addi sp, sp, 4 # sp+=4
add t1, t1, t2 # t1+=t2
lw ra, (sp) # ra=mem[sp] # pop ra from stack
addi sp, sp, 4 # sp+=4
jalr zero, ra,0 # pc = ra
|
WangXuan95/USTC-RVSoC | 1,623 | asm-code/calculation-test/MatMul.S | # 伪矩阵乘法 汇编代码
# 我们的 RV32I CPU 没有实现乘法指令，所以在伪矩阵乘法中，使用按位或代替加法，用加法代替乘法，完成矩阵运算。
# 虽然不是真的矩阵乘法，但能够模仿矩阵乘法对RAM的访问过程，对cache的性能研究起到作用
#
.org 0x0
.global _start
_start:
xori a4, zero, 4 # a4寄存器决定了计算的规模，矩阵规模=N*N，N=2^a4。例如a4=4，则矩阵为 2^4=16阶方阵。该值可以修改。当然，矩阵规模变化后，DataRam的内存分配方式也要同步的变化，才能运行出正确结果
# 以下指令计算3个矩阵（目的矩阵，源矩阵1，源矩阵2）在内存中的起始地址。
# 这三个矩阵在内存中顺序而紧挨着存放，例如 a4=4，则N=16，则每个矩阵占N*N=256个字，即1024个字节
# 则 目的矩阵起始地址为0， 源矩阵1起始地址为1024， 源矩阵2起始地址为2048
# 目的矩阵起始地址放在a2里，源矩阵1起始地址放在a0里，源矩阵2起始地址放在a1里
xori a3, zero, 4
sll a3, a3 , a4
xor a2, zero, zero
sll a0, a3 , a4
add a1, a0 , a0
# 开始矩阵乘法，使用伪矩阵乘法公式：c_{ij} = \sigma c_{ik}*b{kj} ， 循环嵌套顺序（从内向外）为 i,j,k 。 分别使用 t0,t1,t2 存放 i,j,k
xor t0, zero, zero
MatMulLoopI:
xor t1, zero, zero
MatMulLoopJ:
xor t3, zero, zero #用t3存放最内求和循环的累加和，首先将t3清零
xor t2, zero, zero
MatMulLoopK:
sll t4, t0, a4
add t4, t4, t2
add t4, t4, a0
lw t4, (t4)
sll t5, t2, a4
add t5, t5, t1
add t5, t5, a1
lw t5, (t5)
and t4, t4, t5
add t3, t3, t4
addi t2, t2, 4
blt t2, a3, MatMulLoopK
sll t4, t0, a4
add t4, t4, t1
add t4, t4, a2
sw t3, (t4)
addi t1, t1, 4
blt t1, a3, MatMulLoopJ
addi t0, t0, 4
blt t0, a3, MatMulLoopI
# 计算结束，死循环
InfLoop:
jal zero, InfLoop
|
WangXuan95/USTC-RVSoC | 3,329 | asm-code/calculation-test/SimpleSprintf.S | # 概述：实现一个简单的 sprintf 函数，支持 %c %s %u %d 格式化串
# 以 a0 寄存器为目的地址，a1 寄存器为格式字符串地址，a2为起始指针的内存里有待格式化的参数，所有参数以4字节对齐
# Author: WangXuan
#
# 系统要求：1、具有一个大小至少为0x400 Byte的数据RAM （该程序中，其高地址用作栈，低地址用作被排序的数组）
# 2、测试该代码时，不需要初始化DataRam，只需要将指令流烧入InstrRam。因为有一系列指令去准备被排序的数组。
# 3、请根据实际情况将a0设置为你的DataRam的地址，例如我的SoC DataRam起始地址为0x00010000，则第一条指令就是 lui a0, 0x00010
#
.org 0x0
.global _start
_start:
main: # main函数开始，在DataRam里初始化一段数据
lui a0, 0x00020 # 设置DataRam的起始地址为0x00020000，即显存RAM，也用作
lui a2, 0x00010
addi sp, a2 , 0x400 # 设置栈顶指针 = 0x00010400
auipc a1, 0x00000 # 获取当前的PC值，目的是能够推算出以下的.string的起始地址
jal zero, AfterString1 # 跳转到以下.string 之后，因为string是一个指令RAM中的数据，不能被执行
.string "(a2):%s (a2+4):%c\0" # 在指令RAM中实现一个string，该string作为sprintf的格式串，在之后调用sprintf时被使用，为了与C语言sprintf一致，显式规定以\0结尾
.align 4 # 下一条指令以4字节对齐
AfterString1:
addi a1, a1, 0x08 # 将a1+8,以得到真正的.string的起始地址
auipc a3, 0x00000 # 获取当前的PC值，目的是能够推算出以下的.string的起始地址
jal zero, AfterString2 # 跳转到以下.string 之后，因为string是一个指令RAM中的数据，不能被执行
.string "hello!\0" # 在指令RAM中实现另一个string
.align 4 # 下一条指令以4字节对齐
AfterString2:
addi a3, a3 , 0x08 # 将a3+8,以得到真正的.string的起始地址
sw a3, (a2)
ori a3, zero, 'a'
sw a3, 4(a2)
jal ra, SimpleSprintf
infinity_loop:
jal zero, infinity_loop # 死循环
SimpleSprintf:
# 以 a0 寄存器为目的地址，a1 寄存器为格式字符串地址，a2为起始指针的内存里有待格式化的参数，所有参数以4字节对齐
# 在调用该函数时，需要准备a0，a1两个寄存器，并在栈中从后向前的(cdecl调用顺序) push 参数
or t0, zero, zero # t0 清零
SimpleSprintfLoopStart:
or t1, t0, zero # 备份t0到t1
lbu t0, (a1)
sb t0, (a0)
addi a1, a1, 1
addi a0, a0, 1
bne t0, zero, DontReturn # 如果没遇到遇到\0，就跳过函数返回
jalr zero, ra, 0 # 遇到\0，函数返回
DontReturn:
ori t2, zero, '%'
bne t1, t2, SimpleSprintfLoopStart # 如果t1!='%'，说明还没碰到需要格式化打印的情况，跳到函数开始去循环执行
addi a0, a0, -1 # 目的字符串指针回退一步，回到%之后
ori t2, zero, 'c'
bne t0, t2, NotC
lw t2, (a2) # 从a2地址中获得一个参数
addi a2, a2, 4
sb t2, -1(a0) # 向目标字符串中写入
jal zero, SimpleSprintfLoopStart
NotC:
ori t2, zero, 's'
bne t0, t2, NotS
lw t2, (a2) # 从a2地址中获得一个参数
addi a2, a2, 4
StringCopystart:
lbu t3, (t2)
beq t3, zero, SimpleSprintfLoopStart
addi t2, t2, 1
sb t3, -1(a0)
addi a0, a0, 1
jal zero, StringCopystart
NotS:
ori t2, zero, 'd'
bne t0, t2, NotD
lw t2, (a2) # 从a2地址中获得一个参数
addi a2, a2, 4
jal zero, SimpleSprintfLoopStart
NotD:
ori t2, zero, 'u'
bne t0, t2, NotU
lw t2, (a2) # 从a2地址中获得一个参数
addi a2, a2, 4
jal zero, SimpleSprintfLoopStart
NotU:
ori t2, zero, 'x'
bne t0, t2, SimpleSprintfLoopStart
lw t2, (a2) # 从a2地址中获得一个参数
addi a2, a2, 4
jal zero, SimpleSprintfLoopStart
|
WangXuan95/USTC-RVSoC | 8,562 | asm-code/calculation-test/QuickSort.S | # 概述：对数组进行原地快速排序
# Author: WangXuan
#
# 系统要求：1、具有一个大小至少为0x400 Byte的数据RAM （该程序中，其高地址用作栈，低地址用作被排序的数组）
# 2、测试该代码时，不需要初始化DataRam，只需要将指令流烧入InstrRam。因为有一系列指令去准备被排序的数组。
# 3、请根据实际情况将a0设置为你的DataRam的地址，例如我的SoC DataRam起始地址为0x00010000，则第一条指令就是 lui a0, 0x00010
#
.org 0x0
.global _start
_start:
main: # main函数开始，在DataRam里初始化一段数据，然后调用QuickSort进行排序，排序后进入死循环。请使用仿真或UART调试器查看排序后的数据
lui a0, 0x00010 # 设置DataRam的起始地址为0x00010000，也用作被排序数组的起始地址是，即DataRam的起始地址
addi sp, a0 , 0x400 # 设置栈顶指针
or a2, a0, zero
addi t0, zero, -3 # 用一系列指令向a0里写入被排序的数组，可以是负数
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 0
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 2
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -6
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 8
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -5
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 7
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 0
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 3
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -1
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 4
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, 9
sw t0, (a2)
addi a2, a2, 4
addi t0, zero, -8
sw t0, (a2)
or a1, zero, zero # 准备函数参数，a1=0
sub a2, a2, a0 # 准备函数参数，a2=数组最后一个元素的地址偏移
jal ra , QuickSort # 开始排序
infinity_loop:
jal zero, infinity_loop # 排序结束，死循环
QuickSort:
# 函数:QuickSort：以a0为基地址的原地升序快速排序，a1是start即开始下标，a2是end即结束下标
# 例: a0=0x00000100，a1=0, a2=32，则计算从0x00000100开始的32个4Byte数的快速排序
# 注: 以有符号数为比较标准。例如0xffffffff应该排在0x00000001前面，因为0xffffffff代表-1，比1要小
# 之所以使用低13位，因为13位二进制数取值范围位0~8191，不会超过4位十进制数
# 改变数据RAM： 除了被排序的数组外，还使用了以sp寄存器为栈顶指针的栈。使用栈的大小根据排序长度而不同，调用前合理设置sp的值以防爆栈
# 改变的寄存器： t0, t1, t2, t3, t4
bge a1, a2, QuickSortReturn # if a1>=a2, end<=start, jump to return
or t1, a1, zero # t1=i=a1=start
or t2, a2, zero # t2=j=a2=end
add t0, a0, t1 #
lw t0, (t0) # t0=key=lst[start]
PartationStart:
PartationFirstStart: # start of for loop
bge t1, t2, PartationEnd # if i>=j, branch to next step
add t3, a0, t2 #
lw t3, (t3) # t3=lst[j]
blt t3, t0, PartationFirstEnd # if lst[j]<key, branch to next step
addi t2, t2, -4 # t2-=4 j--
jal zero, PartationFirstStart # for loop
PartationFirstEnd: # end of for loop
add t4 , a0, t1 # t4=lst+i
sw t3 , (t4) # lst[i] = t3 = lst[j]
PartationSecondStart: # start of for loop
bge t1, t2, PartationEnd # if i>=j, branch to next step
add t3, a0, t1 #
lw t3, (t3) # t3=lst[i]
blt t0, t3, PartationSecondEnd # if key<lst[i], branch to next step
addi t1, t1, 4 # t1+=4 i++
jal zero, PartationSecondStart # for loop
PartationSecondEnd: # end of for loop
add t4 , a0, t2 # t4=lst+j
sw t3 , (t4) # lst[j] = t3 = lst[i]
blt t1, t2, PartationStart # if t1<t2, branch to while start
PartationEnd:
add t4 , a0, t1 # t4=lst+i
sw t0 , (t4) # lst[i] = t0 = key
addi sp, sp, -4 # sp-=4
sw ra, (sp) # mem[sp] = ra # push ra to stack
addi sp, sp, -4 # sp-=4
sw a1, (sp) # mem[sp] = a1 # push a1 to stack, save start
addi sp, sp, -4 # sp-=4
sw a2, (sp) # mem[sp] = a2 # push a2 to stack, save end
addi sp, sp, -4 # sp-=4
sw t1, (sp) # mem[sp] = t1 # push t1 to stack, save i
addi a2, t1, -4 # a2 = i-4, a parameter for recursive call
jal ra , QuickSort
lw t1, (sp) # pop i form stack
addi sp, sp, 4 # sp+=4
lw a2, (sp) # pop end form stack
addi sp, sp, 4 # sp+=4
lw a1, (sp) # pop start form stack
addi sp, sp, -4 # sp-=4
sw a2, (sp) # mem[sp] = a2 # push a2 to stack, save end
addi sp, sp, -4 # sp-=4
sw t1, (sp) # mem[sp] = t1 # push t1 to stack, save i
addi a1, t1, 4 # a1 = i+4, a parameter for recursive call
jal ra , QuickSort
lw t1, (sp) # pop i form stack
addi sp, sp, 4 # sp+=4
lw a2, (sp) # pop end form stack
addi sp, sp, 4 # sp+=4
lw a1, (sp) # pop start form stack
addi sp, sp, 4 # sp+=4
lw ra, (sp) # pop ra form stack
addi sp, sp, 4 # sp+=4
QuickSortReturn: # 函数结尾
jalr zero, ra, 0 # 返回
#
# QuickSort函数的等效C代码:
# void QuickSort(int *lst, int start, int end){
# if(end>start){
# int i = start,j = end,key = lst[start];
# while(i < j){
# for (;i < j && key <= lst[j];j--);
# lst[i] = lst[j];
# for (;i < j && key >= lst[i];i++);
# lst[j] = lst[i];
# }
# lst[i] = key;
# QuickSort(lst, start, i - 1);
# QuickSort(lst, i + 1, end);
# }
# }
#
#
|
WangXuan95/USTC-RVSoC | 2,666 | asm-code/calculation-test/Number2Ascii.S | # 概述：数字转十进制ASCII码
# Author: WangXuan
#
# 系统要求：1、具有一个数据RAM
# 2、测试该代码时，不需要初始化DataRam，只需要将指令流烧入InstrRam。
# 3、请根据实际情况将a0设置为你的DataRam的地址，例如我的SoC 显存起始地址为0x00020000，则我将计算结果写入了0x00020000，在VGA上会显示转化之后的ASCII字符
#
.org 0x0
.global _start
_start:
ori a0, zero, 1395 # a0 = 1395
add a0, a0 , a0 # a0 = 2790
add a0, a0 , a0 # a0 = 5580
jal ra, Number2DecimalAscii # 调用函数Number2DecimalAscii计算 a0 的十进制ASCII，结果应该是 0x30383535，存在 a0 里
lui t0, 0x00020 # t0 = 0x00020000
sw a0, 4(t0) # a0写入(t0) （计算结果写入显存RAM）
infinity_loop:
jal zero, infinity_loop # 死循环
Number2DecimalAscii:
# 函数:Number2DecimalAscii：计算a0里低13位二进制数对应的十进制的ASCII码，存放在a0里
# 例: a0=0x12345678，其低13位为0x1678，即5752
# 则调用该函数后 a0=0x32353735，因为0x32, 0x35, 0x37, 0x35分别为2 5 7 5 的ASCII码
# 之所以使用低13位，因为13位二进制数取值范围位0~8191，不会超过4位十进制数
# 改变数据RAM： 无
# 改变的寄存器：a0, t0, t1, t2
# 调用方法：使用 jal ra, Number2DecimalAscii 指令调用，因为返回时需要用到 ra 寄存器作为返回地址
lui t0, 0x01fff # t0 = 0x01fff000
srl t0, t0 , 12 # t0 = 0x00001fff
and t0, a0 , t0 # t0 = t0 & a0
lui a0, 0x30303 # a0 = 0x30303000
ori a0, a0 , 0x030 # a0 = 0x30303030
ori t1, zero, 1000 # t1 = 1000
thousand:
bltu t0, t1 , thousand_next # if t0<1000 jump to thousand_next
addi t0, t0 , -1000 # t0 -= 1000
addi a0, a0 , 0x1 # a0 += 0x00000001
jal zero, thousand # jump to thousand
thousand_next:
ori t1, zero, 100 # t1 = 100
hundred:
bltu t0, t1 , hundred_next # if t0<100 jump to hundred_next
addi t0, t0 , -100 # t0 -= 100
addi a0, a0 , 0x100 # a0 += 0x00000100
jal zero, hundred
hundred_next:
lui t2, 0x00010 # t2 = 0x00010000
ori t1, zero, 10 # t1 = 10
ten:
bltu t0, t1 , ten_next # if t0<10 jump to ten_next
addi t0, t0 , -10 # t0 -= 10
add a0, a0 , t2 # a0 += 0x00010000
jal zero, ten
ten_next:
lui t2, 0x01000 # t2 = 0x01000000
ori t1, zero, 1 # t1 = 1
one:
bltu t0, t1 , one_next # if t0<1 jump to one_next
addi t0, t0 , -1 # t0 -= 1
add a0, a0 , t2 # a0 += 0x01000000
jal zero, one
one_next:
jalr zero, ra, 0
|
WangXuan95/USTC-RVSoC | 1,135 | asm-code/io-test/vga_hello.S | .org 0x0
.global _start
_start:
print_hello:
# 第一步：令t0寄存器=0x00030000，即user_uart外设的地址
or t0, zero,zero # t0 清零
lui t0, 0x00020 # t0 寄存器的高20bit=0x00020
# 第二步：将hello!逐个字符写入user_uart外设，即打印hello!到uart
ori t1, zero, 0x068 # t1='h'的ASCII码
sb t1, (t0) # t1写入t0地址
addi t0, t0 , 0x001 # t0+1
ori t1, zero, 0x065 # t1='e'的ASCII码
sb t1, (t0) # t1写入t0地址
addi t0, t0 , 0x001 # t0+1
ori t1, zero, 0x06c # t1='l'的ASCII码
sb t1, (t0) # t1写入t0地址
addi t0, t0 , 0x001 # t0+1
ori t1, zero, 0x06c # t1='l'的ASCII码
sb t1, (t0) # t1写入t0地址
addi t0, t0 , 0x001 # t0+1
ori t1, zero, 0x06f # t1='o'的ASCII码
sb t1, (t0) # t1写入t0地址
addi t0, t0 , 0x001 # t0+1
ori t1, zero, 0x021 # t1='!'的ASCII码
sb t1, (t0) # t1写入t0地址
# 第三步：延时，通过大空循环的方式
lui t2, 0x00c00 # t2 = 0x00c00000
big_loop:
addi t2, t2, -1 # t2 = t2-1
bne t2, zero, big_loop # if t2!=0, jmp to big_loop
jal zero, print_hello # 大循环结束，跳到print_hello，重复打印
|
WangXuan95/USTC-RVSoC | 966 | asm-code/io-test/uart_print.S | .org 0x0
.global _start
_start:
# 第一步：令t0寄存器=0x00030000，即user_uart外设的地址
or t0, zero,zero # t0 清零
lui t0, 0x00030 # t0 寄存器的高20bit=0x00020
# 第二步：将hello!逐个字符写入user_uart外设，即打印hello!到uart
print_hello:
ori t1, zero, 0x068 # t1='h'的ASCII码
sb t1, (t0) # t1写入t0地址
ori t1, zero, 0x065 # t1='e'的ASCII码
sb t1, (t0) # t1写入t0地址
ori t1, zero, 0x06c # t1='l'的ASCII码
sb t1, (t0) # t1写入t0地址
ori t1, zero, 0x06c # t1='l'的ASCII码
sb t1, (t0) # t1写入t0地址
ori t1, zero, 0x06f # t1='o'的ASCII码
sb t1, (t0) # t1写入t0地址
ori t1, zero, 0x00a # t1='\n'的ASCII码
sb t1, (t0) # t1写入t0地址
# 第三步：延时，通过大空循环的方式
lui t2, 0x00c00 # t2 = 0x00c00000
big_loop:
addi t2, t2, -1 # t2 = t2-1
bne t2, zero, big_loop # if t2!=0, jmp to big_loop
jal zero, print_hello # 大循环结束，跳到print_hello，重复打印
|
wangyeee/STM32F4-FreeRTOS | 19,750 | hardware/startup_stm32f4xx.s | /**
******************************************************************************
* @file startup_stm32f40_41xxx.s
* @author MCD Application Team
* @version V1.6.1
* @date 21-October-2015
* @brief STM32F40xxx/41xxx Devices vector table for GCC based toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system and the external SRAM mounted on
* STM324xG-EVAL board to be used as data memory (optional,
* to be enabled by user)
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
ldr r2, = _sccmram
b LoopFillZeroCcm
/* Zero fill the CCM segment */
FillZeroCcm:
movs r3, #0
str r3, [r2]
adds r2, r2, #4
LoopFillZeroCcm:
ldr r3, = _eccmram
cmp r2, r3
bcc FillZeroCcm
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FSMC_IRQHandler /* FSMC */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */
.word CRYP_IRQHandler /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */
.word FPU_IRQHandler /* FPU */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
.weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
.weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
.weak DMA1_Stream3_IRQHandler
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
.weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
.weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
.weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
.weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TIM8_BRK_TIM12_IRQHandler
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
.weak TIM8_UP_TIM13_IRQHandler
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
.weak TIM8_TRG_COM_TIM14_IRQHandler
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
.weak TIM8_CC_IRQHandler
.thumb_set TIM8_CC_IRQHandler,Default_Handler
.weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
.weak FSMC_IRQHandler
.thumb_set FSMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TIM6_DAC_IRQHandler
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
.weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
.weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
.weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
.weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
.weak ETH_IRQHandler
.thumb_set ETH_IRQHandler,Default_Handler
.weak ETH_WKUP_IRQHandler
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
.weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
.weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS_EP1_OUT_IRQHandler
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS_EP1_IN_IRQHandler
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS_WKUP_IRQHandler
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
.weak OTG_HS_IRQHandler
.thumb_set OTG_HS_IRQHandler,Default_Handler
.weak DCMI_IRQHandler
.thumb_set DCMI_IRQHandler,Default_Handler
.weak CRYP_IRQHandler
.thumb_set CRYP_IRQHandler,Default_Handler
.weak HASH_RNG_IRQHandler
.thumb_set HASH_RNG_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
WangYaohuii/CXL-SSD-Sim | 4,060 | ext/systemc/src/sysc/qt/md/axp.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
/* axp.s -- assembly support. */
.text
.align 4
.file 2 "axp.s"
.globl qt_block
.globl qt_blocki
.globl qt_abort
.globl qt_start
.globl qt_vstart
/*
** $16: ptr to function to call once curr is suspended
** and control is on r19's stack.
** $17: 1'th arg to (*$16)(...).
** $18: 2'th arg to (*$16)(...).
** $19: sp of thread to resume.
**
** The helper routine returns a value that is passed on as the
** return value from the blocking routine. Since we don't
** touch r0 between the helper's return and the end of
** function, we get this behavior for free.
*/
.ent qt_blocki
qt_blocki:
subq $30,80, $30 /* Allocate save area. */
stq $26, 0($30) /* Save registers. */
stq $9, 8($30)
stq $10,16($30)
stq $11,24($30)
stq $12,32($30)
stq $13,40($30)
stq $14,48($30)
stq $15,56($30)
stq $29,64($30)
.end qt_blocki
.ent qt_abort
qt_abort:
addq $16,$31, $27 /* Put argument function in PV. */
addq $30,$31, $16 /* Save stack ptr in outgoing arg. */
addq $19,$31, $30 /* Set new stack pointer. */
jsr $26,($27),0 /* Call helper function. */
ldq $26, 0($30) /* Restore registers. */
ldq $9, 8($30)
ldq $10,16($30)
ldq $11,24($30)
ldq $12,32($30)
ldq $13,40($30)
ldq $14,48($30)
ldq $15,56($30)
ldq $29,64($30)
addq $30,80, $30 /* Deallocate save area. */
ret $31,($26),1 /* Return, predict===RET. */
.end qt_abort
/*
** Non-varargs thread startup.
*/
.ent qt_start
qt_start:
addq $9,$31, $16 /* Load up `qu'. */
addq $10,$31, $17 /* ... user function's `pt'. */
addq $11,$31, $18 /* ... user function's `userf'. */
addq $12,$31, $27 /* ... set procedure value to `only'. */
jsr $26,($27),0 /* Call `only'. */
jsr $26,qt_error /* `only' erroniously returned. */
.end qt_start
.ent qt_vstart:
qt_vstart:
/* Call startup function. */
addq $9,$31, $16 /* Arg0 to `startup'. */
addq $12,$31, $27 /* Set procedure value. */
jsr $26,($27),0 /* Call `startup'. */
/* Call user function. */
ldt $f16, 0($30) /* Load fp arg regs. */
ldt $f17, 8($30)
ldt $f18,16($30)
ldt $f19,24($30)
ldt $f20,32($30)
ldt $f21,40($30)
ldq $16,48($30) /* And integer arg regs. */
ldq $17,56($30)
ldq $18,64($30)
ldq $19,72($30)
ldq $20,80($30)
ldq $21,88($30)
addq $30,96 $30 /* Pop 6*2*8 saved arg regs. */
addq $11,$31, $27 /* Set procedure value. */
jsr $26,($27),0 /* Call `vuserf'. */
/* Call cleanup. */
addq $9,$31, $16 /* Arg0 to `cleanup'. */
addq $0,$31, $17 /* Users's return value is arg1. */
addq $10,$31, $27 /* Set procedure value. */
jsr $26,($27),0 /* Call `cleanup'. */
jsr $26,qt_error /* Cleanup erroniously returned. */
.end qt_start
/*
** Save calle-save floating-point regs $f2..$f9.
** Also save return pc from whomever called us.
**
** Return value from `qt_block' is the same as the return from
** `qt_blocki'. We get that for free since we don't touch $0
** between the return from `qt_blocki' and the return from
** `qt_block'.
*/
.ent qt_block
qt_block:
subq $30,80, $30 /* Allocate a save space. */
stq $26, 0($30) /* Save registers. */
stt $f2, 8($30)
stt $f3,16($30)
stt $f4,24($30)
stt $f5,32($30)
stt $f6,40($30)
stt $f7,48($30)
stt $f8,56($30)
stt $f9,64($30)
jsr $26,qt_blocki /* Call helper. */
/* .. who will also restore $gp. */
ldq $26, 0($30) /* restore registers. */
ldt $f2, 8($30)
ldt $f3,16($30)
ldt $f4,24($30)
ldt $f5,32($30)
ldt $f6,40($30)
ldt $f7,48($30)
ldt $f8,56($30)
ldt $f9,64($30)
addq $30,80, $30 /* Deallcate save space. */
ret $31,($26),1 /* Return, predict===RET. */
.end qt_block
|
WangYaohuii/CXL-SSD-Sim | 18,062 | ext/systemc/src/sysc/qt/md/powerpc_sys5.s | /* powerpc-sys5.s -- assembly support. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
* PowerPC-System V thread switching module.
*
* This software is largely based on the original PowerPC-Linux porting
* developed by Ken Aaker <kenaaker@silverbacksystems.com>
*
* Marco Bucci <marco.bucci@inwind.it>
* December 2002
*
*/
/*
*
* PowerPC Register convections:
*
* r0 volatile
* r1 SP
* r2 system reserved
* r3-r4 volatile for parameter passing and function return
* r5-r10 volatile for parameter passing
* r11-r12 volatile
* r13-r14 non volatile registers
* f0 volatile
* f1 volatile for parameter passing and function return
* f2-f13 volatile for parameter passing
* f14-f31 non volatile
*
* cr2-cr4 non volatile
*
*
* See on the heather file for more documentation.
*
*
*
* IMPLEMENTATION NOTES
*
*
* 1) Condition register saving
* On most machines, the condition code register is caller-save.
* On the PPC, the condition code register is callee-save, so the
* thread context switch must preserve it.
*
*
* 2) Floating point registers saving
* On resuming a thread, floating point registers are or not restored just
* depending on which block routine suspended the thread (i.e. regardless
* whether "qt_block", "qt_blocki" or "qt_abort" is used to resume it).
* This behaviour is obtained by implementing "qt_block" by means af a nested
* call to "qt_blocki". As a result, the blocking of a thread always goes
* and returns through "qt_blocki and, if a thread was blocked by "qt_block",
* its execution resumes from the floating point restoring code on exit
* of "qt_block".
*
* Thanks to David Keppel that explained me this "simple" trick.
*
*
* 3) C languace code debugging
* The original version of this software was developed and debugged under
* MacOS X using the Metrowerks Code Warrior PPC integrated assembler.
* It could be still used with a C inline assembler by means of a suitable
* file to include it.
* In order to avoid "copy and paste" bugs, and make easyer the maintaining,
* I made the minimal changes, so you can find some strange code as:
*
* #if 0
* .if 0
* C code here
* .endif
* #endif
*
* This is just to embed some C code that is needed by the Code Warrior
* integrated assembler.
*
*
* 4) Assembly constants generation
* Constants used in the assembly code are generated by running
* the C code in the sequel (commented). It uses the C macros declared in
* the C heather in order to guarantee that the C interface and the assebly
* code are "aligned". I avoided the use of an assebler preprocessor since
* they are not so standard and moreover using macro espressions makes the
* assembly debugging more difficult.
*
*
#include <iostream>
#include "powerpc_sys5.h"
int main()
{
using namespace std;
int i;
cout << ".set LR_SAVE, " << PPC_LR_SAVE << endl;
cout << ".set BLOCKI_FSIZE, " << QUICKTHREADS_BLOCKI_FRAME_SIZE << endl;
cout << ".set BLOCKI_CR_SAVE, " << QUICKTHREADS_BLOCKI_CR_SAVE << endl;
cout << ".set BLOCK_FSIZE, " << QUICKTHREADS_BLOCK_FRAME_SIZE << endl;
cout << endl;
for(i=0; i<12; i++)
cout << ".set PAR_" << i << ", " << PPC_PAR(i) << endl;
cout << endl;
i = 13;
cout << ".set GPR_SAVE_" << i << ", " << QUICKTHREADS_BLOCKI_GPR_SAVE(i) << endl;
cout << endl;
for(i=31; i>13; i--)
cout << ".set FPR_SAVE_" << i << ", " << QUICKTHREADS_BLOCK_FPR_SAVE(i) << endl;
cout << endl;
cout << ".set VARGS_BKOFF, " << QUICKTHREADS_VARGS_BKOFF << endl;
cout << endl << endl << endl;
for(i=31; i>13; i--)
cout << "\tstfd\tf" << i << ",FPR_SAVE_" << i << "(%r1)" << endl;
cout << endl;
for(i=31; i>13; i--)
cout << "\tlfd \tf" << i << ",FPR_SAVE_" << i << "(%r1)" << endl;
cout << endl << endl << endl;
return 0;
}
*
*
*
*/
#if 0
.text
.align 4
.globl qt_block
.globl _qt_block
.globl qt_blocki
.globl _qt_blocki
.globl qt_abort
.globl _qt_abort
.globl qt_start
.globl _qt_start
.globl qt_vstart
.globl _qt_vstart
.set LR_SAVE, 4
.set BLOCKI_FSIZE, 96
.set BLOCKI_CR_SAVE, 8 /* CR is saved into the callee's stack frame */
.set BLOCK_FSIZE, 160
.set PAR_0, 8
.set PAR_1, 12
.set PAR_2, 16
.set PAR_3, 20
.set PAR_4, 24
.set PAR_5, 28
.set PAR_6, 32
.set PAR_7, 36
.set PAR_8, 40
.set PAR_9, 44
.set PAR_10, 48
.set PAR_11, 52
.set GPR_SAVE_13, 20
.set FPR_SAVE_31, 152
.set FPR_SAVE_30, 144
.set FPR_SAVE_29, 136
.set FPR_SAVE_28, 128
.set FPR_SAVE_27, 120
.set FPR_SAVE_26, 112
.set FPR_SAVE_25, 104
.set FPR_SAVE_24, 96
.set FPR_SAVE_23, 88
.set FPR_SAVE_22, 80
.set FPR_SAVE_21, 72
.set FPR_SAVE_20, 64
.set FPR_SAVE_19, 56
.set FPR_SAVE_18, 48
.set FPR_SAVE_17, 40
.set FPR_SAVE_16, 32
.set FPR_SAVE_15, 24
.set FPR_SAVE_14, 16
/* various offsets used by "qt_varg" */
.set P_T, PAR_0
.set P_STARTUP, PAR_1
.set P_USERF, PAR_2
.set P_CLEANUP, PAR_3
/* the offset used to move back the linkage area to be adiacent to
* the variant argument list before calling "userf(...).
* Skip "t", "startup", "userf", "cleanup" and first
* 8 parameters (since they are passed via registers) */
.set VARGS_BKOFF, 48
/* location where "t" and "cleanup" are saved (with respect of
* the stack frame base) */
.set P_T_SAVE, -4
.set P_CLEANUP_SAVE, -8
#endif
/* Block the current thread saving all integer non volatile registers and
* start a new thread.
*/
#if 0
.if 0
#endif
void *qt_blocki (void *helper, void *a0, void *a1, void *newthread);
asm void *qt_blocki (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
#if 0
qt_blocki:
_qt_blocki:
#endif
/* prolog code */
stwu %r1,-BLOCKI_FSIZE(%r1) /* allocate the stack frame */
mflr %r0 /* return addr in r0 */
mfcr %r11 /* CR in r11 */
stw %r0,LR_SAVE+BLOCKI_FSIZE(%r1) /* save return addr in the stack */
stw %r11,BLOCKI_CR_SAVE(%r1) /* save CR in the stack */
stmw %r13,GPR_SAVE_13(%r1) /* save non-volatile reg */
/* call helper(qt_t *old, void *a0, void *a1) */
mtlr %r3 /* "helper" addr in the link reg */
mr %r3,%r1 /* current thread (i.e. the SP) in arg "old" */
mr %r1,%r6 /* swap to the new thread (i.e. to its SP) */
blrl /* jump to "helper" */
/* the "helper" return value is returned (since r3 is not changed) */
/* epilog code: return to the new thread's "qt_blocki" caller */
lmw %r13,GPR_SAVE_13(%r1) /* restore non-volatile reg */
lwz %r0,LR_SAVE+BLOCKI_FSIZE(%r1) /* recover return addr */
lwz %r11,BLOCKI_CR_SAVE(%r1) /* recover CR */
mtlr %r0 /* return address in the link reg */
mtcr %r11 /* restore CR */
addi %r1,%r1,BLOCKI_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Abort the current thread and start a new thread.
*/
#if 0
.if 0
#endif
void qt_abort (void *helper, void *a0, void *a1, void *newthread);
asm void qt_abort (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
#if 0
qt_abort:
_qt_abort:
#endif
/* prolog code */
/* there is no prolog. It will never come back */
/* call helper(qt_t *old, void *a0, void *a1) */
mtlr %r3 /* "helper" addr in the link reg */
mr %r1,%r6 /* swap to the new thread (i.e. to its SP) */
/* we don't need to set "old", we can pass just garbage. Actually, since r3
is not changed, "old" is set to "helper" (don't care) */
blrl /* call "helper" */
/* the "helper" return value is returned (since r3 is not changed) */
/* epilog code: return to the new thread's "qt_blocki" caller */
lmw %r13,GPR_SAVE_13(%r1) /* restore non-volatile reg */
lwz %r0,LR_SAVE+BLOCKI_FSIZE(%r1) /* recover return addr */
lwz %r11,BLOCKI_CR_SAVE(%r1) /* recover CR */
mtlr %r0 /* return address in the link reg */
mtcr %r11 /* restore CR */
addi %r1,%r1,BLOCKI_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Block the current thread saving all non volatile registers and start
* a new thread.
*/
#if 0
.if 0
#endif
void *qt_block (void *helper, void *a0, void *a1, void *newthread);
asm void *qt_block (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
# if 0
qt_block:
_qt_block:
#endif
/* prolog code */
stwu %r1,-BLOCK_FSIZE(%r1) /* allocate the stack frame */
mflr %r0 /* return addr in r0 */
stw %r0,LR_SAVE+BLOCK_FSIZE(%r1) /* save return addr in the stack */
/* save non-volatile fp reg */
stfd %f31,FPR_SAVE_31(%r1)
stfd %f30,FPR_SAVE_30(%r1)
stfd %f29,FPR_SAVE_29(%r1)
stfd %f28,FPR_SAVE_28(%r1)
stfd %f27,FPR_SAVE_27(%r1)
stfd %f26,FPR_SAVE_26(%r1)
stfd %f25,FPR_SAVE_25(%r1)
stfd %f24,FPR_SAVE_24(%r1)
stfd %f23,FPR_SAVE_23(%r1)
stfd %f22,FPR_SAVE_22(%r1)
stfd %f21,FPR_SAVE_21(%r1)
stfd %f20,FPR_SAVE_20(%r1)
stfd %f19,FPR_SAVE_19(%r1)
stfd %f18,FPR_SAVE_18(%r1)
stfd %f17,FPR_SAVE_17(%r1)
stfd %f16,FPR_SAVE_16(%r1)
stfd %f15,FPR_SAVE_15(%r1)
stfd %f14,FPR_SAVE_14(%r1)
/* block the thread */
bl qt_blocki
/* the thread is going to be resumed */
/* restore non-volatile fp reg */
lfd %f31,FPR_SAVE_31(%r1)
lfd %f30,FPR_SAVE_30(%r1)
lfd %f29,FPR_SAVE_29(%r1)
lfd %f28,FPR_SAVE_28(%r1)
lfd %f27,FPR_SAVE_27(%r1)
lfd %f26,FPR_SAVE_26(%r1)
lfd %f25,FPR_SAVE_25(%r1)
lfd %f24,FPR_SAVE_24(%r1)
lfd %f23,FPR_SAVE_23(%r1)
lfd %f22,FPR_SAVE_22(%r1)
lfd %f21,FPR_SAVE_21(%r1)
lfd %f20,FPR_SAVE_20(%r1)
lfd %f19,FPR_SAVE_19(%r1)
lfd %f18,FPR_SAVE_18(%r1)
lfd %f17,FPR_SAVE_17(%r1)
lfd %f16,FPR_SAVE_16(%r1)
lfd %f15,FPR_SAVE_15(%r1)
lfd %f14,FPR_SAVE_14(%r1)
lwz %r0,LR_SAVE+BLOCK_FSIZE(%r1) /* recover return addr */
mtlr %r0 /* return address in the link reg */
addi %r1,%r1,BLOCK_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Start a single argument thread using parameters preloaded in the stack
* during thread initialization (see comments on stack initialization in the
* heather file).
*
* Executes:
*
* only(u, t, userf);
*/
#if 0
.if 0
#endif
void qt_start(void);
asm void qt_start(void)
{
#if 0
.endif
#endif
#if 0
qt_start:
_qt_start:
#endif
lwz %r3,PAR_0(%r1) /* "u" in r3 */
lwz %r4,PAR_1(%r1) /* "t" in r4 */
lwz %r5,PAR_2(%r1) /* "userf" in r5 */
lwz %r6,PAR_3(%r1) /* "only" in r6 */
mtlr %r6 /* "only" address in the link reg */
/* call only(u, t, userf) */
blrl /* jump to "only" */
/* error if it returns */
b qt_error
/* dead code (some inline asm "wants" the epilog, or they genetare it) */
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Start a variant argument thread using parameters preloaded in the stack
* during thread initialization (see comments on stack initialization in the
* heather file).
*
* Executes:
*
* startup(t);
* userf_return = userf(...);
* cleanup(pt, userf_return);
*
***** Stack layout on start *****
backchain -> STACK BOTTOM (higher address)
+==========================+
backchain - 4 -> | |
+ LOCAL VARIABLES AREA +
..............
+ +
| |
+--------------------------+
| |
+ ALIGNMEBNT PAD +
..............
+ (if needed) +
| |
+--------------------------+
| | arg(n)
+ +
| |
+ VARIABLE ARGUMENT LIST +
..............
+ for userf call +
SP + PAR(5) -> | | arg(1)
+ +
SP + PAR(4) -> | | arg(0)
+--------------------------+
SP + PAR(3) -> | | cleanup par
+ +
SP + PAR(2) -> | | userf par
+ PARAMETER AREA +
SP + PAR(1) -> | | startup par
+ +
SP + PAR(0) -> | | t par
+--------------------------+
| |
+ LINKAGE AREA +
SP -> | |
+==========================+
STACK TOP (lower address)
Stack grows down
|
V
***** Stack layout before call userf *****
backchain -> STACK BOTTOM (higher address)
+==========================+
backchain - 4 -> | |
+ LOCAL VARIABLES AREA +
..............
+ +
| |
+--------------------------+
| |
+ ALIGNMEBNT PAD +
..............
+ (if needed) +
| |
+--------------------------+
| | arg(n)
+ +
| |
+ VARIABLE ARGUMENT LIST +
..............
+ for userf call +
SP + PAR(1) -> | | arg(1)
+ +
SP + PAR(0) -> | | arg(0)
+--------------------------+
| |
+ LINKAGE AREA +
SP -> | |
+==========================+
STACK TOP (lower address)
Stack grows down
|
V
* To call "userf(...)", the argument list must be adiacent to the linkage
* area. Instead of copy the argument list, we move back the linkage area
* (actually, we just increase the SP and copy the backchain). "t" and
* "cleanup" are saved in a local variable area in order to call
* cleanup(pt, userf_return).
*/
#if 0
.if 0
#endif
void qt_vstart(void);
asm void qt_vstart(void)
{
#if 0
.endif
#endif
#if 0
qt_vstart:
_qt_vstart:
#endif
/* NOTICE: the callee routines could save parameter registers in the caller's
* stack parameter area. We put "t" in PAR(0) in such a way, if startup(t)
* will save "t", it will be saved on the same location thus not delething
* any other parameter.
*/
/* since we will move back the linckage area (to make it adiacent to the
* parameter list), we need to save "t" and "cleanup". We have made room for
* this on the bottom of the stack frame. */
/* save parameters in the local variable area */
lwz %r11,0(%r1) /* get the backchain */
lwz %r3,P_T(%r1)
lwz %r4,P_CLEANUP(%r1)
stw %r3,P_T_SAVE(%r11) /* save "pt" */
stw %r4,P_CLEANUP_SAVE(%r11) /* save "cleanup" */
/* call startup(t) */
lwz %r5,P_STARTUP(%r1)
mtlr %r5
blrl /* call "startup" */
/* call userf(...) */
lwz %r11,0(%r1) /* reload backchain (r11 is volatile) */
lwz %r4,P_USERF(%r1) /* load "userf" */
mtlr %r4
/* first eight parameter of the variant list must be copyed in
* GPR3-GPR10. There is a four places offset due to "t", "startup",
* userf" and "cleanup" */
lwz %r3,PAR_4(%r1)
lwz %r4,PAR_5(%r1)
lwz %r5,PAR_6(%r1)
lwz %r6,PAR_7(%r1)
lwz %r7,PAR_8(%r1)
lwz %r8,PAR_9(%r1)
lwz %r9,PAR_10(%r1)
lwz %r10,PAR_11(%r1)
/* move the linkage area to be adiacent to the argument list */
stw %r11,VARGS_BKOFF(%r1) /* copy backchain */
addi %r1,%r1,VARGS_BKOFF /* move back the stack */
blrl /* call "userf" */
/* call qt_cleanup(void *pt, void *vuserf_return) */
lwz %r11,0(%r1) /* reload backchain (r11 is volatile) */
mr %r4,%r3 /* push "userf" return as 2nd parameter */
lwz %r3,P_T_SAVE(%r11) /* reload "pt" */
lwz %r5,P_CLEANUP_SAVE(%r11) /* reload "cleanup" */
mtlr %r5
blrl
b qt_error
/* dead code (some inline asm "wants" the epilog, or they genetare it) */
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
|
WangYaohuii/CXL-SSD-Sim | 2,293 | ext/systemc/src/sysc/qt/md/iX86_64.s | /* iX386_64.s -- assembly support. */
/*
// QuickThreads -- Threads-building toolkit.
// Copyright (c) 1993 by David Keppel
//
// Permission to use, copy, modify and distribute this software and
// its documentation for any purpose and without fee is hereby
// granted, provided that the above copyright notice and this notice
// appear in all copies. This software is provided as a
// proof-of-concept and for demonstration purposes; there is no
// representation about the suitability of this software for any
// purpose. */
/* 64-bit Intel Architecture Support
// written by Andy Goodrich, Forte Design Systms, Inc. */
/* NOTE: double-labeled `_name' and `name' for System V compatability. */
/* NOTE: Mixed C/C++-style comments used. Sorry! */
.text
.align 2
.globl _qt_abort
.globl qt_abort
.globl _qt_block
.globl qt_block
.globl _qt_blocki
.globl qt_blocki
.globl _qt_align
.globl qt_align
_qt_abort:
qt_abort:
_qt_block:
qt_block:
_qt_blocki:
qt_blocki:
/* 11 (return address.) */
pushq %rbp /* 10 (push stack frame top.) */
movq %rsp, %rbp /* set new stack frame top. */
/* save registers. */
subq $8, %rsp /* 9 (Stack alignment) */
pushq %r12 /* 8 ... */
pushq %r13 /* 7 ... */
pushq %r14 /* 6 ... */
pushq %r15 /* 5 ... */
pushq %rbx /* 4 ... */
pushq %rcx /* 3 ... (new stack address) */
pushq %rdx /* 2 ... (arg) */
pushq %rdi /* 1 ... (address of save function.) */
pushq %rsi /* 0 ... (cor) */
movq %rdi, %rax /* get address of save function. */
movq %rsp, %rdi /* set current stack as save argument. */
movq %rcx, %rsp /* swap stacks. */
movq %rcx, %rbp /* adjust stack frame pointer. */
addq $10*8, %rbp /* ... */
call *%rax /* call function to save stack pointer. */
/* restore registers. */
popq %rsi /* ... */
popq %rdi /* ... */
popq %rdx /* ... */
popq %rcx /* ... */
popq %rbx /* ... */
popq %r15 /* restore registers from new stack. */
popq %r14 /* ... */
popq %r13 /* ... */
popq %r12 /* ... */
leave /* unwind stack. */
_qt_align:
qt_align:
ret /* return. */
|
WangYaohuii/CXL-SSD-Sim | 5,024 | ext/systemc/src/sysc/qt/md/sparc.s | /* sparc.s -- assembly support for the `qt' thread building kit. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
/* #include <machine/trap.h> */
.text
.align 4
.global _qt_blocki
.global _qt_block
.global _qt_abort
.global _qt_start
.global _qt_vstart
/* Register assignment:
// %o0: incoming `helper' function to call after cswap
// also used as outgoing sp of old thread (qt_t *)
// %o1, %o2:
// parameters to `helper' function called after cswap
// %o3: sp of new thread
// %o5: tmp used to save old thread sp, while using %o0
// to call `helper' f() after cswap.
//
//
// Aborting a thread is easy if there are no cached register window
// frames: just switch to the new stack and away we go. If there are
// cached register window frames they must all be written back to the
// old stack before we move to the new stack. If we fail to do the
// writeback then the old stack memory can be written with register
// window contents e.g., after the stack memory has been freed and
// reused.
//
// If you don't believe this, try setting the frame pointer to zero
// once we're on the new stack. This will not affect correctnes
// otherwise because the frame pointer will eventually get reloaded w/
// the new thread's frame pointer. But it will be zero briefly before
// the reload. You will eventually (100,000 cswaps later on a small
// SPARC machine that I tried) get an illegal instruction trap from
// the kernel trying to flush a cached window to location 0x0.
//
// Solution: flush windows before switching stacks, which invalidates
// all the other register windows. We could do the trap
// conditionally: if we're in the lowest frame of a thread, the fp is
// zero already so we know there's nothing cached. But we expect most
// aborts will be done from a first function that does a `save', so we
// will rarely save anything and always pay the cost of testing to see
// if we should flush.
//
// All floating-point registers are caller-save, so this routine
// doesn't need to do anything to save and restore them.
//
// `qt_block' and `qt_blocki' return the same value as the value
// returned by the helper function. We get this ``for free''
// since we don't touch the return value register between the
// return from the helper function and return from qt_block{,i}.
*/
_qt_block:
_qt_blocki:
sub %sp, 8, %sp /* Allocate save area for return pc. */
st %o7, [%sp+64] /* Save return pc. */
_qt_abort:
ta 0x03 /* Save locals and ins. */
mov %sp, %o5 /* Remember old sp w/o chng ins/locals. */
sub %o3, 96, %sp /* Allocate kwsa, switch stacks. */
call %o0, 0 /* Call `helper' routine. */
mov %o5, %o0 /* Pass old thread to qt_after_t() */
/* .. along w/ args in %o1 & %o2. */
/* Restore callee-save regs. The kwsa
// is on this stack, so offset all
// loads by sizeof(kwsa), 64 bytes.
*/
ldd [%sp+ 0+96], %l0
ldd [%sp+ 8+96], %l2
ldd [%sp+16+96], %l4
ldd [%sp+24+96], %l6
ldd [%sp+32+96], %i0
ldd [%sp+40+96], %i2
ldd [%sp+48+96], %i4
ldd [%sp+56+96], %i6
ld [%sp+64+96], %o7 /* Restore return pc. */
retl /* Return to address in %o7. */
add %sp, 104, %sp /* Deallocate kwsa, ret pc area. */
/* The function calling conventions say there has to be a 1-word area
// in the caller's stack to hold a pointer to space for aggregate
// return values. It also says there should be a 6-word area to hold
// %o0..%o5 if the callee wants to save them (why? I don't know...)
// Round up to 8 words to maintain alignment.
//
// Parameter values were stored in callee-save regs and are moved to
// the parameter registers.
*/
_qt_start:
mov %i1, %o0 /* `pu': Set up args to `only'. */
mov %i2, %o1 /* `pt'. */
mov %i4, %o2 /* `userf'. */
call %i5, 0 /* Call client function. */
sub %sp, 32, %sp /* Allocate 6-word callee space. */
call _qt_error, 0 /* `only' erroniously returned. */
nop
/* Same comments as `_qt_start' about allocating rounded-up 7-word
// save areas. */
_qt_vstart:
sub %sp, 32, %sp /* Allocate 7-word callee space. */
call %i5, 0 /* call `startup'. */
mov %i2, %o0 /* .. with argument `pt'. */
add %sp, 32, %sp /* Use 7-word space in varargs. */
ld [%sp+ 4+64], %o0 /* Load arg0 ... */
ld [%sp+ 8+64], %o1
ld [%sp+12+64], %o2
ld [%sp+16+64], %o3
ld [%sp+20+64], %o4
call %i4, 0 /* Call `userf'. */
ld [%sp+24+64], %o5
/* Use 6-word space in varargs. */
mov %o0, %o1 /* Pass return value from userf */
call %i3, 0 /* .. when call `cleanup. */
mov %i2, %o0 /* .. along with argument `pt'. */
call _qt_error, 0 /* `cleanup' erroniously returned. */
nop
|
WangYaohuii/CXL-SSD-Sim | 3,365 | ext/systemc/src/sysc/qt/md/powerpc_sys5_b.s | /* speed test for basic CPU operations */
/* Marco Bucci <marco.bucci@inwind.it> */
/* This code was developed with the Code Warrior integrate ppc assembler.
* Macros are use to hide illegal constructs whether you are using a
* "normal" assembler or the "C integrated" assembler.
*/
#if 0
.text
.align 4
.globl b_call_reg
.globl _b_call_reg
.globl b_call_imm
.globl _b_call_imm
.globl b_add
.globl _b_add
.globl b_load
.globl _b_load
.set fsize, 64
.set lrsave, 4
#else
#define fsize 64
#define lrsave 4
#endif
#if 0
.if 0
#endif
asm void b_null(void)
{
#if 0
.endif
#endif
#if 0
b_null:
#endif
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* actually the same as the following. How to get "b_null" address?
* I didnt find the right sintax or the right way.
* I should take the current PC, then the difference to "b_null"
* (making the difference beween the labels), perform the sum and go?!
*/
#if 0
.if 0
#endif
asm void b_call_reg(long n)
{
#if 0
.endif
#endif
#if 0
b_call_reg:
_b_call_reg:
#endif
mflr %r0
stw %r31,-4(%r1)
stw %r30,-8(%r1)
stw %r0,lrsave(%r1)
stwu %r1,-fsize(%r1)
mr %r30,%r3
li %r31,0
b L1
L0:
bl b_null
bl b_null
bl b_null
bl b_null
bl b_null
addi %r31,%r31,5
L1:
cmpw %r31,%r30
blt L0
lwz %r0,lrsave+fsize(%r1)
mtlr %r0
lwz %r31,-4+fsize(%r1)
lwz %r30,-8+fsize(%r1)
addi %r1,%r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_call_imm(long n)
{
#if 0
.endif
#endif
#if 0
b_call_imm:
_b_call_imm:
#endif
mflr %r0
stw %r31,-4(%r1)
stw %r30,-8(%r1)
stw %r0,lrsave(%r1)
stwu %r1,-fsize(%r1)
mr %r30,%r3
li %r31,0
b L3
L2:
bl b_null
bl b_null
bl b_null
bl b_null
bl b_null
addi %r31,%r31,5
L3:
cmpw %r31,%r30
blt L2
lwz %r0,lrsave+fsize(%r1)
mtlr %r0
lwz %r31,-4+fsize(%r1)
lwz %r30,-8+fsize(%r1)
addi %r1,%r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_add(long n)
{
#if 0
.endif
#endif
#if 0
b_add:
_b_add:
#endif
mflr %r0
stw %r31,-4(%r1)
stw %r30,-8(%r1)
stw %r0,lrsave(%r1)
stwu %r1,-fsize(%r1)
mr %r30,%r3
li %r31,0
b L5
L4:
addi %r3,%r3,5
addi %r4,%r4,5
addi %r5,%r5,5
addi %r6,%r6,5
addi %r7,%r7,5
addi %r3,%r3,5
addi %r4,%r4,5
addi %r5,%r5,5
addi %r6,%r6,5
addi %r7,%r7,5
addi %r31,%r31,10
L5:
cmpw %r31,%r30
blt L4
lwz %r0,lrsave+fsize(%r1)
mtlr %r0
lwz %r31,-4+fsize(%r1)
lwz %r30,-8+fsize(%r1)
addi %r1,%r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_load(long n)
{
#if 0
.endif
#endif
#if 0
b_load:
_b_load:
#endif
mflr %r0
stw %r31,-4(%r1)
stw %r30,-8(%r1)
stw %r0,lrsave(%r1)
stwu %r1,-fsize(%r1)
mr %r30,%r3
li %r31,0
b L7
L6:
lwz %r3,4(%r1)
lwz %r4,8(%r1)
lwz %r5,12(%r1)
lwz %r6,16(%r1)
lwz %r7,20(%r1)
lwz %r3,24(%r1)
lwz %r4,28(%r1)
lwz %r5,32(%r1)
lwz %r6,36(%r1)
lwz %r7,40(%r1)
addi %r31,%r31,10
L7:
cmpw %r31,%r30
blt L6
lwz %r0,lrsave+fsize(%r1)
mtlr %r0
lwz %r31,-4+fsize(%r1)
lwz %r30,-8+fsize(%r1)
addi %r1,%r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
|
WangYaohuii/CXL-SSD-Sim | 12,166 | ext/systemc/src/sysc/qt/md/ksr1.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.file "ksr1.s"
.def .debug; .endef
.align 128
.globl qt_blocki
.globl qt_blocki$TXT
.globl qt_block
.globl qt_block$TXT
.globl qt_start$TXT
.globl qt_start
.globl qt_abort$TXT
.globl qt_abort
.globl qt_vstart
.globl qt_vstart$TXT
#
# KSR convention: on procedure calls, load both the procedure address
# and a pointer to a constant block. The address of function `f' is
# `f$TXT', and the constant block address is `f'. The constant block
# has several reserved values:
#
# 8 bytes fpu register save mask
# 4 bytes ipu register save mask
# 4 bytes ceu register save mask
# f: f$TXT
# ... whatever you want ... (not quite...read on)
#
# Note, by the way, that a pointer to a function is passed as a
# pointer to the constant area, and the constant area has the text
# address.
#
#
# Procedures that do not return structures prefix their code with
#
# proc$TXT:
# finop; cxnop
# finop; cxnop
# <proc code>
#
# Calls to those procedures branch to a 16 byte offset (4 instrs) in
# to the procedure to skip those instructions.
#
# Procedures that return structures use a different code prefix:
#
# proc$TXT:
# finop; beq.qt %rc, %rc, 24 # return value entry
# finop; cxnop
# finop; movi8 0, %rc # no return value entry
# <proc code>
#
# Calls that want the returned structure branch directly to the
# procedure address. Callers that don't want (or aren't expecting) a
# return value branche 16 bytes in to the procedure, which will zero
# %rc, telling the called procedure not to return a structure.
#
#
# On entry:
# %i2 -- control block of helper function to run
# (dereference to get helper)
# %i3 -- a1
# %i4 -- a2
# %i5 -- sp of new to run
#
.data
.half 0x0, 0x0, 0x7ffff000, 0x7fff8000
qt_blocki:
qt_abort:
.word qt_blocki$TXT
.word qt_restore$TXT
.text
qt_abort$TXT:
qt_blocki$TXT:
finop ; cxnop # entry prefix
finop ; cxnop # entry prefix
add8.ntr 75,%i31,%i31 ; movi8 512,%c5 # ICR; stk adjust
finop ; ssub8.ntr 0,%sp,%c5,%sp
finop ; st8 %fp,504(%sp) # Save caller's fp
finop ; st8 %cp,496(%sp) # Save caller's cp
finop ; ld8 8(%c10),%c5 # ld qt_restore$TXT
finop ; st8 %c14,0(%sp) # Save special ret addr
finop ; mov8_8 %c10, %cp # Our cp
finop ; sadd8.ntr 0,%sp,%c5,%fp # Our frame ptr
finop ; st8 %c5,8(%sp) # st qt_restore$TXT
#
# CEU registers %c15-%c24, %c26-%c30 (%c14 we restore later)
#
finop ; st8 %c15,456(%sp)
finop ; st8 %c16,448(%sp)
finop ; st8 %c17,440(%sp)
finop ; st8 %c18,432(%sp)
finop ; st8 %c19,424(%sp)
finop ; st8 %c20,416(%sp)
finop ; st8 %c21,408(%sp)
finop ; st8 %c22,400(%sp)
finop ; st8 %c23,392(%sp)
finop ; st8 %c24,384(%sp)
#
# %c25 is the Enclosing Frame Pointer (EFP) -- since C doesn't
# use nested procedures, we ignore it (leaving a gap, though)
#
finop ; st8 %c26,368(%sp)
finop ; st8 %c27,360(%sp)
finop ; st8 %c28,352(%sp)
finop ; st8 %c29,344(%sp)
finop ; st8 %c30,336(%sp)
#
# IPU registers %i12-%i30
#
finop ; st8 %i12,328(%sp)
finop ; st8 %i13,320(%sp)
finop ; st8 %i14,312(%sp)
finop ; st8 %i15,304(%sp)
# (gap to get alignment for st64)
# -- Doesn't work on version 1.1.3 of the OS
# finop ; st64 %i16,256(%sp)
finop ; st8 %i16,256(%sp)
finop ; st8 %i17,248(%sp)
finop ; st8 %i18,240(%sp)
finop ; st8 %i19,232(%sp)
finop ; st8 %i20,224(%sp)
finop ; st8 %i21,216(%sp)
finop ; st8 %i22,208(%sp)
finop ; st8 %i23,200(%sp)
finop ; st8 %i24,192(%sp)
finop ; st8 %i25,184(%sp)
finop ; st8 %i26,176(%sp)
finop ; st8 %i27,168(%sp)
finop ; st8 %i28,160(%sp)
finop ; st8 %i29,152(%sp)
finop ; st8 %i30,144(%sp)
#
# FPU already saved, or saving not necessary
#
#
# Switch to the stack passed in as fourth argument to the block
# routine (%i5) and call the helper routine passed in as the first
# argument (%i2). Note that the address of the helper's constant
# block is passed in, so we must derefence it to get the helper's text
# address.
#
finop ; movb8_8 %i2,%c10 # helper's ConstBlock
finop ; cxnop # Delay slot, fill w/
finop ; cxnop # .. 2 st8 from above
finop ; ld8 0(%c10),%c4 # load addr of helper
finop ; movb8_8 %sp, %i2 # 1st arg to helper
# is this stack; other
# args remain in regs
finop ; movb8_8 %i5,%sp # switch stacks
finop ; jsr %c14,16(%c4) # call helper
movi8 3, %i0 ; movi8 0,%c8 # nargs brain dmg
finop ; cxnop
finop ; cxnop
#
# Here is where behavior differs for threads being restored and threads
# being started. Blocked threads have a pointer to qt_restore$TXT on
# the top of their stacks; manufactured stacks have a pointer to qt_start$TXT
# on the top of their stacks. With this setup, starting threads
# skip the (unecessary) restore operations.
#
# We jump to an offset of 16 to either (1) skip past the two noop pairs
# at the start of qt_start$TXT, or (2) skip past the two noop pairs
# after qt_restore$TXT.
#
finop ; ld8 8(%sp),%c4
finop ; cxnop
finop ; cxnop
finop ; jmp 16(%c4)
qt_restore$TXT:
finop ; cxnop
finop ; cxnop
#
# Point of Restore:
#
# The helper funtion will return here. Any result it has placed in
# a return register (most likely %i0) will not get overwritten below
# and will consequently be the return value of the blocking routine.
#
#
# CEU registers %c15-%c24, %c26-%c30 (%c14 we restore later)
#
finop ; ld8 456(%sp),%c15
finop ; ld8 448(%sp),%c16
finop ; ld8 440(%sp),%c17
finop ; ld8 432(%sp),%c18
finop ; ld8 424(%sp),%c19
finop ; ld8 416(%sp),%c20
finop ; ld8 408(%sp),%c21
finop ; ld8 400(%sp),%c22
finop ; ld8 392(%sp),%c23
finop ; ld8 384(%sp),%c24
#
# %c25 is the Enclosing Frame Pointer (EFP) -- since C doesn't
# use nested procedures, we ignore it (leaving a gap, though)
#
finop ; ld8 368(%sp),%c26
finop ; ld8 360(%sp),%c27
finop ; ld8 352(%sp),%c28
finop ; ld8 344(%sp),%c29
finop ; ld8 336(%sp),%c30
#
# IPU registers %i12-%i30
#
finop ; ld8 328(%sp),%i12
finop ; ld8 320(%sp),%i13
finop ; ld8 312(%sp),%i14
finop ; ld8 304(%sp),%i15
# (gap to get alignment for ld64)
# -- Doesn't work on version 1.1.3 of the OS
# finop ; ld64 256(%sp),%i16
finop ; ld8 256(%sp),%i16
finop ; ld8 248(%sp),%i17
finop ; ld8 240(%sp),%i18
finop ; ld8 232(%sp),%i19
finop ; ld8 224(%sp),%i20
finop ; ld8 216(%sp),%i21
finop ; ld8 208(%sp),%i22
finop ; ld8 200(%sp),%i23
finop ; ld8 192(%sp),%i24
finop ; ld8 184(%sp),%i25
finop ; ld8 176(%sp),%i26
finop ; ld8 168(%sp),%i27
finop ; ld8 160(%sp),%i28
finop ; ld8 152(%sp),%i29
finop ; ld8 144(%sp),%i30
#
# FPU registers don't need to be loaded, or will be loaded by an
# enclosing scope (e.g., if this is called by qt_block).
#
#
# Load the special registers. We don't load the stack ptr because
# the new stack is passed in as an argument, we don't load the EFP
# because we don't use it, and we load the return address specially
# off the top of the stack.
#
finop ; ld8 0(%sp),%c14 # return addr
finop ; ld8 496(%sp),%cp
finop ; ld8 504(%sp),%fp
finop ; jmp 32(%c14) # jump back to thread
finop ; movi8 512,%c5 # stack adjust
finop ; sadd8.ntr 0,%sp,%c5,%sp
.data
.half 0x0, 0x0, 0x7ffff000, 0x7fff8000
qt_block:
.word qt_block$TXT
.word qt_error
.word qt_error$TXT
.word qt_blocki
#
# Handle saving and restoring the FPU regs, relying on qt_blocki
# to save and restore the remaining registers.
#
.text
qt_block$TXT:
finop ; cxnop # entry prefix
finop ; cxnop # entry prefix
add8.ntr 29,%i31,%i31 ; movi8 512,%c5 # ICR; stk adjust
finop ; ssub8.ntr 0,%sp,%c5,%sp
finop ; st8 %fp,504(%sp) # Save caller's fp
finop ; st8 %cp,496(%sp) # Save caller's cp
finop ; st8 %c14,488(%sp) # store ret addr
finop ; sadd8.ntr 0,%sp,%c5,%fp # Our frame ptr
finop ; mov8_8 %c10, %cp # Our cp
#
# Store 8 registers at once...destination must be a multiple of 64
#
finop ; st64 %f16,384(%sp)
finop ; st64 %f24,320(%sp)
finop ; st64 %f32,256(%sp)
finop ; st64 %f40,192(%sp)
finop ; st64 %f48,128(%sp)
finop ; st64 %f56,64(%sp)
#
# Call the integer blocking routine, passing the arguments passed to us
#
finop ; ld8 24(%cp), %c10
finop ; cxnop
finop ; jsr %c14, qt_blocki$TXT
finop ; cxnop
finop ; cxnop
movi8 4,%i0 ; movi8 0,%c8 # nargs brain dmg
#
# Load 8 registers at once...source must be a multiple of 64
#
finop ; ld64 64(%sp),%f56
finop ; ld64 128(%sp),%f48
finop ; ld64 192(%sp),%f40
finop ; ld64 256(%sp),%f32
finop ; ld64 320(%sp),%f24
finop ; ld64 384(%sp),%f16
finop ; ld8 488(%sp),%c14
finop ; ld8 496(%sp),%cp
finop ; ld8 504(%sp),%fp
finop ; jmp 32(%c14) # jump back to thread
finop ; movi8 512,%c5 # stack adjust
finop ; sadd8.ntr 0,%sp,%c5,%sp
.data
.half 0x0, 0x0, 0x7ffff000, 0x7fff8000
qt_start:
.word qt_start$TXT
#
# A new thread is set up to "appear" as if it were executing code at
# the beginning of qt_start and then it called a blocking routine
# (qt_blocki). So when a new thread starts to run, it gets unblocked
# by the code above and "returns" to `qt_start$TXT' in the
# restore step of the switch. Blocked threads jump to 16(qt_restore$TXT),
# and starting threads jump to 16(qt_start$TXT).
#
.text
qt_start$TXT:
finop ; cxnop #
finop ; cxnop #
finop ; ld8 40(%sp),%c10 # `only' constant block
finop ; ld8 32(%sp),%i4 # `userf' arg.
finop ; ld8 24(%sp),%i3 # `t' arg.
finop ; ld8 0(%c10),%c4 # `only' text location
finop ; ld8 16(%sp),%i2 # `u' arg.
finop ; cxnop
finop ; jsr %c14,16(%c4) # call `only'
#
# Pop the frame used to store the thread's initial data
#
finop ; sadd8.ntr 0,%sp,128,%sp
finop ; cxnop
movi8 2,%i0 ; movi8 0,%c8 # nargs brain dmg
#
# If we ever return, it's an error.
#
finop ; jmp qt_error$TXT
finop ; cxnop
finop ; cxnop
movi8 0,%i0 ; movi8 0,%c8 # nargs brain dmg
#
# This stuff is broken
#
.data
.half 0x0, 0x0, 0x7ffff000, 0x7fff8000
qt_vstart:
.word qt_vstart$TXT
.text
qt_vstart$TXT:
finop ; cxnop # entry prefix
finop ; cxnop # entry prefix
finop ; cxnop
finop ; cxnop
add8.ntr 11,%i31,%i31 ; movi8 512,%c5
finop ; ssub8.ntr 0,%sp,%c5,%sp # fix stack
finop ; ld8 8(%sp),%i2 # load `t' as arg to
finop ; cxnop # `startup'
finop ; cxnop
finop ; ld8 16(%sp),%c10 # `startup' const block
finop ; cxnop
finop ; cxnop
finop ; ld8 0(%c10),%c4 # `startup' text loc.
finop ; cxnop
finop ; cxnop
finop ; jsr %c14,16(%c4) # call `startup'
finop ; cxnop
finop ; cxnop
movi8 1, %i0 ; movi8 0,%c8 # nargs brain dmg
#
# finop ; sadd 0,%sp,128,%sp # alter stack
#
finop ; ld8 8(%sp),%i2 # load `t' as arg to
finop ; ld8 8(%sp),%i2 # load `t' as arg to
finop ; ld8 8(%sp),%i2 # load `t' as arg to
finop ; ld8 8(%sp),%i2 # load `t' as arg to
finop ; ld8 32(%sp),%c10 # `only' constant block
finop ; ld8 8(%sp),%i2 # `u' arg.
finop ; ld8 16(%sp),%i3 # `t' arg.
finop ; ld8 0(%c10),%c4 # `only' text location
finop ; ld8 24(%sp),%i4 # `userf' arg.
finop ; cxnop
finop ; jsr %c4,16(%c4) # call `only'
finop ; cxnop
finop ; cxnop
#
# If the callee ever calls `nargs', the following instruction (pair)
# will be executed. However, we don't know when we compile this code
# how many args are being passed. So we give our best guess: 0.
#
movi8 0,%i0 ; movi8 0,%c8 # nargs brain dmg
#
# If we ever return, it's an error.
#
finop ; jmp qt_error$TXT
finop ; cxnop
finop ; cxnop
movi8 0,%i0 ; movi8 0,%c8 # nargs brain dmg
|
WangYaohuii/CXL-SSD-Sim | 1,635 | ext/systemc/src/sysc/qt/md/axp_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.text
.globl b_call_reg
.globl b_call_imm
.globl b_add
.globl b_load
.ent b_null
b_null:
ret $31,($18),1
.end b_null
.ent b_call_reg
b_call_reg:
lda $27,b_null
$L0:
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
jsr $18,($27)
subq $16,1,$16
bgt $16,$L0
ret $31,($26),1
.end
.ent b_call_imm
b_call_imm:
$L1:
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
jsr $18,b_null
subq $16,1,$16
bgt $16,$L1
ret $31,($26),1
.end
.ent b_add
b_add:
$L2:
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
addq $31,$31,$31
subq $16,1,$16
bgt $16,$L2
ret $31,($26),1
.end
.ent b_load
b_load:
$L3:
ldq $31,0($30)
ldq $31,8($30)
ldq $31,16($30)
ldq $31,24($30)
ldq $31,32($30)
ldq $31,0($30)
ldq $31,8($30)
ldq $31,16($30)
ldq $31,24($30)
ldq $31,32($30)
subq $16,1,$16
bgt $16,$L3
ret $31,($26),1
.end
|
WangYaohuii/CXL-SSD-Sim | 1,378 | ext/systemc/src/sysc/qt/md/mips_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.globl b_call_reg
.globl b_call_imm
.globl b_add
.globl b_load
.ent b_null
b_null:
j $31
.end b_null
.ent b_call_reg
b_call_reg:
la $5,b_null
add $6, $31,0
$L0:
jal $5
jal $5
jal $5
jal $5
jal $5
sub $4, $4,5
bgtz $4,$L0
j $6
.end
.ent b_call_imm
b_call_imm:
add $6, $31,0
$L1:
jal b_null
jal b_null
jal b_null
jal b_null
jal b_null
sub $4, $4,5
bgtz $4,$L1
j $6
.end
.ent b_add
b_add:
add $5, $0,$4
add $6, $0,$4
add $7, $0,$4
add $8, $0,$4
$L2:
sub $4, $4,5
sub $5, $5,5
sub $6, $6,5
sub $7, $7,5
sub $8, $8,5
sub $4, $4,5
sub $5, $5,5
sub $6, $6,5
sub $7, $7,5
sub $8, $8,5
bgtz $4,$L2
j $31
.end
.ent b_load
b_load:
$L3:
ld $0, 0($sp)
ld $0, 4($sp)
ld $0, 8($sp)
ld $0, 12($sp)
ld $0, 16($sp)
ld $0, 20($sp)
ld $0, 24($sp)
ld $0, 28($sp)
ld $0, 32($sp)
ld $0, 36($sp)
sub $4, $4,10
bgtz $4,$L3
j $31
.end
|
WangYaohuii/CXL-SSD-Sim | 1,906 | ext/systemc/src/sysc/qt/md/vax.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.text
.globl _qt_abort
.globl _qt_block
.globl _qt_blocki
.globl _qt_start
.globl _qt_vstart
/*
// Calls to these routines have the signature
//
// void *block (func, arg1, arg2, newsp)
//
// Since the prologue saves 5 registers, nargs, pc, fp, ap, mask, and
// a condition handler (at sp+0), the first argument is 40=4*10 bytes
// offset from the stack pointer.
*/
_qt_block:
_qt_blocki:
_qt_abort:
.word 0x7c0 /* Callee-save mask: 5 registers. */
movl 56(sp),r1 /* Get stack pointer of new thread. */
movl 52(sp),-(r1) /* Push arg2 */
movl 48(sp),-(r1) /* Push arg1 */
movl sp,-(r1) /* Push arg0 */
movl 44(sp),r0 /* Get helper to call. */
movl r1,sp /* Move to new thread's stack. */
addl3 sp,$12,fp /* .. including the frame pointer. */
calls $3,(r0) /* Call helper. */
ret
_qt_start:
movl (sp)+,r0 /* Get `only'. */
calls $3,(r0) /* Call `only'. */
calls $0,_qt_error /* `only' erroniously returned. */
_qt_vstart:
movl (sp)+,r10 /* Get `pt'. */
movl (sp)+,r9 /* Get `startup'. */
movl (sp)+,r8 /* Get `vuserf'. */
movl (sp)+,r7 /* Get `cleanup'. */
pushl r10 /* Push `qt'. */
calls $1,(r9) /* Call `startup', pop `qt' on return. */
calls (sp)+,(r8) /* Call user's function. */
pushl r0 /* Push `vuserf_retval'. */
pushl r10 /* Push `qt'. */
calls $2,(r7) /* Call `cleanup', never return. */
calls $0,_qt_error /* `cleanup' erroniously returned. */
|
WangYaohuii/CXL-SSD-Sim | 3,710 | ext/systemc/src/sysc/qt/md/i386.s | /* i386.s -- assembly support. */
/*
// QuickThreads -- Threads-building toolkit.
// Copyright (c) 1993 by David Keppel
//
// Permission to use, copy, modify and distribute this software and
// its documentation for any purpose and without fee is hereby
// granted, provided that the above copyright notice and this notice
// appear in all copies. This software is provided as a
// proof-of-concept and for demonstration purposes; there is no
// representation about the suitability of this software for any
// purpose. */
/* NOTE: double-labeled `_name' and `name' for System V compatability. */
/* NOTE: Mixed C/C++-style comments used. Sorry! */
/* Callee-save: %esi, %edi, %ebx, %ebp
// Caller-save: %eax, %ecx
// Can't tell: %edx (seems to work w/o saving it.)
//
// Assignment:
//
// See ``i386.h'' for the somewhat unconventional stack layout. */
.text
.align 2
.globl _qt_abort
.globl qt_abort
.globl _qt_block
.globl qt_block
.globl _qt_blocki
.globl qt_blocki
.globl _qt_align
.globl qt_align
/* These all have the type signature
//
// void *blocking (helper, arg0, arg1, new)
//
// On procedure entry, the helper is at 4(sp), args at 8(sp) and
// 12(sp) and the new thread's sp at 16(sp). It *appears* that the
// calling convention for the 8X86 requires the caller to save all
// floating-point registers, this makes our life easy. */
/* Halt the currently-running thread. Save it's callee-save regs on
// to the stack, 32 bytes. Switch to the new stack (next == 16+32(sp))
// and call the user function (f == 4+32(sp) with arguments: old sp
// arg1 (8+32(sp)) and arg2 (12+32(sp)). When the user function is
// done, restore the new thread's state and return.
//
// `qt_abort' is (currently) an alias for `qt_block' because most of
// the work is shared. We could save the insns up to `qt_common' by
// replicating, but w/o replicating we need an inital subtract (to
// offset the stack as if it had been a qt_block) and then a jump
// to qt_common. For the cost of a jump, we might as well just do
// all the work.
//
// The helper function (4(sp)) can return a void* that is returned
// by the call to `qt_blockk{,i}'. Since we don't touch %eax in
// between, we get that ``for free''. */
_qt_abort:
qt_abort:
_qt_block:
qt_block:
_qt_blocki:
qt_blocki:
pushl %ebp /* Save callee-save, sp-=4. */
pushl %esi /* Save callee-save, sp-=4. */
pushl %edi /* Save callee-save, sp-=4. */
pushl %ebx /* Save callee-save, sp-=4. */
movl %esp, %eax /* Remember old stack pointer. */
qt_common:
movl 32(%esp), %esp /* Move to new thread. */
pushl 28(%eax) /* Push arg 2. */
pushl 24(%eax) /* Push arg 1. */
pushl %eax /* Push arg 0. */
movl 20(%eax), %ebx /* Get function to call. */
call *%ebx /* Call f. */
addl $12, %esp /* Pop args. */
popl %ebx /* Restore callee-save, sp+=4. */
popl %edi /* Restore callee-save, sp+=4. */
popl %esi /* Restore callee-save, sp+=4. */
popl %ebp /* Restore callee-save, sp+=4. */
_qt_align:
qt_align:
ret /* Resume the stopped function. */
.globl _qt_tramp
.globl qt_tramp
_qt_tramp:
qt_tramp:
movl 12(%esp), %eax /* Load 'qt_error' address */
sub $4, %esp /* Align stack pointer to 16-byte boundary */
jmp *%eax /* call 'qt_error' */
hlt /* 'qt_error' never returns */
/* Start a varargs thread. */
.globl _qt_vstart
.globl qt_vstart
_qt_vstart:
qt_vstart:
pushl %edi /* Push `pt' arg to `startup'. */
call *%ebp /* Call `startup'. */
popl %eax /* Clean up the stack. */
call *%ebx /* Call the user's function. */
pushl %eax /* Push return from user's. */
pushl %edi /* Push `pt' arg to `cleanup'. */
call *%esi /* Call `cleanup'. */
hlt /* `cleanup' never returns. */
|
WangYaohuii/CXL-SSD-Sim | 3,974 | ext/systemc/src/sysc/qt/md/m88k.s | /* m88k.s -- assembly support. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
/* Callee-save r14..r25, r31(sp), r30(fp). r1 === return pc.
* Argument registers r2..r9, return value r2..r3.
*
* On startup, restore regs so retpc === call to a function to start.
*
* We're going to call a function (r2) from within the context switch
* routine. Call it on the new thread's stack on behalf of the old
* thread.
*/
.globl _qt_block
.globl _qt_blocki
.globl _qt_abort
.globl _qt_start
.globl _qt_vstart
/*
** r2: ptr to function to call once curr is suspended
** and control is on r5's stack.
** r3: 1'th arg to *r2.
** r4: 2'th arg to *r2.
** r5: sp of thread to suspend.
**
** The helper routine returns a value that is passed on as the
** return value from the blocking routine. Since we don't
** touch r2 between the helper's return and the end of
** function, we get this behavior for free.
**
** Same entry for integer-only and floating-point, since there
** are no separate integer and floating-point registers.
**
** Each procedure call sets aside a ``home region'' of 8 regs
** for r2-r9 for varargs. For context switches we don't use
** the ``home region'' for varargs so use it to save regs.
** Allocate 64 bytes of save space -- use 32 bytes of register
** save area passed in to us plus 32 bytes we allcated, use
** the other 32 bytes for save area for a save area to call
** the helper function.
*/
_qt_block:
_qt_blocki:
sub r31, r31,64 /* Allocate reg save space. */
st r1, r31,8+32 /* Save callee-save registers. */
st r14, r31,12+32
st.d r15, r31,16+32
st.d r17, r31,24+32
st.d r19, r31,32+32
st.d r21, r31,40+32
st.d r23, r31,48+32
st r25, r31,56+32
st r30, r31,60+32
_qt_abort:
addu r14, r31,0 /* Remember old sp. */
addu r31, r5,0 /* Set new sp. */
jsr.n r2 /* Call helper. */
addu r2, r14,0 /* Pass old sp as an arg0 to helper. */
ld r1, r31,8+32 /* Restore callee-save registers. */
ld r14, r31,12+32
ld.d r15, r31,16+32
ld.d r17, r31,24+32
ld.d r19, r31,32+32
ld.d r21, r31,40+32
ld.d r23, r31,48+32
ld r25, r31,56+32
ld r30, r31,60+32
jmp.n r1 /* Return to new thread's caller. */
addu r31, r31,64 /* Free register save space. */
/*
** Non-varargs thread startup.
** See `m88k.h' for register use conventions.
*/
_qt_start:
addu r2, r14,0 /* Set user arg `pu'. */
addu r3, r15,0 /* ... user function pt. */
jsr.n r17 /* Call `only'. */
addu r4, r16,0 /* ... user function userf. */
bsr _qt_error /* `only' erroniously returned. */
/*
** Varargs thread startup.
** See `m88k.h' for register use conventions.
**
** Call the `startup' function with just argument `pt'.
** Then call `vuserf' with 8 register args plus any
** stack args.
** Then call `cleanup' with `pt' and the return value
** from `vuserf'.
*/
_qt_vstart:
addu r18, r30,0 /* Remember arg7 to `vuserf'. */
addu r30, r0,0 /* Null-terminate call chain. */
jsr.n r17 /* Call `startup'. */
addu r2, r15,0 /* `pt' is arg0 to `startup'. */
addu r2, r19,0 /* Set arg0. */
addu r3, r20,0 /* Set arg1. */
addu r4, r21,0 /* Set arg2. */
addu r5, r22,0 /* Set arg3. */
addu r6, r23,0 /* Set arg4. */
addu r7, r24,0 /* Set arg5. */
addu r8, r25,0 /* Set arg6. */
jsr.n r16 /* Call `vuserf'. */
addu r9, r18,0 /* Set arg7. */
addu r3, r2,0 /* Ret. value is arg1 to `cleanup'. */
jsr.n r14 /* Call `cleanup'. */
addu r2, r15,0 /* `pt' is arg0 to `cleanup'. */
bsr _qt_error /* `cleanup' erroniously returned. */
|
WangYaohuii/CXL-SSD-Sim | 3,225 | ext/systemc/src/sysc/qt/md/powerpc_mach_b.s | /* speed test for basic CPU operations */
/* Marco Bucci <marco.bucci@inwind.it> */
/* This code was developed with the Code Warrior integrate ppc assembler.
* Macros are use to hide illegal constructs whether you are using a
* "normal" assembler or the "C integrated" assembler.
*/
#if 0
.text
.align 4
.globl b_call_reg
.globl _b_call_reg
.globl b_call_imm
.globl _b_call_imm
.globl b_add
.globl _b_add
.globl b_load
.globl _b_load
.set fsize, 64
.set lrsave, 8
#else
#define fsize 64
#define lrsave 8
#endif
#if 0
.if 0
#endif
asm void b_null(void)
{
#if 0
.endif
#endif
#if 0
b_null:
#endif
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* actually the same as the following. How to get "b_null" address?
* I didnt find the right sintax or the right way.
* I should take the current PC, then the difference to "b_null"
* (making the difference beween the labels), perform the sum and go?!
*/
#if 0
.if 0
#endif
asm void b_call_reg(long n)
{
#if 0
.endif
#endif
#if 0
b_call_reg:
_b_call_reg:
#endif
mflr r0
stw r31,-4(r1)
stw r30,-8(r1)
stw r0,lrsave(r1)
stwu r1,-fsize(r1)
mr r30,r3
li r31,0
b L1
L0:
bl b_null
bl b_null
bl b_null
bl b_null
bl b_null
addi r31,r31,5
L1:
cmpw r31,r30
blt L0
lwz r0,lrsave+fsize(r1)
mtlr r0
lwz r31,-4+fsize(r1)
lwz r30,-8+fsize(r1)
addi r1,r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_call_imm(long n)
{
#if 0
.endif
#endif
#if 0
b_call_imm:
_b_call_imm:
#endif
mflr r0
stw r31,-4(r1)
stw r30,-8(r1)
stw r0,lrsave(r1)
stwu r1,-fsize(r1)
mr r30,r3
li r31,0
b L3
L2:
bl b_null
bl b_null
bl b_null
bl b_null
bl b_null
addi r31,r31,5
L3:
cmpw r31,r30
blt L2
lwz r0,lrsave+fsize(r1)
mtlr r0
lwz r31,-4+fsize(r1)
lwz r30,-8+fsize(r1)
addi r1,r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_add(long n)
{
#if 0
.endif
#endif
#if 0
b_add:
_b_add:
#endif
mflr r0
stw r31,-4(r1)
stw r30,-8(r1)
stw r0,lrsave(r1)
stwu r1,-fsize(r1)
mr r30,r3
li r31,0
b L5
L4:
addi r3,r3,5
addi r4,r4,5
addi r5,r5,5
addi r6,r6,5
addi r7,r7,5
addi r3,r3,5
addi r4,r4,5
addi r5,r5,5
addi r6,r6,5
addi r7,r7,5
addi r31,r31,10
L5:
cmpw r31,r30
blt L4
lwz r0,lrsave+fsize(r1)
mtlr r0
lwz r31,-4+fsize(r1)
lwz r30,-8+fsize(r1)
addi r1,r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
#if 0
.if 0
#endif
asm void b_load(long n)
{
#if 0
.endif
#endif
#if 0
b_load:
_b_load:
#endif
mflr r0
stw r31,-4(r1)
stw r30,-8(r1)
stw r0,lrsave(r1)
stwu r1,-fsize(r1)
mr r30,r3
li r31,0
b L7
L6:
lwz r3,4(r1)
lwz r4,8(r1)
lwz r5,12(r1)
lwz r6,16(r1)
lwz r7,20(r1)
lwz r3,24(r1)
lwz r4,28(r1)
lwz r5,32(r1)
lwz r6,36(r1)
lwz r7,40(r1)
addi r31,r31,10
L7:
cmpw r31,r30
blt L6
lwz r0,lrsave+fsize(r1)
mtlr r0
lwz r31,-4+fsize(r1)
lwz r30,-8+fsize(r1)
addi r1,r1,fsize
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
|
WangYaohuii/CXL-SSD-Sim | 5,084 | ext/systemc/src/sysc/qt/md/mips.s | /* mips.s -- assembly support. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
/* Callee-save $16-$23, $30-$31.
*
* On startup, restore regs so retpc === call to a function to start.
* We're going to call a function ($4) from within this routine.
* We're passing 3 args, therefore need to allocate 12 extra bytes on
* the stack for a save area. The start routine needs a like 16-byte
* save area. Must be doubleword aligned (_mips r3000 risc
* architecture_, gerry kane, pg d-23).
*/
.globl qt_block
.globl qt_blocki
.globl qt_abort
.globl qt_start
.globl qt_vstart
/*
** $4: ptr to function to call once curr is suspended
** and control is on $7's stack.
** $5: 1'th arg to $4.
** $6: 2'th arg to $4
** $7: sp of thread to suspend.
**
** Totally gross hack: The MIPS calling convention reserves
** 4 words on the stack for a0..a3. This routine "ought" to
** allocate space for callee-save registers plus 4 words for
** the helper function, but instead we use the 4 words
** provided by the function that called us (we don't need to
** save our argument registers). So what *appears* to be
** allocating only 40 bytes is actually allocating 56, by
** using the caller's 16 bytes.
**
** The helper routine returns a value that is passed on as the
** return value from the blocking routine. Since we don't
** touch $2 between the helper's return and the end of
** function, we get this behavior for free.
*/
qt_blocki:
sub $sp,$sp,40 /* Allocate reg save space. */
sw $16, 0+16($sp)
sw $17, 4+16($sp)
sw $18, 8+16($sp)
sw $19,12+16($sp)
sw $20,16+16($sp)
sw $21,20+16($sp)
sw $22,24+16($sp)
sw $23,28+16($sp)
sw $30,32+16($sp)
sw $31,36+16($sp)
add $2, $sp,$0 /* $2 <= old sp to pass to func@$4. */
qt_abort:
add $sp, $7,$0 /* $sp <= new sp. */
.set noreorder
jal $31,$4 /* Call helper func@$4 . */
add $4, $2,$0 /* $a0 <= pass old sp as a parameter. */
.set reorder
lw $31,36+16($sp) /* Restore callee-save regs... */
lw $30,32+16($sp)
lw $23,28+16($sp)
lw $22,24+16($sp)
lw $21,20+16($sp)
lw $20,16+16($sp)
lw $19,12+16($sp)
lw $18, 8+16($sp)
lw $17, 4+16($sp)
lw $16, 0+16($sp) /* Restore callee-save */
add $sp,$sp,40 /* Deallocate reg save space. */
j $31 /* Return to caller. */
/*
** Non-varargs thread startup.
** Note: originally, 56 bytes were allocated on the stack.
** The thread restore routine (_blocki/_abort) removed 40
** of them, which means there is still 16 bytes for the
** argument area required by the MIPS calling convention.
*/
qt_start:
add $4, $16,$0 /* Load up user function pu. */
add $5, $17,$0 /* ... user function pt. */
add $6, $18,$0 /* ... user function userf. */
jal $31,$19 /* Call `only'. */
j qt_error
/*
** Save calle-save floating-point regs $f20-$f30
** See comment in `qt_block' about calling conventinos and
** reserved space. Use the same trick here, but here we
** actually have to allocate all the bytes since we have to
** leave 4 words leftover for `qt_blocki'.
**
** Return value from `qt_block' is the same as the return from
** `qt_blocki'. We get that for free since we don't touch $2
** between the return from `qt_blocki' and the return from
** `qt_block'.
*/
qt_block:
sub $sp, $sp,56 /* 6 8-byte regs, saved ret pc, aligned. */
swc1 $f20, 0+16($sp)
swc1 $f22, 8+16($sp)
swc1 $f24, 16+16($sp)
swc1 $f26, 24+16($sp)
swc1 $f28, 32+16($sp)
swc1 $f30, 40+16($sp)
sw $31, 48+16($sp)
jal qt_blocki
lwc1 $f20, 0+16($sp)
lwc1 $f22, 8+16($sp)
lwc1 $f24, 16+16($sp)
lwc1 $f26, 24+16($sp)
lwc1 $f28, 32+16($sp)
lwc1 $f30, 40+16($sp)
lw $31, 48+16($sp)
add $sp, $sp,56
j $31
/*
** First, call `startup' with the `pt' argument.
**
** Next, call the user's function with all arguments.
** Note that we don't know whether args were passed in
** integer regs, fp regs, or on the stack (See Gerry Kane
** "MIPS R2000 RISC Architecture" pg D-22), so we reload
** all the registers, possibly with garbage arguments.
**
** Finally, call `cleanup' with the `pt' argument and with
** the return value from the user's function. It is an error
** for `cleanup' to return.
*/
qt_vstart:
add $4, $17,$0 /* `pt' is arg0 to `startup'. */
jal $31, $18 /* Call `startup'. */
add $sp, $sp,16 /* Free extra save space. */
lw $4, 0($sp) /* Load up args. */
lw $5, 4($sp)
lw $6, 8($sp)
lw $7, 12($sp)
lwc1 $f12, 0($sp) /* Load up fp args. */
lwc1 $f14, 8($sp)
jal $31,$19 /* Call `userf'. */
add $4, $17,$0 /* `pt' is arg0 to `cleanup'. */
add $5, $2,$0 /* Ret. val is arg1 to `cleanup'. */
jal $31, $16 /* Call `cleanup'. */
j qt_error
|
WangYaohuii/CXL-SSD-Sim | 8,062 | ext/systemc/src/sysc/qt/md/hppa.s | ; pa-risc.s -- assembly support.
; QuickThreads -- Threads-building toolkit.
; Copyright (c) 1993 by David Keppel
;
; Permission to use, copy, modify and distribute this software and
; its documentation for any purpose and without fee is hereby
; granted, provided that the above copyright notice and this notice
; appear in all copies. This software is provided as a
; proof-of-concept and for demonstration purposes; there is no
; representation about the suitability of this software for any
; purpose.
; This file (pa-risc.s) is part of the port of QuickThreads for
; PA-RISC 1.1 architecture. This file implements context switches
; and thread startup. It was written in 1994 by Uwe Reder
; (`uereder@cip.informatik.uni-erlangen.de') for the Operating
; Systems Department (IMMD4) at the University of Erlangen/Nuernberg
; Germany.
; Callee saves general registers gr3..gr18,
; floating-point registers fr12..fr21.
.CODE
.IMPORT $$dyncall, MILLICODE
.IMPORT qt_error, CODE
.EXPORT qt_blocki, ENTRY
.EXPORT qt_block, ENTRY
.EXPORT qt_abort, ENTRY
.EXPORT qt_start, ENTRY
.EXPORT qt_vstart, ENTRY
; arg0: ptr to function (helper) to call once curr is suspended
; and control is on arg3's stack.
; arg1: 1'th arg to *arg0.
; arg2: 2'th arg to *arg0.
; arg3: sp of new thread.
qt_blocki
.PROC
.CALLINFO CALLER, FRAME=0, SAVE_RP, ENTRY_GR=18
.ENTRY
stw %rp,-20(%sp) ; save rp to old frame-marker
stwm %r3,128(%sp) ; save callee-saves general registers
stw %r4,-124(%sp)
stw %r5,-120(%sp)
stw %r6,-116(%sp)
stw %r7,-112(%sp)
stw %r8,-108(%sp)
stw %r9,-104(%sp)
stw %r10,-100(%sp)
stw %r11,-96(%sp)
stw %r12,-92(%sp)
stw %r13,-88(%sp)
stw %r14,-84(%sp)
stw %r15,-80(%sp)
stw %r16,-76(%sp)
stw %r17,-72(%sp)
stw %r18,-68(%sp)
qt_abort
copy %arg0,%r22 ; helper to be called by $$dyncall
copy %sp,%arg0 ; pass current sp as arg0 to helper
copy %arg3,%sp ; set new sp
.CALL
bl $$dyncall,%mrp ; call helper
copy %mrp,%rp
ldw -68(%sp),%r18 ; restore general registers
ldw -72(%sp),%r17
ldw -76(%sp),%r16
ldw -80(%sp),%r15
ldw -84(%sp),%r14
ldw -88(%sp),%r13
ldw -92(%sp),%r12
ldw -96(%sp),%r11
ldw -100(%sp),%r10
ldw -104(%sp),%r9
ldw -108(%sp),%r8
ldw -112(%sp),%r7
ldw -116(%sp),%r6
ldw -120(%sp),%r5
ldw -124(%sp),%r4
ldw -148(%sp),%rp ; restore return-pointer
bv %r0(%rp) ; return to caller
ldwm -128(%sp),%r3
.EXIT
.PROCEND
qt_block
.PROC
.CALLINFO CALLER, FRAME=0, SAVE_RP, ENTRY_FR=21
.ENTRY
stw %rp,-20(%sp) ; save rp to old frame-marker
fstds,ma %fr12,8(%sp) ; save callee-saves float registers
fstds,ma %fr13,8(%sp)
fstds,ma %fr14,8(%sp)
fstds,ma %fr15,8(%sp)
fstds,ma %fr16,8(%sp)
fstds,ma %fr17,8(%sp)
fstds,ma %fr18,8(%sp)
fstds,ma %fr19,8(%sp)
fstds,ma %fr20,8(%sp)
fstds,ma %fr21,8(%sp)
.CALL
bl qt_blocki,%rp
ldo 48(%sp),%sp
ldo -48(%sp),%sp
fldds,mb -8(%sp),%fr21 ; restore callee-saves float registers
fldds,mb -8(%sp),%fr20
fldds,mb -8(%sp),%fr19
fldds,mb -8(%sp),%fr18
fldds,mb -8(%sp),%fr17
fldds,mb -8(%sp),%fr16
fldds,mb -8(%sp),%fr15
fldds,mb -8(%sp),%fr14
fldds,mb -8(%sp),%fr13
ldw -28(%sp),%rp ; restore return-pointer
bv %r0(%rp) ; return to caller.
fldds,mb -8(%sp),%fr12
.EXIT
.PROCEND
qt_start
.PROC
.CALLINFO CALLER, FRAME=0
.ENTRY
copy %r18,%arg0 ; set user arg `pu'.
copy %r17,%arg1 ; ... user function pt.
copy %r16,%arg2 ; ... user function userf.
; %r22 is a caller-saves register
copy %r15,%r22 ; function to be called by $$dyncall
.CALL ; in=%r22
bl $$dyncall,%mrp ; call `only'.
copy %mrp,%rp
bl,n qt_error,%r0 ; `only' erroniously returned.
.EXIT
.PROCEND
; Varargs
;
; First, call `startup' with the `pt' argument.
;
; Next, call the user's function with all arguments.
; We don't know whether arguments are integers, 32-bit floating-points or
; even 64-bit floating-points, so we reload all the registers, possibly
; with garbage arguments. The thread creator provided non-garbage for
; the arguments that the callee actually uses, so the callee never gets
; garbage.
;
; -48 -44 -40 -36 -32
; | arg3 | arg2 | arg1 | arg0 |
; -----------------------------
; integers: arg3 arg2 arg1 arg0
; 32-bit fps: farg3 farg2 farg1 farg0
; 64-bit fps: <---farg3--> <---farg1-->
;
; Finally, call `cleanup' with the `pt' argument and with the return value
; from the user's function. It is an error for `cleanup' to return.
qt_vstart
.PROC
.CALLINFO CALLER, FRAME=0
.ENTRY
; Because the startup function may damage the fixed arguments
; on the stack (PA-RISC Procedure Calling Conventions Reference
; Manual, 2.4 Fixed Arguments Area), we allocate a seperate
; stack frame for it.
ldo 64(%sp),%sp
; call: void startup(void *pt)
copy %r15,%arg0 ; `pt' is arg0 to `startup'.
copy %r16,%r22
.CALL
bl $$dyncall,%mrp ; Call `startup'.
copy %mrp,%rp
ldo -64(%sp),%sp
; call: void *qt_vuserf_t(...)
ldw -36(%sp),%arg0 ; Load args to integer registers.
ldw -40(%sp),%arg1
ldw -44(%sp),%arg2
ldw -48(%sp),%arg3
; Index of fld[w|d]s only ranges from -16 to 15, so we
; take r22 to be our new base register.
ldo -32(%sp),%r22
fldws -4(%r22),%farg0 ; Load args to floating-point registers.
fldds -8(%r22),%farg1
fldws -12(%r22),%farg2
fldds -16(%r22),%farg3
copy %r17,%r22
.CALL
bl $$dyncall,%mrp ; Call `userf'.
copy %mrp,%rp
; call: void cleanup(void *pt, void *vuserf_return)
copy %r15,%arg0 ; `pt' is arg0 to `cleanup'.
copy %ret0,%arg1 ; Return-value is arg1 to `cleanup'.
copy %r18,%r22
.CALL
bl $$dyncall,%mrp ; Call `cleanup'.
copy %mrp,%rp
bl,n qt_error,%r0
.EXIT
.PROCEND
|
WangYaohuii/CXL-SSD-Sim | 6,002 | ext/systemc/src/sysc/qt/md/hppa_b.s | ; QuickThreads -- Threads-building toolkit.
; Copyright (c) 1993 by David Keppel
; Permission to use, copy, modify and distribute this software and
; its documentation for any purpose and without fee is hereby
; granted, provided that the above copyright notice and this notice
; appear in all copies. This software is provided as a
; proof-of-concept and for demonstration purposes; there is no
; representation about the suitability of this software for any
; purpose.
; This file (pa-risc_b.s) is part of the port of QuickThreads for
; PA-RISC 1.1 architecture. It contains assembly-level support for
; raw processor performance measurement. It was written in 1994 by
; Uwe Reder (`uereder@cip.informatik.uni-erlangen.de')
; for the Operating Systems Department (IMMD4) at the
; University of Erlangen/Nuernberg Germany.
; Note that the number of instructions in the measurement-loops, differ
; from implementation to implementation. I took eight instructions in a loop
; for every test (execute eight instructions and loop to the start).
.CODE
.IMPORT $global$,DATA
.IMPORT $$dyncall,MILLICODE
.EXPORT b_call_reg
.EXPORT b_call_imm
.EXPORT b_add
.EXPORT b_load
; Just do nothing, only return to caller. This procedure is called by
; `b_call_reg' and `b_call_imm'.
b_null
.PROC
.CALLINFO NO_CALLS, FRAME=0
.ENTRY
bv,n %r0(%rp) ; just return
.EXIT
.PROCEND
; Call the procedure `b_null' with function pointer in a register.
b_call_reg
.PROC
.CALLINFO CALLER, FRAME=0
.ENTRY
stwm %r3,64(%sp) ; store r3 (may be used by caller)
stw %rp,-20(%sp) ; save return-pointer to frame-marker
addil LR'to_call-$global$,%r27
ldw RR'to_call-$global$(%r1),%r3
_loop0
copy %r3,%r22 ; copy the procedure label to r22, ...
.CALL ; ...this is the input to $$dyncall
bl $$dyncall,%mrp ; call $$dyncall (millicode function)
copy %mrp,%rp ; remember the return-pointer
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
copy %r3,%r22
.CALL
bl $$dyncall,%mrp
copy %mrp,%rp
addibf,<= -8,%arg0,_loop0 ; decrement counter by 8 and loop
nop
ldw -20(%sp),%rp ; restore return-pointer
bv %r0(%rp) ; return to caller
ldwm -64(%sp),%r3 ; resore r3 and remove stack frame
.EXIT
.PROCEND
; Call the procedure `b_null' immediate.
b_call_imm
.PROC
.CALLINFO CALLER, FRAME=0, SAVE_RP
.ENTRY
ldo 64(%sp),%sp ; caller needs a stack-frame
stw %rp,-20(%sp) ; save return-pointer to frame-marker
_loop1
bl b_null,%rp ; call `b_null' immediate (8 times)
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
bl b_null,%rp
nop
addibf,<= -8,%arg0,_loop1 ; decrement counter by 8 and loop
nop
ldw -20(%sp),%rp ; restore return-pointer
bv %r0(%rp) ; return to caller
ldo -64(%sp),%sp ; remove stack-frame
.EXIT
.PROCEND
; Copy register-to-register.
; On PA-RISC this is implemented with an `or'.
; The `or' is hidden by a pseudo-operation called `copy'.
b_add
.PROC
.CALLINFO NO_CALLS, FRAME=0
.ENTRY
_loop2
copy %r19,%r20 ; copy register-to-register
copy %r20,%r21 ; use caller-saves registers
copy %r21,%r22
copy %r22,%r21
copy %r21,%r20
copy %r20,%r19
copy %r19,%r20
copy %r20,%r21
addibf,<= -8,%arg0,_loop2 ; decrement counter by 8 and loop
nop
bv,n %r0(%rp)
.EXIT
.PROCEND
; Load memory to a register.
b_load
.PROC
.CALLINFO NO_CALLS, FRAME=0
.ENTRY
_loop3
ldw -4(%sp),%r22 ; load data from frame-marker
ldw -8(%sp),%r22 ; use a caller-saves register
ldw -12(%sp),%r22
ldw -16(%sp),%r22
ldw -20(%sp),%r22
ldw -24(%sp),%r22
ldw -28(%sp),%r22
ldw -32(%sp),%r22
addibf,<= -8,%arg0,_loop3 ; decrement counter by 8 and loop
nop
bv,n %r0(%rp)
.EXIT
.PROCEND
.ALIGN 8
to_call
.WORD b_null
|
WangYaohuii/CXL-SSD-Sim | 1,336 | ext/systemc/src/sysc/qt/md/vax_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.text
.globl _b_call_reg
.globl _b_call_imm
.globl _b_add
.globl _b_load
_b_null:
.word 0x0
ret
_b_call_reg:
.word 0x0
movl 4(ap),r0
moval _b_null,r1
L0:
calls $0,(r1)
calls $0,(r1)
calls $0,(r1)
calls $0,(r1)
calls $0,(r1)
subl2 $5,r0
bgtr L0
ret
_b_call_imm:
.word 0x0
movl 4(ap),r0
L1:
calls $0,_b_null
calls $0,_b_null
calls $0,_b_null
calls $0,_b_null
calls $0,_b_null
subl2 $5,r0
bgtr L1
ret
_b_add:
.word 0x0
movl 4(ap),r0
L2:
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
subl2 $1,r0
bgtr L2
ret
_b_load:
.word 0x0
movl 4(ap),r0
L3:
movl 0(sp),r1
movl 4(sp),r1
movl 8(sp),r1
movl 12(sp),r1
movl 16(sp),r1
movl 20(sp),r1
movl 24(sp),r1
movl 28(sp),r1
movl 32(sp),r1
movl 36(sp),r1
subl2 $1,r0
bgtr L3
ret
|
WangYaohuii/CXL-SSD-Sim | 1,516 | ext/systemc/src/sysc/qt/md/sparc_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.globl _b_call_reg
.globl _b_call_imm
.globl _b_add
.globl _b_load
_b_null:
retl
nop
_b_call_reg:
sethi %hi(_b_null),%o4
or %o4,%lo(_b_null),%o4
add %o7,%g0, %o3
L0:
call %o4
nop
call %o4
nop
call %o4
nop
call %o4
nop
call %o4
nop
subcc %o0,1,%o0
bg L0
nop
add %o3,%g0, %o7
retl
nop
_b_call_imm:
sethi %hi(_b_null),%o4
or %o4,%lo(_b_null),%o4
add %o7,%g0, %o3
L1:
call _b_null
call _b_null
call _b_null
call _b_null
call _b_null
subcc %o0,1,%o0
bg L0
nop
add %o3,%g0, %o7
retl
nop
_b_add:
add %o0,%g0,%o1
add %o0,%g0,%o2
add %o0,%g0,%o3
add %o0,%g0,%o4
L2:
sub %o0,5,%o0
sub %o1,5,%o1
sub %o2,5,%o2
sub %o3,5,%o3
sub %o4,5,%o4
subcc %o0,5,%o0
sub %o1,5,%o1
sub %o2,5,%o2
sub %o3,5,%o3
sub %o4,5,%o4
bg L2
nop
retl
nop
_b_load:
ld [%sp+ 0], %g0
L3:
ld [%sp+ 4],%g0
ld [%sp+ 8],%g0
ld [%sp+12],%g0
ld [%sp+16],%g0
ld [%sp+20],%g0
ld [%sp+24],%g0
ld [%sp+28],%g0
ld [%sp+32],%g0
ld [%sp+36],%g0
subcc %o0,10,%o0
bg L3
ld [%sp+ 0],%g0
retl
nop
|
WangYaohuii/CXL-SSD-Sim | 5,790 | ext/systemc/src/sysc/qt/md/mips-irix5.s | /* mips.s -- assembly support. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
/* Callee-save $16-$23, $30-$31.
*
* $25 is used as a procedure value pointer, used to discover constants
* in a callee. Thus, each caller here sets $25 before the call.
*
* On startup, restore regs so retpc === call to a function to start.
* We're going to call a function ($4) from within this routine.
* We're passing 3 args, therefore need to allocate 12 extra bytes on
* the stack for a save area. The start routine needs a like 16-byte
* save area. Must be doubleword aligned (_mips r3000 risc
* architecture_, gerry kane, pg d-23).
*/
/*
* Modified by Assar Westerlund <assar@sics.se> to support Irix 5.x
* calling conventions for dynamically-linked code.
*/
/* Make this position-independent code. */
.option pic2
.globl qt_block
.globl qt_blocki
.globl qt_abort
.globl qt_start
.globl qt_vstart
/*
** $4: ptr to function to call once curr is suspended
** and control is on $7's stack.
** $5: 1'th arg to $4.
** $6: 2'th arg to $4
** $7: sp of thread to suspend.
**
** Totally gross hack: The MIPS calling convention reserves
** 4 words on the stack for a0..a3. This routine "ought" to
** allocate space for callee-save registers plus 4 words for
** the helper function, but instead we use the 4 words
** provided by the function that called us (we don't need to
** save our argument registers). So what *appears* to be
** allocating only 40 bytes is actually allocating 56, by
** using the caller's 16 bytes.
**
** The helper routine returns a value that is passed on as the
** return value from the blocking routine. Since we don't
** touch $2 between the helper's return and the end of
** function, we get this behavior for free.
*/
qt_blocki:
sub $sp,$sp,40 /* Allocate reg save space. */
sw $16, 0+16($sp)
sw $17, 4+16($sp)
sw $18, 8+16($sp)
sw $19,12+16($sp)
sw $20,16+16($sp)
sw $21,20+16($sp)
sw $22,24+16($sp)
sw $23,28+16($sp)
sw $30,32+16($sp)
sw $31,36+16($sp)
add $2, $sp,$0 /* $2 <= old sp to pass to func@$4. */
qt_abort:
add $sp, $7,$0 /* $sp <= new sp. */
.set noreorder
add $25, $4,$0 /* Set helper function procedure value. */
jal $31,$25 /* Call helper func@$4 . */
add $4, $2,$0 /* $a0 <= pass old sp as a parameter. */
.set reorder
lw $31,36+16($sp) /* Restore callee-save regs... */
lw $30,32+16($sp)
lw $23,28+16($sp)
lw $22,24+16($sp)
lw $21,20+16($sp)
lw $20,16+16($sp)
lw $19,12+16($sp)
lw $18, 8+16($sp)
lw $17, 4+16($sp)
lw $16, 0+16($sp) /* Restore callee-save */
add $sp,$sp,40 /* Deallocate reg save space. */
j $31 /* Return to caller. */
/*
** Non-varargs thread startup.
** Note: originally, 56 bytes were allocated on the stack.
** The thread restore routine (_blocki/_abort) removed 40
** of them, which means there is still 16 bytes for the
** argument area required by the MIPS calling convention.
*/
qt_start:
add $4, $16,$0 /* Load up user function pu. */
add $5, $17,$0 /* ... user function pt. */
add $6, $18,$0 /* ... user function userf. */
add $25, $19,$0 /* Set `only' procedure value. */
jal $31,$25 /* Call `only'. */
la $25,qt_error /* Set `qt_error' procedure value. */
j $25
/*
** Save calle-save floating-point regs $f20-$f30
** See comment in `qt_block' about calling conventinos and
** reserved space. Use the same trick here, but here we
** actually have to allocate all the bytes since we have to
** leave 4 words leftover for `qt_blocki'.
**
** Return value from `qt_block' is the same as the return from
** `qt_blocki'. We get that for free since we don't touch $2
** between the return from `qt_blocki' and the return from
** `qt_block'.
*/
qt_block:
sub $sp, $sp,56 /* 6 8-byte regs, saved ret pc, aligned. */
swc1 $f20, 0+16($sp)
swc1 $f22, 8+16($sp)
swc1 $f24, 16+16($sp)
swc1 $f26, 24+16($sp)
swc1 $f28, 32+16($sp)
swc1 $f30, 40+16($sp)
sw $31, 48+16($sp)
jal qt_blocki
lwc1 $f20, 0+16($sp)
lwc1 $f22, 8+16($sp)
lwc1 $f24, 16+16($sp)
lwc1 $f26, 24+16($sp)
lwc1 $f28, 32+16($sp)
lwc1 $f30, 40+16($sp)
lw $31, 48+16($sp)
add $sp, $sp,56
j $31
/*
** First, call `startup' with the `pt' argument.
**
** Next, call the user's function with all arguments.
** Note that we don't know whether args were passed in
** integer regs, fp regs, or on the stack (See Gerry Kane
** "MIPS R2000 RISC Architecture" pg D-22), so we reload
** all the registers, possibly with garbage arguments.
**
** Finally, call `cleanup' with the `pt' argument and with
** the return value from the user's function. It is an error
** for `cleanup' to return.
*/
qt_vstart:
add $4, $17,$0 /* `pt' is arg0 to `startup'. */
add $25, $18,$0 /* Set `startup' procedure value. */
jal $31, $25 /* Call `startup'. */
add $sp, $sp,16 /* Free extra save space. */
lw $4, 0($sp) /* Load up args. */
lw $5, 4($sp)
lw $6, 8($sp)
lw $7, 12($sp)
lwc1 $f12, 0($sp) /* Load up fp args. */
lwc1 $f14, 8($sp)
add $25, $19,$0 /* Set `userf' procedure value. */
jal $31,$25 /* Call `userf'. */
add $4, $17,$0 /* `pt' is arg0 to `cleanup'. */
add $5, $2,$0 /* Ret. val is arg1 to `cleanup'. */
add $25, $16,$0 /* Set `cleanup' procedure value. */
jal $31, $25 /* Call `cleanup'. */
la $25,qt_error /* Set `qt_error' procedure value. */
j $25
|
WangYaohuii/CXL-SSD-Sim | 1,043 | ext/systemc/src/sysc/qt/md/ksr1_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.file "ksr1_b.s"
.def .debug; .endef
.globl b_call_reg$TXT
.globl b_call_reg
.globl b_call_imm$TXT
.globl b_call_imm
.globl b_add$TXT
.globl b_add
.globl b_load$TXT
.globl b_load
b_call_reg:
b_call_imm:
b_add:
b_load:
.word b_call_reg$TXT
.word qt_error
.word qt_error$TXT
b_call_reg$TXT:
b_call_imm$TXT:
b_add$TXT:
b_load$TXT:
finop ; cxnop
finop ; cxnop
finop ; ld8 16(%cp),%c4
finop ; ld8 8(%cp),%cp
finop ; cxnop
finop ; cxnop
finop ; jsr %c4,0(%c4)
finop ; cxnop
finop ; cxnop
|
WangYaohuii/CXL-SSD-Sim | 18,012 | ext/systemc/src/sysc/qt/md/powerpc_mach.s | /* powerpc_mach.s -- assembly support. */
/*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
* PowerPC-Mach thread switching module.
* Darwin (MacOS X) assembly
*
* NOTICE: Syntax for register names is not the GNU one. Register are
* named "rx" and "fx", not "%rx" and "%fx" as usual for the GNU "as" tool.
* Darwin "as" tool is based on GNU "as" but follows the "official" PowerPC
* syntax.
*
*
* This software is largely based on the original PowerPC-Linux porting
* developed by Ken Aaker <kenaaker@silverbacksystems.com>
*
* Marco Bucci <marco.bucci@inwind.it>
* December 2002
*
*/
/*
*
* PowerPC Register convections:
*
* r0 volatile
* r1 SP
* r2 system reserved
* r3-r4 volatile for parameter passing and function return
* r5-r10 volatile for parameter passing
* r11-r12 volatile
* r13-r14 non volatile registers
* f0 volatile
* f1 volatile for parameter passing and function return
* f2-f13 volatile for parameter passing
* f14-f31 non volatile
*
* cr2-cr4 non volatile
*
*
* See on the heather file for more documentation.
*
*
*
* IMPLEMENTATION NOTES
*
*
* 1) Condition register saving
* On most machines, the condition code register is caller-save.
* On the PPC, the condition code register is callee-save, so the
* thread context switch must preserve it.
*
*
* 2) Floating point registers saving
* On resuming a thread, floating point registers are or not restored just
* depending on which block routine suspended the thread (i.e. regardless
* whether "qt_block", "qt_blocki" or "qt_abort" is used to resume it).
* This behaviour is obtained by implementing "qt_block" by means af a nested
* call to "qt_blocki". As a result, the blocking of a thread always goes
* and returns through "qt_blocki and, if a thread was blocked by "qt_block",
* its execution resumes from the floating point restoring code on exit
* of "qt_block".
*
* Thanks to David Keppel that explained me this "simple" trick.
*
*
* 3) C languace code debugging
* This software was developed and debugged using the Metrowerks
* Code Warrior PPC integrated assembler. It can be still used with the
* Code Warrior compiler by means of the file "powerpc_mach_asm_debug.c"
* that include it.
* In order to avoid "copy and paste" bugs, and make easyer the maintaining,
* I made the minimal changes, so you can find some strange code as:
*
* #if 0
* .if 0
* C code here
* .endif
* #endif
*
* This is just to embed some C code that is needed by the Code Warrior
* integrated assembler.
*
*
* 4) Assembly constants generation
* Constants used in the assembly code are generated by running
* the C code in the sequel (commented). It uses the C macros declared in
* the C heather in order to guarantee that the C interface and the assebly
* code are "aligned". I avoided the use of an assebler preprocessor since
* they are not so standard and moreover using macro espressions makes the
* assembly debugging more difficult.
*
*
#include <iostream>
#include "powerpc_mach.h"
int main()
{
using namespace std;
int i;
cout << ".set LR_SAVE, " << PPC_LR_SAVE << endl;
cout << ".set CR_SAVE, " << PPC_CR_SAVE << endl;
cout << ".set BLOCKI_FSIZE, " << QUICKTHREADS_BLOCKI_FRAME_SIZE << endl;
cout << ".set BLOCK_FSIZE, " << QUICKTHREADS_BLOCK_FRAME_SIZE << endl;
cout << endl;
for(i=0; i<12; i++)
cout << ".set PAR_" << i << ", " << PPC_PAR(i) << endl;
cout << endl;
i = 13;
cout << ".set GPR_SAVE_" << i << ", " << QUICKTHREADS_BLOCKI_GPR_SAVE(i) << endl;
cout << endl;
for(i=31; i>13; i--)
cout << ".set FPR_SAVE_" << i << ", " << QUICKTHREADS_BLOCK_FPR_SAVE(i) << endl;
cout << endl;
cout << ".set VARGS_BKOFF, " << QUICKTHREADS_VARGS_BKOFF << endl;
cout << endl << endl << endl;
for(i=31; i>13; i--)
cout << "\tstfd\tf" << i << ",FPR_SAVE_" << i << "(r1)" << endl;
cout << endl;
for(i=31; i>13; i--)
cout << "\tlfd \tf" << i << ",FPR_SAVE_" << i << "(r1)" << endl;
cout << endl << endl << endl;
return 0;
}
*
*
*
*/
#if 0
.text
.align 4
.globl qt_block
.globl _qt_block
.globl qt_blocki
.globl _qt_blocki
.globl qt_abort
.globl _qt_abort
.globl qt_start
.globl _qt_start
.globl qt_vstart
.globl _qt_vstart
.set LR_SAVE, 8
.set CR_SAVE, 4
.set BLOCKI_FSIZE, 128
.set BLOCK_FSIZE, 192
.set PAR_0, 24
.set PAR_1, 28
.set PAR_2, 32
.set PAR_3, 36
.set PAR_4, 40
.set PAR_5, 44
.set PAR_6, 48
.set PAR_7, 52
.set PAR_8, 56
.set PAR_9, 60
.set PAR_10, 64
.set PAR_11, 68
.set GPR_SAVE_13, 52
.set FPR_SAVE_31, 184
.set FPR_SAVE_30, 176
.set FPR_SAVE_29, 168
.set FPR_SAVE_28, 160
.set FPR_SAVE_27, 152
.set FPR_SAVE_26, 144
.set FPR_SAVE_25, 136
.set FPR_SAVE_24, 128
.set FPR_SAVE_23, 120
.set FPR_SAVE_22, 112
.set FPR_SAVE_21, 104
.set FPR_SAVE_20, 96
.set FPR_SAVE_19, 88
.set FPR_SAVE_18, 80
.set FPR_SAVE_17, 72
.set FPR_SAVE_16, 64
.set FPR_SAVE_15, 56
.set FPR_SAVE_14, 48
/* various offsets used by "qt_varg" */
.set P_T, PAR_0
.set P_STARTUP, PAR_1
.set P_USERF, PAR_2
.set P_CLEANUP, PAR_3
/* the offset used to move back the linkage area to be adiacent to
* the variant argument list before calling "userf(...) */
.set VARGS_BKOFF, 16 /* skip "t", "startup", "userf" and "cleanup" */
/* location where "t" and "cleanup" are saved (with respect of
* the stack frame base) */
.set P_T_SAVE, -4
.set P_CLEANUP_SAVE, -8
#endif
/* Block the current thread saving all integer non volatile registers and
* start a new thread.
*/
#if 0
.if 0
#endif
void *qt_blocki (void *helper, void *a0, void *a1, void *newthread);
asm void *qt_blocki (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
#if 0
qt_blocki:
_qt_blocki:
#endif
/* prolog code */
stwu r1,-BLOCKI_FSIZE(r1) /* allocate the stack frame */
mflr r0 /* return addr in r0 */
mfcr r11 /* CR in r11 */
stw r0,LR_SAVE+BLOCKI_FSIZE(r1) /* save return addr in the stack */
stw r11,CR_SAVE+BLOCKI_FSIZE(r1) /* save CR in the stack */
stmw r13,GPR_SAVE_13(r1) /* save non-volatile reg */
/* call helper(qt_t *old, void *a0, void *a1) */
mtlr r3 /* "helper" addr in the link reg */
mr r3,r1 /* current thread (i.e. the SP) in arg "old" */
mr r1,r6 /* swap to the new thread (i.e. to its SP) */
blrl /* jump to "helper" */
/* the "helper" return value is returned (since r3 is not changed) */
/* epilog code: return to the new thread's "qt_blocki" caller */
lmw r13,GPR_SAVE_13(r1) /* restore non-volatile reg */
lwz r0,LR_SAVE+BLOCKI_FSIZE(r1) /* recover return addr */
lwz r11,CR_SAVE+BLOCKI_FSIZE(r1) /* recover CR */
mtlr r0 /* return address in the link reg */
mtcr r11 /* restore CR */
addi r1,r1,BLOCKI_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Abort the current thread and start a new thread.
*/
#if 0
.if 0
#endif
void qt_abort (void *helper, void *a0, void *a1, void *newthread);
asm void qt_abort (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
#if 0
qt_abort:
_qt_abort:
#endif
/* prolog code */
/* there is no prolog. It will never come back */
/* call helper(qt_t *old, void *a0, void *a1) */
mtlr r3 /* "helper" addr in the link reg */
mr r1,r6 /* swap to the new thread (i.e. to its SP) */
/* we don't need to set "old", we can pass just garbage. Actually, since r3
is not changed, "old" is set to "helper" (don't care) */
blrl /* call "helper" */
/* the "helper" return value is returned (since r3 is not changed) */
/* epilog code: return to the new thread's "qt_blocki" caller */
lmw r13,GPR_SAVE_13(r1) /* restore non-volatile reg */
lwz r0,LR_SAVE+BLOCKI_FSIZE(r1) /* recover return addr */
lwz r11,CR_SAVE+BLOCKI_FSIZE(r1) /* recover CR */
mtlr r0 /* return address in the link reg */
mtcr r11 /* restore CR */
addi r1,r1,BLOCKI_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Block the current thread saving all non volatile registers and start
* a new thread.
*/
#if 0
.if 0
#endif
void *qt_block (void *helper, void *a0, void *a1, void *newthread);
asm void *qt_block (void *helper, void *a0, void *a1, void *newthread)
{
#if 0
.endif
#endif
# if 0
qt_block:
_qt_block:
#endif
/* prolog code */
stwu r1,-BLOCK_FSIZE(r1) /* allocate the stack frame */
mflr r0 /* return addr in r0 */
stw r0,LR_SAVE+BLOCK_FSIZE(r1) /* save return addr in the stack */
/* save non-volatile fp reg */
stfd f31,FPR_SAVE_31(r1)
stfd f30,FPR_SAVE_30(r1)
stfd f29,FPR_SAVE_29(r1)
stfd f28,FPR_SAVE_28(r1)
stfd f27,FPR_SAVE_27(r1)
stfd f26,FPR_SAVE_26(r1)
stfd f25,FPR_SAVE_25(r1)
stfd f24,FPR_SAVE_24(r1)
stfd f23,FPR_SAVE_23(r1)
stfd f22,FPR_SAVE_22(r1)
stfd f21,FPR_SAVE_21(r1)
stfd f20,FPR_SAVE_20(r1)
stfd f19,FPR_SAVE_19(r1)
stfd f18,FPR_SAVE_18(r1)
stfd f17,FPR_SAVE_17(r1)
stfd f16,FPR_SAVE_16(r1)
stfd f15,FPR_SAVE_15(r1)
stfd f14,FPR_SAVE_14(r1)
/* block the thread */
bl qt_blocki
/* the thread is going to be resumed */
/* restore non-volatile fp reg */
lfd f31,FPR_SAVE_31(r1)
lfd f30,FPR_SAVE_30(r1)
lfd f29,FPR_SAVE_29(r1)
lfd f28,FPR_SAVE_28(r1)
lfd f27,FPR_SAVE_27(r1)
lfd f26,FPR_SAVE_26(r1)
lfd f25,FPR_SAVE_25(r1)
lfd f24,FPR_SAVE_24(r1)
lfd f23,FPR_SAVE_23(r1)
lfd f22,FPR_SAVE_22(r1)
lfd f21,FPR_SAVE_21(r1)
lfd f20,FPR_SAVE_20(r1)
lfd f19,FPR_SAVE_19(r1)
lfd f18,FPR_SAVE_18(r1)
lfd f17,FPR_SAVE_17(r1)
lfd f16,FPR_SAVE_16(r1)
lfd f15,FPR_SAVE_15(r1)
lfd f14,FPR_SAVE_14(r1)
lwz r0,LR_SAVE+BLOCK_FSIZE(r1) /* recover return addr */
mtlr r0 /* return address in the link reg */
addi r1,r1,BLOCK_FSIZE /* free the stack frame */
blr /* return */
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Start a single argument thread using parameters preloaded in the stack
* during thread initialization (see comments on stack initialization in the
* heather file).
*
* Executes:
*
* only(u, t, userf);
*/
#if 0
.if 0
#endif
void qt_start(void);
asm void qt_start(void)
{
#if 0
.endif
#endif
#if 0
qt_start:
_qt_start:
#endif
lwz r3,PAR_0(r1) /* "u" in r3 */
lwz r4,PAR_1(r1) /* "t" in r4 */
lwz r5,PAR_2(r1) /* "userf" in r5 */
lwz r6,PAR_3(r1) /* "only" in r6 */
mtlr r6 /* "only" address in the link reg */
/* call only(u, t, userf) */
blrl /* jump to "only" */
/* error if it returns */
b _qt_error
/* dead code (some inline asm "wants" the epilog, or they genetare it) */
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
/* Start a variant argument thread using parameters preloaded in the stack
* during thread initialization (see comments on stack initialization in the
* heather file).
*
* Executes:
*
* startup(t);
* userf_return = userf(...);
* cleanup(pt, userf_return);
*
***** Stack layout on start *****
backchain -> STACK BOTTOM (higher address)
+==========================+
backchain - 4 -> | |
+ LOCAL VARIABLES AREA +
..............
+ +
| |
+--------------------------+
| |
+ ALIGNMEBNT PAD +
..............
+ (if needed) +
| |
+--------------------------+
| | arg(n)
+ +
| |
+ VARIABLE ARGUMENT LIST +
..............
+ for userf call +
SP + PAR(5) -> | | arg(1)
+ +
SP + PAR(4) -> | | arg(0)
+--------------------------+
SP + PAR(3) -> | | cleanup par
+ +
SP + PAR(2) -> | | userf par
+ PARAMETER AREA +
SP + PAR(1) -> | | startup par
+ +
SP + PAR(0) -> | | t par
+--------------------------+
| |
+ LINKAGE AREA +
SP -> | |
+==========================+
STACK TOP (lower address)
Stack grows down
|
V
***** Stack layout before call userf *****
backchain -> STACK BOTTOM (higher address)
+==========================+
backchain - 4 -> | |
+ LOCAL VARIABLES AREA +
..............
+ +
| |
+--------------------------+
| |
+ ALIGNMEBNT PAD +
..............
+ (if needed) +
| |
+--------------------------+
| | arg(n)
+ +
| |
+ VARIABLE ARGUMENT LIST +
..............
+ for userf call +
SP + PAR(1) -> | | arg(1)
+ +
SP + PAR(0) -> | | arg(0)
+--------------------------+
| |
+ LINKAGE AREA +
SP -> | |
+==========================+
STACK TOP (lower address)
Stack grows down
|
V
* To call "userf(...)", the argument list must be adiacent to the linkage
* area. Instead of copy the argument list, we move back the linkage area
* (actually, we just increase the SP and copy the backchain). "t" and
* "cleanup" are saved in a local variable area in order to call
* cleanup(pt, userf_return).
*/
#if 0
.if 0
#endif
void qt_vstart(void);
asm void qt_vstart(void)
{
#if 0
.endif
#endif
#if 0
qt_vstart:
_qt_vstart:
#endif
/* NOTICE: the callee routines could save parameter registers in the caller's
* stack parameter area. We put "t" in PAR(0) in such a way, if startup(t)
* will save "t", it will be saved on the same location thus not delething
* any other parameter.
*/
/* since we will move back the linckage area (to make it adiacent to the
* parameter list), we need to save "t" and "cleanup". We have made room for
* this on the bottom of the stack frame. */
/* save parameters in the local variable area */
lwz r11,0(r1) /* get the backchain */
lwz r3,P_T(r1)
lwz r4,P_CLEANUP(r1)
stw r3,P_T_SAVE(r11) /* save "pt" */
stw r4,P_CLEANUP_SAVE(r11) /* save "cleanup" */
/* call startup(t) */
lwz r5,P_STARTUP(r1)
mtlr r5
blrl /* call "startup" */
/* call userf(...) */
lwz r11,0(r1) /* reload backchain (r11 is volatile) */
lwz r4,P_USERF(r1) /* load "userf" */
mtlr r4
/* first eight parameter of the variant list must be copyed in
* GPR3-GPR10. There is a four places offset due to "t", "startup",
* userf" and "cleanup" */
lwz r3,PAR_4(r1)
lwz r4,PAR_5(r1)
lwz r5,PAR_6(r1)
lwz r6,PAR_7(r1)
lwz r7,PAR_8(r1)
lwz r8,PAR_9(r1)
lwz r9,PAR_10(r1)
lwz r10,PAR_11(r1)
/* move the linkage area to be adiacent to the argument list */
stw r11,VARGS_BKOFF(r1) /* copy backchain */
addi r1,r1,VARGS_BKOFF /* move back the stack */
blrl /* call "userf" */
/* call qt_cleanup(void *pt, void *vuserf_return) */
lwz r11,0(r1) /* reload backchain (r11 is volatile) */
mr r4,r3 /* push "userf" return as 2nd parameter */
lwz r3,P_T_SAVE(r11) /* reload "pt" */
lwz r5,P_CLEANUP_SAVE(r11) /* reload "cleanup" */
mtlr r5
blrl
b _qt_error
/* dead code (some inline asm "wanst" the epilog, or they genetare it) */
blr
#if 0
.if 0
#endif
}
#if 0
.endif
#endif
|
WangYaohuii/CXL-SSD-Sim | 1,998 | ext/systemc/src/sysc/qt/md/m88k_b.s | /*
* QuickThreads -- Threads-building toolkit.
* Copyright (c) 1993 by David Keppel
*
* Permission to use, copy, modify and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that the above copyright notice and this notice
* appear in all copies. This software is provided as a
* proof-of-concept and for demonstration purposes; there is no
* representation about the suitability of this software for any
* purpose.
*/
.text
.globl _b_call_reg
.globl _b_call_imm
.globl _b_add
.globl _b_load
_b_null:
jmp r1
_b_call_reg:
subu r31, r31,8 /* Alloc ret pc save space. */
st r1, r31,32 /* Save ret pc. */
or.u r3, r0,hi16(_b_null) /* Put call addr in a reg. */
or r3, r3,lo16(_b_null)
jsr r3
L0:
jsr r3
jsr r3
jsr r3
jsr.n r3
subu r2, r2,5 /* Decrement #of iter to go. */
bcnd.n gt0,r2,L0
jsr r3
ld r1, r31,32
jmp r1
_b_call_imm:
subu r31, r31,8 /* Alloc ret pc save space. */
st r1, r31,32 /* Save ret pc. */
bsr _b_null
L1:
bsr _b_null
bsr _b_null
bsr _b_null
bsr.n _b_null
subu r2, r2,5 /* Decrement #of iter to go. */
bcnd.n gt0,r2,L1
bsr _b_null
ld r1, r31,32
jmp r1
_b_add:
add r0, r3,r4
L2:
add r3, r4,r5
add r4, r5,r6
add r5, r6,r7
add r8, r9,r0
add r0, r3,r4
add r3, r4,r5
add r4, r5,r6
add r5, r6,r7
add r8, r9,r0
add r0, r3,r4
add r3, r4,r5
add r4, r5,r6
add r5, r6,r7
add r8, r9,r0
add r0, r3,r4
add r3, r4,r5
add r4, r5,r6
add r5, r6,r7
add r8, r9,r0
subu r2, r2,20 /* Decrement #of iter to go. */
bcnd.n gt0,r2,L2
add r0, r3,r4
jmp r1
_b_load:
ld r0, r31,0
L3:
ld r3, r31,4
ld r4, r31,8
ld r5, r31,12
ld r6, r31,16
ld r0, r31,0
ld r3, r31,4
ld r4, r31,8
ld r5, r31,12
ld r6, r31,16
ld r0, r31,0
ld r3, r31,4
ld r4, r31,8
ld r5, r31,12
ld r6, r31,16
ld r0, r31,0
ld r3, r31,4
ld r4, r31,8
ld r5, r31,12
ld r6, r31,16
subu r2, r2,20 /* Decrement #of iter to go. */
bcnd.n gt0,r2,L3
ld r0, r31,0
jmp r1
|
WangYaohuii/CXL-SSD-Sim | 2,563 | util/m5/src/abi/riscv/m5op.S | /*
* Copyright (c) 2020 The Regents of the University of California.
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
// riscv pseudo instructions have bit 1:0 (QUADRANT) = 0x3,
// bit 6:2 (OPCODE) = 0x1e, and bit 31:25 (M5FUNC) specifies
// the function performed by pseudo instruction
.macro m5op_func, name, func
.globl \name
\name:
.long 0x0000007b | (\func << 25)
ret
.endm
.text
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 1,994 | util/m5/src/abi/sparc/m5op.S | /*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define m5_op 0x2
#define m5_op3 0x37
#include <gem5/asm/generic/m5ops.h>
.macro m5op_func name, func
.section ".text";
.align 4;
.global \name;
.type \name, #function;
\name:
retl
.long (m5_op) << 30 | (m5_op3) << 19 | (\func) << 7;
.size \name, (.-\name)
.endm
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 2,497 | util/m5/src/abi/arm/m5op.S | /*
* Copyright (c) 2010, 2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
#include <gem5/asm/generic/m5ops.h>
.text
.macro m5op_func name, func
.align 2
.globl \name
\name:
.long 0xEE000110 | (\func << 16)
mov pc,lr
.endm
.text
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 1,867 | util/m5/src/abi/x86/m5op.S | /*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
.macro m5op_func, name, func
.globl \name
.func \name
\name:
.byte 0x0F, 0x04
.word \func
ret
.endfunc
.endm
.text
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 2,273 | util/m5/src/abi/x86/m5op_addr.S | /*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
/*
* Note: The ABI for pseudo ops using the M5OP_ADDR is defined in
* src/arch/x86/pseudo_inst_abi.hh. If the ABI is changed below, it's likely
* that the ABI in the arch directory will also need to be updated.
*/
.macro m5op_func, name, func
.globl \name
.func \name
\name:
#if defined(M5OP_PIC)
mov m5_mem@gotpcrel(%rip), %r11
mov (%r11), %r11
#else
mov m5_mem, %r11
#endif
mov $\func, %rax
shl $8, %rax
mov 0(%r11, %rax, 1), %rax
ret
.endfunc
.endm
.text
#define M5OP(name, func) m5op_func M5OP_MERGE_TOKENS(name, _addr), func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 3,752 | util/m5/src/abi/arm64/m5op_semi.S | /*
* Copyright (c) 2010-2013, 2016-2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
.macro m5op_func, name, func
.globl \name
\name:
// Put the m5 op number in x16.
mov x16, #(\func << 8)
// Branch into the common handler for the rest.
b 1f
.endm
.text
#define M5OP(name, func) m5op_func M5OP_MERGE_TOKENS(name, _semi), func;
M5OP_FOREACH
#undef M5OP
1:
// Get the address of the argument block.
ldr x17, =m5_semi_argument_block
// Store the m5 op number in the first slot.
str x16, [ x17 ], #8
// Store all 8 possible arguments in the subsequent slots. We don't
// know how many we need, so just store them all.
str x0, [ x17 ], #8
str x1, [ x17 ], #8
str x2, [ x17 ], #8
str x3, [ x17 ], #8
str x4, [ x17 ], #8
str x5, [ x17 ], #8
str x6, [ x17 ], #8
str x7, [ x17 ], #8
// Set x0 to the m5 op semi-hosting call number.
mov x0, #0x100
// Set x1 to the address of the argument blob.
ldr x1, =m5_semi_argument_block
// Trigger the semihosting call with the gem5 specific immediate.
hlt #0x5d57
ret
.data
.globl m5_semi_argument_block
m5_semi_argument_block:
.quad 0 // function
.quad 0 // argument 0
.quad 0 // argument 1
.quad 0 // argument 2
.quad 0 // argument 3
.quad 0 // argument 4
.quad 0 // argument 5
.quad 0 // argument 6
.quad 0 // argument 7
|
WangYaohuii/CXL-SSD-Sim | 2,470 | util/m5/src/abi/arm64/m5op.S | /*
* Copyright (c) 2010-2013, 2016-2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
.macro m5op_func, name, func
.globl \name
\name:
.long 0xff000110 | (\func << 16)
ret
.endm
.text
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 2,816 | util/m5/src/abi/arm64/m5op_addr.S | /*
* Copyright (c) 2010-2013, 2016-2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <gem5/asm/generic/m5ops.h>
.macro m5op_func, name, func
.globl \name
\name:
// Load the value of m5_mem into x9...
#if defined(M5OP_PIC)
// using the global offset table.
adrp x9, :got:m5_mem
ldr x9, [ x9, #:got_lo12:m5_mem ]
ldr x9, [ x9 ]
#else
// normally.
adrp x9, m5_mem
ldr x9, [ x9, #:lo12:m5_mem ]
#endif
movz x10, #(\func << 8)
ldr x0, [ x9, x10 ]
ret
.endm
.text
#define M5OP(name, func) m5op_func M5OP_MERGE_TOKENS(name, _addr), func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 2,531 | util/m5/src/abi/thumb/m5op.S | /*
* Copyright (c) 2010, 2016 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2003-2006 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.thumb
#include <gem5/asm/generic/m5ops.h>
.text
.macro m5op_func name, func
.align 2
.globl \name
.thumb_func
\name:
.short 0xEE00 | \func
.short 0x0110
bx lr
.endm
.text
#define M5OP(name, func) m5op_func name, func;
M5OP_FOREACH
#undef M5OP
|
WangYaohuii/CXL-SSD-Sim | 3,702 | system/arm/bootloader/arm/boot.S | /*
* Copyright (c) 2010 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*************************************************************************
* Super simple bootloader
* Preserve loaded values that we need to pass to the kernel (r0, r1, r2)
* Additionally M5 puts the kernel start address in r3
*
* Upon executing this code:
* r0 = 0, r1 = machine number, r2 = atags ptr
* r3 = kernel start address, r4 = GIC address, r5 = flag register address
*
* CPU 0 should branch to the kernel start address and it's done with
* the boot loader. Other CPUs need to start in a wfi loop. When CPU0 sends
* an IPI the slave CPUs reads a register which CPU0 has programmed with the
* boot address for the secondary cpu
**************************************************************************/
.text
.globl _start
.extern main
_start:
_entry:
b bootldr // All the interrupt vectors jump to the boot loader
b bootldr
b bootldr
b bootldr
b bootldr
b bootldr
b bootldr
b bootldr
b bootldr
bootldr:
mrc p15, 0, r8, c0, c0, 5 // get the MPIDR register
bics r8, r8, #0xff000000 // isolate the lower 24 bits (affinity levels)
bxeq r3 // if it's 0 (CPU 0), branch to kernel
mov r8, #1
str r8, [r4, #0] // Enable CPU interface on GIC
wfi // wait for an interrupt
pen:
ldr r8, [r5] // load the value
movs r8, r8 // set the flags on this value
beq pen // if it's zero try again
bx r8 // Jump to where we've been told
bkpt // We should never get here
|
WangYaohuii/CXL-SSD-Sim | 8,311 | system/arm/bootloader/arm64/boot.S | /*
* Copyright (c) 2012, 2020, 2022 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
.text
.globl _start
_start:
/* Save some values initialized by gem5. */
/* DTB address. */
mov x21, x0
/* Kernel entry point. */
mov x20, x3
/* cpu-release-addr. */
mov x22, x5
/*
* EL3 initialisation
*/
mrs x0, CurrentEL
cmp x0, #0xc // EL3?
b.ne start_ns // skip EL3 initialisation
mov x0, #0x30 // RES1
orr x0, x0, #(1 << 0) // Non-secure EL1
orr x0, x0, #(1 << 8) // HVC enable
orr x0, x0, #(1 << 10) // 64-bit EL2
orr x0, x0, #(1 << 16) // Disable FEAT_PAuth traps (APK)
orr x0, x0, #(1 << 17) // Disable FEAT_PAuth traps (API)
msr scr_el3, x0
mov x0, #(1 << 8) // Disable SVE trap to EL3
msr cptr_el3, x0 // Disable copro. traps to EL3
/*
* Check for the primary CPU to avoid a race on the distributor
* registers.
*/
mrs x0, mpidr_el1
// ARM MPIDR_EL1 bytes: Aff3 (AArch64), Stuff, Aff2, Aff1, Aff0
// Test the the MPIDR_EL1 register against 0xff00ffffff to
// extract the primary CPU.
ldr x1, =0xff00ffffff
#ifdef GICV3
tst x0, x1 // check for cpuid==zero
b.ne 3f // secondary CPU
ldr x1, =GIC_DIST_BASE // GICD_CTLR
mov w0, #7 // EnableGrp0 | EnableGrp1NS | EnableGrp1S
str w0, [x1]
mov x2, #0xffe8
ldr w2, [x1, x2] // GICD_PIDR2
and w3, w2, #0xf0 // GICD_PIDR2.Read ArchRev
cmp w3, #0x30 // Check if GICv3
mov w4, #0x20000 // 128KiB redistributor stride
mov w5, #0x40000 // 256KiB redistributor stride
csel w2, w4, w5, eq // Select the correct redistributor stride
ldr x1, =GIC_REDIST_BASE
mov w0, #~0 // Grp1 interrupts
1: ldr w3, [x1, #0x14] // GICR_WAKER
and w3, w3, #~0x2 // Setting GICR_WAKER.ProcessorSleep to 0
str w3, [x1, #0x14]
dsb sy
2: ldr w3, [x1, #0x14] // Re-reading GICR_WAKER
ands w3, w3, #0x4 // Checking GICR_WAKER.ChildrenAsleep
b.ne 2b // Keep reading GICR_WAKER.ChildrenAsleep until awake
add x5, x1, #0x10000 // SGI base
str w0, [x5, #0x80] // GICR_IGROUPR0
ldr w4, [x1, #0x8] // GICR_TYPER
add x1, x1, x2 // Point to next redistributor
// Check GICR_TYPER.Last, which is set to 1
// if this is the last redistributor
ands w4, w4, #0x10
b.eq 1b // Branch back if not last redistributor
ldr x1, =GIC_DIST_BASE + 0x84 // GICD_IGROUPR
str w0, [x1], #4
str w0, [x1], #4
str w0, [x1], #4
/* SRE & Disable IRQ/FIQ Bypass & Allow EL2 access to ICC_SRE_EL2 */
3: mrs x10, S3_6_C12_C12_5 // read ICC_SRE_EL3
orr x10, x10, #0xf // enable 0xf
msr S3_6_C12_C12_5, x10 // write ICC_SRE_EL3
isb
mov x0, #1
msr S3_0_c12_c12_6, x0 // ICC_IGRPEN0_EL1 Enable
msr S3_0_C12_C12_7, x0 // ICC_IGRPEN1_EL1 Enable
#else
tst x0, x1 // check for cpuid==zero
b.ne 1f // secondary CPU
ldr x1, =GIC_DIST_BASE // GICD_CTLR
mov w0, #3 // EnableGrp0 | EnableGrp1
str w0, [x1]
1: ldr x1, =GIC_DIST_BASE + 0x80 // GICD_IGROUPR
mov w0, #~0 // Grp1 interrupts
str w0, [x1], #4
b.ne 2f // Only local interrupts for secondary CPUs
str w0, [x1], #4
str w0, [x1], #4
2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
ldr w0, [x1]
mov w0, #3 // EnableGrp0 | EnableGrp1
str w0, [x1]
mov w0, #1 << 7 // allow NS access to GICC_PMR
str w0, [x1, #4] // GICC_PMR
#endif
msr sctlr_el2, xzr
/*
* Prepare the switch to the EL2_SP1 mode from EL3
*/
ldr x0, =start_ns // Return after mode switch
mov x1, #0x3c9 // EL2_SP1 | D | A | I | F
msr elr_el3, x0
msr spsr_el3, x1
eret
start_ns:
/*
* Kernel parameters
*/
mov x0, xzr
mov x1, xzr
mov x2, xzr
mov x3, xzr
mrs x4, mpidr_el1
// ARM MPIDR_EL1 bytes: Aff3 (AArch64), Stuff, Aff2, Aff1, Aff0
// Test the the MPIDR_EL1 register against 0xff00ffffff to
// extract the primary CPU.
ldr x1, =0xff00ffffff
tst x4, x1 // check for cpuid==zero
mov x1, xzr // load previous 'xzr' value back to x1
b.eq 2f // secondary CPU
/*
* Secondary CPUs
*/
1: wfe
/* The Linux kernel v5.8 and older writes the entry point address
* of the secondary CPUs to this address, and does a SEV, waking up
* the secondary CPUs.
*
* gem5 informs the kernel the desired address via cpu-release-addr
* of the DTB.
*
* When this is first reached immediately after the bootloader starts,
* the value at that address must be 0, which is the default memory
* value set by gem5 for otherwise uninitialized memory, leading to
* WFE.
*/
ldr x4, [x22]
cbz x4, 1b
br x4 // branch to the given address
2:
/*
* UART initialisation (38400 8N1)
*/
ldr x4, =UART_BASE // UART base
mov w5, #0x10 // ibrd
str w5, [x4, #0x24]
mov w5, #0xc300
orr w5, w5, #0x0001 // cr
str w5, [x4, #0x30]
/*
* CLCD output site MB
*/
ldr x4, =SYSREGS_BASE
ldr w5, =(1 << 31) | (1 << 30) | (7 << 20) | (0 << 16) // START|WRITE|MUXFPGA|SITE_MB
str wzr, [x4, #0xa0] // V2M_SYS_CFGDATA
str w5, [x4, #0xa4] // V2M_SYS_CFGCTRL
/*
* Primary CPU
*/
// The kernel boot protocol specifies that the DTB address is placed
// in x0.
// https://github.com/torvalds/linux/blob/v5.7/Documentation/arm64/
// booting.rst#4-call-the-kernel-image
mov x0, x21
// Jump into the kernel entry point.
br x20
.ltorg
.org 0x200
|
wangyu-/udp2raw | 41,608 | lib/aes_acc/asm/arm64.S | .text
.type _vpaes_consts,%object
.align 7 // totally strategic alignment
_vpaes_consts:
.Lk_mc_forward: // mc_forward
.quad 0x0407060500030201, 0x0C0F0E0D080B0A09
.quad 0x080B0A0904070605, 0x000302010C0F0E0D
.quad 0x0C0F0E0D080B0A09, 0x0407060500030201
.quad 0x000302010C0F0E0D, 0x080B0A0904070605
.Lk_mc_backward: // mc_backward
.quad 0x0605040702010003, 0x0E0D0C0F0A09080B
.quad 0x020100030E0D0C0F, 0x0A09080B06050407
.quad 0x0E0D0C0F0A09080B, 0x0605040702010003
.quad 0x0A09080B06050407, 0x020100030E0D0C0F
.Lk_sr: // sr
.quad 0x0706050403020100, 0x0F0E0D0C0B0A0908
.quad 0x030E09040F0A0500, 0x0B06010C07020D08
.quad 0x0F060D040B020900, 0x070E050C030A0108
.quad 0x0B0E0104070A0D00, 0x0306090C0F020508
//
// "Hot" constants
//
.Lk_inv: // inv, inva
.quad 0x0E05060F0D080180, 0x040703090A0B0C02
.quad 0x01040A060F0B0780, 0x030D0E0C02050809
.Lk_ipt: // input transform (lo, hi)
.quad 0xC2B2E8985A2A7000, 0xCABAE09052227808
.quad 0x4C01307D317C4D00, 0xCD80B1FCB0FDCC81
.Lk_sbo: // sbou, sbot
.quad 0xD0D26D176FBDC700, 0x15AABF7AC502A878
.quad 0xCFE474A55FBB6A00, 0x8E1E90D1412B35FA
.Lk_sb1: // sb1u, sb1t
.quad 0x3618D415FAE22300, 0x3BF7CCC10D2ED9EF
.quad 0xB19BE18FCB503E00, 0xA5DF7A6E142AF544
.Lk_sb2: // sb2u, sb2t
.quad 0x69EB88400AE12900, 0xC2A163C8AB82234A
.quad 0xE27A93C60B712400, 0x5EB7E955BC982FCD
//
// Decryption stuff
//
.Lk_dipt: // decryption input transform
.quad 0x0F505B040B545F00, 0x154A411E114E451A
.quad 0x86E383E660056500, 0x12771772F491F194
.Lk_dsbo: // decryption sbox final output
.quad 0x1387EA537EF94000, 0xC7AA6DB9D4943E2D
.quad 0x12D7560F93441D00, 0xCA4B8159D8C58E9C
.Lk_dsb9: // decryption sbox output *9*u, *9*t
.quad 0x851C03539A86D600, 0xCAD51F504F994CC9
.quad 0xC03B1789ECD74900, 0x725E2C9EB2FBA565
.Lk_dsbd: // decryption sbox output *D*u, *D*t
.quad 0x7D57CCDFE6B1A200, 0xF56E9B13882A4439
.quad 0x3CE2FAF724C6CB00, 0x2931180D15DEEFD3
.Lk_dsbb: // decryption sbox output *B*u, *B*t
.quad 0xD022649296B44200, 0x602646F6B0F2D404
.quad 0xC19498A6CD596700, 0xF3FF0C3E3255AA6B
.Lk_dsbe: // decryption sbox output *E*u, *E*t
.quad 0x46F2929626D4D000, 0x2242600464B4F6B0
.quad 0x0C55A6CDFFAAC100, 0x9467F36B98593E32
//
// Key schedule constants
//
.Lk_dksd: // decryption key schedule: invskew x*D
.quad 0xFEB91A5DA3E44700, 0x0740E3A45A1DBEF9
.quad 0x41C277F4B5368300, 0x5FDC69EAAB289D1E
.Lk_dksb: // decryption key schedule: invskew x*B
.quad 0x9A4FCA1F8550D500, 0x03D653861CC94C99
.quad 0x115BEDA7B6FC4A00, 0xD993256F7E3482C8
.Lk_dkse: // decryption key schedule: invskew x*E + 0x63
.quad 0xD5031CCA1FC9D600, 0x53859A4C994F5086
.quad 0xA23196054FDC7BE8, 0xCD5EF96A20B31487
.Lk_dks9: // decryption key schedule: invskew x*9
.quad 0xB6116FC87ED9A700, 0x4AED933482255BFC
.quad 0x4576516227143300, 0x8BB89FACE9DAFDCE
.Lk_rcon: // rcon
.quad 0x1F8391B9AF9DEEB6, 0x702A98084D7C7D81
.Lk_opt: // output transform
.quad 0xFF9F4929D6B66000, 0xF7974121DEBE6808
.quad 0x01EDBD5150BCEC00, 0xE10D5DB1B05C0CE0
.Lk_deskew: // deskew tables: inverts the sbox's "skew"
.quad 0x07E4A34047A4E300, 0x1DFEB95A5DBEF91A
.quad 0x5F36B5DC83EA6900, 0x2841C2ABF49D1E77
.byte 86,101,99,116,111,114,32,80,101,114,109,117,116,97,105,111,110,32,65,69,83,32,102,111,114,32,65,82,77,118,56,44,32,77,105,107,101,32,72,97,109,98,117,114,103,32,40,83,116,97,110,102,111,114,100,32,85,110,105,118,101,114,115,105,116,121,41,0
.align 2
.size _vpaes_consts,.-_vpaes_consts
.align 6
##
## _aes_preheat
##
## Fills register %r10 -> .aes_consts (so you can -fPIC)
## and %xmm9-%xmm15 as specified below.
##
.type _vpaes_encrypt_preheat,%function
.align 4
_vpaes_encrypt_preheat:
adr x10, .Lk_inv
movi v17.16b, #0x0f
ld1 {v18.2d,v19.2d}, [x10],#32 // .Lk_inv
ld1 {v20.2d,v21.2d,v22.2d,v23.2d}, [x10],#64 // .Lk_ipt, .Lk_sbo
ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x10] // .Lk_sb1, .Lk_sb2
ret
.size _vpaes_encrypt_preheat,.-_vpaes_encrypt_preheat
##
## _aes_encrypt_core
##
## AES-encrypt %xmm0.
##
## Inputs:
## %xmm0 = input
## %xmm9-%xmm15 as in _vpaes_preheat
## (%rdx) = scheduled keys
##
## Output in %xmm0
## Clobbers %xmm1-%xmm5, %r9, %r10, %r11, %rax
## Preserves %xmm6 - %xmm8 so you get some local vectors
##
##
.type _vpaes_encrypt_core,%function
.align 4
_vpaes_encrypt_core:
mov x9, x2
ldr w8, [x2,#240] // pull rounds
adr x11, .Lk_mc_forward+16
// vmovdqa .Lk_ipt(%rip), %xmm2 # iptlo
ld1 {v16.2d}, [x9], #16 // vmovdqu (%r9), %xmm5 # round0 key
and v1.16b, v7.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1
ushr v0.16b, v7.16b, #4 // vpsrlb $4, %xmm0, %xmm0
tbl v1.16b, {v20.16b}, v1.16b // vpshufb %xmm1, %xmm2, %xmm1
// vmovdqa .Lk_ipt+16(%rip), %xmm3 # ipthi
tbl v2.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm3, %xmm2
eor v0.16b, v1.16b, v16.16b // vpxor %xmm5, %xmm1, %xmm0
eor v0.16b, v0.16b, v2.16b // vpxor %xmm2, %xmm0, %xmm0
b .Lenc_entry
.align 4
.Lenc_loop:
// middle of middle round
add x10, x11, #0x40
tbl v4.16b, {v25.16b}, v2.16b // vpshufb %xmm2, %xmm13, %xmm4 # 4 = sb1u
ld1 {v1.2d}, [x11], #16 // vmovdqa -0x40(%r11,%r10), %xmm1 # .Lk_mc_forward[]
tbl v0.16b, {v24.16b}, v3.16b // vpshufb %xmm3, %xmm12, %xmm0 # 0 = sb1t
eor v4.16b, v4.16b, v16.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k
tbl v5.16b, {v27.16b}, v2.16b // vpshufb %xmm2, %xmm15, %xmm5 # 4 = sb2u
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = A
tbl v2.16b, {v26.16b}, v3.16b // vpshufb %xmm3, %xmm14, %xmm2 # 2 = sb2t
ld1 {v4.2d}, [x10] // vmovdqa (%r11,%r10), %xmm4 # .Lk_mc_backward[]
tbl v3.16b, {v0.16b}, v1.16b // vpshufb %xmm1, %xmm0, %xmm3 # 0 = B
eor v2.16b, v2.16b, v5.16b // vpxor %xmm5, %xmm2, %xmm2 # 2 = 2A
tbl v0.16b, {v0.16b}, v4.16b // vpshufb %xmm4, %xmm0, %xmm0 # 3 = D
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3 # 0 = 2A+B
tbl v4.16b, {v3.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm4 # 0 = 2B+C
eor v0.16b, v0.16b, v3.16b // vpxor %xmm3, %xmm0, %xmm0 # 3 = 2A+B+D
and x11, x11, #~(1<<6) // and $0x30, %r11 # ... mod 4
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = 2A+3B+C+D
sub w8, w8, #1 // nr--
.Lenc_entry:
// top of round
and v1.16b, v0.16b, v17.16b // vpand %xmm0, %xmm9, %xmm1 # 0 = k
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0 # 1 = i
tbl v5.16b, {v19.16b}, v1.16b // vpshufb %xmm1, %xmm11, %xmm5 # 2 = a/k
eor v1.16b, v1.16b, v0.16b // vpxor %xmm0, %xmm1, %xmm1 # 0 = j
tbl v3.16b, {v18.16b}, v0.16b // vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i
tbl v4.16b, {v18.16b}, v1.16b // vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j
eor v3.16b, v3.16b, v5.16b // vpxor %xmm5, %xmm3, %xmm3 # 3 = iak = 1/i + a/k
eor v4.16b, v4.16b, v5.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = jak = 1/j + a/k
tbl v2.16b, {v18.16b}, v3.16b // vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak
tbl v3.16b, {v18.16b}, v4.16b // vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak
eor v2.16b, v2.16b, v1.16b // vpxor %xmm1, %xmm2, %xmm2 # 2 = io
eor v3.16b, v3.16b, v0.16b // vpxor %xmm0, %xmm3, %xmm3 # 3 = jo
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm5
cbnz w8, .Lenc_loop
// middle of last round
add x10, x11, #0x80
// vmovdqa -0x60(%r10), %xmm4 # 3 : sbou .Lk_sbo
// vmovdqa -0x50(%r10), %xmm0 # 0 : sbot .Lk_sbo+16
tbl v4.16b, {v22.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou
ld1 {v1.2d}, [x10] // vmovdqa 0x40(%r11,%r10), %xmm1 # .Lk_sr[]
tbl v0.16b, {v23.16b}, v3.16b // vpshufb %xmm3, %xmm0, %xmm0 # 0 = sb1t
eor v4.16b, v4.16b, v16.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = A
tbl v0.16b, {v0.16b}, v1.16b // vpshufb %xmm1, %xmm0, %xmm0
ret
.size _vpaes_encrypt_core,.-_vpaes_encrypt_core
.globl vpaes_encrypt
.type vpaes_encrypt,%function
.align 4
vpaes_encrypt:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
ld1 {v7.16b}, [x0]
bl _vpaes_encrypt_preheat
bl _vpaes_encrypt_core
st1 {v0.16b}, [x1]
ldp x29,x30,[sp],#16
ret
.size vpaes_encrypt,.-vpaes_encrypt
.type _vpaes_encrypt_2x,%function
.align 4
_vpaes_encrypt_2x:
mov x9, x2
ldr w8, [x2,#240] // pull rounds
adr x11, .Lk_mc_forward+16
// vmovdqa .Lk_ipt(%rip), %xmm2 # iptlo
ld1 {v16.2d}, [x9], #16 // vmovdqu (%r9), %xmm5 # round0 key
and v1.16b, v14.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1
ushr v0.16b, v14.16b, #4 // vpsrlb $4, %xmm0, %xmm0
and v9.16b, v15.16b, v17.16b
ushr v8.16b, v15.16b, #4
tbl v1.16b, {v20.16b}, v1.16b // vpshufb %xmm1, %xmm2, %xmm1
tbl v9.16b, {v20.16b}, v9.16b
// vmovdqa .Lk_ipt+16(%rip), %xmm3 # ipthi
tbl v2.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm3, %xmm2
tbl v10.16b, {v21.16b}, v8.16b
eor v0.16b, v1.16b, v16.16b // vpxor %xmm5, %xmm1, %xmm0
eor v8.16b, v9.16b, v16.16b
eor v0.16b, v0.16b, v2.16b // vpxor %xmm2, %xmm0, %xmm0
eor v8.16b, v8.16b, v10.16b
b .Lenc_2x_entry
.align 4
.Lenc_2x_loop:
// middle of middle round
add x10, x11, #0x40
tbl v4.16b, {v25.16b}, v2.16b // vpshufb %xmm2, %xmm13, %xmm4 # 4 = sb1u
tbl v12.16b, {v25.16b}, v10.16b
ld1 {v1.2d}, [x11], #16 // vmovdqa -0x40(%r11,%r10), %xmm1 # .Lk_mc_forward[]
tbl v0.16b, {v24.16b}, v3.16b // vpshufb %xmm3, %xmm12, %xmm0 # 0 = sb1t
tbl v8.16b, {v24.16b}, v11.16b
eor v4.16b, v4.16b, v16.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k
eor v12.16b, v12.16b, v16.16b
tbl v5.16b, {v27.16b}, v2.16b // vpshufb %xmm2, %xmm15, %xmm5 # 4 = sb2u
tbl v13.16b, {v27.16b}, v10.16b
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = A
eor v8.16b, v8.16b, v12.16b
tbl v2.16b, {v26.16b}, v3.16b // vpshufb %xmm3, %xmm14, %xmm2 # 2 = sb2t
tbl v10.16b, {v26.16b}, v11.16b
ld1 {v4.2d}, [x10] // vmovdqa (%r11,%r10), %xmm4 # .Lk_mc_backward[]
tbl v3.16b, {v0.16b}, v1.16b // vpshufb %xmm1, %xmm0, %xmm3 # 0 = B
tbl v11.16b, {v8.16b}, v1.16b
eor v2.16b, v2.16b, v5.16b // vpxor %xmm5, %xmm2, %xmm2 # 2 = 2A
eor v10.16b, v10.16b, v13.16b
tbl v0.16b, {v0.16b}, v4.16b // vpshufb %xmm4, %xmm0, %xmm0 # 3 = D
tbl v8.16b, {v8.16b}, v4.16b
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3 # 0 = 2A+B
eor v11.16b, v11.16b, v10.16b
tbl v4.16b, {v3.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm4 # 0 = 2B+C
tbl v12.16b, {v11.16b},v1.16b
eor v0.16b, v0.16b, v3.16b // vpxor %xmm3, %xmm0, %xmm0 # 3 = 2A+B+D
eor v8.16b, v8.16b, v11.16b
and x11, x11, #~(1<<6) // and $0x30, %r11 # ... mod 4
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = 2A+3B+C+D
eor v8.16b, v8.16b, v12.16b
sub w8, w8, #1 // nr--
.Lenc_2x_entry:
// top of round
and v1.16b, v0.16b, v17.16b // vpand %xmm0, %xmm9, %xmm1 # 0 = k
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0 # 1 = i
and v9.16b, v8.16b, v17.16b
ushr v8.16b, v8.16b, #4
tbl v5.16b, {v19.16b},v1.16b // vpshufb %xmm1, %xmm11, %xmm5 # 2 = a/k
tbl v13.16b, {v19.16b},v9.16b
eor v1.16b, v1.16b, v0.16b // vpxor %xmm0, %xmm1, %xmm1 # 0 = j
eor v9.16b, v9.16b, v8.16b
tbl v3.16b, {v18.16b},v0.16b // vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i
tbl v11.16b, {v18.16b},v8.16b
tbl v4.16b, {v18.16b},v1.16b // vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j
tbl v12.16b, {v18.16b},v9.16b
eor v3.16b, v3.16b, v5.16b // vpxor %xmm5, %xmm3, %xmm3 # 3 = iak = 1/i + a/k
eor v11.16b, v11.16b, v13.16b
eor v4.16b, v4.16b, v5.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = jak = 1/j + a/k
eor v12.16b, v12.16b, v13.16b
tbl v2.16b, {v18.16b},v3.16b // vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak
tbl v10.16b, {v18.16b},v11.16b
tbl v3.16b, {v18.16b},v4.16b // vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak
tbl v11.16b, {v18.16b},v12.16b
eor v2.16b, v2.16b, v1.16b // vpxor %xmm1, %xmm2, %xmm2 # 2 = io
eor v10.16b, v10.16b, v9.16b
eor v3.16b, v3.16b, v0.16b // vpxor %xmm0, %xmm3, %xmm3 # 3 = jo
eor v11.16b, v11.16b, v8.16b
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm5
cbnz w8, .Lenc_2x_loop
// middle of last round
add x10, x11, #0x80
// vmovdqa -0x60(%r10), %xmm4 # 3 : sbou .Lk_sbo
// vmovdqa -0x50(%r10), %xmm0 # 0 : sbot .Lk_sbo+16
tbl v4.16b, {v22.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou
tbl v12.16b, {v22.16b}, v10.16b
ld1 {v1.2d}, [x10] // vmovdqa 0x40(%r11,%r10), %xmm1 # .Lk_sr[]
tbl v0.16b, {v23.16b}, v3.16b // vpshufb %xmm3, %xmm0, %xmm0 # 0 = sb1t
tbl v8.16b, {v23.16b}, v11.16b
eor v4.16b, v4.16b, v16.16b // vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k
eor v12.16b, v12.16b, v16.16b
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 0 = A
eor v8.16b, v8.16b, v12.16b
tbl v0.16b, {v0.16b},v1.16b // vpshufb %xmm1, %xmm0, %xmm0
tbl v1.16b, {v8.16b},v1.16b
ret
.size _vpaes_encrypt_2x,.-_vpaes_encrypt_2x
.type _vpaes_decrypt_preheat,%function
.align 4
_vpaes_decrypt_preheat:
adr x10, .Lk_inv
movi v17.16b, #0x0f
adr x11, .Lk_dipt
ld1 {v18.2d,v19.2d}, [x10],#32 // .Lk_inv
ld1 {v20.2d,v21.2d,v22.2d,v23.2d}, [x11],#64 // .Lk_dipt, .Lk_dsbo
ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x11],#64 // .Lk_dsb9, .Lk_dsbd
ld1 {v28.2d,v29.2d,v30.2d,v31.2d}, [x11] // .Lk_dsbb, .Lk_dsbe
ret
.size _vpaes_decrypt_preheat,.-_vpaes_decrypt_preheat
##
## Decryption core
##
## Same API as encryption core.
##
.type _vpaes_decrypt_core,%function
.align 4
_vpaes_decrypt_core:
mov x9, x2
ldr w8, [x2,#240] // pull rounds
// vmovdqa .Lk_dipt(%rip), %xmm2 # iptlo
lsl x11, x8, #4 // mov %rax, %r11; shl $4, %r11
eor x11, x11, #0x30 // xor $0x30, %r11
adr x10, .Lk_sr
and x11, x11, #0x30 // and $0x30, %r11
add x11, x11, x10
adr x10, .Lk_mc_forward+48
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm4 # round0 key
and v1.16b, v7.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1
ushr v0.16b, v7.16b, #4 // vpsrlb $4, %xmm0, %xmm0
tbl v2.16b, {v20.16b}, v1.16b // vpshufb %xmm1, %xmm2, %xmm2
ld1 {v5.2d}, [x10] // vmovdqa .Lk_mc_forward+48(%rip), %xmm5
// vmovdqa .Lk_dipt+16(%rip), %xmm1 # ipthi
tbl v0.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm1, %xmm0
eor v2.16b, v2.16b, v16.16b // vpxor %xmm4, %xmm2, %xmm2
eor v0.16b, v0.16b, v2.16b // vpxor %xmm2, %xmm0, %xmm0
b .Ldec_entry
.align 4
.Ldec_loop:
//
// Inverse mix columns
//
// vmovdqa -0x20(%r10),%xmm4 # 4 : sb9u
// vmovdqa -0x10(%r10),%xmm1 # 0 : sb9t
tbl v4.16b, {v24.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sb9u
tbl v1.16b, {v25.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb9t
eor v0.16b, v4.16b, v16.16b // vpxor %xmm4, %xmm0, %xmm0
// vmovdqa 0x00(%r10),%xmm4 # 4 : sbdu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
// vmovdqa 0x10(%r10),%xmm1 # 0 : sbdt
tbl v4.16b, {v26.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbdu
tbl v0.16b, {v0.16b}, v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v1.16b, {v27.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbdt
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
// vmovdqa 0x20(%r10), %xmm4 # 4 : sbbu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
// vmovdqa 0x30(%r10), %xmm1 # 0 : sbbt
tbl v4.16b, {v28.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbbu
tbl v0.16b, {v0.16b}, v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v1.16b, {v29.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbbt
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
// vmovdqa 0x40(%r10), %xmm4 # 4 : sbeu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
// vmovdqa 0x50(%r10), %xmm1 # 0 : sbet
tbl v4.16b, {v30.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbeu
tbl v0.16b, {v0.16b}, v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v1.16b, {v31.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbet
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
ext v5.16b, v5.16b, v5.16b, #12 // vpalignr $12, %xmm5, %xmm5, %xmm5
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
sub w8, w8, #1 // sub $1,%rax # nr--
.Ldec_entry:
// top of round
and v1.16b, v0.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1 # 0 = k
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0 # 1 = i
tbl v2.16b, {v19.16b}, v1.16b // vpshufb %xmm1, %xmm11, %xmm2 # 2 = a/k
eor v1.16b, v1.16b, v0.16b // vpxor %xmm0, %xmm1, %xmm1 # 0 = j
tbl v3.16b, {v18.16b}, v0.16b // vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i
tbl v4.16b, {v18.16b}, v1.16b // vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3 # 3 = iak = 1/i + a/k
eor v4.16b, v4.16b, v2.16b // vpxor %xmm2, %xmm4, %xmm4 # 4 = jak = 1/j + a/k
tbl v2.16b, {v18.16b}, v3.16b // vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak
tbl v3.16b, {v18.16b}, v4.16b // vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak
eor v2.16b, v2.16b, v1.16b // vpxor %xmm1, %xmm2, %xmm2 # 2 = io
eor v3.16b, v3.16b, v0.16b // vpxor %xmm0, %xmm3, %xmm3 # 3 = jo
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm0
cbnz w8, .Ldec_loop
// middle of last round
// vmovdqa 0x60(%r10), %xmm4 # 3 : sbou
tbl v4.16b, {v22.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou
// vmovdqa 0x70(%r10), %xmm1 # 0 : sbot
ld1 {v2.2d}, [x11] // vmovdqa -0x160(%r11), %xmm2 # .Lk_sr-.Lk_dsbd=-0x160
tbl v1.16b, {v23.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb1t
eor v4.16b, v4.16b, v16.16b // vpxor %xmm0, %xmm4, %xmm4 # 4 = sb1u + k
eor v0.16b, v1.16b, v4.16b // vpxor %xmm4, %xmm1, %xmm0 # 0 = A
tbl v0.16b, {v0.16b}, v2.16b // vpshufb %xmm2, %xmm0, %xmm0
ret
.size _vpaes_decrypt_core,.-_vpaes_decrypt_core
.globl vpaes_decrypt
.type vpaes_decrypt,%function
.align 4
vpaes_decrypt:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
ld1 {v7.16b}, [x0]
bl _vpaes_decrypt_preheat
bl _vpaes_decrypt_core
st1 {v0.16b}, [x1]
ldp x29,x30,[sp],#16
ret
.size vpaes_decrypt,.-vpaes_decrypt
// v14-v15 input, v0-v1 output
.type _vpaes_decrypt_2x,%function
.align 4
_vpaes_decrypt_2x:
mov x9, x2
ldr w8, [x2,#240] // pull rounds
// vmovdqa .Lk_dipt(%rip), %xmm2 # iptlo
lsl x11, x8, #4 // mov %rax, %r11; shl $4, %r11
eor x11, x11, #0x30 // xor $0x30, %r11
adr x10, .Lk_sr
and x11, x11, #0x30 // and $0x30, %r11
add x11, x11, x10
adr x10, .Lk_mc_forward+48
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm4 # round0 key
and v1.16b, v14.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1
ushr v0.16b, v14.16b, #4 // vpsrlb $4, %xmm0, %xmm0
and v9.16b, v15.16b, v17.16b
ushr v8.16b, v15.16b, #4
tbl v2.16b, {v20.16b},v1.16b // vpshufb %xmm1, %xmm2, %xmm2
tbl v10.16b, {v20.16b},v9.16b
ld1 {v5.2d}, [x10] // vmovdqa .Lk_mc_forward+48(%rip), %xmm5
// vmovdqa .Lk_dipt+16(%rip), %xmm1 # ipthi
tbl v0.16b, {v21.16b},v0.16b // vpshufb %xmm0, %xmm1, %xmm0
tbl v8.16b, {v21.16b},v8.16b
eor v2.16b, v2.16b, v16.16b // vpxor %xmm4, %xmm2, %xmm2
eor v10.16b, v10.16b, v16.16b
eor v0.16b, v0.16b, v2.16b // vpxor %xmm2, %xmm0, %xmm0
eor v8.16b, v8.16b, v10.16b
b .Ldec_2x_entry
.align 4
.Ldec_2x_loop:
//
// Inverse mix columns
//
// vmovdqa -0x20(%r10),%xmm4 # 4 : sb9u
// vmovdqa -0x10(%r10),%xmm1 # 0 : sb9t
tbl v4.16b, {v24.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sb9u
tbl v12.16b, {v24.16b}, v10.16b
tbl v1.16b, {v25.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb9t
tbl v9.16b, {v25.16b}, v11.16b
eor v0.16b, v4.16b, v16.16b // vpxor %xmm4, %xmm0, %xmm0
eor v8.16b, v12.16b, v16.16b
// vmovdqa 0x00(%r10),%xmm4 # 4 : sbdu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
eor v8.16b, v8.16b, v9.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
// vmovdqa 0x10(%r10),%xmm1 # 0 : sbdt
tbl v4.16b, {v26.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbdu
tbl v12.16b, {v26.16b}, v10.16b
tbl v0.16b, {v0.16b},v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v8.16b, {v8.16b},v5.16b
tbl v1.16b, {v27.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbdt
tbl v9.16b, {v27.16b}, v11.16b
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
eor v8.16b, v8.16b, v12.16b
// vmovdqa 0x20(%r10), %xmm4 # 4 : sbbu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
eor v8.16b, v8.16b, v9.16b
// vmovdqa 0x30(%r10), %xmm1 # 0 : sbbt
tbl v4.16b, {v28.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbbu
tbl v12.16b, {v28.16b}, v10.16b
tbl v0.16b, {v0.16b},v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v8.16b, {v8.16b},v5.16b
tbl v1.16b, {v29.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbbt
tbl v9.16b, {v29.16b}, v11.16b
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
eor v8.16b, v8.16b, v12.16b
// vmovdqa 0x40(%r10), %xmm4 # 4 : sbeu
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
eor v8.16b, v8.16b, v9.16b
// vmovdqa 0x50(%r10), %xmm1 # 0 : sbet
tbl v4.16b, {v30.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbeu
tbl v12.16b, {v30.16b}, v10.16b
tbl v0.16b, {v0.16b},v5.16b // vpshufb %xmm5, %xmm0, %xmm0 # MC ch
tbl v8.16b, {v8.16b},v5.16b
tbl v1.16b, {v31.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbet
tbl v9.16b, {v31.16b}, v11.16b
eor v0.16b, v0.16b, v4.16b // vpxor %xmm4, %xmm0, %xmm0 # 4 = ch
eor v8.16b, v8.16b, v12.16b
ext v5.16b, v5.16b, v5.16b, #12 // vpalignr $12, %xmm5, %xmm5, %xmm5
eor v0.16b, v0.16b, v1.16b // vpxor %xmm1, %xmm0, %xmm0 # 0 = ch
eor v8.16b, v8.16b, v9.16b
sub w8, w8, #1 // sub $1,%rax # nr--
.Ldec_2x_entry:
// top of round
and v1.16b, v0.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1 # 0 = k
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0 # 1 = i
and v9.16b, v8.16b, v17.16b
ushr v8.16b, v8.16b, #4
tbl v2.16b, {v19.16b},v1.16b // vpshufb %xmm1, %xmm11, %xmm2 # 2 = a/k
tbl v10.16b, {v19.16b},v9.16b
eor v1.16b, v1.16b, v0.16b // vpxor %xmm0, %xmm1, %xmm1 # 0 = j
eor v9.16b, v9.16b, v8.16b
tbl v3.16b, {v18.16b},v0.16b // vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i
tbl v11.16b, {v18.16b},v8.16b
tbl v4.16b, {v18.16b},v1.16b // vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j
tbl v12.16b, {v18.16b},v9.16b
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3 # 3 = iak = 1/i + a/k
eor v11.16b, v11.16b, v10.16b
eor v4.16b, v4.16b, v2.16b // vpxor %xmm2, %xmm4, %xmm4 # 4 = jak = 1/j + a/k
eor v12.16b, v12.16b, v10.16b
tbl v2.16b, {v18.16b},v3.16b // vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak
tbl v10.16b, {v18.16b},v11.16b
tbl v3.16b, {v18.16b},v4.16b // vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak
tbl v11.16b, {v18.16b},v12.16b
eor v2.16b, v2.16b, v1.16b // vpxor %xmm1, %xmm2, %xmm2 # 2 = io
eor v10.16b, v10.16b, v9.16b
eor v3.16b, v3.16b, v0.16b // vpxor %xmm0, %xmm3, %xmm3 # 3 = jo
eor v11.16b, v11.16b, v8.16b
ld1 {v16.2d}, [x9],#16 // vmovdqu (%r9), %xmm0
cbnz w8, .Ldec_2x_loop
// middle of last round
// vmovdqa 0x60(%r10), %xmm4 # 3 : sbou
tbl v4.16b, {v22.16b}, v2.16b // vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou
tbl v12.16b, {v22.16b}, v10.16b
// vmovdqa 0x70(%r10), %xmm1 # 0 : sbot
tbl v1.16b, {v23.16b}, v3.16b // vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb1t
tbl v9.16b, {v23.16b}, v11.16b
ld1 {v2.2d}, [x11] // vmovdqa -0x160(%r11), %xmm2 # .Lk_sr-.Lk_dsbd=-0x160
eor v4.16b, v4.16b, v16.16b // vpxor %xmm0, %xmm4, %xmm4 # 4 = sb1u + k
eor v12.16b, v12.16b, v16.16b
eor v0.16b, v1.16b, v4.16b // vpxor %xmm4, %xmm1, %xmm0 # 0 = A
eor v8.16b, v9.16b, v12.16b
tbl v0.16b, {v0.16b},v2.16b // vpshufb %xmm2, %xmm0, %xmm0
tbl v1.16b, {v8.16b},v2.16b
ret
.size _vpaes_decrypt_2x,.-_vpaes_decrypt_2x
########################################################
## ##
## AES key schedule ##
## ##
########################################################
.type _vpaes_key_preheat,%function
.align 4
_vpaes_key_preheat:
adr x10, .Lk_inv
movi v16.16b, #0x5b // .Lk_s63
adr x11, .Lk_sb1
movi v17.16b, #0x0f // .Lk_s0F
ld1 {v18.2d,v19.2d,v20.2d,v21.2d}, [x10] // .Lk_inv, .Lk_ipt
adr x10, .Lk_dksd
ld1 {v22.2d,v23.2d}, [x11] // .Lk_sb1
adr x11, .Lk_mc_forward
ld1 {v24.2d,v25.2d,v26.2d,v27.2d}, [x10],#64 // .Lk_dksd, .Lk_dksb
ld1 {v28.2d,v29.2d,v30.2d,v31.2d}, [x10],#64 // .Lk_dkse, .Lk_dks9
ld1 {v8.2d}, [x10] // .Lk_rcon
ld1 {v9.2d}, [x11] // .Lk_mc_forward[0]
ret
.size _vpaes_key_preheat,.-_vpaes_key_preheat
.type _vpaes_schedule_core,%function
.align 4
_vpaes_schedule_core:
stp x29, x30, [sp,#-16]!
add x29,sp,#0
bl _vpaes_key_preheat // load the tables
ld1 {v0.16b}, [x0],#16 // vmovdqu (%rdi), %xmm0 # load key (unaligned)
// input transform
mov v3.16b, v0.16b // vmovdqa %xmm0, %xmm3
bl _vpaes_schedule_transform
mov v7.16b, v0.16b // vmovdqa %xmm0, %xmm7
adr x10, .Lk_sr // lea .Lk_sr(%rip),%r10
add x8, x8, x10
cbnz w3, .Lschedule_am_decrypting
// encrypting, output zeroth round key after transform
st1 {v0.2d}, [x2] // vmovdqu %xmm0, (%rdx)
b .Lschedule_go
.Lschedule_am_decrypting:
// decrypting, output zeroth round key after shiftrows
ld1 {v1.2d}, [x8] // vmovdqa (%r8,%r10), %xmm1
tbl v3.16b, {v3.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm3
st1 {v3.2d}, [x2] // vmovdqu %xmm3, (%rdx)
eor x8, x8, #0x30 // xor $0x30, %r8
.Lschedule_go:
cmp w1, #192 // cmp $192, %esi
b.hi .Lschedule_256
b.eq .Lschedule_192
// 128: fall though
##
## .schedule_128
##
## 128-bit specific part of key schedule.
##
## This schedule is really simple, because all its parts
## are accomplished by the subroutines.
##
.Lschedule_128:
mov x0, #10 // mov $10, %esi
.Loop_schedule_128:
sub x0, x0, #1 // dec %esi
bl _vpaes_schedule_round
cbz x0, .Lschedule_mangle_last
bl _vpaes_schedule_mangle // write output
b .Loop_schedule_128
##
## .aes_schedule_192
##
## 192-bit specific part of key schedule.
##
## The main body of this schedule is the same as the 128-bit
## schedule, but with more smearing. The long, high side is
## stored in %xmm7 as before, and the short, low side is in
## the high bits of %xmm6.
##
## This schedule is somewhat nastier, however, because each
## round produces 192 bits of key material, or 1.5 round keys.
## Therefore, on each cycle we do 2 rounds and produce 3 round
## keys.
##
.align 4
.Lschedule_192:
sub x0, x0, #8
ld1 {v0.16b}, [x0] // vmovdqu 8(%rdi),%xmm0 # load key part 2 (very unaligned)
bl _vpaes_schedule_transform // input transform
mov v6.16b, v0.16b // vmovdqa %xmm0, %xmm6 # save short part
eor v4.16b, v4.16b, v4.16b // vpxor %xmm4, %xmm4, %xmm4 # clear 4
ins v6.d[0], v4.d[0] // vmovhlps %xmm4, %xmm6, %xmm6 # clobber low side with zeros
mov x0, #4 // mov $4, %esi
.Loop_schedule_192:
sub x0, x0, #1 // dec %esi
bl _vpaes_schedule_round
ext v0.16b, v6.16b, v0.16b, #8 // vpalignr $8,%xmm6,%xmm0,%xmm0
bl _vpaes_schedule_mangle // save key n
bl _vpaes_schedule_192_smear
bl _vpaes_schedule_mangle // save key n+1
bl _vpaes_schedule_round
cbz x0, .Lschedule_mangle_last
bl _vpaes_schedule_mangle // save key n+2
bl _vpaes_schedule_192_smear
b .Loop_schedule_192
##
## .aes_schedule_256
##
## 256-bit specific part of key schedule.
##
## The structure here is very similar to the 128-bit
## schedule, but with an additional "low side" in
## %xmm6. The low side's rounds are the same as the
## high side's, except no rcon and no rotation.
##
.align 4
.Lschedule_256:
ld1 {v0.16b}, [x0] // vmovdqu 16(%rdi),%xmm0 # load key part 2 (unaligned)
bl _vpaes_schedule_transform // input transform
mov x0, #7 // mov $7, %esi
.Loop_schedule_256:
sub x0, x0, #1 // dec %esi
bl _vpaes_schedule_mangle // output low result
mov v6.16b, v0.16b // vmovdqa %xmm0, %xmm6 # save cur_lo in xmm6
// high round
bl _vpaes_schedule_round
cbz x0, .Lschedule_mangle_last
bl _vpaes_schedule_mangle
// low round. swap xmm7 and xmm6
dup v0.4s, v0.s[3] // vpshufd $0xFF, %xmm0, %xmm0
movi v4.16b, #0
mov v5.16b, v7.16b // vmovdqa %xmm7, %xmm5
mov v7.16b, v6.16b // vmovdqa %xmm6, %xmm7
bl _vpaes_schedule_low_round
mov v7.16b, v5.16b // vmovdqa %xmm5, %xmm7
b .Loop_schedule_256
##
## .aes_schedule_mangle_last
##
## Mangler for last round of key schedule
## Mangles %xmm0
## when encrypting, outputs out(%xmm0) ^ 63
## when decrypting, outputs unskew(%xmm0)
##
## Always called right before return... jumps to cleanup and exits
##
.align 4
.Lschedule_mangle_last:
// schedule last round key from xmm0
adr x11, .Lk_deskew // lea .Lk_deskew(%rip),%r11 # prepare to deskew
cbnz w3, .Lschedule_mangle_last_dec
// encrypting
ld1 {v1.2d}, [x8] // vmovdqa (%r8,%r10),%xmm1
adr x11, .Lk_opt // lea .Lk_opt(%rip), %r11 # prepare to output transform
add x2, x2, #32 // add $32, %rdx
tbl v0.16b, {v0.16b}, v1.16b // vpshufb %xmm1, %xmm0, %xmm0 # output permute
.Lschedule_mangle_last_dec:
ld1 {v20.2d,v21.2d}, [x11] // reload constants
sub x2, x2, #16 // add $-16, %rdx
eor v0.16b, v0.16b, v16.16b // vpxor .Lk_s63(%rip), %xmm0, %xmm0
bl _vpaes_schedule_transform // output transform
st1 {v0.2d}, [x2] // vmovdqu %xmm0, (%rdx) # save last key
// cleanup
eor v0.16b, v0.16b, v0.16b // vpxor %xmm0, %xmm0, %xmm0
eor v1.16b, v1.16b, v1.16b // vpxor %xmm1, %xmm1, %xmm1
eor v2.16b, v2.16b, v2.16b // vpxor %xmm2, %xmm2, %xmm2
eor v3.16b, v3.16b, v3.16b // vpxor %xmm3, %xmm3, %xmm3
eor v4.16b, v4.16b, v4.16b // vpxor %xmm4, %xmm4, %xmm4
eor v5.16b, v5.16b, v5.16b // vpxor %xmm5, %xmm5, %xmm5
eor v6.16b, v6.16b, v6.16b // vpxor %xmm6, %xmm6, %xmm6
eor v7.16b, v7.16b, v7.16b // vpxor %xmm7, %xmm7, %xmm7
ldp x29, x30, [sp],#16
ret
.size _vpaes_schedule_core,.-_vpaes_schedule_core
##
## .aes_schedule_192_smear
##
## Smear the short, low side in the 192-bit key schedule.
##
## Inputs:
## %xmm7: high side, b a x y
## %xmm6: low side, d c 0 0
## %xmm13: 0
##
## Outputs:
## %xmm6: b+c+d b+c 0 0
## %xmm0: b+c+d b+c b a
##
.type _vpaes_schedule_192_smear,%function
.align 4
_vpaes_schedule_192_smear:
movi v1.16b, #0
dup v0.4s, v7.s[3]
ins v1.s[3], v6.s[2] // vpshufd $0x80, %xmm6, %xmm1 # d c 0 0 -> c 0 0 0
ins v0.s[0], v7.s[2] // vpshufd $0xFE, %xmm7, %xmm0 # b a _ _ -> b b b a
eor v6.16b, v6.16b, v1.16b // vpxor %xmm1, %xmm6, %xmm6 # -> c+d c 0 0
eor v1.16b, v1.16b, v1.16b // vpxor %xmm1, %xmm1, %xmm1
eor v6.16b, v6.16b, v0.16b // vpxor %xmm0, %xmm6, %xmm6 # -> b+c+d b+c b a
mov v0.16b, v6.16b // vmovdqa %xmm6, %xmm0
ins v6.d[0], v1.d[0] // vmovhlps %xmm1, %xmm6, %xmm6 # clobber low side with zeros
ret
.size _vpaes_schedule_192_smear,.-_vpaes_schedule_192_smear
##
## .aes_schedule_round
##
## Runs one main round of the key schedule on %xmm0, %xmm7
##
## Specifically, runs subbytes on the high dword of %xmm0
## then rotates it by one byte and xors into the low dword of
## %xmm7.
##
## Adds rcon from low byte of %xmm8, then rotates %xmm8 for
## next rcon.
##
## Smears the dwords of %xmm7 by xoring the low into the
## second low, result into third, result into highest.
##
## Returns results in %xmm7 = %xmm0.
## Clobbers %xmm1-%xmm4, %r11.
##
.type _vpaes_schedule_round,%function
.align 4
_vpaes_schedule_round:
// extract rcon from xmm8
movi v4.16b, #0 // vpxor %xmm4, %xmm4, %xmm4
ext v1.16b, v8.16b, v4.16b, #15 // vpalignr $15, %xmm8, %xmm4, %xmm1
ext v8.16b, v8.16b, v8.16b, #15 // vpalignr $15, %xmm8, %xmm8, %xmm8
eor v7.16b, v7.16b, v1.16b // vpxor %xmm1, %xmm7, %xmm7
// rotate
dup v0.4s, v0.s[3] // vpshufd $0xFF, %xmm0, %xmm0
ext v0.16b, v0.16b, v0.16b, #1 // vpalignr $1, %xmm0, %xmm0, %xmm0
// fall through...
// low round: same as high round, but no rotation and no rcon.
_vpaes_schedule_low_round:
// smear xmm7
ext v1.16b, v4.16b, v7.16b, #12 // vpslldq $4, %xmm7, %xmm1
eor v7.16b, v7.16b, v1.16b // vpxor %xmm1, %xmm7, %xmm7
ext v4.16b, v4.16b, v7.16b, #8 // vpslldq $8, %xmm7, %xmm4
// subbytes
and v1.16b, v0.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1 # 0 = k
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0 # 1 = i
eor v7.16b, v7.16b, v4.16b // vpxor %xmm4, %xmm7, %xmm7
tbl v2.16b, {v19.16b}, v1.16b // vpshufb %xmm1, %xmm11, %xmm2 # 2 = a/k
eor v1.16b, v1.16b, v0.16b // vpxor %xmm0, %xmm1, %xmm1 # 0 = j
tbl v3.16b, {v18.16b}, v0.16b // vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3 # 3 = iak = 1/i + a/k
tbl v4.16b, {v18.16b}, v1.16b // vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j
eor v7.16b, v7.16b, v16.16b // vpxor .Lk_s63(%rip), %xmm7, %xmm7
tbl v3.16b, {v18.16b}, v3.16b // vpshufb %xmm3, %xmm10, %xmm3 # 2 = 1/iak
eor v4.16b, v4.16b, v2.16b // vpxor %xmm2, %xmm4, %xmm4 # 4 = jak = 1/j + a/k
tbl v2.16b, {v18.16b}, v4.16b // vpshufb %xmm4, %xmm10, %xmm2 # 3 = 1/jak
eor v3.16b, v3.16b, v1.16b // vpxor %xmm1, %xmm3, %xmm3 # 2 = io
eor v2.16b, v2.16b, v0.16b // vpxor %xmm0, %xmm2, %xmm2 # 3 = jo
tbl v4.16b, {v23.16b}, v3.16b // vpshufb %xmm3, %xmm13, %xmm4 # 4 = sbou
tbl v1.16b, {v22.16b}, v2.16b // vpshufb %xmm2, %xmm12, %xmm1 # 0 = sb1t
eor v1.16b, v1.16b, v4.16b // vpxor %xmm4, %xmm1, %xmm1 # 0 = sbox output
// add in smeared stuff
eor v0.16b, v1.16b, v7.16b // vpxor %xmm7, %xmm1, %xmm0
eor v7.16b, v1.16b, v7.16b // vmovdqa %xmm0, %xmm7
ret
.size _vpaes_schedule_round,.-_vpaes_schedule_round
##
## .aes_schedule_transform
##
## Linear-transform %xmm0 according to tables at (%r11)
##
## Requires that %xmm9 = 0x0F0F... as in preheat
## Output in %xmm0
## Clobbers %xmm1, %xmm2
##
.type _vpaes_schedule_transform,%function
.align 4
_vpaes_schedule_transform:
and v1.16b, v0.16b, v17.16b // vpand %xmm9, %xmm0, %xmm1
ushr v0.16b, v0.16b, #4 // vpsrlb $4, %xmm0, %xmm0
// vmovdqa (%r11), %xmm2 # lo
tbl v2.16b, {v20.16b}, v1.16b // vpshufb %xmm1, %xmm2, %xmm2
// vmovdqa 16(%r11), %xmm1 # hi
tbl v0.16b, {v21.16b}, v0.16b // vpshufb %xmm0, %xmm1, %xmm0
eor v0.16b, v0.16b, v2.16b // vpxor %xmm2, %xmm0, %xmm0
ret
.size _vpaes_schedule_transform,.-_vpaes_schedule_transform
##
## .aes_schedule_mangle
##
## Mangle xmm0 from (basis-transformed) standard version
## to our version.
##
## On encrypt,
## xor with 0x63
## multiply by circulant 0,1,1,1
## apply shiftrows transform
##
## On decrypt,
## xor with 0x63
## multiply by "inverse mixcolumns" circulant E,B,D,9
## deskew
## apply shiftrows transform
##
##
## Writes out to (%rdx), and increments or decrements it
## Keeps track of round number mod 4 in %r8
## Preserves xmm0
## Clobbers xmm1-xmm5
##
.type _vpaes_schedule_mangle,%function
.align 4
_vpaes_schedule_mangle:
mov v4.16b, v0.16b // vmovdqa %xmm0, %xmm4 # save xmm0 for later
// vmovdqa .Lk_mc_forward(%rip),%xmm5
cbnz w3, .Lschedule_mangle_dec
// encrypting
eor v4.16b, v0.16b, v16.16b // vpxor .Lk_s63(%rip), %xmm0, %xmm4
add x2, x2, #16 // add $16, %rdx
tbl v4.16b, {v4.16b}, v9.16b // vpshufb %xmm5, %xmm4, %xmm4
tbl v1.16b, {v4.16b}, v9.16b // vpshufb %xmm5, %xmm4, %xmm1
tbl v3.16b, {v1.16b}, v9.16b // vpshufb %xmm5, %xmm1, %xmm3
eor v4.16b, v4.16b, v1.16b // vpxor %xmm1, %xmm4, %xmm4
ld1 {v1.2d}, [x8] // vmovdqa (%r8,%r10), %xmm1
eor v3.16b, v3.16b, v4.16b // vpxor %xmm4, %xmm3, %xmm3
b .Lschedule_mangle_both
.align 4
.Lschedule_mangle_dec:
// inverse mix columns
// lea .Lk_dksd(%rip),%r11
ushr v1.16b, v4.16b, #4 // vpsrlb $4, %xmm4, %xmm1 # 1 = hi
and v4.16b, v4.16b, v17.16b // vpand %xmm9, %xmm4, %xmm4 # 4 = lo
// vmovdqa 0x00(%r11), %xmm2
tbl v2.16b, {v24.16b}, v4.16b // vpshufb %xmm4, %xmm2, %xmm2
// vmovdqa 0x10(%r11), %xmm3
tbl v3.16b, {v25.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm3
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3
tbl v3.16b, {v3.16b}, v9.16b // vpshufb %xmm5, %xmm3, %xmm3
// vmovdqa 0x20(%r11), %xmm2
tbl v2.16b, {v26.16b}, v4.16b // vpshufb %xmm4, %xmm2, %xmm2
eor v2.16b, v2.16b, v3.16b // vpxor %xmm3, %xmm2, %xmm2
// vmovdqa 0x30(%r11), %xmm3
tbl v3.16b, {v27.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm3
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3
tbl v3.16b, {v3.16b}, v9.16b // vpshufb %xmm5, %xmm3, %xmm3
// vmovdqa 0x40(%r11), %xmm2
tbl v2.16b, {v28.16b}, v4.16b // vpshufb %xmm4, %xmm2, %xmm2
eor v2.16b, v2.16b, v3.16b // vpxor %xmm3, %xmm2, %xmm2
// vmovdqa 0x50(%r11), %xmm3
tbl v3.16b, {v29.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm3
eor v3.16b, v3.16b, v2.16b // vpxor %xmm2, %xmm3, %xmm3
// vmovdqa 0x60(%r11), %xmm2
tbl v2.16b, {v30.16b}, v4.16b // vpshufb %xmm4, %xmm2, %xmm2
tbl v3.16b, {v3.16b}, v9.16b // vpshufb %xmm5, %xmm3, %xmm3
// vmovdqa 0x70(%r11), %xmm4
tbl v4.16b, {v31.16b}, v1.16b // vpshufb %xmm1, %xmm4, %xmm4
ld1 {v1.2d}, [x8] // vmovdqa (%r8,%r10), %xmm1
eor v2.16b, v2.16b, v3.16b // vpxor %xmm3, %xmm2, %xmm2
eor v3.16b, v4.16b, v2.16b // vpxor %xmm2, %xmm4, %xmm3
sub x2, x2, #16 // add $-16, %rdx
.Lschedule_mangle_both:
tbl v3.16b, {v3.16b}, v1.16b // vpshufb %xmm1, %xmm3, %xmm3
add x8, x8, #64-16 // add $-16, %r8
and x8, x8, #~(1<<6) // and $0x30, %r8
st1 {v3.2d}, [x2] // vmovdqu %xmm3, (%rdx)
ret
.size _vpaes_schedule_mangle,.-_vpaes_schedule_mangle
.globl vpaes_set_encrypt_key
.type vpaes_set_encrypt_key,%function
.align 4
vpaes_set_encrypt_key:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
lsr w9, w1, #5 // shr $5,%eax
add w9, w9, #5 // $5,%eax
str w9, [x2,#240] // mov %eax,240(%rdx) # AES_KEY->rounds = nbits/32+5;
mov w3, #0 // mov $0,%ecx
mov x8, #0x30 // mov $0x30,%r8d
bl _vpaes_schedule_core
eor x0, x0, x0
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
ret
.size vpaes_set_encrypt_key,.-vpaes_set_encrypt_key
.globl vpaes_set_decrypt_key
.type vpaes_set_decrypt_key,%function
.align 4
vpaes_set_decrypt_key:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
lsr w9, w1, #5 // shr $5,%eax
add w9, w9, #5 // $5,%eax
str w9, [x2,#240] // mov %eax,240(%rdx) # AES_KEY->rounds = nbits/32+5;
lsl w9, w9, #4 // shl $4,%eax
add x2, x2, #16 // lea 16(%rdx,%rax),%rdx
add x2, x2, x9
mov w3, #1 // mov $1,%ecx
lsr w8, w1, #1 // shr $1,%r8d
and x8, x8, #32 // and $32,%r8d
eor x8, x8, #32 // xor $32,%r8d # nbits==192?0:32
bl _vpaes_schedule_core
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
ret
.size vpaes_set_decrypt_key,.-vpaes_set_decrypt_key
.globl vpaes_cbc_encrypt
.type vpaes_cbc_encrypt,%function
.align 4
vpaes_cbc_encrypt:
cbz x2, .Lcbc_abort
cmp w5, #0 // check direction
b.eq vpaes_cbc_decrypt
stp x29,x30,[sp,#-16]!
add x29,sp,#0
mov x17, x2 // reassign
mov x2, x3 // reassign
ld1 {v0.16b}, [x4] // load ivec
bl _vpaes_encrypt_preheat
b .Lcbc_enc_loop
.align 4
.Lcbc_enc_loop:
ld1 {v7.16b}, [x0],#16 // load input
eor v7.16b, v7.16b, v0.16b // xor with ivec
bl _vpaes_encrypt_core
st1 {v0.16b}, [x1],#16 // save output
subs x17, x17, #16
b.hi .Lcbc_enc_loop
st1 {v0.16b}, [x4] // write ivec
ldp x29,x30,[sp],#16
.Lcbc_abort:
ret
.size vpaes_cbc_encrypt,.-vpaes_cbc_encrypt
.type vpaes_cbc_decrypt,%function
.align 4
vpaes_cbc_decrypt:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
stp d10,d11,[sp,#-16]!
stp d12,d13,[sp,#-16]!
stp d14,d15,[sp,#-16]!
mov x17, x2 // reassign
mov x2, x3 // reassign
ld1 {v6.16b}, [x4] // load ivec
bl _vpaes_decrypt_preheat
tst x17, #16
b.eq .Lcbc_dec_loop2x
ld1 {v7.16b}, [x0], #16 // load input
bl _vpaes_decrypt_core
eor v0.16b, v0.16b, v6.16b // xor with ivec
orr v6.16b, v7.16b, v7.16b // next ivec value
st1 {v0.16b}, [x1], #16
subs x17, x17, #16
b.ls .Lcbc_dec_done
.align 4
.Lcbc_dec_loop2x:
ld1 {v14.16b,v15.16b}, [x0], #32
bl _vpaes_decrypt_2x
eor v0.16b, v0.16b, v6.16b // xor with ivec
eor v1.16b, v1.16b, v14.16b
orr v6.16b, v15.16b, v15.16b
st1 {v0.16b,v1.16b}, [x1], #32
subs x17, x17, #32
b.hi .Lcbc_dec_loop2x
.Lcbc_dec_done:
st1 {v6.16b}, [x4]
ldp d14,d15,[sp],#16
ldp d12,d13,[sp],#16
ldp d10,d11,[sp],#16
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
ret
.size vpaes_cbc_decrypt,.-vpaes_cbc_decrypt
.globl vpaes_ecb_encrypt
.type vpaes_ecb_encrypt,%function
.align 4
vpaes_ecb_encrypt:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
stp d10,d11,[sp,#-16]!
stp d12,d13,[sp,#-16]!
stp d14,d15,[sp,#-16]!
mov x17, x2
mov x2, x3
bl _vpaes_encrypt_preheat
tst x17, #16
b.eq .Lecb_enc_loop
ld1 {v7.16b}, [x0],#16
bl _vpaes_encrypt_core
st1 {v0.16b}, [x1],#16
subs x17, x17, #16
b.ls .Lecb_enc_done
.align 4
.Lecb_enc_loop:
ld1 {v14.16b,v15.16b}, [x0], #32
bl _vpaes_encrypt_2x
st1 {v0.16b,v1.16b}, [x1], #32
subs x17, x17, #32
b.hi .Lecb_enc_loop
.Lecb_enc_done:
ldp d14,d15,[sp],#16
ldp d12,d13,[sp],#16
ldp d10,d11,[sp],#16
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
ret
.size vpaes_ecb_encrypt,.-vpaes_ecb_encrypt
.globl vpaes_ecb_decrypt
.type vpaes_ecb_decrypt,%function
.align 4
vpaes_ecb_decrypt:
stp x29,x30,[sp,#-16]!
add x29,sp,#0
stp d8,d9,[sp,#-16]! // ABI spec says so
stp d10,d11,[sp,#-16]!
stp d12,d13,[sp,#-16]!
stp d14,d15,[sp,#-16]!
mov x17, x2
mov x2, x3
bl _vpaes_decrypt_preheat
tst x17, #16
b.eq .Lecb_dec_loop
ld1 {v7.16b}, [x0],#16
bl _vpaes_encrypt_core
st1 {v0.16b}, [x1],#16
subs x17, x17, #16
b.ls .Lecb_dec_done
.align 4
.Lecb_dec_loop:
ld1 {v14.16b,v15.16b}, [x0], #32
bl _vpaes_decrypt_2x
st1 {v0.16b,v1.16b}, [x1], #32
subs x17, x17, #32
b.hi .Lecb_dec_loop
.Lecb_dec_done:
ldp d14,d15,[sp],#16
ldp d12,d13,[sp],#16
ldp d10,d11,[sp],#16
ldp d8,d9,[sp],#16
ldp x29,x30,[sp],#16
ret
.size vpaes_ecb_decrypt,.-vpaes_ecb_decrypt
|
wangyu-/udp2raw | 68,220 | lib/aes_acc/asm/x86.S | .file "aes-586.s"
.text
.type _x86_AES_encrypt_compact,@function
.align 16
_x86_AES_encrypt_compact:
movl %edi,20(%esp)
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
movl -128(%ebp),%edi
movl -96(%ebp),%esi
movl -64(%ebp),%edi
movl -32(%ebp),%esi
movl (%ebp),%edi
movl 32(%ebp),%esi
movl 64(%ebp),%edi
movl 96(%ebp),%esi
.align 16
.L000loop:
movl %eax,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
shrl $16,%ebx
movzbl -128(%ebp,%esi,1),%esi
movzbl %ch,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
shrl $24,%ecx
movzbl -128(%ebp,%esi,1),%esi
movzbl %dh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edx
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
andl $255,%edx
movzbl -128(%ebp,%edx,1),%edx
movzbl %ah,%eax
movzbl -128(%ebp,%eax,1),%eax
shll $8,%eax
xorl %eax,%edx
movl 4(%esp),%eax
andl $255,%ebx
movzbl -128(%ebp,%ebx,1),%ebx
shll $16,%ebx
xorl %ebx,%edx
movl 8(%esp),%ebx
movzbl -128(%ebp,%ecx,1),%ecx
shll $24,%ecx
xorl %ecx,%edx
movl %esi,%ecx
movl $2155905152,%ebp
andl %ecx,%ebp
leal (%ecx,%ecx,1),%edi
movl %ebp,%esi
shrl $7,%ebp
andl $4278124286,%edi
subl %ebp,%esi
movl %ecx,%ebp
andl $454761243,%esi
rorl $16,%ebp
xorl %edi,%esi
movl %ecx,%edi
xorl %esi,%ecx
rorl $24,%edi
xorl %ebp,%esi
roll $24,%ecx
xorl %edi,%esi
movl $2155905152,%ebp
xorl %esi,%ecx
andl %edx,%ebp
leal (%edx,%edx,1),%edi
movl %ebp,%esi
shrl $7,%ebp
andl $4278124286,%edi
subl %ebp,%esi
movl %edx,%ebp
andl $454761243,%esi
rorl $16,%ebp
xorl %edi,%esi
movl %edx,%edi
xorl %esi,%edx
rorl $24,%edi
xorl %ebp,%esi
roll $24,%edx
xorl %edi,%esi
movl $2155905152,%ebp
xorl %esi,%edx
andl %eax,%ebp
leal (%eax,%eax,1),%edi
movl %ebp,%esi
shrl $7,%ebp
andl $4278124286,%edi
subl %ebp,%esi
movl %eax,%ebp
andl $454761243,%esi
rorl $16,%ebp
xorl %edi,%esi
movl %eax,%edi
xorl %esi,%eax
rorl $24,%edi
xorl %ebp,%esi
roll $24,%eax
xorl %edi,%esi
movl $2155905152,%ebp
xorl %esi,%eax
andl %ebx,%ebp
leal (%ebx,%ebx,1),%edi
movl %ebp,%esi
shrl $7,%ebp
andl $4278124286,%edi
subl %ebp,%esi
movl %ebx,%ebp
andl $454761243,%esi
rorl $16,%ebp
xorl %edi,%esi
movl %ebx,%edi
xorl %esi,%ebx
rorl $24,%edi
xorl %ebp,%esi
roll $24,%ebx
xorl %edi,%esi
xorl %esi,%ebx
movl 20(%esp),%edi
movl 28(%esp),%ebp
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
cmpl 24(%esp),%edi
movl %edi,20(%esp)
jb .L000loop
movl %eax,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
shrl $16,%ebx
movzbl -128(%ebp,%esi,1),%esi
movzbl %ch,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
shrl $24,%ecx
movzbl -128(%ebp,%esi,1),%esi
movzbl %dh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edx
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl 20(%esp),%edi
andl $255,%edx
movzbl -128(%ebp,%edx,1),%edx
movzbl %ah,%eax
movzbl -128(%ebp,%eax,1),%eax
shll $8,%eax
xorl %eax,%edx
movl 4(%esp),%eax
andl $255,%ebx
movzbl -128(%ebp,%ebx,1),%ebx
shll $16,%ebx
xorl %ebx,%edx
movl 8(%esp),%ebx
movzbl -128(%ebp,%ecx,1),%ecx
shll $24,%ecx
xorl %ecx,%edx
movl %esi,%ecx
xorl 16(%edi),%eax
xorl 20(%edi),%ebx
xorl 24(%edi),%ecx
xorl 28(%edi),%edx
ret
.size _x86_AES_encrypt_compact,.-_x86_AES_encrypt_compact
.type _sse_AES_encrypt_compact,@function
.align 16
_sse_AES_encrypt_compact:
pxor (%edi),%mm0
pxor 8(%edi),%mm4
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
movl $454761243,%eax
movl %eax,8(%esp)
movl %eax,12(%esp)
movl -128(%ebp),%eax
movl -96(%ebp),%ebx
movl -64(%ebp),%ecx
movl -32(%ebp),%edx
movl (%ebp),%eax
movl 32(%ebp),%ebx
movl 64(%ebp),%ecx
movl 96(%ebp),%edx
.align 16
.L001loop:
pshufw $8,%mm0,%mm1
pshufw $13,%mm4,%mm5
movd %mm1,%eax
movd %mm5,%ebx
movl %edi,20(%esp)
movzbl %al,%esi
movzbl %ah,%edx
pshufw $13,%mm0,%mm2
movzbl -128(%ebp,%esi,1),%ecx
movzbl %bl,%edi
movzbl -128(%ebp,%edx,1),%edx
shrl $16,%eax
shll $8,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $16,%esi
pshufw $8,%mm4,%mm6
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %ah,%edi
shll $24,%esi
shrl $16,%ebx
orl %esi,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $8,%esi
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %al,%edi
shll $24,%esi
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bl,%edi
movd %mm2,%eax
movd %ecx,%mm0
movzbl -128(%ebp,%edi,1),%ecx
movzbl %ah,%edi
shll $16,%ecx
movd %mm6,%ebx
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $24,%esi
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bl,%edi
shll $8,%esi
shrl $16,%ebx
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %al,%edi
shrl $16,%eax
movd %ecx,%mm1
movzbl -128(%ebp,%edi,1),%ecx
movzbl %ah,%edi
shll $16,%ecx
andl $255,%eax
orl %esi,%ecx
punpckldq %mm1,%mm0
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $24,%esi
andl $255,%ebx
movzbl -128(%ebp,%eax,1),%eax
orl %esi,%ecx
shll $16,%eax
movzbl -128(%ebp,%edi,1),%esi
orl %eax,%edx
shll $8,%esi
movzbl -128(%ebp,%ebx,1),%ebx
orl %esi,%ecx
orl %ebx,%edx
movl 20(%esp),%edi
movd %ecx,%mm4
movd %edx,%mm5
punpckldq %mm5,%mm4
addl $16,%edi
cmpl 24(%esp),%edi
ja .L002out
movq 8(%esp),%mm2
pxor %mm3,%mm3
pxor %mm7,%mm7
movq %mm0,%mm1
movq %mm4,%mm5
pcmpgtb %mm0,%mm3
pcmpgtb %mm4,%mm7
pand %mm2,%mm3
pand %mm2,%mm7
pshufw $177,%mm0,%mm2
pshufw $177,%mm4,%mm6
paddb %mm0,%mm0
paddb %mm4,%mm4
pxor %mm3,%mm0
pxor %mm7,%mm4
pshufw $177,%mm2,%mm3
pshufw $177,%mm6,%mm7
pxor %mm0,%mm1
pxor %mm4,%mm5
pxor %mm2,%mm0
pxor %mm6,%mm4
movq %mm3,%mm2
movq %mm7,%mm6
pslld $8,%mm3
pslld $8,%mm7
psrld $24,%mm2
psrld $24,%mm6
pxor %mm3,%mm0
pxor %mm7,%mm4
pxor %mm2,%mm0
pxor %mm6,%mm4
movq %mm1,%mm3
movq %mm5,%mm7
movq (%edi),%mm2
movq 8(%edi),%mm6
psrld $8,%mm1
psrld $8,%mm5
movl -128(%ebp),%eax
pslld $24,%mm3
pslld $24,%mm7
movl -64(%ebp),%ebx
pxor %mm1,%mm0
pxor %mm5,%mm4
movl (%ebp),%ecx
pxor %mm3,%mm0
pxor %mm7,%mm4
movl 64(%ebp),%edx
pxor %mm2,%mm0
pxor %mm6,%mm4
jmp .L001loop
.align 16
.L002out:
pxor (%edi),%mm0
pxor 8(%edi),%mm4
ret
.size _sse_AES_encrypt_compact,.-_sse_AES_encrypt_compact
.type _x86_AES_encrypt,@function
.align 16
_x86_AES_encrypt:
movl %edi,20(%esp)
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
.align 16
.L003loop:
movl %eax,%esi
andl $255,%esi
movl (%ebp,%esi,8),%esi
movzbl %bh,%edi
xorl 3(%ebp,%edi,8),%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movl %edx,%edi
shrl $24,%edi
xorl 1(%ebp,%edi,8),%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
shrl $16,%ebx
movl (%ebp,%esi,8),%esi
movzbl %ch,%edi
xorl 3(%ebp,%edi,8),%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movl %eax,%edi
shrl $24,%edi
xorl 1(%ebp,%edi,8),%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
shrl $24,%ecx
movl (%ebp,%esi,8),%esi
movzbl %dh,%edi
xorl 3(%ebp,%edi,8),%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edx
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movzbl %bh,%edi
xorl 1(%ebp,%edi,8),%esi
movl 20(%esp),%edi
movl (%ebp,%edx,8),%edx
movzbl %ah,%eax
xorl 3(%ebp,%eax,8),%edx
movl 4(%esp),%eax
andl $255,%ebx
xorl 2(%ebp,%ebx,8),%edx
movl 8(%esp),%ebx
xorl 1(%ebp,%ecx,8),%edx
movl %esi,%ecx
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
cmpl 24(%esp),%edi
movl %edi,20(%esp)
jb .L003loop
movl %eax,%esi
andl $255,%esi
movl 2(%ebp,%esi,8),%esi
andl $255,%esi
movzbl %bh,%edi
movl (%ebp,%edi,8),%edi
andl $65280,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movl (%ebp,%edi,8),%edi
andl $16711680,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movl 2(%ebp,%edi,8),%edi
andl $4278190080,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
shrl $16,%ebx
movl 2(%ebp,%esi,8),%esi
andl $255,%esi
movzbl %ch,%edi
movl (%ebp,%edi,8),%edi
andl $65280,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movl (%ebp,%edi,8),%edi
andl $16711680,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $24,%edi
movl 2(%ebp,%edi,8),%edi
andl $4278190080,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
shrl $24,%ecx
movl 2(%ebp,%esi,8),%esi
andl $255,%esi
movzbl %dh,%edi
movl (%ebp,%edi,8),%edi
andl $65280,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edx
andl $255,%edi
movl (%ebp,%edi,8),%edi
andl $16711680,%edi
xorl %edi,%esi
movzbl %bh,%edi
movl 2(%ebp,%edi,8),%edi
andl $4278190080,%edi
xorl %edi,%esi
movl 20(%esp),%edi
andl $255,%edx
movl 2(%ebp,%edx,8),%edx
andl $255,%edx
movzbl %ah,%eax
movl (%ebp,%eax,8),%eax
andl $65280,%eax
xorl %eax,%edx
movl 4(%esp),%eax
andl $255,%ebx
movl (%ebp,%ebx,8),%ebx
andl $16711680,%ebx
xorl %ebx,%edx
movl 8(%esp),%ebx
movl 2(%ebp,%ecx,8),%ecx
andl $4278190080,%ecx
xorl %ecx,%edx
movl %esi,%ecx
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
ret
.align 64
.LAES_Te:
.long 2774754246,2774754246
.long 2222750968,2222750968
.long 2574743534,2574743534
.long 2373680118,2373680118
.long 234025727,234025727
.long 3177933782,3177933782
.long 2976870366,2976870366
.long 1422247313,1422247313
.long 1345335392,1345335392
.long 50397442,50397442
.long 2842126286,2842126286
.long 2099981142,2099981142
.long 436141799,436141799
.long 1658312629,1658312629
.long 3870010189,3870010189
.long 2591454956,2591454956
.long 1170918031,1170918031
.long 2642575903,2642575903
.long 1086966153,1086966153
.long 2273148410,2273148410
.long 368769775,368769775
.long 3948501426,3948501426
.long 3376891790,3376891790
.long 200339707,200339707
.long 3970805057,3970805057
.long 1742001331,1742001331
.long 4255294047,4255294047
.long 3937382213,3937382213
.long 3214711843,3214711843
.long 4154762323,4154762323
.long 2524082916,2524082916
.long 1539358875,1539358875
.long 3266819957,3266819957
.long 486407649,486407649
.long 2928907069,2928907069
.long 1780885068,1780885068
.long 1513502316,1513502316
.long 1094664062,1094664062
.long 49805301,49805301
.long 1338821763,1338821763
.long 1546925160,1546925160
.long 4104496465,4104496465
.long 887481809,887481809
.long 150073849,150073849
.long 2473685474,2473685474
.long 1943591083,1943591083
.long 1395732834,1395732834
.long 1058346282,1058346282
.long 201589768,201589768
.long 1388824469,1388824469
.long 1696801606,1696801606
.long 1589887901,1589887901
.long 672667696,672667696
.long 2711000631,2711000631
.long 251987210,251987210
.long 3046808111,3046808111
.long 151455502,151455502
.long 907153956,907153956
.long 2608889883,2608889883
.long 1038279391,1038279391
.long 652995533,652995533
.long 1764173646,1764173646
.long 3451040383,3451040383
.long 2675275242,2675275242
.long 453576978,453576978
.long 2659418909,2659418909
.long 1949051992,1949051992
.long 773462580,773462580
.long 756751158,756751158
.long 2993581788,2993581788
.long 3998898868,3998898868
.long 4221608027,4221608027
.long 4132590244,4132590244
.long 1295727478,1295727478
.long 1641469623,1641469623
.long 3467883389,3467883389
.long 2066295122,2066295122
.long 1055122397,1055122397
.long 1898917726,1898917726
.long 2542044179,2542044179
.long 4115878822,4115878822
.long 1758581177,1758581177
.long 0,0
.long 753790401,753790401
.long 1612718144,1612718144
.long 536673507,536673507
.long 3367088505,3367088505
.long 3982187446,3982187446
.long 3194645204,3194645204
.long 1187761037,1187761037
.long 3653156455,3653156455
.long 1262041458,1262041458
.long 3729410708,3729410708
.long 3561770136,3561770136
.long 3898103984,3898103984
.long 1255133061,1255133061
.long 1808847035,1808847035
.long 720367557,720367557
.long 3853167183,3853167183
.long 385612781,385612781
.long 3309519750,3309519750
.long 3612167578,3612167578
.long 1429418854,1429418854
.long 2491778321,2491778321
.long 3477423498,3477423498
.long 284817897,284817897
.long 100794884,100794884
.long 2172616702,2172616702
.long 4031795360,4031795360
.long 1144798328,1144798328
.long 3131023141,3131023141
.long 3819481163,3819481163
.long 4082192802,4082192802
.long 4272137053,4272137053
.long 3225436288,3225436288
.long 2324664069,2324664069
.long 2912064063,2912064063
.long 3164445985,3164445985
.long 1211644016,1211644016
.long 83228145,83228145
.long 3753688163,3753688163
.long 3249976951,3249976951
.long 1977277103,1977277103
.long 1663115586,1663115586
.long 806359072,806359072
.long 452984805,452984805
.long 250868733,250868733
.long 1842533055,1842533055
.long 1288555905,1288555905
.long 336333848,336333848
.long 890442534,890442534
.long 804056259,804056259
.long 3781124030,3781124030
.long 2727843637,2727843637
.long 3427026056,3427026056
.long 957814574,957814574
.long 1472513171,1472513171
.long 4071073621,4071073621
.long 2189328124,2189328124
.long 1195195770,1195195770
.long 2892260552,2892260552
.long 3881655738,3881655738
.long 723065138,723065138
.long 2507371494,2507371494
.long 2690670784,2690670784
.long 2558624025,2558624025
.long 3511635870,3511635870
.long 2145180835,2145180835
.long 1713513028,1713513028
.long 2116692564,2116692564
.long 2878378043,2878378043
.long 2206763019,2206763019
.long 3393603212,3393603212
.long 703524551,703524551
.long 3552098411,3552098411
.long 1007948840,1007948840
.long 2044649127,2044649127
.long 3797835452,3797835452
.long 487262998,487262998
.long 1994120109,1994120109
.long 1004593371,1004593371
.long 1446130276,1446130276
.long 1312438900,1312438900
.long 503974420,503974420
.long 3679013266,3679013266
.long 168166924,168166924
.long 1814307912,1814307912
.long 3831258296,3831258296
.long 1573044895,1573044895
.long 1859376061,1859376061
.long 4021070915,4021070915
.long 2791465668,2791465668
.long 2828112185,2828112185
.long 2761266481,2761266481
.long 937747667,937747667
.long 2339994098,2339994098
.long 854058965,854058965
.long 1137232011,1137232011
.long 1496790894,1496790894
.long 3077402074,3077402074
.long 2358086913,2358086913
.long 1691735473,1691735473
.long 3528347292,3528347292
.long 3769215305,3769215305
.long 3027004632,3027004632
.long 4199962284,4199962284
.long 133494003,133494003
.long 636152527,636152527
.long 2942657994,2942657994
.long 2390391540,2390391540
.long 3920539207,3920539207
.long 403179536,403179536
.long 3585784431,3585784431
.long 2289596656,2289596656
.long 1864705354,1864705354
.long 1915629148,1915629148
.long 605822008,605822008
.long 4054230615,4054230615
.long 3350508659,3350508659
.long 1371981463,1371981463
.long 602466507,602466507
.long 2094914977,2094914977
.long 2624877800,2624877800
.long 555687742,555687742
.long 3712699286,3712699286
.long 3703422305,3703422305
.long 2257292045,2257292045
.long 2240449039,2240449039
.long 2423288032,2423288032
.long 1111375484,1111375484
.long 3300242801,3300242801
.long 2858837708,2858837708
.long 3628615824,3628615824
.long 84083462,84083462
.long 32962295,32962295
.long 302911004,302911004
.long 2741068226,2741068226
.long 1597322602,1597322602
.long 4183250862,4183250862
.long 3501832553,3501832553
.long 2441512471,2441512471
.long 1489093017,1489093017
.long 656219450,656219450
.long 3114180135,3114180135
.long 954327513,954327513
.long 335083755,335083755
.long 3013122091,3013122091
.long 856756514,856756514
.long 3144247762,3144247762
.long 1893325225,1893325225
.long 2307821063,2307821063
.long 2811532339,2811532339
.long 3063651117,3063651117
.long 572399164,572399164
.long 2458355477,2458355477
.long 552200649,552200649
.long 1238290055,1238290055
.long 4283782570,4283782570
.long 2015897680,2015897680
.long 2061492133,2061492133
.long 2408352771,2408352771
.long 4171342169,4171342169
.long 2156497161,2156497161
.long 386731290,386731290
.long 3669999461,3669999461
.long 837215959,837215959
.long 3326231172,3326231172
.long 3093850320,3093850320
.long 3275833730,3275833730
.long 2962856233,2962856233
.long 1999449434,1999449434
.long 286199582,286199582
.long 3417354363,3417354363
.long 4233385128,4233385128
.long 3602627437,3602627437
.long 974525996,974525996
.byte 99,124,119,123,242,107,111,197
.byte 48,1,103,43,254,215,171,118
.byte 202,130,201,125,250,89,71,240
.byte 173,212,162,175,156,164,114,192
.byte 183,253,147,38,54,63,247,204
.byte 52,165,229,241,113,216,49,21
.byte 4,199,35,195,24,150,5,154
.byte 7,18,128,226,235,39,178,117
.byte 9,131,44,26,27,110,90,160
.byte 82,59,214,179,41,227,47,132
.byte 83,209,0,237,32,252,177,91
.byte 106,203,190,57,74,76,88,207
.byte 208,239,170,251,67,77,51,133
.byte 69,249,2,127,80,60,159,168
.byte 81,163,64,143,146,157,56,245
.byte 188,182,218,33,16,255,243,210
.byte 205,12,19,236,95,151,68,23
.byte 196,167,126,61,100,93,25,115
.byte 96,129,79,220,34,42,144,136
.byte 70,238,184,20,222,94,11,219
.byte 224,50,58,10,73,6,36,92
.byte 194,211,172,98,145,149,228,121
.byte 231,200,55,109,141,213,78,169
.byte 108,86,244,234,101,122,174,8
.byte 186,120,37,46,28,166,180,198
.byte 232,221,116,31,75,189,139,138
.byte 112,62,181,102,72,3,246,14
.byte 97,53,87,185,134,193,29,158
.byte 225,248,152,17,105,217,142,148
.byte 155,30,135,233,206,85,40,223
.byte 140,161,137,13,191,230,66,104
.byte 65,153,45,15,176,84,187,22
.byte 99,124,119,123,242,107,111,197
.byte 48,1,103,43,254,215,171,118
.byte 202,130,201,125,250,89,71,240
.byte 173,212,162,175,156,164,114,192
.byte 183,253,147,38,54,63,247,204
.byte 52,165,229,241,113,216,49,21
.byte 4,199,35,195,24,150,5,154
.byte 7,18,128,226,235,39,178,117
.byte 9,131,44,26,27,110,90,160
.byte 82,59,214,179,41,227,47,132
.byte 83,209,0,237,32,252,177,91
.byte 106,203,190,57,74,76,88,207
.byte 208,239,170,251,67,77,51,133
.byte 69,249,2,127,80,60,159,168
.byte 81,163,64,143,146,157,56,245
.byte 188,182,218,33,16,255,243,210
.byte 205,12,19,236,95,151,68,23
.byte 196,167,126,61,100,93,25,115
.byte 96,129,79,220,34,42,144,136
.byte 70,238,184,20,222,94,11,219
.byte 224,50,58,10,73,6,36,92
.byte 194,211,172,98,145,149,228,121
.byte 231,200,55,109,141,213,78,169
.byte 108,86,244,234,101,122,174,8
.byte 186,120,37,46,28,166,180,198
.byte 232,221,116,31,75,189,139,138
.byte 112,62,181,102,72,3,246,14
.byte 97,53,87,185,134,193,29,158
.byte 225,248,152,17,105,217,142,148
.byte 155,30,135,233,206,85,40,223
.byte 140,161,137,13,191,230,66,104
.byte 65,153,45,15,176,84,187,22
.byte 99,124,119,123,242,107,111,197
.byte 48,1,103,43,254,215,171,118
.byte 202,130,201,125,250,89,71,240
.byte 173,212,162,175,156,164,114,192
.byte 183,253,147,38,54,63,247,204
.byte 52,165,229,241,113,216,49,21
.byte 4,199,35,195,24,150,5,154
.byte 7,18,128,226,235,39,178,117
.byte 9,131,44,26,27,110,90,160
.byte 82,59,214,179,41,227,47,132
.byte 83,209,0,237,32,252,177,91
.byte 106,203,190,57,74,76,88,207
.byte 208,239,170,251,67,77,51,133
.byte 69,249,2,127,80,60,159,168
.byte 81,163,64,143,146,157,56,245
.byte 188,182,218,33,16,255,243,210
.byte 205,12,19,236,95,151,68,23
.byte 196,167,126,61,100,93,25,115
.byte 96,129,79,220,34,42,144,136
.byte 70,238,184,20,222,94,11,219
.byte 224,50,58,10,73,6,36,92
.byte 194,211,172,98,145,149,228,121
.byte 231,200,55,109,141,213,78,169
.byte 108,86,244,234,101,122,174,8
.byte 186,120,37,46,28,166,180,198
.byte 232,221,116,31,75,189,139,138
.byte 112,62,181,102,72,3,246,14
.byte 97,53,87,185,134,193,29,158
.byte 225,248,152,17,105,217,142,148
.byte 155,30,135,233,206,85,40,223
.byte 140,161,137,13,191,230,66,104
.byte 65,153,45,15,176,84,187,22
.byte 99,124,119,123,242,107,111,197
.byte 48,1,103,43,254,215,171,118
.byte 202,130,201,125,250,89,71,240
.byte 173,212,162,175,156,164,114,192
.byte 183,253,147,38,54,63,247,204
.byte 52,165,229,241,113,216,49,21
.byte 4,199,35,195,24,150,5,154
.byte 7,18,128,226,235,39,178,117
.byte 9,131,44,26,27,110,90,160
.byte 82,59,214,179,41,227,47,132
.byte 83,209,0,237,32,252,177,91
.byte 106,203,190,57,74,76,88,207
.byte 208,239,170,251,67,77,51,133
.byte 69,249,2,127,80,60,159,168
.byte 81,163,64,143,146,157,56,245
.byte 188,182,218,33,16,255,243,210
.byte 205,12,19,236,95,151,68,23
.byte 196,167,126,61,100,93,25,115
.byte 96,129,79,220,34,42,144,136
.byte 70,238,184,20,222,94,11,219
.byte 224,50,58,10,73,6,36,92
.byte 194,211,172,98,145,149,228,121
.byte 231,200,55,109,141,213,78,169
.byte 108,86,244,234,101,122,174,8
.byte 186,120,37,46,28,166,180,198
.byte 232,221,116,31,75,189,139,138
.byte 112,62,181,102,72,3,246,14
.byte 97,53,87,185,134,193,29,158
.byte 225,248,152,17,105,217,142,148
.byte 155,30,135,233,206,85,40,223
.byte 140,161,137,13,191,230,66,104
.byte 65,153,45,15,176,84,187,22
.long 1,2,4,8
.long 16,32,64,128
.long 27,54,0,0
.long 0,0,0,0
.size _x86_AES_encrypt,.-_x86_AES_encrypt
.globl AES_encrypt
.type AES_encrypt,@function
.align 16
AES_encrypt:
.L_AES_encrypt_begin:
pushl %ebp
pushl %ebx
pushl %esi
pushl %edi
movl 20(%esp),%esi
movl 28(%esp),%edi
movl %esp,%eax
subl $36,%esp
andl $-64,%esp
leal -127(%edi),%ebx
subl %esp,%ebx
negl %ebx
andl $960,%ebx
subl %ebx,%esp
addl $4,%esp
movl %eax,28(%esp)
call .L004pic_point
.L004pic_point:
popl %ebp
leal OPENSSL_ia32cap_P,%eax
leal .LAES_Te-.L004pic_point(%ebp),%ebp
leal 764(%esp),%ebx
subl %ebp,%ebx
andl $768,%ebx
leal 2176(%ebp,%ebx,1),%ebp
btl $25,(%eax)
jnc .L005x86
movq (%esi),%mm0
movq 8(%esi),%mm4
call _sse_AES_encrypt_compact
movl 28(%esp),%esp
movl 24(%esp),%esi
movq %mm0,(%esi)
movq %mm4,8(%esi)
emms
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.align 16
.L005x86:
movl %ebp,24(%esp)
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
call _x86_AES_encrypt_compact
movl 28(%esp),%esp
movl 24(%esp),%esi
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.size AES_encrypt,.-.L_AES_encrypt_begin
.type _x86_AES_decrypt_compact,@function
.align 16
_x86_AES_decrypt_compact:
movl %edi,20(%esp)
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
movl -128(%ebp),%edi
movl -96(%ebp),%esi
movl -64(%ebp),%edi
movl -32(%ebp),%esi
movl (%ebp),%edi
movl 32(%ebp),%esi
movl 64(%ebp),%edi
movl 96(%ebp),%esi
.align 16
.L006loop:
movl %eax,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %dh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ebx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %ah,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
andl $255,%edx
movzbl -128(%ebp,%edx,1),%edx
movzbl %ch,%ecx
movzbl -128(%ebp,%ecx,1),%ecx
shll $8,%ecx
xorl %ecx,%edx
movl %esi,%ecx
shrl $16,%ebx
andl $255,%ebx
movzbl -128(%ebp,%ebx,1),%ebx
shll $16,%ebx
xorl %ebx,%edx
shrl $24,%eax
movzbl -128(%ebp,%eax,1),%eax
shll $24,%eax
xorl %eax,%edx
movl $2155905152,%edi
andl %ecx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ecx,%ecx,1),%eax
subl %edi,%esi
andl $4278124286,%eax
andl $454761243,%esi
xorl %esi,%eax
movl $2155905152,%edi
andl %eax,%edi
movl %edi,%esi
shrl $7,%edi
leal (%eax,%eax,1),%ebx
subl %edi,%esi
andl $4278124286,%ebx
andl $454761243,%esi
xorl %ecx,%eax
xorl %esi,%ebx
movl $2155905152,%edi
andl %ebx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ebx,%ebx,1),%ebp
subl %edi,%esi
andl $4278124286,%ebp
andl $454761243,%esi
xorl %ecx,%ebx
roll $8,%ecx
xorl %esi,%ebp
xorl %eax,%ecx
xorl %ebp,%eax
xorl %ebx,%ecx
xorl %ebp,%ebx
roll $24,%eax
xorl %ebp,%ecx
roll $16,%ebx
xorl %eax,%ecx
roll $8,%ebp
xorl %ebx,%ecx
movl 4(%esp),%eax
xorl %ebp,%ecx
movl %ecx,12(%esp)
movl $2155905152,%edi
andl %edx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%edx,%edx,1),%ebx
subl %edi,%esi
andl $4278124286,%ebx
andl $454761243,%esi
xorl %esi,%ebx
movl $2155905152,%edi
andl %ebx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ebx,%ebx,1),%ecx
subl %edi,%esi
andl $4278124286,%ecx
andl $454761243,%esi
xorl %edx,%ebx
xorl %esi,%ecx
movl $2155905152,%edi
andl %ecx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ecx,%ecx,1),%ebp
subl %edi,%esi
andl $4278124286,%ebp
andl $454761243,%esi
xorl %edx,%ecx
roll $8,%edx
xorl %esi,%ebp
xorl %ebx,%edx
xorl %ebp,%ebx
xorl %ecx,%edx
xorl %ebp,%ecx
roll $24,%ebx
xorl %ebp,%edx
roll $16,%ecx
xorl %ebx,%edx
roll $8,%ebp
xorl %ecx,%edx
movl 8(%esp),%ebx
xorl %ebp,%edx
movl %edx,16(%esp)
movl $2155905152,%edi
andl %eax,%edi
movl %edi,%esi
shrl $7,%edi
leal (%eax,%eax,1),%ecx
subl %edi,%esi
andl $4278124286,%ecx
andl $454761243,%esi
xorl %esi,%ecx
movl $2155905152,%edi
andl %ecx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ecx,%ecx,1),%edx
subl %edi,%esi
andl $4278124286,%edx
andl $454761243,%esi
xorl %eax,%ecx
xorl %esi,%edx
movl $2155905152,%edi
andl %edx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%edx,%edx,1),%ebp
subl %edi,%esi
andl $4278124286,%ebp
andl $454761243,%esi
xorl %eax,%edx
roll $8,%eax
xorl %esi,%ebp
xorl %ecx,%eax
xorl %ebp,%ecx
xorl %edx,%eax
xorl %ebp,%edx
roll $24,%ecx
xorl %ebp,%eax
roll $16,%edx
xorl %ecx,%eax
roll $8,%ebp
xorl %edx,%eax
xorl %ebp,%eax
movl $2155905152,%edi
andl %ebx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ebx,%ebx,1),%ecx
subl %edi,%esi
andl $4278124286,%ecx
andl $454761243,%esi
xorl %esi,%ecx
movl $2155905152,%edi
andl %ecx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%ecx,%ecx,1),%edx
subl %edi,%esi
andl $4278124286,%edx
andl $454761243,%esi
xorl %ebx,%ecx
xorl %esi,%edx
movl $2155905152,%edi
andl %edx,%edi
movl %edi,%esi
shrl $7,%edi
leal (%edx,%edx,1),%ebp
subl %edi,%esi
andl $4278124286,%ebp
andl $454761243,%esi
xorl %ebx,%edx
roll $8,%ebx
xorl %esi,%ebp
xorl %ecx,%ebx
xorl %ebp,%ecx
xorl %edx,%ebx
xorl %ebp,%edx
roll $24,%ecx
xorl %ebp,%ebx
roll $16,%edx
xorl %ecx,%ebx
roll $8,%ebp
xorl %edx,%ebx
movl 12(%esp),%ecx
xorl %ebp,%ebx
movl 16(%esp),%edx
movl 20(%esp),%edi
movl 28(%esp),%ebp
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
cmpl 24(%esp),%edi
movl %edi,20(%esp)
jb .L006loop
movl %eax,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %dh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ebx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %ah,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
movzbl -128(%ebp,%esi,1),%esi
movzbl %bh,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movzbl -128(%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl 20(%esp),%edi
andl $255,%edx
movzbl -128(%ebp,%edx,1),%edx
movzbl %ch,%ecx
movzbl -128(%ebp,%ecx,1),%ecx
shll $8,%ecx
xorl %ecx,%edx
movl %esi,%ecx
shrl $16,%ebx
andl $255,%ebx
movzbl -128(%ebp,%ebx,1),%ebx
shll $16,%ebx
xorl %ebx,%edx
movl 8(%esp),%ebx
shrl $24,%eax
movzbl -128(%ebp,%eax,1),%eax
shll $24,%eax
xorl %eax,%edx
movl 4(%esp),%eax
xorl 16(%edi),%eax
xorl 20(%edi),%ebx
xorl 24(%edi),%ecx
xorl 28(%edi),%edx
ret
.size _x86_AES_decrypt_compact,.-_x86_AES_decrypt_compact
.type _sse_AES_decrypt_compact,@function
.align 16
_sse_AES_decrypt_compact:
pxor (%edi),%mm0
pxor 8(%edi),%mm4
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
movl $454761243,%eax
movl %eax,8(%esp)
movl %eax,12(%esp)
movl -128(%ebp),%eax
movl -96(%ebp),%ebx
movl -64(%ebp),%ecx
movl -32(%ebp),%edx
movl (%ebp),%eax
movl 32(%ebp),%ebx
movl 64(%ebp),%ecx
movl 96(%ebp),%edx
.align 16
.L007loop:
pshufw $12,%mm0,%mm1
pshufw $9,%mm4,%mm5
movd %mm1,%eax
movd %mm5,%ebx
movl %edi,20(%esp)
movzbl %al,%esi
movzbl %ah,%edx
pshufw $6,%mm0,%mm2
movzbl -128(%ebp,%esi,1),%ecx
movzbl %bl,%edi
movzbl -128(%ebp,%edx,1),%edx
shrl $16,%eax
shll $8,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $16,%esi
pshufw $3,%mm4,%mm6
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %ah,%edi
shll $24,%esi
shrl $16,%ebx
orl %esi,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shll $24,%esi
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %al,%edi
shll $8,%esi
movd %mm2,%eax
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bl,%edi
shll $16,%esi
movd %mm6,%ebx
movd %ecx,%mm0
movzbl -128(%ebp,%edi,1),%ecx
movzbl %al,%edi
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bl,%edi
orl %esi,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %ah,%edi
shll $16,%esi
shrl $16,%eax
orl %esi,%edx
movzbl -128(%ebp,%edi,1),%esi
movzbl %bh,%edi
shrl $16,%ebx
shll $8,%esi
movd %edx,%mm1
movzbl -128(%ebp,%edi,1),%edx
movzbl %bh,%edi
shll $24,%edx
andl $255,%ebx
orl %esi,%edx
punpckldq %mm1,%mm0
movzbl -128(%ebp,%edi,1),%esi
movzbl %al,%edi
shll $8,%esi
movzbl %ah,%eax
movzbl -128(%ebp,%ebx,1),%ebx
orl %esi,%ecx
movzbl -128(%ebp,%edi,1),%esi
orl %ebx,%edx
shll $16,%esi
movzbl -128(%ebp,%eax,1),%eax
orl %esi,%edx
shll $24,%eax
orl %eax,%ecx
movl 20(%esp),%edi
movd %edx,%mm4
movd %ecx,%mm5
punpckldq %mm5,%mm4
addl $16,%edi
cmpl 24(%esp),%edi
ja .L008out
movq %mm0,%mm3
movq %mm4,%mm7
pshufw $228,%mm0,%mm2
pshufw $228,%mm4,%mm6
movq %mm0,%mm1
movq %mm4,%mm5
pshufw $177,%mm0,%mm0
pshufw $177,%mm4,%mm4
pslld $8,%mm2
pslld $8,%mm6
psrld $8,%mm3
psrld $8,%mm7
pxor %mm2,%mm0
pxor %mm6,%mm4
pxor %mm3,%mm0
pxor %mm7,%mm4
pslld $16,%mm2
pslld $16,%mm6
psrld $16,%mm3
psrld $16,%mm7
pxor %mm2,%mm0
pxor %mm6,%mm4
pxor %mm3,%mm0
pxor %mm7,%mm4
movq 8(%esp),%mm3
pxor %mm2,%mm2
pxor %mm6,%mm6
pcmpgtb %mm1,%mm2
pcmpgtb %mm5,%mm6
pand %mm3,%mm2
pand %mm3,%mm6
paddb %mm1,%mm1
paddb %mm5,%mm5
pxor %mm2,%mm1
pxor %mm6,%mm5
movq %mm1,%mm3
movq %mm5,%mm7
movq %mm1,%mm2
movq %mm5,%mm6
pxor %mm1,%mm0
pxor %mm5,%mm4
pslld $24,%mm3
pslld $24,%mm7
psrld $8,%mm2
psrld $8,%mm6
pxor %mm3,%mm0
pxor %mm7,%mm4
pxor %mm2,%mm0
pxor %mm6,%mm4
movq 8(%esp),%mm2
pxor %mm3,%mm3
pxor %mm7,%mm7
pcmpgtb %mm1,%mm3
pcmpgtb %mm5,%mm7
pand %mm2,%mm3
pand %mm2,%mm7
paddb %mm1,%mm1
paddb %mm5,%mm5
pxor %mm3,%mm1
pxor %mm7,%mm5
pshufw $177,%mm1,%mm3
pshufw $177,%mm5,%mm7
pxor %mm1,%mm0
pxor %mm5,%mm4
pxor %mm3,%mm0
pxor %mm7,%mm4
pxor %mm3,%mm3
pxor %mm7,%mm7
pcmpgtb %mm1,%mm3
pcmpgtb %mm5,%mm7
pand %mm2,%mm3
pand %mm2,%mm7
paddb %mm1,%mm1
paddb %mm5,%mm5
pxor %mm3,%mm1
pxor %mm7,%mm5
pxor %mm1,%mm0
pxor %mm5,%mm4
movq %mm1,%mm3
movq %mm5,%mm7
pshufw $177,%mm1,%mm2
pshufw $177,%mm5,%mm6
pxor %mm2,%mm0
pxor %mm6,%mm4
pslld $8,%mm1
pslld $8,%mm5
psrld $8,%mm3
psrld $8,%mm7
movq (%edi),%mm2
movq 8(%edi),%mm6
pxor %mm1,%mm0
pxor %mm5,%mm4
pxor %mm3,%mm0
pxor %mm7,%mm4
movl -128(%ebp),%eax
pslld $16,%mm1
pslld $16,%mm5
movl -64(%ebp),%ebx
psrld $16,%mm3
psrld $16,%mm7
movl (%ebp),%ecx
pxor %mm1,%mm0
pxor %mm5,%mm4
movl 64(%ebp),%edx
pxor %mm3,%mm0
pxor %mm7,%mm4
pxor %mm2,%mm0
pxor %mm6,%mm4
jmp .L007loop
.align 16
.L008out:
pxor (%edi),%mm0
pxor 8(%edi),%mm4
ret
.size _sse_AES_decrypt_compact,.-_sse_AES_decrypt_compact
.type _x86_AES_decrypt,@function
.align 16
_x86_AES_decrypt:
movl %edi,20(%esp)
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,24(%esp)
.align 16
.L009loop:
movl %eax,%esi
andl $255,%esi
movl (%ebp,%esi,8),%esi
movzbl %dh,%edi
xorl 3(%ebp,%edi,8),%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movl %ebx,%edi
shrl $24,%edi
xorl 1(%ebp,%edi,8),%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
movl (%ebp,%esi,8),%esi
movzbl %ah,%edi
xorl 3(%ebp,%edi,8),%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movl %ecx,%edi
shrl $24,%edi
xorl 1(%ebp,%edi,8),%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
movl (%ebp,%esi,8),%esi
movzbl %bh,%edi
xorl 3(%ebp,%edi,8),%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edi
xorl 2(%ebp,%edi,8),%esi
movl %edx,%edi
shrl $24,%edi
xorl 1(%ebp,%edi,8),%esi
movl 20(%esp),%edi
andl $255,%edx
movl (%ebp,%edx,8),%edx
movzbl %ch,%ecx
xorl 3(%ebp,%ecx,8),%edx
movl %esi,%ecx
shrl $16,%ebx
andl $255,%ebx
xorl 2(%ebp,%ebx,8),%edx
movl 8(%esp),%ebx
shrl $24,%eax
xorl 1(%ebp,%eax,8),%edx
movl 4(%esp),%eax
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
cmpl 24(%esp),%edi
movl %edi,20(%esp)
jb .L009loop
leal 2176(%ebp),%ebp
movl -128(%ebp),%edi
movl -96(%ebp),%esi
movl -64(%ebp),%edi
movl -32(%ebp),%esi
movl (%ebp),%edi
movl 32(%ebp),%esi
movl 64(%ebp),%edi
movl 96(%ebp),%esi
leal -128(%ebp),%ebp
movl %eax,%esi
andl $255,%esi
movzbl (%ebp,%esi,1),%esi
movzbl %dh,%edi
movzbl (%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $16,%edi
andl $255,%edi
movzbl (%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ebx,%edi
shrl $24,%edi
movzbl (%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,4(%esp)
movl %ebx,%esi
andl $255,%esi
movzbl (%ebp,%esi,1),%esi
movzbl %ah,%edi
movzbl (%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $16,%edi
andl $255,%edi
movzbl (%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %ecx,%edi
shrl $24,%edi
movzbl (%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl %esi,8(%esp)
movl %ecx,%esi
andl $255,%esi
movzbl (%ebp,%esi,1),%esi
movzbl %bh,%edi
movzbl (%ebp,%edi,1),%edi
shll $8,%edi
xorl %edi,%esi
movl %eax,%edi
shrl $16,%edi
andl $255,%edi
movzbl (%ebp,%edi,1),%edi
shll $16,%edi
xorl %edi,%esi
movl %edx,%edi
shrl $24,%edi
movzbl (%ebp,%edi,1),%edi
shll $24,%edi
xorl %edi,%esi
movl 20(%esp),%edi
andl $255,%edx
movzbl (%ebp,%edx,1),%edx
movzbl %ch,%ecx
movzbl (%ebp,%ecx,1),%ecx
shll $8,%ecx
xorl %ecx,%edx
movl %esi,%ecx
shrl $16,%ebx
andl $255,%ebx
movzbl (%ebp,%ebx,1),%ebx
shll $16,%ebx
xorl %ebx,%edx
movl 8(%esp),%ebx
shrl $24,%eax
movzbl (%ebp,%eax,1),%eax
shll $24,%eax
xorl %eax,%edx
movl 4(%esp),%eax
leal -2048(%ebp),%ebp
addl $16,%edi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
ret
.align 64
.LAES_Td:
.long 1353184337,1353184337
.long 1399144830,1399144830
.long 3282310938,3282310938
.long 2522752826,2522752826
.long 3412831035,3412831035
.long 4047871263,4047871263
.long 2874735276,2874735276
.long 2466505547,2466505547
.long 1442459680,1442459680
.long 4134368941,4134368941
.long 2440481928,2440481928
.long 625738485,625738485
.long 4242007375,4242007375
.long 3620416197,3620416197
.long 2151953702,2151953702
.long 2409849525,2409849525
.long 1230680542,1230680542
.long 1729870373,1729870373
.long 2551114309,2551114309
.long 3787521629,3787521629
.long 41234371,41234371
.long 317738113,317738113
.long 2744600205,2744600205
.long 3338261355,3338261355
.long 3881799427,3881799427
.long 2510066197,2510066197
.long 3950669247,3950669247
.long 3663286933,3663286933
.long 763608788,763608788
.long 3542185048,3542185048
.long 694804553,694804553
.long 1154009486,1154009486
.long 1787413109,1787413109
.long 2021232372,2021232372
.long 1799248025,1799248025
.long 3715217703,3715217703
.long 3058688446,3058688446
.long 397248752,397248752
.long 1722556617,1722556617
.long 3023752829,3023752829
.long 407560035,407560035
.long 2184256229,2184256229
.long 1613975959,1613975959
.long 1165972322,1165972322
.long 3765920945,3765920945
.long 2226023355,2226023355
.long 480281086,480281086
.long 2485848313,2485848313
.long 1483229296,1483229296
.long 436028815,436028815
.long 2272059028,2272059028
.long 3086515026,3086515026
.long 601060267,601060267
.long 3791801202,3791801202
.long 1468997603,1468997603
.long 715871590,715871590
.long 120122290,120122290
.long 63092015,63092015
.long 2591802758,2591802758
.long 2768779219,2768779219
.long 4068943920,4068943920
.long 2997206819,2997206819
.long 3127509762,3127509762
.long 1552029421,1552029421
.long 723308426,723308426
.long 2461301159,2461301159
.long 4042393587,4042393587
.long 2715969870,2715969870
.long 3455375973,3455375973
.long 3586000134,3586000134
.long 526529745,526529745
.long 2331944644,2331944644
.long 2639474228,2639474228
.long 2689987490,2689987490
.long 853641733,853641733
.long 1978398372,1978398372
.long 971801355,971801355
.long 2867814464,2867814464
.long 111112542,111112542
.long 1360031421,1360031421
.long 4186579262,4186579262
.long 1023860118,1023860118
.long 2919579357,2919579357
.long 1186850381,1186850381
.long 3045938321,3045938321
.long 90031217,90031217
.long 1876166148,1876166148
.long 4279586912,4279586912
.long 620468249,620468249
.long 2548678102,2548678102
.long 3426959497,3426959497
.long 2006899047,2006899047
.long 3175278768,3175278768
.long 2290845959,2290845959
.long 945494503,945494503
.long 3689859193,3689859193
.long 1191869601,1191869601
.long 3910091388,3910091388
.long 3374220536,3374220536
.long 0,0
.long 2206629897,2206629897
.long 1223502642,1223502642
.long 2893025566,2893025566
.long 1316117100,1316117100
.long 4227796733,4227796733
.long 1446544655,1446544655
.long 517320253,517320253
.long 658058550,658058550
.long 1691946762,1691946762
.long 564550760,564550760
.long 3511966619,3511966619
.long 976107044,976107044
.long 2976320012,2976320012
.long 266819475,266819475
.long 3533106868,3533106868
.long 2660342555,2660342555
.long 1338359936,1338359936
.long 2720062561,2720062561
.long 1766553434,1766553434
.long 370807324,370807324
.long 179999714,179999714
.long 3844776128,3844776128
.long 1138762300,1138762300
.long 488053522,488053522
.long 185403662,185403662
.long 2915535858,2915535858
.long 3114841645,3114841645
.long 3366526484,3366526484
.long 2233069911,2233069911
.long 1275557295,1275557295
.long 3151862254,3151862254
.long 4250959779,4250959779
.long 2670068215,2670068215
.long 3170202204,3170202204
.long 3309004356,3309004356
.long 880737115,880737115
.long 1982415755,1982415755
.long 3703972811,3703972811
.long 1761406390,1761406390
.long 1676797112,1676797112
.long 3403428311,3403428311
.long 277177154,277177154
.long 1076008723,1076008723
.long 538035844,538035844
.long 2099530373,2099530373
.long 4164795346,4164795346
.long 288553390,288553390
.long 1839278535,1839278535
.long 1261411869,1261411869
.long 4080055004,4080055004
.long 3964831245,3964831245
.long 3504587127,3504587127
.long 1813426987,1813426987
.long 2579067049,2579067049
.long 4199060497,4199060497
.long 577038663,577038663
.long 3297574056,3297574056
.long 440397984,440397984
.long 3626794326,3626794326
.long 4019204898,4019204898
.long 3343796615,3343796615
.long 3251714265,3251714265
.long 4272081548,4272081548
.long 906744984,906744984
.long 3481400742,3481400742
.long 685669029,685669029
.long 646887386,646887386
.long 2764025151,2764025151
.long 3835509292,3835509292
.long 227702864,227702864
.long 2613862250,2613862250
.long 1648787028,1648787028
.long 3256061430,3256061430
.long 3904428176,3904428176
.long 1593260334,1593260334
.long 4121936770,4121936770
.long 3196083615,3196083615
.long 2090061929,2090061929
.long 2838353263,2838353263
.long 3004310991,3004310991
.long 999926984,999926984
.long 2809993232,2809993232
.long 1852021992,1852021992
.long 2075868123,2075868123
.long 158869197,158869197
.long 4095236462,4095236462
.long 28809964,28809964
.long 2828685187,2828685187
.long 1701746150,1701746150
.long 2129067946,2129067946
.long 147831841,147831841
.long 3873969647,3873969647
.long 3650873274,3650873274
.long 3459673930,3459673930
.long 3557400554,3557400554
.long 3598495785,3598495785
.long 2947720241,2947720241
.long 824393514,824393514
.long 815048134,815048134
.long 3227951669,3227951669
.long 935087732,935087732
.long 2798289660,2798289660
.long 2966458592,2966458592
.long 366520115,366520115
.long 1251476721,1251476721
.long 4158319681,4158319681
.long 240176511,240176511
.long 804688151,804688151
.long 2379631990,2379631990
.long 1303441219,1303441219
.long 1414376140,1414376140
.long 3741619940,3741619940
.long 3820343710,3820343710
.long 461924940,461924940
.long 3089050817,3089050817
.long 2136040774,2136040774
.long 82468509,82468509
.long 1563790337,1563790337
.long 1937016826,1937016826
.long 776014843,776014843
.long 1511876531,1511876531
.long 1389550482,1389550482
.long 861278441,861278441
.long 323475053,323475053
.long 2355222426,2355222426
.long 2047648055,2047648055
.long 2383738969,2383738969
.long 2302415851,2302415851
.long 3995576782,3995576782
.long 902390199,902390199
.long 3991215329,3991215329
.long 1018251130,1018251130
.long 1507840668,1507840668
.long 1064563285,1064563285
.long 2043548696,2043548696
.long 3208103795,3208103795
.long 3939366739,3939366739
.long 1537932639,1537932639
.long 342834655,342834655
.long 2262516856,2262516856
.long 2180231114,2180231114
.long 1053059257,1053059257
.long 741614648,741614648
.long 1598071746,1598071746
.long 1925389590,1925389590
.long 203809468,203809468
.long 2336832552,2336832552
.long 1100287487,1100287487
.long 1895934009,1895934009
.long 3736275976,3736275976
.long 2632234200,2632234200
.long 2428589668,2428589668
.long 1636092795,1636092795
.long 1890988757,1890988757
.long 1952214088,1952214088
.long 1113045200,1113045200
.byte 82,9,106,213,48,54,165,56
.byte 191,64,163,158,129,243,215,251
.byte 124,227,57,130,155,47,255,135
.byte 52,142,67,68,196,222,233,203
.byte 84,123,148,50,166,194,35,61
.byte 238,76,149,11,66,250,195,78
.byte 8,46,161,102,40,217,36,178
.byte 118,91,162,73,109,139,209,37
.byte 114,248,246,100,134,104,152,22
.byte 212,164,92,204,93,101,182,146
.byte 108,112,72,80,253,237,185,218
.byte 94,21,70,87,167,141,157,132
.byte 144,216,171,0,140,188,211,10
.byte 247,228,88,5,184,179,69,6
.byte 208,44,30,143,202,63,15,2
.byte 193,175,189,3,1,19,138,107
.byte 58,145,17,65,79,103,220,234
.byte 151,242,207,206,240,180,230,115
.byte 150,172,116,34,231,173,53,133
.byte 226,249,55,232,28,117,223,110
.byte 71,241,26,113,29,41,197,137
.byte 111,183,98,14,170,24,190,27
.byte 252,86,62,75,198,210,121,32
.byte 154,219,192,254,120,205,90,244
.byte 31,221,168,51,136,7,199,49
.byte 177,18,16,89,39,128,236,95
.byte 96,81,127,169,25,181,74,13
.byte 45,229,122,159,147,201,156,239
.byte 160,224,59,77,174,42,245,176
.byte 200,235,187,60,131,83,153,97
.byte 23,43,4,126,186,119,214,38
.byte 225,105,20,99,85,33,12,125
.byte 82,9,106,213,48,54,165,56
.byte 191,64,163,158,129,243,215,251
.byte 124,227,57,130,155,47,255,135
.byte 52,142,67,68,196,222,233,203
.byte 84,123,148,50,166,194,35,61
.byte 238,76,149,11,66,250,195,78
.byte 8,46,161,102,40,217,36,178
.byte 118,91,162,73,109,139,209,37
.byte 114,248,246,100,134,104,152,22
.byte 212,164,92,204,93,101,182,146
.byte 108,112,72,80,253,237,185,218
.byte 94,21,70,87,167,141,157,132
.byte 144,216,171,0,140,188,211,10
.byte 247,228,88,5,184,179,69,6
.byte 208,44,30,143,202,63,15,2
.byte 193,175,189,3,1,19,138,107
.byte 58,145,17,65,79,103,220,234
.byte 151,242,207,206,240,180,230,115
.byte 150,172,116,34,231,173,53,133
.byte 226,249,55,232,28,117,223,110
.byte 71,241,26,113,29,41,197,137
.byte 111,183,98,14,170,24,190,27
.byte 252,86,62,75,198,210,121,32
.byte 154,219,192,254,120,205,90,244
.byte 31,221,168,51,136,7,199,49
.byte 177,18,16,89,39,128,236,95
.byte 96,81,127,169,25,181,74,13
.byte 45,229,122,159,147,201,156,239
.byte 160,224,59,77,174,42,245,176
.byte 200,235,187,60,131,83,153,97
.byte 23,43,4,126,186,119,214,38
.byte 225,105,20,99,85,33,12,125
.byte 82,9,106,213,48,54,165,56
.byte 191,64,163,158,129,243,215,251
.byte 124,227,57,130,155,47,255,135
.byte 52,142,67,68,196,222,233,203
.byte 84,123,148,50,166,194,35,61
.byte 238,76,149,11,66,250,195,78
.byte 8,46,161,102,40,217,36,178
.byte 118,91,162,73,109,139,209,37
.byte 114,248,246,100,134,104,152,22
.byte 212,164,92,204,93,101,182,146
.byte 108,112,72,80,253,237,185,218
.byte 94,21,70,87,167,141,157,132
.byte 144,216,171,0,140,188,211,10
.byte 247,228,88,5,184,179,69,6
.byte 208,44,30,143,202,63,15,2
.byte 193,175,189,3,1,19,138,107
.byte 58,145,17,65,79,103,220,234
.byte 151,242,207,206,240,180,230,115
.byte 150,172,116,34,231,173,53,133
.byte 226,249,55,232,28,117,223,110
.byte 71,241,26,113,29,41,197,137
.byte 111,183,98,14,170,24,190,27
.byte 252,86,62,75,198,210,121,32
.byte 154,219,192,254,120,205,90,244
.byte 31,221,168,51,136,7,199,49
.byte 177,18,16,89,39,128,236,95
.byte 96,81,127,169,25,181,74,13
.byte 45,229,122,159,147,201,156,239
.byte 160,224,59,77,174,42,245,176
.byte 200,235,187,60,131,83,153,97
.byte 23,43,4,126,186,119,214,38
.byte 225,105,20,99,85,33,12,125
.byte 82,9,106,213,48,54,165,56
.byte 191,64,163,158,129,243,215,251
.byte 124,227,57,130,155,47,255,135
.byte 52,142,67,68,196,222,233,203
.byte 84,123,148,50,166,194,35,61
.byte 238,76,149,11,66,250,195,78
.byte 8,46,161,102,40,217,36,178
.byte 118,91,162,73,109,139,209,37
.byte 114,248,246,100,134,104,152,22
.byte 212,164,92,204,93,101,182,146
.byte 108,112,72,80,253,237,185,218
.byte 94,21,70,87,167,141,157,132
.byte 144,216,171,0,140,188,211,10
.byte 247,228,88,5,184,179,69,6
.byte 208,44,30,143,202,63,15,2
.byte 193,175,189,3,1,19,138,107
.byte 58,145,17,65,79,103,220,234
.byte 151,242,207,206,240,180,230,115
.byte 150,172,116,34,231,173,53,133
.byte 226,249,55,232,28,117,223,110
.byte 71,241,26,113,29,41,197,137
.byte 111,183,98,14,170,24,190,27
.byte 252,86,62,75,198,210,121,32
.byte 154,219,192,254,120,205,90,244
.byte 31,221,168,51,136,7,199,49
.byte 177,18,16,89,39,128,236,95
.byte 96,81,127,169,25,181,74,13
.byte 45,229,122,159,147,201,156,239
.byte 160,224,59,77,174,42,245,176
.byte 200,235,187,60,131,83,153,97
.byte 23,43,4,126,186,119,214,38
.byte 225,105,20,99,85,33,12,125
.size _x86_AES_decrypt,.-_x86_AES_decrypt
.globl AES_decrypt
.type AES_decrypt,@function
.align 16
AES_decrypt:
.L_AES_decrypt_begin:
pushl %ebp
pushl %ebx
pushl %esi
pushl %edi
movl 20(%esp),%esi
movl 28(%esp),%edi
movl %esp,%eax
subl $36,%esp
andl $-64,%esp
leal -127(%edi),%ebx
subl %esp,%ebx
negl %ebx
andl $960,%ebx
subl %ebx,%esp
addl $4,%esp
movl %eax,28(%esp)
call .L010pic_point
.L010pic_point:
popl %ebp
leal OPENSSL_ia32cap_P,%eax
leal .LAES_Td-.L010pic_point(%ebp),%ebp
leal 764(%esp),%ebx
subl %ebp,%ebx
andl $768,%ebx
leal 2176(%ebp,%ebx,1),%ebp
btl $25,(%eax)
jnc .L011x86
movq (%esi),%mm0
movq 8(%esi),%mm4
call _sse_AES_decrypt_compact
movl 28(%esp),%esp
movl 24(%esp),%esi
movq %mm0,(%esi)
movq %mm4,8(%esi)
emms
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.align 16
.L011x86:
movl %ebp,24(%esp)
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
call _x86_AES_decrypt_compact
movl 28(%esp),%esp
movl 24(%esp),%esi
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.size AES_decrypt,.-.L_AES_decrypt_begin
.globl AES_cbc_encrypt
.type AES_cbc_encrypt,@function
.align 16
AES_cbc_encrypt:
.L_AES_cbc_encrypt_begin:
pushl %ebp
pushl %ebx
pushl %esi
pushl %edi
movl 28(%esp),%ecx
cmpl $0,%ecx
je .L012drop_out
call .L013pic_point
.L013pic_point:
popl %ebp
leal OPENSSL_ia32cap_P,%eax
cmpl $0,40(%esp)
leal .LAES_Te-.L013pic_point(%ebp),%ebp
jne .L014picked_te
leal .LAES_Td-.LAES_Te(%ebp),%ebp
.L014picked_te:
pushfl
cld
cmpl $512,%ecx
jb .L015slow_way
testl $15,%ecx
jnz .L015slow_way
btl $28,(%eax)
jc .L015slow_way
leal -324(%esp),%esi
andl $-64,%esi
movl %ebp,%eax
leal 2304(%ebp),%ebx
movl %esi,%edx
andl $4095,%eax
andl $4095,%ebx
andl $4095,%edx
cmpl %ebx,%edx
jb .L016tbl_break_out
subl %ebx,%edx
subl %edx,%esi
jmp .L017tbl_ok
.align 4
.L016tbl_break_out:
subl %eax,%edx
andl $4095,%edx
addl $384,%edx
subl %edx,%esi
.align 4
.L017tbl_ok:
leal 24(%esp),%edx
xchgl %esi,%esp
addl $4,%esp
movl %ebp,24(%esp)
movl %esi,28(%esp)
movl (%edx),%eax
movl 4(%edx),%ebx
movl 12(%edx),%edi
movl 16(%edx),%esi
movl 20(%edx),%edx
movl %eax,32(%esp)
movl %ebx,36(%esp)
movl %ecx,40(%esp)
movl %edi,44(%esp)
movl %esi,48(%esp)
movl $0,316(%esp)
movl %edi,%ebx
movl $61,%ecx
subl %ebp,%ebx
movl %edi,%esi
andl $4095,%ebx
leal 76(%esp),%edi
cmpl $2304,%ebx
jb .L018do_copy
cmpl $3852,%ebx
jb .L019skip_copy
.align 4
.L018do_copy:
movl %edi,44(%esp)
.long 2784229001
.L019skip_copy:
movl $16,%edi
.align 4
.L020prefetch_tbl:
movl (%ebp),%eax
movl 32(%ebp),%ebx
movl 64(%ebp),%ecx
movl 96(%ebp),%esi
leal 128(%ebp),%ebp
subl $1,%edi
jnz .L020prefetch_tbl
subl $2048,%ebp
movl 32(%esp),%esi
movl 48(%esp),%edi
cmpl $0,%edx
je .L021fast_decrypt
movl (%edi),%eax
movl 4(%edi),%ebx
.align 16
.L022fast_enc_loop:
movl 8(%edi),%ecx
movl 12(%edi),%edx
xorl (%esi),%eax
xorl 4(%esi),%ebx
xorl 8(%esi),%ecx
xorl 12(%esi),%edx
movl 44(%esp),%edi
call _x86_AES_encrypt
movl 32(%esp),%esi
movl 36(%esp),%edi
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
leal 16(%esi),%esi
movl 40(%esp),%ecx
movl %esi,32(%esp)
leal 16(%edi),%edx
movl %edx,36(%esp)
subl $16,%ecx
movl %ecx,40(%esp)
jnz .L022fast_enc_loop
movl 48(%esp),%esi
movl 8(%edi),%ecx
movl 12(%edi),%edx
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
cmpl $0,316(%esp)
movl 44(%esp),%edi
je .L023skip_ezero
movl $60,%ecx
xorl %eax,%eax
.align 4
.long 2884892297
.L023skip_ezero:
movl 28(%esp),%esp
popfl
.L012drop_out:
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L021fast_decrypt:
cmpl 36(%esp),%esi
je .L024fast_dec_in_place
movl %edi,52(%esp)
.align 4
.align 16
.L025fast_dec_loop:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl 44(%esp),%edi
call _x86_AES_decrypt
movl 52(%esp),%edi
movl 40(%esp),%esi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl 36(%esp),%edi
movl 32(%esp),%esi
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 40(%esp),%ecx
movl %esi,52(%esp)
leal 16(%esi),%esi
movl %esi,32(%esp)
leal 16(%edi),%edi
movl %edi,36(%esp)
subl $16,%ecx
movl %ecx,40(%esp)
jnz .L025fast_dec_loop
movl 52(%esp),%edi
movl 48(%esp),%esi
movl (%edi),%eax
movl 4(%edi),%ebx
movl 8(%edi),%ecx
movl 12(%edi),%edx
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
jmp .L026fast_dec_out
.align 16
.L024fast_dec_in_place:
.L027fast_dec_in_place_loop:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
leal 60(%esp),%edi
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 44(%esp),%edi
call _x86_AES_decrypt
movl 48(%esp),%edi
movl 36(%esp),%esi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
leal 16(%esi),%esi
movl %esi,36(%esp)
leal 60(%esp),%esi
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 32(%esp),%esi
movl 40(%esp),%ecx
leal 16(%esi),%esi
movl %esi,32(%esp)
subl $16,%ecx
movl %ecx,40(%esp)
jnz .L027fast_dec_in_place_loop
.align 4
.L026fast_dec_out:
cmpl $0,316(%esp)
movl 44(%esp),%edi
je .L028skip_dzero
movl $60,%ecx
xorl %eax,%eax
.align 4
.long 2884892297
.L028skip_dzero:
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L015slow_way:
movl (%eax),%eax
movl 36(%esp),%edi
leal -80(%esp),%esi
andl $-64,%esi
leal -143(%edi),%ebx
subl %esi,%ebx
negl %ebx
andl $960,%ebx
subl %ebx,%esi
leal 768(%esi),%ebx
subl %ebp,%ebx
andl $768,%ebx
leal 2176(%ebp,%ebx,1),%ebp
leal 24(%esp),%edx
xchgl %esi,%esp
addl $4,%esp
movl %ebp,24(%esp)
movl %esi,28(%esp)
movl %eax,52(%esp)
movl (%edx),%eax
movl 4(%edx),%ebx
movl 16(%edx),%esi
movl 20(%edx),%edx
movl %eax,32(%esp)
movl %ebx,36(%esp)
movl %ecx,40(%esp)
movl %edi,44(%esp)
movl %esi,48(%esp)
movl %esi,%edi
movl %eax,%esi
cmpl $0,%edx
je .L029slow_decrypt
cmpl $16,%ecx
movl %ebx,%edx
jb .L030slow_enc_tail
btl $25,52(%esp)
jnc .L031slow_enc_x86
movq (%edi),%mm0
movq 8(%edi),%mm4
.align 16
.L032slow_enc_loop_sse:
pxor (%esi),%mm0
pxor 8(%esi),%mm4
movl 44(%esp),%edi
call _sse_AES_encrypt_compact
movl 32(%esp),%esi
movl 36(%esp),%edi
movl 40(%esp),%ecx
movq %mm0,(%edi)
movq %mm4,8(%edi)
leal 16(%esi),%esi
movl %esi,32(%esp)
leal 16(%edi),%edx
movl %edx,36(%esp)
subl $16,%ecx
cmpl $16,%ecx
movl %ecx,40(%esp)
jae .L032slow_enc_loop_sse
testl $15,%ecx
jnz .L030slow_enc_tail
movl 48(%esp),%esi
movq %mm0,(%esi)
movq %mm4,8(%esi)
emms
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L031slow_enc_x86:
movl (%edi),%eax
movl 4(%edi),%ebx
.align 4
.L033slow_enc_loop_x86:
movl 8(%edi),%ecx
movl 12(%edi),%edx
xorl (%esi),%eax
xorl 4(%esi),%ebx
xorl 8(%esi),%ecx
xorl 12(%esi),%edx
movl 44(%esp),%edi
call _x86_AES_encrypt_compact
movl 32(%esp),%esi
movl 36(%esp),%edi
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 40(%esp),%ecx
leal 16(%esi),%esi
movl %esi,32(%esp)
leal 16(%edi),%edx
movl %edx,36(%esp)
subl $16,%ecx
cmpl $16,%ecx
movl %ecx,40(%esp)
jae .L033slow_enc_loop_x86
testl $15,%ecx
jnz .L030slow_enc_tail
movl 48(%esp),%esi
movl 8(%edi),%ecx
movl 12(%edi),%edx
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L030slow_enc_tail:
emms
movl %edx,%edi
movl $16,%ebx
subl %ecx,%ebx
cmpl %esi,%edi
je .L034enc_in_place
.align 4
.long 2767451785
jmp .L035enc_skip_in_place
.L034enc_in_place:
leal (%edi,%ecx,1),%edi
.L035enc_skip_in_place:
movl %ebx,%ecx
xorl %eax,%eax
.align 4
.long 2868115081
movl 48(%esp),%edi
movl %edx,%esi
movl (%edi),%eax
movl 4(%edi),%ebx
movl $16,40(%esp)
jmp .L033slow_enc_loop_x86
.align 16
.L029slow_decrypt:
btl $25,52(%esp)
jnc .L036slow_dec_loop_x86
.align 4
.L037slow_dec_loop_sse:
movq (%esi),%mm0
movq 8(%esi),%mm4
movl 44(%esp),%edi
call _sse_AES_decrypt_compact
movl 32(%esp),%esi
leal 60(%esp),%eax
movl 36(%esp),%ebx
movl 40(%esp),%ecx
movl 48(%esp),%edi
movq (%esi),%mm1
movq 8(%esi),%mm5
pxor (%edi),%mm0
pxor 8(%edi),%mm4
movq %mm1,(%edi)
movq %mm5,8(%edi)
subl $16,%ecx
jc .L038slow_dec_partial_sse
movq %mm0,(%ebx)
movq %mm4,8(%ebx)
leal 16(%ebx),%ebx
movl %ebx,36(%esp)
leal 16(%esi),%esi
movl %esi,32(%esp)
movl %ecx,40(%esp)
jnz .L037slow_dec_loop_sse
emms
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L038slow_dec_partial_sse:
movq %mm0,(%eax)
movq %mm4,8(%eax)
emms
addl $16,%ecx
movl %ebx,%edi
movl %eax,%esi
.align 4
.long 2767451785
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L036slow_dec_loop_x86:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
leal 60(%esp),%edi
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 44(%esp),%edi
call _x86_AES_decrypt_compact
movl 48(%esp),%edi
movl 40(%esp),%esi
xorl (%edi),%eax
xorl 4(%edi),%ebx
xorl 8(%edi),%ecx
xorl 12(%edi),%edx
subl $16,%esi
jc .L039slow_dec_partial_x86
movl %esi,40(%esp)
movl 36(%esp),%esi
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
leal 16(%esi),%esi
movl %esi,36(%esp)
leal 60(%esp),%esi
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 32(%esp),%esi
leal 16(%esi),%esi
movl %esi,32(%esp)
jnz .L036slow_dec_loop_x86
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
pushfl
.align 16
.L039slow_dec_partial_x86:
leal 60(%esp),%esi
movl %eax,(%esi)
movl %ebx,4(%esi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
movl 32(%esp),%esi
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 40(%esp),%ecx
movl 36(%esp),%edi
leal 60(%esp),%esi
.align 4
.long 2767451785
movl 28(%esp),%esp
popfl
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.size AES_cbc_encrypt,.-.L_AES_cbc_encrypt_begin
.type _x86_AES_set_encrypt_key,@function
.align 16
_x86_AES_set_encrypt_key:
pushl %ebp
pushl %ebx
pushl %esi
pushl %edi
movl 24(%esp),%esi
movl 32(%esp),%edi
testl $-1,%esi
jz .L040badpointer
testl $-1,%edi
jz .L040badpointer
call .L041pic_point
.L041pic_point:
popl %ebp
leal .LAES_Te-.L041pic_point(%ebp),%ebp
leal 2176(%ebp),%ebp
movl -128(%ebp),%eax
movl -96(%ebp),%ebx
movl -64(%ebp),%ecx
movl -32(%ebp),%edx
movl (%ebp),%eax
movl 32(%ebp),%ebx
movl 64(%ebp),%ecx
movl 96(%ebp),%edx
movl 28(%esp),%ecx
cmpl $128,%ecx
je .L04210rounds
cmpl $192,%ecx
je .L04312rounds
cmpl $256,%ecx
je .L04414rounds
movl $-2,%eax
jmp .L045exit
.L04210rounds:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
xorl %ecx,%ecx
jmp .L04610shortcut
.align 4
.L04710loop:
movl (%edi),%eax
movl 12(%edi),%edx
.L04610shortcut:
movzbl %dl,%esi
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $24,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shrl $16,%edx
movzbl %dl,%esi
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $8,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shll $16,%ebx
xorl %ebx,%eax
xorl 896(%ebp,%ecx,4),%eax
movl %eax,16(%edi)
xorl 4(%edi),%eax
movl %eax,20(%edi)
xorl 8(%edi),%eax
movl %eax,24(%edi)
xorl 12(%edi),%eax
movl %eax,28(%edi)
incl %ecx
addl $16,%edi
cmpl $10,%ecx
jl .L04710loop
movl $10,80(%edi)
xorl %eax,%eax
jmp .L045exit
.L04312rounds:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 16(%esi),%ecx
movl 20(%esi),%edx
movl %ecx,16(%edi)
movl %edx,20(%edi)
xorl %ecx,%ecx
jmp .L04812shortcut
.align 4
.L04912loop:
movl (%edi),%eax
movl 20(%edi),%edx
.L04812shortcut:
movzbl %dl,%esi
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $24,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shrl $16,%edx
movzbl %dl,%esi
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $8,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shll $16,%ebx
xorl %ebx,%eax
xorl 896(%ebp,%ecx,4),%eax
movl %eax,24(%edi)
xorl 4(%edi),%eax
movl %eax,28(%edi)
xorl 8(%edi),%eax
movl %eax,32(%edi)
xorl 12(%edi),%eax
movl %eax,36(%edi)
cmpl $7,%ecx
je .L05012break
incl %ecx
xorl 16(%edi),%eax
movl %eax,40(%edi)
xorl 20(%edi),%eax
movl %eax,44(%edi)
addl $24,%edi
jmp .L04912loop
.L05012break:
movl $12,72(%edi)
xorl %eax,%eax
jmp .L045exit
.L04414rounds:
movl (%esi),%eax
movl 4(%esi),%ebx
movl 8(%esi),%ecx
movl 12(%esi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,8(%edi)
movl %edx,12(%edi)
movl 16(%esi),%eax
movl 20(%esi),%ebx
movl 24(%esi),%ecx
movl 28(%esi),%edx
movl %eax,16(%edi)
movl %ebx,20(%edi)
movl %ecx,24(%edi)
movl %edx,28(%edi)
xorl %ecx,%ecx
jmp .L05114shortcut
.align 4
.L05214loop:
movl 28(%edi),%edx
.L05114shortcut:
movl (%edi),%eax
movzbl %dl,%esi
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $24,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shrl $16,%edx
movzbl %dl,%esi
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $8,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shll $16,%ebx
xorl %ebx,%eax
xorl 896(%ebp,%ecx,4),%eax
movl %eax,32(%edi)
xorl 4(%edi),%eax
movl %eax,36(%edi)
xorl 8(%edi),%eax
movl %eax,40(%edi)
xorl 12(%edi),%eax
movl %eax,44(%edi)
cmpl $6,%ecx
je .L05314break
incl %ecx
movl %eax,%edx
movl 16(%edi),%eax
movzbl %dl,%esi
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shrl $16,%edx
shll $8,%ebx
movzbl %dl,%esi
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
movzbl %dh,%esi
shll $16,%ebx
xorl %ebx,%eax
movzbl -128(%ebp,%esi,1),%ebx
shll $24,%ebx
xorl %ebx,%eax
movl %eax,48(%edi)
xorl 20(%edi),%eax
movl %eax,52(%edi)
xorl 24(%edi),%eax
movl %eax,56(%edi)
xorl 28(%edi),%eax
movl %eax,60(%edi)
addl $32,%edi
jmp .L05214loop
.L05314break:
movl $14,48(%edi)
xorl %eax,%eax
jmp .L045exit
.L040badpointer:
movl $-1,%eax
.L045exit:
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.size _x86_AES_set_encrypt_key,.-_x86_AES_set_encrypt_key
.globl AES_set_encrypt_key
.type AES_set_encrypt_key,@function
.align 16
AES_set_encrypt_key:
.L_AES_set_encrypt_key_begin:
call _x86_AES_set_encrypt_key
ret
.size AES_set_encrypt_key,.-.L_AES_set_encrypt_key_begin
.globl AES_set_decrypt_key
.type AES_set_decrypt_key,@function
.align 16
AES_set_decrypt_key:
.L_AES_set_decrypt_key_begin:
call _x86_AES_set_encrypt_key
cmpl $0,%eax
je .L054proceed
ret
.L054proceed:
pushl %ebp
pushl %ebx
pushl %esi
pushl %edi
movl 28(%esp),%esi
movl 240(%esi),%ecx
leal (,%ecx,4),%ecx
leal (%esi,%ecx,4),%edi
.align 4
.L055invert:
movl (%esi),%eax
movl 4(%esi),%ebx
movl (%edi),%ecx
movl 4(%edi),%edx
movl %eax,(%edi)
movl %ebx,4(%edi)
movl %ecx,(%esi)
movl %edx,4(%esi)
movl 8(%esi),%eax
movl 12(%esi),%ebx
movl 8(%edi),%ecx
movl 12(%edi),%edx
movl %eax,8(%edi)
movl %ebx,12(%edi)
movl %ecx,8(%esi)
movl %edx,12(%esi)
addl $16,%esi
subl $16,%edi
cmpl %edi,%esi
jne .L055invert
movl 28(%esp),%edi
movl 240(%edi),%esi
leal -2(%esi,%esi,1),%esi
leal (%edi,%esi,8),%esi
movl %esi,28(%esp)
movl 16(%edi),%eax
.align 4
.L056permute:
addl $16,%edi
movl $2155905152,%ebp
andl %eax,%ebp
leal (%eax,%eax,1),%ebx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%ebx
andl $454761243,%esi
xorl %esi,%ebx
movl $2155905152,%ebp
andl %ebx,%ebp
leal (%ebx,%ebx,1),%ecx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%ecx
andl $454761243,%esi
xorl %eax,%ebx
xorl %esi,%ecx
movl $2155905152,%ebp
andl %ecx,%ebp
leal (%ecx,%ecx,1),%edx
movl %ebp,%esi
shrl $7,%ebp
xorl %eax,%ecx
subl %ebp,%esi
andl $4278124286,%edx
andl $454761243,%esi
roll $8,%eax
xorl %esi,%edx
movl 4(%edi),%ebp
xorl %ebx,%eax
xorl %edx,%ebx
xorl %ecx,%eax
roll $24,%ebx
xorl %edx,%ecx
xorl %edx,%eax
roll $16,%ecx
xorl %ebx,%eax
roll $8,%edx
xorl %ecx,%eax
movl %ebp,%ebx
xorl %edx,%eax
movl %eax,(%edi)
movl $2155905152,%ebp
andl %ebx,%ebp
leal (%ebx,%ebx,1),%ecx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%ecx
andl $454761243,%esi
xorl %esi,%ecx
movl $2155905152,%ebp
andl %ecx,%ebp
leal (%ecx,%ecx,1),%edx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%edx
andl $454761243,%esi
xorl %ebx,%ecx
xorl %esi,%edx
movl $2155905152,%ebp
andl %edx,%ebp
leal (%edx,%edx,1),%eax
movl %ebp,%esi
shrl $7,%ebp
xorl %ebx,%edx
subl %ebp,%esi
andl $4278124286,%eax
andl $454761243,%esi
roll $8,%ebx
xorl %esi,%eax
movl 8(%edi),%ebp
xorl %ecx,%ebx
xorl %eax,%ecx
xorl %edx,%ebx
roll $24,%ecx
xorl %eax,%edx
xorl %eax,%ebx
roll $16,%edx
xorl %ecx,%ebx
roll $8,%eax
xorl %edx,%ebx
movl %ebp,%ecx
xorl %eax,%ebx
movl %ebx,4(%edi)
movl $2155905152,%ebp
andl %ecx,%ebp
leal (%ecx,%ecx,1),%edx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%edx
andl $454761243,%esi
xorl %esi,%edx
movl $2155905152,%ebp
andl %edx,%ebp
leal (%edx,%edx,1),%eax
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%eax
andl $454761243,%esi
xorl %ecx,%edx
xorl %esi,%eax
movl $2155905152,%ebp
andl %eax,%ebp
leal (%eax,%eax,1),%ebx
movl %ebp,%esi
shrl $7,%ebp
xorl %ecx,%eax
subl %ebp,%esi
andl $4278124286,%ebx
andl $454761243,%esi
roll $8,%ecx
xorl %esi,%ebx
movl 12(%edi),%ebp
xorl %edx,%ecx
xorl %ebx,%edx
xorl %eax,%ecx
roll $24,%edx
xorl %ebx,%eax
xorl %ebx,%ecx
roll $16,%eax
xorl %edx,%ecx
roll $8,%ebx
xorl %eax,%ecx
movl %ebp,%edx
xorl %ebx,%ecx
movl %ecx,8(%edi)
movl $2155905152,%ebp
andl %edx,%ebp
leal (%edx,%edx,1),%eax
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%eax
andl $454761243,%esi
xorl %esi,%eax
movl $2155905152,%ebp
andl %eax,%ebp
leal (%eax,%eax,1),%ebx
movl %ebp,%esi
shrl $7,%ebp
subl %ebp,%esi
andl $4278124286,%ebx
andl $454761243,%esi
xorl %edx,%eax
xorl %esi,%ebx
movl $2155905152,%ebp
andl %ebx,%ebp
leal (%ebx,%ebx,1),%ecx
movl %ebp,%esi
shrl $7,%ebp
xorl %edx,%ebx
subl %ebp,%esi
andl $4278124286,%ecx
andl $454761243,%esi
roll $8,%edx
xorl %esi,%ecx
movl 16(%edi),%ebp
xorl %eax,%edx
xorl %ecx,%eax
xorl %ebx,%edx
roll $24,%eax
xorl %ecx,%ebx
xorl %ecx,%edx
roll $16,%ebx
xorl %eax,%edx
roll $8,%ecx
xorl %ebx,%edx
movl %ebp,%eax
xorl %ecx,%edx
movl %edx,12(%edi)
cmpl 28(%esp),%edi
jb .L056permute
xorl %eax,%eax
popl %edi
popl %esi
popl %ebx
popl %ebp
ret
.size AES_set_decrypt_key,.-.L_AES_set_decrypt_key_begin
.byte 65,69,83,32,102,111,114,32,120,56,54,44,32,67,82,89
.byte 80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114
.byte 111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.comm OPENSSL_ia32cap_P,16,4
|
wangyu-/udp2raw | 13,671 | lib/aes_acc/asm/x64.S | .text
.type _vpaes_encrypt_core,@function
.align 16
_vpaes_encrypt_core:
movq %rdx,%r9
movq $16,%r11
movl 240(%rdx),%eax
movdqa %xmm9,%xmm1
movdqa .Lk_ipt(%rip),%xmm2
pandn %xmm0,%xmm1
movdqu (%r9),%xmm5
psrld $4,%xmm1
pand %xmm9,%xmm0
.byte 102,15,56,0,208
movdqa .Lk_ipt+16(%rip),%xmm0
.byte 102,15,56,0,193
pxor %xmm5,%xmm2
addq $16,%r9
pxor %xmm2,%xmm0
leaq .Lk_mc_backward(%rip),%r10
jmp .Lenc_entry
.align 16
.Lenc_loop:
movdqa %xmm13,%xmm4
movdqa %xmm12,%xmm0
.byte 102,15,56,0,226
.byte 102,15,56,0,195
pxor %xmm5,%xmm4
movdqa %xmm15,%xmm5
pxor %xmm4,%xmm0
movdqa -64(%r11,%r10,1),%xmm1
.byte 102,15,56,0,234
movdqa (%r11,%r10,1),%xmm4
movdqa %xmm14,%xmm2
.byte 102,15,56,0,211
movdqa %xmm0,%xmm3
pxor %xmm5,%xmm2
.byte 102,15,56,0,193
addq $16,%r9
pxor %xmm2,%xmm0
.byte 102,15,56,0,220
addq $16,%r11
pxor %xmm0,%xmm3
.byte 102,15,56,0,193
andq $0x30,%r11
subq $1,%rax
pxor %xmm3,%xmm0
.Lenc_entry:
movdqa %xmm9,%xmm1
movdqa %xmm11,%xmm5
pandn %xmm0,%xmm1
psrld $4,%xmm1
pand %xmm9,%xmm0
.byte 102,15,56,0,232
movdqa %xmm10,%xmm3
pxor %xmm1,%xmm0
.byte 102,15,56,0,217
movdqa %xmm10,%xmm4
pxor %xmm5,%xmm3
.byte 102,15,56,0,224
movdqa %xmm10,%xmm2
pxor %xmm5,%xmm4
.byte 102,15,56,0,211
movdqa %xmm10,%xmm3
pxor %xmm0,%xmm2
.byte 102,15,56,0,220
movdqu (%r9),%xmm5
pxor %xmm1,%xmm3
jnz .Lenc_loop
movdqa -96(%r10),%xmm4
movdqa -80(%r10),%xmm0
.byte 102,15,56,0,226
pxor %xmm5,%xmm4
.byte 102,15,56,0,195
movdqa 64(%r11,%r10,1),%xmm1
pxor %xmm4,%xmm0
.byte 102,15,56,0,193
.byte 0xf3,0xc3
.size _vpaes_encrypt_core,.-_vpaes_encrypt_core
.type _vpaes_decrypt_core,@function
.align 16
_vpaes_decrypt_core:
movq %rdx,%r9
movl 240(%rdx),%eax
movdqa %xmm9,%xmm1
movdqa .Lk_dipt(%rip),%xmm2
pandn %xmm0,%xmm1
movq %rax,%r11
psrld $4,%xmm1
movdqu (%r9),%xmm5
shlq $4,%r11
pand %xmm9,%xmm0
.byte 102,15,56,0,208
movdqa .Lk_dipt+16(%rip),%xmm0
xorq $0x30,%r11
leaq .Lk_dsbd(%rip),%r10
.byte 102,15,56,0,193
andq $0x30,%r11
pxor %xmm5,%xmm2
movdqa .Lk_mc_forward+48(%rip),%xmm5
pxor %xmm2,%xmm0
addq $16,%r9
addq %r10,%r11
jmp .Ldec_entry
.align 16
.Ldec_loop:
movdqa -32(%r10),%xmm4
movdqa -16(%r10),%xmm1
.byte 102,15,56,0,226
.byte 102,15,56,0,203
pxor %xmm4,%xmm0
movdqa 0(%r10),%xmm4
pxor %xmm1,%xmm0
movdqa 16(%r10),%xmm1
.byte 102,15,56,0,226
.byte 102,15,56,0,197
.byte 102,15,56,0,203
pxor %xmm4,%xmm0
movdqa 32(%r10),%xmm4
pxor %xmm1,%xmm0
movdqa 48(%r10),%xmm1
.byte 102,15,56,0,226
.byte 102,15,56,0,197
.byte 102,15,56,0,203
pxor %xmm4,%xmm0
movdqa 64(%r10),%xmm4
pxor %xmm1,%xmm0
movdqa 80(%r10),%xmm1
.byte 102,15,56,0,226
.byte 102,15,56,0,197
.byte 102,15,56,0,203
pxor %xmm4,%xmm0
addq $16,%r9
.byte 102,15,58,15,237,12
pxor %xmm1,%xmm0
subq $1,%rax
.Ldec_entry:
movdqa %xmm9,%xmm1
pandn %xmm0,%xmm1
movdqa %xmm11,%xmm2
psrld $4,%xmm1
pand %xmm9,%xmm0
.byte 102,15,56,0,208
movdqa %xmm10,%xmm3
pxor %xmm1,%xmm0
.byte 102,15,56,0,217
movdqa %xmm10,%xmm4
pxor %xmm2,%xmm3
.byte 102,15,56,0,224
pxor %xmm2,%xmm4
movdqa %xmm10,%xmm2
.byte 102,15,56,0,211
movdqa %xmm10,%xmm3
pxor %xmm0,%xmm2
.byte 102,15,56,0,220
movdqu (%r9),%xmm0
pxor %xmm1,%xmm3
jnz .Ldec_loop
movdqa 96(%r10),%xmm4
.byte 102,15,56,0,226
pxor %xmm0,%xmm4
movdqa 112(%r10),%xmm0
movdqa -352(%r11),%xmm2
.byte 102,15,56,0,195
pxor %xmm4,%xmm0
.byte 102,15,56,0,194
.byte 0xf3,0xc3
.size _vpaes_decrypt_core,.-_vpaes_decrypt_core
.type _vpaes_schedule_core,@function
.align 16
_vpaes_schedule_core:
call _vpaes_preheat
movdqa .Lk_rcon(%rip),%xmm8
movdqu (%rdi),%xmm0
movdqa %xmm0,%xmm3
leaq .Lk_ipt(%rip),%r11
call _vpaes_schedule_transform
movdqa %xmm0,%xmm7
leaq .Lk_sr(%rip),%r10
testq %rcx,%rcx
jnz .Lschedule_am_decrypting
movdqu %xmm0,(%rdx)
jmp .Lschedule_go
.Lschedule_am_decrypting:
movdqa (%r8,%r10,1),%xmm1
.byte 102,15,56,0,217
movdqu %xmm3,(%rdx)
xorq $0x30,%r8
.Lschedule_go:
cmpl $192,%esi
ja .Lschedule_256
je .Lschedule_192
.Lschedule_128:
movl $10,%esi
.Loop_schedule_128:
call _vpaes_schedule_round
decq %rsi
jz .Lschedule_mangle_last
call _vpaes_schedule_mangle
jmp .Loop_schedule_128
.align 16
.Lschedule_192:
movdqu 8(%rdi),%xmm0
call _vpaes_schedule_transform
movdqa %xmm0,%xmm6
pxor %xmm4,%xmm4
movhlps %xmm4,%xmm6
movl $4,%esi
.Loop_schedule_192:
call _vpaes_schedule_round
.byte 102,15,58,15,198,8
call _vpaes_schedule_mangle
call _vpaes_schedule_192_smear
call _vpaes_schedule_mangle
call _vpaes_schedule_round
decq %rsi
jz .Lschedule_mangle_last
call _vpaes_schedule_mangle
call _vpaes_schedule_192_smear
jmp .Loop_schedule_192
.align 16
.Lschedule_256:
movdqu 16(%rdi),%xmm0
call _vpaes_schedule_transform
movl $7,%esi
.Loop_schedule_256:
call _vpaes_schedule_mangle
movdqa %xmm0,%xmm6
call _vpaes_schedule_round
decq %rsi
jz .Lschedule_mangle_last
call _vpaes_schedule_mangle
pshufd $0xFF,%xmm0,%xmm0
movdqa %xmm7,%xmm5
movdqa %xmm6,%xmm7
call _vpaes_schedule_low_round
movdqa %xmm5,%xmm7
jmp .Loop_schedule_256
.align 16
.Lschedule_mangle_last:
leaq .Lk_deskew(%rip),%r11
testq %rcx,%rcx
jnz .Lschedule_mangle_last_dec
movdqa (%r8,%r10,1),%xmm1
.byte 102,15,56,0,193
leaq .Lk_opt(%rip),%r11
addq $32,%rdx
.Lschedule_mangle_last_dec:
addq $-16,%rdx
pxor .Lk_s63(%rip),%xmm0
call _vpaes_schedule_transform
movdqu %xmm0,(%rdx)
pxor %xmm0,%xmm0
pxor %xmm1,%xmm1
pxor %xmm2,%xmm2
pxor %xmm3,%xmm3
pxor %xmm4,%xmm4
pxor %xmm5,%xmm5
pxor %xmm6,%xmm6
pxor %xmm7,%xmm7
.byte 0xf3,0xc3
.size _vpaes_schedule_core,.-_vpaes_schedule_core
.type _vpaes_schedule_192_smear,@function
.align 16
_vpaes_schedule_192_smear:
pshufd $0x80,%xmm6,%xmm1
pshufd $0xFE,%xmm7,%xmm0
pxor %xmm1,%xmm6
pxor %xmm1,%xmm1
pxor %xmm0,%xmm6
movdqa %xmm6,%xmm0
movhlps %xmm1,%xmm6
.byte 0xf3,0xc3
.size _vpaes_schedule_192_smear,.-_vpaes_schedule_192_smear
.type _vpaes_schedule_round,@function
.align 16
_vpaes_schedule_round:
pxor %xmm1,%xmm1
.byte 102,65,15,58,15,200,15
.byte 102,69,15,58,15,192,15
pxor %xmm1,%xmm7
pshufd $0xFF,%xmm0,%xmm0
.byte 102,15,58,15,192,1
_vpaes_schedule_low_round:
movdqa %xmm7,%xmm1
pslldq $4,%xmm7
pxor %xmm1,%xmm7
movdqa %xmm7,%xmm1
pslldq $8,%xmm7
pxor %xmm1,%xmm7
pxor .Lk_s63(%rip),%xmm7
movdqa %xmm9,%xmm1
pandn %xmm0,%xmm1
psrld $4,%xmm1
pand %xmm9,%xmm0
movdqa %xmm11,%xmm2
.byte 102,15,56,0,208
pxor %xmm1,%xmm0
movdqa %xmm10,%xmm3
.byte 102,15,56,0,217
pxor %xmm2,%xmm3
movdqa %xmm10,%xmm4
.byte 102,15,56,0,224
pxor %xmm2,%xmm4
movdqa %xmm10,%xmm2
.byte 102,15,56,0,211
pxor %xmm0,%xmm2
movdqa %xmm10,%xmm3
.byte 102,15,56,0,220
pxor %xmm1,%xmm3
movdqa %xmm13,%xmm4
.byte 102,15,56,0,226
movdqa %xmm12,%xmm0
.byte 102,15,56,0,195
pxor %xmm4,%xmm0
pxor %xmm7,%xmm0
movdqa %xmm0,%xmm7
.byte 0xf3,0xc3
.size _vpaes_schedule_round,.-_vpaes_schedule_round
.type _vpaes_schedule_transform,@function
.align 16
_vpaes_schedule_transform:
movdqa %xmm9,%xmm1
pandn %xmm0,%xmm1
psrld $4,%xmm1
pand %xmm9,%xmm0
movdqa (%r11),%xmm2
.byte 102,15,56,0,208
movdqa 16(%r11),%xmm0
.byte 102,15,56,0,193
pxor %xmm2,%xmm0
.byte 0xf3,0xc3
.size _vpaes_schedule_transform,.-_vpaes_schedule_transform
.type _vpaes_schedule_mangle,@function
.align 16
_vpaes_schedule_mangle:
movdqa %xmm0,%xmm4
movdqa .Lk_mc_forward(%rip),%xmm5
testq %rcx,%rcx
jnz .Lschedule_mangle_dec
addq $16,%rdx
pxor .Lk_s63(%rip),%xmm4
.byte 102,15,56,0,229
movdqa %xmm4,%xmm3
.byte 102,15,56,0,229
pxor %xmm4,%xmm3
.byte 102,15,56,0,229
pxor %xmm4,%xmm3
jmp .Lschedule_mangle_both
.align 16
.Lschedule_mangle_dec:
leaq .Lk_dksd(%rip),%r11
movdqa %xmm9,%xmm1
pandn %xmm4,%xmm1
psrld $4,%xmm1
pand %xmm9,%xmm4
movdqa 0(%r11),%xmm2
.byte 102,15,56,0,212
movdqa 16(%r11),%xmm3
.byte 102,15,56,0,217
pxor %xmm2,%xmm3
.byte 102,15,56,0,221
movdqa 32(%r11),%xmm2
.byte 102,15,56,0,212
pxor %xmm3,%xmm2
movdqa 48(%r11),%xmm3
.byte 102,15,56,0,217
pxor %xmm2,%xmm3
.byte 102,15,56,0,221
movdqa 64(%r11),%xmm2
.byte 102,15,56,0,212
pxor %xmm3,%xmm2
movdqa 80(%r11),%xmm3
.byte 102,15,56,0,217
pxor %xmm2,%xmm3
.byte 102,15,56,0,221
movdqa 96(%r11),%xmm2
.byte 102,15,56,0,212
pxor %xmm3,%xmm2
movdqa 112(%r11),%xmm3
.byte 102,15,56,0,217
pxor %xmm2,%xmm3
addq $-16,%rdx
.Lschedule_mangle_both:
movdqa (%r8,%r10,1),%xmm1
.byte 102,15,56,0,217
addq $-16,%r8
andq $0x30,%r8
movdqu %xmm3,(%rdx)
.byte 0xf3,0xc3
.size _vpaes_schedule_mangle,.-_vpaes_schedule_mangle
.globl vpaes_set_encrypt_key
.type vpaes_set_encrypt_key,@function
.align 16
vpaes_set_encrypt_key:
movl %esi,%eax
shrl $5,%eax
addl $5,%eax
movl %eax,240(%rdx)
movl $0,%ecx
movl $0x30,%r8d
call _vpaes_schedule_core
xorl %eax,%eax
.byte 0xf3,0xc3
.size vpaes_set_encrypt_key,.-vpaes_set_encrypt_key
.globl vpaes_set_decrypt_key
.type vpaes_set_decrypt_key,@function
.align 16
vpaes_set_decrypt_key:
movl %esi,%eax
shrl $5,%eax
addl $5,%eax
movl %eax,240(%rdx)
shll $4,%eax
leaq 16(%rdx,%rax,1),%rdx
movl $1,%ecx
movl %esi,%r8d
shrl $1,%r8d
andl $32,%r8d
xorl $32,%r8d
call _vpaes_schedule_core
xorl %eax,%eax
.byte 0xf3,0xc3
.size vpaes_set_decrypt_key,.-vpaes_set_decrypt_key
.globl vpaes_encrypt
.type vpaes_encrypt,@function
.align 16
vpaes_encrypt:
movdqu (%rdi),%xmm0
call _vpaes_preheat
call _vpaes_encrypt_core
movdqu %xmm0,(%rsi)
.byte 0xf3,0xc3
.size vpaes_encrypt,.-vpaes_encrypt
.globl vpaes_decrypt
.type vpaes_decrypt,@function
.align 16
vpaes_decrypt:
movdqu (%rdi),%xmm0
call _vpaes_preheat
call _vpaes_decrypt_core
movdqu %xmm0,(%rsi)
.byte 0xf3,0xc3
.size vpaes_decrypt,.-vpaes_decrypt
.globl vpaes_cbc_encrypt
.type vpaes_cbc_encrypt,@function
.align 16
vpaes_cbc_encrypt:
xchgq %rcx,%rdx
subq $16,%rcx
jc .Lcbc_abort
movdqu (%r8),%xmm6
subq %rdi,%rsi
call _vpaes_preheat
cmpl $0,%r9d
je .Lcbc_dec_loop
jmp .Lcbc_enc_loop
.align 16
.Lcbc_enc_loop:
movdqu (%rdi),%xmm0
pxor %xmm6,%xmm0
call _vpaes_encrypt_core
movdqa %xmm0,%xmm6
movdqu %xmm0,(%rsi,%rdi,1)
leaq 16(%rdi),%rdi
subq $16,%rcx
jnc .Lcbc_enc_loop
jmp .Lcbc_done
.align 16
.Lcbc_dec_loop:
movdqu (%rdi),%xmm0
movdqa %xmm0,%xmm7
call _vpaes_decrypt_core
pxor %xmm6,%xmm0
movdqa %xmm7,%xmm6
movdqu %xmm0,(%rsi,%rdi,1)
leaq 16(%rdi),%rdi
subq $16,%rcx
jnc .Lcbc_dec_loop
.Lcbc_done:
movdqu %xmm6,(%r8)
.Lcbc_abort:
.byte 0xf3,0xc3
.size vpaes_cbc_encrypt,.-vpaes_cbc_encrypt
.type _vpaes_preheat,@function
.align 16
_vpaes_preheat:
leaq .Lk_s0F(%rip),%r10
movdqa -32(%r10),%xmm10
movdqa -16(%r10),%xmm11
movdqa 0(%r10),%xmm9
movdqa 48(%r10),%xmm13
movdqa 64(%r10),%xmm12
movdqa 80(%r10),%xmm15
movdqa 96(%r10),%xmm14
.byte 0xf3,0xc3
.size _vpaes_preheat,.-_vpaes_preheat
.type _vpaes_consts,@object
.align 64
_vpaes_consts:
.Lk_inv:
.quad 0x0E05060F0D080180, 0x040703090A0B0C02
.quad 0x01040A060F0B0780, 0x030D0E0C02050809
.Lk_s0F:
.quad 0x0F0F0F0F0F0F0F0F, 0x0F0F0F0F0F0F0F0F
.Lk_ipt:
.quad 0xC2B2E8985A2A7000, 0xCABAE09052227808
.quad 0x4C01307D317C4D00, 0xCD80B1FCB0FDCC81
.Lk_sb1:
.quad 0xB19BE18FCB503E00, 0xA5DF7A6E142AF544
.quad 0x3618D415FAE22300, 0x3BF7CCC10D2ED9EF
.Lk_sb2:
.quad 0xE27A93C60B712400, 0x5EB7E955BC982FCD
.quad 0x69EB88400AE12900, 0xC2A163C8AB82234A
.Lk_sbo:
.quad 0xD0D26D176FBDC700, 0x15AABF7AC502A878
.quad 0xCFE474A55FBB6A00, 0x8E1E90D1412B35FA
.Lk_mc_forward:
.quad 0x0407060500030201, 0x0C0F0E0D080B0A09
.quad 0x080B0A0904070605, 0x000302010C0F0E0D
.quad 0x0C0F0E0D080B0A09, 0x0407060500030201
.quad 0x000302010C0F0E0D, 0x080B0A0904070605
.Lk_mc_backward:
.quad 0x0605040702010003, 0x0E0D0C0F0A09080B
.quad 0x020100030E0D0C0F, 0x0A09080B06050407
.quad 0x0E0D0C0F0A09080B, 0x0605040702010003
.quad 0x0A09080B06050407, 0x020100030E0D0C0F
.Lk_sr:
.quad 0x0706050403020100, 0x0F0E0D0C0B0A0908
.quad 0x030E09040F0A0500, 0x0B06010C07020D08
.quad 0x0F060D040B020900, 0x070E050C030A0108
.quad 0x0B0E0104070A0D00, 0x0306090C0F020508
.Lk_rcon:
.quad 0x1F8391B9AF9DEEB6, 0x702A98084D7C7D81
.Lk_s63:
.quad 0x5B5B5B5B5B5B5B5B, 0x5B5B5B5B5B5B5B5B
.Lk_opt:
.quad 0xFF9F4929D6B66000, 0xF7974121DEBE6808
.quad 0x01EDBD5150BCEC00, 0xE10D5DB1B05C0CE0
.Lk_deskew:
.quad 0x07E4A34047A4E300, 0x1DFEB95A5DBEF91A
.quad 0x5F36B5DC83EA6900, 0x2841C2ABF49D1E77
.Lk_dksd:
.quad 0xFEB91A5DA3E44700, 0x0740E3A45A1DBEF9
.quad 0x41C277F4B5368300, 0x5FDC69EAAB289D1E
.Lk_dksb:
.quad 0x9A4FCA1F8550D500, 0x03D653861CC94C99
.quad 0x115BEDA7B6FC4A00, 0xD993256F7E3482C8
.Lk_dkse:
.quad 0xD5031CCA1FC9D600, 0x53859A4C994F5086
.quad 0xA23196054FDC7BE8, 0xCD5EF96A20B31487
.Lk_dks9:
.quad 0xB6116FC87ED9A700, 0x4AED933482255BFC
.quad 0x4576516227143300, 0x8BB89FACE9DAFDCE
.Lk_dipt:
.quad 0x0F505B040B545F00, 0x154A411E114E451A
.quad 0x86E383E660056500, 0x12771772F491F194
.Lk_dsb9:
.quad 0x851C03539A86D600, 0xCAD51F504F994CC9
.quad 0xC03B1789ECD74900, 0x725E2C9EB2FBA565
.Lk_dsbd:
.quad 0x7D57CCDFE6B1A200, 0xF56E9B13882A4439
.quad 0x3CE2FAF724C6CB00, 0x2931180D15DEEFD3
.Lk_dsbb:
.quad 0xD022649296B44200, 0x602646F6B0F2D404
.quad 0xC19498A6CD596700, 0xF3FF0C3E3255AA6B
.Lk_dsbe:
.quad 0x46F2929626D4D000, 0x2242600464B4F6B0
.quad 0x0C55A6CDFFAAC100, 0x9467F36B98593E32
.Lk_dsbo:
.quad 0x1387EA537EF94000, 0xC7AA6DB9D4943E2D
.quad 0x12D7560F93441D00, 0xCA4B8159D8C58E9C
.byte 86,101,99,116,111,114,32,80,101,114,109,117,116,97,116,105,111,110,32,65,69,83,32,102,111,114,32,120,56,54,95,54,52,47,83,83,83,69,51,44,32,77,105,107,101,32,72,97,109,98,117,114,103,32,40,83,116,97,110,102,111,114,100,32,85,110,105,118,101,114,115,105,116,121,41,0
.align 64
.size _vpaes_consts,.-_vpaes_consts
|
wangyu-/udp2raw | 39,419 | lib/aes_acc/asm/mips_be.S | .text
#ifdef OPENSSL_FIPSCANISTER
# include <openssl/fipssyms.h>
#endif
#if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
#define _MIPS_ARCH_MIPS32R2
#endif
#if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
.option pic2
#endif
.set noat
.align 5
.ent _mips_AES_encrypt
_mips_AES_encrypt:
.frame $29,0,$31
.set reorder
lw $12,0($6)
lw $13,4($6)
lw $14,8($6)
lw $15,12($6)
lw $30,240($6)
add $3,$6,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
sub $30,1
#if defined(__mips_smartmips)
ext $1,$9,16,8
.Loop_enc:
ext $2,$10,16,8
ext $24,$11,16,8
ext $25,$8,16,8
lwxs $12,$1($7) # Te1[s1>>16]
ext $1,$10,8,8
lwxs $13,$2($7) # Te1[s2>>16]
ext $2,$11,8,8
lwxs $14,$24($7) # Te1[s3>>16]
ext $24,$8,8,8
lwxs $15,$25($7) # Te1[s0>>16]
ext $25,$9,8,8
lwxs $16,$1($7) # Te2[s2>>8]
ext $1,$11,0,8
lwxs $17,$2($7) # Te2[s3>>8]
ext $2,$8,0,8
lwxs $18,$24($7) # Te2[s0>>8]
ext $24,$9,0,8
lwxs $19,$25($7) # Te2[s1>>8]
ext $25,$10,0,8
lwxs $20,$1($7) # Te3[s3]
ext $1,$8,24,8
lwxs $21,$2($7) # Te3[s0]
ext $2,$9,24,8
lwxs $22,$24($7) # Te3[s1]
ext $24,$10,24,8
lwxs $23,$25($7) # Te3[s2]
ext $25,$11,24,8
rotr $12,$12,8
rotr $13,$13,8
rotr $14,$14,8
rotr $15,$15,8
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
xor $12,$16
lwxs $16,$1($7) # Te0[s0>>24]
xor $13,$17
lwxs $17,$2($7) # Te0[s1>>24]
xor $14,$18
lwxs $18,$24($7) # Te0[s2>>24]
xor $15,$19
lwxs $19,$25($7) # Te0[s3>>24]
rotr $20,$20,24
lw $8,0($3)
rotr $21,$21,24
lw $9,4($3)
rotr $22,$22,24
lw $10,8($3)
rotr $23,$23,24
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_enc
ext $1,$9,16,8
srl $1,$9,14
#else
srl $1,$9,14
.Loop_enc:
srl $2,$10,14
srl $24,$11,14
srl $25,$8,14
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
lw $12,0($1) # Te1[s1>>16]
srl $1,$10,6
lw $13,0($2) # Te1[s2>>16]
srl $2,$11,6
lw $14,0($24) # Te1[s3>>16]
srl $24,$8,6
lw $15,0($25) # Te1[s0>>16]
srl $25,$9,6
#else
lwl $12,3($1) # Te1[s1>>16]
lwl $13,3($2) # Te1[s2>>16]
lwl $14,3($24) # Te1[s3>>16]
lwl $15,3($25) # Te1[s0>>16]
lwr $12,2($1) # Te1[s1>>16]
srl $1,$10,6
lwr $13,2($2) # Te1[s2>>16]
srl $2,$11,6
lwr $14,2($24) # Te1[s3>>16]
srl $24,$8,6
lwr $15,2($25) # Te1[s0>>16]
srl $25,$9,6
#endif
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $12,$12,8
rotr $13,$13,8
rotr $14,$14,8
rotr $15,$15,8
# if defined(_MIPSEL)
lw $16,0($1) # Te2[s2>>8]
sll $1,$11,2
lw $17,0($2) # Te2[s3>>8]
sll $2,$8,2
lw $18,0($24) # Te2[s0>>8]
sll $24,$9,2
lw $19,0($25) # Te2[s1>>8]
sll $25,$10,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lw $20,0($1) # Te3[s3]
ins $1,$8,2,8
lw $21,0($2) # Te3[s0]
ins $2,$9,2,8
lw $22,0($24) # Te3[s1]
ins $24,$10,2,8
lw $23,0($25) # Te3[s2]
ins $25,$11,2,8
# else
lw $16,0($1) # Te2[s2>>8]
ins $1,$11,2,8
lw $17,0($2) # Te2[s3>>8]
ins $2,$8,2,8
lw $18,0($24) # Te2[s0>>8]
ins $24,$9,2,8
lw $19,0($25) # Te2[s1>>8]
ins $25,$10,2,8
lw $20,0($1) # Te3[s3]
srl $1,$8,22
lw $21,0($2) # Te3[s0]
srl $2,$9,22
lw $22,0($24) # Te3[s1]
srl $24,$10,22
lw $23,0($25) # Te3[s2]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# endif
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
rotr $20,$20,24
rotr $21,$21,24
rotr $22,$22,24
rotr $23,$23,24
#else
lwl $16,2($1) # Te2[s2>>8]
lwl $17,2($2) # Te2[s3>>8]
lwl $18,2($24) # Te2[s0>>8]
lwl $19,2($25) # Te2[s1>>8]
lwr $16,1($1) # Te2[s2>>8]
sll $1,$11,2
lwr $17,1($2) # Te2[s3>>8]
sll $2,$8,2
lwr $18,1($24) # Te2[s0>>8]
sll $24,$9,2
lwr $19,1($25) # Te2[s1>>8]
sll $25,$10,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lwl $20,1($1) # Te3[s3]
lwl $21,1($2) # Te3[s0]
lwl $22,1($24) # Te3[s1]
lwl $23,1($25) # Te3[s2]
lwr $20,0($1) # Te3[s3]
srl $1,$8,22
lwr $21,0($2) # Te3[s0]
srl $2,$9,22
lwr $22,0($24) # Te3[s1]
srl $24,$10,22
lwr $23,0($25) # Te3[s2]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
xor $12,$16
lw $16,0($1) # Te0[s0>>24]
xor $13,$17
lw $17,0($2) # Te0[s1>>24]
xor $14,$18
lw $18,0($24) # Te0[s2>>24]
xor $15,$19
lw $19,0($25) # Te0[s3>>24]
xor $12,$20
lw $8,0($3)
xor $13,$21
lw $9,4($3)
xor $14,$22
lw $10,8($3)
xor $15,$23
lw $11,12($3)
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_enc
srl $1,$9,14
#endif
.set reorder
srl $2,$10,14
srl $24,$11,14
srl $25,$8,14
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $12,2($1) # Te4[s1>>16]
srl $1,$10,6
lbu $13,2($2) # Te4[s2>>16]
srl $2,$11,6
lbu $14,2($24) # Te4[s3>>16]
srl $24,$8,6
lbu $15,2($25) # Te4[s0>>16]
srl $25,$9,6
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
# if defined(_MIPSEL)
lbu $16,2($1) # Te4[s2>>8]
ins $1,$8,2,8
lbu $17,2($2) # Te4[s3>>8]
ins $2,$9,2,8
lbu $18,2($24) # Te4[s0>>8]
ins $24,$10,2,8
lbu $19,2($25) # Te4[s1>>8]
ins $25,$11,2,8
lbu $20,2($1) # Te4[s0>>24]
sll $1,$11,2
lbu $21,2($2) # Te4[s1>>24]
sll $2,$8,2
lbu $22,2($24) # Te4[s2>>24]
sll $24,$9,2
lbu $23,2($25) # Te4[s3>>24]
sll $25,$10,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# else
lbu $16,2($1) # Te4[s2>>8]
srl $1,$8,22
lbu $17,2($2) # Te4[s3>>8]
srl $2,$9,22
lbu $18,2($24) # Te4[s0>>8]
srl $24,$10,22
lbu $19,2($25) # Te4[s1>>8]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,2($1) # Te4[s0>>24]
ins $1,$11,2,8
lbu $21,2($2) # Te4[s1>>24]
ins $2,$8,2,8
lbu $22,2($24) # Te4[s2>>24]
ins $24,$9,2,8
lbu $23,2($25) # Te4[s3>>24]
ins $25,$10,2,8
# endif
sll $12,$12,16
sll $13,$13,16
sll $14,$14,16
sll $15,$15,16
ins $12,$16,8,8
lbu $16,2($1) # Te4[s3]
ins $13,$17,8,8
lbu $17,2($2) # Te4[s0]
ins $14,$18,8,8
lbu $18,2($24) # Te4[s1]
ins $15,$19,8,8
lbu $19,2($25) # Te4[s2]
ins $12,$20,24,8
lw $8,0($3)
ins $13,$21,24,8
lw $9,4($3)
ins $14,$22,24,8
lw $10,8($3)
ins $15,$23,24,8
lw $11,12($3)
ins $12,$16,0,8
ins $13,$17,0,8
ins $14,$18,0,8
ins $15,$19,0,8
#else
lbu $16,2($1) # Te4[s2>>8]
srl $1,$8,22
lbu $17,2($2) # Te4[s3>>8]
srl $2,$9,22
lbu $18,2($24) # Te4[s0>>8]
srl $24,$10,22
lbu $19,2($25) # Te4[s1>>8]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,2($1) # Te4[s0>>24]
sll $1,$11,2
lbu $21,2($2) # Te4[s1>>24]
sll $2,$8,2
lbu $22,2($24) # Te4[s2>>24]
sll $24,$9,2
lbu $23,2($25) # Te4[s3>>24]
sll $25,$10,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
sll $12,$12,16
sll $13,$13,16
sll $14,$14,16
sll $15,$15,16
sll $16,$16,8
sll $17,$17,8
sll $18,$18,8
sll $19,$19,8
xor $12,$16
lbu $16,2($1) # Te4[s3]
xor $13,$17
lbu $17,2($2) # Te4[s0]
xor $14,$18
lbu $18,2($24) # Te4[s1]
xor $15,$19
lbu $19,2($25) # Te4[s2]
sll $20,$20,24
lw $8,0($3)
sll $21,$21,24
lw $9,4($3)
sll $22,$22,24
lw $10,8($3)
sll $23,$23,24
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
#sll $16,$16,0
#sll $17,$17,0
#sll $18,$18,0
#sll $19,$19,0
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
#endif
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
jr $31
.end _mips_AES_encrypt
.align 5
.globl AES_encrypt
.ent AES_encrypt
AES_encrypt:
.frame $29,64,$31
.mask 0xc0ff0000,-4
.set noreorder
.cpload $25
sub $29,64
sw $31,64-1*4($29)
sw $30,64-2*4($29)
sw $23,64-3*4($29)
sw $22,64-4*4($29)
sw $21,64-5*4($29)
sw $20,64-6*4($29)
sw $19,64-7*4($29)
sw $18,64-8*4($29)
sw $17,64-9*4($29)
sw $16,64-10*4($29)
.set reorder
la $7,AES_Te # PIC-ified 'load address'
lwl $8,0+0($4)
lwl $9,4+0($4)
lwl $10,8+0($4)
lwl $11,12+0($4)
lwr $8,0+3($4)
lwr $9,4+3($4)
lwr $10,8+3($4)
lwr $11,12+3($4)
bal _mips_AES_encrypt
swr $8,0+3($5)
swr $9,4+3($5)
swr $10,8+3($5)
swr $11,12+3($5)
swl $8,0+0($5)
swl $9,4+0($5)
swl $10,8+0($5)
swl $11,12+0($5)
.set noreorder
lw $31,64-1*4($29)
lw $30,64-2*4($29)
lw $23,64-3*4($29)
lw $22,64-4*4($29)
lw $21,64-5*4($29)
lw $20,64-6*4($29)
lw $19,64-7*4($29)
lw $18,64-8*4($29)
lw $17,64-9*4($29)
lw $16,64-10*4($29)
jr $31
add $29,64
.end AES_encrypt
.align 5
.ent _mips_AES_decrypt
_mips_AES_decrypt:
.frame $29,0,$31
.set reorder
lw $12,0($6)
lw $13,4($6)
lw $14,8($6)
lw $15,12($6)
lw $30,240($6)
add $3,$6,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
sub $30,1
#if defined(__mips_smartmips)
ext $1,$11,16,8
.Loop_dec:
ext $2,$8,16,8
ext $24,$9,16,8
ext $25,$10,16,8
lwxs $12,$1($7) # Td1[s3>>16]
ext $1,$10,8,8
lwxs $13,$2($7) # Td1[s0>>16]
ext $2,$11,8,8
lwxs $14,$24($7) # Td1[s1>>16]
ext $24,$8,8,8
lwxs $15,$25($7) # Td1[s2>>16]
ext $25,$9,8,8
lwxs $16,$1($7) # Td2[s2>>8]
ext $1,$9,0,8
lwxs $17,$2($7) # Td2[s3>>8]
ext $2,$10,0,8
lwxs $18,$24($7) # Td2[s0>>8]
ext $24,$11,0,8
lwxs $19,$25($7) # Td2[s1>>8]
ext $25,$8,0,8
lwxs $20,$1($7) # Td3[s1]
ext $1,$8,24,8
lwxs $21,$2($7) # Td3[s2]
ext $2,$9,24,8
lwxs $22,$24($7) # Td3[s3]
ext $24,$10,24,8
lwxs $23,$25($7) # Td3[s0]
ext $25,$11,24,8
rotr $12,$12,8
rotr $13,$13,8
rotr $14,$14,8
rotr $15,$15,8
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
xor $12,$16
lwxs $16,$1($7) # Td0[s0>>24]
xor $13,$17
lwxs $17,$2($7) # Td0[s1>>24]
xor $14,$18
lwxs $18,$24($7) # Td0[s2>>24]
xor $15,$19
lwxs $19,$25($7) # Td0[s3>>24]
rotr $20,$20,24
lw $8,0($3)
rotr $21,$21,24
lw $9,4($3)
rotr $22,$22,24
lw $10,8($3)
rotr $23,$23,24
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_dec
ext $1,$11,16,8
srl $1,$11,14
#else
srl $1,$11,14
.Loop_dec:
srl $2,$8,14
srl $24,$9,14
srl $25,$10,14
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
lw $12,0($1) # Td1[s3>>16]
srl $1,$10,6
lw $13,0($2) # Td1[s0>>16]
srl $2,$11,6
lw $14,0($24) # Td1[s1>>16]
srl $24,$8,6
lw $15,0($25) # Td1[s2>>16]
srl $25,$9,6
#else
lwl $12,3($1) # Td1[s3>>16]
lwl $13,3($2) # Td1[s0>>16]
lwl $14,3($24) # Td1[s1>>16]
lwl $15,3($25) # Td1[s2>>16]
lwr $12,2($1) # Td1[s3>>16]
srl $1,$10,6
lwr $13,2($2) # Td1[s0>>16]
srl $2,$11,6
lwr $14,2($24) # Td1[s1>>16]
srl $24,$8,6
lwr $15,2($25) # Td1[s2>>16]
srl $25,$9,6
#endif
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $12,$12,8
rotr $13,$13,8
rotr $14,$14,8
rotr $15,$15,8
# if defined(_MIPSEL)
lw $16,0($1) # Td2[s2>>8]
sll $1,$9,2
lw $17,0($2) # Td2[s3>>8]
sll $2,$10,2
lw $18,0($24) # Td2[s0>>8]
sll $24,$11,2
lw $19,0($25) # Td2[s1>>8]
sll $25,$8,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lw $20,0($1) # Td3[s1]
ins $1,$8,2,8
lw $21,0($2) # Td3[s2]
ins $2,$9,2,8
lw $22,0($24) # Td3[s3]
ins $24,$10,2,8
lw $23,0($25) # Td3[s0]
ins $25,$11,2,8
#else
lw $16,0($1) # Td2[s2>>8]
ins $1,$9,2,8
lw $17,0($2) # Td2[s3>>8]
ins $2,$10,2,8
lw $18,0($24) # Td2[s0>>8]
ins $24,$11,2,8
lw $19,0($25) # Td2[s1>>8]
ins $25,$8,2,8
lw $20,0($1) # Td3[s1]
srl $1,$8,22
lw $21,0($2) # Td3[s2]
srl $2,$9,22
lw $22,0($24) # Td3[s3]
srl $24,$10,22
lw $23,0($25) # Td3[s0]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
rotr $20,$20,24
rotr $21,$21,24
rotr $22,$22,24
rotr $23,$23,24
#else
lwl $16,2($1) # Td2[s2>>8]
lwl $17,2($2) # Td2[s3>>8]
lwl $18,2($24) # Td2[s0>>8]
lwl $19,2($25) # Td2[s1>>8]
lwr $16,1($1) # Td2[s2>>8]
sll $1,$9,2
lwr $17,1($2) # Td2[s3>>8]
sll $2,$10,2
lwr $18,1($24) # Td2[s0>>8]
sll $24,$11,2
lwr $19,1($25) # Td2[s1>>8]
sll $25,$8,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lwl $20,1($1) # Td3[s1]
lwl $21,1($2) # Td3[s2]
lwl $22,1($24) # Td3[s3]
lwl $23,1($25) # Td3[s0]
lwr $20,0($1) # Td3[s1]
srl $1,$8,22
lwr $21,0($2) # Td3[s2]
srl $2,$9,22
lwr $22,0($24) # Td3[s3]
srl $24,$10,22
lwr $23,0($25) # Td3[s0]
srl $25,$11,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
xor $12,$16
lw $16,0($1) # Td0[s0>>24]
xor $13,$17
lw $17,0($2) # Td0[s1>>24]
xor $14,$18
lw $18,0($24) # Td0[s2>>24]
xor $15,$19
lw $19,0($25) # Td0[s3>>24]
xor $12,$20
lw $8,0($3)
xor $13,$21
lw $9,4($3)
xor $14,$22
lw $10,8($3)
xor $15,$23
lw $11,12($3)
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_dec
srl $1,$11,14
#endif
.set reorder
lw $16,1024($7) # prefetch Td4
srl $1,$11,16
lw $17,1024+32($7)
srl $2,$8,16
lw $18,1024+64($7)
srl $24,$9,16
lw $19,1024+96($7)
srl $25,$10,16
lw $20,1024+128($7)
and $1,0xff
lw $21,1024+160($7)
and $2,0xff
lw $22,1024+192($7)
and $24,0xff
lw $23,1024+224($7)
and $25,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $12,1024($1) # Td4[s3>>16]
srl $1,$10,8
lbu $13,1024($2) # Td4[s0>>16]
srl $2,$11,8
lbu $14,1024($24) # Td4[s1>>16]
srl $24,$8,8
lbu $15,1024($25) # Td4[s2>>16]
srl $25,$9,8
and $1,0xff
and $2,0xff
and $24,0xff
and $25,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
# if defined(_MIPSEL)
lbu $16,1024($1) # Td4[s2>>8]
ins $1,$8,0,8
lbu $17,1024($2) # Td4[s3>>8]
ins $2,$9,0,8
lbu $18,1024($24) # Td4[s0>>8]
ins $24,$10,0,8
lbu $19,1024($25) # Td4[s1>>8]
ins $25,$11,0,8
lbu $20,1024($1) # Td4[s0>>24]
and $1,$9,0xff
lbu $21,1024($2) # Td4[s1>>24]
and $2,$10,0xff
lbu $22,1024($24) # Td4[s2>>24]
and $24,$11,0xff
lbu $23,1024($25) # Td4[s3>>24]
and $25,$8,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# else
lbu $16,1024($1) # Td4[s2>>8]
srl $1,$8,24
lbu $17,1024($2) # Td4[s3>>8]
srl $2,$9,24
lbu $18,1024($24) # Td4[s0>>8]
srl $24,$10,24
lbu $19,1024($25) # Td4[s1>>8]
srl $25,$11,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,1024($1) # Td4[s0>>24]
ins $1,$9,0,8
lbu $21,1024($2) # Td4[s1>>24]
ins $2,$10,0,8
lbu $22,1024($24) # Td4[s2>>24]
ins $24,$11,0,8
lbu $23,1024($25) # Td4[s3>>24]
ins $25,$8,0,8
# endif
sll $12,$12,16
sll $13,$13,16
sll $14,$14,16
sll $15,$15,16
ins $12,$16,8,8
lbu $16,1024($1) # Td4[s1]
ins $13,$17,8,8
lbu $17,1024($2) # Td4[s2]
ins $14,$18,8,8
lbu $18,1024($24) # Td4[s3]
ins $15,$19,8,8
lbu $19,1024($25) # Td4[s0]
ins $12,$20,24,8
lw $8,0($3)
ins $13,$21,24,8
lw $9,4($3)
ins $14,$22,24,8
lw $10,8($3)
ins $15,$23,24,8
lw $11,12($3)
ins $12,$16,0,8
ins $13,$17,0,8
ins $14,$18,0,8
ins $15,$19,0,8
#else
lbu $16,1024($1) # Td4[s2>>8]
srl $1,$8,24
lbu $17,1024($2) # Td4[s3>>8]
srl $2,$9,24
lbu $18,1024($24) # Td4[s0>>8]
srl $24,$10,24
lbu $19,1024($25) # Td4[s1>>8]
srl $25,$11,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,1024($1) # Td4[s0>>24]
and $1,$9,0xff
lbu $21,1024($2) # Td4[s1>>24]
and $2,$10,0xff
lbu $22,1024($24) # Td4[s2>>24]
and $24,$11,0xff
lbu $23,1024($25) # Td4[s3>>24]
and $25,$8,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
sll $12,$12,16
sll $13,$13,16
sll $14,$14,16
sll $15,$15,16
sll $16,$16,8
sll $17,$17,8
sll $18,$18,8
sll $19,$19,8
xor $12,$16
lbu $16,1024($1) # Td4[s1]
xor $13,$17
lbu $17,1024($2) # Td4[s2]
xor $14,$18
lbu $18,1024($24) # Td4[s3]
xor $15,$19
lbu $19,1024($25) # Td4[s0]
sll $20,$20,24
lw $8,0($3)
sll $21,$21,24
lw $9,4($3)
sll $22,$22,24
lw $10,8($3)
sll $23,$23,24
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
#sll $16,$16,0
#sll $17,$17,0
#sll $18,$18,0
#sll $19,$19,0
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
#endif
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
jr $31
.end _mips_AES_decrypt
.align 5
.globl AES_decrypt
.ent AES_decrypt
AES_decrypt:
.frame $29,64,$31
.mask 0xc0ff0000,-4
.set noreorder
.cpload $25
sub $29,64
sw $31,64-1*4($29)
sw $30,64-2*4($29)
sw $23,64-3*4($29)
sw $22,64-4*4($29)
sw $21,64-5*4($29)
sw $20,64-6*4($29)
sw $19,64-7*4($29)
sw $18,64-8*4($29)
sw $17,64-9*4($29)
sw $16,64-10*4($29)
.set reorder
la $7,AES_Td # PIC-ified 'load address'
lwl $8,0+0($4)
lwl $9,4+0($4)
lwl $10,8+0($4)
lwl $11,12+0($4)
lwr $8,0+3($4)
lwr $9,4+3($4)
lwr $10,8+3($4)
lwr $11,12+3($4)
bal _mips_AES_decrypt
swr $8,0+3($5)
swr $9,4+3($5)
swr $10,8+3($5)
swr $11,12+3($5)
swl $8,0+0($5)
swl $9,4+0($5)
swl $10,8+0($5)
swl $11,12+0($5)
.set noreorder
lw $31,64-1*4($29)
lw $30,64-2*4($29)
lw $23,64-3*4($29)
lw $22,64-4*4($29)
lw $21,64-5*4($29)
lw $20,64-6*4($29)
lw $19,64-7*4($29)
lw $18,64-8*4($29)
lw $17,64-9*4($29)
lw $16,64-10*4($29)
jr $31
add $29,64
.end AES_decrypt
.align 5
.ent _mips_AES_set_encrypt_key
_mips_AES_set_encrypt_key:
.frame $29,0,$31
.set noreorder
beqz $4,.Lekey_done
li $2,-1
beqz $6,.Lekey_done
add $3,$7,256
.set reorder
lwl $8,0+0($4) # load 128 bits
lwl $9,4+0($4)
lwl $10,8+0($4)
lwl $11,12+0($4)
li $1,128
lwr $8,0+3($4)
lwr $9,4+3($4)
lwr $10,8+3($4)
lwr $11,12+3($4)
.set noreorder
beq $5,$1,.L128bits
li $30,10
.set reorder
lwl $12,16+0($4) # load 192 bits
lwl $13,20+0($4)
li $1,192
lwr $12,16+3($4)
lwr $13,20+3($4)
.set noreorder
beq $5,$1,.L192bits
li $30,8
.set reorder
lwl $14,24+0($4) # load 256 bits
lwl $15,28+0($4)
li $1,256
lwr $14,24+3($4)
lwr $15,28+3($4)
.set noreorder
beq $5,$1,.L256bits
li $30,7
b .Lekey_done
li $2,-2
.align 4
.L128bits:
.set reorder
srl $1,$11,16
srl $2,$11,8
and $1,0xff
and $2,0xff
and $24,$11,0xff
srl $25,$11,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sub $30,1
add $6,16
sll $1,$1,24
sll $2,$2,16
sll $24,$24,8
#sll $25,$25,0
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
.set noreorder
bnez $30,.L128bits
add $3,4
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
li $30,10
sw $11,12($6)
li $2,0
sw $30,80($6)
b .Lekey_done
sub $6,10*16
.align 4
.L192bits:
.set reorder
srl $1,$13,16
srl $2,$13,8
and $1,0xff
and $2,0xff
and $24,$13,0xff
srl $25,$13,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sw $12,16($6)
sw $13,20($6)
sub $30,1
add $6,24
sll $1,$1,24
sll $2,$2,16
sll $24,$24,8
#sll $25,$25,0
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
xor $12,$11
xor $13,$12
.set noreorder
bnez $30,.L192bits
add $3,4
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
li $30,12
sw $11,12($6)
li $2,0
sw $30,48($6)
b .Lekey_done
sub $6,12*16
.align 4
.L256bits:
.set reorder
srl $1,$15,16
srl $2,$15,8
and $1,0xff
and $2,0xff
and $24,$15,0xff
srl $25,$15,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sw $12,16($6)
sw $13,20($6)
sw $14,24($6)
sw $15,28($6)
sub $30,1
sll $1,$1,24
sll $2,$2,16
sll $24,$24,8
#sll $25,$25,0
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
beqz $30,.L256bits_done
srl $1,$11,24
srl $2,$11,16
srl $24,$11,8
and $25,$11,0xff
and $2,0xff
and $24,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sll $1,24
sll $2,16
sll $24,8
xor $12,$1
xor $12,$2
xor $12,$24
xor $12,$25
xor $13,$12
xor $14,$13
xor $15,$14
add $6,32
.set noreorder
b .L256bits
add $3,4
.L256bits_done:
sw $8,32($6)
sw $9,36($6)
sw $10,40($6)
li $30,14
sw $11,44($6)
li $2,0
sw $30,48($6)
sub $6,12*16
.Lekey_done:
jr $31
nop
.end _mips_AES_set_encrypt_key
.globl AES_set_encrypt_key
.ent AES_set_encrypt_key
AES_set_encrypt_key:
.frame $29,32,$31
.mask 0xc0000000,-4
.set noreorder
.cpload $25
sub $29,32
sw $31,32-1*4($29)
sw $30,32-2*4($29)
.set reorder
la $7,AES_Te4 # PIC-ified 'load address'
bal _mips_AES_set_encrypt_key
.set noreorder
move $4,$2
lw $31,32-1*4($29)
lw $30,32-2*4($29)
jr $31
add $29,32
.end AES_set_encrypt_key
.align 5
.globl AES_set_decrypt_key
.ent AES_set_decrypt_key
AES_set_decrypt_key:
.frame $29,32,$31
.mask 0xc0000000,-4
.set noreorder
.cpload $25
sub $29,32
sw $31,32-1*4($29)
sw $30,32-2*4($29)
.set reorder
la $7,AES_Te4 # PIC-ified 'load address'
bal _mips_AES_set_encrypt_key
bltz $2,.Ldkey_done
sll $1,$30,4
add $4,$6,0
add $5,$6,$1
.align 4
.Lswap:
lw $8,0($4)
lw $9,4($4)
lw $10,8($4)
lw $11,12($4)
lw $12,0($5)
lw $13,4($5)
lw $14,8($5)
lw $15,12($5)
sw $8,0($5)
sw $9,4($5)
sw $10,8($5)
sw $11,12($5)
add $4,16
sub $5,16
sw $12,-16($4)
sw $13,-12($4)
sw $14,-8($4)
sw $15,-4($4)
bne $4,$5,.Lswap
lw $8,16($6) # modulo-scheduled
lui $2,0x8080
sub $30,1
or $2,0x8080
sll $30,2
add $6,16
lui $25,0x1b1b
nor $24,$0,$2
or $25,0x1b1b
.align 4
.Lmix:
and $1,$8,$2
and $9,$8,$24
srl $10,$1,7
addu $9,$9 # tp2<<1
subu $1,$10
and $1,$25
xor $9,$1
and $1,$9,$2
and $10,$9,$24
srl $11,$1,7
addu $10,$10 # tp4<<1
subu $1,$11
and $1,$25
xor $10,$1
and $1,$10,$2
and $11,$10,$24
srl $12,$1,7
addu $11,$11 # tp8<<1
subu $1,$12
and $1,$25
xor $11,$1
xor $12,$11,$8
xor $15,$11,$10
xor $13,$12,$9
xor $14,$12,$10
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $8,$14,16
xor $15,$9
rotr $9,$12,8
xor $15,$8
rotr $10,$13,24
xor $15,$9
lw $8,4($6) # modulo-scheduled
xor $15,$10
#else
srl $8,$14,16
xor $15,$9
sll $9,$14,16
xor $15,$8
srl $8,$12,8
xor $15,$9
sll $9,$12,24
xor $15,$8
srl $8,$13,24
xor $15,$9
sll $9,$13,8
xor $15,$8
lw $8,4($6) # modulo-scheduled
xor $15,$9
#endif
sub $30,1
sw $15,0($6)
add $6,4
bnez $30,.Lmix
li $2,0
.Ldkey_done:
.set noreorder
move $4,$2
lw $31,32-1*4($29)
lw $30,32-2*4($29)
jr $31
add $29,32
.end AES_set_decrypt_key
.rdata
.align 10
AES_Te:
.byte 0xc6,0x63,0x63,0xa5, 0xf8,0x7c,0x7c,0x84 # Te0
.byte 0xee,0x77,0x77,0x99, 0xf6,0x7b,0x7b,0x8d
.byte 0xff,0xf2,0xf2,0x0d, 0xd6,0x6b,0x6b,0xbd
.byte 0xde,0x6f,0x6f,0xb1, 0x91,0xc5,0xc5,0x54
.byte 0x60,0x30,0x30,0x50, 0x02,0x01,0x01,0x03
.byte 0xce,0x67,0x67,0xa9, 0x56,0x2b,0x2b,0x7d
.byte 0xe7,0xfe,0xfe,0x19, 0xb5,0xd7,0xd7,0x62
.byte 0x4d,0xab,0xab,0xe6, 0xec,0x76,0x76,0x9a
.byte 0x8f,0xca,0xca,0x45, 0x1f,0x82,0x82,0x9d
.byte 0x89,0xc9,0xc9,0x40, 0xfa,0x7d,0x7d,0x87
.byte 0xef,0xfa,0xfa,0x15, 0xb2,0x59,0x59,0xeb
.byte 0x8e,0x47,0x47,0xc9, 0xfb,0xf0,0xf0,0x0b
.byte 0x41,0xad,0xad,0xec, 0xb3,0xd4,0xd4,0x67
.byte 0x5f,0xa2,0xa2,0xfd, 0x45,0xaf,0xaf,0xea
.byte 0x23,0x9c,0x9c,0xbf, 0x53,0xa4,0xa4,0xf7
.byte 0xe4,0x72,0x72,0x96, 0x9b,0xc0,0xc0,0x5b
.byte 0x75,0xb7,0xb7,0xc2, 0xe1,0xfd,0xfd,0x1c
.byte 0x3d,0x93,0x93,0xae, 0x4c,0x26,0x26,0x6a
.byte 0x6c,0x36,0x36,0x5a, 0x7e,0x3f,0x3f,0x41
.byte 0xf5,0xf7,0xf7,0x02, 0x83,0xcc,0xcc,0x4f
.byte 0x68,0x34,0x34,0x5c, 0x51,0xa5,0xa5,0xf4
.byte 0xd1,0xe5,0xe5,0x34, 0xf9,0xf1,0xf1,0x08
.byte 0xe2,0x71,0x71,0x93, 0xab,0xd8,0xd8,0x73
.byte 0x62,0x31,0x31,0x53, 0x2a,0x15,0x15,0x3f
.byte 0x08,0x04,0x04,0x0c, 0x95,0xc7,0xc7,0x52
.byte 0x46,0x23,0x23,0x65, 0x9d,0xc3,0xc3,0x5e
.byte 0x30,0x18,0x18,0x28, 0x37,0x96,0x96,0xa1
.byte 0x0a,0x05,0x05,0x0f, 0x2f,0x9a,0x9a,0xb5
.byte 0x0e,0x07,0x07,0x09, 0x24,0x12,0x12,0x36
.byte 0x1b,0x80,0x80,0x9b, 0xdf,0xe2,0xe2,0x3d
.byte 0xcd,0xeb,0xeb,0x26, 0x4e,0x27,0x27,0x69
.byte 0x7f,0xb2,0xb2,0xcd, 0xea,0x75,0x75,0x9f
.byte 0x12,0x09,0x09,0x1b, 0x1d,0x83,0x83,0x9e
.byte 0x58,0x2c,0x2c,0x74, 0x34,0x1a,0x1a,0x2e
.byte 0x36,0x1b,0x1b,0x2d, 0xdc,0x6e,0x6e,0xb2
.byte 0xb4,0x5a,0x5a,0xee, 0x5b,0xa0,0xa0,0xfb
.byte 0xa4,0x52,0x52,0xf6, 0x76,0x3b,0x3b,0x4d
.byte 0xb7,0xd6,0xd6,0x61, 0x7d,0xb3,0xb3,0xce
.byte 0x52,0x29,0x29,0x7b, 0xdd,0xe3,0xe3,0x3e
.byte 0x5e,0x2f,0x2f,0x71, 0x13,0x84,0x84,0x97
.byte 0xa6,0x53,0x53,0xf5, 0xb9,0xd1,0xd1,0x68
.byte 0x00,0x00,0x00,0x00, 0xc1,0xed,0xed,0x2c
.byte 0x40,0x20,0x20,0x60, 0xe3,0xfc,0xfc,0x1f
.byte 0x79,0xb1,0xb1,0xc8, 0xb6,0x5b,0x5b,0xed
.byte 0xd4,0x6a,0x6a,0xbe, 0x8d,0xcb,0xcb,0x46
.byte 0x67,0xbe,0xbe,0xd9, 0x72,0x39,0x39,0x4b
.byte 0x94,0x4a,0x4a,0xde, 0x98,0x4c,0x4c,0xd4
.byte 0xb0,0x58,0x58,0xe8, 0x85,0xcf,0xcf,0x4a
.byte 0xbb,0xd0,0xd0,0x6b, 0xc5,0xef,0xef,0x2a
.byte 0x4f,0xaa,0xaa,0xe5, 0xed,0xfb,0xfb,0x16
.byte 0x86,0x43,0x43,0xc5, 0x9a,0x4d,0x4d,0xd7
.byte 0x66,0x33,0x33,0x55, 0x11,0x85,0x85,0x94
.byte 0x8a,0x45,0x45,0xcf, 0xe9,0xf9,0xf9,0x10
.byte 0x04,0x02,0x02,0x06, 0xfe,0x7f,0x7f,0x81
.byte 0xa0,0x50,0x50,0xf0, 0x78,0x3c,0x3c,0x44
.byte 0x25,0x9f,0x9f,0xba, 0x4b,0xa8,0xa8,0xe3
.byte 0xa2,0x51,0x51,0xf3, 0x5d,0xa3,0xa3,0xfe
.byte 0x80,0x40,0x40,0xc0, 0x05,0x8f,0x8f,0x8a
.byte 0x3f,0x92,0x92,0xad, 0x21,0x9d,0x9d,0xbc
.byte 0x70,0x38,0x38,0x48, 0xf1,0xf5,0xf5,0x04
.byte 0x63,0xbc,0xbc,0xdf, 0x77,0xb6,0xb6,0xc1
.byte 0xaf,0xda,0xda,0x75, 0x42,0x21,0x21,0x63
.byte 0x20,0x10,0x10,0x30, 0xe5,0xff,0xff,0x1a
.byte 0xfd,0xf3,0xf3,0x0e, 0xbf,0xd2,0xd2,0x6d
.byte 0x81,0xcd,0xcd,0x4c, 0x18,0x0c,0x0c,0x14
.byte 0x26,0x13,0x13,0x35, 0xc3,0xec,0xec,0x2f
.byte 0xbe,0x5f,0x5f,0xe1, 0x35,0x97,0x97,0xa2
.byte 0x88,0x44,0x44,0xcc, 0x2e,0x17,0x17,0x39
.byte 0x93,0xc4,0xc4,0x57, 0x55,0xa7,0xa7,0xf2
.byte 0xfc,0x7e,0x7e,0x82, 0x7a,0x3d,0x3d,0x47
.byte 0xc8,0x64,0x64,0xac, 0xba,0x5d,0x5d,0xe7
.byte 0x32,0x19,0x19,0x2b, 0xe6,0x73,0x73,0x95
.byte 0xc0,0x60,0x60,0xa0, 0x19,0x81,0x81,0x98
.byte 0x9e,0x4f,0x4f,0xd1, 0xa3,0xdc,0xdc,0x7f
.byte 0x44,0x22,0x22,0x66, 0x54,0x2a,0x2a,0x7e
.byte 0x3b,0x90,0x90,0xab, 0x0b,0x88,0x88,0x83
.byte 0x8c,0x46,0x46,0xca, 0xc7,0xee,0xee,0x29
.byte 0x6b,0xb8,0xb8,0xd3, 0x28,0x14,0x14,0x3c
.byte 0xa7,0xde,0xde,0x79, 0xbc,0x5e,0x5e,0xe2
.byte 0x16,0x0b,0x0b,0x1d, 0xad,0xdb,0xdb,0x76
.byte 0xdb,0xe0,0xe0,0x3b, 0x64,0x32,0x32,0x56
.byte 0x74,0x3a,0x3a,0x4e, 0x14,0x0a,0x0a,0x1e
.byte 0x92,0x49,0x49,0xdb, 0x0c,0x06,0x06,0x0a
.byte 0x48,0x24,0x24,0x6c, 0xb8,0x5c,0x5c,0xe4
.byte 0x9f,0xc2,0xc2,0x5d, 0xbd,0xd3,0xd3,0x6e
.byte 0x43,0xac,0xac,0xef, 0xc4,0x62,0x62,0xa6
.byte 0x39,0x91,0x91,0xa8, 0x31,0x95,0x95,0xa4
.byte 0xd3,0xe4,0xe4,0x37, 0xf2,0x79,0x79,0x8b
.byte 0xd5,0xe7,0xe7,0x32, 0x8b,0xc8,0xc8,0x43
.byte 0x6e,0x37,0x37,0x59, 0xda,0x6d,0x6d,0xb7
.byte 0x01,0x8d,0x8d,0x8c, 0xb1,0xd5,0xd5,0x64
.byte 0x9c,0x4e,0x4e,0xd2, 0x49,0xa9,0xa9,0xe0
.byte 0xd8,0x6c,0x6c,0xb4, 0xac,0x56,0x56,0xfa
.byte 0xf3,0xf4,0xf4,0x07, 0xcf,0xea,0xea,0x25
.byte 0xca,0x65,0x65,0xaf, 0xf4,0x7a,0x7a,0x8e
.byte 0x47,0xae,0xae,0xe9, 0x10,0x08,0x08,0x18
.byte 0x6f,0xba,0xba,0xd5, 0xf0,0x78,0x78,0x88
.byte 0x4a,0x25,0x25,0x6f, 0x5c,0x2e,0x2e,0x72
.byte 0x38,0x1c,0x1c,0x24, 0x57,0xa6,0xa6,0xf1
.byte 0x73,0xb4,0xb4,0xc7, 0x97,0xc6,0xc6,0x51
.byte 0xcb,0xe8,0xe8,0x23, 0xa1,0xdd,0xdd,0x7c
.byte 0xe8,0x74,0x74,0x9c, 0x3e,0x1f,0x1f,0x21
.byte 0x96,0x4b,0x4b,0xdd, 0x61,0xbd,0xbd,0xdc
.byte 0x0d,0x8b,0x8b,0x86, 0x0f,0x8a,0x8a,0x85
.byte 0xe0,0x70,0x70,0x90, 0x7c,0x3e,0x3e,0x42
.byte 0x71,0xb5,0xb5,0xc4, 0xcc,0x66,0x66,0xaa
.byte 0x90,0x48,0x48,0xd8, 0x06,0x03,0x03,0x05
.byte 0xf7,0xf6,0xf6,0x01, 0x1c,0x0e,0x0e,0x12
.byte 0xc2,0x61,0x61,0xa3, 0x6a,0x35,0x35,0x5f
.byte 0xae,0x57,0x57,0xf9, 0x69,0xb9,0xb9,0xd0
.byte 0x17,0x86,0x86,0x91, 0x99,0xc1,0xc1,0x58
.byte 0x3a,0x1d,0x1d,0x27, 0x27,0x9e,0x9e,0xb9
.byte 0xd9,0xe1,0xe1,0x38, 0xeb,0xf8,0xf8,0x13
.byte 0x2b,0x98,0x98,0xb3, 0x22,0x11,0x11,0x33
.byte 0xd2,0x69,0x69,0xbb, 0xa9,0xd9,0xd9,0x70
.byte 0x07,0x8e,0x8e,0x89, 0x33,0x94,0x94,0xa7
.byte 0x2d,0x9b,0x9b,0xb6, 0x3c,0x1e,0x1e,0x22
.byte 0x15,0x87,0x87,0x92, 0xc9,0xe9,0xe9,0x20
.byte 0x87,0xce,0xce,0x49, 0xaa,0x55,0x55,0xff
.byte 0x50,0x28,0x28,0x78, 0xa5,0xdf,0xdf,0x7a
.byte 0x03,0x8c,0x8c,0x8f, 0x59,0xa1,0xa1,0xf8
.byte 0x09,0x89,0x89,0x80, 0x1a,0x0d,0x0d,0x17
.byte 0x65,0xbf,0xbf,0xda, 0xd7,0xe6,0xe6,0x31
.byte 0x84,0x42,0x42,0xc6, 0xd0,0x68,0x68,0xb8
.byte 0x82,0x41,0x41,0xc3, 0x29,0x99,0x99,0xb0
.byte 0x5a,0x2d,0x2d,0x77, 0x1e,0x0f,0x0f,0x11
.byte 0x7b,0xb0,0xb0,0xcb, 0xa8,0x54,0x54,0xfc
.byte 0x6d,0xbb,0xbb,0xd6, 0x2c,0x16,0x16,0x3a
AES_Td:
.byte 0x51,0xf4,0xa7,0x50, 0x7e,0x41,0x65,0x53 # Td0
.byte 0x1a,0x17,0xa4,0xc3, 0x3a,0x27,0x5e,0x96
.byte 0x3b,0xab,0x6b,0xcb, 0x1f,0x9d,0x45,0xf1
.byte 0xac,0xfa,0x58,0xab, 0x4b,0xe3,0x03,0x93
.byte 0x20,0x30,0xfa,0x55, 0xad,0x76,0x6d,0xf6
.byte 0x88,0xcc,0x76,0x91, 0xf5,0x02,0x4c,0x25
.byte 0x4f,0xe5,0xd7,0xfc, 0xc5,0x2a,0xcb,0xd7
.byte 0x26,0x35,0x44,0x80, 0xb5,0x62,0xa3,0x8f
.byte 0xde,0xb1,0x5a,0x49, 0x25,0xba,0x1b,0x67
.byte 0x45,0xea,0x0e,0x98, 0x5d,0xfe,0xc0,0xe1
.byte 0xc3,0x2f,0x75,0x02, 0x81,0x4c,0xf0,0x12
.byte 0x8d,0x46,0x97,0xa3, 0x6b,0xd3,0xf9,0xc6
.byte 0x03,0x8f,0x5f,0xe7, 0x15,0x92,0x9c,0x95
.byte 0xbf,0x6d,0x7a,0xeb, 0x95,0x52,0x59,0xda
.byte 0xd4,0xbe,0x83,0x2d, 0x58,0x74,0x21,0xd3
.byte 0x49,0xe0,0x69,0x29, 0x8e,0xc9,0xc8,0x44
.byte 0x75,0xc2,0x89,0x6a, 0xf4,0x8e,0x79,0x78
.byte 0x99,0x58,0x3e,0x6b, 0x27,0xb9,0x71,0xdd
.byte 0xbe,0xe1,0x4f,0xb6, 0xf0,0x88,0xad,0x17
.byte 0xc9,0x20,0xac,0x66, 0x7d,0xce,0x3a,0xb4
.byte 0x63,0xdf,0x4a,0x18, 0xe5,0x1a,0x31,0x82
.byte 0x97,0x51,0x33,0x60, 0x62,0x53,0x7f,0x45
.byte 0xb1,0x64,0x77,0xe0, 0xbb,0x6b,0xae,0x84
.byte 0xfe,0x81,0xa0,0x1c, 0xf9,0x08,0x2b,0x94
.byte 0x70,0x48,0x68,0x58, 0x8f,0x45,0xfd,0x19
.byte 0x94,0xde,0x6c,0x87, 0x52,0x7b,0xf8,0xb7
.byte 0xab,0x73,0xd3,0x23, 0x72,0x4b,0x02,0xe2
.byte 0xe3,0x1f,0x8f,0x57, 0x66,0x55,0xab,0x2a
.byte 0xb2,0xeb,0x28,0x07, 0x2f,0xb5,0xc2,0x03
.byte 0x86,0xc5,0x7b,0x9a, 0xd3,0x37,0x08,0xa5
.byte 0x30,0x28,0x87,0xf2, 0x23,0xbf,0xa5,0xb2
.byte 0x02,0x03,0x6a,0xba, 0xed,0x16,0x82,0x5c
.byte 0x8a,0xcf,0x1c,0x2b, 0xa7,0x79,0xb4,0x92
.byte 0xf3,0x07,0xf2,0xf0, 0x4e,0x69,0xe2,0xa1
.byte 0x65,0xda,0xf4,0xcd, 0x06,0x05,0xbe,0xd5
.byte 0xd1,0x34,0x62,0x1f, 0xc4,0xa6,0xfe,0x8a
.byte 0x34,0x2e,0x53,0x9d, 0xa2,0xf3,0x55,0xa0
.byte 0x05,0x8a,0xe1,0x32, 0xa4,0xf6,0xeb,0x75
.byte 0x0b,0x83,0xec,0x39, 0x40,0x60,0xef,0xaa
.byte 0x5e,0x71,0x9f,0x06, 0xbd,0x6e,0x10,0x51
.byte 0x3e,0x21,0x8a,0xf9, 0x96,0xdd,0x06,0x3d
.byte 0xdd,0x3e,0x05,0xae, 0x4d,0xe6,0xbd,0x46
.byte 0x91,0x54,0x8d,0xb5, 0x71,0xc4,0x5d,0x05
.byte 0x04,0x06,0xd4,0x6f, 0x60,0x50,0x15,0xff
.byte 0x19,0x98,0xfb,0x24, 0xd6,0xbd,0xe9,0x97
.byte 0x89,0x40,0x43,0xcc, 0x67,0xd9,0x9e,0x77
.byte 0xb0,0xe8,0x42,0xbd, 0x07,0x89,0x8b,0x88
.byte 0xe7,0x19,0x5b,0x38, 0x79,0xc8,0xee,0xdb
.byte 0xa1,0x7c,0x0a,0x47, 0x7c,0x42,0x0f,0xe9
.byte 0xf8,0x84,0x1e,0xc9, 0x00,0x00,0x00,0x00
.byte 0x09,0x80,0x86,0x83, 0x32,0x2b,0xed,0x48
.byte 0x1e,0x11,0x70,0xac, 0x6c,0x5a,0x72,0x4e
.byte 0xfd,0x0e,0xff,0xfb, 0x0f,0x85,0x38,0x56
.byte 0x3d,0xae,0xd5,0x1e, 0x36,0x2d,0x39,0x27
.byte 0x0a,0x0f,0xd9,0x64, 0x68,0x5c,0xa6,0x21
.byte 0x9b,0x5b,0x54,0xd1, 0x24,0x36,0x2e,0x3a
.byte 0x0c,0x0a,0x67,0xb1, 0x93,0x57,0xe7,0x0f
.byte 0xb4,0xee,0x96,0xd2, 0x1b,0x9b,0x91,0x9e
.byte 0x80,0xc0,0xc5,0x4f, 0x61,0xdc,0x20,0xa2
.byte 0x5a,0x77,0x4b,0x69, 0x1c,0x12,0x1a,0x16
.byte 0xe2,0x93,0xba,0x0a, 0xc0,0xa0,0x2a,0xe5
.byte 0x3c,0x22,0xe0,0x43, 0x12,0x1b,0x17,0x1d
.byte 0x0e,0x09,0x0d,0x0b, 0xf2,0x8b,0xc7,0xad
.byte 0x2d,0xb6,0xa8,0xb9, 0x14,0x1e,0xa9,0xc8
.byte 0x57,0xf1,0x19,0x85, 0xaf,0x75,0x07,0x4c
.byte 0xee,0x99,0xdd,0xbb, 0xa3,0x7f,0x60,0xfd
.byte 0xf7,0x01,0x26,0x9f, 0x5c,0x72,0xf5,0xbc
.byte 0x44,0x66,0x3b,0xc5, 0x5b,0xfb,0x7e,0x34
.byte 0x8b,0x43,0x29,0x76, 0xcb,0x23,0xc6,0xdc
.byte 0xb6,0xed,0xfc,0x68, 0xb8,0xe4,0xf1,0x63
.byte 0xd7,0x31,0xdc,0xca, 0x42,0x63,0x85,0x10
.byte 0x13,0x97,0x22,0x40, 0x84,0xc6,0x11,0x20
.byte 0x85,0x4a,0x24,0x7d, 0xd2,0xbb,0x3d,0xf8
.byte 0xae,0xf9,0x32,0x11, 0xc7,0x29,0xa1,0x6d
.byte 0x1d,0x9e,0x2f,0x4b, 0xdc,0xb2,0x30,0xf3
.byte 0x0d,0x86,0x52,0xec, 0x77,0xc1,0xe3,0xd0
.byte 0x2b,0xb3,0x16,0x6c, 0xa9,0x70,0xb9,0x99
.byte 0x11,0x94,0x48,0xfa, 0x47,0xe9,0x64,0x22
.byte 0xa8,0xfc,0x8c,0xc4, 0xa0,0xf0,0x3f,0x1a
.byte 0x56,0x7d,0x2c,0xd8, 0x22,0x33,0x90,0xef
.byte 0x87,0x49,0x4e,0xc7, 0xd9,0x38,0xd1,0xc1
.byte 0x8c,0xca,0xa2,0xfe, 0x98,0xd4,0x0b,0x36
.byte 0xa6,0xf5,0x81,0xcf, 0xa5,0x7a,0xde,0x28
.byte 0xda,0xb7,0x8e,0x26, 0x3f,0xad,0xbf,0xa4
.byte 0x2c,0x3a,0x9d,0xe4, 0x50,0x78,0x92,0x0d
.byte 0x6a,0x5f,0xcc,0x9b, 0x54,0x7e,0x46,0x62
.byte 0xf6,0x8d,0x13,0xc2, 0x90,0xd8,0xb8,0xe8
.byte 0x2e,0x39,0xf7,0x5e, 0x82,0xc3,0xaf,0xf5
.byte 0x9f,0x5d,0x80,0xbe, 0x69,0xd0,0x93,0x7c
.byte 0x6f,0xd5,0x2d,0xa9, 0xcf,0x25,0x12,0xb3
.byte 0xc8,0xac,0x99,0x3b, 0x10,0x18,0x7d,0xa7
.byte 0xe8,0x9c,0x63,0x6e, 0xdb,0x3b,0xbb,0x7b
.byte 0xcd,0x26,0x78,0x09, 0x6e,0x59,0x18,0xf4
.byte 0xec,0x9a,0xb7,0x01, 0x83,0x4f,0x9a,0xa8
.byte 0xe6,0x95,0x6e,0x65, 0xaa,0xff,0xe6,0x7e
.byte 0x21,0xbc,0xcf,0x08, 0xef,0x15,0xe8,0xe6
.byte 0xba,0xe7,0x9b,0xd9, 0x4a,0x6f,0x36,0xce
.byte 0xea,0x9f,0x09,0xd4, 0x29,0xb0,0x7c,0xd6
.byte 0x31,0xa4,0xb2,0xaf, 0x2a,0x3f,0x23,0x31
.byte 0xc6,0xa5,0x94,0x30, 0x35,0xa2,0x66,0xc0
.byte 0x74,0x4e,0xbc,0x37, 0xfc,0x82,0xca,0xa6
.byte 0xe0,0x90,0xd0,0xb0, 0x33,0xa7,0xd8,0x15
.byte 0xf1,0x04,0x98,0x4a, 0x41,0xec,0xda,0xf7
.byte 0x7f,0xcd,0x50,0x0e, 0x17,0x91,0xf6,0x2f
.byte 0x76,0x4d,0xd6,0x8d, 0x43,0xef,0xb0,0x4d
.byte 0xcc,0xaa,0x4d,0x54, 0xe4,0x96,0x04,0xdf
.byte 0x9e,0xd1,0xb5,0xe3, 0x4c,0x6a,0x88,0x1b
.byte 0xc1,0x2c,0x1f,0xb8, 0x46,0x65,0x51,0x7f
.byte 0x9d,0x5e,0xea,0x04, 0x01,0x8c,0x35,0x5d
.byte 0xfa,0x87,0x74,0x73, 0xfb,0x0b,0x41,0x2e
.byte 0xb3,0x67,0x1d,0x5a, 0x92,0xdb,0xd2,0x52
.byte 0xe9,0x10,0x56,0x33, 0x6d,0xd6,0x47,0x13
.byte 0x9a,0xd7,0x61,0x8c, 0x37,0xa1,0x0c,0x7a
.byte 0x59,0xf8,0x14,0x8e, 0xeb,0x13,0x3c,0x89
.byte 0xce,0xa9,0x27,0xee, 0xb7,0x61,0xc9,0x35
.byte 0xe1,0x1c,0xe5,0xed, 0x7a,0x47,0xb1,0x3c
.byte 0x9c,0xd2,0xdf,0x59, 0x55,0xf2,0x73,0x3f
.byte 0x18,0x14,0xce,0x79, 0x73,0xc7,0x37,0xbf
.byte 0x53,0xf7,0xcd,0xea, 0x5f,0xfd,0xaa,0x5b
.byte 0xdf,0x3d,0x6f,0x14, 0x78,0x44,0xdb,0x86
.byte 0xca,0xaf,0xf3,0x81, 0xb9,0x68,0xc4,0x3e
.byte 0x38,0x24,0x34,0x2c, 0xc2,0xa3,0x40,0x5f
.byte 0x16,0x1d,0xc3,0x72, 0xbc,0xe2,0x25,0x0c
.byte 0x28,0x3c,0x49,0x8b, 0xff,0x0d,0x95,0x41
.byte 0x39,0xa8,0x01,0x71, 0x08,0x0c,0xb3,0xde
.byte 0xd8,0xb4,0xe4,0x9c, 0x64,0x56,0xc1,0x90
.byte 0x7b,0xcb,0x84,0x61, 0xd5,0x32,0xb6,0x70
.byte 0x48,0x6c,0x5c,0x74, 0xd0,0xb8,0x57,0x42
.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38 # Td4
.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87
.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d
.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2
.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16
.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda
.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a
.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02
.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea
.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85
.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89
.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20
.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31
.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d
.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0
.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26
.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
AES_Te4:
.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5 # Te4
.byte 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76
.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0
.byte 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0
.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc
.byte 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15
.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a
.byte 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75
.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0
.byte 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84
.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b
.byte 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf
.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85
.byte 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8
.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5
.byte 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2
.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17
.byte 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73
.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88
.byte 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb
.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c
.byte 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79
.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9
.byte 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08
.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6
.byte 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a
.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e
.byte 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e
.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94
.byte 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf
.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68
.byte 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
.byte 0x01,0x00,0x00,0x00, 0x02,0x00,0x00,0x00 # rcon
.byte 0x04,0x00,0x00,0x00, 0x08,0x00,0x00,0x00
.byte 0x10,0x00,0x00,0x00, 0x20,0x00,0x00,0x00
.byte 0x40,0x00,0x00,0x00, 0x80,0x00,0x00,0x00
.byte 0x1B,0x00,0x00,0x00, 0x36,0x00,0x00,0x00
|
wangyu-/udp2raw | 39,422 | lib/aes_acc/asm/mips.S | .text
#ifdef OPENSSL_FIPSCANISTER
# include <openssl/fipssyms.h>
#endif
#if defined(__mips_smartmips) && !defined(_MIPS_ARCH_MIPS32R2)
#define _MIPS_ARCH_MIPS32R2
#endif
#if !defined(__mips_eabi) && (!defined(__vxworks) || defined(__pic__))
.option pic2
#endif
.set noat
.align 5
.ent _mips_AES_encrypt
_mips_AES_encrypt:
.frame $29,0,$31
.set reorder
lw $12,0($6)
lw $13,4($6)
lw $14,8($6)
lw $15,12($6)
lw $30,240($6)
add $3,$6,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
sub $30,1
#if defined(__mips_smartmips)
ext $1,$9,8,8
.Loop_enc:
ext $2,$10,8,8
ext $24,$11,8,8
ext $25,$8,8,8
lwxs $12,$1($7) # Te1[s1>>16]
ext $1,$10,16,8
lwxs $13,$2($7) # Te1[s2>>16]
ext $2,$11,16,8
lwxs $14,$24($7) # Te1[s3>>16]
ext $24,$8,16,8
lwxs $15,$25($7) # Te1[s0>>16]
ext $25,$9,16,8
lwxs $16,$1($7) # Te2[s2>>8]
ext $1,$11,24,8
lwxs $17,$2($7) # Te2[s3>>8]
ext $2,$8,24,8
lwxs $18,$24($7) # Te2[s0>>8]
ext $24,$9,24,8
lwxs $19,$25($7) # Te2[s1>>8]
ext $25,$10,24,8
lwxs $20,$1($7) # Te3[s3]
ext $1,$8,0,8
lwxs $21,$2($7) # Te3[s0]
ext $2,$9,0,8
lwxs $22,$24($7) # Te3[s1]
ext $24,$10,0,8
lwxs $23,$25($7) # Te3[s2]
ext $25,$11,0,8
rotr $12,$12,24
rotr $13,$13,24
rotr $14,$14,24
rotr $15,$15,24
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
xor $12,$16
lwxs $16,$1($7) # Te0[s0>>24]
xor $13,$17
lwxs $17,$2($7) # Te0[s1>>24]
xor $14,$18
lwxs $18,$24($7) # Te0[s2>>24]
xor $15,$19
lwxs $19,$25($7) # Te0[s3>>24]
rotr $20,$20,8
lw $8,0($3)
rotr $21,$21,8
lw $9,4($3)
rotr $22,$22,8
lw $10,8($3)
rotr $23,$23,8
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_enc
ext $1,$9,8,8
srl $1,$9,6
#else
srl $1,$9,6
.Loop_enc:
srl $2,$10,6
srl $24,$11,6
srl $25,$8,6
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
lw $12,0($1) # Te1[s1>>16]
srl $1,$10,14
lw $13,0($2) # Te1[s2>>16]
srl $2,$11,14
lw $14,0($24) # Te1[s3>>16]
srl $24,$8,14
lw $15,0($25) # Te1[s0>>16]
srl $25,$9,14
#else
lwl $12,2($1) # Te1[s1>>16]
lwl $13,2($2) # Te1[s2>>16]
lwl $14,2($24) # Te1[s3>>16]
lwl $15,2($25) # Te1[s0>>16]
lwr $12,3($1) # Te1[s1>>16]
srl $1,$10,14
lwr $13,3($2) # Te1[s2>>16]
srl $2,$11,14
lwr $14,3($24) # Te1[s3>>16]
srl $24,$8,14
lwr $15,3($25) # Te1[s0>>16]
srl $25,$9,14
#endif
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $12,$12,24
rotr $13,$13,24
rotr $14,$14,24
rotr $15,$15,24
# if defined(_MIPSEL)
lw $16,0($1) # Te2[s2>>8]
srl $1,$11,22
lw $17,0($2) # Te2[s3>>8]
srl $2,$8,22
lw $18,0($24) # Te2[s0>>8]
srl $24,$9,22
lw $19,0($25) # Te2[s1>>8]
srl $25,$10,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lw $20,0($1) # Te3[s3]
ins $1,$8,2,8
lw $21,0($2) # Te3[s0]
ins $2,$9,2,8
lw $22,0($24) # Te3[s1]
ins $24,$10,2,8
lw $23,0($25) # Te3[s2]
ins $25,$11,2,8
# else
lw $16,0($1) # Te2[s2>>8]
ins $1,$11,2,8
lw $17,0($2) # Te2[s3>>8]
ins $2,$8,2,8
lw $18,0($24) # Te2[s0>>8]
ins $24,$9,2,8
lw $19,0($25) # Te2[s1>>8]
ins $25,$10,2,8
lw $20,0($1) # Te3[s3]
sll $1,$8,2
lw $21,0($2) # Te3[s0]
sll $2,$9,2
lw $22,0($24) # Te3[s1]
sll $24,$10,2
lw $23,0($25) # Te3[s2]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# endif
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
rotr $20,$20,8
rotr $21,$21,8
rotr $22,$22,8
rotr $23,$23,8
#else
lwl $16,1($1) # Te2[s2>>8]
lwl $17,1($2) # Te2[s3>>8]
lwl $18,1($24) # Te2[s0>>8]
lwl $19,1($25) # Te2[s1>>8]
lwr $16,2($1) # Te2[s2>>8]
srl $1,$11,22
lwr $17,2($2) # Te2[s3>>8]
srl $2,$8,22
lwr $18,2($24) # Te2[s0>>8]
srl $24,$9,22
lwr $19,2($25) # Te2[s1>>8]
srl $25,$10,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lwl $20,0($1) # Te3[s3]
lwl $21,0($2) # Te3[s0]
lwl $22,0($24) # Te3[s1]
lwl $23,0($25) # Te3[s2]
lwr $20,1($1) # Te3[s3]
sll $1,$8,2
lwr $21,1($2) # Te3[s0]
sll $2,$9,2
lwr $22,1($24) # Te3[s1]
sll $24,$10,2
lwr $23,1($25) # Te3[s2]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
xor $12,$16
lw $16,0($1) # Te0[s0>>24]
xor $13,$17
lw $17,0($2) # Te0[s1>>24]
xor $14,$18
lw $18,0($24) # Te0[s2>>24]
xor $15,$19
lw $19,0($25) # Te0[s3>>24]
xor $12,$20
lw $8,0($3)
xor $13,$21
lw $9,4($3)
xor $14,$22
lw $10,8($3)
xor $15,$23
lw $11,12($3)
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_enc
srl $1,$9,6
#endif
.set reorder
srl $2,$10,6
srl $24,$11,6
srl $25,$8,6
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $12,2($1) # Te4[s1>>16]
srl $1,$10,14
lbu $13,2($2) # Te4[s2>>16]
srl $2,$11,14
lbu $14,2($24) # Te4[s3>>16]
srl $24,$8,14
lbu $15,2($25) # Te4[s0>>16]
srl $25,$9,14
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
# if defined(_MIPSEL)
lbu $16,2($1) # Te4[s2>>8]
ins $1,$8,2,8
lbu $17,2($2) # Te4[s3>>8]
ins $2,$9,2,8
lbu $18,2($24) # Te4[s0>>8]
ins $24,$10,2,8
lbu $19,2($25) # Te4[s1>>8]
ins $25,$11,2,8
lbu $20,2($1) # Te4[s0>>24]
srl $1,$11,22
lbu $21,2($2) # Te4[s1>>24]
srl $2,$8,22
lbu $22,2($24) # Te4[s2>>24]
srl $24,$9,22
lbu $23,2($25) # Te4[s3>>24]
srl $25,$10,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# else
lbu $16,2($1) # Te4[s2>>8]
sll $1,$8,2
lbu $17,2($2) # Te4[s3>>8]
sll $2,$9,2
lbu $18,2($24) # Te4[s0>>8]
sll $24,$10,2
lbu $19,2($25) # Te4[s1>>8]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,2($1) # Te4[s0>>24]
ins $1,$11,2,8
lbu $21,2($2) # Te4[s1>>24]
ins $2,$8,2,8
lbu $22,2($24) # Te4[s2>>24]
ins $24,$9,2,8
lbu $23,2($25) # Te4[s3>>24]
ins $25,$10,2,8
# endif
sll $12,$12,8
sll $13,$13,8
sll $14,$14,8
sll $15,$15,8
ins $12,$16,16,8
lbu $16,2($1) # Te4[s3]
ins $13,$17,16,8
lbu $17,2($2) # Te4[s0]
ins $14,$18,16,8
lbu $18,2($24) # Te4[s1]
ins $15,$19,16,8
lbu $19,2($25) # Te4[s2]
ins $12,$20,0,8
lw $8,0($3)
ins $13,$21,0,8
lw $9,4($3)
ins $14,$22,0,8
lw $10,8($3)
ins $15,$23,0,8
lw $11,12($3)
ins $12,$16,24,8
ins $13,$17,24,8
ins $14,$18,24,8
ins $15,$19,24,8
#else
lbu $16,2($1) # Te4[s2>>8]
sll $1,$8,2
lbu $17,2($2) # Te4[s3>>8]
sll $2,$9,2
lbu $18,2($24) # Te4[s0>>8]
sll $24,$10,2
lbu $19,2($25) # Te4[s1>>8]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,2($1) # Te4[s0>>24]
srl $1,$11,22
lbu $21,2($2) # Te4[s1>>24]
srl $2,$8,22
lbu $22,2($24) # Te4[s2>>24]
srl $24,$9,22
lbu $23,2($25) # Te4[s3>>24]
srl $25,$10,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
sll $12,$12,8
sll $13,$13,8
sll $14,$14,8
sll $15,$15,8
sll $16,$16,16
sll $17,$17,16
sll $18,$18,16
sll $19,$19,16
xor $12,$16
lbu $16,2($1) # Te4[s3]
xor $13,$17
lbu $17,2($2) # Te4[s0]
xor $14,$18
lbu $18,2($24) # Te4[s1]
xor $15,$19
lbu $19,2($25) # Te4[s2]
#sll $20,$20,0
lw $8,0($3)
#sll $21,$21,0
lw $9,4($3)
#sll $22,$22,0
lw $10,8($3)
#sll $23,$23,0
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
sll $16,$16,24
sll $17,$17,24
sll $18,$18,24
sll $19,$19,24
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
#endif
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
jr $31
.end _mips_AES_encrypt
.align 5
.globl AES_encrypt
.ent AES_encrypt
AES_encrypt:
.frame $29,64,$31
.mask 0xc0ff0000,-4
.set noreorder
.cpload $25
sub $29,64
sw $31,64-1*4($29)
sw $30,64-2*4($29)
sw $23,64-3*4($29)
sw $22,64-4*4($29)
sw $21,64-5*4($29)
sw $20,64-6*4($29)
sw $19,64-7*4($29)
sw $18,64-8*4($29)
sw $17,64-9*4($29)
sw $16,64-10*4($29)
.set reorder
la $7,AES_Te # PIC-ified 'load address'
lwl $8,0+3($4)
lwl $9,4+3($4)
lwl $10,8+3($4)
lwl $11,12+3($4)
lwr $8,0+0($4)
lwr $9,4+0($4)
lwr $10,8+0($4)
lwr $11,12+0($4)
bal _mips_AES_encrypt
swr $8,0+0($5)
swr $9,4+0($5)
swr $10,8+0($5)
swr $11,12+0($5)
swl $8,0+3($5)
swl $9,4+3($5)
swl $10,8+3($5)
swl $11,12+3($5)
.set noreorder
lw $31,64-1*4($29)
lw $30,64-2*4($29)
lw $23,64-3*4($29)
lw $22,64-4*4($29)
lw $21,64-5*4($29)
lw $20,64-6*4($29)
lw $19,64-7*4($29)
lw $18,64-8*4($29)
lw $17,64-9*4($29)
lw $16,64-10*4($29)
jr $31
add $29,64
.end AES_encrypt
.align 5
.ent _mips_AES_decrypt
_mips_AES_decrypt:
.frame $29,0,$31
.set reorder
lw $12,0($6)
lw $13,4($6)
lw $14,8($6)
lw $15,12($6)
lw $30,240($6)
add $3,$6,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
sub $30,1
#if defined(__mips_smartmips)
ext $1,$11,8,8
.Loop_dec:
ext $2,$8,8,8
ext $24,$9,8,8
ext $25,$10,8,8
lwxs $12,$1($7) # Td1[s3>>16]
ext $1,$10,16,8
lwxs $13,$2($7) # Td1[s0>>16]
ext $2,$11,16,8
lwxs $14,$24($7) # Td1[s1>>16]
ext $24,$8,16,8
lwxs $15,$25($7) # Td1[s2>>16]
ext $25,$9,16,8
lwxs $16,$1($7) # Td2[s2>>8]
ext $1,$9,24,8
lwxs $17,$2($7) # Td2[s3>>8]
ext $2,$10,24,8
lwxs $18,$24($7) # Td2[s0>>8]
ext $24,$11,24,8
lwxs $19,$25($7) # Td2[s1>>8]
ext $25,$8,24,8
lwxs $20,$1($7) # Td3[s1]
ext $1,$8,0,8
lwxs $21,$2($7) # Td3[s2]
ext $2,$9,0,8
lwxs $22,$24($7) # Td3[s3]
ext $24,$10,0,8
lwxs $23,$25($7) # Td3[s0]
ext $25,$11,0,8
rotr $12,$12,24
rotr $13,$13,24
rotr $14,$14,24
rotr $15,$15,24
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
xor $12,$16
lwxs $16,$1($7) # Td0[s0>>24]
xor $13,$17
lwxs $17,$2($7) # Td0[s1>>24]
xor $14,$18
lwxs $18,$24($7) # Td0[s2>>24]
xor $15,$19
lwxs $19,$25($7) # Td0[s3>>24]
rotr $20,$20,8
lw $8,0($3)
rotr $21,$21,8
lw $9,4($3)
rotr $22,$22,8
lw $10,8($3)
rotr $23,$23,8
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_dec
ext $1,$11,8,8
srl $1,$11,6
#else
srl $1,$11,6
.Loop_dec:
srl $2,$8,6
srl $24,$9,6
srl $25,$10,6
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
lw $12,0($1) # Td1[s3>>16]
srl $1,$10,14
lw $13,0($2) # Td1[s0>>16]
srl $2,$11,14
lw $14,0($24) # Td1[s1>>16]
srl $24,$8,14
lw $15,0($25) # Td1[s2>>16]
srl $25,$9,14
#else
lwl $12,2($1) # Td1[s3>>16]
lwl $13,2($2) # Td1[s0>>16]
lwl $14,2($24) # Td1[s1>>16]
lwl $15,2($25) # Td1[s2>>16]
lwr $12,3($1) # Td1[s3>>16]
srl $1,$10,14
lwr $13,3($2) # Td1[s0>>16]
srl $2,$11,14
lwr $14,3($24) # Td1[s1>>16]
srl $24,$8,14
lwr $15,3($25) # Td1[s2>>16]
srl $25,$9,14
#endif
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $12,$12,24
rotr $13,$13,24
rotr $14,$14,24
rotr $15,$15,24
# if defined(_MIPSEL)
lw $16,0($1) # Td2[s2>>8]
srl $1,$9,22
lw $17,0($2) # Td2[s3>>8]
srl $2,$10,22
lw $18,0($24) # Td2[s0>>8]
srl $24,$11,22
lw $19,0($25) # Td2[s1>>8]
srl $25,$8,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lw $20,0($1) # Td3[s1]
ins $1,$8,2,8
lw $21,0($2) # Td3[s2]
ins $2,$9,2,8
lw $22,0($24) # Td3[s3]
ins $24,$10,2,8
lw $23,0($25) # Td3[s0]
ins $25,$11,2,8
#else
lw $16,0($1) # Td2[s2>>8]
ins $1,$9,2,8
lw $17,0($2) # Td2[s3>>8]
ins $2,$10,2,8
lw $18,0($24) # Td2[s0>>8]
ins $24,$11,2,8
lw $19,0($25) # Td2[s1>>8]
ins $25,$8,2,8
lw $20,0($1) # Td3[s1]
sll $1,$8,2
lw $21,0($2) # Td3[s2]
sll $2,$9,2
lw $22,0($24) # Td3[s3]
sll $24,$10,2
lw $23,0($25) # Td3[s0]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
rotr $16,$16,16
rotr $17,$17,16
rotr $18,$18,16
rotr $19,$19,16
rotr $20,$20,8
rotr $21,$21,8
rotr $22,$22,8
rotr $23,$23,8
#else
lwl $16,1($1) # Td2[s2>>8]
lwl $17,1($2) # Td2[s3>>8]
lwl $18,1($24) # Td2[s0>>8]
lwl $19,1($25) # Td2[s1>>8]
lwr $16,2($1) # Td2[s2>>8]
srl $1,$9,22
lwr $17,2($2) # Td2[s3>>8]
srl $2,$10,22
lwr $18,2($24) # Td2[s0>>8]
srl $24,$11,22
lwr $19,2($25) # Td2[s1>>8]
srl $25,$8,22
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lwl $20,0($1) # Td3[s1]
lwl $21,0($2) # Td3[s2]
lwl $22,0($24) # Td3[s3]
lwl $23,0($25) # Td3[s0]
lwr $20,1($1) # Td3[s1]
sll $1,$8,2
lwr $21,1($2) # Td3[s2]
sll $2,$9,2
lwr $22,1($24) # Td3[s3]
sll $24,$10,2
lwr $23,1($25) # Td3[s0]
sll $25,$11,2
and $1,0x3fc
and $2,0x3fc
and $24,0x3fc
and $25,0x3fc
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#endif
xor $12,$16
lw $16,0($1) # Td0[s0>>24]
xor $13,$17
lw $17,0($2) # Td0[s1>>24]
xor $14,$18
lw $18,0($24) # Td0[s2>>24]
xor $15,$19
lw $19,0($25) # Td0[s3>>24]
xor $12,$20
lw $8,0($3)
xor $13,$21
lw $9,4($3)
xor $14,$22
lw $10,8($3)
xor $15,$23
lw $11,12($3)
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
sub $30,1
add $3,16
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
.set noreorder
bnez $30,.Loop_dec
srl $1,$11,6
#endif
.set reorder
lw $16,1024($7) # prefetch Td4
srl $1,$11,8
lw $17,1024+32($7)
srl $2,$8,8
lw $18,1024+64($7)
srl $24,$9,8
lw $19,1024+96($7)
srl $25,$10,8
lw $20,1024+128($7)
and $1,0xff
lw $21,1024+160($7)
and $2,0xff
lw $22,1024+192($7)
and $24,0xff
lw $23,1024+224($7)
and $25,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $12,1024($1) # Td4[s3>>16]
srl $1,$10,16
lbu $13,1024($2) # Td4[s0>>16]
srl $2,$11,16
lbu $14,1024($24) # Td4[s1>>16]
srl $24,$8,16
lbu $15,1024($25) # Td4[s2>>16]
srl $25,$9,16
and $1,0xff
and $2,0xff
and $24,0xff
and $25,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
# if defined(_MIPSEL)
lbu $16,1024($1) # Td4[s2>>8]
ins $1,$8,0,8
lbu $17,1024($2) # Td4[s3>>8]
ins $2,$9,0,8
lbu $18,1024($24) # Td4[s0>>8]
ins $24,$10,0,8
lbu $19,1024($25) # Td4[s1>>8]
ins $25,$11,0,8
lbu $20,1024($1) # Td4[s0>>24]
srl $1,$9,24
lbu $21,1024($2) # Td4[s1>>24]
srl $2,$10,24
lbu $22,1024($24) # Td4[s2>>24]
srl $24,$11,24
lbu $23,1024($25) # Td4[s3>>24]
srl $25,$8,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
# else
lbu $16,1024($1) # Td4[s2>>8]
and $1,$8,0xff
lbu $17,1024($2) # Td4[s3>>8]
and $2,$9,0xff
lbu $18,1024($24) # Td4[s0>>8]
and $24,$10,0xff
lbu $19,1024($25) # Td4[s1>>8]
and $25,$11,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,1024($1) # Td4[s0>>24]
ins $1,$9,0,8
lbu $21,1024($2) # Td4[s1>>24]
ins $2,$10,0,8
lbu $22,1024($24) # Td4[s2>>24]
ins $24,$11,0,8
lbu $23,1024($25) # Td4[s3>>24]
ins $25,$8,0,8
# endif
sll $12,$12,8
sll $13,$13,8
sll $14,$14,8
sll $15,$15,8
ins $12,$16,16,8
lbu $16,1024($1) # Td4[s1]
ins $13,$17,16,8
lbu $17,1024($2) # Td4[s2]
ins $14,$18,16,8
lbu $18,1024($24) # Td4[s3]
ins $15,$19,16,8
lbu $19,1024($25) # Td4[s0]
ins $12,$20,0,8
lw $8,0($3)
ins $13,$21,0,8
lw $9,4($3)
ins $14,$22,0,8
lw $10,8($3)
ins $15,$23,0,8
lw $11,12($3)
ins $12,$16,24,8
ins $13,$17,24,8
ins $14,$18,24,8
ins $15,$19,24,8
#else
lbu $16,1024($1) # Td4[s2>>8]
and $1,$8,0xff
lbu $17,1024($2) # Td4[s3>>8]
and $2,$9,0xff
lbu $18,1024($24) # Td4[s0>>8]
and $24,$10,0xff
lbu $19,1024($25) # Td4[s1>>8]
and $25,$11,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $20,1024($1) # Td4[s0>>24]
srl $1,$9,24
lbu $21,1024($2) # Td4[s1>>24]
srl $2,$10,24
lbu $22,1024($24) # Td4[s2>>24]
srl $24,$11,24
lbu $23,1024($25) # Td4[s3>>24]
srl $25,$8,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
sll $12,$12,8
sll $13,$13,8
sll $14,$14,8
sll $15,$15,8
sll $16,$16,16
sll $17,$17,16
sll $18,$18,16
sll $19,$19,16
xor $12,$16
lbu $16,1024($1) # Td4[s1]
xor $13,$17
lbu $17,1024($2) # Td4[s2]
xor $14,$18
lbu $18,1024($24) # Td4[s3]
xor $15,$19
lbu $19,1024($25) # Td4[s0]
#sll $20,$20,0
lw $8,0($3)
#sll $21,$21,0
lw $9,4($3)
#sll $22,$22,0
lw $10,8($3)
#sll $23,$23,0
lw $11,12($3)
xor $12,$20
xor $13,$21
xor $14,$22
xor $15,$23
sll $16,$16,24
sll $17,$17,24
sll $18,$18,24
sll $19,$19,24
xor $12,$16
xor $13,$17
xor $14,$18
xor $15,$19
#endif
xor $8,$12
xor $9,$13
xor $10,$14
xor $11,$15
jr $31
.end _mips_AES_decrypt
.align 5
.globl AES_decrypt
.ent AES_decrypt
AES_decrypt:
.frame $29,64,$31
.mask 0xc0ff0000,-4
.set noreorder
.cpload $25
sub $29,64
sw $31,64-1*4($29)
sw $30,64-2*4($29)
sw $23,64-3*4($29)
sw $22,64-4*4($29)
sw $21,64-5*4($29)
sw $20,64-6*4($29)
sw $19,64-7*4($29)
sw $18,64-8*4($29)
sw $17,64-9*4($29)
sw $16,64-10*4($29)
.set reorder
la $7,AES_Td # PIC-ified 'load address'
lwl $8,0+3($4)
lwl $9,4+3($4)
lwl $10,8+3($4)
lwl $11,12+3($4)
lwr $8,0+0($4)
lwr $9,4+0($4)
lwr $10,8+0($4)
lwr $11,12+0($4)
bal _mips_AES_decrypt
swr $8,0+0($5)
swr $9,4+0($5)
swr $10,8+0($5)
swr $11,12+0($5)
swl $8,0+3($5)
swl $9,4+3($5)
swl $10,8+3($5)
swl $11,12+3($5)
.set noreorder
lw $31,64-1*4($29)
lw $30,64-2*4($29)
lw $23,64-3*4($29)
lw $22,64-4*4($29)
lw $21,64-5*4($29)
lw $20,64-6*4($29)
lw $19,64-7*4($29)
lw $18,64-8*4($29)
lw $17,64-9*4($29)
lw $16,64-10*4($29)
jr $31
add $29,64
.end AES_decrypt
.align 5
.ent _mips_AES_set_encrypt_key
_mips_AES_set_encrypt_key:
.frame $29,0,$31
.set noreorder
beqz $4,.Lekey_done
li $2,-1
beqz $6,.Lekey_done
add $3,$7,256
.set reorder
lwl $8,0+3($4) # load 128 bits
lwl $9,4+3($4)
lwl $10,8+3($4)
lwl $11,12+3($4)
li $1,128
lwr $8,0+0($4)
lwr $9,4+0($4)
lwr $10,8+0($4)
lwr $11,12+0($4)
.set noreorder
beq $5,$1,.L128bits
li $30,10
.set reorder
lwl $12,16+3($4) # load 192 bits
lwl $13,20+3($4)
li $1,192
lwr $12,16+0($4)
lwr $13,20+0($4)
.set noreorder
beq $5,$1,.L192bits
li $30,8
.set reorder
lwl $14,24+3($4) # load 256 bits
lwl $15,28+3($4)
li $1,256
lwr $14,24+0($4)
lwr $15,28+0($4)
.set noreorder
beq $5,$1,.L256bits
li $30,7
b .Lekey_done
li $2,-2
.align 4
.L128bits:
.set reorder
srl $1,$11,16
srl $2,$11,8
and $1,0xff
and $2,0xff
and $24,$11,0xff
srl $25,$11,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sub $30,1
add $6,16
sll $1,$1,8
#sll $2,$2,0
sll $24,$24,24
sll $25,$25,16
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
.set noreorder
bnez $30,.L128bits
add $3,4
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
li $30,10
sw $11,12($6)
li $2,0
sw $30,80($6)
b .Lekey_done
sub $6,10*16
.align 4
.L192bits:
.set reorder
srl $1,$13,16
srl $2,$13,8
and $1,0xff
and $2,0xff
and $24,$13,0xff
srl $25,$13,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sw $12,16($6)
sw $13,20($6)
sub $30,1
add $6,24
sll $1,$1,8
#sll $2,$2,0
sll $24,$24,24
sll $25,$25,16
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
xor $12,$11
xor $13,$12
.set noreorder
bnez $30,.L192bits
add $3,4
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
li $30,12
sw $11,12($6)
li $2,0
sw $30,48($6)
b .Lekey_done
sub $6,12*16
.align 4
.L256bits:
.set reorder
srl $1,$15,16
srl $2,$15,8
and $1,0xff
and $2,0xff
and $24,$15,0xff
srl $25,$15,24
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sw $8,0($6)
sw $9,4($6)
sw $10,8($6)
sw $11,12($6)
sw $12,16($6)
sw $13,20($6)
sw $14,24($6)
sw $15,28($6)
sub $30,1
sll $1,$1,8
#sll $2,$2,0
sll $24,$24,24
sll $25,$25,16
xor $8,$1
lw $1,0($3)
xor $8,$2
xor $8,$24
xor $8,$25
xor $8,$1
xor $9,$8
xor $10,$9
xor $11,$10
beqz $30,.L256bits_done
srl $1,$11,24
srl $2,$11,16
srl $24,$11,8
and $25,$11,0xff
and $2,0xff
and $24,0xff
add $1,$7
add $2,$7
add $24,$7
add $25,$7
lbu $1,0($1)
lbu $2,0($2)
lbu $24,0($24)
lbu $25,0($25)
sll $1,24
sll $2,16
sll $24,8
xor $12,$1
xor $12,$2
xor $12,$24
xor $12,$25
xor $13,$12
xor $14,$13
xor $15,$14
add $6,32
.set noreorder
b .L256bits
add $3,4
.L256bits_done:
sw $8,32($6)
sw $9,36($6)
sw $10,40($6)
li $30,14
sw $11,44($6)
li $2,0
sw $30,48($6)
sub $6,12*16
.Lekey_done:
jr $31
nop
.end _mips_AES_set_encrypt_key
.globl AES_set_encrypt_key
.ent AES_set_encrypt_key
AES_set_encrypt_key:
.frame $29,32,$31
.mask 0xc0000000,-4
.set noreorder
.cpload $25
sub $29,32
sw $31,32-1*4($29)
sw $30,32-2*4($29)
.set reorder
la $7,AES_Te4 # PIC-ified 'load address'
bal _mips_AES_set_encrypt_key
.set noreorder
move $4,$2
lw $31,32-1*4($29)
lw $30,32-2*4($29)
jr $31
add $29,32
.end AES_set_encrypt_key
.align 5
.globl AES_set_decrypt_key
.ent AES_set_decrypt_key
AES_set_decrypt_key:
.frame $29,32,$31
.mask 0xc0000000,-4
.set noreorder
.cpload $25
sub $29,32
sw $31,32-1*4($29)
sw $30,32-2*4($29)
.set reorder
la $7,AES_Te4 # PIC-ified 'load address'
bal _mips_AES_set_encrypt_key
bltz $2,.Ldkey_done
sll $1,$30,4
add $4,$6,0
add $5,$6,$1
.align 4
.Lswap:
lw $8,0($4)
lw $9,4($4)
lw $10,8($4)
lw $11,12($4)
lw $12,0($5)
lw $13,4($5)
lw $14,8($5)
lw $15,12($5)
sw $8,0($5)
sw $9,4($5)
sw $10,8($5)
sw $11,12($5)
add $4,16
sub $5,16
sw $12,-16($4)
sw $13,-12($4)
sw $14,-8($4)
sw $15,-4($4)
bne $4,$5,.Lswap
lw $8,16($6) # modulo-scheduled
lui $2,0x8080
sub $30,1
or $2,0x8080
sll $30,2
add $6,16
lui $25,0x1b1b
nor $24,$0,$2
or $25,0x1b1b
.align 4
.Lmix:
and $1,$8,$2
and $9,$8,$24
srl $10,$1,7
addu $9,$9 # tp2<<1
subu $1,$10
and $1,$25
xor $9,$1
and $1,$9,$2
and $10,$9,$24
srl $11,$1,7
addu $10,$10 # tp4<<1
subu $1,$11
and $1,$25
xor $10,$1
and $1,$10,$2
and $11,$10,$24
srl $12,$1,7
addu $11,$11 # tp8<<1
subu $1,$12
and $1,$25
xor $11,$1
xor $12,$11,$8
xor $15,$11,$10
xor $13,$12,$9
xor $14,$12,$10
#if defined(_MIPS_ARCH_MIPS32R2) || defined(_MIPS_ARCH_MIPS64R2)
rotr $8,$14,16
xor $15,$9
rotr $9,$12,24
xor $15,$8
rotr $10,$13,8
xor $15,$9
lw $8,4($6) # modulo-scheduled
xor $15,$10
#else
sll $8,$14,16
xor $15,$9
srl $9,$14,16
xor $15,$8
sll $8,$12,8
xor $15,$9
srl $9,$12,24
xor $15,$8
sll $8,$13,24
xor $15,$9
srl $9,$13,8
xor $15,$8
lw $8,4($6) # modulo-scheduled
xor $15,$9
#endif
sub $30,1
sw $15,0($6)
add $6,4
bnez $30,.Lmix
li $2,0
.Ldkey_done:
.set noreorder
move $4,$2
lw $31,32-1*4($29)
lw $30,32-2*4($29)
jr $31
add $29,32
.end AES_set_decrypt_key
.rdata
.align 10
AES_Te:
.byte 0xc6,0x63,0x63,0xa5, 0xf8,0x7c,0x7c,0x84 # Te0
.byte 0xee,0x77,0x77,0x99, 0xf6,0x7b,0x7b,0x8d
.byte 0xff,0xf2,0xf2,0x0d, 0xd6,0x6b,0x6b,0xbd
.byte 0xde,0x6f,0x6f,0xb1, 0x91,0xc5,0xc5,0x54
.byte 0x60,0x30,0x30,0x50, 0x02,0x01,0x01,0x03
.byte 0xce,0x67,0x67,0xa9, 0x56,0x2b,0x2b,0x7d
.byte 0xe7,0xfe,0xfe,0x19, 0xb5,0xd7,0xd7,0x62
.byte 0x4d,0xab,0xab,0xe6, 0xec,0x76,0x76,0x9a
.byte 0x8f,0xca,0xca,0x45, 0x1f,0x82,0x82,0x9d
.byte 0x89,0xc9,0xc9,0x40, 0xfa,0x7d,0x7d,0x87
.byte 0xef,0xfa,0xfa,0x15, 0xb2,0x59,0x59,0xeb
.byte 0x8e,0x47,0x47,0xc9, 0xfb,0xf0,0xf0,0x0b
.byte 0x41,0xad,0xad,0xec, 0xb3,0xd4,0xd4,0x67
.byte 0x5f,0xa2,0xa2,0xfd, 0x45,0xaf,0xaf,0xea
.byte 0x23,0x9c,0x9c,0xbf, 0x53,0xa4,0xa4,0xf7
.byte 0xe4,0x72,0x72,0x96, 0x9b,0xc0,0xc0,0x5b
.byte 0x75,0xb7,0xb7,0xc2, 0xe1,0xfd,0xfd,0x1c
.byte 0x3d,0x93,0x93,0xae, 0x4c,0x26,0x26,0x6a
.byte 0x6c,0x36,0x36,0x5a, 0x7e,0x3f,0x3f,0x41
.byte 0xf5,0xf7,0xf7,0x02, 0x83,0xcc,0xcc,0x4f
.byte 0x68,0x34,0x34,0x5c, 0x51,0xa5,0xa5,0xf4
.byte 0xd1,0xe5,0xe5,0x34, 0xf9,0xf1,0xf1,0x08
.byte 0xe2,0x71,0x71,0x93, 0xab,0xd8,0xd8,0x73
.byte 0x62,0x31,0x31,0x53, 0x2a,0x15,0x15,0x3f
.byte 0x08,0x04,0x04,0x0c, 0x95,0xc7,0xc7,0x52
.byte 0x46,0x23,0x23,0x65, 0x9d,0xc3,0xc3,0x5e
.byte 0x30,0x18,0x18,0x28, 0x37,0x96,0x96,0xa1
.byte 0x0a,0x05,0x05,0x0f, 0x2f,0x9a,0x9a,0xb5
.byte 0x0e,0x07,0x07,0x09, 0x24,0x12,0x12,0x36
.byte 0x1b,0x80,0x80,0x9b, 0xdf,0xe2,0xe2,0x3d
.byte 0xcd,0xeb,0xeb,0x26, 0x4e,0x27,0x27,0x69
.byte 0x7f,0xb2,0xb2,0xcd, 0xea,0x75,0x75,0x9f
.byte 0x12,0x09,0x09,0x1b, 0x1d,0x83,0x83,0x9e
.byte 0x58,0x2c,0x2c,0x74, 0x34,0x1a,0x1a,0x2e
.byte 0x36,0x1b,0x1b,0x2d, 0xdc,0x6e,0x6e,0xb2
.byte 0xb4,0x5a,0x5a,0xee, 0x5b,0xa0,0xa0,0xfb
.byte 0xa4,0x52,0x52,0xf6, 0x76,0x3b,0x3b,0x4d
.byte 0xb7,0xd6,0xd6,0x61, 0x7d,0xb3,0xb3,0xce
.byte 0x52,0x29,0x29,0x7b, 0xdd,0xe3,0xe3,0x3e
.byte 0x5e,0x2f,0x2f,0x71, 0x13,0x84,0x84,0x97
.byte 0xa6,0x53,0x53,0xf5, 0xb9,0xd1,0xd1,0x68
.byte 0x00,0x00,0x00,0x00, 0xc1,0xed,0xed,0x2c
.byte 0x40,0x20,0x20,0x60, 0xe3,0xfc,0xfc,0x1f
.byte 0x79,0xb1,0xb1,0xc8, 0xb6,0x5b,0x5b,0xed
.byte 0xd4,0x6a,0x6a,0xbe, 0x8d,0xcb,0xcb,0x46
.byte 0x67,0xbe,0xbe,0xd9, 0x72,0x39,0x39,0x4b
.byte 0x94,0x4a,0x4a,0xde, 0x98,0x4c,0x4c,0xd4
.byte 0xb0,0x58,0x58,0xe8, 0x85,0xcf,0xcf,0x4a
.byte 0xbb,0xd0,0xd0,0x6b, 0xc5,0xef,0xef,0x2a
.byte 0x4f,0xaa,0xaa,0xe5, 0xed,0xfb,0xfb,0x16
.byte 0x86,0x43,0x43,0xc5, 0x9a,0x4d,0x4d,0xd7
.byte 0x66,0x33,0x33,0x55, 0x11,0x85,0x85,0x94
.byte 0x8a,0x45,0x45,0xcf, 0xe9,0xf9,0xf9,0x10
.byte 0x04,0x02,0x02,0x06, 0xfe,0x7f,0x7f,0x81
.byte 0xa0,0x50,0x50,0xf0, 0x78,0x3c,0x3c,0x44
.byte 0x25,0x9f,0x9f,0xba, 0x4b,0xa8,0xa8,0xe3
.byte 0xa2,0x51,0x51,0xf3, 0x5d,0xa3,0xa3,0xfe
.byte 0x80,0x40,0x40,0xc0, 0x05,0x8f,0x8f,0x8a
.byte 0x3f,0x92,0x92,0xad, 0x21,0x9d,0x9d,0xbc
.byte 0x70,0x38,0x38,0x48, 0xf1,0xf5,0xf5,0x04
.byte 0x63,0xbc,0xbc,0xdf, 0x77,0xb6,0xb6,0xc1
.byte 0xaf,0xda,0xda,0x75, 0x42,0x21,0x21,0x63
.byte 0x20,0x10,0x10,0x30, 0xe5,0xff,0xff,0x1a
.byte 0xfd,0xf3,0xf3,0x0e, 0xbf,0xd2,0xd2,0x6d
.byte 0x81,0xcd,0xcd,0x4c, 0x18,0x0c,0x0c,0x14
.byte 0x26,0x13,0x13,0x35, 0xc3,0xec,0xec,0x2f
.byte 0xbe,0x5f,0x5f,0xe1, 0x35,0x97,0x97,0xa2
.byte 0x88,0x44,0x44,0xcc, 0x2e,0x17,0x17,0x39
.byte 0x93,0xc4,0xc4,0x57, 0x55,0xa7,0xa7,0xf2
.byte 0xfc,0x7e,0x7e,0x82, 0x7a,0x3d,0x3d,0x47
.byte 0xc8,0x64,0x64,0xac, 0xba,0x5d,0x5d,0xe7
.byte 0x32,0x19,0x19,0x2b, 0xe6,0x73,0x73,0x95
.byte 0xc0,0x60,0x60,0xa0, 0x19,0x81,0x81,0x98
.byte 0x9e,0x4f,0x4f,0xd1, 0xa3,0xdc,0xdc,0x7f
.byte 0x44,0x22,0x22,0x66, 0x54,0x2a,0x2a,0x7e
.byte 0x3b,0x90,0x90,0xab, 0x0b,0x88,0x88,0x83
.byte 0x8c,0x46,0x46,0xca, 0xc7,0xee,0xee,0x29
.byte 0x6b,0xb8,0xb8,0xd3, 0x28,0x14,0x14,0x3c
.byte 0xa7,0xde,0xde,0x79, 0xbc,0x5e,0x5e,0xe2
.byte 0x16,0x0b,0x0b,0x1d, 0xad,0xdb,0xdb,0x76
.byte 0xdb,0xe0,0xe0,0x3b, 0x64,0x32,0x32,0x56
.byte 0x74,0x3a,0x3a,0x4e, 0x14,0x0a,0x0a,0x1e
.byte 0x92,0x49,0x49,0xdb, 0x0c,0x06,0x06,0x0a
.byte 0x48,0x24,0x24,0x6c, 0xb8,0x5c,0x5c,0xe4
.byte 0x9f,0xc2,0xc2,0x5d, 0xbd,0xd3,0xd3,0x6e
.byte 0x43,0xac,0xac,0xef, 0xc4,0x62,0x62,0xa6
.byte 0x39,0x91,0x91,0xa8, 0x31,0x95,0x95,0xa4
.byte 0xd3,0xe4,0xe4,0x37, 0xf2,0x79,0x79,0x8b
.byte 0xd5,0xe7,0xe7,0x32, 0x8b,0xc8,0xc8,0x43
.byte 0x6e,0x37,0x37,0x59, 0xda,0x6d,0x6d,0xb7
.byte 0x01,0x8d,0x8d,0x8c, 0xb1,0xd5,0xd5,0x64
.byte 0x9c,0x4e,0x4e,0xd2, 0x49,0xa9,0xa9,0xe0
.byte 0xd8,0x6c,0x6c,0xb4, 0xac,0x56,0x56,0xfa
.byte 0xf3,0xf4,0xf4,0x07, 0xcf,0xea,0xea,0x25
.byte 0xca,0x65,0x65,0xaf, 0xf4,0x7a,0x7a,0x8e
.byte 0x47,0xae,0xae,0xe9, 0x10,0x08,0x08,0x18
.byte 0x6f,0xba,0xba,0xd5, 0xf0,0x78,0x78,0x88
.byte 0x4a,0x25,0x25,0x6f, 0x5c,0x2e,0x2e,0x72
.byte 0x38,0x1c,0x1c,0x24, 0x57,0xa6,0xa6,0xf1
.byte 0x73,0xb4,0xb4,0xc7, 0x97,0xc6,0xc6,0x51
.byte 0xcb,0xe8,0xe8,0x23, 0xa1,0xdd,0xdd,0x7c
.byte 0xe8,0x74,0x74,0x9c, 0x3e,0x1f,0x1f,0x21
.byte 0x96,0x4b,0x4b,0xdd, 0x61,0xbd,0xbd,0xdc
.byte 0x0d,0x8b,0x8b,0x86, 0x0f,0x8a,0x8a,0x85
.byte 0xe0,0x70,0x70,0x90, 0x7c,0x3e,0x3e,0x42
.byte 0x71,0xb5,0xb5,0xc4, 0xcc,0x66,0x66,0xaa
.byte 0x90,0x48,0x48,0xd8, 0x06,0x03,0x03,0x05
.byte 0xf7,0xf6,0xf6,0x01, 0x1c,0x0e,0x0e,0x12
.byte 0xc2,0x61,0x61,0xa3, 0x6a,0x35,0x35,0x5f
.byte 0xae,0x57,0x57,0xf9, 0x69,0xb9,0xb9,0xd0
.byte 0x17,0x86,0x86,0x91, 0x99,0xc1,0xc1,0x58
.byte 0x3a,0x1d,0x1d,0x27, 0x27,0x9e,0x9e,0xb9
.byte 0xd9,0xe1,0xe1,0x38, 0xeb,0xf8,0xf8,0x13
.byte 0x2b,0x98,0x98,0xb3, 0x22,0x11,0x11,0x33
.byte 0xd2,0x69,0x69,0xbb, 0xa9,0xd9,0xd9,0x70
.byte 0x07,0x8e,0x8e,0x89, 0x33,0x94,0x94,0xa7
.byte 0x2d,0x9b,0x9b,0xb6, 0x3c,0x1e,0x1e,0x22
.byte 0x15,0x87,0x87,0x92, 0xc9,0xe9,0xe9,0x20
.byte 0x87,0xce,0xce,0x49, 0xaa,0x55,0x55,0xff
.byte 0x50,0x28,0x28,0x78, 0xa5,0xdf,0xdf,0x7a
.byte 0x03,0x8c,0x8c,0x8f, 0x59,0xa1,0xa1,0xf8
.byte 0x09,0x89,0x89,0x80, 0x1a,0x0d,0x0d,0x17
.byte 0x65,0xbf,0xbf,0xda, 0xd7,0xe6,0xe6,0x31
.byte 0x84,0x42,0x42,0xc6, 0xd0,0x68,0x68,0xb8
.byte 0x82,0x41,0x41,0xc3, 0x29,0x99,0x99,0xb0
.byte 0x5a,0x2d,0x2d,0x77, 0x1e,0x0f,0x0f,0x11
.byte 0x7b,0xb0,0xb0,0xcb, 0xa8,0x54,0x54,0xfc
.byte 0x6d,0xbb,0xbb,0xd6, 0x2c,0x16,0x16,0x3a
AES_Td:
.byte 0x51,0xf4,0xa7,0x50, 0x7e,0x41,0x65,0x53 # Td0
.byte 0x1a,0x17,0xa4,0xc3, 0x3a,0x27,0x5e,0x96
.byte 0x3b,0xab,0x6b,0xcb, 0x1f,0x9d,0x45,0xf1
.byte 0xac,0xfa,0x58,0xab, 0x4b,0xe3,0x03,0x93
.byte 0x20,0x30,0xfa,0x55, 0xad,0x76,0x6d,0xf6
.byte 0x88,0xcc,0x76,0x91, 0xf5,0x02,0x4c,0x25
.byte 0x4f,0xe5,0xd7,0xfc, 0xc5,0x2a,0xcb,0xd7
.byte 0x26,0x35,0x44,0x80, 0xb5,0x62,0xa3,0x8f
.byte 0xde,0xb1,0x5a,0x49, 0x25,0xba,0x1b,0x67
.byte 0x45,0xea,0x0e,0x98, 0x5d,0xfe,0xc0,0xe1
.byte 0xc3,0x2f,0x75,0x02, 0x81,0x4c,0xf0,0x12
.byte 0x8d,0x46,0x97,0xa3, 0x6b,0xd3,0xf9,0xc6
.byte 0x03,0x8f,0x5f,0xe7, 0x15,0x92,0x9c,0x95
.byte 0xbf,0x6d,0x7a,0xeb, 0x95,0x52,0x59,0xda
.byte 0xd4,0xbe,0x83,0x2d, 0x58,0x74,0x21,0xd3
.byte 0x49,0xe0,0x69,0x29, 0x8e,0xc9,0xc8,0x44
.byte 0x75,0xc2,0x89,0x6a, 0xf4,0x8e,0x79,0x78
.byte 0x99,0x58,0x3e,0x6b, 0x27,0xb9,0x71,0xdd
.byte 0xbe,0xe1,0x4f,0xb6, 0xf0,0x88,0xad,0x17
.byte 0xc9,0x20,0xac,0x66, 0x7d,0xce,0x3a,0xb4
.byte 0x63,0xdf,0x4a,0x18, 0xe5,0x1a,0x31,0x82
.byte 0x97,0x51,0x33,0x60, 0x62,0x53,0x7f,0x45
.byte 0xb1,0x64,0x77,0xe0, 0xbb,0x6b,0xae,0x84
.byte 0xfe,0x81,0xa0,0x1c, 0xf9,0x08,0x2b,0x94
.byte 0x70,0x48,0x68,0x58, 0x8f,0x45,0xfd,0x19
.byte 0x94,0xde,0x6c,0x87, 0x52,0x7b,0xf8,0xb7
.byte 0xab,0x73,0xd3,0x23, 0x72,0x4b,0x02,0xe2
.byte 0xe3,0x1f,0x8f,0x57, 0x66,0x55,0xab,0x2a
.byte 0xb2,0xeb,0x28,0x07, 0x2f,0xb5,0xc2,0x03
.byte 0x86,0xc5,0x7b,0x9a, 0xd3,0x37,0x08,0xa5
.byte 0x30,0x28,0x87,0xf2, 0x23,0xbf,0xa5,0xb2
.byte 0x02,0x03,0x6a,0xba, 0xed,0x16,0x82,0x5c
.byte 0x8a,0xcf,0x1c,0x2b, 0xa7,0x79,0xb4,0x92
.byte 0xf3,0x07,0xf2,0xf0, 0x4e,0x69,0xe2,0xa1
.byte 0x65,0xda,0xf4,0xcd, 0x06,0x05,0xbe,0xd5
.byte 0xd1,0x34,0x62,0x1f, 0xc4,0xa6,0xfe,0x8a
.byte 0x34,0x2e,0x53,0x9d, 0xa2,0xf3,0x55,0xa0
.byte 0x05,0x8a,0xe1,0x32, 0xa4,0xf6,0xeb,0x75
.byte 0x0b,0x83,0xec,0x39, 0x40,0x60,0xef,0xaa
.byte 0x5e,0x71,0x9f,0x06, 0xbd,0x6e,0x10,0x51
.byte 0x3e,0x21,0x8a,0xf9, 0x96,0xdd,0x06,0x3d
.byte 0xdd,0x3e,0x05,0xae, 0x4d,0xe6,0xbd,0x46
.byte 0x91,0x54,0x8d,0xb5, 0x71,0xc4,0x5d,0x05
.byte 0x04,0x06,0xd4,0x6f, 0x60,0x50,0x15,0xff
.byte 0x19,0x98,0xfb,0x24, 0xd6,0xbd,0xe9,0x97
.byte 0x89,0x40,0x43,0xcc, 0x67,0xd9,0x9e,0x77
.byte 0xb0,0xe8,0x42,0xbd, 0x07,0x89,0x8b,0x88
.byte 0xe7,0x19,0x5b,0x38, 0x79,0xc8,0xee,0xdb
.byte 0xa1,0x7c,0x0a,0x47, 0x7c,0x42,0x0f,0xe9
.byte 0xf8,0x84,0x1e,0xc9, 0x00,0x00,0x00,0x00
.byte 0x09,0x80,0x86,0x83, 0x32,0x2b,0xed,0x48
.byte 0x1e,0x11,0x70,0xac, 0x6c,0x5a,0x72,0x4e
.byte 0xfd,0x0e,0xff,0xfb, 0x0f,0x85,0x38,0x56
.byte 0x3d,0xae,0xd5,0x1e, 0x36,0x2d,0x39,0x27
.byte 0x0a,0x0f,0xd9,0x64, 0x68,0x5c,0xa6,0x21
.byte 0x9b,0x5b,0x54,0xd1, 0x24,0x36,0x2e,0x3a
.byte 0x0c,0x0a,0x67,0xb1, 0x93,0x57,0xe7,0x0f
.byte 0xb4,0xee,0x96,0xd2, 0x1b,0x9b,0x91,0x9e
.byte 0x80,0xc0,0xc5,0x4f, 0x61,0xdc,0x20,0xa2
.byte 0x5a,0x77,0x4b,0x69, 0x1c,0x12,0x1a,0x16
.byte 0xe2,0x93,0xba,0x0a, 0xc0,0xa0,0x2a,0xe5
.byte 0x3c,0x22,0xe0,0x43, 0x12,0x1b,0x17,0x1d
.byte 0x0e,0x09,0x0d,0x0b, 0xf2,0x8b,0xc7,0xad
.byte 0x2d,0xb6,0xa8,0xb9, 0x14,0x1e,0xa9,0xc8
.byte 0x57,0xf1,0x19,0x85, 0xaf,0x75,0x07,0x4c
.byte 0xee,0x99,0xdd,0xbb, 0xa3,0x7f,0x60,0xfd
.byte 0xf7,0x01,0x26,0x9f, 0x5c,0x72,0xf5,0xbc
.byte 0x44,0x66,0x3b,0xc5, 0x5b,0xfb,0x7e,0x34
.byte 0x8b,0x43,0x29,0x76, 0xcb,0x23,0xc6,0xdc
.byte 0xb6,0xed,0xfc,0x68, 0xb8,0xe4,0xf1,0x63
.byte 0xd7,0x31,0xdc,0xca, 0x42,0x63,0x85,0x10
.byte 0x13,0x97,0x22,0x40, 0x84,0xc6,0x11,0x20
.byte 0x85,0x4a,0x24,0x7d, 0xd2,0xbb,0x3d,0xf8
.byte 0xae,0xf9,0x32,0x11, 0xc7,0x29,0xa1,0x6d
.byte 0x1d,0x9e,0x2f,0x4b, 0xdc,0xb2,0x30,0xf3
.byte 0x0d,0x86,0x52,0xec, 0x77,0xc1,0xe3,0xd0
.byte 0x2b,0xb3,0x16,0x6c, 0xa9,0x70,0xb9,0x99
.byte 0x11,0x94,0x48,0xfa, 0x47,0xe9,0x64,0x22
.byte 0xa8,0xfc,0x8c,0xc4, 0xa0,0xf0,0x3f,0x1a
.byte 0x56,0x7d,0x2c,0xd8, 0x22,0x33,0x90,0xef
.byte 0x87,0x49,0x4e,0xc7, 0xd9,0x38,0xd1,0xc1
.byte 0x8c,0xca,0xa2,0xfe, 0x98,0xd4,0x0b,0x36
.byte 0xa6,0xf5,0x81,0xcf, 0xa5,0x7a,0xde,0x28
.byte 0xda,0xb7,0x8e,0x26, 0x3f,0xad,0xbf,0xa4
.byte 0x2c,0x3a,0x9d,0xe4, 0x50,0x78,0x92,0x0d
.byte 0x6a,0x5f,0xcc,0x9b, 0x54,0x7e,0x46,0x62
.byte 0xf6,0x8d,0x13,0xc2, 0x90,0xd8,0xb8,0xe8
.byte 0x2e,0x39,0xf7,0x5e, 0x82,0xc3,0xaf,0xf5
.byte 0x9f,0x5d,0x80,0xbe, 0x69,0xd0,0x93,0x7c
.byte 0x6f,0xd5,0x2d,0xa9, 0xcf,0x25,0x12,0xb3
.byte 0xc8,0xac,0x99,0x3b, 0x10,0x18,0x7d,0xa7
.byte 0xe8,0x9c,0x63,0x6e, 0xdb,0x3b,0xbb,0x7b
.byte 0xcd,0x26,0x78,0x09, 0x6e,0x59,0x18,0xf4
.byte 0xec,0x9a,0xb7,0x01, 0x83,0x4f,0x9a,0xa8
.byte 0xe6,0x95,0x6e,0x65, 0xaa,0xff,0xe6,0x7e
.byte 0x21,0xbc,0xcf,0x08, 0xef,0x15,0xe8,0xe6
.byte 0xba,0xe7,0x9b,0xd9, 0x4a,0x6f,0x36,0xce
.byte 0xea,0x9f,0x09,0xd4, 0x29,0xb0,0x7c,0xd6
.byte 0x31,0xa4,0xb2,0xaf, 0x2a,0x3f,0x23,0x31
.byte 0xc6,0xa5,0x94,0x30, 0x35,0xa2,0x66,0xc0
.byte 0x74,0x4e,0xbc,0x37, 0xfc,0x82,0xca,0xa6
.byte 0xe0,0x90,0xd0,0xb0, 0x33,0xa7,0xd8,0x15
.byte 0xf1,0x04,0x98,0x4a, 0x41,0xec,0xda,0xf7
.byte 0x7f,0xcd,0x50,0x0e, 0x17,0x91,0xf6,0x2f
.byte 0x76,0x4d,0xd6,0x8d, 0x43,0xef,0xb0,0x4d
.byte 0xcc,0xaa,0x4d,0x54, 0xe4,0x96,0x04,0xdf
.byte 0x9e,0xd1,0xb5,0xe3, 0x4c,0x6a,0x88,0x1b
.byte 0xc1,0x2c,0x1f,0xb8, 0x46,0x65,0x51,0x7f
.byte 0x9d,0x5e,0xea,0x04, 0x01,0x8c,0x35,0x5d
.byte 0xfa,0x87,0x74,0x73, 0xfb,0x0b,0x41,0x2e
.byte 0xb3,0x67,0x1d,0x5a, 0x92,0xdb,0xd2,0x52
.byte 0xe9,0x10,0x56,0x33, 0x6d,0xd6,0x47,0x13
.byte 0x9a,0xd7,0x61,0x8c, 0x37,0xa1,0x0c,0x7a
.byte 0x59,0xf8,0x14,0x8e, 0xeb,0x13,0x3c,0x89
.byte 0xce,0xa9,0x27,0xee, 0xb7,0x61,0xc9,0x35
.byte 0xe1,0x1c,0xe5,0xed, 0x7a,0x47,0xb1,0x3c
.byte 0x9c,0xd2,0xdf,0x59, 0x55,0xf2,0x73,0x3f
.byte 0x18,0x14,0xce,0x79, 0x73,0xc7,0x37,0xbf
.byte 0x53,0xf7,0xcd,0xea, 0x5f,0xfd,0xaa,0x5b
.byte 0xdf,0x3d,0x6f,0x14, 0x78,0x44,0xdb,0x86
.byte 0xca,0xaf,0xf3,0x81, 0xb9,0x68,0xc4,0x3e
.byte 0x38,0x24,0x34,0x2c, 0xc2,0xa3,0x40,0x5f
.byte 0x16,0x1d,0xc3,0x72, 0xbc,0xe2,0x25,0x0c
.byte 0x28,0x3c,0x49,0x8b, 0xff,0x0d,0x95,0x41
.byte 0x39,0xa8,0x01,0x71, 0x08,0x0c,0xb3,0xde
.byte 0xd8,0xb4,0xe4,0x9c, 0x64,0x56,0xc1,0x90
.byte 0x7b,0xcb,0x84,0x61, 0xd5,0x32,0xb6,0x70
.byte 0x48,0x6c,0x5c,0x74, 0xd0,0xb8,0x57,0x42
.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38 # Td4
.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87
.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d
.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2
.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16
.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda
.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a
.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02
.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea
.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85
.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89
.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20
.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31
.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d
.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0
.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26
.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
AES_Te4:
.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5 # Te4
.byte 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76
.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0
.byte 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0
.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc
.byte 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15
.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a
.byte 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75
.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0
.byte 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84
.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b
.byte 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf
.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85
.byte 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8
.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5
.byte 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2
.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17
.byte 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73
.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88
.byte 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb
.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c
.byte 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79
.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9
.byte 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08
.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6
.byte 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a
.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e
.byte 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e
.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94
.byte 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf
.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68
.byte 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
.byte 0x01,0x00,0x00,0x00, 0x02,0x00,0x00,0x00 # rcon
.byte 0x04,0x00,0x00,0x00, 0x08,0x00,0x00,0x00
.byte 0x10,0x00,0x00,0x00, 0x20,0x00,0x00,0x00
.byte 0x40,0x00,0x00,0x00, 0x80,0x00,0x00,0x00
.byte 0x1B,0x00,0x00,0x00, 0x36,0x00,0x00,0x00
|
wangyu-/udp2raw | 30,214 | lib/aes_acc/asm/arm.S | @ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved.
@
@ Licensed under the OpenSSL license (the "License"). You may not use
@ this file except in compliance with the License. You can obtain a copy
@ in the file LICENSE in the source distribution or at
@ https://www.openssl.org/source/license.html
@ ====================================================================
@ Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
@ project. The module is, however, dual licensed under OpenSSL and
@ CRYPTOGAMS licenses depending on where you obtain it. For further
@ details see http://www.openssl.org/~appro/cryptogams/.
@ ====================================================================
@ AES for ARMv4
@ January 2007.
@
@ Code uses single 1K S-box and is >2 times faster than code generated
@ by gcc-3.4.1. This is thanks to unique feature of ARMv4 ISA, which
@ allows to merge logical or arithmetic operation with shift or rotate
@ in one instruction and emit combined result every cycle. The module
@ is endian-neutral. The performance is ~42 cycles/byte for 128-bit
@ key [on single-issue Xscale PXA250 core].
@ May 2007.
@
@ AES_set_[en|de]crypt_key is added.
@ July 2010.
@
@ Rescheduling for dual-issue pipeline resulted in 12% improvement on
@ Cortex A8 core and ~25 cycles per byte processed with 128-bit key.
@ February 2011.
@
@ Profiler-assisted and platform-specific optimization resulted in 16%
@ improvement on Cortex A8 core and ~21.5 cycles per byte.
#ifndef __KERNEL__
# include "arm_arch.h"
#else
# define __ARM_ARCH__ __LINUX_ARM_ARCH__
#endif
.text
#if defined(__thumb2__) && !defined(__APPLE__)
.syntax unified
.thumb
#else
.code 32
#undef __thumb2__
#endif
.align 5
AES_Te:
.word 0xc66363a5, 0xf87c7c84, 0xee777799, 0xf67b7b8d
.word 0xfff2f20d, 0xd66b6bbd, 0xde6f6fb1, 0x91c5c554
.word 0x60303050, 0x02010103, 0xce6767a9, 0x562b2b7d
.word 0xe7fefe19, 0xb5d7d762, 0x4dababe6, 0xec76769a
.word 0x8fcaca45, 0x1f82829d, 0x89c9c940, 0xfa7d7d87
.word 0xeffafa15, 0xb25959eb, 0x8e4747c9, 0xfbf0f00b
.word 0x41adadec, 0xb3d4d467, 0x5fa2a2fd, 0x45afafea
.word 0x239c9cbf, 0x53a4a4f7, 0xe4727296, 0x9bc0c05b
.word 0x75b7b7c2, 0xe1fdfd1c, 0x3d9393ae, 0x4c26266a
.word 0x6c36365a, 0x7e3f3f41, 0xf5f7f702, 0x83cccc4f
.word 0x6834345c, 0x51a5a5f4, 0xd1e5e534, 0xf9f1f108
.word 0xe2717193, 0xabd8d873, 0x62313153, 0x2a15153f
.word 0x0804040c, 0x95c7c752, 0x46232365, 0x9dc3c35e
.word 0x30181828, 0x379696a1, 0x0a05050f, 0x2f9a9ab5
.word 0x0e070709, 0x24121236, 0x1b80809b, 0xdfe2e23d
.word 0xcdebeb26, 0x4e272769, 0x7fb2b2cd, 0xea75759f
.word 0x1209091b, 0x1d83839e, 0x582c2c74, 0x341a1a2e
.word 0x361b1b2d, 0xdc6e6eb2, 0xb45a5aee, 0x5ba0a0fb
.word 0xa45252f6, 0x763b3b4d, 0xb7d6d661, 0x7db3b3ce
.word 0x5229297b, 0xdde3e33e, 0x5e2f2f71, 0x13848497
.word 0xa65353f5, 0xb9d1d168, 0x00000000, 0xc1eded2c
.word 0x40202060, 0xe3fcfc1f, 0x79b1b1c8, 0xb65b5bed
.word 0xd46a6abe, 0x8dcbcb46, 0x67bebed9, 0x7239394b
.word 0x944a4ade, 0x984c4cd4, 0xb05858e8, 0x85cfcf4a
.word 0xbbd0d06b, 0xc5efef2a, 0x4faaaae5, 0xedfbfb16
.word 0x864343c5, 0x9a4d4dd7, 0x66333355, 0x11858594
.word 0x8a4545cf, 0xe9f9f910, 0x04020206, 0xfe7f7f81
.word 0xa05050f0, 0x783c3c44, 0x259f9fba, 0x4ba8a8e3
.word 0xa25151f3, 0x5da3a3fe, 0x804040c0, 0x058f8f8a
.word 0x3f9292ad, 0x219d9dbc, 0x70383848, 0xf1f5f504
.word 0x63bcbcdf, 0x77b6b6c1, 0xafdada75, 0x42212163
.word 0x20101030, 0xe5ffff1a, 0xfdf3f30e, 0xbfd2d26d
.word 0x81cdcd4c, 0x180c0c14, 0x26131335, 0xc3ecec2f
.word 0xbe5f5fe1, 0x359797a2, 0x884444cc, 0x2e171739
.word 0x93c4c457, 0x55a7a7f2, 0xfc7e7e82, 0x7a3d3d47
.word 0xc86464ac, 0xba5d5de7, 0x3219192b, 0xe6737395
.word 0xc06060a0, 0x19818198, 0x9e4f4fd1, 0xa3dcdc7f
.word 0x44222266, 0x542a2a7e, 0x3b9090ab, 0x0b888883
.word 0x8c4646ca, 0xc7eeee29, 0x6bb8b8d3, 0x2814143c
.word 0xa7dede79, 0xbc5e5ee2, 0x160b0b1d, 0xaddbdb76
.word 0xdbe0e03b, 0x64323256, 0x743a3a4e, 0x140a0a1e
.word 0x924949db, 0x0c06060a, 0x4824246c, 0xb85c5ce4
.word 0x9fc2c25d, 0xbdd3d36e, 0x43acacef, 0xc46262a6
.word 0x399191a8, 0x319595a4, 0xd3e4e437, 0xf279798b
.word 0xd5e7e732, 0x8bc8c843, 0x6e373759, 0xda6d6db7
.word 0x018d8d8c, 0xb1d5d564, 0x9c4e4ed2, 0x49a9a9e0
.word 0xd86c6cb4, 0xac5656fa, 0xf3f4f407, 0xcfeaea25
.word 0xca6565af, 0xf47a7a8e, 0x47aeaee9, 0x10080818
.word 0x6fbabad5, 0xf0787888, 0x4a25256f, 0x5c2e2e72
.word 0x381c1c24, 0x57a6a6f1, 0x73b4b4c7, 0x97c6c651
.word 0xcbe8e823, 0xa1dddd7c, 0xe874749c, 0x3e1f1f21
.word 0x964b4bdd, 0x61bdbddc, 0x0d8b8b86, 0x0f8a8a85
.word 0xe0707090, 0x7c3e3e42, 0x71b5b5c4, 0xcc6666aa
.word 0x904848d8, 0x06030305, 0xf7f6f601, 0x1c0e0e12
.word 0xc26161a3, 0x6a35355f, 0xae5757f9, 0x69b9b9d0
.word 0x17868691, 0x99c1c158, 0x3a1d1d27, 0x279e9eb9
.word 0xd9e1e138, 0xebf8f813, 0x2b9898b3, 0x22111133
.word 0xd26969bb, 0xa9d9d970, 0x078e8e89, 0x339494a7
.word 0x2d9b9bb6, 0x3c1e1e22, 0x15878792, 0xc9e9e920
.word 0x87cece49, 0xaa5555ff, 0x50282878, 0xa5dfdf7a
.word 0x038c8c8f, 0x59a1a1f8, 0x09898980, 0x1a0d0d17
.word 0x65bfbfda, 0xd7e6e631, 0x844242c6, 0xd06868b8
.word 0x824141c3, 0x299999b0, 0x5a2d2d77, 0x1e0f0f11
.word 0x7bb0b0cb, 0xa85454fc, 0x6dbbbbd6, 0x2c16163a
@ Te4[256]
.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5
.byte 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76
.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0
.byte 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0
.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc
.byte 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15
.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a
.byte 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75
.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0
.byte 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84
.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b
.byte 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf
.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85
.byte 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8
.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5
.byte 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2
.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17
.byte 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73
.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88
.byte 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb
.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c
.byte 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79
.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9
.byte 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08
.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6
.byte 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a
.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e
.byte 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e
.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94
.byte 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf
.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68
.byte 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
@ rcon[]
.word 0x01000000, 0x02000000, 0x04000000, 0x08000000
.word 0x10000000, 0x20000000, 0x40000000, 0x80000000
.word 0x1B000000, 0x36000000, 0, 0, 0, 0, 0, 0
@ void AES_encrypt(const unsigned char *in, unsigned char *out,
@ const AES_KEY *key) {
.globl AES_encrypt
.align 5
AES_encrypt:
#ifndef __thumb2__
sub r3,pc,#8 @ AES_encrypt
#else
adr r3,AES_encrypt
#endif
stmdb sp!,{r1,r4-r12,lr}
#ifdef __APPLE__
adr r10,AES_Te
#else
sub r10,r3,#AES_encrypt-AES_Te @ Te
#endif
mov r12,r0 @ inp
mov r11,r2
#if __ARM_ARCH__<7
ldrb r0,[r12,#3] @ load input data in endian-neutral
ldrb r4,[r12,#2] @ manner...
ldrb r5,[r12,#1]
ldrb r6,[r12,#0]
orr r0,r0,r4,lsl#8
ldrb r1,[r12,#7]
orr r0,r0,r5,lsl#16
ldrb r4,[r12,#6]
orr r0,r0,r6,lsl#24
ldrb r5,[r12,#5]
ldrb r6,[r12,#4]
orr r1,r1,r4,lsl#8
ldrb r2,[r12,#11]
orr r1,r1,r5,lsl#16
ldrb r4,[r12,#10]
orr r1,r1,r6,lsl#24
ldrb r5,[r12,#9]
ldrb r6,[r12,#8]
orr r2,r2,r4,lsl#8
ldrb r3,[r12,#15]
orr r2,r2,r5,lsl#16
ldrb r4,[r12,#14]
orr r2,r2,r6,lsl#24
ldrb r5,[r12,#13]
ldrb r6,[r12,#12]
orr r3,r3,r4,lsl#8
orr r3,r3,r5,lsl#16
orr r3,r3,r6,lsl#24
#else
ldr r0,[r12,#0]
ldr r1,[r12,#4]
ldr r2,[r12,#8]
ldr r3,[r12,#12]
#ifdef __ARMEL__
rev r0,r0
rev r1,r1
rev r2,r2
rev r3,r3
#endif
#endif
bl _armv4_AES_encrypt
ldr r12,[sp],#4 @ pop out
#if __ARM_ARCH__>=7
#ifdef __ARMEL__
rev r0,r0
rev r1,r1
rev r2,r2
rev r3,r3
#endif
str r0,[r12,#0]
str r1,[r12,#4]
str r2,[r12,#8]
str r3,[r12,#12]
#else
mov r4,r0,lsr#24 @ write output in endian-neutral
mov r5,r0,lsr#16 @ manner...
mov r6,r0,lsr#8
strb r4,[r12,#0]
strb r5,[r12,#1]
mov r4,r1,lsr#24
strb r6,[r12,#2]
mov r5,r1,lsr#16
strb r0,[r12,#3]
mov r6,r1,lsr#8
strb r4,[r12,#4]
strb r5,[r12,#5]
mov r4,r2,lsr#24
strb r6,[r12,#6]
mov r5,r2,lsr#16
strb r1,[r12,#7]
mov r6,r2,lsr#8
strb r4,[r12,#8]
strb r5,[r12,#9]
mov r4,r3,lsr#24
strb r6,[r12,#10]
mov r5,r3,lsr#16
strb r2,[r12,#11]
mov r6,r3,lsr#8
strb r4,[r12,#12]
strb r5,[r12,#13]
strb r6,[r12,#14]
strb r3,[r12,#15]
#endif
#if __ARM_ARCH__>=5
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
#else
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.align 2
_armv4_AES_encrypt:
str lr,[sp,#-4]! @ push lr
ldmia r11!,{r4,r5,r6,r7}
eor r0,r0,r4
ldr r12,[r11,#240-16]
eor r1,r1,r5
eor r2,r2,r6
eor r3,r3,r7
sub r12,r12,#1
mov lr,#255
and r7,lr,r0
and r8,lr,r0,lsr#8
and r9,lr,r0,lsr#16
mov r0,r0,lsr#24
Lenc_loop:
ldr r4,[r10,r7,lsl#2] @ Te3[s0>>0]
and r7,lr,r1,lsr#16 @ i0
ldr r5,[r10,r8,lsl#2] @ Te2[s0>>8]
and r8,lr,r1
ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
and r9,lr,r1,lsr#8
ldr r0,[r10,r0,lsl#2] @ Te0[s0>>24]
mov r1,r1,lsr#24
ldr r7,[r10,r7,lsl#2] @ Te1[s1>>16]
ldr r8,[r10,r8,lsl#2] @ Te3[s1>>0]
ldr r9,[r10,r9,lsl#2] @ Te2[s1>>8]
eor r0,r0,r7,ror#8
ldr r1,[r10,r1,lsl#2] @ Te0[s1>>24]
and r7,lr,r2,lsr#8 @ i0
eor r5,r5,r8,ror#8
and r8,lr,r2,lsr#16 @ i1
eor r6,r6,r9,ror#8
and r9,lr,r2
ldr r7,[r10,r7,lsl#2] @ Te2[s2>>8]
eor r1,r1,r4,ror#24
ldr r8,[r10,r8,lsl#2] @ Te1[s2>>16]
mov r2,r2,lsr#24
ldr r9,[r10,r9,lsl#2] @ Te3[s2>>0]
eor r0,r0,r7,ror#16
ldr r2,[r10,r2,lsl#2] @ Te0[s2>>24]
and r7,lr,r3 @ i0
eor r1,r1,r8,ror#8
and r8,lr,r3,lsr#8 @ i1
eor r6,r6,r9,ror#16
and r9,lr,r3,lsr#16 @ i2
ldr r7,[r10,r7,lsl#2] @ Te3[s3>>0]
eor r2,r2,r5,ror#16
ldr r8,[r10,r8,lsl#2] @ Te2[s3>>8]
mov r3,r3,lsr#24
ldr r9,[r10,r9,lsl#2] @ Te1[s3>>16]
eor r0,r0,r7,ror#24
ldr r7,[r11],#16
eor r1,r1,r8,ror#16
ldr r3,[r10,r3,lsl#2] @ Te0[s3>>24]
eor r2,r2,r9,ror#8
ldr r4,[r11,#-12]
eor r3,r3,r6,ror#8
ldr r5,[r11,#-8]
eor r0,r0,r7
ldr r6,[r11,#-4]
and r7,lr,r0
eor r1,r1,r4
and r8,lr,r0,lsr#8
eor r2,r2,r5
and r9,lr,r0,lsr#16
eor r3,r3,r6
mov r0,r0,lsr#24
subs r12,r12,#1
bne Lenc_loop
add r10,r10,#2
ldrb r4,[r10,r7,lsl#2] @ Te4[s0>>0]
and r7,lr,r1,lsr#16 @ i0
ldrb r5,[r10,r8,lsl#2] @ Te4[s0>>8]
and r8,lr,r1
ldrb r6,[r10,r9,lsl#2] @ Te4[s0>>16]
and r9,lr,r1,lsr#8
ldrb r0,[r10,r0,lsl#2] @ Te4[s0>>24]
mov r1,r1,lsr#24
ldrb r7,[r10,r7,lsl#2] @ Te4[s1>>16]
ldrb r8,[r10,r8,lsl#2] @ Te4[s1>>0]
ldrb r9,[r10,r9,lsl#2] @ Te4[s1>>8]
eor r0,r7,r0,lsl#8
ldrb r1,[r10,r1,lsl#2] @ Te4[s1>>24]
and r7,lr,r2,lsr#8 @ i0
eor r5,r8,r5,lsl#8
and r8,lr,r2,lsr#16 @ i1
eor r6,r9,r6,lsl#8
and r9,lr,r2
ldrb r7,[r10,r7,lsl#2] @ Te4[s2>>8]
eor r1,r4,r1,lsl#24
ldrb r8,[r10,r8,lsl#2] @ Te4[s2>>16]
mov r2,r2,lsr#24
ldrb r9,[r10,r9,lsl#2] @ Te4[s2>>0]
eor r0,r7,r0,lsl#8
ldrb r2,[r10,r2,lsl#2] @ Te4[s2>>24]
and r7,lr,r3 @ i0
eor r1,r1,r8,lsl#16
and r8,lr,r3,lsr#8 @ i1
eor r6,r9,r6,lsl#8
and r9,lr,r3,lsr#16 @ i2
ldrb r7,[r10,r7,lsl#2] @ Te4[s3>>0]
eor r2,r5,r2,lsl#24
ldrb r8,[r10,r8,lsl#2] @ Te4[s3>>8]
mov r3,r3,lsr#24
ldrb r9,[r10,r9,lsl#2] @ Te4[s3>>16]
eor r0,r7,r0,lsl#8
ldr r7,[r11,#0]
ldrb r3,[r10,r3,lsl#2] @ Te4[s3>>24]
eor r1,r1,r8,lsl#8
ldr r4,[r11,#4]
eor r2,r2,r9,lsl#16
ldr r5,[r11,#8]
eor r3,r6,r3,lsl#24
ldr r6,[r11,#12]
eor r0,r0,r7
eor r1,r1,r4
eor r2,r2,r5
eor r3,r3,r6
sub r10,r10,#2
ldr pc,[sp],#4 @ pop and return
.globl AES_set_encrypt_key
.align 5
AES_set_encrypt_key:
_armv4_AES_set_encrypt_key:
#ifndef __thumb2__
sub r3,pc,#8 @ AES_set_encrypt_key
#else
adr r3,AES_set_encrypt_key
#endif
teq r0,#0
#ifdef __thumb2__
itt eq @ Thumb2 thing, sanity check in ARM
#endif
moveq r0,#-1
beq Labrt
teq r2,#0
#ifdef __thumb2__
itt eq @ Thumb2 thing, sanity check in ARM
#endif
moveq r0,#-1
beq Labrt
teq r1,#128
beq Lok
teq r1,#192
beq Lok
teq r1,#256
#ifdef __thumb2__
itt ne @ Thumb2 thing, sanity check in ARM
#endif
movne r0,#-1
bne Labrt
Lok: stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
mov r12,r0 @ inp
mov lr,r1 @ bits
mov r11,r2 @ key
#ifdef __APPLE__
adr r10,AES_Te+1024 @ Te4
#else
sub r10,r3,#_armv4_AES_set_encrypt_key-AES_Te-1024 @ Te4
#endif
#if __ARM_ARCH__<7
ldrb r0,[r12,#3] @ load input data in endian-neutral
ldrb r4,[r12,#2] @ manner...
ldrb r5,[r12,#1]
ldrb r6,[r12,#0]
orr r0,r0,r4,lsl#8
ldrb r1,[r12,#7]
orr r0,r0,r5,lsl#16
ldrb r4,[r12,#6]
orr r0,r0,r6,lsl#24
ldrb r5,[r12,#5]
ldrb r6,[r12,#4]
orr r1,r1,r4,lsl#8
ldrb r2,[r12,#11]
orr r1,r1,r5,lsl#16
ldrb r4,[r12,#10]
orr r1,r1,r6,lsl#24
ldrb r5,[r12,#9]
ldrb r6,[r12,#8]
orr r2,r2,r4,lsl#8
ldrb r3,[r12,#15]
orr r2,r2,r5,lsl#16
ldrb r4,[r12,#14]
orr r2,r2,r6,lsl#24
ldrb r5,[r12,#13]
ldrb r6,[r12,#12]
orr r3,r3,r4,lsl#8
str r0,[r11],#16
orr r3,r3,r5,lsl#16
str r1,[r11,#-12]
orr r3,r3,r6,lsl#24
str r2,[r11,#-8]
str r3,[r11,#-4]
#else
ldr r0,[r12,#0]
ldr r1,[r12,#4]
ldr r2,[r12,#8]
ldr r3,[r12,#12]
#ifdef __ARMEL__
rev r0,r0
rev r1,r1
rev r2,r2
rev r3,r3
#endif
str r0,[r11],#16
str r1,[r11,#-12]
str r2,[r11,#-8]
str r3,[r11,#-4]
#endif
teq lr,#128
bne Lnot128
mov r12,#10
str r12,[r11,#240-16]
add r6,r10,#256 @ rcon
mov lr,#255
L128_loop:
and r5,lr,r3,lsr#24
and r7,lr,r3,lsr#16
ldrb r5,[r10,r5]
and r8,lr,r3,lsr#8
ldrb r7,[r10,r7]
and r9,lr,r3
ldrb r8,[r10,r8]
orr r5,r5,r7,lsl#24
ldrb r9,[r10,r9]
orr r5,r5,r8,lsl#16
ldr r4,[r6],#4 @ rcon[i++]
orr r5,r5,r9,lsl#8
eor r5,r5,r4
eor r0,r0,r5 @ rk[4]=rk[0]^...
eor r1,r1,r0 @ rk[5]=rk[1]^rk[4]
str r0,[r11],#16
eor r2,r2,r1 @ rk[6]=rk[2]^rk[5]
str r1,[r11,#-12]
eor r3,r3,r2 @ rk[7]=rk[3]^rk[6]
str r2,[r11,#-8]
subs r12,r12,#1
str r3,[r11,#-4]
bne L128_loop
sub r2,r11,#176
b Ldone
Lnot128:
#if __ARM_ARCH__<7
ldrb r8,[r12,#19]
ldrb r4,[r12,#18]
ldrb r5,[r12,#17]
ldrb r6,[r12,#16]
orr r8,r8,r4,lsl#8
ldrb r9,[r12,#23]
orr r8,r8,r5,lsl#16
ldrb r4,[r12,#22]
orr r8,r8,r6,lsl#24
ldrb r5,[r12,#21]
ldrb r6,[r12,#20]
orr r9,r9,r4,lsl#8
orr r9,r9,r5,lsl#16
str r8,[r11],#8
orr r9,r9,r6,lsl#24
str r9,[r11,#-4]
#else
ldr r8,[r12,#16]
ldr r9,[r12,#20]
#ifdef __ARMEL__
rev r8,r8
rev r9,r9
#endif
str r8,[r11],#8
str r9,[r11,#-4]
#endif
teq lr,#192
bne Lnot192
mov r12,#12
str r12,[r11,#240-24]
add r6,r10,#256 @ rcon
mov lr,#255
mov r12,#8
L192_loop:
and r5,lr,r9,lsr#24
and r7,lr,r9,lsr#16
ldrb r5,[r10,r5]
and r8,lr,r9,lsr#8
ldrb r7,[r10,r7]
and r9,lr,r9
ldrb r8,[r10,r8]
orr r5,r5,r7,lsl#24
ldrb r9,[r10,r9]
orr r5,r5,r8,lsl#16
ldr r4,[r6],#4 @ rcon[i++]
orr r5,r5,r9,lsl#8
eor r9,r5,r4
eor r0,r0,r9 @ rk[6]=rk[0]^...
eor r1,r1,r0 @ rk[7]=rk[1]^rk[6]
str r0,[r11],#24
eor r2,r2,r1 @ rk[8]=rk[2]^rk[7]
str r1,[r11,#-20]
eor r3,r3,r2 @ rk[9]=rk[3]^rk[8]
str r2,[r11,#-16]
subs r12,r12,#1
str r3,[r11,#-12]
#ifdef __thumb2__
itt eq @ Thumb2 thing, sanity check in ARM
#endif
subeq r2,r11,#216
beq Ldone
ldr r7,[r11,#-32]
ldr r8,[r11,#-28]
eor r7,r7,r3 @ rk[10]=rk[4]^rk[9]
eor r9,r8,r7 @ rk[11]=rk[5]^rk[10]
str r7,[r11,#-8]
str r9,[r11,#-4]
b L192_loop
Lnot192:
#if __ARM_ARCH__<7
ldrb r8,[r12,#27]
ldrb r4,[r12,#26]
ldrb r5,[r12,#25]
ldrb r6,[r12,#24]
orr r8,r8,r4,lsl#8
ldrb r9,[r12,#31]
orr r8,r8,r5,lsl#16
ldrb r4,[r12,#30]
orr r8,r8,r6,lsl#24
ldrb r5,[r12,#29]
ldrb r6,[r12,#28]
orr r9,r9,r4,lsl#8
orr r9,r9,r5,lsl#16
str r8,[r11],#8
orr r9,r9,r6,lsl#24
str r9,[r11,#-4]
#else
ldr r8,[r12,#24]
ldr r9,[r12,#28]
#ifdef __ARMEL__
rev r8,r8
rev r9,r9
#endif
str r8,[r11],#8
str r9,[r11,#-4]
#endif
mov r12,#14
str r12,[r11,#240-32]
add r6,r10,#256 @ rcon
mov lr,#255
mov r12,#7
L256_loop:
and r5,lr,r9,lsr#24
and r7,lr,r9,lsr#16
ldrb r5,[r10,r5]
and r8,lr,r9,lsr#8
ldrb r7,[r10,r7]
and r9,lr,r9
ldrb r8,[r10,r8]
orr r5,r5,r7,lsl#24
ldrb r9,[r10,r9]
orr r5,r5,r8,lsl#16
ldr r4,[r6],#4 @ rcon[i++]
orr r5,r5,r9,lsl#8
eor r9,r5,r4
eor r0,r0,r9 @ rk[8]=rk[0]^...
eor r1,r1,r0 @ rk[9]=rk[1]^rk[8]
str r0,[r11],#32
eor r2,r2,r1 @ rk[10]=rk[2]^rk[9]
str r1,[r11,#-28]
eor r3,r3,r2 @ rk[11]=rk[3]^rk[10]
str r2,[r11,#-24]
subs r12,r12,#1
str r3,[r11,#-20]
#ifdef __thumb2__
itt eq @ Thumb2 thing, sanity check in ARM
#endif
subeq r2,r11,#256
beq Ldone
and r5,lr,r3
and r7,lr,r3,lsr#8
ldrb r5,[r10,r5]
and r8,lr,r3,lsr#16
ldrb r7,[r10,r7]
and r9,lr,r3,lsr#24
ldrb r8,[r10,r8]
orr r5,r5,r7,lsl#8
ldrb r9,[r10,r9]
orr r5,r5,r8,lsl#16
ldr r4,[r11,#-48]
orr r5,r5,r9,lsl#24
ldr r7,[r11,#-44]
ldr r8,[r11,#-40]
eor r4,r4,r5 @ rk[12]=rk[4]^...
ldr r9,[r11,#-36]
eor r7,r7,r4 @ rk[13]=rk[5]^rk[12]
str r4,[r11,#-16]
eor r8,r8,r7 @ rk[14]=rk[6]^rk[13]
str r7,[r11,#-12]
eor r9,r9,r8 @ rk[15]=rk[7]^rk[14]
str r8,[r11,#-8]
str r9,[r11,#-4]
b L256_loop
.align 2
Ldone: mov r0,#0
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
Labrt:
#if __ARM_ARCH__>=5
bx lr @ .word 0xe12fff1e
#else
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.globl AES_set_decrypt_key
.align 5
AES_set_decrypt_key:
str lr,[sp,#-4]! @ push lr
bl _armv4_AES_set_encrypt_key
teq r0,#0
ldr lr,[sp],#4 @ pop lr
bne Labrt
mov r0,r2 @ AES_set_encrypt_key preserves r2,
mov r1,r2 @ which is AES_KEY *key
b _armv4_AES_set_enc2dec_key
@ void AES_set_enc2dec_key(const AES_KEY *inp,AES_KEY *out)
.globl AES_set_enc2dec_key
.align 5
AES_set_enc2dec_key:
_armv4_AES_set_enc2dec_key:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
ldr r12,[r0,#240]
mov r7,r0 @ input
add r8,r0,r12,lsl#4
mov r11,r1 @ output
add r10,r1,r12,lsl#4
str r12,[r1,#240]
Linv: ldr r0,[r7],#16
ldr r1,[r7,#-12]
ldr r2,[r7,#-8]
ldr r3,[r7,#-4]
ldr r4,[r8],#-16
ldr r5,[r8,#16+4]
ldr r6,[r8,#16+8]
ldr r9,[r8,#16+12]
str r0,[r10],#-16
str r1,[r10,#16+4]
str r2,[r10,#16+8]
str r3,[r10,#16+12]
str r4,[r11],#16
str r5,[r11,#-12]
str r6,[r11,#-8]
str r9,[r11,#-4]
teq r7,r8
bne Linv
ldr r0,[r7]
ldr r1,[r7,#4]
ldr r2,[r7,#8]
ldr r3,[r7,#12]
str r0,[r11]
str r1,[r11,#4]
str r2,[r11,#8]
str r3,[r11,#12]
sub r11,r11,r12,lsl#3
ldr r0,[r11,#16]! @ prefetch tp1
mov r7,#0x80
mov r8,#0x1b
orr r7,r7,#0x8000
orr r8,r8,#0x1b00
orr r7,r7,r7,lsl#16
orr r8,r8,r8,lsl#16
sub r12,r12,#1
mvn r9,r7
mov r12,r12,lsl#2 @ (rounds-1)*4
Lmix: and r4,r0,r7
and r1,r0,r9
sub r4,r4,r4,lsr#7
and r4,r4,r8
eor r1,r4,r1,lsl#1 @ tp2
and r4,r1,r7
and r2,r1,r9
sub r4,r4,r4,lsr#7
and r4,r4,r8
eor r2,r4,r2,lsl#1 @ tp4
and r4,r2,r7
and r3,r2,r9
sub r4,r4,r4,lsr#7
and r4,r4,r8
eor r3,r4,r3,lsl#1 @ tp8
eor r4,r1,r2
eor r5,r0,r3 @ tp9
eor r4,r4,r3 @ tpe
eor r4,r4,r1,ror#24
eor r4,r4,r5,ror#24 @ ^= ROTATE(tpb=tp9^tp2,8)
eor r4,r4,r2,ror#16
eor r4,r4,r5,ror#16 @ ^= ROTATE(tpd=tp9^tp4,16)
eor r4,r4,r5,ror#8 @ ^= ROTATE(tp9,24)
ldr r0,[r11,#4] @ prefetch tp1
str r4,[r11],#4
subs r12,r12,#1
bne Lmix
mov r0,#0
#if __ARM_ARCH__>=5
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
#else
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.align 5
AES_Td:
.word 0x51f4a750, 0x7e416553, 0x1a17a4c3, 0x3a275e96
.word 0x3bab6bcb, 0x1f9d45f1, 0xacfa58ab, 0x4be30393
.word 0x2030fa55, 0xad766df6, 0x88cc7691, 0xf5024c25
.word 0x4fe5d7fc, 0xc52acbd7, 0x26354480, 0xb562a38f
.word 0xdeb15a49, 0x25ba1b67, 0x45ea0e98, 0x5dfec0e1
.word 0xc32f7502, 0x814cf012, 0x8d4697a3, 0x6bd3f9c6
.word 0x038f5fe7, 0x15929c95, 0xbf6d7aeb, 0x955259da
.word 0xd4be832d, 0x587421d3, 0x49e06929, 0x8ec9c844
.word 0x75c2896a, 0xf48e7978, 0x99583e6b, 0x27b971dd
.word 0xbee14fb6, 0xf088ad17, 0xc920ac66, 0x7dce3ab4
.word 0x63df4a18, 0xe51a3182, 0x97513360, 0x62537f45
.word 0xb16477e0, 0xbb6bae84, 0xfe81a01c, 0xf9082b94
.word 0x70486858, 0x8f45fd19, 0x94de6c87, 0x527bf8b7
.word 0xab73d323, 0x724b02e2, 0xe31f8f57, 0x6655ab2a
.word 0xb2eb2807, 0x2fb5c203, 0x86c57b9a, 0xd33708a5
.word 0x302887f2, 0x23bfa5b2, 0x02036aba, 0xed16825c
.word 0x8acf1c2b, 0xa779b492, 0xf307f2f0, 0x4e69e2a1
.word 0x65daf4cd, 0x0605bed5, 0xd134621f, 0xc4a6fe8a
.word 0x342e539d, 0xa2f355a0, 0x058ae132, 0xa4f6eb75
.word 0x0b83ec39, 0x4060efaa, 0x5e719f06, 0xbd6e1051
.word 0x3e218af9, 0x96dd063d, 0xdd3e05ae, 0x4de6bd46
.word 0x91548db5, 0x71c45d05, 0x0406d46f, 0x605015ff
.word 0x1998fb24, 0xd6bde997, 0x894043cc, 0x67d99e77
.word 0xb0e842bd, 0x07898b88, 0xe7195b38, 0x79c8eedb
.word 0xa17c0a47, 0x7c420fe9, 0xf8841ec9, 0x00000000
.word 0x09808683, 0x322bed48, 0x1e1170ac, 0x6c5a724e
.word 0xfd0efffb, 0x0f853856, 0x3daed51e, 0x362d3927
.word 0x0a0fd964, 0x685ca621, 0x9b5b54d1, 0x24362e3a
.word 0x0c0a67b1, 0x9357e70f, 0xb4ee96d2, 0x1b9b919e
.word 0x80c0c54f, 0x61dc20a2, 0x5a774b69, 0x1c121a16
.word 0xe293ba0a, 0xc0a02ae5, 0x3c22e043, 0x121b171d
.word 0x0e090d0b, 0xf28bc7ad, 0x2db6a8b9, 0x141ea9c8
.word 0x57f11985, 0xaf75074c, 0xee99ddbb, 0xa37f60fd
.word 0xf701269f, 0x5c72f5bc, 0x44663bc5, 0x5bfb7e34
.word 0x8b432976, 0xcb23c6dc, 0xb6edfc68, 0xb8e4f163
.word 0xd731dcca, 0x42638510, 0x13972240, 0x84c61120
.word 0x854a247d, 0xd2bb3df8, 0xaef93211, 0xc729a16d
.word 0x1d9e2f4b, 0xdcb230f3, 0x0d8652ec, 0x77c1e3d0
.word 0x2bb3166c, 0xa970b999, 0x119448fa, 0x47e96422
.word 0xa8fc8cc4, 0xa0f03f1a, 0x567d2cd8, 0x223390ef
.word 0x87494ec7, 0xd938d1c1, 0x8ccaa2fe, 0x98d40b36
.word 0xa6f581cf, 0xa57ade28, 0xdab78e26, 0x3fadbfa4
.word 0x2c3a9de4, 0x5078920d, 0x6a5fcc9b, 0x547e4662
.word 0xf68d13c2, 0x90d8b8e8, 0x2e39f75e, 0x82c3aff5
.word 0x9f5d80be, 0x69d0937c, 0x6fd52da9, 0xcf2512b3
.word 0xc8ac993b, 0x10187da7, 0xe89c636e, 0xdb3bbb7b
.word 0xcd267809, 0x6e5918f4, 0xec9ab701, 0x834f9aa8
.word 0xe6956e65, 0xaaffe67e, 0x21bccf08, 0xef15e8e6
.word 0xbae79bd9, 0x4a6f36ce, 0xea9f09d4, 0x29b07cd6
.word 0x31a4b2af, 0x2a3f2331, 0xc6a59430, 0x35a266c0
.word 0x744ebc37, 0xfc82caa6, 0xe090d0b0, 0x33a7d815
.word 0xf104984a, 0x41ecdaf7, 0x7fcd500e, 0x1791f62f
.word 0x764dd68d, 0x43efb04d, 0xccaa4d54, 0xe49604df
.word 0x9ed1b5e3, 0x4c6a881b, 0xc12c1fb8, 0x4665517f
.word 0x9d5eea04, 0x018c355d, 0xfa877473, 0xfb0b412e
.word 0xb3671d5a, 0x92dbd252, 0xe9105633, 0x6dd64713
.word 0x9ad7618c, 0x37a10c7a, 0x59f8148e, 0xeb133c89
.word 0xcea927ee, 0xb761c935, 0xe11ce5ed, 0x7a47b13c
.word 0x9cd2df59, 0x55f2733f, 0x1814ce79, 0x73c737bf
.word 0x53f7cdea, 0x5ffdaa5b, 0xdf3d6f14, 0x7844db86
.word 0xcaaff381, 0xb968c43e, 0x3824342c, 0xc2a3405f
.word 0x161dc372, 0xbce2250c, 0x283c498b, 0xff0d9541
.word 0x39a80171, 0x080cb3de, 0xd8b4e49c, 0x6456c190
.word 0x7bcb8461, 0xd532b670, 0x486c5c74, 0xd0b85742
@ Td4[256]
.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38
.byte 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87
.byte 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d
.byte 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2
.byte 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16
.byte 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda
.byte 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a
.byte 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02
.byte 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea
.byte 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85
.byte 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89
.byte 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20
.byte 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31
.byte 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d
.byte 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0
.byte 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26
.byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
@ void AES_decrypt(const unsigned char *in, unsigned char *out,
@ const AES_KEY *key) {
.globl AES_decrypt
.align 5
AES_decrypt:
#ifndef __thumb2__
sub r3,pc,#8 @ AES_decrypt
#else
adr r3,AES_decrypt
#endif
stmdb sp!,{r1,r4-r12,lr}
#ifdef __APPLE__
adr r10,AES_Td
#else
sub r10,r3,#AES_decrypt-AES_Td @ Td
#endif
mov r12,r0 @ inp
mov r11,r2
#if __ARM_ARCH__<7
ldrb r0,[r12,#3] @ load input data in endian-neutral
ldrb r4,[r12,#2] @ manner...
ldrb r5,[r12,#1]
ldrb r6,[r12,#0]
orr r0,r0,r4,lsl#8
ldrb r1,[r12,#7]
orr r0,r0,r5,lsl#16
ldrb r4,[r12,#6]
orr r0,r0,r6,lsl#24
ldrb r5,[r12,#5]
ldrb r6,[r12,#4]
orr r1,r1,r4,lsl#8
ldrb r2,[r12,#11]
orr r1,r1,r5,lsl#16
ldrb r4,[r12,#10]
orr r1,r1,r6,lsl#24
ldrb r5,[r12,#9]
ldrb r6,[r12,#8]
orr r2,r2,r4,lsl#8
ldrb r3,[r12,#15]
orr r2,r2,r5,lsl#16
ldrb r4,[r12,#14]
orr r2,r2,r6,lsl#24
ldrb r5,[r12,#13]
ldrb r6,[r12,#12]
orr r3,r3,r4,lsl#8
orr r3,r3,r5,lsl#16
orr r3,r3,r6,lsl#24
#else
ldr r0,[r12,#0]
ldr r1,[r12,#4]
ldr r2,[r12,#8]
ldr r3,[r12,#12]
#ifdef __ARMEL__
rev r0,r0
rev r1,r1
rev r2,r2
rev r3,r3
#endif
#endif
bl _armv4_AES_decrypt
ldr r12,[sp],#4 @ pop out
#if __ARM_ARCH__>=7
#ifdef __ARMEL__
rev r0,r0
rev r1,r1
rev r2,r2
rev r3,r3
#endif
str r0,[r12,#0]
str r1,[r12,#4]
str r2,[r12,#8]
str r3,[r12,#12]
#else
mov r4,r0,lsr#24 @ write output in endian-neutral
mov r5,r0,lsr#16 @ manner...
mov r6,r0,lsr#8
strb r4,[r12,#0]
strb r5,[r12,#1]
mov r4,r1,lsr#24
strb r6,[r12,#2]
mov r5,r1,lsr#16
strb r0,[r12,#3]
mov r6,r1,lsr#8
strb r4,[r12,#4]
strb r5,[r12,#5]
mov r4,r2,lsr#24
strb r6,[r12,#6]
mov r5,r2,lsr#16
strb r1,[r12,#7]
mov r6,r2,lsr#8
strb r4,[r12,#8]
strb r5,[r12,#9]
mov r4,r3,lsr#24
strb r6,[r12,#10]
mov r5,r3,lsr#16
strb r2,[r12,#11]
mov r6,r3,lsr#8
strb r4,[r12,#12]
strb r5,[r12,#13]
strb r6,[r12,#14]
strb r3,[r12,#15]
#endif
#if __ARM_ARCH__>=5
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,pc}
#else
ldmia sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.align 2
_armv4_AES_decrypt:
str lr,[sp,#-4]! @ push lr
ldmia r11!,{r4,r5,r6,r7}
eor r0,r0,r4
ldr r12,[r11,#240-16]
eor r1,r1,r5
eor r2,r2,r6
eor r3,r3,r7
sub r12,r12,#1
mov lr,#255
and r7,lr,r0,lsr#16
and r8,lr,r0,lsr#8
and r9,lr,r0
mov r0,r0,lsr#24
Ldec_loop:
ldr r4,[r10,r7,lsl#2] @ Td1[s0>>16]
and r7,lr,r1 @ i0
ldr r5,[r10,r8,lsl#2] @ Td2[s0>>8]
and r8,lr,r1,lsr#16
ldr r6,[r10,r9,lsl#2] @ Td3[s0>>0]
and r9,lr,r1,lsr#8
ldr r0,[r10,r0,lsl#2] @ Td0[s0>>24]
mov r1,r1,lsr#24
ldr r7,[r10,r7,lsl#2] @ Td3[s1>>0]
ldr r8,[r10,r8,lsl#2] @ Td1[s1>>16]
ldr r9,[r10,r9,lsl#2] @ Td2[s1>>8]
eor r0,r0,r7,ror#24
ldr r1,[r10,r1,lsl#2] @ Td0[s1>>24]
and r7,lr,r2,lsr#8 @ i0
eor r5,r8,r5,ror#8
and r8,lr,r2 @ i1
eor r6,r9,r6,ror#8
and r9,lr,r2,lsr#16
ldr r7,[r10,r7,lsl#2] @ Td2[s2>>8]
eor r1,r1,r4,ror#8
ldr r8,[r10,r8,lsl#2] @ Td3[s2>>0]
mov r2,r2,lsr#24
ldr r9,[r10,r9,lsl#2] @ Td1[s2>>16]
eor r0,r0,r7,ror#16
ldr r2,[r10,r2,lsl#2] @ Td0[s2>>24]
and r7,lr,r3,lsr#16 @ i0
eor r1,r1,r8,ror#24
and r8,lr,r3,lsr#8 @ i1
eor r6,r9,r6,ror#8
and r9,lr,r3 @ i2
ldr r7,[r10,r7,lsl#2] @ Td1[s3>>16]
eor r2,r2,r5,ror#8
ldr r8,[r10,r8,lsl#2] @ Td2[s3>>8]
mov r3,r3,lsr#24
ldr r9,[r10,r9,lsl#2] @ Td3[s3>>0]
eor r0,r0,r7,ror#8
ldr r7,[r11],#16
eor r1,r1,r8,ror#16
ldr r3,[r10,r3,lsl#2] @ Td0[s3>>24]
eor r2,r2,r9,ror#24
ldr r4,[r11,#-12]
eor r0,r0,r7
ldr r5,[r11,#-8]
eor r3,r3,r6,ror#8
ldr r6,[r11,#-4]
and r7,lr,r0,lsr#16
eor r1,r1,r4
and r8,lr,r0,lsr#8
eor r2,r2,r5
and r9,lr,r0
eor r3,r3,r6
mov r0,r0,lsr#24
subs r12,r12,#1
bne Ldec_loop
add r10,r10,#1024
ldr r5,[r10,#0] @ prefetch Td4
ldr r6,[r10,#32]
ldr r4,[r10,#64]
ldr r5,[r10,#96]
ldr r6,[r10,#128]
ldr r4,[r10,#160]
ldr r5,[r10,#192]
ldr r6,[r10,#224]
ldrb r0,[r10,r0] @ Td4[s0>>24]
ldrb r4,[r10,r7] @ Td4[s0>>16]
and r7,lr,r1 @ i0
ldrb r5,[r10,r8] @ Td4[s0>>8]
and r8,lr,r1,lsr#16
ldrb r6,[r10,r9] @ Td4[s0>>0]
and r9,lr,r1,lsr#8
add r1,r10,r1,lsr#24
ldrb r7,[r10,r7] @ Td4[s1>>0]
ldrb r1,[r1] @ Td4[s1>>24]
ldrb r8,[r10,r8] @ Td4[s1>>16]
eor r0,r7,r0,lsl#24
ldrb r9,[r10,r9] @ Td4[s1>>8]
eor r1,r4,r1,lsl#8
and r7,lr,r2,lsr#8 @ i0
eor r5,r5,r8,lsl#8
and r8,lr,r2 @ i1
ldrb r7,[r10,r7] @ Td4[s2>>8]
eor r6,r6,r9,lsl#8
ldrb r8,[r10,r8] @ Td4[s2>>0]
and r9,lr,r2,lsr#16
add r2,r10,r2,lsr#24
ldrb r2,[r2] @ Td4[s2>>24]
eor r0,r0,r7,lsl#8
ldrb r9,[r10,r9] @ Td4[s2>>16]
eor r1,r8,r1,lsl#16
and r7,lr,r3,lsr#16 @ i0
eor r2,r5,r2,lsl#16
and r8,lr,r3,lsr#8 @ i1
ldrb r7,[r10,r7] @ Td4[s3>>16]
eor r6,r6,r9,lsl#16
ldrb r8,[r10,r8] @ Td4[s3>>8]
and r9,lr,r3 @ i2
add r3,r10,r3,lsr#24
ldrb r9,[r10,r9] @ Td4[s3>>0]
ldrb r3,[r3] @ Td4[s3>>24]
eor r0,r0,r7,lsl#16
ldr r7,[r11,#0]
eor r1,r1,r8,lsl#8
ldr r4,[r11,#4]
eor r2,r9,r2,lsl#8
ldr r5,[r11,#8]
eor r3,r6,r3,lsl#24
ldr r6,[r11,#12]
eor r0,r0,r7
eor r1,r1,r4
eor r2,r2,r5
eor r3,r3,r6
sub r10,r10,#1024
ldr pc,[sp],#4 @ pop and return
.byte 65,69,83,32,102,111,114,32,65,82,77,118,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 2
.align 2
|
Wangzhike/HIT-Linux-0.11 | 2,895 | 1-boot/bootsect.s | !
! SYS_SIZE is the number of clicks (16 bytes) to be loaded.
! 0x3000 is 0x30000 bytes = 196kB, more than enough for current
! versions of linux
!
SYSSIZE = 0x3000
!
! bootsect.s (C) 1991 Linus Torvalds
!
! bootsect.s is loaded at 0x7c00 by the bios-startup routines, and moves
! iself out of the way to address 0x90000, and jumps there.
!
! It then loads 'setup' directly after itself (0x90200), and the system
! at 0x10000, using BIOS interrupts.
!
! NOTE! currently system is at most 8*65536 bytes long. This should be no
! problem, even in the future. I want to keep it simple. This 512 kB
! kernel size should be enough, especially as this doesn't contain the
! buffer cache as in minix
!
! The loader has been made as simple as possible, and continuos
! read errors will result in a unbreakable loop. Reboot by hand. It
! loads pretty fast by getting whole sectors at a time whenever possible.
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
SETUPLEN = 2 ! nr of setup-sectors
BOOTSEG = 0x07c0 ! original address of boot-sector
INITSEG = 0x9000 ! we move boot here - out of the way
SETUPSEG = 0x9020 ! setup starts here
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
ENDSEG = SYSSEG + SYSSIZE ! where to stop loading
! ROOT_DEV: 0x000 - same type of floppy as boot.
! 0x301 - first partition on first drive etc
ROOT_DEV = 0x306
entry _start
_start:
mov ax,#BOOTSEG
mov ds,ax
mov ax,#INITSEG
mov es,ax
mov cx,#256
sub si,si
sub di,di
rep
movw
jmpi go,INITSEG !段间跳转 cs=INITSEG, ip=go
go: mov ax,cs
mov ds,ax
mov es,ax
! put stack at 0x9ff00.
mov ss,ax
mov sp,#0xFF00 ! arbitrary value >>512 (栈指针sp指向远大于512个字节偏移(即地址0x90200)处都可以)
! load the setup-sectors directly after the bootblock.
! Note that 'es' is already set up.
load_setup:
mov dx,#0x0000 ! drive 0, head 0
mov cx,#0x0002 ! sector 2, track 0
mov bx,#0x0200 ! address = 512, in INITSEG
mov ax,#0x0200+SETUPLEN ! service 2, nr of sectors
int 0x13 ! read it
jnc ok_load_setup ! ok - continue
mov dx,#0x0000
mov ax,#0x0000 ! reset the diskette
int 0x13
jmp load_setup
ok_load_setup:
! Print some inane message
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#73
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#msg1 ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
! ok, we've written the message, now
! after that (everyting loaded), we jump to
! the setup-routine loaded directly after
! the bootblock:
jmpi 0,SETUPSEG
sectors:
.word 0
msg1:
.byte 13,10
.ascii "---------------------"
.byte 13,10
.ascii "| QiuOS is booting! |"
.byte 13,10
.ascii "---------------------"
.byte 13,10,13,10
.org 508
root_dev:
.word ROOT_DEV
boot_flag:
.word 0xAA55
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 4,533 | 1-boot/setup.s |
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
SETUPLEN = 2 ! nr of setup-sectors
BOOTSEG = 0x07c0 ! original address of boot-sector
INITSEG = 0x9000 ! we move boot here - out of the way
SETUPSEG = 0x9020 ! setup starts here
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
entry _start
_start:
!设置附加数据段寄存器ES的值指向SETUPSEG，以便可以正常显示字符串数据
mov ax, #SETUPSEG
mov es,ax
! Print some inane message
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#25
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#msg1 ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
! ok, we've written the message, now
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get memory size (extended mem, kB)
mov ah,#0x88
int 0x15
mov [2],ax
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! check for EGA/VGA and some config parameters
mov ah,#0x12
mov bl,#0x10
int 0x10
mov [8],ax
mov [10],bx
mov [12],cx
! Get hd0 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x41]
mov ax,#INITSEG
mov es,ax
mov di,#0x0080
mov cx,#0x10
rep
movsb
! Get hd1 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x46]
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
rep
movsb
! Check that there IS a hd1 :-)
mov ax,#0x01500
mov dl,#0x81
int 0x13
jc no_disk1
cmp ah,#3
je is_disk1
no_disk1:
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
mov ax,#0x00
rep
stosb
is_disk1:
!设置堆栈段寄存器SS，指向0x90000，这里保存了从BIOS读取到的硬件参数
mov ax, #INITSEG
!注意在bootsect.s中已经设置好了堆栈栈寄存器ss和堆栈顶寄存器sp ss=0x90000 sp=0x9ff00
!但这里以防万一，可以再设置下
! put stack at 0x9ff00.
mov ss,ax
mov sp,#0xFF00 ! arbitrary value >>512 (栈指针sp指向远大于512个字节偏移(即地址0x90200)处都可以)
!设置附加数据段寄存器ES的值指向SETUPSEG，以便可以正常显示字符串数据
mov ax, #SETUPSEG
mov es,ax
Print_Cursor:
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#11
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#Cursor ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
mov ax, #0 !set bp = 0x0000
mov bp, ax
call print_hex
call print_nl
Print_Memory:
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#12
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#Memory ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
mov ax, #2 !set bp = 0x0000
mov bp, ax
call print_hex
!显示扩展内存最后的单位"KB"
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#2
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#KB ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
call print_nl
Print_Cyl_hd0:
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#9
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#Cyl_hd0 ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
mov ax, #0x0080 !set bp = 0x0080
mov bp, ax
call print_hex
call print_nl
Print_Head_hd0:
mov ah,#0x03 ! read cursor pos
xor bh,bh ! 页号bh=0
int 0x10
mov cx,#10
mov bx,#0x0007 ! page 0, attribute 7 (normal) 页号BH=0 属性BL=7正常显示
mov bp,#Head_hd0 ! ES:BP要显示的字符串地址
mov ax,#0x1301 ! write string, move cursor AH=13显示字符串 AL=01光标跟随移动
int 0x10
mov ax, #0x0082 !set bp = 0x0082
mov bp, ax
call print_hex
call print_nl
!死循环
dead_loop:
jmp dead_loop
!以16进制方式打印栈顶的16位数
print_hex:
mov cx, #4 !4个十六进制数字
mov dx, (bp) !将(bp)所指的值放入dx中，如果bp是指向栈顶的话
print_digital:
rol dx, #4
mov ax, #0xe0f
and al, dl
add al, #0x30
cmp al, #0x3a
jl outp
add al, #0x07
outp:
int 0x10
loop print_digital
ret
!打印回车换行
print_nl:
mov ax, #0xe0d
int 0x10
mov al, #0xa
int 0x10
ret
msg1:
.byte 13,10
.ascii "Now we are in SETUP"
.byte 13,10,13,10
Cursor:
.ascii "Cursor POS:" !0x90000 2bytes
Memory:
.ascii "Memory SIZE:" !0x90002 2bytes
Cyl_hd0:
.ascii "Cyls_hd0:" !0x90080 2bytes
Head_hd0:
.ascii "Heads_hd0:" !0x90082 1byte
KB:
.ascii "KB"
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 5,926 | exp4_process/system_call.s | /*
* linux/kernel/system_call.s
*
* (C) 1991 Linus Torvalds
*/
/*
* system_call.s contains the system-call low-level handling routines.
* This also contains the timer-interrupt handler, as some of the code is
* the same. The hd- and flopppy-interrupts are also here.
*
* NOTE: This code handles signal-recognition, which happens every time
* after a timer-interrupt and after each system call. Ordinary interrupts
* don't handle signal-recognition, as that would clutter them up totally
* unnecessarily.
*
* Stack layout in 'ret_from_system_call':
*
* 0(%esp) - %eax
* 4(%esp) - %ebx
* 8(%esp) - %ecx
* C(%esp) - %edx
* 10(%esp) - %fs
* 14(%esp) - %es
* 18(%esp) - %ds
* 1C(%esp) - %eip
* 20(%esp) - %cs
* 24(%esp) - %eflags
* 28(%esp) - %oldesp
* 2C(%esp) - %oldss
*/
SIG_CHLD = 17
ESP0 = 4 /* !!! */
KERNEL_STACK = 12
EAX = 0x00
EBX = 0x04
ECX = 0x08
EDX = 0x0C
FS = 0x10
ES = 0x14
DS = 0x18
EIP = 0x1C
CS = 0x20
EFLAGS = 0x24
OLDESP = 0x28
OLDSS = 0x2C
state = 0 # these are offsets into the task-struct.
counter = 4
priority = 8
kernelstack = 12
signal = 16
sigaction = 20 # MUST be 16 (=len of sigaction)
blocked = (37*16)
# offsets within sigaction
sa_handler = 0
sa_mask = 4
sa_flags = 8
sa_restorer = 12
nr_system_calls = 72
/*
* Ok, I get parallel printer interrupts while using the floppy for some
* strange reason. Urgel. Now I just ignore them.
*/
.globl system_call,sys_fork,timer_interrupt,sys_execve
.globl hd_interrupt,floppy_interrupt,parallel_interrupt
.globl device_not_available, coprocessor_error
.globl switch_to
.globl first_return_from_kernel
.align 2
first_return_from_kernel:
popl %edx
popl %edi
popl %esi
pop %gs
pop %fs
pop %es
pop %ds
iret
.align 2
bad_sys_call:
movl $-1,%eax
iret
.align 2
reschedule:
pushl $ret_from_sys_call
jmp schedule
.align 2
system_call:
cmpl $nr_system_calls-1,%eax
ja bad_sys_call
push %ds
push %es
push %fs
pushl %edx
pushl %ecx # push %ebx,%ecx,%edx as parameters
pushl %ebx # to the system call
movl $0x10,%edx # set up ds,es to kernel space
mov %dx,%ds
mov %dx,%es
movl $0x17,%edx # fs points to local data space
mov %dx,%fs
call sys_call_table(,%eax,4)
pushl %eax
movl current,%eax
cmpl $0,state(%eax) # state
jne reschedule
cmpl $0,counter(%eax) # counter
je reschedule
ret_from_sys_call:
movl current,%eax # task[0] cannot have signals
cmpl task,%eax
je 3f
cmpw $0x0f,CS(%esp) # was old code segment supervisor ?
jne 3f
cmpw $0x17,OLDSS(%esp) # was stack segment = 0x17 ?
jne 3f
movl signal(%eax),%ebx
movl blocked(%eax),%ecx
notl %ecx
andl %ebx,%ecx
bsfl %ecx,%ecx
je 3f
btrl %ecx,%ebx
movl %ebx,signal(%eax)
incl %ecx
pushl %ecx
call do_signal
popl %eax
3: popl %eax
popl %ebx
popl %ecx
popl %edx
pop %fs
pop %es
pop %ds
iret
.align 2
coprocessor_error:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
jmp math_error
.align 2
device_not_available:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
clts # clear TS so that we can use math
movl %cr0,%eax
testl $0x4,%eax # EM (math emulation bit)
je math_state_restore
pushl %ebp
pushl %esi
pushl %edi
call math_emulate
popl %edi
popl %esi
popl %ebp
ret
.align 2
timer_interrupt:
push %ds # save ds,es and put kernel data space
push %es # into them. %fs is used by _system_call
push %fs
pushl %edx # we save %eax,%ecx,%edx as gcc doesn't
pushl %ecx # save those across function calls. %ebx
pushl %ebx # is saved as we use that in ret_sys_call
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
incl jiffies
movb $0x20,%al # EOI to interrupt controller #1
outb %al,$0x20
movl CS(%esp),%eax
andl $3,%eax # %eax is CPL (0 or 3, 0=supervisor)
pushl %eax
call do_timer # 'do_timer(long CPL)' does everything from
addl $4,%esp # task switching to accounting ...
jmp ret_from_sys_call
.align 2
sys_execve:
lea EIP(%esp),%eax
pushl %eax
call do_execve
addl $4,%esp
ret
.align 2
sys_fork:
call find_empty_process
testl %eax,%eax
js 1f
push %gs
pushl %esi
pushl %edi
pushl %ebp
pushl %eax
pushl $first_return_from_kernel
call copy_process
addl $24,%esp
1: ret
switch_to:
pushl %ebp
movl %esp,%ebp
pushl %ecx
pushl %ebx
pushl %eax
movl 8(%ebp),%ebx
cmpl %ebx,current
je 1f
movl %ebx,%eax
xchgl %eax,current
movl tss,%ecx
addl $4096,%ebx
movl %ebx,ESP0(%ecx)
movl %esp,KERNEL_STACK(%eax)
movl 8(%ebp),%ebx
movl KERNEL_STACK(%ebx),%esp
movl 12(%ebp),%ecx
lldt %cx
movl $0x17,%ecx
mov %cx,%fs
cmpl %eax,last_task_used_math
jne 1f
clts
1:
popl %eax
popl %ebx
popl %ecx
popl %ebp
ret
hd_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0xA0 # EOI to interrupt controller #1
jmp 1f # give port chance to breathe
1: jmp 1f
1: xorl %edx,%edx
xchgl do_hd,%edx
testl %edx,%edx
jne 1f
movl $unexpected_hd_interrupt,%edx
1: outb %al,$0x20
call *%edx # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
floppy_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0x20 # EOI to interrupt controller #1
xorl %eax,%eax
xchgl do_floppy,%eax
testl %eax,%eax
jne 1f
movl $unexpected_floppy_interrupt,%eax
1: call *%eax # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
parallel_interrupt:
pushl %eax
movb $0x20,%al
outb %al,$0x20
popl %eax
iret
|
Wangzhike/HIT-Linux-0.11 | 5,239 | exp5_semaphore/system_call.s | /*
* linux/kernel/system_call.s
*
* (C) 1991 Linus Torvalds
*/
/*
* system_call.s contains the system-call low-level handling routines.
* This also contains the timer-interrupt handler, as some of the code is
* the same. The hd- and flopppy-interrupts are also here.
*
* NOTE: This code handles signal-recognition, which happens every time
* after a timer-interrupt and after each system call. Ordinary interrupts
* don't handle signal-recognition, as that would clutter them up totally
* unnecessarily.
*
* Stack layout in 'ret_from_system_call':
*
* 0(%esp) - %eax
* 4(%esp) - %ebx
* 8(%esp) - %ecx
* C(%esp) - %edx
* 10(%esp) - %fs
* 14(%esp) - %es
* 18(%esp) - %ds
* 1C(%esp) - %eip
* 20(%esp) - %cs
* 24(%esp) - %eflags
* 28(%esp) - %oldesp
* 2C(%esp) - %oldss
*/
SIG_CHLD = 17
EAX = 0x00
EBX = 0x04
ECX = 0x08
EDX = 0x0C
FS = 0x10
ES = 0x14
DS = 0x18
EIP = 0x1C
CS = 0x20
EFLAGS = 0x24
OLDESP = 0x28
OLDSS = 0x2C
state = 0 # these are offsets into the task-struct.
counter = 4
priority = 8
signal = 12
sigaction = 16 # MUST be 16 (=len of sigaction)
blocked = (33*16)
# offsets within sigaction
sa_handler = 0
sa_mask = 4
sa_flags = 8
sa_restorer = 12
nr_system_calls = 76 /* !!! */
/*
* Ok, I get parallel printer interrupts while using the floppy for some
* strange reason. Urgel. Now I just ignore them.
*/
.globl system_call,sys_fork,timer_interrupt,sys_execve
.globl hd_interrupt,floppy_interrupt,parallel_interrupt
.globl device_not_available, coprocessor_error
.align 2
bad_sys_call:
movl $-1,%eax
iret
.align 2
reschedule:
pushl $ret_from_sys_call
jmp schedule
.align 2
system_call:
cmpl $nr_system_calls-1,%eax
ja bad_sys_call
push %ds
push %es
push %fs
pushl %edx
pushl %ecx # push %ebx,%ecx,%edx as parameters
pushl %ebx # to the system call
movl $0x10,%edx # set up ds,es to kernel space
mov %dx,%ds
mov %dx,%es
movl $0x17,%edx # fs points to local data space
mov %dx,%fs
call sys_call_table(,%eax,4)
pushl %eax
movl current,%eax
cmpl $0,state(%eax) # state
jne reschedule
cmpl $0,counter(%eax) # counter
je reschedule
ret_from_sys_call:
movl current,%eax # task[0] cannot have signals
cmpl task,%eax
je 3f
cmpw $0x0f,CS(%esp) # was old code segment supervisor ?
jne 3f
cmpw $0x17,OLDSS(%esp) # was stack segment = 0x17 ?
jne 3f
movl signal(%eax),%ebx
movl blocked(%eax),%ecx
notl %ecx
andl %ebx,%ecx
bsfl %ecx,%ecx
je 3f
btrl %ecx,%ebx
movl %ebx,signal(%eax)
incl %ecx
pushl %ecx
call do_signal
popl %eax
3: popl %eax
popl %ebx
popl %ecx
popl %edx
pop %fs
pop %es
pop %ds
iret
.align 2
coprocessor_error:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
jmp math_error
.align 2
device_not_available:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
clts # clear TS so that we can use math
movl %cr0,%eax
testl $0x4,%eax # EM (math emulation bit)
je math_state_restore
pushl %ebp
pushl %esi
pushl %edi
call math_emulate
popl %edi
popl %esi
popl %ebp
ret
.align 2
timer_interrupt:
push %ds # save ds,es and put kernel data space
push %es # into them. %fs is used by _system_call
push %fs
pushl %edx # we save %eax,%ecx,%edx as gcc doesn't
pushl %ecx # save those across function calls. %ebx
pushl %ebx # is saved as we use that in ret_sys_call
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
incl jiffies
movb $0x20,%al # EOI to interrupt controller #1
outb %al,$0x20
movl CS(%esp),%eax
andl $3,%eax # %eax is CPL (0 or 3, 0=supervisor)
pushl %eax
call do_timer # 'do_timer(long CPL)' does everything from
addl $4,%esp # task switching to accounting ...
jmp ret_from_sys_call
.align 2
sys_execve:
lea EIP(%esp),%eax
pushl %eax
call do_execve
addl $4,%esp
ret
.align 2
sys_fork:
call find_empty_process
testl %eax,%eax
js 1f
push %gs
pushl %esi
pushl %edi
pushl %ebp
pushl %eax
call copy_process
addl $20,%esp
1: ret
hd_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0xA0 # EOI to interrupt controller #1
jmp 1f # give port chance to breathe
1: jmp 1f
1: xorl %edx,%edx
xchgl do_hd,%edx
testl %edx,%edx
jne 1f
movl $unexpected_hd_interrupt,%edx
1: outb %al,$0x20
call *%edx # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
floppy_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0x20 # EOI to interrupt controller #1
xorl %eax,%eax
xchgl do_floppy,%eax
testl %eax,%eax
jne 1f
movl $unexpected_floppy_interrupt,%eax
1: call *%eax # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
parallel_interrupt:
pushl %eax
movb $0x20,%al
outb %al,$0x20
popl %eax
iret
|
Wangzhike/HIT-Linux-0.11 | 5,473 | 1-boot/linux-0.11/boot/bootsect.s | !
! SYS_SIZE is the number of clicks (16 bytes) to be loaded.
! 0x3000 is 0x30000 bytes = 196kB, more than enough for current
! versions of linux
!
SYSSIZE = 0x3000
!
! bootsect.s (C) 1991 Linus Torvalds
!
! bootsect.s is loaded at 0x7c00 by the bios-startup routines, and moves
! iself out of the way to address 0x90000, and jumps there.
!
! It then loads 'setup' directly after itself (0x90200), and the system
! at 0x10000, using BIOS interrupts.
!
! NOTE! currently system is at most 8*65536 bytes long. This should be no
! problem, even in the future. I want to keep it simple. This 512 kB
! kernel size should be enough, especially as this doesn't contain the
! buffer cache as in minix
!
! The loader has been made as simple as possible, and continuos
! read errors will result in a unbreakable loop. Reboot by hand. It
! loads pretty fast by getting whole sectors at a time whenever possible.
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
SETUPLEN = 4 ! nr of setup-sectors
BOOTSEG = 0x07c0 ! original address of boot-sector
INITSEG = 0x9000 ! we move boot here - out of the way
SETUPSEG = 0x9020 ! setup starts here
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
ENDSEG = SYSSEG + SYSSIZE ! where to stop loading
! ROOT_DEV: 0x000 - same type of floppy as boot.
! 0x301 - first partition on first drive etc
ROOT_DEV = 0x306
entry _start
_start:
mov ax,#BOOTSEG
mov ds,ax
mov ax,#INITSEG
mov es,ax
mov cx,#256
sub si,si
sub di,di
rep
movw
jmpi go,INITSEG
go: mov ax,cs
mov ds,ax
mov es,ax
! put stack at 0x9ff00.
mov ss,ax
mov sp,#0xFF00 ! arbitrary value >>512
! load the setup-sectors directly after the bootblock.
! Note that 'es' is already set up.
load_setup:
mov dx,#0x0000 ! drive 0, head 0
mov cx,#0x0002 ! sector 2, track 0
mov bx,#0x0200 ! address = 512, in INITSEG
mov ax,#0x0200+SETUPLEN ! service 2, nr of sectors
int 0x13 ! read it
jnc ok_load_setup ! ok - continue
mov dx,#0x0000
mov ax,#0x0000 ! reset the diskette
int 0x13
j load_setup
ok_load_setup:
! Get disk drive parameters, specifically nr of sectors/track
mov dl,#0x00
mov ax,#0x0800 ! AH=8 is get drive parameters
int 0x13
mov ch,#0x00
seg cs
mov sectors,cx
mov ax,#INITSEG
mov es,ax
! Print some inane message
call read_cursor
mov cx,#2
mov bx,#0x0007 ! page 0, attribute 7 (normal, white color)
mov bp,#msg1
mov ax,#0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #6
mov bx, #0x0009 ! page 0, attribute 9(bright blue color)
mov bp, #msg1+2
mov ax, #0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #18
mov bx, #0x0007 ! page 0, attribute 7(normal, white color)
mov bp, #msg1+8
mov ax, #0x1301 ! write string, move cursor
int 0x10
! ok, we've written the message, now
! we want to load the system (at 0x10000)
mov ax,#SYSSEG
mov es,ax ! segment of 0x010000
call read_it
call kill_motor
! After that we check which root-device to use. If the device is
! defined (!= 0), nothing is done and the given device is used.
! Otherwise, either /dev/PS0 (2,28) or /dev/at0 (2,8), depending
! on the number of sectors that the BIOS reports currently.
seg cs
mov ax,root_dev
cmp ax,#0
jne root_defined
seg cs
mov bx,sectors
mov ax,#0x0208 ! /dev/ps0 - 1.2Mb
cmp bx,#15
je root_defined
mov ax,#0x021c ! /dev/PS0 - 1.44Mb
cmp bx,#18
je root_defined
undef_root:
jmp undef_root
root_defined:
seg cs
mov root_dev,ax
! after that (everyting loaded), we jump to
! the setup-routine loaded directly after
! the bootblock:
jmpi 0,SETUPSEG
! This routine loads the system at address 0x10000, making sure
! no 64kB boundaries are crossed. We try to load it as fast as
! possible, loading whole tracks whenever we can.
!
! in: es - starting address segment (normally 0x1000)
!
sread: .word 1+SETUPLEN ! sectors read of current track
head: .word 0 ! current head
track: .word 0 ! current track
read_it:
mov ax,es
test ax,#0x0fff
die: jne die ! es must be at 64kB boundary
xor bx,bx ! bx is starting address within segment
rp_read:
mov ax,es
cmp ax,#ENDSEG ! have we loaded all yet?
jb ok1_read
ret
ok1_read:
seg cs
mov ax,sectors
sub ax,sread
mov cx,ax
shl cx,#9
add cx,bx
jnc ok2_read
je ok2_read
xor ax,ax
sub ax,bx
shr ax,#9
ok2_read:
call read_track
mov cx,ax
add ax,sread
seg cs
cmp ax,sectors
jne ok3_read
mov ax,#1
sub ax,head
jne ok4_read
inc track
ok4_read:
mov head,ax
xor ax,ax
ok3_read:
mov sread,ax
shl cx,#9
add bx,cx
jnc rp_read
mov ax,es
add ax,#0x1000
mov es,ax
xor bx,bx
jmp rp_read
read_track:
push ax
push bx
push cx
push dx
mov dx,track
mov cx,sread
inc cx
mov ch,dl
mov dx,head
mov dh,dl
mov dl,#0
and dx,#0x0100
mov ah,#2
int 0x13
jc bad_rt
pop dx
pop cx
pop bx
pop ax
ret
bad_rt: mov ax,#0
mov dx,#0
int 0x13
pop dx
pop cx
pop bx
pop ax
jmp read_track
read_cursor:
push ax
push bx
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10
pop bx
pop ax
ret
!/*
! * This procedure turns off the floppy drive motor, so
! * that we enter the kernel in a known state, and
! * don't have to worry about it later.
! */
kill_motor:
push dx
mov dx,#0x3f2
mov al,#0
outb
pop dx
ret
sectors:
.word 0
msg1:
.byte 13,10
.ascii "Qiunix is loading..."
.byte 13,10,13,10
.org 508
root_dev:
.word ROOT_DEV
boot_flag:
.word 0xAA55
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 8,626 | 1-boot/linux-0.11/boot/setup.s | !
! setup.s (C) 1991 Linus Torvalds
!
! setup.s is responsible for getting the system data from the BIOS,
! and putting them into the appropriate places in system memory.
! both setup.s and system has been loaded by the bootblock.
!
! This code asks the bios for memory/disk/other parameters, and
! puts them in a "safe" place: 0x90000-0x901FF, ie where the
! boot-block used to be. It is then up to the protected mode
! system to read them from there before the area is overwritten
! for buffer-blocks.
!
! NOTE! These had better be the same as in bootsect.s!
INITSEG = 0x9000 ! we move boot here - out of the way
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
SETUPSEG = 0x9020 ! this is the current segment
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
entry start
start:
! repeat set stack, although it is done in bootsect.s
mov ax, #INITSEG
mov ss, ax
mov sp, #0xFF00
! now we are in setup ,print the message.
mov ax, #SETUPSEG
mov es, ax
call read_cursor
mov cx, #14
mov bx, #0x0007 ! page 0, attribute 10(bright green)
mov bp, #msg
mov ax, #0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #5
mov bx, #0x000a ! page 0, attribute 7(normal, white color)
mov bp, #msg+14
mov ax, #0x1301
int 0x10
call print_nl
call print_nl
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get memory size (extended mem, kB)
mov ax, #INITSEG ! this is done in bootsect already, but...
mov ds, ax
mov ah,#0x88
int 0x15
mov [2],ax
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! check for EGA/VGA and some config parameters
mov ah,#0x12
mov bl,#0x10
int 0x10
mov [8],ax
mov [10],bx
mov [12],cx
! Get hd0 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x41]
mov ax,#INITSEG
mov es,ax
mov di,#0x0080
mov cx,#0x10
rep
movsb
! Get hd1 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x46]
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
rep
movsb
! Check that there IS a hd1 :-)
mov ax,#0x01500
mov dl,#0x81
int 0x13
jc no_disk1
cmp ah,#3
je is_disk1
no_disk1:
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
mov ax,#0x00
rep
stosb
is_disk1:
! now, we have read some system parameters, print thees parameters.
mov ax, #INITSEG
mov ds, ax
mov ax, #SETUPSEG
mov es, ax
! print cursor position
call read_cursor
mov cx, #17
mov bx, #0x000a ! page 0, attribute 10(normal, bright gren color)
mov bp, #cursor
mov ax, #0x1301
int 0x10
mov bp, #0x0000
call print_hex
call print_nl
! print memory size
call read_cursor
mov cx, #13
mov bx, #0x000a ! page 0, attribue 10(normal, bright green color)
mov bp, #memory
mov ax, #0x1301
int 0x10
mov ax, [2]
add ax, #1024
mov memsize, ax
mov bp, #memsize
call print_hex
call read_cursor
mov cx, #2
mov bx, #0x0007
mov bp, #memory+13
mov ax, #0x1301
int 0x10
call print_nl
! print hd0 cylinders
call read_cursor
mov cx, #15
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #cylinder
mov ax, #0x1301
int 0x10
call read_cursor
mov bp, #0x0080
call print_hex
call print_nl
! print hd0 heads
call read_cursor
mov cx, #11
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #head
mov ax, #0x1301
int 0x10
mov bp, #0x0082
call print_hex
call print_nl
! print hd0 sectors
call read_cursor
mov cx, #13
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #sector
mov ax, #0x1301
int 0x10
mov bp, #0x008E
call print_hex
call print_nl
call print_nl
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! now we want to move to protected mode ...
cli ! no interrupts allowed !
! first we move the system to it's rightful place
mov ax,#0x0000
cld ! 'direction'=0, movs moves forward
do_move:
mov es,ax ! destination segment
add ax,#0x1000
cmp ax,#0x9000
jz end_move
mov ds,ax ! source segment
sub di,di
sub si,si
mov cx,#0x8000
rep
movsw
jmp do_move
! then we load the segment descriptors
end_move:
mov ax,#SETUPSEG ! right, forgot this at first. didn't work :-)
mov ds,ax
lidt idt_48 ! load idt with 0,0
lgdt gdt_48 ! load gdt with whatever appropriate
! that was painless, now we enable A20
call empty_8042
mov al,#0xD1 ! command write
out #0x64,al
call empty_8042
mov al,#0xDF ! A20 on
out #0x60,al
call empty_8042
! well, that went ok, I hope. Now we have to reprogram the interrupts :-(
! we put them right after the intel-reserved hardware interrupts, at
! int 0x20-0x2F. There they won't mess up anything. Sadly IBM really
! messed this up with the original PC, and they haven't been able to
! rectify it afterwards. Thus the bios puts interrupts at 0x08-0x0f,
! which is used for the internal hardware interrupts as well. We just
! have to reprogram the 8259's, and it isn't fun.
mov al,#0x11 ! initialization sequence
out #0x20,al ! send it to 8259A-1
.word 0x00eb,0x00eb ! jmp $+2, jmp $+2
out #0xA0,al ! and to 8259A-2
.word 0x00eb,0x00eb
mov al,#0x20 ! start of hardware int's (0x20)
out #0x21,al
.word 0x00eb,0x00eb
mov al,#0x28 ! start of hardware int's 2 (0x28)
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0x04 ! 8259-1 is master
out #0x21,al
.word 0x00eb,0x00eb
mov al,#0x02 ! 8259-2 is slave
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0x01 ! 8086 mode for both
out #0x21,al
.word 0x00eb,0x00eb
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0xFF ! mask off all interrupts for now
out #0x21,al
.word 0x00eb,0x00eb
out #0xA1,al
! well, that certainly wasn't fun :-(. Hopefully it works, and we don't
! need no steenking BIOS anyway (except for the initial loading :-).
! The BIOS-routine wants lots of unnecessary data, and it's less
! "interesting" anyway. This is how REAL programmers do it.
!
! Well, now's the time to actually move into protected mode. To make
! things as simple as possible, we do no register set-up or anything,
! we let the gnu-compiled 32-bit programs do that. We just jump to
! absolute address 0x00000, in 32-bit protected mode.
mov ax,#0x0001 ! protected mode (PE) bit
lmsw ax ! This is it!
jmpi 0,8 ! jmp offset 0 of segment 8 (cs)
! This routine checks that the keyboard command queue is empty
! No timeout is used - if this hangs there is something wrong with
! the machine, and we probably couldn't proceed anyway.
empty_8042:
.word 0x00eb,0x00eb
in al,#0x64 ! 8042 status port
test al,#2 ! is input buffer full?
jnz empty_8042 ! yes - loop
ret
!以16进制方式打印栈顶的16位数
print_hex:
push ax
push bx
push cx
push dx
mov ax, #0x0e30 ! 0
int 0x10
mov ax, #0x0e78 ! x
int 0x10
mov cx, #4
mov dx, (bp)
print_digit:
rol dx, #4
mov ax, #0x0e0f
mov bl, #0x0f ! bright green color
and al, dl
add al,#0x30
cmp al, #0x3a
jl outp ! if less,是一个不大于9的数字
add al, #0x07 ! 是a~f，要加7
outp:
int 0x10
loop print_digit
pop dx
pop cx
pop bx
pop ax
ret
print_nl:
push ax
push bx
mov ax, #0x0e0d ! CR
int 0x10
mov ax, #0x0e0A ! LR
int 0x10
pop bx
pop ax
ret
read_cursor:
push ax
push bx
push cx
mov ah, #0x03 ! read cursor pos
xor bh, bh
int 0x10
pop cx
pop bx
pop ax
ret
gdt:
.word 0,0,0,0 ! dummy
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9A00 ! code read/exec
.word 0x00C0 ! granularity=4096, 386
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9200 ! data read/write
.word 0x00C0 ! granularity=4096, 386
idt_48:
.word 0 ! idt limit=0
.word 0,0 ! idt base=0L
gdt_48:
.word 0x800 ! gdt limit=2048, 256 GDT entries
.word 512+gdt,0x9 ! gdt base = 0X9xxxx
msg:
.ascii "Now we are in SETUP"
cursor:
.ascii "Cursor Position: "
.ascii "KB"
memory:
.ascii "Memory Size: KB"
cylinder:
.ascii "HD0 cylinders: "
head:
.ascii "HD0 heads: "
sector:
.ascii "HD0 sectors: "
memsize:
.word 0x0000
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 5,938 | 1-boot/linux-0.11/boot/head.s | /*
* linux/boot/head.s
*
* (C) 1991 Linus Torvalds
*/
/*
* head.s contains the 32-bit startup code.
*
* NOTE!!! Startup happens at absolute address 0x00000000, which is also where
* the page directory will exist. The startup code will be overwritten by
* the page directory.
*/
.text
.globl idt,gdt,pg_dir,tmp_floppy_area
pg_dir:
.globl startup_32
startup_32:
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
lss stack_start,%esp
call setup_idt
call setup_gdt
movl $0x10,%eax # reload all the segment registers
mov %ax,%ds # after changing gdt. CS was already
mov %ax,%es # reloaded in 'setup_gdt'
mov %ax,%fs
mov %ax,%gs
lss stack_start,%esp
xorl %eax,%eax
1: incl %eax # check that A20 really IS enabled
movl %eax,0x000000 # loop forever if it isn't
cmpl %eax,0x100000
je 1b
/*
* NOTE! 486 should set bit 16, to check for write-protect in supervisor
* mode. Then it would be unnecessary with the "verify_area()"-calls.
* 486 users probably want to set the NE (#5) bit also, so as to use
* int 16 for math errors.
*/
movl %cr0,%eax # check math chip
andl $0x80000011,%eax # Save PG,PE,ET
/* "orl $0x10020,%eax" here for 486 might be good */
orl $2,%eax # set MP
movl %eax,%cr0
call check_x87
jmp after_page_tables
/*
* We depend on ET to be correct. This checks for 287/387.
*/
check_x87:
fninit
fstsw %ax
cmpb $0,%al
je 1f /* no coprocessor: have to set bits */
movl %cr0,%eax
xorl $6,%eax /* reset MP, set EM */
movl %eax,%cr0
ret
.align 2
1: .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
ret
/*
* setup_idt
*
* sets up a idt with 256 entries pointing to
* ignore_int, interrupt gates. It then loads
* idt. Everything that wants to install itself
* in the idt-table may do so themselves. Interrupts
* are enabled elsewhere, when we can be relatively
* sure everything is ok. This routine will be over-
* written by the page tables.
*/
setup_idt:
lea ignore_int,%edx
movl $0x00080000,%eax
movw %dx,%ax /* selector = 0x0008 = cs */
movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
lea idt,%edi
mov $256,%ecx
rp_sidt:
movl %eax,(%edi)
movl %edx,4(%edi)
addl $8,%edi
dec %ecx
jne rp_sidt
lidt idt_descr
ret
/*
* setup_gdt
*
* This routines sets up a new gdt and loads it.
* Only two entries are currently built, the same
* ones that were built in init.s. The routine
* is VERY complicated at two whole lines, so this
* rather long comment is certainly needed :-).
* This routine will beoverwritten by the page tables.
*/
setup_gdt:
lgdt gdt_descr
ret
/*
* I put the kernel page tables right after the page directory,
* using 4 of them to span 16 Mb of physical memory. People with
* more than 16MB will have to expand this.
*/
.org 0x1000
pg0:
.org 0x2000
pg1:
.org 0x3000
pg2:
.org 0x4000
pg3:
.org 0x5000
/*
* tmp_floppy_area is used by the floppy-driver when DMA cannot
* reach to a buffer-block. It needs to be aligned, so that it isn't
* on a 64kB border.
*/
tmp_floppy_area:
.fill 1024,1,0
after_page_tables:
pushl $0 # These are the parameters to main :-)
pushl $0
pushl $0
pushl $L6 # return address for main, if it decides to.
pushl $main
jmp setup_paging
L6:
jmp L6 # main should never return here, but
# just in case, we know what happens.
/* This is the default interrupt "handler" :-) */
int_msg:
.asciz "Unknown interrupt\n\r"
.align 2
ignore_int:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
pushl $int_msg
call printk
popl %eax
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
/*
* Setup_paging
*
* This routine sets up paging by setting the page bit
* in cr0. The page tables are set up, identity-mapping
* the first 16MB. The pager assumes that no illegal
* addresses are produced (ie >4Mb on a 4Mb machine).
*
* NOTE! Although all physical memory should be identity
* mapped by this routine, only the kernel page functions
* use the >1Mb addresses directly. All "normal" functions
* use just the lower 1Mb, or the local data space, which
* will be mapped to some other place - mm keeps track of
* that.
*
* For those with more memory than 16 Mb - tough luck. I've
* not got it, why should you :-) The source is here. Change
* it. (Seriously - it shouldn't be too difficult. Mostly
* change some constants etc. I left it at 16Mb, as my machine
* even cannot be extended past that (ok, but it was cheap :-)
* I've tried to show which constants to change by having
* some kind of marker at them (search for "16Mb"), but I
* won't guarantee that's all :-( )
*/
.align 2
setup_paging:
movl $1024*5,%ecx /* 5 pages - pg_dir+4 page tables */
xorl %eax,%eax
xorl %edi,%edi /* pg_dir is at 0x000 */
cld;rep;stosl
movl $pg0+7,pg_dir /* set present bit/user r/w */
movl $pg1+7,pg_dir+4 /* --------- " " --------- */
movl $pg2+7,pg_dir+8 /* --------- " " --------- */
movl $pg3+7,pg_dir+12 /* --------- " " --------- */
movl $pg3+4092,%edi
movl $0xfff007,%eax /* 16Mb - 4096 + 7 (r/w user,p) */
std
1: stosl /* fill pages backwards - more efficient :-) */
subl $0x1000,%eax
jge 1b
xorl %eax,%eax /* pg_dir is at 0x0000 */
movl %eax,%cr3 /* cr3 - page directory start */
movl %cr0,%eax
orl $0x80000000,%eax
movl %eax,%cr0 /* set paging (PG) bit */
ret /* this also flushes prefetch-queue */
.align 2
.word 0
idt_descr:
.word 256*8-1 # idt contains 256 entries
.long idt
.align 2
.word 0
gdt_descr:
.word 256*8-1 # so does gdt (not that that's any
.long gdt # magic number, but it works for me :^)
.align 8
idt: .fill 256,8,0 # idt is uninitialized
gdt: .quad 0x0000000000000000 /* NULL descriptor */
.quad 0x00c09a0000000fff /* 16Mb */
.quad 0x00c0920000000fff /* 16Mb */
.quad 0x0000000000000000 /* TEMPORARY - don't use */
.fill 252,8,0 /* space for LDT's and TSS's etc */
|
Wangzhike/HIT-Linux-0.11 | 5,229 | 1-boot/linux-0.11/kernel/system_call.s | /*
* linux/kernel/system_call.s
*
* (C) 1991 Linus Torvalds
*/
/*
* system_call.s contains the system-call low-level handling routines.
* This also contains the timer-interrupt handler, as some of the code is
* the same. The hd- and flopppy-interrupts are also here.
*
* NOTE: This code handles signal-recognition, which happens every time
* after a timer-interrupt and after each system call. Ordinary interrupts
* don't handle signal-recognition, as that would clutter them up totally
* unnecessarily.
*
* Stack layout in 'ret_from_system_call':
*
* 0(%esp) - %eax
* 4(%esp) - %ebx
* 8(%esp) - %ecx
* C(%esp) - %edx
* 10(%esp) - %fs
* 14(%esp) - %es
* 18(%esp) - %ds
* 1C(%esp) - %eip
* 20(%esp) - %cs
* 24(%esp) - %eflags
* 28(%esp) - %oldesp
* 2C(%esp) - %oldss
*/
SIG_CHLD = 17
EAX = 0x00
EBX = 0x04
ECX = 0x08
EDX = 0x0C
FS = 0x10
ES = 0x14
DS = 0x18
EIP = 0x1C
CS = 0x20
EFLAGS = 0x24
OLDESP = 0x28
OLDSS = 0x2C
state = 0 # these are offsets into the task-struct.
counter = 4
priority = 8
signal = 12
sigaction = 16 # MUST be 16 (=len of sigaction)
blocked = (33*16)
# offsets within sigaction
sa_handler = 0
sa_mask = 4
sa_flags = 8
sa_restorer = 12
nr_system_calls = 72
/*
* Ok, I get parallel printer interrupts while using the floppy for some
* strange reason. Urgel. Now I just ignore them.
*/
.globl system_call,sys_fork,timer_interrupt,sys_execve
.globl hd_interrupt,floppy_interrupt,parallel_interrupt
.globl device_not_available, coprocessor_error
.align 2
bad_sys_call:
movl $-1,%eax
iret
.align 2
reschedule:
pushl $ret_from_sys_call
jmp schedule
.align 2
system_call:
cmpl $nr_system_calls-1,%eax
ja bad_sys_call
push %ds
push %es
push %fs
pushl %edx
pushl %ecx # push %ebx,%ecx,%edx as parameters
pushl %ebx # to the system call
movl $0x10,%edx # set up ds,es to kernel space
mov %dx,%ds
mov %dx,%es
movl $0x17,%edx # fs points to local data space
mov %dx,%fs
call sys_call_table(,%eax,4)
pushl %eax
movl current,%eax
cmpl $0,state(%eax) # state
jne reschedule
cmpl $0,counter(%eax) # counter
je reschedule
ret_from_sys_call:
movl current,%eax # task[0] cannot have signals
cmpl task,%eax
je 3f
cmpw $0x0f,CS(%esp) # was old code segment supervisor ?
jne 3f
cmpw $0x17,OLDSS(%esp) # was stack segment = 0x17 ?
jne 3f
movl signal(%eax),%ebx
movl blocked(%eax),%ecx
notl %ecx
andl %ebx,%ecx
bsfl %ecx,%ecx
je 3f
btrl %ecx,%ebx
movl %ebx,signal(%eax)
incl %ecx
pushl %ecx
call do_signal
popl %eax
3: popl %eax
popl %ebx
popl %ecx
popl %edx
pop %fs
pop %es
pop %ds
iret
.align 2
coprocessor_error:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
jmp math_error
.align 2
device_not_available:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
clts # clear TS so that we can use math
movl %cr0,%eax
testl $0x4,%eax # EM (math emulation bit)
je math_state_restore
pushl %ebp
pushl %esi
pushl %edi
call math_emulate
popl %edi
popl %esi
popl %ebp
ret
.align 2
timer_interrupt:
push %ds # save ds,es and put kernel data space
push %es # into them. %fs is used by _system_call
push %fs
pushl %edx # we save %eax,%ecx,%edx as gcc doesn't
pushl %ecx # save those across function calls. %ebx
pushl %ebx # is saved as we use that in ret_sys_call
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
incl jiffies
movb $0x20,%al # EOI to interrupt controller #1
outb %al,$0x20
movl CS(%esp),%eax
andl $3,%eax # %eax is CPL (0 or 3, 0=supervisor)
pushl %eax
call do_timer # 'do_timer(long CPL)' does everything from
addl $4,%esp # task switching to accounting ...
jmp ret_from_sys_call
.align 2
sys_execve:
lea EIP(%esp),%eax
pushl %eax
call do_execve
addl $4,%esp
ret
.align 2
sys_fork:
call find_empty_process
testl %eax,%eax
js 1f
push %gs
pushl %esi
pushl %edi
pushl %ebp
pushl %eax
call copy_process
addl $20,%esp
1: ret
hd_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0xA0 # EOI to interrupt controller #1
jmp 1f # give port chance to breathe
1: jmp 1f
1: xorl %edx,%edx
xchgl do_hd,%edx
testl %edx,%edx
jne 1f
movl $unexpected_hd_interrupt,%edx
1: outb %al,$0x20
call *%edx # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
floppy_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0x20 # EOI to interrupt controller #1
xorl %eax,%eax
xchgl do_floppy,%eax
testl %eax,%eax
jne 1f
movl $unexpected_floppy_interrupt,%eax
1: call *%eax # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
parallel_interrupt:
pushl %eax
movb $0x20,%al
outb %al,$0x20
popl %eax
iret
|
Wangzhike/HIT-Linux-0.11 | 2,289 | 1-boot/linux-0.11/kernel/asm.s | /*
* linux/kernel/asm.s
*
* (C) 1991 Linus Torvalds
*/
/*
* asm.s contains the low-level code for most hardware faults.
* page_exception is handled by the mm, so that isn't here. This
* file also handles (hopefully) fpu-exceptions due to TS-bit, as
* the fpu must be properly saved/resored. This hasn't been tested.
*/
.globl divide_error,debug,nmi,int3,overflow,bounds,invalid_op
.globl double_fault,coprocessor_segment_overrun
.globl invalid_TSS,segment_not_present,stack_segment
.globl general_protection,coprocessor_error,irq13,reserved
divide_error:
pushl $do_divide_error
no_error_code:
xchgl %eax,(%esp)
pushl %ebx
pushl %ecx
pushl %edx
pushl %edi
pushl %esi
pushl %ebp
push %ds
push %es
push %fs
pushl $0 # "error code"
lea 44(%esp),%edx
pushl %edx
movl $0x10,%edx
mov %dx,%ds
mov %dx,%es
mov %dx,%fs
call *%eax
addl $8,%esp
pop %fs
pop %es
pop %ds
popl %ebp
popl %esi
popl %edi
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
debug:
pushl $do_int3 # _do_debug
jmp no_error_code
nmi:
pushl $do_nmi
jmp no_error_code
int3:
pushl $do_int3
jmp no_error_code
overflow:
pushl $do_overflow
jmp no_error_code
bounds:
pushl $do_bounds
jmp no_error_code
invalid_op:
pushl $do_invalid_op
jmp no_error_code
coprocessor_segment_overrun:
pushl $do_coprocessor_segment_overrun
jmp no_error_code
reserved:
pushl $do_reserved
jmp no_error_code
irq13:
pushl %eax
xorb %al,%al
outb %al,$0xF0
movb $0x20,%al
outb %al,$0x20
jmp 1f
1: jmp 1f
1: outb %al,$0xA0
popl %eax
jmp coprocessor_error
double_fault:
pushl $do_double_fault
error_code:
xchgl %eax,4(%esp) # error code <-> %eax
xchgl %ebx,(%esp) # &function <-> %ebx
pushl %ecx
pushl %edx
pushl %edi
pushl %esi
pushl %ebp
push %ds
push %es
push %fs
pushl %eax # error code
lea 44(%esp),%eax # offset
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
call *%ebx
addl $8,%esp
pop %fs
pop %es
pop %ds
popl %ebp
popl %esi
popl %edi
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
invalid_TSS:
pushl $do_invalid_TSS
jmp error_code
segment_not_present:
pushl $do_segment_not_present
jmp error_code
stack_segment:
pushl $do_stack_segment
jmp error_code
general_protection:
pushl $do_general_protection
jmp error_code
|
Wangzhike/HIT-Linux-0.11 | 2,710 | 1-boot/linux-0.11/kernel/chr_drv/rs_io.s | /*
* linux/kernel/rs_io.s
*
* (C) 1991 Linus Torvalds
*/
/*
* rs_io.s
*
* This module implements the rs232 io interrupts.
*/
.text
.globl rs1_interrupt,rs2_interrupt
size = 1024 /* must be power of two !
and must match the value
in tty_io.c!!! */
/* these are the offsets into the read/write buffer structures */
rs_addr = 0
head = 4
tail = 8
proc_list = 12
buf = 16
startup = 256 /* chars left in write queue when we restart it */
/*
* These are the actual interrupt routines. They look where
* the interrupt is coming from, and take appropriate action.
*/
.align 2
rs1_interrupt:
pushl $table_list+8
jmp rs_int
.align 2
rs2_interrupt:
pushl $table_list+16
rs_int:
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
push %es
push %ds /* as this is an interrupt, we cannot */
pushl $0x10 /* know that bs is ok. Load it */
pop %ds
pushl $0x10
pop %es
movl 24(%esp),%edx
movl (%edx),%edx
movl rs_addr(%edx),%edx
addl $2,%edx /* interrupt ident. reg */
rep_int:
xorl %eax,%eax
inb %dx,%al
testb $1,%al
jne end
cmpb $6,%al /* this shouldn't happen, but ... */
ja end
movl 24(%esp),%ecx
pushl %edx
subl $2,%edx
call jmp_table(,%eax,2) /* NOTE! not *4, bit0 is 0 already */
popl %edx
jmp rep_int
end: movb $0x20,%al
outb %al,$0x20 /* EOI */
pop %ds
pop %es
popl %eax
popl %ebx
popl %ecx
popl %edx
addl $4,%esp # jump over _table_list entry
iret
jmp_table:
.long modem_status,write_char,read_char,line_status
.align 2
modem_status:
addl $6,%edx /* clear intr by reading modem status reg */
inb %dx,%al
ret
.align 2
line_status:
addl $5,%edx /* clear intr by reading line status reg. */
inb %dx,%al
ret
.align 2
read_char:
inb %dx,%al
movl %ecx,%edx
subl $table_list,%edx
shrl $3,%edx
movl (%ecx),%ecx # read-queue
movl head(%ecx),%ebx
movb %al,buf(%ecx,%ebx)
incl %ebx
andl $size-1,%ebx
cmpl tail(%ecx),%ebx
je 1f
movl %ebx,head(%ecx)
1: pushl %edx
call do_tty_interrupt
addl $4,%esp
ret
.align 2
write_char:
movl 4(%ecx),%ecx # write-queue
movl head(%ecx),%ebx
subl tail(%ecx),%ebx
andl $size-1,%ebx # nr chars in queue
je write_buffer_empty
cmpl $startup,%ebx
ja 1f
movl proc_list(%ecx),%ebx # wake up sleeping process
testl %ebx,%ebx # is there any?
je 1f
movl $0,(%ebx)
1: movl tail(%ecx),%ebx
movb buf(%ecx,%ebx),%al
outb %al,%dx
incl %ebx
andl $size-1,%ebx
movl %ebx,tail(%ecx)
cmpl head(%ecx),%ebx
je write_buffer_empty
ret
.align 2
write_buffer_empty:
movl proc_list(%ecx),%ebx # wake up sleeping process
testl %ebx,%ebx # is there any?
je 1f
movl $0,(%ebx)
1: incl %edx
inb %dx,%al
jmp 1f
1: jmp 1f
1: andb $0xd,%al /* disable transmit interrupt */
outb %al,%dx
ret
|
Wangzhike/HIT-Linux-0.11 | 12,774 | 1-boot/linux-0.11/kernel/chr_drv/keyboard.S | /*
* linux/kernel/keyboard.S
*
* (C) 1991 Linus Torvalds
*/
/*
* Thanks to Alfred Leung for US keyboard patches
* Wolfgang Thiel for German keyboard patches
* Marc Corsini for the French keyboard
*/
#include <linux/config.h>
.text
.globl keyboard_interrupt
/*
* these are for the keyboard read functions
*/
size = 1024 /* must be a power of two ! And MUST be the same
as in tty_io.c !!!! */
head = 4
tail = 8
proc_list = 12
buf = 16
mode: .byte 0 /* caps, alt, ctrl and shift mode */
leds: .byte 2 /* num-lock, caps, scroll-lock mode (nom-lock on) */
e0: .byte 0
/*
* con_int is the real interrupt routine that reads the
* keyboard scan-code and converts it into the appropriate
* ascii character(s).
*/
keyboard_interrupt:
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
push %ds
push %es
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
xor %al,%al /* %eax is scan code */
inb $0x60,%al
cmpb $0xe0,%al
je set_e0
cmpb $0xe1,%al
je set_e1
call key_table(,%eax,4)
movb $0,e0
e0_e1: inb $0x61,%al
jmp 1f
1: jmp 1f
1: orb $0x80,%al
jmp 1f
1: jmp 1f
1: outb %al,$0x61
jmp 1f
1: jmp 1f
1: andb $0x7F,%al
outb %al,$0x61
movb $0x20,%al
outb %al,$0x20
pushl $0
call do_tty_interrupt
addl $4,%esp
pop %es
pop %ds
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
set_e0: movb $1,e0
jmp e0_e1
set_e1: movb $2,e0
jmp e0_e1
/*
* This routine fills the buffer with max 8 bytes, taken from
* %ebx:%eax. (%edx is high). The bytes are written in the
* order %al,%ah,%eal,%eah,%bl,%bh ... until %eax is zero.
*/
put_queue:
pushl %ecx
pushl %edx
movl table_list,%edx # read-queue for console
movl head(%edx),%ecx
1: movb %al,buf(%edx,%ecx)
incl %ecx
andl $size-1,%ecx
cmpl tail(%edx),%ecx # buffer full - discard everything
je 3f
shrdl $8,%ebx,%eax
je 2f
shrl $8,%ebx
jmp 1b
2: movl %ecx,head(%edx)
movl proc_list(%edx),%ecx
testl %ecx,%ecx
je 3f
movl $0,(%ecx)
3: popl %edx
popl %ecx
ret
ctrl: movb $0x04,%al
jmp 1f
alt: movb $0x10,%al
1: cmpb $0,e0
je 2f
addb %al,%al
2: orb %al,mode
ret
unctrl: movb $0x04,%al
jmp 1f
unalt: movb $0x10,%al
1: cmpb $0,e0
je 2f
addb %al,%al
2: notb %al
andb %al,mode
ret
lshift:
orb $0x01,mode
ret
unlshift:
andb $0xfe,mode
ret
rshift:
orb $0x02,mode
ret
unrshift:
andb $0xfd,mode
ret
caps: testb $0x80,mode
jne 1f
xorb $4,leds
xorb $0x40,mode
orb $0x80,mode
set_leds:
call kb_wait
movb $0xed,%al /* set leds command */
outb %al,$0x60
call kb_wait
movb leds,%al
outb %al,$0x60
ret
uncaps: andb $0x7f,mode
ret
scroll:
xorb $1,leds
jmp set_leds
num: xorb $2,leds
jmp set_leds
/*
* curosr-key/numeric keypad cursor keys are handled here.
* checking for numeric keypad etc.
*/
cursor:
subb $0x47,%al
jb 1f
cmpb $12,%al
ja 1f
jne cur2 /* check for ctrl-alt-del */
testb $0x0c,mode
je cur2
testb $0x30,mode
jne reboot
cur2: cmpb $0x01,e0 /* e0 forces cursor movement */
je cur
testb $0x02,leds /* not num-lock forces cursor */
je cur
testb $0x03,mode /* shift forces cursor */
jne cur
xorl %ebx,%ebx
movb num_table(%eax),%al
jmp put_queue
1: ret
cur: movb cur_table(%eax),%al
cmpb $'9,%al
ja ok_cur
movb $'~,%ah
ok_cur: shll $16,%eax
movw $0x5b1b,%ax
xorl %ebx,%ebx
jmp put_queue
#if defined(KBD_FR)
num_table:
.ascii "789 456 1230."
#else
num_table:
.ascii "789 456 1230,"
#endif
cur_table:
.ascii "HA5 DGC YB623"
/*
* this routine handles function keys
*/
func:
pushl %eax
pushl %ecx
pushl %edx
call show_stat
popl %edx
popl %ecx
popl %eax
subb $0x3B,%al
jb end_func
cmpb $9,%al
jbe ok_func
subb $18,%al
cmpb $10,%al
jb end_func
cmpb $11,%al
ja end_func
ok_func:
cmpl $4,%ecx /* check that there is enough room */
jl end_func
movl func_table(,%eax,4),%eax
xorl %ebx,%ebx
jmp put_queue
end_func:
ret
/*
* function keys send F1:'esc [ [ A' F2:'esc [ [ B' etc.
*/
func_table:
.long 0x415b5b1b,0x425b5b1b,0x435b5b1b,0x445b5b1b
.long 0x455b5b1b,0x465b5b1b,0x475b5b1b,0x485b5b1b
.long 0x495b5b1b,0x4a5b5b1b,0x4b5b5b1b,0x4c5b5b1b
#if defined(KBD_FINNISH)
key_map:
.byte 0,27
.ascii "1234567890+'"
.byte 127,9
.ascii "qwertyuiop}"
.byte 0,13,0
.ascii "asdfghjkl|{"
.byte 0,0
.ascii "'zxcvbnm,.-"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '<
.fill 10,1,0
shift_map:
.byte 0,27
.ascii "!\"#$%&/()=?`"
.byte 127,9
.ascii "QWERTYUIOP]^"
.byte 13,0
.ascii "ASDFGHJKL\\["
.byte 0,0
.ascii "*ZXCVBNM;:_"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '>
.fill 10,1,0
alt_map:
.byte 0,0
.ascii "\0@\0$\0\0{[]}\\\0"
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte '~,13,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0,0,0 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte 0,0,0,0,0 /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '|
.fill 10,1,0
#elif defined(KBD_US)
key_map:
.byte 0,27
.ascii "1234567890-="
.byte 127,9
.ascii "qwertyuiop[]"
.byte 13,0
.ascii "asdfghjkl;'"
.byte '`,0
.ascii "\\zxcvbnm,./"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '<
.fill 10,1,0
shift_map:
.byte 0,27
.ascii "!@#$%^&*()_+"
.byte 127,9
.ascii "QWERTYUIOP{}"
.byte 13,0
.ascii "ASDFGHJKL:\""
.byte '~,0
.ascii "|ZXCVBNM<>?"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '>
.fill 10,1,0
alt_map:
.byte 0,0
.ascii "\0@\0$\0\0{[]}\\\0"
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte '~,13,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0,0,0 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte 0,0,0,0,0 /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '|
.fill 10,1,0
#elif defined(KBD_GR)
key_map:
.byte 0,27
.ascii "1234567890\\'"
.byte 127,9
.ascii "qwertzuiop@+"
.byte 13,0
.ascii "asdfghjkl[]^"
.byte 0,'#
.ascii "yxcvbnm,.-"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '<
.fill 10,1,0
shift_map:
.byte 0,27
.ascii "!\"#$%&/()=?`"
.byte 127,9
.ascii "QWERTZUIOP\\*"
.byte 13,0
.ascii "ASDFGHJKL{}~"
.byte 0,''
.ascii "YXCVBNM;:_"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '>
.fill 10,1,0
alt_map:
.byte 0,0
.ascii "\0@\0$\0\0{[]}\\\0"
.byte 0,0
.byte '@,0,0,0,0,0,0,0,0,0,0
.byte '~,13,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0,0,0 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte 0,0,0,0,0 /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '|
.fill 10,1,0
#elif defined(KBD_FR)
key_map:
.byte 0,27
.ascii "&{\"'(-}_/@)="
.byte 127,9
.ascii "azertyuiop^$"
.byte 13,0
.ascii "qsdfghjklm|"
.byte '`,0,42 /* coin sup gauche, don't know, [*|mu] */
.ascii "wxcvbn,;:!"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '<
.fill 10,1,0
shift_map:
.byte 0,27
.ascii "1234567890]+"
.byte 127,9
.ascii "AZERTYUIOP<>"
.byte 13,0
.ascii "QSDFGHJKLM%"
.byte '~,0,'#
.ascii "WXCVBN?./\\"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte '-,0,0,0,'+ /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '>
.fill 10,1,0
alt_map:
.byte 0,0
.ascii "\0~#{[|`\\^@]}"
.byte 0,0
.byte '@,0,0,0,0,0,0,0,0,0,0
.byte '~,13,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0,0,0 /* 36-39 */
.fill 16,1,0 /* 3A-49 */
.byte 0,0,0,0,0 /* 4A-4E */
.byte 0,0,0,0,0,0,0 /* 4F-55 */
.byte '|
.fill 10,1,0
#else
#error "KBD-type not defined"
#endif
/*
* do_self handles "normal" keys, ie keys that don't change meaning
* and which have just one character returns.
*/
do_self:
lea alt_map,%ebx
testb $0x20,mode /* alt-gr */
jne 1f
lea shift_map,%ebx
testb $0x03,mode
jne 1f
lea key_map,%ebx
1: movb (%ebx,%eax),%al
orb %al,%al
je none
testb $0x4c,mode /* ctrl or caps */
je 2f
cmpb $'a,%al
jb 2f
cmpb $'},%al
ja 2f
subb $32,%al
2: testb $0x0c,mode /* ctrl */
je 3f
cmpb $64,%al
jb 3f
cmpb $64+32,%al
jae 3f
subb $64,%al
3: testb $0x10,mode /* left alt */
je 4f
orb $0x80,%al
4: andl $0xff,%eax
xorl %ebx,%ebx
call put_queue
none: ret
/*
* minus has a routine of it's own, as a 'E0h' before
* the scan code for minus means that the numeric keypad
* slash was pushed.
*/
minus: cmpb $1,e0
jne do_self
movl $'/,%eax
xorl %ebx,%ebx
jmp put_queue
/*
* This table decides which routine to call when a scan-code has been
* gotten. Most routines just call do_self, or none, depending if
* they are make or break.
*/
key_table:
.long none,do_self,do_self,do_self /* 00-03 s0 esc 1 2 */
.long do_self,do_self,do_self,do_self /* 04-07 3 4 5 6 */
.long do_self,do_self,do_self,do_self /* 08-0B 7 8 9 0 */
.long do_self,do_self,do_self,do_self /* 0C-0F + ' bs tab */
.long do_self,do_self,do_self,do_self /* 10-13 q w e r */
.long do_self,do_self,do_self,do_self /* 14-17 t y u i */
.long do_self,do_self,do_self,do_self /* 18-1B o p } ^ */
.long do_self,ctrl,do_self,do_self /* 1C-1F enter ctrl a s */
.long do_self,do_self,do_self,do_self /* 20-23 d f g h */
.long do_self,do_self,do_self,do_self /* 24-27 j k l | */
.long do_self,do_self,lshift,do_self /* 28-2B { para lshift , */
.long do_self,do_self,do_self,do_self /* 2C-2F z x c v */
.long do_self,do_self,do_self,do_self /* 30-33 b n m , */
.long do_self,minus,rshift,do_self /* 34-37 . - rshift * */
.long alt,do_self,caps,func /* 38-3B alt sp caps f1 */
.long func,func,func,func /* 3C-3F f2 f3 f4 f5 */
.long func,func,func,func /* 40-43 f6 f7 f8 f9 */
.long func,num,scroll,cursor /* 44-47 f10 num scr home */
.long cursor,cursor,do_self,cursor /* 48-4B up pgup - left */
.long cursor,cursor,do_self,cursor /* 4C-4F n5 right + end */
.long cursor,cursor,cursor,cursor /* 50-53 dn pgdn ins del */
.long none,none,do_self,func /* 54-57 sysreq ? < f11 */
.long func,none,none,none /* 58-5B f12 ? ? ? */
.long none,none,none,none /* 5C-5F ? ? ? ? */
.long none,none,none,none /* 60-63 ? ? ? ? */
.long none,none,none,none /* 64-67 ? ? ? ? */
.long none,none,none,none /* 68-6B ? ? ? ? */
.long none,none,none,none /* 6C-6F ? ? ? ? */
.long none,none,none,none /* 70-73 ? ? ? ? */
.long none,none,none,none /* 74-77 ? ? ? ? */
.long none,none,none,none /* 78-7B ? ? ? ? */
.long none,none,none,none /* 7C-7F ? ? ? ? */
.long none,none,none,none /* 80-83 ? br br br */
.long none,none,none,none /* 84-87 br br br br */
.long none,none,none,none /* 88-8B br br br br */
.long none,none,none,none /* 8C-8F br br br br */
.long none,none,none,none /* 90-93 br br br br */
.long none,none,none,none /* 94-97 br br br br */
.long none,none,none,none /* 98-9B br br br br */
.long none,unctrl,none,none /* 9C-9F br unctrl br br */
.long none,none,none,none /* A0-A3 br br br br */
.long none,none,none,none /* A4-A7 br br br br */
.long none,none,unlshift,none /* A8-AB br br unlshift br */
.long none,none,none,none /* AC-AF br br br br */
.long none,none,none,none /* B0-B3 br br br br */
.long none,none,unrshift,none /* B4-B7 br br unrshift br */
.long unalt,none,uncaps,none /* B8-BB unalt br uncaps br */
.long none,none,none,none /* BC-BF br br br br */
.long none,none,none,none /* C0-C3 br br br br */
.long none,none,none,none /* C4-C7 br br br br */
.long none,none,none,none /* C8-CB br br br br */
.long none,none,none,none /* CC-CF br br br br */
.long none,none,none,none /* D0-D3 br br br br */
.long none,none,none,none /* D4-D7 br br br br */
.long none,none,none,none /* D8-DB br ? ? ? */
.long none,none,none,none /* DC-DF ? ? ? ? */
.long none,none,none,none /* E0-E3 e0 e1 ? ? */
.long none,none,none,none /* E4-E7 ? ? ? ? */
.long none,none,none,none /* E8-EB ? ? ? ? */
.long none,none,none,none /* EC-EF ? ? ? ? */
.long none,none,none,none /* F0-F3 ? ? ? ? */
.long none,none,none,none /* F4-F7 ? ? ? ? */
.long none,none,none,none /* F8-FB ? ? ? ? */
.long none,none,none,none /* FC-FF ? ? ? ? */
/*
* kb_wait waits for the keyboard controller buffer to empty.
* there is no timeout - if the buffer doesn't empty, we hang.
*/
kb_wait:
pushl %eax
1: inb $0x64,%al
testb $0x02,%al
jne 1b
popl %eax
ret
/*
* This routine reboots the machine by asking the keyboard
* controller to pulse the reset-line low.
*/
reboot:
call kb_wait
movw $0x1234,0x472 /* don't do memory check */
movb $0xfc,%al /* pulse reset and A20 low */
outb %al,$0x64
die: jmp die
|
Wangzhike/HIT-Linux-0.11 | 6,672 | 1-boot/linux-0.11/kernel/chr_drv/keyboard.s | # 1 "keyboard.S"
# 1 "/home/qiuyu/oslab/linux-0.11/kernel/chr_drv//"
# 1 "<built-in>"
# 1 "<command line>"
# 1 "keyboard.S"
# 1 "../../include/linux/config.h" 1
# 36 "../../include/linux/config.h"
# 47 "../../include/linux/config.h"
# 14 "keyboard.S" 2
.text
.globl keyboard_interrupt
size = 1024
head = 4
tail = 8
proc_list = 12
buf = 16
mode: .byte 0
leds: .byte 2
e0: .byte 0
keyboard_interrupt:
pushl %eax
pushl %ebx
pushl %ecx
pushl %edx
push %ds
push %es
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
xor %al,%al
inb $0x60,%al
cmpb $0xe0,%al
je set_e0
cmpb $0xe1,%al
je set_e1
call key_table(,%eax,4)
movb $0,e0
e0_e1: inb $0x61,%al
jmp 1f
1: jmp 1f
1: orb $0x80,%al
jmp 1f
1: jmp 1f
1: outb %al,$0x61
jmp 1f
1: jmp 1f
1: andb $0x7F,%al
outb %al,$0x61
movb $0x20,%al
outb %al,$0x20
pushl $0
call do_tty_interrupt
addl $4,%esp
pop %es
pop %ds
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
set_e0: movb $1,e0
jmp e0_e1
set_e1: movb $2,e0
jmp e0_e1
put_queue:
pushl %ecx
pushl %edx
movl table_list,%edx # read-queue for console
movl head(%edx),%ecx
1: movb %al,buf(%edx,%ecx)
incl %ecx
andl $size-1,%ecx
cmpl tail(%edx),%ecx # buffer full - discard everything
je 3f
shrdl $8,%ebx,%eax
je 2f
shrl $8,%ebx
jmp 1b
2: movl %ecx,head(%edx)
movl proc_list(%edx),%ecx
testl %ecx,%ecx
je 3f
movl $0,(%ecx)
3: popl %edx
popl %ecx
ret
ctrl: movb $0x04,%al
jmp 1f
alt: movb $0x10,%al
1: cmpb $0,e0
je 2f
addb %al,%al
2: orb %al,mode
ret
unctrl: movb $0x04,%al
jmp 1f
unalt: movb $0x10,%al
1: cmpb $0,e0
je 2f
addb %al,%al
2: notb %al
andb %al,mode
ret
lshift:
orb $0x01,mode
ret
unlshift:
andb $0xfe,mode
ret
rshift:
orb $0x02,mode
ret
unrshift:
andb $0xfd,mode
ret
caps: testb $0x80,mode
jne 1f
xorb $4,leds
xorb $0x40,mode
orb $0x80,mode
set_leds:
call kb_wait
movb $0xed,%al
outb %al,$0x60
call kb_wait
movb leds,%al
outb %al,$0x60
ret
uncaps: andb $0x7f,mode
ret
scroll:
xorb $1,leds
jmp set_leds
num: xorb $2,leds
jmp set_leds
cursor:
subb $0x47,%al
jb 1f
cmpb $12,%al
ja 1f
jne cur2
testb $0x0c,mode
je cur2
testb $0x30,mode
jne reboot
cur2: cmpb $0x01,e0
je cur
testb $0x02,leds
je cur
testb $0x03,mode
jne cur
xorl %ebx,%ebx
movb num_table(%eax),%al
jmp put_queue
1: ret
cur: movb cur_table(%eax),%al
cmpb $'9,%al
ja ok_cur
movb $'~,%ah
ok_cur: shll $16,%eax
movw $0x5b1b,%ax
xorl %ebx,%ebx
jmp put_queue
num_table:
.ascii "789 456 1230,"
cur_table:
.ascii "HA5 DGC YB623"
func:
pushl %eax
pushl %ecx
pushl %edx
call show_stat
popl %edx
popl %ecx
popl %eax
subb $0x3B,%al
jb end_func
cmpb $9,%al
jbe ok_func
subb $18,%al
cmpb $10,%al
jb end_func
cmpb $11,%al
ja end_func
ok_func:
cmpl $4,%ecx
jl end_func
movl func_table(,%eax,4),%eax
xorl %ebx,%ebx
jmp put_queue
end_func:
ret
func_table:
.long 0x415b5b1b,0x425b5b1b,0x435b5b1b,0x445b5b1b
.long 0x455b5b1b,0x465b5b1b,0x475b5b1b,0x485b5b1b
.long 0x495b5b1b,0x4a5b5b1b,0x4b5b5b1b,0x4c5b5b1b
# 294 "keyboard.S"
key_map:
.byte 0,27
.ascii "1234567890-="
.byte 127,9
.ascii "qwertyuiop[]"
.byte 13,0
.ascii "asdfghjkl;'"
.byte '`,0
.ascii "\\zxcvbnm,./"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0
.byte '-,0,0,0,'+
.byte 0,0,0,0,0,0,0
.byte '<
.fill 10,1,0
shift_map:
.byte 0,27
.ascii "!@#$%^&*()_+"
.byte 127,9
.ascii "QWERTYUIOP{}"
.byte 13,0
.ascii "ASDFGHJKL:\""
.byte '~,0
.ascii "|ZXCVBNM<>?"
.byte 0,'*,0,32 /* 36-39 */
.fill 16,1,0
.byte '-,0,0,0,'+
.byte 0,0,0,0,0,0,0
.byte '>
.fill 10,1,0
alt_map:
.byte 0,0
.ascii "\0@\0$\0\0{[]}\\\0"
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte '~,13,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0
.byte 0,0,0,0,0,0,0,0,0,0,0
.byte 0,0,0,0
.fill 16,1,0
.byte 0,0,0,0,0
.byte 0,0,0,0,0,0,0
.byte '|
.fill 10,1,0
# 449 "keyboard.S"
do_self:
lea alt_map,%ebx
testb $0x20,mode
jne 1f
lea shift_map,%ebx
testb $0x03,mode
jne 1f
lea key_map,%ebx
1: movb (%ebx,%eax),%al
orb %al,%al
je none
testb $0x4c,mode
je 2f
cmpb $'a,%al
jb 2f
cmpb $'},%al
ja 2f
subb $32,%al
2: testb $0x0c,mode
je 3f
cmpb $64,%al
jb 3f
cmpb $64+32,%al
jae 3f
subb $64,%al
3: testb $0x10,mode
je 4f
orb $0x80,%al
4: andl $0xff,%eax
xorl %ebx,%ebx
call put_queue
none: ret
minus: cmpb $1,e0
jne do_self
movl $'/,%eax
xorl %ebx,%ebx
jmp put_queue
key_table:
.long none,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,ctrl,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,lshift,do_self
.long do_self,do_self,do_self,do_self
.long do_self,do_self,do_self,do_self
.long do_self,minus,rshift,do_self
.long alt,do_self,caps,func
.long func,func,func,func
.long func,func,func,func
.long func,num,scroll,cursor
.long cursor,cursor,do_self,cursor
.long cursor,cursor,do_self,cursor
.long cursor,cursor,cursor,cursor
.long none,none,do_self,func
.long func,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,unctrl,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,unlshift,none
.long none,none,none,none
.long none,none,none,none
.long none,none,unrshift,none
.long unalt,none,uncaps,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
.long none,none,none,none
kb_wait:
pushl %eax
1: inb $0x64,%al
testb $0x02,%al
jne 1b
popl %eax
ret
reboot:
call kb_wait
movw $0x1234,0x472
movb $0xfc,%al
outb %al,$0x64
die: jmp die
|
Wangzhike/HIT-Linux-0.11 | 5,473 | linux-0.11/boot/bootsect.s | !
! SYS_SIZE is the number of clicks (16 bytes) to be loaded.
! 0x3000 is 0x30000 bytes = 196kB, more than enough for current
! versions of linux
!
SYSSIZE = 0x3000
!
! bootsect.s (C) 1991 Linus Torvalds
!
! bootsect.s is loaded at 0x7c00 by the bios-startup routines, and moves
! iself out of the way to address 0x90000, and jumps there.
!
! It then loads 'setup' directly after itself (0x90200), and the system
! at 0x10000, using BIOS interrupts.
!
! NOTE! currently system is at most 8*65536 bytes long. This should be no
! problem, even in the future. I want to keep it simple. This 512 kB
! kernel size should be enough, especially as this doesn't contain the
! buffer cache as in minix
!
! The loader has been made as simple as possible, and continuos
! read errors will result in a unbreakable loop. Reboot by hand. It
! loads pretty fast by getting whole sectors at a time whenever possible.
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
SETUPLEN = 4 ! nr of setup-sectors
BOOTSEG = 0x07c0 ! original address of boot-sector
INITSEG = 0x9000 ! we move boot here - out of the way
SETUPSEG = 0x9020 ! setup starts here
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
ENDSEG = SYSSEG + SYSSIZE ! where to stop loading
! ROOT_DEV: 0x000 - same type of floppy as boot.
! 0x301 - first partition on first drive etc
ROOT_DEV = 0x306
entry _start
_start:
mov ax,#BOOTSEG
mov ds,ax
mov ax,#INITSEG
mov es,ax
mov cx,#256
sub si,si
sub di,di
rep
movw
jmpi go,INITSEG
go: mov ax,cs
mov ds,ax
mov es,ax
! put stack at 0x9ff00.
mov ss,ax
mov sp,#0xFF00 ! arbitrary value >>512
! load the setup-sectors directly after the bootblock.
! Note that 'es' is already set up.
load_setup:
mov dx,#0x0000 ! drive 0, head 0
mov cx,#0x0002 ! sector 2, track 0
mov bx,#0x0200 ! address = 512, in INITSEG
mov ax,#0x0200+SETUPLEN ! service 2, nr of sectors
int 0x13 ! read it
jnc ok_load_setup ! ok - continue
mov dx,#0x0000
mov ax,#0x0000 ! reset the diskette
int 0x13
j load_setup
ok_load_setup:
! Get disk drive parameters, specifically nr of sectors/track
mov dl,#0x00
mov ax,#0x0800 ! AH=8 is get drive parameters
int 0x13
mov ch,#0x00
seg cs
mov sectors,cx
mov ax,#INITSEG
mov es,ax
! Print some inane message
call read_cursor
mov cx,#2
mov bx,#0x0007 ! page 0, attribute 7 (normal, white color)
mov bp,#msg1
mov ax,#0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #6
mov bx, #0x0009 ! page 0, attribute 9(bright blue color)
mov bp, #msg1+2
mov ax, #0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #18
mov bx, #0x0007 ! page 0, attribute 7(normal, white color)
mov bp, #msg1+8
mov ax, #0x1301 ! write string, move cursor
int 0x10
! ok, we've written the message, now
! we want to load the system (at 0x10000)
mov ax,#SYSSEG
mov es,ax ! segment of 0x010000
call read_it
call kill_motor
! After that we check which root-device to use. If the device is
! defined (!= 0), nothing is done and the given device is used.
! Otherwise, either /dev/PS0 (2,28) or /dev/at0 (2,8), depending
! on the number of sectors that the BIOS reports currently.
seg cs
mov ax,root_dev
cmp ax,#0
jne root_defined
seg cs
mov bx,sectors
mov ax,#0x0208 ! /dev/ps0 - 1.2Mb
cmp bx,#15
je root_defined
mov ax,#0x021c ! /dev/PS0 - 1.44Mb
cmp bx,#18
je root_defined
undef_root:
jmp undef_root
root_defined:
seg cs
mov root_dev,ax
! after that (everyting loaded), we jump to
! the setup-routine loaded directly after
! the bootblock:
jmpi 0,SETUPSEG
! This routine loads the system at address 0x10000, making sure
! no 64kB boundaries are crossed. We try to load it as fast as
! possible, loading whole tracks whenever we can.
!
! in: es - starting address segment (normally 0x1000)
!
sread: .word 1+SETUPLEN ! sectors read of current track
head: .word 0 ! current head
track: .word 0 ! current track
read_it:
mov ax,es
test ax,#0x0fff
die: jne die ! es must be at 64kB boundary
xor bx,bx ! bx is starting address within segment
rp_read:
mov ax,es
cmp ax,#ENDSEG ! have we loaded all yet?
jb ok1_read
ret
ok1_read:
seg cs
mov ax,sectors
sub ax,sread
mov cx,ax
shl cx,#9
add cx,bx
jnc ok2_read
je ok2_read
xor ax,ax
sub ax,bx
shr ax,#9
ok2_read:
call read_track
mov cx,ax
add ax,sread
seg cs
cmp ax,sectors
jne ok3_read
mov ax,#1
sub ax,head
jne ok4_read
inc track
ok4_read:
mov head,ax
xor ax,ax
ok3_read:
mov sread,ax
shl cx,#9
add bx,cx
jnc rp_read
mov ax,es
add ax,#0x1000
mov es,ax
xor bx,bx
jmp rp_read
read_track:
push ax
push bx
push cx
push dx
mov dx,track
mov cx,sread
inc cx
mov ch,dl
mov dx,head
mov dh,dl
mov dl,#0
and dx,#0x0100
mov ah,#2
int 0x13
jc bad_rt
pop dx
pop cx
pop bx
pop ax
ret
bad_rt: mov ax,#0
mov dx,#0
int 0x13
pop dx
pop cx
pop bx
pop ax
jmp read_track
read_cursor:
push ax
push bx
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10
pop bx
pop ax
ret
!/*
! * This procedure turns off the floppy drive motor, so
! * that we enter the kernel in a known state, and
! * don't have to worry about it later.
! */
kill_motor:
push dx
mov dx,#0x3f2
mov al,#0
outb
pop dx
ret
sectors:
.word 0
msg1:
.byte 13,10
.ascii "Qiunix is loading..."
.byte 13,10,13,10
.org 508
root_dev:
.word ROOT_DEV
boot_flag:
.word 0xAA55
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 8,626 | linux-0.11/boot/setup.s | !
! setup.s (C) 1991 Linus Torvalds
!
! setup.s is responsible for getting the system data from the BIOS,
! and putting them into the appropriate places in system memory.
! both setup.s and system has been loaded by the bootblock.
!
! This code asks the bios for memory/disk/other parameters, and
! puts them in a "safe" place: 0x90000-0x901FF, ie where the
! boot-block used to be. It is then up to the protected mode
! system to read them from there before the area is overwritten
! for buffer-blocks.
!
! NOTE! These had better be the same as in bootsect.s!
INITSEG = 0x9000 ! we move boot here - out of the way
SYSSEG = 0x1000 ! system loaded at 0x10000 (65536).
SETUPSEG = 0x9020 ! this is the current segment
.globl begtext, begdata, begbss, endtext, enddata, endbss
.text
begtext:
.data
begdata:
.bss
begbss:
.text
entry start
start:
! repeat set stack, although it is done in bootsect.s
mov ax, #INITSEG
mov ss, ax
mov sp, #0xFF00
! now we are in setup ,print the message.
mov ax, #SETUPSEG
mov es, ax
call read_cursor
mov cx, #14
mov bx, #0x0007 ! page 0, attribute 10(bright green)
mov bp, #msg
mov ax, #0x1301 ! write string, move cursor
int 0x10
call read_cursor
mov cx, #5
mov bx, #0x000a ! page 0, attribute 7(normal, white color)
mov bp, #msg+14
mov ax, #0x1301
int 0x10
call print_nl
call print_nl
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get memory size (extended mem, kB)
mov ax, #INITSEG ! this is done in bootsect already, but...
mov ds, ax
mov ah,#0x88
int 0x15
mov [2],ax
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! check for EGA/VGA and some config parameters
mov ah,#0x12
mov bl,#0x10
int 0x10
mov [8],ax
mov [10],bx
mov [12],cx
! Get hd0 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x41]
mov ax,#INITSEG
mov es,ax
mov di,#0x0080
mov cx,#0x10
rep
movsb
! Get hd1 data
mov ax,#0x0000
mov ds,ax
lds si,[4*0x46]
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
rep
movsb
! Check that there IS a hd1 :-)
mov ax,#0x01500
mov dl,#0x81
int 0x13
jc no_disk1
cmp ah,#3
je is_disk1
no_disk1:
mov ax,#INITSEG
mov es,ax
mov di,#0x0090
mov cx,#0x10
mov ax,#0x00
rep
stosb
is_disk1:
! now, we have read some system parameters, print thees parameters.
mov ax, #INITSEG
mov ds, ax
mov ax, #SETUPSEG
mov es, ax
! print cursor position
call read_cursor
mov cx, #17
mov bx, #0x000a ! page 0, attribute 10(normal, bright gren color)
mov bp, #cursor
mov ax, #0x1301
int 0x10
mov bp, #0x0000
call print_hex
call print_nl
! print memory size
call read_cursor
mov cx, #13
mov bx, #0x000a ! page 0, attribue 10(normal, bright green color)
mov bp, #memory
mov ax, #0x1301
int 0x10
mov ax, [2]
add ax, #1024
mov memsize, ax
mov bp, #memsize
call print_hex
call read_cursor
mov cx, #2
mov bx, #0x0007
mov bp, #memory+13
mov ax, #0x1301
int 0x10
call print_nl
! print hd0 cylinders
call read_cursor
mov cx, #15
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #cylinder
mov ax, #0x1301
int 0x10
call read_cursor
mov bp, #0x0080
call print_hex
call print_nl
! print hd0 heads
call read_cursor
mov cx, #11
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #head
mov ax, #0x1301
int 0x10
mov bp, #0x0082
call print_hex
call print_nl
! print hd0 sectors
call read_cursor
mov cx, #13
mov bx, #0x000a ! page 0, attribute 10(normal, bright green color)
mov bp, #sector
mov ax, #0x1301
int 0x10
mov bp, #0x008E
call print_hex
call print_nl
call print_nl
! ok, the read went well so we get current cursor position and save it for
! posterity.
mov ax,#INITSEG ! this is done in bootsect already, but...
mov ds,ax
mov ah,#0x03 ! read cursor pos
xor bh,bh
int 0x10 ! save it in known place, con_init fetches
mov [0],dx ! it from 0x90000.
! Get video-card data:
mov ah,#0x0f
int 0x10
mov [4],bx ! bh = display page
mov [6],ax ! al = video mode, ah = window width
! now we want to move to protected mode ...
cli ! no interrupts allowed !
! first we move the system to it's rightful place
mov ax,#0x0000
cld ! 'direction'=0, movs moves forward
do_move:
mov es,ax ! destination segment
add ax,#0x1000
cmp ax,#0x9000
jz end_move
mov ds,ax ! source segment
sub di,di
sub si,si
mov cx,#0x8000
rep
movsw
jmp do_move
! then we load the segment descriptors
end_move:
mov ax,#SETUPSEG ! right, forgot this at first. didn't work :-)
mov ds,ax
lidt idt_48 ! load idt with 0,0
lgdt gdt_48 ! load gdt with whatever appropriate
! that was painless, now we enable A20
call empty_8042
mov al,#0xD1 ! command write
out #0x64,al
call empty_8042
mov al,#0xDF ! A20 on
out #0x60,al
call empty_8042
! well, that went ok, I hope. Now we have to reprogram the interrupts :-(
! we put them right after the intel-reserved hardware interrupts, at
! int 0x20-0x2F. There they won't mess up anything. Sadly IBM really
! messed this up with the original PC, and they haven't been able to
! rectify it afterwards. Thus the bios puts interrupts at 0x08-0x0f,
! which is used for the internal hardware interrupts as well. We just
! have to reprogram the 8259's, and it isn't fun.
mov al,#0x11 ! initialization sequence
out #0x20,al ! send it to 8259A-1
.word 0x00eb,0x00eb ! jmp $+2, jmp $+2
out #0xA0,al ! and to 8259A-2
.word 0x00eb,0x00eb
mov al,#0x20 ! start of hardware int's (0x20)
out #0x21,al
.word 0x00eb,0x00eb
mov al,#0x28 ! start of hardware int's 2 (0x28)
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0x04 ! 8259-1 is master
out #0x21,al
.word 0x00eb,0x00eb
mov al,#0x02 ! 8259-2 is slave
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0x01 ! 8086 mode for both
out #0x21,al
.word 0x00eb,0x00eb
out #0xA1,al
.word 0x00eb,0x00eb
mov al,#0xFF ! mask off all interrupts for now
out #0x21,al
.word 0x00eb,0x00eb
out #0xA1,al
! well, that certainly wasn't fun :-(. Hopefully it works, and we don't
! need no steenking BIOS anyway (except for the initial loading :-).
! The BIOS-routine wants lots of unnecessary data, and it's less
! "interesting" anyway. This is how REAL programmers do it.
!
! Well, now's the time to actually move into protected mode. To make
! things as simple as possible, we do no register set-up or anything,
! we let the gnu-compiled 32-bit programs do that. We just jump to
! absolute address 0x00000, in 32-bit protected mode.
mov ax,#0x0001 ! protected mode (PE) bit
lmsw ax ! This is it!
jmpi 0,8 ! jmp offset 0 of segment 8 (cs)
! This routine checks that the keyboard command queue is empty
! No timeout is used - if this hangs there is something wrong with
! the machine, and we probably couldn't proceed anyway.
empty_8042:
.word 0x00eb,0x00eb
in al,#0x64 ! 8042 status port
test al,#2 ! is input buffer full?
jnz empty_8042 ! yes - loop
ret
!以16进制方式打印栈顶的16位数
print_hex:
push ax
push bx
push cx
push dx
mov ax, #0x0e30 ! 0
int 0x10
mov ax, #0x0e78 ! x
int 0x10
mov cx, #4
mov dx, (bp)
print_digit:
rol dx, #4
mov ax, #0x0e0f
mov bl, #0x0f ! bright green color
and al, dl
add al,#0x30
cmp al, #0x3a
jl outp ! if less,是一个不大于9的数字
add al, #0x07 ! 是a~f，要加7
outp:
int 0x10
loop print_digit
pop dx
pop cx
pop bx
pop ax
ret
print_nl:
push ax
push bx
mov ax, #0x0e0d ! CR
int 0x10
mov ax, #0x0e0A ! LR
int 0x10
pop bx
pop ax
ret
read_cursor:
push ax
push bx
push cx
mov ah, #0x03 ! read cursor pos
xor bh, bh
int 0x10
pop cx
pop bx
pop ax
ret
gdt:
.word 0,0,0,0 ! dummy
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9A00 ! code read/exec
.word 0x00C0 ! granularity=4096, 386
.word 0x07FF ! 8Mb - limit=2047 (2048*4096=8Mb)
.word 0x0000 ! base address=0
.word 0x9200 ! data read/write
.word 0x00C0 ! granularity=4096, 386
idt_48:
.word 0 ! idt limit=0
.word 0,0 ! idt base=0L
gdt_48:
.word 0x800 ! gdt limit=2048, 256 GDT entries
.word 512+gdt,0x9 ! gdt base = 0X9xxxx
msg:
.ascii "Now we are in SETUP"
cursor:
.ascii "Cursor Position: "
.ascii "KB"
memory:
.ascii "Memory Size: KB"
cylinder:
.ascii "HD0 cylinders: "
head:
.ascii "HD0 heads: "
sector:
.ascii "HD0 sectors: "
memsize:
.word 0x0000
.text
endtext:
.data
enddata:
.bss
endbss:
|
Wangzhike/HIT-Linux-0.11 | 5,938 | linux-0.11/boot/head.s | /*
* linux/boot/head.s
*
* (C) 1991 Linus Torvalds
*/
/*
* head.s contains the 32-bit startup code.
*
* NOTE!!! Startup happens at absolute address 0x00000000, which is also where
* the page directory will exist. The startup code will be overwritten by
* the page directory.
*/
.text
.globl idt,gdt,pg_dir,tmp_floppy_area
pg_dir:
.globl startup_32
startup_32:
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
mov %ax,%gs
lss stack_start,%esp
call setup_idt
call setup_gdt
movl $0x10,%eax # reload all the segment registers
mov %ax,%ds # after changing gdt. CS was already
mov %ax,%es # reloaded in 'setup_gdt'
mov %ax,%fs
mov %ax,%gs
lss stack_start,%esp
xorl %eax,%eax
1: incl %eax # check that A20 really IS enabled
movl %eax,0x000000 # loop forever if it isn't
cmpl %eax,0x100000
je 1b
/*
* NOTE! 486 should set bit 16, to check for write-protect in supervisor
* mode. Then it would be unnecessary with the "verify_area()"-calls.
* 486 users probably want to set the NE (#5) bit also, so as to use
* int 16 for math errors.
*/
movl %cr0,%eax # check math chip
andl $0x80000011,%eax # Save PG,PE,ET
/* "orl $0x10020,%eax" here for 486 might be good */
orl $2,%eax # set MP
movl %eax,%cr0
call check_x87
jmp after_page_tables
/*
* We depend on ET to be correct. This checks for 287/387.
*/
check_x87:
fninit
fstsw %ax
cmpb $0,%al
je 1f /* no coprocessor: have to set bits */
movl %cr0,%eax
xorl $6,%eax /* reset MP, set EM */
movl %eax,%cr0
ret
.align 2
1: .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
ret
/*
* setup_idt
*
* sets up a idt with 256 entries pointing to
* ignore_int, interrupt gates. It then loads
* idt. Everything that wants to install itself
* in the idt-table may do so themselves. Interrupts
* are enabled elsewhere, when we can be relatively
* sure everything is ok. This routine will be over-
* written by the page tables.
*/
setup_idt:
lea ignore_int,%edx
movl $0x00080000,%eax
movw %dx,%ax /* selector = 0x0008 = cs */
movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
lea idt,%edi
mov $256,%ecx
rp_sidt:
movl %eax,(%edi)
movl %edx,4(%edi)
addl $8,%edi
dec %ecx
jne rp_sidt
lidt idt_descr
ret
/*
* setup_gdt
*
* This routines sets up a new gdt and loads it.
* Only two entries are currently built, the same
* ones that were built in init.s. The routine
* is VERY complicated at two whole lines, so this
* rather long comment is certainly needed :-).
* This routine will beoverwritten by the page tables.
*/
setup_gdt:
lgdt gdt_descr
ret
/*
* I put the kernel page tables right after the page directory,
* using 4 of them to span 16 Mb of physical memory. People with
* more than 16MB will have to expand this.
*/
.org 0x1000
pg0:
.org 0x2000
pg1:
.org 0x3000
pg2:
.org 0x4000
pg3:
.org 0x5000
/*
* tmp_floppy_area is used by the floppy-driver when DMA cannot
* reach to a buffer-block. It needs to be aligned, so that it isn't
* on a 64kB border.
*/
tmp_floppy_area:
.fill 1024,1,0
after_page_tables:
pushl $0 # These are the parameters to main :-)
pushl $0
pushl $0
pushl $L6 # return address for main, if it decides to.
pushl $main
jmp setup_paging
L6:
jmp L6 # main should never return here, but
# just in case, we know what happens.
/* This is the default interrupt "handler" :-) */
int_msg:
.asciz "Unknown interrupt\n\r"
.align 2
ignore_int:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
pushl $int_msg
call printk
popl %eax
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
/*
* Setup_paging
*
* This routine sets up paging by setting the page bit
* in cr0. The page tables are set up, identity-mapping
* the first 16MB. The pager assumes that no illegal
* addresses are produced (ie >4Mb on a 4Mb machine).
*
* NOTE! Although all physical memory should be identity
* mapped by this routine, only the kernel page functions
* use the >1Mb addresses directly. All "normal" functions
* use just the lower 1Mb, or the local data space, which
* will be mapped to some other place - mm keeps track of
* that.
*
* For those with more memory than 16 Mb - tough luck. I've
* not got it, why should you :-) The source is here. Change
* it. (Seriously - it shouldn't be too difficult. Mostly
* change some constants etc. I left it at 16Mb, as my machine
* even cannot be extended past that (ok, but it was cheap :-)
* I've tried to show which constants to change by having
* some kind of marker at them (search for "16Mb"), but I
* won't guarantee that's all :-( )
*/
.align 2
setup_paging:
movl $1024*5,%ecx /* 5 pages - pg_dir+4 page tables */
xorl %eax,%eax
xorl %edi,%edi /* pg_dir is at 0x000 */
cld;rep;stosl
movl $pg0+7,pg_dir /* set present bit/user r/w */
movl $pg1+7,pg_dir+4 /* --------- " " --------- */
movl $pg2+7,pg_dir+8 /* --------- " " --------- */
movl $pg3+7,pg_dir+12 /* --------- " " --------- */
movl $pg3+4092,%edi
movl $0xfff007,%eax /* 16Mb - 4096 + 7 (r/w user,p) */
std
1: stosl /* fill pages backwards - more efficient :-) */
subl $0x1000,%eax
jge 1b
xorl %eax,%eax /* pg_dir is at 0x0000 */
movl %eax,%cr3 /* cr3 - page directory start */
movl %cr0,%eax
orl $0x80000000,%eax
movl %eax,%cr0 /* set paging (PG) bit */
ret /* this also flushes prefetch-queue */
.align 2
.word 0
idt_descr:
.word 256*8-1 # idt contains 256 entries
.long idt
.align 2
.word 0
gdt_descr:
.word 256*8-1 # so does gdt (not that that's any
.long gdt # magic number, but it works for me :^)
.align 8
idt: .fill 256,8,0 # idt is uninitialized
gdt: .quad 0x0000000000000000 /* NULL descriptor */
.quad 0x00c09a0000000fff /* 16Mb */
.quad 0x00c0920000000fff /* 16Mb */
.quad 0x0000000000000000 /* TEMPORARY - don't use */
.fill 252,8,0 /* space for LDT's and TSS's etc */
|
Wangzhike/HIT-Linux-0.11 | 5,229 | linux-0.11/kernel/system_call.s | /*
* linux/kernel/system_call.s
*
* (C) 1991 Linus Torvalds
*/
/*
* system_call.s contains the system-call low-level handling routines.
* This also contains the timer-interrupt handler, as some of the code is
* the same. The hd- and flopppy-interrupts are also here.
*
* NOTE: This code handles signal-recognition, which happens every time
* after a timer-interrupt and after each system call. Ordinary interrupts
* don't handle signal-recognition, as that would clutter them up totally
* unnecessarily.
*
* Stack layout in 'ret_from_system_call':
*
* 0(%esp) - %eax
* 4(%esp) - %ebx
* 8(%esp) - %ecx
* C(%esp) - %edx
* 10(%esp) - %fs
* 14(%esp) - %es
* 18(%esp) - %ds
* 1C(%esp) - %eip
* 20(%esp) - %cs
* 24(%esp) - %eflags
* 28(%esp) - %oldesp
* 2C(%esp) - %oldss
*/
SIG_CHLD = 17
EAX = 0x00
EBX = 0x04
ECX = 0x08
EDX = 0x0C
FS = 0x10
ES = 0x14
DS = 0x18
EIP = 0x1C
CS = 0x20
EFLAGS = 0x24
OLDESP = 0x28
OLDSS = 0x2C
state = 0 # these are offsets into the task-struct.
counter = 4
priority = 8
signal = 12
sigaction = 16 # MUST be 16 (=len of sigaction)
blocked = (33*16)
# offsets within sigaction
sa_handler = 0
sa_mask = 4
sa_flags = 8
sa_restorer = 12
nr_system_calls = 72
/*
* Ok, I get parallel printer interrupts while using the floppy for some
* strange reason. Urgel. Now I just ignore them.
*/
.globl system_call,sys_fork,timer_interrupt,sys_execve
.globl hd_interrupt,floppy_interrupt,parallel_interrupt
.globl device_not_available, coprocessor_error
.align 2
bad_sys_call:
movl $-1,%eax
iret
.align 2
reschedule:
pushl $ret_from_sys_call
jmp schedule
.align 2
system_call:
cmpl $nr_system_calls-1,%eax
ja bad_sys_call
push %ds
push %es
push %fs
pushl %edx
pushl %ecx # push %ebx,%ecx,%edx as parameters
pushl %ebx # to the system call
movl $0x10,%edx # set up ds,es to kernel space
mov %dx,%ds
mov %dx,%es
movl $0x17,%edx # fs points to local data space
mov %dx,%fs
call sys_call_table(,%eax,4)
pushl %eax
movl current,%eax
cmpl $0,state(%eax) # state
jne reschedule
cmpl $0,counter(%eax) # counter
je reschedule
ret_from_sys_call:
movl current,%eax # task[0] cannot have signals
cmpl task,%eax
je 3f
cmpw $0x0f,CS(%esp) # was old code segment supervisor ?
jne 3f
cmpw $0x17,OLDSS(%esp) # was stack segment = 0x17 ?
jne 3f
movl signal(%eax),%ebx
movl blocked(%eax),%ecx
notl %ecx
andl %ebx,%ecx
bsfl %ecx,%ecx
je 3f
btrl %ecx,%ebx
movl %ebx,signal(%eax)
incl %ecx
pushl %ecx
call do_signal
popl %eax
3: popl %eax
popl %ebx
popl %ecx
popl %edx
pop %fs
pop %es
pop %ds
iret
.align 2
coprocessor_error:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
jmp math_error
.align 2
device_not_available:
push %ds
push %es
push %fs
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
pushl $ret_from_sys_call
clts # clear TS so that we can use math
movl %cr0,%eax
testl $0x4,%eax # EM (math emulation bit)
je math_state_restore
pushl %ebp
pushl %esi
pushl %edi
call math_emulate
popl %edi
popl %esi
popl %ebp
ret
.align 2
timer_interrupt:
push %ds # save ds,es and put kernel data space
push %es # into them. %fs is used by _system_call
push %fs
pushl %edx # we save %eax,%ecx,%edx as gcc doesn't
pushl %ecx # save those across function calls. %ebx
pushl %ebx # is saved as we use that in ret_sys_call
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
incl jiffies
movb $0x20,%al # EOI to interrupt controller #1
outb %al,$0x20
movl CS(%esp),%eax
andl $3,%eax # %eax is CPL (0 or 3, 0=supervisor)
pushl %eax
call do_timer # 'do_timer(long CPL)' does everything from
addl $4,%esp # task switching to accounting ...
jmp ret_from_sys_call
.align 2
sys_execve:
lea EIP(%esp),%eax
pushl %eax
call do_execve
addl $4,%esp
ret
.align 2
sys_fork:
call find_empty_process
testl %eax,%eax
js 1f
push %gs
pushl %esi
pushl %edi
pushl %ebp
pushl %eax
call copy_process
addl $20,%esp
1: ret
hd_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0xA0 # EOI to interrupt controller #1
jmp 1f # give port chance to breathe
1: jmp 1f
1: xorl %edx,%edx
xchgl do_hd,%edx
testl %edx,%edx
jne 1f
movl $unexpected_hd_interrupt,%edx
1: outb %al,$0x20
call *%edx # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
floppy_interrupt:
pushl %eax
pushl %ecx
pushl %edx
push %ds
push %es
push %fs
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
movl $0x17,%eax
mov %ax,%fs
movb $0x20,%al
outb %al,$0x20 # EOI to interrupt controller #1
xorl %eax,%eax
xchgl do_floppy,%eax
testl %eax,%eax
jne 1f
movl $unexpected_floppy_interrupt,%eax
1: call *%eax # "interesting" way of handling intr.
pop %fs
pop %es
pop %ds
popl %edx
popl %ecx
popl %eax
iret
parallel_interrupt:
pushl %eax
movb $0x20,%al
outb %al,$0x20
popl %eax
iret
|
Wangzhike/HIT-Linux-0.11 | 2,289 | linux-0.11/kernel/asm.s | /*
* linux/kernel/asm.s
*
* (C) 1991 Linus Torvalds
*/
/*
* asm.s contains the low-level code for most hardware faults.
* page_exception is handled by the mm, so that isn't here. This
* file also handles (hopefully) fpu-exceptions due to TS-bit, as
* the fpu must be properly saved/resored. This hasn't been tested.
*/
.globl divide_error,debug,nmi,int3,overflow,bounds,invalid_op
.globl double_fault,coprocessor_segment_overrun
.globl invalid_TSS,segment_not_present,stack_segment
.globl general_protection,coprocessor_error,irq13,reserved
divide_error:
pushl $do_divide_error
no_error_code:
xchgl %eax,(%esp)
pushl %ebx
pushl %ecx
pushl %edx
pushl %edi
pushl %esi
pushl %ebp
push %ds
push %es
push %fs
pushl $0 # "error code"
lea 44(%esp),%edx
pushl %edx
movl $0x10,%edx
mov %dx,%ds
mov %dx,%es
mov %dx,%fs
call *%eax
addl $8,%esp
pop %fs
pop %es
pop %ds
popl %ebp
popl %esi
popl %edi
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
debug:
pushl $do_int3 # _do_debug
jmp no_error_code
nmi:
pushl $do_nmi
jmp no_error_code
int3:
pushl $do_int3
jmp no_error_code
overflow:
pushl $do_overflow
jmp no_error_code
bounds:
pushl $do_bounds
jmp no_error_code
invalid_op:
pushl $do_invalid_op
jmp no_error_code
coprocessor_segment_overrun:
pushl $do_coprocessor_segment_overrun
jmp no_error_code
reserved:
pushl $do_reserved
jmp no_error_code
irq13:
pushl %eax
xorb %al,%al
outb %al,$0xF0
movb $0x20,%al
outb %al,$0x20
jmp 1f
1: jmp 1f
1: outb %al,$0xA0
popl %eax
jmp coprocessor_error
double_fault:
pushl $do_double_fault
error_code:
xchgl %eax,4(%esp) # error code <-> %eax
xchgl %ebx,(%esp) # &function <-> %ebx
pushl %ecx
pushl %edx
pushl %edi
pushl %esi
pushl %ebp
push %ds
push %es
push %fs
pushl %eax # error code
lea 44(%esp),%eax # offset
pushl %eax
movl $0x10,%eax
mov %ax,%ds
mov %ax,%es
mov %ax,%fs
call *%ebx
addl $8,%esp
pop %fs
pop %es
pop %ds
popl %ebp
popl %esi
popl %edi
popl %edx
popl %ecx
popl %ebx
popl %eax
iret
invalid_TSS:
pushl $do_invalid_TSS
jmp error_code
segment_not_present:
pushl $do_segment_not_present
jmp error_code
stack_segment:
pushl $do_stack_segment
jmp error_code
general_protection:
pushl $do_general_protection
jmp error_code
|
Wangzhike/HIT-Linux-0.11 | 2,710 | linux-0.11/kernel/chr_drv/rs_io.s | /*
* linux/kernel/rs_io.s
*
* (C) 1991 Linus Torvalds
*/
/*
* rs_io.s
*
* This module implements the rs232 io interrupts.
*/
.text
.globl rs1_interrupt,rs2_interrupt
size = 1024 /* must be power of two !
and must match the value
in tty_io.c!!! */
/* these are the offsets into the read/write buffer structures */
rs_addr = 0
head = 4
tail = 8
proc_list = 12
buf = 16
startup = 256 /* chars left in write queue when we restart it */
/*
* These are the actual interrupt routines. They look where
* the interrupt is coming from, and take appropriate action.
*/
.align 2
rs1_interrupt:
pushl $table_list+8
jmp rs_int
.align 2
rs2_interrupt:
pushl $table_list+16
rs_int:
pushl %edx
pushl %ecx
pushl %ebx
pushl %eax
push %es
push %ds /* as this is an interrupt, we cannot */
pushl $0x10 /* know that bs is ok. Load it */
pop %ds
pushl $0x10
pop %es
movl 24(%esp),%edx
movl (%edx),%edx
movl rs_addr(%edx),%edx
addl $2,%edx /* interrupt ident. reg */
rep_int:
xorl %eax,%eax
inb %dx,%al
testb $1,%al
jne end
cmpb $6,%al /* this shouldn't happen, but ... */
ja end
movl 24(%esp),%ecx
pushl %edx
subl $2,%edx
call jmp_table(,%eax,2) /* NOTE! not *4, bit0 is 0 already */
popl %edx
jmp rep_int
end: movb $0x20,%al
outb %al,$0x20 /* EOI */
pop %ds
pop %es
popl %eax
popl %ebx
popl %ecx
popl %edx
addl $4,%esp # jump over _table_list entry
iret
jmp_table:
.long modem_status,write_char,read_char,line_status
.align 2
modem_status:
addl $6,%edx /* clear intr by reading modem status reg */
inb %dx,%al
ret
.align 2
line_status:
addl $5,%edx /* clear intr by reading line status reg. */
inb %dx,%al
ret
.align 2
read_char:
inb %dx,%al
movl %ecx,%edx
subl $table_list,%edx
shrl $3,%edx
movl (%ecx),%ecx # read-queue
movl head(%ecx),%ebx
movb %al,buf(%ecx,%ebx)
incl %ebx
andl $size-1,%ebx
cmpl tail(%ecx),%ebx
je 1f
movl %ebx,head(%ecx)
1: pushl %edx
call do_tty_interrupt
addl $4,%esp
ret
.align 2
write_char:
movl 4(%ecx),%ecx # write-queue
movl head(%ecx),%ebx
subl tail(%ecx),%ebx
andl $size-1,%ebx # nr chars in queue
je write_buffer_empty
cmpl $startup,%ebx
ja 1f
movl proc_list(%ecx),%ebx # wake up sleeping process
testl %ebx,%ebx # is there any?
je 1f
movl $0,(%ebx)
1: movl tail(%ecx),%ebx
movb buf(%ecx,%ebx),%al
outb %al,%dx
incl %ebx
andl $size-1,%ebx
movl %ebx,tail(%ecx)
cmpl head(%ecx),%ebx
je write_buffer_empty
ret
.align 2
write_buffer_empty:
movl proc_list(%ecx),%ebx # wake up sleeping process
testl %ebx,%ebx # is there any?
je 1f
movl $0,(%ebx)
1: incl %edx
inb %dx,%al
jmp 1f
1: jmp 1f
1: andb $0xd,%al /* disable transmit interrupt */
outb %al,%dx
ret
|
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