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=head1 LICENSE Copyright (c) 1999-2011 The European Bioinformatics Institute and Genome Research Limited. All rights reserved. This software is distributed under a modified Apache license. For license details, please see http://www.ensembl.org/info/about/code_licence.html =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <dev@ensembl.org>. Questions may also be sent to the Ensembl help desk at <helpdesk@ensembl.org>. =cut =head1 NAME Bio::EnsEMBL::DBSQL::TranscriptAdaptor - An adaptor which performs database interaction relating to the storage and retrieval of Transcripts =head1 SYNOPSIS use Bio::EnsEMBL::Registry; Bio::EnsEMBL::Registry->load_registry_from_db( -host => 'ensembldb.ensembl.org', -user => 'anonymous' ); $transcript_adaptor = Bio::EnsEMBL::Registry->get_adaptor( 'Human', 'Core', 'Transcript' ); $transcript = $transcript_adaptor->fetch_by_dbID(1234); $transcript = $transcript_adaptor->fetch_by_stable_id('ENST00000201961'); $slice = $slice_adaptor->fetch_by_region( 'Chromosome', '3', 1, 1000000 ); @transcripts = @{ $transcript_adaptor->fetch_all_by_Slice($slice) }; ($transcript) = @{ $transcript_adaptor->fetch_all_by_external_name('NP_065811.1') }; =head1 DESCRIPTION This adaptor provides a means to retrieve and store information related to Transcripts. Primarily this involves the retrieval or storage of Bio::EnsEMBL::Transcript objects from a database. See Bio::EnsEMBL::Transcript for details of the Transcript class. =cut package Bio::EnsEMBL::DBSQL::TranscriptAdaptor; use strict; use Bio::EnsEMBL::DBSQL::BaseFeatureAdaptor; use Bio::EnsEMBL::Gene; use Bio::EnsEMBL::Exon; use Bio::EnsEMBL::Transcript; use Bio::EnsEMBL::Translation; use Bio::EnsEMBL::Utils::Exception qw( deprecate throw warning ); use vars qw(@ISA); @ISA = qw( Bio::EnsEMBL::DBSQL::BaseFeatureAdaptor ); # _tables # # Description: PROTECTED implementation of superclass abstract method. # Returns the names, aliases of the tables to use for queries. # Returntype : list of listrefs of strings # Exceptions : none # Caller : internal # Status : Stable sub _tables { return ( [ 'transcript', 't' ], [ 'transcript_stable_id', 'tsi' ], [ 'xref', 'x' ], [ 'external_db', 'exdb' ] ); } #_columns # # Description: PROTECTED implementation of superclass abstract method. # Returns a list of columns to use for queries. # Returntype : list of strings # Exceptions : none # Caller : internal # Status : Stable sub _columns { my ($self) = @_; my $created_date = $self->db()->dbc()->from_date_to_seconds("created_date"); my $modified_date = $self->db()->dbc()->from_date_to_seconds("modified_date"); return ( 't.transcript_id', 't.seq_region_id', 't.seq_region_start', 't.seq_region_end', 't.seq_region_strand', 't.analysis_id', 't.gene_id', 't.is_current', 'tsi.stable_id', 'tsi.version', $created_date, $modified_date, 't.description', 't.biotype', 't.status', 'exdb.db_name', 'exdb.status', 'exdb.db_display_name', 'x.xref_id', 'x.display_label', 'x.dbprimary_acc', 'x.version', 'x.description', 'x.info_type', 'x.info_text' ); } sub _left_join { return ( [ 'transcript_stable_id', "tsi.transcript_id = t.transcript_id" ], [ 'xref', "x.xref_id = t.display_xref_id" ], [ 'external_db', "exdb.external_db_id = x.external_db_id" ] ); } =head2 fetch_by_stable_id Arg [1] : String $stable_id The stable id of the transcript to retrieve Example : my $tr = $tr_adaptor->fetch_by_stable_id('ENST00000309301'); Description: Retrieves a transcript via its stable id. Returntype : Bio::EnsEMBL::Transcript Exceptions : none Caller : general Status : Stable =cut sub fetch_by_stable_id { my ($self, $stable_id) = @_; my $constraint = "tsi.stable_id = ? AND t.is_current = 1"; $self->bind_param_generic_fetch($stable_id,SQL_VARCHAR); my ($transcript) = @{ $self->generic_fetch($constraint) }; return $transcript; } sub fetch_all { my ($self) = @_; my $constraint = 't.biotype != "LRG_gene" and t.is_current = 1'; my @trans = @{ $self->generic_fetch($constraint) }; return \@trans ; } =head2 fetch_all_versions_by_stable_id Arg [1] : String $stable_id The stable ID of the transcript to retrieve Example : my $tr = $tr_adaptor->fetch_all_version_by_stable_id ('ENST00000309301'); Description : Similar to fetch_by_stable_id, but retrieves all versions of a transcript stored in the database. Returntype : listref of Bio::EnsEMBL::Transcript objects Exceptions : if we cant get the gene in given coord system Caller : general Status : At Risk =cut sub fetch_all_versions_by_stable_id { my ($self, $stable_id) = @_; my $constraint = "tsi.stable_id = ?"; $self->bind_param_generic_fetch($stable_id,SQL_VARCHAR); return $self->generic_fetch($constraint); } =head2 fetch_by_translation_stable_id Arg [1] : String $transl_stable_id The stable identifier of the translation of the transcript to retrieve Example : my $tr = $tr_adaptor->fetch_by_translation_stable_id ('ENSP00000311007'); Description: Retrieves a Transcript object using the stable identifier of its translation. Returntype : Bio::EnsEMBL::Transcript Exceptions : none Caller : general Status : Stable =cut sub fetch_by_translation_stable_id { my ($self, $transl_stable_id ) = @_; my $sth = $self->prepare(qq( SELECT t.transcript_id FROM translation_stable_id tsi, transcript t, translation tl WHERE tsi.stable_id = ? AND tl.translation_id = tsi.translation_id AND tl.transcript_id = t.transcript_id AND t.is_current = 1 )); $sth->bind_param(1, $transl_stable_id, SQL_VARCHAR); $sth->execute(); my ($id) = $sth->fetchrow_array; $sth->finish; if ($id){ return $self->fetch_by_dbID($id); } else { return undef; } } =head2 fetch_by_translation_id Arg [1] : Int $id The internal identifier of the translation whose transcript is to be retrieved Example : my $tr = $tr_adaptor->fetch_by_translation_id($transl->dbID); Description: Given the internal identifier of a translation this method retrieves the transcript associated with that translation. If the transcript cannot be found undef is returned instead. Returntype : Bio::EnsEMBL::Transcript or undef Exceptions : none Caller : general Status : Stable =cut sub fetch_by_translation_id { my ( $self, $p_dbID ) = @_; if ( !defined($p_dbID) ) { throw("dbID argument is required"); } my $sth = $self->prepare( "SELECT transcript_id " . "FROM translation " . "WHERE translation_id = ?" ); $sth->bind_param( 1, $p_dbID, SQL_INTEGER ); $sth->execute(); my ($dbID) = $sth->fetchrow_array(); $sth->finish(); if ($dbID) { return $self->fetch_by_dbID($dbID); } return undef; } =head2 fetch_all_by_Gene Arg [1] : Bio::EnsEMBL::Gene $gene The gene to fetch transcripts of Example : my $gene = $gene_adaptor->fetch_by_stable_id('ENSG0000123'); my @transcripts = { $tr_adaptor->fetch_all_by_Gene($gene) }; Description: Retrieves Transcript objects for given gene. Puts Genes slice in each Transcript. Returntype : Listref of Bio::EnsEMBL::Transcript objects Exceptions : none Caller : Gene->get_all_Transcripts() Status : Stable =cut sub fetch_all_by_Gene { my $self = shift; my $gene = shift; my $constraint = "t.gene_id = ".$gene->dbID(); # Use the fetch_all_by_Slice_constraint method because it # handles the difficult Haps/PARs and coordinate remapping # Get a slice that entirely overlaps the gene. This is because we # want all transcripts to be retrieved, not just ones overlapping # the slice the gene is on (the gene may only partially overlap the slice) # For speed reasons, only use a different slice if necessary though. my $gslice = $gene->slice(); my $slice; if (!$gslice) { throw("Gene must have attached slice to retrieve transcripts."); } if ( $gene->start() < 1 || $gene->end() > $gslice->length() ) { if ( $gslice->is_circular() ) { $slice = $gslice; } else { $slice = $self->db->get_SliceAdaptor->fetch_by_Feature($gene); } } else { $slice = $gslice; } my $transcripts = $self->fetch_all_by_Slice_constraint($slice, $constraint); if ($slice != $gslice) { my @out; foreach my $tr (@$transcripts) { push @out, $tr->transfer($gslice); } $transcripts = \@out; } return $transcripts; } =head2 fetch_all_by_Slice Arg [1] : Bio::EnsEMBL::Slice $slice The slice to fetch transcripts on Arg [2] : (optional) Boolean $load_exons If true, exons will be loaded immediately rather than lazy loaded later Arg [3] : (optional) String $logic_name The logic name of the type of features to obtain ARG [4] : (optional) String $constraint An extra contraint. Example : my @transcripts = @{ $tr_adaptor->fetch_all_by_Slice($slice) }; Description: Overrides superclass method to optionally load exons immediately rather than lazy-loading them later. This is more efficient when there are a lot of transcripts whose exons are going to be used. Returntype : Listref of Bio::EnsEMBL::Transcript objects Exceptions : thrown if exon cannot be placed on transcript slice Caller : Slice::get_all_Transcripts Status : Stable =cut sub fetch_all_by_Slice { my ( $self, $slice, $load_exons, $logic_name, $constraint ) = @_; my $transcripts; if ( defined($constraint) && $constraint ne '' ) { $transcripts = $self->SUPER::fetch_all_by_Slice_constraint( $slice, 't.is_current = 1 AND ' . $constraint, $logic_name ); } else { $transcripts = $self->SUPER::fetch_all_by_Slice_constraint( $slice, 't.is_current = 1', $logic_name ); } # if there are 0 or 1 transcripts still do lazy-loading if ( !$load_exons || @$transcripts < 2 ) { return $transcripts; } # preload all of the exons now, instead of lazy loading later # faster than 1 query per transcript # first check if the exons are already preloaded # @todo FIXME: Should test all exons. if ( exists( $transcripts->[0]->{'_trans_exon_array'} ) ) { return $transcripts; } # get extent of region spanned by transcripts my ( $min_start, $max_end ); foreach my $tr (@$transcripts) { if ( !defined($min_start) || $tr->seq_region_start() < $min_start ) { $min_start = $tr->seq_region_start(); } if ( !defined($max_end) || $tr->seq_region_end() > $max_end ) { $max_end = $tr->seq_region_end(); } } my $ext_slice; if ( $min_start >= $slice->start() && $max_end <= $slice->end() ) { $ext_slice = $slice; } else { my $sa = $self->db()->get_SliceAdaptor(); $ext_slice = $sa->fetch_by_region( $slice->coord_system->name(), $slice->seq_region_name(), $min_start, $max_end, $slice->strand(), $slice->coord_system->version() ); } # associate exon identifiers with transcripts my %tr_hash = map { $_->dbID => $_ } @{$transcripts}; my $tr_id_str = join( ',', keys(%tr_hash) ); my $sth = $self->prepare( "SELECT transcript_id, exon_id, rank " . "FROM exon_transcript " . "WHERE transcript_id IN ($tr_id_str)" ); $sth->execute(); my ( $tr_id, $ex_id, $rank ); $sth->bind_columns( \( $tr_id, $ex_id, $rank ) ); my %ex_tr_hash; while ( $sth->fetch() ) { $ex_tr_hash{$ex_id} ||= []; push( @{ $ex_tr_hash{$ex_id} }, [ $tr_hash{$tr_id}, $rank ] ); } my $ea = $self->db()->get_ExonAdaptor(); my $exons = $ea->fetch_all_by_Slice_constraint( $ext_slice, sprintf( "e.exon_id IN (%s)", join( ',', sort { $a <=> $b } keys(%ex_tr_hash) ) ) ); # move exons onto transcript slice, and add them to transcripts foreach my $ex ( @{$exons} ) { my $new_ex; if ( $slice != $ext_slice ) { $new_ex = $ex->transfer($slice); if ( !defined($new_ex) ) { throw("Unexpected. " . "Exon could not be transfered onto Transcript slice." ); } } else { $new_ex = $ex; } foreach my $row ( @{ $ex_tr_hash{ $new_ex->dbID() } } ) { my ( $tr, $rank ) = @{$row}; $tr->add_Exon( $new_ex, $rank ); } } my $tla = $self->db()->get_TranslationAdaptor(); # load all of the translations at once $tla->fetch_all_by_Transcript_list($transcripts); return $transcripts; } ## end sub fetch_all_by_Slice =head2 fetch_all_by_external_name Arg [1] : String $external_name An external identifier of the transcript to be obtained Arg [2] : (optional) String $external_db_name The name of the external database from which the identifier originates. Example : my @transcripts = @{ $tr_adaptor->fetch_all_by_external_name( 'NP_065811.1') }; my @more_transcripts = @{$tr_adaptor->fetch_all_by_external_name( 'NP_0658__._')}; Description: Retrieves all transcripts which are associated with an external identifier such as a GO term, Swissprot identifer, etc. Usually there will only be a single transcript returned in the list reference, but not always. Transcripts are returned in their native coordinate system, i.e. the coordinate system in which they are stored in the database. If they are required in another coordinate system the Transcript::transfer or Transcript::transform method can be used to convert them. If no transcripts with the external identifier are found, a reference to an empty list is returned. SQL wildcards % and _ are supported in the $external_name Returntype : listref of Bio::EnsEMBL::Transcript Exceptions : none Caller : general Status : Stable =cut sub fetch_all_by_external_name { my ( $self, $external_name, $external_db_name ) = @_; my $entryAdaptor = $self->db->get_DBEntryAdaptor(); my @ids = $entryAdaptor->list_transcript_ids_by_extids( $external_name, $external_db_name ); return $self->fetch_all_by_dbID_list( \@ids ); } =head2 fetch_all_by_GOTerm Arg [1] : Bio::EnsEMBL::OntologyTerm The GO term for which transcripts should be fetched. Example: @transcripts = @{ $transcript_adaptor->fetch_all_by_GOTerm( $go_adaptor->fetch_by_accession('GO:0030326') ) }; Description : Retrieves a list of transcripts that are associated with the given GO term, or with any of its descendent GO terms. The transcripts returned are in their native coordinate system, i.e. in the coordinate system in which they are stored in the database. If another coordinate system is required then the Transcript::transfer or Transcript::transform method can be used. Return type : listref of Bio::EnsEMBL::Transcript Exceptions : Throws of argument is not a GO term Caller : general Status : Stable =cut sub fetch_all_by_GOTerm { my ( $self, $term ) = @_; assert_ref( $term, 'Bio::EnsEMBL::OntologyTerm' ); if ( $term->ontology() ne 'GO' ) { throw('Argument is not a GO term'); } my $entryAdaptor = $self->db->get_DBEntryAdaptor(); my %unique_dbIDs; foreach my $accession ( map { $_->accession() } ( $term, @{ $term->descendants() } ) ) { my @ids = $entryAdaptor->list_transcript_ids_by_extids( $accession, 'GO' ); foreach my $dbID (@ids) { $unique_dbIDs{$dbID} = 1 } } my @result = @{ $self->fetch_all_by_dbID_list( [ sort { $a <=> $b } keys(%unique_dbIDs) ] ) }; return \@result; } ## end sub fetch_all_by_GOTerm =head2 fetch_all_by_GOTerm_accession Arg [1] : String The GO term accession for which genes should be fetched. Example : @genes = @{ $gene_adaptor->fetch_all_by_GOTerm_accession( 'GO:0030326') }; Description : Retrieves a list of genes that are associated with the given GO term, or with any of its descendent GO terms. The genes returned are in their native coordinate system, i.e. in the coordinate system in which they are stored in the database. If another coordinate system is required then the Gene::transfer or Gene::transform method can be used. Return type : listref of Bio::EnsEMBL::Gene Exceptions : Throws of argument is not a GO term accession Caller : general Status : Stable =cut sub fetch_all_by_GOTerm_accession { my ( $self, $accession ) = @_; if ( $accession !~ /^GO:/ ) { throw('Argument is not a GO term accession'); } my $goAdaptor = Bio::EnsEMBL::Registry->get_adaptor( 'Multi', 'Ontology', 'OntologyTerm' ); my $term = $goAdaptor->fetch_by_accession($accession); return $self->fetch_all_by_GOTerm($term); } =head2 fetch_by_display_label Arg [1] : String $label - display label of transcript to fetch Example : my $tr = $tr_adaptor->fetch_by_display_label("BRCA2"); Description: Returns the transcript which has the given display label or undef if there is none. If there are more than 1, only the first is reported. Returntype : Bio::EnsEMBL::Transcript Exceptions : none Caller : general Status : Stable =cut sub fetch_by_display_label { my $self = shift; my $label = shift; my $constraint = "x.display_label = ? AND t.is_current = 1"; $self->bind_param_generic_fetch($label,SQL_VARCHAR); my ($transcript) = @{ $self->generic_fetch($constraint) }; return $transcript; } =head2 fetch_all_by_exon_stable_id Arg [1] : String $stable_id The stable id of an exon in a transcript Example : my $tr = $tr_adaptor->fetch_all_by_exon_stable_id ('ENSE00000309301'); Description: Retrieves a list of transcripts via an exon stable id. Returntype : Listref of Bio::EnsEMBL::Transcript objects Exceptions : none Caller : general Status : Stable =cut sub fetch_all_by_exon_stable_id { my ($self, $stable_id) = @_; my @trans ; my $sth = $self->prepare(qq( SELECT t.transcript_id FROM exon_transcript et, exon_stable_id esi, transcript t WHERE esi.exon_id = et.exon_id AND et.transcript_id = t.transcript_id AND esi.stable_id = ? AND t.is_current = 1 )); $sth->bind_param(1, $stable_id, SQL_VARCHAR); $sth->execute(); while( my $id = $sth->fetchrow_array ) { my $transcript = $self->fetch_by_dbID($id); push(@trans, $transcript) if $transcript; } if (!@trans) { return undef; } return \@trans; } =head2 store Arg [1] : Bio::EnsEMBL::Transcript $transcript The transcript to be written to the database Arg [2] : Int $gene_dbID The identifier of the gene that this transcript is associated with Arg [3] : DEPRECATED (optional) Int $analysis_id The analysis_id to use when storing this gene. This is for backward compatibility only and used to fall back to the gene analysis_id if no analysis object is attached to the transcript (which you should do for new code). Example : $transID = $tr_adaptor->store($transcript, $gene->dbID); Description: Stores a transcript in the database and returns the new internal identifier for the stored transcript. Returntype : Int Exceptions : none Caller : general Status : Stable =cut sub store { my ( $self, $transcript, $gene_dbID, $analysis_id ) = @_; if ( !ref($transcript) || !$transcript->isa('Bio::EnsEMBL::Transcript') ) { throw("$transcript is not a EnsEMBL transcript - not storing"); } my $db = $self->db(); if ( $transcript->is_stored($db) ) { return $transcript->dbID(); } # Force lazy-loading of exons and ensure coords are correct. $transcript->recalculate_coordinates(); my $is_current = ( defined( $transcript->is_current() ) ? $transcript->is_current() : 1 ); # store analysis my $analysis = $transcript->analysis(); my $new_analysis_id; if ($analysis) { if ( $analysis->is_stored($db) ) { $new_analysis_id = $analysis->dbID; } else { $new_analysis_id = $db->get_AnalysisAdaptor->store($analysis); } } elsif ($analysis_id) { # Fall back to analysis passed in (usually from gene) if analysis # wasn't set explicitely for the transcript. This is deprectated # though. warning( "You should explicitely attach " . "an analysis object to the Transcript. " . "Will fall back to Gene analysis, " . "but this behaviour is deprecated." ); $new_analysis_id = $analysis_id; } else { throw("Need an analysis_id to store the Transcript."); } # # Store exons - this needs to be done before the possible transfer # of the transcript to another slice (in _prestore()). Transfering # results in copies being made of the exons and we need to preserve # the object identity of the exons so that they are not stored twice # by different transcripts. # my $exons = $transcript->get_all_Exons(); my $exonAdaptor = $db->get_ExonAdaptor(); foreach my $exon ( @{$exons} ) { $exonAdaptor->store($exon); } my $original_translation = $transcript->translation(); my $original = $transcript; my $seq_region_id; ( $transcript, $seq_region_id ) = $self->_pre_store($transcript); # First store the transcript without a display xref. The display xref # needs to be set after xrefs are stored which needs to happen after # transcript is stored. # # Store transcript # my $tst = $self->prepare( qq( INSERT INTO transcript ( gene_id, analysis_id, seq_region_id, seq_region_start, seq_region_end, seq_region_strand, biotype, status, description, is_current, canonical_translation_id ) VALUES (?, ?, ?, ?, ?, ?, ?, ?, ?, ?, ?) ) ); $tst->bind_param( 1, $gene_dbID, SQL_INTEGER ); $tst->bind_param( 2, $new_analysis_id, SQL_INTEGER ); $tst->bind_param( 3, $seq_region_id, SQL_INTEGER ); $tst->bind_param( 4, $transcript->start(), SQL_INTEGER ); $tst->bind_param( 5, $transcript->end(), SQL_INTEGER ); $tst->bind_param( 6, $transcript->strand(), SQL_TINYINT ); $tst->bind_param( 7, $transcript->biotype(), SQL_VARCHAR ); $tst->bind_param( 8, $transcript->status(), SQL_VARCHAR ); $tst->bind_param( 9, $transcript->description(), SQL_LONGVARCHAR ); $tst->bind_param( 10, $is_current, SQL_TINYINT ); # If the transcript has a translation, this is updated later: $tst->bind_param( 11, undef, SQL_INTEGER ); $tst->execute(); $tst->finish(); my $transc_dbID = $tst->{'mysql_insertid'}; # # Store translation # my $alt_translations = $transcript->get_all_alternative_translations(); my $translation = $transcript->translation(); if ( defined($translation) ) { # Make sure that the start and end exon are set correctly. my $start_exon = $translation->start_Exon(); my $end_exon = $translation->end_Exon(); if ( !defined($start_exon) ) { throw("Translation does not define a start exon."); } if ( !defined($end_exon) ) { throw("Translation does not defined an end exon."); } # If the dbID is not set, this means the exon must have been a # different object in memory than the the exons of the transcript. # Try to find the matching exon in all of the exons we just stored. if ( !defined( $start_exon->dbID() ) ) { my $key = $start_exon->hashkey(); ($start_exon) = grep { $_->hashkey() eq $key } @$exons; if ( defined($start_exon) ) { $translation->start_Exon($start_exon); } else { throw( "Translation's start_Exon does not appear " . "to be one of the exons in " . "its associated Transcript" ); } } if ( !defined( $end_exon->dbID() ) ) { my $key = $end_exon->hashkey(); ($end_exon) = grep { $_->hashkey() eq $key } @$exons; if ( defined($end_exon) ) { $translation->end_Exon($end_exon); } else { throw( "Translation's end_Exon does not appear " . "to be one of the exons in " . "its associated Transcript." ); } } my $old_dbid = $translation->dbID(); $db->get_TranslationAdaptor()->store( $translation, $transc_dbID ); # Need to update the canonical_translation_id for this transcript. my $sth = $self->prepare( q( UPDATE transcript SET canonical_translation_id = ? WHERE transcript_id = ?) ); $sth->bind_param( 1, $translation->dbID(), SQL_INTEGER ); $sth->bind_param( 2, $transc_dbID, SQL_INTEGER ); $sth->execute(); # Set values of the original translation, we may have copied it when # we transformed the transcript. $original_translation->dbID( $translation->dbID() ); $original_translation->adaptor( $translation->adaptor() ); } ## end if ( defined($translation...)) # # Store the alternative translations, if there are any. # if ( defined($alt_translations) && scalar( @{$alt_translations} ) > 0 ) { foreach my $alt_translation ( @{$alt_translations} ) { my $start_exon = $alt_translation->start_Exon(); my $end_exon = $alt_translation->end_Exon(); if ( !defined($start_exon) ) { throw("Translation does not define a start exon."); } elsif ( !defined($end_exon) ) { throw("Translation does not defined an end exon."); } if ( !defined( $start_exon->dbID() ) ) { my $key = $start_exon->hashkey(); ($start_exon) = grep { $_->hashkey() eq $key } @{$exons}; if ( defined($start_exon) ) { $alt_translation->start_Exon($start_exon); } else { throw( "Translation's start_Exon does not appear " . "to be one of the exon in" . "its associated Transcript" ); } } elsif ( !defined( $end_exon->dbID() ) ) { my $key = $end_exon->hashkey(); ($end_exon) = grep { $_->hashkey() eq $key } @$exons; if ( defined($end_exon) ) { $translation->end_Exon($end_exon); } else { throw( "Translation's end_Exon does not appear " . "to be one of the exons in " . "its associated Transcript." ); } } $db->get_TranslationAdaptor() ->store( $alt_translation, $transc_dbID ); } ## end foreach my $alt_translation... } ## end if ( defined($alt_translations...)) # # Store the xrefs/object xref mapping. # my $dbEntryAdaptor = $db->get_DBEntryAdaptor(); foreach my $dbe ( @{ $transcript->get_all_DBEntries() } ) { $dbEntryAdaptor->store( $dbe, $transc_dbID, "Transcript", 1 ); } # # Update transcript to point to display xref if it is set. # if ( my $dxref = $transcript->display_xref() ) { my $dxref_id; if ( $dxref->is_stored($db) ) { $dxref_id = $dxref->dbID(); } else { $dxref_id = $dbEntryAdaptor->exists($dxref); } if ( defined($dxref_id) ) { my $sth = $self->prepare( "UPDATE transcript " . "SET display_xref_id = ? " . "WHERE transcript_id = ?" ); $sth->bind_param( 1, $dxref_id, SQL_INTEGER ); $sth->bind_param( 2, $transc_dbID, SQL_INTEGER ); $sth->execute(); $dxref->dbID($dxref_id); $dxref->adaptor($dbEntryAdaptor); $sth->finish(); } else { warning(sprintf( "Display_xref %s:%s is not stored in database.\n" . "Not storing relationship to this transcript.", $dxref->dbname(), $dxref->display_id() ) ); $dxref->dbID(undef); $dxref->adaptor(undef); } } ## end if ( my $dxref = $transcript...) # # Link transcript to exons in exon_transcript table # my $etst = $self->prepare( "INSERT INTO exon_transcript (exon_id,transcript_id,rank) " . "VALUES (?,?,?)" ); my $rank = 1; foreach my $exon ( @{ $transcript->get_all_Exons } ) { $etst->bind_param( 1, $exon->dbID, SQL_INTEGER ); $etst->bind_param( 2, $transc_dbID, SQL_INTEGER ); $etst->bind_param( 3, $rank, SQL_INTEGER ); $etst->execute(); $rank++; } $etst->finish(); # # Store stable_id # if ( defined( $transcript->stable_id() ) ) { my $statement = "INSERT INTO transcript_stable_id " . "SET transcript_id = ?, stable_id = ?, version = ?, "; $statement .= "created_date = " . $self->db()->dbc() ->from_seconds_to_date( $transcript->created_date() ) . ","; $statement .= "modified_date = " . $self->db()->dbc() ->from_seconds_to_date( $transcript->modified_date() ); my $sth = $self->prepare($statement); $sth->bind_param( 1, $transc_dbID, SQL_INTEGER ); $sth->bind_param( 2, $transcript->stable_id(), SQL_VARCHAR ); $sth->bind_param( 3, ( $transcript->version() || 1 ), SQL_INTEGER ); $sth->execute(); $sth->finish(); } ## end if ( defined( $transcript...)) # Now the supporting evidence my $tsf_adaptor = $db->get_TranscriptSupportingFeatureAdaptor(); $tsf_adaptor->store( $transc_dbID, $transcript->get_all_supporting_features() ); # store transcript attributes if there are any my $attr_adaptor = $db->get_AttributeAdaptor(); $attr_adaptor->store_on_Transcript( $transc_dbID, $transcript->get_all_Attributes() ); # Update the original transcript object - not the transfered copy that # we might have created. $original->dbID($transc_dbID); $original->adaptor($self); return $transc_dbID; } ## end sub store =head2 get_Interpro_by_transid Arg [1] : String $trans_stable_id The stable if of the transcript to obtain Example : @i = $tr_adaptor->get_Interpro_by_transid($trans->stable_id()); Description: Gets interpro accession numbers by transcript stable id. A hack really - we should have a much more structured system than this. Returntype : listref of strings (Interpro_acc:description) Exceptions : none Caller : domainview? , GeneView Status : Stable =cut sub get_Interpro_by_transid { my ($self,$trans_stable_id) = @_; my $sth = $self->prepare(qq( SELECT STRAIGHT_JOIN i.interpro_ac, x.description FROM transcript_stable_id tsi, transcript t, translation tl, protein_feature pf, interpro i, xref x WHERE tsi.stable_id = ? AND tl.transcript_id = tsi.transcript_id AND tl.translation_id = pf.translation_id AND i.id = pf.hit_name AND i.interpro_ac = x.dbprimary_acc AND tsi.transcript_id = t.transcript_id AND t.is_current = 1 )); $sth->bind_param(1, $trans_stable_id, SQL_VARCHAR); $sth->execute(); my @out; my %h; while( (my $arr = $sth->fetchrow_arrayref()) ) { if( $h{$arr->[0]} ) { next; } $h{$arr->[0]}=1; my $string = $arr->[0] .":".$arr->[1]; push(@out,$string); } return \@out; } =head2 remove Arg [1] : Bio::EnsEMBL::Transcript $transcript The transcript to remove from the database Example : $tr_adaptor->remove($transcript); Description: Removes a transcript completely from the database, and all associated information. This method is usually called by the GeneAdaptor::remove method because this method will not preform the removal of genes which are associated with this transcript. Do not call this method directly unless you know there are no genes associated with the transcript! Returntype : none Exceptions : throw on incorrect arguments warning if transcript is not in this database Caller : GeneAdaptor::remove Status : Stable =cut sub remove { my $self = shift; my $transcript = shift; if(!ref($transcript) || !$transcript->isa('Bio::EnsEMBL::Transcript')) { throw("Bio::EnsEMBL::Transcript argument expected"); } # sanity check: make sure nobody tries to slip past a prediction transcript # which inherits from transcript but actually uses different tables if($transcript->isa('Bio::EnsEMBL::PredictionTranscript')) { throw("TranscriptAdaptor can only remove Transcripts " . "not PredictionTranscripts"); } if ( !$transcript->is_stored($self->db()) ) { warning("Cannot remove transcript ". $transcript->dbID .". Is not stored ". "in this database."); return; } # remove the supporting features of this transcript my $prot_adp = $self->db->get_ProteinAlignFeatureAdaptor; my $dna_adp = $self->db->get_DnaAlignFeatureAdaptor; my $sfsth = $self->prepare("SELECT feature_type, feature_id " . "FROM transcript_supporting_feature " . "WHERE transcript_id = ?"); $sfsth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sfsth->execute(); # statements to check for shared align_features my $sth1 = $self->prepare("SELECT count(*) FROM supporting_feature " . "WHERE feature_type = ? AND feature_id = ?"); my $sth2 = $self->prepare("SELECT count(*) " . "FROM transcript_supporting_feature " . "WHERE feature_type = ? AND feature_id = ?"); SUPPORTING_FEATURE: while(my ($type, $feature_id) = $sfsth->fetchrow()){ # only remove align_feature if this is the last reference to it $sth1->bind_param(1, $type, SQL_VARCHAR); $sth1->bind_param(2, $feature_id, SQL_INTEGER); $sth1->execute; $sth2->bind_param(1, $type, SQL_VARCHAR); $sth2->bind_param(2, $feature_id, SQL_INTEGER); $sth2->execute; my ($count1) = $sth1->fetchrow; my ($count2) = $sth2->fetchrow; if ($count1 + $count2 > 1) { #warn "transcript: shared feature, not removing $type|$feature_id\n"; next SUPPORTING_FEATURE; } #warn "transcript: removing $type|$feature_id\n"; if($type eq 'protein_align_feature'){ my $f = $prot_adp->fetch_by_dbID($feature_id); $prot_adp->remove($f); } elsif($type eq 'dna_align_feature'){ my $f = $dna_adp->fetch_by_dbID($feature_id); $dna_adp->remove($f); } else { warning("Unknown supporting feature type $type. Not removing feature."); } } $sfsth->finish(); $sth1->finish(); $sth2->finish(); # delete the association to supporting features $sfsth = $self->prepare("DELETE FROM transcript_supporting_feature WHERE transcript_id = ?"); $sfsth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sfsth->execute(); $sfsth->finish(); # remove all xref linkages to this transcript my $dbeAdaptor = $self->db->get_DBEntryAdaptor(); foreach my $dbe (@{$transcript->get_all_DBEntries}) { $dbeAdaptor->remove_from_object($dbe, $transcript, 'Transcript'); } # remove the attributes associated with this transcript my $attrib_adp = $self->db->get_AttributeAdaptor; $attrib_adp->remove_from_Transcript($transcript); # remove the translation associated with this transcript my $translationAdaptor = $self->db->get_TranslationAdaptor(); if( defined($transcript->translation()) ) { $translationAdaptor->remove( $transcript->translation ); } # remove exon associations to this transcript my $exonAdaptor = $self->db->get_ExonAdaptor(); foreach my $exon ( @{$transcript->get_all_Exons()} ) { # get the number of transcript references to this exon # only remove the exon if this is the last transcript to # reference it my $sth = $self->prepare( "SELECT count(*) FROM exon_transcript WHERE exon_id = ?" ); $sth->bind_param(1, $exon->dbID, SQL_INTEGER); $sth->execute(); my ($count) = $sth->fetchrow_array(); $sth->finish(); if($count == 1){ $exonAdaptor->remove( $exon ); } } my $sth = $self->prepare( "DELETE FROM exon_transcript WHERE transcript_id = ?" ); $sth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sth->execute(); $sth = $self->prepare( "DELETE FROM transcript_stable_id WHERE transcript_id = ?" ); $sth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sth->execute(); $sth->finish(); $sth = $self->prepare( "DELETE FROM transcript WHERE transcript_id = ?" ); $sth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sth->execute(); $sth->finish(); $transcript->dbID(undef); $transcript->adaptor(undef); return; } =head2 update Arg [1] : Bio::EnsEMBL::Transcript $transcript The transcript to update Example : $tr_adaptor->update($transcript); Description: Updates a transcript in the database. Returntype : None Exceptions : thrown if the $transcript is not a Bio::EnsEMBL::Transcript. warn if the method is called on a transcript that does not exist in the database. Should warn if trying to update the number of attached exons, but this is a far more complex process and is not yet implemented. Caller : general Status : Stable =cut sub update { my ( $self, $transcript ) = @_; if ( !defined($transcript) || !ref($transcript) || !$transcript->isa('Bio::EnsEMBL::Transcript') ) { throw("Must update a transcript object, not a $transcript"); } my $update_transcript_sql = qq( UPDATE transcript SET analysis_id = ?, display_xref_id = ?, description = ?, biotype = ?, status = ?, is_current = ?, canonical_translation_id = ? WHERE transcript_id = ? ); my $display_xref = $transcript->display_xref(); my $display_xref_id; if ( defined($display_xref) && $display_xref->dbID() ) { $display_xref_id = $display_xref->dbID(); } else { $display_xref_id = undef; } my $sth = $self->prepare($update_transcript_sql); $sth->bind_param( 1, $transcript->analysis()->dbID(), SQL_INTEGER ); $sth->bind_param( 2, $display_xref_id, SQL_INTEGER ); $sth->bind_param( 3, $transcript->description(), SQL_LONGVARCHAR ); $sth->bind_param( 4, $transcript->biotype(), SQL_VARCHAR ); $sth->bind_param( 5, $transcript->status(), SQL_VARCHAR ); $sth->bind_param( 6, $transcript->is_current(), SQL_TINYINT ); $sth->bind_param( 7, ( defined( $transcript->translation() ) ? $transcript->translation()->dbID() : undef ), SQL_INTEGER ); $sth->bind_param( 8, $transcript->dbID(), SQL_INTEGER ); $sth->execute(); } ## end sub update =head2 list_dbIDs Example : @transcript_ids = @{ $t_adaptor->list_dbIDs }; Description: Gets a list of internal ids for all transcripts in the db. Arg[1] : <optional> int. not 0 for the ids to be sorted by the seq_region. Returntype : Listref of Ints Exceptions : none Caller : general Status : Stable =cut sub list_dbIDs { my ($self, $ordered) = @_; return $self->_list_dbIDs("transcript",undef, $ordered); } =head2 list_stable_ids Example : @stable_trans_ids = @{ $transcript_adaptor->list_stable_ids }; Description: Gets a list of stable ids for all transcripts in the current database. Returntype : Listref of Strings Exceptions : none Caller : general Status : Stable =cut sub list_stable_ids { my ($self) = @_; return $self->_list_dbIDs("transcript_stable_id", "stable_id"); } #_objs_from_sth # Arg [1] : StatementHandle $sth # Arg [2] : Bio::EnsEMBL::AssemblyMapper $mapper # Arg [3] : Bio::EnsEMBL::Slice $dest_slice # Description: PROTECTED implementation of abstract superclass method. # Responsible for the creation of Transcripts. # Returntype : Listref of Bio::EnsEMBL::Transcripts in target coord system # Exceptions : none # Caller : internal # Status : Stable sub _objs_from_sth { my ($self, $sth, $mapper, $dest_slice) = @_; # # This code is ugly because an attempt has been made to remove as many # function calls as possible for speed purposes. Thus many caches and # a fair bit of gymnastics is used. # my $sa = $self->db()->get_SliceAdaptor(); my $aa = $self->db->get_AnalysisAdaptor(); my $dbEntryAdaptor = $self->db()->get_DBEntryAdaptor(); my @transcripts; my %analysis_hash; my %slice_hash; my %sr_name_hash; my %sr_cs_hash; my ( $transcript_id, $seq_region_id, $seq_region_start, $seq_region_end, $seq_region_strand, $analysis_id, $gene_id, $is_current, $stable_id, $version, $created_date, $modified_date, $description, $biotype, $status, $external_db, $external_status, $external_db_name, $xref_id, $xref_display_label, $xref_primary_acc, $xref_version, $xref_description, $xref_info_type, $xref_info_text ); $sth->bind_columns( \( $transcript_id, $seq_region_id, $seq_region_start, $seq_region_end, $seq_region_strand, $analysis_id, $gene_id, $is_current, $stable_id, $version, $created_date, $modified_date, $description, $biotype, $status, $external_db, $external_status, $external_db_name, $xref_id, $xref_display_label, $xref_primary_acc, $xref_version, $xref_description, $xref_info_type, $xref_info_text ) ); my $asm_cs; my $cmp_cs; my $asm_cs_vers; my $asm_cs_name; my $cmp_cs_vers; my $cmp_cs_name; if($mapper) { $asm_cs = $mapper->assembled_CoordSystem(); $cmp_cs = $mapper->component_CoordSystem(); $asm_cs_name = $asm_cs->name(); $asm_cs_vers = $asm_cs->version(); $cmp_cs_name = $cmp_cs->name(); $cmp_cs_vers = $cmp_cs->version(); } my $dest_slice_start; my $dest_slice_end; my $dest_slice_strand; my $dest_slice_length; my $dest_slice_cs; my $dest_slice_sr_name; my $dest_slice_sr_id; my $asma; if($dest_slice) { $dest_slice_start = $dest_slice->start(); $dest_slice_end = $dest_slice->end(); $dest_slice_strand = $dest_slice->strand(); $dest_slice_length = $dest_slice->length(); $dest_slice_cs = $dest_slice->coord_system(); $dest_slice_sr_name = $dest_slice->seq_region_name(); $dest_slice_sr_id = $dest_slice->get_seq_region_id(); $asma = $self->db->get_AssemblyMapperAdaptor(); } FEATURE: while($sth->fetch()) { #get the analysis object my $analysis = $analysis_hash{$analysis_id} ||= $aa->fetch_by_dbID($analysis_id); #need to get the internal_seq_region, if present $seq_region_id = $self->get_seq_region_id_internal($seq_region_id); my $slice = $slice_hash{"ID:".$seq_region_id}; my $dest_mapper = $mapper; if(!$slice) { $slice = $sa->fetch_by_seq_region_id($seq_region_id); $slice_hash{"ID:".$seq_region_id} = $slice; $sr_name_hash{$seq_region_id} = $slice->seq_region_name(); $sr_cs_hash{$seq_region_id} = $slice->coord_system(); } #obtain a mapper if none was defined, but a dest_seq_region was if(!$dest_mapper && $dest_slice && !$dest_slice_cs->equals($slice->coord_system)) { $dest_mapper = $asma->fetch_by_CoordSystems($dest_slice_cs, $slice->coord_system); $asm_cs = $dest_mapper->assembled_CoordSystem(); $cmp_cs = $dest_mapper->component_CoordSystem(); $asm_cs_name = $asm_cs->name(); $asm_cs_vers = $asm_cs->version(); $cmp_cs_name = $cmp_cs->name(); $cmp_cs_vers = $cmp_cs->version(); } my $sr_name = $sr_name_hash{$seq_region_id}; my $sr_cs = $sr_cs_hash{$seq_region_id}; # # remap the feature coordinates to another coord system # if a mapper was provided # if($dest_mapper) { ($seq_region_id,$seq_region_start,$seq_region_end,$seq_region_strand) = $dest_mapper->fastmap($sr_name, $seq_region_start, $seq_region_end, $seq_region_strand, $sr_cs); #skip features that map to gaps or coord system boundaries next FEATURE if(!defined($seq_region_id)); #get a slice in the coord system we just mapped to if($asm_cs == $sr_cs || ($cmp_cs != $sr_cs && $asm_cs->equals($sr_cs))) { $slice = $slice_hash{"ID:".$seq_region_id} ||= $sa->fetch_by_seq_region_id($seq_region_id); } else { $slice = $slice_hash{"ID:".$seq_region_id} ||= $sa->fetch_by_seq_region_id($seq_region_id); } } # # If a destination slice was provided convert the coords. # if (defined($dest_slice)) { if ( $dest_slice_strand == 1 ) { $seq_region_start = $seq_region_start - $dest_slice_start + 1; $seq_region_end = $seq_region_end - $dest_slice_start + 1; if ( $dest_slice->is_circular ) { if ( $seq_region_start > $seq_region_end ) { # Looking at a feature overlapping the chromsome origin. if ( $seq_region_end > $dest_slice_start ) { # Looking at the region in the beginning of the chromosome $seq_region_start -= $dest_slice->seq_region_length(); } if ( $seq_region_end < 0 ) { $seq_region_end += $dest_slice->seq_region_length(); } } else { if ( $dest_slice_start > $dest_slice_end && $seq_region_end < 0 ) { # Looking at the region overlapping the chromosome # origin and a feature which is at the beginning of the # chromosome. $seq_region_start += $dest_slice->seq_region_length(); $seq_region_end += $dest_slice->seq_region_length(); } } } } else { if ( $dest_slice->is_circular() && $seq_region_start > $seq_region_end ) { if ( $seq_region_end > $dest_slice_start ) { # Looking at the region in the beginning of the chromosome. $seq_region_start = $dest_slice_end - $seq_region_end + 1; $seq_region_end = $seq_region_end - $dest_slice->seq_region_length() - $dest_slice_start + 1; } else { my $tmp_seq_region_start = $seq_region_start; $seq_region_start = $dest_slice_end - $seq_region_end - $dest_slice->seq_region_length() + 1; $seq_region_end = $dest_slice_end - $tmp_seq_region_start + 1; } } else { my $tmp_seq_region_start = $seq_region_start; $seq_region_start = $dest_slice_end - $seq_region_end + 1; $seq_region_end = $dest_slice_end - $tmp_seq_region_start + 1; } $seq_region_strand = -$seq_region_strand; } ## end else [ if ( $dest_slice_strand...)] # Throw away features off the end of the requested slice if ( $seq_region_end < 1 || $seq_region_start > $dest_slice_length || ( $dest_slice_sr_id ne $seq_region_id ) ) { next FEATURE; } $slice = $dest_slice; } my $display_xref; if ($xref_id) { $display_xref = Bio::EnsEMBL::DBEntry->new_fast( { 'dbID' => $xref_id, 'display_id' => $xref_display_label, 'primary_id' => $xref_primary_acc, 'version' => $xref_version, 'description' => $xref_description, 'info_type' => $xref_info_type, 'info_text' => $xref_info_text, 'adaptor' => $dbEntryAdaptor, 'db_display_name' => $external_db_name, 'dbname' => $external_db } ); } # Finally, create the new Transcript. push( @transcripts, $self->_create_feature_fast( 'Bio::EnsEMBL::Transcript', { 'analysis' => $analysis, 'start' => $seq_region_start, 'end' => $seq_region_end, 'strand' => $seq_region_strand, 'adaptor' => $self, 'slice' => $slice, 'dbID' => $transcript_id, 'stable_id' => $stable_id, 'version' => $version, 'created_date' => $created_date || undef, 'modified_date' => $modified_date || undef, 'external_name' => $xref_display_label, 'external_db' => $external_db, 'external_status' => $external_status, 'external_display_name' => $external_db_name, 'display_xref' => $display_xref, 'description' => $description, 'biotype' => $biotype, 'status' => $status, 'is_current' => $is_current, 'edits_enabled' => 1 } ) ); } return \@transcripts; } =head2 fetch_all_by_exon_supporting_evidence Arg [1] : String $hit_name Name of supporting feature Arg [2] : String $feature_type one of "dna_align_feature" or "protein_align_feature" Arg [3] : (optional) Bio::Ensembl::Analysis Example : $tr = $tr_adaptor->fetch_all_by_exon_supporting_evidence ('XYZ', 'dna_align_feature'); Description: Gets all the transcripts with exons which have a specified hit on a particular type of feature. Optionally filter by analysis. Returntype : Listref of Bio::EnsEMBL::Transcript objects Exceptions : If feature_type is not of correct type. Caller : general Status : Stable =cut sub fetch_all_by_exon_supporting_evidence { my ($self, $hit_name, $feature_type, $analysis) = @_; if($feature_type !~ /(dna)|(protein)_align_feature/) { throw("feature type must be dna_align_feature or protein_align_feature"); } my $anal_from = ""; $anal_from = ", analysis a " if ($analysis); my $anal_where = ""; $anal_where = "AND a.analysis_id = f.analysis_id AND a.analysis_id=? " if ($analysis); my $sql = qq( SELECT DISTINCT(t.transcript_id) FROM transcript t, exon_transcript et, supporting_feature sf, $feature_type f $anal_from WHERE t.transcript_id = et.transcript_id AND t.is_current = 1 AND et.exon_id = sf.exon_id AND sf.feature_id = f.${feature_type}_id AND sf.feature_type = ? AND f.hit_name=? $anal_where ); my $sth = $self->prepare($sql); $sth->bind_param(1, $feature_type, SQL_VARCHAR); $sth->bind_param(2, $hit_name, SQL_VARCHAR); $sth->bind_param(3, $analysis->dbID(), SQL_INTEGER) if ($analysis); $sth->execute(); my @transcripts; while( my $id = $sth->fetchrow_array ) { my $transcript = $self->fetch_by_dbID( $id ); push(@transcripts, $transcript) if $transcript; } return \@transcripts; } =head2 fetch_all_by_transcript_supporting_evidence Arg [1] : String $hit_name Name of supporting feature Arg [2] : String $feature_type one of "dna_align_feature" or "protein_align_feature" Arg [3] : (optional) Bio::Ensembl::Analysis Example : $transcripts = $transcript_adaptor->fetch_all_by_transcript_supporting_evidence('XYZ', 'dna_align_feature'); Description: Gets all the transcripts with evidence from a specified hit_name on a particular type of feature, stored in the transcript_supporting_feature table. Optionally filter by analysis. For hits stored in the supporting_feature table (linked to exons) use fetch_all_by_exon_supporting_evidence instead. Returntype : Listref of Bio::EnsEMBL::Transcript objects Exceptions : If feature_type is not of correct type. Caller : general Status : Stable =cut sub fetch_all_by_transcript_supporting_evidence { my ($self, $hit_name, $feature_type, $analysis) = @_; if($feature_type !~ /(dna)|(protein)_align_feature/) { throw("feature type must be dna_align_feature or protein_align_feature"); } my $anal_from = ""; $anal_from = ", analysis a " if ($analysis); my $anal_where = ""; $anal_where = "AND a.analysis_id = f.analysis_id AND a.analysis_id=? " if ($analysis); my $sql = qq( SELECT DISTINCT(t.transcript_id) FROM transcript t, transcript_supporting_feature sf, $feature_type f $anal_from WHERE t.transcript_id = sf.transcript_id AND t.is_current = 1 AND sf.feature_id = f.${feature_type}_id AND sf.feature_type = ? AND f.hit_name=? $anal_where ); my $sth = $self->prepare($sql); $sth->bind_param(1, $feature_type, SQL_VARCHAR); $sth->bind_param(2, $hit_name, SQL_VARCHAR); $sth->bind_param(3, $analysis->dbID(), SQL_INTEGER) if ($analysis); $sth->execute(); my @transcripts; while( my $id = $sth->fetchrow_array ) { my $transcript = $self->fetch_by_dbID( $id ); push(@transcripts, $transcript) if $transcript; } return \@transcripts; } ########################## # # # DEPRECATED METHODS # # # ########################## =head2 get_display_xref Description: DEPRECATED. Use $transcript->display_xref() instead. =cut sub get_display_xref { my ($self, $transcript) = @_; deprecate("display_xref should be retreived from Transcript object directly."); if ( !defined $transcript ) { throw("Must call with a Transcript object"); } my $sth = $self->prepare(qq( SELECT e.db_name, x.display_label, e.db_external_name, x.xref_id FROM transcript t, xref x, external_db e WHERE t.transcript_id = ? AND t.display_xref_id = x.xref_id AND x.external_db_id = e.external_db_id )); $sth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sth->execute(); my ($db_name, $display_label, $xref_id, $display_db_name ) = $sth->fetchrow_array(); if ( !defined $xref_id ) { return undef; } my $db_entry = Bio::EnsEMBL::DBEntry->new( -dbid => $xref_id, -adaptor => $self->db->get_DBEntryAdaptor(), -dbname => $db_name, -display_id => $display_label -db_display_name => $display_db_name ); return $db_entry; } =head2 get_stable_entry_info Description: DEPRECATED. Use $transcript->stable_id() instead. =cut sub get_stable_entry_info { my ($self, $transcript) = @_; deprecate("Stable ids should be loaded directly now"); unless ( defined $transcript && ref $transcript && $transcript->isa('Bio::EnsEMBL::Transcript') ) { throw("Needs a Transcript object, not a $transcript"); } my $sth = $self->prepare(qq( SELECT stable_id, version FROM transcript_stable_id WHERE transcript_id = ? )); $sth->bind_param(1, $transcript->dbID, SQL_INTEGER); $sth->execute(); my @array = $sth->fetchrow_array(); $transcript->{'_stable_id'} = $array[0]; $transcript->{'_version'} = $array[1]; return 1; } =head2 fetch_all_by_DBEntry Description: DEPRECATED. Use fetch_all_by_external_name() instead. =cut sub fetch_all_by_DBEntry { my $self = shift; deprecate('Use fetch_all_by_external_name instead.'); return $self->fetch_all_by_external_name(@_); } 1;
adamsardar/perl-libs-custom
EnsemblAPI/ensembl/modules/Bio/EnsEMBL/DBSQL/TranscriptAdaptor.pm
Perl
apache-2.0
57,545
# Copyright 2020, Google LLC # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. package Google::Ads::GoogleAds::V8::Common::ProductConditionInfo; use strict; use warnings; use base qw(Google::Ads::GoogleAds::BaseEntity); use Google::Ads::GoogleAds::Utils::GoogleAdsHelper; sub new { my ($class, $args) = @_; my $self = {condition => $args->{condition}}; # Delete the unassigned fields in this object for a more concise JSON payload remove_unassigned_fields($self, $args); bless $self, $class; return $self; } 1;
googleads/google-ads-perl
lib/Google/Ads/GoogleAds/V8/Common/ProductConditionInfo.pm
Perl
apache-2.0
1,026
=head1 LICENSE Copyright (c) 1999-2011 The European Bioinformatics Institute and Genome Research Limited. All rights reserved. This software is distributed under a modified Apache license. For license details, please see http://www.ensembl.org/info/about/code_licence.html =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <dev@ensembl.org>. Questions may also be sent to the Ensembl help desk at <helpdesk@ensembl.org>. =cut =head1 NAME Bio::EnsEMBL::DBSQL::SupportingFeatureAdaptor - Retrieves supporting features from the database. =head1 SYNOPSIS my $sfa = $registry->get_adaptor( 'Human', 'Core', 'SupportingFeature' ); my @supporting_feats = @{ $sfa->fetch_all_by_Exon($exon) }; =head1 METHODS =cut package Bio::EnsEMBL::DBSQL::SupportingFeatureAdaptor; use strict; use Bio::EnsEMBL::DBSQL::BaseAdaptor; use Bio::EnsEMBL::Utils::Exception qw(throw warning); use vars qw(@ISA); #inherits from BaseAdaptor @ISA = qw(Bio::EnsEMBL::DBSQL::BaseAdaptor); =head2 fetch_all_by_Exon Arg [1] : Bio::EnsEMBL::Exon $exon The exon to fetch supporting features. Example : @sfs = @{ $supporting_feat_adaptor->fetch_all_by_Exon($exon) }; Description: Retrieves supporting features (evidence) for a given exon. Returntype : List of Bio::EnsEMBL::BaseAlignFeatures in the same coordinate system as the $exon argument Exceptions : Warning if $exon is not in the database (i.e. dbID not defined). Throw if a retrieved supporting feature is of unknown type. Caller : Bio::EnsEMBL::Exon Status : Stable =cut sub fetch_all_by_Exon { my ( $self, $exon ) = @_; my $out = []; unless($exon->dbID) { warning("Cannot retrieve evidence for exon without dbID"); return []; } my $sth = $self->prepare("SELECT sf.feature_type, sf.feature_id FROM supporting_feature sf WHERE exon_id = ?"); $sth->bind_param(1,$exon->dbID,SQL_INTEGER); $sth->execute(); my $prot_adp = $self->db->get_ProteinAlignFeatureAdaptor; my $dna_adp = $self->db->get_DnaAlignFeatureAdaptor; my $feature; while(my ($type, $feature_id) = $sth->fetchrow){ if($type eq 'protein_align_feature'){ $feature = $prot_adp->fetch_by_dbID($feature_id); } elsif($type eq 'dna_align_feature'){ $feature = $dna_adp->fetch_by_dbID($feature_id); } else { warning("Unknown feature type [$type]\n"); } if(!$feature) { warning("Supporting feature $type $feature_id does not exist in DB"); } else { my $new_feature = $feature->transfer($exon->slice()); push @$out, $new_feature if( $new_feature ); } } $sth->finish(); return $out; } =head2 store Arg [1] : Int $exonsID The dbID of an EnsEMBL exon to associate with supporting features. Arg [2] : Ref to array of Bio::EnsEMBL::BaseAlignFeature (the support) Example : $sfa->store($exon_id, \@features); Description: Stores a set of alignment features and associates an EnsEMBL exon with them Returntype : none Exceptions : thrown when invalid dbID is passed to this method Caller : TranscriptAdaptor Status : Stable =cut sub store { my ( $self, $exon_dbID, $aln_objs ) = @_; my $pep_check_sql = "SELECT protein_align_feature_id " . "FROM protein_align_feature " . "WHERE seq_region_id = ? " . "AND seq_region_start = ? " . "AND seq_region_end = ? " . "AND seq_region_strand = ? " . "AND hit_name = ? " . "AND hit_start = ? " . "AND hit_end = ? " . "AND analysis_id = ? " . "AND cigar_line = ? "; my $dna_check_sql = "SELECT dna_align_feature_id " . "FROM dna_align_feature " . "WHERE seq_region_id = ? " . "AND seq_region_start = ? " . "AND seq_region_end = ? " . "AND seq_region_strand = ? " . "AND hit_name = ? " . "AND hit_start = ? " . "AND hit_end = ? " . "AND analysis_id = ? " . "AND cigar_line = ? " . "AND hit_strand = ? "; my $assoc_check_sql = "SELECT * " . "FROM supporting_feature " . "WHERE exon_id = $exon_dbID " . "AND feature_type = ? " . "AND feature_id = ? "; my $assoc_write_sql = "INSERT into supporting_feature " . "(exon_id, feature_id, feature_type) " . "values(?, ?, ?)"; my $pep_check_sth = $self->prepare($pep_check_sql); my $dna_check_sth = $self->prepare($dna_check_sql); my $assoc_check_sth = $self->prepare($assoc_check_sql); my $sf_sth = $self->prepare($assoc_write_sql); my $dna_adaptor = $self->db->get_DnaAlignFeatureAdaptor(); my $pep_adaptor = $self->db->get_ProteinAlignFeatureAdaptor(); foreach my $f (@$aln_objs) { # check that the feature is in toplevel coords if($f->slice->start != 1 || $f->slice->strand != 1) { #move feature onto a slice of the entire seq_region my $tls = $self->db->get_sliceAdaptor->fetch_by_region($f->slice->coord_system->name(), $f->slice->seq_region_name(), undef, #start undef, #end undef, #strand $f->slice->coord_system->version()); $f = $f->transfer($tls); if(!$f) { throw('Could not transfer Feature to slice of ' . 'entire seq_region prior to storing'); } } if(!$f->isa("Bio::EnsEMBL::BaseAlignFeature")){ throw("$f must be an align feature otherwise" . "it can't be stored"); } my ($sf_dbID, $type, $adap, $check_sth); my @check_args = ($self->db->get_SliceAdaptor->get_seq_region_id($f->slice), $f->start, $f->end, $f->strand, $f->hseqname, $f->hstart, $f->hend, $f->analysis->dbID, $f->cigar_string); if($f->isa("Bio::EnsEMBL::DnaDnaAlignFeature")){ $adap = $dna_adaptor; $check_sth = $dna_check_sth; $type = 'dna_align_feature'; push @check_args, $f->hstrand; } elsif($f->isa("Bio::EnsEMBL::DnaPepAlignFeature")){ $adap = $pep_adaptor; $check_sth = $pep_check_sth; $type = 'protein_align_feature'; } else { warning("Supporting feature of unknown type. Skipping : [$f]\n"); next; } $check_sth->execute(@check_args); $sf_dbID = $check_sth->fetchrow_array; if (not $sf_dbID) { $adap->store($f); $sf_dbID = $f->dbID; } # now check association $assoc_check_sth->execute($type, $sf_dbID); if (not $assoc_check_sth->fetchrow_array) { $sf_sth->bind_param(1, $exon_dbID, SQL_INTEGER); $sf_sth->bind_param(2, $sf_dbID, SQL_INTEGER); $sf_sth->bind_param(3, $type, SQL_VARCHAR); $sf_sth->execute(); } } $dna_check_sth->finish; $pep_check_sth->finish; $assoc_check_sth->finish; $sf_sth->finish; } 1;
adamsardar/perl-libs-custom
EnsemblAPI/ensembl/modules/Bio/EnsEMBL/DBSQL/SupportingFeatureAdaptor.pm
Perl
apache-2.0
7,513
#! /usr/bin/perl use strict; use utf8; use warnings; use Bio::SeqIO; die"perl $0 <in.fa> <out.fa>\n" unless(@ARGV eq 2); sub TranslateDNAFile(){ my ($infile, $outfile) = @_; my $in = Bio::SeqIO->new(-file=>"< $infile",-format=>"fasta"); my $out = Bio::SeqIO->new(-file=>"> $outfile", -format=>"fasta"); while (my $seq = $in->next_seq()){ $out->write_seq($seq) if($seq->length >= 50); } } &TranslateDNAFile($ARGV[0], $ARGV[1]);
BaconKwan/Perl_programme
sixPack/filter.pl
Perl
apache-2.0
437
#!/usr/bin/perl ###### # This script calculates some apache live stats # All the information is extracted from the server-status page of # the running apache webserver. So apache must be configured to use # mod_status and this page should be available from the localhost # through the use of the 'apachectl status' command. # # Script could easily be adapted to access remotely to this page though. # # $APACHECTL should be configured to suit apache installation # # You can either ask for (first arg) # - requests-sec number of requests per second # - bytes-sec number of bytes per second # - bytes-req number of bytes per request # - cpuload CPU load # - requests number of concurrent requests # - idle number of idle apache processes # - all output of all values, one per line # # Copyright Antoine Delvaux 2002-2007 # # * This program is free software; you can redistribute it and/or # * modify it under the terms of the GNU General Public License # * as published by the Free Software Foundation; either version 2 # * of the License, or (at your option) any later version. # * # * This program is distributed in the hope that it will be useful, # * but WITHOUT ANY WARRANTY; without even the implied warranty of # * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # * GNU General Public License for more details. # * # * You should have received a copy of the GNU General Public License # * along with this program; if not, write to the Free Software # * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA, # * or go to http://www.gnu.org/copyleft/gpl.html # my $APACHECTL = '/usr/sbin/apachectl'; my $APACHESTATUS = $APACHECTL.' status'; my @val, $out, $outall; if (-x $APACHECTL) { open(STATUS_OUT, "$APACHESTATUS|"); while (<STATUS_OUT>) { if (($ARGV[0] eq "cpuload" || $ARGV[0] eq "all") && /CPU Usage/) { # grep the CPU load value @val = split (' '); if ($val[7]) { $out = $val[7]; } else { # in case the % of CPU load cannot be computed because very low $out = 0; } $out =~ s/%//; $out =~ s/^\./0\./; $outall = $out; } if (($ARGV[0] eq "requests-sec" || $ARGV[0] eq "all") && /requests\/sec/) { # grep the number of requests per second @val = split (' '); $out = $val[0]; $out =~ s/^\./0\./; $outall .= "\n".$out; } if (($ARGV[0] eq "bytes-sec" || $ARGV[0] eq "all") && /B\/second/) { # grep the number of bytes transmited per second @val = split (' '); if ($val[4] eq "kB/second") { $out = $val[3] * 1000; } elsif ($val[4] eq "MB/second") { $out = $val[3] * 1000000; } else { $out = $val[3]; } $out =~ s/^\./0\./; $outall .= "\n".$out; } if (($ARGV[0] eq "bytes-req" || $ARGV[0] eq "all") && /B\/request/) { # grep the number of bytes transmited per request @val = split (' '); if ($val[7] eq "kB/request") { $out = $val[6] * 1000; } elsif ($val[7] eq "MB/request") { $out = $val[6] * 1000000; } else { $out = $val[6]; } $out =~ s/^\./0\./; $outall .= "\n".$out; } if (($ARGV[0] eq "requests" || $ARGV[0] eq "all") && /requests currently/) { # grep the number of concurent requests @val = split (' '); $out = $val[0]; $out =~ s/^\./0\./; $outall .= "\n".$out; } if (($ARGV[0] eq "idle" || $ARGV[0] eq "all") && /requests currently/) { # grep the number of concurent requests @val = split (' '); $out = $val[5]; $out =~ s/^\./0\./; $outall .= "\n".$out; } } close(STATUS_OUT); if ($out && $ARGV[0] ne "all" ) { print $out."\n"; } elsif ($outall) { print $outall."\n"; } else { print "No value found in the output of apachectl !\n"; print "Usage: $0 cpuload|requests-sec|bytes-sec|bytes-req|requests|idle|all\n"; } } else { print "apachectl command not found !\n"; }
tonin/snmpd-helpers
apache/apache-stats.pl
Perl
apache-2.0
3,843
# # Copyright 2015 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package snmp_standard::mode::ntp; use base qw(centreon::plugins::mode); use strict; use warnings; use centreon::plugins::misc; use DateTime; sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '1.0'; $options{options}->add_options(arguments => { "ntp-hostname:s" => { name => 'ntp_hostname' }, "ntp-port:s" => { name => 'ntp_port', default => 123 }, "warning:s" => { name => 'warning' }, "critical:s" => { name => 'critical' }, "timezone:s" => { name => 'timezone' }, }); return $self; } sub check_options { my ($self, %options) = @_; $self->SUPER::init(%options); if (($self->{perfdata}->threshold_validate(label => 'warning', value => $self->{option_results}->{warning})) == 0) { $self->{output}->add_option_msg(short_msg => "Wrong warning threshold '" . $self->{option_results}->{warning} . "'."); $self->{output}->option_exit(); } if (($self->{perfdata}->threshold_validate(label => 'critical', value => $self->{option_results}->{critical})) == 0) { $self->{output}->add_option_msg(short_msg => "Wrong critical threshold '" . $self->{option_results}->{critical} . "'."); $self->{output}->option_exit(); } if (defined($self->{option_results}->{ntp_hostname})) { centreon::plugins::misc::mymodule_load(output => $self->{output}, module => 'Net::NTP', error_msg => "Cannot load module 'Net::NTP'."); } } sub run { my ($self, %options) = @_; # $options{snmp} = snmp object $self->{snmp} = $options{snmp}; my ($ref_time, $distant_time); my $oid_hrSystemDate = '.1.3.6.1.2.1.25.1.2.0'; my $result = $self->{snmp}->get_leef(oids => [ $oid_hrSystemDate ]); if (scalar(keys %$result) == 0) { $self->{output}->output_add(severity => 'UNKNOWN', short_msg => "Cannot get 'hrSystemDate' information."); $self->{output}->display(); $self->{output}->exit(); } if (defined($self->{option_results}->{ntp_hostname})) { my %ntp; eval { %ntp = Net::NTP::get_ntp_response($self->{option_results}->{ntp_hostname}, $self->{option_results}->{ntp_port}); }; if ($@) { $self->{output}->output_add(severity => 'UNKNOWN', short_msg => "Couldn't connect to ntp server: " . $@); $self->{output}->display(); $self->{output}->exit(); } $ref_time = $ntp{'Transmit Timestamp'}; } else { $ref_time = time(); } my @remote_date = unpack 'n C6 a C2', $result->{$oid_hrSystemDate}; my $timezone = 'UTC'; if (defined($self->{option_results}->{timezone}) && $self->{option_results}->{timezone} ne '') { $timezone = $self->{option_results}->{timezone}; } elsif (defined($remote_date[9])) { $timezone = sprintf("%s%02d%02d", $remote_date[7], $remote_date[8], $remote_date[9]); # format +0630 } my $dt = DateTime->new( year => $remote_date[0], month => $remote_date[1], day => $remote_date[2], hour => $remote_date[3], minute => $remote_date[4], second => $remote_date[5], time_zone => $timezone, ); $distant_time = $dt->epoch; my $diff = $distant_time - $ref_time; my $exit = $self->{perfdata}->threshold_check(value => $diff, threshold => [ { label => 'critical', 'exit_litteral' => 'critical' }, { label => 'warning', exit_litteral => 'warning' } ]); $self->{output}->output_add(severity => $exit, short_msg => sprintf("Time offset %d second(s)", $diff)); $self->{output}->perfdata_add(label => 'offset', unit => 's', value => sprintf("%d", $diff), warning => $self->{perfdata}->get_perfdata_for_output(label => 'warning'), critical => $self->{perfdata}->get_perfdata_for_output(label => 'critical'), ); $self->{output}->display(); $self->{output}->exit(); } 1; __END__ =head1 MODE Check time offset of server with ntp server. Use local time if ntp-host option is not set. SNMP gives a date with second precision (no milliseconds). Time precision is not very accurate. Use threshold with (+-) 2 seconds offset (minimum). =over 8 =item B<--warning> Threshold warning. =item B<--critical> Threshold critical. =item B<--ntp-hostname> Set the ntp hostname (if not set, localtime is used). =item B<--ntp-port> Set the ntp port (Default: 123). =item B<--timezone> Set the timezone of distant server. For Windows, you need to set it. Can use format: 'Europe/London' or '+0100'. =back =cut
s-duret/centreon-plugins
snmp_standard/mode/ntp.pm
Perl
apache-2.0
6,002
#!/usr/bin/perl package GATK4::VariantFilterHard; use strict; use warnings; use File::Basename; use List::Util qw[min]; use CQS::PBS; use CQS::ConfigUtils; use CQS::SystemUtils; use CQS::FileUtils; use CQS::NGSCommon; use CQS::StringUtils; use GATK4::GATK4Task; use GATK4::VariantFilterUtils; our @ISA = qw(GATK4::GATK4Task); sub new { my ($class) = @_; my $self = $class->SUPER::new(); $self->{_name} = __PACKAGE__; $self->{_suffix} = "_vfh"; bless $self, $class; return $self; } sub perform { my ( $self, $config, $section ) = @_; my ( $task_name, $path_file, $pbs_desc, $target_dir, $log_dir, $pbs_dir, $result_dir, $option, $sh_direct, $cluster, $thread, $memory, $init_command ) = $self->init_parameter( $config, $section ); my $java_option = $self->get_java_option($config, $section, $memory); $self->get_docker_value(1); #https://github.com/gatk-workflows/gatk4-germline-snps-indels/blob/master/joint-discovery-gatk4-local.wdl my $excess_het_threshold = get_option($config, $section, "excess_het_threshold", 54.69); my $is_sample_size_small = get_option($config, $section, "is_sample_size_small", 0); my $ExcessHet_filter = ""; my $InbreedingCoeff_filter = ""; if(! $is_sample_size_small){ $ExcessHet_filter = "-filter \"ExcessHet > ${excess_het_threshold}\" --filter-name \"ExcessHet${excess_het_threshold}\" "; $InbreedingCoeff_filter = "-filter \"InbreedingCoeff < -0.8\" --filter-name \"InbreedingCoeff-0.8\" "; } my $vcf_files = get_raw_files( $config, $section ); my $script = dirname(__FILE__) . "/fixLeftTrimDeletion.py"; if ( !-e $script ) { die "File not found : " . $script; } my $shfile = $self->get_task_filename( $pbs_dir, $task_name ); open( my $sh, ">$shfile" ) or die "Cannot create $shfile"; print $sh get_run_command($sh_direct) . "\n"; for my $interval_name (sort keys %$vcf_files) { my $cur_dir = create_directory_or_die( $result_dir . "/$interval_name" ); my $vcf = $vcf_files->{$interval_name}[0]; my $final_file = $interval_name . ".indels.snp.hardfilter.pass.vcf.gz"; my $pbs_file = $self->get_pbs_filename( $pbs_dir, $interval_name ); my $pbs_name = basename($pbs_file); my $log = $self->get_log_filename( $log_dir, $interval_name ); my $log_desc = $cluster->get_log_description($log); print $sh "\$MYCMD ./$pbs_name \n"; my $pbs = $self->open_pbs( $pbs_file, $pbs_desc, $log_desc, $path_file, $cur_dir, $final_file, $init_command ); print $pbs " gatk SelectVariants \\ -V ${vcf} \\ -select-type SNP \\ -O snps.vcf.gz gatk SelectVariants \\ -V ${vcf} \\ -select-type INDEL \\ -select-type MIXED \\ -O indels.vcf.gz gatk VariantFiltration \\ -V snps.vcf.gz \\ -filter \"QD < 2.0\" --filter-name \"QD2\" \\ -filter \"QUAL < 30.0\" --filter-name \"QUAL30\" \\ -filter \"SOR > 3.0\" --filter-name \"SOR3\" \\ -filter \"FS > 60.0\" --filter-name \"FS60\" \\ -filter \"MQ < 40.0\" --filter-name \"MQ40\" \\ -filter \"MQRankSum < -12.5\" --filter-name \"MQRankSum-12.5\" \\ -filter \"ReadPosRankSum < -8.0\" --filter-name \"ReadPosRankSum-8\" $ExcessHet_filter $ExcessHet_filter \\ -O snps_filtered.vcf.gz gatk VariantFiltration \\ -V indels.vcf.gz \\ -filter \"QD < 2.0\" --filter-name \"QD2\" \\ -filter \"QUAL < 30.0\" --filter-name \"QUAL30\" \\ -filter \"FS > 200.0\" --filter-name \"FS200\" \\ -filter \"ReadPosRankSum < -20.0\" --filter-name \"ReadPosRankSum-20\" $InbreedingCoeff_filter \\ -O indels_filtered.vcf.gz gatk MergeVcfs \\ -I snps_filtered.vcf.gz \\ -I indels_filtered.vcf.gz \\ -O merged_filtered.vcf.gz gatk SelectVariants \\ -O $final_file \\ -V merged_filtered.vcf.gz \\ --exclude-filtered "; print $pbs " if [[ -s $final_file ]]; then rm snps.vcf.gz snps.vcf.gz.tbi \\ indels.vcf.gz indels.vcf.gz.tbi \\ snps_filtered.vcf.gz snps_filtered.vcf.gz.tbi \\ indels_filtered.vcf.gz indels_filtered.vcf.gz.tbi \\ merged_filtered.vcf.gz merged_filtered.vcf.gz.tbi fi "; $self->close_pbs( $pbs, $pbs_file ); } close $sh; if ( is_linux() ) { chmod 0755, $shfile; } print " !!!shell file $shfile created, you can run this shell file to submit all " . $self->{_name} . " tasks. \n "; } sub result { my ( $self, $config, $section, $pattern ) = @_; my ( $task_name, $path_file, $pbs_desc, $target_dir, $log_dir, $pbs_dir, $result_dir, $option, $sh_direct ) = $self->init_parameter( $config, $section, 0 ); my $result = {}; my $vcf_files = get_raw_files( $config, $section ); for my $interval_name (sort keys %$vcf_files) { my $final_file = $interval_name . ".indels.snp.hardfilter.pass.vcf.gz"; $result->{$interval_name} = filter_array( ["$result_dir/$interval_name/$final_file"], $pattern ); } return $result; } 1;
shengqh/ngsperl
lib/GATK4/VariantFilterHard.pm
Perl
apache-2.0
4,826
#!/usr/bin/perl -w # # Copyright 2020, Google LLC # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # # This example gets all feed items of the specified feed item set by fetching all # feed item set links. To create a new feed item set, run create_feed_item_set.pl. # To link a feed item to a feed item set, run link_feed_item_set.pl. use strict; use warnings; use utf8; use FindBin qw($Bin); use lib "$Bin/../../lib"; use Google::Ads::GoogleAds::Client; use Google::Ads::GoogleAds::Utils::GoogleAdsHelper; use Google::Ads::GoogleAds::Utils::SearchStreamHandler; use Google::Ads::GoogleAds::V10::Services::GoogleAdsService::SearchGoogleAdsStreamRequest; use Google::Ads::GoogleAds::V10::Utils::ResourceNames; use Getopt::Long qw(:config auto_help); use Pod::Usage; use Cwd qw(abs_path); # The following parameter(s) should be provided to run the example. You can # either specify these by changing the INSERT_XXX_ID_HERE values below, or on # the command line. # # Parameters passed on the command line will override any parameters set in # code. # # Running the example with -h will print the command line usage. my $customer_id = "INSERT_CUSTOMER_ID_HERE"; my $feed_id = "INSERT_FEED_ID_HERE"; my $feed_item_set_id = "INSERT_FEED_ITEM_SET_ID_HERE"; sub get_feed_items_of_feed_item_set { my ($api_client, $customer_id, $feed_id, $feed_item_set_id) = @_; # Create a query that retrieves all feed item set links associated with the # specified feed item set. my $search_query = sprintf "SELECT feed_item_set_link.feed_item FROM feed_item_set_link " . "WHERE feed_item_set_link.feed_item_set = '%s'", Google::Ads::GoogleAds::V10::Utils::ResourceNames::feed_item_set( $customer_id, $feed_id, $feed_item_set_id); # Create a search Google Ads stream request that will retrieve the feed item set links. my $search_stream_request = Google::Ads::GoogleAds::V10::Services::GoogleAdsService::SearchGoogleAdsStreamRequest ->new({ customerId => $customer_id, query => $search_query }); # Get the GoogleAdsService. my $google_ads_service = $api_client->GoogleAdsService(); my $search_stream_handler = Google::Ads::GoogleAds::Utils::SearchStreamHandler->new({ service => $google_ads_service, request => $search_stream_request }); printf "The feed items with the following resource names are linked with " . "the feed item set with ID %d:\n", $feed_item_set_id; # Iterate over all rows in all messages and print the requested field values # for the feed item set link in each row. $search_stream_handler->process_contents( sub { my $google_ads_row = shift; printf "'%s'\n", $google_ads_row->{feedItemSetLink}{feedItem}; }); return 1; } # Don't run the example if the file is being included. if (abs_path($0) ne abs_path(__FILE__)) { return 1; } # Get Google Ads Client, credentials will be read from ~/googleads.properties. my $api_client = Google::Ads::GoogleAds::Client->new(); # By default examples are set to die on any server returned fault. $api_client->set_die_on_faults(1); # Parameters passed on the command line will override any parameters set in code. GetOptions( "customer_id=s" => \$customer_id, "feed_id=i" => \$feed_id, "feed_item_set_id=i" => \$feed_item_set_id ); # Print the help message if the parameters are not initialized in the code nor # in the command line. pod2usage(2) if not check_params($customer_id, $feed_id, $feed_item_set_id); # Call the example. get_feed_items_of_feed_item_set($api_client, $customer_id =~ s/-//gr, $feed_id, $feed_item_set_id); =pod =head1 NAME get_feed_items_of_feed_item_set =head1 DESCRIPTION This example gets all feed items of the specified feed item set by fetching all feed item set links. To create a new feed item set, run create_feed_item_set.pl. To link a feed item to a feed item set, run link_feed_item_set.pl. =head1 SYNOPSIS get_feed_items_of_feed_item_set.pl [options] -help Show the help message. -customer_id The Google Ads customer ID. -feed_id The feed ID that the specified feed item set is associated with. -feed_item_set_id The ID of specified feed item set. =cut
googleads/google-ads-perl
examples/feeds/get_feed_items_of_feed_item_set.pl
Perl
apache-2.0
4,824
# # Copyright 2021 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package network::perle::ids::snmp::plugin; use strict; use warnings; use base qw(centreon::plugins::script_snmp); sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '1.0'; %{$self->{modes}} = ( 'alarms' => 'network::perle::ids::snmp::mode::alarms', 'hardware' => 'network::perle::ids::snmp::mode::hardware', 'interfaces' => 'snmp_standard::mode::interfaces', 'list-interfaces' => 'snmp_standard::mode::listinterfaces', 'system-usage' => 'network::perle::ids::snmp::mode::systemusage', ); return $self; } 1; __END__ =head1 PLUGIN DESCRIPTION Check Perle IDS (200, 300, 400) in SNMP. =cut
Tpo76/centreon-plugins
network/perle/ids/snmp/plugin.pm
Perl
apache-2.0
1,545
package Tapper::PRC; # git description: v4.1.1-11-g75f1086 BEGIN { $Tapper::PRC::AUTHORITY = 'cpan:TAPPER'; } { $Tapper::PRC::VERSION = '4.1.2'; } # ABSTRACT: Tapper - Program run control for test program automation use strict; use warnings; use IO::Socket::INET; use YAML::Syck; use Moose; use Log::Log4perl; use URI::Escape; extends 'Tapper::Base'; with 'MooseX::Log::Log4perl'; has cfg => (is => 'rw', isa => 'HashRef', default => sub { {} }, ); with 'Tapper::Remote::Net'; sub mcp_error { my ($self, $error) = @_; $self->log->error($error); my $retval = $self->mcp_inform({status => 'error-testprogram', error => $error}); $self->log->error($retval) if $retval; exit 1; }; 1; __END__ =pod =encoding utf-8 =head1 NAME Tapper::PRC - Tapper - Program run control for test program automation =head1 DESCRIPTION This distribution implements a program run control for test program automation. It is part of the Tapper distribution. =head1 FUNCTIONS =head2 mcp_error Log an error and exit. @param string - messages to send to MCP @return never returns =head1 AUTHOR AMD OSRC Tapper Team <tapper@amd64.org> =head1 COPYRIGHT AND LICENSE This software is Copyright (c) 2012 by Advanced Micro Devices, Inc.. This is free software, licensed under: The (two-clause) FreeBSD License =cut
gitpan/Tapper-PRC
lib/Tapper/PRC.pm
Perl
bsd-2-clause
1,396
=head1 NAME graphslam-engine - Construct and solve robot pose graphs from .rawlog dataset files I<Note:>As the graphslam-engine application still under development, current manpage may be outdated. Refer to the MRPT doxygen class documentation and the corresponding application documentation for the latest features and usage instructions =head1 SYNOPSIS The available command line arguments are listed below: graphslam-engine [--disable-visuals] [--list-optimizers] [--list-regs] [--list-edge-regs] [--list-node-regs][-o <CLevMarqGSO>][-e <CICPCriteriaERD>][-n <CICPCriteriaNRD>][-g <contents.rawlog.GT.txt>][-r <contents.rawlog>] [-i <config.ini>] [--][--version] [-h] Alternatively run graphslam-engine -h for the full arguments list =head1 DESCRIPTION Aim of the app is to B<perform 2D graph-slam>: Robot B<localizes> itself in the environment while, at the same time B<builds a map> of that environment. App currently executes SLAM using MRPT rawlog files (both MRPT rawlog formats are supported) as input which should contain (some of) the following observation types: =over 4 =item * B<CObservationOdometry> =item * B<CObservation2DRangeScan> =item * B<CObservation3DRangeScan> Working with 3DRangeScan is currently in an experimental phase. =back The majority of the graphslam-engine parameters in each case should be specified in an external .ini file which is to be given as a command-line argument. The following parameters can also be specified as command-line arguments: =over 4 =item * B<.ini-file> [REQUIRED] Specify the .ini configuration file using the -i, --ini-file flags. Configuration file parameters are read by the main CGraphSlamEngine class as well as the node/edge registration schemes, and the optimization scheme. =item * B<rawlog-file> [REQUIRED] Specify the rawlog dataset file using the -r, --rawlog flags. =item * B<ground-truth> Specify a ground truth file with -g, --ground-truth flags. Ground truth has to be specified if user has set I<visualize_slam_metric> or I<visualize_ground_truth> to true in the .ini file, otherwise an exception is raised. =item * B<Node/Edge registration decider classes to be used.> Specify the node registration or/and edge registration decider classes to be used using -n, --node-reg, -e --edge-reg flags. If not specified the default CFixedIntervalsNRD, CICPCriteriaERD are used as node and edge registration decider schemes respectively. =item * B<Optimizer class to be used> Specify the class to be used for the optimization of the pose-graph using the -o --optimizer flags. Currently the only supported optimization scheme is Levenberg-Marquardt non-linear graph optimization defined in optimize_graph_spa_levmarq (http://reference.mrpt.org/devel/group__mrpt__graphslam__grp.html#ga022f4a70be5ec7c432f46374e4bb9d66) If not specified, the default CLevMarqGSO is used. =back =head1 OPTIONS --disable-visuals Disable Visualization - Overrides related visualize* directives of the .ini file --list-optimizers List (all) available graphslam optimizer classes --list-regs List (all) available registration decider classes --list-edge-regs List available edge registration decider classes --list-node-regs List available node registration decider classes -o <CLevMarqGSO>, --optimizer <CLevMarqGSO> Specify GraphSlam Optimizer -e <CICPCriteriaERD>, --edge-reg <CICPCriteriaERD> Specify Edge registration decider -n <CICPCriteriaNRD>, --node-reg <CICPCriteriaNRD> Specify Node registration decider -g <contents.rawlog.GT.txt>, --ground-truth <contents.rawlog.GT.txt> Ground-truth textfile -r <contents.rawlog>, --rawlog <contents.rawlog> Rawlog dataset file -i <config.ini>, --ini_file <config.ini> .ini configuration file --, --ignore_rest Ignores the rest of the labeled arguments following this flag. --version Displays version information and exits. -h, --help Displays usage information and exits. =head1 PROGRAM INPUT/OUTPUT By default graphslam-engine execution generates an output directory by the name "graphslam-results" within the current working directory. The output directory contains the following files: =over 4 =item * CGraphSlamEngine.log Logfile containing the activity of the CGraphSlamEngine class instance. Activity involves I<output logger messages>, I<time statistics> for critical parts of the application, and summary statistics about the constructed graph (e.g. number of registered nodes, edges). =item * node_registrar.log, edge_registrar.log, optimizer.log Logfiles containing the activity of the corresponding class instances. File contents depend on the implementation of the corresponding classes but in most cases they contain I<output logger messages>, I<time statistics> for critical parts of the class execution. =item * output_graph.graph File contains the constructed graph in the VERTEX/EDGE format. The latter can be visualized using the MRPT graph-slam application for verification reasons. For more information on this, see: https://www.mrpt.org/Graph-SLAM_maps http://www.mrpt.org/list-of-mrpt-apps/application-graph-slam/ =item * output_scene.3DScene File contains the 3DScene that was generated in the end of the graphslam-engine execution. The latter can be visualized using the MRPT SceneViewer3D tool. For more information on this, see http://www.mrpt.org/list-of-mrpt-apps/application-sceneviewer3d/ I<Note:> File is generated only when the visualization of the graph construction is enabled in the .ini configuration file. See .ini parameters as well as the --disable flag for more on this. =item * SLAM_evaluation_metric.log File contains the differences between the estimated trajectory increments and the corresponding ground-truth increments and can be used to verify and evaluate the performance of the SLAM algorithm. For more information on the metric, see "A Comparison of SLAM Algorithms Based on a Graph of Relations - Burgard, Wolfram et al." I<Note:> File is generated only when the ground-truth of the corresponding dataset is given. =back I<Note:> In case a directory named graphslam-results, generated during a previous execution, already exists it is, by default, overwritten. If this is not the desired behavior, user can set the I<user_decides_about_output_dir> .ini parameter to true so that they are asked about this naming conflict during program execution. =head1 EXAMPLES Sample calls to the graphslam-engine application are given below: graphslam-engine --list-regs graphslam-engine --list-regs --list-optimizers graphslam-engine -i $mrpt/share/mrpt/config_files/graphslam-engine/odometry_2DRangeScans.ini -r $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog -g $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog.GT.txt graphslam-engine -i $mrpt/share//mrpt/config_files/graphslam-engine/odometry_2DRangeScans_LC_version.ini -r $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog -g $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog.GT.txt --node-reg CFixedIntervalsNRD --edge-reg CLoopCloserERD --optimizer CLevMarqGSO graphslam-engine -i $mrpt/share//mrpt/config_files/graphslam-engine/laser_odometry.ini -r $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog -g $mrpt/share//mrpt/datasets/graphslam-engine-demos/action_observations_map/range_030_bearing_015.rawlog.GT.txt -n CFixedIntervalsNRD -e CICPCriteriaERD =head1 APPLICATION DESIGN In this section insight into the graphslam-engine application - and corresponding library - is provided. CGraphSlamEngine is the main class executing graphslam. CGraphSlamEngine delegates most of the graph manipulation tasks to node/edge registration deciders and optimizer classes. This makes up for independence between the different tasks as well as for a reconfigurable setup, as the user can select to use different decider/optimizer classes depending on the situation. Users can also write their own decider/optimizer classes by inheriting from one of the CNodeRegistrationDecider, CEdgeRegistrationDecider, CGraphSlamOptimizer interfaces depending on what part they want to implement. =head2 REGISTRATION DECIDERS The registration decider classes are divided into node and edge registration deciders. The former are responsible of adding new nodes in the graph while the latter add additional edges between I<already added> graph nodes. These nodes can be consecutive or non-consecutive. =head3 NODE REGISTRATION DECIDERS Node registration decider schemes add nodes to the graph according to a specific criterion. Node deciders should implement the methods defined in the CNodeRegistrationDecider abstract class. CNodeRegistrationDecider provides the basic methods that have to exist in every node registration decider class. For an example of inheriting from this class see CFixedIntervalsNRD. As a naming convention, all the implemented node registration deciders are suffixed with the NRD acronym. Currently two specific node registration schemes have been implemented: =over 4 =item * CFixedIntervalsNRD Decider registers a new node in the graph if the distance or the angle difference with regards to the previous registered node surpasses a corresponding I<fixed> threshold. Decider makes use only of the CObservationOdometry instances in the rawlog file. =item * CICPCriteriaNRD Decider registers a new node in the graph if the distance or the angle difference with regards to the previous registered node surpasses a corresponding I<fixed> threshold. Decider measures the distance from the current position to the previous registered node using ICP (i.e. matches the current range scan against the range scan of the previous node). In case of noisy 2D laser scans, decider can also use odometry information to locally correct and smoothen the robot trajectory. Decider makes use of 2DRangeScans or 3DRangeScans. =back For more information on this see https://reference.mrpt.org/devel/classmrpt_1_1graphslam_1_1deciders_1_1_c_node_registration_decider.html =head3 EDGE REGISTRATION DECIDERS Edge registration decider schemes add edges between already added nodes in the graph according to a specific criterion. Edge deciders should implement the methods defined in CEdgeRegistrationDecider abstract class. CEdgeRegistrationDecider provides the basic methods that have to exist in every edge registration decider class. For an example of inheriting from this class see CICPCriteriaERD. As a naming convention, all the implemented edge registration deciders are suffixed with the ERD acronym. Currently two specific edge registration schemes have been implemented: =over 4 =item * CICPCriteriaERD Register new edges in the graph with the last inserted node. Criterion for adding new edges should be the goodness of the candidate ICP edge. The nodes for ICP are picked based on the distance from the last inserted node. Decider makes use of 2DRangeScans or 3DRangeScans. =item * CLoopCloserERD Evaluate sets of potential loop closure edges in the graph based on their pairwise consistency matrix. Decider first splits the graph into partitions based on the 2D laser scans of the nodes and then searches for potential loop closure edges within the partitions. Goal is to register only a subset of the potential loop closure edges that maximally agree with each other. Decider is implemented based on the following two papers: [1] Consistent Observation Grouping for Generating Metric-Topological Maps that Improves Robot Localization - J. Blanco, J. Gonzalez, J. Antonio Fernandez Madrigal, 2006 [2] Recognizing places using spectrally clustered local matches - E. Olson, 2009 =back For more information on this see https://reference.mrpt.org/devel/classmrpt_1_1graphslam_1_1deciders_1_1_c_edge_registration_decider.html =head2 OPTIMIZERS Optimizer schemes optimize an already constructed graph so that the registered edges maximally agree with each other. Optimizer schemes should implement the methods defined in CGraphSlamOptimizer abstract class. For an example of inheriting from this class see CLevMarqGSO. As a naming convention, all the implemented graphslam optimizer classes are suffixed with the GSO acronym. For more information on this see https://reference.mrpt.org/devel/classmrpt_1_1graphslam_1_1optimizers_1_1_c_graph_slam_optimizer.html =head1 BUGS Please report bugs at https://github.com/MRPT/mrpt/issues =head1 SEE ALSO =over 4 =item * Application wiki page - https://www.mrpt.org/Applications =item * mrpt::graphslam lib documentation page - https://reference.mrpt.org/devel/namespacemrpt_1_1graphslam.html =item * Application demo video - https://www.youtube.com/watch?v=Pv0yvlzrcXk =item * .ini Example files: For examples of .ini configuration files see the I<$mrpt/share/mrpt/config_files/graphslam-engine directory>. Modify $mrpt according to the path of MRPT source code. =item * Example datasets For a list of datasets used during the application testing see the I<$mrpt/share/mrpt/datasets/graphslam-engine directory>. Modify $mrpt according to the path of MRPT source code. =back =head1 AUTHORS B<graphslam-engine> is part of the Mobile Robot Programming Toolkit (MRPT), It was originally written by Nikos Koukis during the Google Summer of Code (GSOC) 2016 program. This manual page was written by Nikos Koukis <nickkouk@gmail.com>. =head1 COPYRIGHT This program is free software; you can redistribute it and/or modify it under the terms of the BSD License. On Debian GNU/Linux systems, the complete text of the BSD License can be found in `/usr/share/common-licenses/BSD'. =cut
MRPT/mrpt
doc/man-pages/pod/graphslam-engine.pod
Perl
bsd-3-clause
14,028
#!/usr/bin/perl use strict; use Getopt::Long; my $FACT = 0; GetOptions( "f|fact" => \$FACT, ); my $largest = 0; my %CLS; my $OPEN = $ARGV[0]; if($ARGV[0] =~ /\.gz$/) { $OPEN = "gzip -dc $ARGV[0] |"; } open(CLS, $OPEN) or die; while(<CLS>) { chomp; my ($w, $c) = split(/\s/, $_); $CLS{$w} = $c; if($c > $largest) { $largest = $c; } } close(CLS); my $unseen = "G"; while(<STDIN>) { chomp; my @tok = split(/\s/, $_); foreach my $t (@tok) { my ($fac) = split(/\|/, $t); my $prefix = ""; $prefix = "$t|" if($FACT); if(exists($CLS{$fac})) { print "$prefix$CLS{$fac} "; } else { print "$prefix$unseen "; } } print "\n"; }
grammatical/baselines-emnlp2016
train/scripts/anottext.pl
Perl
mit
754
/* Part of XPCE --- The SWI-Prolog GUI toolkit Author: Jan Wielemaker and Anjo Anjewierden E-mail: J.Wielemaker@cs.nu.nl WWW: http://www.swi-prolog.nl/projects/xpce/ Copyright (c) 1985-2019, University of Amsterdam VU University Amsterdam CWI, Amsterdam All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer. 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ :- module(pce_principal, [ new/2, free/1, send/2, send/3, send/4, send/5, send/6, send/7, send/8, get/3, get/4, get/5, get/6, get/7, get/8, send_class/3, get_class/4, object/1, object/2, pce_class/6, pce_lazy_send_method/3, pce_lazy_get_method/3, pce_uses_template/2, pce_method_implementation/2, pce_open/3, % +Object, +Mode, -Stream in_pce_thread/1, % :Goal set_pce_thread/0, pce_dispatch/0, pce_postscript_stream/1, % -Stream op(200, fy, @), op(250, yfx, ?), op(800, xfx, :=) ]). :- autoload(library(apply),[convlist/3,maplist/2]). :- autoload(library(lists),[member/2,last/2,reverse/2]). :- autoload(library(shlib),[load_foreign_library/1]). :- autoload(library(swi_compatibility),[pce_info/1]). :- autoload(library(system),[unlock_predicate/1]). :- public in_pce_thread_sync2/2. :- meta_predicate send_class(+, +, :), send(+, :), send(+, :, +), send(+, :, +, +), send(+, :, +, +, +), send(+, :, +, +, +, +), send(+, :, +, +, +, +, +), get_class(+, +, :, -), get(+, :, -), get(+, :, +, -), get(+, :, +, +, -), get(+, :, +, +, +, -), get(+, :, +, +, +, +, -), get(+, :, +, +, +, +, +, -), new(?, :). /******************************** * HOME * ********************************/ %! pce_home(-Home) is det. % % True when Home is the home directory of XPCE. pce_home(PceHome) :- absolute_file_name(pce('.'), PceHome, [ file_type(directory), file_errors(fail) ]), exists_directory(PceHome), !. pce_home(PceHome) :- getenv('XPCEHOME', PceHome), exists_directory(PceHome), !. pce_home(PceHome) :- ( current_prolog_flag(xpce_version, Version), atom_concat('/xpce-', Version, Suffix) ; Suffix = '/xpce' ), absolute_file_name(swi(Suffix), PceHome, [ file_type(directory), file_errors(fail) ]), exists_directory(PceHome), !. pce_home(PceHome) :- current_prolog_flag(saved_program, true), !, ( current_prolog_flag(home, PceHome) -> true ; current_prolog_flag(executable, Exe) -> file_directory_name(Exe, PceHome) ; PceHome = '.' ). pce_home(_) :- throw(error(pce_error(no_home), _)). %! xpce_application_dir(-Dir) % % Set the directory for storing user XPCE configuration and data. xpce_application_dir(Dir) :- create_config_directory(user_app_config(xpce), Dir), !. xpce_application_dir(Dir) :- expand_file_name('~/.xpce', [Dir]). %! create_config_directory(+Alias, -Dir) is semidet. % % Try to find an existing config directory or create a writeable % config directory below a directory owned by this process. If there % are multiple possibilities, create the one that requires the least % number of new directories. create_config_directory(Alias, Dir) :- member(Access, [write, read]), absolute_file_name(Alias, Dir0, [ file_type(directory), access(Access), file_errors(fail) ]), !, Dir = Dir0. create_config_directory(Alias, Dir) :- findall(Candidate, absolute_file_name(Alias, Candidate, [ solutions(all), file_errors(fail) ]), Candidates), convlist(missing, Candidates, Paths), member(_-Create, Paths), catch(maplist(make_directory, Create), _, fail), !, last(Create, Dir). missing(Dir, Len-Create) :- missing_(Dir, Create0), reverse(Create0, Create), length(Create, Len). missing_(Dir, []) :- exists_directory(Dir), access_file(Dir, write), '$my_file'(Dir), !. missing_(Dir, [Dir|T]) :- file_directory_name(Dir, Parent), Parent \== Dir, missing_(Parent, T). /******************************** * LOAD C-PART * ********************************/ init_pce :- catch(load_foreign_library(foreign(pl2xpce)), error(Error, _Context), % suppress stack trace ( print_message(error, error(Error, _)), fail )), pce_home(Home), xpce_application_dir(AppDir), pce_init(Home, AppDir), !, create_prolog_flag(xpce, true, []), thread_self(Me), assert(pce:pce_thread(Me)). init_pce :- print_message(error, error(pce_error(init_failed), _)), halt(1). :- initialization(init_pce, now). :- noprofile((send_implementation/3, get_implementation/4, send_class/3, get_class/4, new/2, send/2, get/3)). /******************************** * PROLOG LAYER * ********************************/ %! free(+Ref) is det. % % Delete object if it exists. free(Ref) :- object(Ref), !, send(Ref, free). free(_). %! send(+Object, +Selector, +Arg...) is semidet. % % Succeeds if sending a message to Object with Selector and the % given Arguments succeeds. Normally, goal_expansion/2 expands all % these goals into send(Receiver, Method(Args...)). send(Receiver, M:Selector, A1) :- functor(Message, Selector, 1), arg(1, Message, A1), send(Receiver, M:Message). send(Receiver, M:Selector, A1, A2) :- functor(Message, Selector, 2), arg(1, Message, A1), arg(2, Message, A2), send(Receiver, M:Message). send(Receiver, M:Selector, A1, A2, A3) :- functor(Message, Selector, 3), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), send(Receiver, M:Message). send(Receiver, M:Selector, A1, A2, A3, A4) :- functor(Message, Selector, 4), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), arg(4, Message, A4), send(Receiver, M:Message). send(Receiver, M:Selector, A1, A2, A3, A4, A5) :- functor(Message, Selector, 5), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), arg(4, Message, A4), arg(5, Message, A5), send(Receiver, M:Message). send(Receiver, M:Selector, A1, A2, A3, A4, A5, A6) :- functor(Message, Selector, 6), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), arg(4, Message, A4), arg(5, Message, A5), arg(6, Message, A6), send(Receiver, M:Message). %! get(+Object, :Selector, +Arg..., ?Rval) is semidet. % % See the comments with send/[3-12]. get(Receiver, M:Selector, A1, Answer) :- functor(Message, Selector, 1), arg(1, Message, A1), get(Receiver, M:Message, Answer). get(Receiver, M:Selector, A1, A2, Answer) :- functor(Message, Selector, 2), arg(1, Message, A1), arg(2, Message, A2), get(Receiver, M:Message, Answer). get(Receiver, M:Selector, A1, A2, A3, Answer) :- functor(Message, Selector, 3), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), get(Receiver, M:Message, Answer). get(Receiver, M:Selector, A1, A2, A3, A4, Answer) :- functor(Message, Selector, 4), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), arg(4, Message, A4), get(Receiver, M:Message, Answer). get(Receiver, M:Selector, A1, A2, A3, A4, A5, Answer) :- functor(Message, Selector, 5), arg(1, Message, A1), arg(2, Message, A2), arg(3, Message, A3), arg(4, Message, A4), arg(5, Message, A5), get(Receiver, M:Message, Answer). /******************************* * NEW SEND * *******************************/ :- multifile send_implementation/3, get_implementation/4. %! send_implementation(+Id, +Message, +Object) % % Method-bodies are compiled into clauses for this predicate. Id % is a unique identifier for the implementation, Message is a % compound whose functor is the method name and whose arguments % are the arguments to the method-call. Object is the receiving % object. send_implementation(true, _Args, _Obj). send_implementation(fail, _Args, _Obj) :- fail. send_implementation(once(Id), Args, Obj) :- send_implementation(Id, Args, Obj), !. send_implementation(spy(Id), Args, Obj) :- ( current_prolog_flag(debug, true) -> trace, send_implementation(Id, Args, Obj) ; send_implementation(Id, Args, Obj) ). send_implementation(trace(Id), Args, Obj) :- pce_info(pce_trace(enter, send_implementation(Id, Args, Obj))), ( send_implementation(Id, Args, Obj) -> pce_info(pce_trace(exit, send_implementation(Id, Args, Obj))) ; pce_info(pce_trace(fail, send_implementation(Id, Args, Obj))) ). %! get_implementation(+Id, +Message, +Object, -Return) % % As send_implementation/3, but for get-methods. get_implementation(true, _Args, _Obj, _Rval). get_implementation(fail, _Args, _Obj, _Rval) :- fail. get_implementation(once(Id), Args, Obj, Rval) :- get_implementation(Id, Args, Obj, Rval), !. get_implementation(spy(Id), Args, Obj, Rval) :- ( current_prolog_flag(debug, true) -> trace, get_implementation(Id, Args, Obj, Rval) ; get_implementation(Id, Args, Obj, Rval) ). get_implementation(trace(Id), Args, Obj, Rval) :- pce_info(pce_trace(enter, get_implementation(Id, Args, Obj, Rval))), ( get_implementation(Id, Args, Obj, Rval) -> pce_info(pce_trace(exit, get_implementation(Id, Args, Obj, Rval))) ; pce_info(pce_trace(fail, get_implementation(Id, Args, Obj, Rval))), fail ). % SWI-Prolog: make this a normal user (debug-able) predicate. pce_ifhostproperty(prolog(swi), [ (:- unlock_predicate(send_implementation/3)), (:- unlock_predicate(get_implementation/4)), (:- '$set_predicate_attribute'(send_implementation(_,_,_), hide_childs, false)), (:- '$set_predicate_attribute'(get_implementation(_,_,_,_), hide_childs, false)) ]). /******************************* * DECLARATIONS * *******************************/ :- multifile pce_class/6, pce_lazy_send_method/3, pce_lazy_get_method/3, pce_uses_template/2. /******************************* * @PROLOG * *******************************/ :- initialization (object(@prolog) -> true ; send(@host, name_reference, prolog)).
TeamSPoon/logicmoo_workspace
docker/rootfs/usr/local/lib/swipl/xpce/prolog/boot/pce_principal.pl
Perl
mit
12,623
<?php $DEBUGGER_SETTINGS = 'Ustawienia debuggera.'; $USE_DEFAULT_LANGUAGE = 'Nie ustawiłeś preferowanego języka. Użyto domyślnego, czyli angielskiego.'; $LANGUAGE_SHORCUT_IS_WRONG = 'Ustawiony skrót <u>%s</u> jest zły.'; $USE_PREFERRED_LANGUAGE = 'Zrobę co w mojej mocy aby wyświetlać reporty w języku <u>%s</u>.'; $ERROR_PAGE_WAS_NOT_SET_USE_DEFAULT = 'Nie ustawiłeś wyglądu strony dla błędu 500 Internal Server Error. Domyślnie nic nie zwracam.'; $WRONG_PATH_TO_ERROR_PAGE = 'Ścieżka <u>%s</u> do pliku z wyglądem błędu 500 jest nieprawidłowa.'; $PATH_TO_ERROR_PAGE = 'Wszystko okey. W przypadku błędu zwrócę: <u>%s</u>.'; $LOG_FILE_WAS_NOT_SET = 'Nie znalazłem pliku w którym archiwizować błędy, więc logowanie jest wyłączone.'; $PATH_TO_LOG_FILE_IS_WRONG = 'Ścieżka <u>%s</u> jest nieprawidłowa, podany plik nie istnieje.'; $SAVE_ERROR_IN_FILE = 'Logownie włączone, zapisuje błędy w pliku <u>%s</u>.';
deArcane/framework
src/Debugger/Blueprints/Config/Config.lang.pl
Perl
mit
950
package Paws::ElasticBeanstalk::DescribeEnvironmentManagedActionHistoryResult; use Moose; has ManagedActionHistoryItems => (is => 'ro', isa => 'ArrayRef[Paws::ElasticBeanstalk::ManagedActionHistoryItem]'); has NextToken => (is => 'ro', isa => 'Str'); has _request_id => (is => 'ro', isa => 'Str'); 1; ### main pod documentation begin ### =head1 NAME Paws::ElasticBeanstalk::DescribeEnvironmentManagedActionHistoryResult =head1 ATTRIBUTES =head2 ManagedActionHistoryItems => ArrayRef[L<Paws::ElasticBeanstalk::ManagedActionHistoryItem>] A list of completed and failed managed actions. =head2 NextToken => Str A pagination token that you pass to DescribeEnvironmentManagedActionHistory to get the next page of results. =head2 _request_id => Str =cut
ioanrogers/aws-sdk-perl
auto-lib/Paws/ElasticBeanstalk/DescribeEnvironmentManagedActionHistoryResult.pm
Perl
apache-2.0
773
=head1 LICENSE Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. =cut =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <http://lists.ensembl.org/mailman/listinfo/dev>. Questions may also be sent to the Ensembl help desk at <http://www.ensembl.org/Help/Contact>. =cut =head1 NAME Bio::EnsEMBL::Utils::PolyA =head1 SYNOPSIS my $seq; # a Bio::Seq object my $polyA = Bio::EnsEMBL::Utils::PolyA->new(); # returns a new Bio::Seq object with the trimmed sequence my $trimmed_seq = $polyA->clip($seq); # cat put Ns in the place of the polyA/polyT tail my $masked_seq = $polyA->mask($seq); # can put in lower case the polyA/polyT using any flag: my $softmasked_seq = $poly->mask( $seq, 'soft' ); =head1 DESCRIPTION It reads a Bio::Seq object, it first finds out whether it has a polyA or a polyT and then performs one operation in the seq string: clipping, masking or softmasking. It then returns a new Bio::Seq object with the new sequence. =head1 METHODS =cut package Bio::EnsEMBL::Utils::PolyA; use Bio::EnsEMBL::Root; use Bio::Seq; use vars qw(@ISA); use strict; @ISA = qw(Bio::EnsEMBL::Root); =head2 new =cut sub new{ my ($class) = @_; if (ref($class)){ $class = ref($class); } my $self = {}; bless($self,$class); return $self; } ############################################################ sub clip{ my ($self, $bioseq) = @_; # print STDERR "past a $bioseq\n"; my $seq = $bioseq->seq; $self->_clip(1); $self->_mask(0); $self->_softmask(0); my $new_seq = $self->_find_polyA($seq); my $cdna = Bio::Seq->new(); if (length($new_seq) > 0){ $cdna->seq($new_seq); } else { print "While clipping the the polyA tail, sequence ".$bioseq->display_id." totally disappeared.\n"; print "Returning undef\n"; return undef; } $cdna->display_id( $bioseq->display_id ); $cdna->desc( $bioseq->desc ); return $cdna; } ############################################################ sub mask{ my ($self, $bioseq, $flag ) = @_; my $seq = $bioseq->seq; $self->_clip(0); if ( $flag ){ $self->_mask(0); $self->_softmask(1); } else{ $self->_mask(1); $self->_softmask(0); } my $new_seq = $self->_find_polyA($seq); my $cdna = new Bio::Seq; $cdna->seq($new_seq); $cdna->display_id( $bioseq->display_id ); $cdna->desc( $bioseq->desc ); return $cdna; } ############################################################ ############################################################ sub _find_polyA{ my ($self, $seq) = @_; my $new_seq; my $length = length($seq); # is it a polyA or polyT? my $check_polyT = substr( $seq, 0, 6 ); my $check_polyA = substr( $seq, -6 ); my $t_count = $check_polyT =~ tr/Tt//; my $a_count = $check_polyA =~ tr/Aa//; #### polyA #### if ( $a_count >= 5 && $a_count > $t_count ){ # we calculate the number of bases we want to chop my $length_to_mask = 0; # we start with 3 bases my ($piece, $count ) = (3,0); # count also the number of Ns, consider the Ns as potential As my $n_count = 0; # take 3 by 3 bases from the end while( $length_to_mask < $length ){ my $chunk = substr( $seq, ($length - ($length_to_mask + 3)), $piece); $count = $chunk =~ tr/Aa//; $n_count = $chunk =~ tr/Nn//; if ( ($count + $n_count) >= 2*( $piece )/3 ){ $length_to_mask += 3; } else{ last; } } if ( $length_to_mask > 0 ){ # do not mask the last base if it is not an A: my $last_base = substr( $seq, ( $length - $length_to_mask ), 1); my $previous_to_last = substr( $seq, ( $length - $length_to_mask - 1), 1); if ( !( $last_base eq 'A' || $last_base eq 'a') ){ $length_to_mask--; } elsif( $previous_to_last eq 'A' || $previous_to_last eq 'a' ){ $length_to_mask++; } my $clipped_seq = substr( $seq, 0, $length - $length_to_mask ); my $mask; if ( $self->_clip ){ $mask = ""; } elsif( $self->_mask ){ $mask = "N" x ($length_to_mask); } elsif ( $self->_softmask ){ $mask = lc substr( $seq, ( $length - $length_to_mask ) ); } $new_seq = $clipped_seq . $mask; } else{ $new_seq = $seq; } } #### polyT #### elsif( $t_count >=5 && $t_count > $a_count ){ # calculate the number of bases to chop my $length_to_mask = -3; # we start with 3 bases: my ($piece, $count) = (3,3); # count also the number of Ns, consider the Ns as potential As my $n_count = 0; # take 3 by 3 bases from the beginning while ( $length_to_mask < $length ){ my $chunk = substr( $seq, $length_to_mask + 3, $piece ); #print STDERR "length to mask: $length_to_mask\n"; #print "chunk: $chunk\n"; $count = $chunk =~ tr/Tt//; $n_count = $chunk =~ tr/Nn//; if ( ($count+$n_count) >= 2*( $piece )/3 ){ $length_to_mask +=3; } else{ last; } } if ( $length_to_mask >= 0 ){ # do not chop the last base if it is not a A: #print STDERR "clipping sequence $seq\n"; my $last_base = substr( $seq, ( $length_to_mask + 3 - 1 ), 1 ); my $previous_to_last = substr( $seq, ( $length_to_mask + 3 ), 1 ); if ( !( $last_base eq 'T' || $last_base eq 't' ) ){ $length_to_mask--; } elsif( $previous_to_last eq 'T' || $previous_to_last eq 't' ){ $length_to_mask++; } my $clipped_seq = substr( $seq, $length_to_mask + 3); my $mask; if ( $self->_clip ){ $mask = ""; } elsif( $self->_mask ){ $mask = "N" x ($length_to_mask+3); } elsif ($self->_softmask){ $mask = lc substr( $seq, 0, ($length_to_mask + 3) ); } $new_seq = $mask.$clipped_seq; } else{ $new_seq = $seq; } } else{ # we cannot be sure of what it is # do not clip $new_seq = $seq; } return $new_seq; } ############################################################ sub _mask{ my ($self,$mask) = @_; if (defined($mask)){ $self->{_mask} = $mask; } return $self->{_mask}; } ############################################################ sub _clip{ my ($self,$clip) = @_; if (defined($clip)){ $self->{_clip} = $clip; } return $self->{_clip}; } ############################################################ sub _softmask{ my ($self,$softmask) = @_; if (defined($softmask)){ $self->{_softmask} = $softmask; } return $self->{_softmask}; } ############################################################ sub has_polyA_track{ my ($self, $seq) = @_; my $new_seq; my $length = length($seq); # is it a polyA or polyT? my $check_polyT = substr( $seq, 0, 10 ); my $check_polyA = substr( $seq, -10 ); print STDERR "polyA: $check_polyA\n"; my $t_count = $check_polyT =~ tr/Tt//; my $a_count = $check_polyA =~ tr/Aa//; ## testing with this short cut if ( $a_count >=7 || $t_count >=7 ){ return 1; } else{ return 0; } } ################ 1;
mjg17/ensembl
modules/Bio/EnsEMBL/Utils/PolyA.pm
Perl
apache-2.0
7,735
#!/usr/bin/perl -w use strict; use CoGeX; use CoGe::Accessory::Web; use Getopt::Long; use Data::Dumper; my ($DEBUG, $dsgid1, $dsgid2, $input_file, $ftid1, $ftid2, $conffile); GetOptions( "DEBUG"=>\$DEBUG, "dsgid1|dsg1|d1=s"=>\$dsgid1, "dsgid2|dsg2|d2=s"=>\$dsgid2, "input|file|i|f=s"=>\$input_file, "ftid1|ft1=i"=>\$ftid1, "ftid2|ft2=i"=>\$ftid2, "config_file|cf=s"=>\$conffile, ); my $P = CoGe::Accessory::Web::get_defaults($conffile); my $DBNAME = $P->{DBNAME}; my $DBHOST = $P->{DBHOST}; my $DBPORT = $P->{DBPORT}; my $DBUSER = $P->{DBUSER}; my $DBPASS = $P->{DBPASS}; my $connstr = "dbi:mysql:dbname=".$DBNAME.";host=".$DBHOST.";port=".$DBPORT; my $coge = CoGeX->connect($connstr, $DBUSER, $DBPASS ); my $order1 = get_gene_order(dsgid=>$dsgid1, ftid=>$ftid1) if $ftid1 == 3; my $order2 = $dsgid1 == $dsgid2 && $ftid1 == $ftid2 ? $order1 : get_gene_order(dsgid=>$dsgid2, ftid=>$ftid2) if $ftid2 == 3; $order1 = get_order_from_input(file=>$input_file, set=>1) unless $order1; $order2 = get_order_from_input(file=>$input_file, set=>2) unless $order2; #print Dumper $order1, $order2; my %seen; open (IN, $input_file); while (<IN>) { chomp; my @line = split/\t/; my @item1 = split/\|\|/, $line[1]; my @item2 = split/\|\|/, $line[5]; # print $item1[0],"\n",$item1[3],"\n"; if ($item1[4]) { next unless $order1->{$item1[0]}{$item1[3]}; $line[2] = $order1->{$item1[0]}{$item1[3]}; $line[3] = $order1->{$item1[0]}{$item1[3]}; } else { $line[2] = $order1->{$item1[0]}{$item1[1]}{$item1[2]}; $line[2] = $order1->{$item1[0]}{$item1[2]}{$item1[1]} unless $line[2]; $line[3] = $order1->{$item1[0]}{$item1[1]}{$item1[2]}; $line[3] = $order1->{$item1[0]}{$item1[2]}{$item1[1]} unless $line[3]; } if ($item2[4]) { next unless $order2->{$item2[0]}{$item2[3]}; $line[6] = $order2->{$item2[0]}{$item2[3]}; $line[7] = $order2->{$item2[0]}{$item2[3]}; } else { $line[6] = $order2->{$item2[0]}{$item2[1]}{$item2[2]}; $line[6] = $order2->{$item2[0]}{$item2[2]}{$item2[1]} unless $line[6]; $line[7] = $order2->{$item2[0]}{$item2[1]}{$item2[2]}; $line[7] = $order2->{$item2[0]}{$item2[2]}{$item2[1]} unless $line[7]; } print join "\t", @line,"\n" unless $seen{$line[2]}{$line[6]}; $seen{$line[2]}{$line[6]}=1; } close IN; sub get_order_from_input { my %opts = @_; my $file = $opts{file}; my $set = $opts{set}; my %data; open (IN, $file) || die "can't open $file for reading: $!"; while (<IN>) { my @line = split/\t/; my @item = $set == 1 ? split(/\|\|/,$line[1]) : split/\|\|/, $line[5]; my ($start, $stop) = sort {$a <=> $b} ($item[1],$item[2]); $data{$item[0]}{$start}{$stop}=1; } close IN; foreach my $chr (keys %data) { my $count =1; foreach my $start (sort {$a <=> $b} keys %{$data{$chr}}) { foreach my $stop (sort {$a <=> $b} keys %{$data{$chr}{$start}}) { $data{$chr}{$start}{$stop}=$count; $count++; } } } return \%data; } sub get_gene_order { my %opts = @_; my $dsgid = $opts{dsgid}; my $ftid = $opts{ftid}; $ftid = 3 unless defined $ftid; #default for CDS my %data; my %chr; foreach my $feat (sort {$a->chromosome cmp $b->chromosome || $a->start <=> $b->start} $coge->resultset('Feature')->search( { feature_type_id=>[3,4,7], dataset_group_id=>$dsgid },{ join=>[{dataset=>'dataset_connectors'},'feature_names'], prefetch=>['feature_names']} )) { $chr{$feat->chromosome}++; foreach my $name($feat->names) { $data{$feat->chromosome}{$name} = $chr{$feat->chromosome}; } } return 0 unless keys %data; return \%data; }
asherkhb/coge
scripts/old/convert_to_gene_order.pl
Perl
bsd-2-clause
3,792
#! @LOCALPREFIX@/bin/perl # $FreeBSD: soc2013/dpl/head/sbin/setkey/scriptdump.pl 81256 2001-08-06 19:40:01Z ume $ if ($< != 0) { print STDERR "must be root to invoke this\n"; exit 1; } $mode = 'add'; while ($i = shift @ARGV) { if ($i eq '-d') { $mode = 'delete'; } else { print STDERR "usage: scriptdump [-d]\n"; exit 1; } } open(IN, "setkey -D |") || die; foreach $_ (<IN>) { if (/^[^\t]/) { ($src, $dst) = split(/\s+/, $_); } elsif (/^\t(esp|ah) mode=(\S+) spi=(\d+).*reqid=(\d+)/) { ($proto, $ipsecmode, $spi, $reqid) = ($1, $2, $3, $4); } elsif (/^\tE: (\S+) (.*)/) { $ealgo = $1; $ekey = $2; $ekey =~ s/\s//g; $ekey =~ s/^/0x/g; } elsif (/^\tA: (\S+) (.*)/) { $aalgo = $1; $akey = $2; $akey =~ s/\s//g; $akey =~ s/^/0x/g; } elsif (/^\tseq=(0x\d+) replay=(\d+) flags=(0x\d+) state=/) { print "$mode $src $dst $proto $spi"; $replay = $2; print " -u $reqid" if $reqid; if ($mode eq 'add') { print " -m $ipsecmode -r $replay" if $replay; if ($proto eq 'esp') { print " -E $ealgo $ekey" if $ealgo; print " -A $aalgo $akey" if $aalgo; } elsif ($proto eq 'ah') { print " -A $aalgo $akey" if $aalgo; } } print ";\n"; $src = $dst = $upper = $proxy = ''; $ealgo = $ekey = $aalgo = $akey = ''; } } close(IN); exit 0;
dplbsd/zcaplib
head/sbin/setkey/scriptdump.pl
Perl
bsd-2-clause
1,294
package AsposeWordsCloud::Object::FieldResponse; require 5.6.0; use strict; use warnings; use utf8; use JSON qw(decode_json); use Data::Dumper; use Module::Runtime qw(use_module); use Log::Any qw($log); use Date::Parse; use DateTime; use base "AsposeWordsCloud::Object::BaseObject"; # # # #NOTE: This class is auto generated by the swagger code generator program. Do not edit the class manually. # my $swagger_types = { 'Field' => 'FieldDto', 'Code' => 'string', 'Status' => 'string' }; my $attribute_map = { 'Field' => 'Field', 'Code' => 'Code', 'Status' => 'Status' }; # new object sub new { my ($class, %args) = @_; my $self = { # 'Field' => $args{'Field'}, # 'Code' => $args{'Code'}, # 'Status' => $args{'Status'} }; return bless $self, $class; } # get swagger type of the attribute sub get_swagger_types { return $swagger_types; } # get attribute mappping sub get_attribute_map { return $attribute_map; } 1;
farooqsheikhpk/Aspose_Words_Cloud
SDKs/Aspose.Words-Cloud-SDK-for-Perl/lib/AsposeWordsCloud/Object/FieldResponse.pm
Perl
mit
1,028
package DDG::Spice::Dota2; # ABSTRACT: Returns information about Dota 2 heroes and items. use DDG::Spice; name "Dota 2 Hero and Item Search"; source "Dota2"; description "Search for heroes and items."; primary_example_queries "dota2 blink","dota 2 pudge","crystal maiden dota2","clarity dota 2","dota2 invoker", "dota2 magic wand"; category "reference"; topics "special_interest", "geek", "gaming"; code_url "https://github.com/duckduckgo/zeroclickinfo-spice/blob/master/lib/DDG/Spice/Dota2.pm"; attribution github => ["https://github.com/echosa", "Echosa"], twitter => "echosa"; triggers startend => 'dota2', 'dota 2'; spice to => 'https://www.dota2.com/jsfeed/heropediadata?feeds=itemdata,herodata,abilitydata&l=english'; spice wrap_jsonp_callback => 1; handle remainder => sub { return $_ if $_; return; }; 1;
P71/zeroclickinfo-spice
lib/DDG/Spice/Dota2.pm
Perl
apache-2.0
839
% generated: 9 November 1989 % option(s): % % mu % % derived from Douglas R. Hofstadter, "Godel, Escher, Bach," pages 33-35. % % prove "mu-math" theorem muiiu top:-mu. mu :- theorem([m,u,i,i,u], 5, _), !. theorem([m,i], _, [[a|[m,i]]]). theorem(R, Depth, [[N|R]|P]) :- Depth > 0, D is Depth-1, theorem(S, D, P), rule(N, S, R). rule(1, S, R) :- rule1(S, R). rule(2, S, R) :- rule2(S, R). rule(3, S, R) :- rule3(S, R). rule(4, S, R) :- rule4(S, R). rule1([i], [i,u]). rule1([H|X], [H|Y]) :- rule1(X, Y). rule2([m|X], [m|Y]) :- append(X, X, Y). rule3([i,i,i|X], [u|X]). rule3([H|X], [H|Y]) :- rule3(X, Y). rule4([u,u|X], X). rule4([H|X], [H|Y]) :- rule4(X, Y). append([], X, X). append([A|B], X, [A|B1]) :- append(B, X, B1).
TeamSPoon/pfc
t/tabling-tests/Bench/prolog/mu.pl
Perl
bsd-2-clause
775
#! /usr/bin/env perl # Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved. # # Licensed under the OpenSSL license (the "License"). You may not use # this file except in compliance with the License. You can obtain a copy # in the file LICENSE in the source distribution or at # https://www.openssl.org/source/license.html # ==================================================================== # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL # project. The module is, however, dual licensed under OpenSSL and # CRYPTOGAMS licenses depending on where you obtain it. For further # details see http://www.openssl.org/~appro/cryptogams/. # ==================================================================== # sha1_block procedure for ARMv4. # # January 2007. # Size/performance trade-off # ==================================================================== # impl size in bytes comp cycles[*] measured performance # ==================================================================== # thumb 304 3212 4420 # armv4-small 392/+29% 1958/+64% 2250/+96% # armv4-compact 740/+89% 1552/+26% 1840/+22% # armv4-large 1420/+92% 1307/+19% 1370/+34%[***] # full unroll ~5100/+260% ~1260/+4% ~1300/+5% # ==================================================================== # thumb = same as 'small' but in Thumb instructions[**] and # with recurring code in two private functions; # small = detached Xload/update, loops are folded; # compact = detached Xload/update, 5x unroll; # large = interleaved Xload/update, 5x unroll; # full unroll = interleaved Xload/update, full unroll, estimated[!]; # # [*] Manually counted instructions in "grand" loop body. Measured # performance is affected by prologue and epilogue overhead, # i-cache availability, branch penalties, etc. # [**] While each Thumb instruction is twice smaller, they are not as # diverse as ARM ones: e.g., there are only two arithmetic # instructions with 3 arguments, no [fixed] rotate, addressing # modes are limited. As result it takes more instructions to do # the same job in Thumb, therefore the code is never twice as # small and always slower. # [***] which is also ~35% better than compiler generated code. Dual- # issue Cortex A8 core was measured to process input block in # ~990 cycles. # August 2010. # # Rescheduling for dual-issue pipeline resulted in 13% improvement on # Cortex A8 core and in absolute terms ~870 cycles per input block # [or 13.6 cycles per byte]. # February 2011. # # Profiler-assisted and platform-specific optimization resulted in 10% # improvement on Cortex A8 core and 12.2 cycles per byte. # September 2013. # # Add NEON implementation (see sha1-586.pl for background info). On # Cortex A8 it was measured to process one byte in 6.7 cycles or >80% # faster than integer-only code. Because [fully unrolled] NEON code # is ~2.5x larger and there are some redundant instructions executed # when processing last block, improvement is not as big for smallest # blocks, only ~30%. Snapdragon S4 is a tad faster, 6.4 cycles per # byte, which is also >80% faster than integer-only code. Cortex-A15 # is even faster spending 5.6 cycles per byte outperforming integer- # only code by factor of 2. # May 2014. # # Add ARMv8 code path performing at 2.35 cpb on Apple A7. $flavour = shift; if ($flavour=~/\w[\w\-]*\.\w+$/) { $output=$flavour; undef $flavour; } else { while (($output=shift) && ($output!~/\w[\w\-]*\.\w+$/)) {} } if ($flavour && $flavour ne "void") { $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or ( $xlate="${dir}../../../perlasm/arm-xlate.pl" and -f $xlate) or die "can't locate arm-xlate.pl"; open OUT,"| \"$^X\" \"$xlate\" $flavour \"$output\""; *STDOUT=*OUT; } else { open OUT,">$output"; *STDOUT=*OUT; } $ctx="r0"; $inp="r1"; $len="r2"; $a="r3"; $b="r4"; $c="r5"; $d="r6"; $e="r7"; $K="r8"; $t0="r9"; $t1="r10"; $t2="r11"; $t3="r12"; $Xi="r14"; @V=($a,$b,$c,$d,$e); sub Xupdate { my ($a,$b,$c,$d,$e,$opt1,$opt2)=@_; $code.=<<___; ldr $t0,[$Xi,#15*4] ldr $t1,[$Xi,#13*4] ldr $t2,[$Xi,#7*4] add $e,$K,$e,ror#2 @ E+=K_xx_xx ldr $t3,[$Xi,#2*4] eor $t0,$t0,$t1 eor $t2,$t2,$t3 @ 1 cycle stall eor $t1,$c,$d @ F_xx_xx mov $t0,$t0,ror#31 add $e,$e,$a,ror#27 @ E+=ROR(A,27) eor $t0,$t0,$t2,ror#31 str $t0,[$Xi,#-4]! $opt1 @ F_xx_xx $opt2 @ F_xx_xx add $e,$e,$t0 @ E+=X[i] ___ } sub BODY_00_15 { my ($a,$b,$c,$d,$e)=@_; $code.=<<___; #if __ARM_ARCH__<7 ldrb $t1,[$inp,#2] ldrb $t0,[$inp,#3] ldrb $t2,[$inp,#1] add $e,$K,$e,ror#2 @ E+=K_00_19 ldrb $t3,[$inp],#4 orr $t0,$t0,$t1,lsl#8 eor $t1,$c,$d @ F_xx_xx orr $t0,$t0,$t2,lsl#16 add $e,$e,$a,ror#27 @ E+=ROR(A,27) orr $t0,$t0,$t3,lsl#24 #else ldr $t0,[$inp],#4 @ handles unaligned add $e,$K,$e,ror#2 @ E+=K_00_19 eor $t1,$c,$d @ F_xx_xx add $e,$e,$a,ror#27 @ E+=ROR(A,27) #ifdef __ARMEL__ rev $t0,$t0 @ byte swap #endif #endif and $t1,$b,$t1,ror#2 add $e,$e,$t0 @ E+=X[i] eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D) str $t0,[$Xi,#-4]! add $e,$e,$t1 @ E+=F_00_19(B,C,D) ___ } sub BODY_16_19 { my ($a,$b,$c,$d,$e)=@_; &Xupdate(@_,"and $t1,$b,$t1,ror#2"); $code.=<<___; eor $t1,$t1,$d,ror#2 @ F_00_19(B,C,D) add $e,$e,$t1 @ E+=F_00_19(B,C,D) ___ } sub BODY_20_39 { my ($a,$b,$c,$d,$e)=@_; &Xupdate(@_,"eor $t1,$b,$t1,ror#2"); $code.=<<___; add $e,$e,$t1 @ E+=F_20_39(B,C,D) ___ } sub BODY_40_59 { my ($a,$b,$c,$d,$e)=@_; &Xupdate(@_,"and $t1,$b,$t1,ror#2","and $t2,$c,$d"); $code.=<<___; add $e,$e,$t1 @ E+=F_40_59(B,C,D) add $e,$e,$t2,ror#2 ___ } $code=<<___; #include <openssl/arm_arch.h> .text #if defined(__thumb2__) .syntax unified .thumb #else .code 32 #endif .global sha1_block_data_order .type sha1_block_data_order,%function .align 5 sha1_block_data_order: #if __ARM_MAX_ARCH__>=7 .Lsha1_block: adr r3,.Lsha1_block ldr r12,.LOPENSSL_armcap ldr r12,[r3,r12] @ OPENSSL_armcap_P #ifdef __APPLE__ ldr r12,[r12] #endif tst r12,#ARMV8_SHA1 bne .LARMv8 tst r12,#ARMV7_NEON bne .LNEON #endif stmdb sp!,{r4-r12,lr} add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp ldmia $ctx,{$a,$b,$c,$d,$e} .Lloop: ldr $K,.LK_00_19 mov $Xi,sp sub sp,sp,#15*4 mov $c,$c,ror#30 mov $d,$d,ror#30 mov $e,$e,ror#30 @ [6] .L_00_15: ___ for($i=0;$i<5;$i++) { &BODY_00_15(@V); unshift(@V,pop(@V)); } $code.=<<___; #if defined(__thumb2__) mov $t3,sp teq $Xi,$t3 #else teq $Xi,sp #endif bne .L_00_15 @ [((11+4)*5+2)*3] sub sp,sp,#25*4 ___ &BODY_00_15(@V); unshift(@V,pop(@V)); &BODY_16_19(@V); unshift(@V,pop(@V)); &BODY_16_19(@V); unshift(@V,pop(@V)); &BODY_16_19(@V); unshift(@V,pop(@V)); &BODY_16_19(@V); unshift(@V,pop(@V)); $code.=<<___; ldr $K,.LK_20_39 @ [+15+16*4] cmn sp,#0 @ [+3], clear carry to denote 20_39 .L_20_39_or_60_79: ___ for($i=0;$i<5;$i++) { &BODY_20_39(@V); unshift(@V,pop(@V)); } $code.=<<___; #if defined(__thumb2__) mov $t3,sp teq $Xi,$t3 #else teq $Xi,sp @ preserve carry #endif bne .L_20_39_or_60_79 @ [+((12+3)*5+2)*4] bcs .L_done @ [+((12+3)*5+2)*4], spare 300 bytes ldr $K,.LK_40_59 sub sp,sp,#20*4 @ [+2] .L_40_59: ___ for($i=0;$i<5;$i++) { &BODY_40_59(@V); unshift(@V,pop(@V)); } $code.=<<___; #if defined(__thumb2__) mov $t3,sp teq $Xi,$t3 #else teq $Xi,sp #endif bne .L_40_59 @ [+((12+5)*5+2)*4] ldr $K,.LK_60_79 sub sp,sp,#20*4 cmp sp,#0 @ set carry to denote 60_79 b .L_20_39_or_60_79 @ [+4], spare 300 bytes .L_done: add sp,sp,#80*4 @ "deallocate" stack frame ldmia $ctx,{$K,$t0,$t1,$t2,$t3} add $a,$K,$a add $b,$t0,$b add $c,$t1,$c,ror#2 add $d,$t2,$d,ror#2 add $e,$t3,$e,ror#2 stmia $ctx,{$a,$b,$c,$d,$e} teq $inp,$len bne .Lloop @ [+18], total 1307 #if __ARM_ARCH__>=5 ldmia sp!,{r4-r12,pc} #else ldmia sp!,{r4-r12,lr} tst lr,#1 moveq pc,lr @ be binary compatible with V4, yet bx lr @ interoperable with Thumb ISA:-) #endif .size sha1_block_data_order,.-sha1_block_data_order .align 5 .LK_00_19: .word 0x5a827999 .LK_20_39: .word 0x6ed9eba1 .LK_40_59: .word 0x8f1bbcdc .LK_60_79: .word 0xca62c1d6 #if __ARM_MAX_ARCH__>=7 .LOPENSSL_armcap: .word OPENSSL_armcap_P-.Lsha1_block #endif .asciz "SHA1 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by <appro\@openssl.org>" .align 5 ___ ##################################################################### # NEON stuff # {{{ my @V=($a,$b,$c,$d,$e); my ($K_XX_XX,$Ki,$t0,$t1,$Xfer,$saved_sp)=map("r$_",(8..12,14)); my $Xi=4; my @X=map("q$_",(8..11,0..3)); my @Tx=("q12","q13"); my ($K,$zero)=("q14","q15"); my $j=0; sub AUTOLOAD() # thunk [simplified] x86-style perlasm { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./; my $arg = pop; $arg = "#$arg" if ($arg*1 eq $arg); $code .= "\t$opcode\t".join(',',@_,$arg)."\n"; } sub body_00_19 () { ( '($a,$b,$c,$d,$e)=@V;'. # '$code.="@ $j\n";'. '&bic ($t0,$d,$b)', '&add ($e,$e,$Ki)', # e+=X[i]+K '&and ($t1,$c,$b)', '&ldr ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15))', '&add ($e,$e,$a,"ror#27")', # e+=ROR(A,27) '&eor ($t1,$t1,$t0)', # F_00_19 '&mov ($b,$b,"ror#2")', # b=ROR(b,2) '&add ($e,$e,$t1);'. # e+=F_00_19 '$j++; unshift(@V,pop(@V));' ) } sub body_20_39 () { ( '($a,$b,$c,$d,$e)=@V;'. # '$code.="@ $j\n";'. '&eor ($t0,$b,$d)', '&add ($e,$e,$Ki)', # e+=X[i]+K '&ldr ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15)) if ($j<79)', '&eor ($t1,$t0,$c)', # F_20_39 '&add ($e,$e,$a,"ror#27")', # e+=ROR(A,27) '&mov ($b,$b,"ror#2")', # b=ROR(b,2) '&add ($e,$e,$t1);'. # e+=F_20_39 '$j++; unshift(@V,pop(@V));' ) } sub body_40_59 () { ( '($a,$b,$c,$d,$e)=@V;'. # '$code.="@ $j\n";'. '&add ($e,$e,$Ki)', # e+=X[i]+K '&and ($t0,$c,$d)', '&ldr ($Ki,sprintf "[sp,#%d]",4*(($j+1)&15))', '&add ($e,$e,$a,"ror#27")', # e+=ROR(A,27) '&eor ($t1,$c,$d)', '&add ($e,$e,$t0)', '&and ($t1,$t1,$b)', '&mov ($b,$b,"ror#2")', # b=ROR(b,2) '&add ($e,$e,$t1);'. # e+=F_40_59 '$j++; unshift(@V,pop(@V));' ) } sub Xupdate_16_31 () { use integer; my $body = shift; my @insns = (&$body,&$body,&$body,&$body); my ($a,$b,$c,$d,$e); &vext_8 (@X[0],@X[-4&7],@X[-3&7],8); # compose "X[-14]" in "X[0]" eval(shift(@insns)); eval(shift(@insns)); eval(shift(@insns)); &vadd_i32 (@Tx[1],@X[-1&7],$K); eval(shift(@insns)); &vld1_32 ("{$K\[]}","[$K_XX_XX,:32]!") if ($Xi%5==0); eval(shift(@insns)); &vext_8 (@Tx[0],@X[-1&7],$zero,4); # "X[-3]", 3 words eval(shift(@insns)); eval(shift(@insns)); eval(shift(@insns)); &veor (@X[0],@X[0],@X[-4&7]); # "X[0]"^="X[-16]" eval(shift(@insns)); eval(shift(@insns)); &veor (@Tx[0],@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]" eval(shift(@insns)); eval(shift(@insns)); &veor (@Tx[0],@Tx[0],@X[0]); # "X[0]"^="X[-3]"^"X[-8] eval(shift(@insns)); eval(shift(@insns)); &vst1_32 ("{@Tx[1]}","[$Xfer,:128]!"); # X[]+K xfer &sub ($Xfer,$Xfer,64) if ($Xi%4==0); eval(shift(@insns)); eval(shift(@insns)); &vext_8 (@Tx[1],$zero,@Tx[0],4); # "X[0]"<<96, extract one dword eval(shift(@insns)); eval(shift(@insns)); &vadd_i32 (@X[0],@Tx[0],@Tx[0]); eval(shift(@insns)); eval(shift(@insns)); &vsri_32 (@X[0],@Tx[0],31); # "X[0]"<<<=1 eval(shift(@insns)); eval(shift(@insns)); eval(shift(@insns)); &vshr_u32 (@Tx[0],@Tx[1],30); eval(shift(@insns)); eval(shift(@insns)); &vshl_u32 (@Tx[1],@Tx[1],2); eval(shift(@insns)); eval(shift(@insns)); &veor (@X[0],@X[0],@Tx[0]); eval(shift(@insns)); eval(shift(@insns)); &veor (@X[0],@X[0],@Tx[1]); # "X[0]"^=("X[0]">>96)<<<2 foreach (@insns) { eval; } # remaining instructions [if any] $Xi++; push(@X,shift(@X)); # "rotate" X[] } sub Xupdate_32_79 () { use integer; my $body = shift; my @insns = (&$body,&$body,&$body,&$body); my ($a,$b,$c,$d,$e); &vext_8 (@Tx[0],@X[-2&7],@X[-1&7],8); # compose "X[-6]" eval(shift(@insns)); eval(shift(@insns)); eval(shift(@insns)); &veor (@X[0],@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]" eval(shift(@insns)); eval(shift(@insns)); &veor (@X[0],@X[0],@X[-7&7]); # "X[0]"^="X[-28]" eval(shift(@insns)); eval(shift(@insns)); &vadd_i32 (@Tx[1],@X[-1&7],$K); eval(shift(@insns)); &vld1_32 ("{$K\[]}","[$K_XX_XX,:32]!") if ($Xi%5==0); eval(shift(@insns)); &veor (@Tx[0],@Tx[0],@X[0]); # "X[-6]"^="X[0]" eval(shift(@insns)); eval(shift(@insns)); &vshr_u32 (@X[0],@Tx[0],30); eval(shift(@insns)); eval(shift(@insns)); &vst1_32 ("{@Tx[1]}","[$Xfer,:128]!"); # X[]+K xfer &sub ($Xfer,$Xfer,64) if ($Xi%4==0); eval(shift(@insns)); eval(shift(@insns)); &vsli_32 (@X[0],@Tx[0],2); # "X[0]"="X[-6]"<<<2 foreach (@insns) { eval; } # remaining instructions [if any] $Xi++; push(@X,shift(@X)); # "rotate" X[] } sub Xuplast_80 () { use integer; my $body = shift; my @insns = (&$body,&$body,&$body,&$body); my ($a,$b,$c,$d,$e); &vadd_i32 (@Tx[1],@X[-1&7],$K); eval(shift(@insns)); eval(shift(@insns)); &vst1_32 ("{@Tx[1]}","[$Xfer,:128]!"); &sub ($Xfer,$Xfer,64); &teq ($inp,$len); &sub ($K_XX_XX,$K_XX_XX,16); # rewind $K_XX_XX &it ("eq"); &subeq ($inp,$inp,64); # reload last block to avoid SEGV &vld1_8 ("{@X[-4&7]-@X[-3&7]}","[$inp]!"); eval(shift(@insns)); eval(shift(@insns)); &vld1_8 ("{@X[-2&7]-@X[-1&7]}","[$inp]!"); eval(shift(@insns)); eval(shift(@insns)); &vld1_32 ("{$K\[]}","[$K_XX_XX,:32]!"); # load K_00_19 eval(shift(@insns)); eval(shift(@insns)); &vrev32_8 (@X[-4&7],@X[-4&7]); foreach (@insns) { eval; } # remaining instructions $Xi=0; } sub Xloop() { use integer; my $body = shift; my @insns = (&$body,&$body,&$body,&$body); my ($a,$b,$c,$d,$e); &vrev32_8 (@X[($Xi-3)&7],@X[($Xi-3)&7]); eval(shift(@insns)); eval(shift(@insns)); &vadd_i32 (@X[$Xi&7],@X[($Xi-4)&7],$K); eval(shift(@insns)); eval(shift(@insns)); &vst1_32 ("{@X[$Xi&7]}","[$Xfer,:128]!");# X[]+K xfer to IALU foreach (@insns) { eval; } $Xi++; } $code.=<<___; #if __ARM_MAX_ARCH__>=7 .arch armv7-a .fpu neon .type sha1_block_data_order_neon,%function .align 4 sha1_block_data_order_neon: .LNEON: stmdb sp!,{r4-r12,lr} add $len,$inp,$len,lsl#6 @ $len to point at the end of $inp @ dmb @ errata #451034 on early Cortex A8 @ vstmdb sp!,{d8-d15} @ ABI specification says so mov $saved_sp,sp sub $Xfer,sp,#64 adr $K_XX_XX,.LK_00_19 bic $Xfer,$Xfer,#15 @ align for 128-bit stores ldmia $ctx,{$a,$b,$c,$d,$e} @ load context mov sp,$Xfer @ alloca vld1.8 {@X[-4&7]-@X[-3&7]},[$inp]! @ handles unaligned veor $zero,$zero,$zero vld1.8 {@X[-2&7]-@X[-1&7]},[$inp]! vld1.32 {${K}\[]},[$K_XX_XX,:32]! @ load K_00_19 vrev32.8 @X[-4&7],@X[-4&7] @ yes, even on vrev32.8 @X[-3&7],@X[-3&7] @ big-endian... vrev32.8 @X[-2&7],@X[-2&7] vadd.i32 @X[0],@X[-4&7],$K vrev32.8 @X[-1&7],@X[-1&7] vadd.i32 @X[1],@X[-3&7],$K vst1.32 {@X[0]},[$Xfer,:128]! vadd.i32 @X[2],@X[-2&7],$K vst1.32 {@X[1]},[$Xfer,:128]! vst1.32 {@X[2]},[$Xfer,:128]! ldr $Ki,[sp] @ big RAW stall .Loop_neon: ___ &Xupdate_16_31(\&body_00_19); &Xupdate_16_31(\&body_00_19); &Xupdate_16_31(\&body_00_19); &Xupdate_16_31(\&body_00_19); &Xupdate_32_79(\&body_00_19); &Xupdate_32_79(\&body_20_39); &Xupdate_32_79(\&body_20_39); &Xupdate_32_79(\&body_20_39); &Xupdate_32_79(\&body_20_39); &Xupdate_32_79(\&body_20_39); &Xupdate_32_79(\&body_40_59); &Xupdate_32_79(\&body_40_59); &Xupdate_32_79(\&body_40_59); &Xupdate_32_79(\&body_40_59); &Xupdate_32_79(\&body_40_59); &Xupdate_32_79(\&body_20_39); &Xuplast_80(\&body_20_39); &Xloop(\&body_20_39); &Xloop(\&body_20_39); &Xloop(\&body_20_39); $code.=<<___; ldmia $ctx,{$Ki,$t0,$t1,$Xfer} @ accumulate context add $a,$a,$Ki ldr $Ki,[$ctx,#16] add $b,$b,$t0 add $c,$c,$t1 add $d,$d,$Xfer it eq moveq sp,$saved_sp add $e,$e,$Ki it ne ldrne $Ki,[sp] stmia $ctx,{$a,$b,$c,$d,$e} itt ne addne $Xfer,sp,#3*16 bne .Loop_neon @ vldmia sp!,{d8-d15} ldmia sp!,{r4-r12,pc} .size sha1_block_data_order_neon,.-sha1_block_data_order_neon #endif ___ }}} ##################################################################### # ARMv8 stuff # {{{ my ($ABCD,$E,$E0,$E1)=map("q$_",(0..3)); my @MSG=map("q$_",(4..7)); my @Kxx=map("q$_",(8..11)); my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14)); $code.=<<___; #if __ARM_MAX_ARCH__>=7 # if defined(__thumb2__) # define INST(a,b,c,d) .byte c,d|0xf,a,b # else # define INST(a,b,c,d) .byte a,b,c,d|0x10 # endif .type sha1_block_data_order_armv8,%function .align 5 sha1_block_data_order_armv8: .LARMv8: vstmdb sp!,{d8-d15} @ ABI specification says so veor $E,$E,$E adr r3,.LK_00_19 vld1.32 {$ABCD},[$ctx]! vld1.32 {$E\[0]},[$ctx] sub $ctx,$ctx,#16 vld1.32 {@Kxx[0]\[]},[r3,:32]! vld1.32 {@Kxx[1]\[]},[r3,:32]! vld1.32 {@Kxx[2]\[]},[r3,:32]! vld1.32 {@Kxx[3]\[]},[r3,:32] .Loop_v8: vld1.8 {@MSG[0]-@MSG[1]},[$inp]! vld1.8 {@MSG[2]-@MSG[3]},[$inp]! vrev32.8 @MSG[0],@MSG[0] vrev32.8 @MSG[1],@MSG[1] vadd.i32 $W0,@Kxx[0],@MSG[0] vrev32.8 @MSG[2],@MSG[2] vmov $ABCD_SAVE,$ABCD @ offload subs $len,$len,#1 vadd.i32 $W1,@Kxx[0],@MSG[1] vrev32.8 @MSG[3],@MSG[3] sha1h $E1,$ABCD @ 0 sha1c $ABCD,$E,$W0 vadd.i32 $W0,@Kxx[$j],@MSG[2] sha1su0 @MSG[0],@MSG[1],@MSG[2] ___ for ($j=0,$i=1;$i<20-3;$i++) { my $f=("c","p","m","p")[$i/5]; $code.=<<___; sha1h $E0,$ABCD @ $i sha1$f $ABCD,$E1,$W1 vadd.i32 $W1,@Kxx[$j],@MSG[3] sha1su1 @MSG[0],@MSG[3] ___ $code.=<<___ if ($i<20-4); sha1su0 @MSG[1],@MSG[2],@MSG[3] ___ ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); $j++ if ((($i+3)%5)==0); } $code.=<<___; sha1h $E0,$ABCD @ $i sha1p $ABCD,$E1,$W1 vadd.i32 $W1,@Kxx[$j],@MSG[3] sha1h $E1,$ABCD @ 18 sha1p $ABCD,$E0,$W0 sha1h $E0,$ABCD @ 19 sha1p $ABCD,$E1,$W1 vadd.i32 $E,$E,$E0 vadd.i32 $ABCD,$ABCD,$ABCD_SAVE bne .Loop_v8 vst1.32 {$ABCD},[$ctx]! vst1.32 {$E\[0]},[$ctx] vldmia sp!,{d8-d15} ret @ bx lr .size sha1_block_data_order_armv8,.-sha1_block_data_order_armv8 #endif ___ }}} $code.=<<___; #if __ARM_MAX_ARCH__>=7 .comm OPENSSL_armcap_P,4,4 .hidden OPENSSL_armcap_P #endif ___ { my %opcode = ( "sha1c" => 0xf2000c40, "sha1p" => 0xf2100c40, "sha1m" => 0xf2200c40, "sha1su0" => 0xf2300c40, "sha1h" => 0xf3b902c0, "sha1su1" => 0xf3ba0380 ); sub unsha1 { my ($mnemonic,$arg)=@_; if ($arg =~ m/q([0-9]+)(?:,\s*q([0-9]+))?,\s*q([0-9]+)/o) { my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19) |(($2&7)<<17)|(($2&8)<<4) |(($3&7)<<1) |(($3&8)<<2); # since ARMv7 instructions are always encoded little-endian. # correct solution is to use .inst directive, but older # assemblers don't implement it:-( # this fix-up provides Thumb encoding in conjunction with INST $word &= ~0x10000000 if (($word & 0x0f000000) == 0x02000000); sprintf "INST(0x%02x,0x%02x,0x%02x,0x%02x)\t@ %s %s", $word&0xff,($word>>8)&0xff, ($word>>16)&0xff,($word>>24)&0xff, $mnemonic,$arg; } } } foreach (split($/,$code)) { s/{q([0-9]+)\[\]}/sprintf "{d%d[],d%d[]}",2*$1,2*$1+1/eo or s/{q([0-9]+)\[0\]}/sprintf "{d%d[0]}",2*$1/eo; s/\b(sha1\w+)\s+(q.*)/unsha1($1,$2)/geo; s/\bret\b/bx lr/o or s/\bbx\s+lr\b/.word\t0xe12fff1e/o; # make it possible to compile with -march=armv4 print $_,$/; } close STDOUT or die "error closing STDOUT: $!"; # enforce flush
grpc/grpc-ios
native_src/third_party/boringssl-with-bazel/src/crypto/fipsmodule/sha/asm/sha1-armv4-large.pl
Perl
apache-2.0
19,205
#!/usr/bin/perl -w use strict; # This program reads .perltidyrc files and writes them back out # into a standard format (but comments will be lost). # # It also demonstrates how to use the perltidy 'options-dump' and related call # parameters to read a .perltidyrc file, convert to long names, put it in a # hash, and write back to standard output in sorted order. Requires # Perl::Tidy. # # Steve Hancock, June 2006 # my $usage = <<EOM; usage: perltidyrc_dump.pl [-d -s -q -h] [ filename ] filename is the name of a .perltidyrc config file to dump, or if no filename is given, find and dump the system default .perltidyrc. -d delete options which are the same as Perl::Tidy defaults (default is to keep them) -s write short parameter names (default is long names with short name in side comment) -q quiet: no comments -h help EOM use Getopt::Std; my %my_opts; my $cmdline = $0 . " " . join " ", @ARGV; getopts( 'hdsq', \%my_opts ) or die "$usage"; if ( $my_opts{h} ) { die "$usage" } if ( @ARGV > 1 ) { die "$usage" } my $config_file = $ARGV[0]; my ( $error_message, $rOpts, $rGetopt_flags, $rsections, $rabbreviations, $rOpts_default, $rabbreviations_default, ) = read_perltidyrc($config_file); # always check the error message first if ($error_message) { die "$error_message\n"; } # make a list of perltidyrc options which are same as default my %equals_default; foreach my $long_name ( keys %{$rOpts} ) { my $val = $rOpts->{$long_name}; if ( defined( $rOpts_default->{$long_name} ) ) { my $val2 = $rOpts_default->{$long_name}; if ( defined($val2) && defined($val) ) { $equals_default{$long_name} = ( $val2 eq $val ); } } } # Optional: minimize the perltidyrc file length by deleting long_names # in $rOpts which are also in $rOpts_default and have the same value. # This would be useful if a perltidyrc file has been constructed from a # full parameter dump, for example. if ( $my_opts{d} ) { foreach my $long_name ( keys %{$rOpts} ) { delete $rOpts->{$long_name} if $equals_default{$long_name}; } } # find user-defined abbreviations my %abbreviations_user; foreach my $key ( keys %$rabbreviations ) { unless ( $rabbreviations_default->{$key} ) { $abbreviations_user{$key} = $rabbreviations->{$key}; } } # dump the options, if any if ( %$rOpts || %abbreviations_user ) { dump_options( $cmdline, \%my_opts, $rOpts, $rGetopt_flags, $rsections, $rabbreviations, \%equals_default, \%abbreviations_user ); } else { if ($config_file) { print STDERR <<EOM; No configuration parameters seen in file: $config_file EOM } else { print STDERR <<EOM; No .perltidyrc file found, use perltidy -dpro to see locations checked. EOM } } sub dump_options { # write the options back out as a valid .perltidyrc file # This version writes long names by sections my ( $cmdline, $rmy_opts, $rOpts, $rGetopt_flags, $rsections, $rabbreviations, $requals_default, $rabbreviations_user ) = @_; # $rOpts is a reference to the hash returned by Getopt::Long # $rGetopt_flags are the flags passed to Getopt::Long # $rsections is a hash giving manual section {long_name} # build a hash giving section->long_name->parameter_value # so that we can write parameters by section my %section_and_name; my $rsection_name_value = \%section_and_name; my %saw_section; foreach my $long_name ( keys %{$rOpts} ) { my $section = $rsections->{$long_name}; $section = "UNKNOWN" unless ($section); # shouldn't happen # build a hash giving section->long_name->parameter_value $rsection_name_value->{$section}->{$long_name} = $rOpts->{$long_name}; # remember what sections are in this hash $saw_section{$section}++; } # build a table for long_name->short_name abbreviations my %short_name; foreach my $abbrev ( keys %{$rabbreviations} ) { foreach my $abbrev ( sort keys %$rabbreviations ) { my @list = @{ $$rabbreviations{$abbrev} }; # an abbreviation may expand into one or more other words, # but only those that expand to a single word (which must be # one of the long names) are the short names that we want # here. next unless @list == 1; my $long_name = $list[0]; $short_name{$long_name} = $abbrev; } } unless ( $rmy_opts->{q} ) { my $date = localtime(); print "# perltidy configuration file created $date\n"; print "# using: $cmdline\n"; } # loop to write section-by-section foreach my $section ( sort keys %saw_section ) { unless ( $rmy_opts->{q} ) { print "\n"; # remove leading section number, which is there # for sorting, i.e., # 1. Basic formatting options -> Basic formatting options my $trimmed_section = $section; $trimmed_section =~ s/^\d+\. //; print "# $trimmed_section\n"; } # loop over all long names for this section my $rname_value = $rsection_name_value->{$section}; foreach my $long_name ( sort keys %{$rname_value} ) { # pull out getopt flag and actual parameter value my $flag = $rGetopt_flags->{$long_name}; my $value = $rname_value->{$long_name}; # turn this it back into a parameter my $prefix = '--'; my $short_prefix = '-'; my $suffix = ""; if ($flag) { if ( $flag =~ /^=/ ) { if ( $value !~ /^\d+$/ ) { $value = '"' . $value . '"' } $suffix = "=" . $value; } elsif ( $flag =~ /^!/ ) { $prefix .= "no" unless ($value); $short_prefix .= "n" unless ($value); } elsif ( $flag =~ /^:/ ) { if ( $value !~ /^\d+$/ ) { $value = '"' . $value . '"' } $suffix = "=" . $value; } else { # shouldn't happen print "# ERROR in dump_options: unrecognized flag $flag for $long_name\n"; } } # print the long version of the parameter # with the short version as a side comment my $short_name = $short_name{$long_name}; my $short_option = $short_prefix . $short_name . $suffix; my $long_option = $prefix . $long_name . $suffix; my $note = $requals_default->{$long_name} ? " [=default]" : ""; if ( $rmy_opts->{s} ) { print $short_option. "\n"; } else { my $side_comment = ""; unless ( $rmy_opts->{q} ) { my $spaces = 40 - length($long_option); $spaces = 2 if ( $spaces < 2 ); $side_comment = ' ' x $spaces . '# ' . $short_option . $note; } print $long_option . $side_comment . "\n"; } } } if ( %{$rabbreviations_user} ) { unless ( $rmy_opts->{q} ) { print "\n"; print "# Abbreviations\n"; } foreach my $key ( keys %$rabbreviations_user ) { my @vals = @{ $rabbreviations_user->{$key} }; print $key. ' {' . join( ' ', @vals ) . '}' . "\n"; } } } sub read_perltidyrc { # Example routine to have Perl::Tidy read and validate perltidyrc # file, and return related flags and abbreviations. # # input parameter - # $config_file is the name of a .perltidyrc file we want to read # or a reference to a string or array containing the .perltidyrc file # if not defined, Perl::Tidy will try to find the user's .perltidyrc # output parameters - # $error_message will be blank unless an error occurs # $rOpts - reference to the hash of options in the .perlticyrc # NOTE: # Perl::Tidy will croak or die on certain severe errors my ($config_file) = @_; my $error_message = ""; my %Opts; # any options found will be put here # the module must be installed for this to work eval "use Perl::Tidy"; if ($@) { $error_message = "Perl::Tidy not installed\n"; return ( $error_message, \%Opts ); } # be sure this version supports this my $version = $Perl::Tidy::VERSION; if ( $version < 20060528 ) { $error_message = "perltidy version $version cannot read options\n"; return ( $error_message, \%Opts ); } my $stderr = ""; # try to capture error messages my $argv = ""; # do not let perltidy see our @ARGV # we are going to make two calls to perltidy... # first with an empty .perltidyrc to get the default parameters my $empty_file = ""; # this will be our .perltidyrc file my %Opts_default; # this will receive the default options hash my %abbreviations_default; my $err = Perl::Tidy::perltidy( perltidyrc => \$empty_file, dump_options => \%Opts_default, dump_options_type => 'full', # 'full' gives everything dump_abbreviations => \%abbreviations_default, stderr => \$stderr, argv => \$argv, ); if ($err) { die "Error calling perltidy\n"; } # now we call with a .perltidyrc file to get its parameters my %Getopt_flags; my %sections; my %abbreviations; Perl::Tidy::perltidy( perltidyrc => $config_file, dump_options => \%Opts, dump_options_type => 'perltidyrc', # default is 'perltidyrc' dump_getopt_flags => \%Getopt_flags, dump_options_category => \%sections, dump_abbreviations => \%abbreviations, stderr => \$stderr, argv => \$argv, ); # try to capture any errors generated by perltidy call # but for severe errors it will typically croak $error_message .= $stderr; # debug: show how everything is stored by printing it out my $DEBUG = 0; if ($DEBUG) { print "---Getopt Parameters---\n"; foreach my $key ( sort keys %Getopt_flags ) { print "$key$Getopt_flags{$key}\n"; } print "---Manual Sections---\n"; foreach my $key ( sort keys %sections ) { print "$key -> $sections{$key}\n"; } print "---Abbreviations---\n"; foreach my $key ( sort keys %abbreviations ) { my @names = @{ $abbreviations{$key} }; print "$key -> {@names}\n"; unless ( $abbreviations_default{$key} ) { print "NOTE: $key is user defined\n"; } } } return ( $error_message, \%Opts, \%Getopt_flags, \%sections, \%abbreviations, \%Opts_default, \%abbreviations_default, ); }
pop-idol/pop_examples
pop/lint-notes/Perl-Tidy-20140328/examples/perltidyrc_dump.pl
Perl
apache-2.0
11,181
use v6; unit module File::Find; sub checkrules ($elem, %opts) { if %opts<name>.defined { if %opts<name> ~~ Str { return False unless $elem.basename ~~ %opts<name> } else { return False unless $elem ~~ %opts<name> } } if %opts<type>.defined { given %opts<type> { when 'dir' { return False unless $elem ~~ :d } when 'file' { return False unless $elem ~~ :f } when 'symlink' { return False unless $elem ~~ :l } default { die "type attribute has to be dir, file or symlink"; } } } return True } sub find (:$dir!, :$name, :$type, :$exclude = False, Bool :$recursive = True, Bool :$keep-going = False) is export { my @targets = dir($dir); my $list = gather while @targets { my $elem = @targets.shift; # exclude is special because it also stops traversing inside, # which checkrules does not next if $elem ~~ $exclude; take $elem if checkrules($elem, { :$name, :$type, :$exclude }); if $recursive { if $elem.IO ~~ :d { @targets.push: dir($elem); CATCH { when X::IO::Dir { $_.throw unless $keep-going; next; }} } } } return $list; } =begin pod =head1 NAME File::Find - Get a lazy list of a directory tree =head1 SYNOPSIS use File::Find; my @list := find(dir => 'foo'); say @list[0..3]; my $list = find(dir => 'foo'); say $list[0..3]; =head1 DESCRIPTION C<File::Find> allows you to get the contents of the given directory, recursively, depth first. The only exported function, C<find()>, generates a lazy list of files in given directory. Every element of the list is an C<IO::Path> object, described below. C<find()> takes one (or more) named arguments. The C<dir> argument is mandatory, and sets the directory C<find()> will traverse. There are also few optional arguments. If more than one is passed, all of them must match for a file to be returned. =head2 name Specify a name of the file C<File::Find> is ought to look for. If you pass a string here, C<find()> will return only the files with the given name. When passing a regex, only the files with path matching the pattern will be returned. Any other type of argument passed here will just be smartmatched against the path (which is exactly what happens to regexes passed, by the way). =head2 type Given a type, C<find()> will only return files being the given type. The available types are C<file>, C<dir> or C<symlink>. =head2 exclude Exclude is meant to be used for skipping certain big and uninteresting directories, like '.git'. Neither them nor any of their contents will be returned, saving a significant amount of time. =head2 keep-going Parameter C<keep-going> tells C<find()> to not stop finding files on errors such as 'Access is denied', but rather ignore the errors and keep going. =head1 Perl 5's File::Find Please note, that this module is not trying to be the verbatim port of Perl 5's File::Find module. Its interface is closer to Perl 5's File::Find::Rule, and its features are planned to be similar one day. =head1 CAVEATS List assignment is eager in Perl 6, so if You assign C<find()> result to an array, the elements will be copied and the laziness will be spoiled. For a proper lazy list, use either binding (C<:=>) or assign a result to a scalar value (see SYNOPSIS). =end pod # vim: ft=perl6
laben/File-Find
lib/File/Find.pm
Perl
mit
3,646
% ---------------------------------------------------------------------- % BEGIN LICENSE BLOCK % Version: CMPL 1.1 % % The contents of this file are subject to the Cisco-style Mozilla Public % License Version 1.1 (the "License"); you may not use this file except % in compliance with the License. You may obtain a copy of the License % at www.eclipse-clp.org/license. % % Software distributed under the License is distributed on an "AS IS" % basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See % the License for the specific language governing rights and limitations % under the License. % % The Original Code is The ECLiPSe Constraint Logic Programming System. % The Initial Developer of the Original Code is Cisco Systems, Inc. % Portions created by the Initial Developer are % Copyright (C) 1992-2006 Cisco Systems, Inc. All Rights Reserved. % % Contributor(s): ECRC GmbH % Contributor(s): IC-Parc, Imperal College London % % END LICENSE BLOCK % % System: ECLiPSe Constraint Logic Programming System % Version: $Id: sepia.pl,v 1.3 2008/08/20 17:48:13 jschimpf Exp $ % ---------------------------------------------------------------------- %-------------------------------------------------------------------- % % SEPIA PROLOG LIBRARY MODULE % % IDENTIFICATION: sepia.pl % % DESCRIPTION: SEPIA backward compatibility package % % :- module(sepia). :- system. % compiler directive to add the SYSTEM flag :- comment(summary, "A number of obsolete SEPIA built-ins"). :- comment(date, "$Date: 2008/08/20 17:48:13 $"). :- comment(copyright, "Cisco Systems, Inc"). :- comment(status, deprecated). :- export (abolish)/2, array/3, bsi/0, compiled_file/2, cprolog/0, current_array/3, define_global_macro/3, define_local_macro/3, (delay)/2, err_msg/2, get_error_handler/2, get_interrupt_handler/2, interrupt/1, interval_alarm/1, is_module/1, is_protected/1, load/2, local_op/3, ls/0, ls/1, no_delayed_goals/0, predicate_property/1, quintus/0, rtoken/1, rtoken/2, sicstus/0, wm_get/2, wm_set/2. :- export abolish_body/3, array_body/4, bsi/1, cprolog/1, current_array_body/4, define_global_macro_/4, is_protected_/2, quintus/1, rtoken_body/2, rtoken_body/3, sicstus/1. :- import abolish_body/2, current_array_body/3, define_macro_/4, get_flag_body/4, listing_body/1, listing_body/2, local_op_body/4, pred_body/2, use_module_body/2, read_token_/4 from sepia_kernel. :- export op(500, fx, -), op(500, fx, +), op(200, fx, \). %-------------------------------------------------------------------- % interval_alarm/1 superseded by set_timer/2 %-------------------------------------------------------------------- interval_alarm(Seconds) :- set_timer(real, Seconds). %-------------------------------------------------------------------- % rtoken/1,2 superseded by read_token/3 %-------------------------------------------------------------------- :- tool(rtoken/1, rtoken_body/2). :- tool(rtoken/2, rtoken_body/3). rtoken_body(Token, Module) :- read_token_(input, Token, _, Module). rtoken_body(Stream, Token, Module) :- read_token_(Stream, Token, _, Module). %-------------------------------------------------------------------- % compatibility switches: can now be done module-wise with use_module/1 %-------------------------------------------------------------------- :- tool(bsi/0, bsi/1), tool(cprolog/0, cprolog/1), tool(sicstus/0, sicstus/1), tool(quintus/0, quintus/1). bsi(M) :- use_module_body(library(bsi), M). cprolog(M) :- use_module_body(library(cprolog), M). quintus(M) :- use_module_body(library(quintus), M). sicstus(M) :- use_module_body(library(sicstus), M). %-------------------------------------------------------------------- % current_array/3 and array/3 superseded by current_array/2 %-------------------------------------------------------------------- :- tool(current_array/3, current_array_body/4). :- tool(array/3, array_body/4). current_array_body(Atom, ListOfBounds, Type, Module) :- current_array_body(Array, [Type|_], Module), Array =.. [Atom|ListOfBounds]. array_body(ArrSpec, ListOfBounds, Type, Module) :- var(ArrSpec), !, error(4, array(ArrSpec, ListOfBounds, Type), Module). array_body(ArrSpec, ListOfBounds, Type, Module) :- atom(ArrSpec), !, ListOfBounds = [], current_array_body(ArrSpec, [Type|_], Module). array_body(N/A, ListOfBounds, Type, Module) :- !, functor(Array, N, A), Array =.. [_|ListOfBounds], current_array_body(Array, [Type|_], Module). array_body(ArrSpec, ListOfBounds, Type, Module) :- error(5, array(ArrSpec, ListOfBounds, Type), Module). %-------------------------------------------------------------------- % define_local_macro/3, define_global_macro/3 superseded by define_macro/3 %-------------------------------------------------------------------- :- tool(define_local_macro/3, define_macro_/4). :- tool(define_global_macro/3, define_global_macro_/4). define_global_macro_(Macro, Trafo, Options, Module) :- define_macro_(Macro, Trafo, [global|Options], Module). %-------------------------------------------------------------------- % local_op/3 is a synonym for op/3 %-------------------------------------------------------------------- :- tool(local_op/3, local_op_body/4). %-------------------------------------------------------------------- % load/2 - cannot do more than load/1 %-------------------------------------------------------------------- load(Files, Libs) :- concat_string([Files, ' ', Libs], Opts), load(Opts). %-------------------------------------------------------------------- % no_delayed_goals/0 - the same achieved with delayed_goals/1 %-------------------------------------------------------------------- no_delayed_goals :- delayed_goals([]). %-------------------------------------------------------------------- % abolish/2 - same functionality as abolish/1 %-------------------------------------------------------------------- :- tool((abolish)/2, abolish_body/3). abolish_body(Name, Arity, Module):- abolish_body(Name/Arity, Module). %-------------------------------------------------------------------- % ls/0,1 - synonyms for listing/0,1 %-------------------------------------------------------------------- :- tool((ls)/0, listing_body/1). :- tool((ls)/1, listing_body/2). %-------------------------------------------------------------------- % is_module/1 does less than current_module/1 %-------------------------------------------------------------------- is_module(M) :- current_module(M). %-------------------------------------------------------------------- % is_protected/1 superseded by get_flag/3 %-------------------------------------------------------------------- :- tool(is_protected/1, is_protected_/2). is_protected_(P, M) :- get_flag_body(P, protected, on, M). %-------------------------------------------------------------------- % get_error_handler/2 - use get_error_handler/3 % get_interrupt_handler/2 - use get_interrupt_handler/3 %-------------------------------------------------------------------- get_error_handler(N, H):- get_event_handler(N, H, _). get_interrupt_handler(N, H):- get_interrupt_handler(N, H, _). %-------------------------------------------------------------------- % err_msg/2 - not substantial % list_error/3 has been moved to library(util) %-------------------------------------------------------------------- err_msg(X, Where):- error_id(X, Msg), get_flag(output_mode, OM), concat_string(["%w in %", OM, "w%n%b"], Format), printf(error, Format, [Msg, Where]). %-------------------------------------------------------------------- % interrupt/1 - about the same as kill/2 %-------------------------------------------------------------------- interrupt(I) :- ( atom(I) -> current_interrupt(Signal, I) ; Signal = I ), get_flag(pid, Pid), kill(Pid, Signal). %-------------------------------------------------------------------- % predicate_property/1 - same as pred/1 %-------------------------------------------------------------------- :- tool(predicate_property/1, pred_body/2). %-------------------------------------------------------------------- % compiled_file/2 - compiled_stream/1 is more general %-------------------------------------------------------------------- compiled_file(File, Line) :- compiled_stream(Stream), get_stream_info(Stream, name, File), get_stream_info(Stream, line, Line). %------------------------------------------------------------------- % absorbed in get_flag/2 and set_flag/2 %------------------------------------------------------------------- wm_get(worker,W) :- get_flag(worker,W). wm_get(workers(Host),Awake+_) :- get_flag(workers,Host:Awake). wm_get(workerids(Host),[Awake,Asleep]) :- get_flag(workerids,Host:Awake+Asleep). wm_get(window,OnOff) :- get_flag(wm_window,OnOff). wm_set(Flag,Value) :- (var(Flag);var(Value)) -> error(4,wm_set(Flag,Value)) ; wm_set0(Flag,Value). wm_set0(workers(Host),Awake) :- set_flag(workers,Host:Awake). wm_set0(window,OnOff) :- set_flag(wm_window,OnOff). %---------------------------------------------------------------- % explicit suspension %---------------------------------------------------------------- :- tool((delay)/2, (delay)/3). delay(Term, Goal, Module) :- suspend(Goal, 2, Term->bound)@Module. :- untraceable (delay)/3. %-------------------------------------------------------------------- % set all the tools skipped %-------------------------------------------------------------------- :- skipped (abolish)/2, array/3, bsi/0, compiled_file/2, cprolog/0, current_array/3, define_global_macro/3, define_local_macro/3, is_protected/1, local_op/3, ls/0, ls/1, predicate_property/1, quintus/0, rtoken/1, rtoken/2, sicstus/0.
daleooo/barrelfish
usr/skb/eclipse_kernel/lib/sepia.pl
Perl
mit
9,783
#! /usr/bin/env perl # Copyright 2013-2020 The OpenSSL Project Authors. All Rights Reserved. # # Licensed under the OpenSSL license (the "License"). You may not use # this file except in compliance with the License. You can obtain a copy # in the file LICENSE in the source distribution or at # https://www.openssl.org/source/license.html ###################################################################### ## Constant-time SSSE3 AES core implementation. ## version 0.1 ## ## By Mike Hamburg (Stanford University), 2009 ## Public domain. ## ## For details see http://shiftleft.org/papers/vector_aes/ and ## http://crypto.stanford.edu/vpaes/. # CBC encrypt/decrypt performance in cycles per byte processed with # 128-bit key. # # aes-ppc.pl this # PPC74x0/G4e 35.5/52.1/(23.8) 11.9(*)/15.4 # PPC970/G5 37.9/55.0/(28.5) 22.2/28.5 # POWER6 42.7/54.3/(28.2) 63.0/92.8(**) # POWER7 32.3/42.9/(18.4) 18.5/23.3 # # (*) This is ~10% worse than reported in paper. The reason is # twofold. This module doesn't make any assumption about # key schedule (or data for that matter) alignment and handles # it in-line. Secondly it, being transliterated from # vpaes-x86_64.pl, relies on "nested inversion" better suited # for Intel CPUs. # (**) Inadequate POWER6 performance is due to astronomic AltiVec # latency, 9 cycles per simple logical operation. $flavour = shift; if ($flavour =~ /64/) { $SIZE_T =8; $LRSAVE =2*$SIZE_T; $STU ="stdu"; $POP ="ld"; $PUSH ="std"; $UCMP ="cmpld"; } elsif ($flavour =~ /32/) { $SIZE_T =4; $LRSAVE =$SIZE_T; $STU ="stwu"; $POP ="lwz"; $PUSH ="stw"; $UCMP ="cmplw"; } else { die "nonsense $flavour"; } $sp="r1"; $FRAME=6*$SIZE_T+13*16; # 13*16 is for v20-v31 offload $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or die "can't locate ppc-xlate.pl"; open STDOUT,"| $^X $xlate $flavour ".shift || die "can't call $xlate: $!"; $code.=<<___; .machine "any" .text .align 7 # totally strategic alignment _vpaes_consts: Lk_mc_forward: # mc_forward .long 0x01020300, 0x05060704, 0x090a0b08, 0x0d0e0f0c ?inv .long 0x05060704, 0x090a0b08, 0x0d0e0f0c, 0x01020300 ?inv .long 0x090a0b08, 0x0d0e0f0c, 0x01020300, 0x05060704 ?inv .long 0x0d0e0f0c, 0x01020300, 0x05060704, 0x090a0b08 ?inv Lk_mc_backward: # mc_backward .long 0x03000102, 0x07040506, 0x0b08090a, 0x0f0c0d0e ?inv .long 0x0f0c0d0e, 0x03000102, 0x07040506, 0x0b08090a ?inv .long 0x0b08090a, 0x0f0c0d0e, 0x03000102, 0x07040506 ?inv .long 0x07040506, 0x0b08090a, 0x0f0c0d0e, 0x03000102 ?inv Lk_sr: # sr .long 0x00010203, 0x04050607, 0x08090a0b, 0x0c0d0e0f ?inv .long 0x00050a0f, 0x04090e03, 0x080d0207, 0x0c01060b ?inv .long 0x0009020b, 0x040d060f, 0x08010a03, 0x0c050e07 ?inv .long 0x000d0a07, 0x04010e0b, 0x0805020f, 0x0c090603 ?inv ## ## "Hot" constants ## Lk_inv: # inv, inva .long 0xf001080d, 0x0f06050e, 0x020c0b0a, 0x09030704 ?rev .long 0xf0070b0f, 0x060a0401, 0x09080502, 0x0c0e0d03 ?rev Lk_ipt: # input transform (lo, hi) .long 0x00702a5a, 0x98e8b2c2, 0x08782252, 0x90e0baca ?rev .long 0x004d7c31, 0x7d30014c, 0x81ccfdb0, 0xfcb180cd ?rev Lk_sbo: # sbou, sbot .long 0x00c7bd6f, 0x176dd2d0, 0x78a802c5, 0x7abfaa15 ?rev .long 0x006abb5f, 0xa574e4cf, 0xfa352b41, 0xd1901e8e ?rev Lk_sb1: # sb1u, sb1t .long 0x0023e2fa, 0x15d41836, 0xefd92e0d, 0xc1ccf73b ?rev .long 0x003e50cb, 0x8fe19bb1, 0x44f52a14, 0x6e7adfa5 ?rev Lk_sb2: # sb2u, sb2t .long 0x0029e10a, 0x4088eb69, 0x4a2382ab, 0xc863a1c2 ?rev .long 0x0024710b, 0xc6937ae2, 0xcd2f98bc, 0x55e9b75e ?rev ## ## Decryption stuff ## Lk_dipt: # decryption input transform .long 0x005f540b, 0x045b500f, 0x1a454e11, 0x1e414a15 ?rev .long 0x00650560, 0xe683e386, 0x94f191f4, 0x72177712 ?rev Lk_dsbo: # decryption sbox final output .long 0x0040f97e, 0x53ea8713, 0x2d3e94d4, 0xb96daac7 ?rev .long 0x001d4493, 0x0f56d712, 0x9c8ec5d8, 0x59814bca ?rev Lk_dsb9: # decryption sbox output *9*u, *9*t .long 0x00d6869a, 0x53031c85, 0xc94c994f, 0x501fd5ca ?rev .long 0x0049d7ec, 0x89173bc0, 0x65a5fbb2, 0x9e2c5e72 ?rev Lk_dsbd: # decryption sbox output *D*u, *D*t .long 0x00a2b1e6, 0xdfcc577d, 0x39442a88, 0x139b6ef5 ?rev .long 0x00cbc624, 0xf7fae23c, 0xd3efde15, 0x0d183129 ?rev Lk_dsbb: # decryption sbox output *B*u, *B*t .long 0x0042b496, 0x926422d0, 0x04d4f2b0, 0xf6462660 ?rev .long 0x006759cd, 0xa69894c1, 0x6baa5532, 0x3e0cfff3 ?rev Lk_dsbe: # decryption sbox output *E*u, *E*t .long 0x00d0d426, 0x9692f246, 0xb0f6b464, 0x04604222 ?rev .long 0x00c1aaff, 0xcda6550c, 0x323e5998, 0x6bf36794 ?rev ## ## Key schedule constants ## Lk_dksd: # decryption key schedule: invskew x*D .long 0x0047e4a3, 0x5d1ab9fe, 0xf9be1d5a, 0xa4e34007 ?rev .long 0x008336b5, 0xf477c241, 0x1e9d28ab, 0xea69dc5f ?rev Lk_dksb: # decryption key schedule: invskew x*B .long 0x00d55085, 0x1fca4f9a, 0x994cc91c, 0x8653d603 ?rev .long 0x004afcb6, 0xa7ed5b11, 0xc882347e, 0x6f2593d9 ?rev Lk_dkse: # decryption key schedule: invskew x*E + 0x63 .long 0x00d6c91f, 0xca1c03d5, 0x86504f99, 0x4c9a8553 ?rev .long 0xe87bdc4f, 0x059631a2, 0x8714b320, 0x6af95ecd ?rev Lk_dks9: # decryption key schedule: invskew x*9 .long 0x00a7d97e, 0xc86f11b6, 0xfc5b2582, 0x3493ed4a ?rev .long 0x00331427, 0x62517645, 0xcefddae9, 0xac9fb88b ?rev Lk_rcon: # rcon .long 0xb6ee9daf, 0xb991831f, 0x817d7c4d, 0x08982a70 ?asis Lk_s63: .long 0x5b5b5b5b, 0x5b5b5b5b, 0x5b5b5b5b, 0x5b5b5b5b ?asis Lk_opt: # output transform .long 0x0060b6d6, 0x29499fff, 0x0868bede, 0x214197f7 ?rev .long 0x00ecbc50, 0x51bded01, 0xe00c5cb0, 0xb15d0de1 ?rev Lk_deskew: # deskew tables: inverts the sbox's "skew" .long 0x00e3a447, 0x40a3e407, 0x1af9be5d, 0x5ab9fe1d ?rev .long 0x0069ea83, 0xdcb5365f, 0x771e9df4, 0xabc24128 ?rev .align 5 Lconsts: mflr r0 bcl 20,31,\$+4 mflr r12 #vvvvv "distance between . and _vpaes_consts addi r12,r12,-0x308 mtlr r0 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 .asciz "Vector Permutation AES for AltiVec, Mike Hamburg (Stanford University)" .align 6 ___ my ($inptail,$inpperm,$outhead,$outperm,$outmask,$keyperm) = map("v$_",(26..31)); { my ($inp,$out,$key) = map("r$_",(3..5)); my ($invlo,$invhi,$iptlo,$ipthi,$sbou,$sbot) = map("v$_",(10..15)); my ($sb1u,$sb1t,$sb2u,$sb2t) = map("v$_",(16..19)); my ($sb9u,$sb9t,$sbdu,$sbdt,$sbbu,$sbbt,$sbeu,$sbet)=map("v$_",(16..23)); $code.=<<___; ## ## _aes_preheat ## ## Fills register %r10 -> .aes_consts (so you can -fPIC) ## and %xmm9-%xmm15 as specified below. ## .align 4 _vpaes_encrypt_preheat: mflr r8 bl Lconsts mtlr r8 li r11, 0xc0 # Lk_inv li r10, 0xd0 li r9, 0xe0 # Lk_ipt li r8, 0xf0 vxor v7, v7, v7 # 0x00..00 vspltisb v8,4 # 0x04..04 vspltisb v9,0x0f # 0x0f..0f lvx $invlo, r12, r11 li r11, 0x100 lvx $invhi, r12, r10 li r10, 0x110 lvx $iptlo, r12, r9 li r9, 0x120 lvx $ipthi, r12, r8 li r8, 0x130 lvx $sbou, r12, r11 li r11, 0x140 lvx $sbot, r12, r10 li r10, 0x150 lvx $sb1u, r12, r9 lvx $sb1t, r12, r8 lvx $sb2u, r12, r11 lvx $sb2t, r12, r10 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## _aes_encrypt_core ## ## AES-encrypt %xmm0. ## ## Inputs: ## %xmm0 = input ## %xmm9-%xmm15 as in _vpaes_preheat ## (%rdx) = scheduled keys ## ## Output in %xmm0 ## Clobbers %xmm1-%xmm6, %r9, %r10, %r11, %rax ## ## .align 5 _vpaes_encrypt_core: lwz r8, 240($key) # pull rounds li r9, 16 lvx v5, 0, $key # vmovdqu (%r9), %xmm5 # round0 key li r11, 0x10 lvx v6, r9, $key addi r9, r9, 16 ?vperm v5, v5, v6, $keyperm # align round key addi r10, r11, 0x40 vsrb v1, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 vperm v0, $iptlo, $iptlo, v0 # vpshufb %xmm1, %xmm2, %xmm1 vperm v1, $ipthi, $ipthi, v1 # vpshufb %xmm0, %xmm3, %xmm2 vxor v0, v0, v5 # vpxor %xmm5, %xmm1, %xmm0 vxor v0, v0, v1 # vpxor %xmm2, %xmm0, %xmm0 mtctr r8 b Lenc_entry .align 4 Lenc_loop: # middle of middle round vperm v4, $sb1t, v7, v2 # vpshufb %xmm2, %xmm13, %xmm4 # 4 = sb1u lvx v1, r12, r11 # vmovdqa -0x40(%r11,%r10), %xmm1 # .Lk_mc_forward[] addi r11, r11, 16 vperm v0, $sb1u, v7, v3 # vpshufb %xmm3, %xmm12, %xmm0 # 0 = sb1t vxor v4, v4, v5 # vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k andi. r11, r11, 0x30 # and \$0x30, %r11 # ... mod 4 vperm v5, $sb2t, v7, v2 # vpshufb %xmm2, %xmm15, %xmm5 # 4 = sb2u vxor v0, v0, v4 # vpxor %xmm4, %xmm0, %xmm0 # 0 = A vperm v2, $sb2u, v7, v3 # vpshufb %xmm3, %xmm14, %xmm2 # 2 = sb2t lvx v4, r12, r10 # vmovdqa (%r11,%r10), %xmm4 # .Lk_mc_backward[] addi r10, r11, 0x40 vperm v3, v0, v7, v1 # vpshufb %xmm1, %xmm0, %xmm3 # 0 = B vxor v2, v2, v5 # vpxor %xmm5, %xmm2, %xmm2 # 2 = 2A vperm v0, v0, v7, v4 # vpshufb %xmm4, %xmm0, %xmm0 # 3 = D vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 # 0 = 2A+B vperm v4, v3, v7, v1 # vpshufb %xmm1, %xmm3, %xmm4 # 0 = 2B+C vxor v0, v0, v3 # vpxor %xmm3, %xmm0, %xmm0 # 3 = 2A+B+D vxor v0, v0, v4 # vpxor %xmm4, %xmm0, %xmm0 # 0 = 2A+3B+C+D Lenc_entry: # top of round vsrb v1, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 # 1 = i vperm v5, $invhi, $invhi, v0 # vpshufb %xmm1, %xmm11, %xmm5 # 2 = a/k vxor v0, v0, v1 # vpxor %xmm0, %xmm1, %xmm1 # 0 = j vperm v3, $invlo, $invlo, v1 # vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i vperm v4, $invlo, $invlo, v0 # vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j vand v0, v0, v9 vxor v3, v3, v5 # vpxor %xmm5, %xmm3, %xmm3 # 3 = iak = 1/i + a/k vxor v4, v4, v5 # vpxor %xmm5, %xmm4, %xmm4 # 4 = jak = 1/j + a/k vperm v2, $invlo, v7, v3 # vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak vmr v5, v6 lvx v6, r9, $key # vmovdqu (%r9), %xmm5 vperm v3, $invlo, v7, v4 # vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak addi r9, r9, 16 vxor v2, v2, v0 # vpxor %xmm1, %xmm2, %xmm2 # 2 = io ?vperm v5, v5, v6, $keyperm # align round key vxor v3, v3, v1 # vpxor %xmm0, %xmm3, %xmm3 # 3 = jo bdnz Lenc_loop # middle of last round addi r10, r11, 0x80 # vmovdqa -0x60(%r10), %xmm4 # 3 : sbou .Lk_sbo # vmovdqa -0x50(%r10), %xmm0 # 0 : sbot .Lk_sbo+16 vperm v4, $sbou, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou lvx v1, r12, r10 # vmovdqa 0x40(%r11,%r10), %xmm1 # .Lk_sr[] vperm v0, $sbot, v7, v3 # vpshufb %xmm3, %xmm0, %xmm0 # 0 = sb1t vxor v4, v4, v5 # vpxor %xmm5, %xmm4, %xmm4 # 4 = sb1u + k vxor v0, v0, v4 # vpxor %xmm4, %xmm0, %xmm0 # 0 = A vperm v0, v0, v7, v1 # vpshufb %xmm1, %xmm0, %xmm0 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 .globl .vpaes_encrypt .align 5 .vpaes_encrypt: $STU $sp,-$FRAME($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mflr r6 mfspr r7, 256 # save vrsave stvx v20,r10,$sp addi r10,r10,32 stvx v21,r11,$sp addi r11,r11,32 stvx v22,r10,$sp addi r10,r10,32 stvx v23,r11,$sp addi r11,r11,32 stvx v24,r10,$sp addi r10,r10,32 stvx v25,r11,$sp addi r11,r11,32 stvx v26,r10,$sp addi r10,r10,32 stvx v27,r11,$sp addi r11,r11,32 stvx v28,r10,$sp addi r10,r10,32 stvx v29,r11,$sp addi r11,r11,32 stvx v30,r10,$sp stvx v31,r11,$sp stw r7,`$FRAME-4`($sp) # save vrsave li r0, -1 $PUSH r6,`$FRAME+$LRSAVE`($sp) mtspr 256, r0 # preserve all AltiVec registers bl _vpaes_encrypt_preheat ?lvsl $inpperm, 0, $inp # prepare for unaligned access lvx v0, 0, $inp addi $inp, $inp, 15 # 15 is not a typo ?lvsr $outperm, 0, $out ?lvsl $keyperm, 0, $key # prepare for unaligned access lvx $inptail, 0, $inp # redundant in aligned case ?vperm v0, v0, $inptail, $inpperm bl _vpaes_encrypt_core andi. r8, $out, 15 li r9, 16 beq Lenc_out_aligned vperm v0, v0, v0, $outperm # rotate right/left mtctr r9 Lenc_out_unaligned: stvebx v0, 0, $out addi $out, $out, 1 bdnz Lenc_out_unaligned b Lenc_done .align 4 Lenc_out_aligned: stvx v0, 0, $out Lenc_done: li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mtlr r6 mtspr 256, r7 # restore vrsave lvx v20,r10,$sp addi r10,r10,32 lvx v21,r11,$sp addi r11,r11,32 lvx v22,r10,$sp addi r10,r10,32 lvx v23,r11,$sp addi r11,r11,32 lvx v24,r10,$sp addi r10,r10,32 lvx v25,r11,$sp addi r11,r11,32 lvx v26,r10,$sp addi r10,r10,32 lvx v27,r11,$sp addi r11,r11,32 lvx v28,r10,$sp addi r10,r10,32 lvx v29,r11,$sp addi r11,r11,32 lvx v30,r10,$sp lvx v31,r11,$sp addi $sp,$sp,$FRAME blr .long 0 .byte 0,12,0x04,1,0x80,0,3,0 .long 0 .size .vpaes_encrypt,.-.vpaes_encrypt .align 4 _vpaes_decrypt_preheat: mflr r8 bl Lconsts mtlr r8 li r11, 0xc0 # Lk_inv li r10, 0xd0 li r9, 0x160 # Ldipt li r8, 0x170 vxor v7, v7, v7 # 0x00..00 vspltisb v8,4 # 0x04..04 vspltisb v9,0x0f # 0x0f..0f lvx $invlo, r12, r11 li r11, 0x180 lvx $invhi, r12, r10 li r10, 0x190 lvx $iptlo, r12, r9 li r9, 0x1a0 lvx $ipthi, r12, r8 li r8, 0x1b0 lvx $sbou, r12, r11 li r11, 0x1c0 lvx $sbot, r12, r10 li r10, 0x1d0 lvx $sb9u, r12, r9 li r9, 0x1e0 lvx $sb9t, r12, r8 li r8, 0x1f0 lvx $sbdu, r12, r11 li r11, 0x200 lvx $sbdt, r12, r10 li r10, 0x210 lvx $sbbu, r12, r9 lvx $sbbt, r12, r8 lvx $sbeu, r12, r11 lvx $sbet, r12, r10 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## Decryption core ## ## Same API as encryption core. ## .align 4 _vpaes_decrypt_core: lwz r8, 240($key) # pull rounds li r9, 16 lvx v5, 0, $key # vmovdqu (%r9), %xmm4 # round0 key li r11, 0x30 lvx v6, r9, $key addi r9, r9, 16 ?vperm v5, v5, v6, $keyperm # align round key vsrb v1, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 vperm v0, $iptlo, $iptlo, v0 # vpshufb %xmm1, %xmm2, %xmm2 vperm v1, $ipthi, $ipthi, v1 # vpshufb %xmm0, %xmm1, %xmm0 vxor v0, v0, v5 # vpxor %xmm4, %xmm2, %xmm2 vxor v0, v0, v1 # vpxor %xmm2, %xmm0, %xmm0 mtctr r8 b Ldec_entry .align 4 Ldec_loop: # # Inverse mix columns # lvx v0, r12, r11 # v5 and v0 are flipped # vmovdqa -0x20(%r10),%xmm4 # 4 : sb9u # vmovdqa -0x10(%r10),%xmm1 # 0 : sb9t vperm v4, $sb9u, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sb9u subi r11, r11, 16 vperm v1, $sb9t, v7, v3 # vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb9t andi. r11, r11, 0x30 vxor v5, v5, v4 # vpxor %xmm4, %xmm0, %xmm0 # vmovdqa 0x00(%r10),%xmm4 # 4 : sbdu vxor v5, v5, v1 # vpxor %xmm1, %xmm0, %xmm0 # 0 = ch # vmovdqa 0x10(%r10),%xmm1 # 0 : sbdt vperm v4, $sbdu, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbdu vperm v5, v5, v7, v0 # vpshufb %xmm5, %xmm0, %xmm0 # MC ch vperm v1, $sbdt, v7, v3 # vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbdt vxor v5, v5, v4 # vpxor %xmm4, %xmm0, %xmm0 # 4 = ch # vmovdqa 0x20(%r10), %xmm4 # 4 : sbbu vxor v5, v5, v1 # vpxor %xmm1, %xmm0, %xmm0 # 0 = ch # vmovdqa 0x30(%r10), %xmm1 # 0 : sbbt vperm v4, $sbbu, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbbu vperm v5, v5, v7, v0 # vpshufb %xmm5, %xmm0, %xmm0 # MC ch vperm v1, $sbbt, v7, v3 # vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbbt vxor v5, v5, v4 # vpxor %xmm4, %xmm0, %xmm0 # 4 = ch # vmovdqa 0x40(%r10), %xmm4 # 4 : sbeu vxor v5, v5, v1 # vpxor %xmm1, %xmm0, %xmm0 # 0 = ch # vmovdqa 0x50(%r10), %xmm1 # 0 : sbet vperm v4, $sbeu, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbeu vperm v5, v5, v7, v0 # vpshufb %xmm5, %xmm0, %xmm0 # MC ch vperm v1, $sbet, v7, v3 # vpshufb %xmm3, %xmm1, %xmm1 # 0 = sbet vxor v0, v5, v4 # vpxor %xmm4, %xmm0, %xmm0 # 4 = ch vxor v0, v0, v1 # vpxor %xmm1, %xmm0, %xmm0 # 0 = ch Ldec_entry: # top of round vsrb v1, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 # 1 = i vperm v2, $invhi, $invhi, v0 # vpshufb %xmm1, %xmm11, %xmm2 # 2 = a/k vxor v0, v0, v1 # vpxor %xmm0, %xmm1, %xmm1 # 0 = j vperm v3, $invlo, $invlo, v1 # vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i vperm v4, $invlo, $invlo, v0 # vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j vand v0, v0, v9 vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 # 3 = iak = 1/i + a/k vxor v4, v4, v2 # vpxor %xmm2, %xmm4, %xmm4 # 4 = jak = 1/j + a/k vperm v2, $invlo, v7, v3 # vpshufb %xmm3, %xmm10, %xmm2 # 2 = 1/iak vmr v5, v6 lvx v6, r9, $key # vmovdqu (%r9), %xmm0 vperm v3, $invlo, v7, v4 # vpshufb %xmm4, %xmm10, %xmm3 # 3 = 1/jak addi r9, r9, 16 vxor v2, v2, v0 # vpxor %xmm1, %xmm2, %xmm2 # 2 = io ?vperm v5, v5, v6, $keyperm # align round key vxor v3, v3, v1 # vpxor %xmm0, %xmm3, %xmm3 # 3 = jo bdnz Ldec_loop # middle of last round addi r10, r11, 0x80 # vmovdqa 0x60(%r10), %xmm4 # 3 : sbou vperm v4, $sbou, v7, v2 # vpshufb %xmm2, %xmm4, %xmm4 # 4 = sbou # vmovdqa 0x70(%r10), %xmm1 # 0 : sbot lvx v2, r12, r10 # vmovdqa -0x160(%r11), %xmm2 # .Lk_sr-.Lk_dsbd=-0x160 vperm v1, $sbot, v7, v3 # vpshufb %xmm3, %xmm1, %xmm1 # 0 = sb1t vxor v4, v4, v5 # vpxor %xmm0, %xmm4, %xmm4 # 4 = sb1u + k vxor v0, v1, v4 # vpxor %xmm4, %xmm1, %xmm0 # 0 = A vperm v0, v0, v7, v2 # vpshufb %xmm2, %xmm0, %xmm0 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 .globl .vpaes_decrypt .align 5 .vpaes_decrypt: $STU $sp,-$FRAME($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mflr r6 mfspr r7, 256 # save vrsave stvx v20,r10,$sp addi r10,r10,32 stvx v21,r11,$sp addi r11,r11,32 stvx v22,r10,$sp addi r10,r10,32 stvx v23,r11,$sp addi r11,r11,32 stvx v24,r10,$sp addi r10,r10,32 stvx v25,r11,$sp addi r11,r11,32 stvx v26,r10,$sp addi r10,r10,32 stvx v27,r11,$sp addi r11,r11,32 stvx v28,r10,$sp addi r10,r10,32 stvx v29,r11,$sp addi r11,r11,32 stvx v30,r10,$sp stvx v31,r11,$sp stw r7,`$FRAME-4`($sp) # save vrsave li r0, -1 $PUSH r6,`$FRAME+$LRSAVE`($sp) mtspr 256, r0 # preserve all AltiVec registers bl _vpaes_decrypt_preheat ?lvsl $inpperm, 0, $inp # prepare for unaligned access lvx v0, 0, $inp addi $inp, $inp, 15 # 15 is not a typo ?lvsr $outperm, 0, $out ?lvsl $keyperm, 0, $key lvx $inptail, 0, $inp # redundant in aligned case ?vperm v0, v0, $inptail, $inpperm bl _vpaes_decrypt_core andi. r8, $out, 15 li r9, 16 beq Ldec_out_aligned vperm v0, v0, v0, $outperm # rotate right/left mtctr r9 Ldec_out_unaligned: stvebx v0, 0, $out addi $out, $out, 1 bdnz Ldec_out_unaligned b Ldec_done .align 4 Ldec_out_aligned: stvx v0, 0, $out Ldec_done: li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mtlr r6 mtspr 256, r7 # restore vrsave lvx v20,r10,$sp addi r10,r10,32 lvx v21,r11,$sp addi r11,r11,32 lvx v22,r10,$sp addi r10,r10,32 lvx v23,r11,$sp addi r11,r11,32 lvx v24,r10,$sp addi r10,r10,32 lvx v25,r11,$sp addi r11,r11,32 lvx v26,r10,$sp addi r10,r10,32 lvx v27,r11,$sp addi r11,r11,32 lvx v28,r10,$sp addi r10,r10,32 lvx v29,r11,$sp addi r11,r11,32 lvx v30,r10,$sp lvx v31,r11,$sp addi $sp,$sp,$FRAME blr .long 0 .byte 0,12,0x04,1,0x80,0,3,0 .long 0 .size .vpaes_decrypt,.-.vpaes_decrypt .globl .vpaes_cbc_encrypt .align 5 .vpaes_cbc_encrypt: ${UCMP}i r5,16 bltlr- $STU $sp,-`($FRAME+2*$SIZE_T)`($sp) mflr r0 li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mfspr r12, 256 stvx v20,r10,$sp addi r10,r10,32 stvx v21,r11,$sp addi r11,r11,32 stvx v22,r10,$sp addi r10,r10,32 stvx v23,r11,$sp addi r11,r11,32 stvx v24,r10,$sp addi r10,r10,32 stvx v25,r11,$sp addi r11,r11,32 stvx v26,r10,$sp addi r10,r10,32 stvx v27,r11,$sp addi r11,r11,32 stvx v28,r10,$sp addi r10,r10,32 stvx v29,r11,$sp addi r11,r11,32 stvx v30,r10,$sp stvx v31,r11,$sp stw r12,`$FRAME-4`($sp) # save vrsave $PUSH r30,`$FRAME+$SIZE_T*0`($sp) $PUSH r31,`$FRAME+$SIZE_T*1`($sp) li r9, -16 $PUSH r0, `$FRAME+$SIZE_T*2+$LRSAVE`($sp) and r30, r5, r9 # copy length&-16 andi. r9, $out, 15 # is $out aligned? mr r5, r6 # copy pointer to key mr r31, r7 # copy pointer to iv li r6, -1 mcrf cr1, cr0 # put aside $out alignment flag mr r7, r12 # copy vrsave mtspr 256, r6 # preserve all AltiVec registers lvx v24, 0, r31 # load [potentially unaligned] iv li r9, 15 ?lvsl $inpperm, 0, r31 lvx v25, r9, r31 ?vperm v24, v24, v25, $inpperm cmpwi r8, 0 # test direction neg r8, $inp # prepare for unaligned access vxor v7, v7, v7 ?lvsl $keyperm, 0, $key ?lvsr $outperm, 0, $out ?lvsr $inpperm, 0, r8 # -$inp vnor $outmask, v7, v7 # 0xff..ff lvx $inptail, 0, $inp ?vperm $outmask, v7, $outmask, $outperm addi $inp, $inp, 15 # 15 is not a typo beq Lcbc_decrypt bl _vpaes_encrypt_preheat li r0, 16 beq cr1, Lcbc_enc_loop # $out is aligned vmr v0, $inptail lvx $inptail, 0, $inp addi $inp, $inp, 16 ?vperm v0, v0, $inptail, $inpperm vxor v0, v0, v24 # ^= iv bl _vpaes_encrypt_core andi. r8, $out, 15 vmr v24, v0 # put aside iv sub r9, $out, r8 vperm $outhead, v0, v0, $outperm # rotate right/left Lcbc_enc_head: stvebx $outhead, r8, r9 cmpwi r8, 15 addi r8, r8, 1 bne Lcbc_enc_head sub. r30, r30, r0 # len -= 16 addi $out, $out, 16 beq Lcbc_unaligned_done Lcbc_enc_loop: vmr v0, $inptail lvx $inptail, 0, $inp addi $inp, $inp, 16 ?vperm v0, v0, $inptail, $inpperm vxor v0, v0, v24 # ^= iv bl _vpaes_encrypt_core vmr v24, v0 # put aside iv sub. r30, r30, r0 # len -= 16 vperm v0, v0, v0, $outperm # rotate right/left vsel v1, $outhead, v0, $outmask vmr $outhead, v0 stvx v1, 0, $out addi $out, $out, 16 bne Lcbc_enc_loop b Lcbc_done .align 5 Lcbc_decrypt: bl _vpaes_decrypt_preheat li r0, 16 beq cr1, Lcbc_dec_loop # $out is aligned vmr v0, $inptail lvx $inptail, 0, $inp addi $inp, $inp, 16 ?vperm v0, v0, $inptail, $inpperm vmr v25, v0 # put aside input bl _vpaes_decrypt_core andi. r8, $out, 15 vxor v0, v0, v24 # ^= iv vmr v24, v25 sub r9, $out, r8 vperm $outhead, v0, v0, $outperm # rotate right/left Lcbc_dec_head: stvebx $outhead, r8, r9 cmpwi r8, 15 addi r8, r8, 1 bne Lcbc_dec_head sub. r30, r30, r0 # len -= 16 addi $out, $out, 16 beq Lcbc_unaligned_done Lcbc_dec_loop: vmr v0, $inptail lvx $inptail, 0, $inp addi $inp, $inp, 16 ?vperm v0, v0, $inptail, $inpperm vmr v25, v0 # put aside input bl _vpaes_decrypt_core vxor v0, v0, v24 # ^= iv vmr v24, v25 sub. r30, r30, r0 # len -= 16 vperm v0, v0, v0, $outperm # rotate right/left vsel v1, $outhead, v0, $outmask vmr $outhead, v0 stvx v1, 0, $out addi $out, $out, 16 bne Lcbc_dec_loop Lcbc_done: beq cr1, Lcbc_write_iv # $out is aligned Lcbc_unaligned_done: andi. r8, $out, 15 sub $out, $out, r8 li r9, 0 Lcbc_tail: stvebx $outhead, r9, $out addi r9, r9, 1 cmpw r9, r8 bne Lcbc_tail Lcbc_write_iv: neg r8, r31 # write [potentially unaligned] iv li r10, 4 ?lvsl $outperm, 0, r8 li r11, 8 li r12, 12 vperm v24, v24, v24, $outperm # rotate right/left stvewx v24, 0, r31 # ivp is at least 32-bit aligned stvewx v24, r10, r31 stvewx v24, r11, r31 stvewx v24, r12, r31 mtspr 256, r7 # restore vrsave li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` lvx v20,r10,$sp addi r10,r10,32 lvx v21,r11,$sp addi r11,r11,32 lvx v22,r10,$sp addi r10,r10,32 lvx v23,r11,$sp addi r11,r11,32 lvx v24,r10,$sp addi r10,r10,32 lvx v25,r11,$sp addi r11,r11,32 lvx v26,r10,$sp addi r10,r10,32 lvx v27,r11,$sp addi r11,r11,32 lvx v28,r10,$sp addi r10,r10,32 lvx v29,r11,$sp addi r11,r11,32 lvx v30,r10,$sp lvx v31,r11,$sp Lcbc_abort: $POP r0, `$FRAME+$SIZE_T*2+$LRSAVE`($sp) $POP r30,`$FRAME+$SIZE_T*0`($sp) $POP r31,`$FRAME+$SIZE_T*1`($sp) mtlr r0 addi $sp,$sp,`$FRAME+$SIZE_T*2` blr .long 0 .byte 0,12,0x04,1,0x80,2,6,0 .long 0 .size .vpaes_cbc_encrypt,.-.vpaes_cbc_encrypt ___ } { my ($inp,$bits,$out)=map("r$_",(3..5)); my $dir="cr1"; my ($invlo,$invhi,$iptlo,$ipthi,$rcon) = map("v$_",(10..13,24)); $code.=<<___; ######################################################## ## ## ## AES key schedule ## ## ## ######################################################## .align 4 _vpaes_key_preheat: mflr r8 bl Lconsts mtlr r8 li r11, 0xc0 # Lk_inv li r10, 0xd0 li r9, 0xe0 # L_ipt li r8, 0xf0 vspltisb v8,4 # 0x04..04 vxor v9,v9,v9 # 0x00..00 lvx $invlo, r12, r11 # Lk_inv li r11, 0x120 lvx $invhi, r12, r10 li r10, 0x130 lvx $iptlo, r12, r9 # Lk_ipt li r9, 0x220 lvx $ipthi, r12, r8 li r8, 0x230 lvx v14, r12, r11 # Lk_sb1 li r11, 0x240 lvx v15, r12, r10 li r10, 0x250 lvx v16, r12, r9 # Lk_dksd li r9, 0x260 lvx v17, r12, r8 li r8, 0x270 lvx v18, r12, r11 # Lk_dksb li r11, 0x280 lvx v19, r12, r10 li r10, 0x290 lvx v20, r12, r9 # Lk_dkse li r9, 0x2a0 lvx v21, r12, r8 li r8, 0x2b0 lvx v22, r12, r11 # Lk_dks9 lvx v23, r12, r10 lvx v24, r12, r9 # Lk_rcon lvx v25, 0, r12 # Lk_mc_forward[0] lvx v26, r12, r8 # Lks63 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 .align 4 _vpaes_schedule_core: mflr r7 bl _vpaes_key_preheat # load the tables #lvx v0, 0, $inp # vmovdqu (%rdi), %xmm0 # load key (unaligned) neg r8, $inp # prepare for unaligned access lvx v0, 0, $inp addi $inp, $inp, 15 # 15 is not typo ?lvsr $inpperm, 0, r8 # -$inp lvx v6, 0, $inp # v6 serves as inptail addi $inp, $inp, 8 ?vperm v0, v0, v6, $inpperm # input transform vmr v3, v0 # vmovdqa %xmm0, %xmm3 bl _vpaes_schedule_transform vmr v7, v0 # vmovdqa %xmm0, %xmm7 bne $dir, Lschedule_am_decrypting # encrypting, output zeroth round key after transform li r8, 0x30 # mov \$0x30,%r8d li r9, 4 li r10, 8 li r11, 12 ?lvsr $outperm, 0, $out # prepare for unaligned access vnor $outmask, v9, v9 # 0xff..ff ?vperm $outmask, v9, $outmask, $outperm #stvx v0, 0, $out # vmovdqu %xmm0, (%rdx) vperm $outhead, v0, v0, $outperm # rotate right/left stvewx $outhead, 0, $out # some are superfluous stvewx $outhead, r9, $out stvewx $outhead, r10, $out addi r10, r12, 0x80 # lea .Lk_sr(%rip),%r10 stvewx $outhead, r11, $out b Lschedule_go Lschedule_am_decrypting: srwi r8, $bits, 1 # shr \$1,%r8d andi. r8, r8, 32 # and \$32,%r8d xori r8, r8, 32 # xor \$32,%r8d # nbits==192?0:32 addi r10, r12, 0x80 # lea .Lk_sr(%rip),%r10 # decrypting, output zeroth round key after shiftrows lvx v1, r8, r10 # vmovdqa (%r8,%r10), %xmm1 li r9, 4 li r10, 8 li r11, 12 vperm v4, v3, v3, v1 # vpshufb %xmm1, %xmm3, %xmm3 neg r0, $out # prepare for unaligned access ?lvsl $outperm, 0, r0 vnor $outmask, v9, v9 # 0xff..ff ?vperm $outmask, $outmask, v9, $outperm #stvx v4, 0, $out # vmovdqu %xmm3, (%rdx) vperm $outhead, v4, v4, $outperm # rotate right/left stvewx $outhead, 0, $out # some are superfluous stvewx $outhead, r9, $out stvewx $outhead, r10, $out addi r10, r12, 0x80 # lea .Lk_sr(%rip),%r10 stvewx $outhead, r11, $out addi $out, $out, 15 # 15 is not typo xori r8, r8, 0x30 # xor \$0x30, %r8 Lschedule_go: cmplwi $bits, 192 # cmp \$192, %esi bgt Lschedule_256 beq Lschedule_192 # 128: fall though ## ## .schedule_128 ## ## 128-bit specific part of key schedule. ## ## This schedule is really simple, because all its parts ## are accomplished by the subroutines. ## Lschedule_128: li r0, 10 # mov \$10, %esi mtctr r0 Loop_schedule_128: bl _vpaes_schedule_round bdz Lschedule_mangle_last # dec %esi bl _vpaes_schedule_mangle # write output b Loop_schedule_128 ## ## .aes_schedule_192 ## ## 192-bit specific part of key schedule. ## ## The main body of this schedule is the same as the 128-bit ## schedule, but with more smearing. The long, high side is ## stored in %xmm7 as before, and the short, low side is in ## the high bits of %xmm6. ## ## This schedule is somewhat nastier, however, because each ## round produces 192 bits of key material, or 1.5 round keys. ## Therefore, on each cycle we do 2 rounds and produce 3 round ## keys. ## .align 4 Lschedule_192: li r0, 4 # mov \$4, %esi lvx v0, 0, $inp ?vperm v0, v6, v0, $inpperm ?vsldoi v0, v3, v0, 8 # vmovdqu 8(%rdi),%xmm0 # load key part 2 (very unaligned) bl _vpaes_schedule_transform # input transform ?vsldoi v6, v0, v9, 8 ?vsldoi v6, v9, v6, 8 # clobber "low" side with zeros mtctr r0 Loop_schedule_192: bl _vpaes_schedule_round ?vsldoi v0, v6, v0, 8 # vpalignr \$8,%xmm6,%xmm0,%xmm0 bl _vpaes_schedule_mangle # save key n bl _vpaes_schedule_192_smear bl _vpaes_schedule_mangle # save key n+1 bl _vpaes_schedule_round bdz Lschedule_mangle_last # dec %esi bl _vpaes_schedule_mangle # save key n+2 bl _vpaes_schedule_192_smear b Loop_schedule_192 ## ## .aes_schedule_256 ## ## 256-bit specific part of key schedule. ## ## The structure here is very similar to the 128-bit ## schedule, but with an additional "low side" in ## %xmm6. The low side's rounds are the same as the ## high side's, except no rcon and no rotation. ## .align 4 Lschedule_256: li r0, 7 # mov \$7, %esi addi $inp, $inp, 8 lvx v0, 0, $inp # vmovdqu 16(%rdi),%xmm0 # load key part 2 (unaligned) ?vperm v0, v6, v0, $inpperm bl _vpaes_schedule_transform # input transform mtctr r0 Loop_schedule_256: bl _vpaes_schedule_mangle # output low result vmr v6, v0 # vmovdqa %xmm0, %xmm6 # save cur_lo in xmm6 # high round bl _vpaes_schedule_round bdz Lschedule_mangle_last # dec %esi bl _vpaes_schedule_mangle # low round. swap xmm7 and xmm6 ?vspltw v0, v0, 3 # vpshufd \$0xFF, %xmm0, %xmm0 vmr v5, v7 # vmovdqa %xmm7, %xmm5 vmr v7, v6 # vmovdqa %xmm6, %xmm7 bl _vpaes_schedule_low_round vmr v7, v5 # vmovdqa %xmm5, %xmm7 b Loop_schedule_256 ## ## .aes_schedule_mangle_last ## ## Mangler for last round of key schedule ## Mangles %xmm0 ## when encrypting, outputs out(%xmm0) ^ 63 ## when decrypting, outputs unskew(%xmm0) ## ## Always called right before return... jumps to cleanup and exits ## .align 4 Lschedule_mangle_last: # schedule last round key from xmm0 li r11, 0x2e0 # lea .Lk_deskew(%rip),%r11 li r9, 0x2f0 bne $dir, Lschedule_mangle_last_dec # encrypting lvx v1, r8, r10 # vmovdqa (%r8,%r10),%xmm1 li r11, 0x2c0 # lea .Lk_opt(%rip), %r11 # prepare to output transform li r9, 0x2d0 # prepare to output transform vperm v0, v0, v0, v1 # vpshufb %xmm1, %xmm0, %xmm0 # output permute lvx $iptlo, r11, r12 # reload $ipt lvx $ipthi, r9, r12 addi $out, $out, 16 # add \$16, %rdx vxor v0, v0, v26 # vpxor .Lk_s63(%rip), %xmm0, %xmm0 bl _vpaes_schedule_transform # output transform #stvx v0, r0, $out # vmovdqu %xmm0, (%rdx) # save last key vperm v0, v0, v0, $outperm # rotate right/left li r10, 4 vsel v2, $outhead, v0, $outmask li r11, 8 stvx v2, 0, $out li r12, 12 stvewx v0, 0, $out # some (or all) are redundant stvewx v0, r10, $out stvewx v0, r11, $out stvewx v0, r12, $out b Lschedule_mangle_done .align 4 Lschedule_mangle_last_dec: lvx $iptlo, r11, r12 # reload $ipt lvx $ipthi, r9, r12 addi $out, $out, -16 # add \$-16, %rdx vxor v0, v0, v26 # vpxor .Lk_s63(%rip), %xmm0, %xmm0 bl _vpaes_schedule_transform # output transform #stvx v0, r0, $out # vmovdqu %xmm0, (%rdx) # save last key addi r9, $out, -15 # -15 is not typo vperm v0, v0, v0, $outperm # rotate right/left li r10, 4 vsel v2, $outhead, v0, $outmask li r11, 8 stvx v2, 0, $out li r12, 12 stvewx v0, 0, r9 # some (or all) are redundant stvewx v0, r10, r9 stvewx v0, r11, r9 stvewx v0, r12, r9 Lschedule_mangle_done: mtlr r7 # cleanup vxor v0, v0, v0 # vpxor %xmm0, %xmm0, %xmm0 vxor v1, v1, v1 # vpxor %xmm1, %xmm1, %xmm1 vxor v2, v2, v2 # vpxor %xmm2, %xmm2, %xmm2 vxor v3, v3, v3 # vpxor %xmm3, %xmm3, %xmm3 vxor v4, v4, v4 # vpxor %xmm4, %xmm4, %xmm4 vxor v5, v5, v5 # vpxor %xmm5, %xmm5, %xmm5 vxor v6, v6, v6 # vpxor %xmm6, %xmm6, %xmm6 vxor v7, v7, v7 # vpxor %xmm7, %xmm7, %xmm7 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## .aes_schedule_192_smear ## ## Smear the short, low side in the 192-bit key schedule. ## ## Inputs: ## %xmm7: high side, b a x y ## %xmm6: low side, d c 0 0 ## %xmm13: 0 ## ## Outputs: ## %xmm6: b+c+d b+c 0 0 ## %xmm0: b+c+d b+c b a ## .align 4 _vpaes_schedule_192_smear: ?vspltw v0, v7, 3 ?vsldoi v1, v9, v6, 12 # vpshufd \$0x80, %xmm6, %xmm1 # d c 0 0 -> c 0 0 0 ?vsldoi v0, v7, v0, 8 # vpshufd \$0xFE, %xmm7, %xmm0 # b a _ _ -> b b b a vxor v6, v6, v1 # vpxor %xmm1, %xmm6, %xmm6 # -> c+d c 0 0 vxor v6, v6, v0 # vpxor %xmm0, %xmm6, %xmm6 # -> b+c+d b+c b a vmr v0, v6 ?vsldoi v6, v6, v9, 8 ?vsldoi v6, v9, v6, 8 # clobber low side with zeros blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## .aes_schedule_round ## ## Runs one main round of the key schedule on %xmm0, %xmm7 ## ## Specifically, runs subbytes on the high dword of %xmm0 ## then rotates it by one byte and xors into the low dword of ## %xmm7. ## ## Adds rcon from low byte of %xmm8, then rotates %xmm8 for ## next rcon. ## ## Smears the dwords of %xmm7 by xoring the low into the ## second low, result into third, result into highest. ## ## Returns results in %xmm7 = %xmm0. ## Clobbers %xmm1-%xmm4, %r11. ## .align 4 _vpaes_schedule_round: # extract rcon from xmm8 #vxor v4, v4, v4 # vpxor %xmm4, %xmm4, %xmm4 ?vsldoi v1, $rcon, v9, 15 # vpalignr \$15, %xmm8, %xmm4, %xmm1 ?vsldoi $rcon, $rcon, $rcon, 15 # vpalignr \$15, %xmm8, %xmm8, %xmm8 vxor v7, v7, v1 # vpxor %xmm1, %xmm7, %xmm7 # rotate ?vspltw v0, v0, 3 # vpshufd \$0xFF, %xmm0, %xmm0 ?vsldoi v0, v0, v0, 1 # vpalignr \$1, %xmm0, %xmm0, %xmm0 # fall through... # low round: same as high round, but no rotation and no rcon. _vpaes_schedule_low_round: # smear xmm7 ?vsldoi v1, v9, v7, 12 # vpslldq \$4, %xmm7, %xmm1 vxor v7, v7, v1 # vpxor %xmm1, %xmm7, %xmm7 vspltisb v1, 0x0f # 0x0f..0f ?vsldoi v4, v9, v7, 8 # vpslldq \$8, %xmm7, %xmm4 # subbytes vand v1, v1, v0 # vpand %xmm9, %xmm0, %xmm1 # 0 = k vsrb v0, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 # 1 = i vxor v7, v7, v4 # vpxor %xmm4, %xmm7, %xmm7 vperm v2, $invhi, v9, v1 # vpshufb %xmm1, %xmm11, %xmm2 # 2 = a/k vxor v1, v1, v0 # vpxor %xmm0, %xmm1, %xmm1 # 0 = j vperm v3, $invlo, v9, v0 # vpshufb %xmm0, %xmm10, %xmm3 # 3 = 1/i vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 # 3 = iak = 1/i + a/k vperm v4, $invlo, v9, v1 # vpshufb %xmm1, %xmm10, %xmm4 # 4 = 1/j vxor v7, v7, v26 # vpxor .Lk_s63(%rip), %xmm7, %xmm7 vperm v3, $invlo, v9, v3 # vpshufb %xmm3, %xmm10, %xmm3 # 2 = 1/iak vxor v4, v4, v2 # vpxor %xmm2, %xmm4, %xmm4 # 4 = jak = 1/j + a/k vperm v2, $invlo, v9, v4 # vpshufb %xmm4, %xmm10, %xmm2 # 3 = 1/jak vxor v3, v3, v1 # vpxor %xmm1, %xmm3, %xmm3 # 2 = io vxor v2, v2, v0 # vpxor %xmm0, %xmm2, %xmm2 # 3 = jo vperm v4, v15, v9, v3 # vpshufb %xmm3, %xmm13, %xmm4 # 4 = sbou vperm v1, v14, v9, v2 # vpshufb %xmm2, %xmm12, %xmm1 # 0 = sb1t vxor v1, v1, v4 # vpxor %xmm4, %xmm1, %xmm1 # 0 = sbox output # add in smeared stuff vxor v0, v1, v7 # vpxor %xmm7, %xmm1, %xmm0 vxor v7, v1, v7 # vmovdqa %xmm0, %xmm7 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## .aes_schedule_transform ## ## Linear-transform %xmm0 according to tables at (%r11) ## ## Requires that %xmm9 = 0x0F0F... as in preheat ## Output in %xmm0 ## Clobbers %xmm2 ## .align 4 _vpaes_schedule_transform: #vand v1, v0, v9 # vpand %xmm9, %xmm0, %xmm1 vsrb v2, v0, v8 # vpsrlb \$4, %xmm0, %xmm0 # vmovdqa (%r11), %xmm2 # lo vperm v0, $iptlo, $iptlo, v0 # vpshufb %xmm1, %xmm2, %xmm2 # vmovdqa 16(%r11), %xmm1 # hi vperm v2, $ipthi, $ipthi, v2 # vpshufb %xmm0, %xmm1, %xmm0 vxor v0, v0, v2 # vpxor %xmm2, %xmm0, %xmm0 blr .long 0 .byte 0,12,0x14,0,0,0,0,0 ## ## .aes_schedule_mangle ## ## Mangle xmm0 from (basis-transformed) standard version ## to our version. ## ## On encrypt, ## xor with 0x63 ## multiply by circulant 0,1,1,1 ## apply shiftrows transform ## ## On decrypt, ## xor with 0x63 ## multiply by "inverse mixcolumns" circulant E,B,D,9 ## deskew ## apply shiftrows transform ## ## ## Writes out to (%rdx), and increments or decrements it ## Keeps track of round number mod 4 in %r8 ## Preserves xmm0 ## Clobbers xmm1-xmm5 ## .align 4 _vpaes_schedule_mangle: #vmr v4, v0 # vmovdqa %xmm0, %xmm4 # save xmm0 for later # vmovdqa .Lk_mc_forward(%rip),%xmm5 bne $dir, Lschedule_mangle_dec # encrypting vxor v4, v0, v26 # vpxor .Lk_s63(%rip), %xmm0, %xmm4 addi $out, $out, 16 # add \$16, %rdx vperm v4, v4, v4, v25 # vpshufb %xmm5, %xmm4, %xmm4 vperm v1, v4, v4, v25 # vpshufb %xmm5, %xmm4, %xmm1 vperm v3, v1, v1, v25 # vpshufb %xmm5, %xmm1, %xmm3 vxor v4, v4, v1 # vpxor %xmm1, %xmm4, %xmm4 lvx v1, r8, r10 # vmovdqa (%r8,%r10), %xmm1 vxor v3, v3, v4 # vpxor %xmm4, %xmm3, %xmm3 vperm v3, v3, v3, v1 # vpshufb %xmm1, %xmm3, %xmm3 addi r8, r8, -16 # add \$-16, %r8 andi. r8, r8, 0x30 # and \$0x30, %r8 #stvx v3, 0, $out # vmovdqu %xmm3, (%rdx) vperm v1, v3, v3, $outperm # rotate right/left vsel v2, $outhead, v1, $outmask vmr $outhead, v1 stvx v2, 0, $out blr .align 4 Lschedule_mangle_dec: # inverse mix columns # lea .Lk_dksd(%rip),%r11 vsrb v1, v0, v8 # vpsrlb \$4, %xmm4, %xmm1 # 1 = hi #and v4, v0, v9 # vpand %xmm9, %xmm4, %xmm4 # 4 = lo # vmovdqa 0x00(%r11), %xmm2 vperm v2, v16, v16, v0 # vpshufb %xmm4, %xmm2, %xmm2 # vmovdqa 0x10(%r11), %xmm3 vperm v3, v17, v17, v1 # vpshufb %xmm1, %xmm3, %xmm3 vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 vperm v3, v3, v9, v25 # vpshufb %xmm5, %xmm3, %xmm3 # vmovdqa 0x20(%r11), %xmm2 vperm v2, v18, v18, v0 # vpshufb %xmm4, %xmm2, %xmm2 vxor v2, v2, v3 # vpxor %xmm3, %xmm2, %xmm2 # vmovdqa 0x30(%r11), %xmm3 vperm v3, v19, v19, v1 # vpshufb %xmm1, %xmm3, %xmm3 vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 vperm v3, v3, v9, v25 # vpshufb %xmm5, %xmm3, %xmm3 # vmovdqa 0x40(%r11), %xmm2 vperm v2, v20, v20, v0 # vpshufb %xmm4, %xmm2, %xmm2 vxor v2, v2, v3 # vpxor %xmm3, %xmm2, %xmm2 # vmovdqa 0x50(%r11), %xmm3 vperm v3, v21, v21, v1 # vpshufb %xmm1, %xmm3, %xmm3 vxor v3, v3, v2 # vpxor %xmm2, %xmm3, %xmm3 # vmovdqa 0x60(%r11), %xmm2 vperm v2, v22, v22, v0 # vpshufb %xmm4, %xmm2, %xmm2 vperm v3, v3, v9, v25 # vpshufb %xmm5, %xmm3, %xmm3 # vmovdqa 0x70(%r11), %xmm4 vperm v4, v23, v23, v1 # vpshufb %xmm1, %xmm4, %xmm4 lvx v1, r8, r10 # vmovdqa (%r8,%r10), %xmm1 vxor v2, v2, v3 # vpxor %xmm3, %xmm2, %xmm2 vxor v3, v4, v2 # vpxor %xmm2, %xmm4, %xmm3 addi $out, $out, -16 # add \$-16, %rdx vperm v3, v3, v3, v1 # vpshufb %xmm1, %xmm3, %xmm3 addi r8, r8, -16 # add \$-16, %r8 andi. r8, r8, 0x30 # and \$0x30, %r8 #stvx v3, 0, $out # vmovdqu %xmm3, (%rdx) vperm v1, v3, v3, $outperm # rotate right/left vsel v2, $outhead, v1, $outmask vmr $outhead, v1 stvx v2, 0, $out blr .long 0 .byte 0,12,0x14,0,0,0,0,0 .globl .vpaes_set_encrypt_key .align 5 .vpaes_set_encrypt_key: $STU $sp,-$FRAME($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mflr r0 mfspr r6, 256 # save vrsave stvx v20,r10,$sp addi r10,r10,32 stvx v21,r11,$sp addi r11,r11,32 stvx v22,r10,$sp addi r10,r10,32 stvx v23,r11,$sp addi r11,r11,32 stvx v24,r10,$sp addi r10,r10,32 stvx v25,r11,$sp addi r11,r11,32 stvx v26,r10,$sp addi r10,r10,32 stvx v27,r11,$sp addi r11,r11,32 stvx v28,r10,$sp addi r10,r10,32 stvx v29,r11,$sp addi r11,r11,32 stvx v30,r10,$sp stvx v31,r11,$sp stw r6,`$FRAME-4`($sp) # save vrsave li r7, -1 $PUSH r0, `$FRAME+$LRSAVE`($sp) mtspr 256, r7 # preserve all AltiVec registers srwi r9, $bits, 5 # shr \$5,%eax addi r9, r9, 6 # add \$5,%eax stw r9, 240($out) # mov %eax,240(%rdx) # AES_KEY->rounds = nbits/32+5; cmplw $dir, $bits, $bits # set encrypt direction li r8, 0x30 # mov \$0x30,%r8d bl _vpaes_schedule_core $POP r0, `$FRAME+$LRSAVE`($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mtspr 256, r6 # restore vrsave mtlr r0 xor r3, r3, r3 lvx v20,r10,$sp addi r10,r10,32 lvx v21,r11,$sp addi r11,r11,32 lvx v22,r10,$sp addi r10,r10,32 lvx v23,r11,$sp addi r11,r11,32 lvx v24,r10,$sp addi r10,r10,32 lvx v25,r11,$sp addi r11,r11,32 lvx v26,r10,$sp addi r10,r10,32 lvx v27,r11,$sp addi r11,r11,32 lvx v28,r10,$sp addi r10,r10,32 lvx v29,r11,$sp addi r11,r11,32 lvx v30,r10,$sp lvx v31,r11,$sp addi $sp,$sp,$FRAME blr .long 0 .byte 0,12,0x04,1,0x80,0,3,0 .long 0 .size .vpaes_set_encrypt_key,.-.vpaes_set_encrypt_key .globl .vpaes_set_decrypt_key .align 4 .vpaes_set_decrypt_key: $STU $sp,-$FRAME($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mflr r0 mfspr r6, 256 # save vrsave stvx v20,r10,$sp addi r10,r10,32 stvx v21,r11,$sp addi r11,r11,32 stvx v22,r10,$sp addi r10,r10,32 stvx v23,r11,$sp addi r11,r11,32 stvx v24,r10,$sp addi r10,r10,32 stvx v25,r11,$sp addi r11,r11,32 stvx v26,r10,$sp addi r10,r10,32 stvx v27,r11,$sp addi r11,r11,32 stvx v28,r10,$sp addi r10,r10,32 stvx v29,r11,$sp addi r11,r11,32 stvx v30,r10,$sp stvx v31,r11,$sp stw r6,`$FRAME-4`($sp) # save vrsave li r7, -1 $PUSH r0, `$FRAME+$LRSAVE`($sp) mtspr 256, r7 # preserve all AltiVec registers srwi r9, $bits, 5 # shr \$5,%eax addi r9, r9, 6 # add \$5,%eax stw r9, 240($out) # mov %eax,240(%rdx) # AES_KEY->rounds = nbits/32+5; slwi r9, r9, 4 # shl \$4,%eax add $out, $out, r9 # lea (%rdx,%rax),%rdx cmplwi $dir, $bits, 0 # set decrypt direction srwi r8, $bits, 1 # shr \$1,%r8d andi. r8, r8, 32 # and \$32,%r8d xori r8, r8, 32 # xor \$32,%r8d # nbits==192?0:32 bl _vpaes_schedule_core $POP r0, `$FRAME+$LRSAVE`($sp) li r10,`15+6*$SIZE_T` li r11,`31+6*$SIZE_T` mtspr 256, r6 # restore vrsave mtlr r0 xor r3, r3, r3 lvx v20,r10,$sp addi r10,r10,32 lvx v21,r11,$sp addi r11,r11,32 lvx v22,r10,$sp addi r10,r10,32 lvx v23,r11,$sp addi r11,r11,32 lvx v24,r10,$sp addi r10,r10,32 lvx v25,r11,$sp addi r11,r11,32 lvx v26,r10,$sp addi r10,r10,32 lvx v27,r11,$sp addi r11,r11,32 lvx v28,r10,$sp addi r10,r10,32 lvx v29,r11,$sp addi r11,r11,32 lvx v30,r10,$sp lvx v31,r11,$sp addi $sp,$sp,$FRAME blr .long 0 .byte 0,12,0x04,1,0x80,0,3,0 .long 0 .size .vpaes_set_decrypt_key,.-.vpaes_set_decrypt_key ___ } my $consts=1; foreach (split("\n",$code)) { s/\`([^\`]*)\`/eval $1/geo; # constants table endian-specific conversion if ($consts && m/\.long\s+(.+)\s+(\?[a-z]*)$/o) { my $conv=$2; my @bytes=(); # convert to endian-agnostic format foreach (split(/,\s+/,$1)) { my $l = /^0/?oct:int; push @bytes,($l>>24)&0xff,($l>>16)&0xff,($l>>8)&0xff,$l&0xff; } # little-endian conversion if ($flavour =~ /le$/o) { SWITCH: for($conv) { /\?inv/ && do { @bytes=map($_^0xf,@bytes); last; }; /\?rev/ && do { @bytes=reverse(@bytes); last; }; } } #emit print ".byte\t",join(',',map (sprintf("0x%02x",$_),@bytes)),"\n"; next; } $consts=0 if (m/Lconsts:/o); # end of table # instructions prefixed with '?' are endian-specific and need # to be adjusted accordingly... if ($flavour =~ /le$/o) { # little-endian s/\?lvsr/lvsl/o or s/\?lvsl/lvsr/o or s/\?(vperm\s+v[0-9]+,\s*)(v[0-9]+,\s*)(v[0-9]+,\s*)(v[0-9]+)/$1$3$2$4/o or s/\?(vsldoi\s+v[0-9]+,\s*)(v[0-9]+,)\s*(v[0-9]+,\s*)([0-9]+)/$1$3$2 16-$4/o or s/\?(vspltw\s+v[0-9]+,\s*)(v[0-9]+,)\s*([0-9])/$1$2 3-$3/o; } else { # big-endian s/\?([a-z]+)/$1/o; } print $_,"\n"; } close STDOUT or die "error closing STDOUT: $!";
pmq20/ruby-compiler
vendor/openssl/crypto/aes/asm/vpaes-ppc.pl
Perl
mit
42,789
########################################################################### # # This file is auto-generated by the Perl DateTime Suite locale # generator (0.05). This code generator comes with the # DateTime::Locale distribution in the tools/ directory, and is called # generate-from-cldr. # # This file as generated from the CLDR XML locale data. See the # LICENSE.cldr file included in this distribution for license details. # # This file was generated from the source file ha_Arab.xml # The source file version number was 1.23, generated on # 2009/05/05 23:06:36. # # Do not edit this file directly. # ########################################################################### package DateTime::Locale::ha_Arab; use strict; use warnings; use utf8; use base 'DateTime::Locale::ha'; sub cldr_version { return "1\.7\.1" } { my $am_pm_abbreviated = [ "A\.M\.", "P\.M\." ]; sub am_pm_abbreviated { return $am_pm_abbreviated } } { my $day_format_abbreviated = [ "لِت", "تَل", "لَر", "أَلْح", "جُم", "أَسَ", "لَح" ]; sub day_format_abbreviated { return $day_format_abbreviated } } sub day_format_narrow { $_[0]->day_format_abbreviated() } { my $day_format_wide = [ "لِتِنِنْ", "تَلَتَ", "لَرَبَ", "أَلْحَمِسْ", "جُمَعَ", "أَسَبَرْ", "لَحَدِ" ]; sub day_format_wide { return $day_format_wide } } sub day_stand_alone_abbreviated { $_[0]->day_format_abbreviated() } sub day_stand_alone_wide { $_[0]->day_format_wide() } { my $era_abbreviated = [ "غَبَنِنْ\ مِلَدِ", "مِلَدِ" ]; sub era_abbreviated { return $era_abbreviated } } sub era_narrow { $_[0]->era_abbreviated() } { my $era_wide = [ "غَبَنِنْ\ مِلَدِ", "مِلَدِ" ]; sub era_wide { return $era_wide } } { my $first_day_of_week = "1"; sub first_day_of_week { return $first_day_of_week } } { my $month_format_abbreviated = [ "جَن", "ڢَب", "مَر", "أَڢْر", "مَي", "يُون", "يُول", "أَغُ", "سَت", "أُكْت", "نُو", "دِس" ]; sub month_format_abbreviated { return $month_format_abbreviated } } sub month_format_narrow { $_[0]->month_format_abbreviated() } { my $month_format_wide = [ "جَنَيْرُ", "ڢَبْرَيْرُ", "مَرِسْ", "أَڢْرِلُ", "مَيُ", "يُونِ", "يُولِ", "أَغُسْتَ", "سَتُمْبَ", "أُكْتوُبَ", "نُوَمْبَ", "دِسَمْبَ" ]; sub month_format_wide { return $month_format_wide } } sub month_stand_alone_abbreviated { $_[0]->month_format_abbreviated() } sub month_stand_alone_wide { $_[0]->month_format_wide() } 1; __END__ =pod =encoding utf8 =head1 NAME DateTime::Locale::ha_Arab =head1 SYNOPSIS use DateTime; my $dt = DateTime->now( locale => 'ha_Arab' ); print $dt->month_name(); =head1 DESCRIPTION This is the DateTime locale package for Hausa Arabic. =head1 DATA This locale inherits from the L<DateTime::Locale::ha> locale. It contains the following data. =head2 Days =head3 Wide (format) لِتِنِنْ تَلَتَ لَرَبَ أَلْحَمِسْ جُمَعَ أَسَبَرْ لَحَدِ =head3 Abbreviated (format) لِت تَل لَر أَلْح جُم أَسَ لَح =head3 Narrow (format) لِت تَل لَر أَلْح جُم أَسَ لَح =head3 Wide (stand-alone) لِتِنِنْ تَلَتَ لَرَبَ أَلْحَمِسْ جُمَعَ أَسَبَرْ لَحَدِ =head3 Abbreviated (stand-alone) لِت تَل لَر أَلْح جُم أَسَ لَح =head3 Narrow (stand-alone) L T L A J A L =head2 Months =head3 Wide (format) جَنَيْرُ ڢَبْرَيْرُ مَرِسْ أَڢْرِلُ مَيُ يُونِ يُولِ أَغُسْتَ سَتُمْبَ أُكْتوُبَ نُوَمْبَ دِسَمْبَ =head3 Abbreviated (format) جَن ڢَب مَر أَڢْر مَي يُون يُول أَغُ سَت أُكْت نُو دِس =head3 Narrow (format) جَن ڢَب مَر أَڢْر مَي يُون يُول أَغُ سَت أُكْت نُو دِس =head3 Wide (stand-alone) جَنَيْرُ ڢَبْرَيْرُ مَرِسْ أَڢْرِلُ مَيُ يُونِ يُولِ أَغُسْتَ سَتُمْبَ أُكْتوُبَ نُوَمْبَ دِسَمْبَ =head3 Abbreviated (stand-alone) جَن ڢَب مَر أَڢْر مَي يُون يُول أَغُ سَت أُكْت نُو دِس =head3 Narrow (stand-alone) J F M A M Y Y A S O N D =head2 Quarters =head3 Wide (format) Q1 Q2 Q3 Q4 =head3 Abbreviated (format) Q1 Q2 Q3 Q4 =head3 Narrow (format) 1 2 3 4 =head3 Wide (stand-alone) Q1 Q2 Q3 Q4 =head3 Abbreviated (stand-alone) Q1 Q2 Q3 Q4 =head3 Narrow (stand-alone) 1 2 3 4 =head2 Eras =head3 Wide غَبَنِنْ مِلَدِ مِلَدِ =head3 Abbreviated غَبَنِنْ مِلَدِ مِلَدِ =head3 Narrow غَبَنِنْ مِلَدِ مِلَدِ =head2 Date Formats =head3 Full 2008-02-05T18:30:30 = تَلَتَ, 5 ڢَبْرَيْرُ, 2008 1995-12-22T09:05:02 = جُمَعَ, 22 دِسَمْبَ, 1995 -0010-09-15T04:44:23 = أَسَبَرْ, 15 سَتُمْبَ, -10 =head3 Long 2008-02-05T18:30:30 = 5 ڢَبْرَيْرُ, 2008 1995-12-22T09:05:02 = 22 دِسَمْبَ, 1995 -0010-09-15T04:44:23 = 15 سَتُمْبَ, -10 =head3 Medium 2008-02-05T18:30:30 = 5 ڢَب, 2008 1995-12-22T09:05:02 = 22 دِس, 1995 -0010-09-15T04:44:23 = 15 سَت, -10 =head3 Short 2008-02-05T18:30:30 = 5/2/08 1995-12-22T09:05:02 = 22/12/95 -0010-09-15T04:44:23 = 15/9/-10 =head3 Default 2008-02-05T18:30:30 = 5 ڢَب, 2008 1995-12-22T09:05:02 = 22 دِس, 1995 -0010-09-15T04:44:23 = 15 سَت, -10 =head2 Time Formats =head3 Full 2008-02-05T18:30:30 = 18:30:30 UTC 1995-12-22T09:05:02 = 09:05:02 UTC -0010-09-15T04:44:23 = 04:44:23 UTC =head3 Long 2008-02-05T18:30:30 = 18:30:30 UTC 1995-12-22T09:05:02 = 09:05:02 UTC -0010-09-15T04:44:23 = 04:44:23 UTC =head3 Medium 2008-02-05T18:30:30 = 18:30:30 1995-12-22T09:05:02 = 09:05:02 -0010-09-15T04:44:23 = 04:44:23 =head3 Short 2008-02-05T18:30:30 = 18:30 1995-12-22T09:05:02 = 09:05 -0010-09-15T04:44:23 = 04:44 =head3 Default 2008-02-05T18:30:30 = 18:30:30 1995-12-22T09:05:02 = 09:05:02 -0010-09-15T04:44:23 = 04:44:23 =head2 Datetime Formats =head3 Full 2008-02-05T18:30:30 = تَلَتَ, 5 ڢَبْرَيْرُ, 2008 18:30:30 UTC 1995-12-22T09:05:02 = جُمَعَ, 22 دِسَمْبَ, 1995 09:05:02 UTC -0010-09-15T04:44:23 = أَسَبَرْ, 15 سَتُمْبَ, -10 04:44:23 UTC =head3 Long 2008-02-05T18:30:30 = 5 ڢَبْرَيْرُ, 2008 18:30:30 UTC 1995-12-22T09:05:02 = 22 دِسَمْبَ, 1995 09:05:02 UTC -0010-09-15T04:44:23 = 15 سَتُمْبَ, -10 04:44:23 UTC =head3 Medium 2008-02-05T18:30:30 = 5 ڢَب, 2008 18:30:30 1995-12-22T09:05:02 = 22 دِس, 1995 09:05:02 -0010-09-15T04:44:23 = 15 سَت, -10 04:44:23 =head3 Short 2008-02-05T18:30:30 = 5/2/08 18:30 1995-12-22T09:05:02 = 22/12/95 09:05 -0010-09-15T04:44:23 = 15/9/-10 04:44 =head3 Default 2008-02-05T18:30:30 = 5 ڢَب, 2008 18:30:30 1995-12-22T09:05:02 = 22 دِس, 1995 09:05:02 -0010-09-15T04:44:23 = 15 سَت, -10 04:44:23 =head2 Available Formats =head3 d (d) 2008-02-05T18:30:30 = 5 1995-12-22T09:05:02 = 22 -0010-09-15T04:44:23 = 15 =head3 EEEd (d EEE) 2008-02-05T18:30:30 = 5 تَل 1995-12-22T09:05:02 = 22 جُم -0010-09-15T04:44:23 = 15 أَسَ =head3 Hm (H:mm) 2008-02-05T18:30:30 = 18:30 1995-12-22T09:05:02 = 9:05 -0010-09-15T04:44:23 = 4:44 =head3 hm (h:mm a) 2008-02-05T18:30:30 = 6:30 P.M. 1995-12-22T09:05:02 = 9:05 A.M. -0010-09-15T04:44:23 = 4:44 A.M. =head3 Hms (H:mm:ss) 2008-02-05T18:30:30 = 18:30:30 1995-12-22T09:05:02 = 9:05:02 -0010-09-15T04:44:23 = 4:44:23 =head3 hms (h:mm:ss a) 2008-02-05T18:30:30 = 6:30:30 P.M. 1995-12-22T09:05:02 = 9:05:02 A.M. -0010-09-15T04:44:23 = 4:44:23 A.M. =head3 M (L) 2008-02-05T18:30:30 = 2 1995-12-22T09:05:02 = 12 -0010-09-15T04:44:23 = 9 =head3 Md (M-d) 2008-02-05T18:30:30 = 2-5 1995-12-22T09:05:02 = 12-22 -0010-09-15T04:44:23 = 9-15 =head3 MEd (E, d-M) 2008-02-05T18:30:30 = تَل, 5-2 1995-12-22T09:05:02 = جُم, 22-12 -0010-09-15T04:44:23 = أَسَ, 15-9 =head3 MMM (LLL) 2008-02-05T18:30:30 = ڢَب 1995-12-22T09:05:02 = دِس -0010-09-15T04:44:23 = سَت =head3 MMMd (d MMM) 2008-02-05T18:30:30 = 5 ڢَب 1995-12-22T09:05:02 = 22 دِس -0010-09-15T04:44:23 = 15 سَت =head3 MMMEd (E d MMM) 2008-02-05T18:30:30 = تَل 5 ڢَب 1995-12-22T09:05:02 = جُم 22 دِس -0010-09-15T04:44:23 = أَسَ 15 سَت =head3 MMMMd (d MMMM) 2008-02-05T18:30:30 = 5 ڢَبْرَيْرُ 1995-12-22T09:05:02 = 22 دِسَمْبَ -0010-09-15T04:44:23 = 15 سَتُمْبَ =head3 MMMMEd (E d MMMM) 2008-02-05T18:30:30 = تَل 5 ڢَبْرَيْرُ 1995-12-22T09:05:02 = جُم 22 دِسَمْبَ -0010-09-15T04:44:23 = أَسَ 15 سَتُمْبَ =head3 ms (mm:ss) 2008-02-05T18:30:30 = 30:30 1995-12-22T09:05:02 = 05:02 -0010-09-15T04:44:23 = 44:23 =head3 y (y) 2008-02-05T18:30:30 = 2008 1995-12-22T09:05:02 = 1995 -0010-09-15T04:44:23 = -10 =head3 yM (y-M) 2008-02-05T18:30:30 = 2008-2 1995-12-22T09:05:02 = 1995-12 -0010-09-15T04:44:23 = -10-9 =head3 yMEd (EEE, d/M/yyyy) 2008-02-05T18:30:30 = تَل, 5/2/2008 1995-12-22T09:05:02 = جُم, 22/12/1995 -0010-09-15T04:44:23 = أَسَ, 15/9/-010 =head3 yMMM (y MMM) 2008-02-05T18:30:30 = 2008 ڢَب 1995-12-22T09:05:02 = 1995 دِس -0010-09-15T04:44:23 = -10 سَت =head3 yMMMEd (EEE, d MMM y) 2008-02-05T18:30:30 = تَل, 5 ڢَب 2008 1995-12-22T09:05:02 = جُم, 22 دِس 1995 -0010-09-15T04:44:23 = أَسَ, 15 سَت -10 =head3 yMMMM (y MMMM) 2008-02-05T18:30:30 = 2008 ڢَبْرَيْرُ 1995-12-22T09:05:02 = 1995 دِسَمْبَ -0010-09-15T04:44:23 = -10 سَتُمْبَ =head3 yQ (y Q) 2008-02-05T18:30:30 = 2008 1 1995-12-22T09:05:02 = 1995 4 -0010-09-15T04:44:23 = -10 3 =head3 yQQQ (y QQQ) 2008-02-05T18:30:30 = 2008 Q1 1995-12-22T09:05:02 = 1995 Q4 -0010-09-15T04:44:23 = -10 Q3 =head3 yyQ (Q yy) 2008-02-05T18:30:30 = 1 08 1995-12-22T09:05:02 = 4 95 -0010-09-15T04:44:23 = 3 -10 =head2 Miscellaneous =head3 Prefers 24 hour time? Yes =head3 Local first day of the week لِتِنِنْ =head1 SUPPORT See L<DateTime::Locale>. =head1 AUTHOR Dave Rolsky <autarch@urth.org> =head1 COPYRIGHT Copyright (c) 2008 David Rolsky. All rights reserved. This program is free software; you can redistribute it and/or modify it under the same terms as Perl itself. This module was generated from data provided by the CLDR project, see the LICENSE.cldr in this distribution for details on the CLDR data's license. =cut
liuyangning/WX_web
xampp/perl/vendor/lib/DateTime/Locale/ha_Arab.pm
Perl
mit
11,282
#! /usr/bin/perl # # create-test-stubs.pl # sequel-pro # # Created by Stuart Connolly (stuconnolly.com) on January 8, 2011. # Copyright (c) 2011 Stuart Connolly. All rights reserved. # # Permission is hereby granted, free of charge, to any person # obtaining a copy of this software and associated documentation # files (the "Software"), to deal in the Software without # restriction, including without limitation the rights to use, # copy, modify, merge, publish, distribute, sublicense, and/or sell # copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following # conditions: # # The above copyright notice and this permission notice shall be # included in all copies or substantial portions of the Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES # OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT # HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, # WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR # OTHER DEALINGS IN THE SOFTWARE. # # More info at <https://github.com/sequelpro/sequelpro> use strict; use warnings; use Carp; use Getopt::Long; use constant PROJECT_NAME => 'sequel-pro'; use constant PROJECT_URL => 'https://github.com/sequelpro/sequelpro'; # # Print this script's usage. # sub usage { print << "EOF"; Usage: perl $0 [options] Possible options are: --header (-s) Source header file path (required) --output (-o) The output path (required) --author (-a) The author of the eventual test cases (required) --help (-h) Print this help message EOF exit 0; } # # Writes the standard license/copyright header to the supplied file handle; # sub write_header_to_file { my ($handle, $filename, $author, $is_header) = @_; my @date = localtime(time); my @months = qw(January February March April May June July August September October November December); my $year = ($date[5] + 1900); my $month = $months[$date[4]]; my $project = PROJECT_NAME; my $project_url = PROJECT_URL; $filename = ($is_header) ? "${filename}.h" : "${filename}.m"; my $content = << "EOF"; // // $filename // $project // // Created by $author on $month $date[3], $year // Copyright (c) $year ${author}. All rights reserved. // // Permission is hereby granted, free of charge, to any person // obtaining a copy of this software and associated documentation // files (the "Software"), to deal in the Software without // restriction, including without limitation the rights to use, // copy, modify, merge, publish, distribute, sublicense, and/or sell // copies of the Software, and to permit persons to whom the // Software is furnished to do so, subject to the following // conditions: // // The above copyright notice and this permission notice shall be // included in all copies or substantial portions of the Software. // // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, // EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES // OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND // NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT // HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, // WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING // FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR // OTHER DEALINGS IN THE SOFTWARE. // // More info at <${project_url}> EOF print $handle $content; } my ($header, $output, $author, $comments, $help); # Get options GetOptions('header|s=s' => \$header, 'output|o=s' => \$output, 'author|a=s' => \$author, 'comments|c' => \$comments, 'help|h' => \$help); usage if $help; usage if ((!$header) && (!$output) && (!$author)); open(my $header_handle, $header) || croak "Unable to open source header file: $!"; my @methods; my $class_name; my $category_name; # Extract all the methods (both instance and class) from the source header while (<$header_handle>) { ($_ =~ /^\s*\@interface\s*([a-zA-z0-9_-]+)\s*\(([a-zA-z0-9_-]+)\)\s*$/) && ($class_name = $1, $category_name = $2); ($_ =~ /^\s*[-|+]\s*\([a-zA-Z\s*\*_-]+\)(.*)$/) && (my $method_sig = $1); $class_name =~ s/^\s+// if $class_name; $class_name =~ s/\s+$// if $class_name; $category_name =~ s/^\s+// if $category_name; $category_name =~ s/\s+$// if $category_name; push(@methods, $method_sig) if $method_sig; } close($header_handle); my $filename = ($category_name) ? $category_name : $class_name; my $new_filename = "${filename}Tests"; my $header_file = "${output}/${new_filename}.h"; my $imp_file = "${output}/${new_filename}.m"; # Create the new header and implementation files open(my $output_header_handle, '>', $header_file) || croak "Unable to open output file: $!"; open(my $output_imp_handle, '>', $imp_file) || croak "Unable to open output file: $!"; print "Creating file '${header_file}'...\n"; print "Creating file '${imp_file}'...\n"; # Write the license header to the new files write_header_to_file($output_header_handle, $new_filename, $author, 1); write_header_to_file($output_imp_handle, $new_filename, $author, 0); print $output_header_handle "#import <SenTestingKit/SenTestingKit.h>\n\n\@interface $new_filename : SenTestCase\n{\n\n}\n\n\@end\n"; print $output_imp_handle "#import \"${new_filename}.h\"\n#import \"${filename}.h\"\n\n\@implementation $new_filename\n\n"; # Write the setup and tear down methods print $output_imp_handle "/**\n * Test case setup.\n */\n" if $comments; print $output_imp_handle "- (void)setUp\n{\n\n}\n\n"; print $output_imp_handle "/**\n * Test case tear down.\n */\n" if $comments; print $output_imp_handle "- (void)tearDown\n{\n\n}\n\n"; # For each of the extracted methods write a test case stub to the new test implementation file foreach (@methods) { $_ =~ s/\([a-zA-Z\s*\*_-]*\)\s*[a-zA-z0-9_-]+//gi; $_ =~ s/:\s*([a-zA-z0-9_-]+)\s*/\u$1/gi; $_ =~ s/://; $_ =~ s/;//; my $method = "test\u$_"; print "Writing test case stub: $method\n"; print $output_imp_handle "/**\n * $_ test case.\n */\n" if $comments; print $output_imp_handle "- (void)${method}\n{\n\n}\n\n"; } print $output_imp_handle "\@end\n\n"; close($output_header_handle); close($output_imp_handle); print "Test case stub generation complete for class '${filename}'\n"; exit 0
abhibeckert/sequelpro
Scripts/create-test-stubs.pl
Perl
mit
6,552
package DDG::Spice::Gifs; # ABSTRACT: Search for gifs use strict; use DDG::Spice; name "Gifs"; description "Animated Gifs"; primary_example_queries "funny cat gifs"; source "Giphy"; code_url "https://github.com/duckduckgo/zeroclickinfo-spice/blob/master/lib/DDG/Spice/Gifs.pm"; attribution github => ['https://github.com/bsstoner','bsstoner']; triggers startend => "gif", "gifs", "giphy"; spice to => 'http://api.giphy.com/v1/gifs/search?q=$1&api_key={{ENV{DDG_SPICE_GIPHY_APIKEY}}}'; spice wrap_jsonp_callback => 1; handle remainder => sub { return $_ if $_; return; }; 1;
ppant/zeroclickinfo-spice
lib/DDG/Spice/Gifs.pm
Perl
apache-2.0
588
package CPAN::HandleConfig; use strict; use vars qw(%can %keys $loading $VERSION); $VERSION = sprintf "%.6f", substr(q$Rev: 2212 $,4)/1000000 + 5.4; %can = ( commit => "Commit changes to disk", defaults => "Reload defaults from disk", help => "Short help about 'o conf' usage", init => "Interactive setting of all options", ); # Q: where is the "How do I add a new config option" HOWTO? # A1: svn diff -r 757:758 # where dagolden added test_report # A2: svn diff -r 985:986 # where andk added yaml_module %keys = map { $_ => undef } ( "applypatch", "auto_commit", "build_cache", "build_dir", "build_dir_reuse", "build_requires_install_policy", "bzip2", "cache_metadata", "check_sigs", "colorize_debug", "colorize_output", "colorize_print", "colorize_warn", "commandnumber_in_prompt", "commands_quote", "cpan_home", "curl", "dontload_hash", # deprecated after 1.83_68 (rev. 581) "dontload_list", "ftp", "ftp_passive", "ftp_proxy", "getcwd", "gpg", "gzip", "histfile", "histsize", "http_proxy", "inactivity_timeout", "index_expire", "inhibit_startup_message", "keep_source_where", "load_module_verbosity", "lynx", "make", "make_arg", "make_install_arg", "make_install_make_command", "makepl_arg", "mbuild_arg", "mbuild_install_arg", "mbuild_install_build_command", "mbuildpl_arg", "ncftp", "ncftpget", "no_proxy", "pager", "password", "patch", "prefer_installer", "prefs_dir", "prerequisites_policy", "proxy_pass", "proxy_user", "randomize_urllist", "scan_cache", "shell", "show_unparsable_versions", "show_upload_date", "show_zero_versions", "tar", "tar_verbosity", "term_is_latin", "term_ornaments", "test_report", "unzip", "urllist", "use_sqlite", "username", "wait_list", "wget", "yaml_load_code", "yaml_module", ); my %prefssupport = map { $_ => 1 } ( "build_requires_install_policy", "check_sigs", "make", "make_install_make_command", "prefer_installer", "test_report", ); if ($^O eq "MSWin32") { for my $k (qw( mbuild_install_build_command make_install_make_command )) { delete $keys{$k}; if (exists $CPAN::Config->{$k}) { for ("deleting previously set config variable '$k' => '$CPAN::Config->{$k}'") { $CPAN::Frontend ? $CPAN::Frontend->mywarn($_) : warn $_; } delete $CPAN::Config->{$k}; } } } # returns true on successful action sub edit { my($self,@args) = @_; return unless @args; CPAN->debug("self[$self]args[".join(" | ",@args)."]"); my($o,$str,$func,$args,$key_exists); $o = shift @args; $DB::single = 1; if($can{$o}) { $self->$o(args => \@args); # o conf init => sub init => sub load return 1; } else { CPAN->debug("o[$o]") if $CPAN::DEBUG; unless (exists $keys{$o}) { $CPAN::Frontend->mywarn("Warning: unknown configuration variable '$o'\n"); } my $changed; # one day I used randomize_urllist for a boolean, so we must # list them explicitly --ak if (0) { } elsif ($o =~ /^(wait_list|urllist|dontload_list)$/) { # # ARRAYS # $func = shift @args; $func ||= ""; CPAN->debug("func[$func]args[@args]") if $CPAN::DEBUG; # Let's avoid eval, it's easier to comprehend without. if ($func eq "push") { push @{$CPAN::Config->{$o}}, @args; $changed = 1; } elsif ($func eq "pop") { pop @{$CPAN::Config->{$o}}; $changed = 1; } elsif ($func eq "shift") { shift @{$CPAN::Config->{$o}}; $changed = 1; } elsif ($func eq "unshift") { unshift @{$CPAN::Config->{$o}}, @args; $changed = 1; } elsif ($func eq "splice") { my $offset = shift @args || 0; my $length = shift @args || 0; splice @{$CPAN::Config->{$o}}, $offset, $length, @args; # may warn $changed = 1; } elsif ($func) { $CPAN::Config->{$o} = [$func, @args]; $changed = 1; } else { $self->prettyprint($o); } if ($changed) { if ($o eq "urllist") { # reset the cached values undef $CPAN::FTP::Thesite; undef $CPAN::FTP::Themethod; $CPAN::Index::LAST_TIME = 0; } elsif ($o eq "dontload_list") { # empty it, it will be built up again $CPAN::META->{dontload_hash} = {}; } } } elsif ($o =~ /_hash$/) { # # HASHES # if (@args==1 && $args[0] eq "") { @args = (); } elsif (@args % 2) { push @args, ""; } $CPAN::Config->{$o} = { @args }; $changed = 1; } else { # # SCALARS # if (defined $args[0]) { $CPAN::CONFIG_DIRTY = 1; $CPAN::Config->{$o} = $args[0]; $changed = 1; } $self->prettyprint($o) if exists $keys{$o} or defined $CPAN::Config->{$o}; } if ($changed) { if ($CPAN::Config->{auto_commit}) { $self->commit; } else { $CPAN::CONFIG_DIRTY = 1; $CPAN::Frontend->myprint("Please use 'o conf commit' to ". "make the config permanent!\n\n"); } } } } sub prettyprint { my($self,$k) = @_; my $v = $CPAN::Config->{$k}; if (ref $v) { my(@report); if (ref $v eq "ARRAY") { @report = map {"\t$_ \[$v->[$_]]\n"} 0..$#$v; } else { @report = map { sprintf "\t%-18s => %s\n", "[$_]", defined $v->{$_} ? "[$v->{$_}]" : "undef" } keys %$v; } $CPAN::Frontend->myprint( join( "", sprintf( " %-18s\n", $k ), @report ) ); } elsif (defined $v) { $CPAN::Frontend->myprint(sprintf " %-18s [%s]\n", $k, $v); } else { $CPAN::Frontend->myprint(sprintf " %-18s undef\n", $k); } } sub commit { my($self,@args) = @_; CPAN->debug("args[@args]") if $CPAN::DEBUG; if ($CPAN::RUN_DEGRADED) { $CPAN::Frontend->mydie( "'o conf commit' disabled in ". "degraded mode. Maybe try\n". " !undef \$CPAN::RUN_DEGRADED\n" ); } my $configpm; if (@args) { if ($args[0] eq "args") { # we have not signed that contract } else { $configpm = $args[0]; } } unless (defined $configpm) { $configpm ||= $INC{"CPAN/MyConfig.pm"}; $configpm ||= $INC{"CPAN/Config.pm"}; $configpm || Carp::confess(q{ CPAN::Config::commit called without an argument. Please specify a filename where to save the configuration or try "o conf init" to have an interactive course through configing. }); } my($mode); if (-f $configpm) { $mode = (stat $configpm)[2]; if ($mode && ! -w _) { Carp::confess("$configpm is not writable"); } } my $msg; $msg = <<EOF unless $configpm =~ /MyConfig/; # This is CPAN.pm's systemwide configuration file. This file provides # defaults for users, and the values can be changed in a per-user # configuration file. The user-config file is being looked for as # ~/.cpan/CPAN/MyConfig.pm. EOF $msg ||= "\n"; my($fh) = FileHandle->new; rename $configpm, "$configpm~" if -f $configpm; open $fh, ">$configpm" or $CPAN::Frontend->mydie("Couldn't open >$configpm: $!"); $fh->print(qq[$msg\$CPAN::Config = \{\n]); foreach (sort keys %$CPAN::Config) { unless (exists $keys{$_}) { # do not drop them: forward compatibility! $CPAN::Frontend->mywarn("Unknown config variable '$_'\n"); next; } $fh->print( " '$_' => ", $self->neatvalue($CPAN::Config->{$_}), ",\n" ); } $fh->print("};\n1;\n__END__\n"); close $fh; #$mode = 0444 | ( $mode & 0111 ? 0111 : 0 ); #chmod $mode, $configpm; ###why was that so? $self->defaults; $CPAN::Frontend->myprint("commit: wrote '$configpm'\n"); $CPAN::CONFIG_DIRTY = 0; 1; } # stolen from MakeMaker; not taking the original because it is buggy; # bugreport will have to say: keys of hashes remain unquoted and can # produce syntax errors sub neatvalue { my($self, $v) = @_; return "undef" unless defined $v; my($t) = ref $v; unless ($t) { $v =~ s/\\/\\\\/g; return "q[$v]"; } if ($t eq 'ARRAY') { my(@m, @neat); push @m, "["; foreach my $elem (@$v) { push @neat, "q[$elem]"; } push @m, join ", ", @neat; push @m, "]"; return join "", @m; } return "$v" unless $t eq 'HASH'; my(@m, $key, $val); while (($key,$val) = each %$v) { last unless defined $key; # cautious programming in case (undef,undef) is true push(@m,"q[$key]=>".$self->neatvalue($val)) ; } return "{ ".join(', ',@m)." }"; } sub defaults { my($self) = @_; if ($CPAN::RUN_DEGRADED) { $CPAN::Frontend->mydie( "'o conf defaults' disabled in ". "degraded mode. Maybe try\n". " !undef \$CPAN::RUN_DEGRADED\n" ); } my $done; for my $config (qw(CPAN/MyConfig.pm CPAN/Config.pm)) { if ($INC{$config}) { CPAN->debug("INC{'$config'}[$INC{$config}]") if $CPAN::DEBUG; CPAN::Shell->_reload_this($config,{reloforce => 1}); $CPAN::Frontend->myprint("'$INC{$config}' reread\n"); last; } } $CPAN::CONFIG_DIRTY = 0; 1; } =head2 C<< CLASS->safe_quote ITEM >> Quotes an item to become safe against spaces in shell interpolation. An item is enclosed in double quotes if: - the item contains spaces in the middle - the item does not start with a quote This happens to avoid shell interpolation problems when whitespace is present in directory names. This method uses C<commands_quote> to determine the correct quote. If C<commands_quote> is a space, no quoting will take place. if it starts and ends with the same quote character: leave it as it is if it contains no whitespace: leave it as it is if it contains whitespace, then if it contains quotes: better leave it as it is else: quote it with the correct quote type for the box we're on =cut { # Instead of patching the guess, set commands_quote # to the right value my ($quotes,$use_quote) = $^O eq 'MSWin32' ? ('"', '"') : (q{"'}, "'") ; sub safe_quote { my ($self, $command) = @_; # Set up quote/default quote my $quote = $CPAN::Config->{commands_quote} || $quotes; if ($quote ne ' ' and defined($command ) and $command =~ /\s/ and $command !~ /[$quote]/) { return qq<$use_quote$command$use_quote> } return $command; } } sub init { my($self,@args) = @_; CPAN->debug("self[$self]args[".join(",",@args)."]"); $self->load(doit => 1, @args); 1; } # This is a piece of repeated code that is abstracted here for # maintainability. RMB # sub _configpmtest { my($configpmdir, $configpmtest) = @_; if (-w $configpmtest) { return $configpmtest; } elsif (-w $configpmdir) { #_#_# following code dumped core on me with 5.003_11, a.k. my $configpm_bak = "$configpmtest.bak"; unlink $configpm_bak if -f $configpm_bak; if( -f $configpmtest ) { if( rename $configpmtest, $configpm_bak ) { $CPAN::Frontend->mywarn(<<END); Old configuration file $configpmtest moved to $configpm_bak END } } my $fh = FileHandle->new; if ($fh->open(">$configpmtest")) { $fh->print("1;\n"); return $configpmtest; } else { # Should never happen Carp::confess("Cannot open >$configpmtest"); } } else { return } } sub require_myconfig_or_config () { return if $INC{"CPAN/MyConfig.pm"}; local @INC = @INC; my $home = home(); unshift @INC, File::Spec->catdir($home,'.cpan'); eval { require CPAN::MyConfig }; my $err_myconfig = $@; if ($err_myconfig and $err_myconfig !~ m#locate CPAN/MyConfig\.pm#) { die "Error while requiring CPAN::MyConfig:\n$err_myconfig"; } unless ($INC{"CPAN/MyConfig.pm"}) { # this guy has settled his needs already eval {require CPAN::Config;}; # not everybody has one my $err_config = $@; if ($err_config and $err_config !~ m#locate CPAN/Config\.pm#) { die "Error while requiring CPAN::Config:\n$err_config"; } } } sub home () { my $home; if ($CPAN::META->has_usable("File::HomeDir")) { $home = File::HomeDir->my_data; unless (defined $home) { $home = File::HomeDir->my_home } } unless (defined $home) { $home = $ENV{HOME}; } $home; } sub load { my($self, %args) = @_; $CPAN::Be_Silent++ if $args{be_silent}; my $doit; $doit = delete $args{doit}; use Carp; require_myconfig_or_config; my @miss = $self->missing_config_data; return unless $doit || @miss; return if $loading; $loading++; require CPAN::FirstTime; my($configpm,$fh,$redo); $redo ||= ""; if (defined $INC{"CPAN/Config.pm"} && -w $INC{"CPAN/Config.pm"}) { $configpm = $INC{"CPAN/Config.pm"}; $redo++; } elsif (defined $INC{"CPAN/MyConfig.pm"} && -w $INC{"CPAN/MyConfig.pm"}) { $configpm = $INC{"CPAN/MyConfig.pm"}; $redo++; } else { my($path_to_cpan) = File::Basename::dirname($INC{"CPAN.pm"}); my($configpmdir) = File::Spec->catdir($path_to_cpan,"CPAN"); my($configpmtest) = File::Spec->catfile($configpmdir,"Config.pm"); my $inc_key; if (-d $configpmdir or File::Path::mkpath($configpmdir)) { $configpm = _configpmtest($configpmdir,$configpmtest); $inc_key = "CPAN/Config.pm"; } unless ($configpm) { $configpmdir = File::Spec->catdir(home,".cpan","CPAN"); File::Path::mkpath($configpmdir); $configpmtest = File::Spec->catfile($configpmdir,"MyConfig.pm"); $configpm = _configpmtest($configpmdir,$configpmtest); $inc_key = "CPAN/MyConfig.pm"; } if ($configpm) { $INC{$inc_key} = $configpm; } else { my $text = qq{WARNING: CPAN.pm is unable to } . qq{create a configuration file.}; output($text, 'confess'); } } local($") = ", "; if ($redo && !$doit) { $CPAN::Frontend->myprint(<<END); Sorry, we have to rerun the configuration dialog for CPAN.pm due to some missing parameters... END $args{args} = \@miss; } CPAN::FirstTime::init($configpm, %args); $loading--; return; } # returns mandatory but missing entries in the Config sub missing_config_data { my(@miss); for ( "auto_commit", "build_cache", "build_dir", "cache_metadata", "cpan_home", "ftp_proxy", #"gzip", "http_proxy", "index_expire", #"inhibit_startup_message", "keep_source_where", #"make", "make_arg", "make_install_arg", "makepl_arg", "mbuild_arg", "mbuild_install_arg", "mbuild_install_build_command", "mbuildpl_arg", "no_proxy", #"pager", "prerequisites_policy", "scan_cache", #"tar", #"unzip", "urllist", ) { next unless exists $keys{$_}; push @miss, $_ unless defined $CPAN::Config->{$_}; } return @miss; } sub help { $CPAN::Frontend->myprint(q[ Known options: commit commit session changes to disk defaults reload default config values from disk help this help init enter a dialog to set all or a set of parameters Edit key values as in the following (the "o" is a literal letter o): o conf build_cache 15 o conf build_dir "/foo/bar" o conf urllist shift o conf urllist unshift ftp://ftp.foo.bar/ o conf inhibit_startup_message 1 ]); undef; #don't reprint CPAN::Config } sub cpl { my($word,$line,$pos) = @_; $word ||= ""; CPAN->debug("word[$word] line[$line] pos[$pos]") if $CPAN::DEBUG; my(@words) = split " ", substr($line,0,$pos+1); if ( defined($words[2]) and $words[2] =~ /list$/ and ( @words == 3 || @words == 4 && length($word) ) ) { return grep /^\Q$word\E/, qw(splice shift unshift pop push); } elsif (defined($words[2]) and $words[2] eq "init" and ( @words == 3 || @words >= 4 && length($word) )) { return sort grep /^\Q$word\E/, keys %keys; } elsif (@words >= 4) { return (); } my %seen; my(@o_conf) = sort grep { !$seen{$_}++ } keys %can, keys %$CPAN::Config, keys %keys; return grep /^\Q$word\E/, @o_conf; } sub prefs_lookup { my($self,$distro,$what) = @_; if ($prefssupport{$what}) { return $CPAN::Config->{$what} unless $distro and $distro->prefs and $distro->prefs->{cpanconfig} and defined $distro->prefs->{cpanconfig}{$what}; return $distro->prefs->{cpanconfig}{$what}; } else { $CPAN::Frontend->mywarn("Warning: $what not yet officially ". "supported for distroprefs, doing a normal lookup"); return $CPAN::Config->{$what}; } } { package CPAN::Config; ####::###### #hide from indexer # note: J. Nick Koston wrote me that they are using # CPAN::Config->commit although undocumented. I suggested # CPAN::Shell->o("conf","commit") even when ugly it is at least # documented # that's why I added the CPAN::Config class with autoload and # deprecated warning use strict; use vars qw($AUTOLOAD $VERSION); $VERSION = sprintf "%.2f", substr(q$Rev: 2212 $,4)/100; # formerly CPAN::HandleConfig was known as CPAN::Config sub AUTOLOAD { my $class = shift; # e.g. in dh-make-perl: CPAN::Config my($l) = $AUTOLOAD; $CPAN::Frontend->mywarn("Dispatching deprecated method '$l' to CPAN::HandleConfig\n"); $l =~ s/.*:://; CPAN::HandleConfig->$l(@_); } } 1; __END__ =head1 LICENSE This program is free software; you can redistribute it and/or modify it under the same terms as Perl itself. =cut # Local Variables: # mode: cperl # cperl-indent-level: 4 # End:
leighpauls/k2cro4
third_party/cygwin/lib/perl5/vendor_perl/5.10/CPAN/HandleConfig.pm
Perl
bsd-3-clause
20,585
package DDG::Goodie::IsAwesome::claytonspinner; # ABSTRACT: claytonspinner's first Goodie use DDG::Goodie; use strict; zci answer_type => "is_awesome_claytonspinner"; zci is_cached => 1; name "IsAwesome claytonspinner"; description "My first Goodie, it let's the world know that claytonspinner is awesome"; primary_example_queries "duckduckhack claytonspinner"; category "special"; topics "special_interest", "geek"; code_url "https://github.com/duckduckgo/zeroclickinfo-goodies/blob/master/lib/DDG/Goodie/IsAwesome/claytonspinner.pm"; attribution github => ["https://github.com/claytonspinner", "claytonspinner"]; triggers start => "duckduckhack claytonspinner"; handle remainder => sub { return if $_; return "claytonspinner is awesome and has successfully completed the DuckDuckHack Goodie tutorial!"; }; 1;
sagarhani/zeroclickinfo-goodies
lib/DDG/Goodie/IsAwesome/claytonspinner.pm
Perl
apache-2.0
827
package # Date::Manip::Offset::off127; # Copyright (c) 2008-2015 Sullivan Beck. All rights reserved. # This program is free software; you can redistribute it and/or modify it # under the same terms as Perl itself. # This file was automatically generated. Any changes to this file will # be lost the next time 'tzdata' is run. # Generated on: Wed Nov 25 11:44:43 EST 2015 # Data version: tzdata2015g # Code version: tzcode2015g # This module contains data from the zoneinfo time zone database. The original # data was obtained from the URL: # ftp://ftp.iana.org/tz use strict; use warnings; require 5.010000; our ($VERSION); $VERSION='6.52'; END { undef $VERSION; } our ($Offset,%Offset); END { undef $Offset; undef %Offset; } $Offset = '+06:42:04'; %Offset = ( 0 => [ 'asia/bangkok', ], ); 1;
jkb78/extrajnm
local/lib/perl5/Date/Manip/Offset/off127.pm
Perl
mit
851
#BEGIN_HEADER # # Copyright (C) 2020 Mahdi Safsafi. # # https://github.com/MahdiSafsafi/opcodesDB # # See licence file 'LICENCE' for use and distribution rights. # #END_HEADER use strict; use warnings; ENCODING ABS_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b01011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=ABS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=ABS_advsimd cclass=ABS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING ABS_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b01011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ABS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=ABS_advsimd cclass=ABS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING ADD_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=ADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=ADD_advsimd cclass=ADD_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING ADD_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=ADD_advsimd cclass=ADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING ADDHN_asimddiff_N => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ADDHN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=ADDHN_advsimd cclass=ADDHN_asimddiff_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING ADDP_asisdpair_only => { name => 'Advanced SIMD', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size:u=0bxx ig2=0b11000 opcode=0b11011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=ADDP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=ADDP_advsimd_pair cclass=ADDP_asisdpair_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING ADDP_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10111 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ADDP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=ADDP_advsimd_vec cclass=ADDP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING ADDV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b11000 opcode=0b11011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=ADDV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=ADDV_advsimd cclass=ADDV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING AESD_B_cryptoaes => { name => 'Advanced SIMD', diagram => 'ig0=0b01001110 size=0b00 ig1=0b10100 ig2=0b0010 D:u=0b1 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=AESD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptoaes page=AESD_advsimd cclass=AESD_B_cryptoaes', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING AESE_B_cryptoaes => { name => 'Advanced SIMD', diagram => 'ig0=0b01001110 size=0b00 ig1=0b10100 ig2=0b0010 D:u=0b0 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=AESE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptoaes page=AESE_advsimd cclass=AESE_B_cryptoaes', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING AESIMC_B_cryptoaes => { name => 'Advanced SIMD', diagram => 'ig0=0b01001110 size=0b00 ig1=0b10100 ig2=0b0011 D:u=0b1 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=AESIMC', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptoaes page=AESIMC_advsimd cclass=AESIMC_B_cryptoaes', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING AESMC_B_cryptoaes => { name => 'Advanced SIMD', diagram => 'ig0=0b01001110 size=0b00 ig1=0b10100 ig2=0b0011 D:u=0b0 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=AESMC', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptoaes page=AESMC_advsimd cclass=AESMC_B_cryptoaes', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING AND_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0b00 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=AND', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=AND_advsimd cclass=AND_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING BCAX_VVV16_crypto4 => { name => 'Advanced SIMD', diagram => 'ig0=0b110011100 Op0=0b01 Rm:u=0bxxxxx ig1=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=BCAX', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto4 page=BCAX_advsimd cclass=BCAX_VVV16_crypto4', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING BFCVT_BS_floatdp1 => { name => 'Single-precision to BFloat16', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ptype=0b01 ig2=0b1 opcode=0b000110 ig3=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'convert-type=single-to-bf16 instr-class=float isa=A64 mnemonic=BFCVT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=BFCVT_float cclass=BFCVT_BS_floatdp1', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING BFCVTN_asimdmisc_4S => { name => 'Vector single-precision and BFloat16', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size=0b10 ig2=0b10000 opcode=0b10110 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-bf16 advsimd-type=simd datatype=single-and-bf16 instr-class=advsimd isa=A64 mnemonic=BFCVTN', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=BFCVTN_advsimd cclass=BFCVTN_asimdmisc_4S', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION', }; ENCODING BFDOT_asimdelem_E => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size=0b01 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1111 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=BFDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=BFDOT_advsimd_elt cclass=BFDOT_asimdelem_E', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT', }; ENCODING BFDOT_asimdsame2_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size=0b01 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b1111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BFDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=BFDOT_advsimd_vec cclass=BFDOT_asimdsame2_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT', }; ENCODING BFMLAL_asimdelem_F => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size=0b11 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1111 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=half instr-class=advsimd isa=A64 mnemonic=BFMLAL reguse-datatype=2reg-element-half', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=BFMLAL_advsimd_elt cclass=BFMLAL_asimdelem_F', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING BFMLAL_asimdsame2_F_ => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size=0b11 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b1111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BFMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=BFMLAL_advsimd_vec cclass=BFMLAL_asimdsame2_F_', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING BFMMLA_asimdsame2_E => { name => 'Vector', diagram => 'ig0=0b0 Q=0b1 U=0b1 ig1=0b01110 size=0b01 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b1101 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BFMMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=BFMMLA_advsimd cclass=BFMMLA_asimdsame2_E', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING BIC_asimdimm_L_hl => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b10x1 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b10x1', docvars => 'asimdimm-datatype=per-halfword asimdimm-immtype=shifted-immediate asimdimm-type=per-halfword-shifted-immediate instr-class=advsimd isa=A64 mnemonic=BIC', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=BIC_advsimd_imm cclass=BIC_advsimd_imm_shifted_immediate', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING BIC_asimdimm_L_sl => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b0xx1 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b0xx1', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=shifted-immediate asimdimm-type=per-word-shifted-immediate instr-class=advsimd isa=A64 mnemonic=BIC', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=BIC_advsimd_imm cclass=BIC_advsimd_imm_shifted_immediate', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING BIC_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0b01 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BIC', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=BIC_advsimd_reg cclass=BIC_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING BIF_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 opc2:u=0b11 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BIF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=BIF_advsimd cclass=BIF_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|INSERTION|BITWISE|CONDITIONALLY', }; ENCODING BIT_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 opc2:u=0b10 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BIT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=BIT_advsimd cclass=BIT_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|INSERTION|BITWISE|CONDITIONALLY', }; ENCODING BSL_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 opc2:u=0b01 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=BSL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=BSL_advsimd cclass=BSL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SELECTION', }; ENCODING CLS_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CLS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CLS_advsimd cclass=CLS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITFIELD', }; ENCODING CLZ_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CLZ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CLZ_advsimd cclass=CLZ_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITFIELD', }; ENCODING CMEQ_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMEQ_advsimd_reg cclass=CMEQ_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CMEQ_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMEQ_advsimd_reg cclass=CMEQ_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CMEQ_asisdmisc_Z => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=CMEQ_advsimd_zero cclass=CMEQ_asisdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CMEQ_asimdmisc_Z => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CMEQ_advsimd_zero cclass=CMEQ_asimdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CMGE_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMGE_advsimd_reg cclass=CMGE_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGE_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMGE_advsimd_reg cclass=CMGE_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGE_asisdmisc_Z => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=CMGE_advsimd_zero cclass=CMGE_asisdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGE_asimdmisc_Z => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CMGE_advsimd_zero cclass=CMGE_asimdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGT_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMGT_advsimd_reg cclass=CMGT_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGT_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMGT_advsimd_reg cclass=CMGT_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGT_asisdmisc_Z => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=CMGT_advsimd_zero cclass=CMGT_asisdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMGT_asimdmisc_Z => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CMGT_advsimd_zero cclass=CMGT_asimdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMHI_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMHI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMHI_advsimd cclass=CMHI_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|UNSIGNED', }; ENCODING CMHI_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMHI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMHI_advsimd cclass=CMHI_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|UNSIGNED', }; ENCODING CMHS_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMHS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMHS_advsimd cclass=CMHS_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|UNSIGNED', }; ENCODING CMHS_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0011 eq:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMHS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMHS_advsimd cclass=CMHS_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|UNSIGNED', }; ENCODING CMLE_asisdmisc_Z => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMLE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=CMLE_advsimd cclass=CMLE_asisdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMLE_asimdmisc_Z => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0100 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMLE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CMLE_advsimd cclass=CMLE_asimdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMLT_asisdmisc_Z => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b01010 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMLT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=CMLT_advsimd cclass=CMLT_asisdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMLT_asimdmisc_Z => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b01010 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMLT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CMLT_advsimd cclass=CMLT_asimdmisc_Z', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON|SIGNED', }; ENCODING CMTST_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=CMTST', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=CMTST_advsimd cclass=CMTST_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CMTST_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CMTST', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=CMTST_advsimd cclass=CMTST_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING CNT_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=CNT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=CNT_advsimd cclass=CNT_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITFIELD', }; ENCODING DUP_asisdone_only => { name => 'Scalar', diagram => 'ig0=0b01 op=0b0 ig1=0b11110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=DUP vector-xfer-type=scalar-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdone page=DUP_advsimd_elt cclass=DUP_advsimd_elt_DUP_asisdone_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BROADCASTING', }; ENCODING DUP_asimdins_DV_v => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=DUP vector-xfer-type=vector-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=DUP_advsimd_elt cclass=DUP_asimdins_DV_v', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BROADCASTING', }; ENCODING DUP_asimdins_DR_r => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=DUP vector-xfer-type=vector-from-general', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=DUP_advsimd_gen cclass=DUP_asimdins_DR_r', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BROADCASTING', }; ENCODING EOR3_VVV16_crypto4 => { name => 'Advanced SIMD', diagram => 'ig0=0b110011100 Op0=0b00 Rm:u=0bxxxxx ig1=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=EOR3', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto4 page=EOR3_advsimd cclass=EOR3_VVV16_crypto4', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING EOR_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 opc2:u=0b00 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=EOR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=EOR_advsimd cclass=EOR_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING EXT_asimdext_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b101110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 imm4:u=0bxxxx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=EXT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdext page=EXT_advsimd cclass=EXT_asimdext_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION', }; ENCODING FABD_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 a=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FABD', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FABD_advsimd cclass=FABD_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABD_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FABD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FABD_advsimd cclass=FABD_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABD_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FABD reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FABD_advsimd cclass=FABD_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABD_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FABD reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FABD_advsimd cclass=FABD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABS_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FABS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FABS_advsimd cclass=FABS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABS_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b01111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FABS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FABS_advsimd cclass=FABS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FABS_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0000 opc:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FABS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FABS_float cclass=FABS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FABS_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0000 opc:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FABS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FABS_float cclass=FABS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FABS_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0000 opc:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FABS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FABS_float cclass=FABS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FACGE_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FACGE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FACGE_advsimd cclass=FACGE_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGE_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FACGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FACGE_advsimd cclass=FACGE_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGE_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FACGE reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FACGE_advsimd cclass=FACGE_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGE_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FACGE reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FACGE_advsimd cclass=FACGE_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGT_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FACGT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FACGT_advsimd cclass=FACGT_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGT_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FACGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FACGT_advsimd cclass=FACGT_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGT_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FACGT reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FACGT_advsimd cclass=FACGT_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FACGT_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FACGT reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FACGT_advsimd cclass=FACGT_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FADD_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FADD reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FADD_advsimd cclass=FADD_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FADD_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FADD reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FADD_advsimd cclass=FADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FADD_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FADD', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FADD_float cclass=FADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FADD_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FADD_float cclass=FADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FADD_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FADD_float cclass=FADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FADDP_asisdpair_only_H => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b0 sz:u=0b0 ig3=0b11000 opcode=0b01101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FADDP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FADDP_advsimd_pair cclass=FADDP_asisdpair_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FADDP_asisdpair_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b11000 opcode=0b01101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FADDP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FADDP_advsimd_pair cclass=FADDP_asisdpair_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FADDP_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FADDP reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FADDP_advsimd_vec cclass=FADDP_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FADDP_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FADDP reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FADDP_advsimd_vec cclass=FADDP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FCADD_asimdsame2_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b11 rot:u=0bx ig5=0b0 ig6=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FCADD', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=FCADD_advsimd_vec cclass=FCADD_asimdsame2_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPLEX', }; ENCODING FCCMP_H_floatccmp => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b0 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FCCMP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMP_float cclass=FCCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCCMP_S_floatccmp => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b0 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FCCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMP_float cclass=FCCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCCMP_D_floatccmp => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b0 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FCCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMP_float cclass=FCCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCCMPE_H_floatccmp => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b1 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FCCMPE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMPE_float cclass=FCCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCCMPE_S_floatccmp => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b1 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FCCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMPE_float cclass=FCCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCCMPE_D_floatccmp => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b01 Rn:u=0bxxxxx op:u=0b1 nzcv:u=0bxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FCCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatccmp page=FCCMPE_float cclass=FCCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON|CONDITIONALLY', }; ENCODING FCMEQ_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FCMEQ_advsimd_reg cclass=FCMEQ_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FCMEQ_advsimd_reg cclass=FCMEQ_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMEQ reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FCMEQ_advsimd_reg cclass=FCMEQ_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMEQ reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FCMEQ_advsimd_reg cclass=FCMEQ_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asisdmiscfp16_FZ => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCMEQ_advsimd_zero cclass=FCMEQ_asisdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asisdmisc_FZ => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCMEQ_advsimd_zero cclass=FCMEQ_asisdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asimdmiscfp16_FZ => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCMEQ_advsimd_zero cclass=FCMEQ_asimdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMEQ_asimdmisc_FZ => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMEQ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCMEQ_advsimd_zero cclass=FCMEQ_asimdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FCMGE_advsimd_reg cclass=FCMGE_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FCMGE_advsimd_reg cclass=FCMGE_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGE reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FCMGE_advsimd_reg cclass=FCMGE_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGE reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FCMGE_advsimd_reg cclass=FCMGE_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asisdmiscfp16_FZ => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCMGE_advsimd_zero cclass=FCMGE_asisdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asisdmisc_FZ => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCMGE_advsimd_zero cclass=FCMGE_asisdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asimdmiscfp16_FZ => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCMGE_advsimd_zero cclass=FCMGE_asimdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGE_asimdmisc_FZ => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCMGE_advsimd_zero cclass=FCMGE_asimdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FCMGT_advsimd_reg cclass=FCMGT_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 E:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FCMGT_advsimd_reg cclass=FCMGT_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 ig4=0b10 ac:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGT reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FCMGT_advsimd_reg cclass=FCMGT_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 E:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx ig3=0b1110 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGT reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FCMGT_advsimd_reg cclass=FCMGT_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asisdmiscfp16_FZ => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCMGT_advsimd_zero cclass=FCMGT_asisdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asisdmisc_FZ => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCMGT_advsimd_zero cclass=FCMGT_asisdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asimdmiscfp16_FZ => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCMGT_advsimd_zero cclass=FCMGT_asimdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMGT_asimdmisc_FZ => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMGT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCMGT_advsimd_zero cclass=FCMGT_asimdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLA_asimdelem_C_H => { diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0b01 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 rot:u=0bxx ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'size == 0b01', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FCMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FCMLA_advsimd_elt cclass=FCMLA_advsimd_elt_2reg_element', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPLEX', }; ENCODING FCMLA_asimdelem_C_S => { diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0b10 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 rot:u=0bxx ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'size == 0b10', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FCMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FCMLA_advsimd_elt cclass=FCMLA_advsimd_elt_2reg_element', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPLEX', }; ENCODING FCMLA_asimdsame2_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b10 rot:u=0bxx ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FCMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=FCMLA_advsimd_vec cclass=FCMLA_asimdsame2_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPLEX', }; ENCODING FCMLE_asisdmiscfp16_FZ => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMLE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCMLE_advsimd cclass=FCMLE_asisdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLE_asisdmisc_FZ => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMLE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCMLE_advsimd cclass=FCMLE_asisdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLE_asimdmiscfp16_FZ => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b1 ig2=0b111100 ig3=0b0110 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMLE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCMLE_advsimd cclass=FCMLE_asimdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLE_asimdmisc_FZ => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 ig4=0b0110 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMLE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCMLE_advsimd cclass=FCMLE_asimdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLT_asisdmiscfp16_FZ => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 a=0b1 ig2=0b111100 opcode=0b01110 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMLT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCMLT_advsimd cclass=FCMLT_asisdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLT_asisdmisc_FZ => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b01110 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMLT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCMLT_advsimd cclass=FCMLT_asisdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLT_asimdmiscfp16_FZ => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b01110 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCMLT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCMLT_advsimd cclass=FCMLT_asimdmiscfp16_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMLT_asimdmisc_FZ => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b01110 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCMLT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCMLT_advsimd cclass=FCMLT_asimdmisc_FZ', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|COMPARISON', }; ENCODING FCMP_H_floatcmp => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b00 ig4=0b000', bitdiffs => 'ftype == 0b11 && opc == 0b00', docvars => 'compare-with=cmp-reg datatype=half instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMP_HZ_floatcmp => { name => 'Half-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b01 ig4=0b000', bitdiffs => 'ftype == 0b11 && Rm == (00000) && opc == 0b01', docvars => 'compare-with=cmp-zero datatype=half instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMP_S_floatcmp => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b00 ig4=0b000', bitdiffs => 'ftype == 0b00 && opc == 0b00', docvars => 'compare-with=cmp-reg datatype=single instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMP_SZ_floatcmp => { name => 'Single-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b01 ig4=0b000', bitdiffs => 'ftype == 0b00 && Rm == (00000) && opc == 0b01', docvars => 'compare-with=cmp-zero datatype=single instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMP_D_floatcmp => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b00 ig4=0b000', bitdiffs => 'ftype == 0b01 && opc == 0b00', docvars => 'compare-with=cmp-reg datatype=double instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMP_DZ_floatcmp => { name => 'Double-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b01 ig4=0b000', bitdiffs => 'ftype == 0b01 && Rm == (00000) && opc == 0b01', docvars => 'compare-with=cmp-zero datatype=double instr-class=float isa=A64 mnemonic=FCMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMP_float cclass=FCMP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_H_floatcmp => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b10 ig4=0b000', bitdiffs => 'ftype == 0b11 && opc == 0b10', docvars => 'compare-with=cmp-reg datatype=half instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_HZ_floatcmp => { name => 'Half-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b11 ig4=0b000', bitdiffs => 'ftype == 0b11 && Rm == (00000) && opc == 0b11', docvars => 'compare-with=cmp-zero datatype=half instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_S_floatcmp => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b10 ig4=0b000', bitdiffs => 'ftype == 0b00 && opc == 0b10', docvars => 'compare-with=cmp-reg datatype=single instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_SZ_floatcmp => { name => 'Single-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b11 ig4=0b000', bitdiffs => 'ftype == 0b00 && Rm == (00000) && opc == 0b11', docvars => 'compare-with=cmp-zero datatype=single instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_D_floatcmp => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b10 ig4=0b000', bitdiffs => 'ftype == 0b01 && opc == 0b10', docvars => 'compare-with=cmp-reg datatype=double instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCMPE_DZ_floatcmp => { name => 'Double-precision, zero', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0b00000 op=0b00 ig3=0b1000 Rn:u=0bxxxxx opc:u=0b11 ig4=0b000', bitdiffs => 'ftype == 0b01 && Rm == (00000) && opc == 0b11', docvars => 'compare-with=cmp-zero datatype=double instr-class=float isa=A64 mnemonic=FCMPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatcmp page=FCMPE_float cclass=FCMPE_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|COMPARISON', }; ENCODING FCSEL_H_floatsel => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b11 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FCSEL', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatsel page=FCSEL_float cclass=FCSEL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|SELECTION|CONDITIONALLY', }; ENCODING FCSEL_S_floatsel => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b11 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FCSEL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatsel page=FCSEL_float cclass=FCSEL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|SELECTION|CONDITIONALLY', }; ENCODING FCSEL_D_floatsel => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx cond:u=0bxxxx ig3=0b11 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FCSEL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatsel page=FCSEL_float cclass=FCSEL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|SELECTION|CONDITIONALLY', }; ENCODING FCVT_SH_floatdp1 => { name => 'Half-precision to single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0001 opc:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11 && opc == 0b00', docvars => 'convert-type=half-to-single instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVT_DH_floatdp1 => { name => 'Half-precision to double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0001 opc:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11 && opc == 0b01', docvars => 'convert-type=half-to-double instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVT_HS_floatdp1 => { name => 'Single-precision to half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0001 opc:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00 && opc == 0b11', docvars => 'convert-type=single-to-half instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVT_DS_floatdp1 => { name => 'Single-precision to double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0001 opc:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00 && opc == 0b01', docvars => 'convert-type=single-to-double instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVT_HD_floatdp1 => { name => 'Double-precision to half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0001 opc:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01 && opc == 0b11', docvars => 'convert-type=double-to-half instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVT_SD_floatdp1 => { name => 'Double-precision to single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0001 opc:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01 && opc == 0b00', docvars => 'convert-type=double-to-single instr-class=float isa=A64 mnemonic=FCVT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FCVT_float cclass=FCVT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION', }; ENCODING FCVTAS_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size=0b0 ig2=0b111100 opcode=0b11100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTAS_advsimd cclass=FCVTAS_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTAS_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTAS_advsimd cclass=FCVTAS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTAS_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b0 ig2=0b111100 opcode=0b11100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTAS_advsimd cclass=FCVTAS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTAS_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTAS_advsimd cclass=FCVTAS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTAS_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAS_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAS_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAS_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAS_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b100 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTAS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAS_float cclass=FCVTAS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTAU_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size=0b0 ig2=0b111100 opcode=0b11100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTAU_advsimd cclass=FCVTAU_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTAU_advsimd cclass=FCVTAU_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b0 ig2=0b111100 opcode=0b11100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTAU_advsimd cclass=FCVTAU_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTAU_advsimd cclass=FCVTAU_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTAU_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b101 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTAU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTAU_float cclass=FCVTAU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTL_asimdmisc_L => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b10111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTL_advsimd cclass=FCVTL_asimdmisc_L', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION', }; ENCODING FCVTMS_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTMS_advsimd cclass=FCVTMS_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTMS_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTMS_advsimd cclass=FCVTMS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTMS_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTMS_advsimd cclass=FCVTMS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTMS_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTMS_advsimd cclass=FCVTMS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTMS_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMS_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMS_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMS_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMS_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b10 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTMS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMS_float cclass=FCVTMS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTMU_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTMU_advsimd cclass=FCVTMU_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTMU_advsimd cclass=FCVTMU_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTMU_advsimd cclass=FCVTMU_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTMU_advsimd cclass=FCVTMU_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTMU_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b10 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTMU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTMU_float cclass=FCVTMU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTN_asimdmisc_N => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b10110 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTN_advsimd cclass=FCVTN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION', }; ENCODING FCVTNS_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTNS_advsimd cclass=FCVTNS_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTNS_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTNS_advsimd cclass=FCVTNS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTNS_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTNS_advsimd cclass=FCVTNS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTNS_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTNS_advsimd cclass=FCVTNS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTNS_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNS_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNS_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNS_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNS_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTNS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNS_float cclass=FCVTNS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTNU_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTNU_advsimd cclass=FCVTNU_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTNU_advsimd cclass=FCVTNU_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTNU_advsimd cclass=FCVTNU_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTNU_advsimd cclass=FCVTNU_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTNU_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTNU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTNU_float cclass=FCVTNU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPS_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTPS_advsimd cclass=FCVTPS_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTPS_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTPS_advsimd cclass=FCVTPS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTPS_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTPS_advsimd cclass=FCVTPS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTPS_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTPS_advsimd cclass=FCVTPS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTPS_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPS_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPS_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPS_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPS_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b01 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPS_float cclass=FCVTPS_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTPU_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTPU_advsimd cclass=FCVTPU_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTPU_advsimd cclass=FCVTPU_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTPU_advsimd cclass=FCVTPU_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTPU_advsimd cclass=FCVTPU_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTPU_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b01 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTPU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTPU_float cclass=FCVTPU_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTXN_asisdmisc_N => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b10110 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=FCVTXN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTXN_advsimd cclass=FCVTXN_asisdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION', }; ENCODING FCVTXN_asimdmisc_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b10110 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTXN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTXN_advsimd cclass=FCVTXN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION', }; ENCODING FCVTZS_asisdshf_C => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11111 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=FCVTZS_advsimd_fix cclass=FCVTZS_asisdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_asimdshf_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11111 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=FCVTZS_advsimd_fix cclass=FCVTZS_asimdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTZS_advsimd_int cclass=FCVTZS_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTZS_advsimd_int cclass=FCVTZS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTZS_advsimd_int cclass=FCVTZS_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTZS_advsimd_int cclass=FCVTZS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING FCVTZS_32H_float2fix => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64H_float2fix => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_32S_float2fix => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64S_float2fix => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_32D_float2fix => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64D_float2fix => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b11 opcode:u=0b000 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZS_float_fix cclass=FCVTZS_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZS_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b11 opcode:u=0b000 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZS_float_int cclass=FCVTZS_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FCVTZU_asisdshf_C => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11111 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=FCVTZU_advsimd_fix cclass=FCVTZU_asisdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_asimdshf_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11111 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=FCVTZU_advsimd_fix cclass=FCVTZU_asimdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FCVTZU_advsimd_int cclass=FCVTZU_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FCVTZU_advsimd_int cclass=FCVTZU_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FCVTZU_advsimd_int cclass=FCVTZU_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1101 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FCVTZU_advsimd_int cclass=FCVTZU_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32H_float2fix => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64H_float2fix => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32S_float2fix => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64S_float2fix => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32D_float2fix => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-fix32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64D_float2fix => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b11 opcode:u=0b001 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-fix64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=FCVTZU_float_fix cclass=FCVTZU_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64S_float2int => { name => 'Single-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=single-to-64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FCVTZU_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b11 opcode:u=0b001 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FCVTZU', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FCVTZU_float_int cclass=FCVTZU_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING FDIV_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FDIV reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FDIV_advsimd cclass=FDIV_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FDIV_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FDIV reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FDIV_advsimd cclass=FDIV_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FDIV_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx opcode=0b0001 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FDIV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FDIV_float cclass=FDIV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FDIV_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx opcode=0b0001 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FDIV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FDIV_float cclass=FDIV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FDIV_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx opcode=0b0001 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FDIV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FDIV_float cclass=FDIV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FJCVTZS_32D_float2int => { name => 'Double-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b11 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'convert-type=double-to-32 instr-class=float isa=A64 mnemonic=FJCVTZS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FJCVTZS cclass=FJCVTZS_32D_float2int', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=W N=W V=W Z=W', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING FMADD_H_floatdp3 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b11 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMADD', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMADD_float cclass=FMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMADD_S_floatdp3 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b00 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMADD_float cclass=FMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMADD_D_floatdp3 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b01 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMADD_float cclass=FMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMAX_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b110 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMAX reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMAX_advsimd cclass=FMAX_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAX_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAX reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMAX_advsimd cclass=FMAX_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAX_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b00 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMAX', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAX_float cclass=FMAX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAX_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b00 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMAX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAX_float cclass=FMAX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAX_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b00 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMAX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAX_float cclass=FMAX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAXNM_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 Op3=0b000 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXNM reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMAXNM_advsimd cclass=FMAXNM_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNM_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXNM reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMAXNM_advsimd cclass=FMAXNM_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNM_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b10 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMAXNM', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAXNM_float cclass=FMAXNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAXNM_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b10 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMAXNM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAXNM_float cclass=FMAXNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAXNM_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b10 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMAXNM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMAXNM_float cclass=FMAXNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMAXNMP_asisdpair_only_H => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 o1:u=0b0 sz:u=0b0 ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXNMP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMAXNMP_advsimd_pair cclass=FMAXNMP_asisdpair_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNMP_asisdpair_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 o1:u=0b0 sz:u=0bx ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXNMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMAXNMP_advsimd_pair cclass=FMAXNMP_asisdpair_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNMP_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 Op3=0b000 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXNMP reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMAXNMP_advsimd_vec cclass=FMAXNMP_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNMP_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXNMP reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMAXNMP_advsimd_vec cclass=FMAXNMP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNMV_asimdall_only_H => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 o1:u=0b0 ig2=0b0 ig3=0b11000 opcode=0b01100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXNMV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMAXNMV_advsimd cclass=FMAXNMV_asimdall_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXNMV_asimdall_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXNMV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMAXNMV_advsimd cclass=FMAXNMV_asimdall_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXP_asisdpair_only_H => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 o1:u=0b0 sz:u=0b0 ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMAXP_advsimd_pair cclass=FMAXP_asisdpair_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXP_asisdpair_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 o1:u=0b0 sz:u=0bx ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMAXP_advsimd_pair cclass=FMAXP_asisdpair_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXP_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b110 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXP reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMAXP_advsimd_vec cclass=FMAXP_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXP_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXP reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMAXP_advsimd_vec cclass=FMAXP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXV_asimdall_only_H => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 o1:u=0b0 ig2=0b0 ig3=0b11000 opcode=0b01111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMAXV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMAXV_advsimd cclass=FMAXV_asimdall_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMAXV_asimdall_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 o1:u=0b0 sz:u=0bx ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMAXV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMAXV_advsimd cclass=FMAXV_asimdall_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMIN_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b110 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMIN reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMIN_advsimd cclass=FMIN_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMIN_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMIN reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMIN_advsimd cclass=FMIN_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMIN_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b01 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMIN', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMIN_float cclass=FMIN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMIN_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b01 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMIN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMIN_float cclass=FMIN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMIN_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b01 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMIN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMIN_float cclass=FMIN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMINNM_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 Op3=0b000 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMINNM reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMINNM_advsimd cclass=FMINNM_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNM_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINNM reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMINNM_advsimd cclass=FMINNM_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNM_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b11 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMINNM', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMINNM_float cclass=FMINNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMINNM_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b11 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMINNM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMINNM_float cclass=FMINNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMINNM_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b11 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMINNM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMINNM_float cclass=FMINNM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH|MIN_MAX', }; ENCODING FMINNMP_asisdpair_only_H => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 o1:u=0b1 sz:u=0b0 ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMINNMP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMINNMP_advsimd_pair cclass=FMINNMP_asisdpair_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNMP_asisdpair_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 o1:u=0b1 sz:u=0bx ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINNMP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMINNMP_advsimd_pair cclass=FMINNMP_asisdpair_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNMP_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 Op3=0b000 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMINNMP reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMINNMP_advsimd_vec cclass=FMINNMP_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNMP_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINNMP reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMINNMP_advsimd_vec cclass=FMINNMP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNMV_asimdall_only_H => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 o1:u=0b1 ig2=0b0 ig3=0b11000 opcode=0b01100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMINNMV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMINNMV_advsimd cclass=FMINNMV_asimdall_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINNMV_asimdall_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b11000 opcode=0b01100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINNMV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMINNMV_advsimd cclass=FMINNMV_asimdall_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINP_asisdpair_only_H => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 o1:u=0b1 sz:u=0b0 ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMINP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMINP_advsimd_pair cclass=FMINP_asisdpair_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINP_asisdpair_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 o1:u=0b1 sz:u=0bx ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdpair page=FMINP_advsimd_pair cclass=FMINP_asisdpair_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINP_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b110 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMINP reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMINP_advsimd_vec cclass=FMINP_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINP_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINP reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMINP_advsimd_vec cclass=FMINP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINV_asimdall_only_H => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 o1:u=0b1 ig2=0b0 ig3=0b11000 opcode=0b01111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=half instr-class=advsimd isa=A64 mnemonic=FMINV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMINV_advsimd cclass=FMINV_asimdall_only_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMINV_asimdall_only_SD => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 o1:u=0b1 sz:u=0bx ig2=0b11000 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMINV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=FMINV_advsimd cclass=FMINV_asimdall_only_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX', }; ENCODING FMLA_asisdelem_RH_H => { name => 'Scalar, half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b01 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=2reg-scalar-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMLA_advsimd_elt cclass=FMLA_asisdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLA_asisdelem_R_SD => { name => 'Scalar, single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx ig3=0b0 o2:u=0b0 ig4=0b01 H:u=0bx ig5=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=2reg-scalar-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMLA_advsimd_elt cclass=FMLA_asisdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLA_asimdelem_RH_H => { name => 'Vector, half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b01 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=half instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=2reg-element-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLA_advsimd_elt cclass=FMLA_asimdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLA_asimdelem_R_SD => { name => 'Vector, single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx ig3=0b0 o2:u=0b0 ig4=0b01 H:u=0bx ig5=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=2reg-element-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLA_advsimd_elt cclass=FMLA_asimdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLA_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a:u=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b001 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMLA_advsimd_vec cclass=FMLA_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLA_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 op:u=0b0 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLA reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLA_advsimd_vec cclass=FMLA_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLAL_asimdelem_LH => { name => 'FMLAL', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size[1]=0b1 sz:u=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode[3]=0b0 S:u=0b0 opcode[1:0]=0b00 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLAL_advsimd_elt cclass=FMLAL_asimdelem_LH', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLAL2_asimdelem_LH => { name => 'FMLAL2', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size[1]=0b1 sz:u=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode[3]=0b1 S:u=0b0 opcode[1:0]=0b00 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FMLAL2', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLAL_advsimd_elt cclass=FMLAL2_asimdelem_LH', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLAL_asimdsame_F => { name => 'FMLAL', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 S:u=0b0 sz:u=0b0 ig2=0b1 Rm:u=0bxxxxx opcode[4]=0b1 opcode[3:0]=0b1101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLAL_advsimd_vec cclass=FMLAL_asimdsame_F', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLAL2_asimdsame_F => { name => 'FMLAL2', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 S:u=0b0 sz:u=0b0 ig2=0b1 Rm:u=0bxxxxx opcode[4]=0b1 opcode[3:0]=0b1001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FMLAL2', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLAL_advsimd_vec cclass=FMLAL2_asimdsame_F', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asisdelem_RH_H => { name => 'Scalar, half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b01 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=2reg-scalar-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMLS_advsimd_elt cclass=FMLS_asisdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asisdelem_R_SD => { name => 'Scalar, single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx ig3=0b0 o2:u=0b1 ig4=0b01 H:u=0bx ig5=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=2reg-scalar-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMLS_advsimd_elt cclass=FMLS_asisdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asimdelem_RH_H => { name => 'Vector, half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b01 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=half instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=2reg-element-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLS_advsimd_elt cclass=FMLS_asimdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asimdelem_R_SD => { name => 'Vector, single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx ig3=0b0 o2:u=0b1 ig4=0b01 H:u=0bx ig5=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=2reg-element-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLS_advsimd_elt cclass=FMLS_asimdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a:u=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b001 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMLS_advsimd_vec cclass=FMLS_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLS_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 op:u=0b1 sz:u=0bx ig2=0b1 Rm:u=0bxxxxx opcode=0b11001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMLS reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLS_advsimd_vec cclass=FMLS_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLSL_asimdelem_LH => { name => 'FMLSL', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size[1]=0b1 sz:u=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode[3]=0b0 S:u=0b1 opcode[1:0]=0b00 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLSL_advsimd_elt cclass=FMLSL_asimdelem_LH', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLSL2_asimdelem_LH => { name => 'FMLSL2', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size[1]=0b1 sz:u=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode[3]=0b1 S:u=0b1 opcode[1:0]=0b00 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=FMLSL2', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMLSL_advsimd_elt cclass=FMLSL2_asimdelem_LH', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLSL_asimdsame_F => { name => 'FMLSL', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 S:u=0b1 sz:u=0b0 ig2=0b1 Rm:u=0bxxxxx opcode[4]=0b1 opcode[3:0]=0b1101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLSL_advsimd_vec cclass=FMLSL_asimdsame_F', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMLSL2_asimdsame_F => { name => 'FMLSL2', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 S:u=0b1 sz:u=0b0 ig2=0b1 Rm:u=0bxxxxx opcode[4]=0b1 opcode[3:0]=0b1001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=FMLSL2', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMLSL_advsimd_vec cclass=FMLSL2_asimdsame_F', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|FUSED_OP', }; ENCODING FMOV_asimdimm_H_h => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx op=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode=0b1111 o2=0b1 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', docvars => 'asimdimm-datatype=per-half instr-class=advsimd isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=FMOV_advsimd cclass=FMOV_asimdimm_H_h', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING FMOV_asimdimm_S_s => { name => 'Single-precision', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b1111 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'op == 0b0', docvars => 'asimdimm-datatype=per-single datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=FMOV_advsimd cclass=single_and_double', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING FMOV_asimdimm_D2_d => { name => 'Double-precision', diagram => 'ig0=0b0 Q:u=0b1 op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b1111 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b1 && op == 0b1', docvars => 'asimdimm-datatype=per-double datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=FMOV_advsimd cclass=single_and_double', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING FMOV_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0000 opc:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FMOV_float cclass=FMOV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0000 opc:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FMOV_float cclass=FMOV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0000 opc:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FMOV_float cclass=FMOV_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_32H_float2int => { name => 'Half-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11 && rmode == 0b00 && opcode == 0b110', docvars => 'convert-type=half-to-32 instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_64H_float2int => { name => 'Half-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11 && rmode == 0b00 && opcode == 0b110', docvars => 'convert-type=half-to-64 instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_H32_float2int => { name => '32-bit to half-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b111 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11 && rmode == 0b00 && opcode == 0b111', docvars => 'convert-type=32-to-half instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_S32_float2int => { name => '32-bit to single-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b111 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00 && rmode == 0b00 && opcode == 0b111', docvars => 'convert-type=32-to-single instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_32S_float2int => { name => 'Single-precision to 32-bit', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00 && rmode == 0b00 && opcode == 0b110', docvars => 'convert-type=single-to-32 instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_H64_float2int => { name => '64-bit to half-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b111 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11 && rmode == 0b00 && opcode == 0b111', docvars => 'convert-type=64-to-half instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_D64_float2int => { name => '64-bit to double-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b111 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01 && rmode == 0b00 && opcode == 0b111', docvars => 'convert-type=64-to-double instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_V64I_float2int => { name => '64-bit to top half of 128-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b10 ig2=0b1 rmode:u=0b01 opcode:u=0b111 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b10 && rmode == 0b01 && opcode == 0b111', docvars => 'convert-type=64-to-quadhi instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_64D_float2int => { name => 'Double-precision to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01 && rmode == 0b00 && opcode == 0b110', docvars => 'convert-type=double-to-64 instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_64VX_float2int => { name => 'Top half of 128-bit to 64-bit', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b10 ig2=0b1 rmode:u=0b01 opcode:u=0b110 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b10 && rmode == 0b01 && opcode == 0b110', docvars => 'convert-type=quadhi-to-64 instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v3 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=FMOV_float_gen cclass=FMOV_float_gen_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', pstate => 'C=U N=U V=U Z=U', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_H_floatimm => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 imm8:u=0bxxxxxxxx ig3=0b100 imm5=0b00000 Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half immediate-type=imm8f instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatimm page=FMOV_float_imm cclass=imm8f', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_S_floatimm => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 imm8:u=0bxxxxxxxx ig3=0b100 imm5=0b00000 Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single immediate-type=imm8f instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatimm page=FMOV_float_imm cclass=imm8f', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMOV_D_floatimm => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 imm8:u=0bxxxxxxxx ig3=0b100 imm5=0b00000 Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double immediate-type=imm8f instr-class=float isa=A64 mnemonic=FMOV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatimm page=FMOV_float_imm cclass=imm8f', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|DATA_TRANSFER', }; ENCODING FMSUB_H_floatdp3 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b11 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMSUB', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMSUB_float cclass=FMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMSUB_S_floatdp3 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b00 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMSUB_float cclass=FMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMSUB_D_floatdp3 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b01 o1:u=0b0 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FMSUB_float cclass=FMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FMUL_asisdelem_RH_H => { name => 'Scalar, half-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=2reg-scalar-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMUL_advsimd_elt cclass=FMUL_asisdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_asisdelem_R_SD => { name => 'Scalar, single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=2reg-scalar-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMUL_advsimd_elt cclass=FMUL_asisdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_asimdelem_RH_H => { name => 'Vector, half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=half instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=2reg-element-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMUL_advsimd_elt cclass=FMUL_asimdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_asimdelem_R_SD => { name => 'Vector, single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=2reg-element-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMUL_advsimd_elt cclass=FMUL_asimdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMUL_advsimd_vec cclass=FMUL_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMUL reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMUL_advsimd_vec cclass=FMUL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMUL_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx op:u=0b0 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FMUL', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMUL_float cclass=FMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FMUL_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx op:u=0b0 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FMUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMUL_float cclass=FMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FMUL_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx op:u=0b0 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FMUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FMUL_float cclass=FMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FMULX_asisdelem_RH_H => { name => 'Scalar, half-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=2reg-scalar-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMULX_advsimd_elt cclass=FMULX_asisdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asisdelem_R_SD => { name => 'Scalar, single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-reguse=2reg-scalar advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=2reg-scalar-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=FMULX_advsimd_elt cclass=FMULX_asisdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asimdelem_RH_H => { name => 'Vector, half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 size=0b00 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=half instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=2reg-element-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMULX_advsimd_elt cclass=FMULX_asimdelem_RH_H', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asimdelem_R_SD => { name => 'Vector, single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 ig2=0b1 sz:u=0bx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1001 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=2reg-element-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=FMULX_advsimd_elt cclass=FMULX_asimdelem_R_SD', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FMULX', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FMULX_advsimd_vec cclass=FMULX_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMULX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FMULX_advsimd_vec cclass=FMULX_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FMULX_advsimd_vec cclass=FMULX_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FMULX_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FMULX reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FMULX_advsimd_vec cclass=FMULX_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FNEG_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b01111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FNEG', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FNEG_advsimd cclass=FNEG_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING FNEG_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b01111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FNEG', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FNEG_advsimd cclass=FNEG_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING FNEG_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0000 opc:u=0b10 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FNEG', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FNEG_float cclass=FNEG_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|BITWISE', }; ENCODING FNEG_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0000 opc:u=0b10 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FNEG', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FNEG_float cclass=FNEG_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|BITWISE', }; ENCODING FNEG_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0000 opc:u=0b10 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FNEG', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FNEG_float cclass=FNEG_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'FLOAT|BITWISE', }; ENCODING FNMADD_H_floatdp3 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b11 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FNMADD', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMADD_float cclass=FNMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMADD_S_floatdp3 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b00 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FNMADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMADD_float cclass=FNMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMADD_D_floatdp3 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b01 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FNMADD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMADD_float cclass=FNMADD_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMSUB_H_floatdp3 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b11 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FNMSUB', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMSUB_float cclass=FNMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMSUB_S_floatdp3 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b00 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FNMSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMSUB_float cclass=FNMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMSUB_D_floatdp3 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11111 ftype:u=0b01 o1:u=0b1 Rm:u=0bxxxxx o0:u=0b1 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FNMSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp3 page=FNMSUB_float cclass=FNMSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMUL_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx op:u=0b1 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FNMUL', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FNMUL_float cclass=FNMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMUL_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx op:u=0b1 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FNMUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FNMUL_float cclass=FNMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FNMUL_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx op:u=0b1 ig3=0b000 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FNMUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FNMUL_float cclass=FNMUL_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|FUSED_OP', }; ENCODING FRECPE_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size=0b1 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FRECPE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FRECPE_advsimd cclass=FRECPE_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPE_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRECPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FRECPE_advsimd cclass=FRECPE_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPE_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRECPE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRECPE_advsimd cclass=FRECPE_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPE_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRECPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRECPE_advsimd cclass=FRECPE_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPS_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FRECPS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FRECPS_advsimd cclass=FRECPS_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPS_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRECPS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FRECPS_advsimd cclass=FRECPS_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPS_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a=0b0 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRECPS reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FRECPS_advsimd cclass=FRECPS_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPS_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRECPS reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FRECPS_advsimd cclass=FRECPS_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPX_asisdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 a=0b1 ig2=0b111100 opcode=0b11111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FRECPX', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FRECPX_advsimd cclass=FRECPX_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRECPX_asisdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRECPX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FRECPX_advsimd cclass=FRECPX_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRINT32X_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 ig4=0b1111 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINT32X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINT32X_advsimd cclass=FRINT32X_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINT32X_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0100 op:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINT32X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT32X_float cclass=FRINT32X_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT32X_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0100 op:u=0b01 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINT32X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT32X_float cclass=FRINT32X_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT32Z_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 ig4=0b1111 op:u=0b0 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINT32Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINT32Z_advsimd cclass=FRINT32Z_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINT32Z_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0100 op:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINT32Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT32Z_float cclass=FRINT32Z_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT32Z_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0100 op:u=0b00 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINT32Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT32Z_float cclass=FRINT32Z_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT64X_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 ig4=0b1111 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINT64X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINT64X_advsimd cclass=FRINT64X_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINT64X_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0100 op:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINT64X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT64X_float cclass=FRINT64X_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT64X_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0100 op:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINT64X', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT64X_float cclass=FRINT64X_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT64Z_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 ig4=0b1111 op:u=0b1 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINT64Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINT64Z_advsimd cclass=FRINT64Z_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINT64Z_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0100 op:u=0b10 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINT64Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT64Z_float cclass=FRINT64Z_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINT64Z_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0100 op:u=0b10 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINT64Z', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v5 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINT64Z_float cclass=FRINT64Z_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTA_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTA_advsimd cclass=FRINTA_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTA_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTA_advsimd cclass=FRINTA_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTA_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b100 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTA_float cclass=FRINTA_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTA_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b100 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTA_float cclass=FRINTA_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTA_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b100 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTA_float cclass=FRINTA_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTI_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTI', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTI_advsimd cclass=FRINTI_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTI_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTI', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTI_advsimd cclass=FRINTI_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTI_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b111 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTI', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTI_float cclass=FRINTI_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTI_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b111 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTI', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTI_float cclass=FRINTI_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTI_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b111 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTI', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTI_float cclass=FRINTI_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTM_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTM', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTM_advsimd cclass=FRINTM_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTM_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTM_advsimd cclass=FRINTM_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTM_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b010 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTM', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTM_float cclass=FRINTM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTM_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b010 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTM_float cclass=FRINTM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTM_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b010 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTM', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTM_float cclass=FRINTM_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTN_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTN', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTN_advsimd cclass=FRINTN_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTN_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTN_advsimd cclass=FRINTN_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTN_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b000 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTN', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTN_float cclass=FRINTN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTN_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b000 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTN_float cclass=FRINTN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTN_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b000 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTN_float cclass=FRINTN_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTP_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTP_advsimd cclass=FRINTP_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTP_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTP_advsimd cclass=FRINTP_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTP_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b001 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTP', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTP_float cclass=FRINTP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTP_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b001 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTP_float cclass=FRINTP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTP_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b001 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTP_float cclass=FRINTP_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTX_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 ig2=0b111100 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTX', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTX_advsimd cclass=FRINTX_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTX_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 o2:u=0b0 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTX', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTX_advsimd cclass=FRINTX_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTX_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b110 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTX', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTX_float cclass=FRINTX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTX_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b110 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTX', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTX_float cclass=FRINTX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTX_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b110 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTX', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTX_float cclass=FRINTX_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTZ_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 ig2=0b111100 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRINTZ', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRINTZ_advsimd cclass=FRINTZ_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTZ_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 o2:u=0b1 sz:u=0bx ig2=0b10000 ig3=0b1100 o1:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRINTZ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRINTZ_advsimd cclass=FRINTZ_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ROUNDING', }; ENCODING FRINTZ_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b001 rmode:u=0b011 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FRINTZ', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTZ_float cclass=FRINTZ_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTZ_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b001 rmode:u=0b011 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FRINTZ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTZ_float cclass=FRINTZ_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRINTZ_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b001 rmode:u=0b011 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FRINTZ', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FRINTZ_float cclass=FRINTZ_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ROUNDING', }; ENCODING FRSQRTE_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 a=0b1 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FRSQRTE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=FRSQRTE_advsimd cclass=FRSQRTE_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTE_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRSQRTE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=FRSQRTE_advsimd cclass=FRSQRTE_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTE_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRSQRTE', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FRSQRTE_advsimd cclass=FRSQRTE_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTE_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRSQRTE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FRSQRTE_advsimd cclass=FRSQRTE_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTS_asisdsamefp16_only => { name => 'Scalar half precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 a=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=FRSQRTS', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsamefp16 page=FRSQRTS_advsimd cclass=FRSQRTS_asisdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTS_asisdsame_only => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 ig2=0b1 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRSQRTS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=FRSQRTS_advsimd cclass=FRSQRTS_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTS_asimdsamefp16_only => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 a=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FRSQRTS reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FRSQRTS_advsimd cclass=FRSQRTS_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FRSQRTS_asimdsame_only => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11111 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FRSQRTS reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FRSQRTS_advsimd cclass=FRSQRTS_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FSQRT_asimdmiscfp16_R => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 a=0b1 ig2=0b111100 opcode=0b11111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FSQRT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=FSQRT_advsimd cclass=FSQRT_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FSQRT_asimdmisc_R => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11111 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FSQRT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=FSQRT_advsimd cclass=FSQRT_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|MATH', }; ENCODING FSQRT_H_floatdp1 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 ig3=0b0000 opc:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FSQRT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FSQRT_float cclass=FSQRT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FSQRT_S_floatdp1 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 ig3=0b0000 opc:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FSQRT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FSQRT_float cclass=FSQRT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FSQRT_D_floatdp1 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 ig3=0b0000 opc:u=0b11 ig4=0b10000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FSQRT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp1 page=FSQRT_float cclass=FSQRT_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|MATH', }; ENCODING FSUB_asimdsamefp16_only => { name => 'Half-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b1 ig2=0b10 Rm:u=0bxxxxx ig3=0b00 opcode=0b010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-reguse=3reg-same advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=FSUB reguse-datatype=3reg-same-half', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsamefp16 page=FSUB_advsimd cclass=FSUB_asimdsamefp16_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FSUB_asimdsame_only => { name => 'Single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b1 Rm:u=0bxxxxx opcode=0b11010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-reguse=3reg-same advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=FSUB reguse-datatype=3reg-same-single-and-double', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=FSUB_advsimd cclass=FSUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING FSUB_H_floatdp2 => { name => 'Half-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b11', docvars => 'datatype=half instr-class=float isa=A64 mnemonic=FSUB', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FSUB_float cclass=FSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FSUB_S_floatdp2 => { name => 'Single-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b00', docvars => 'datatype=single instr-class=float isa=A64 mnemonic=FSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FSUB_float cclass=FSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING FSUB_D_floatdp2 => { name => 'Double-precision', diagram => 'M=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 Rm:u=0bxxxxx ig3=0b001 op:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'ftype == 0b01', docvars => 'datatype=double instr-class=float isa=A64 mnemonic=FSUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=floatdp2 page=FSUB_float cclass=FSUB_float_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|ARITHMETIC', }; ENCODING INS_asimdins_IV_v => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q=0b1 op=0b1 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4:u=0bxxxx ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=INS vector-xfer-type=vector-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=INS_advsimd_elt cclass=INS_advsimd_elt_INS_asimdins_IV_v', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|INSERTION', }; ENCODING INS_asimdins_IR_r => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q=0b1 op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=INS vector-xfer-type=vector-from-general', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=INS_advsimd_gen cclass=INS_advsimd_gen_INS_asimdins_IR_r', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|INSERTION', }; ENCODING LD1_asisdlse_R1_1v => { name => 'One register', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0111', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 ldstruct-regcount=to-1reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlse_R2_2v => { name => 'Two registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b1010', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 ldstruct-regcount=to-2reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlse_R3_3v => { name => 'Three registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0110', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 ldstruct-regcount=to-3reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlse_R4_4v => { name => 'Four registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0010', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 ldstruct-regcount=to-4reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_I1_i1 => { name => 'One register, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-1reg ldstruct-regcount=to-1reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_R1_r1 => { name => 'One register, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-1reg ldstruct-regcount=to-1reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_I2_i2 => { name => 'Two registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b1010', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-2reg ldstruct-regcount=to-2reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_R2_r2 => { name => 'Two registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b1010', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-2reg ldstruct-regcount=to-2reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_I3_i3 => { name => 'Three registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0110', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-3reg ldstruct-regcount=to-3reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_R3_r3 => { name => 'Three registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0110', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-3reg ldstruct-regcount=to-3reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_I4_i4 => { name => 'Four registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0010', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-4reg ldstruct-regcount=to-4reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsep_R4_r4 => { name => 'Four registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0010', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-4reg ldstruct-regcount=to-4reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD1_advsimd_mult cclass=LD1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlso_B1_1b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b000', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlso_H1_1h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b010 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlso_S1_1s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlso_D1_1d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_B1_i1b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_BX1_r1b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_H1_i1h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_HX1_r1h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_S1_i1s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_SX1_r1s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_D1_i1d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1_asisdlsop_DX1_r1d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=LD1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1_advsimd_sngl cclass=LD1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1R_asisdlso_R1 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-org=to-all-lanes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD1R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD1R_advsimd cclass=LD1R_asisdlso_R1', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1R_asisdlsop_R1_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-imm mnemonic=LD1R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1R_advsimd cclass=LD1R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD1R_asisdlsop_RX1_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-reg mnemonic=LD1R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD1R_advsimd cclass=LD1R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlse_R2 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD2_advsimd_mult cclass=LD2_asisdlse_R2', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsep_I2_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-2reg ldstruct-regcount=to-2reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD2_advsimd_mult cclass=LD2_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsep_R2_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-2reg ldstruct-regcount=to-2reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD2_advsimd_mult cclass=LD2_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlso_B2_2b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b000', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlso_H2_2h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b010 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlso_S2_2s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlso_D2_2d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_B2_i2b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_BX2_r2b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_H2_i2h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_HX2_r2h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_S2_i2s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_SX2_r2s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_D2_i2d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2_asisdlsop_DX2_r2d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=LD2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2_advsimd_sngl cclass=LD2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2R_asisdlso_R2 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-org=to-all-lanes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD2R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD2R_advsimd cclass=LD2R_asisdlso_R2', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2R_asisdlsop_R2_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-imm mnemonic=LD2R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2R_advsimd cclass=LD2R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD2R_asisdlsop_RX2_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b110 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-reg mnemonic=LD2R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD2R_advsimd cclass=LD2R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlse_R3 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD3_advsimd_mult cclass=LD3_asisdlse_R3', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsep_I3_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-3reg ldstruct-regcount=to-3reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD3_advsimd_mult cclass=LD3_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsep_R3_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-3reg ldstruct-regcount=to-3reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD3_advsimd_mult cclass=LD3_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlso_B3_3b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b001', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlso_H3_3h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b011 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlso_S3_3s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlso_D3_3d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_B3_i3b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_BX3_r3b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_H3_i3h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_HX3_r3h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_S3_i3s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_SX3_r3s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_D3_i3d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3_asisdlsop_DX3_r3d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=LD3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3_advsimd_sngl cclass=LD3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3R_asisdlso_R3 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b0 ig2=0b00000 opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-org=to-all-lanes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD3R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD3R_advsimd cclass=LD3R_asisdlso_R3', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3R_asisdlsop_R3_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0b11111 opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-imm mnemonic=LD3R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3R_advsimd cclass=LD3R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD3R_asisdlsop_RX3_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-reg mnemonic=LD3R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD3R_advsimd cclass=LD3R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlse_R4 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b1 ig2=0b000000 opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=LD4_advsimd_mult cclass=LD4_asisdlse_R4', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsep_I4_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0b11111 opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-imm-to-4reg ldstruct-regcount=to-4reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD4_advsimd_mult cclass=LD4_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsep_R4_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b1 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-multiple-labels=post-index-reg-to-4reg ldstruct-regcount=to-4reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=LD4_advsimd_mult cclass=LD4_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlso_B4_4b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b001', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlso_H4_4h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b011 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlso_S4_4s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlso_D4_4d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_B4_i4b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_BX4_r4b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_H4_i4h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_HX4_r4h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_S4_i4s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_SX4_r4s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_D4_i4d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4_asisdlsop_DX4_r4d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=LD4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4_advsimd_sngl cclass=LD4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4R_asisdlso_R4 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b1 R:u=0b1 ig2=0b00000 opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-org=to-all-lanes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=LD4R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=LD4R_advsimd cclass=LD4R_asisdlso_R4', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4R_asisdlsop_R4_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0b11111 opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-imm mnemonic=LD4R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4R_advsimd cclass=LD4R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LD4R_asisdlsop_RX4_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b1 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b111 S:u=0b0 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-org=to-all-lanes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=to-all-lanes-post-index-reg mnemonic=LD4R', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=LD4R_advsimd cclass=LD4R_advsimd_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDNP_S_ldstnapair_offs => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b000 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-words atomic-ops=LDNP-pair-words instr-class=fpsimd isa=A64 mnemonic=LDNP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=LDNP_fpsimd cclass=LDNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|LOAD', }; ENCODING LDNP_D_ldstnapair_offs => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b000 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-doublewords atomic-ops=LDNP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=LDNP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=LDNP_fpsimd cclass=LDNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|LOAD', }; ENCODING LDNP_Q_ldstnapair_offs => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b000 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-quadwords atomic-ops=LDNP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=LDNP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=LDNP_fpsimd cclass=LDNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|LOAD', }; ENCODING LDP_S_ldstpair_post => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b001 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-words atomic-ops=LDP-pair-words instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=LDP_fpsimd cclass=LDP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_D_ldstpair_post => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b001 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-doublewords atomic-ops=LDP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=LDP_fpsimd cclass=LDP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_Q_ldstpair_post => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b001 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-quadwords atomic-ops=LDP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=LDP_fpsimd cclass=LDP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_S_ldstpair_pre => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b011 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-words atomic-ops=LDP-pair-words instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=LDP_fpsimd cclass=LDP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_D_ldstpair_pre => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b011 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-doublewords atomic-ops=LDP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=LDP_fpsimd cclass=LDP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_Q_ldstpair_pre => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b011 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-quadwords atomic-ops=LDP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=LDP_fpsimd cclass=LDP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_S_ldstpair_off => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b010 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-words atomic-ops=LDP-pair-words instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=LDP_fpsimd cclass=LDP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_D_ldstpair_off => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b010 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-doublewords atomic-ops=LDP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=LDP_fpsimd cclass=LDP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDP_Q_ldstpair_off => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b010 L:u=0b1 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-quadwords atomic-ops=LDP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=LDP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=LDP_fpsimd cclass=LDP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_B_ldst_immpost => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-8-fsreg atomic-ops=LDR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_H_ldst_immpost => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-16-fsreg atomic-ops=LDR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_S_ldst_immpost => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-32-fsreg atomic-ops=LDR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_D_ldst_immpost => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-64-fsreg atomic-ops=LDR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_Q_ldst_immpost => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b11 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b11', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-128-fsreg atomic-ops=LDR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_B_ldst_immpre => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-8-fsreg atomic-ops=LDR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_H_ldst_immpre => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-16-fsreg atomic-ops=LDR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_S_ldst_immpre => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-32-fsreg atomic-ops=LDR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_D_ldst_immpre => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-64-fsreg atomic-ops=LDR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_Q_ldst_immpre => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b11 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b11', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-128-fsreg atomic-ops=LDR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_B_ldst_pos => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b01 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b01', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-8-fsreg atomic-ops=LDR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off12u_s reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_H_ldst_pos => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b01 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b01', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-16-fsreg atomic-ops=LDR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off12u_s reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_S_ldst_pos => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b01 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b01', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-32-fsreg atomic-ops=LDR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off12u_s reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_D_ldst_pos => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b01 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b01', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-64-fsreg atomic-ops=LDR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off12u_s reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_Q_ldst_pos => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b11 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b11', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-128-fsreg atomic-ops=LDR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off12u_s reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=LDR_imm_fpsimd cclass=LDR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_S_loadlit => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b011 V=0b1 ig1=0b00 imm19:u=0bxxxxxxxxxxxxxxxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=literal address-form-reg-type=literal-32-fsreg atomic-ops=LDR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off19s reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=loadlit page=LDR_lit_fpsimd cclass=LDR_lit_fpsimd_literal', exceptions => 'ADVSIMDFPACCESSTRAP|ALIGNMENT|DATAABORT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|MISC|LOAD', }; ENCODING LDR_D_loadlit => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b011 V=0b1 ig1=0b00 imm19:u=0bxxxxxxxxxxxxxxxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=literal address-form-reg-type=literal-64-fsreg atomic-ops=LDR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off19s reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=loadlit page=LDR_lit_fpsimd cclass=LDR_lit_fpsimd_literal', exceptions => 'ADVSIMDFPACCESSTRAP|ALIGNMENT|DATAABORT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|MISC|LOAD', }; ENCODING LDR_Q_loadlit => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b011 V=0b1 ig1=0b00 imm19:u=0bxxxxxxxxxxxxxxxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=literal address-form-reg-type=literal-128-fsreg atomic-ops=LDR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off19s reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=loadlit page=LDR_lit_fpsimd cclass=LDR_lit_fpsimd_literal', exceptions => 'ADVSIMDFPACCESSTRAP|ALIGNMENT|DATAABORT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|MISC|LOAD', }; ENCODING LDR_B_ldst_regoff => { name => '8-fsreg,LDR-8-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'option!=0b011', bitdiffs => 'size == 0b00 && opc == 0b01 && option != 0b011', docvars => 'atomic-ops=LDR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=8-fsreg reg-type-and-use=8-fsreg-ext-reg reguse=ext-reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_BL_ldst_regoff => { name => '8-fsreg,LDR-8-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b1 Rm:u=0bxxxxx option:u=0b011 S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b01 && option == 0b011', docvars => 'atomic-ops=LDR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=8-fsreg reg-type-and-use=8-fsreg-shifted-reg reguse=shifted-reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_H_ldst_regoff => { name => '16-fsreg,LDR-16-fsreg', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b01', docvars => 'atomic-ops=LDR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_S_ldst_regoff => { name => '32-fsreg,LDR-32-fsreg', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b01', docvars => 'atomic-ops=LDR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_D_ldst_regoff => { name => '64-fsreg,LDR-64-fsreg', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b01', docvars => 'atomic-ops=LDR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDR_Q_ldst_regoff => { name => '128-fsreg,LDR-128-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b11 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b11', docvars => 'atomic-ops=LDR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDR offset-type=off-reg reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=LDR_reg_fpsimd cclass=LDR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDUR_B_ldst_unscaled => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b01', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-8-fsreg atomic-ops=LDUR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=LDUR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=LDUR_fpsimd cclass=LDUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDUR_H_ldst_unscaled => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b01', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-16-fsreg atomic-ops=LDUR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=LDUR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=LDUR_fpsimd cclass=LDUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDUR_S_ldst_unscaled => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b01', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-32-fsreg atomic-ops=LDUR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=LDUR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=LDUR_fpsimd cclass=LDUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDUR_D_ldst_unscaled => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b01 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b01', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-64-fsreg atomic-ops=LDUR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=LDUR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=LDUR_fpsimd cclass=LDUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING LDUR_Q_ldst_unscaled => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b11 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b11', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-128-fsreg atomic-ops=LDUR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=LDUR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=LDUR_fpsimd cclass=LDUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|LOAD', }; ENCODING MLA_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b00 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=MLA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=MLA_advsimd_elt cclass=MLA_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC', }; ENCODING MLA_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10010 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=MLA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=MLA_advsimd_vec cclass=MLA_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC', }; ENCODING MLS_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b00 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=MLS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=MLS_advsimd_elt cclass=MLS_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC', }; ENCODING MLS_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10010 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=MLS', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=MLS_advsimd_vec cclass=MLS_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC', }; ENCODING MOVI_asimdimm_N_b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b1110 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'op == 0b0 && cmode == 0b1110', docvars => 'asimdimm-datatype=per-byte asimdimm-immtype=immediate asimdimm-mask=no-byte-mask asimdimm-type=per-byte-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MOVI_asimdimm_L_hl => { name => '16-bit shifted immediate', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b10x0 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'op == 0b0 && cmode == 0b10x0', docvars => 'asimdimm-datatype=per-halfword asimdimm-immtype=shifted-immediate asimdimm-mask=no-byte-mask asimdimm-type=per-halfword-shifted-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MOVI_asimdimm_L_sl => { name => '32-bit shifted immediate', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b0xx0 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'op == 0b0 && cmode == 0b0xx0', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=shifted-immediate asimdimm-mask=no-byte-mask asimdimm-type=per-word-shifted-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MOVI_asimdimm_M_sm => { name => '32-bit shifting ones', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b110x o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'op == 0b0 && cmode == 0b110x', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=masked-immediate asimdimm-mask=no-byte-mask asimdimm-type=per-word-masked-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MOVI_asimdimm_D_ds => { name => '64-bit scalar', diagram => 'ig0=0b0 Q:u=0b0 op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b1110 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b0 && op == 0b1 && cmode == 0b1110', docvars => 'asimdimm-datatype=doubleword asimdimm-immtype=immediate asimdimm-mask=byte-mask asimdimm-type=doubleword-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MOVI_asimdimm_D2_d => { name => '64-bit vector', diagram => 'ig0=0b0 Q:u=0b1 op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b1110 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b1 && op == 0b1 && cmode == 0b1110', docvars => 'asimdimm-datatype=per-doubleword asimdimm-immtype=immediate asimdimm-mask=byte-mask asimdimm-type=per-doubleword-immediate instr-class=advsimd isa=A64 mnemonic=MOVI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MOVI_advsimd cclass=MOVI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MUL_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1000 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=MUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=MUL_advsimd_elt cclass=MUL_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING MUL_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=MUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=MUL_advsimd_vec cclass=MUL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING MVNI_asimdimm_L_hl => { name => '16-bit shifted immediate', diagram => 'ig0=0b0 Q:u=0bx op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b10x0 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b10x0', docvars => 'asimdimm-datatype=per-halfword asimdimm-immtype=shifted-immediate asimdimm-type=per-halfword-shifted-immediate instr-class=advsimd isa=A64 mnemonic=MVNI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MVNI_advsimd cclass=MVNI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MVNI_asimdimm_L_sl => { name => '32-bit shifted immediate', diagram => 'ig0=0b0 Q:u=0bx op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b0xx0 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b0xx0', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=shifted-immediate asimdimm-type=per-word-shifted-immediate instr-class=advsimd isa=A64 mnemonic=MVNI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MVNI_advsimd cclass=MVNI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING MVNI_asimdimm_M_sm => { name => '32-bit shifting ones', diagram => 'ig0=0b0 Q:u=0bx op:u=0b1 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b110x o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b110x', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=masked-immediate asimdimm-mask=no-byte-mask asimdimm-type=per-word-masked-immediate instr-class=advsimd isa=A64 mnemonic=MVNI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=MVNI_advsimd cclass=MVNI_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', }; ENCODING NEG_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b01011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=NEG', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=NEG_advsimd cclass=NEG_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING NEG_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b01011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=NEG', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=NEG_advsimd cclass=NEG_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING NOT_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size=0b00 ig2=0b10000 opcode=0b00101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=NOT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=NOT_advsimd cclass=NOT_advsimd_NOT_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING ORN_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0b11 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ORN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=ORN_advsimd cclass=ORN_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING ORR_asimdimm_L_hl => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b10x1 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b10x1', docvars => 'asimdimm-datatype=per-halfword asimdimm-immtype=shifted-immediate asimdimm-type=per-halfword-shifted-immediate instr-class=advsimd isa=A64 mnemonic=ORR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=ORR_advsimd_imm cclass=ORR_advsimd_imm_shifted_immediate', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING ORR_asimdimm_L_sl => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx op:u=0b0 ig1=0b0111100000 a:u=0bx b:u=0bx c:u=0bx cmode:u=0b0xx1 o2=0b0 ig2=0b1 d:u=0bx e:u=0bx f:u=0bx g:u=0bx h:u=0bx Rd:u=0bxxxxx', bitdiffs => 'cmode == 0b0xx1', docvars => 'asimdimm-datatype=per-word asimdimm-immtype=shifted-immediate asimdimm-type=per-word-shifted-immediate instr-class=advsimd isa=A64 mnemonic=ORR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdimm page=ORR_advsimd_imm cclass=ORR_advsimd_imm_shifted_immediate', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING ORR_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0b10 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=ORR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=ORR_advsimd_reg cclass=ORR_advsimd_reg_ORR_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING PMUL_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=PMUL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=PMUL_advsimd cclass=PMUL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|POLYNOMIAL', }; ENCODING PMULL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b1110 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=PMULL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=PMULL_advsimd cclass=PMULL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|POLYNOMIAL', }; ENCODING RADDHN_asimddiff_N => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=RADDHN', docvars2 => 'rounding=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=RADDHN_advsimd cclass=RADDHN_asimddiff_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING', }; ENCODING RAX1_VVV2_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b0 ig2=0b00 opcode=0b11 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=RAX1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=RAX1_advsimd cclass=RAX1_VVV2_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING RBIT_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size=0b01 ig2=0b10000 opcode=0b00101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=RBIT', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=RBIT_advsimd cclass=RBIT_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING REV16_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0000 o0:u=0b1 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=REV16', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=REV16_advsimd cclass=REV16_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING REV32_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0000 o0:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=REV32', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=REV32_advsimd cclass=REV32_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING REV64_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b0000 o0:u=0b0 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=REV64', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=REV64_advsimd cclass=REV64_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING RSHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=RSHRN', docvars2 => 'rounding=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=RSHRN_advsimd cclass=RSHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING', }; ENCODING RSUBHN_asimddiff_N => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=RSUBHN', docvars2 => 'rounding=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=RSUBHN_advsimd cclass=RSUBHN_asimddiff_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING', }; ENCODING SABA_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0111 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SABA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SABA_advsimd cclass=SABA_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SIGNED', }; ENCODING SABAL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SABAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SABAL_advsimd cclass=SABAL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SIGNED', }; ENCODING SABD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0111 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SABD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SABD_advsimd cclass=SABD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SIGNED', }; ENCODING SABDL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SABDL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SABDL_advsimd cclass=SABDL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SIGNED', }; ENCODING SADALP_asimdmisc_P => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b00 op:u=0b1 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SADALP', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SADALP_advsimd cclass=SADALP_asimdmisc_P', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SADDL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SADDL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SADDL_advsimd cclass=SADDL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SADDLP_asimdmisc_P => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b00 op:u=0b0 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SADDLP', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SADDLP_advsimd cclass=SADDLP_asimdmisc_P', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SADDLV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b11000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SADDLV', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=SADDLV_advsimd cclass=SADDLV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SADDW_asimddiff_W => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SADDW', docvars2 => 'shape=wide', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SADDW_advsimd cclass=SADDW_asimddiff_W', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SCVTF_asisdshf_C => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SCVTF_advsimd_fix cclass=SCVTF_asisdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_asimdshf_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SCVTF_advsimd_fix cclass=SCVTF_asimdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 a=0b0 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=SCVTF_advsimd_int cclass=SCVTF_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SCVTF_advsimd_int cclass=SCVTF_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 a=0b0 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=SCVTF_advsimd_int cclass=SCVTF_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SCVTF_advsimd_int cclass=SCVTF_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|SIGNED', }; ENCODING SCVTF_H32_float2fix => { name => '32-bit to half-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=fix32-to-half instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_S32_float2fix => { name => '32-bit to single-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=fix32-to-single instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_D32_float2fix => { name => '32-bit to double-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=fix32-to-double instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_H64_float2fix => { name => '64-bit to half-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=fix64-to-half instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_S64_float2fix => { name => '64-bit to single-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=fix64-to-single instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_D64_float2fix => { name => '64-bit to double-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b00 opcode:u=0b010 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=fix64-to-double instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=SCVTF_float_fix cclass=SCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_H32_float2int => { name => '32-bit to half-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=32-to-half instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_S32_float2int => { name => '32-bit to single-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=32-to-single instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_D32_float2int => { name => '32-bit to double-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=32-to-double instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_H64_float2int => { name => '64-bit to half-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=64-to-half instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_S64_float2int => { name => '64-bit to single-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=64-to-single instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SCVTF_D64_float2int => { name => '64-bit to double-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b010 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=64-to-double instr-class=float isa=A64 mnemonic=SCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=SCVTF_float_int cclass=SCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|SIGNED', }; ENCODING SDOT_asimdelem_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1110 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SDOT_advsimd_elt cclass=SDOT_asimdelem_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT|SIGNED', }; ENCODING SDOT_asimdsame2_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b0010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=SDOT_advsimd_vec cclass=SDOT_asimdsame2_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT|SIGNED', }; ENCODING SHA1C_QSV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 opcode=0b000 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1C', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA1C_advsimd cclass=SHA1C_QSV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA1H_SS_cryptosha2 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b10100 opcode=0b00000 ig2=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1H', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha2 page=SHA1H_advsimd cclass=SHA1H_SS_cryptosha2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA1M_QSV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 opcode=0b010 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1M', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA1M_advsimd cclass=SHA1M_QSV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA1P_QSV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 opcode=0b001 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1P', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA1P_advsimd cclass=SHA1P_QSV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA1SU0_VVV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 opcode=0b011 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1SU0', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA1SU0_advsimd cclass=SHA1SU0_VVV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA1SU1_VV_cryptosha2 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b10100 opcode=0b00001 ig2=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA1SU1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha2 page=SHA1SU1_advsimd cclass=SHA1SU1_VV_cryptosha2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA256H2_QQV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 ig3=0b10 P:u=0b1 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA256H2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA256H2_advsimd cclass=SHA256H2_QQV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA256H_QQV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 ig3=0b10 P:u=0b0 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA256H', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA256H_advsimd cclass=SHA256H_QQV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA256SU0_VV_cryptosha2 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b10100 opcode=0b00010 ig2=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA256SU0', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha2 page=SHA256SU0_advsimd cclass=SHA256SU0_VV_cryptosha2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA256SU1_VVV_cryptosha3 => { name => 'Advanced SIMD', diagram => 'ig0=0b01011110 size=0b00 ig1=0b0 Rm:u=0bxxxxx ig2=0b0 opcode=0b110 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA256SU1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha3 page=SHA256SU1_advsimd cclass=SHA256SU1_VVV_cryptosha3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA512H2_QQV_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b0 ig2=0b00 opcode=0b01 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA512H2', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SHA512H2_advsimd cclass=SHA512H2_QQV_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA512H_QQV_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b0 ig2=0b00 opcode=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA512H', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SHA512H_advsimd cclass=SHA512H_QQV_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA512SU0_VV2_cryptosha512_2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110110000001000 opcode=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA512SU0', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_2 page=SHA512SU0_advsimd cclass=SHA512SU0_VV2_cryptosha512_2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHA512SU1_VVV2_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b0 ig2=0b00 opcode=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SHA512SU1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SHA512SU1_advsimd cclass=SHA512SU1_VVV2_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SHADD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SHADD', docvars2 => 'halving=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SHADD_advsimd cclass=SHADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|SIGNED', }; ENCODING SHL_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01010 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SHL_advsimd cclass=SHL_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT', }; ENCODING SHL_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01010 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SHL_advsimd cclass=SHL_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT', }; ENCODING SHLL_asimdmisc_S => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b10011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SHLL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SHLL_advsimd cclass=SHLL_asimdmisc_S', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT', }; ENCODING SHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SHRN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SHRN_advsimd cclass=SHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT', }; ENCODING SHSUB_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00100 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SHSUB', docvars2 => 'halving=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SHSUB_advsimd cclass=SHSUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|SIGNED', }; ENCODING SLI_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01010 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SLI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SLI_advsimd cclass=SLI_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|INSERTION', }; ENCODING SLI_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01010 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SLI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SLI_advsimd cclass=SLI_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|INSERTION', }; ENCODING SM3PARTW1_VVV4_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b1 ig2=0b00 opcode=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3PARTW1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SM3PARTW1_advsimd cclass=SM3PARTW1_VVV4_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3PARTW2_VVV4_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b1 ig2=0b00 opcode=0b01 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3PARTW2', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SM3PARTW2_advsimd cclass=SM3PARTW2_VVV4_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3SS1_VVV4_crypto4 => { name => 'Advanced SIMD', diagram => 'ig0=0b110011100 Op0=0b10 Rm:u=0bxxxxx ig1=0b0 Ra:u=0bxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3SS1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto4 page=SM3SS1_advsimd cclass=SM3SS1_VVV4_crypto4', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3TT1A_VVV4_crypto3_imm2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110010 Rm:u=0bxxxxx ig1=0b10 imm2:u=0bxx opcode=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3TT1A', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto3_imm2 page=SM3TT1A_advsimd cclass=SM3TT1A_VVV4_crypto3_imm2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3TT1B_VVV4_crypto3_imm2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110010 Rm:u=0bxxxxx ig1=0b10 imm2:u=0bxx opcode=0b01 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3TT1B', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto3_imm2 page=SM3TT1B_advsimd cclass=SM3TT1B_VVV4_crypto3_imm2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3TT2A_VVV4_crypto3_imm2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110010 Rm:u=0bxxxxx ig1=0b10 imm2:u=0bxx opcode=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3TT2A', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto3_imm2 page=SM3TT2A_advsimd cclass=SM3TT2A_VVV4_crypto3_imm2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM3TT2B_VVV_crypto3_imm2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110010 Rm:u=0bxxxxx ig1=0b10 imm2:u=0bxx opcode=0b11 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM3TT2B', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto3_imm2 page=SM3TT2B_advsimd cclass=SM3TT2B_VVV_crypto3_imm2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM4E_VV4_cryptosha512_2 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110110000001000 opcode=0b01 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM4E', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_2 page=SM4E_advsimd cclass=SM4E_VV4_cryptosha512_2', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SM4EKEY_VVV4_cryptosha512_3 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110011 Rm:u=0bxxxxx ig1=0b1 O=0b1 ig2=0b00 opcode=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SM4EKEY', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=cryptosha512_3 page=SM4EKEY_advsimd cclass=SM4EKEY_VVV4_cryptosha512_3', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CRYPTO', }; ENCODING SMAX_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0110 o1:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMAX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SMAX_advsimd cclass=SMAX_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMAXP_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b1010 o1:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMAXP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SMAXP_advsimd cclass=SMAXP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMAXV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b11000 op:u=0b0 ig3=0b1010 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SMAXV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=SMAXV_advsimd cclass=SMAXV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMIN_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0110 o1:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMIN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SMIN_advsimd cclass=SMIN_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMINP_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b1010 o1:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMINP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SMINP_advsimd cclass=SMINP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMINV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b11000 op:u=0b1 ig3=0b1010 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=SMINV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=SMINV_advsimd cclass=SMINV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|SIGNED', }; ENCODING SMLAL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b10 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SMLAL_advsimd_elt cclass=SMLAL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SMLAL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SMLAL_advsimd_vec cclass=SMLAL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SMLSL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b10 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SMLSL_advsimd_elt cclass=SMLSL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SMLSL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SMLSL_advsimd_vec cclass=SMLSL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SMMLA_asimdsame2_G => { name => 'Vector', diagram => 'ig0=0b0 Q=0b1 U:u=0b0 ig1=0b01110 size=0b10 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b010 B:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=SMMLA_advsimd_vec cclass=SMMLA_asimdsame2_G', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SIGNED', }; ENCODING SMOV_asimdins_W_w => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0b0 op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b0', docvars => 'datatype=32 instr-class=advsimd isa=A64 mnemonic=SMOV vector-xfer-type=general-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD datasize=32', tags => 'group=simd_dp iclass=asimdins page=SMOV_advsimd cclass=SMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|SIGNED', }; ENCODING SMOV_asimdins_X_x => { name => '64-reg,SMOV-64-reg', diagram => 'ig0=0b0 Q:u=0b1 op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b1', docvars => 'atomic-ops=SMOV-64-reg instr-class=advsimd isa=A64 mnemonic=SMOV reg-type=64-reg vector-xfer-type=general-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=SMOV_advsimd cclass=SMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|SIGNED', }; ENCODING SMULL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1010 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SMULL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SMULL_advsimd_elt cclass=SMULL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SMULL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b1100 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SMULL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SMULL_advsimd_vec cclass=SMULL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SQABS_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b00111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQABS', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SQABS_advsimd cclass=SQABS_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SATURATING|SIGNED', }; ENCODING SQABS_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQABS', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SQABS_advsimd cclass=SQABS_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|SATURATING|SIGNED', }; ENCODING SQADD_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQADD_advsimd cclass=SQADD_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQADD_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQADD_advsimd cclass=SQADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLAL_asisdelem_L => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b11 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMLAL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQDMLAL_advsimd_elt cclass=SQDMLAL_asisdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLAL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b11 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQDMLAL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQDMLAL_advsimd_elt cclass=SQDMLAL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLAL_asisddiff_only => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMLAL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisddiff page=SQDMLAL_advsimd_vec cclass=SQDMLAL_asisddiff_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLAL_asimddiff_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQDMLAL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SQDMLAL_advsimd_vec cclass=SQDMLAL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLSL_asisdelem_L => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b11 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMLSL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQDMLSL_advsimd_elt cclass=SQDMLSL_asisdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLSL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b11 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQDMLSL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQDMLSL_advsimd_elt cclass=SQDMLSL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLSL_asisddiff_only => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMLSL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisddiff page=SQDMLSL_advsimd_vec cclass=SQDMLSL_asisddiff_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMLSL_asimddiff_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQDMLSL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SQDMLSL_advsimd_vec cclass=SQDMLSL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULH_asisdelem_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b110 op:u=0b0 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMULH', docvars2 => 'doubling=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQDMULH_advsimd_elt cclass=SQDMULH_asisdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULH_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b110 op:u=0b0 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQDMULH', docvars2 => 'doubling=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQDMULH_advsimd_elt cclass=SQDMULH_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULH_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMULH', docvars2 => 'doubling=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQDMULH_advsimd_vec cclass=SQDMULH_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULH_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQDMULH', docvars2 => 'doubling=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQDMULH_advsimd_vec cclass=SQDMULH_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULL_asisdelem_L => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1011 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMULL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQDMULL_advsimd_elt cclass=SQDMULL_asisdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1011 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQDMULL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQDMULL_advsimd_elt cclass=SQDMULL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULL_asisddiff_only => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b1101 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQDMULL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisddiff page=SQDMULL_advsimd_vec cclass=SQDMULL_asisddiff_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQDMULL_asimddiff_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b1101 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQDMULL', docvars2 => 'doubling=1 saturating=1 shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SQDMULL_advsimd_vec cclass=SQDMULL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQNEG_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b00111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQNEG', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SQNEG_advsimd cclass=SQNEG_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE|SATURATING|SIGNED', }; ENCODING SQNEG_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00111 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQNEG', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SQNEG_advsimd cclass=SQNEG_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE|SATURATING|SIGNED', }; ENCODING SQRDMLAH_asisdelem_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b11 S:u=0b0 ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMLAH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQRDMLAH_advsimd_elt cclass=SQRDMLAH_asisdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLAH_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b11 S:u=0b0 ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQRDMLAH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQRDMLAH_advsimd_elt cclass=SQRDMLAH_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLAH_asisdsame2_only => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b000 S:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMLAH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame2 page=SQRDMLAH_advsimd_vec cclass=SQRDMLAH_asisdsame2_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLAH_asimdsame2_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b000 S:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRDMLAH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=SQRDMLAH_advsimd_vec cclass=SQRDMLAH_asimdsame2_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLSH_asisdelem_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b11 S:u=0b1 ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMLSH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQRDMLSH_advsimd_elt cclass=SQRDMLSH_asisdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLSH_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b11 S:u=0b1 ig3=0b1 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQRDMLSH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQRDMLSH_advsimd_elt cclass=SQRDMLSH_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLSH_asisdsame2_only => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b000 S:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMLSH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame2 page=SQRDMLSH_advsimd_vec cclass=SQRDMLSH_asisdsame2_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMLSH_asimdsame2_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b000 S:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRDMLSH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v1 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=SQRDMLSH_advsimd_vec cclass=SQRDMLSH_asimdsame2_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMULH_asisdelem_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b0 ig1=0b11111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b110 op:u=0b1 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-scalar advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMULH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdelem page=SQRDMULH_advsimd_elt cclass=SQRDMULH_asisdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMULH_asimdelem_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b110 op:u=0b1 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SQRDMULH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SQRDMULH_advsimd_elt cclass=SQRDMULH_asimdelem_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMULH_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRDMULH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQRDMULH_advsimd_vec cclass=SQRDMULH_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRDMULH_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10110 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRDMULH', docvars2 => 'doubling=1 rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQRDMULH_advsimd_vec cclass=SQRDMULH_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRSHL', docvars2 => 'rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQRSHL_advsimd cclass=SQRSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRSHL', docvars2 => 'rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQRSHL_advsimd cclass=SQRSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRSHRN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQRSHRN_advsimd cclass=SQRSHRN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRSHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQRSHRN_advsimd cclass=SQRSHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING|SIGNED', }; ENCODING SQRSHRUN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQRSHRUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQRSHRUN_advsimd cclass=SQRSHRUN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING', }; ENCODING SQRSHRUN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQRSHRUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQRSHRUN_advsimd cclass=SQRSHRUN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING', }; ENCODING SQSHL_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQSHL_advsimd_imm cclass=SQSHL_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|SIGNED', }; ENCODING SQSHL_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQSHL_advsimd_imm cclass=SQSHL_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|SIGNED', }; ENCODING SQSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQSHL_advsimd_reg cclass=SQSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|SIGNED', }; ENCODING SQSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQSHL_advsimd_reg cclass=SQSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|SIGNED', }; ENCODING SQSHLU_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSHLU', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQSHLU_advsimd cclass=SQSHLU_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING', }; ENCODING SQSHLU_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSHLU', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQSHLU_advsimd cclass=SQSHLU_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING', }; ENCODING SQSHRN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQSHRN_advsimd cclass=SQSHRN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING|SIGNED', }; ENCODING SQSHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQSHRN_advsimd cclass=SQSHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING|SIGNED', }; ENCODING SQSHRUN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSHRUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SQSHRUN_advsimd cclass=SQSHRUN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING', }; ENCODING SQSHRUN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1000 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSHRUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SQSHRUN_advsimd cclass=SQSHRUN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING', }; ENCODING SQSUB_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQSUB', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SQSUB_advsimd cclass=SQSUB_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQSUB_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQSUB', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SQSUB_advsimd cclass=SQSUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|SIGNED', }; ENCODING SQXTN_asisdmisc_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b10100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQXTN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SQXTN_advsimd cclass=SQXTN_asisdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING|SIGNED', }; ENCODING SQXTN_asimdmisc_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b10100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQXTN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SQXTN_advsimd cclass=SQXTN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING|SIGNED', }; ENCODING SQXTUN_asisdmisc_N => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b10010 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SQXTUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SQXTUN_advsimd cclass=SQXTUN_asisdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING', }; ENCODING SQXTUN_asimdmisc_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b10010 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SQXTUN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SQXTUN_advsimd cclass=SQXTUN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING', }; ENCODING SRHADD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00010 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SRHADD', docvars2 => 'halving=1 rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SRHADD_advsimd cclass=SRHADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|ROUNDING|SIGNED', }; ENCODING SRI_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01000 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SRI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SRI_advsimd cclass=SRI_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|INSERTION', }; ENCODING SRI_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b01000 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SRI', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SRI_advsimd cclass=SRI_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|INSERTION', }; ENCODING SRSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SRSHL', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SRSHL_advsimd cclass=SRSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SIGNED', }; ENCODING SRSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SRSHL', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SRSHL_advsimd cclass=SRSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SIGNED', }; ENCODING SRSHR_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SRSHR', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SRSHR_advsimd cclass=SRSHR_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SIGNED', }; ENCODING SRSHR_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SRSHR', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SRSHR_advsimd cclass=SRSHR_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SIGNED', }; ENCODING SRSRA_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SRSRA', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SRSRA_advsimd cclass=SRSRA_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|ROUNDING|SIGNED', }; ENCODING SRSRA_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SRSRA', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SRSRA_advsimd cclass=SRSRA_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|ROUNDING|SIGNED', }; ENCODING SSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SSHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SSHL_advsimd cclass=SSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SIGNED', }; ENCODING SSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SSHL_advsimd cclass=SSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SIGNED', }; ENCODING SSHLL_asimdshf_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b10100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSHLL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SSHLL_advsimd cclass=SSHLL_advsimd_SSHLL_asimdshf_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SIGNED', }; ENCODING SSHR_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SSHR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SSHR_advsimd cclass=SSHR_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SIGNED', }; ENCODING SSHR_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSHR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SSHR_advsimd cclass=SSHR_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SIGNED', }; ENCODING SSRA_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SSRA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=SSRA_advsimd cclass=SSRA_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|SIGNED', }; ENCODING SSRA_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSRA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SSRA_advsimd cclass=SSRA_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|SIGNED', }; ENCODING SSUBL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSUBL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SSUBL_advsimd cclass=SSUBL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING SSUBW_asimddiff_W => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SSUBW', docvars2 => 'shape=wide', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SSUBW_advsimd cclass=SSUBW_asimddiff_W', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SIGNED', }; ENCODING ST1_asisdlse_R1_1v => { name => 'One register', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0111', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1 ststruct-regcount=from-1reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlse_R2_2v => { name => 'Two registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b1010', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1 ststruct-regcount=from-2reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlse_R3_3v => { name => 'Three registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0110', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1 ststruct-regcount=from-3reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlse_R4_4v => { name => 'Four registers', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b0010', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1 ststruct-regcount=from-4reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_I1_i1 => { name => 'One register, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-1reg-post-index-imm ststruct-regcount=from-1reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_R1_r1 => { name => 'One register, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0111 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-1reg-post-index-reg ststruct-regcount=from-1reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_I2_i2 => { name => 'Two registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b1010', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-2reg-post-index-imm ststruct-regcount=from-2reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_R2_r2 => { name => 'Two registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b1010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b1010', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-2reg-post-index-reg ststruct-regcount=from-2reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_I3_i3 => { name => 'Three registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0110', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-3reg-post-index-imm ststruct-regcount=from-3reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_R3_r3 => { name => 'Three registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0110 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0110', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-3reg-post-index-reg ststruct-regcount=from-3reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_I4_i4 => { name => 'Four registers, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b0010', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-4reg-post-index-imm ststruct-regcount=from-4reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsep_R4_r4 => { name => 'Four registers, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0010 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b0010', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST1 sti-mult-labels=from-4reg-post-index-reg ststruct-regcount=from-4reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST1_advsimd_mult cclass=ST1_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlso_B1_1b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b000', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlso_H1_1h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b010 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlso_S1_1s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlso_D1_1d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_B1_i1b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_BX1_r1b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_H1_i1h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_HX1_r1h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_S1_i1s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_SX1_r1s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_D1_i1d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST1_asisdlsop_DX1_r1d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=ST1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST1_advsimd_sngl cclass=ST1_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlse_R2 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST2_advsimd_mult cclass=ST2_asisdlse_R2', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsep_I2_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST2 sti-mult-labels=from-2reg-post-index-imm ststruct-regcount=from-2reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST2_advsimd_mult cclass=ST2_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsep_R2_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b1000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST2 sti-mult-labels=from-2reg-post-index-reg ststruct-regcount=from-2reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST2_advsimd_mult cclass=ST2_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlso_B2_2b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b000', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlso_H2_2h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b010 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlso_S2_2s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlso_D2_2d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_B2_i2b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_BX2_r2b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b000 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b000', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_H2_i2h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_HX2_r2h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b010 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b010 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_S2_i2s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_SX2_r2s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b100 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_D2_i2d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST2_asisdlsop_DX2_r2d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b100 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b100 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=ST2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST2_advsimd_sngl cclass=ST2_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlse_R3 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST3_advsimd_mult cclass=ST3_asisdlse_R3', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsep_I3_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST3 sti-mult-labels=from-3reg-post-index-imm ststruct-regcount=from-3reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST3_advsimd_mult cclass=ST3_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsep_R3_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0100 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST3 sti-mult-labels=from-3reg-post-index-reg ststruct-regcount=from-3reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST3_advsimd_mult cclass=ST3_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlso_B3_3b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b001', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlso_H3_3h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b011 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlso_S3_3s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlso_D3_3d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b0 ig2=0b00000 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_B3_i3b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_BX3_r3b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_H3_i3h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_HX3_r3h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_S3_i3s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_SX3_r3s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_D3_i3d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0b11111 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST3_asisdlsop_DX3_r3d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b0 Rm:u=0bxxxxx opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=ST3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST3_advsimd_sngl cclass=ST3_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlse_R4 => { name => 'No offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011000 L:u=0b0 ig2=0b000000 opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', docvars => 'as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlse page=ST4_advsimd_mult cclass=ST4_asisdlse_R4', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsep_I4_i => { name => 'Immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0b11111 opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111', docvars => 'as-structure-index-source=post-index-imm as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST4 sti-mult-labels=from-4reg-post-index-imm ststruct-regcount=from-4reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST4_advsimd_mult cclass=ST4_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsep_R4_r => { name => 'Register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011001 L:u=0b0 ig2=0b0 Rm:u=0bxxxxx opcode:u=0b0000 size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111', docvars => 'as-structure-index-source=post-index-reg as-structure-post-index=as-post-index instr-class=advsimd isa=A64 mnemonic=ST4 sti-mult-labels=from-4reg-post-index-reg ststruct-regcount=from-4reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsep page=ST4_advsimd_mult cclass=ST4_advsimd_mult_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlso_B4_4b => { name => '8-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b001', docvars => 'as-structure-org=of-bytes as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlso_H4_4h => { name => '16-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b011 && size == 0bx0', docvars => 'as-structure-org=of-halfwords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlso_S4_4s => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && size == 0b00', docvars => 'as-structure-org=of-words as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlso_D4_4d => { name => '64-bit', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011010 L:u=0b0 R:u=0b1 ig2=0b00000 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-org=of-doublewords as-structure-post-index=as-no-post-index instr-class=advsimd isa=A64 mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlso page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_no_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_B4_i4b => { name => '8-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-imm mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_BX4_r4b => { name => '8-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b001 S:u=0bx size:u=0bxx Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b001', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-bytes as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-bytes-post-index-reg mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_H4_i4h => { name => '16-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-imm mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_HX4_r4h => { name => '16-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b011 S:u=0bx size:u=0bx0 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b011 && size == 0bx0', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-halfwords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-halfwords-post-index-reg mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_S4_i4s => { name => '32-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-imm mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_SX4_r4s => { name => '32-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b101 S:u=0bx size:u=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && size == 0b00', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-words as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-words-post-index-reg mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_D4_i4d => { name => '64-bit, immediate offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0b11111 opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'Rm == 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-imm as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-imm mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING ST4_asisdlsop_DX4_r4d => { name => '64-bit, register offset', diagram => 'ig0=0b0 Q:u=0bx ig1=0b0011011 L:u=0b0 R:u=0b1 Rm:u=0bxxxxx opcode:u=0b101 S:u=0b0 size:u=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'Rm!=0b11111', bitdiffs => 'Rm != 0b11111 && opcode == 0b101 && S == 0b0 && size == 0b01', docvars => 'as-structure-index-source=post-index-reg as-structure-org=of-doublewords as-structure-post-index=as-post-index instr-class=advsimd isa=A64 ld1-single-labels=of-doublewords-post-index-reg mnemonic=ST4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=asisdlsop page=ST4_advsimd_sngl cclass=ST4_advsimd_sngl_as_post_index', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|STORE', }; ENCODING STNP_S_ldstnapair_offs => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b000 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-words atomic-ops=STNP-pair-words instr-class=fpsimd isa=A64 mnemonic=STNP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=STNP_fpsimd cclass=STNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|STORE', }; ENCODING STNP_D_ldstnapair_offs => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b000 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-doublewords atomic-ops=STNP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=STNP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=STNP_fpsimd cclass=STNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|STORE', }; ENCODING STNP_Q_ldstnapair_offs => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b000 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-quadwords atomic-ops=STNP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=STNP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstnapair_offs page=STNP_fpsimd cclass=STNP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|HINT|STORE', }; ENCODING STP_S_ldstpair_post => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b001 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-words atomic-ops=STP-pair-words instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=STP_fpsimd cclass=STP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_D_ldstpair_post => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b001 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-doublewords atomic-ops=STP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=STP_fpsimd cclass=STP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_Q_ldstpair_post => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b001 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-pair-quadwords atomic-ops=STP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_post page=STP_fpsimd cclass=STP_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_S_ldstpair_pre => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b011 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-words atomic-ops=STP-pair-words instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=STP_fpsimd cclass=STP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_D_ldstpair_pre => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b011 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-doublewords atomic-ops=STP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=STP_fpsimd cclass=STP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_Q_ldstpair_pre => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b011 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-pair-quadwords atomic-ops=STP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_pre page=STP_fpsimd cclass=STP_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_S_ldstpair_off => { name => '32-bit', diagram => 'opc:u=0b00 ig0=0b101 V=0b1 ig1=0b010 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b00', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-words atomic-ops=STP-pair-words instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-words', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=STP_fpsimd cclass=STP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_D_ldstpair_off => { name => '64-bit', diagram => 'opc:u=0b01 ig0=0b101 V=0b1 ig1=0b010 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b01', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-doublewords atomic-ops=STP-pair-doublewords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-doublewords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=STP_fpsimd cclass=STP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STP_Q_ldstpair_off => { name => '128-bit', diagram => 'opc:u=0b10 ig0=0b101 V=0b1 ig1=0b010 L:u=0b0 imm7:u=0bxxxxxxx Rt2:u=0bxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'opc == 0b10', docvars => 'address-form=signed-scaled-offset address-form-reg-type=signed-scaled-offset-pair-quadwords atomic-ops=STP-pair-quadwords instr-class=fpsimd isa=A64 mnemonic=STP offset-type=off7s_s reg-type=pair-quadwords', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldstpair_off page=STP_fpsimd cclass=STP_fpsimd_signed_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_B_ldst_immpost => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-8-fsreg atomic-ops=STR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=STR_imm_fpsimd cclass=STR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_H_ldst_immpost => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-16-fsreg atomic-ops=STR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=STR_imm_fpsimd cclass=STR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_S_ldst_immpost => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-32-fsreg atomic-ops=STR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=STR_imm_fpsimd cclass=STR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_D_ldst_immpost => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b00', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-64-fsreg atomic-ops=STR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=STR_imm_fpsimd cclass=STR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_Q_ldst_immpost => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b10 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b01 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b10', docvars => 'address-form=post-indexed address-form-reg-type=post-indexed-128-fsreg atomic-ops=STR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpost page=STR_imm_fpsimd cclass=STR_imm_fpsimd_post_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_B_ldst_immpre => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-8-fsreg atomic-ops=STR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=STR_imm_fpsimd cclass=STR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_H_ldst_immpre => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-16-fsreg atomic-ops=STR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=STR_imm_fpsimd cclass=STR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_S_ldst_immpre => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-32-fsreg atomic-ops=STR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=STR_imm_fpsimd cclass=STR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_D_ldst_immpre => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b00', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-64-fsreg atomic-ops=STR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=STR_imm_fpsimd cclass=STR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_Q_ldst_immpre => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b10 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b11 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b10', docvars => 'address-form=pre-indexed address-form-reg-type=pre-indexed-128-fsreg atomic-ops=STR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_immpre page=STR_imm_fpsimd cclass=STR_imm_fpsimd_pre_indexed', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_B_ldst_pos => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b00 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b00', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-8-fsreg atomic-ops=STR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off12u_s reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=STR_imm_fpsimd cclass=STR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_H_ldst_pos => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b00 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b00', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-16-fsreg atomic-ops=STR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off12u_s reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=STR_imm_fpsimd cclass=STR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_S_ldst_pos => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b00 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b00', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-32-fsreg atomic-ops=STR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off12u_s reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=STR_imm_fpsimd cclass=STR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_D_ldst_pos => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b00 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b00', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-64-fsreg atomic-ops=STR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off12u_s reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=STR_imm_fpsimd cclass=STR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_Q_ldst_pos => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b01 opc:u=0b10 imm12:u=0bxxxxxxxxxxxx Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b10', docvars => 'address-form=unsigned-scaled-offset address-form-reg-type=unsigned-scaled-offset-128-fsreg atomic-ops=STR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off12u_s reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_pos page=STR_imm_fpsimd cclass=STR_imm_fpsimd_unsigned_scaled_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_B_ldst_regoff => { name => '8-fsreg,STR-8-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', cnsts => 'option!=0b011', bitdiffs => 'size == 0b00 && opc == 0b00 && option != 0b011', docvars => 'atomic-ops=STR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=8-fsreg reg-type-and-use=8-fsreg-ext-reg reguse=ext-reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_BL_ldst_regoff => { name => '8-fsreg,STR-8-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b1 Rm:u=0bxxxxx option:u=0b011 S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b00 && option == 0b011', docvars => 'atomic-ops=STR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=8-fsreg reg-type-and-use=8-fsreg-shifted-reg reguse=shifted-reg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_H_ldst_regoff => { name => '16-fsreg,STR-16-fsreg', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b00', docvars => 'atomic-ops=STR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_S_ldst_regoff => { name => '32-fsreg,STR-32-fsreg', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b00', docvars => 'atomic-ops=STR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_D_ldst_regoff => { name => '64-fsreg,STR-64-fsreg', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b00', docvars => 'atomic-ops=STR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STR_Q_ldst_regoff => { name => '128-fsreg,STR-128-fsreg', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b10 ig2=0b1 Rm:u=0bxxxxx option:u=0bxxx S:u=0bx ig3=0b10 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b10', docvars => 'atomic-ops=STR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=STR offset-type=off-reg reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_regoff page=STR_reg_fpsimd cclass=STR_reg_fpsimd_fpsimd', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STUR_B_ldst_unscaled => { name => '8-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b00', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-8-fsreg atomic-ops=STUR-8-fsreg instr-class=fpsimd isa=A64 mnemonic=STUR offset-type=off9s_u reg-type=8-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=STUR_fpsimd cclass=STUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STUR_H_ldst_unscaled => { name => '16-bit', diagram => 'size:u=0b01 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b01 && opc == 0b00', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-16-fsreg atomic-ops=STUR-16-fsreg instr-class=fpsimd isa=A64 mnemonic=STUR offset-type=off9s_u reg-type=16-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=STUR_fpsimd cclass=STUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STUR_S_ldst_unscaled => { name => '32-bit', diagram => 'size:u=0b10 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b10 && opc == 0b00', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-32-fsreg atomic-ops=STUR-32-fsreg instr-class=fpsimd isa=A64 mnemonic=STUR offset-type=off9s_u reg-type=32-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=STUR_fpsimd cclass=STUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STUR_D_ldst_unscaled => { name => '64-bit', diagram => 'size:u=0b11 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b00 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b11 && opc == 0b00', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-64-fsreg atomic-ops=STUR-64-fsreg instr-class=fpsimd isa=A64 mnemonic=STUR offset-type=off9s_u reg-type=64-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=STUR_fpsimd cclass=STUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING STUR_Q_ldst_unscaled => { name => '128-bit', diagram => 'size:u=0b00 ig0=0b111 V=0b1 ig1=0b00 opc:u=0b10 ig2=0b0 imm9:u=0bxxxxxxxxx ig3=0b00 Rn:u=0bxxxxx Rt:u=0bxxxxx', bitdiffs => 'size == 0b00 && opc == 0b10', docvars => 'address-form=base-plus-offset address-form-reg-type=base-plus-offset-128-fsreg atomic-ops=STUR-128-fsreg instr-class=fpsimd isa=A64 mnemonic=STUR offset-type=off9s_u reg-type=128-fsreg', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=ldst iclass=ldst_unscaled page=STUR_fpsimd cclass=STUR_fpsimd_base_plus_offset', exceptions => 'ADVSIMDFPACCESSTRAP|DATAABORT|SPALIGNMENT|UNCATEGORIZED', categories => 'FPSIMD|DATA_TRANSFER|STORE', }; ENCODING SUB_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=SUB_advsimd cclass=SUB_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING SUB_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b10000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SUB', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=SUB_advsimd cclass=SUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING SUBHN_asimddiff_N => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SUBHN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=SUBHN_advsimd cclass=SUBHN_asimddiff_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC', }; ENCODING SUDOT_asimdelem_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 US:u=0b0 ig2=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1111 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=SUDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=SUDOT_advsimd_elt cclass=SUDOT_asimdelem_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT', }; ENCODING SUQADD_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b0 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=SUQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=SUQADD_advsimd cclass=SUQADD_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING', }; ENCODING SUQADD_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=SUQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=SUQADD_advsimd cclass=SUQADD_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING', }; ENCODING TBL_asimdtbl_L2_2 => { name => 'Two register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b01 op:u=0b0 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b01', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBL no-reg-for-table=tbl2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBL_advsimd cclass=TBL_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBL_asimdtbl_L3_3 => { name => 'Three register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b10 op:u=0b0 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b10', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBL no-reg-for-table=tbl3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBL_advsimd cclass=TBL_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBL_asimdtbl_L4_4 => { name => 'Four register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b11 op:u=0b0 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b11', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBL no-reg-for-table=tbl4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBL_advsimd cclass=TBL_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBL_asimdtbl_L1_1 => { name => 'Single register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b00 op:u=0b0 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b00', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBL no-reg-for-table=tbl1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBL_advsimd cclass=TBL_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBX_asimdtbl_L2_2 => { name => 'Two register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b01 op:u=0b1 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b01', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBX no-reg-for-table=tbl2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBX_advsimd cclass=TBX_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBX_asimdtbl_L3_3 => { name => 'Three register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b10 op:u=0b1 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b10', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBX no-reg-for-table=tbl3', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBX_advsimd cclass=TBX_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBX_asimdtbl_L4_4 => { name => 'Four register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b11 op:u=0b1 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b11', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBX no-reg-for-table=tbl4', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBX_advsimd cclass=TBX_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TBX_asimdtbl_L1_1 => { name => 'Single register table', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 op2=0b00 ig2=0b0 Rm:u=0bxxxxx ig3=0b0 len:u=0b00 op:u=0b1 ig4=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'len == 0b00', docvars => 'instr-class=advsimd isa=A64 mnemonic=TBX no-reg-for-table=tbl1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdtbl page=TBX_advsimd cclass=TBX_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|TABLE_LOOKUP', }; ENCODING TRN1_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b0 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=TRN1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=TRN1_advsimd cclass=TRN1_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING TRN2_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b1 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=TRN2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=TRN2_advsimd cclass=TRN2_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING UABA_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0111 ac:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UABA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UABA_advsimd cclass=UABA_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING UABAL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UABAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UABAL_advsimd cclass=UABAL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING UABD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0111 ac:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UABD', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UABD_advsimd cclass=UABD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING UABDL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b01 op:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UABDL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UABDL_advsimd cclass=UABDL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING UADALP_asimdmisc_P => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b00 op:u=0b1 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UADALP', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=UADALP_advsimd cclass=UADALP_asimdmisc_P', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UADDL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UADDL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UADDL_advsimd cclass=UADDL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UADDLP_asimdmisc_P => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 ig3=0b00 op:u=0b0 ig4=0b10 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UADDLP', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=UADDLP_advsimd cclass=UADDLP_asimdmisc_P', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UADDLV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b11000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=UADDLV', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=UADDLV_advsimd cclass=UADDLV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING UADDW_asimddiff_W => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b0 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UADDW', docvars2 => 'shape=wide', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UADDW_advsimd cclass=UADDW_asimddiff_W', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UCVTF_asisdshf_C => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=UCVTF_advsimd_fix cclass=UCVTF_asisdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_asimdshf_C => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b11100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=UCVTF_advsimd_fix cclass=UCVTF_asimdshf_C', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_asisdmiscfp16_R => { name => 'Scalar half precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 a=0b0 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-half advsimd-type=sisd datatype=half instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmiscfp16 page=UCVTF_advsimd_int cclass=UCVTF_asisdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_asisdmisc_R => { name => 'Scalar single-precision and double-precision', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=sisd-single-and-double advsimd-type=sisd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=UCVTF_advsimd_int cclass=UCVTF_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_asimdmiscfp16_R => { name => 'Vector half precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 a=0b0 ig2=0b111100 opcode=0b11101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-half advsimd-type=simd datatype=half instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmiscfp16 page=UCVTF_advsimd_int cclass=UCVTF_asimdmiscfp16_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_asimdmisc_R => { name => 'Vector single-precision and double-precision', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 ig2=0b0 sz:u=0bx ig3=0b10000 opcode=0b11101 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-datatype=simd-single-and-double advsimd-type=simd datatype=single-and-double instr-class=advsimd isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=UCVTF_advsimd_int cclass=UCVTF_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'ADVSIMD|CONVERSION|UNSIGNED', }; ENCODING UCVTF_H32_float2fix => { name => '32-bit to half-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=fix32-to-half instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_S32_float2fix => { name => '32-bit to single-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=fix32-to-single instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_D32_float2fix => { name => '32-bit to double-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=fix32-to-double instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_H64_float2fix => { name => '64-bit to half-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=fix64-to-half instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_S64_float2fix => { name => '64-bit to single-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=fix64-to-single instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_D64_float2fix => { name => '64-bit to double-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b0 rmode:u=0b00 opcode:u=0b011 scale:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=fix64-to-double instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2fix page=UCVTF_float_fix cclass=UCVTF_float_fix_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_H32_float2int => { name => '32-bit to half-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b11', docvars => 'convert-type=32-to-half instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_S32_float2int => { name => '32-bit to single-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b00', docvars => 'convert-type=32-to-single instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_D32_float2int => { name => '32-bit to double-precision', diagram => 'sf:u=0b0 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b0 && ftype == 0b01', docvars => 'convert-type=32-to-double instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_H64_float2int => { name => '64-bit to half-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b11 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b11', docvars => 'convert-type=64-to-half instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_S64_float2int => { name => '64-bit to single-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b00 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b00', docvars => 'convert-type=64-to-single instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UCVTF_D64_float2int => { name => '64-bit to double-precision', diagram => 'sf:u=0b1 ig0=0b0 S=0b0 ig1=0b11110 ftype:u=0b01 ig2=0b1 rmode:u=0b00 opcode:u=0b011 ig3=0b000000 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'sf == 0b1 && ftype == 0b01', docvars => 'convert-type=64-to-double instr-class=float isa=A64 mnemonic=UCVTF', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=float2int page=UCVTF_float_int cclass=UCVTF_float_int_float', exceptions => 'ADVSIMDFPACCESSTRAP|FP|UNCATEGORIZED', categories => 'FLOAT|CONVERSION|UNSIGNED', }; ENCODING UDOT_asimdelem_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1110 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=UDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=UDOT_advsimd_elt cclass=UDOT_asimdelem_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT|UNSIGNED', }; ENCODING UDOT_asimdsame2_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b0010 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=UDOT_advsimd_vec cclass=UDOT_asimdsame2_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT|UNSIGNED', }; ENCODING UHADD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UHADD', docvars2 => 'halving=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UHADD_advsimd cclass=UHADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|UNSIGNED', }; ENCODING UHSUB_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00100 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UHSUB', docvars2 => 'halving=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UHSUB_advsimd cclass=UHSUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|UNSIGNED', }; ENCODING UMAX_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0110 o1:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMAX', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UMAX_advsimd cclass=UMAX_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMAXP_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b1010 o1:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMAXP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UMAXP_advsimd cclass=UMAXP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMAXV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b11000 op:u=0b0 ig3=0b1010 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=UMAXV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=UMAXV_advsimd cclass=UMAXV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMIN_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b0110 o1:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMIN', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UMIN_advsimd cclass=UMIN_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMINP_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b1010 o1:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMINP', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UMINP_advsimd cclass=UMINP_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMINV_asimdall_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b11000 op:u=0b1 ig3=0b1010 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=UMINV', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdall page=UMINV_advsimd cclass=UMINV_asimdall_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|MIN_MAX|UNSIGNED', }; ENCODING UMLAL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b0 ig3=0b10 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=UMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=UMLAL_advsimd_elt cclass=UMLAL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UMLAL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b0 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMLAL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UMLAL_advsimd_vec cclass=UMLAL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UMLSL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx ig2=0b0 o2:u=0b1 ig3=0b10 H:u=0bx ig4=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=UMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=UMLSL_advsimd_elt cclass=UMLSL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UMLSL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b10 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMLSL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UMLSL_advsimd_vec cclass=UMLSL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UMMLA_asimdsame2_G => { name => 'Vector', diagram => 'ig0=0b0 Q=0b1 U:u=0b1 ig1=0b01110 size=0b10 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b010 B:u=0b0 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=UMMLA_advsimd_vec cclass=UMMLA_asimdsame2_G', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|UNSIGNED', }; ENCODING UMOV_asimdins_W_w => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0b0 op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0111 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b0', docvars => 'datatype=32 instr-class=advsimd isa=A64 mnemonic=UMOV vector-xfer-type=general-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD datasize=32', tags => 'group=simd_dp iclass=asimdins page=UMOV_advsimd cclass=UMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|UNSIGNED', }; ENCODING UMOV_asimdins_X_x => { name => '64-reg,UMOV-64-reg', diagram => 'ig0=0b0 Q:u=0b1 op=0b0 ig1=0b01110000 imm5:u=0bx1000 ig2=0b0 imm4=0b0111 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b1 && imm5 == 0bx1000', docvars => 'atomic-ops=UMOV-64-reg instr-class=advsimd isa=A64 mnemonic=UMOV reg-type=64-reg vector-xfer-type=general-from-element', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=UMOV_advsimd cclass=UMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER|UNSIGNED', }; ENCODING UMULL_asimdelem_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01111 size:u=0bxx L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1010 H:u=0bx ig2=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=UMULL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=UMULL_advsimd_elt cclass=UMULL_asimdelem_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UMULL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b1100 ig3=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UMULL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=UMULL_advsimd_vec cclass=UMULL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UQADD_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=UQADD_advsimd cclass=UQADD_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|UNSIGNED', }; ENCODING UQADD_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00001 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UQADD_advsimd cclass=UQADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|UNSIGNED', }; ENCODING UQRSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQRSHL', docvars2 => 'rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=UQRSHL_advsimd cclass=UQRSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SATURATING|UNSIGNED', }; ENCODING UQRSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQRSHL', docvars2 => 'rounding=1 saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UQRSHL_advsimd cclass=UQRSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|SATURATING|UNSIGNED', }; ENCODING UQRSHRN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQRSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=UQRSHRN_advsimd cclass=UQRSHRN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING|UNSIGNED', }; ENCODING UQRSHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b1 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQRSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=UQRSHRN_advsimd cclass=UQRSHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|SATURATING|UNSIGNED', }; ENCODING UQSHL_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=UQSHL_advsimd_imm cclass=UQSHL_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|UNSIGNED', }; ENCODING UQSHL_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b011 op:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=UQSHL_advsimd_imm cclass=UQSHL_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|UNSIGNED', }; ENCODING UQSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=UQSHL_advsimd_reg cclass=UQSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|UNSIGNED', }; ENCODING UQSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b1 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQSHL', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UQSHL_advsimd_reg cclass=UQSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|SATURATING|UNSIGNED', }; ENCODING UQSHRN_asisdshf_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=UQSHRN_advsimd cclass=UQSHRN_asisdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING|UNSIGNED', }; ENCODING UQSHRN_asimdshf_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b1001 op:u=0b0 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQSHRN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=UQSHRN_advsimd cclass=UQSHRN_asimdshf_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|SATURATING|UNSIGNED', }; ENCODING UQSUB_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQSUB', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=UQSUB_advsimd cclass=UQSUB_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|UNSIGNED', }; ENCODING UQSUB_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00101 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQSUB', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=UQSUB_advsimd cclass=UQSUB_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|SATURATING|UNSIGNED', }; ENCODING UQXTN_asisdmisc_N => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b10100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=UQXTN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=UQXTN_advsimd cclass=UQXTN_asisdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING|UNSIGNED', }; ENCODING UQXTN_asimdmisc_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b10100 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=UQXTN', docvars2 => 'saturating=1 shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=UQXTN_advsimd cclass=UQXTN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION|SATURATING|UNSIGNED', }; ENCODING URECPE_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URECPE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=URECPE_advsimd cclass=URECPE_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING URHADD_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx opcode=0b00010 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URHADD', docvars2 => 'halving=1 rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=URHADD_advsimd cclass=URHADD_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|HALVING|ROUNDING|UNSIGNED', }; ENCODING URSHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=URSHL', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=URSHL_advsimd cclass=URSHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|UNSIGNED', }; ENCODING URSHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b1 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URSHL', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=URSHL_advsimd cclass=URSHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|ROUNDING|UNSIGNED', }; ENCODING URSHR_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=URSHR', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=URSHR_advsimd cclass=URSHR_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|UNSIGNED', }; ENCODING URSHR_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URSHR', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=URSHR_advsimd cclass=URSHR_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|ROUNDING|UNSIGNED', }; ENCODING URSQRTE_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 ig2=0b1 sz:u=0bx ig3=0b10000 opcode=0b11100 ig4=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URSQRTE', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=URSQRTE_advsimd cclass=URSQRTE_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MATH|UNSIGNED', }; ENCODING URSRA_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=URSRA', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=URSRA_advsimd cclass=URSRA_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|ROUNDING|UNSIGNED', }; ENCODING URSRA_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b1 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=URSRA', docvars2 => 'rounding=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=URSRA_advsimd cclass=URSRA_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|ROUNDING|UNSIGNED', }; ENCODING USDOT_asimdelem_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01111 US:u=0b1 ig2=0b0 L:u=0bx M:u=0bx Rm:u=0bxxxx opcode=0b1111 H:u=0bx ig3=0b0 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=2reg-element instr-class=advsimd isa=A64 mnemonic=USDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdelem page=USDOT_advsimd_elt cclass=USDOT_asimdelem_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT', }; ENCODING USDOT_asimdsame2_D => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size=0b10 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 opcode=0b0011 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USDOT', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=USDOT_advsimd_vec cclass=USDOT_asimdsame2_D', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DOT_PRODUCT', }; ENCODING USHL_asisdsame_only => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=USHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdsame page=USHL_advsimd cclass=USHL_asisdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|UNSIGNED', }; ENCODING USHL_asimdsame_only => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b010 R:u=0b0 S:u=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USHL', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=USHL_advsimd cclass=USHL_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|UNSIGNED', }; ENCODING USHLL_asimdshf_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx opcode=0b10100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USHLL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=USHLL_advsimd cclass=USHLL_advsimd_USHLL_asimdshf_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_LEFT|UNSIGNED', }; ENCODING USHR_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=USHR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=USHR_advsimd cclass=USHR_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|UNSIGNED', }; ENCODING USHR_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b0 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USHR', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=USHR_advsimd cclass=USHR_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|UNSIGNED', }; ENCODING USMMLA_asimdsame2_G => { name => 'Vector', diagram => 'ig0=0b0 Q=0b1 U:u=0b0 ig1=0b01110 size=0b10 ig2=0b0 Rm:u=0bxxxxx ig3=0b1 ig4=0b010 B:u=0b1 ig5=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USMMLA', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v6 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame2 page=USMMLA_advsimd_vec cclass=USMMLA_asimdsame2_G', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC', }; ENCODING USQADD_asisdmisc_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b11110 size:u=0bxx ig2=0b10000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=USQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdmisc page=USQADD_advsimd cclass=USQADD_asisdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING', }; ENCODING USQADD_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b00011 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USQADD', docvars2 => 'saturating=1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=USQADD_advsimd cclass=USQADD_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|CARITHMETIC|SATURATING', }; ENCODING USRA_asisdshf_R => { name => 'Scalar', diagram => 'ig0=0b01 U:u=0b1 ig1=0b111110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=sisd instr-class=advsimd isa=A64 mnemonic=USRA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdshf page=USRA_advsimd cclass=USRA_asisdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|UNSIGNED', }; ENCODING USRA_asimdshf_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0bxxx ig2=0b00 o1:u=0b0 o0:u=0b1 ig3=0b0 ig4=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USRA', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=USRA_advsimd cclass=USRA_asimdshf_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SHIFT_RIGHT|CARITHMETIC|UNSIGNED', }; ENCODING USUBL_asimddiff_L => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b1 ig4=0b0 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USUBL', docvars2 => 'shape=long', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=USUBL_advsimd cclass=USUBL_asimddiff_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING USUBW_asimddiff_W => { name => 'Three registers, not all the same type', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b01110 size:u=0bxx ig2=0b1 Rm:u=0bxxxxx ig3=0b00 o1:u=0b1 ig4=0b1 ig5=0b00 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-reguse=3reg-diff advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=USUBW', docvars2 => 'shape=wide', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimddiff page=USUBW_advsimd cclass=USUBW_asimddiff_W', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|ARITHMETIC|UNSIGNED', }; ENCODING UZP1_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b0 ig4=0b01 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=UZP1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=UZP1_advsimd cclass=UZP1_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING UZP2_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b1 ig4=0b01 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=UZP2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=UZP2_advsimd cclass=UZP2_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING XAR_VVV2_crypto3_imm6 => { name => 'Advanced SIMD', diagram => 'ig0=0b11001110100 Rm:u=0bxxxxx imm6:u=0bxxxxxx Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=XAR', metadata => 'alias=0 isa=A64 isaform=A64 arch_variant=ARMv8v2 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=crypto3_imm6 page=XAR_advsimd cclass=XAR_VVV2_crypto3_imm6', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', }; ENCODING XTN_asimdmisc_N => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0bxx ig2=0b10000 opcode=0b10010 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'advsimd-type=simd instr-class=advsimd isa=A64 mnemonic=XTN', docvars2 => 'shape=narrow', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=XTN_advsimd cclass=XTN_asimdmisc_N', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|EXTRACTION', }; ENCODING ZIP1_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b0 ig4=0b11 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=ZIP1', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=ZIP1_advsimd cclass=ZIP1_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING ZIP2_asimdperm_only => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q:u=0bx ig1=0b001110 size:u=0bxx ig2=0b0 Rm:u=0bxxxxx ig3=0b0 op:u=0b1 ig4=0b11 ig5=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', docvars => 'instr-class=advsimd isa=A64 mnemonic=ZIP2', metadata => 'alias=0 isa=A64 isaform=A64 alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdperm page=ZIP2_advsimd cclass=ZIP2_asimdperm_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|MISC', }; ENCODING MOV_DUP_asisdone_only => { name => 'Scalar', diagram => 'ig0=0b01 op=0b0 ig1=0b11110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0000 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', aliascond => 'Unconditionally', docvars => 'alias_mnemonic=MOV instr-class=advsimd isa=A64 mnemonic=DUP vector-xfer-type=scalar-from-element', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=DUP_asisdone_only alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asisdone page=MOV_DUP_advsimd_elt cclass=MOV_DUP_advsimd_elt_DUP_asisdone_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'DUP <V><d>, <Vn>.<T>[<index>]', }; ENCODING MOV_INS_asimdins_IV_v => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q=0b1 op=0b1 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4:u=0bxxxx ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', aliascond => 'Unconditionally', docvars => 'alias_mnemonic=MOV instr-class=advsimd isa=A64 mnemonic=INS vector-xfer-type=element-from-element', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=INS_asimdins_IV_v alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=MOV_INS_advsimd_elt cclass=MOV_INS_advsimd_elt_INS_asimdins_IV_v', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'INS <Vd>.<Ts>[<index1>], <Vn>.<Ts>[<index2>]', }; ENCODING MOV_INS_asimdins_IR_r => { name => 'Advanced SIMD', diagram => 'ig0=0b0 Q=0b1 op=0b0 ig1=0b01110000 imm5:u=0bxxxxx ig2=0b0 imm4=0b0011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', aliascond => 'Unconditionally', docvars => 'alias_mnemonic=MOV instr-class=advsimd isa=A64 mnemonic=INS vector-xfer-type=vector-from-general', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=INS_asimdins_IR_r alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=MOV_INS_advsimd_gen cclass=MOV_INS_advsimd_gen_INS_asimdins_IR_r', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'INS <Vd>.<Ts>[<index>], <R><n>', }; ENCODING MOV_ORR_asimdsame_only => { name => 'Three registers of the same type', diagram => 'ig0=0b0 Q:u=0bx U=0b0 ig1=0b01110 size:u=0b10 ig2=0b1 Rm:u=0bxxxxx opcode=0b00011 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', aliascond => 'Rm == Rn', docvars => 'advsimd-reguse=3reg-same advsimd-type=simd alias_mnemonic=MOV instr-class=advsimd isa=A64 mnemonic=ORR vector-xfer-type=vector-from-vector', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=ORR_asimdsame_only alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdsame page=MOV_ORR_advsimd_reg cclass=MOV_ORR_advsimd_reg_ORR_asimdsame_only', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'ORR <Vd>.<T>, <Vn>.<T>, <Vn>.<T>', }; ENCODING MOV_UMOV_asimdins_W_w => { name => '32-bit', diagram => 'ig0=0b0 Q:u=0b0 op=0b0 ig1=0b01110000 imm5:u=0bxx100 ig2=0b0 imm4=0b0111 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b0 && imm5 == 0bxx100', aliascond => 'Unconditionally', docvars => 'alias_mnemonic=MOV datatype=32 instr-class=advsimd isa=A64 mnemonic=UMOV vector-xfer-type=general-from-element', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=UMOV_asimdins_W_w alphaindex=FPSIMD datasize=32', tags => 'group=simd_dp iclass=asimdins page=MOV_UMOV_advsimd cclass=MOV_UMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'UMOV <Wd>, <Vn>.S[<index>]', }; ENCODING MOV_UMOV_asimdins_X_x => { name => '64-reg,UMOV-64-reg', diagram => 'ig0=0b0 Q:u=0b1 op=0b0 ig1=0b01110000 imm5:u=0bx1000 ig2=0b0 imm4=0b0111 ig3=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', bitdiffs => 'Q == 0b1 && imm5 == 0bx1000', aliascond => 'Unconditionally', docvars => 'alias_mnemonic=MOV atomic-ops=UMOV-64-reg instr-class=advsimd isa=A64 mnemonic=UMOV reg-type=64-reg vector-xfer-type=general-from-element', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=UMOV_asimdins_X_x alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdins page=MOV_UMOV_advsimd cclass=MOV_UMOV_advsimd_advsimd', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|DATA_TRANSFER', eq_to => 'UMOV <Xd>, <Vn>.D[<index>]', }; ENCODING MVN_NOT_asimdmisc_R => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U=0b1 ig1=0b01110 size=0b00 ig2=0b10000 opcode=0b00101 ig3=0b10 Rn:u=0bxxxxx Rd:u=0bxxxxx', aliascond => 'Unconditionally', docvars => 'advsimd-type=simd alias_mnemonic=MVN instr-class=advsimd isa=A64 mnemonic=NOT', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=NOT_asimdmisc_R alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdmisc page=MVN_NOT_advsimd cclass=MVN_NOT_advsimd_NOT_asimdmisc_R', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|BITWISE', eq_to => 'NOT <Vd>.<T>, <Vn>.<T>', }; ENCODING SXTL_SSHLL_asimdshf_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b0 ig1=0b011110 immh:u=0bxxxx immb:u=0b000 opcode=0b10100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', aliascond => 'BitCount(immh) == 1', docvars => 'advsimd-type=simd alias_mnemonic=SXTL instr-class=advsimd isa=A64 mnemonic=SSHLL', docvars2 => 'shape=long', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=SSHLL_asimdshf_L alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=SXTL_SSHLL_advsimd cclass=SXTL_SSHLL_advsimd_SSHLL_asimdshf_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SIGN_EXTEND|SIGNED', eq_to => 'SSHLL{2} <Vd>.<Ta>, <Vn>.<Tb>, #0', }; ENCODING UXTL_USHLL_asimdshf_L => { name => 'Vector', diagram => 'ig0=0b0 Q:u=0bx U:u=0b1 ig1=0b011110 immh:u=0bxxxx immb:u=0b000 opcode=0b10100 ig2=0b1 Rn:u=0bxxxxx Rd:u=0bxxxxx', cnsts => 'immh!=0b0000', aliascond => 'BitCount(immh) == 1', docvars => 'advsimd-type=simd alias_mnemonic=UXTL instr-class=advsimd isa=A64 mnemonic=USHLL', docvars2 => 'shape=long', metadata => 'alias=1 isa=A64 isaform=A64 aliasof=USHLL_asimdshf_L alphaindex=FPSIMD', tags => 'group=simd_dp iclass=asimdshf page=UXTL_USHLL_advsimd cclass=UXTL_USHLL_advsimd_USHLL_asimdshf_L', exceptions => 'ADVSIMDFPACCESSTRAP|UNCATEGORIZED', categories => 'ADVSIMD|SIGN_EXTEND|UNSIGNED', eq_to => 'USHLL{2} <Vd>.<Ta>, <Vn>.<Tb>, #0', }; 1;
MahdiSafsafi/opcodesDB
db/aarch64/fpsimd/encodings.pl
Perl
mit
638,520
package Parse::Template::ForLoop; use strict; our $VERSION = 0; use Perl::Module; use Error::Logical; use Data::Hub::Util qw(:all); use Error::Logical; # Note that options passed to ce:for persist and are available through the # context loop variable sub new { my $class = ref($_[0]) ? ref(shift) : shift; my $self = bless {}, $class; $$self{'parser'} = shift; $$self{'args'} = \@_; $$self{'meta'} = {}; for ('from', 'of', 'new') { if (my $var = $self->shift_arg($_)) { $$self{'parser'}->dequote(\$var); # $var new reflects found location $$self{'meta'}{$_} = $var; } } $self; } sub compile { my $self = shift; my $for_args = $$self{'parser'}->_eval_for_parse_args(@{$$self{'args'}}); my $bundle = undef; if (my $from = $$self{'meta'}{'from'}) { # Selecting items from a pre-defined set my $set = $$self{'parser'}->get_value(\$from); $set = curry(&$set()) if isa($set, 'CODE'); my $criteria = $$for_args{'targets'}; my $items = []; my $length = 0; foreach my $criterion (@$criteria) { $length++; my $subset = Data::Hub::Subset->new(); my $selected_keys = curry($$self{'parser'}->get_value(\$criterion)) or next; my $i = 0; # Index into selector-list for ($selected_keys->values) { $$subset{$i++} = $set->_get_value($_) if $set; } push @$items, { 'is_static' => 0, 'addr' => $criterion, 'item' => $subset, }; } $bundle = { 'length' => $length, 'items' => $items, }; } else { $bundle = $$self{'parser'}->_eval_for_fetch_items($$for_args{'targets'}); } my $result = $$self{'parser'}->_eval_for_exec($for_args, $bundle, $self); return $result; } sub shift_arg { my $self = shift; my $name = shift; my $result = undef; my $args = $$self{'args'}; for (my $i = 0; $i < @$args; $i++) { my $arg = $args->[$i]; if ($arg eq $name) { $result = $args->[$i+1]; $$self{'parser'}->get_value(\$result); splice @$args, $i, 2; $i--; } } return $result; } sub on_begin { #my $self = shift; #my ($struct, $result) = @_; } sub on_each { #my $self = shift; #my ($key, $result) = @_; } sub on_end { #my $self = shift; #my ($struct, $result) = @_; } 1;
ryangies/lsn-data-hub
src/lib/Parse/Template/ForLoop.pm
Perl
mit
2,288
package Devel::NYTProf::FileInfo; # fid_fileinfo use strict; use Carp; use Config; use List::Util qw(sum max); use Devel::NYTProf::Util qw(strip_prefix_from_paths trace_level); use Devel::NYTProf::Constants qw( NYTP_FIDf_HAS_SRC NYTP_FIDf_SAVE_SRC NYTP_FIDf_IS_FAKE NYTP_FIDf_IS_PMC NYTP_FIDf_IS_EVAL NYTP_FIDi_FILENAME NYTP_FIDi_EVAL_FID NYTP_FIDi_EVAL_LINE NYTP_FIDi_FID NYTP_FIDi_FLAGS NYTP_FIDi_FILESIZE NYTP_FIDi_FILEMTIME NYTP_FIDi_PROFILE NYTP_FIDi_EVAL_FI NYTP_FIDi_HAS_EVALS NYTP_FIDi_SUBS_DEFINED NYTP_FIDi_SUBS_CALLED NYTP_FIDi_elements NYTP_SCi_CALL_COUNT NYTP_SCi_INCL_RTIME NYTP_SCi_EXCL_RTIME NYTP_SCi_RECI_RTIME NYTP_SCi_REC_DEPTH NYTP_SCi_CALLING_SUB NYTP_SCi_elements ); # extra constants for private elements use constant { NYTP_FIDi_meta => NYTP_FIDi_elements + 1, NYTP_FIDi_cache => NYTP_FIDi_elements + 2, }; sub filename { shift->[NYTP_FIDi_FILENAME()] } sub eval_fid { shift->[NYTP_FIDi_EVAL_FID()] } sub eval_line { shift->[NYTP_FIDi_EVAL_LINE()] } sub fid { shift->[NYTP_FIDi_FID()] } sub size { shift->[NYTP_FIDi_FILESIZE()] } sub mtime { shift->[NYTP_FIDi_FILEMTIME()] } sub profile { shift->[NYTP_FIDi_PROFILE()] } sub flags { shift->[NYTP_FIDi_FLAGS()] } # if an eval then return fileinfo obj for the fid that executed the eval sub eval_fi { shift->[NYTP_FIDi_EVAL_FI()] } # is_eval is true only for simple string evals (doesn't consider NYTP_FIDf_IS_EVAL) sub is_eval { shift->[NYTP_FIDi_EVAL_FI()] ? 1 : 0 } sub is_fake { shift->flags & NYTP_FIDf_IS_FAKE } sub is_file { my $self = shift; return not ($self->is_fake or $self->is_eval or $self->flags & NYTP_FIDf_IS_EVAL()); } # general purpose hash - mainly a hack to help kill off Reader.pm sub meta { shift->[NYTP_FIDi_meta()] ||= {} } # general purpose cache sub cache { shift->[NYTP_FIDi_cache()] ||= {} } # array of fileinfo's for each string eval in the file sub has_evals { my ($self, $include_nested) = @_; my $eval_fis = $self->[NYTP_FIDi_HAS_EVALS()] or return; return @$eval_fis if !$include_nested; my @eval_fis = @$eval_fis; # walk down tree of nested evals, adding them to @fi for (my $i=0; my $fi = $eval_fis[$i]; ++$i) { push @eval_fis, $fi->has_evals(0); } return @eval_fis; } sub sibling_evals { my ($self) = @_; my $parent_fi = $self->eval_fi or return; # not an eval my $eval_line = $self->eval_line; return grep { $_->eval_line == $eval_line } $parent_fi->has_evals; } sub _nullify { my $self = shift; @$self = (); # Zap! } # return subs defined as list of SubInfo objects sub subs_defined { my ($self, $incl_nested_evals) = @_; return map { $_->subs_defined(0) } $self, $self->has_evals(1) if $incl_nested_evals; return values %{ $self->[NYTP_FIDi_SUBS_DEFINED()] }; } sub subs_defined_sorted { my ($self, $incl_nested_evals) = @_; return sort { $a->subname cmp $b->subname } $self->subs_defined($incl_nested_evals); } sub _remove_sub_defined { my ($self, $si) = @_; my $subname = $si->subname; delete $self->[NYTP_FIDi_SUBS_DEFINED()]->{$subname} or carp sprintf "_remove_sub_defined: sub %s wasn't defined in %d %s", $subname, $self->fid, $self->filename; } sub _add_new_sub_defined { my ($self, $subinfo) = @_; my $subname = $subinfo->subname; my $subs_defined = $self->[NYTP_FIDi_SUBS_DEFINED()] ||= {}; my $existing_si = $subs_defined->{$subname}; croak sprintf "sub %s already defined in fid %d %s", $subname, $self->fid, $self->filename if $existing_si; $subs_defined->{$subname} = $subinfo; } =head2 sub_call_lines $hash = $fi->sub_call_lines; Returns a reference to a hash containing information about subroutine calls made at individual lines within the source file. Returns undef if no subroutine calling information is available. The keys of the returned hash are line numbers. The values are references to hashes with fully qualified subroutine names as keys. Each hash value is an reference to an array containing an integer call count (how many times the sub was called from that line of that file) and an inclusive time (how much time was spent inside the sub when it was called from that line of that file). For example, if the following was line 42 of a file C<foo.pl>: ++$wiggle if foo(24) == bar(42); that line was executed once, and foo and bar were imported from pkg1, then sub_call_lines() would return something like: { 42 => { 'pkg1::foo' => [ 1, 0.02093 ], 'pkg1::bar' => [ 1, 0.00154 ], }, } =cut sub sub_call_lines { shift->[NYTP_FIDi_SUBS_CALLED()] } =head2 evals_by_line # { line => { fid_of_eval_at_line => $fi, ... }, ... } $hash = $fi->evals_by_line; Returns a reference to a hash containing information about string evals executed at individual lines within a source file. The keys of the returned hash are line numbers. The values are references to hashes with file id integers as keys and FileInfo objects as values. =cut sub evals_by_line { my ($self) = @_; # find all fids that have have this fid as an eval_fid # { line => { fid_of_eval_at_line => $fi, ... } } my %evals_by_line; for my $fi ($self->has_evals) { $evals_by_line{ $fi->eval_line }->{ $fi->fid } = $fi; } return \%evals_by_line; } sub line_time_data { my ($self, $levels) = @_; $levels ||= [ 'line' ]; # XXX this can be optimized once the fidinfo contains directs refs to the data my $profile = $self->profile; my $fid = $self->fid; for my $level (@$levels) { my $fid_ary = $profile->get_fid_line_data($level); return $fid_ary->[$fid] if $fid_ary && $fid_ary->[$fid]; } return undef; } sub excl_time { # total exclusive time for fid my $self = shift; my $line_data = $self->line_time_data([qw(sub block line)]) || return undef; my $excl_time = 0; for (@$line_data) { next unless $_; $excl_time += $_->[0]; } return $excl_time; } sub sum_of_stmts_count { my ($self, $incl_nested_evals) = @_; return sum(map { $_->sum_of_stmts_count(0) } $self, $self->has_evals(1)) if $incl_nested_evals; my $ref = \$self->cache->{NYTP_FIDi_sum_stmts_count}; $$ref = $self->_sum_of_line_time_data(1) if not defined $$ref; return $$ref; } sub sum_of_stmts_time { my ($self, $incl_nested_evals) = @_; return sum(map { $_->sum_of_stmts_time(0) } $self, $self->has_evals(1)) if $incl_nested_evals; my $ref = \$self->cache->{NYTP_FIDi_sum_stmts_times}; $$ref = $self->_sum_of_line_time_data(0) if not defined $$ref; return $$ref; } sub _sum_of_line_time_data { my ($self, $idx) = @_; my $line_time_data = $self->line_time_data; my $sum = 0; $sum += $_->[$idx]||0 for @$line_time_data; return $sum; } sub outer { my ($self, $recurse) = @_; my $fi = $self->eval_fi or return; my $prev = $self; while ($recurse and my $eval_fi = $fi->eval_fi) { $prev = $fi; $fi = $eval_fi; } return $fi unless wantarray; return ($fi, $prev->eval_line); } sub is_pmc { return (shift->flags & NYTP_FIDf_IS_PMC()); } sub collapse_sibling_evals { my ($self, $survivor_fi, @donors) = @_; my $profile = $self->profile; die "Can't collapse_sibling_evals of non-sibling evals" if grep { $_->eval_fid != $survivor_fi->eval_fid or $_->eval_line != $survivor_fi->eval_line } @donors; my $s_ltd = $survivor_fi->line_time_data; # XXX line only my $s_scl = $survivor_fi->sub_call_lines; my %donor_fids; for my $donor_fi (@donors) { # copy data from donor to survivor_fi then delete donor my $donor_fid = $donor_fi->fid; $donor_fids{$donor_fid} = $donor_fi; warn sprintf "collapse_sibling_evals: processing donor fid %d: %s\n", $donor_fid, $donor_fi->filename if trace_level() >= 3; # XXX nested evals not handled yet warn sprintf "collapse_sibling_evals: nested evals in %s not handled", $donor_fi->filename if $donor_fi->has_evals; # for each sub defined in the donor, # move the sub definition to the survivor if (my @subs_defined = $donor_fi->subs_defined) { for my $si (@subs_defined) { warn sprintf " - moving from fid %d: sub %s\n", $donor_fid, $si->subname if trace_level() >= 4; $si->_alter_fileinfo($donor_fi, $survivor_fi); warn sprintf " - moving done\n" if trace_level() >= 4; } } # for each sub call made by the donor, # move the sub calls to the survivor # 1 => { 'main::foo' => [ 1, '1.38e-05', '1.24e-05', ..., { 'main::RUNTIME' => undef } ] } if (my $sub_call_lines = $donor_fi->sub_call_lines) { my %subnames_called_by_donor; # merge details of subs called from $donor_fi while ( my ($line, $sc_hash) = each %$sub_call_lines ) { my $s_sc_hash = $s_scl->{$line} ||= {}; for my $subname (keys %$sc_hash ) { my $s_sc_info = $s_sc_hash->{$subname} ||= []; my $sc_info = delete $sc_hash->{$subname}; Devel::NYTProf::SubInfo::_merge_in_caller_info($s_sc_info, $sc_info, tag => "line $line calls to $subname", ); $subnames_called_by_donor{$subname}++; } } %$sub_call_lines = (); # zap # update subinfo (NYTP_SIi_CALLED_BY) $profile->subinfo_of($_)->_alter_called_by_fileinfo($donor_fi, $survivor_fi) for keys %subnames_called_by_donor; } # copy line time data my $d_ltd = $donor_fi->line_time_data || []; # XXX line only for my $line (0..@$d_ltd-1) { my $d_tld_l = $d_ltd->[$line] or next; my $s_tld_l = $s_ltd->[$line] ||= []; $s_tld_l->[$_] += $d_tld_l->[$_] for (0..@$d_tld_l-1); warn sprintf "%d:%d: @$s_tld_l from @$d_tld_l fid:%d\n", $survivor_fi->fid, $line, $donor_fid if 0; } push @{ $survivor_fi->meta->{merged_fids} }, $donor_fid; ++$survivor_fi->meta->{merged_fids_src_varied} if $donor_fi->src_digest ne $survivor_fi->src_digest; $donor_fi->_nullify; } # remove donors from parent NYTP_FIDi_HAS_EVALS if (my $eval_fis = $self->[NYTP_FIDi_HAS_EVALS()]) { my %donors = map { +"$_" => 1 } @donors; my $count = @$eval_fis; @$eval_fis = grep { !$donors{$_} } @$eval_fis; warn "_delete_eval mismatch" if @$eval_fis != $count - @donors; } # update sawampersand_fid if it's one of the now-dead donors if ($donor_fids{ $profile->attributes->{sawampersand_fid} || 0 }) { $profile->attributes->{sawampersand_fid} = $survivor_fi->fid; } # now the fid merging is complete... # look for any anon subs that are effectively duplicates # (ie have the same name except for eval seqn) # if more than one for any given name we merge them if (my @subs_defined = $survivor_fi->subs_defined_sorted) { # bucket anon subs by normalized name my %newname; for my $si (@subs_defined) { next unless $si->is_anon; (my $newname = $si->subname) =~ s/ \( ((?:re_)?) eval \s \d+ \) /(${1}eval 0)/xg; push @{ $newname{$newname} }, $si; } while ( my ($newname, $to_merge) = each %newname ) { my $survivor_si = shift @$to_merge; next unless @$to_merge; # nothing to do my $survivor_subname = $survivor_si->subname; warn sprintf "collapse_sibling_evals: merging %d subs into %s: %s\n", scalar @$to_merge, $survivor_subname, join ", ", map { $_->subname } @$to_merge if trace_level() >= 3; for my $delete_si (@$to_merge) { my $delete_subname = $delete_si->subname; # for every file that called this sub, find the lines that made the calls # and change the name to the new sub for my $caller_fid ($delete_si->caller_fids) { my $caller_fi = $profile->fileinfo_of($caller_fid); # sub_call_lines ==> { line => { sub => ... } } for my $subs_called_on_line (values %{ $caller_fi->sub_call_lines }) { my $sc_info = delete $subs_called_on_line->{$delete_subname} or next; my $s_sc_info = $subs_called_on_line->{$survivor_subname} ||= []; Devel::NYTProf::SubInfo::_merge_in_caller_info($s_sc_info, $sc_info, tag => "collapse eval $delete_subname", ); } } $survivor_si->merge_in($delete_si); $survivor_fi->_remove_sub_defined($delete_si); $profile->_disconnect_subinfo($delete_si); } } } warn sprintf "collapse_sibling_evals done for ".$survivor_fi->filename."\n" if trace_level() >= 2; return $survivor_fi; } # Should return the filename that the application used when loading the file # For evals should remove the @INC portion from within the "(eval N)[$path]" # and similarly for Class::MOP #line evals "... defined at $path". # This is a bit of a fudge. Filename handling should be improved in the profiler. sub filename_without_inc { my $self = shift; my $f = [$self->filename]; strip_prefix_from_paths([$self->profile->inc], $f, qr/(?: ^ | \[ | \sdefined\sat\s )/x ); return $f->[0]; } sub abs_filename { my $self = shift; my $filename = $self->filename; # strip of autosplit annotation, if any $filename =~ s/ \(autosplit into .*//; # if it's a .pmc then assume that's the file we want to look at # (because the main use for .pmc's are related to perl6) $filename .= "c" if $self->is_pmc; # search profile @INC if filename is not absolute my @files = ($filename); if ($filename !~ m/^\//) { my @inc = $self->profile->inc; @files = map { "$_/$filename" } @inc; } for my $file (@files) { return $file if -f $file; } # returning the still-relative filename is better than returning an undef return $filename; } # has source code stored within the profile data file sub has_savesrc { my $self = shift; return $self->profile->{fid_srclines}[ $self->fid ]; } sub srclines_array { my $self = shift; if (my $srclines = $self->has_savesrc) { my $copy = [ @$srclines ]; # shallow clone shift @$copy; # line 0 not used return $copy; } my $filename = $self->abs_filename; if (open my $fh, "<", $filename) { return [ <$fh> ]; } return undef; } sub src_digest { my $self = shift; return $self->cache->{src_digest} ||= do { my $srclines_array = $self->srclines_array || []; my $src = join "\n", @$srclines_array; # return empty string for digest if there's no src ($src) ? join ",", ( scalar @$srclines_array, # number of lines length $src, # total length unpack("%32C*",$src) ) # 32-bit checksum : ''; }; } sub normalize_for_test { my $self = shift; # normalize eval sequence numbers in 'file' names to 0 $self->[NYTP_FIDi_FILENAME] =~ s/ \( ((?:re_)?) eval \s \d+ \) /(${1}eval 0)/xg if not $ENV{NYTPROF_TEST_SKIP_EVAL_NORM}; # normalize flags to avoid failures due to savesrc and perl version $self->[NYTP_FIDi_FLAGS] &= ~(NYTP_FIDf_HAS_SRC|NYTP_FIDf_SAVE_SRC); # '1' => { 'main::foo' => [ 1, '1.38e-05', '1.24e-05', ..., { 'main::RUNTIME' => undef } ] } for my $subscalled (values %{ $self->sub_call_lines }) { for my $subname (keys %$subscalled) { my $sc = $subscalled->{$subname}; $sc->[NYTP_SCi_INCL_RTIME] = $sc->[NYTP_SCi_EXCL_RTIME] = $sc->[NYTP_SCi_RECI_RTIME] = 0; if (not $ENV{NYTPROF_TEST_SKIP_EVAL_NORM}) { # normalize eval sequence numbers in anon sub names to 0 (my $newname = $subname) =~ s/ \( ((?:re_)?) eval \s \d+ \) /(${1}eval 0)/xg; if ($newname ne $subname) { warn "Normalizing $subname to $newname overwrote other called-by data\n" if $subscalled->{$newname}; $subscalled->{$newname} = delete $subscalled->{$subname}; } } } } } sub summary { my ($fi) = @_; return sprintf "fid%d: %s", $fi->fid, $fi->filename_without_inc; } sub dump { my ($self, $separator, $fh, $path, $prefix, $opts) = @_; my @values = @{$self}[ NYTP_FIDi_FILENAME, NYTP_FIDi_EVAL_FID, NYTP_FIDi_EVAL_LINE, NYTP_FIDi_FID, NYTP_FIDi_FLAGS, NYTP_FIDi_FILESIZE, NYTP_FIDi_FILEMTIME ]; $values[0] = $self->filename_without_inc; # also remove possible remaining perl version seen in some cpantesters # http://www.cpantesters.org/cpan/report/bf913910-bfdd-11df-a657-c9f38a00995b $values[0] =~ s!^$Config{version}/!!o; printf $fh "%s[ %s ]\n", $prefix, join(" ", map { defined($_) ? $_ : 'undef' } @values); if (not $opts->{skip_internal_details}) { for my $si ($self->subs_defined_sorted) { my ($fl, $ll) = ($si->first_line, $si->last_line); defined $_ or $_ = 'undef' for ($fl, $ll); printf $fh "%s%s%s%s%s%s-%s\n", $prefix, 'sub', $separator, $si->subname(' and '), $separator, $fl, $ll; } # { line => { subname => [...] }, ... } my $sub_call_lines = $self->sub_call_lines; for my $line (sort { $a <=> $b } keys %$sub_call_lines) { my $subs_called = $sub_call_lines->{$line}; for my $subname (sort keys %$subs_called) { my @sc = @{$subs_called->{$subname}}; $sc[NYTP_SCi_CALLING_SUB] = join "|", keys %{ $sc[NYTP_SCi_CALLING_SUB] }; printf $fh "%s%s%s%s%s%s%s[ %s ]\n", $prefix, 'call', $separator, $line, $separator, $subname, $separator, join(" ", map { defined($_) ? $_ : 'undef' } @sc) } } # string evals, group by the line the eval is on my %eval_lines; for my $eval_fi ($self->has_evals(0)) { push @{ $eval_lines{ $eval_fi->eval_line } }, $eval_fi; } for my $line (sort { $a <=> $b } keys %eval_lines) { my $eval_fis = $eval_lines{$line}; my @has_evals = map { $_->has_evals(1) } @$eval_fis; my @merged_fids = map { @{ $_->meta->{merged_fids}||[]} } @$eval_fis; printf $fh "%s%s%s%d%s[ count %d nested %d merged %d ]\n", $prefix, 'eval', $separator, $eval_fis->[0]->eval_line, $separator, scalar @$eval_fis, # count of evals executed on this line scalar @has_evals, # count of nested evals they executed scalar @merged_fids, # count of evals merged (collapsed) away } } } # vim: ts=8:sw=4:et 1;
amidoimidazol/bio_info
Beginning Perl for Bioinformatics/lib/Devel/NYTProf/FileInfo.pm
Perl
mit
19,877
package OAuth::Lite2::ParamMethod::AuthHeader; use strict; use warnings; use bytes (); use parent 'OAuth::Lite2::ParamMethod'; use URI; use MIME::Base64 qw(decode_base64); use Hash::MultiValue; use HTTP::Request; use HTTP::Headers; use Params::Validate; use OAuth::Lite2::Util qw(encode_param decode_param build_content); =head1 NAME OAuth::Lite2::ParamMethod::AuthHeader - builder/parser for OAuth 2.0 AuthHeader type of parameter =head1 SYNOPSIS my $meth = OAuth::Lite2::ParamMethod::AuthHeader->new; # server side if ($meth->match( $plack_request )) { my ($token, $params) = $meth->parse( $plack_request ); } # client side my $http_req = $meth->request_builder(...); =head1 DESCRIPTION builder/parser for OAuth 2.0 AuthHeader type of parameter =head1 METHODS =head2 new Constructor =head2 match( $plack_request ) Returns true if passed L<Plack::Request> object is matched for the type of this method. if ( $meth->match( $plack_request ) ) { ... } =cut sub match { my ($self, $req) = @_; my $header = $req->header("Authorization"); return ($header && $header =~ /^\s*(OAuth|Bearer)(.*)$/); } =head2 parse( $plack_request ) Parse the L<Plack::Request>, and returns access token and oauth parameters. my ($token, $params) = $meth->parse( $plack_request ); =cut sub parse { my ($self, $req) = @_; my $header = $req->header("Authorization"); my $token; if ($header =~ s/^\s*(OAuth|Bearer)\s+([^\s\,]*)//){ $token = $2; } my $params = Hash::MultiValue->new; $header =~ s/^\s*(OAuth|Bearer)\s*([^\s\,]*)//; if ($header) { $header =~ s/^\s*\,\s*//; for my $attr (split /,\s*/, $header) { my ($key, $val) = split /=/, $attr, 2; $val =~ s/^"//; $val =~ s/"$//; $params->add($key, decode_param($val)); } } return ($token, $params); } =head2 build_request( %params ) Build L<HTTP::Request> object. my $req = $meth->build_request( url => $url, method => $http_method, token => $access_token, oauth_params => $oauth_params, params => $params, content => $content, headers => $headers, ); =cut sub build_request { my $self = shift; my %args = Params::Validate::validate(@_, { url => 1, method => 1, token => 1, oauth_params => 1, params => { optional => 1 }, content => { optional => 1 }, headers => { optional => 1 }, }); my $oauth_params = $args{oauth_params} || {}; my @pairs = sort map { sprintf q{%s="%s"}, encode_param($_), encode_param($oauth_params->{$_}) } keys %$oauth_params; my $params = $args{params} || {}; my $method = uc $args{method}; my $headers = $args{headers}; if (defined $headers) { if (ref($headers) eq 'ARRAY') { $headers = HTTP::Headers->new(@$headers); } else { $headers = $headers->clone; } } else { $headers = HTTP::Headers->new; } my $auth_header = sprintf(q{Bearer %s}, $args{token}); $auth_header .= ", " . join(", ", @pairs) if @pairs > 0; $headers->header(Authorization => $auth_header); if ($method eq 'GET' || $method eq 'DELETE') { my $url = URI->new($args{url}); $url->query_form(%$params); my $req = HTTP::Request->new($method, $url->as_string, $headers); return $req; } else { unless ($headers->header("Content-Type")) { $headers->header("Content-Type", "application/x-www-form-urlencoded"); } my $content_type = $headers->header("Content-Type"); my $content = ($content_type eq "application/x-www-form-urlencoded") ? build_content($params) : $args{content} || build_content($params); $headers->header("Content-Length", bytes::length($content)); my $req = HTTP::Request->new($method, $args{url}, $headers, $content); return $req; } } =head2 is_legacy( $plack_request ) Returns true if passed L<Plack::Request> object is based draft version 10. if ( $meth->is_legacy( $plack_request ) ) { ... } =cut sub is_legacy { my ($self, $req) = @_; my $header = $req->header("Authorization"); return ($header && $header =~ /^\s*OAuth(.*)$/); } =head2 basic_clientcredentials( $plack_request ) Returns Hash reference if passed L<Plack::Request> object has client credentials in Authorization header. my $basic_clientcredentials = $meth->basic_credentials( $plack_request ); if( defined($basic_clientcredentials) ){ my $client_id = $basic_clientcredentials->{client_id}; my $client_secret = $basic_clientcredentials->{client_secret}; } =cut sub basic_credentials{ my ($self, $req) = @_; my %credentials = ( client_id => '', client_secret => '' ); my $header = $req->header("Authorization"); return \%credentials unless (defined($header)); my $decoded; if ( $header =~ /\A\s*(Basic)\s([^\s\,]*)/ ){ $decoded = decode_base64($2); return \%credentials unless (index($decoded,':') > 0); my @split_credentials = split(/:/, $decoded); return \%credentials unless (scalar(@split_credentials) == 2); %credentials = ( client_id => $split_credentials[0], client_secret => $split_credentials[1] ); } return \%credentials; }; =head1 SEE ALSO L<OAuth::Lite2::ParamMethods> L<OAuth::Lite2::ParamMethod> L<OAuth::Lite2::ParamMethod::FormEncodedBody> L<OAuth::Lite2::ParamMethod::URIQueryParameter> =head1 AUTHOR Lyo Kato, E<lt>lyo.kato@gmail.comE<gt> =head1 COPYRIGHT AND LICENSE Copyright (C) 2010 by Lyo Kato This library is free software; you can redistribute it and/or modify it under the same terms as Perl itself, either Perl version 5.8.8 or, at your option, any later version of Perl 5 you may have available. =cut 1;
movabletype/mt-plugin-google-openid-connect
plugins/GoogleOpenIDConnect/extlib/OAuth/Lite2/ParamMethod/AuthHeader.pm
Perl
mit
6,145
package # Date::Manip::TZ::amcost00; # Copyright (c) 2008-2015 Sullivan Beck. All rights reserved. # This program is free software; you can redistribute it and/or modify it # under the same terms as Perl itself. # This file was automatically generated. Any changes to this file will # be lost the next time 'tzdata' is run. # Generated on: Wed Nov 25 11:33:42 EST 2015 # Data version: tzdata2015g # Code version: tzcode2015g # This module contains data from the zoneinfo time zone database. The original # data was obtained from the URL: # ftp://ftp.iana.org/tz use strict; use warnings; require 5.010000; our (%Dates,%LastRule); END { undef %Dates; undef %LastRule; } our ($VERSION); $VERSION='6.52'; END { undef $VERSION; } %Dates = ( 1 => [ [ [1,1,2,0,0,0],[1,1,1,18,23,47],'-05:36:13',[-5,-36,-13], 'LMT',0,[1890,1,1,5,36,12],[1889,12,31,23,59,59], '0001010200:00:00','0001010118:23:47','1890010105:36:12','1889123123:59:59' ], ], 1890 => [ [ [1890,1,1,5,36,13],[1890,1,1,0,0,0],'-05:36:13',[-5,-36,-13], 'SJMT',0,[1921,1,15,5,36,12],[1921,1,14,23,59,59], '1890010105:36:13','1890010100:00:00','1921011505:36:12','1921011423:59:59' ], ], 1921 => [ [ [1921,1,15,5,36,13],[1921,1,14,23,36,13],'-06:00:00',[-6,0,0], 'CST',0,[1979,2,25,5,59,59],[1979,2,24,23,59,59], '1921011505:36:13','1921011423:36:13','1979022505:59:59','1979022423:59:59' ], ], 1979 => [ [ [1979,2,25,6,0,0],[1979,2,25,1,0,0],'-05:00:00',[-5,0,0], 'CDT',1,[1979,6,3,4,59,59],[1979,6,2,23,59,59], '1979022506:00:00','1979022501:00:00','1979060304:59:59','1979060223:59:59' ], [ [1979,6,3,5,0,0],[1979,6,2,23,0,0],'-06:00:00',[-6,0,0], 'CST',0,[1980,2,24,5,59,59],[1980,2,23,23,59,59], '1979060305:00:00','1979060223:00:00','1980022405:59:59','1980022323:59:59' ], ], 1980 => [ [ [1980,2,24,6,0,0],[1980,2,24,1,0,0],'-05:00:00',[-5,0,0], 'CDT',1,[1980,6,1,4,59,59],[1980,5,31,23,59,59], '1980022406:00:00','1980022401:00:00','1980060104:59:59','1980053123:59:59' ], [ [1980,6,1,5,0,0],[1980,5,31,23,0,0],'-06:00:00',[-6,0,0], 'CST',0,[1991,1,19,5,59,59],[1991,1,18,23,59,59], '1980060105:00:00','1980053123:00:00','1991011905:59:59','1991011823:59:59' ], ], 1991 => [ [ [1991,1,19,6,0,0],[1991,1,19,1,0,0],'-05:00:00',[-5,0,0], 'CDT',1,[1991,7,1,4,59,59],[1991,6,30,23,59,59], '1991011906:00:00','1991011901:00:00','1991070104:59:59','1991063023:59:59' ], [ [1991,7,1,5,0,0],[1991,6,30,23,0,0],'-06:00:00',[-6,0,0], 'CST',0,[1992,1,18,5,59,59],[1992,1,17,23,59,59], '1991070105:00:00','1991063023:00:00','1992011805:59:59','1992011723:59:59' ], ], 1992 => [ [ [1992,1,18,6,0,0],[1992,1,18,1,0,0],'-05:00:00',[-5,0,0], 'CDT',1,[1992,3,15,4,59,59],[1992,3,14,23,59,59], '1992011806:00:00','1992011801:00:00','1992031504:59:59','1992031423:59:59' ], [ [1992,3,15,5,0,0],[1992,3,14,23,0,0],'-06:00:00',[-6,0,0], 'CST',0,[9999,12,31,0,0,0],[9999,12,30,18,0,0], '1992031505:00:00','1992031423:00:00','9999123100:00:00','9999123018:00:00' ], ], ); %LastRule = ( ); 1;
jkb78/extrajnm
local/lib/perl5/Date/Manip/TZ/amcost00.pm
Perl
mit
3,374
#!/usr/bin/env perl use FindBin; use lib "$FindBin::Bin/../lib"; use MyApp; MyApp->dance;
xsawyerx/dancer-training-notes
00-scaffolding/MyApp/bin/app.pl
Perl
mit
92
:- module(bc_api_io, [ bc_reply_success/1, % +Dict bc_reply_error/1, % +Message bc_read_by_schema/2 % +Schema, -Dict ]). :- use_module(library(http/http_json)). :- use_module(library(http/http_wrapper)). :- use_module(library(dict_schema)). %! bc_read_by_schema(+Schema, -Dict) is det. % % Reads dict from JSON request % and validates it against the schema. % Throws error(invalid_input(Errors)) when % input data contains validation errors. bc_read_by_schema(Schema, Dict):- http_current_request(Request), http_read_json_dict(Request, Raw), convert(Raw, Schema, Dict, Errors), ( Errors = [] ; throw(error(invalid_input(Errors)))), !. %! bc_reply_success(+Data) is det. % % Sends JSON response with Data % and success status. bc_reply_success(Data):- write('Cache-Control: no-cache\r\n'), reply_json(_{ status: success, data: Data }). %! bc_reply_error(+Message) is det. % % Sends error JSON response with Message. bc_reply_error(Message):- write('Cache-Control: no-cache\r\n'), reply_json(_{ status: error, message: Message }).
rla/blog-core
prolog/bc/bc_api_io.pl
Perl
mit
1,090
# Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute # Copyright [2016-2017] EMBL-European Bioinformatics Institute # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. =head1 NAME Bio::EnsEMBL::Analysis::Runnable::Funcgen::TileMap =head1 SYNOPSIS my $runnable = Bio::EnsEMBL::Analysis::Runnable::Funcgen::TileMap->new ( -analysis => $analysis, -query => 'slice', -program => 'program.pl', ); $runnable->run; my @features = @{$runnable->output}; =head1 DESCRIPTION TileMap expects to run the program TileMap (Ji and Wong (2005), PMID: 16046496) and predicts features which can be stored in the annotated_feature table in the eFG database =head1 AUTHOR Stefan Graf, Ensembl Functional Genomics - http://www.ensembl.org =head1 CONTACT Post questions to the Ensembl development list: http://lists.ensembl.org/mailman/listinfo/dev =cut package Bio::EnsEMBL::Analysis::Runnable::Funcgen::TileMap; use strict; use warnings; use Data::Dumper; use Bio::EnsEMBL::Analysis::Runnable; use Bio::EnsEMBL::Analysis::Runnable::Funcgen; use Bio::EnsEMBL::Utils::Exception qw(throw warning); use Bio::EnsEMBL::Utils::Argument qw( rearrange ); use vars qw(@ISA); @ISA = qw(Bio::EnsEMBL::Analysis::Runnable::Funcgen); =head2 write_infile Arg [1] : Bio::EnsEMBL::Analysis::Runnable::TileMap Arg [2] : filename Description : Returntype : Exceptions : Example : =cut sub write_infile { my ($self, $filename) = @_; if (! $filename) { $filename = $self->infile(); } # determine both number of result sets (replicates/arrays) and features my $noa = scalar(keys %{$self->result_features}); warn("\tNo. of result sets: ". $noa); my $nof = scalar(@{(values %{$self->result_features})[0]}); warn("\tNo. of result features: ". $nof); # dump features my $header = join("\t", 'chromosome', 'position', keys %{$self->result_features}); $header .= "\tDUMMY" if ($noa == 1); open(F, ">".$filename) or throw("Can't open file $filename."); print F $header, "\n"; #print Dumper $self->result_features; for (my $i=0; $i<$nof; $i++) { my $coord=0; foreach my $rset (values %{$self->result_features}) { print F join("\t", ${$rset}[$i][0], ${$rset}[$i][1]) unless ($coord); $coord=1; #why do we have to invert the score here??? print F "\t".(-1*${$rset}[$i][3]); } print F "\t0" if ($noa == 1); print F "\n"; } close F; warn("\tresult features written to ".$filename); my $workdir = $self->workdir.'/'.$self->analysis->module(); #warn("\tworkdir: ".$workdir); # write config and cmpinfo files from templates (my $project = $filename) =~ s,.+/(.+)\.dat,$1,; # program parameters warn('ANALYSIS PARAMETERS: '.$self->analysis->parameters); my %parameters = (); map { my ($key, $value) = split (/=/); $parameters{$key} = $value; } split(/;\s+/, $self->analysis->parameters); #print Dumper %parameters; my $config = $workdir.'/'.$project.'_args.txt'; #print Dumper $config; $self->config_file($config); my $template_file = $parameters{TEMPLATE_FILE}; open(IN, $template_file) or throw("Can't open config file $template_file"); open(OUT, ">$config") or throw("Can't open config file $config"); map { s,^(O.1-.+=).+$,$1 $workdir,; #[Working directory] s,^(O.2-.+=).+$,$1 $project,; #[Project Title] s,^(I.2-.+=).+$,$1 $project.dat,; #[Raw data file] s,^(I.3-.+=).+$,$1 2,; #[Range of test-statistics] (0: default; 1: [0,1], 2: (-inf, +inf)) s,^(II.1-.+=).+$,$1 0,; #[Apply local repeat filter?] (0:No; 1:Yes) s,^(II.2-.+=).+$,$1 NULL,; #[*.refmask file] s,^(III.2-.+=).+$,$1 $parameters{METHOD},; #[Method to combine neighboring probes] (0:HMM, 1:MA) s,^(IV.1-.+=).+$,$1 $parameters{POSTPROB},; #[Posterior probability >] s,^(IV.2-.+=).+$,$1 $parameters{MAXGAP},; #[Maximal gap allowed] (1000: default) s,^(IV.4-.+=).+$,$1 0,; #[Provide your own selection statistics?] (0: No, use default; 1: Yes) s,^(IV.5-.+=).+$,$1 NULL,; #[If Yes to IV.4, selection statistics file] s,^(IV.10-.+=).+$,$1 $parameters{HYBLENGTH},; #[Expected hybridization length] s,^(V.2-.+=).+$,$1 $parameters{MAXGAP},; #[Maximal gap allowed] (500: default) print OUT; } <IN>; close IN; close OUT; my $cmpinfo = $workdir.'/'.$project.'.cmpinfo'; warn("cmp info file: $cmpinfo"); open(CMP, ">$cmpinfo") or throw("Can't open cmpinfo file $cmpinfo"); my $array_no = ($noa == 1)? '2' : $noa; my $group_no = ($noa == 1)? '2' : 1; my $groups = ($noa == 1)? '1 2' : '1 'x $noa; warn("array_no: " . $array_no); warn("group_no: " . $group_no); warn("groups: " . $groups); print CMP <<EOCMP; ############################## # TileMap Comparison Info # ############################## ############################## # Basic Info # ############################## [Array number] = $array_no [Group number] = $group_no [Group ID] $groups ############################## # Patterns of Interest # ############################## [Comparisons] 1>2 ############################## # Preprocessing # ############################## [Truncation lower bound] = -1000000000000.0 [Take log2 before calculation?] (1:yes; 0:no) = 0 ############################## # Simulation Setup # ############################## [Monte Carlo draws for posterior prob.] = 0 ############################## # Common Variance Groups # ############################## [Common variance groups] = 1 $groups ############################## # Permutation Setup # ############################## [Number of permutations] = 0 [Exchangeable groups] = 1 $groups EOCMP close OUT; #system("cp $cmpinfo_template $cmpinfo"); my $ext; if ($parameters{METHOD}) { $ext = '_ma'; } else { $ext = '_hmm'; } # UCSC *.bed file to report significant regions. # Regions are sorted according to their genomic locations. my $results = $workdir.'/'.$project.$ext.'.bed'; # This .reg file is a tab-delimited file to report significant regions. # Regions are ranked according to their significance levels. #my $results = $workdir.'/'.$project.$ext.'.reg'; $self->resultsfile($results); # set columns (fields) for output my @fields = (1..2,4); # bed #my @fields = (0..2,6); # reg $self->output_fields(\@fields); return $filename; } =head2 run_analysis Arg [1] : Bio::EnsEMBL::Analysis::Runnable::TileMap Arg [2] : string, program name Usage : Description : Returns : Exceptions : =cut sub run_analysis { my ($self, $program) = @_; if(!$program){ $program = $self->program; } throw($program." is not executable TileMap::run_analysis ") unless($program && -x $program); my $command = $self->program . ' ' . $self->config_file(); warn("Running analysis " . $command . "\n"); system($command) == 0 or throw("FAILED to run $command: ".$?); } #=head2 infile # # Arg [1] : Bio::EnsEMBL::Analysis::Runnable::TileMap # Arg [2] : filename (string) # Description : will hold a given filename or if one is requested but none # defined it will use the create_filename method to create a filename # Returntype : string, filename # Exceptions : none # Example : # #=cut # # #sub infile{ # # my ($self, $filename) = @_; # # if($filename){ # $self->{'infile'} = $filename; # } # if(!$self->{'infile'}){ # $self->{'infile'} = $self->create_filename($self->analysis->logic_name, 'dat'); # } # # return $self->{'infile'}; # #} sub config_file { my $self = shift; $self->{'config_file'} = shift if(@_); return $self->{'config_file'}; } 1;
james-monkeyshines/ensembl-analysis
modules/Bio/EnsEMBL/Analysis/Runnable/Funcgen/TileMap.pm
Perl
apache-2.0
8,348
package Google::Ads::AdWords::v201809::RegionCodeError; use strict; use warnings; __PACKAGE__->_set_element_form_qualified(1); sub get_xmlns { 'https://adwords.google.com/api/adwords/cm/v201809' }; our $XML_ATTRIBUTE_CLASS; undef $XML_ATTRIBUTE_CLASS; sub __get_attr_class { return $XML_ATTRIBUTE_CLASS; } use base qw(Google::Ads::AdWords::v201809::ApiError); # Variety: sequence use Class::Std::Fast::Storable constructor => 'none'; use base qw(Google::Ads::SOAP::Typelib::ComplexType); { # BLOCK to scope variables my %fieldPath_of :ATTR(:get<fieldPath>); my %fieldPathElements_of :ATTR(:get<fieldPathElements>); my %trigger_of :ATTR(:get<trigger>); my %errorString_of :ATTR(:get<errorString>); my %ApiError__Type_of :ATTR(:get<ApiError__Type>); my %reason_of :ATTR(:get<reason>); __PACKAGE__->_factory( [ qw( fieldPath fieldPathElements trigger errorString ApiError__Type reason ) ], { 'fieldPath' => \%fieldPath_of, 'fieldPathElements' => \%fieldPathElements_of, 'trigger' => \%trigger_of, 'errorString' => \%errorString_of, 'ApiError__Type' => \%ApiError__Type_of, 'reason' => \%reason_of, }, { 'fieldPath' => 'SOAP::WSDL::XSD::Typelib::Builtin::string', 'fieldPathElements' => 'Google::Ads::AdWords::v201809::FieldPathElement', 'trigger' => 'SOAP::WSDL::XSD::Typelib::Builtin::string', 'errorString' => 'SOAP::WSDL::XSD::Typelib::Builtin::string', 'ApiError__Type' => 'SOAP::WSDL::XSD::Typelib::Builtin::string', 'reason' => 'Google::Ads::AdWords::v201809::RegionCodeError::Reason', }, { 'fieldPath' => 'fieldPath', 'fieldPathElements' => 'fieldPathElements', 'trigger' => 'trigger', 'errorString' => 'errorString', 'ApiError__Type' => 'ApiError.Type', 'reason' => 'reason', } ); } # end BLOCK 1; =pod =head1 NAME Google::Ads::AdWords::v201809::RegionCodeError =head1 DESCRIPTION Perl data type class for the XML Schema defined complexType RegionCodeError from the namespace https://adwords.google.com/api/adwords/cm/v201809. A list of all errors associated with the @RegionCode constraints. =head2 PROPERTIES The following properties may be accessed using get_PROPERTY / set_PROPERTY methods: =over =item * reason =back =head1 METHODS =head2 new Constructor. The following data structure may be passed to new(): =head1 AUTHOR Generated by SOAP::WSDL =cut
googleads/googleads-perl-lib
lib/Google/Ads/AdWords/v201809/RegionCodeError.pm
Perl
apache-2.0
2,541
package Search::Elasticsearch::Client::Direct; use parent 'Search::Elasticsearch::Client::1_0::Direct'; warn <<'END'; The Search::Elasticsearch::Client::Direct class is deprecated. Please specify the version of the API that you would like to use, eg: $e = Search::Elasticsearch->new( client => '1_0::Direct' # default ); END 1; __END__ # ABSTRACT: Deprecated =head1 DESCRIPTION This class has been deprecated. Please see the L<Search::Elasticsearch::Client::1_0::Direct> class instead.
jeteve/elasticsearch-perl
lib/Search/Elasticsearch/Client/Direct.pm
Perl
apache-2.0
523
=head1 LICENSE Copyright (c) 1999-2011 The European Bioinformatics Institute and Genome Research Limited. All rights reserved. This software is distributed under a modified Apache license. For license details, please see http://www.ensembl.org/info/about/code_licence.html =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <ensembl-dev@ebi.ac.uk>. Questions may also be sent to the Ensembl help desk at <helpdesk@ensembl.org>. =cut package Bio::EnsEMBL::Funcgen::Parsers::redfly; use strict; use File::Basename; # To get files for REDfly, download the following 2 GFF3 files (e.g. via wget): # # http://redfly.ccr.buffalo.edu/datadumps/tbfs_dump.gff # http://redfly.ccr.buffalo.edu/datadumps/crm_dump.gff #contact? #TFBS #2L REDfly regulatory_region 2456365 2456372 . . . ID="Unspecified_dpp:REDFLY:TF000068"; Dbxref="Flybase:FBgn0000490", "PMID:8543160", "REDfly:644, "FlyBase:"; Evidence="footprint/binding assay"; Factor="Unspecified"; Target="dpp"; #2L REDfly regulatory_region 2456352 2456369 . . . ID="dl_dpp:REDFLY:TF000069"; Dbxref="Flybase:FBgn0000490", "PMID:8458580", "REDfly:645, "FlyBase:FBgn0000463"; Evidence="footprint/binding assay"; Factor="dl"; Target="dpp"; #CRMs #2L REDfly regulatory_region 2455781 2457764 . . . ID="dpp_intron2"; Dbxref="Flybase:FBgn0000490", "PMID:8167377", "REDfly:247; Evidence="reporter construct (in vivo)"; Ontology_term="FBbt:00005304"; #2L REDfly regulatory_region 2445769 2446581 . . . ID="dpp_dpp813"; Dbxref="Flybase:FBgn0000490", "PMID:7821226", "REDfly:246; Evidence="reporter construct (in vivo)"; Ontology_term="FBbt:00005653","FBbt:00001051"; use Bio::EnsEMBL::Funcgen::Parsers::BaseExternalParser; use Bio::EnsEMBL::DBEntry; use Bio::EnsEMBL::Funcgen::ExternalFeature; use Bio::EnsEMBL::Utils::Exception qw( throw ); use Bio::EnsEMBL::Utils::Argument qw( rearrange ); use vars qw(@ISA); @ISA = qw(Bio::EnsEMBL::Funcgen::Parsers::BaseExternalParser); sub new { my $caller = shift; my $class = ref($caller) || $caller; my $self = $class->SUPER::new(@_); #Set default feature_type and feature_set config #We need to capture version/release/data of external feature sets. #This can be nested in the description? Need to add description to feature_set? $self->{'feature_types'} = { 'REDfly TFBS' => { name => 'REDfly TFBS', class => 'Transcription Factor', description => 'REDfly transciption factor binding site', }, 'REDfly CRM' => { name => 'REDfly CRM', class => 'Regulatory Motif', description => 'REDfly cis regulatory motif', }, }; $self->{feature_sets} = { 'REDfly TFBSs' => { feature_type => \$self->{'feature_types'}{'REDfly TFBS'}, #display_label => 'REDfly TFBSs',#defaults to name analysis => { -logic_name => 'REDfly TFBS', -description => 'REDfly transcription factor binding sites (http://redfly.ccr.buffalo.edu/)', -display_label => 'REDfly TFBS', -displayable => 1, }, xrefs => 1, }, 'REDfly CRMs' => { feature_type => \$self->{'feature_types'}{'REDfly CRM'}, analysis => { -logic_name => 'REDfly CRM', -description => 'REDfly cis regulatory motif (http://redfly.ccr.buffalo.edu/)', -display_label => 'REDfly CRM', -displayable => 1, }, xrefs => 1, }, }; #Move xref flag here? $self->{config} = { 'REDfly CRMs' => { file => $ENV{'EFG_DATA'}.'/input/REDFLY/crm_dump.gff', gff_attrs => { 'ID' => 1, }, }, 'REDfly TFBSs' => { file => $ENV{'EFG_DATA'}.'/input/REDFLY/tbfs_dump.gff', gff_attrs => { 'ID' => 1, 'Factor' => 1, 'Target' => 1, }, desc_suffix => ' binding site', } }; #Default feature_set names if(! defined $self->import_sets){ @{$self->{'import_sets'}} = keys %{$self->{'feature_sets'}}; } else{#validate foreach my $import_fset(@{$self->import_sets}){ if(! exists $self->{'feature_sets'}{$import_fset}){ throw("$import_fset is not a valid import feature set. Maybe you need to add this to the config in:\t".ref($self)); } } } #Need to change this so we can just (re)load the one set. #Change this so we only call it from parse_and_load? #Should we validate all first, so we fail at the earliest possible moment? #Or serially? $self->validate_and_store_feature_types; $self->set_feature_sets; return $self; } # Parse file and return hashref containing: # # - arrayref of features # - arrayref of factors sub parse_and_load { my $self = shift; my ($fset_name, $old_assembly, $new_assembly, $file) = rearrange(['FEATURE_SET', 'OLD_ASSEMBLY', 'NEW_ASSEMBLY', 'FILE'], @_); warn "params not yet fully implemented, loading defaults import sets"; #if(! defined $fset_name && defined $file){ # throw("Cannot specify a file to parse if no -feature_set parameter provided"); # } #Use default file path? Make importer inherit from this? #init_external import #just do for each in import_sets here for now? my $analysis_adaptor = $self->db->get_AnalysisAdaptor(); my %slice_cache; my $extf_adaptor = $self->db->get_ExternalFeatureAdaptor; my $dbentry_adaptor = $self->db->get_DBEntryAdaptor; my $ftype_adaptor = $self->db->get_FeatureTypeAdaptor; # this object is only used for projection my $dummy_analysis = new Bio::EnsEMBL::Analysis(-logic_name => 'REDflyProjection');#do we need this? my $species = $self->db->species; if(! $species){ throw('Must define a species to define the external_db'); } #Just to make sure we hav homo_sapiens and not Homo Sapiens ($species = lc($species)) =~ s/ /_/; foreach my $import_set(@{$self->import_sets}){ $self->log_header("Parsing $import_set data"); my %factor_cache; # name -> factor_id my %target_cache; my $config = $self->{'config'}{$import_set}; my $fset = $self->{'feature_sets'}{$import_set}; my %gff_attrs = %{$config->{'gff_attrs'}}; # Parse motifs.txt file my $file = $config->{'file'}; my $skipped = 0; my $factor_cnt = 0; my $factor_xref_cnt = 0; my $feature_cnt = 0; my $feature_target_cnt = 0; open (FILE, "<$file") || die "Can't open $file"; <FILE>; # skip header LINE: while (my $line = <FILE>) { next if ($line =~ /^\s*\#/o || $line =~ /^\s*$/o); chomp $line; my %attr_cache;#Can we move this outside the loop and rely on it being reset each time? #GFF3 #Is this format valid, missing " after REDfly xref #2L REDfly regulatory_region 2456365 2456372 . . . ID="Unspecified_dpp:REDFLY:TF000068"; Dbxref="Flybase:FBgn0000490", "PMID:8543160", "REDfly:644, "FlyBase:"; Evidence="footprint/binding assay"; Factor="Unspecified"; Target="dpp"; #seq_name, source, feature, start, end, score, strand, frame, [attrs] my ($chromosome, undef, $feature, $start, $end, undef, undef, undef, $attrs) = split /\t/o, $line; my @attrs = split/\;\s+/o, $attrs; #UCSC coords $start ++; $end ++; foreach my $gff_attr(keys %gff_attrs){ if(($attr_cache{$gff_attr}) = grep {/^${gff_attr}\=/} @attrs){ $attr_cache{$gff_attr} =~ s/(^${gff_attr}\=\")(.*)(\")/$2/; #warn "attr cache is $attr_cache{$gff_attr} "; } else{ warn "Skipping import, unable to find mandatory $gff_attr attribute in:\t$line"; next LINE; } } #For TFBS #Factor = coding gene name display_label #Target = Target gene? #Ignore other xrefs for name, just put ID in feature as display_label #These are mixed up! and where not getting any coding xrefs! #For CRM #Can we split the ID and have Reguatory XREF? #e.g. ID="dpp_dpp813"; => dpp #This can be moved to the BaseExternalParser if(! exists $slice_cache{$chromosome}){ if($old_assembly){ $slice_cache{$chromosome} = $self->slice_adaptor->fetch_by_region('chromosome', $chromosome, undef, undef, undef, $old_assembly); }else{ $slice_cache{$chromosome} = $self->slice_adaptor->fetch_by_region('chromosome', $chromosome); } } if(! defined $slice_cache{$chromosome}){ warn "Can't get slice $chromosome for motif $attr_cache{'ID'};\n"; $skipped++; next; } #get feature_type first #we are not maintaining this link in the DB! #Do we need another xref for this or a different table? my $feature_type; #TFBSs if(exists $attr_cache{'Factor'}){ if(! exists $factor_cache{$attr_cache{'Factor'}}){ $factor_cache{$attr_cache{'Factor'}} = $ftype_adaptor->fetch_by_name($attr_cache{'Factor'}); if(! defined $factor_cache{$attr_cache{'Factor'}}){ #Would need to add CODING DBEntry here! #Will this work on a scalar ref to a hash? my $desc = (exists $config->{'desc_suffix'}) ? $attr_cache{'Factor'}.$config->{'desc_suffix'} : undef; ($factor_cache{$attr_cache{'Factor'}}) = @{$ftype_adaptor->store(Bio::EnsEMBL::Funcgen::FeatureType->new ( -name => $attr_cache{'Factor'}, -class => $fset->feature_type->class, -description => $desc, ))}; $feature_type = $factor_cache{$attr_cache{'Factor'}}; $factor_cnt ++; my $stable_id = $self->get_core_stable_id_by_display_name($self->db->dnadb, $attr_cache{'Factor'}); #Handle release/version in xref version as stable_id version? if(! defined $stable_id){ warn "Could not generate CODING xref for feature_type:\t". $attr_cache{'Factor'}; }else{ #warn "got $stable_id for ".$attr_cache{'Factor'}; my $dbentry = Bio::EnsEMBL::DBEntry->new( -dbname => $species.'_core_Gene', #-release => $self->db->dnadb->dbc->dbname, -status => 'KNOWNXREF',#This is for the external DB #-display_label_linkable => 1, -#db_display_name => $self->db->dnadb->dbc->dbname, -db_display_name => 'EnsemblGene', -type => 'MISC',#Is for the external_db -primary_id => $stable_id, -display_id => $attr_cache{'Factor'}, -info_type => 'MISC', -into_text => 'GENE', -linkage_annotation => 'REDfly Coding' #-description => 'cisRED motif gene xref',#This is now generic and no longer resitricted to REDfly #could have version here if we use the correct dnadb to build the cache ); $dbentry_adaptor->store($dbentry, $factor_cache{$attr_cache{'Factor'}}->dbID, 'FeatureType', 1);#1 is ignore release flag $factor_xref_cnt ++; } } } } else{ #CRMs $feature_type = $fset->feature_type; } #Now build actual feature $feature = Bio::EnsEMBL::Funcgen::ExternalFeature->new ( -display_label => $attr_cache{'ID'}, -start => $start, -end => $end, -strand => 0, -feature_type => $feature_type, -feature_set => $fset, -slice => $slice_cache{$chromosome}, ); # project if necessary if ($new_assembly) { $feature = $self->project_feature($feature, $new_assembly); if(! defined $feature){ $skipped ++; next; } } ($feature) = @{$extf_adaptor->store($feature)}; $feature_cnt++; my $target = (exists $attr_cache{'Target'}) ? $attr_cache{'Target'} : (split/_/, $attr_cache{'ID'})[0]; my $stable_id; if($target ne 'Unspecified'){ $stable_id = $self->get_core_stable_id_by_display_name($self->db->dnadb, $target); } if(! defined $stable_id){ warn "Could not generate TARGET xref for feature:\t". $attr_cache{'ID'} if $target ne 'Unspecified'; } else{ #Handle release/version in xref version as stable_id version? my $dbentry = Bio::EnsEMBL::DBEntry->new( -dbname => $species.'_core_Gene', #-release => $self->db->dnadb->dbc->dbname, -status => 'KNOWNXREF', #-display_label_linkable => 1, -#db_display_name => $self->db->dnadb->dbc->dbname, -db_display_name => 'EnsemblGene', -type => 'MISC',# -primary_id => $stable_id, -display_id => $target, -info_type => 'MISC', -info_text => 'GENE', -linkage_annotation => $fset->feature_type->name.' Target', #could have version here if we use the correct dnadb to build the cache ); $dbentry_adaptor->store($dbentry, $feature->dbID, 'ExternalFeature', 1);#1 is ignore release flag $feature_target_cnt ++; } } close FILE; $self->log("Loaded ".$fset->name); $self->log("$factor_cnt feature types"); $self->log("$factor_xref_cnt feature type coding xrefs"); $self->log("$feature_cnt features"); $self->log("$feature_target_cnt feature target xrefs"); $self->log("Skipped $skipped features"); } return; } 1;
adamsardar/perl-libs-custom
EnsemblAPI/ensembl-functgenomics/modules/Bio/EnsEMBL/Funcgen/Parsers/redfly.pm
Perl
apache-2.0
13,817
=head1 LICENSE Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute Copyright [2016-2018] EMBL-European Bioinformatics Institute Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. =cut package EnsEMBL::Web::JSONServer::Tools; use strict; use warnings; use EnsEMBL::Web::File::Utils::URL; use EnsEMBL::Web::Utils::DynamicLoader qw(dynamic_require); use parent qw(EnsEMBL::Web::JSONServer); sub object_type { 'Tools' } sub call_js_panel_method { # TODO - get rid of this - Let frontend decide what methods to call my ($self, $method_name, $method_args) = @_; return {'panelMethod' => [ $method_name, @{$method_args || []} ]}; } sub json_form_submit { my $self = shift; my $hub = $self->hub; my $object = $self->object; my $ticket = $object->ticket_class->new($object); if (!$hub->param('species') || $hub->param('species') eq '') { my $sp_err = { 'heading' => "No species selected", 'message' => "Please select a species to run BLAST/BLAT against.", 'stage' => "validation" }; return $self->call_js_panel_method('ticketNotSubmitted', [ $sp_err ]); } $ticket->process; if (my $error = $ticket->error) { return $self->call_js_panel_method('ticketNotSubmitted', [ $error ]); } return $self->call_js_panel_method('ticketSubmitted'); } sub json_save { my $self = shift; $self->object->save_ticket_to_account; return $self->call_js_panel_method('refresh', [ 1 ]); } sub json_delete { my $self = shift; $self->object->delete_ticket_or_job; return $self->call_js_panel_method('refresh', [ 1 ]); } sub json_refresh_tickets { my $self = shift; my $tickets_old = $self->hub->param('tickets'); my ($tickets_new, $auto_refresh) = $self->object->get_tickets_data_for_sync; return $self->call_js_panel_method('updateTicketList', [ $tickets_old eq $tickets_new ? undef : $tickets_new, $auto_refresh ]); } sub json_share { my $self = shift; my $object = $self->object; my $visibility = $object->change_ticket_visibility($self->hub->param('share') ? 'public' : 'private'); return { 'shared' => $visibility eq 'public' ? 1 : 0 }; } sub json_load_ticket { my $self = shift; return $self->call_js_panel_method('populateForm', [ $self->object->get_edit_jobs_data ]); } #Ajax request used by all 1000genomes tools to retrieve content for sample population url and return sub json_read_sample_file { my ($self) = @_; my $hub = $self->hub; my $url = $hub->param('population_url') or return; my $pop_value = $hub->param('pop_value') ? 1 : 0; my $pops = []; my $args = { 'no_exception' => 1 }; my $proxy = $hub->web_proxy; $args->{proxy} = $proxy ? $proxy : ""; my $html = EnsEMBL::Web::File::Utils::URL::read_file($url, $args); return { 'error' => 'cannot retrieve file' } unless $html; my $sample_pop; if ( $html ){ foreach (split("\n",$html)){ next if(!$_ || $_ =~ /sample/gi); #skip if empty or skip header if there is one my ($sam, $pop, $plat) = split(/\t/, $_); #validation check to make sure we get valid content from the file (ex is if user uploaded utf-16 file format which has strange characters at the start) return { 'format_error' => "The sample population file formatting is wrong. Please check if it has the correct spacing." } if($_ !~ /^[a-z]/gi || !$pop || !$sam); $sample_pop->{$pop} ||= []; push @{$sample_pop->{$pop}}, $sam; } } #push @$pops, { caption =>'ALL', value=>'ALL', 'selected' => 'selected'}; #They might already have all in the sample file or it might not be needed. If thats not the case, uncomment for my $population (sort {$a cmp $b} keys %{$sample_pop}) { my $ind_list = join(',' , @{$sample_pop->{$population}}) if($pop_value); push @{$pops}, { value => $ind_list ? $ind_list : $population, caption => $population }; } return { 'populations' => $pops }; } #Ajax request used by all 1000genomes tools (data slicer) to retrieve individuals inside a vcf file sub json_get_individuals { my ($self) = @_; my $hub = $self->hub; my $pops = []; my $url = $hub->param('file_url') or return; my $region = $hub->param('region') or return; my ($vcf, $error); eval { $vcf = dynamic_require('Vcf')->new(file=>$url, region=>$region, print_header=>1, silent=>1, tabix=>$SiteDefs::TABIX, tmp_dir=>$SiteDefs::ENSEMBL_TMP_TMP); #print_header allows print sample name rather than column index }; $error = "Error reading VCF file" unless ($vcf); if ($vcf) { $vcf->parse_header(); my $x=$vcf->next_data_hash(); for my $individual (keys %{$$x{gtypes}}) { push @{$pops}, { value => $individual, name => $individual }; } $error = "No data found in the uploaded VCF file within the region $region. Please choose another region or another file" unless (scalar @{$pops}); } return $error ? {'vcf_error' => $error } : { 'individuals' => $pops }; } 1;
muffato/public-plugins
tools/modules/EnsEMBL/Web/JSONServer/Tools.pm
Perl
apache-2.0
5,551
# # Copyright 2022 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package storage::overland::neo::snmp::plugin; use strict; use warnings; use base qw(centreon::plugins::script_snmp); sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '1.0'; $self->{modes} = { 'eventlog' => 'storage::overland::neo::snmp::mode::eventlog', 'hardware' => 'storage::overland::neo::snmp::mode::hardware' }; return $self; } 1; __END__ =head1 PLUGIN DESCRIPTION Check Overland Neo Series in SNMP. Need to use --snmp-force-getnext options. =cut
centreon/centreon-plugins
storage/overland/neo/snmp/plugin.pm
Perl
apache-2.0
1,361
=head1 LICENSE Copyright [1999-2013] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. =cut package Bio::EnsEMBL::GlyphSet::_lrg; use strict; use base qw(Bio::EnsEMBL::GlyphSet); use Bio::EnsEMBL::LRGSlice; sub features { my ($self) = @_; my $slice = $self->{'container'}; my $db_alias = $self->my_config('db'); my $analyses = $self->my_config('logic_names'); my @T =@{$slice->get_all_Genes( $_, $db_alias )||[]}; my @T2; warn join ' * ', 'SLICE', $slice->seq_region_name, $slice->start, $slice->end; foreach my $lrg_name (@{$self->species_defs->LRG_REGIONS || []}) { my $lrg =$slice->adaptor->fetch_by_region( undef, $lrg_name) || next; warn join ' * ', 'LRG', $lrg->feature_Slice->seq_region_name, $lrg->feature_Slice->start, $lrg->feature_Slice->end, "\n"; my $chr_slice = $lrg->feature_Slice || next; if ( $slice->seq_region_name eq $chr_slice->seq_region_name) { if (($slice->start < $chr_slice->end) && ($chr_slice->start < $slice->end)) { push @T2, $lrg; } } # warn join ' * ', $lrg, sort keys (%$lrg); # foreach my $k (sort keys (%$lrg)) { # warn "$k => $lrg->{$k} \n"; # } } # warn "LRG C : ", scalar(@T2), "\n"; return \@T2; return \@T; } sub render_gene_nolabel { $_[0]->_init(0); } sub render_gene_label { $_[0]->_init(1); } sub _init { my $self = shift; return unless ($self->strand() == -1); my $vc = $self->{'container'}; my $type = $self->type; my $h = 8; my $FONT = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONT'}; my $FONTSIZE = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONTSIZE'} * $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_OUTERTEXT'}; my %highlights; @highlights{$self->highlights} = (); # build hashkeys of highlight list $self->_init_bump(); my $vc_length = $vc->length; my $pix_per_bp = $self->scalex; my $navigation = $self->my_config('navigation') || 'on'; my $show_navigation = $navigation eq 'on' ? 1 : 0; # && ( $vc->length() < $max_length_nav * 1001 ); #First of all let us deal with all the EnsEMBL genes.... my $offset = $vc->start - 1; my %gene_objs; my $F = 0; my $fontname = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONT'}; # "Small"; my $database = $self->my_config( 'db' ); my $used_colours = {}; my $FLAG = 0; ## We need to store the genes to label... my @GENES_TO_LABEL = (); my $regions = $self->features(); foreach my $g (@{$regions || []}) { my $gene_col = 'skyblue3'; my $label = $g->seq_region_name; my $high = $g->seq_region_name eq $self->{'config'}->core_objects->{'parameters'}{'lrg'}; my $gslice = $g->feature_Slice; my $start = $gslice->start - $vc->start; my $end = $gslice->end - $vc->start; my ($chr_start, $chr_end) = ( $gslice->start, $gslice->end ); warn "CHR : $chr_start * $chr_end * $start * $end\n"; my ($chr_start, $chr_end) = ( $start, $end ); next if $end < 1 || $start > $vc_length; $start = 1 if $start<1; $end = $vc_length if $end > $vc_length; my $HREF; my $rect = $self->Rect({ 'x' => $start-1, 'y' => 0, 'width' => $end - $start+1, 'height' => $h, 'colour' => $gene_col, 'absolutey' => 1, }); $rect->{'title'} = "LRG: ".$g->seq_region_name."; Location: ". $gslice->seq_region_name.':'.$gslice->start.'-'.$gslice->end; if($show_navigation) { $rect->{'href'} = $self->_url({'type'=>'LRG','action'=>'Summary','lrg'=>$g->seq_region_name,'db'=>$database}); } push @GENES_TO_LABEL , { 'start' => $start, 'label' => $label, 'end' => $end, 'href' => $rect->{'href'}, 'title' => $rect->{'title'}, 'gene' => $g, 'col' => $gene_col, 'highlight' => $high }; my $bump_start = int($rect->x() * $pix_per_bp); my $bump_end = $bump_start + int($rect->width()*$pix_per_bp) +1; my $row = $self->bump_row( $bump_start, $bump_end ); $rect->y($rect->y() + (6 * $row )); $rect->height(4); $self->push($rect); $self->unshift($self->Rect({ 'x' => $start -1 - 1/$pix_per_bp, 'y' => $rect->y()-1, 'width' => $end - $start +1 + 2/$pix_per_bp, 'height' => $rect->height()+2, 'colour' => 'highlight2', 'absolutey' => 1, })) if $high; $FLAG=1; } if($FLAG) { ## NOW WE NEED TO ADD THE LABELS_TRACK.... FOLLOWED BY THE LEGEND my $GL_FLAG = $self->get_parameter( 'opt_gene_labels' ); $GL_FLAG = 1 unless defined($GL_FLAG); $GL_FLAG = shift if @_; $GL_FLAG = 0 if ( $self->my_config( 'label_threshold' ) || 50e3 )*1001 < $vc->length; if( $GL_FLAG ) { my $START_ROW = $self->_max_bump_row+1; $self->_init_bump; my($a,$b,$c,$H) = $self->get_text_width( 0,'X_y','','font'=>$FONT,'ptsize'=>$FONTSIZE); foreach my $gr ( @GENES_TO_LABEL ) { my( $txt, $part, $W, $H2 ) = $self->get_text_width( 0, "$gr->{'label'} ", '', 'font' => $FONT, 'ptsize' => $FONTSIZE ); my $tglyph = $self->Text({ 'x' => $gr->{'start'}-1 + 4/$pix_per_bp, 'y' => 0, 'height' => $H, 'width' => $W / $pix_per_bp, 'font' => $FONT, 'halign' => 'left', 'ptsize' => $FONTSIZE, 'colour' => $gr->{'col'}, 'text' => "$gr->{'label'}", 'title' => $gr->{'title'}, 'href' => $gr->{'href'}, 'absolutey' => 1, }); my $bump_start = int($tglyph->{'x'} * $pix_per_bp) - 4; my $bump_end = $bump_start + int($tglyph->width()*$pix_per_bp) +1; my $row = $self->bump_row( $bump_start, $bump_end ); $tglyph->y($tglyph->{'y'} + $row * (2+$H) + ($START_ROW-1) * 6); $self->push( $tglyph, # Draw little taggy bit to indicate start of gene $self->Rect({ 'x' => $gr->{'start'}-1, 'y' => $tglyph->y + 2, 'width' => 0, 'height' => 4, 'bordercolour' => $gr->{'col'}, 'absolutey' => 1, }), $self->Rect({ 'x' => $gr->{'start'}-1, 'y' => $tglyph->y + 2 + 4, 'width' => 3/$pix_per_bp, 'height' => 0, 'bordercolour' => $gr->{'col'}, 'absolutey' => 1, }) ); $self->unshift($self->Rect({ 'x' => $gr->{'start'}-1 - 1/$pix_per_bp, 'y' => $tglyph->y()+1, 'width' => $tglyph->width() +1 + 2/$pix_per_bp, 'height' => $tglyph->height()+2, 'colour' => 'highlight2', 'absolutey' => 1, })) if $gr->{'highlight'}; } } } } sub old_init { my $self = shift; return unless ($self->strand() == -1); my $vc = $self->{'container'}; my $type = $self->type; my $h = 8; my $FONT = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONT'}; my $FONTSIZE = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONTSIZE'} * $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_OUTERTEXT'}; my %highlights; @highlights{$self->highlights} = (); # build hashkeys of highlight list $self->_init_bump(); my $vc_length = $vc->length; my $pix_per_bp = $self->scalex; my $navigation = $self->my_config('navigation') || 'on'; my $show_navigation = $navigation eq 'on' ? 1 : 0; # && ( $vc->length() < $max_length_nav * 1001 ); #First of all let us deal with all the EnsEMBL genes.... my $offset = $vc->start - 1; my %gene_objs; my $F = 0; my $fontname = $self->species_defs->ENSEMBL_STYLE->{'GRAPHIC_FONT'}; # "Small"; my $database = $self->my_config( 'db' ); my $used_colours = {}; my $FLAG = 0; ## We need to store the genes to label... my @GENES_TO_LABEL = (); my $genes = $self->features(); foreach my $g (@$genes) { my $gene_col = 'skyblue3'; my $label = $g->external_name || $g->stable_id; my $high = $g->stable_id eq $self->{'config'}->core_objects->{'parameters'}{'g'}; my $start = $g->start; my $end = $g->end; my ($chr_start, $chr_end) = $self->slice2sr( $start, $end ); warn join ' * ' , 'CHR', $chr_start, $chr_end, $start, $end ; next if $end < 1 || $start > $vc_length; $start = 1 if $start<1; $end = $vc_length if $end > $vc_length; my $HREF; my $rect = $self->Rect({ 'x' => $start-1, 'y' => 0, 'width' => $end - $start+1, 'height' => $h, 'colour' => $gene_col, 'absolutey' => 1, }); $rect->{'title'} = ( $g->external_name ? $g->external_name.'; ':'' ). "LRG: ".$g->stable_id."; Location: ". $g->seq_region_name.':'.$g->seq_region_start.'-'.$g->seq_region_end; if($show_navigation) { $rect->{'href'} = $self->_url({'type'=>'Gene','action'=>'Summary','g'=>$g->stable_id,'db'=>$database}); } push @GENES_TO_LABEL , { 'start' => $start, 'label' => $label, 'end' => $end, 'href' => $rect->{'href'}, 'title' => $rect->{'title'}, 'gene' => $g, 'col' => $gene_col, 'highlight' => $high }; my $bump_start = int($rect->x() * $pix_per_bp); my $bump_end = $bump_start + int($rect->width()*$pix_per_bp) +1; my $row = $self->bump_row( $bump_start, $bump_end ); $rect->y($rect->y() + (6 * $row )); $rect->height(4); $self->push($rect); $self->unshift($self->Rect({ 'x' => $start -1 - 1/$pix_per_bp, 'y' => $rect->y()-1, 'width' => $end - $start +1 + 2/$pix_per_bp, 'height' => $rect->height()+2, 'colour' => 'highlight2', 'absolutey' => 1, })) if $high; $FLAG=1; } if($FLAG) { ## NOW WE NEED TO ADD THE LABELS_TRACK.... FOLLOWED BY THE LEGEND my $GL_FLAG = $self->get_parameter( 'opt_gene_labels' ); $GL_FLAG = 1 unless defined($GL_FLAG); $GL_FLAG = shift if @_; $GL_FLAG = 0 if ( $self->my_config( 'label_threshold' ) || 50e3 )*1001 < $vc->length; if( $GL_FLAG ) { my $START_ROW = $self->_max_bump_row+1; $self->_init_bump; my($a,$b,$c,$H) = $self->get_text_width( 0,'X_y','','font'=>$FONT,'ptsize'=>$FONTSIZE); foreach my $gr ( @GENES_TO_LABEL ) { my( $txt, $part, $W, $H2 ) = $self->get_text_width( 0, "$gr->{'label'} ", '', 'font' => $FONT, 'ptsize' => $FONTSIZE ); my $tglyph = $self->Text({ 'x' => $gr->{'start'}-1 + 4/$pix_per_bp, 'y' => 0, 'height' => $H, 'width' => $W / $pix_per_bp, 'font' => $FONT, 'halign' => 'left', 'ptsize' => $FONTSIZE, 'colour' => $gr->{'col'}, 'text' => "$gr->{'label'}", 'title' => $gr->{'title'}, 'href' => $gr->{'href'}, 'absolutey' => 1, }); my $bump_start = int($tglyph->{'x'} * $pix_per_bp) - 4; my $bump_end = $bump_start + int($tglyph->width()*$pix_per_bp) +1; my $row = $self->bump_row( $bump_start, $bump_end ); $tglyph->y($tglyph->{'y'} + $row * (2+$H) + ($START_ROW-1) * 6); $self->push( $tglyph, # Draw little taggy bit to indicate start of gene $self->Rect({ 'x' => $gr->{'start'}-1, 'y' => $tglyph->y + 2, 'width' => 0, 'height' => 4, 'bordercolour' => $gr->{'col'}, 'absolutey' => 1, }), $self->Rect({ 'x' => $gr->{'start'}-1, 'y' => $tglyph->y + 2 + 4, 'width' => 3/$pix_per_bp, 'height' => 0, 'bordercolour' => $gr->{'col'}, 'absolutey' => 1, }) ); $self->unshift($self->Rect({ 'x' => $gr->{'start'}-1 - 1/$pix_per_bp, 'y' => $tglyph->y()+1, 'width' => $tglyph->width() +1 + 2/$pix_per_bp, 'height' => $tglyph->height()+2, 'colour' => 'highlight2', 'absolutey' => 1, })) if $gr->{'highlight'}; } } } } sub legend { my( $self, $colours ) = @_; my @legend = (); my %X; foreach my $Y ( values %$colours ) { $X{$Y->[1]} = $Y->[0]; } my @legend = %X; return \@legend; } 1;
Ensembl/ensembl-draw
modules/Bio/EnsEMBL/GlyphSet/_lrg.pm
Perl
apache-2.0
13,337
package WordGraph::EdgeModel::ReferenceTargetModel; use Moose; use namespace::autoclean; extends('ReferenceTargetPairwiseModel'); with('WordGraph::EdgeModel'); has 'rtm' => ( is => 'ro' , isa => 'ReferenceTargetModel' , init_arg => undef , lazy => 1 , builder => '_rtm_builder' ); sub _rtm_builder { my $this = shift; return new ReferenceTargetPairwiseModel(); } # "dynamically" determine cost of an edge in the gist graph # Used to be compute_edge_cost sub _compute { my $this = shift; my $graph = shift; my $edge = shift; my $edge_features = shift; # needed ? my $instance = shift; # TODO : remove code duplication # 1 - turn edge into a sequence my $edge_as_path = new WordGraph::Path( graph => $graph , node_sequence => $edge , object => $instance->[ 0 ] ); # 2 - create rtm instance for the current configuration my $rtm_instance = $this->rtm->create_instance( [ $instance->[ 0 ] , $edge_as_path ] , [ [ $instance->[ 1 ]->[ 0 ]->[ 0 ] , $instance->[ 1 ]->[ 0 ]->[ 1 ] ] ] ); return 1 / ( 0.00000001 + $rtm_instance->compute_unnormalized_probability ); } =pod # **************************************************************************************************************************** # 1 - edge features (features are an integral part of the graph) # **************************************************************************************************************************** # TODO : move this to WordGraph's construction method sub list_features { my $this = shift; my %edge_features; my @_edge_features; $this->rtm-> return \%edge_features; } # ***************************************************************************************************************************** =cut sub _sigmoid { my $raw_cost = shift; my $sigmoid_cost = 1 / ( 1 + exp( -1 * $raw_cost ) ); return $sigmoid_cost; } =pod # Compute cost of an edge given a set of features and associated weights sub _compute_edge_cost { my $this = shift; my $weights = shift; my $edge = shift; my $use_shortest_path = $this->params()->{ 'use_shortest_path' }; my $edge_cost = 0; my $edge_features = $this->_compute_edge_features( $edge ); my $has_non_zero_feature = 0; foreach my $feature_id (keys %{ $edge_features }) { my $weight = _feature_weight( $weights , $feature_id ); my $feature_value = $edge_features->{ $feature_id }; if ( $feature_value ) { $has_non_zero_feature++; } my $cost_update = $weight * $feature_value; if ( $cost_update ) { # Multiplicative costs seem to prevent the occurrence of negative cycles ? # TODO: try multiplicative costs also ? $edge_cost += $cost_update; } } if ( ($DEBUG > 2) && $has_non_zero_feature ) { print STDERR "\tEdge " . join("::", @{ $edge }) . " has active feature ...\n"; } my $edge_weight; my $TINY = 0.00000000001; if ( $use_shortest_path ) { #$edge_weight = -log( $TINY + $edge_cost ); $edge_weight = $edge_cost; } else { $edge_weight = $edge_cost; } # TODO: include study of the best cost function ? return $edge_weight; #return sigmoid( $edge_weight ); #return $edge_cost; #return exp( $edge_cost ); } =cut # (overridden) compute feature vector for a given edge # CURRENT : no need for list features ? simply compute features, here via factors sub compute_edge_features { my $this = shift; my $instance = shift; my $edge = shift; my $graph = shift; ### print STDERR "Computing edge features ...\n"; # 1 - turn edge into a sequence my $edge_as_path = new WordGraph::Path( graph => $graph , node_sequence => $edge , object => $instance->[ 0 ] ); # 2 - create rtm instance for the current configuration my $rtm_instance = $this->rtm->create_instance( [ $instance->[ 0 ] , $edge_as_path ] , $instance->[ 1 ] ); my $rtm_instance_features = $rtm_instance->featurize; =pod # Iterate over edge feature definitions foreach my $feature_id ( keys %{ $this->features } ) { my $feature_definition = $this->features->{ $feature_id }; my $feature_values = $feature_definition->compute_cached( $instance , $edge_as_path ); } =cut return $rtm_instance_features; } __PACKAGE__->meta->make_immutable; 1;
ypetinot/web-summarization
summarizers/graph-summarizer-4/src/WordGraph/EdgeModel/ReferenceTargetModel.pm
Perl
apache-2.0
4,343
=head1 TITLE Improved Module Versioning And Searching =head1 VERSION Maintainer: Steve Simmons <scs@ans.net> Date: 8 Aug 2000 Mailing List: perl6-language@perl.org Number: 78 Version: 1 Status: Developing =head1 ABSTRACT Modern production systems may have many versions of different modules in use simultaneously. Workarounds are possible, but they lead to a vast spaghetti of fragile installation webs. This proposal will attempt to redefine module versioning and its handling in a way that is fully upward compatible but solves the current problems. An up-to-the-instant version of this RFC will be posted as HTML at C<http://www.nnaf.net/~scs/Perl6/RFCxx.html> as soon as I know the RFC number. =head1 DESCRIPTION There are several classes of problem with the current module versioning and searching, which will be discussed separately. The solutions proposed overlap, and are discussed in B<IMPLEMENTATION> below. =head2 Current Implementation Is Broken These problems are ones in which I would go so far as to say that the current (C<perl5>) performance is actually broken. =head3 Discovery Of Older Versions Aborts Searches Currently a statement use foo 1.2; can cause C<perl> to search C<@INC> until it finds a C<foo.pm> file or exhausts the search path. When a C<foo.pm>, its C<VERSION> is checked against the one requested in the C<use> statement. If the C<foo.pm> version is less than 1.2, C<perl> immediately gives an error message and halts the compilation. A satisfactory version may exist elsewhere in C<@INC>, but it is not searched for. =head3 First Module Discovered May Not Be Newest I believe that when a programmer writes use module; `Do What I Mean' should find the newest version of the module present on the C<@INC> search path. Instead, the very first C<module.pm> file found is taken, regardless of the presence of others on the path. =head2 Current Methods Are Insufficient for Complex Installations Deployment of perl modules in high-reliability or widely shared environments often requires multiple versions of modules installed simultaneously. (Comments `but that's a bad idea' will be cheerfully ignored -- if I could control what other departments need, I would). This leads to an endless proliferation of C<use lib> directories and ever-more-pervasive `silos of development.' Part of the problem is the limitations of the current system in how modules are versioned and how C<perl> decides which version to load. In worst case, code such as use lib '/path/to/department/module/versionX'; use module ; # To get version X for sure no use lib '/path/to/department/module/versionX'; has been found in production equipment. Why does such bogosity occur? It's an attempt to solve both the above problems and the deployment issues which follow below. =head3 New Module Releases Can Break Existing Scripts I<Working tools persist.> An application which does its job well will live as long as the problem it addresses. This means old code may continue running for a long time. For C<perl> itself, most sites solve this problem by having the perl invocation include versioning: #!/usr/bin/perl5.005 The indicated version will likely remain installed and stable as long as the script which uses it and the platform on which that script runs. The proliferation and increasing use of modules is generally a good thing. However, installation of new modules can and sometimes does break existing scripts. Workarounds for this problem are cumbersome at best, and we have existence proofs in other languages that this can be handled better (notably C<tcl>, but there are probably more). =head3 Test Systems Need Test Modules Mission-critical scripts often need to have a final test pass by releasing experimental versions onto productions systems alongside the production systems. The inflexibility of perl module versioning also contributes to difficulties in releasing systems for test. A new script may require significant changes to internals of one or more supporting modules. The changes need not be visible to existing scripts; if bugs are introduced then previously working systems may change or break in obscure ways. Ideally, there would be a mechanism by which C<scriptI<.new>> or C<I<new>script> could be released simultaneously with an appropriate version of C<moduleI<.new>.pm> or C<I<new>module.pm> while the previous version remains in place for older code. A more flexible mechanism for module version specification and searching can fix the problem. =head2 Proposed Solution I believe that relatively simple changes can be made to the version identification and module installation systems which will solve all the above problems. In addition, those changes should be largely upward compatible from current functioning; and if needed could be made 100% compatible. =head1 IMPLEMENTATION Several changes, working together, should provide the flexibility needed to solve all the stated problems and deficiencies: =over4 =item 1. Clarification on how version numbers are formed (largely done as per C<perl5.6>) =item 2. Well-defined rules for version number comparison. =item 3. Extensions to the C<use module I<version>> syntax to support better specification of version numbers. =item 4. A modification to the module installation mechanism to make version numbers more immediately recognizable without requiring parsing/compiling of C<module.pm> files. =item 5. Modifications to the C<@INC> path searching rules to reflect the changes in numbers 1-4 above. =back We believe that most if not all of these changes can be made without requiring a change either to older scripts, existing modules, or items already in CPAN. New scripts and new modules should be able to take advantage of the changes with relatively minimal changes. =head2 Overview In brief, I propose the installation method for modules as provided by C<perl Makefile.PL> be changed such that version numbers appear in the path of the module being installed. This would require that the C<Makefile.PL> support functions open the module, extract the value of C<$VERSION> (if any), and use that to build the pathnames to install the module. This change has two huge wins: =over 4 =item Authors of modules would have to do literally I<nothing> to use the new mechanism. =item Having the version numbers embedded in the path means they could be reliably determined without having to actually open and parse each candidate C<.pm> file. =back Programs which request versions in their C<use module> statements would be compiled with the ``best fit'' commensurate with their request and with the request of other modules. Note that it may not be possible to satisfy conflicting requests. If module C<A> and module C<B> demand two different versions of the same module C<C>, the compiler should halt and state the module conflicts. ``Best fit'' cannot reliably be determined without examining all the secondary modules required as a consequence of using some lower-level module and without processing the C<@INC> changes introduced by C<use lib>, etc. Thus the compiler might have to examine the internals of a number of versions of some modules before choosing which to use. But it would not have to do a full parse of those modules, and the section on B<Possible Optimization - Indexes> suggests some further wins. =head2 Path/Module Renaming There are a variety of mechanisms which could embed the version number into the path name. This RFC does not strongly favor any one over any other. It does have some general suggestions, but is not imposing a particular solution. Here are some guidelines for choosing a naming system: =over 4 =item * The new names should do minimal violence to the existing structure. The following guidelines are suggestions, the implementers should feel free to follow any of the possible implementations (see below) or choose another as they please. In the discussion below, I<pathname> means the full path from file system root to the actual file containing the module. =item * The new names should allow for version-less modules, indicated by a versionless pathname. =item * The C<.pm> filename extension should be preserved. Thus it is probably better to embed the version number into the file name or a directory name immediately above it on the search path. =item * If a module is selected for compilation and a mismatch is found between installed name (eg, C<foo-1.0.pm>) and the setting in the C<VERSION> statement (eg, C<VERSION=1.1;>), C<perl6> should issue a compile-time error which includes the full path to the module and the internal C<VERSION> number. No recovery should be done. =back Here are some possible implementations: =over 4 =item * In locations where a C<foo.pm> file would currently be installed, replace it with a C<foo.pm> directory. In that directory, versioned modules would be installed as C<foo-version.pm>, and versionless as C<foo.pm>. or as C<version.pm> and C<none.pm> =item * Create a C<foo.pm> directory as above, but populate it with subdirectories for each installed version. A C<foo.pm> file containing the module code would reside in that directory. Versionless modules could be installed into the C<foo.pm> directory rather than in a subdirectory. This mechanisms has some possible wins should it be appropriate to support simultaneous load of multiple versions. =back =head2 Definition Of Version Numbers A detailed definition of a version number appears immediately below. It is my belief that this definition and usage is an upward extension from current C<perl> performance; and therefore simple (current) use of version numbers should work without requiring script code change under this proposal. Note we are not I<requiring> version numbers, just specifying format and comparison rules. =over 4 =item 1. Version numbers consist of one or more I<version levels> separated by dots. =item 2. Each version level must consist of a non-negative number expressed as a series of the digits, ie C<[0-9]+>. =item 3. The first version level and first dot are required. =item 4. There is no limit to how many levels a version may have. =item 5. If a version number ends in a dot, a final level of C<0> is assumed. =item 6. Leading zeros are allowed in level numbers, but are ignored. If a version level contains leading zeros, those zeros will be stripped in all cases except for version(s) C<0.*>. =item 7. Trailing zeros in version numbers, whether explicit or implied by a final dot, are trimmed from the version number internally when deriving paths. See above for pathname deriving. =back The following example shows some valid and invalid version numbers use foo 1.; # Valid, means '1.0' use foo 01.; # Valid, means '1.0' use foo 1.1; # Valid, means '1.1' use foo 1.01; # Valid, means '1.1' use foo 1.01.; # Valid, means '1.1.0' use foo 1.1e; # Invalid, has non-digit use foo .1; # Invalid, must start with explicit level use foo 0.1; # Valid, means '0.1' use foo 1; # Invalid, must have at least one dot use foo 1.-1; # Invalid, no negative numbers (and not a digit) use foo ; # Valid, means no version specified Invalid version numbers cause a compile-time error on the module. =head2 Usage in Programs The existing version request syntax is: use module [ version ] [ qw(func1 func2 func3)] ; Currently version is a single C<perl>-style version number (whatever the heck that means). I propose we extend the allowable forms to allow ranges, lists, limits, and version limiting. Doing this properly requires some well-defined mechanisms for comparing disparate version numbers. Version numbers may appear in the C<use> statement of C<perl> scripts and in the C<VERSION> statement of a C<perl> modules. They may either be quoted strings or barewords. Usage in any other circumstance is not treated as a version number, but rather the appropriate C<perl> construct for the circumstances. If a bareword, it is almost certainly an error. I believe that this usage is consistent with current C<perl>. =head3 Ordered and Unordered Version Lists A program can specify a list of versions in no-preference order by listing them separated by whitespace: use foo 1.0 1.1 1.3; use foo 1.3 1.1 1.0; These two requests are effectively identical, with the compiler accepting any version of C<foo.pm> beginning with 1.0, 1.1 or 1.3. A program can specify a list of versions in preference order by adding commas: use foo 1.0, 1.1, 1.3; use foo 1.3, 1.1, 1.0; In these cases the compiler can proceed if any of the three versions are available. In the first case some version 1.0 is preferred, the the second 1.3 is preferred. The whitespace following the commas is optional. In cases where there are requests for two different versions of module C<foo>, both of which were first in the request orders, the highest-level module (closest to the original script) shall win. If both requests are at the same level offset from the original script, the first requester shall win. =head3 Version Inequalities A program can indicate a minimum, maximum, exact, and super-exact version it will accept. The following syntax handles these requests: The form use foo <1.2; indicates that any version prior to 1.2 is acceptable. This would mean any version with 1.1 or less for its first two levels. The form use foo <=1.2; indicates that any version prior to 1.2 is acceptable. This would mean any version with 1.2 or less for its first two levels. The form use foo >1.2 indicates that any version greater than 1.2 is acceptable. This would mean any version with 1.3 or more for its first two levels. The form use foo >=1.2 indicates that any version greater than or equal to 1.2 is acceptable. This would mean any version with has 1.2 or more as the first two levels. The form use foo =1.2 indicates that only versions which begins with 1.2 are acceptable. These may be further tightened by ending the version number in a period. The period forces the rest of the version levels to always be treated at zeros. Thus the form use foo =1.2. indicates that only version 1.2.0 is acceptable, not 1.2.0.0...1. =head3 Ordered and Unordered Version Ranges A program should be able to use two version numbers to indicate a range of acceptable version numbers. The separator between the two ranges indicates preference order, with =over 4 =item - meaning no preference, =item < meaning the right hand side is preferred, and =item > meaning the left hand side is preferred. =back No whitespace is allowed between the separator and the version number; reasons for this will become apparent in the sections on complex lists. Examples of ranges: use foo 1.1-1.4 means that any version which begins with 1 and has a 1.4 as the second level is acceptable. use foo 1.1<1.4 means that any version which begins with 1 and has a 1.4 as the second level is acceptable, with preference given to the highest version in the range. use foo 1.1>1.4 means that any version which begins with 1 and has a 1.4 as the second level is acceptable, with reference given to the lowest version in the range. A terminating dot may be used as well, so that use foo 1.1-1.4. means that any version 1.1 through 1.3 is acceptable, but the only acceptable 1.4 version is 1.4.0. =head3 Combining Lists and Ranges Lists and ranges may be combined in arbitrary ways to make complex preference sets. Thus use foo 1.5 1.0-1.3; means that any version 1.0, 1.1, 1.2, 1.3 or 1.5 is acceptable, without preference order. By contrast, use foo 1.5, 1.0-1.3, 1.4; means that 1.5 is preferred, then anything in the 1.0 to 1.3 range, then 1.4. =head3 Why Not Regexps? It has been suggested that C<globs> or even full-bore regular expressions be allowed for version specification. It has not been included for the following reasons: =over 4 =item * Version numbers are an ordered set of positive integers. As such, simple comparisons are powerful enough to handle most needs. =item * Regexps do not allow for a mechanism to order preference within a given regexp, ie, one could not write use foo 1.[023] and indicate that there was some ordering to the sub-version. I am concerned that people would naively expect that the Do What I Mean principle would cause C<perl> to assume that the following use foo 1.[203] is equivalent to use foo 1.2, 1.0, 1.3 on the naive theory that the two regexps look different so they should do something different. =item * We don't allow regexps in other non-run-time constructs, we shouldn't allow them here. =item * The use of the . as a terminator would seem to be sufficient for all cases where C<globs> have been suggested. Having more than one mechanism for this would intermediate C<perl> programmers to assume that there was some subtle difference between the two. =back Since regexps and C<globs> bring little additional utility and introduce possible confusion, I have chosen not to put them in this suggestion. =head2 Resolving Version Request Problems =head3 When Nothing Works When we permit modules to request only certain versions of other modules, we will find cases where no version of module C<foo> is acceptable to all modules which wish to use it. In such as case, the compiler should give up with an error message stating that due to conflicting version requests, module C<foo> could not be loaded. This could become The Error Message From Hell if sufficient detail was included. A utility (perl module?!) should be provided which would recursively examine the C<use> lines a perl script and the system configuration and produces the appropriately voluminous output report. =head3 When More Than One Acceptable Version Is Found Modules load modules load modules, ad nauseum. It is quite possible that two or more different modules will request some other module. If there is only one version which satisfies all the requests, we don't have a problem. If there is more than one version acceptable to all callers, we choose which to use based on the following rules: =over 4 =item 1. If no preference was expressed, first acceptable version that was found is used. =item 2. If a preference was expressed, highest preference is given to the requests which come from the original script. =item 3. If no request came from the original script, highest preference is given to second-level requesters. If there is more than one second-level requester, the first requesters preferences are used. If there are no second-level requester, the third level is used, and so on. =back =head2 How This Solves The Problems There were four problems identified with the current system. Implementation of this proposal solves those problems as follows: =head3 Discovery Of Older Versions No Longer Aborts Searches The statement use foo 1.2; can cause C<perl> to search C<@INC> until it finds the first C<foo.pm> file of version 1.2 or greater. =head3 Programmer Can Now Specify Newest Module I believe that when a programmer writes use module; `Do What I Mean' should find the newest version of the module present in C<@INC>. The current proposal does I<not> cause this to occur, and thereby permits backwards-compatible behavior. However, the programmer can now write use module >=0.0; and accept any module, but give preference to the highest. =head3 New Module Releases Can Break Existing Scripts This proposal does not prevent new modules from breaking existing scripts. It does, however, permit those scripts to be repaired by the simple change of locking the script to the acceptable version(s) of the module. This is often I<significantly> easier than updating the script, and avoids the possibility of introducing new bugs either due to modifications of the script or from bugs in the newer module. =head3 Test Systems Need Test Modules In mission-critical environments, production versions of scripts could always be released to a version range of a module, reflecting the ranges of the module it had been tested and known to work against: use foo 2.0-2.1; # Accept any 2.0 or 2.1 version When a new version of C<foo.pm> needs to be rolled out with the new version of the script, the version of C<foo.pm> could be set to 2.2 and the new script released with use foo =2.2; # Accept any 2.2 version Now new and old versions of script and module can be released with no impact on existing production software. When it is decided that the new versions should become the standard versions, the new script is copied over the old and the modules are not touched. =head2 Possible Optimization - Indexes A possible problem introduced with this proposal is an even greater increase in the amount of searching of directories that must be done. This is an often-expensive process, and can have a serious impact when even small scripts are run tens of thousands of times per day (as ours do). This could be resolved by adding some sort of simple index files to the installation tree. The index files could simply be a list of all the files (pathnames) found under this particular branch of the file tree. Since those pathnames would contain the version numbers, examining any index file would be sufficient for determining what versions lay where. If later uses of C<use lib> chose a subset of that tree, the index data would already be present. In an ideal situation, only one or two index files might be all that is needed to find all versions of all modules. More complex indexes could be built which might include all the dependency information in a manner not dissimilar to the output of C<lorder(1)>. Reliability would best be done by implementing index construction as an automatic part of module install. As above, this could be automated such that neither the module developer nor the system administrator would have to worry about it; the process would still be: perl6 Makefile.PM make make install and the C<make install> updates the indexes. At that point it is not clear to mean that such an index is required; in its absence C<perl6> should simply search the C<@INC> directories as it does now. =head2 Adaptation to Perl5 There is nothing in this proposal which could not be implemented in perl5.X, and it would probably be a Good Thing if such were done. =head2 Alternative Idea - Module Versioning In Namespaces Some languages allow multiple versions of a module to be loaded simultaneously. It is my opinion that In This Way Lies Madness, but C<perl> has done stranger things. Should we decide to allow this, incorporating the version number into the namespace would allow the appropriate disambiguation. Let us suppose that module C<foo> requires module C<bar v1.0>, while module C<baz> requires module C<bar 2.0>. Also assume that both versions of C<bar> provide a C<op> function. Then these two modules could do module foo.pm module baz.pm use bar =1.0.; use bar =2.0. ; # Uses bar1.0::op # Uses bar2.0::op bar::op(); bar::op(); and each time get the appropriate invocation of C<op>. Similarly modules C<foo> and C<baz> both create a C<bar> object, the object should blessed into the appropriate version of C<baz>, so that my $handle1 = new foo ; my $handle2 = new bar ; my $var1 = $handle1->op(); # Always gets op 1.0 my $var2 = $handle2->op(); # Always gets op 2.0 always invokes the appropriate version of C<$op>. While I'm not seriously suggesting this dual loading be allowed, it should at least be considered by the folks who know more about objects than I do. Note, though, that this kind of feature might prove to be invaluable in testing new versions of modules. With appropriate aliasing added, a test script could do use foo <3.0 as foo_old; use foo =3.0. as new_foo; # do something with foo_old # do identical things with foo_new # compare results Again, I'm not seriously suggesting this feature. But if it comes up, all the module versioning rules above need to be revisited. =head1 REFERENCES lorder(1) - Optimising .o file orders for UNIX loader ld(1)
autarch/perlweb
docs/dev/perl6/rfc/78.pod
Perl
apache-2.0
24,416
package Paws::Greengrass::ListSubscriptionDefinitionsResponse; use Moose; has Definitions => (is => 'ro', isa => 'ArrayRef[Paws::Greengrass::DefinitionInformation]'); has NextToken => (is => 'ro', isa => 'Str'); has _request_id => (is => 'ro', isa => 'Str'); 1; ### main pod documentation begin ### =head1 NAME Paws::Greengrass::ListSubscriptionDefinitionsResponse =head1 ATTRIBUTES =head2 Definitions => ArrayRef[L<Paws::Greengrass::DefinitionInformation>] Definitions =head2 NextToken => Str The token for the next set of results, or ''null'' if there are no additional results. =head2 _request_id => Str =cut
ioanrogers/aws-sdk-perl
auto-lib/Paws/Greengrass/ListSubscriptionDefinitionsResponse.pm
Perl
apache-2.0
637
package VMOMI::ScheduledTaskEventArgument; use parent 'VMOMI::EntityEventArgument'; use strict; use warnings; our @class_ancestors = ( 'EntityEventArgument', 'EventArgument', 'DynamicData', ); our @class_members = ( ['scheduledTask', 'ManagedObjectReference', 0, ], ); sub get_class_ancestors { return @class_ancestors; } sub get_class_members { my $class = shift; my @super_members = $class->SUPER::get_class_members(); return (@super_members, @class_members); } 1;
stumpr/p5-vmomi
lib/VMOMI/ScheduledTaskEventArgument.pm
Perl
apache-2.0
507
package Sisimai::Order; use feature ':5.10'; use strict; use warnings; use Sisimai::Lhost; sub make { # Returns an MTA Order decided by the first word of the "Subject": header # @param [String] argv0 Subject header string # @return [Array] Order of MTA modules # @since v4.25.4 my $class = shift; my $argv0 = shift || return []; my $first = ''; # The following order is decided by the first 2 words of Subject: header state $subject = { 'abuse-report' => ['Sisimai::ARF'], 'auto' => ['Sisimai::RFC3834'], 'auto-reply' => ['Sisimai::RFC3834'], 'automatic-reply' => ['Sisimai::RFC3834'], 'aws-notification' => ['Sisimai::Lhost::AmazonSES'], 'complaint-about' => ['Sisimai::ARF'], 'delivery-failure' => ['Sisimai::Lhost::Domino', 'Sisimai::Lhost::X2'], 'delivery-notification' => ['Sisimai::Lhost::MessagingServer'], 'delivery-report' => ['Sisimai::Lhost::PowerMTA'], 'delivery-status' => [ 'Sisimai::Lhost::GSuite', 'Sisimai::Lhost::Outlook', 'Sisimai::Lhost::GoogleGroups', 'Sisimai::Lhost::McAfee', 'Sisimai::Lhost::OpenSMTPD', 'Sisimai::Lhost::AmazonSES', 'Sisimai::Lhost::AmazonWorkMail', 'Sisimai::Lhost::ReceivingSES', 'Sisimai::Lhost::Gmail', 'Sisimai::Lhost::X3', ], 'dmarc-ietf-dmarc' => ['Sisimai::ARF'], 'email-feedback' => ['Sisimai::ARF'], 'failed-delivery' => ['Sisimai::Lhost::X2'], 'failure-delivery' => ['Sisimai::Lhost::X2'], 'failure-notice' => [ 'Sisimai::Lhost::Yahoo', 'Sisimai::Lhost::qmail', 'Sisimai::Lhost::mFILTER', 'Sisimai::Lhost::Activehunter', 'Sisimai::Lhost::X4', ], 'loop-alert' => ['Sisimai::Lhost::FML'], 'mail-could' => ['Sisimai::Lhost::InterScanMSS'], 'mail-delivery' => [ 'Sisimai::Lhost::Exim', 'Sisimai::Lhost::MailRu', 'Sisimai::Lhost::GMX', 'Sisimai::Lhost::EinsUndEins', 'Sisimai::Lhost::Zoho', 'Sisimai::Lhost::MessageLabs', 'Sisimai::Lhost::MXLogic', ], 'mail-failure' => ['Sisimai::Lhost::Exim'], 'mail-not' => ['Sisimai::Lhost::X4'], 'mail-system' => ['Sisimai::Lhost::EZweb'], 'message-delivery' => ['Sisimai::Lhost::MailFoundry'], 'message-frozen' => ['Sisimai::Lhost::Exim'], 'message-you' => ['Sisimai::Lhost::Barracuda'], 'non-recapitabile' => ['Sisimai::Lhost::Exchange2007'], 'non-remis' => ['Sisimai::Lhost::Exchange2007'], 'notice' => ['Sisimai::Lhost::Courier'], 'permanent-delivery' => ['Sisimai::Lhost::X4'], 'postmaster-notify' => ['Sisimai::Lhost::Sendmail'], 'returned-mail' => [ 'Sisimai::Lhost::Sendmail', 'Sisimai::Lhost::Aol', 'Sisimai::Lhost::V5sendmail', 'Sisimai::Lhost::Bigfoot', 'Sisimai::Lhost::Biglobe', 'Sisimai::Lhost::X1', ], 'sorry-your' => ['Sisimai::Lhost::Facebook'], 'there-was' => ['Sisimai::Lhost::X6'], 'undeliverable' => [ 'Sisimai::Lhost::Office365', 'Sisimai::Lhost::Exchange2007', 'Sisimai::Lhost::Aol', 'Sisimai::Lhost::Exchange2003', ], 'undeliverable-mail' => [ 'Sisimai::Lhost::Amavis', 'Sisimai::Lhost::MailMarshalSMTP', 'Sisimai::Lhost::IMailServer', ], 'undeliverable-message' => ['Sisimai::Lhost::Notes', 'Sisimai::Lhost::Verizon'], 'undelivered-mail' => [ 'Sisimai::Lhost::Postfix', 'Sisimai::Lhost::Aol', 'Sisimai::Lhost::SendGrid', 'Sisimai::Lhost::Zoho', ], 'warning' => ['Sisimai::Lhost::Sendmail', 'Sisimai::Lhost::Exim'], }; $argv0 =~ y/_[] / /s; $argv0 =~ s/\A[ ]+//; my @words = split(/[ ]/, lc($argv0), 3); if( rindex($words[0], ':') > 0 ) { # Undeliverable: ..., notify: ... $first = lc $1 if $argv0 =~ /\A(.+?):/; } else { # Postmaster notify, returned mail, ... $first = join('-', splice(@words, 0, 2)); } $first =~ y/:",*//d; return $subject->{ $first } || []; } sub default { # Make default order of MTA modules to be loaded # @return [Array] Default order list of MTA modules # @since v4.13.1 return [map { 'Sisimai::Lhost::'.$_ } @{ Sisimai::Lhost->index() }]; } sub another { # Make MTA modules list as a spare # @return [Array] Ordered module list # @since v4.13.1 # There are another patterns in the value of "Subject:" header of a bounce mail # generated by the following MTA/ESP modules state $orderE0 = [ 'Sisimai::Lhost::MailRu', 'Sisimai::Lhost::Yandex', 'Sisimai::Lhost::Exim', 'Sisimai::Lhost::Sendmail', 'Sisimai::Lhost::Aol', 'Sisimai::Lhost::Office365', 'Sisimai::Lhost::Exchange2007', 'Sisimai::Lhost::Exchange2003', 'Sisimai::Lhost::AmazonWorkMail', 'Sisimai::Lhost::AmazonSES', 'Sisimai::Lhost::Barracuda', 'Sisimai::Lhost::InterScanMSS', 'Sisimai::Lhost::KDDI', 'Sisimai::Lhost::SurfControl', 'Sisimai::Lhost::Verizon', 'Sisimai::Lhost::ApacheJames', 'Sisimai::Lhost::X2', 'Sisimai::Lhost::X5', 'Sisimai::Lhost::FML', ]; # Fallback list: The following MTA/ESP modules is not listed orderE0 state $orderE1 = [ 'Sisimai::Lhost::Postfix', 'Sisimai::Lhost::GSuite', 'Sisimai::Lhost::Yahoo', 'Sisimai::Lhost::Outlook', 'Sisimai::Lhost::GMX', 'Sisimai::Lhost::MessagingServer', 'Sisimai::Lhost::EinsUndEins', 'Sisimai::Lhost::Domino', 'Sisimai::Lhost::Notes', 'Sisimai::Lhost::qmail', 'Sisimai::Lhost::Courier', 'Sisimai::Lhost::OpenSMTPD', 'Sisimai::Lhost::Zoho', 'Sisimai::Lhost::MessageLabs', 'Sisimai::Lhost::MXLogic', 'Sisimai::Lhost::MailFoundry', 'Sisimai::Lhost::McAfee', 'Sisimai::Lhost::V5sendmail', 'Sisimai::Lhost::mFILTER', 'Sisimai::Lhost::SendGrid', 'Sisimai::Lhost::ReceivingSES', 'Sisimai::Lhost::Amavis', 'Sisimai::Lhost::PowerMTA', 'Sisimai::Lhost::GoogleGroups', 'Sisimai::Lhost::Gmail', 'Sisimai::Lhost::EZweb', 'Sisimai::Lhost::IMailServer', 'Sisimai::Lhost::MailMarshalSMTP', 'Sisimai::Lhost::Activehunter', 'Sisimai::Lhost::Bigfoot', 'Sisimai::Lhost::Biglobe', 'Sisimai::Lhost::Facebook', 'Sisimai::Lhost::X4', 'Sisimai::Lhost::X1', 'Sisimai::Lhost::X3', 'Sisimai::Lhost::X6', ]; return [@$orderE0, @$orderE1]; }; 1; __END__ =encoding utf-8 =head1 NAME Sisimai::Order - A Class for making an optimized order list for calling MTA modules in Sisimai::Lhost::*. =head1 SYNOPSIS use Sisimai::Order =head1 DESCRIPTION Sisimai::Order class makes optimized order list which include MTA modules to be loaded on first from MTA specific headers in the bounce mail headers such as X-Failed-Recipients, which MTA modules for JSON structure. =head1 CLASS METHODS =head2 C<B<default()>> C<default()> returns a default order of MTA modules as an array reference. The default order is defined at Sisimai::Lhost->index method. print for @{ Sisimai::Order->default }; =head2 C<B<another()>> C<another()> returns another list of MTA modules as an array reference. Another list is defined at this class. print for @{ Sisimai::Order->another }; =head1 AUTHOR azumakuniyuki =head1 COPYRIGHT Copyright (C) 2015-2017,2019,2020 azumakuniyuki, All rights reserved. =head1 LICENSE This software is distributed under The BSD 2-Clause License. =cut
sisimai/p5-Sisimai
lib/Sisimai/Order.pm
Perl
bsd-2-clause
8,125
package Mojo::Webqq::Model::Ext; BEGIN{ eval{ require Webqq::Encryption; }; unless($@){ $Mojo::Webqq::Model::Ext::has_webqq_encryption = 1; } } our $_retcode; our $_verifycode; our $_md5_salt; our $_verifysession; our $_is_rand_salt; our $_api_check_sig; sub model_ext_authorize{ my $self = shift; if(not $Mojo::Webqq::Model::Ext::has_webqq_encryption){ $self->warn("未安装 Webqq::Encryption 模块,无法获取扩展信息,安装方法参见: https://metacpan.org/pod/distribution/Webqq-Encryption/lib/Webqq/Encryption.pod"); $self->model_ext(0); return; } if($self->login_type eq 'login' and $self->account !~ /^\d+$/){ $self->error("使用账号密码登录方式,account参数不是有效的QQ号码"); $self->stop(); } if($self->pwd){ $self->info("开始账号密码方式登录...") if $self->login_type eq 'login'; $self->info("尝取扩展信息授权...") if $self->login_type eq 'qrlogin'; my $ret = $self->_model_ext_prepare() && $self->_model_ext_check() && $self->_model_ext_login() && $self->_model_ext_check_sig(); if($ret){ $self->model_ext($ret); #$self->info("账号密码方式登录成功"); return 1; } else{ #$self->info("账号密码方式失败"); return 0; } } else{ $self->warn("未设置有效的登录密码,无法进行登录"); return 0; } return 1; } sub _model_ext_prepare { my $self = shift; $self->debug("账号登录中(prepare)..."); my(undef,$ua,$tx) = $self->http_get('https://xui.ptlogin2.qq.com/cgi-bin/xlogin?appid=715030901&daid=73&pt_no_auth=1&s_url=http%3A%2F%2Fqun.qq.com%2F',{Referer=>'http://qun.qq.com/',ua_debug_res_body=>0, blocking=> 1}); return $tx->res->code == 200?1:0; } sub _model_ext_check { my $self = shift; $self->debug("账号登录中(check)..."); my $content = $self->http_get( $self->gen_url('https://ssl.ptlogin2.qq.com/check', ( regmaster => '', pt_tea => 2, pt_vcode => 1, uin => ($self->login_type eq 'login'?$self->account:$self->uid), appid => 715030901, js_ver => 10233, js_type => 1, login_sig => $self->search_cookie("pt_login_sig"), u1 => 'http%3A%2F%2Fqun.qq.com%2F', r => rand(), pt_uistyle=> 40, pt_jstoken=> 485008785 ) ), {blocking=>1,Referer => 'https://xui.ptlogin2.qq.com/cgi-bin/xlogin?appid=715030901&daid=73&pt_no_auth=1&s_url=http%3A%2F%2Fqun.qq.com%2F'}, ); my($retcode,$verifycode,$md5_salt,$verifysession,$is_rand_salt) = $content =~/'([^']*)'/g; if($retcode == 0 ){ $_retcode = $retcode; $_verifycode = $verifycode; $_md5_salt = $md5_salt; $_verifysession = $verifysession; $_is_rand_salt = $is_rand_salt; } else{ $self->error("账号登录失败: 可能因为登录环境变化引起,解决方法参见:https://github.com/sjdy521/Mojo-Webqq/issues/183"); } return $retcode == 0? 1 : 0; } sub _model_ext_login{ my $self = shift; $self->debug("账号登录中(login)..."); my $content = $self->http_get( $self->gen_url('https://ssl.ptlogin2.qq.com/login', ( u => ($self->login_type eq 'login'?$self->account:$self->uid), verifycode => $_verifycode, pt_vcode_v1 => 0, pt_verifysession_v1 => ,$_verifysession // $self->search_cookie('verifysession'), p => Webqq::Encryption::pwd_encrypt($self->pwd,$_md5_salt,$_verifycode,1), pt_randsalt => $_is_rand_salt || 0,, pt_jstoken => 485008785, u1 => 'http%3A%2F%2Fqun.qq.com%2F', ptredirect => 1, h => 1, t => 1, g => 1, from_ui => 1, ptlang => 2052, action => '1-14-1515074375763', js_ver => 10233, js_type => 1, login_sig => $self->search_cookie("pt_login_sig"), pt_uistyle => 40, aid => 715030901, daid => 73, has_onekey => 1, ) ) . '&', { Referer => 'https://xui.ptlogin2.qq.com/cgi-bin/xlogin?appid=715030901&daid=73&pt_no_auth=1&s_url=http%3A%2F%2Fqun.qq.com%2F', blocking => 1, }, ); my($retcode,undef,$api_check_sig,undef,$info,$nick) = $content =~/'([^']*)'/g; if($retcode != 0){ $self->warn("账号登录失败: $info"); } else{ $_api_check_sig = $api_check_sig; } return $retcode == 0?1:0; } sub _model_ext_check_sig { my $self = shift; $self->debug("账号登录中(check_sig)..."); my(undef,$ua,$tx) = $self->http_get($_api_check_sig,{ua_debug_res_body=>0}); return $tx->res->code == 200?1:0; } 1;
sjdy521/Mojo-Webqq
lib/Mojo/Webqq/Model/Ext.pm
Perl
bsd-2-clause
5,281
# This perl snippet is appended to the perl module generated by SWIG # customizing and extending its functionality package Finance::TA; use strict; our $VERSION = v0.5.0; package Finance::TA::TA_RetCodeInfo; # Redefine &new to a friendler version accepting an optional parameter undef *new; *new = sub { my ($pkg, $code) = @_; my $self = ::Finance::TAc::new_TA_RetCodeInfo(); bless $self, $pkg if defined($self); ::Finance::TA::TA_SetRetCodeInfo($code, $self) if defined($code) && defined($self); return $self; }; package Finance::TA::TA_FuncHandle; sub new { my ($pkg, $name) = @_; my $self; my $retCode = ::Finance::TAc::TA_GetFuncHandle($name, \$self); if (defined $self) { bless $self, $pkg; } return $self; } sub GetFuncInfo { my ($self) = @_; my $info; my $retCode = ::Finance::TAc::TA_GetFuncInfo($self, \$info); return $info; } sub GetInputParameterInfo { my ($self, $param) = @_; my $info; my $retCode = ::Finance::TAc::TA_GetInputParameterInfo($self, $param, \$info); return $info; } sub GetOutputParameterInfo { my ($self, $param) = @_; my $info; my $retCode = ::Finance::TAc::TA_GetOutputParameterInfo($self, $param, \$info); return $info; } sub GetOptInputParameterInfo { my ($self, $param) = @_; my $info; my $retCode = ::Finance::TAc::TA_GetOptInputParameterInfo($self, $param, \$info); return $info; } package Finance::TA::TA_FuncInfo; sub new { my ($pkg, $handle) = @_; my $self; my $retCode = ::Finance::TAc::TA_GetFuncInfo($handle, \$self); if (defined $self) { bless $self, $pkg; } return $self; } package Finance::TA; # Redefine exported TA_Initialize/TA_Shutdown functions # to be more "Perl-friendly" our $INITIALIZED = 0; undef *TA_Initialize; *TA_Initialize = sub { my $retCode; if ($INITIALIZED) { $retCode = TA_Shutdown(); return $retCode if $retCode != $Finance::TA::TA_SUCCESS; } # Accept calls with no parameters $retCode = ::Finance::TAc::TA_Initialize(); $INITIALIZED = ($retCode == $Finance::TA::TA_SUCCESS); return $retCode; }; undef *TA_Shutdown; *TA_Shutdown = sub { if ($INITIALIZED) { $INITIALIZED = 0; return ::Finance::TAc::TA_Shutdown(); } else { # We are more forgiving on multiple calls to &TA_Shutdown # than TA-LIB on TA_Shutdown() return $Finance::TA::TA_SUCCESS; } }; # SWIG does not export anything by default # This small loop circumvents that and export everything beginning with 'TA_' foreach (keys %Finance::TA::) { if (/^TA_/) { local *::sym = $Finance::TA::{$_}; push(@Finance::TA::EXPORT, "\$$_") if defined $::sym; push(@Finance::TA::EXPORT, "\@$_") if defined @::sym; push(@Finance::TA::EXPORT, "\%$_") if defined %::sym; push(@Finance::TA::EXPORT, $_) if defined &::sym; } } END { TA_Shutdown() } TA_Initialize(); $INITIALIZED;
d-s-x/ta-lib
swig/src/interface/perl.pm
Perl
bsd-3-clause
3,149
package Google::Ads::AdWords::v201406::AdGroupCriterionLabel; use strict; use warnings; __PACKAGE__->_set_element_form_qualified(1); sub get_xmlns { 'https://adwords.google.com/api/adwords/cm/v201406' }; our $XML_ATTRIBUTE_CLASS; undef $XML_ATTRIBUTE_CLASS; sub __get_attr_class { return $XML_ATTRIBUTE_CLASS; } use Class::Std::Fast::Storable constructor => 'none'; use base qw(Google::Ads::SOAP::Typelib::ComplexType); { # BLOCK to scope variables my %adGroupId_of :ATTR(:get<adGroupId>); my %criterionId_of :ATTR(:get<criterionId>); my %labelId_of :ATTR(:get<labelId>); __PACKAGE__->_factory( [ qw( adGroupId criterionId labelId ) ], { 'adGroupId' => \%adGroupId_of, 'criterionId' => \%criterionId_of, 'labelId' => \%labelId_of, }, { 'adGroupId' => 'SOAP::WSDL::XSD::Typelib::Builtin::long', 'criterionId' => 'SOAP::WSDL::XSD::Typelib::Builtin::long', 'labelId' => 'SOAP::WSDL::XSD::Typelib::Builtin::long', }, { 'adGroupId' => 'adGroupId', 'criterionId' => 'criterionId', 'labelId' => 'labelId', } ); } # end BLOCK 1; =pod =head1 NAME Google::Ads::AdWords::v201406::AdGroupCriterionLabel =head1 DESCRIPTION Perl data type class for the XML Schema defined complexType AdGroupCriterionLabel from the namespace https://adwords.google.com/api/adwords/cm/v201406. Manages the labels associated with an AdGroupCriterion. =head2 PROPERTIES The following properties may be accessed using get_PROPERTY / set_PROPERTY methods: =over =item * adGroupId =item * criterionId =item * labelId =back =head1 METHODS =head2 new Constructor. The following data structure may be passed to new(): =head1 AUTHOR Generated by SOAP::WSDL =cut
gitpan/GOOGLE-ADWORDS-PERL-CLIENT
lib/Google/Ads/AdWords/v201406/AdGroupCriterionLabel.pm
Perl
apache-2.0
1,807
package Test::Nginx::IMAP; # (C) Maxim Dounin # Module for nginx imap tests. ############################################################################### use warnings; use strict; use Test::More qw//; use IO::Socket; use Socket qw/ CRLF /; use Test::Nginx; use base qw/ IO::Socket::INET /; sub new { my $class = shift; my $self = return $class->SUPER::new( Proto => "tcp", PeerAddr => "127.0.0.1:8143", @_ ) or die "Can't connect to nginx: $!\n"; $self->autoflush(1); return $self; } sub send { my ($self, $cmd) = @_; log_out($cmd); $self->print($cmd . CRLF); } sub read { my ($self) = @_; eval { local $SIG{ALRM} = sub { die "timeout\n" }; alarm(2); while (<$self>) { log_in($_); # XXX next if m/^\d\d\d-/; last; } alarm(0); }; alarm(0); if ($@) { log_in("died: $@"); return undef; } return $_; } sub check { my ($self, $regex, $name) = @_; Test::More->builder->like($self->read(), $regex, $name); } sub ok { my $self = shift; Test::More->builder->like($self->read(), qr/^\S+ OK/, @_); } ############################################################################### sub imap_test_daemon { my $server = IO::Socket::INET->new( Proto => 'tcp', LocalAddr => '127.0.0.1:8144', Listen => 5, Reuse => 1 ) or die "Can't create listening socket: $!\n"; while (my $client = $server->accept()) { $client->autoflush(1); print $client "* OK fake imap server ready" . CRLF; while (<$client>) { my $tag = ''; $tag = $1 if m/^(\S+)/; s/^(\S+)\s+//; if (/^logout/i) { print $client $tag . ' OK logout ok' . CRLF; } elsif (/^login /i) { print $client $tag . ' OK login ok' . CRLF; } else { print $client $tag . ' ERR unknown command' . CRLF; } } close $client; } } ############################################################################### 1; ###############################################################################
yeahdongcn/SEnginx
test/lib/Test/Nginx/IMAP.pm
Perl
bsd-2-clause
1,966
package # Date::Manip::Offset::off275; # Copyright (c) 2008-2014 Sullivan Beck. All rights reserved. # This program is free software; you can redistribute it and/or modify it # under the same terms as Perl itself. # This file was automatically generated. Any changes to this file will # be lost the next time 'tzdata' is run. # Generated on: Fri Nov 21 11:03:45 EST 2014 # Data version: tzdata2014j # Code version: tzcode2014j # This module contains data from the zoneinfo time zone database. The original # data was obtained from the URL: # ftp://ftp.iana.orgtz use strict; use warnings; require 5.010000; our ($VERSION); $VERSION='6.48'; END { undef $VERSION; } our ($Offset,%Offset); END { undef $Offset; undef %Offset; } $Offset = '-03:30:52'; %Offset = ( 0 => [ 'america/st_johns', 'america/goose_bay', ], ); 1;
nriley/Pester
Source/Manip/Offset/off275.pm
Perl
bsd-2-clause
881
# # Copyright 2017 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package hardware::printers::standard::rfc3805::plugin; use strict; use warnings; use base qw(centreon::plugins::script_snmp); sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '0.1'; %{$self->{modes}} = ( 'cover-status' => 'hardware::printers::standard::rfc3805::mode::coverstatus', 'markersupply-usage' => 'hardware::printers::standard::rfc3805::mode::markersupply', 'marker-impression' => 'hardware::printers::standard::rfc3805::mode::markerimpression', 'papertray-usage' => 'hardware::printers::standard::rfc3805::mode::papertray', 'hardware-device' => 'snmp_standard::mode::hardwaredevice', 'printer-error' => 'snmp_standard::mode::printererror', ); return $self; } 1; __END__ =head1 PLUGIN DESCRIPTION Check printers compatible RFC3805 (Printer MIB v2) in SNMP. Don't know if you can have multiple printer devices at once. So it's not managed yet. =cut
nichols-356/centreon-plugins
hardware/printers/standard/rfc3805/plugin.pm
Perl
apache-2.0
1,979
######################################################################## # Bio::KBase::ObjectAPI::KBaseBiochem::ReactionSet - This is the moose object corresponding to the ReactionSet object # Authors: Christopher Henry, Scott Devoid, Paul Frybarger # Contact email: chenry@mcs.anl.gov # Development location: Mathematics and Computer Science Division, Argonne National Lab # Date of module creation: 2012-03-26T23:22:35 ######################################################################## use strict; use Bio::KBase::ObjectAPI::KBaseBiochem::DB::ReactionSet; package Bio::KBase::ObjectAPI::KBaseBiochem::ReactionSet; use Moose; use Bio::KBase::ObjectAPI::utilities; use namespace::autoclean; extends 'Bio::KBase::ObjectAPI::KBaseBiochem::DB::ReactionSet'; #*********************************************************************************************************** # ADDITIONAL ATTRIBUTES: #*********************************************************************************************************** has reactionCodeList => ( is => 'rw', isa => 'Str',printOrder => '1', type => 'msdata', metaclass => 'Typed', lazy => 1, builder => '_buildreactionCodeList' ); #*********************************************************************************************************** # BUILDERS: #*********************************************************************************************************** sub _buildreactionCodeList { my ($self) = @_; my $string = ""; my $rxns = $self->reactions(); for (my $i=0; $i < @{$rxns}; $i++) { if (length($string) > 0) { $string .= ";" } my $rxn = $rxns->[$i]; $string .= $rxn->uuid(); } return $string; } #*********************************************************************************************************** # CONSTANTS: #*********************************************************************************************************** #*********************************************************************************************************** # FUNCTIONS: #*********************************************************************************************************** =head3 modelCoverage Definition: fraction = Bio::KBase::ObjectAPI::KBaseBiochem::ReactionSet->modelCoverage({ model => Bio::KBase::ObjectAPI::KBaseFBA::FBAModel(REQ) }); Description: Calculates the fraction of the reaction set covered by the model =cut sub modelCoverage { my $self = shift; my $args = Bio::KBase::ObjectAPI::utilities::args(["model"],{}, @_); #TODO Implement modelCoverage function in ReactionSet return 1; } =head3 containsReaction Definition: fraction = Bio::KBase::ObjectAPI::KBaseBiochem::ReactionSet->containsReaction({ model => Bio::KBase::ObjectAPI::KBaseFBA::FBAModel(REQ) }); Description: Returns "1" if the reaction set contains the specified reaction =cut sub containsReaction { my $self = shift; my $args = Bio::KBase::ObjectAPI::utilities::args(["reaction"], {}, @_); #TODO Implement containsReaction function in ReactionSet return 1; } __PACKAGE__->meta->make_immutable; 1;
samseaver/KBaseFBAModeling
lib/Bio/KBase/ObjectAPI/KBaseBiochem/ReactionSet.pm
Perl
mit
3,060
=head1 NAME Term::ReadLine - Perl interface to various C<readline> packages. If no real package is found, substitutes stubs instead of basic functions. =head1 SYNOPSIS use Term::ReadLine; my $term = Term::ReadLine->new('Simple Perl calc'); my $prompt = "Enter your arithmetic expression: "; my $OUT = $term->OUT || \*STDOUT; while ( defined ($_ = $term->readline($prompt)) ) { my $res = eval($_); warn $@ if $@; print $OUT $res, "\n" unless $@; $term->addhistory($_) if /\S/; } =head1 DESCRIPTION This package is just a front end to some other packages. It's a stub to set up a common interface to the various ReadLine implementations found on CPAN (under the C<Term::ReadLine::*> namespace). =head1 Minimal set of supported functions All the supported functions should be called as methods, i.e., either as $term = Term::ReadLine->new('name'); or as $term->addhistory('row'); where $term is a return value of Term::ReadLine-E<gt>new(). =over 12 =item C<ReadLine> returns the actual package that executes the commands. Among possible values are C<Term::ReadLine::Gnu>, C<Term::ReadLine::Perl>, C<Term::ReadLine::Stub>. =item C<new> returns the handle for subsequent calls to following functions. Argument is the name of the application. Optionally can be followed by two arguments for C<IN> and C<OUT> filehandles. These arguments should be globs. =item C<readline> gets an input line, I<possibly> with actual C<readline> support. Trailing newline is removed. Returns C<undef> on C<EOF>. =item C<addhistory> adds the line to the history of input, from where it can be used if the actual C<readline> is present. =item C<IN>, C<OUT> return the filehandles for input and output or C<undef> if C<readline> input and output cannot be used for Perl. =item C<MinLine> If argument is specified, it is an advice on minimal size of line to be included into history. C<undef> means do not include anything into history. Returns the old value. =item C<findConsole> returns an array with two strings that give most appropriate names for files for input and output using conventions C<"E<lt>$in">, C<"E<gt>out">. =item Attribs returns a reference to a hash which describes internal configuration of the package. Names of keys in this hash conform to standard conventions with the leading C<rl_> stripped. =item C<Features> Returns a reference to a hash with keys being features present in current implementation. Several optional features are used in the minimal interface: C<appname> should be present if the first argument to C<new> is recognized, and C<minline> should be present if C<MinLine> method is not dummy. C<autohistory> should be present if lines are put into history automatically (maybe subject to C<MinLine>), and C<addhistory> if C<addhistory> method is not dummy. If C<Features> method reports a feature C<attribs> as present, the method C<Attribs> is not dummy. =back =head1 Additional supported functions Actually C<Term::ReadLine> can use some other package, that will support a richer set of commands. All these commands are callable via method interface and have names which conform to standard conventions with the leading C<rl_> stripped. The stub package included with the perl distribution allows some additional methods: =over 12 =item C<tkRunning> makes Tk event loop run when waiting for user input (i.e., during C<readline> method). =item C<event_loop> Registers call-backs to wait for user input (i.e., during C<readline> method). This supercedes tkRunning. The first call-back registered is the call back for waiting. It is expected that the callback will call the current event loop until there is something waiting to get on the input filehandle. The parameter passed in is the return value of the second call back. The second call-back registered is the call back for registration. The input filehandle (often STDIN, but not necessarily) will be passed in. For example, with AnyEvent: $term->event_loop(sub { my $data = shift; $data->[1] = AE::cv(); $data->[1]->recv(); }, sub { my $fh = shift; my $data = []; $data->[0] = AE::io($fh, 0, sub { $data->[1]->send() }); $data; }); The second call-back is optional if the call back is registered prior to the call to $term-E<gt>readline. Deregistration is done in this case by calling event_loop with C<undef> as its parameter: $term->event_loop(undef); This will cause the data array ref to be removed, allowing normal garbage collection to clean it up. With AnyEvent, that will cause $data->[0] to be cleaned up, and AnyEvent will automatically cancel the watcher at that time. If another loop requires more than that to clean up a file watcher, that will be up to the caller to handle. =item C<ornaments> makes the command line stand out by using termcap data. The argument to C<ornaments> should be 0, 1, or a string of a form C<"aa,bb,cc,dd">. Four components of this string should be names of I<terminal capacities>, first two will be issued to make the prompt standout, last two to make the input line standout. =item C<newTTY> takes two arguments which are input filehandle and output filehandle. Switches to use these filehandles. =back One can check whether the currently loaded ReadLine package supports these methods by checking for corresponding C<Features>. =head1 EXPORTS None =head1 ENVIRONMENT The environment variable C<PERL_RL> governs which ReadLine clone is loaded. If the value is false, a dummy interface is used. If the value is true, it should be tail of the name of the package to use, such as C<Perl> or C<Gnu>. As a special case, if the value of this variable is space-separated, the tail might be used to disable the ornaments by setting the tail to be C<o=0> or C<ornaments=0>. The head should be as described above, say If the variable is not set, or if the head of space-separated list is empty, the best available package is loaded. export "PERL_RL=Perl o=0" # Use Perl ReadLine sans ornaments export "PERL_RL= o=0" # Use best available ReadLine sans ornaments (Note that processing of C<PERL_RL> for ornaments is in the discretion of the particular used C<Term::ReadLine::*> package). =cut use strict; package Term::ReadLine::Stub; our @ISA = qw'Term::ReadLine::Tk Term::ReadLine::TermCap'; $DB::emacs = $DB::emacs; # To peacify -w our @rl_term_set; *rl_term_set = \@Term::ReadLine::TermCap::rl_term_set; sub PERL_UNICODE_STDIN () { 0x0001 } sub ReadLine {'Term::ReadLine::Stub'} sub readline { my $self = shift; my ($in,$out,$str) = @$self; my $prompt = shift; print $out $rl_term_set[0], $prompt, $rl_term_set[1], $rl_term_set[2]; $self->register_Tk if not $Term::ReadLine::registered and $Term::ReadLine::toloop; #$str = scalar <$in>; $str = $self->get_line; utf8::upgrade($str) if (${^UNICODE} & PERL_UNICODE_STDIN || defined ${^ENCODING}) && utf8::valid($str); print $out $rl_term_set[3]; # bug in 5.000: chomping empty string creats length -1: chomp $str if defined $str; $str; } sub addhistory {} sub findConsole { my $console; my $consoleOUT; if (-e "/dev/tty" and $^O ne 'MSWin32') { $console = "/dev/tty"; } elsif (-e "con" or $^O eq 'MSWin32') { $console = 'CONIN$'; $consoleOUT = 'CONOUT$'; } else { $console = "sys\$command"; } if (($^O eq 'amigaos') || ($^O eq 'beos') || ($^O eq 'epoc')) { $console = undef; } elsif ($^O eq 'os2') { if ($DB::emacs) { $console = undef; } else { $console = "/dev/con"; } } $consoleOUT = $console unless defined $consoleOUT; $console = "&STDIN" unless defined $console; if ($console eq "/dev/tty" && !open(my $fh, "<", $console)) { $console = "&STDIN"; undef($consoleOUT); } if (!defined $consoleOUT) { $consoleOUT = defined fileno(STDERR) && $^O ne 'MSWin32' ? "&STDERR" : "&STDOUT"; } ($console,$consoleOUT); } sub new { die "method new called with wrong number of arguments" unless @_==2 or @_==4; #local (*FIN, *FOUT); my ($FIN, $FOUT, $ret); if (@_==2) { my($console, $consoleOUT) = $_[0]->findConsole; # the Windows CONIN$ needs GENERIC_WRITE mode to allow # a SetConsoleMode() if we end up using Term::ReadKey open FIN, ( $^O eq 'MSWin32' && $console eq 'CONIN$' ) ? "+<$console" : "<$console"; open FOUT,">$consoleOUT"; #OUT->autoflush(1); # Conflicts with debugger? my $sel = select(FOUT); $| = 1; # for DB::OUT select($sel); $ret = bless [\*FIN, \*FOUT]; } else { # Filehandles supplied $FIN = $_[2]; $FOUT = $_[3]; #OUT->autoflush(1); # Conflicts with debugger? my $sel = select($FOUT); $| = 1; # for DB::OUT select($sel); $ret = bless [$FIN, $FOUT]; } if ($ret->Features->{ornaments} and not ($ENV{PERL_RL} and $ENV{PERL_RL} =~ /\bo\w*=0/)) { local $Term::ReadLine::termcap_nowarn = 1; $ret->ornaments(1); } return $ret; } sub newTTY { my ($self, $in, $out) = @_; $self->[0] = $in; $self->[1] = $out; my $sel = select($out); $| = 1; # for DB::OUT select($sel); } sub IN { shift->[0] } sub OUT { shift->[1] } sub MinLine { undef } sub Attribs { {} } my %features = (tkRunning => 1, ornaments => 1, 'newTTY' => 1); sub Features { \%features } #sub get_line { # my $self = shift; # my $in = $self->IN; # local ($/) = "\n"; # return scalar <$in>; #} package Term::ReadLine; # So late to allow the above code be defined? our $VERSION = '1.10'; my ($which) = exists $ENV{PERL_RL} ? split /\s+/, $ENV{PERL_RL} : undef; if ($which) { if ($which =~ /\bgnu\b/i){ eval "use Term::ReadLine::Gnu;"; } elsif ($which =~ /\bperl\b/i) { eval "use Term::ReadLine::Perl;"; } elsif ($which =~ /^(Stub|TermCap|Tk)$/) { # it is already in memory to avoid false exception as seen in: # PERL_RL=Stub perl -e'$SIG{__DIE__} = sub { print @_ }; require Term::ReadLine' } else { eval "use Term::ReadLine::$which;"; } } elsif (defined $which and $which ne '') { # Defined but false # Do nothing fancy } else { eval "use Term::ReadLine::Gnu; 1" or eval "use Term::ReadLine::Perl; 1"; } #require FileHandle; # To make possible switch off RL in debugger: (Not needed, work done # in debugger). our @ISA; if (defined &Term::ReadLine::Gnu::readline) { @ISA = qw(Term::ReadLine::Gnu Term::ReadLine::Stub); } elsif (defined &Term::ReadLine::Perl::readline) { @ISA = qw(Term::ReadLine::Perl Term::ReadLine::Stub); } elsif (defined $which && defined &{"Term::ReadLine::$which\::readline"}) { @ISA = "Term::ReadLine::$which"; } else { @ISA = qw(Term::ReadLine::Stub); } package Term::ReadLine::TermCap; # Prompt-start, prompt-end, command-line-start, command-line-end # -- zero-width beautifies to emit around prompt and the command line. our @rl_term_set = ("","","",""); # string encoded: our $rl_term_set = ',,,'; our $terminal; sub LoadTermCap { return if defined $terminal; require Term::Cap; $terminal = Tgetent Term::Cap ({OSPEED => 9600}); # Avoid warning. } sub ornaments { shift; return $rl_term_set unless @_; $rl_term_set = shift; $rl_term_set ||= ',,,'; $rl_term_set = 'us,ue,md,me' if $rl_term_set eq '1'; my @ts = split /,/, $rl_term_set, 4; eval { LoadTermCap }; unless (defined $terminal) { warn("Cannot find termcap: $@\n") unless $Term::ReadLine::termcap_nowarn; $rl_term_set = ',,,'; return; } @rl_term_set = map {$_ ? $terminal->Tputs($_,1) || '' : ''} @ts; return $rl_term_set; } package Term::ReadLine::Tk; # This package inserts a Tk->fileevent() before the diamond operator. # The Tk watcher dispatches Tk events until the filehandle returned by # the$term->IN() accessor becomes ready for reading. It's assumed # that the diamond operator will return a line of input immediately at # that point. my ($giveup); # maybe in the future the Tk-specific aspects will be removed. sub Tk_loop{ if (ref $Term::ReadLine::toloop) { $Term::ReadLine::toloop->[0]->($Term::ReadLine::toloop->[2]); } else { Tk::DoOneEvent(0) until $giveup; $giveup = 0; } }; sub register_Tk { my $self = shift; unless ($Term::ReadLine::registered++) { if (ref $Term::ReadLine::toloop) { $Term::ReadLine::toloop->[2] = $Term::ReadLine::toloop->[1]->($self->IN) if $Term::ReadLine::toloop->[1]; } else { Tk->fileevent($self->IN,'readable',sub { $giveup = 1}); } } }; sub tkRunning { $Term::ReadLine::toloop = $_[1] if @_ > 1; $Term::ReadLine::toloop; } sub event_loop { shift; # T::RL::Gnu and T::RL::Perl check that this exists, if not, # it doesn't call the loop. Those modules will need to be # fixed before this can be removed. if (not defined &Tk::DoOneEvent) { *Tk::DoOneEvent = sub { die "what?"; # this shouldn't be called. } } # store the callback in toloop, again so that other modules will # recognise it and call us for the loop. $Term::ReadLine::toloop = [ @_ ] if @_ > 0; # 0 because we shifted off $self. $Term::ReadLine::toloop; } sub PERL_UNICODE_STDIN () { 0x0001 } sub get_line { my $self = shift; my ($in,$out,$str) = @$self; if ($Term::ReadLine::toloop) { $self->register_Tk if not $Term::ReadLine::registered; $self->Tk_loop; } local ($/) = "\n"; $str = <$in>; utf8::upgrade($str) if (${^UNICODE} & PERL_UNICODE_STDIN || defined ${^ENCODING}) && utf8::valid($str); print $out $rl_term_set[3]; # bug in 5.000: chomping empty string creats length -1: chomp $str if defined $str; $str; } 1;
liuyangning/WX_web
xampp/perl/lib/Term/ReadLine.pm
Perl
mit
13,836
package Moose::Meta::Method::Accessor::Native; BEGIN { $Moose::Meta::Method::Accessor::Native::AUTHORITY = 'cpan:STEVAN'; } { $Moose::Meta::Method::Accessor::Native::VERSION = '2.0604'; } use strict; use warnings; use Carp qw( confess ); use Scalar::Util qw( blessed weaken ); use Moose::Role; around new => sub { my $orig = shift; my $class = shift; my %options = @_; $options{curried_arguments} = [] unless exists $options{curried_arguments}; confess 'You must supply a curried_arguments which is an ARRAY reference' unless $options{curried_arguments} && ref($options{curried_arguments}) eq 'ARRAY'; my $attr_context = $options{attribute}->definition_context; my $desc = 'native delegation method '; $desc .= $options{attribute}->associated_class->name; $desc .= '::' . $options{name}; $desc .= " ($options{delegate_to_method})"; $desc .= " of attribute " . $options{attribute}->name; $options{definition_context} = { %{ $attr_context || {} }, description => $desc, }; $options{accessor_type} = 'native'; return $class->$orig(%options); }; sub _new { my $class = shift; my $options = @_ == 1 ? $_[0] : {@_}; return bless $options, $class; } sub root_types { (shift)->{'root_types'} } sub _initialize_body { my $self = shift; $self->{'body'} = $self->_compile_code( [$self->_generate_method] ); return; } sub _inline_curried_arguments { my $self = shift; return unless @{ $self->curried_arguments }; return 'unshift @_, @curried;'; } sub _inline_check_argument_count { my $self = shift; my @code; if (my $min = $self->_minimum_arguments) { push @code, ( 'if (@_ < ' . $min . ') {', $self->_inline_throw_error( sprintf( '"Cannot call %s without at least %s argument%s"', $self->delegate_to_method, $min, ($min == 1 ? '' : 's'), ) ) . ';', '}', ); } if (defined(my $max = $self->_maximum_arguments)) { push @code, ( 'if (@_ > ' . $max . ') {', $self->_inline_throw_error( sprintf( '"Cannot call %s with %s argument%s"', $self->delegate_to_method, $max ? "more than $max" : 'any', ($max == 1 ? '' : 's'), ) ) . ';', '}', ); } return @code; } sub _inline_return_value { my $self = shift; my ($slot_access, $for_writer) = @_; return 'return ' . $self->_return_value($slot_access, $for_writer) . ';'; } sub _minimum_arguments { 0 } sub _maximum_arguments { undef } override _get_value => sub { my $self = shift; my ($instance) = @_; return $self->_slot_access_can_be_inlined ? super() : $instance . '->$reader'; }; override _inline_store_value => sub { my $self = shift; my ($instance, $value) = @_; return $self->_slot_access_can_be_inlined ? super() : $instance . '->$writer(' . $value . ');'; }; override _eval_environment => sub { my $self = shift; my $env = super(); $env->{'@curried'} = $self->curried_arguments; return $env if $self->_slot_access_can_be_inlined; my $reader = $self->associated_attribute->get_read_method_ref; $reader = $reader->body if blessed $reader; $env->{'$reader'} = \$reader; my $writer = $self->associated_attribute->get_write_method_ref; $writer = $writer->body if blessed $writer; $env->{'$writer'} = \$writer; return $env; }; sub _slot_access_can_be_inlined { my $self = shift; return $self->is_inline && $self->_instance_is_inlinable; } no Moose::Role; 1;
liuyangning/WX_web
xampp/perl/vendor/lib/Moose/Meta/Method/Accessor/Native.pm
Perl
mit
3,948
#! /usr/bin/env perl # Copyright 2015-2020 The OpenSSL Project Authors. All Rights Reserved. # # Licensed under the OpenSSL license (the "License"). You may not use # this file except in compliance with the License. You can obtain a copy # in the file LICENSE in the source distribution or at # https://www.openssl.org/source/license.html # ==================================================================== # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL # project. The module is, however, dual licensed under OpenSSL and # CRYPTOGAMS licenses depending on where you obtain it. For further # details see http://www.openssl.org/~appro/cryptogams/. # ==================================================================== # March 2015 # # "Teaser" Montgomery multiplication module for ARMv8. Needs more # work. While it does improve RSA sign performance by 20-30% (less for # longer keys) on most processors, for some reason RSA2048 is not # faster and RSA4096 goes 15-20% slower on Cortex-A57. Multiplication # instruction issue rate is limited on processor in question, meaning # that dedicated squaring procedure is a must. Well, actually all # contemporary AArch64 processors seem to have limited multiplication # issue rate, i.e. they can't issue multiplication every cycle, which # explains moderate improvement coefficients in comparison to # compiler-generated code. Recall that compiler is instructed to use # umulh and therefore uses same amount of multiplication instructions # to do the job. Assembly's edge is to minimize number of "collateral" # instructions and of course instruction scheduling. # # April 2015 # # Squaring procedure that handles lengths divisible by 8 improves # RSA/DSA performance by 25-40-60% depending on processor and key # length. Overall improvement coefficients are always positive in # comparison to compiler-generated code. On Cortex-A57 improvement # is still modest on longest key lengths, while others exhibit e.g. # 50-70% improvement for RSA4096 sign. RSA2048 sign is ~25% faster # on Cortex-A57 and ~60-100% faster on others. $flavour = shift; $output = shift; $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or die "can't locate arm-xlate.pl"; open OUT,"| \"$^X\" $xlate $flavour $output"; *STDOUT=*OUT; ($lo0,$hi0,$aj,$m0,$alo,$ahi, $lo1,$hi1,$nj,$m1,$nlo,$nhi, $ovf, $i,$j,$tp,$tj) = map("x$_",6..17,19..24); # int bn_mul_mont( $rp="x0"; # BN_ULONG *rp, $ap="x1"; # const BN_ULONG *ap, $bp="x2"; # const BN_ULONG *bp, $np="x3"; # const BN_ULONG *np, $n0="x4"; # const BN_ULONG *n0, $num="x5"; # int num); $code.=<<___; .text .globl bn_mul_mont .type bn_mul_mont,%function .align 5 bn_mul_mont: tst $num,#7 b.eq __bn_sqr8x_mont tst $num,#3 b.eq __bn_mul4x_mont .Lmul_mont: stp x29,x30,[sp,#-64]! add x29,sp,#0 stp x19,x20,[sp,#16] stp x21,x22,[sp,#32] stp x23,x24,[sp,#48] ldr $m0,[$bp],#8 // bp[0] sub $tp,sp,$num,lsl#3 ldp $hi0,$aj,[$ap],#16 // ap[0..1] lsl $num,$num,#3 ldr $n0,[$n0] // *n0 and $tp,$tp,#-16 // ABI says so ldp $hi1,$nj,[$np],#16 // np[0..1] mul $lo0,$hi0,$m0 // ap[0]*bp[0] sub $j,$num,#16 // j=num-2 umulh $hi0,$hi0,$m0 mul $alo,$aj,$m0 // ap[1]*bp[0] umulh $ahi,$aj,$m0 mul $m1,$lo0,$n0 // "tp[0]"*n0 mov sp,$tp // alloca // (*) mul $lo1,$hi1,$m1 // np[0]*m1 umulh $hi1,$hi1,$m1 mul $nlo,$nj,$m1 // np[1]*m1 // (*) adds $lo1,$lo1,$lo0 // discarded // (*) As for removal of first multiplication and addition // instructions. The outcome of first addition is // guaranteed to be zero, which leaves two computationally // significant outcomes: it either carries or not. Then // question is when does it carry? Is there alternative // way to deduce it? If you follow operations, you can // observe that condition for carry is quite simple: // $lo0 being non-zero. So that carry can be calculated // by adding -1 to $lo0. That's what next instruction does. subs xzr,$lo0,#1 // (*) umulh $nhi,$nj,$m1 adc $hi1,$hi1,xzr cbz $j,.L1st_skip .L1st: ldr $aj,[$ap],#8 adds $lo0,$alo,$hi0 sub $j,$j,#8 // j-- adc $hi0,$ahi,xzr ldr $nj,[$np],#8 adds $lo1,$nlo,$hi1 mul $alo,$aj,$m0 // ap[j]*bp[0] adc $hi1,$nhi,xzr umulh $ahi,$aj,$m0 adds $lo1,$lo1,$lo0 mul $nlo,$nj,$m1 // np[j]*m1 adc $hi1,$hi1,xzr umulh $nhi,$nj,$m1 str $lo1,[$tp],#8 // tp[j-1] cbnz $j,.L1st .L1st_skip: adds $lo0,$alo,$hi0 sub $ap,$ap,$num // rewind $ap adc $hi0,$ahi,xzr adds $lo1,$nlo,$hi1 sub $np,$np,$num // rewind $np adc $hi1,$nhi,xzr adds $lo1,$lo1,$lo0 sub $i,$num,#8 // i=num-1 adcs $hi1,$hi1,$hi0 adc $ovf,xzr,xzr // upmost overflow bit stp $lo1,$hi1,[$tp] .Louter: ldr $m0,[$bp],#8 // bp[i] ldp $hi0,$aj,[$ap],#16 ldr $tj,[sp] // tp[0] add $tp,sp,#8 mul $lo0,$hi0,$m0 // ap[0]*bp[i] sub $j,$num,#16 // j=num-2 umulh $hi0,$hi0,$m0 ldp $hi1,$nj,[$np],#16 mul $alo,$aj,$m0 // ap[1]*bp[i] adds $lo0,$lo0,$tj umulh $ahi,$aj,$m0 adc $hi0,$hi0,xzr mul $m1,$lo0,$n0 sub $i,$i,#8 // i-- // (*) mul $lo1,$hi1,$m1 // np[0]*m1 umulh $hi1,$hi1,$m1 mul $nlo,$nj,$m1 // np[1]*m1 // (*) adds $lo1,$lo1,$lo0 subs xzr,$lo0,#1 // (*) umulh $nhi,$nj,$m1 cbz $j,.Linner_skip .Linner: ldr $aj,[$ap],#8 adc $hi1,$hi1,xzr ldr $tj,[$tp],#8 // tp[j] adds $lo0,$alo,$hi0 sub $j,$j,#8 // j-- adc $hi0,$ahi,xzr adds $lo1,$nlo,$hi1 ldr $nj,[$np],#8 adc $hi1,$nhi,xzr mul $alo,$aj,$m0 // ap[j]*bp[i] adds $lo0,$lo0,$tj umulh $ahi,$aj,$m0 adc $hi0,$hi0,xzr mul $nlo,$nj,$m1 // np[j]*m1 adds $lo1,$lo1,$lo0 umulh $nhi,$nj,$m1 str $lo1,[$tp,#-16] // tp[j-1] cbnz $j,.Linner .Linner_skip: ldr $tj,[$tp],#8 // tp[j] adc $hi1,$hi1,xzr adds $lo0,$alo,$hi0 sub $ap,$ap,$num // rewind $ap adc $hi0,$ahi,xzr adds $lo1,$nlo,$hi1 sub $np,$np,$num // rewind $np adcs $hi1,$nhi,$ovf adc $ovf,xzr,xzr adds $lo0,$lo0,$tj adc $hi0,$hi0,xzr adds $lo1,$lo1,$lo0 adcs $hi1,$hi1,$hi0 adc $ovf,$ovf,xzr // upmost overflow bit stp $lo1,$hi1,[$tp,#-16] cbnz $i,.Louter // Final step. We see if result is larger than modulus, and // if it is, subtract the modulus. But comparison implies // subtraction. So we subtract modulus, see if it borrowed, // and conditionally copy original value. ldr $tj,[sp] // tp[0] add $tp,sp,#8 ldr $nj,[$np],#8 // np[0] subs $j,$num,#8 // j=num-1 and clear borrow mov $ap,$rp .Lsub: sbcs $aj,$tj,$nj // tp[j]-np[j] ldr $tj,[$tp],#8 sub $j,$j,#8 // j-- ldr $nj,[$np],#8 str $aj,[$ap],#8 // rp[j]=tp[j]-np[j] cbnz $j,.Lsub sbcs $aj,$tj,$nj sbcs $ovf,$ovf,xzr // did it borrow? str $aj,[$ap],#8 // rp[num-1] ldr $tj,[sp] // tp[0] add $tp,sp,#8 ldr $aj,[$rp],#8 // rp[0] sub $num,$num,#8 // num-- nop .Lcond_copy: sub $num,$num,#8 // num-- csel $nj,$tj,$aj,lo // did it borrow? ldr $tj,[$tp],#8 ldr $aj,[$rp],#8 str xzr,[$tp,#-16] // wipe tp str $nj,[$rp,#-16] cbnz $num,.Lcond_copy csel $nj,$tj,$aj,lo str xzr,[$tp,#-8] // wipe tp str $nj,[$rp,#-8] ldp x19,x20,[x29,#16] mov sp,x29 ldp x21,x22,[x29,#32] mov x0,#1 ldp x23,x24,[x29,#48] ldr x29,[sp],#64 ret .size bn_mul_mont,.-bn_mul_mont ___ { ######################################################################## # Following is ARMv8 adaptation of sqrx8x_mont from x86_64-mont5 module. my ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("x$_",(6..13)); my ($t0,$t1,$t2,$t3)=map("x$_",(14..17)); my ($acc0,$acc1,$acc2,$acc3,$acc4,$acc5,$acc6,$acc7)=map("x$_",(19..26)); my ($cnt,$carry,$topmost)=("x27","x28","x30"); my ($tp,$ap_end,$na0)=($bp,$np,$carry); $code.=<<___; .type __bn_sqr8x_mont,%function .align 5 __bn_sqr8x_mont: cmp $ap,$bp b.ne __bn_mul4x_mont .Lsqr8x_mont: .inst 0xd503233f // paciasp stp x29,x30,[sp,#-128]! add x29,sp,#0 stp x19,x20,[sp,#16] stp x21,x22,[sp,#32] stp x23,x24,[sp,#48] stp x25,x26,[sp,#64] stp x27,x28,[sp,#80] stp $rp,$np,[sp,#96] // offload rp and np ldp $a0,$a1,[$ap,#8*0] ldp $a2,$a3,[$ap,#8*2] ldp $a4,$a5,[$ap,#8*4] ldp $a6,$a7,[$ap,#8*6] sub $tp,sp,$num,lsl#4 lsl $num,$num,#3 ldr $n0,[$n0] // *n0 mov sp,$tp // alloca sub $cnt,$num,#8*8 b .Lsqr8x_zero_start .Lsqr8x_zero: sub $cnt,$cnt,#8*8 stp xzr,xzr,[$tp,#8*0] stp xzr,xzr,[$tp,#8*2] stp xzr,xzr,[$tp,#8*4] stp xzr,xzr,[$tp,#8*6] .Lsqr8x_zero_start: stp xzr,xzr,[$tp,#8*8] stp xzr,xzr,[$tp,#8*10] stp xzr,xzr,[$tp,#8*12] stp xzr,xzr,[$tp,#8*14] add $tp,$tp,#8*16 cbnz $cnt,.Lsqr8x_zero add $ap_end,$ap,$num add $ap,$ap,#8*8 mov $acc0,xzr mov $acc1,xzr mov $acc2,xzr mov $acc3,xzr mov $acc4,xzr mov $acc5,xzr mov $acc6,xzr mov $acc7,xzr mov $tp,sp str $n0,[x29,#112] // offload n0 // Multiply everything but a[i]*a[i] .align 4 .Lsqr8x_outer_loop: // a[1]a[0] (i) // a[2]a[0] // a[3]a[0] // a[4]a[0] // a[5]a[0] // a[6]a[0] // a[7]a[0] // a[2]a[1] (ii) // a[3]a[1] // a[4]a[1] // a[5]a[1] // a[6]a[1] // a[7]a[1] // a[3]a[2] (iii) // a[4]a[2] // a[5]a[2] // a[6]a[2] // a[7]a[2] // a[4]a[3] (iv) // a[5]a[3] // a[6]a[3] // a[7]a[3] // a[5]a[4] (v) // a[6]a[4] // a[7]a[4] // a[6]a[5] (vi) // a[7]a[5] // a[7]a[6] (vii) mul $t0,$a1,$a0 // lo(a[1..7]*a[0]) (i) mul $t1,$a2,$a0 mul $t2,$a3,$a0 mul $t3,$a4,$a0 adds $acc1,$acc1,$t0 // t[1]+lo(a[1]*a[0]) mul $t0,$a5,$a0 adcs $acc2,$acc2,$t1 mul $t1,$a6,$a0 adcs $acc3,$acc3,$t2 mul $t2,$a7,$a0 adcs $acc4,$acc4,$t3 umulh $t3,$a1,$a0 // hi(a[1..7]*a[0]) adcs $acc5,$acc5,$t0 umulh $t0,$a2,$a0 adcs $acc6,$acc6,$t1 umulh $t1,$a3,$a0 adcs $acc7,$acc7,$t2 umulh $t2,$a4,$a0 stp $acc0,$acc1,[$tp],#8*2 // t[0..1] adc $acc0,xzr,xzr // t[8] adds $acc2,$acc2,$t3 // t[2]+lo(a[1]*a[0]) umulh $t3,$a5,$a0 adcs $acc3,$acc3,$t0 umulh $t0,$a6,$a0 adcs $acc4,$acc4,$t1 umulh $t1,$a7,$a0 adcs $acc5,$acc5,$t2 mul $t2,$a2,$a1 // lo(a[2..7]*a[1]) (ii) adcs $acc6,$acc6,$t3 mul $t3,$a3,$a1 adcs $acc7,$acc7,$t0 mul $t0,$a4,$a1 adc $acc0,$acc0,$t1 mul $t1,$a5,$a1 adds $acc3,$acc3,$t2 mul $t2,$a6,$a1 adcs $acc4,$acc4,$t3 mul $t3,$a7,$a1 adcs $acc5,$acc5,$t0 umulh $t0,$a2,$a1 // hi(a[2..7]*a[1]) adcs $acc6,$acc6,$t1 umulh $t1,$a3,$a1 adcs $acc7,$acc7,$t2 umulh $t2,$a4,$a1 adcs $acc0,$acc0,$t3 umulh $t3,$a5,$a1 stp $acc2,$acc3,[$tp],#8*2 // t[2..3] adc $acc1,xzr,xzr // t[9] adds $acc4,$acc4,$t0 umulh $t0,$a6,$a1 adcs $acc5,$acc5,$t1 umulh $t1,$a7,$a1 adcs $acc6,$acc6,$t2 mul $t2,$a3,$a2 // lo(a[3..7]*a[2]) (iii) adcs $acc7,$acc7,$t3 mul $t3,$a4,$a2 adcs $acc0,$acc0,$t0 mul $t0,$a5,$a2 adc $acc1,$acc1,$t1 mul $t1,$a6,$a2 adds $acc5,$acc5,$t2 mul $t2,$a7,$a2 adcs $acc6,$acc6,$t3 umulh $t3,$a3,$a2 // hi(a[3..7]*a[2]) adcs $acc7,$acc7,$t0 umulh $t0,$a4,$a2 adcs $acc0,$acc0,$t1 umulh $t1,$a5,$a2 adcs $acc1,$acc1,$t2 umulh $t2,$a6,$a2 stp $acc4,$acc5,[$tp],#8*2 // t[4..5] adc $acc2,xzr,xzr // t[10] adds $acc6,$acc6,$t3 umulh $t3,$a7,$a2 adcs $acc7,$acc7,$t0 mul $t0,$a4,$a3 // lo(a[4..7]*a[3]) (iv) adcs $acc0,$acc0,$t1 mul $t1,$a5,$a3 adcs $acc1,$acc1,$t2 mul $t2,$a6,$a3 adc $acc2,$acc2,$t3 mul $t3,$a7,$a3 adds $acc7,$acc7,$t0 umulh $t0,$a4,$a3 // hi(a[4..7]*a[3]) adcs $acc0,$acc0,$t1 umulh $t1,$a5,$a3 adcs $acc1,$acc1,$t2 umulh $t2,$a6,$a3 adcs $acc2,$acc2,$t3 umulh $t3,$a7,$a3 stp $acc6,$acc7,[$tp],#8*2 // t[6..7] adc $acc3,xzr,xzr // t[11] adds $acc0,$acc0,$t0 mul $t0,$a5,$a4 // lo(a[5..7]*a[4]) (v) adcs $acc1,$acc1,$t1 mul $t1,$a6,$a4 adcs $acc2,$acc2,$t2 mul $t2,$a7,$a4 adc $acc3,$acc3,$t3 umulh $t3,$a5,$a4 // hi(a[5..7]*a[4]) adds $acc1,$acc1,$t0 umulh $t0,$a6,$a4 adcs $acc2,$acc2,$t1 umulh $t1,$a7,$a4 adcs $acc3,$acc3,$t2 mul $t2,$a6,$a5 // lo(a[6..7]*a[5]) (vi) adc $acc4,xzr,xzr // t[12] adds $acc2,$acc2,$t3 mul $t3,$a7,$a5 adcs $acc3,$acc3,$t0 umulh $t0,$a6,$a5 // hi(a[6..7]*a[5]) adc $acc4,$acc4,$t1 umulh $t1,$a7,$a5 adds $acc3,$acc3,$t2 mul $t2,$a7,$a6 // lo(a[7]*a[6]) (vii) adcs $acc4,$acc4,$t3 umulh $t3,$a7,$a6 // hi(a[7]*a[6]) adc $acc5,xzr,xzr // t[13] adds $acc4,$acc4,$t0 sub $cnt,$ap_end,$ap // done yet? adc $acc5,$acc5,$t1 adds $acc5,$acc5,$t2 sub $t0,$ap_end,$num // rewinded ap adc $acc6,xzr,xzr // t[14] add $acc6,$acc6,$t3 cbz $cnt,.Lsqr8x_outer_break mov $n0,$a0 ldp $a0,$a1,[$tp,#8*0] ldp $a2,$a3,[$tp,#8*2] ldp $a4,$a5,[$tp,#8*4] ldp $a6,$a7,[$tp,#8*6] adds $acc0,$acc0,$a0 adcs $acc1,$acc1,$a1 ldp $a0,$a1,[$ap,#8*0] adcs $acc2,$acc2,$a2 adcs $acc3,$acc3,$a3 ldp $a2,$a3,[$ap,#8*2] adcs $acc4,$acc4,$a4 adcs $acc5,$acc5,$a5 ldp $a4,$a5,[$ap,#8*4] adcs $acc6,$acc6,$a6 mov $rp,$ap adcs $acc7,xzr,$a7 ldp $a6,$a7,[$ap,#8*6] add $ap,$ap,#8*8 //adc $carry,xzr,xzr // moved below mov $cnt,#-8*8 // a[8]a[0] // a[9]a[0] // a[a]a[0] // a[b]a[0] // a[c]a[0] // a[d]a[0] // a[e]a[0] // a[f]a[0] // a[8]a[1] // a[f]a[1]........................ // a[8]a[2] // a[f]a[2]........................ // a[8]a[3] // a[f]a[3]........................ // a[8]a[4] // a[f]a[4]........................ // a[8]a[5] // a[f]a[5]........................ // a[8]a[6] // a[f]a[6]........................ // a[8]a[7] // a[f]a[7]........................ .Lsqr8x_mul: mul $t0,$a0,$n0 adc $carry,xzr,xzr // carry bit, modulo-scheduled mul $t1,$a1,$n0 add $cnt,$cnt,#8 mul $t2,$a2,$n0 mul $t3,$a3,$n0 adds $acc0,$acc0,$t0 mul $t0,$a4,$n0 adcs $acc1,$acc1,$t1 mul $t1,$a5,$n0 adcs $acc2,$acc2,$t2 mul $t2,$a6,$n0 adcs $acc3,$acc3,$t3 mul $t3,$a7,$n0 adcs $acc4,$acc4,$t0 umulh $t0,$a0,$n0 adcs $acc5,$acc5,$t1 umulh $t1,$a1,$n0 adcs $acc6,$acc6,$t2 umulh $t2,$a2,$n0 adcs $acc7,$acc7,$t3 umulh $t3,$a3,$n0 adc $carry,$carry,xzr str $acc0,[$tp],#8 adds $acc0,$acc1,$t0 umulh $t0,$a4,$n0 adcs $acc1,$acc2,$t1 umulh $t1,$a5,$n0 adcs $acc2,$acc3,$t2 umulh $t2,$a6,$n0 adcs $acc3,$acc4,$t3 umulh $t3,$a7,$n0 ldr $n0,[$rp,$cnt] adcs $acc4,$acc5,$t0 adcs $acc5,$acc6,$t1 adcs $acc6,$acc7,$t2 adcs $acc7,$carry,$t3 //adc $carry,xzr,xzr // moved above cbnz $cnt,.Lsqr8x_mul // note that carry flag is guaranteed // to be zero at this point cmp $ap,$ap_end // done yet? b.eq .Lsqr8x_break ldp $a0,$a1,[$tp,#8*0] ldp $a2,$a3,[$tp,#8*2] ldp $a4,$a5,[$tp,#8*4] ldp $a6,$a7,[$tp,#8*6] adds $acc0,$acc0,$a0 ldr $n0,[$rp,#-8*8] adcs $acc1,$acc1,$a1 ldp $a0,$a1,[$ap,#8*0] adcs $acc2,$acc2,$a2 adcs $acc3,$acc3,$a3 ldp $a2,$a3,[$ap,#8*2] adcs $acc4,$acc4,$a4 adcs $acc5,$acc5,$a5 ldp $a4,$a5,[$ap,#8*4] adcs $acc6,$acc6,$a6 mov $cnt,#-8*8 adcs $acc7,$acc7,$a7 ldp $a6,$a7,[$ap,#8*6] add $ap,$ap,#8*8 //adc $carry,xzr,xzr // moved above b .Lsqr8x_mul .align 4 .Lsqr8x_break: ldp $a0,$a1,[$rp,#8*0] add $ap,$rp,#8*8 ldp $a2,$a3,[$rp,#8*2] sub $t0,$ap_end,$ap // is it last iteration? ldp $a4,$a5,[$rp,#8*4] sub $t1,$tp,$t0 ldp $a6,$a7,[$rp,#8*6] cbz $t0,.Lsqr8x_outer_loop stp $acc0,$acc1,[$tp,#8*0] ldp $acc0,$acc1,[$t1,#8*0] stp $acc2,$acc3,[$tp,#8*2] ldp $acc2,$acc3,[$t1,#8*2] stp $acc4,$acc5,[$tp,#8*4] ldp $acc4,$acc5,[$t1,#8*4] stp $acc6,$acc7,[$tp,#8*6] mov $tp,$t1 ldp $acc6,$acc7,[$t1,#8*6] b .Lsqr8x_outer_loop .align 4 .Lsqr8x_outer_break: // Now multiply above result by 2 and add a[n-1]*a[n-1]|...|a[0]*a[0] ldp $a1,$a3,[$t0,#8*0] // recall that $t0 is &a[0] ldp $t1,$t2,[sp,#8*1] ldp $a5,$a7,[$t0,#8*2] add $ap,$t0,#8*4 ldp $t3,$t0,[sp,#8*3] stp $acc0,$acc1,[$tp,#8*0] mul $acc0,$a1,$a1 stp $acc2,$acc3,[$tp,#8*2] umulh $a1,$a1,$a1 stp $acc4,$acc5,[$tp,#8*4] mul $a2,$a3,$a3 stp $acc6,$acc7,[$tp,#8*6] mov $tp,sp umulh $a3,$a3,$a3 adds $acc1,$a1,$t1,lsl#1 extr $t1,$t2,$t1,#63 sub $cnt,$num,#8*4 .Lsqr4x_shift_n_add: adcs $acc2,$a2,$t1 extr $t2,$t3,$t2,#63 sub $cnt,$cnt,#8*4 adcs $acc3,$a3,$t2 ldp $t1,$t2,[$tp,#8*5] mul $a4,$a5,$a5 ldp $a1,$a3,[$ap],#8*2 umulh $a5,$a5,$a5 mul $a6,$a7,$a7 umulh $a7,$a7,$a7 extr $t3,$t0,$t3,#63 stp $acc0,$acc1,[$tp,#8*0] adcs $acc4,$a4,$t3 extr $t0,$t1,$t0,#63 stp $acc2,$acc3,[$tp,#8*2] adcs $acc5,$a5,$t0 ldp $t3,$t0,[$tp,#8*7] extr $t1,$t2,$t1,#63 adcs $acc6,$a6,$t1 extr $t2,$t3,$t2,#63 adcs $acc7,$a7,$t2 ldp $t1,$t2,[$tp,#8*9] mul $a0,$a1,$a1 ldp $a5,$a7,[$ap],#8*2 umulh $a1,$a1,$a1 mul $a2,$a3,$a3 umulh $a3,$a3,$a3 stp $acc4,$acc5,[$tp,#8*4] extr $t3,$t0,$t3,#63 stp $acc6,$acc7,[$tp,#8*6] add $tp,$tp,#8*8 adcs $acc0,$a0,$t3 extr $t0,$t1,$t0,#63 adcs $acc1,$a1,$t0 ldp $t3,$t0,[$tp,#8*3] extr $t1,$t2,$t1,#63 cbnz $cnt,.Lsqr4x_shift_n_add ___ my ($np,$np_end)=($ap,$ap_end); $code.=<<___; ldp $np,$n0,[x29,#104] // pull np and n0 adcs $acc2,$a2,$t1 extr $t2,$t3,$t2,#63 adcs $acc3,$a3,$t2 ldp $t1,$t2,[$tp,#8*5] mul $a4,$a5,$a5 umulh $a5,$a5,$a5 stp $acc0,$acc1,[$tp,#8*0] mul $a6,$a7,$a7 umulh $a7,$a7,$a7 stp $acc2,$acc3,[$tp,#8*2] extr $t3,$t0,$t3,#63 adcs $acc4,$a4,$t3 extr $t0,$t1,$t0,#63 ldp $acc0,$acc1,[sp,#8*0] adcs $acc5,$a5,$t0 extr $t1,$t2,$t1,#63 ldp $a0,$a1,[$np,#8*0] adcs $acc6,$a6,$t1 extr $t2,xzr,$t2,#63 ldp $a2,$a3,[$np,#8*2] adc $acc7,$a7,$t2 ldp $a4,$a5,[$np,#8*4] // Reduce by 512 bits per iteration mul $na0,$n0,$acc0 // t[0]*n0 ldp $a6,$a7,[$np,#8*6] add $np_end,$np,$num ldp $acc2,$acc3,[sp,#8*2] stp $acc4,$acc5,[$tp,#8*4] ldp $acc4,$acc5,[sp,#8*4] stp $acc6,$acc7,[$tp,#8*6] ldp $acc6,$acc7,[sp,#8*6] add $np,$np,#8*8 mov $topmost,xzr // initial top-most carry mov $tp,sp mov $cnt,#8 .Lsqr8x_reduction: // (*) mul $t0,$a0,$na0 // lo(n[0-7])*lo(t[0]*n0) mul $t1,$a1,$na0 sub $cnt,$cnt,#1 mul $t2,$a2,$na0 str $na0,[$tp],#8 // put aside t[0]*n0 for tail processing mul $t3,$a3,$na0 // (*) adds xzr,$acc0,$t0 subs xzr,$acc0,#1 // (*) mul $t0,$a4,$na0 adcs $acc0,$acc1,$t1 mul $t1,$a5,$na0 adcs $acc1,$acc2,$t2 mul $t2,$a6,$na0 adcs $acc2,$acc3,$t3 mul $t3,$a7,$na0 adcs $acc3,$acc4,$t0 umulh $t0,$a0,$na0 // hi(n[0-7])*lo(t[0]*n0) adcs $acc4,$acc5,$t1 umulh $t1,$a1,$na0 adcs $acc5,$acc6,$t2 umulh $t2,$a2,$na0 adcs $acc6,$acc7,$t3 umulh $t3,$a3,$na0 adc $acc7,xzr,xzr adds $acc0,$acc0,$t0 umulh $t0,$a4,$na0 adcs $acc1,$acc1,$t1 umulh $t1,$a5,$na0 adcs $acc2,$acc2,$t2 umulh $t2,$a6,$na0 adcs $acc3,$acc3,$t3 umulh $t3,$a7,$na0 mul $na0,$n0,$acc0 // next t[0]*n0 adcs $acc4,$acc4,$t0 adcs $acc5,$acc5,$t1 adcs $acc6,$acc6,$t2 adc $acc7,$acc7,$t3 cbnz $cnt,.Lsqr8x_reduction ldp $t0,$t1,[$tp,#8*0] ldp $t2,$t3,[$tp,#8*2] mov $rp,$tp sub $cnt,$np_end,$np // done yet? adds $acc0,$acc0,$t0 adcs $acc1,$acc1,$t1 ldp $t0,$t1,[$tp,#8*4] adcs $acc2,$acc2,$t2 adcs $acc3,$acc3,$t3 ldp $t2,$t3,[$tp,#8*6] adcs $acc4,$acc4,$t0 adcs $acc5,$acc5,$t1 adcs $acc6,$acc6,$t2 adcs $acc7,$acc7,$t3 //adc $carry,xzr,xzr // moved below cbz $cnt,.Lsqr8x8_post_condition ldr $n0,[$tp,#-8*8] ldp $a0,$a1,[$np,#8*0] ldp $a2,$a3,[$np,#8*2] ldp $a4,$a5,[$np,#8*4] mov $cnt,#-8*8 ldp $a6,$a7,[$np,#8*6] add $np,$np,#8*8 .Lsqr8x_tail: mul $t0,$a0,$n0 adc $carry,xzr,xzr // carry bit, modulo-scheduled mul $t1,$a1,$n0 add $cnt,$cnt,#8 mul $t2,$a2,$n0 mul $t3,$a3,$n0 adds $acc0,$acc0,$t0 mul $t0,$a4,$n0 adcs $acc1,$acc1,$t1 mul $t1,$a5,$n0 adcs $acc2,$acc2,$t2 mul $t2,$a6,$n0 adcs $acc3,$acc3,$t3 mul $t3,$a7,$n0 adcs $acc4,$acc4,$t0 umulh $t0,$a0,$n0 adcs $acc5,$acc5,$t1 umulh $t1,$a1,$n0 adcs $acc6,$acc6,$t2 umulh $t2,$a2,$n0 adcs $acc7,$acc7,$t3 umulh $t3,$a3,$n0 adc $carry,$carry,xzr str $acc0,[$tp],#8 adds $acc0,$acc1,$t0 umulh $t0,$a4,$n0 adcs $acc1,$acc2,$t1 umulh $t1,$a5,$n0 adcs $acc2,$acc3,$t2 umulh $t2,$a6,$n0 adcs $acc3,$acc4,$t3 umulh $t3,$a7,$n0 ldr $n0,[$rp,$cnt] adcs $acc4,$acc5,$t0 adcs $acc5,$acc6,$t1 adcs $acc6,$acc7,$t2 adcs $acc7,$carry,$t3 //adc $carry,xzr,xzr // moved above cbnz $cnt,.Lsqr8x_tail // note that carry flag is guaranteed // to be zero at this point ldp $a0,$a1,[$tp,#8*0] sub $cnt,$np_end,$np // done yet? sub $t2,$np_end,$num // rewinded np ldp $a2,$a3,[$tp,#8*2] ldp $a4,$a5,[$tp,#8*4] ldp $a6,$a7,[$tp,#8*6] cbz $cnt,.Lsqr8x_tail_break ldr $n0,[$rp,#-8*8] adds $acc0,$acc0,$a0 adcs $acc1,$acc1,$a1 ldp $a0,$a1,[$np,#8*0] adcs $acc2,$acc2,$a2 adcs $acc3,$acc3,$a3 ldp $a2,$a3,[$np,#8*2] adcs $acc4,$acc4,$a4 adcs $acc5,$acc5,$a5 ldp $a4,$a5,[$np,#8*4] adcs $acc6,$acc6,$a6 mov $cnt,#-8*8 adcs $acc7,$acc7,$a7 ldp $a6,$a7,[$np,#8*6] add $np,$np,#8*8 //adc $carry,xzr,xzr // moved above b .Lsqr8x_tail .align 4 .Lsqr8x_tail_break: ldr $n0,[x29,#112] // pull n0 add $cnt,$tp,#8*8 // end of current t[num] window subs xzr,$topmost,#1 // "move" top-most carry to carry bit adcs $t0,$acc0,$a0 adcs $t1,$acc1,$a1 ldp $acc0,$acc1,[$rp,#8*0] adcs $acc2,$acc2,$a2 ldp $a0,$a1,[$t2,#8*0] // recall that $t2 is &n[0] adcs $acc3,$acc3,$a3 ldp $a2,$a3,[$t2,#8*2] adcs $acc4,$acc4,$a4 adcs $acc5,$acc5,$a5 ldp $a4,$a5,[$t2,#8*4] adcs $acc6,$acc6,$a6 adcs $acc7,$acc7,$a7 ldp $a6,$a7,[$t2,#8*6] add $np,$t2,#8*8 adc $topmost,xzr,xzr // top-most carry mul $na0,$n0,$acc0 stp $t0,$t1,[$tp,#8*0] stp $acc2,$acc3,[$tp,#8*2] ldp $acc2,$acc3,[$rp,#8*2] stp $acc4,$acc5,[$tp,#8*4] ldp $acc4,$acc5,[$rp,#8*4] cmp $cnt,x29 // did we hit the bottom? stp $acc6,$acc7,[$tp,#8*6] mov $tp,$rp // slide the window ldp $acc6,$acc7,[$rp,#8*6] mov $cnt,#8 b.ne .Lsqr8x_reduction // Final step. We see if result is larger than modulus, and // if it is, subtract the modulus. But comparison implies // subtraction. So we subtract modulus, see if it borrowed, // and conditionally copy original value. ldr $rp,[x29,#96] // pull rp add $tp,$tp,#8*8 subs $t0,$acc0,$a0 sbcs $t1,$acc1,$a1 sub $cnt,$num,#8*8 mov $ap_end,$rp // $rp copy .Lsqr8x_sub: sbcs $t2,$acc2,$a2 ldp $a0,$a1,[$np,#8*0] sbcs $t3,$acc3,$a3 stp $t0,$t1,[$rp,#8*0] sbcs $t0,$acc4,$a4 ldp $a2,$a3,[$np,#8*2] sbcs $t1,$acc5,$a5 stp $t2,$t3,[$rp,#8*2] sbcs $t2,$acc6,$a6 ldp $a4,$a5,[$np,#8*4] sbcs $t3,$acc7,$a7 ldp $a6,$a7,[$np,#8*6] add $np,$np,#8*8 ldp $acc0,$acc1,[$tp,#8*0] sub $cnt,$cnt,#8*8 ldp $acc2,$acc3,[$tp,#8*2] ldp $acc4,$acc5,[$tp,#8*4] ldp $acc6,$acc7,[$tp,#8*6] add $tp,$tp,#8*8 stp $t0,$t1,[$rp,#8*4] sbcs $t0,$acc0,$a0 stp $t2,$t3,[$rp,#8*6] add $rp,$rp,#8*8 sbcs $t1,$acc1,$a1 cbnz $cnt,.Lsqr8x_sub sbcs $t2,$acc2,$a2 mov $tp,sp add $ap,sp,$num ldp $a0,$a1,[$ap_end,#8*0] sbcs $t3,$acc3,$a3 stp $t0,$t1,[$rp,#8*0] sbcs $t0,$acc4,$a4 ldp $a2,$a3,[$ap_end,#8*2] sbcs $t1,$acc5,$a5 stp $t2,$t3,[$rp,#8*2] sbcs $t2,$acc6,$a6 ldp $acc0,$acc1,[$ap,#8*0] sbcs $t3,$acc7,$a7 ldp $acc2,$acc3,[$ap,#8*2] sbcs xzr,$topmost,xzr // did it borrow? ldr x30,[x29,#8] // pull return address stp $t0,$t1,[$rp,#8*4] stp $t2,$t3,[$rp,#8*6] sub $cnt,$num,#8*4 .Lsqr4x_cond_copy: sub $cnt,$cnt,#8*4 csel $t0,$acc0,$a0,lo stp xzr,xzr,[$tp,#8*0] csel $t1,$acc1,$a1,lo ldp $a0,$a1,[$ap_end,#8*4] ldp $acc0,$acc1,[$ap,#8*4] csel $t2,$acc2,$a2,lo stp xzr,xzr,[$tp,#8*2] add $tp,$tp,#8*4 csel $t3,$acc3,$a3,lo ldp $a2,$a3,[$ap_end,#8*6] ldp $acc2,$acc3,[$ap,#8*6] add $ap,$ap,#8*4 stp $t0,$t1,[$ap_end,#8*0] stp $t2,$t3,[$ap_end,#8*2] add $ap_end,$ap_end,#8*4 stp xzr,xzr,[$ap,#8*0] stp xzr,xzr,[$ap,#8*2] cbnz $cnt,.Lsqr4x_cond_copy csel $t0,$acc0,$a0,lo stp xzr,xzr,[$tp,#8*0] csel $t1,$acc1,$a1,lo stp xzr,xzr,[$tp,#8*2] csel $t2,$acc2,$a2,lo csel $t3,$acc3,$a3,lo stp $t0,$t1,[$ap_end,#8*0] stp $t2,$t3,[$ap_end,#8*2] b .Lsqr8x_done .align 4 .Lsqr8x8_post_condition: adc $carry,xzr,xzr ldr x30,[x29,#8] // pull return address // $acc0-7,$carry hold result, $a0-7 hold modulus subs $a0,$acc0,$a0 ldr $ap,[x29,#96] // pull rp sbcs $a1,$acc1,$a1 stp xzr,xzr,[sp,#8*0] sbcs $a2,$acc2,$a2 stp xzr,xzr,[sp,#8*2] sbcs $a3,$acc3,$a3 stp xzr,xzr,[sp,#8*4] sbcs $a4,$acc4,$a4 stp xzr,xzr,[sp,#8*6] sbcs $a5,$acc5,$a5 stp xzr,xzr,[sp,#8*8] sbcs $a6,$acc6,$a6 stp xzr,xzr,[sp,#8*10] sbcs $a7,$acc7,$a7 stp xzr,xzr,[sp,#8*12] sbcs $carry,$carry,xzr // did it borrow? stp xzr,xzr,[sp,#8*14] // $a0-7 hold result-modulus csel $a0,$acc0,$a0,lo csel $a1,$acc1,$a1,lo csel $a2,$acc2,$a2,lo csel $a3,$acc3,$a3,lo stp $a0,$a1,[$ap,#8*0] csel $a4,$acc4,$a4,lo csel $a5,$acc5,$a5,lo stp $a2,$a3,[$ap,#8*2] csel $a6,$acc6,$a6,lo csel $a7,$acc7,$a7,lo stp $a4,$a5,[$ap,#8*4] stp $a6,$a7,[$ap,#8*6] .Lsqr8x_done: ldp x19,x20,[x29,#16] mov sp,x29 ldp x21,x22,[x29,#32] mov x0,#1 ldp x23,x24,[x29,#48] ldp x25,x26,[x29,#64] ldp x27,x28,[x29,#80] ldr x29,[sp],#128 .inst 0xd50323bf // autiasp ret .size __bn_sqr8x_mont,.-__bn_sqr8x_mont ___ } { ######################################################################## # Even though this might look as ARMv8 adaptation of mulx4x_mont from # x86_64-mont5 module, it's different in sense that it performs # reduction 256 bits at a time. my ($a0,$a1,$a2,$a3, $t0,$t1,$t2,$t3, $m0,$m1,$m2,$m3, $acc0,$acc1,$acc2,$acc3,$acc4, $bi,$mi,$tp,$ap_end,$cnt) = map("x$_",(6..17,19..28)); my $bp_end=$rp; my ($carry,$topmost) = ($rp,"x30"); $code.=<<___; .type __bn_mul4x_mont,%function .align 5 __bn_mul4x_mont: .inst 0xd503233f // paciasp stp x29,x30,[sp,#-128]! add x29,sp,#0 stp x19,x20,[sp,#16] stp x21,x22,[sp,#32] stp x23,x24,[sp,#48] stp x25,x26,[sp,#64] stp x27,x28,[sp,#80] sub $tp,sp,$num,lsl#3 lsl $num,$num,#3 ldr $n0,[$n0] // *n0 sub sp,$tp,#8*4 // alloca add $t0,$bp,$num add $ap_end,$ap,$num stp $rp,$t0,[x29,#96] // offload rp and &b[num] ldr $bi,[$bp,#8*0] // b[0] ldp $a0,$a1,[$ap,#8*0] // a[0..3] ldp $a2,$a3,[$ap,#8*2] add $ap,$ap,#8*4 mov $acc0,xzr mov $acc1,xzr mov $acc2,xzr mov $acc3,xzr ldp $m0,$m1,[$np,#8*0] // n[0..3] ldp $m2,$m3,[$np,#8*2] adds $np,$np,#8*4 // clear carry bit mov $carry,xzr mov $cnt,#0 mov $tp,sp .Loop_mul4x_1st_reduction: mul $t0,$a0,$bi // lo(a[0..3]*b[0]) adc $carry,$carry,xzr // modulo-scheduled mul $t1,$a1,$bi add $cnt,$cnt,#8 mul $t2,$a2,$bi and $cnt,$cnt,#31 mul $t3,$a3,$bi adds $acc0,$acc0,$t0 umulh $t0,$a0,$bi // hi(a[0..3]*b[0]) adcs $acc1,$acc1,$t1 mul $mi,$acc0,$n0 // t[0]*n0 adcs $acc2,$acc2,$t2 umulh $t1,$a1,$bi adcs $acc3,$acc3,$t3 umulh $t2,$a2,$bi adc $acc4,xzr,xzr umulh $t3,$a3,$bi ldr $bi,[$bp,$cnt] // next b[i] (or b[0]) adds $acc1,$acc1,$t0 // (*) mul $t0,$m0,$mi // lo(n[0..3]*t[0]*n0) str $mi,[$tp],#8 // put aside t[0]*n0 for tail processing adcs $acc2,$acc2,$t1 mul $t1,$m1,$mi adcs $acc3,$acc3,$t2 mul $t2,$m2,$mi adc $acc4,$acc4,$t3 // can't overflow mul $t3,$m3,$mi // (*) adds xzr,$acc0,$t0 subs xzr,$acc0,#1 // (*) umulh $t0,$m0,$mi // hi(n[0..3]*t[0]*n0) adcs $acc0,$acc1,$t1 umulh $t1,$m1,$mi adcs $acc1,$acc2,$t2 umulh $t2,$m2,$mi adcs $acc2,$acc3,$t3 umulh $t3,$m3,$mi adcs $acc3,$acc4,$carry adc $carry,xzr,xzr adds $acc0,$acc0,$t0 sub $t0,$ap_end,$ap adcs $acc1,$acc1,$t1 adcs $acc2,$acc2,$t2 adcs $acc3,$acc3,$t3 //adc $carry,$carry,xzr cbnz $cnt,.Loop_mul4x_1st_reduction cbz $t0,.Lmul4x4_post_condition ldp $a0,$a1,[$ap,#8*0] // a[4..7] ldp $a2,$a3,[$ap,#8*2] add $ap,$ap,#8*4 ldr $mi,[sp] // a[0]*n0 ldp $m0,$m1,[$np,#8*0] // n[4..7] ldp $m2,$m3,[$np,#8*2] add $np,$np,#8*4 .Loop_mul4x_1st_tail: mul $t0,$a0,$bi // lo(a[4..7]*b[i]) adc $carry,$carry,xzr // modulo-scheduled mul $t1,$a1,$bi add $cnt,$cnt,#8 mul $t2,$a2,$bi and $cnt,$cnt,#31 mul $t3,$a3,$bi adds $acc0,$acc0,$t0 umulh $t0,$a0,$bi // hi(a[4..7]*b[i]) adcs $acc1,$acc1,$t1 umulh $t1,$a1,$bi adcs $acc2,$acc2,$t2 umulh $t2,$a2,$bi adcs $acc3,$acc3,$t3 umulh $t3,$a3,$bi adc $acc4,xzr,xzr ldr $bi,[$bp,$cnt] // next b[i] (or b[0]) adds $acc1,$acc1,$t0 mul $t0,$m0,$mi // lo(n[4..7]*a[0]*n0) adcs $acc2,$acc2,$t1 mul $t1,$m1,$mi adcs $acc3,$acc3,$t2 mul $t2,$m2,$mi adc $acc4,$acc4,$t3 // can't overflow mul $t3,$m3,$mi adds $acc0,$acc0,$t0 umulh $t0,$m0,$mi // hi(n[4..7]*a[0]*n0) adcs $acc1,$acc1,$t1 umulh $t1,$m1,$mi adcs $acc2,$acc2,$t2 umulh $t2,$m2,$mi adcs $acc3,$acc3,$t3 adcs $acc4,$acc4,$carry umulh $t3,$m3,$mi adc $carry,xzr,xzr ldr $mi,[sp,$cnt] // next t[0]*n0 str $acc0,[$tp],#8 // result!!! adds $acc0,$acc1,$t0 sub $t0,$ap_end,$ap // done yet? adcs $acc1,$acc2,$t1 adcs $acc2,$acc3,$t2 adcs $acc3,$acc4,$t3 //adc $carry,$carry,xzr cbnz $cnt,.Loop_mul4x_1st_tail sub $t1,$ap_end,$num // rewinded $ap cbz $t0,.Lmul4x_proceed ldp $a0,$a1,[$ap,#8*0] ldp $a2,$a3,[$ap,#8*2] add $ap,$ap,#8*4 ldp $m0,$m1,[$np,#8*0] ldp $m2,$m3,[$np,#8*2] add $np,$np,#8*4 b .Loop_mul4x_1st_tail .align 5 .Lmul4x_proceed: ldr $bi,[$bp,#8*4]! // *++b adc $topmost,$carry,xzr ldp $a0,$a1,[$t1,#8*0] // a[0..3] sub $np,$np,$num // rewind np ldp $a2,$a3,[$t1,#8*2] add $ap,$t1,#8*4 stp $acc0,$acc1,[$tp,#8*0] // result!!! ldp $acc0,$acc1,[sp,#8*4] // t[0..3] stp $acc2,$acc3,[$tp,#8*2] // result!!! ldp $acc2,$acc3,[sp,#8*6] ldp $m0,$m1,[$np,#8*0] // n[0..3] mov $tp,sp ldp $m2,$m3,[$np,#8*2] adds $np,$np,#8*4 // clear carry bit mov $carry,xzr .align 4 .Loop_mul4x_reduction: mul $t0,$a0,$bi // lo(a[0..3]*b[4]) adc $carry,$carry,xzr // modulo-scheduled mul $t1,$a1,$bi add $cnt,$cnt,#8 mul $t2,$a2,$bi and $cnt,$cnt,#31 mul $t3,$a3,$bi adds $acc0,$acc0,$t0 umulh $t0,$a0,$bi // hi(a[0..3]*b[4]) adcs $acc1,$acc1,$t1 mul $mi,$acc0,$n0 // t[0]*n0 adcs $acc2,$acc2,$t2 umulh $t1,$a1,$bi adcs $acc3,$acc3,$t3 umulh $t2,$a2,$bi adc $acc4,xzr,xzr umulh $t3,$a3,$bi ldr $bi,[$bp,$cnt] // next b[i] adds $acc1,$acc1,$t0 // (*) mul $t0,$m0,$mi str $mi,[$tp],#8 // put aside t[0]*n0 for tail processing adcs $acc2,$acc2,$t1 mul $t1,$m1,$mi // lo(n[0..3]*t[0]*n0 adcs $acc3,$acc3,$t2 mul $t2,$m2,$mi adc $acc4,$acc4,$t3 // can't overflow mul $t3,$m3,$mi // (*) adds xzr,$acc0,$t0 subs xzr,$acc0,#1 // (*) umulh $t0,$m0,$mi // hi(n[0..3]*t[0]*n0 adcs $acc0,$acc1,$t1 umulh $t1,$m1,$mi adcs $acc1,$acc2,$t2 umulh $t2,$m2,$mi adcs $acc2,$acc3,$t3 umulh $t3,$m3,$mi adcs $acc3,$acc4,$carry adc $carry,xzr,xzr adds $acc0,$acc0,$t0 adcs $acc1,$acc1,$t1 adcs $acc2,$acc2,$t2 adcs $acc3,$acc3,$t3 //adc $carry,$carry,xzr cbnz $cnt,.Loop_mul4x_reduction adc $carry,$carry,xzr ldp $t0,$t1,[$tp,#8*4] // t[4..7] ldp $t2,$t3,[$tp,#8*6] ldp $a0,$a1,[$ap,#8*0] // a[4..7] ldp $a2,$a3,[$ap,#8*2] add $ap,$ap,#8*4 adds $acc0,$acc0,$t0 adcs $acc1,$acc1,$t1 adcs $acc2,$acc2,$t2 adcs $acc3,$acc3,$t3 //adc $carry,$carry,xzr ldr $mi,[sp] // t[0]*n0 ldp $m0,$m1,[$np,#8*0] // n[4..7] ldp $m2,$m3,[$np,#8*2] add $np,$np,#8*4 .align 4 .Loop_mul4x_tail: mul $t0,$a0,$bi // lo(a[4..7]*b[4]) adc $carry,$carry,xzr // modulo-scheduled mul $t1,$a1,$bi add $cnt,$cnt,#8 mul $t2,$a2,$bi and $cnt,$cnt,#31 mul $t3,$a3,$bi adds $acc0,$acc0,$t0 umulh $t0,$a0,$bi // hi(a[4..7]*b[4]) adcs $acc1,$acc1,$t1 umulh $t1,$a1,$bi adcs $acc2,$acc2,$t2 umulh $t2,$a2,$bi adcs $acc3,$acc3,$t3 umulh $t3,$a3,$bi adc $acc4,xzr,xzr ldr $bi,[$bp,$cnt] // next b[i] adds $acc1,$acc1,$t0 mul $t0,$m0,$mi // lo(n[4..7]*t[0]*n0) adcs $acc2,$acc2,$t1 mul $t1,$m1,$mi adcs $acc3,$acc3,$t2 mul $t2,$m2,$mi adc $acc4,$acc4,$t3 // can't overflow mul $t3,$m3,$mi adds $acc0,$acc0,$t0 umulh $t0,$m0,$mi // hi(n[4..7]*t[0]*n0) adcs $acc1,$acc1,$t1 umulh $t1,$m1,$mi adcs $acc2,$acc2,$t2 umulh $t2,$m2,$mi adcs $acc3,$acc3,$t3 umulh $t3,$m3,$mi adcs $acc4,$acc4,$carry ldr $mi,[sp,$cnt] // next a[0]*n0 adc $carry,xzr,xzr str $acc0,[$tp],#8 // result!!! adds $acc0,$acc1,$t0 sub $t0,$ap_end,$ap // done yet? adcs $acc1,$acc2,$t1 adcs $acc2,$acc3,$t2 adcs $acc3,$acc4,$t3 //adc $carry,$carry,xzr cbnz $cnt,.Loop_mul4x_tail sub $t1,$np,$num // rewinded np? adc $carry,$carry,xzr cbz $t0,.Loop_mul4x_break ldp $t0,$t1,[$tp,#8*4] ldp $t2,$t3,[$tp,#8*6] ldp $a0,$a1,[$ap,#8*0] ldp $a2,$a3,[$ap,#8*2] add $ap,$ap,#8*4 adds $acc0,$acc0,$t0 adcs $acc1,$acc1,$t1 adcs $acc2,$acc2,$t2 adcs $acc3,$acc3,$t3 //adc $carry,$carry,xzr ldp $m0,$m1,[$np,#8*0] ldp $m2,$m3,[$np,#8*2] add $np,$np,#8*4 b .Loop_mul4x_tail .align 4 .Loop_mul4x_break: ldp $t2,$t3,[x29,#96] // pull rp and &b[num] adds $acc0,$acc0,$topmost add $bp,$bp,#8*4 // bp++ adcs $acc1,$acc1,xzr sub $ap,$ap,$num // rewind ap adcs $acc2,$acc2,xzr stp $acc0,$acc1,[$tp,#8*0] // result!!! adcs $acc3,$acc3,xzr ldp $acc0,$acc1,[sp,#8*4] // t[0..3] adc $topmost,$carry,xzr stp $acc2,$acc3,[$tp,#8*2] // result!!! cmp $bp,$t3 // done yet? ldp $acc2,$acc3,[sp,#8*6] ldp $m0,$m1,[$t1,#8*0] // n[0..3] ldp $m2,$m3,[$t1,#8*2] add $np,$t1,#8*4 b.eq .Lmul4x_post ldr $bi,[$bp] ldp $a0,$a1,[$ap,#8*0] // a[0..3] ldp $a2,$a3,[$ap,#8*2] adds $ap,$ap,#8*4 // clear carry bit mov $carry,xzr mov $tp,sp b .Loop_mul4x_reduction .align 4 .Lmul4x_post: // Final step. We see if result is larger than modulus, and // if it is, subtract the modulus. But comparison implies // subtraction. So we subtract modulus, see if it borrowed, // and conditionally copy original value. mov $rp,$t2 mov $ap_end,$t2 // $rp copy subs $t0,$acc0,$m0 add $tp,sp,#8*8 sbcs $t1,$acc1,$m1 sub $cnt,$num,#8*4 .Lmul4x_sub: sbcs $t2,$acc2,$m2 ldp $m0,$m1,[$np,#8*0] sub $cnt,$cnt,#8*4 ldp $acc0,$acc1,[$tp,#8*0] sbcs $t3,$acc3,$m3 ldp $m2,$m3,[$np,#8*2] add $np,$np,#8*4 ldp $acc2,$acc3,[$tp,#8*2] add $tp,$tp,#8*4 stp $t0,$t1,[$rp,#8*0] sbcs $t0,$acc0,$m0 stp $t2,$t3,[$rp,#8*2] add $rp,$rp,#8*4 sbcs $t1,$acc1,$m1 cbnz $cnt,.Lmul4x_sub sbcs $t2,$acc2,$m2 mov $tp,sp add $ap,sp,#8*4 ldp $a0,$a1,[$ap_end,#8*0] sbcs $t3,$acc3,$m3 stp $t0,$t1,[$rp,#8*0] ldp $a2,$a3,[$ap_end,#8*2] stp $t2,$t3,[$rp,#8*2] ldp $acc0,$acc1,[$ap,#8*0] ldp $acc2,$acc3,[$ap,#8*2] sbcs xzr,$topmost,xzr // did it borrow? ldr x30,[x29,#8] // pull return address sub $cnt,$num,#8*4 .Lmul4x_cond_copy: sub $cnt,$cnt,#8*4 csel $t0,$acc0,$a0,lo stp xzr,xzr,[$tp,#8*0] csel $t1,$acc1,$a1,lo ldp $a0,$a1,[$ap_end,#8*4] ldp $acc0,$acc1,[$ap,#8*4] csel $t2,$acc2,$a2,lo stp xzr,xzr,[$tp,#8*2] add $tp,$tp,#8*4 csel $t3,$acc3,$a3,lo ldp $a2,$a3,[$ap_end,#8*6] ldp $acc2,$acc3,[$ap,#8*6] add $ap,$ap,#8*4 stp $t0,$t1,[$ap_end,#8*0] stp $t2,$t3,[$ap_end,#8*2] add $ap_end,$ap_end,#8*4 cbnz $cnt,.Lmul4x_cond_copy csel $t0,$acc0,$a0,lo stp xzr,xzr,[$tp,#8*0] csel $t1,$acc1,$a1,lo stp xzr,xzr,[$tp,#8*2] csel $t2,$acc2,$a2,lo stp xzr,xzr,[$tp,#8*3] csel $t3,$acc3,$a3,lo stp xzr,xzr,[$tp,#8*4] stp $t0,$t1,[$ap_end,#8*0] stp $t2,$t3,[$ap_end,#8*2] b .Lmul4x_done .align 4 .Lmul4x4_post_condition: adc $carry,$carry,xzr ldr $ap,[x29,#96] // pull rp // $acc0-3,$carry hold result, $m0-7 hold modulus subs $a0,$acc0,$m0 ldr x30,[x29,#8] // pull return address sbcs $a1,$acc1,$m1 stp xzr,xzr,[sp,#8*0] sbcs $a2,$acc2,$m2 stp xzr,xzr,[sp,#8*2] sbcs $a3,$acc3,$m3 stp xzr,xzr,[sp,#8*4] sbcs xzr,$carry,xzr // did it borrow? stp xzr,xzr,[sp,#8*6] // $a0-3 hold result-modulus csel $a0,$acc0,$a0,lo csel $a1,$acc1,$a1,lo csel $a2,$acc2,$a2,lo csel $a3,$acc3,$a3,lo stp $a0,$a1,[$ap,#8*0] stp $a2,$a3,[$ap,#8*2] .Lmul4x_done: ldp x19,x20,[x29,#16] mov sp,x29 ldp x21,x22,[x29,#32] mov x0,#1 ldp x23,x24,[x29,#48] ldp x25,x26,[x29,#64] ldp x27,x28,[x29,#80] ldr x29,[sp],#128 .inst 0xd50323bf // autiasp ret .size __bn_mul4x_mont,.-__bn_mul4x_mont ___ } $code.=<<___; .asciz "Montgomery Multiplication for ARMv8, CRYPTOGAMS by <appro\@openssl.org>" .align 4 ___ print $code; close STDOUT or die "error closing STDOUT: $!";
pmq20/ruby-compiler
vendor/openssl/crypto/bn/asm/armv8-mont.pl
Perl
mit
36,915
package RegoFormNrsUtils; require Exporter; @ISA = qw(Exporter); @EXPORT = qw(getNrsConfig getNrsOverrideFields checkHierarchicalPerms checkHierarchicalAdds); @EXPORT_OK = qw(getNrsConfig getNrsOverrideFields checkHierarchicalPerms checkHierarchicalAdds); use lib '.', '..'; use strict; use Defs; use Utils; use Reg_common; sub getNrsConfig { my ($Data) = @_; my $nrsEnabled = $Data->{'SystemConfig'}{'AllowOnlineRego_node'} || 0; my $nrsPcEnabled = 0; my $nrsRaEnabled = 0; my $nrsMrEnabled = 0; my $nrsRoEnabled = 0; my $nrsOptCount = 0; if ($nrsEnabled) { $nrsPcEnabled = !$Data->{'SystemConfig'}{'nrs_disablePaymentCompulsoryOverride'} || 0; $nrsRaEnabled = !$Data->{'SystemConfig'}{'nrs_disableRegisterAsOverride'} || 0; $nrsMrEnabled = !$Data->{'SystemConfig'}{'nrs_disableMultipleRegoOverride'} || 0; $nrsRoEnabled = !$Data->{'SystemConfig'}{'nrs_disableRegoOptionsOverride'} || 0; $nrsOptCount = $nrsPcEnabled + $nrsRaEnabled + $nrsMrEnabled + $nrsRoEnabled; } my %nrsConfig = ( enabled => $nrsEnabled, pcEnabled => $nrsPcEnabled, raEnabled => $nrsRaEnabled, mrEnabled => $nrsMrEnabled, roEnabled => $nrsRoEnabled, optCount => $nrsOptCount, ); return \%nrsConfig; } sub getNrsOverrideFields { #an alternative is to make a hash of arrays eg pc => ['intPaymentCompulsoryi'], ra => ['ynPlayer', 'ynCoach', etc] #but not as straightforward to work with... my %nrsOverrideFields = ( paymentCompulsory => 'intPaymentCompulsory', player => 'ynPlayer', coach => 'ynCoach', official => 'ynOfficial', matchOfficial => 'ynMatchOfficial', misc => 'ynMisc', volunteer => 'ynVolunteer', multipleAdult => 'intAllowMultipleAdult', multipleChild => 'intAllowMultipleChild', newRegos => 'intNewRegosAllowed', strAllowedMemberRecordTypes => 'strAllowedMemberRecordTypes', ); return \%nrsOverrideFields; }; sub checkHierarchicalPerms { my ($Data, $fieldName, $entityTypeID, $entityID, $upperLevel) = @_; my $entityStructure = getEntityStructure($Data, $entityTypeID, $entityID, $upperLevel, 0); #get bottomup my $perm = ''; foreach my $entityArr (@$entityStructure) { my $checkPerm = checkPerms($Data, $fieldName, @$entityArr[0], @$entityArr[1]); #[0] is entityTypeID, [1] is entityID. $perm = $checkPerm if $checkPerm and (isHeavierPerm($checkPerm, $perm)); } return $perm; } sub checkPerms { my ($Data, $fieldName, $entityTypeID, $entityID) = @_; my @fields = ('strPermission'); my %where = ( intEntityTypeID => $entityTypeID, intEntityID => $entityID, strFieldName => $fieldName, strFieldType => 'MemberRegoForm', strPermission => [ -and => {'!=', 'ChildDefine'}], ); my ($sql, @bindVals) = getSelectSQL('tblFieldPermissions', \@fields, \%where, undef); my $q = $Data->{'db'}->prepare($sql); $q->execute(@bindVals); my ($perm) = $q->fetchrow_array() || ''; return $perm; } sub checkHierarchicalAdds { my ($Data, $fieldName, $formID, $entityTypeID, $entityID, $upperLevel, $checkPerm) = @_; my $entityStructure = getEntityStructure($Data, $entityTypeID, $entityID, $upperLevel, 0); #get bottomup my $count = 0; foreach my $entityArr (@$entityStructure) { last if @$entityArr[0] >= $upperLevel; #[0] is entityTypeID, [1] is entityID. #upperLevel won't have any adds. $count += checkAdds($Data, $fieldName, $formID, @$entityArr[0], @$entityArr[1], $checkPerm); last if $count; } return $count; } sub checkAdds { my ($Data, $fieldName, $formID, $entityTypeID, $entityID, $checkPerm) = @_; my @fields = ('strPerm'); my %where = (intRegoFormID=>$formID, intEntityTypeID=>$entityTypeID, intEntityID=>$entityID, strFieldName=>$fieldName, intStatus=>1); my ($sql, @bindVals) = getSelectSQL('tblRegoFormFieldsAdded', \@fields, \%where); my $q = $Data->{'db'}->prepare($sql); $q->execute(@bindVals); my $count = 0; while (my ($thisPerm) = $q->fetchrow_array()) { if ($checkPerm) { $count++ if $Defs::FieldPermWeights{$thisPerm} >= $Defs::FieldPermWeights{$checkPerm}; } else { $count++; } } return $count; } 1;
facascante/slimerp
fifs/web/RegoFormBuilder/RegoFormNrsUtils.pm
Perl
mit
4,541
#!/usr/bin/perl ################################## # Copyright 2015 Patrick Clinger # # MIT License # ################################## # Solution for: # Cut the sticks # https://www.hackerrank.com/challenges/cut-the-sticks # We don't need to know how many sticks there are from stdin (we'll split and loop) <>; # Sort the length of all the sticks, lowest first my @sticks = sort {$a<=>$b} split(/\s/,<>); # While we have sticks left, loop over them while(@sticks) { # The first stick is the lowest stick $min = $sticks[0]; # Print out how many sticks we have print ~~@sticks,"\n"; # While we still have sticks and the lowest stick matches # the current one remove it (since we cut by it's size). while(~~@sticks && $sticks[0] == $min) { shift(@sticks); } }
pclinger/HackerRank
algorithms/implementation/cut-the-sticks.pl
Perl
mit
794
#!/usr/bin/perl use strict; use warnings; # This class is generated from DBIx.pm. Do not modify. package WWW::Shopify::Model::DBIx::Schema::Result::Model::Location; use base qw/DBIx::Class::Core/; __PACKAGE__->load_components(qw/InflateColumn::DateTime/); __PACKAGE__->table('shopify_locations'); __PACKAGE__->add_columns( "country", { data_type => 'VARCHAR(255)', is_nullable => '1' }, "address2", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "city", { data_type => 'VARCHAR(255)', is_nullable => '1' }, "address1", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "phone", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "location_type", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "updated_at", { is_nullable => '1', data_type => 'DATETIME' }, "created_at", { is_nullable => '1', data_type => 'DATETIME' }, "id", { data_type => 'BIGINT', is_nullable => '0' }, "zip", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "name", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "province", { is_nullable => '1', data_type => 'VARCHAR(255)' }, "shop_id", { data_type => "BIGINT" } ); __PACKAGE__->set_primary_key('id'); __PACKAGE__->belongs_to(shop => 'WWW::Shopify::Model::DBIx::Schema::Result::Model::Shop', 'shop_id'); sub represents { return 'WWW::Shopify::Model::Location'; } sub parent_variable { return undef; } 1;
gitpan/WWW-Shopify
lib/WWW/Shopify/Model/DBIx/Schema/Result/Model/Location.pm
Perl
mit
1,374
package Noosphere; use strict; # get classification info in string *and* hasharray form # sub classinfo { my $tbl = shift; my $id = shift; # first get the classification.. # my @class = getclass($tbl,$id); if (not defined $class[0]) { return ''; } my @output; foreach my $c (@class) { push @output, "$c->{ns}:$c->{cat}"; } return (join(', ',@output),[@class]); } # get a classification string for an object, formatted as an input string # sub classstring { my $tbl = shift; my $id = shift; # first get the classification.. # my @class = getclass($tbl,$id); if (not defined $class[0]) { return ''; } my @output; foreach my $c (@class) { push @output, "$c->{ns}:$c->{cat}"; } return join(', ',@output); } # print the classification for an object as # # ns1: cat1 # cat2 # ... # ns2: cat1 # cat2 # .... # ... # # if possible, a parenthesized description will follow the cat#'s (like for msc) # sub printclass { my $tbl = shift; my $id = shift; my $fs = shift||"+0"; # font size my $html = ''; # first get the classification.. # my @class = getclass($tbl,$id); if (not defined $class[0]) { return ""; } $html.="<table border=\"0\" cellpadding=\"0\" cellspacing=\"0\">"; my $curns = ""; foreach my $row (@class) { $html .= "<tr>"; my $nsprintable = getnsshortdesc($row->{ns}); my $nslink = getnslink($row->{ns}); if ($curns ne $row->{ns}) { # $nsprintable =~ s/ /&nbsp;/; if (nb($nslink)) { $html .= "<td valign=\"top\"><font size=\"$fs\"><a target=\"planetmath_popup\" href=\"$nslink\">$nsprintable</a>:</font></td>"; } else { $html .= "<td><font size=\"$fs\">$nsprintable:</font></td>"; } $curns = $row->{ns}; } else { $html .= "<td><font size=\"$fs\"></font></td>"; } my $desc = ''; if ($row->{ns} eq 'msc') { my $fss = $fs-1; $desc = "<font size=\"$fss\">(".getHierarchicalMscComment($row->{cat}).")</font>"; } $html .= "<td><font size=\"$fs\"><a href=\"".getConfig("main_url")."/?op=mscbrowse&amp;from=$tbl&amp;id=$row->{cat}\">$row->{cat}</a> $desc</font></td>"; $html .= "</tr>"; } $html .= "</table>"; return $html; } # get the short description field for a namespace # sub getnsshortdesc { my $ns=shift; return lookupfield(getConfig('ns_tbl'),'shortdesc',"name='$ns'"); } sub getnsshortdescbyid { my $nid=shift; return lookupfield(getConfig('ns_tbl'),'shortdesc',"id=$nid"); } # get the link field for a namespace # sub getnslink { my $ns=shift; return lookupfield(getConfig('ns_tbl'),'link',"name='$ns'"); } sub getnslinkbyid { my $nid=shift; return lookupfield(getConfig('ns_tbl'),'link',"id=$nid"); } # return 1 if an object is classified, 0 otherwise # sub isclassified { my $tbl=shift; my $id=shift; my $table=getConfig('class_tbl'); my ($rv,$sth)=dbSelect($dbh,{WHAT=>'count(objectid) as cnt',FROM=>$table,WHERE=>"tbl='$tbl' and objectid=$id"}); if (!$rv) { $sth->finish(); return 0; } my $row=$sth->fetchrow_hashref(); $sth->finish(); return ($row->{cnt}>0?1:0); } # get the classification for an object as an array of hashrefs {ns, cat} # order is preserved. # sub getclass { my $tbl = shift; my $id = shift; my @results = (); my $table = getConfig('class_tbl'); my $nstbl = getConfig('ns_tbl'); my ($rv,$sth) = dbSelect($dbh,{WHAT=>'ns.name as ns,classification.catid',FROM=>"$nstbl,$table",WHERE=>"ns.id=classification.nsid and classification.tbl='$tbl' and classification.objectid=$id",'ORDER BY'=>'ord',ASC=>''}); if (!$rv || $sth->rows() < 1) { $sth->finish(); return (); } # loop through the rows looking up human-readable category name # while (my $row = $sth->fetchrow_hashref()) { my $catname = getcatname($row->{'ns'},$row->{'catid'}); push @results,{ns => $row->{'ns'}, cat => $catname}; } return @results; } # look up human-readable category name from id # sub getcatname { my $ns = shift; my $catid = shift; my ($rv,$sth) = dbSelect($dbh,{WHAT=>'id', FROM=>$ns, WHERE=>"uid=$catid"}); if (!$rv || !$sth->rows()) { $sth->finish(); return $catid; } my $row = $sth->fetchrow_hashref(); return $row->{'id'}; } # check to see if a classification string is well-formed. callbacks for # different schemes should go in here. # sub checkclass { my $classification = shift; my @errors; my @classparsed = parseclassstring($classification); foreach my $catspec (@classparsed) { if ($catspec->{'ns'} eq 'msc') { if ($catspec->{'cat'} =~ /XX$/) { push @errors, "In MSC, '-XX' categories are not real categories and cannot be used for classification"; } } } return @errors; } # parse classifcation strings into array of hashes # sub parseclassstring { my $classification = shift; my @categories; my @specs = split(/\s*,\s*/, $classification); foreach my $class (@specs) { $class = normalizecat($class); my ($scheme, $cat) = split(/:/,$class); push @categories, {ns => $scheme, cat => $cat}; } return @categories; } # classify an object (deletes old classifications) # the classification string should be of the form # ns:category, ns:category, ... # sub classify { my $tbl = shift; my $id = shift; my $classification = shift; return unless (defined $classification); # declassify the object # declassify($tbl, $id); # put in the new individual classification links # my @classes = split(/\s*,\s*/,$classification); my $ord = 0; my $count = 0; foreach my $class (@classes) { $class =~ s/^\s*//; $class =~ s/\s*$//; if (nb($class)) { my $result = class_link($tbl, $id, $class, $ord); $count++ if $result; $ord++; } } # return count of successfully classified # return $count; } # delete classifications for an object # sub declassify { my $tbl = shift; my $id = shift; my $table = getConfig('class_tbl'); my ($rv,$sth) = dbDelete($dbh,{FROM=>$table,WHERE=>"tbl='$tbl' and objectid=$id"}); $sth->finish(); } # shorten classifications, turn # msc:11-00, msc:15-00, ... # to # msc:11-, msc:15-, ... # or # msc:11, msc:15, ... # # depending on the $level parameter # # expects normalization first. # sub catlevel { my $class = shift; my $level = shift; my @cats = split(/\s*,\s*/,$class); foreach my $i (0..$#cats) { my ($ns,$longcat) = split(/\s*:\s*/,$cats[$i]); my $shortcat = ''; if ($ns eq "msc") { $longcat =~ /^([0-9]{2})/ if ($level == 1); $longcat =~ /^([0-9]{2}.)/ if ($level == 2); $shortcat = $1; } $cats[$i] = "$ns:$shortcat"; } return join(', ',@cats); } # normalize an entire classification string # sub normalizeclass { my $class = shift; my @carray = split(/\s*,\s*/,$class); foreach my $i (0..$#carray) { $carray[$i] = normalizecat($carray[$i]); } return join (', ',@carray); } # normalize a category: put it in canonical form # sub normalizecat { my $cat = shift; my ($ns,$catstring); # get classification namespace and string. if namespace isn't given, # use the default (set to 'msc') # if ($cat !~ /:/) { ($ns,$catstring) = (getConfig('default_scheme'),$cat); } else { ($ns,$catstring) = split(/\s*:\s*/,$cat); } # handle special things, per scheme # if ($ns eq 'msc') { if ($catstring =~ /^([0-9]{2})$/) { $catstring = "$1-00"; } $catstring = uc($catstring); } return "${ns}:$catstring"; } # put in an individual classification link # takes a string of the form ns:category and looks up category in table 'ns' # to find the uid for the category, then it inserts ns,uid for the record. # sub class_link { my $tbl = shift; my $id = shift; my $class = shift; my $ord = shift; # order my $table = getConfig('class_tbl'); $class = normalizecat($class); my ($ns,$catstring)=split(/\s*:\s*/,$class); # look up id from category string # my ($rv,$sth) = dbSelect($dbh,{FROM=>$ns,WHAT=>'uid',WHERE=>"id='$catstring'"}); my $row = $sth->fetchrow_hashref(); my $catid = $row->{uid}; $sth->finish(); my $nsid = getnsid($ns); # insert the record # ($rv,$sth) = dbInsert($dbh,{INTO=>$table,COLS=>'tbl,objectid,ns,nsid,catid,ord',VALUES=>"'$tbl',$id,'$ns',$nsid,$catid,$ord"}); $sth->finish(); return (defined $rv ? 1 : 0); } # get namespace id number by namespace name # sub getnsid { my $ns=shift; my $nstbl=getConfig('ns_tbl'); my ($rv,$sth)=Noosphere::dbSelect($dbh,{WHAT=>"id",FROM=>$nstbl,WHERE=>"name='$ns'"}); my $row=$sth->fetchrow_hashref(); return $row->{id}; } 1;
holtzermann17/Noosphere
lib/Noosphere/Classification.pm
Perl
mit
8,427
=head1 LICENSE # Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute # Copyright [2016-2017] EMBL-European Bioinformatics Institute # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <http://lists.ensembl.org/mailman/listinfo/dev>. Questions may also be sent to the Ensembl help desk at <http://www.ensembl.org/Help/Contact>. =cut =head1 NAME Bio::EnsEMBL::Analysis::RunnableDB::ExonerateSolexa - =head1 SYNOPSIS my $runnableDB = Bio::EnsEMBL::Analysis::RunnableDB::ExonerateSolexa->new( -db => $refdb, -analysis => $analysis_obj, ); $runnableDB->fetch_input(); $runnableDB->run(); $runnableDB->write_output(); #writes to DB =head1 DESCRIPTION Extends Bio::EnsEMBL::Analysis::RunnableDB::ExonerateAlignFeature to allow use warnings ; use of compressed dna align features, useful when aligning millions of short Solexa reads =head1 METHODS =head1 APPENDIX =cut package Bio::EnsEMBL::Analysis::RunnableDB::ExonerateSolexa; use strict; use Bio::EnsEMBL::Utils::Exception qw(throw warning); use Bio::EnsEMBL::Analysis::RunnableDB; use Bio::EnsEMBL::Analysis::RunnableDB::ExonerateAlignFeature; use Bio::EnsEMBL::Analysis::Config::GeneBuild::ExonerateSolexa; use Bio::EnsEMBL::Analysis::Tools::Utilities; use vars qw(@ISA); @ISA = qw (Bio::EnsEMBL::Analysis::RunnableDB::ExonerateAlignFeature); sub new { my ( $class, @args ) = @_; my $self = $class->SUPER::new(@args); $self->db->disconnect_when_inactive(1); $self->read_and_check_config($EXONERATE_SOLEXA_CONFIG_BY_LOGIC); $self->db->disconnect_when_inactive(1); return $self; } sub run { my ($self) = @_; # do all the normal stuff $self->db->disconnect_when_inactive(1); $self->SUPER::run(); print "run finished 1 \n"; $self->db->disconnect_when_inactive(1); # filter the results carefully to only allow strict matches my $filtered_features = $self->filter_solexa($self->output); $self->db->disconnect_when_inactive(1); # Pair features together if they come from paired end reads if ( $self->PAIREDEND ) { my $paired_features = $self->pair_features($filtered_features); # clear the output array to load in the modified features $self->{'output'} = []; $self->output($paired_features); } $self->db->disconnect_when_inactive(1); } sub filter_solexa { my ($self,$features_ref) = @_; my @features = @$features_ref; my @filtered_features; # allow no more than MISSMATCH missmatches and # dont allow gapping... foreach my $feat ( @features ) { # dont allow gapping if ( $feat->cigar_string =~ /[ID]/ ) { # gapped reject it next } # check missmatches if ( $self->MISSMATCH ) { my $aligned_length = abs($feat->hend - $feat->hstart) +1; # print $feat->hseqname ." "; # print $feat->percent_id . " " ; # print " aligned length = $aligned_length "; my $matches = $aligned_length * $feat->percent_id / 100; # print " matches $matches "; my $missmatches = ( $aligned_length - $matches) / $aligned_length * 100; # print " missmatches $missmatches \n"; next if $missmatches > $self->MISSMATCH; # print "accepting\n"; } push @filtered_features, $feat; } return \@filtered_features; } sub pair_features { my ($self,$features_ref) = @_; my @features = @$features_ref; my $paired_features; my @selected_reads; foreach my $feat ( @features ) { if ( $feat->hseqname =~ /(\S+):((a|b|A|B|HA|HB))$/ ) { my $id = $1; my $suffix = lc($2); $suffix =~ s/^h//; push @{$paired_features->{$id}->{$suffix}},$feat; } else { $self->throw("Read name not recognised " . $feat->hseqname . "\n"); } } foreach my $pair ( keys %$paired_features ) { my ( @as, @bs ) ; @as = @{$paired_features->{$pair}->{'a'}} if $paired_features->{$pair}->{'a'}; @bs = @{$paired_features->{$pair}->{'b'}} if $paired_features->{$pair}->{'b'}; my @potential_pairs; # Pick the potential paired reads bases on chr positon foreach my $afeat ( @as ) { READ: foreach my $bfeat ( @bs ) { if ( $afeat->seqname eq $bfeat->seqname ) { # They lie on the same chr within PAIREDGAP bases of each other # allow them to overlap if ( ( $afeat->end > $bfeat->start && $afeat->start - $bfeat->end <= $self->PAIREDGAP ) or ( $bfeat->end > $afeat->start && $bfeat->start - $afeat->end <= $self->PAIREDGAP ) or # they overlap ( $afeat->start <= $bfeat->end && $afeat->end >= $bfeat->start )) { # they should be oriented pointing towards each other on # opposite strands... if ( $afeat->strand == 1 && $bfeat->strand == 1 && $afeat->hstrand != $bfeat->hstrand ) { # are they in the right order # on the forward strand a should come before b # and vice versa next READ unless ( ($afeat->hstrand == 1 && $afeat->start < $bfeat->start) or ($afeat->hstrand == -1 && $bfeat->start < $afeat->start) ); } # storing the pair using the score as the index # so I can easily pull out the highest scoring pair # if they score the SAME then choose the pair that is # closest together my $combined_score = $afeat->score + $bfeat->score; # work out the lengths the pairs are separated by if ( $potential_pairs[$combined_score] ) { my $new_length; my $old_length; my $old_afeat = $potential_pairs[$combined_score]->[0]; my $old_bfeat = $potential_pairs[$combined_score]->[1]; if ( $afeat->start > $bfeat->end ) { $new_length = $afeat->start - $bfeat->end; } else { $new_length = $bfeat->start - $afeat->end; } if ( $old_afeat->start > $old_bfeat->end ) { $old_length = $old_afeat->start - $old_bfeat->end; } else { $old_length = $old_bfeat->start - $old_afeat->end; } # only replace the pair if the new pair with the same combined score # are closer together ( hopefully this might stop clusters getting # tangled up if ( $old_length > $new_length ) { $potential_pairs[$combined_score] = [($afeat,$bfeat)] ; } } else { $potential_pairs[$combined_score] = [($afeat,$bfeat)] ; } } } } } if ( scalar(@potential_pairs) >= 1 ){ # lets join together the highest scoring pair of reads to make one new feature push @selected_reads, @{$self->merge_pair(pop @potential_pairs)} if scalar(@potential_pairs) >= 1; } else { if ( scalar(@as) >= 1 ) { @as = sort { $a->score <=> $b->score } @as ; my $selected = pop @as; if ( $selected->hseqname =~ /(\S+):A$/ ) { $selected->hseqname($1 .":a3p"); } if ( $selected->hseqname =~ /(\S+):HA$/ ) { $selected->hseqname($1 .":ha3p"); } push @selected_reads, $selected; } if ( scalar(@bs) >= 1 ) { @bs = sort { $a->score <=> $b->score } @bs ; my $selected = pop @bs; if ( $selected->hseqname =~ /(\S+):B$/ ) { $selected->hseqname($1 .":b3p"); } if ( $selected->hseqname =~ /(\S+):HB$/ ) { $selected->hseqname($1 .":hb3p"); } push @selected_reads, $selected; } } } return \@selected_reads; } sub merge_pair { my ( $self, $read_pair) = @_; my @ugfs; my @features; if ( $self->PAIR ) { # Use the combined scores and identity of the reads for the new read my $score = $read_pair->[0]->score + $read_pair->[1]->score; my $pid = ( $read_pair->[0]->percent_id + $read_pair->[1]->percent_id ) /2; # print "SELECTED " . $read_pair->[0]->seq_region_name , " " . $read_pair->[0]->start . " " . $read_pair->[0]->end ." " . $read_pair->[0]->strand . " " . $read_pair->[0]->hseqname ."\n"; # print "SELECTED " . $read_pair->[1]->seq_region_name , " " . $read_pair->[1]->start . " " . $read_pair->[1]->end ." " . $read_pair->[1]->strand . " " . $read_pair->[1]->hseqname ."\n"; # Because the features are split you can get the second half of # the read aligning before the first which can screw up the # hit start ends as you might expect # I am  going to flip a and b over if ( $read_pair->[1]->end <= $read_pair->[0]->start ) { my $tmp = $read_pair->[0]; $read_pair->[0] = $read_pair->[1]; $read_pair->[1] = $tmp; } # sort out the hit names so they are consistant # we need a 3 prime read to be labeled on # both reads or the merging code will # fall over with inconsistant hit names for ( my $i = 0 ; $i <=1 ; $i++ ) { my $read = $read_pair->[$i]; if ( $read->hseqname =~ /(\S+):((a|b))$/ ) { $read->hseqname($1); } if ( $read->hseqname =~ /(\S+):(A|B)$/ ) { $read_pair->[0]->hseqname($1 .":3p"); $read_pair->[1]->hseqname($1 .":3p"); $read = $read_pair->[$i]; } if ( $read->hseqname =~ /(\S+):(HA|HB)$/ ) { $read_pair->[0]->hseqname($1 .":h3p"); $read_pair->[1]->hseqname($1 .":h3p"); $read = $read_pair->[$i]; } } for ( my $i = 0 ; $i <=1 ; $i++ ) { my $read = $read_pair->[$i]; foreach my $ugf ( $read->ungapped_features ) { # need to modify the 'b' read hit starts ends to make it # appear to come from one long read # neeed to flip it onto the forward strand or else # the dna align feature will fall over my $hstart = $ugf->hstart ; my $hend = $ugf->hend ; if ( $i == 1 ) { if ( $ugf->hstrand == -1 ) { $ugf->hstrand(1); } } else { $ugf->hstrand(1) if $ugf->hstrand == -1; } $ugf->score($score); $ugf->percent_id($pid); push @ugfs, $ugf; } } # if they overlap just make 1 feature that combines the two reads # @ugfs = sort { $a->start <=> $b->start } @ugfs; # they overlap - merge them if ( scalar(@ugfs) == 2 ) { if ( $ugfs[0]->end >= $ugfs[1]->start && $ugfs[0]->start <= $ugfs[1]->end ) { $ugfs[0]->start($ugfs[1]->start) if $ugfs[1]->start < $ugfs[0]->start; $ugfs[0]->end($ugfs[1]->end) if $ugfs[1]->end > $ugfs[0]->end; $ugfs[0]->hstart( 1); $ugfs[0]->hend( ($ugfs[0]->end -$ugfs[0]->start )+1); # remove the last read just let through the modified read pop(@ugfs); } } else { # dont try to merge complex pairs where there is a # difficult cigar line $read_pair->[0]->hseqname($read_pair->[0]->hseqname . ":aa"); $read_pair->[1]->hseqname($read_pair->[1]->hseqname . ":bb"); push @features,($read_pair->[0],$read_pair->[1]); return \@features; } my $feat = new Bio::EnsEMBL::DnaDnaAlignFeature(-features => \@ugfs); $feat->analysis($self->analysis); push @features,$feat; } else { $read_pair->[0]->hseqname($read_pair->[0]->hseqname . ":aa"); $read_pair->[1]->hseqname($read_pair->[1]->hseqname . ":bb"); push @features,($read_pair->[0],$read_pair->[1]); } # Otherwise leave them as they are but change the a and b suffix to indictate that they have # been paired but are not joined together. return \@features; } =head2 write_output Arg [1] : array ref of Bio::EnsEMBL::DnaDnaAlignFeature Function : Overrides the write_output method from the superclass to allow use of compressed DnaAlignFeatures Returntype: 1 Exceptions: Throws if the feature cannot be stored =cut sub write_output { my ( $self, @output ) = @_; # Flag set to 1 = return a pipeline adaptor my $outdb; my $fa; if ( $self->COMPRESSION ) { # Flag set to 1 = return a pipeline adaptor # Remember you need to have the pipeline_tables in your OUT_DB if you like to use compression $outdb = $self->get_dbadaptor($self->OUT_DB, 'pipeline'); $outdb->disconnect_when_inactive(1); $fa = $outdb->get_CompressedDnaAlignFeatureAdaptor; } else { if ( defined $self->OUT_DBS ) { # randomly pick an output db from an array of possible dbs my @dbs = @{$self->OUT_DBS}; my $number = int(rand(scalar(@dbs))) ; # dont let it fall off the end of the array $number-- if $number == scalar(@dbs) ; $outdb = $self->get_dbadaptor($dbs[$number]); print STDERR "Picking db " . $outdb->dbc->dbname ." out of ". scalar(@dbs) . " possible output databases\n"; } else { # return a NORMAL adaptor NOT a pipeline adaptor and dno not attach dna_db $outdb = $self->get_dbadaptor($self->OUT_DB,undef,1); } $outdb->disconnect_when_inactive(1); $fa = $outdb->get_DnaAlignFeatureAdaptor; } print "writing output\n"; # calculate the hcoverage and use the evalue feild to store the # depth of the features if ( $self->COMPRESSION ) { foreach my $f (@{$self->output}){ $f->p_value(1) ; eval{ $fa->store($f); }; if ($@) { $self->throw("Unable to store DnaAlignFeature\n $@"); } } } else { print "no compression\n"; eval{ $fa->store(@{$self->output}); }; if ($@) { $self->throw("Unable to store DnaAlignFeature\n $@"); } } #$outdb->disconnect_if_idle(); } ########################################################### # containers sub INTRON_MODELS { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_INTRON_MODELS'} = $value; } if (exists($self->{'_CONFIG_INTRON_MODELS'})) { return $self->{'_CONFIG_INTRON_MODELS'}; } else { return undef; } } sub INTRON_OVERLAP { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_INTRON_OVERLAP'} = $value; } if (exists($self->{'_CONFIG_INTRON_OVERLAP'})) { return $self->{'_CONFIG_INTRON_OVERLAP'}; } else { return undef; } } sub TRANSCRIPT_BIOTYPE { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_TRANS_BIOTYPE'} = $value; } if (exists($self->{'_CONFIG_TRANS_BIOTYPE'})) { return $self->{'_CONFIG_TRANS_BIOTYPE'}; } else { return undef; } } sub TRANSDB { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_TRANSDB'} = $value; } if (exists($self->{'_CONFIG_TRANSDB'})) { return $self->{'_CONFIG_TRANSDB'}; } else { return undef; } } sub OUT_DB { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_OUT_DB'} = $value; } if (exists($self->{'_CONFIG_OUT_DB'})) { return $self->{'_CONFIG_OUT_DB'}; } else { return undef; } } sub COMPRESSION { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_COMPRESSION'} = $value; } if (exists($self->{'_CONFIG_COMPRESSION'})) { return $self->{'_CONFIG_COMPRESSION'}; } else { return undef; } } sub PAIREDEND { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_PAIREDEND'} = $value; } if (exists($self->{'_CONFIG_PAIREDEND'})) { return $self->{'_CONFIG_PAIREDEND'}; } else { return undef; } } sub PAIR { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_PAIR'} = $value; } if (exists($self->{'_CONFIG_PAIR'})) { return $self->{'_CONFIG_PAIR'}; } else { return undef; } } sub PROJECT { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_PROJECT'} = $value; } if (exists($self->{'_CONFIG_PROJECT'})) { return $self->{'_CONFIG_PROJECT'}; } else { return undef; } } sub PAIREDGAP { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_PAIREDGAP'} = $value; } if (exists($self->{'_CONFIG_PAIREDGAP'})) { return $self->{'_CONFIG_PAIREDGAP'}; } else { return undef; } } sub MISSMATCH { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_MISSMATCH'} = $value; } if (exists($self->{'_CONFIG_MISSMATCH'})) { return $self->{'_CONFIG_MISSMATCH'}; } else { return undef; } } sub OUT_DBS { my ($self,$value) = @_; if (defined $value) { $self->{'_CONFIG_OUT_DBS'} = $value; } if (exists($self->{'_CONFIG_OUT_DBS'}) and join(@{$self->{'_CONFIG_OUT_DBS'}}) ne '') { return $self->{'_CONFIG_OUT_DBS'}; } else { return undef; } } 1;
james-monkeyshines/ensembl-analysis
modules/Bio/EnsEMBL/Analysis/RunnableDB/ExonerateSolexa.pm
Perl
apache-2.0
16,750
#!/usr/bin/env perl # See the NOTICE file distributed with this work for additional information # regarding copyright ownership. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. use strict; use warnings; use Bio::EnsEMBL::Registry; use Bio::AlignIO; # # This script demonstrates how to fetch a GenomicAlignBlock from a DNAFrag # and then access each of the species sequences and their ancestral # sequences too # ## Load the registry automatically my $reg = "Bio::EnsEMBL::Registry"; $reg->load_registry_from_url('mysql://anonymous@ensembldb.ensembl.org'); # Get the Compara Adaptor for MethodLinkSpeciesSet my $method_link_species_set_adaptor = Bio::EnsEMBL::Registry->get_adaptor("Multi", "compara", "MethodLinkSpeciesSet"); # Get the method_link_species_set for the alignments my $methodLinkSpeciesSet = $method_link_species_set_adaptor->fetch_by_method_link_type_species_set_name('EPO', 'mammals'); # Define the start and end positions for the alignment my ($pig_start, $pig_end) = (105735017,105735022); # Get the pig *core* Adaptor for Slices my $pig_slice_adaptor = Bio::EnsEMBL::Registry->get_adaptor("pig", "core", "Slice"); # Get the slice corresponding to the region of interest my $pig_slice = $pig_slice_adaptor->fetch_by_region("chromosome", 15, $pig_start, $pig_end); # Get the Compara Adaptor for GenomicAlignBlocks my $genomic_align_tree_adaptor = Bio::EnsEMBL::Registry->get_adaptor("Multi", "compara", "GenomicAlignTree"); # The fetch_all_by_MethodLinkSpeciesSet_Slice() returns a ref. # to an array of GenomicAlingBlock objects (pig is the reference species) my $all_genomic_align_trees = $genomic_align_tree_adaptor->fetch_all_by_MethodLinkSpeciesSet_Slice($methodLinkSpeciesSet, $pig_slice); # set up an AlignIO to format SimpleAlign output my $alignIO = Bio::AlignIO->newFh(-interleaved => 0, -fh => \*STDOUT, -format => 'clustalw', -idlength => 20); # print the restricted alignments foreach my $genomic_align_tree( @{ $all_genomic_align_trees }) { my $restricted_gat = $genomic_align_tree->restrict_between_reference_positions($pig_start, $pig_end); print "Bio::EnsEMBL::Compara::GenomicAlignBlock #", $genomic_align_tree->dbID, "\n"; print "=====================================================\n"; print " length: ", $restricted_gat->length, "\n"; $restricted_gat->annotate_node_type(); foreach my $node (@{$restricted_gat->get_all_nodes()}) { # We can assume there is exactly 1 GenomicAlign per node my $this_genomic_align = $node->get_all_genomic_aligns_for_node->[0]; print " - ", join(":", $this_genomic_align->dnafrag->genome_db->name, $this_genomic_align->dnafrag->coord_system_name, $this_genomic_align->dnafrag->name, $this_genomic_align->dnafrag_start, $this_genomic_align->dnafrag_end, $this_genomic_align->dnafrag_strand), $node->is_leaf ? '' : "\n ".$node->name, "\n", $this_genomic_align->aligned_sequence, "\n\n"; } }
Ensembl/ensembl-compara
scripts/examples/dna_getAncestralSequences.pl
Perl
apache-2.0
3,595
#!/usr/bin/env perl # Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. =head1 CONTACT Please email comments or questions to the public Ensembl developers list at <http://lists.ensembl.org/mailman/listinfo/dev>. Questions may also be sent to the Ensembl help desk at <helpdesk.org>. =cut use strict; use warnings; use Getopt::Long; use ImportUtils qw(load); use Bio::EnsEMBL::Registry; use FindBin qw( $Bin ); ## ## run with bsub -q long -o [tmpdir]/output_tag.txt perl tag_snps.pl -tmpdir [tmpdir] -tmpfile [tmpfile] use constant MAX_SIZE => 500_000_000; my ($TMP_DIR, $TMP_FILE, $species, $registry_file, $selected_seq_region); GetOptions('species=s' => \$species, 'tmpdir=s' => \$ImportUtils::TMP_DIR, 'tmpfile=s' => \$ImportUtils::TMP_FILE, 'registry_file=s' => \$registry_file, 'seq_region=i' => \$selected_seq_region); warn("Make sure you have a updated ensembl.registry file!\n"); $selected_seq_region ||= $ENV{LSB_JOBINDEX} if defined($ENV{LSB_JOBINDEX}); $registry_file ||= $Bin . "/ensembl.registry"; $TMP_DIR = $ImportUtils::TMP_DIR; $TMP_FILE = $ImportUtils::TMP_FILE; #added default options $species ||= 'human'; my $reg = 'Bio::EnsEMBL::Registry'; $reg->load_all( $registry_file ); my $dbVariation = $reg->get_DBAdaptor($species,'variation'); my $siblings; create_LD_table($dbVariation); #create the LD table if it is not there yet my $in_str = get_LD_populations($dbVariation,$siblings); $in_str .= ' AND c.seq_region_id = '.$selected_seq_region if defined($selected_seq_region); # genotype codes my $gca = $reg->get_adaptor($species, 'variation', 'genotypecode'); my %codes = map {$_->dbID => (join "|", @{$_->genotype})} @{$gca->fetch_all()}; my $sth = $dbVariation->dbc->prepare(qq{SELECT c.sample_id,c.seq_region_id,c.seq_region_start,c.seq_region_end,c.genotypes,ip.population_sample_id FROM compressed_genotype_region c FORCE INDEX(pos_idx), individual_population ip WHERE ip.individual_sample_id = c.sample_id AND ip.population_sample_id $in_str },{mysql_use_result => 1}); $sth->execute(); debug("Dumping genotype data"); create_files($sth,$siblings); $sth->finish(); my @files = glob("$TMP_DIR/dump*"); my $call = ''; my @stats; debug("Submitting calculate LD jobs"); my $files_size = {}; foreach my $file (@files){ @stats = stat($file); $files_size->{$file} = $stats[7]; } foreach my $file (sort {$files_size->{$b} <=> $files_size->{$a}} keys %{$files_size}){ $file =~ /.*_(\d+)_(\d+)/; $call = "bsub -J ld_calculation_$1\_$2 -o $TMP_DIR\/$1\_$2\_farm.out "; @stats = stat($file); if ($stats[7] > MAX_SIZE){ $call .= " -q hugemem -R'select[mem>28000] rusage[mem=28000]' -M28000000 "; } else { $call .= " -q basement -R'select[mem>8000] rusage[mem=8000]' -M8000000 "; } $call .= "perl calculate_ld_table.pl -tmpdir $TMP_DIR -tmpfile $TMP_FILE -ldfile $file "; print $call,"\n"; system($call); $call = ''; } sleep(60); $call = "bsub -K -W2:00 -w -q basement 'done(ld_calculation*)' -J waiting_ld date"; system($call); # import the data in the LD table debug("Importing LD values to DB"); my @ld_files = glob("$TMP_DIR/$TMP_FILE*.out"); foreach my $file(@ld_files) { system("mv $file $TMP_DIR/$TMP_FILE"); load($dbVariation->dbc,qw(pairwise_ld sample_id seq_region_id seq_region_start seq_region_end r2)); } debug("Submitting find tag SNPs jobs"); $call = ''; foreach my $file (sort {$files_size->{$b} <=> $files_size->{$a}} keys %{$files_size}){ $file =~ /.*_(\d+)_(\d+)/; $call = "bsub -J tag_snps_$1\_$2 -o $TMP_DIR\/$1\_$2\_farm.out "; if ($files_size->{$file} > MAX_SIZE){ $call .= " -q hugemem -R'select[mem>28000] rusage[mem=28000]' -M28000000 "; } else { $call .= " -q basement -R'select[mem>8000] rusage[mem=8000]' -M8000000 "; } $call .= "/software/bin/env perl select_tag_snps.pl $file "; $call .= " -tmpdir $TMP_DIR -species $species"; $call .= " -registry_file $registry_file" if defined($registry_file); print $call,"\n"; system($call); #send the job to one queue $call = ''; } $call = "bsub -K -w 'done(tag_snps*)' -q basement -J waiting_process sleep 1"; #waits until all snp_tagging have finished to continue system($call); debug("Importing tag SNPs"); &import_tagg_snps($dbVariation); unlink(<$TMP_DIR/tag_snps*.out>); sub store_file{ my $buffer = shift; my $individual_id = shift; my $seq_region_start = shift; my $genotype = shift; my $population_id = shift; my $seq_region_id = shift; my @genotypes = unpack '(www)*', $genotype; my $snp_start = $seq_region_start; while( my( $variation_id, $gt_code, $gap ) = splice @genotypes, 0, 3 ) { my ($allele_1, $allele_2) = split /\|/, $codes{$gt_code}; $allele_1 ||= '-'; $allele_2 ||= '-'; print_buffered($buffer,"$TMP_DIR/dump_data_$population_id\_$seq_region_id.txt",join("\t",$snp_start,$individual_id,$allele_1,$allele_2)."\n"); $snp_start += $gap + 1 if defined $gap; } } #creates all files, one per chromosome, to run the LD calculation sub create_files{ my $sth = shift; my $siblings = shift; my $buffer = {}; my ($individual_id, $seq_region_id, $seq_region_start,$seq_region_end,$genotypes, $population_id); $sth->bind_columns(\$individual_id, \$seq_region_id, \$seq_region_start, \$seq_region_end, \$genotypes, \$population_id); while($sth->fetch()) { if (!exists $siblings->{$population_id . '-' . $individual_id}){ #necessary to use the population_id store_file($buffer,$individual_id,$seq_region_start,$genotypes,$population_id,$seq_region_id); } } print_buffered($buffer); } sub print_buffered { my $buffer = shift; my $filename = shift; my $text = shift; local *FH; if( ! $filename ) { # flush the buffer foreach my $file (keys %{$buffer}){ open( FH, ">>$file" ) or die "Could not write to file $file"; print FH $buffer->{ $file }; close FH; } } else { $buffer->{ $filename } .= $text; if( length( $buffer->{ $filename } ) > 10_000 ) { open( FH, ">>$filename" ) or die "Could not write to file $filename"; print FH $buffer->{ $filename }; close FH; $buffer->{ $filename } = ''; } } } sub get_LD_populations{ my $dbVariation = shift; my $siblings = shift; my ($pop_id,$population_name); my $sth = $dbVariation->dbc->prepare(qq{ SELECT s.sample_id, s.name FROM population p, sample s WHERE (s.name like 'PERLEGEN:AFD%' OR s.name like 'CSHL-HAPMAP%' OR s.name like '1000GENOMES%' OR s.display = 'LD') AND s.sample_id = p.sample_id }); $sth->execute(); $sth->bind_columns(\$pop_id,\$population_name); #get all the children that we do not want in the genotypes my @pops; while($sth->fetch){ #if($population_name =~ /CEU|YRI|MEX/){ get_siblings($dbVariation,$pop_id,$siblings); #} push @pops, $pop_id; } my $in_str = " IN (" . join(',', @pops). ")"; return $in_str if (defined $pops[0]); return '' if (!defined $pops[0]); } #for a given population, gets all individuals that are children (have father or mother) sub get_siblings{ my $dbVariation = shift; my $population_id = shift; my $siblings = shift; my $sth_individual = $dbVariation->dbc->prepare(qq{ SELECT i.sample_id FROM individual i, individual_population ip WHERE ip.individual_sample_id = i.sample_id AND ip.population_sample_id = ? AND i.father_individual_sample_id IS NOT NULL AND i.mother_individual_sample_id IS NOT NULL }); my ($individual_id); $sth_individual->execute($population_id); $sth_individual->bind_columns(\$individual_id); while ($sth_individual->fetch){ # necessary to have in the key the population, # since some individuals are shared between populations $siblings->{$population_id.'-'.$individual_id}++; } } sub create_LD_table{ my $dbVariation = shift; #need to create ld table if it has not been create yet $dbVariation->dbc->do(qq{ CREATE TABLE IF NOT EXISTS pairwise_ld( sample_id int not null, seq_region_id int not null, seq_region_start int not null, seq_region_end int not null, r2 float not null, key seq_region_idx(seq_region_id,seq_region_start) ); }); $dbVariation->dbc->do(qq{TRUNCATE pairwise_ld}); } sub import_tagg_snps{ my $dbVariation = shift; my @ld_files = glob("$TMP_DIR/snps_tagged_*.txt"); foreach my $file(@ld_files) { system("mv $file $TMP_DIR/$TMP_FILE"); load($dbVariation->dbc(), qw(tagged_variation_feature variation_feature_id tagged_variation_feature_id sample_id)); } } # gets time sub get_time() { my @time = localtime(time()); # increment the month (Jan = 0) $time[4]++; # add leading zeroes as required for my $i(0..4) { $time[$i] = "0".$time[$i] if $time[$i] < 10; } # put the components together in a string my $time = ($time[5] + 1900)."-". $time[4]."-". $time[3]." ". $time[2].":". $time[1].":". $time[0]; return $time; } # prints debug output with time sub debug { my $text = (@_ ? (join "", @_) : "No message"); my $time = get_time; print $time." - ".$text.($text =~ /\n$/ ? "" : "\n"); }
dbolser/ensembl-variation
scripts/import/tag_snps.pl
Perl
apache-2.0
9,845
#!/usr/bin/env perl # Copyright [1999-2015] Wellcome Trust Sanger Institute and the EMBL-European Bioinformatics Institute # Copyright [2016-2022] EMBL-European Bioinformatics Institute # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. use warnings; use strict; use Getopt::Long qw(:config no_ignore_case); use Bio::EnsEMBL::Pipeline::DBSQL::DBAdaptor; my $host; my $port=3306; my $user; my $pass; my $dbname; my $input_id_type; my $analysis_id; GetOptions( 'host|dbhost|h=s' => \$host, 'port|dbport|P=s' => \$port, 'user|dbuser|u=s' => \$user, 'pass|dbpass|p=s' => \$pass, 'dbname|db|D=s' => \$dbname, 'input_id_type=s' => \$input_id_type, 'analysis_id=s' => \$analysis_id, ); $|=1; my $db = new Bio::EnsEMBL::Pipeline::DBSQL::DBAdaptor(-dbname => $dbname, -user => $user, -pass => $pass, -port => $port, -host => $host); my $q= 'select seq_region.name, coord_system.version, gene.seq_region_start, gene.seq_region_end, gene.seq_region_strand from gene, seq_region, coord_system where seq_region.seq_region_id = gene.seq_region_id and seq_region.coord_system_id = coord_system.coord_system_id order by gene.seq_region_id, gene.seq_region_start, gene.seq_region_end, gene.seq_region_strand'; my $sth = $db->prepare($q) || $db->throw("can't prepare: $q"); my $slice_start = 100000000000000000000000000000000; my $slice_end = 0; my $slice_chr = 0; my $slice_strand = 0; #while(<>){ # chomp; # my $res = $sth->execute($_) || $db->throw("can't execute: $q"); my $res = $sth->execute() || $db->throw("can't execute: $q"); while( my ($chr, $version, $start, $end, $strand) = $sth->fetchrow_array) { next if ($chr eq 'MT'); if ($slice_chr == 0){ $slice_chr = $chr; $slice_start = $start; $slice_end = $end; $slice_strand = $strand; } if ($slice_chr eq $chr && $start < $slice_end && $end >$slice_start && $slice_strand == $strand){ if ($start < $slice_start){ $slice_start = $start;} if ($end > $slice_end){ $slice_end = $end;} }else{ print "insert into input_id_analysis values ('toplevel:".$version.":$chr:$start:$end:1','".$input_id_type."',".$analysis_id.", now(), '', '', '0');\n"; $slice_chr = $chr; $slice_start = $start; $slice_end = $end; $slice_strand = $strand; } } #}
Ensembl/ensembl-analysis
scripts/make_input_id_4_seleno.pl
Perl
apache-2.0
3,185
# # Copyright 2022 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package apps::virtualization::ovirt::mode::listhosts; use base qw(centreon::plugins::mode); use strict; use warnings; sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $options{options}->add_options(arguments => { "filter-name:s" => { name => 'filter_name' }, }); return $self; } sub check_options { my ($self, %options) = @_; $self->SUPER::init(%options); } sub manage_selection { my ($self, %options) = @_; $self->{hosts} = $options{custom}->list_hosts(); } sub run { my ($self, %options) = @_; $self->manage_selection(%options); foreach my $host (@{$self->{hosts}}) { next if (defined($self->{option_results}->{filter_name}) && $self->{option_results}->{filter_name} ne '' && $host->{name} !~ /$self->{option_results}->{filter_name}/); $self->{output}->output_add(long_msg => sprintf("[id = %s][name = %s][address = %s][status = %s]", $host->{id}, $host->{name}, $host->{address}, $host->{status})); } $self->{output}->output_add(severity => 'OK', short_msg => 'List hosts:'); $self->{output}->display(nolabel => 1, force_ignore_perfdata => 1, force_long_output => 1); $self->{output}->exit(); } sub disco_format { my ($self, %options) = @_; $self->{output}->add_disco_format(elements => ['id', 'name', 'address', 'status']); } sub disco_show { my ($self, %options) = @_; $self->manage_selection(%options); foreach my $host (@{$self->{hosts}}) { $self->{output}->add_disco_entry( id => $host->{id}, name => $host->{name}, address => $host->{address}, status => $host->{status}, ); } } 1; __END__ =head1 MODE List hosts. =over 8 =item B<--filter-name> Filter host name (Can be a regexp). =back =cut
centreon/centreon-plugins
apps/virtualization/ovirt/mode/listhosts.pm
Perl
apache-2.0
2,752
#! /usr/bin/perl # Author: BaconKwan # Email: terencest@gmail.com # Version: 1.0 # Create date: # Usage: use utf8; use strict; use warnings; use Getopt::Long; use File::Basename qw/basename dirname/; use File::Spec::Functions qw/rel2abs/; #### Main Programme #### my %opts; GetOptions (\%opts, "bam=s", "fa=s", "dir=s", "prefix=s", "id=s", "snp=s", "out=s", "debug:i"); &usage if(!$opts{bam} || !$opts{fa} || !$opts{dir} || !$opts{prefix}); my $debug = (defined $opts{debug}) ? 1 : 0; my $out_dir = (defined $opts{out}) ? $opts{out} : "out"; &main; exit; sub main{ ## checking step my ($gatk_path, $pc_path, $annovar_path, $pipe_bin, $forker_cmd, $forker_nc, $mcmd, $scmd, @bam_file, @tag, $ref_fa, $modif, $dedup, $snc, @ref_id, @ref_snp, $nct, $filter, $rf); &readConf(\$gatk_path, \$pc_path, \$annovar_path, \$pipe_bin, \$forker_cmd, \$forker_nc, \$mcmd, \$scmd, \@bam_file, \@tag, \$ref_fa, \$modif, \$dedup, \$snc, \@ref_id, \@ref_snp, \$nct, \$filter, \$rf); ## preparing step `mkdir -p $out_dir`; `mkdir -p $out_dir/ref`; `mkdir -p $out_dir/data`; `mkdir -p $out_dir/dedup`; `mkdir -p $out_dir/deNDN`; `mkdir -p $out_dir/snc`; `mkdir -p $out_dir/intervals`; `mkdir -p $out_dir/realign`; `mkdir -p $out_dir/snp`; `mkdir -p $out_dir/annot`; `mkdir -p $out_dir/upload`; `mkdir -p $out_dir/SH`; open SH, "> $out_dir/SH/0.link_ref.sh" || die $!; foreach(@bam_file){ my $tag = shift(@tag); print SH "ln -sf $_ $out_dir/ref/$tag.bam\n"; $_ = "$out_dir/ref/$tag.bam"; } &linkFiles(\@ref_id); &linkFiles(\@ref_snp); close SH; ( 0 == &runSH("$mcmd $out_dir/SH/0.link_ref.sh >> $out_dir/SH/0.link_ref.log 2>&1")) ? &showInfo("finish link files") : &stop("Error, please check log!"); ## main script if($modif ne "no"){ open SH, "> $out_dir/SH/1.modif.sh" || die $!; foreach(@bam_file){ my $f = basename($_, ".bam"); print SH "java -jar $pc_path/AddOrReplaceReadGroups.jar I=$_ O=$out_dir/data/${f}.bam ID=$f LB=$f SM=$f PL=illumina PU=run\n"; $_ = "$out_dir/data/${f}.bam"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/1.modif.sh >> $out_dir/SH/1.modif.log 2>&1")) ? &showInfo("finish Modif bam files' header") : &stop("Error, please check log!"); } if($dedup ne "no"){ open SH, "> $out_dir/SH/2.dedup.sh" || die $!; foreach(@bam_file){ my $f = basename($_, ".bam"); print SH "java -jar $pc_path/MarkDuplicates.jar I=$_ O=$out_dir/dedup/${f}_mark.bam M=$out_dir/dedup/${f}.metrics VALIDATION_STRINGENCY=LENIENT\n"; $_ = "$out_dir/dedup/${f}_mark.bam"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/2.dedup.sh >> $out_dir/SH/2.dedup.log 2>&1")) ? &showInfo("finish Mark duplication") : &stop("Error, please check log!"); } open SH, "> $out_dir/SH/3.filterNDN.sh" || die $!; foreach(@bam_file){ my @suffix = qw/_mark.bam .bam/; my $f = basename($_, @suffix); print SH "perl $pipe_bin/filterNDN.pl $_ $out_dir/deNDN/${f}_deNDN\n"; $_ = "$out_dir/deNDN/${f}_deNDN.bam"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/3.filterNDN.sh >> $out_dir/SH/3.filterNDN.log 2>&1")) ? &showInfo("finish filter NDN reads") : &stop("Error, please check log!"); open SH, "> $out_dir/SH/4.CreatIndex.sh" || die $!; foreach(@bam_file){ print SH "samtools index $_\n"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/4.CreatIndex.sh >> $out_dir/SH/4.CreatIndex.log 2>&1")) ? &showInfo("finish Creat bam files index") : &stop("Error, please check log!"); if($snc ne "no"){ open SH, "> $out_dir/SH/5.SNC.sh" || die $!; foreach(@bam_file){ my @suffix = qw/_deNDN.bam _mark.bam .bam/; my $f = basename($_, @suffix); print SH "java -jar $gatk_path -T SplitNCigarReads -R $ref_fa -I $_ -o $out_dir/snc/${f}_snc.bam -U ALLOW_N_CIGAR_READS -rf ReassignOneMappingQuality\n"; $_ = "$out_dir/snc/${f}_snc.bam"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/5.SNC.sh >> $out_dir/SH/5.SNC.log 2>&1")) ? &showInfo("finish Split'N'Trim") : &stop("Error, please check log!"); } open SH, "> $out_dir/SH/6.RealignerTargetCreator.sh" || die $!; foreach(@bam_file){ my @suffix = qw/_snc.bam _deNDN.bam _mark.bam .bam/; my $f = basename($_, @suffix); print SH "java -jar $gatk_path -T RealignerTargetCreator -R $ref_fa -I $_ -o $out_dir/intervals/${f}.intervals"; foreach(@ref_id){ print SH " -known $_"; } print SH "\n"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/6.RealignerTargetCreator.sh >> $out_dir/SH/6.RealignerTargetCreator.log 2>&1")) ? &showInfo("finish Creat intervals by realign reads to ref") : &stop("Error, please check log!"); open SH, "> $out_dir/SH/7.IndelRealigner.sh" || die $!; foreach(@bam_file){ my @suffix = qw/_snc.bam _deNDN.bam _mark.bam .bam/; my $f = basename($_, @suffix); print SH "java -jar $gatk_path -T IndelRealigner -R $ref_fa -targetIntervals $out_dir/intervals/${f}.intervals -I $_ -o $out_dir/realign/${f}_realign.bam"; foreach(@ref_id){ print SH " -known $_"; } print SH "\n"; $_ = "$out_dir/realign/${f}_realign.bam"; } close SH; ( 0 == &runSH("$mcmd $out_dir/SH/7.IndelRealigner.sh >> $out_dir/SH/7.IndelRealigner.log 2>&1")) ? &showInfo("finish Realign to interval regions") : &stop("Error, please check log!"); open SH, "> $out_dir/SH/8.HaplotypeCaller.sh" || die $!; print SH "java -jar $gatk_path -T HaplotypeCaller -R $ref_fa -nct $nct $filter $rf -dontUseSoftClippedBases -stand_call_conf 20 -stand_emit_conf 20 -o $out_dir/snp/snp.vcf"; foreach(@bam_file){ print SH " -I $_"; } foreach(@ref_snp){ print SH " -D $_"; } print SH "\n"; close SH; ( 0 == &runSH("$scmd $out_dir/SH/8.HaplotypeCaller.sh >> $out_dir/SH/8.HaplotypeCaller.log 2>&1")) ? &showInfo("finish Variant Calling") : &stop("Error, please check log!"); open SH, "> $out_dir/SH/9.annot.sh" || die $!; print SH "perl $pipe_bin/format2annovar.pl $out_dir/snp/snp.vcf > $out_dir/annot/snp.avinput\n"; print SH "perl $annovar_path/annotate_variation.pl --buildver $opts{prefix} $out_dir/annot/snp.avinput --outfile $out_dir/annot/snp_annot $opts{dir}\n"; print SH "perl $pipe_bin/combine_annovar.pl $out_dir/annot/snp_annot.variant_function $out_dir/annot/snp_annot.exonic_variant_function $out_dir/annot/snp.avinput $out_dir/upload/snp.annot\n"; print SH "perl $pipe_bin/split_sample_snp_stat4pipe.pl $out_dir/upload\n"; close SH; ( 0 == &runSH("$scmd $out_dir/SH/9.annot.sh >> $out_dir/SH/9.annot.log 2>&1")) ? &showInfo("finish Annotation") : &stop("Error, please check log!"); &showInfo("==================== Step info"); &showInfo("INFO : All steps finished!"); } #### Sub Programme #### sub usage{ die" Usage: perl $0 -bam <listfile> -fa <file> -dir <path> -prefix <string> [-id <file>] [-snp <file>] [-out <path>] [-debug] Options: -bam string *bam file list, one file per line -fa string *genome fasta file -dir string *path of ready files, which should have *_refGene.txt & *_refGeneMrna.fa inside -prefix string *should be content of * above -id string know indels files split by \",\", example: file1,file2 ... -snp string reference snp files split by \",\", example: file1,file2 ... -out string output path -debug print scripts only, not run \n"; } sub stop{ my ($text) = @_; &showTime($text); exit; } sub showInfo{ my ($text) = @_; &showTime($text); } sub runSH{ my ($sh) = @_; &showTime($sh); return 0 if($debug); return system("$sh"); } sub showTime{ my ($text) = @_; my ($sec,$min,$hour,$mday,$mon,$year,$wday,$yday,$isdst) = localtime; my $format_time = sprintf("[%d-%.2d-%.2d %.2d:%.2d:%.2d]",$year+1900,$mon+1,$mday,$hour,$min,$sec); print STDERR "$format_time $text\n"; } sub linkFiles{ my ($tmp) = @_; foreach(@{$tmp}){ my $f = basename($_); print SH "ln -sf $_ $out_dir/ref/${f}\n"; $_ = "$out_dir/ref/${f}"; } } sub join_values{ my ($value, $line, $link) = @_; my @tmp = split /,/, $$line; foreach(@tmp){ $_ = $link . $_; } $$value = join " ", @tmp; } sub set_values{ my ($path, $files) = @_; @{$path} = split /,/, $$files; foreach(@{$path}){ $_ = rel2abs($_); } } sub check_path{ my ($path, $flag, $text) = @_; $$path =~ s/^\s+|\s+$//g; #modif by gpk at 20141201, bug example "TK|_____/Bio/Project/PROJECT/GDR0224/RNAseq/out/align/TK/accepted_hits.bam." -- the dot(blank) at last if(defined $$path){ if( -s $$path ){ &showInfo("INFO : $$path : OK!"); } else{ ($flag) ? &stop("ERROR : $$path : Fail!") : &showInfo("WARNING : $$path : Fail!"); } } else{ ($flag) ? &stop("ERROR : Malformed $text setting!") : &showInfo("WARNING : Malformed $text setting!"); } } sub readConf{ my ($gatk_path, $pc_path, $annovar_path, $pipe_bin, $forker_cmd, $forker_nc, $mcmd, $scmd, $bam_file, $tag, $ref_fa, $modif, $dedup, $snc, $ref_id, $ref_snp, $nct, $filter, $rf) = @_; #&showInfo("==================== Loading config ..."); $$gatk_path = "/home/sunyong/bin/GenomeAnalysisTK.jar"; $$pc_path = "/home/guanpeikun/bin/picard-tools"; $$annovar_path = "/home/guanpeikun/bin/annovar"; $$pipe_bin= "/home/sunyong/bin"; $$forker_cmd = `which cmd_process_forker.pl`; chomp $$forker_cmd; #$$forker_nc = 4; open BAM, "< $opts{bam}" || die $!; while(<BAM>){ chomp; my @line = split /\t/; push(@{$bam_file}, $line[1]); push(@{$tag}, $line[0]); } close BAM; $$ref_fa = rel2abs($opts{fa}); $opts{dir} = rel2abs($opts{dir}); #$$modif = $line[1] if(defined $line[1]); #$$dedup = $line[1] if(defined $line[1]); #$$snc = $line[1] if(defined $line[1]); &set_values($ref_id, \$opts{id}) if(defined $opts{id}); &set_values($ref_snp, \$opts{snp}) if(defined $opts{snp}); #$$nct = $line[1] if(defined $line[1]); my $ele; $ele = "filterRNC,filterMBQ,filterNoBases"; &join_values($filter, \$ele, "-"); $ele = "UnmappedRead,BadMate,DuplicateRead,NotPrimaryAlignment,MappingQualityUnavailable"; &join_values($rf, \$ele, "-rf "); $ele = ""; #&showInfo("INFO : OK!"); ## set default value &showInfo("==================== Output path"); $out_dir = rel2abs($out_dir); &showInfo("INFO : $out_dir"); &showInfo("==================== GATK tools"); &check_path($gatk_path, 1, "gatk_path"); &showInfo("==================== Picard tools"); &check_path($pc_path, 1, "pc_path"); &showInfo("==================== Annovar tools"); &check_path($annovar_path, 1, "annovar_path"); &showInfo("==================== Pipe bin"); &check_path($pipe_bin, 1, "pipe_bin"); &showInfo("==================== Forker tools"); &check_path($forker_cmd, 0, "forker_cmd"); $$forker_nc = @{$bam_file} if(!defined $$forker_nc); $$forker_nc = 1 if($$forker_nc < 1); $$forker_nc = 2 if($$forker_nc > 2); if((!defined $$forker_cmd) || !(-s $$forker_cmd)){ $$mcmd = "sh"; $$scmd = "sh"; } else{ $$mcmd = "$$forker_cmd --CPU $$forker_nc -c"; $$scmd = "$$forker_cmd --CPU 1 -c"; } &showInfo("==================== Bam files"); &stop("ERROR : No files") if(0 == @{$bam_file}); foreach(@{$bam_file}){ &check_path(\$_, 1, "bam_file"); } &showInfo("==================== Genome fasta file"); &check_path($ref_fa, 1, "ref_fa"); &showInfo("==================== ref path"); &check_path(\$opts{dir}, 1, "dir"); &showInfo("==================== ref prefix"); &showInfo("INFO : $opts{prefix}"); &showInfo("==================== Optional step"); $$modif = "no" if(!defined $$modif); ($$modif ne "no") ? &showInfo("Modif header : yes") : &showInfo("Modif header : no"); $$dedup = "yes" if(!defined $$dedup); ($$dedup ne "no") ? &showInfo("Mark duplication : yes") : &showInfo("Mark duplication : no"); $$snc = "yes" if(!defined $$snc); ($$snc ne "no") ? &showInfo("Split'N'Trim : yes") : &showInfo("Split'N'Trim : no"); &showInfo("==================== Known Indels"); &showInfo("WARNING : No files") if(0 == @{$ref_id}); foreach(@{$ref_id}){ &check_path(\$_, 0, "ref_id"); exit if(!( -s $_)); } &showInfo("==================== Reference SNPs"); &showInfo("WARNING : No files") if(0 == @{$ref_snp}); foreach(@{$ref_snp}){ &check_path(\$_, 0 ,"ref_snp"); exit if(!( -s $_)); } #&showInfo("==================== Number of CPU threads"); $$nct = 2 if(!defined $$nct); #$$nct = 1 if($$nct < 1); #$$nct = 16 if($$nct > 16); &showInfo("INFO : $$nct"); &showInfo("==================== Arguments for MalformedReadFilter"); $$filter = "" if(!defined $$filter); &showInfo("INFO : $$filter"); &showInfo("==================== Filters to apply to reads before analysis"); $$rf = "" if(!defined $$rf); &showInfo("INFO : $$rf"); &showInfo("=================================================="); &showInfo("================ Check finished =================="); &showInfo("=================================================="); }
BaconKwan/Perl_programme
GATK_RNAseq_pipe/pipe_test/GATK4pipe.pl
Perl
apache-2.0
12,786
# # Copyright 2019 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package hardware::sensors::akcp::snmp::plugin; use strict; use warnings; use base qw(centreon::plugins::script_snmp); sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '1.0'; %{$self->{modes}} = ( 'sensors' => 'hardware::sensors::akcp::snmp::mode::sensors', ); return $self; } 1; __END__ =head1 PLUGIN DESCRIPTION Check AKCP sensors in SNMP. =cut
Sims24/centreon-plugins
hardware/sensors/akcp/snmp/plugin.pm
Perl
apache-2.0
1,283
# Copyright (c) 2005, 2007 Ian Joyce, Jeff Horwitz # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. package ModParrot::Config::Generator::ApacheRequestRec; use strict; use warnings; our $VERSION = '0.01'; use Carp; use BaseGenerator; use base 'ModParrot::Config::Generator::BaseGenerator'; sub run { my $self = shift; my $map = $self->get_map('build/maps/httpd/request_rec.map'); $self->build_attribs($map); $self->generate_c_source($map); $self->generate_pir_source($map); $self->generate_pir_dlfunc_source($map); } sub build_attribs { my ($self, $map) = @_; foreach my $record (@$map) { if ($record->{'return_type'} eq 'int') { $record->{'sig'} = 'iJpii'; $record->{'pir_type'} = 'int'; } else { $record->{'sig'} = 'tJpti'; $record->{'pir_type'} = 'string'; } } } sub generate_pir_dlfunc_source { my ($self, $map) = @_; my $source; foreach my $record (@$map) { $source .= $self->merge($self->get_dlfunc_template(), $record); } $self->write_file('pir', 'request_rec_dlfunc.pir', $source); } sub get_dlfunc_template { my $template = <<'END' dlfunc func, lib, "mpnci_request_rec_%%NAME%%", "%%SIG%%" set_root_global [ 'ModParrot'; 'NCI' ], "request_rec_%%NAME%%", func END ; return $template; } sub generate_c_source { my ($self, $map) = @_; my $source; my $prototype; foreach my $record (@$map) { my $function = $self->get_c_function($record); $source .= $function; # This gets the prototype. $function =~ /(.*)/; $prototype .= "$1;\n"; } $self->write_file('nci', 'request_rec.c', "$prototype\n$source"); } sub generate_pir_source { my ($self, $map) = @_; my $source; foreach my $record (@$map) { $source .= $self->get_pir_method($record); } $self->write_file('pir', 'request_rec.pir', $source); } sub get_pir_method { my ($self, $record) = @_; my $template = $record->{'return_type'} eq 'int' ? $self->get_pir_int_template() : $self->get_pir_string_template(); return $self->merge($template, $record); } sub get_pir_int_template { my $self = shift; my $template = <<'END' .sub %%NAME%% :method .param int data :optional .param int update_r :opt_flag .local pmc r .local pmc request_rec_%%NAME%% .local int %%NAME%% getattribute r, self, 'r' request_rec_%%NAME%% = get_root_global [ 'ModParrot'; 'NCI' ], 'request_rec_%%NAME%%' %%NAME%% = request_rec_%%NAME%%( r , data, update_r ) .return(%%NAME%%) .end END ; return $template; } sub get_pir_string_template { my $self = shift; my $template = <<'END' .sub %%NAME%% :method .param %%PIR_TYPE%% data :optional .param int update_r :opt_flag .local pmc r .local pmc request_rec_%%NAME%% .local %%PIR_TYPE%% %%NAME%% getattribute r, self, 'r' if update_r goto call_it data = "" call_it: request_rec_%%NAME%% = get_root_global [ 'ModParrot'; 'NCI' ], 'request_rec_%%NAME%%' %%NAME%% = request_rec_%%NAME%%( r , data, update_r ) .return(%%NAME%%) .end END ; return $template; } sub get_c_function { my ($self, $record) = @_; my @arguments = ('request_rec *r'); if ($record->{'access'} eq 'rw') { push @arguments, $record->{'return_type'} . $record->{'name'}; } else { confess "TODO: read only access to request_rec"; } $record->{'args'} = join ', ', @arguments; my $template = $record->{'return_type'} eq 'int' ? $self->get_c_int_template() : $self->get_c_char_template(); return $self->merge($template, $record); } sub get_c_int_template { my $self = shift; my $template = <<'END' %%RETURN_TYPE%% mpnci_request_rec_%%NAME%%(Parrot_Interp interp, request_rec *r, int %%NAME%%, int update_r) { if (update_r == 1) { r->%%NAME%% = %%NAME%%; } return r->%%NAME%%; } END ; return $template; } sub get_c_char_template { my $self = shift; my $template = <<'END' %%RETURN_TYPE%%mpnci_request_rec_%%NAME%%(Parrot_Interp interp, request_rec *r, char *%%NAME%%, int update_r) { if (update_r == 1) { r->%%NAME%% = (char *)apr_pstrdup(r->pool, %%NAME%%); } return r->%%NAME%%; } END ; return $template; } 1;
jhorwitz75/mod_parrot
build/lib/Generator/ApacheRequestRec.pm
Perl
apache-2.0
4,903
# # Copyright 2018 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package apps::vtom::restapi::mode::jobstatus; use base qw(centreon::plugins::templates::counter); use strict; use warnings; use centreon::plugins::misc; use centreon::plugins::statefile; my $instance_mode; sub custom_status_threshold { my ($self, %options) = @_; my $status = 'ok'; my $message; eval { local $SIG{__WARN__} = sub { $message = $_[0]; }; local $SIG{__DIE__} = sub { $message = $_[0]; }; if (defined($instance_mode->{option_results}->{critical_status}) && $instance_mode->{option_results}->{critical_status} ne '' && eval "$instance_mode->{option_results}->{critical_status}") { $status = 'critical'; } elsif (defined($instance_mode->{option_results}->{warning_status}) && $instance_mode->{option_results}->{warning_status} ne '' && eval "$instance_mode->{option_results}->{warning_status}") { $status = 'warning'; } }; if (defined($message)) { $self->{output}->output_add(long_msg => 'filter status issue: ' . $message); } return $status; } sub custom_status_output { my ($self, %options) = @_; my $msg = 'status : ' . $self->{result_values}->{status}; if ($self->{result_values}->{information} ne '') { $msg .= ' [information: ' . $self->{result_values}->{information} . ']'; } return $msg; } sub custom_status_calc { my ($self, %options) = @_; $self->{result_values}->{status} = $options{new_datas}->{$self->{instance} . '_status'}; $self->{result_values}->{name} = $options{new_datas}->{$self->{instance} . '_name'}; $self->{result_values}->{environment} = $options{new_datas}->{$self->{instance} . '_environment'}; $self->{result_values}->{application} = $options{new_datas}->{$self->{instance} . '_application'}; $self->{result_values}->{exit_code} = $options{new_datas}->{$self->{instance} . '_exit_code'}; $self->{result_values}->{family} = $options{new_datas}->{$self->{instance} . '_family'}; $self->{result_values}->{information} = $options{new_datas}->{$self->{instance} . '_information'}; return 0; } sub custom_long_threshold { my ($self, %options) = @_; my $status = 'ok'; my $message; eval { local $SIG{__WARN__} = sub { $message = $_[0]; }; local $SIG{__DIE__} = sub { $message = $_[0]; }; if (defined($instance_mode->{option_results}->{critical_long}) && $instance_mode->{option_results}->{critical_long} ne '' && eval "$instance_mode->{option_results}->{critical_long}") { $status = 'critical'; } elsif (defined($instance_mode->{option_results}->{warning_long}) && $instance_mode->{option_results}->{warning_long} ne '' && eval "$instance_mode->{option_results}->{warning_long}") { $status = 'warning'; } }; if (defined($message)) { $self->{output}->output_add(long_msg => 'filter status issue: ' . $message); } return $status; } sub custom_long_output { my ($self, %options) = @_; my $msg = 'started since : ' . centreon::plugins::misc::change_seconds(value => $self->{result_values}->{elapsed}); return $msg; } sub custom_long_calc { my ($self, %options) = @_; $self->{result_values}->{status} = $options{new_datas}->{$self->{instance} . '_status'}; $self->{result_values}->{name} = $options{new_datas}->{$self->{instance} . '_name'}; $self->{result_values}->{environment} = $options{new_datas}->{$self->{instance} . '_environment'}; $self->{result_values}->{application} = $options{new_datas}->{$self->{instance} . '_application'}; $self->{result_values}->{elapsed} = $options{new_datas}->{$self->{instance} . '_elapsed'}; $self->{result_values}->{family} = $options{new_datas}->{$self->{instance} . '_family'}; return -11 if ($self->{result_values}->{status} !~ /Running/i); return 0; } sub set_counters { my ($self, %options) = @_; $self->{maps_counters_type} = [ { name => 'global', type => 0, cb_prefix_output => 'prefix_global_output', }, { name => 'job', type => 1, cb_prefix_output => 'prefix_job_output', message_multiple => 'All jobs are ok', , skipped_code => { -11 => 1 } }, ]; $self->{maps_counters}->{job} = [ { label => 'status', threshold => 0, set => { key_values => [ { name => 'status' }, { name => 'name' }, { name => 'environment' }, { name => 'application' }, { name => 'exit_code' }, { name => 'family' }, { name => 'information' } ], closure_custom_calc => $self->can('custom_status_calc'), closure_custom_output => $self->can('custom_status_output'), closure_custom_perfdata => sub { return 0; }, closure_custom_threshold_check => $self->can('custom_status_threshold'), } }, { label => 'long', threshold => 0, set => { key_values => [ { name => 'status' }, { name => 'name' }, { name => 'environment' }, { name => 'application' }, { name => 'elapsed' }, { name => 'family' } ], closure_custom_calc => $self->can('custom_long_calc'), closure_custom_output => $self->can('custom_long_output'), closure_custom_perfdata => sub { return 0; }, closure_custom_threshold_check => $self->can('custom_long_threshold'), } }, ]; $self->{maps_counters}->{global} = [ { label => 'total-error', set => { key_values => [ { name => 'error' }, { name => 'total' } ], output_template => 'Error : %s', perfdatas => [ { label => 'total_error', value => 'error_absolute', template => '%s', min => 0, max => 'total_absolute' }, ], } }, { label => 'total-running', set => { key_values => [ { name => 'running' }, { name => 'total' } ], output_template => 'Running : %s', perfdatas => [ { label => 'total_running', value => 'running_absolute', template => '%s', min => 0, max => 'total_absolute' }, ], } }, { label => 'total-unplanned', set => { key_values => [ { name => 'unplanned' }, { name => 'total' } ], output_template => 'Unplanned : %s', perfdatas => [ { label => 'total_unplanned', value => 'unplanned_absolute', template => '%s', min => 0, max => 'total_absolute' }, ], } }, { label => 'total-finished', set => { key_values => [ { name => 'finished' }, { name => 'total' } ], output_template => 'Finished : %s', perfdatas => [ { label => 'total_finished', value => 'finished_absolute', template => '%s', min => 0, max => 'total_absolute' }, ], } }, { label => 'total-coming', set => { key_values => [ { name => 'coming' }, { name => 'total' } ], output_template => 'Coming : %s', perfdatas => [ { label => 'total_coming', value => 'coming_absolute', template => '%s', min => 0, max => 'total_absolute' }, ], } }, ]; } sub new { my ($class, %options) = @_; my $self = $class->SUPER::new(package => __PACKAGE__, %options); bless $self, $class; $self->{version} = '1.0'; $options{options}->add_options(arguments => { "filter-application:s" => { name => 'filter_application' }, "filter-environment:s" => { name => 'filter_environment' }, "filter-name:s" => { name => 'filter_name' }, "filter-family:s" => { name => 'filter_family' }, "warning-status:s" => { name => 'warning_status' }, "critical-status:s" => { name => 'critical_status', default => '%{status} =~ /Error/i' }, "warning-long:s" => { name => 'warning_long' }, "critical-long:s" => { name => 'critical_long' }, "reload-cache-time:s" => { name => 'reload_cache_time', default => 180 }, }); $self->{statefile_cache_app} = centreon::plugins::statefile->new(%options); $self->{statefile_cache_env} = centreon::plugins::statefile->new(%options); return $self; } sub check_options { my ($self, %options) = @_; $self->SUPER::check_options(%options); $self->{statefile_cache_app}->check_options(%options); $self->{statefile_cache_env}->check_options(%options); $instance_mode = $self; $self->change_macros(); } sub prefix_global_output { my ($self, %options) = @_; return "Total Job "; } sub prefix_job_output { my ($self, %options) = @_; return "job '" . $options{instance_value}->{environment} . '/' . $options{instance_value}->{application} . '/' . $options{instance_value}->{name} . "' "; } sub change_macros { my ($self, %options) = @_; foreach (('warning_status', 'critical_status', 'warning_long', 'critical_long')) { if (defined($self->{option_results}->{$_})) { $self->{option_results}->{$_} =~ s/%\{(.*?)\}/\$self->{result_values}->{$1}/g; } } } my %mapping_job_status = ( R => 'Running', U => 'Unplanned', F => 'Finished', W => 'Coming', E => 'Error', ); sub manage_selection { my ($self, %options) = @_; my $environments = $options{custom}->cache_environment(statefile => $self->{statefile_cache_env}, reload_cache_time => $self->{option_results}->{reload_cache_time}); my $applications = $options{custom}->cache_application(statefile => $self->{statefile_cache_app}, reload_cache_time => $self->{option_results}->{reload_cache_time}); $self->{job} = {}; $self->{global} = { total => 0, running => 0, unplanned => 0, finished => 0, coming => 0, error => 0 }; my $path = '/api/job/getAll'; if (defined($self->{option_results}->{filter_application}) && $self->{option_results}->{filter_application} ne '') { $path = '/api/job/list?applicationName=' . $self->{option_results}->{filter_application}; } if (defined($self->{option_results}->{filter_environment}) && $self->{option_results}->{filter_environment} ne '') { $path = '/api/job/list?environmentName=' . $self->{option_results}->{filter_environment}; } my $result = $options{custom}->get(path => $path); my $entries = defined($result->{result}) && ref($result->{result}) eq 'ARRAY' ? $result->{result} : (defined($result->{result}->{rows}) ? $result->{result}->{rows} : []); my $current_time = time(); foreach my $entry (@{$entries}) { my $application_sid = defined($entry->{applicationSId}) ? $entry->{applicationSId} : (defined($entry->{appSId}) ? $entry->{appSId} : undef); my $application = defined($application_sid) && defined($applications->{$application_sid}) ? $applications->{$application_sid}->{name} : 'unknown'; my $environment = defined($application_sid) && defined($applications->{$application_sid}) && defined($environments->{$applications->{$application_sid}->{envSId}}) ? $environments->{$applications->{$application_sid}->{envSId}} : 'unknown'; my $display = $environment . '/' . $application . '/' . $entry->{name}; if (defined($self->{option_results}->{filter_name}) && $self->{option_results}->{filter_name} ne '' && $display !~ /$self->{option_results}->{filter_name}/) { $self->{output}->output_add(long_msg => "skipping '" . $display . "': no matching filter.", debug => 1); next; } my $family = defined($entry->{family}) ? $entry->{family} : '-'; if (defined($self->{option_results}->{filter_family}) && $self->{option_results}->{filter_family} ne '' && $family !~ /$self->{option_results}->{filter_family}/) { $self->{output}->output_add(long_msg => "skipping '" . $family . "': no matching filter.", debug => 1); next; } my $information = defined($entry->{information}) ? $entry->{information} : ''; $information =~ s/\|/-/msg; $self->{global}->{total} += 1; $self->{global}->{lc($mapping_job_status{$entry->{status}})} += 1; $self->{job}->{$entry->{id}} = { name => $entry->{name}, status => $mapping_job_status{$entry->{status}}, information => $information, exit_code => defined($entry->{retcode}) ? $entry->{retcode} : '-', family => $family, application => $application, environment => $environment, elapsed => defined($entry->{timeBegin}) ? ( $current_time - $entry->{timeBegin}) : undef, }; } if (scalar(keys %{$self->{job}}) <= 0) { $self->{output}->add_option_msg(short_msg => "No job found."); $self->{output}->option_exit(); } } 1; __END__ =head1 MODE Check job status. =over 8 =item B<--filter-environment> Filter environment name (cannot be a regexp). =item B<--filter-application> Filter application name (cannot be a regexp). =item B<--filter-name> Filter name (can be a regexp). =item B<--filter-family> Filter family (can be a regexp). =item B<--filter-counters> Only display some counters (regexp can be used). Example: --filter-counters='^total-error$' =item B<--warning-*> Threshold warning. Can be: 'total-error', 'total-running', 'total-unplanned', 'total-finished', 'total-coming'. =item B<--critical-*> Threshold critical. Can be: 'total-error', 'total-running', 'total-unplanned', 'total-finished', 'total-coming'. =item B<--warning-status> Set warning threshold for status (Default: -) Can used special variables like: %{name}, %{status}, %{exit_code}, %{family}, %{information}, %{environment}, %{application} =item B<--critical-status> Set critical threshold for status (Default: '%{exit_code} =~ /Error/i'). Can used special variables like: %{name}, %{status}, %{exit_code}, %{family}, %{information}, %{environment}, %{application} =item B<--warning-long> Set warning threshold for long jobs (Default: none) Can used special variables like: %{name}, %{status}, %{elapsed}, %{family}, %{environment}, %{application} =item B<--critical-long> Set critical threshold for long jobs (Default: none). Can used special variables like: %{name}, %{status}, %{elapsed}, %{family}, %{environment}, %{application} =item B<--reload-cache-time> Time in seconds before reloading cache file (default: 180). =back =cut
wilfriedcomte/centreon-plugins
apps/vtom/restapi/mode/jobstatus.pm
Perl
apache-2.0
16,189
#!/usr/bin/env perl # # sizes.pl # use warnings; use lib "."; use File::stat; use Months; # Parse command line arguments use Getopt::Long; my $allMonths; my $oneYear; GetOptions('all' => \$allMonths, 'year' => \$oneYear); # By default, only show results for the most recent month if ($allMonths) { # leave table intact } elsif ($oneYear) { # reduce months table to just the last 12 entries @months = @months[-12..-1]; } else { # reduce months table to one element @months = @months[-1..-1]; } # ingest files foreach $month (@months) { print "Processing $month\n"; # # Process the archived file, representing all entities, # including those imported from other federations. # my $fn = "cache/$month.xml"; my $stat = stat($fn); my $all_size = $stat->size; my $all_count = int(`grep '</Entity' $fn | wc -l`); my $all_ratio = int($all_size/$all_count); push @all_sizes, $all_size; push @all_counts, $all_count; push @all_ratios, $all_ratio; # # Now generate a reduced version of the archived # file that contains only UK federation registered entities. # my $command = "xsltproc --output temp.tmp just_ours.xsl $fn"; # print "command is $command\n"; system($command); # || print "ignoring claimed failure in sub command\n"; # print "xsltproc run on $fn\n"; # # Process the reduced version of the archived file. # $fn = "temp.tmp"; $stat = stat($fn); my $our_size = $stat->size; my $our_count = int(`grep '</Entity' $fn | wc -l`); my $our_ratio = int($our_size/$our_count); push @our_sizes, $our_size; push @our_counts, $our_count; push @our_ratios, $our_ratio; } print "months\n"; foreach $month (@months) { print "$month\n"; } print "sizeM (all)\n"; foreach $size (@all_sizes) { $size /= 1000000; print "$size\n"; } print "sizeM (UK)\n"; foreach $size (@our_sizes) { $size /= 1000000; print "$size\n"; } print "entities (all)\n"; foreach $count (@all_counts) { print "$count\n"; } print "entities (UK)\n"; foreach $count (@our_counts) { print "$count\n"; } print "ratioK (all)\n"; foreach $ratio (@all_ratios) { $ratio /= 1000; print "$ratio\n"; } print "ratioK (UK)\n"; foreach $ratio (@our_ratios) { $ratio /= 1000; print "$ratio\n"; }
ukf/ukf-meta
charting/sizes.pl
Perl
apache-2.0
2,199
use IO::S4::Client; use Data::Dumper; $sn = shift @ARGV; $cn = shift @ARGV; $kn = [@ARGV]; # remaining args are keys $c = new IO::S4::Client("localhost", 2334); $c->init(); print Dumper($c); $c->connect(); while (<STDIN>) { chomp; $c->sendKeyed($sn, $cn, $kn, $_); select(undef, undef, undef, 0.1); print STDERR '.'; } $c->disconnect();
s4/s4
s4-driver/examples/src/main/resources/scripts/inject-keyed.pl
Perl
apache-2.0
350
=for advent_year 2009 =for advent_day 8 =for advent_title Prime Numbers =for advent_author Joe Jiang =encoding utf8 质数的计算是一个曾经非常有趣的话题,现在对我们来说也还是一个稍微有些难度的编程训练。下面我们就用这个话题来看看 Perl 和其他语言解决数学问题的能力。当然首先我们得有个基准程序: =begin pre % matho-primes 1 10 2 3 5 7 =end pre 如果你在运行类似 Debian 的系统,这个程序可以从 apt-get install mathomatic-primes 获得。它是 mathomatic 软件包的一个插件,恰好可以满足我们的需求。 然后,我们可以用 Perl 来实现同样的功能,当然为了好玩,这会是一个 One-liner 脚本(其实是个 bash function): =begin pre prime () { perl -e '@screen=(0,0,2..$ARGV[0]); map { my $p=$_; if ($screen[$p]) { $screen[$_ * $p]=0 for 2..$#screen/$p }} 2..sqrt($#screen); print qq($_\n) for grep {$_} @screen' $1 } % prime 10 2 3 5 7 =end pre 这个程序的原理是开个大数组(名叫 @screen ),并把其中下标为质数的元素置为下标本身。质数的定义是从 2 到 sqrt() 都无法整除的数字,所以一旦发现质数,就可以把他的若干倍数值下标的元素都置为 0。最后数组中剩下不为 0 的元素就是质数。 那么这个程序的速度如何呢?用 time 来测试对比一下: =begin pre $ time matho-primes 1 1000000 > /dev/null real 0m0.151s user 0m0.152s sys 0m0.004s $ time prime 1000000 > /dev/null real 0m0.846s user 0m0.768s sys 0m0.076s =end pre 在第二次运行速度的比较来看,我们的程序大概是 C 语言程序的 1/6 速度。坦白说,自己觉得这个速度还不错。 那么其他语言呢?在网上找来一个 Python 版本,用作对比: =begin pre $ python Python 2.6.2 (release26-maint, Apr 19 2009, 01:58:18) [GCC 4.3.3] on linux2 Type "help", "copyright", "credits" or "license" for more information. >>> aux = {}; [aux.setdefault(p, p) for p in range(2, 10) if 0 not in [p%d for d in aux if p>=d*d]]; [2, 3, 5, 7] % time python -c 'aux = {}; [aux.setdefault(p, p) for p in range(2, 1000000) if 0 not in [p%d for d in aux if p>=d*d]];' ... =end pre 应该说,Python 的 for ... if ... 后缀语法确实很酷。但是直到文章发表为止,脚本还没有结束。不知道为什么这个科学家发明的语言在数学上不太便捷。欢迎大家踊跃指出原因。 另外又在网上找到一段 Haskell 程序,应该承认这是非常简短的程序: =begin pre $ ghci GHCi, version 6.8.2: http://www.haskell.org/ghc/ :? for help Loading package base ... linking ... done. Prelude> let primes = sieve [2..] where sieve (p:xs) = p : sieve [x | x<-xs, x `mod` p /= 0] take 4 primes [2,3,5,7] Prelude> Leaving GHCi. $ cat | time ghci > /dev/null let primes = sieve [2..] where sieve (p:xs) = p : sieve [x | x<-xs, x `mod` p /= 0] take 78498 primes ^D ... =end pre ghci 这个命令行程序来自于软件包 ghc6,是 Haskell 的 Runtime evaluator。安装命令是 apt-get install ghc6。 注意这个程序的参数是需要输出的质数个数,而不是最大值。2 到 1000000 一共有 78498 个质数,这可以从 matho-primes 1 1000000 | wc -l 命令计算出来。 直到文章发表为止,脚本还没有结束。其他更加复杂的版本应该可以运行的更快,但是估计不太用适合 One-liner 的方法来运行了。 应该还可以找到其他语言的一些实现,不过限于个人的知识有限,就先不去尝试了。欢迎大家把更加有效的实现发在网上,自己认为有趣的语言值得花点时间证明一下。
PerlChina/mojo-advent
articles/2009/08/PrimeNumbers.pod
Perl
apache-2.0
3,703
# vim:ts=4 # # Copyright (c) 2011 Hypertriton, Inc. <http://hypertriton.com/> # All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions # are met: # 1. Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR # ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE # USE OF THIS SOFTWARE EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. sub Test { my ($ver, $pfx) = @_; MkIfPkgConfig('xinerama'); MkExecPkgConfig($pfx, 'xinerama', '--modversion', 'XINERAMA_VERSION'); MkExecPkgConfig($pfx, 'xinerama', '--cflags', 'XINERAMA_CFLAGS'); MkExecPkgConfig($pfx, 'xinerama', '--libs', 'XINERAMA_LIBS'); MkElse; MkDefine('XINERAM_CFLAGS', ''); MkDefine('XINERAMA_LIBS', ''); MkIfNE($pfx, ''); MkIfExists("$pfx/include/X11"); MkDefine('XINERAMA_CFLAGS', "-I$pfx/include"); MkEndif; MkIfExists("$pfx/lib"); MkDefine('XINERAMA_LIBS', "-L$pfx/lib"); MkEndif; MkElse; my @autoIncludeDirs = ( '/usr/include/X11', '/usr/include/X11R6', '/usr/local/X11/include', '/usr/local/X11R6/include', '/usr/local/include/X11', '/usr/local/include/X11R6', '/usr/X11/include', '/usr/X11R6/include', ); my @autoLibDirs = ( '/usr/local/X11/lib', '/usr/local/X11R6/lib', '/usr/X11/lib', '/usr/X11R6/lib', ); foreach my $dir (@autoIncludeDirs) { MkIfExists("$dir/X11"); MkDefine('XINERAMA_CFLAGS', "-I$dir"); MkEndif; } foreach my $dir (@autoLibDirs) { MkIfExists($dir); MkDefine('XINERAMA_LIBS', "\${XINERAMA_LIBS} -L$dir"); MkEndif; } # MkIfNE('${XINERAMA_CFLAGS}', ''); # MkPrint("trying autodetected path"); # MkPrint("WARNING: You should probably use --with-xinerama=prefix"); # MkEndif; MkEndif; MkDefine('XINERAMA_LIBS', "\${XINERAMA_LIBS} -lXinerama"); MkEndif; MkCompileC('HAVE_XINERAMA', '${X11_CFLAGS} ${XINERAMA_CFLAGS}', '${X11_LIBS} ${XINERAMA_LIBS}', << 'EOF'); #include <X11/Xlib.h> #include <X11/extensions/Xinerama.h> int main(int argc, char *argv[]) { Display *disp; int event_base = 0, error_base = 0; int rv = 1; disp = XOpenDisplay(NULL); if (XineramaQueryExtension(disp, &event_base, &error_base)) { rv = 0; } XCloseDisplay(disp); return (rv); } EOF MkSaveIfTrue('${HAVE_XINERAMA}', 'XINERAMA_CFLAGS', 'XINERAMA_LIBS'); } sub Emul { my ($os, $osrel, $machine) = @_; MkEmulUnavail('XINERAMA'); return (1); } BEGIN { $DESCR{'xinerama'} = 'the Xinerama extension'; $TESTS{'xinerama'} = \&Test; $EMUL{'xinerama'} = \&Emul; $DEPS{'xinerama'} = 'cc,x11'; } ;1
stqism/ToxBuild
ToxBuild/xinerama.pm
Perl
bsd-2-clause
3,600
package KorAP::XML::Annotation::Sgbr::Lemma; use KorAP::XML::Annotation::Base; use Mojo::ByteStream 'b'; sub parse { my $self = shift; $$self->add_tokendata( foundry => 'sgbr', layer => 'lemma', cb => sub { my ($stream, $token) = @_; my $mtt = $stream->pos($token->get_pos); my $content = $token->get_hash->{fs}->{f}; my $found; my $lemmata = (ref $content->{fs}->{f} eq 'ARRAY') ? $content->{fs}->{f} : [$content->{fs}->{f}]; my $first = 0; # Iterate over all lemmata foreach my $f (@$lemmata) { # lemma if (($f->{-name} eq 'lemma') && ($found = $f->{'#text'})) { unless ($first++) { $mtt->add_by_term('sgbr/l:' . $found); } else { $mtt->add_by_term('sgbr/lv:' . $found); }; }; }; }) or return; return 1; }; sub layer_info { ['sgbr/l=tokens', 'sgbr/lv=tokens'] } 1;
KorAP/KorAP-XML-Krill
lib/KorAP/XML/Annotation/Sgbr/Lemma.pm
Perl
bsd-2-clause
967
#!/usr/bin/env perl =head1 NAME BPbtab script parses WU-BLAST or NCBI-BLAST output files into BTAB format where each HSP is reported as a single line with tab-delimited fields. The original BTAB program is described here: Dubnick M. (1992) Btab--a Blast output parser. Comput Appl Biosci 8(6):601-2 A Perl version which emulates the functionality of btab is provided here by BPbtab. BPbtab relies exclusively on the BioPerl 1.4 Bio::SearchIO functionality. =cut =head1 USAGE Standard input is parsed and written to standard output. BPbtab < blast.output > blast.output.btab =cut use strict; use Bio::SearchIO; my $in = new Bio::SearchIO(-format => 'blast', -fh => \*STDIN); # parse each blast record: while( my $result = $in->next_result ) { # parse each hit per record. while( my $hit = $result->next_hit ) { # a hit consists of one or more HSPs while( my $hsp = $hit->next_hsp ) { my @x; $x[0] = $result->query_name(); # date $x[2] = $result->query_length(); $x[3] = $hsp->algorithm(); $x[4] = $result->database_name(); $x[5] = $hit->name(); $x[6] = $hsp->start('query'); $x[7] = $hsp->end('query'); my $queryStrand = $hsp->strand('query'); if ($queryStrand == -1) { ($x[6], $x[7]) = ($x[7], $x[6]); } $x[8] = $hsp->start('hit'); $x[9] = $hsp->end('hit'); my $hitStrand = $hsp->strand('hit'); if ($hitStrand == -1) { ($x[8], $x[9]) = ($x[9], $x[8]); } $x[10] = sprintf ("%.1f", $hsp->percent_identity()); my $similarity = $hsp->frac_conserved('total') * 100; $x[11] = sprintf("%.1f", $similarity); $x[12] = $hsp->score(); $x[13] = $hsp->bits(); $x[15] = $hit->description(); $x[16] = ( ($hsp->query->frame + 1) * $hsp->query->strand); #blast frame (1, 2, 3, -1, -2, -3). my $strandDescript = "null"; if ($queryStrand == 1) { $strandDescript = "Plus"; } elsif ($queryStrand == -1) { $strandDescript = "Minus"; } $x[17] = $strandDescript; $x[18] = $hit->length(); $x[19] = $hsp->evalue(); $x[20] = $hsp->pvalue(); my $outline = join ("\t", @x); print "$outline\n"; } } } =head1 DESCRIPTION Fields The parsed BLAST output is presented as single line HSP descriptions, with tab-delimited fields in the following order: [0] Query Sequence Name [2] Query Sequence Length [3] Search Method -- Blast family application name [4] Database Name [5] Subject Sequence Name -- Database entry name [6],[7] Query Left End, Query Right End -- The endpoints of the part of the query sequence which Blast aligns with the subject sequence. [8],[9] Subject Left End, Subject Right End -- The endpoints of the part of the subject sequence which Blast aligns with the query sequence. [10] Percent Identity -- The fraction of residues which are absolute matches between the query and subject sequence, expressed in percent. [11] Percent Similarity -- The fraction of residues which are exact or similar matches between the query and subject sequence, expressed in percent. [12] HSP score [13] Bits score [15] Description -- A freeform text field which contains the biological description field from the database for the subject sequence. If this text occupies more than one line in the Blast output file, the NewLines are replaced by spaces. Commas may occur in this field even if they are the field separator character, because this is the last field in the record. [16] Query Frame (1, 2, 3, -1, -2, -3) [17] Query Strand -- Plus, Minus or null [18] DB sequence length [19] Expect -- expected value [20] P-Value -- Poisson ratio ** Note ** Intervening field positions which are not described are not currently supported. These remain to support compatibility with other existing btab implementations. =cut
EVidenceModeler/EVidenceModeler
EvmUtils/BPbtab.pl
Perl
bsd-3-clause
4,173
#! /usr/bin/perl package FwRpmPackage; use strict; use warnings; BEGIN { use Exporter (); our ($VERSION, @ISA, @EXPORT, @EXPORT_OK, %EXPORT_TAGS); # if using RCS/CVS, this may be preferred $VERSION = sprintf "%d.%03d", q$Revision: 1.7 $ =~ /(\d+)/g; @ISA = qw (Exporter); @EXPORT = qw (&proctalk &get_state &get_dependencies &closure &get_dependencies_closure &reverse_provides &parse_depends &rpmvercmp &rpmevrcmp); %EXPORT_TAGS = ( ); # eg: TAG => [ qw!name1 name2! ], # your exported package globals go here, # as well as any optionally exported functions @EXPORT_OK = qw (); } our @EXPORT_OK; use IO::Pipe; use POSIX ":sys_wait_h"; #--------------------------------------------------------------------- # proctalk # # Fork a process and talk to it over a pipe pair. #--------------------------------------------------------------------- sub proctalk ($$) { my ($parent_code, $child_code) = @_; my $par_to_child = new IO::Pipe; my $child_to_par = new IO::Pipe; my $pid; if ($pid = fork ()) { # parent $par_to_child->writer (); $child_to_par->reader (); $parent_code-> ($child_to_par, $par_to_child); undef $par_to_child; undef $child_to_par; waitpid ($pid, 0); die "subprocess failed" if $?; } else { # child $par_to_child->reader (); $child_to_par->writer (); $child_code-> ($par_to_child, $child_to_par); die "child_code failed to exit"; } } #--------------------------------------------------------------------- # get_state # # Get all of the installed packages and versions. #--------------------------------------------------------------------- sub get_state () { my %state; my %virtual; # sometimes package provide another version, this is for those proctalk ( sub { my ($readfh, $writefh) = @_; while (defined ($_ = <$readfh>)) { chomp; my ($package, $version, $other) = split /\s+/, $_, 3; if ($version =~ m/^\(none\):(.*)$/) { $version = "$1"; # providesversion is often blank, or the same version, which # can be ignored. Otherwise it's often the version with the # hyphen release, so if removing that makes it the same # also ignore. Otherwise it's a different version so keep # track of it in the virtual table if ($other ne "" and $other ne $version and $version =~ m/^([^\-]+)\-/ and $1 ne $other) { $virtual{$package} = $other; } } $state{$package} = $version; } }, sub { my ($readfh, $writefh) = @_; close STDIN; open STDIN, "<&", $readfh or die "can't dup STDIN: $!"; close STDOUT; open STDOUT, ">&", $writefh or die "can't dup STDOUT: $!"; close STDERR unless $ENV{"FW_TRACE"}; exec "rpm", "-qa", '--queryformat', '%-{name}\t%{epoch}:%{version}-%{release}\t%{provideversion}\n'; } ); return (\%state, \%virtual); } #--------------------------------------------------------------------- # get_dependencies # # For a set of packages, identify the set of packages which are a # direct dependency of a member of the set. #--------------------------------------------------------------------- sub get_dependencies ($$$$@) { my ($state, $virtual, $arch, $release, @packages) = @_; my %dependencies; my %deps_by_package; return () unless scalar @packages; proctalk ( sub { my ($readfh, $writefh) = @_; foreach my $package (@packages) { print $writefh "$package\n"; } $writefh->close (); my $in_depends; my $package; while (defined ($_ = <$readfh>)) { chomp; my ($package, undef) = split /\s+/, $_; # TODO: rpm -qR lists all sorts of wierd stuff ... next unless $state->{$package}; my $depends = $_; my $alldeps = parse_depends ($state, $virtual, $arch, $depends, $release); my @pkgs = @{$alldeps->{"packages"}}; scalar map { $deps_by_package{$package}->{$_} = 1; $dependencies{$_} = 1 } @pkgs; } }, sub { my ($readfh, $writefh) = @_; close STDIN; open STDIN, "<&", $readfh or die "can't dup STDIN: $!"; close STDOUT; open STDOUT, ">&", $writefh or die "can't dup STDOUT: $!"; close STDERR unless $ENV{"FW_TRACE"}; exec "xargs", "rpm", "-qR", "--" or die "exec failed: $!"; } ); return (wantarray) ? keys %dependencies : \%deps_by_package; return undef; } #--------------------------------------------------------------------- # closure # # Form the closure of an operation on a set. #--------------------------------------------------------------------- sub closure ($@) { my ($func, @packages) = @_; my %pkghash = map { $_ => 1 } @packages; my $finished; do { my @deps = $func-> (@packages); $finished = 1; @packages = map { $finished = 0; $pkghash{$_} = 1; $_ } grep { ! exists $pkghash{$_} } @deps; } while (! $finished); return keys %pkghash; } #--------------------------------------------------------------------- # get_dependencies_closure # # For a set of packages, identify all installed packages which a # member of the set depends upon, either directly or indirectly. #--------------------------------------------------------------------- sub get_dependencies_closure ($$$$@) { my ($state, $virtual, $arch, $release, @packages) = @_; return closure (sub { get_dependencies ($state, $virtual, $arch, $release, @_) }, @packages); } #--------------------------------------------------------------------- # reverse_provides # # (Attempt to) find an installed package which provides a given # package. #--------------------------------------------------------------------- sub reverse_provides ($$) { my ($state, $package) = @_; my $reverse_provider; my $cmd = "rpm -q --whatprovides " ."--queryformat '%-{name} %{version}-%{release}\n' " .$package; my $provides = `$cmd`; $provides =~ m/^(\S+) / or die "unexpected rpm output for \"$cmd\": $provides"; $reverse_provider = $1 if $state->{$1}; return $reverse_provider; } #--------------------------------------------------------------------- # rpmvercmp # # Compare two version strings as RPM does, returning 1 if the first is # new than the second, 0 if they are the same, and -1 if the second is # newer than the first. # --------------------------------------------------------------------- sub rpmvercmp ($$) { my ($a, $b) = @_; # This function attempts to follow the C code as closely as possible. # http://www.rpm.org/api/4.4.2.2/rpmvercmp_8c-source.html if (! defined($a) || ! defined($b)) { if (defined($a)) { return 1; } # $a is defined and $b isn't. if (defined($b)) { return -1; } # $b is defined and $a isn't. return 0; # Neither $a nor $b is defined. } if ($a eq $b) { return 0; } my $one = $a; my $two = $b; while (length($one) > 0 && length($two) > 0) { $one =~ s/^[^[:alnum:]]+//; $two =~ s/^[^[:alnum:]]+//; if (length($one) == 0 || length($two) == 0) { last; } my $isnum; my $str1 = $one; my $str2 = $two; if ($str1 =~ m/^[[:digit:]]/) { $str1 =~ m/^([[:digit:]]*)(.*)/ and do { $one = $1; $str1 = $2; }; $str2 =~ m/^([[:digit:]]*)(.*)/ and do { $two = $1; $str2 = $2; }; $isnum = 1; } else { $str1 =~ m/^([[:alpha:]]*)(.*)/ and do { $one = $1; $str1 = $2; }; $str2 =~ m/^([[:alpha:]]*)(.*)/ and do { $two = $1; $str2 = $2; }; $isnum = 0; } if (length($one) == 0) { return -1; } # Shouldn't happen. if (length($two) == 0) { return $isnum ? 1 : -1; } if ($isnum) { $one =~ s/^0+//; $two =~ s/^0+//; if (length($one) > length($two)) { return 1; } if (length($two) > length($one)) { return -1; } } my $rc = $one cmp $two; if ($rc != 0) { return $rc; } $one = $str1; $two = $str2; } if (length($one) == 0 && length($two) == 0) { return 0; } if (length($one) == 0) { return -1; } else { return 1; } } #--------------------------------------------------------------------- # rpmevrcmp # # Compare two epoch:version-release strings as RPM does, the first of # which is the installed EVR and the second of which is the dependency # EVR. rpmevrcmp returns 1 if the installed EVR is greater than the # dependency EVR, 0 if they are the equal, and -1 if the installed EVR # is less than the dependency EVR. # --------------------------------------------------------------------- sub rpmevrcmp { my ($a, $b) = @_; # The parts of an RPM version number are EPOCH:VERSION-RELEASE. my ($ae, $av, $ar) = ($a =~ m{^(?:([^:]*):)?([^-]*)(?:-(.*))?$}); my ($be, $bv, $br) = ($b =~ m{^(?:([^:]*):)?([^-]*)(?:-(.*))?$}); my $cmp = rpmvercmp($ae, $be); if ($cmp != 0) { return $cmp; } $cmp = rpmvercmp($av, $bv); if ($cmp != 0) { return $cmp; } # If the dependency release is not specified, consider any # installed release to be equal. if (! defined ($br)) { return 0; } return rpmvercmp($ar, $br); } #--------------------------------------------------------------------- # enforce_op # # Check whether $installed $op $version is true. #--------------------------------------------------------------------- sub enforce_op ($$$) { my ($operation, $installed, $version) = @_; if (! defined ($operation) || $operation eq "") { return 1; } else { my $cmp = rpmevrcmp ($installed, $version); if ($operation eq "<<" || $operation eq "<") { return ($cmp < 0); } elsif ($operation eq "<=") { return ($cmp <= 0); } elsif ($operation eq "=") { return ($cmp == 0); } elsif ($operation eq ">=") { return ($cmp >= 0); } elsif ($operation eq ">>" || $operation eq ">") { return ($cmp > 0); } else { return 0; } } } #--------------------------------------------------------------------- # parse_depends # # Parse FW_PACKAGE_BUILD_DEPENDENCIES, which is in debian build-time # dependency format. Returns the set of installed packages which # satisfy the dependencies. #--------------------------------------------------------------------- sub parse_depends ($$$$$) { my ($state, $virtual, $arch, $depends, $release) = @_; my @missing; my @missing_specs; my %packages; my $first = 1; # libc6 (>= 2.2.1), exim | mail-transport-agent # kernel-headers-2.2.10 [!hurd-i386], hurd-dev [hurd-i386] # erlang-nox (= INSTALLED) SPEC: foreach my $spec (split(/\s*,\s*/, $depends)) { my $p = undef; my $op = ""; my $version = ""; OPTION: foreach my $option (split(/\s*\|\s*/, $spec)) { my ($not, $restrict); PARSE_OPTION: { $option =~ # DEB FORMAT m/^(\S+) # package name \s* (?: # optional version specification: "( OP VERSION )" \( \s* (<<|<=|>=|>>|<(?!=)|=|>(?!=)) \s* ([^\s\)]+) \s* \) )? \s* (?: # optional architecture specification: "[ ARCH ]" or "[ ! ARCH ]" \[ \s* (!)? \s* ([^\s\!\]]+) \s* \] )? \s*$/x and do { $p = $1; $op = $2; $version = (not defined $3) ? '' : $3 eq 'INSTALLED' ? $state->{$p} : $3; $not = $4; $restrict = $5; # no warnings 'uninitialized'; # print STDERR "deb $option -> $p $op $version $not $restrict\n"; last PARSE_OPTION; }; $option =~ # RPM FORMAT m/^(\S+) # package name \s* (?: # optional version specification: "OP VERSION" (<<|<=|>=|>>|<(?!=)|=|>(?!=)) \s* ([^\s\)]+) )? \s*$/x and do { $p = $1; $op = $2; $version = (not defined $3) ? '' : $3 eq 'INSTALLED' ? $state->{$p} : $3; # no warnings 'uninitialized'; # print STDERR "rpm $option -> $p $op $version\n"; last PARSE_OPTION; }; die "can't parse dependencies '$depends' (option '$option')"; } if (defined $not) { if ($not && $restrict eq $arch) { next SPEC; } if (! $not && $restrict ne $arch) { next SPEC; } } foreach my $s ($state, $virtual) { if ($s->{$p}) { if (enforce_op ($op, $s->{$p}, $version)) { $packages{$p} = (defined ($op) && $op ne "") ? "$op $version" : ">= $s->{$p}"; next SPEC; } } else { my $rev_p = reverse_provides ($s, $p); if ($rev_p && enforce_op ($op, $s->{$rev_p}, $version)) { $packages{$rev_p} = (defined ($op) && $op ne "") ? "$op $version" : ">= $s->{$rev_p}"; next SPEC; } } } } push @missing, "$p $op $version"; push @missing_specs, $spec; die "package/rpm/dependency-closure: fatal: '$spec' not installed\n" if $release eq "yes"; if ($first) { warn "\n"; $first = 0; } warn "package/rpm/dependency-closure: warning: '$spec' not installed\n" } my @pk = keys %packages; return { "packages" => \@pk, "missing" => \@missing, "missing_specs" => \@missing_specs, "manifest" => \%packages }; } END { } # module clean-up code here (global destructor) 1; # don't forget to return a true value from the file
dhull/fw
fw/package/rpm/FwRpmPackage.pm
Perl
bsd-3-clause
15,918
# # Copyright 2016 Centreon (http://www.centreon.com/) # # Centreon is a full-fledged industry-strength solution that meets # the needs in IT infrastructure and application monitoring for # service performance. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # package hardware::server::ibm::bladecenter::snmp::mode::components::chassisstatus; use strict; use warnings; # In MIB 'mmblade.mib' and 'cme.mib' my $oid_mmBistAndChassisStatus = '.1.3.6.1.4.1.2.3.51.2.2.5.2'; my $oid_bistLogicalNetworkLink = '.1.3.6.1.4.1.2.3.51.2.2.5.2.30.0'; my $oids = { bistSdram => '.1.3.6.1.4.1.2.3.51.2.2.5.2.1.0', bistRs485Port1 => '.1.3.6.1.4.1.2.3.51.2.2.5.2.2.0', bistRs485Port2 => '.1.3.6.1.4.1.2.3.51.2.2.5.2.3.0', bistNvram => '.1.3.6.1.4.1.2.3.51.2.2.5.2.4.0', bistRtc => '.1.3.6.1.4.1.2.3.51.2.2.5.2.5.0', bistLocalI2CBus => '.1.3.6.1.4.1.2.3.51.2.2.5.2.7.0', bistPrimaryMainAppFlashImage => '.1.3.6.1.4.1.2.3.51.2.2.5.2.8.0', bistSecondaryMainAppFlashImage => '.1.3.6.1.4.1.2.3.51.2.2.5.2.9.0', bistBootRomFlashImage => '.1.3.6.1.4.1.2.3.51.2.2.5.2.10.0', bistEthernetPort1 => '.1.3.6.1.4.1.2.3.51.2.2.5.2.11.0', bistEthernetPort2 => '.1.3.6.1.4.1.2.3.51.2.2.5.2.12.0', bistInternalPCIBus => '.1.3.6.1.4.1.2.3.51.2.2.5.2.13.0', bistExternalI2CDevices => '.1.3.6.1.4.1.2.3.51.2.2.5.2.14.0', bistUSBController => '.1.3.6.1.4.1.2.3.51.2.2.5.2.15.0', bistVideoCompressorBoard => '.1.3.6.1.4.1.2.3.51.2.2.5.2.16.0', bistRemoteVideo => '.1.3.6.1.4.1.2.3.51.2.2.5.2.17.0', bistPrimaryBus => '.1.3.6.1.4.1.2.3.51.2.2.5.2.18.0', bistInternalEthernetSwitch => '.1.3.6.1.4.1.2.3.51.2.2.5.2.19.0', bistVideoCapture => '.1.3.6.1.4.1.2.3.51.2.2.5.2.20.0', bistUSBKeyboardMouseEmulation => '.1.3.6.1.4.1.2.3.51.2.2.5.2.21.0', bistUSBMassStorageEmulation => '.1.3.6.1.4.1.2.3.51.2.2.5.2.22.0', bistUSBKeyboardMouseFirmware => '.1.3.6.1.4.1.2.3.51.2.2.5.2.23.0', bistUSBMassStorageFirmware => '.1.3.6.1.4.1.2.3.51.2.2.5.2.24.0', bistPrimaryCore => '.1.3.6.1.4.1.2.3.51.2.2.5.2.25.0', bistSecondaryCore => '.1.3.6.1.4.1.2.3.51.2.2.5.2.26.0', bistInternalIOExpander => '.1.3.6.1.4.1.2.3.51.2.2.5.2.27.0', bistRemoteControlFirmware => '.1.3.6.1.4.1.2.3.51.2.2.5.2.28.0', bistPhysicalNetworkLink => '.1.3.6.1.4.1.2.3.51.2.2.5.2.29.0', bistLogicalNetworkLink => '.1.3.6.1.4.1.2.3.51.2.2.5.2.30.0', }; my %map_test_state = ( 0 => 'testSucceeded', 1 => 'testFailed', ); sub load { my ($self) = @_; push @{$self->{request}}, { oid => $oid_mmBistAndChassisStatus, end => $oid_bistLogicalNetworkLink }; } sub check { my ($self) = @_; $self->{output}->output_add(long_msg => "Checking chassis status"); $self->{components}->{chassisstatus} = {name => 'chassis-status', total => 0, skip => 0}; return if ($self->check_filter(section => 'chassisstatus')); foreach my $name (sort keys %{$oids}) { if (!defined($self->{results}->{$oid_mmBistAndChassisStatus}->{$oids->{$name}})) { $self->{output}->output_add(long_msg => sprintf("skip '%s': no value", $name)); next; } my $value = $map_test_state{$self->{results}->{$oid_mmBistAndChassisStatus}->{$oids->{$name}}}; next if ($self->check_filter(section => 'chassisstatus', instance => $name)); $self->{components}->{chassisstatus}->{total}++; $self->{output}->output_add(long_msg => sprintf("Chassis status '%s' state is %s", $name, $value)); my $exit = $self->get_severity(section => 'chassisstatus', value => $value); if (!$self->{output}->is_status(value => $exit, compare => 'ok', litteral => 1)) { $self->{output}->output_add(severity => $exit, short_msg => sprintf("Chassis status '%s' state is %s", $name, $value)); } } } 1;
bcournaud/centreon-plugins
hardware/server/ibm/bladecenter/snmp/mode/components/chassisstatus.pm
Perl
apache-2.0
4,895
#!/usr/bin/env perl #*************************************************************************** # _ _ ____ _ # Project ___| | | | _ \| | # / __| | | | |_) | | # | (__| |_| | _ <| |___ # \___|\___/|_| \_\_____| # # Copyright (C) 2010-2019, Daniel Stenberg, <daniel@haxx.se>, et al. # # This software is licensed as described in the file COPYING, which # you should have received as part of this distribution. The terms # are also available at https://curl.haxx.se/docs/copyright.html. # # You may opt to use, copy, modify, merge, publish, distribute and/or sell # copies of the Software, and permit persons to whom the Software is # furnished to do so, under the terms of the COPYING file. # # This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY # KIND, either express or implied. # ########################################################################### # use strict; use warnings; # the DISABLE options that can be set by configure my %disable; # the DISABLE options that are used in C files my %file; # the DISABLE options that are documented my %docs; # we may get the dir root pointed out my $root=$ARGV[0] || "."; my $DOCS="CURL-DISABLE.md"; sub scan_configure { open S, "<$root/configure.ac"; while(<S>) { if(/(CURL_DISABLE_[A-Z_]+)/g) { my ($sym)=($1); $disable{$sym} = 1; } } close S; } sub scan_file { my ($source)=@_; open F, "<$source"; while(<F>) { if(/(CURL_DISABLE_[A-Z_]+)/g) { my ($sym)=($1); $file{$sym} = $source; } } close F; } sub scan_dir { my ($dir)=@_; opendir(my $dh, $dir) || die "Can't opendir $dir: $!"; my @cfiles = grep { /\.c\z/ && -f "$dir/$_" } readdir($dh); closedir $dh; for my $f (sort @cfiles) { scan_file("$dir/$f"); } } sub scan_sources { scan_dir("$root/src"); scan_dir("$root/lib"); scan_dir("$root/lib/vtls"); scan_dir("$root/lib/vauth"); } sub scan_docs { open F, "<$root/docs/$DOCS"; my $line = 0; while(<F>) { $line++; if(/^## (CURL_DISABLE_[A-Z_]+)/g) { my ($sym)=($1); $docs{$sym} = $line; } } close F; } scan_configure(); scan_sources(); scan_docs(); my $error = 0; # Check the configure symbols for use in code for my $s (sort keys %disable) { if(!$file{$s}) { printf "Present in configure.ac, not used by code: %s\n", $s; $error++; } if(!$docs{$s}) { printf "Present in configure.ac, not documented in $DOCS: %s\n", $s; $error++; } } # Check the code symbols for use in configure for my $s (sort keys %file) { if(!$disable{$s}) { printf "Not set by configure: %s (%s)\n", $s, $file{$s}; $error++; } if(!$docs{$s}) { printf "Used in code, not documented in $DOCS: %s\n", $s; $error++; } } # Check the documented symbols for my $s (sort keys %docs) { if(!$disable{$s}) { printf "Documented but not in configure: %s\n", $s; $error++; } if(!$file{$s}) { printf "Documented, but not used by code: %s\n", $s; $error++; } } exit $error;
LiberatorUSA/GUCEF
dependencies/curl/tests/disable-scan.pl
Perl
apache-2.0
3,338
package DDG::Goodie::RandomName; # ABSTRACT: Return random first and last name use DDG::Goodie; use Data::RandomPerson; name 'RandomName'; description 'returns a random and fictive title, first- and lastname and day of birth'; category 'random'; topics 'words_and_games'; primary_example_queries 'random name'; secondary_example_queries 'random person'; code_url 'https://github.com/duckduckgo/zeroclickinfo-goodies/blob/master/lib/DDG/Goodie/RandomName.pm'; attribution github => ['stelim', 'Stefan Limbacher'], twitter => ['stefanlimbacher', 'Stefan Limbacher']; triggers start => 'random name','random person'; zci answer_type => "randomname"; zci is_cached => 0; handle query => sub { my $person = Data::RandomPerson->new()->create(); my $name = "$person->{firstname} $person->{lastname}"; my %genders = (m => 'Male', f => 'Female'); return "Name: $name\nGender: $genders{$person->{gender}}\nDate of birth: $person->{dob}\nAge: $person->{age}", heading => "Random Person" if /person/i; return "$name (random)"; }; 1;
Acidburn0zzz/zeroclickinfo-goodies
lib/DDG/Goodie/RandomName.pm
Perl
apache-2.0
1,075
package Seco::Data::Range::Simple; =head1 NAME Seco::Data::Range::Simple =head1 Not meant to be used directly. This super simple stub is for loading into other bootstrap software such as a ybiip profile where the environment is not fully set up (no lwp) usage: simple_range("rangehost.yahoo.com", 9999, '@ALL'); Copyright (c) 2011, Yahoo! Inc. All rights reserved. Copyrights licensed under the New BSD License. See the accompanying LICENSE file for terms. =cut sub simple_range { my ($rangehost, $rangeport, $rangequery, $timeout) = @_; $timeout ||= 15; my $s = IO::Socket::INET->new( PeerHost => $rangehost, PeerPort => $rangeport, Proto => "tcp", Timeout => $timeout, ); syswrite $s, "GET /range/list?$rangequery\n"; my @names = <$s>; chomp for @names; return @names; } 1; =head1 AUTHOR Evan Miller, E<lt>eam@yahoo-inc.comE<gt> =head1 COPYRIGHT AND LICENSE Copyright (C) 2006 Yahoo! Inc. =cut
ytoolshed/range
perl_seco_data_range/source/lib/Seco/Data/Range/Simple.pm
Perl
bsd-3-clause
1,116
/* ======================================================================== File Search Paths =========================================================================*/ file_search_path(semlib, 'src/prolog/lib'). file_search_path(boxer, 'src/prolog/boxer'). file_search_path(knowledge, 'src/prolog/boxer/knowledge'). file_search_path(lex, 'src/prolog/boxer/lex'). /* ======================================================================== VerbNet =========================================================================*/ :- dynamic verbnet/3. /* ======================================================================== Modules =========================================================================*/ :- use_module(library(lists),[member/2,reverse/2,append/3]). :- use_module(boxer(slashes)). :- use_module(knowledge(roles),[old2new/2]). /* ======================================================================== Main =========================================================================*/ verbnet2prolog(File):- load_xml_file(File,T), % pretty_print(T,0), elements(T,['VNCLASS'],f(X,C)), value(X,'ID',ID), members(C,File,ID,_). /* ---------------------------------------------------------------------- Pretty Printing XML ---------------------------------------------------------------------- */ pretty_print([],_). pretty_print([element(A,B,C)|L],Tab):- !, tab(Tab), write(A), write(' '), write(B), nl, NewTab is Tab+3, pretty_print(C,NewTab), pretty_print(L,Tab). pretty_print([E|L],Tab):- tab(Tab), write(unknown:E),nl, pretty_print(L,Tab). /* ---------------------------------------------------------------------- Processing all members of a VerbNet class ---------------------------------------------------------------------- */ members(X,File,XID,Names):- findall(Sub:YID,(elements(X,['SUBCLASSES','VNSUBCLASS'],f(Y,Sub)),value(Y,'ID',YID)),Subs), subclasses(Subs,File,Names1), findall(Frame,(elements(X,['FRAMES','FRAME'],f(_,Frame))),Frames), findall(Name,(elements(X,['MEMBERS','MEMBER'],f(Member,_)),value(Member,name,Name)),Names2), append(Names1,Names2,Names), frames(Frames,Names,XID,File). /* ---------------------------------------------------------------------- Processing all subclasses of a VerbNet class ---------------------------------------------------------------------- */ subclasses([],_,[]). subclasses([X:XID|L],File,Names):- members(X,File,XID,Names1), append(Names1,Names2,Names), subclasses(L,File,Names2). /* ---------------------------------------------------------------------- Process frames ---------------------------------------------------------------------- */ frames([],_,_,_):- !. frames([Frame|L],Names,ID,File):- elements(Frame,['DESCRIPTION'],f(De,_)), value(De,primary,Primary), example(Frame,Example), elements(Frame,['SYNTAX'],f(_,Syntax)), subcat(Syntax,[],SubCat), %write(syntax:Syntax),nl, %write(subcat:SubCat),nl, ccg(SubCat,C^C,CCG,Missing,Roles0), roles2roles(Roles0,Roles1), append(Wrong,[Role],Roles1), reverse(Wrong,Right), append(Right,[Role],Roles), atom_chars(ID,IDChars), formatID(IDChars,[_,_|FID]), reverse(SubCat,Normal), format('~n%%% File: ~p~n%%% Primary: ~p (~p)~n%%% Syntax: ~p~n',[File,Primary,ID,Normal]), write('%%% CCG: '), write(CCG), format('~n%%% Roles: ~p~n',[Roles]), ( Missing = [], !; format('%%% Missing: ~p~n',[Missing]) ), format('%%% Example: ~p~n%%%~n',[Example]), frameMembers(Names,CCG,FID,Roles), !, addPP(SubCat,FID), frames(L,Names,ID,File). frames([Frame|L],Names,ID,File):- format('% frameproblem: ~p~n',[Frame]), frames(L,Names,ID,File). /* ---------------------------------------------------------------------- Add PP/NP categories with role ---------------------------------------------------------------------- */ addPP([X,lex:as|L],FID):- !, addPP([X,prep:as|L],FID). addPP([np:Old,prep:Preps|_],FID):- !, old2new(Old,New), atomic_list_concat(L,' ',Preps), findall(_,(member(Prep,L),format('verbnet(~p, pp/np, [~q], ~p).~n',[Prep,New,FID]),add(pp/np,[New])),_). addPP([vp_ng:Old,prep:Preps|_],FID):- !, old2new(Old,New), atomic_list_concat(L,' ',Preps), findall(_,(member(Prep,L),format('verbnet(~p, pp/(s:ng\\np), [~q], ~p).~n',[Prep,New,FID]),add(pp/np,[New])),_). addPP([vp_to:Old,prep:Preps|_],FID):- !, old2new(Old,New), atomic_list_concat(L,' ',Preps), findall(_,(member(Prep,L),format('verbnet(~p, pp/(s:to\\np), [~q], ~p).~n',[Prep,New,FID]),add(pp/np,[New])),_). addPP([s:Old,prep:Preps|_],FID):- !, old2new(Old,New), atomic_list_concat(L,' ',Preps), findall(_,(member(Prep,L),format('verbnet(~p, pp/s:_, [~q], ~p).~n',[Prep,New,FID]),add(pp/np,[New])),_). addPP(_,_). /* ---------------------------------------------------------------------- Check if there is an example for a frame ---------------------------------------------------------------------- */ example(Frame,Example):- elements(Frame,['EXAMPLES','EXAMPLE'],f(_,[Example])), !. example(_,'error (no example)'). /* ---------------------------------------------------------------------- Process all members of a frame ---------------------------------------------------------------------- */ frameMembers([],_,_,_). frameMembers([Name1|L],CCG,FID,Roles):- reformatName(Name1,Name2), format('verbnet(~q, ',[Name2]), write(CCG), format(', ~q, ~q).~n',[Roles,FID]), add(CCG,Roles), frameMembers(L,CCG,FID,Roles). /* ---------------------------------------------------------------------- Reformat Verbnet names (underscores for spaces) ---------------------------------------------------------------------- */ reformatName(N1,N2):- atom_chars(N1,C1), reformatString(C1,C2), atom_chars(N2,C2). reformatString([],[]). reformatString([' '|L1],['_'|L2]):- !, reformatString(L1,L2). reformatString([C|L1],[C|L2]):- reformatString(L1,L2). /* ---------------------------------------------------------------------- Add entries to Prolog database ---------------------------------------------------------------------- */ add(CCG,Roles):- verbnet(CCG,Roles,Old), !, New is Old + 1, retract(verbnet(CCG,Roles,Old)), assert(verbnet(CCG,Roles,New)). add(CCG,Roles):- assert(verbnet(CCG,Roles,1)). /* ---------------------------------------------------------------------- Format VerbNet ID ---------------------------------------------------------------------- */ formatID(Chars,[Pre,Sep1|L]):- Seps = ['-','.'], member(Sep1,Seps), append(PreChars,[Sep1|RestChars],Chars), \+ ( member(Sep2,Seps), member(Sep2,PreChars) ), !, formatNumber(PreChars,Pre), formatID(RestChars,L). formatID(Chars,[ID]):- formatNumber(Chars,ID). formatNumber(Chars,Num):- Chars = [First|_], member(First,['0','1','2','3','4','5','6','7','8','9']), !, number_chars(Num,Chars). formatNumber(Chars,Atom):- atom_chars(Atom,Chars). /* ---------------------------------------------------------------------- Printing the subcat frame ---------------------------------------------------------------------- */ subcat([],Acc,Acc). subcat([E|L],Acc1,Acc3):- cat(E,Acc1,Acc2), subcat(L,Acc2,Acc3). /* ---------------------------------------------------------------------- Converting Verbnet Roles to LIRICS ---------------------------------------------------------------------- */ roles2roles([],[]). roles2roles([X|L1],[Y|L2]):- old2new(X,Y), roles2roles(L1,L2). /* ---------------------------------------------------------------------- Constructing CCG category ---------------------------------------------------------------------- */ % terminating % ccg([np:_,pp],X^C,C,[],[]):- !, X=pp. ccg([np:_,prep:_],X^C,C,[],[]):- !, X=pp. ccg([vp_ng:_,prep:_],X^C,C,[],[]):- !, X=pp. ccg([vp_to:_,prep:_],X^C,C,[],[]):- !, X=pp. ccg([np:_,lex:as],X^C,C,[],[]):- !, X=pp. ccg([np:R],np^C,C,[],[R]):- !. ccg([s:R],(s:'_')^C,C,[],[R]):- !. %ccg([(s:ng\np):R],(s:ng\np)^C,C,[],[R]):- !. ccg([pp:_],pp^C,C,[],[]):- !. % needed? ccg([X],X^C,C,[],[]):- !. % recursive % ccg([np:_,lex:as|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([np:_,prep:_|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([s:_,prep:_|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([vp_to:_,prep:_|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([vp_ng:_,prep:_|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([np:_,pp|L],X^Old,New,M,Roles):- !, ccg(L,X^(Old/pp),New,M,Roles). ccg([np:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/np),New,M,Oles). ccg([s_to:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/(s:to\np)),New,M,Oles). ccg([vp_ng:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/(s:ng\np)),New,M,Oles). ccg([vp_to:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/(s:ng\np)),New,M,Oles). ccg([vp_b:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/(s:b\np)),New,M,Oles). ccg([s:R|L],X^Old,New,M,[R|Oles]):- !, ccg(L,X^(Old/s:'_'),New,M,Oles). ccg([v|L],X^Old,New,M,Roles):- !, X=(s:'_'\Y), ccg(L,Y^Old,New,M,Roles). ccg([adv|L],Old,New,M,Roles):- !, ccg(L,Old,New,M,Roles). %ccg([lex:(\'s)|L],Old,New,M,Roles):- !, ccg(L,Old,New,M,Roles). %%% not always correct! ccg([U|L],Old,New,[U|M],Roles):- !, ccg(L,Old,New,M,Roles). /* ---------------------------------------------------------------------- Syntactic Restrictions ---------------------------------------------------------------------- */ restr(Restr,Type):- Restr = [element('SYNRESTRS',[],L)], member(element('SYNRESTR',['Value'='+',type=Type],[]),L), !. ing(acc_ing). ing(oc_ing). ing(ac_ing). ing(be_sc_ing). ing(np_omit_ing). inf(oc_to_inf). inf(ac_to_inf). inf(sc_to_inf). inf(vc_to_inf). inf(rs_to_inf). inf(to_inf_rs). bare(oc_bare_inf). s_restr(np_to_inf). s_restr(that_comp). s_restr(for_comp). s_restr(wh_comp). s_restr(quotation). % s_restr(np_ppart). % ??? %s_restr(np_p_ing). % ??? s_restr(np_ing). % ??? s_restr(how_extract). s_restr(what_extract). s_restr(wh_inf). s_restr(what_inf). s_restr(wheth_inf). /* ---------------------------------------------------------------------- Printing a category ---------------------------------------------------------------------- */ cat(element('NP', [value=Value], R),A,[vp_ng:Value|A]):- ing(Ing), restr(R,Ing), !. cat(element('NP', [value=Value], R),A,[vp_to:Value|A]):- inf(Inf), restr(R,Inf), !. cat(element('NP', [value=Value], R),A,[vp_b:Value|A]):- bare(B), restr(R,B), !. cat(element('NP', [value=Value], R),A,[s:Value|A]):- s_restr(S), restr(R,S), !. cat(element('NP', [value=Value], _),A,[np:Value|A]):- !. cat(element('PREP', [], _),A,[pp|A]):- !. cat(element('PREP', [value=Value], _),A,[prep:Value|A]):- !. cat(element('LEX', [value='[+be]'], _),A,[lex:be|A]):- !. cat(element('LEX', [value='it[+be]'], _),A,[lex:be,lex:it|A]):- !. cat(element('LEX', [value=at], _),A,[prep:at|A]):- !. cat(element('LEX', [value=of], _),A,[prep:of|A]):- !. cat(element('LEX', [value=Value], _),A,[lex:Value|A]):- !. cat(element('VERB',[],[]),A,[v|A]):- !. cat(element('ADJ',[],[]),A,[adj|A]):- !. cat(element('ADV',[],[]),A,[adv|A]):- !. cat(U,A,[unk:U|A]):- !. /* ---------------------------------------------------------------------- Processing elements of the XML tree ---------------------------------------------------------------------- */ elements([element(X,F,L)|_],[X],f(F,L)). elements([element(X,_,L)|_],[X|R],A):- elements(L,R,A). elements([_|L],X,A):- elements(L,X,A). /* ---------------------------------------------------------------------- Accessing a value ---------------------------------------------------------------------- */ value([Name=Value|_],Name,Value):- !. value([_|L],Name,Value):- value(L,Name,Value). /* ---------------------------------------------------------------------- VerbNet Directory ---------------------------------------------------------------------- */ verbnet_dir('ext/VerbNet/'). /* ---------------------------------------------------------------------- Processing all XML files ---------------------------------------------------------------------- */ process([]):- planB. process([File|L]):- verbnet2prolog(File), !, process(L). /* ---------------------------------------------------------------------- Plan B (verbs that are not in VerbNet) ---------------------------------------------------------------------- */ planB:- setof(X,A^B^verbnet(X,A,B),L), format('~n%%% Most frequent roles for a particular CCG category.~n%%%~n',[]), format('verbnet(_, ~p, [~q], []). % ~n',[s:adj\np,'Theme']), planB(L). planB([]). planB([CCG|L]):- verbnet(CCG,R,N), \+ (verbnet(CCG,_,M), M>N), write('verbnet(_, '), write(CCG), format(' , ~q, []). % n=~p~n',[R,N]), planB(L). /* ---------------------------------------------------------------------- Header ---------------------------------------------------------------------- */ header:- format('%%% automatically generated by src/prolog/lib/verbnet2boxer.pl~n%%%~n',[]), format(':- module(verbnet,[verbnet/3,verbnet/4]).~n',[]), format(':- use_module(boxer(slashes)).~n~n',[]), format('%%% wrapper~n%%%~nverbnet(A,B,C):- verbnet(A,B,C,_).~n'). /* ---------------------------------------------------------------------- Wildcard for XML files to be processed ---------------------------------------------------------------------- */ wildCard('*.xml'). %wildCard('addict-96.xml'). %wildCard('accompany-51.7.xml'). %wildCard('cooperate-73.xml'). %wildCard('manner_speaking-37.3.xml'). %wildCard('put-9.1.xml'). %wildCard('matter-91.xml'). %wildCard('run-51.3.2.xml'). %wildCard('adjust-26.9.xml'). %wildCard('amalgamate-22.2.xml'). %wildCard('instr_communication-37.4.xml'). /* ---------------------------------------------------------------------- Start Predicate ---------------------------------------------------------------------- */ run:- verbnet_dir(Dir), exists_directory(Dir), wildCard(WildCard), atom_concat(Dir,WildCard,Expand), expand_file_name(Expand,Files), header, process(Files), halt. :- run.
TeamSPoon/logicmoo_workspace
packs_sys/logicmoo_nlu/ext/candc/src/prolog/lib/verbnet2boxer.pl
Perl
mit
14,270
#!/usr/bin/perl # # Copyright (C) 1998, 1999 Ethan Fischer <allanon@crystaltokyo.com> # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. # require 5.002; use Socket; use strict; # AfterStep module packet format # ------------------------------ # # Packets are arrays of unsigned long, with a header of three elements. # header[0] == START_FLAG (== 0xffffffff) # header[1] == event type (as defined in include/module.h, and requested # with a SET_MASK module command) # header[2] == number of elements in the body of the packet # # The content of the body of the packet is variable, depending on the # event type. # get AfterStep socket name (via xprop) sub module_get_socket_name { #won't work for me. -Vae my $socket_name = "$ENV{'HOME'}/.afterstep/connect.DISPLAY=$ENV{'DISPLAY'}"; my $xprop_root; open(XPROP, "xprop -root |") || warn "unable to execute xprop: $!"; while (<XPROP>) { if (/^_NET_SUPPORTING_WM_CHECK\(WINDOW\)/) { $xprop_root = (split(/#/))[1]; last; } } close(XPROP); open (XPROP, "xprop -id $xprop_root |") || warn "unable to execute xprop: $!"; while (<XPROP>) { if (/^_AS_MODULE_SOCKET\(STRING\)/) { $socket_name = (split(/"/))[1]; last; } } close(XPROP); return $socket_name; } # connect to AfterStep via a UNIX-domain socket sub module_connect { my $socket_name = $_[0]; local *SOCKET; socket(SOCKET, PF_UNIX, SOCK_STREAM, 0) || warn "socket: $!"; connect(SOCKET, sockaddr_un($socket_name)) || warn "connect: $!"; # set unbuffered I/O select((select(SOCKET), $| = 1)[0]); return *SOCKET; } # send an AfterStep module command # $_[0] == socket to write command to # $_[1] == message to send sub module_send { my ($fh, $linelen) = ($_[0], length($_[2])); print $fh pack("LLa${linelen}L", $_[1], $linelen, $_[2], 1); } # read an AfterStep module packet # $_[0] == socket to read packet from # returns packet sub module_read { my ($line, @packet, $packetlen); for ($line = "" ; length($line) < 12 ; ) { my $subline; if (sysread($_[0], $subline, 12 - length($line)) > 0) { $line = join("", $line, $subline); } } @packet = unpack("L3", $line); $packetlen = $packet[2] - 3; for ($line = "" ; length($line) < 4 * $packetlen ; ) { my $subline; if (sysread($_[0], $subline, 4 * $packetlen - length($line)) > 0) { $line = join("", $line, $subline); } } splice(@packet, 3, 0, unpack("L$packetlen", $line)); return @packet; } # poll a socket for input until timeout expires # $_[0] == timeout # $_[1]... == socket(s) to check # returns 1 if input is ready, else 0 sub socket_poll_input { my ($timeout) = ($_[0]); my $rin = pack("C", 0); shift @_; for (@_) { vec($rin, fileno($_), 1) = 1; } return scalar select($rin, undef, undef, $timeout); } # an example of how to write a function that watches the module socket # for AfterStep events # $_[0] == module socket to communicate with # $_[1] == socket commands will be read from # $_[2] == socket AfterStep output will be echoed to # $_[3] == prompt for input (boolean) # this function never returns sub module_loop { my ($as_socket, $isock, $osock, $prompt) = ($_[0], $_[1], $_[2], $_[3]); select($osock); $| = 1; while (1) { print "> " if $prompt; socket_poll_input(undef, $as_socket, $isock); print "module_read\n" if $prompt && socket_poll_input(0, $as_socket); if (socket_poll_input(0, $isock)) { my $str; if (defined(sysread($isock, $str, 1000))) { chomp($str); module_send($as_socket, 0, $str) if length($str); } } while (socket_poll_input(0, $as_socket)) { my ($i, @packet); @packet = module_read($as_socket); printf("%08x %08x %08x ", $packet[0], $packet[1], $packet[2]); for ($i = 0 ; $i < $packet[2] ; $i++) { if (defined($packet[3+$i])) { printf("%08x ", $packet[3+$i]); } } print "\n"; } } } # local variables my $name = (reverse split /\//, $0)[0]; my $version = "1.2"; my ($file, $interactive, $window_id); my $module_socket; sub version { print "ascommand.pl version $version\n"; } sub usage { print "Usage:\n"; print "$name [-f file] [-h] [-i] [-v] [-w id] [--] [command]\n"; print " -f --file input commands from file (- means stdin)\n"; print " -h --help this help\n"; print " -i --interactive starts interactive communication with AfterStep\n"; print " -v --version print version information\n"; print " -w --window-id window id to send to AfterStep (in hex)\n"; print " -- end parsing of command line options\n"; print " command command to send to AfterStep\n"; print "If -f - or -i is specified, $name will read commands from standard input,\n"; print "and print results on standard output. -i is noisier than -f -.\n"; } # check dependencies if (!defined($ENV{'DISPLAY'})) { print "$name: DISPLAY environment variable must be set (and valid)\n"; exit 1; } # get options $window_id = 0; while (defined $ARGV[0]) { my $arg = shift; if (($arg eq "-f" || $arg eq "--file") && scalar(@ARGV) > 0) { $file = shift; } elsif ($arg eq "-h" || $arg eq "--help") { version(); usage(); exit 0; } elsif ($arg eq "-i" || $arg eq "--interactive") { $interactive = 1; } elsif ($arg eq "-v" || $arg eq "--version") { version(); exit 0; } elsif (($arg eq "-w" || $arg eq "--window-id") && scalar(@ARGV) > 0) { $window_id = hex shift; } elsif ($arg eq "--") { last; } elsif ($arg =~ "-.+") { print "$name: unknown option '$arg'\n"; exit 1; } else { unshift(@ARGV, $arg); last; } } # need a command if interactive wasn't specified if (!defined($interactive) && !defined($file) && !defined($ARGV[0])) { print "$name: a file or command is required in non-interactive mode\n"; exit 1; } # connect to AfterStep $module_socket = module_connect(module_get_socket_name()); # report our name module_send($module_socket, 0, "SET_NAME $name"); # send a single user-requested command if (defined($ARGV[0])) { module_send($module_socket, $window_id, $ARGV[0]); } # send a list of commands if (defined($file) && $file ne "-") { open(FILE, $file); while (<FILE>) { module_send($module_socket, $window_id, $_); } close(FILE); } # be a true module, and open an interactive channel to AS if (defined($file) && $file eq "-") { module_loop($module_socket, *STDIN, *STDOUT, 0); } # be really noisily interactive (assume there's a user on the other end) if (defined($interactive)) { module_loop($module_socket, *STDIN, *STDOUT, 1); } exit 0;
born2late/afterstep-devel
tools/ascommand.pl
Perl
mit
7,357
package MGRAST::WebPage::KeggMapper; use base qw( WebPage ); use strict; use warnings; use Data::Dumper; use Conf; use MGRAST::Analysis; 1; =pod =head1 NAME KeggMapper - a KEGG mapping page =head1 DESCRIPTION page to display the KEGG global pathway and map lists / search =head1 METHODS =over 4 =item * B<init> () Called when the web page is instanciated. =cut sub init { my ($self) = @_; $self->application->register_action($self, 'export_kegg_abundance', 'export_kegg_abundance'); $self->title('KeggMapper'); $self->application->register_component('ListSelect', 'ls'); $self->application->register_component('Ajax', 'ajax'); $self->application->register_component('KEGGMap', 'kmap'); my $mgdb = MGRAST::Analysis->new( $self->app->data_handle('MGRAST')->db_handle ); unless ($mgdb) { $self->app->add_message('warning', "Unable to retrieve the metagenome analysis database."); return 1; } my $id = $self->application->cgi->param('metagenome') || ''; if ($id) { $mgdb->set_jobs([$id]); } $self->{mgdb} = $mgdb; $self->data('default_eval', '5'); $self->data('default_ident', '60'); $self->data('default_alen', '15'); return 1; } =pod =item * B<output> () Returns the html output of the page. =cut sub output { my ($self) = @_; my $application = $self->application; my $cgi = $application->cgi; my $html = ""; open(FH, $Conf::mgrast_data . "/kegg/keggdata.poly") or die "oh noes! $@ $!"; my $polys = <FH>; chomp $polys; close FH; my $names = []; open(FH, $Conf::mgrast_data . "/kegg/keggdata.names") or die "oh noes! $@ $!"; while (<FH>) { chomp; push(@$names, $_); } close FH; my $nstring = join("~~", @$names); $nstring =~ s/'//g; $html .= $self->application->component('ajax')->output(); $html .= "<input type='hidden' id='polys' value='".$polys."'>"; $html .= "<input type='hidden' id='names' value='".$nstring."'>"; $html .= "<div id='kdatabuf'></div>"; $html .= "<table><tr><td style='padding-right: 30px;'>".$self->highlight_select()."</td>"; $html .= "<td style='border: 1px solid black; width: 250px; padding: 5px;'><h2>Data A</h2><div style='width: 50px; height: 20px; float: right; background-color: #00F; position: relative; top: -35px;'></div>"; $html .= "<div id='buf_a_text' style='height: 100px;'></div>"; $html .= "<input type='button' value='clear' onclick='clear_buffer(\"a\");'>"; $html .= "</td>"; $html .= "<td style='border: 1px solid black; width: 250px; padding: 5px;'><h2>Data B</h2><div style='width: 50px; height: 20px; float: right; background-color: #F00; position: relative; top: -35px;'></div>"; $html .= "<div id='buf_b_text' style='height: 100px;'></div>"; $html .= "<input type='button' value='clear' onclick='clear_buffer(\"b\");'>"; $html .= "</td></tr></table>"; $html .= "Show unique data from <select id='result_type'><option value='abc'>Data A, Data B and overlaps (purple)</option><option value='ac'>Data A and overlaps (purple)</option><option value='a'>Data A</option><option value='ab'>Data A and Data B</option><option value='bc'>Data B and overlaps (purple)</option><option value='b'>Data B</option><option value='c'>overlaps (purple)</option></select>"; $html .= "<input type='button' value='highlight loaded data' onclick='compare();'>"; $html .= "&nbsp;&nbsp;&nbsp;image size <input type='text' id='scalefactor' value='25' size=3>%&nbsp;&nbsp;"; $html .= "<input type='button' value='scale image' onclick='scale_image();'>"; $html .= "<input type='button' value='export kegg abundance' onclick='export_kegg_abundance();' />\n"; $html .= "<img src='./Html/map01100.png' id='m' style='height: 563px; width: 924px;' border='0' />"; $html .= "<div id='raph'></div>"; $html .= "<img src='./Html/clear.gif' onload='initialize_kegg();'>"; $html .= "<form id='kmap_form'><input type='hidden' name='mapnum' id='mapnum'><input type='hidden' name='kids' id='kids'><input type='hidden' name='abu' id='abu'><input type='hidden' name='which' id='which'></form>"; $html .= "<a href='#top' id='bottom'>top</a><div id='submap'></div>"; return $html; } sub export_kegg_abundance { my ($self) = @_; my $application = $self->application; my $cgi = $application->cgi; my $format = $cgi->param('format'); my @kids = split(/~/, $cgi->param('kids')); my @abu = split(/~/, $cgi->param('abu')); my @which = split(/~/, $cgi->param('which')); my %master_hash = (); for(my $i=0; $i<@kids; ++$i) { $master_hash{$which[$i]}{$kids[$i]} = $abu[$i]; } if($format eq 'html') { my $content = "<table><tr><td style='vertical-align:top;width:300px'>\n"; $content .= "<h2>Data A</h2><table border=1><tr><td>EC number</td><td>Abundance</td></tr>"; my $dataset = 'a'; foreach my $kid (sort {$master_hash{$dataset}{$b} <=> $master_hash{$dataset}{$a}} keys %{$master_hash{$dataset}}) { $content .= "<tr><td><a href=\"http://www.genome.jp/dbget-bin/www_bget?ec:$kid\" target=\"_blank\">$kid</a></td>". "<td>$master_hash{$dataset}{$kid}</td></tr>"; } $content .= "</table></td><td style='vertical-align:top;width:300px'>"; $content .= "<h2>Data B</h2><table border=1><tr><td>EC number</td><td>Abundance</td></tr>"; $dataset = 'b'; foreach my $kid (sort {$master_hash{$dataset}{$b} <=> $master_hash{$dataset}{$a}} keys %{$master_hash{$dataset}}) { $content .= "<tr><td><a href=\"http://www.genome.jp/dbget-bin/www_bget?ec:$kid\" target=\"_blank\">$kid</a></td>". "<td>$master_hash{$dataset}{$kid}</td></tr>"; } $content .= "</table></td></tr></table>"; print "Content-Type: text/html\n\n"; print $content; exit; } elsif($format eq 'text') { my $content = "Dataset\tEC number\tAbundance\n"; foreach my $dataset (keys %master_hash) { foreach my $kid (sort {$master_hash{$dataset}{$b} <=> $master_hash{$dataset}{$a}} keys %{$master_hash{$dataset}}) { $content .= uc($dataset)."\t$kid\t$master_hash{$dataset}{$kid}\n"; } } print "Content-Type:application/x-download\n"; print "Content-Length: " . length($content) . "\n"; print "Content-Disposition:attachment;filename=filename\n\n"; print $content; exit; } } sub require_javascript { return ["$Conf::cgi_url/Html/Kegg.js", "$Conf::cgi_url/Html/raphael-min.js", "$Conf::cgi_url/Html/canvg.js"]; } sub highlight_select { my ($self) = @_; my $cgi = $self->application->cgi; my $metagenome = ''; my $mg = ''; if ($cgi->param('metagenome')) { $metagenome = $cgi->param('metagenome'); $mg = $metagenome || ''; my $mgname = ''; if ($metagenome) { my $job = $self->app->data_handle('MGRAST')->Job->init({ metagenome_id => $metagenome }); if (ref($job)) { $mgname = $job->name()." ($metagenome)"; } } $metagenome = "<a target=_blank href='metagenomics.cgi?page=MetagenomeOverview&metagenome=$metagenome' title='$mgname'>$metagenome</a>"; } if ($cgi->param('comparison_metagenomes')) { $metagenome = ''; my @all = $cgi->param('comparison_metagenomes'); foreach my $mg (@all) { my $mgname = ''; if ($metagenome) { my $job = $self->app->data_handle('MGRAST')->Job->init({ metagenome_id => $mg }); if (ref($job)) { $mgname = $job->name()." ($mg)"; } } $metagenome .= "<a target=_blank href='metagenomics.cgi?page=MetagenomeOverview&metagenome=$mg' title='$mgname'>$mg</a>, "; } $metagenome = substr($metagenome, 0, length($metagenome) - 2); } my $mg_sel = $self->metagenome_select(); my $select = "<h2>Data Selection</h2><form name='meta_form' id='meta_form' onkeypress='return event.keyCode!=13'><input type='hidden' name='metagenome' value='".$mg."'><table id='non_wb_sel'><tr><td style='font-weight: bold; width: 200px;'>Target Buffer</td><td><select id='tbuff' name='tbuff'><option value='buffer_space_a'>Data A</option><option value='buffer_space_b'>Data B</option></select></td></tr><tr><td style='font-weight: bold; width: 200px;'>Metagenomes</td><td id='mg_sel_td'>".$metagenome."</td><td>".$self->more_button('document.getElementById("sel_mg").style.display="";', 'ok_button("'.$mg_sel->id.'");')."</td></tr><tr><td colspan=3 style='display: none;' id='sel_mg'><table><tr><td>".$mg_sel->output()."</td><td><input type='button' value='ok' onclick='ok_button(\"".$mg_sel->id."\");'></td></tr></table></td></tr>"; $select .= "<tr><td style='font-weight: bold;' title='Choose maximum probability that there is a sequence with a higher similarity to your target sequence than the one provided.'>Max. e-Value Cutoff</td><td>1e-".$self->data('default_eval')."</td><td>".$self->more_button('document.getElementById("meta_sel_eval").style.display="";')."</td><td style='display: none;' id='meta_sel_eval'>".$self->evalue_select()."</td></tr>"; $select .= "<tr><td style='font-weight: bold;' title='Define the minimum percent identity between your selected metagenomes and existing sBLAT sequences.'>Min. % Identity Cutoff</td><td>".$self->data('default_ident')." %</td><td>".$self->more_button('document.getElementById("meta_sel_ident").style.display="";')."</td><td style='display: none;' id='meta_sel_ident'>".$self->identity_select()."</td></tr>"; $select .= "<tr><td style='font-weight: bold;' title='Minimum length of matching sequences considered sufficient to be \"aligned\", measured in aa for protein and bp for RNA databases.'>Min. Alignment Length Cutoff</td><td>".$self->data('default_alen')."</td><td>".$self->more_button('document.getElementById("phylo_sel_alen").style.display="";')."</td><td style='display: none;' id='phylo_sel_alen'>".$self->alength_select()."</td></tr></table>"; $select .= "<input type='button' value='load data' onclick='if(document.getElementById(\"list_select_list_b_".$self->application->component('ls')->id."\").options.length){list_select_select_all(\"".$self->application->component('ls')->id."\");execute_ajax(\"get_kegg_data\",\"kdatabuf\",\"meta_form\",\"loading...\", null, tobuff);}else{alert(\"You did not select any metagenomes\");};'><input type='hidden' name='source' value='KO'></form>"; return $select; } sub get_kegg_data { my ($self) = @_; my $result = []; my $cgi = $self->application->cgi; my $source = $cgi->param('source'); my @metas = $cgi->param('comparison_metagenomes'); my $evalue = $cgi->param('evalue'); my $identity = $cgi->param('identity'); my $alength = $cgi->param('alength'); $self->{mgdb}->set_jobs(\@metas); $result = $self->{mgdb}->get_ontology_for_source($source, $evalue, $identity, $alength); my $id_map = $self->{mgdb}->get_hierarchy('ontology', $source); my $funcs = {}; foreach my $row (@$result) { if ( exists $id_map->{$row->[1]} ) { my @levels; foreach (@{$id_map->{$row->[1]}}) { next unless $_; $_ =~ s/_/ /g; push @levels, $_; } my $depth = scalar @levels; my $lvl1 = shift @levels; my $lvl2 = shift @levels; if ((! $lvl2) || ($lvl2 eq 'Unknown')) { $lvl2 = $lvl1; } my $new = [ $row->[0], $lvl1, $lvl2 ]; if ($depth > 3) { my $lvl3 = shift @levels; if ((! $lvl3) || ($lvl3 eq 'Unknown')) { $lvl3 = $lvl2; } push @$new, $lvl3; } else { push @$new, "-"; } push @$new, @$row[2..9]; my ($ec) = $new->[4] =~ /EC\:(.*)/; if ($ec) { $ec =~ s/\]//; unless (exists($funcs->{$ec})) { $funcs->{$ec} = 0; } $funcs->{$ec} += $new->[5]; } } } my $retval = join("~", map { $_.";".$funcs->{$_} } keys(%$funcs)); my $html = "<input type='hidden' id='keggdata' value='$retval'>"; $html .= "<input type='hidden' id='whichbuf' value='".$cgi->param('tbuff')."'>"; $html .= "<input type='hidden' id='mgids' value='".join(", ", @metas)."'>"; $html .= "<input type='hidden' id='evalue' value='$evalue'>"; $html .= "<input type='hidden' id='identity' value='$identity'>"; $html .= "<input type='hidden' id='alength' value='$alength'>"; return $html; } sub more_button { my ($self, $onclicka) = @_; my $button = "<a style='border: 1px solid #8FBC3F; padding-left: 3px; padding-right: 3px; font-size: 8px; padding-bottom: 1px; position: relative; top: 1px; color: #8FBC3F; cursor: pointer;' onclick='$onclicka;'>+</a>"; return $button; } sub metagenome_select { my ($self) = @_; my $application = $self->application; my $cgi = $application->cgi; my $metagenome = $cgi->param('metagenome') || ''; my $list_select = $application->component('ls'); my ($data, $groups) = $self->selectable_metagenomes(); my @preselected = ( $metagenome ); if ($cgi->param('comparison_metagenomes')) { @preselected = $cgi->param('comparison_metagenomes'); } $list_select->data($data); $list_select->preselection(\@preselected); $list_select->show_reset(1); $list_select->multiple(1); $list_select->filter(1); $list_select->group_names($groups); $list_select->{max_width_list} = 250; $list_select->left_header('available metagenomes'); $list_select->right_header('selected metagenomes'); $list_select->name('comparison_metagenomes'); return $list_select; } sub selectable_metagenomes { my ($self, $no_coll) = @_; my $metagenomes = []; my $metagenome = $self->application->cgi->param('metagenome') || ''; my $avail = $self->{mgdb}->get_all_job_ids(); my $avail_hash = {}; %$avail_hash = map { $_ => 1 } @$avail; my $all_mgs = []; # check for available metagenomes my $rast = $self->application->data_handle('MGRAST'); my $org_seen = {}; my $metagenomespub = []; my $colls = []; if (ref($rast)) { my $public_metagenomes = $rast->Job->get_objects({public => 1, viewable => 1}); foreach my $pmg (@$public_metagenomes) { next if ($org_seen->{$pmg->{metagenome_id}}); $org_seen->{$pmg->{metagenome_id}} = 1; next unless ($avail_hash->{$pmg->{job_id}}); push(@$metagenomespub, { label => $pmg->{name}." (".$pmg->{metagenome_id}.")", value => $pmg->{metagenome_id} }); } if ($self->application->session->user) { my @mga = $rast->Job->get_jobs_for_user_fast($self->application->session->user, 'view', 1); my $mgs = \@mga; # check for collections my $coll_prefs = $self->application->dbmaster->Preferences->get_objects( { application => $self->application->backend, user => $self->application->session->user, name => 'mgrast_collection' } ); if (scalar(@$coll_prefs) && (! $no_coll)) { my $collections = {}; foreach my $collection_pref (@$coll_prefs) { my ($name, $val) = split(/\|/, $collection_pref->{value}); if (! exists($collections->{$name})) { $collections->{$name} = []; } my $pj; foreach my $pmg (@$public_metagenomes) { if ($pmg->{job_id} == $val) { $pj = $pmg; last; } } unless ($pj) { foreach my $mg (@$mgs) { if (ref($mg) && ref($mg) eq 'HASH') { if ($mg->{job_id} == $val) { $pj = $mg; last; } } } } if ($pj) { push(@{$collections->{$name}}, [ $pj->{metagenome_id}, $pj->{name} ]); } } foreach my $coll ( sort keys %$collections ) { if ( @{$collections->{$coll}} == 0 ) { next; } push(@$colls, { label => $coll." [".scalar(@{$collections->{$coll}})."]", value => join('||', map { $_->[0]."##".$_->[1] } @{$collections->{$coll}}) }); } } # build hash from all accessible metagenomes foreach my $mg_job (@$mgs) { next if ($org_seen->{$mg_job->{metagenome_id}}); $org_seen->{$mg_job->{metagenome_id}} = 1; next unless ($avail_hash->{$mg_job->{job_id}}); push(@$metagenomes, { label => ($mg_job->{name} || "")." (".$mg_job->{metagenome_id}.")", value => $mg_job->{metagenome_id}}); } } } my $groups = []; if (scalar(@$metagenomes)) { push(@$all_mgs, $metagenomes); push(@$groups, 'private'); } if (scalar(@$colls)) { push(@$all_mgs, $colls); push(@$groups, 'collections'); } if (scalar(@$metagenomespub)) { push(@$all_mgs, $metagenomespub); push(@$groups, 'public'); } return ( $all_mgs, $groups ); } sub get_evals { return [ 0.001, 1e-5, 1e-10, 1e-20, 1e-30 ]; } sub get_eval_index { my ($self, $eval) = @_; my $last = scalar( @{$self->get_evals} ) - 1; my @idxs = grep { $self->get_evals->[$_] == $eval } 0..$last; return @idxs ? $idxs[0] : undef; } sub get_idents { return [ 0, 60, 80, 90, 97 ]; } sub get_ident_index { my ($self, $ident) = @_; my $last = scalar( @{$self->get_idents} ) - 1; my @idxs = grep { $self->get_idents->[$_] == $ident } 0..$last; return @idxs ? $idxs[0] : undef; } sub get_alens { return [ 0, 50, 100, 250, 1000 ]; } sub get_alen_index { my ($self, $alen) = @_; my $last = scalar( @{$self->get_alens} ) - 1; my @idxs = grep { $self->get_alens->[$_] == $alen } 0..$last; return @idxs ? $idxs[0] : undef; } sub get_log { my ($self, $log, $num) = @_; if ($log < 2) { return $num; } if (($num == 0) || ($num == 1) || ($num == -1)) { return $num; } else { if ($num < 0) { $num =~ s/^-//; } return int($log * (log($num) / log($log))); } } sub evalue_select { my ($self) = @_; my $eval = $self->application->cgi->param('evalue') || $self->data('default_eval'); my $html = qq(1e-&nbsp;<input type='text' name='evalue' value='$eval' size='5' /><span>&nbsp;</span><input type='button' onclick=' var expNum = parseInt(this.previousSibling.previousSibling.value); if (isNaN(expNum) || (expNum < 0) || (expNum > 999)) { this.parentNode.previousSibling.previousSibling.innerHTML = "Please enter integer from 0 to 999"; } else { this.parentNode.previousSibling.previousSibling.innerHTML = "1e-" + expNum; this.parentNode.style.display="none"; }' value='ok' />); return $html; } sub identity_select { my ($self) = @_; my $ident = $self->application->cgi->param('identity') || $self->data('default_ident'); my $html = qq(<input type='text' name='identity' value='$ident' size='5' /><span>&nbsp;&#37;&nbsp;</span><input type='button' onclick=' var identNum = parseInt(this.previousSibling.previousSibling.value); if (isNaN(identNum) || (identNum < 0) || (identNum > 100)) { this.parentNode.previousSibling.previousSibling.innerHTML = "Please enter integer from 0 to 100"; } else { this.parentNode.previousSibling.previousSibling.innerHTML = identNum + " %"; this.parentNode.style.display="none"; }' value='ok' />); return $html; } sub alength_select { my ($self) = @_; my $alen = $self->application->cgi->param('alength') || $self->data('default_alen'); my $html = qq(<input type='text' name='alength' value='$alen' size='5' /><span>&nbsp;</span><input type='button' onclick=' var alenNum = parseInt(this.previousSibling.previousSibling.value); if (isNaN(alenNum) || (alenNum < 1)) { this.parentNode.previousSibling.previousSibling.innerHTML = "Please enter integer greater than 0"; } else { this.parentNode.previousSibling.previousSibling.innerHTML = alenNum; this.parentNode.style.display="none"; }' value='ok' />); return $html; } sub kegg_map { my ($self) = @_; my $application = $self->application; my $cgi = $application->cgi; # get the data from the cgi my @ids = split /~/, $cgi->param('kids'); my @abundances = split /~/, $cgi->param('abu'); my @which = split /~/, $cgi->param('which'); # hash out the data my $data = {}; for (my $i=0; $i<scalar(@ids); $i++) { if (exists($data->{$ids[$i]})) { if (exists($data->{$ids[$i]}->{$which[$i]})) { $data->{$ids[$i]}->{$which[$i]} += $abundances[$i]; } else { $data->{$ids[$i]}->{$which[$i]} = $abundances[$i]; } } else { $data->{$ids[$i]} = { $which[$i] => $abundances[$i] }; } } my $highlights = []; foreach my $key (keys(%$data)) { my $color; my $tooltip; if (scalar(keys(%{$data->{$key}})) > 1) { $tooltip = $data->{$key}->{'a'}." hits blue, ".$data->{$key}->{'b'}." hits red"; $color = [ [ 0, 0, 255 ], [ 255, 0, 0 ] ]; } elsif ($data->{$key}->{'b'}) { $tooltip = $data->{$key}->{'b'}." hits"; $color = [ 255, 0, 0 ]; } else { $tooltip = $data->{$key}->{'a'}." hits"; $color = [ 0, 0, 255 ]; } push(@$highlights, { id => $key, tooltip => $tooltip, color => $color, link => "http://www.genome.jp/dbget-bin/www_bget?".$key, target => "_blank" }); } my $kegg_component = $application->component('kmap'); $kegg_component->map_id($cgi->param('mapnum')); $kegg_component->highlights($highlights); return $kegg_component->output()."<img src='./Html/clear.gif' onload='location.href=\"#bottom\";document.getElementById(\"submap\").scrollIntoView(true);'>"; }
teharrison/MG-RAST
src/MGRAST/lib/WebPage/KeggMapper.pm
Perl
bsd-2-clause
20,760
=head1 NAME XML::LibXML::PI - XML::LibXML Processing Instructions =head1 SYNOPSIS use XML::LibXML; # Only methods specific to Processing Instruction nodes are listed here, # see XML::LibXML::Node manpage for other methods $pinode->setData( $data_string ); $pinode->setData( name=>string_value [...] ); =head1 DESCRIPTION Processing instructions are implemented with XML::LibXML with read and write access. The PI data is the PI without the PI target (as specified in XML 1.0 [17]) as a string. This string can be accessed with getData as implemented in L<<<<<< XML::LibXML::Node >>>>>>. The write access is aware about the fact, that many processing instructions have attribute like data. Therefore setData() provides besides the DOM spec conform Interface to pass a set of named parameter. So the code segment my $pi = $dom->createProcessingInstruction("abc"); $pi->setData(foo=>'bar', foobar=>'foobar'); $dom->appendChild( $pi ); will result the following PI in the DOM: <?abc foo="bar" foobar="foobar"?> Which is how it is specified in the DOM specification. This three step interface creates temporary a node in perl space. This can be avoided while using the insertProcessingInstruction() method. Instead of the three calls described above, the call $dom->insertProcessingInstruction("abc",'foo="bar" foobar="foobar"'); will have the same result as above. L<<<<<< XML::LibXML::PI >>>>>>'s implementation of setData() documented below differs a bit from the the standard version as available in L<<<<<< XML::LibXML::Node >>>>>>: =over 4 =item setData $pinode->setData( $data_string ); $pinode->setData( name=>string_value [...] ); This method allows to change the content data of a PI. Additionally to the interface specified for DOM Level2, the method provides a named parameter interface to set the data. This parameter list is converted into a string before it is appended to the PI. =back =head1 AUTHORS Matt Sergeant, Christian Glahn, Petr Pajas =head1 VERSION 2.0014 =head1 COPYRIGHT 2001-2007, AxKit.com Ltd. 2002-2006, Christian Glahn. 2006-2009, Petr Pajas. =cut
liuyangning/WX_web
xampp/perl/vendor/lib/XML/LibXML/PI.pod
Perl
mit
2,139
=pod =head1 NAME SSL_SESSION_get0_ticket, SSL_SESSION_has_ticket, SSL_SESSION_get_ticket_lifetime_hint, - get details about the ticket associated with a session =head1 SYNOPSIS #include <openssl/ssl.h> int SSL_SESSION_has_ticket(const SSL_SESSION *s); unsigned long SSL_SESSION_get_ticket_lifetime_hint(const SSL_SESSION *s); void SSL_SESSION_get0_ticket(const SSL_SESSION *s, const unsigned char **tick, size_t *len); =head1 DESCRIPTION SSL_SESSION_has_ticket() returns 1 if there is a Session Ticket associated with this session, and 0 otherwise. SSL_SESSION_get_ticket_lifetime_hint returns the lifetime hint in seconds associated with the session ticket. SSL_SESSION_get0_ticket obtains a pointer to the ticket associated with a session. The length of the ticket is written to B<*len>. If B<tick> is non NULL then a pointer to the ticket is written to B<*tick>. The pointer is only valid while the connection is in use. The session (and hence the ticket pointer) may also become invalid as a result of a call to SSL_CTX_flush_sessions(). =head1 SEE ALSO L<ssl(3)>, L<d2i_SSL_SESSION(3)>, L<SSL_SESSION_get_time(3)>, L<SSL_SESSION_free(3)> =head1 HISTORY SSL_SESSION_has_ticket, SSL_SESSION_get_ticket_lifetime_hint and SSL_SESSION_get0_ticket were added in OpenSSL 1.1.0. =head1 COPYRIGHT Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved. Licensed under the OpenSSL license (the "License"). You may not use this file except in compliance with the License. You can obtain a copy in the file LICENSE in the source distribution or at L<https://www.openssl.org/source/license.html>. =cut
openweave/openweave-core
third_party/openssl/openssl/doc/ssl/SSL_SESSION_has_ticket.pod
Perl
apache-2.0
1,661
package PPI::Token::Number::Binary; =pod =head1 NAME PPI::Token::Number::Binary - Token class for a binary number =head1 SYNOPSIS $n = 0b1110011; # binary integer =head1 INHERITANCE PPI::Token::Number::Binary isa PPI::Token::Number isa PPI::Token isa PPI::Element =head1 DESCRIPTION The C<PPI::Token::Number::Binary> class is used for tokens that represent base-2 numbers. =head1 METHODS =cut use strict; use PPI::Token::Number (); use vars qw{$VERSION @ISA}; BEGIN { $VERSION = '1.215'; @ISA = 'PPI::Token::Number'; } =pod =head2 base Returns the base for the number: 2. =cut sub base { return 2; } =pod =head2 literal Return the numeric value of this token. =cut sub literal { my $self = shift; return if $self->{_error}; my $str = $self->_literal; my $neg = $str =~ s/^\-//; $str =~ s/^0b//; my $val = 0; for my $bit ( $str =~ m/(.)/g ) { $val = $val * 2 + $bit; } return $neg ? -$val : $val; } ##################################################################### # Tokenizer Methods sub __TOKENIZER__on_char { my $class = shift; my $t = shift; my $char = substr( $t->{line}, $t->{line_cursor}, 1 ); # Allow underscores straight through return 1 if $char eq '_'; if ( $char =~ /[\w\d]/ ) { unless ( $char eq '1' or $char eq '0' ) { # Add a warning if it contains non-hex chars $t->{token}->{_error} = "Illegal character in binary number '$char'"; } return 1; } # Doesn't fit a special case, or is after the end of the token # End of token. $t->_finalize_token->__TOKENIZER__on_char( $t ); } 1; =pod =head1 SUPPORT See the L<support section|PPI/SUPPORT> in the main module. =head1 AUTHOR Chris Dolan E<lt>cdolan@cpan.orgE<gt> =head1 COPYRIGHT Copyright 2006 Chris Dolan. This program is free software; you can redistribute it and/or modify it under the same terms as Perl itself. The full text of the license can be found in the LICENSE file included with this module. =cut
Dokaponteam/ITF_Project
xampp/perl/vendor/lib/PPI/Token/Number/Binary.pm
Perl
mit
1,988
#!/usr/bin/perl #------------------------------------------------------------------------- # # Genbki.pm -- # perl script which generates .bki files from specially formatted .h # files. These .bki files are used to initialize the postgres template # database. # # Portions Copyright (c) 1996-2009, PostgreSQL Global Development Group # Portions Copyright (c) 1994, Regents of the University of California # # # IDENTIFICATION # $PostgreSQL: pgsql/src/tools/msvc/Genbki.pm,v 1.6 2009/01/01 17:24:05 momjian Exp $ # #------------------------------------------------------------------------- package Genbki; use strict; use warnings; use Exporter; our (@ISA, @EXPORT_OK); @ISA = qw(Exporter); @EXPORT_OK = qw(genbki); sub genbki { my $version = shift; my $prefix = shift; $version =~ /^(\d+\.\d+)/ || die "Bad format verison $version\n"; my $majorversion = $1; my $pgext = read_file("src/include/pg_config_manual.h"); $pgext =~ /^#define\s+NAMEDATALEN\s+(\d+)$/mg || die "Could not read NAMEDATALEN from pg_config_manual.h\n"; my $namedatalen = $1; my $pgauthid = read_file("src/include/catalog/pg_authid.h"); $pgauthid =~ /^#define\s+BOOTSTRAP_SUPERUSERID\s+(\d+)$/mg || die "Could not read BOOTSTRAUP_SUPERUSERID from pg_authid.h\n"; my $bootstrapsuperuserid = $1; my $pgnamespace = read_file("src/include/catalog/pg_namespace.h"); $pgnamespace =~ /^#define\s+PG_CATALOG_NAMESPACE\s+(\d+)$/mg || die "Could not read PG_CATALOG_NAMESPACE from pg_namespace.h\n"; my $pgcatalognamespace = $1; my $indata = ""; while (@_) { my $f = shift; next unless $f; $indata .= read_file($f); $indata .= "\n"; } # Strip C comments, from perl FAQ 4.27 $indata =~ s{/\*.*?\*/}{}gs; $indata =~ s{;\s*$}{}gm; $indata =~ s{^\s+}{}gm; $indata =~ s{^Oid}{oid}gm; $indata =~ s{\(Oid}{(oid}gm; $indata =~ s{^NameData}{name}gm; $indata =~ s{\(NameData}{(name}g; $indata =~ s{^TransactionId}{xid}gm; $indata =~ s{\(TransactionId}{(xid}g; $indata =~ s{PGUID}{$bootstrapsuperuserid}g; $indata =~ s{NAMEDATALEN}{$namedatalen}g; $indata =~ s{PGNSP}{$pgcatalognamespace}g; my $bki = ""; my $desc = ""; my $shdesc = ""; my $oid = 0; my $catalog = 0; my $reln_open = 0; my $bootstrap = ""; my $shared_relation = ""; my $without_oids = ""; my $nc = 0; my $inside = 0; my @attr; my @types; foreach my $line (split /\n/, $indata) { if ($line =~ /^DATA\((.*)\)\s*$/m) { my $data = $1; my @fields = split /\s+/,$data; if ($#fields >=4 && $fields[0] eq "insert" && $fields[1] eq "OID" && $fields[2] eq "=") { $oid = $fields[3]; } else { $oid = 0; } $data =~ s/\s{2,}/ /g; $bki .= $data . "\n"; } elsif ($line =~ /^DESCR\("(.*)"\)\s*$/m) { if ($oid != 0) { $desc .= sprintf("%d\t%s\t0\t%s\n", $oid, $catalog, $1); } } elsif ($line =~ /^SHDESCR\("(.*)"\)\s*$/m) { if ($oid != 0) { $shdesc .= sprintf("%d\t%s\t%s\n", $oid, $catalog, $1); } } elsif ($line =~ /^DECLARE_(UNIQUE_)?INDEX\((.*)\)\s*$/m) { if ($reln_open) { $bki .= "close $catalog\n"; $reln_open = 0; } my $u = $1?" unique":""; my @fields = split /,/,$2,3; $fields[2] =~ s/\s{2,}/ /g; $bki .= "declare$u index $fields[0] $fields[1] $fields[2]\n"; } elsif ($line =~ /^DECLARE_TOAST\((.*)\)\s*$/m) { if ($reln_open) { $bki .= "close $catalog\n"; $reln_open = 0; } my @fields = split /,/,$1; $bki .= "declare toast $fields[1] $fields[2] on $fields[0]\n"; } elsif ($line =~ /^BUILD_INDICES/) { $bki .= "build indices\n"; } elsif ($line =~ /^CATALOG\((.*)\)(.*)\s*$/m) { if ($reln_open) { $bki .= "close $catalog\n"; $reln_open = 0; } my $rest = $2; my @fields = split /,/,$1; $catalog = $fields[0]; $oid = $fields[1]; $bootstrap=$shared_relation=$without_oids=""; if ($rest =~ /BKI_BOOTSTRAP/) { $bootstrap = "bootstrap "; } if ($rest =~ /BKI_SHARED_RELATION/) { $shared_relation = "shared_relation "; } if ($rest =~ /BKI_WITHOUT_OIDS/) { $without_oids = "without_oids "; } $nc++; $inside = 1; next; } if ($inside==1) { next if ($line =~ /{/); if ($line =~ /}/) { # Last line $bki .= "create $bootstrap$shared_relation$without_oids$catalog $oid\n (\n"; my $first = 1; for (my $i = 0; $i <= $#attr; $i++) { if ($first == 1) { $first = 0; } else { $bki .= ",\n"; } $bki .= " " . $attr[$i] . " = " . $types[$i]; } $bki .= "\n )\n"; undef(@attr); undef(@types); $reln_open = 1; $inside = 0; if ($bootstrap eq "") { $bki .= "open $catalog\n"; } next; } # inside catalog definition, so keep sucking up attributes my @fields = split /\s+/,$line; if ($fields[1] =~ /(.*)\[.*\]/) { #Array attribute push @attr, $1; push @types, $fields[0] . '[]'; } else { push @attr, $fields[1]; push @types, $fields[0]; } next; } } if ($reln_open == 1) { $bki .= "close $catalog\n"; } open(O,">$prefix.bki") || die "Could not write $prefix.bki\n"; print O "# PostgreSQL $majorversion\n"; print O $bki; close(O); open(O,">$prefix.description") || die "Could not write $prefix.description\n"; print O $desc; close(O); open(O,">$prefix.shdescription") || die "Could not write $prefix.shdescription\n"; print O $shdesc; close(O); } sub read_file { my $filename = shift; my $F; my $t = $/; undef $/; open($F, $filename) || die "Could not open file $filename\n"; my $txt = <$F>; close($F); $/ = $t; return $txt; } 1;
janebeckman/gpdb
src/tools/msvc/Genbki.pm
Perl
apache-2.0
7,122
=head1 NAME PPIx::Regexp::Token::Backreference - Represent a back reference =head1 SYNOPSIS use PPIx::Regexp::Dumper; PPIx::Regexp::Dumper->new( 'qr{(foo|bar)baz\1}smx' ) ->print(); =head1 INHERITANCE C<PPIx::Regexp::Token::Backreference> is a L<PPIx::Regexp::Token::Reference|PPIx::Regexp::Token::Reference>. C<PPIx::Regexp::Token::Backreference> has no descendants. =head1 DESCRIPTION This class represents back references of all sorts, both the traditional numbered variety and the Perl 5.010 named kind. =head1 METHODS This class provides no public methods beyond those provided by its superclass. =cut package PPIx::Regexp::Token::Backreference; use strict; use warnings; use base qw{ PPIx::Regexp::Token::Reference }; use Carp qw{ confess }; use PPIx::Regexp::Constant qw{ MINIMUM_PERL RE_CAPTURE_NAME }; our $VERSION = '0.028'; # Return true if the token can be quantified, and false otherwise # sub can_be_quantified { return }; { my %perl_version_introduced = ( g => '5.009005', # \g1 \g-1 \g{1} \g{-1} k => '5.009005', # \k<name> \k'name' '?' => '5.009005', # (?P=name) (PCRE/Python) ); sub perl_version_introduced { my ( $self ) = @_; return $perl_version_introduced{substr( $self->content(), 1, 1 )} || MINIMUM_PERL; } } my @external = ( # Recognition used externally [ qr{ \A \( \? P = ( @{[ RE_CAPTURE_NAME ]} ) \) }smxo, { is_named => 1 }, ], ); my @recognize = ( # recognition used internally [ qr{ \A \\ (?: # numbered (including relative) ( \d+ ) | g (?: ( -? \d+ ) | \{ ( -? \d+ ) \} ) ) }smx, { is_named => 0 }, ], [ qr{ \A \\ (?: # named g [{] ( @{[ RE_CAPTURE_NAME ]} ) [}] | k (?: \< ( @{[ RE_CAPTURE_NAME ]} ) \> | # named with angles ' ( @{[ RE_CAPTURE_NAME ]} ) ' ) # or quotes ) }smxo, { is_named => 1 }, ], ); # This must be implemented by tokens which do not recognize themselves. # The return is a list of list references. Each list reference must # contain a regular expression that recognizes the token, and optionally # a reference to a hash to pass to make_token as the class-specific # arguments. The regular expression MUST be anchored to the beginning of # the string. sub __PPIX_TOKEN__recognize { return __PACKAGE__->isa( scalar caller ) ? ( @external, @recognize ) : ( @external ); } sub __PPIX_TOKENIZER__regexp { my ( $class, $tokenizer, $character ) = @_; # PCRE/Python back references are handled in # PPIx::Regexp::Token::Structure, because they are parenthesized. # All the other styles are escaped. $character eq '\\' or return; foreach ( @recognize ) { my ( $re, $arg ) = @{ $_ }; my $accept = $tokenizer->find_regexp( $re ) or next; return $tokenizer->make_token( $accept, __PACKAGE__, $arg ); } return; } sub __PPIX_TOKENIZER__repl { my ( $class, $tokenizer, $character ) = @_; $tokenizer->interpolates() and goto &__PPIX_TOKENIZER__regexp; return; } 1; __END__ =head1 SUPPORT Support is by the author. Please file bug reports at L<http://rt.cpan.org>, or in electronic mail to the author. =head1 AUTHOR Thomas R. Wyant, III F<wyant at cpan dot org> =head1 COPYRIGHT AND LICENSE Copyright (C) 2009-2012 by Thomas R. Wyant, III This program is free software; you can redistribute it and/or modify it under the same terms as Perl 5.10.0. For more details, see the full text of the licenses in the directory LICENSES. This program is distributed in the hope that it will be useful, but without any warranty; without even the implied warranty of merchantability or fitness for a particular purpose. =cut # ex: set textwidth=72 :
amidoimidazol/bio_info
Beginning Perl for Bioinformatics/lib/PPIx/Regexp/Token/Backreference.pm
Perl
mit
3,652
package EnsEMBL::Maize::Configuration::Location; use strict; use warnings; use EnsEMBL::Web::Configuration; use EnsEMBL::Web::Tools::Ajax; use CGI; use EnsEMBL::Maize::Configuration; use EnsEMBL::Maize::Util::FPC; use POSIX qw(floor ceil); our @ISA = qw( EnsEMBL::Web::Configuration ); #---------------------------------------------------------------------- # Maize-specific ContigView sub contigview { my $self = shift; my $document = $self->{page}; my $content = $document->content; my $panel; foreach my $code ($content->panels) { if ($code =~ m/bottom/) { $panel = $content->panel($code); last; } } if ($panel) { # Replace menu with Maize's (EST and GSS options) # $panel->remove_component('menu'); $panel->replace_component('menu' => 'EnsEMBL::Maize::Component::Location::contigviewbottom_menu'); } return 1; } sub is_fpc_database { return lc $ENV{'ENSEMBL_SPECIES'} eq 'zea_mays'; } sub context_menu { my $self = shift; my $obj = $self->{object}; my $species = $obj->real_species; return unless $self->{page}->can('menu'); my $menu = $self->{page}->menu; return unless $menu; my $script = $ENV{'ENSEMBL_SCRIPT'} eq 'cytoview' ? 'CytoView' : 'ContigView'; my $q_string = sprintf('%s:%s-%s', $obj->seq_region_name, $obj->seq_region_start, $obj->seq_region_end); my $flag = join(q{}, 'contig', ($self->{'flag'} || q{})); my $header = join('<br/>', $obj->seq_region_type_and_name, $obj->thousandify(floor($obj->seq_region_start))); if (floor($obj->seq_region_start) != ceil($obj->seq_region_end)) { $header .= " - @{[$obj->thousandify(ceil($obj->seq_region_end))]}"; } EnsEMBL::Maize::Configuration::really_delete_menu_block($menu, $flag); $menu->add_block($flag, 'bulleted', $header, 'raw' => 1); if ($self->mapview_possible($obj->seq_region_name)) { $menu->add_entry( $flag, 'code' => 'mv_link', 'text' => "@{[$obj->seq_region_type_and_name]} in MapView", 'title' => "MapView - Overview of @{[$obj->seq_region_type_and_name]} including feature sumarries", 'href' => "/$species/mapview?chr=" . $obj->seq_region_name ); } $header =~ s/<br \/>/ /; if ($script eq 'ContigView') { my $cytoview_species = 'Zea_mays'; my $accession = $obj->seq_region_name; my $ctg_name = EnsEMBL::Maize::Util::FPC->fetch_contig_by_accession( $accession); $self->add_other_versions_menu_item($menu, $accession, $species, $flag); if ($ctg_name) { $menu->add_entry( $flag, 'text' => "View FPContig $ctg_name in CytoView", 'title' => "CytoView - genome browser overview of $ctg_name", 'href' => "/$cytoview_species/cytoview?mapfrag=$ctg_name" ); } my $clone_name = EnsEMBL::Maize::Util::FPC->fetch_clone_by_accession($accession); if ($clone_name) { $menu->add_entry( $flag, 'text' => "View Clone $clone_name in CytoView", 'title' => "CytoView - genome browser overview of $clone_name", 'href' => "/$cytoview_species/cytoview?mapfrag=$clone_name" ); } $menu->add_entry( $flag, 'text' => "View GenBank record for $accession", 'title' => "Jump to GenBank record of $accession", 'href' => "http://www.ncbi.nlm.nih.gov/entrez/viewer.fcgi?db=nucleotide&val=${accession}&dopt=brief", ); } $menu->add_entry( $flag, 'text' => 'Export information about region', 'title' => "ExportView - export information about $header", 'href' => "/$species/exportview?l=$q_string" ); unless ($obj->species_defs->ENSEMBL_NOMART) { $menu->add_entry( $flag, 'icon' => '/img/biomarticon.gif', 'text' => 'Export Gene info in region', 'title' => "BioMart - export Gene information in $header", 'href' => "/$species/martlink?l=$q_string;type=gene_region" ); $menu->add_entry( $flag, 'icon' => '/img/biomarticon.gif', 'text' => 'Export SNP info in region', 'title' => "BioMart - export SNP information in $header", 'href' => "/$species/martlink?l=$q_string;type=snp_region" ) if $obj->species_defs->databases->{'ENSEMBL_VARIATION'}; $menu->add_entry( $flag, 'icon' => '/img/biomarticon.gif', 'text' => 'Export Vega info in region', 'title' => "BioMart - export Vega gene features in $header", 'href' => "/$species/martlink?l=$q_string;type=vega_region" ) if $obj->species_defs->databases->{'ENSEMBL_VEGA'}; } my $URL = qq(/$species/urlsource?l=$q_string;script=) . lc($script); $menu->add_entry( $flag, 'text' => "View URL based data on " . $script, 'text' => 'View data stored on another webserver in ' . $script, 'href' => qq(javascript:X=window.open('$URL','urlsources','left=10,top=10,height=400,width=750,scrollbars=yes');X.focus()), '' ); my @options_as = (); my %alignments = $obj->species_defs->multiX('ALIGNMENTS'); for my $id ( sort { 10 * ($alignments{$b}->{'type'} cmp $alignments{$a}->{'type'}) + ($a <=> $b) } grep { $alignments{$_}->{'species'}->{$species} } keys(%alignments) ) { my $label = $alignments{$id}->{'name'}; my $KEY = "opt_align_${id}"; my @species = grep { $_ ne $species } sort keys %{ $alignments{$id}->{'species'} }; if (scalar(@species) == 1) { ($label = $species[0]) =~ s/_/ /g; } push @options_as, { 'text' => "... <em>$label</em>", 'raw' => 1, 'href' => sprintf( "/%s/alignsliceview?c=%s:%s;w=%s;align=%s", $species, $obj->seq_region_name, $obj->centrepoint, $obj->length, $KEY ) }; } if (@options_as) { $menu->add_entry( $flag, 'text' => "View alignment with ...", 'href' => $options_as[0]{'href'}, 'options' => \@options_as, 'title' => "AlignSliceView - graphical view of alignment" ); } my %species = (map { $obj->species_defs->multi($_, $species) } qw(BLASTZ_RAW BLASTZ_NET BLASTZ_RECIP_NET PHUSION_BLASTN TRANSLATED_BLAT BLASTZ_GROUP) ); my @options = (); for (sort keys %species) { (my $HR = $_) =~ s/_/ /; push @options, { 'text' => "... <em>$HR</em>", 'raw' => 1, 'href' => sprintf( "/%s/multicontigview?s1=%s;c=%s:%s;w=%s", $species, $_, $obj->seq_region_name, $obj->centrepoint, $obj->length ) }; } if (@options) { $menu->add_entry( $flag, 'code' => "mcv_link", 'text' => "View alongside ...", 'href' => $options[0]{'href'}, 'options' => \@options, 'title' => "MultiContigView - side by side view of genomic sequence" ); } if (@{ $obj->species_defs->other_species( $species, 'ENSEMBL_CHROMOSOMES' ) || [] } ) { my %species = ($obj->species_defs->multi('SYNTENY', $species)); my @options = (); foreach (sort keys %species) { (my $HR = $_) =~ s/_/ /; push @options, { 'text' => "... with <em>$HR</em>", 'raw' => 1, 'href' => sprintf( "/%s/syntenyview?otherspecies=%s;chr=%s;loc=%s", $species, $_, $obj->seq_region_name, $obj->centrepoint ) } if @{ $obj->species_defs->other_species($_, 'ENSEMBL_CHROMOSOMES') || [] }; } if (@options) { $menu->add_entry( $flag, 'text' => 'View Syntenic regions ...', 'href' => $options[0]{'href'}, 'options' => \@options ); } } my %browsers = %{ $obj->species_defs->other_species($species, 'EXTERNAL_GENOME_BROWSERS') || {} }; foreach (sort keys %browsers) { $menu->add_entry( $flag, 'text' => "View region in $browsers{$_}", 'href' => $obj->get_ExtURL( $_, { 'CHR' => $obj->seq_region_name, 'START' => $obj->seq_region_start, 'END' => $obj->seq_region_end } ) ); } } =pod =head2 add_other_versions_menu_item Adds links to other versions of this BAC =cut sub add_other_versions_menu_item { my $self = shift; my ($menu, $accession, $species, $flag) = @_; my @archive = @{ EnsEMBL::Maize::Util::FPC->archive_for_accession($accession) }; my @other_versions = map { +{ 'text' => $_, 'href' => "/$species/$ENV{'ENSEMBL_SCRIPT'}?region=$_" } } @archive; if (!scalar @other_versions) { push @other_versions, +{ 'text' => 'No other versions available' }; } $menu->add_entry( $flag, 'href' => '', 'title' => 'View other versions of this clone', 'options' => \@other_versions, 'raw' => 1, 'text' => <<HTML, Other Versions&nbsp;<img src="/images/new.png" alt="[NEW]" style="vertical-align: bottom"/> HTML ); } sub export_step1 { ### Alternative context menu for step 1 of exportview my $self = shift; my $obj = $self->{object}; my $species = $obj->real_species; return unless $self->{page}->can('menu'); my $menu = $self->{page}->menu; return unless $menu; my $flag = 'species'; $menu->add_block($flag, 'bulleted', 'Export a different species', 'raw' => 1); my @species_inconf = @{ $obj->species_defs->ENSEMBL_SPECIES }; my @group_order = qw( Mammals Chordates Eukaryotes ); my %spp_tree = ( 'Mammals' => { 'label' => 'Mammals', 'species' => [] }, 'Chordates' => { 'label' => 'Other chordates', 'species' => [] }, 'Eukaryotes' => { 'label' => 'Other eukaryotes', 'species' => [] }, ); foreach my $sp (@species_inconf) { my $bio_name = $obj->species_defs->other_species($sp, "SPECIES_BIO_NAME"); my $group = $obj->species_defs->other_species($sp, "SPECIES_GROUP") || 'default_group'; unless ($spp_tree{$group}) { push @group_order, $group; $spp_tree{$group} = { 'label' => $group, 'species' => [] }; } my $hash_ref = { 'href' => "/$sp/exportview", 'text' => "<i>$bio_name</i>", 'raw' => 1 }; push @{ $spp_tree{$group}{'species'} }, $hash_ref; } foreach my $group (@group_order) { next unless @{ $spp_tree{$group}{'species'} }; my $text = $spp_tree{$group}{'label'}; $menu->add_entry( 'species', 'href' => '/', 'text' => $text, 'options' => $spp_tree{$group}{'species'}, 'code' => 'export_' . $group, ); } } sub exportview { my $self = shift; my $obj = $self->{object}; if (is_fpc_database()) { $self->add_format( 'fpc_features', 'FPC Features', 'EnsEMBL::Maize::Component::Export::fpc_features_form', 'EnsEMBL::Maize::Component::Export::fpc_features', 'gff' => 'GFF format', 'tab' => 'Tab separated values', 'csv' => 'CSV (Comma Separated values)' ); } else { $self->add_format( 'bac_features', 'BAC Features', 'EnsEMBL::Maize::Component::Export::bac_features_form', 'EnsEMBL::Maize::Component::Export::bac_features', 'gff' => 'GFF format', 'tab' => 'Tab separated values', 'csv' => 'CSV (Comma Separated values)' ); $self->add_format( 'flat', 'Flat File', 'EnsEMBL::Maize::Component::Export::flat_form', 'EnsEMBL::Maize::Component::Export::flat', 'embl' => 'EMBL', 'genbank' => 'GenBank' ); $self->add_format( 'fasta', 'FASTA File', 'EnsEMBL::Maize::Component::Export::fasta_form', 'EnsEMBL::Maize::Component::Export::fasta', 'fasta' => 'FASTA format text file' ); $self->add_format( 'pipmaker', 'PIP (%age identity plot)', 'EnsEMBL::Maize::Component::Export::pip_form', undef, 'pipmaker' => 'Pipmaker / zPicture format', 'vista' => 'Vista Format' ); } if ($obj->seq_region_name) { map { $obj->param($_) || $obj->param($_, '') } qw/type1 type2 anchor2/; if ($obj->param('type2') eq 'none' || !$obj->param('anchor2')) { if ( $obj->param('type1') eq 'transcript' || $obj->param('type1') eq 'peptide') { $self->{object} ->alternative_object_from_factory('Transcript'); if ((@{ $self->{object}->__data->{'objects'} || [] }) && !@{ $self->{object}->__data->{'transcript'} || [] }) { $self->{object}->param('db', $self->{object}->__data->{'objects'}->[0]{'db'}); $self->{object}->param('transcript', $self->{object}->__data->{'objects'} ->[0]{'transcript'}); $self->{object} ->alternative_object_from_factory('Transcript'); } } elsif ($obj->param('type1') eq 'gene') { $self->{object}->alternative_object_from_factory('Gene'); if ((@{ $self->{object}->__data->{'objects'} || [] }) && !@{ $self->{object}->__data->{'gene'} || [] }) { $self->{object}->param('db', $self->{object}->__data->{'objects'}->[0]{'db'}); $self->{object}->param('gene', $self->{object}->__data->{'objects'}->[0]{'gene'}); $self->{object}->alternative_object_from_factory('Gene'); } } } $self->{object}->clear_problems(); if ($obj->param('action')) { my $format = $self->get_format($obj->param('format')); if ($format) { if ($obj->param('action') eq 'export') { my $panel3 = $self->new_panel( '', 'code' => 'stage3', 'caption' => 'Results', ); $panel3->add_components( 'results' => $format->{'superdisplay'}); $self->add_panel($panel3); return; } else { my $panel2 = $self->new_panel( '', 'code' => 'stage2_form', 'caption' => qq(Configuring $format->{'supername'} output for $format->{'name'}) ); $self->add_form($panel2, 'stage2_form' => $format->{'superform'}); $panel2->add_components( qw(select EnsEMBL::Web::Component::Export::stage2)); $self->add_panel($panel2); return; } } } } else { if ($obj->param('format')) { ## We have an error here... so we will need to pass it through to the webform... } } ## Display the form... my $panel1 = $self->new_panel( '', 'code' => 'stage1_form', 'caption' => qq(Select region/feature to Export) ); $self->add_form($panel1, qw(stage1_form EnsEMBL::Maize::Component::Export::stage1_form)); $panel1->add_components( qw(stage1 EnsEMBL::Maize::Component::Export::stage1)); $self->add_panel($panel1); } sub cytoview { my $self = shift; } ############################################################################## ## Helper functions.... ############################################################################## ## add_format, get_format are helper functions for configuring ExportView ##### ############################################################################## sub add_format { my ($self, $code, $name, $form, $display, %options) = @_; unless ($self->{object}->__data->{'formats'}{$code}) { $self->{object}->__data->{'formats'}{$code} = { 'name' => $name, 'form' => $form, 'display' => $display, 'sub' => {} }; foreach (keys %options) { $self->{object}->__data->{'formats'}{$code}{'sub'}{$_} = $options{$_}; } } } sub get_format { my ($self, $code) = @_; my $formats = $self->{object}->__data->{'formats'}; foreach my $super (keys %$formats) { foreach (keys %{ $formats->{$super}{'sub'} }) { return { 'super' => $super, 'supername' => $formats->{$super}{'name'}, 'superform' => $formats->{$super}{'form'}, 'superdisplay' => $formats->{$super}{'display'}, 'code' => $_, 'name' => $formats->{$super}{'sub'}{$_} } if $code eq $_; } } }
warelab/gramene-ensembl
maize-production/modules/EnsEMBL/Maize/Configuration/Location.pm
Perl
mit
18,644
/************************************************************************* name: modelChecker2.pl (Volume 1, Chapter 1) version: April 18, 2001 description: The revised model checker authors: Patrick Blackburn & Johan Bos *************************************************************************/ :- module(modelChecker2,[evaluate/0, evaluate/2, evaluate/3, satisfy/4]). :- ensure_loaded(comsemOperators). :- use_module(comsemPredicates,[memberList/2, compose/3, printRepresentations/1]). :- use_module(exampleModels,[example/2]). :- use_module(modelCheckerTestSuite,[test/4]). /*======================================================================== Evaluate a formula in an example model ========================================================================*/ evaluate(Formula,Example):- evaluate(Formula,Example,[]). /*======================================================================== Evaluate a formula in an example model wrt an assignment ========================================================================*/ evaluate(Formula,Example,Assignment):- example(Example,Model), satisfy(Formula,Model,Assignment,Result), printStatus(Result). /*======================================================================== Test Suite ========================================================================*/ evaluate:- format('~n>>>>> MODEL CHECKER 2 ON TEST SUITE <<<<<~n~n',[]), test(Formula,Example,Assignment,Status), format('~n~nInput formula:',[]), printRepresentations([Formula]), format('Example Model: ~p~nStatus: ',[Example]), printStatus(Status), example(Example,Model), satisfy(Formula,Model,Assignment,Result), format('~nModel Checker says: ',[]), printStatus(Result), printComparison(Status,Result), fail. evaluate. /*======================================================================== Print status of a testsuite example ========================================================================*/ printStatus(pos):- write('Satisfied in model. '). printStatus(neg):- write('Not satisfied in model. '). printStatus(undef):- write('Cannot be evaluated. '). /*======================================================================== Print comparison of result and expected result ========================================================================*/ printComparison(Expected,Result):- \+ Expected=Result, write('UNEXPECTED RESULT!'). printComparison(Expected,Result):- Expected=Result, write('OK!'). /*======================================================================== Variables or Atoms ========================================================================*/ satisfy(X,_,_,undef):- var(X), !. satisfy(X,_,_,undef):- atomic(X), !. /*======================================================================== Existential Quantification ========================================================================*/ satisfy(Formula,model(D,F),G,pos):- nonvar(Formula), Formula = exists(X,SubFormula), var(X), memberList(V,D), satisfy(SubFormula,model(D,F),[g(X,V)|G],pos). satisfy(Formula,model(D,F),G,neg):- nonvar(Formula), Formula = exists(X,SubFormula), var(X), setof(V,memberList(V,D),All), setof(V, ( memberList(V,D), satisfy(SubFormula,model(D,F),[g(X,V)|G],neg) ), All). satisfy(Formula,model(D,F),G,undef):- nonvar(Formula), Formula = exists(X,SubFormula), ( nonvar(X) ; var(X), memberList(V,D), satisfy(SubFormula,model(D,F),[g(X,V)|G],undef) ). /*======================================================================== Universal Quantification ========================================================================*/ satisfy(Formula,Model,G,Polarity):- nonvar(Formula), Formula = forall(X,SubFormula), satisfy(~ exists(X,~ SubFormula),Model,G,Polarity). /*======================================================================== Conjunction ========================================================================*/ satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (Formula1 & Formula2), satisfy(Formula1,Model,G,pos), satisfy(Formula2,Model,G,pos). satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (Formula1 & Formula2), satisfy(Formula1,Model,G,pos), satisfy(Formula2,Model,G,neg). satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (Formula1 & Formula2), satisfy(Formula1,Model,G,neg), satisfy(Formula2,Model,G,pos). satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (Formula1 & Formula2), satisfy(Formula1,Model,G,neg), satisfy(Formula2,Model,G,neg). satisfy(Formula,Model,G,undef):- nonvar(Formula), Formula = (Formula1 & Formula2), ( satisfy(Formula1,Model,G,undef) ; satisfy(Formula2,Model,G,undef) ). /*======================================================================== Disjunction ========================================================================*/ satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (Formula1 v Formula2), satisfy(Formula1,Model,G,pos), satisfy(Formula2,Model,G,pos). satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (Formula1 v Formula2), satisfy(Formula1,Model,G,pos), satisfy(Formula2,Model,G,neg). satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (Formula1 v Formula2), satisfy(Formula1,Model,G,neg), satisfy(Formula2,Model,G,pos). satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (Formula1 v Formula2), satisfy(Formula1,Model,G,neg), satisfy(Formula2,Model,G,neg). satisfy(Formula,Model,G,undef):- nonvar(Formula), Formula = (Formula1 v Formula2), ( satisfy(Formula1,Model,G,undef) ; satisfy(Formula2,Model,G,undef) ). /*======================================================================== Implication ========================================================================*/ satisfy(Formula,Model,G,Polarity):- nonvar(Formula), Formula = (Formula1 > Formula2), satisfy((~Formula1 v Formula2),Model,G,Polarity). /*======================================================================== Negation ========================================================================*/ satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (~ SubFormula), satisfy(SubFormula,Model,G,neg). satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (~ SubFormula), satisfy(SubFormula,Model,G,pos). satisfy(Formula,Model,G,undef):- nonvar(Formula), Formula = (~ SubFormula), satisfy(SubFormula,Model,G,undef). /*======================================================================== Equality ========================================================================*/ satisfy(Formula,Model,G,pos):- nonvar(Formula), Formula = (X=Y), i(X,Model,G,Value1), i(Y,Model,G,Value2), Value1=Value2. satisfy(Formula,Model,G,neg):- nonvar(Formula), Formula = (X=Y), i(X,Model,G,Value1), i(Y,Model,G,Value2), \+ Value1=Value2. satisfy(Formula,Model,G,undef):- nonvar(Formula), Formula = (X=Y), ( \+ i(X,Model,G,_) ; \+ i(Y,Model,G,_) ). /*======================================================================== One-place predicates ========================================================================*/ satisfy(Formula,model(D,F),G,pos):- nonvar(Formula), compose(Formula,Symbol,[Argument]), \+ Symbol = '~', i(Argument,model(D,F),G,Value), memberList(f(1,Symbol,Values),F), memberList(Value,Values). satisfy(Formula,model(D,F),G,neg):- nonvar(Formula), compose(Formula,Symbol,[Argument]), \+ Symbol = '~', i(Argument,model(D,F),G,Value), memberList(f(1,Symbol,Values),F), \+ memberList(Value,Values). satisfy(Formula,model(D,F),G,undef):- nonvar(Formula), compose(Formula,Symbol,[Argument]), \+ Symbol = '~', ( \+ var(Argument), \+ atom(Argument) ; var(Argument), \+ i(Argument,model(D,F),G,_) ; atom(Argument), \+ i(Argument,model(D,F),G,_) ; \+ memberList(f(1,Symbol,_),F) ). /*======================================================================== Two-place predicates ========================================================================*/ satisfy(Formula,model(D,F),G,pos):- nonvar(Formula), compose(Formula,Symbol,[Arg1,Arg2]), \+ memberList(Symbol,['=','>','v','&','<>',exists,forall]), i(Arg1,model(D,F),G,Value1), i(Arg2,model(D,F),G,Value2), memberList(f(2,Symbol,Values),F), memberList((Value1,Value2),Values). satisfy(Formula,model(D,F),G,neg):- nonvar(Formula), compose(Formula,Symbol,[Arg1,Arg2]), \+ memberList(Symbol,['=','>','v','&','<>',exists,forall]), i(Arg1,model(D,F),G,Value1), i(Arg2,model(D,F),G,Value2), memberList(f(2,Symbol,Values),F), \+ memberList((Value1,Value2),Values). satisfy(Formula,model(D,F),G,undef):- nonvar(Formula), compose(Formula,Symbol,[Arg1,Arg2]), \+ memberList(Symbol,['=','>','v','&','<>',exists,forall]), ( \+ var(Arg1), \+ atom(Arg1) ; \+ var(Arg2), \+ atom(Arg2) ; var(Arg1), \+ i(Arg1,model(D,F),G,_) ; var(Arg2), \+ i(Arg2,model(D,F),G,_) ; atom(Arg1), \+ i(Arg1,model(D,F),G,_) ; atom(Arg2), \+ i(Arg2,model(D,F),G,_) ; \+ memberList(f(2,Symbol,_),F) ). /*======================================================================== Interpretation of Constants and Variables ========================================================================*/ i(X,model(D,F),G,Value):- ( var(X), memberList(g(Y,Value),G), X==Y, !, memberList(Value,D) ; atom(X), memberList(f(0,X,Value),F) ).
TeamSPoon/logicmoo_workspace
packs_sys/logicmoo_nlu/ext/CURT/bb0/modelChecker2.pl
Perl
mit
9,999
# vi:fdm=marker fdl=0 # $Id: Correlation.pm,v 1.1 2006/01/25 22:20:42 jettero Exp $ package Statistics::Basic::Correlation; use strict; no warnings; use Carp; use Statistics::Basic::Vector; use Statistics::Basic::StdDev; use Statistics::Basic::CoVariance; 1; # new {{{ sub new { my $this = shift; my $v1 = new Statistics::Basic::Vector( shift ); my $v2 = new Statistics::Basic::Vector( shift ); $this = bless {}, $this; $this->{sd1} = new Statistics::Basic::StdDev($v1); $this->{sd2} = new Statistics::Basic::StdDev($v2); $this->{cov} = new Statistics::Basic::CoVariance( $v1, $v2, undef, $this->{sd1}{v}{m}, $this->{sd2}{v}{m}); $this->recalc; return $this; } # }}} # recalc {{{ sub recalc { my $this = shift; my $c = $this->{cov}->query; my $s1 = $this->{sd1}->query; my $s2 = $this->{sd2}->query; if( $s1 == 0 or $s2 == 0 ) { warn "[recalc correlation] Standard deviation of 0. Crazy infinite correlation detected.\n" if $ENV{DEBUG}; return undef; } $this->{correlation} = ( $c / ($s1*$s2) ); warn "[recalc correlation] ( $c / ($s1*$s2) ) = $this->{correlation}\n" if $ENV{DEBUG}; return 1; } # }}} # query {{{ sub query { my $this = shift; return $this->{correlation}; } # }}} # size {{{ sub size { my $this = shift; return $this->{cov}->size; } # }}} # set_size {{{ sub set_size { my $this = shift; my $size = shift; warn "[set_size correlation] $size\n" if $ENV{DEBUG}; croak "strange size" if $size < 1; $this->{sd1}->set_size( $size ); $this->{sd2}->set_size( $size ); $this->{cov}->recalc; $this->recalc; } # }}} # insert {{{ sub insert { my $this = shift; warn "[insert correlation]\n" if $ENV{DEBUG}; croak "this insert() takes precisely two arguments. They can be arrayrefs if you like." unless 2 == int @_; $this->{sd1}->insert( $_[0] ); $this->{sd2}->insert( $_[1] ); $this->{cov}->recalc; $this->recalc; } # }}} # ginsert {{{ sub ginsert { my $this = shift; warn "[ginsert correlation]\n" if $ENV{DEBUG}; croak "this ginsert() takes precisely two arguments. They can be arrayrefs if you like." unless 2 == int @_; $this->{sd1}->ginsert( $_[0] ); $this->{sd2}->ginsert( $_[1] ); croak "The two vectors in a Correlation object must be the same length." unless $this->{sd1}->{v}->size == $this->{sd2}->{v}->size; $this->{cov}->recalc; $this->recalc; } # }}} # set_vector {{{ sub set_vector { my $this = shift; warn "[set_vector correlation]\n" if $ENV{DEBUG}; croak "this set_vector() takes precisely two arguments. They can be arrayrefs if you like." unless 2 == int @_; $this->{sd1}->set_vector( $_[0] ); $this->{sd2}->set_vector( $_[1] ); croak "The two vectors in a Correlation object must be the same length." unless $this->{sd1}->{v}->size == $this->{sd2}->{v}->size; $this->{cov}->recalc; return $this->recalc; } # }}} __END__ # Below is stub documentation for your module. You better edit it! =head1 NAME Statistics::Basic::Correlation =head1 SYNOPSIS A machine to calculate the correlation of given vectors. =head1 ENV VARIABLES =head2 DEBUG Try setting $ENV{DEBUG}=1; or $ENV{DEBUG}=2; to see the internals. Also, from your bash prompt you can 'DEBUG=1 perl ./myprog.pl' to enable debugging dynamically. =head1 AUTHOR Please contact me with ANY suggestions, no matter how pedantic. Jettero Heller <japh@voltar-confed.org> =head1 SEE ALSO perl(1) =cut
AstraZeneca-NGS/Seq2C
libraries/Statistics/Basic/Correlation.pm
Perl
mit
3,601
=pod =head1 NAME ASN1_OBJECT_new, ASN1_OBJECT_free - object allocation functions =head1 SYNOPSIS #include <openssl/asn1.h> ASN1_OBJECT *ASN1_OBJECT_new(void); void ASN1_OBJECT_free(ASN1_OBJECT *a); =head1 DESCRIPTION The ASN1_OBJECT allocation routines, allocate and free an ASN1_OBJECT structure, which represents an ASN1 OBJECT IDENTIFIER. ASN1_OBJECT_new() allocates and initializes a ASN1_OBJECT structure. ASN1_OBJECT_free() frees up the B<ASN1_OBJECT> structure B<a>. If B<a> is NULL, nothing is done. =head1 NOTES Although ASN1_OBJECT_new() allocates a new ASN1_OBJECT structure it is almost never used in applications. The ASN1 object utility functions such as OBJ_nid2obj() are used instead. =head1 RETURN VALUES If the allocation fails, ASN1_OBJECT_new() returns B<NULL> and sets an error code that can be obtained by L<ERR_get_error(3)>. Otherwise it returns a pointer to the newly allocated structure. ASN1_OBJECT_free() returns no value. =head1 SEE ALSO L<ERR_get_error(3)>, L<d2i_ASN1_OBJECT(3)> =head1 HISTORY ASN1_OBJECT_new() and ASN1_OBJECT_free() are available in all versions of SSLeay and OpenSSL. =cut
vbloodv/blood
extern/openssl.orig/doc/crypto/ASN1_OBJECT_new.pod
Perl
mit
1,146
# This file is auto-generated by the Perl DateTime Suite time zone # code generator (0.07) This code generator comes with the # DateTime::TimeZone module distribution in the tools/ directory # # Generated from /tmp/Q713JNUf8G/australasia. Olson data version 2016a # # Do not edit this file directly. # package DateTime::TimeZone::Pacific::Palau; $DateTime::TimeZone::Pacific::Palau::VERSION = '1.95'; use strict; use Class::Singleton 1.03; use DateTime::TimeZone; use DateTime::TimeZone::OlsonDB; @DateTime::TimeZone::Pacific::Palau::ISA = ( 'Class::Singleton', 'DateTime::TimeZone' ); my $spans = [ [ DateTime::TimeZone::NEG_INFINITY, # utc_start 59958198124, # utc_end 1900-12-31 15:02:04 (Mon) DateTime::TimeZone::NEG_INFINITY, # local_start 59958230400, # local_end 1901-01-01 00:00:00 (Tue) 32276, 0, 'LMT', ], [ 59958198124, # utc_start 1900-12-31 15:02:04 (Mon) DateTime::TimeZone::INFINITY, # utc_end 59958230524, # local_start 1901-01-01 00:02:04 (Tue) DateTime::TimeZone::INFINITY, # local_end 32400, 0, 'PWT', ], ]; sub olson_version {'2016a'} sub has_dst_changes {0} sub _max_year {2026} sub _new_instance { return shift->_init( @_, spans => $spans ); } 1;
jkb78/extrajnm
local/lib/perl5/DateTime/TimeZone/Pacific/Palau.pm
Perl
mit
1,226
=pod =head1 NAME X509_LOOKUP_hash_dir, X509_LOOKUP_file, X509_load_cert_file, X509_load_crl_file, X509_load_cert_crl_file - Default OpenSSL certificate lookup methods =head1 SYNOPSIS #include <openssl/x509_vfy.h> X509_LOOKUP_METHOD *X509_LOOKUP_hash_dir(void); X509_LOOKUP_METHOD *X509_LOOKUP_file(void); int X509_load_cert_file(X509_LOOKUP *ctx, const char *file, int type); int X509_load_crl_file(X509_LOOKUP *ctx, const char *file, int type); int X509_load_cert_crl_file(X509_LOOKUP *ctx, const char *file, int type); =head1 DESCRIPTION B<X509_LOOKUP_hash_dir> and B<X509_LOOKUP_file> are two certificate lookup methods to use with B<X509_STORE>, provided by OpenSSL library. Users of the library typically do not need to create instanses of these methods manually, they would be created automatically by L<X509_STORE_load_locations(3)> or L<SSL_CTX_load_verify_locations(3)> functions. Internally loading of certificates and CRLs is implemented via functions B<X509_load_cert_crl_file>, B<X509_load_cert_file> and B<X509_load_crl_file>. These functions support parameter I<type>, which can be one of constants B<FILETYPE_PEM>, B<FILETYPE_ASN1> and B<FILETYPE_DEFAULT>. They load certificates and/or CRLs from specified file into memory cache of B<X509_STORE> objects which given B<ctx> parameter is associated with. Functions B<X509_load_cert_file> and B<X509_load_crl_file> can load both PEM and DER formats depending of type value. Because DER format cannot contain more than one certificate or CRL object (while PEM can contain several concatenated PEM objects) B<X509_load_cert_crl_file> with B<FILETYPE_ASN1> is equivalent to B<X509_load_cert_file>. Constant B<FILETYPE_DEFAULT> with NULL filename causes these functions to load default certificate store file (see L<X509_STORE_set_default_paths>. Functions return number of objects loaded from file or 0 in case of error. Both methods support adding several certificate locations into one B<X509_STORE>. This page documents certificate store formats used by these methods and caching policy. =head2 FILE METHOD B<X509_LOOKUP_file> method loads entire set of certificates and CRLs into memory immediately when file name is passed to it. File format is ASCII text which contains concatenated PEM certificates and CRLs. This method should be used by applications which work with limited set of CAs. =head2 HASHED DIR METHOD B<X509_LOOKUP_hash_dir> is more sophisticated method, which loads certificates and CRLs on demand, but caches them in the memory once they are loaded. However, since OpenSSL 1.0.0beta1 it checks for newer CRLs upon each lookup, so if newer CRL would appear in the directory, it would be loaded. Directory should contain each certificate and CRL in the separate file in the PEM format, with file name derived from certificate subject (or CRL issuer) hash, as returned by L<X509_NAME_hash(3)> function of with option B<-hash> of L<x509(1)> or L<crl(1)> command. This hash value is appended by suffix .I<N> for certificates and B<.r>I<N> for CRLs where I<N> is sequentual number among certificates with same hash value, so it is possible to have in the store several certificates with same subject or several CRLs with same issuer (and, for example, different validity period). When checking for new CRLs once one CRL for given hash value is loaded, hash_dir lookup method checks only for certificates with sequentual number greater than one of already cached CRL. Note that hash algorithm used for subject hashing is changed in OpenSSL 1.0, so all certificate stores have to be rehashed upon transitopn from 0.9.8 to 1.0.0. OpenSSL includes utility L<c_rehash(1)> which creates symlinks with correct hashed names for all files with .pem suffix in the given directory. =head1 SEE ALSO L<pem(3)>, L<d2i_X509_bio(3)>, L<X509_STORE_load_locations(3)>, L<X609_store_add_lookup(3)>, L<SSL_CTX_load_verify_locations(3)>, =cut
vbloodv/blood
extern/openssl.orig/doc/crypto/X509_LOOKUP_hash_dir.pod
Perl
mit
3,946
package AnyComicApp::Plugin::PageNavigator; use Mojo::Base 'Mojolicious::Plugin'; use POSIX( qw/ceil/ ); use Mojo::ByteStream 'b'; use strict; use warnings; our $VERSION = 0.01; # Homer: Well basically, I just copied the plant we have now. # Then, I added some fins to lower wind resistance. # And this racing stripe here I feel is pretty sharp. # Burns: Agreed. First prize! sub register{ my ( $self, $app, $args ) = @_; $args ||= {}; $app->helper( page_navigator => sub{ my ( $self, $actual, $count, $opts ) = @_; $count = ceil($count); return "" unless $count > 1; $opts = { %{$args}, %{$opts || {}}, }; my $round = $opts->{round} || 4; my $class = $opts->{class} || "number"; my $cur_class = $opts->{current_class} || 'cur'; my $param = $opts->{param} || "page"; my $outer = $opts->{outer} || 2; my @current = ( $actual - $round .. $actual + $round ); my @first = ( $round > $actual ? (1..$round * 3 ) : (1..$outer) ); my @tail = ( $count - $round < $actual ? ( $count - $round * 2 + 1 .. $count ) : ( $count - $outer + 1 .. $count ) ); my @ret = (); my $last = undef; foreach my $number( sort { $a <=> $b } @current, @first, @tail ){ next if $last && $last == $number; next if $number <= 0 ; last if $number > $count; push @ret, ".." if( $last && $last + 1 != $number ); push @ret, $number; $last = $number; } my $html = ""; if( $actual == 1 ){ $html .= "<span class=\"$class\">&lt;</span>"; } else { $html .= "<a href=\"" . $self->url_for->query( $param => $actual - 1 ) . "\" class=\"$class\">&lt;</a>"; } foreach my $number( @ret ){ if( $number eq ".." ){ $html .= "<span class=\"$class\">..</span>"; } elsif( $number == $actual ) { $html .= "<span class=\"$class $cur_class\">$number</span>"; } else { $html .= "<a href=\"" . $self->url_for->query( $param => $number ) ."\" class=\"$class\">$number</a>"; } } if( $actual == $count ){ $html .= "<span class=\"$class\">&gt;</span>"; } else { $html .= "<a href=\"" . $self->url_for->query( $param => $actual + 1 ) . "\" class=\"$class\">&gt;</a>" } $html .= "<span style=\"clear: left; width: 1px;\">&nbsp;</span>"; return b( $html ); } ); } 1; __END__ =head1 NAME Mojolicious::Plugin::PageNavigator - Page Navigator plugin for Mojolicious =head1 SYNOPSIS # Mojolicious::Lite plugin 'page_navigator' # Mojolicious $self->plugin( 'page_navigator' ); =head1 DESCRIPTION L<Mojolicious::Plugin::PageNavigator> generates standard page navigation bar, like << 1 2 ... 11 12 13 14 15 ... 85 86 >> =head1 HELPERS =head2 page_navigator %= page_navigator( $current_page, $total_pages, $opts ); =head3 Options Options is a optional ref hash. %= page_navigator( $current_page, $total_pages, { round => 4, outer => 2, class => 'number', param => 'page' } ); =over 1 =item round Number of pages arround the current page. Default: 4. =item outer Number of outer window pages (first and last pages). Default 2. =item class Class for each page number element. Default: 'number' =item param Name of param for query url. Default: 'page' =back =head1 SEE ALSO L<Mojolicious>, L<Mojolicious::Guides>, L<http://mojolicio.us>. =head1 DEVELOPMENT =head2 Repository https://github.com/silvioq/mojolicious-page-navigator =head1 COPYRIGHT Copyright (C) 2011, Silvio Quadri This program is free software, you can redistribute it and/or modify it under the terms of the Artistic License version 2.0.
baboowang/anycomic
lib/AnyComicApp/Plugin/PageNavigator.pm
Perl
mit
3,787