repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
tactcomplabs/xbgas-binutils-gdb | 22,331 | sim/testsuite/h8300/addx.s | # Hitachi H8 testcase 'addx'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
# Instructions tested:
# addx.b #xx:8... |
tactcomplabs/xbgas-binutils-gdb | 2,224 | sim/testsuite/h8300/subl.s | # Hitachi H8 testcase 'sub.l'
# mach(): h8300h h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
start
.if (sim_cpu == ... |
tactcomplabs/xbgas-binutils-gdb | 3,836 | sim/testsuite/h8300/ldm.s | # Hitachi H8 testcase 'ldm', 'stm'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
.data
.align 4
_stack: .long 0,1,... |
tactcomplabs/xbgas-binutils-gdb | 7,908 | sim/testsuite/h8300/ldc.s | # Hitachi H8 testcase 'ldc'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
.data
byte_pre:
.byte 0
byte_src:
.byte... |
tactcomplabs/xbgas-binutils-gdb | 2,597 | sim/testsuite/h8300/inc.s | # Hitachi H8 testcase 'inc, inc.w, inc.l'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
start
inc_b:
set_grs_a5... |
tactcomplabs/xbgas-binutils-gdb | 1,711 | sim/testsuite/h8300/orl.s | # Hitachi H8 testcase 'or.l'
# mach(): h8300h h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
start
.if (sim_cpu ==... |
tactcomplabs/xbgas-binutils-gdb | 6,997 | sim/testsuite/h8300/stc.s | # Hitachi H8 testcase 'stc'
# mach(): all
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
.data
byte_dest1:
.byte 0
.byte 0
byte_... |
tactcomplabs/xbgas-binutils-gdb | 26,009 | sim/testsuite/h8300/rotl.s | # Hitachi H8 testcase 'rotl'
# mach(): h8300s h8sx
# as(h8300): --defsym sim_cpu=0
# as(h8300h): --defsym sim_cpu=1
# as(h8300s): --defsym sim_cpu=2
# as(h8sx): --defsym sim_cpu=3
# ld(h8300h): -m h8300helf
# ld(h8300s): -m h8300self
# ld(h8sx): -m h8300sxelf
.include "testutils.inc"
start
.data
byte_dest: .byte ... |
tactcomplabs/xbgas-binutils-gdb | 1,066 | sim/testsuite/bpf/xadd.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;;; xadd.s
;;; Tests for BPF atomic exchange-and-add instructions in simulator
;;;
;;; The xadd instructions (XADDW, XADDDW) operate on a memory location
;;; specified in $dst + offset16, atomically adding the value in $src.
;;;
;;; In the simulator, there isn't anything else ... |
tactcomplabs/xbgas-binutils-gdb | 1,044 | sim/testsuite/bpf/endbe.s | # mach: bpf
# as: --EB
# ld: --EB
# sim: -E big
# output: pass\nexit 0 (0x0)\n
;;; endbe.s
;;; Tests for BPF endianness-conversion instructions in simulator
;;; running in BIG ENDIAN
;;;
;;; Both 'be' and 'le' ISAs have both endbe and endle instructions.
.include "testutils.inc"
.text
.global main
.ty... |
tactcomplabs/xbgas-binutils-gdb | 3,048 | sim/testsuite/bpf/jmp32.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;;; jmp32.s
;;; Tests for eBPF JMP32 instructions in simulator
.include "testutils.inc"
.text
.global main
.type main, @function
main:
mov32 %r1, 5
mov32 %r2, 2
mov32 %r3, 7
mov32 %r4, -1
;; ja - jump absolute (unc... |
tactcomplabs/xbgas-binutils-gdb | 3,095 | sim/testsuite/bpf/alu.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;;; alu.s
;;; Tests for ALU64 BPF instructions in simulator
.include "testutils.inc"
.text
.global main
.type main, @function
main:
mov %r1, 0
mov %r2, -1
;; add
add %r1, 1
add %r2, -1
add %r1, ... |
tactcomplabs/xbgas-binutils-gdb | 3,084 | sim/testsuite/bpf/alu32.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;; alu32.s
;; Tests for ALU(32) BPF instructions in simulator
.include "testutils.inc"
.text
.global main
.type main, @function
main:
mov32 %r1, 10 ; r1 = 10
mov32 %r2, -5 ; r2 = -5
;; add
add32 %r1, 1 ... |
tactcomplabs/xbgas-binutils-gdb | 1,088 | sim/testsuite/bpf/mov.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;; mov.s
;; Tests for mov and mov32 instructions
.include "testutils.inc"
.text
.global main
.type main, @function
main:
;; some basic sanity checks
mov32 %r1, 5
fail_ne %r1, 5
mov32 %r2, %r1
fail_ne %r2, 5
mov ... |
tactcomplabs/xbgas-binutils-gdb | 2,479 | sim/testsuite/bpf/ldabs.s | # mach: bpf
# sim: --skb-data-offset=0x20
# output: pass\nexit 0 (0x0)\n
;;; ldabs.s
;;; Tests for non-generic BPF load instructions in simulator.
;;; These instructions (ld{abs,ind}{b,h,w,dw}) are used to access
;;; kernel socket data from BPF programs for high performance filters.
;;;
;;; Register r6 is an implicit i... |
tactcomplabs/xbgas-binutils-gdb | 3,044 | sim/testsuite/bpf/jmp.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;;; jmp.s
;;; Tests for eBPF JMP instructions in simulator
.include "testutils.inc"
.text
.global main
.type main, @function
main:
mov %r1, 5
mov %r2, 2
mov %r3, 7
mov %r4, -1
;; ja - jump absolute (uncondi... |
tactcomplabs/xbgas-binutils-gdb | 1,403 | sim/testsuite/bpf/mem.s | # mach: bpf
# output: pass\nexit 0 (0x0)\n
;;; mem.s
;;; Tests for BPF memory (ldx, stx, ..) instructions in simulator
.include "testutils.inc"
.text
.global main
.type main, @function
main:
lddw %r1, 0x1234deadbeef5678
mov %r2, 0x1000
;; basic store/load check
stxb ... |
tactcomplabs/xbgas-binutils-gdb | 1,713 | sim/testsuite/pru/dram.s | # Check that DRAM memory access works.
# mach: pru
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General ... |
tactcomplabs/xbgas-binutils-gdb | 1,057 | sim/testsuite/pru/loop-imm.s | # Check that loop insn works.
# mach: pru
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public Li... |
tactcomplabs/xbgas-binutils-gdb | 1,847 | sim/testsuite/pru/mul.s | # Check that multiplication works.
# mach: pru
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Publ... |
tactcomplabs/xbgas-binutils-gdb | 1,125 | sim/testsuite/pru/subreg.s | # Check that subregister addressing works.
# mach: pru
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU Gene... |
tactcomplabs/xbgas-binutils-gdb | 1,026 | sim/testsuite/pru/dmem-zero-trap.s | # Check that DMEM zero address access can be trapped.
# mach: pru
# sim: --error-null-deref
# xerror:
# output: core: 4 byte read to unmapped address 0x0 at *\n
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
#... |
tactcomplabs/xbgas-binutils-gdb | 1,071 | sim/testsuite/pru/loop-reg.s | # Check that loop insn works.
# mach: pru
# Copyright (C) 2016-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public Li... |
tactcomplabs/xbgas-binutils-gdb | 1,290 | sim/testsuite/pru/lmbd.s | # Check that lmbd insn works.
# mach: pru
# Copyright (C) 2020-2022 Free Software Foundation, Inc.
# Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
#
# This file is part of the GNU simulators.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public Li... |
tactcomplabs/xbgas-binutils-gdb | 1,600 | sim/testsuite/aarch64/mla.s | # mach: aarch64
# Check the vector multiply add instruction: mla.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
m8b:
.word 0x110a0502
.word 0x4132251a
m16b:
.word 0x110a0502
.word 0x4132251a
.word 0x917a6552
.word 0x01e2c5aa
m4h:
.word... |
tactcomplabs/xbgas-binutils-gdb | 2,068 | sim/testsuite/aarch64/fstur.s | # mach: aarch64
# Check the FP store unscaled offset instructions: fsturs, fsturd, fsturq.
# Check the values -1, and XXX_MAX, which tests all bits.
# Check with offsets -256 and 255, which tests all bits.
# Also tests the FP load unscaled offset instructions: fldurs, fldurd, fldurq.
.include "testutils.inc"
.data
... |
tactcomplabs/xbgas-binutils-gdb | 1,394 | sim/testsuite/aarch64/bit.s | # mach: aarch64
# Check the bitwise vector instructions: bif, bit, bsl, eor.
.include "testutils.inc"
.data
.align 4
inputa:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
inputb:
.word 0x40302010
.word 0x80706050
.word 0xc0b0a090
.word 0x01f0e0d0
mask:
.word 0xFF00FF00
.word 0x00FF0... |
tactcomplabs/xbgas-binutils-gdb | 1,212 | sim/testsuite/aarch64/xtn.s | # mach: aarch64
# Check the extract narrow instructions: xtn, xtn2.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
input2:
.word 0x14131211
.word 0x18171615
.word 0x1c1b1a19
.word 0x201f1e1d
x16b:
.word 0x07050301
.word 0x0f0d0b09
.word... |
tactcomplabs/xbgas-binutils-gdb | 2,672 | sim/testsuite/aarch64/stn_multiple.s | # mach: aarch64
# Check the store multiple structure instructions: st1, st2, st3, st4.
# Check the addressing modes: no offset, post-index immediate offset,
# post-index register offset.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
.word 0x... |
tactcomplabs/xbgas-binutils-gdb | 1,512 | sim/testsuite/aarch64/mul.s | # mach: aarch64
# Check the non-widening multiply vector instruction: mul.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
m8b:
.word 0x10090401
.word 0x40312419
m16b:
.word 0x10090401
.word 0x40312419
.word 0x90796451
.word 0x00e1c4a9
m4... |
tactcomplabs/xbgas-binutils-gdb | 1,540 | sim/testsuite/aarch64/xtl.s | #mach: aarch64
# Check the extend long instructions: sxtl, sxtl2, uxtl, uxtl2.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0xfcfdfeff
.word 0xf8f9fafb
start
adrp x0, input
ldr q0, [x0, #:lo12:input]
uxtl v1.8h, v0.8b
uxtl2 v2.8h, v0.16b
addv h3, v1.8h
addv h4... |
tactcomplabs/xbgas-binutils-gdb | 1,341 | sim/testsuite/aarch64/sumov.s | # mach: aarch64
# Check the mov from asimd to general reg instructions: smov, umov.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0xf4f3f2f1
.word 0xf8f7f6f5
start
adrp x0, input
ldr q0, [x0, #:lo12:input]
smov w0, v0.b[0]
smov w3, v0.b[12]
cmp w0, #1
bne .Lfai... |
tactcomplabs/xbgas-binutils-gdb | 1,619 | sim/testsuite/aarch64/cmtst.s | # mach: aarch64
# Check the vector compare bitwise test instruction: cmtst.
.include "testutils.inc"
.data
.align 4
inputb:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
inputh:
.word 0x00020001
.word 0x00040003
.word 0x00060005
.word 0x00800007
inputs:
.word 0x00000001
.word 0x0000... |
tactcomplabs/xbgas-binutils-gdb | 2,162 | sim/testsuite/aarch64/stn_single.s | # mach: aarch64
# Check the store single 1-element structure to one lane instructions:
# st1, st2, st3, st4.
# Check the addressing modes: no offset, post-index immediate offset,
# post-index register offset.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.wor... |
tactcomplabs/xbgas-binutils-gdb | 3,460 | sim/testsuite/aarch64/fcvtz.s | # mach: aarch64
# Check the FP convert to int round toward zero instructions: fcvtszs32,
# fcvtszs, fcvtszd32, fcvtszd, fcvtzu.
# For 32-bit signed convert, test values -1.5, INT_MAX, and INT_MIN.
# For 64-bit signed convert, test values -1.5, LONG_MAX, and LONG_MIN.
# For 32-bit unsigned convert, test values 1.5, INT... |
tactcomplabs/xbgas-binutils-gdb | 1,605 | sim/testsuite/aarch64/mls.s | # mach: aarch64
# Check the vector multiply subtract instruction: mls.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
m8b:
.word 0xf1f8fd00
.word 0xc1d0dde8
m16b:
.word 0xf1f8fd00
.word 0xc1d0dde8
.word 0x71889db0
.word 0x01203d58
m4h:
... |
tactcomplabs/xbgas-binutils-gdb | 2,948 | sim/testsuite/aarch64/ldnr.s | # mach: aarch64
# Check the load single 1-element structure and replicate to all lanes insns:
# ld1r, ld2r, ld3r, ld4r.
# Check the addressing modes: no offset, post-index immediate offset,
# post-index register offset.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0... |
tactcomplabs/xbgas-binutils-gdb | 1,510 | sim/testsuite/aarch64/adds.s | # mach: aarch64
# Check the basic integer compare instructions: adds, adds64, subs, subs64.
# For add, check value pairs 1 and -1 (Z), -1 and -1 (N), 2 and -1 (C),
# and MIN_INT and -1 (V),
# Also check -2 and 1 (not C).
# For sub, negate the second value.
.include "testutils.inc"
start
mov w0, #1
mov w1, #-1
a... |
tactcomplabs/xbgas-binutils-gdb | 3,445 | sim/testsuite/aarch64/uzp.s | # mach: aarch64
# Check the unzip instructions: uzp1, uzp2.
.include "testutils.inc"
.data
.align 4
input1:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
input2:
.word 0x14131211
.word 0x18171615
.word 0x1c1b1a19
.word 0x201f1e1d
zl8b:
.word 0x07050301
.word 0x17151311
zu8b:
.word ... |
tactcomplabs/xbgas-binutils-gdb | 1,216 | sim/testsuite/aarch64/fminnm.s | # mach: aarch64
# Check the FP min/max number instructions: fminnm, fmaxnm, dminnm, dmaxnm.
# For min, check 2/1, 1/0, -1/-Inf.
# For max, check 1/2, -1/0, 1/+inf.
.include "testutils.inc"
start
fmov s0, #2.0
fmov s1, #1.0
fminnm s2, s0, s1
fcmp s2, s1
bne .Lfailure
fmov d0, #2.0
fmov d1, #1.0
fminnm d2, d0... |
tactcomplabs/xbgas-binutils-gdb | 1,828 | sim/testsuite/aarch64/ldn_single.s | # mach: aarch64
# Check the load single 1-element structure to one lane instructions:
# ld1, ld2, ld3, ld4.
# Check the addressing modes: no offset, post-index immediate offset,
# post-index register offset.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word... |
tactcomplabs/xbgas-binutils-gdb | 2,209 | sim/testsuite/aarch64/fcmp.s | # mach: aarch64
# Check the FP compare instructions: fcmps, fcmpzs, fcmpes, fcmpzes, fcmpd,
# fcmpzd, fcmped, fcmpzed.
# For 1 operand compares, check 0, 1, -1, +Inf, -Inf.
# For 2 operand compares, check 1/1, 1/-2, -1/2, +Inf/+Inf, +Inf/-Inf.
# FIXME: Check for qNaN and sNaN when exception raising support added.
.in... |
tactcomplabs/xbgas-binutils-gdb | 1,155 | sim/testsuite/aarch64/fcmXX.s | # mach: aarch64
# Check the FP scalar compare zero instructions: fcmeq, fcmle, fcmlt, fcmge,
# fcmgt.
# Check values -1, 0, and 1.
.include "testutils.inc"
start
fmov s0, wzr
fcmeq s1, s0, #0.0
mov w0, v1.s[0]
cmp w0, #-1
bne .Lfailure
fmov s0, #-1.0
fcmeq s1, s0, #0.0
mov w0, v1.s[0]
cmp w0, #0
bne .Lfai... |
tactcomplabs/xbgas-binutils-gdb | 2,142 | sim/testsuite/aarch64/ldn_multiple.s | # mach: aarch64
# Check the load multiple structure instructions: ld1, ld2, ld3, ld4.
# Check the addressing modes: no offset, post-index immediate offset,
# post-index register offset.
.include "testutils.inc"
.data
.align 4
input:
.word 0x04030201
.word 0x08070605
.word 0x0c0b0a09
.word 0x100f0e0d
.word 0xf... |
tactcomplabs/xbgas-binutils-gdb | 3,346 | sim/testsuite/or1k/jump.S | /* Tests the jump instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your opt... |
tactcomplabs/xbgas-binutils-gdb | 1,909 | sim/testsuite/or1k/adrp.S | /* Tests the load page address instruction.
Copyright (C) 2019-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
... |
tactcomplabs/xbgas-binutils-gdb | 15,484 | sim/testsuite/or1k/shift.S | /* Tests the shift instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your op... |
tactcomplabs/xbgas-binutils-gdb | 18,041 | sim/testsuite/or1k/mul.S | /* Tests the multiply instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your... |
tactcomplabs/xbgas-binutils-gdb | 2,444 | sim/testsuite/or1k/fpu64a32-unordered.S | /* Tests some basic unordered fpu compare instructions.
Copyright (C) 2019-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the Lic... |
tactcomplabs/xbgas-binutils-gdb | 9,141 | sim/testsuite/or1k/basic.S | /* Tests some basic CPU instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at yo... |
tactcomplabs/xbgas-binutils-gdb | 6,846 | sim/testsuite/or1k/sub.S | /* Tests instruction l.sub.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option)... |
tactcomplabs/xbgas-binutils-gdb | 9,037 | sim/testsuite/or1k/flag.S | /* Tests the set flag (l.sf*) instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
... |
tactcomplabs/xbgas-binutils-gdb | 7,113 | sim/testsuite/or1k/ext.S | /* Tests the l.ext{b,h}{s,z} instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(... |
tactcomplabs/xbgas-binutils-gdb | 5,445 | sim/testsuite/or1k/mfspr.S | /* Tests instructions l.mfspr and l.mtspr.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(... |
tactcomplabs/xbgas-binutils-gdb | 6,227 | sim/testsuite/or1k/or.S | /* Tests instructions l.or, l.ori.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your ... |
tactcomplabs/xbgas-binutils-gdb | 3,423 | sim/testsuite/or1k/fpu.S | /* Tests some basic fpu instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at yo... |
tactcomplabs/xbgas-binutils-gdb | 27,149 | sim/testsuite/or1k/mac.S | /* Tests the MAC instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your opti... |
tactcomplabs/xbgas-binutils-gdb | 4,656 | sim/testsuite/or1k/ror.S | /* Tests instructions l.ror and l.rori.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at ... |
tactcomplabs/xbgas-binutils-gdb | 8,972 | sim/testsuite/or1k/div.S | /* Tests the divide instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your o... |
tactcomplabs/xbgas-binutils-gdb | 8,100 | sim/testsuite/or1k/load.S | /* Tests the load and store instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(a... |
tactcomplabs/xbgas-binutils-gdb | 6,250 | sim/testsuite/or1k/and.S | /* Tests instructions l.and, l.andi.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at you... |
tactcomplabs/xbgas-binutils-gdb | 20,517 | sim/testsuite/or1k/add.S | /* Tests instructions l.add, l.addc, l.addi and l.addic.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the Li... |
tactcomplabs/xbgas-binutils-gdb | 4,321 | sim/testsuite/or1k/fpu64a32.S | /* Tests some basic fpu instructions.
Copyright (C) 2019-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at yo... |
tactcomplabs/xbgas-binutils-gdb | 2,631 | sim/testsuite/or1k/find.S | /* Tests the find instructions.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your opt... |
tactcomplabs/xbgas-binutils-gdb | 6,252 | sim/testsuite/or1k/xor.S | /* Tests instructions l.xor, l.xori.
Copyright (C) 2017-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at you... |
tactcomplabs/xbgas-binutils-gdb | 2,315 | sim/testsuite/or1k/fpu-unordered.S | /* Tests some basic unordered fpu compare instructions.
Copyright (C) 2019-2022 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the Lic... |
tactcomplabs/xbgas-binutils-gdb | 1,283 | sim/testsuite/msp430/mpyull_hwmult.s | # Test that unsigned widening multiplication of 32-bit operands to produce a
# 64-bit result is simulated correctly, when using 32-bit or F5series hardware
# multiply functionality.
# 0xffff fffc * 0x2 = 0x1 ffff fff8
# mach: msp430
# 32-bit hwmult register addresses
.set MPY32L, 0x0140
.set MPY32H, 0x0142
.set OP2L, ... |
tactcomplabs/xbgas-binutils-gdb | 1,642 | gold/testsuite/retain_1.s | .global discard0
.section .bss.discard0,"aw"
.type discard0, %object
discard0:
.zero 2
.global discard1
.section .bss.discard1,"aw"
.type discard1, %object
discard1:
.zero 2
.global discard2
.section .data.discard2,"aw"
.type discard2, %object
discard2:
.word 1
.section .bss.sdiscard0,"aw"
.type sdisca... |
tactcomplabs/xbgas-binutils-gdb | 1,345 | gold/testsuite/thumb_blx_in_range.s | # thumb_blx_in_range.s
#
# Test THUMB/THUMB-2 blx instructions just within the branch range limits.
# Because bit 1 of the branch target comes from the branch instruction
# address, the branch range from PC (branch instruction address + 4) is
# acutally -((1<<22) + 2) to ((1<<22) - 4) for THUMB and -((1<<24) + 2) to
# ... |
tactcomplabs/xbgas-binutils-gdb | 1,433 | gold/testsuite/pr20308_gd.S | .text
.p2align 4,,15
.globl get_gd
.type get_gd, @function
get_gd:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
leal gd@tlsgd(,%ebx,1), %eax
call ___tls_get_addr@PLT
addl $8, %esp
popl %ebx
ret
.size get_gd, .-get_gd
.p2align 4,,15
.globl set_gd
.type set_gd, @f... |
tactcomplabs/xbgas-binutils-gdb | 1,116 | gold/testsuite/gnu_property_a.S | #define NT_GNU_PROPERTY_TYPE_0 5
#define GNU_PROPERTY_STACK_SIZE 1
#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEOF_PTRDIFF_T__ == 4
# define ALIGN 2
#endif
... |
tactcomplabs/xbgas-binutils-gdb | 24,567 | gold/testsuite/dwp_test_2.s | .file "dwp_test_2.cc"
.text
.Ltext0:
.section .text._Z4f13iv,"axG",@progbits,_Z4f13iv,comdat
.weak _Z4f13iv
.type _Z4f13iv, @function
_Z4f13iv:
.LFB0:
.file 1 "dwp_test.h"
.loc 1 70 0
.cfi_startproc
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cfa_register 6
.loc 1 70 0
p... |
tactcomplabs/xbgas-binutils-gdb | 1,071 | gold/testsuite/thumb_bl_in_range.s | # thumb_bl_in_range.s
# Test THUMB/THUMB-2 bl instructions just within the branch range limits.
.syntax unified
.section .text.pre,"x"
# Add padding so that target is just in branch range.
.space 8
.global _backward_target
.code 16
.thumb_func
.type _backword_target, %function
_backward_target:
bx lr
.size... |
tactcomplabs/xbgas-binutils-gdb | 1,244 | gold/testsuite/gnu_property_c.S | #define NT_GNU_PROPERTY_TYPE_0 5
#define GNU_PROPERTY_STACK_SIZE 1
#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEO... |
tactcomplabs/xbgas-binutils-gdb | 8,232 | gold/testsuite/dwp_test_1b.s | .file "dwp_test_1b.cc"
.text
.Ltext0:
.globl c3
.bss
.align 4
.type c3, @object
.size c3, 4
c3:
.zero 4
.text
.globl _Z4t16av
.type _Z4t16av, @function
_Z4t16av:
.LFB1:
.file 1 "dwp_test_1b.cc"
.loc 1 33 0
.cfi_startproc
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cf... |
tactcomplabs/xbgas-binutils-gdb | 1,549 | gold/testsuite/thumb_blx_out_of_range.s | # thumb_blx_out_of_range.s
# Test THUMB/THUMB-2 blx instructions just out of the branch range limits.
.syntax unified
.section .text.pre,"x"
# Add padding so that target is just output of branch range.
.space 4
.global _forward_target
.global _backward_target
.type _backword_target, %function
_backward_target... |
tactcomplabs/xbgas-binutils-gdb | 1,297 | gold/testsuite/thumb_bl_out_of_range_local.s | # thumb_bl_out_of_range_local.s
# Test THUMB/THUMB-2 bl instructions just out of the branch range limits
# and with local branch targets.
.syntax unified
.section .text.pre,"x"
# Add padding so that target is just output of branch range.
.space 6
.code 16
.thumb_func
.type .Lbackward_target, %function
.Lbackw... |
tactcomplabs/xbgas-binutils-gdb | 1,565 | gold/testsuite/pr20308_ld.S | .text
.p2align 4,,15
.globl get_ld
.type get_ld, @function
get_ld:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
leal ld@tlsldm(%ebx), %eax
call ___tls_get_addr@PLT
leal ld@dtpoff(%eax), %eax
addl $8, %esp
popl %ebx
ret
.size get_ld, .-get_ld
.p2align 4,,15
.glob... |
tactcomplabs/xbgas-binutils-gdb | 38,771 | gold/testsuite/dwp_test_1.s | .file "dwp_test_1.cc"
.text
.Ltext0:
.section .text._Z4f13iv,"axG",@progbits,_Z4f13iv,comdat
.weak _Z4f13iv
.type _Z4f13iv, @function
_Z4f13iv:
.LFB0:
.file 1 "dwp_test.h"
.loc 1 70 0
.cfi_startproc
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movq %rsp, %rbp
.cfi_def_cfa_register 6
.loc 1 70 0
p... |
tactcomplabs/xbgas-binutils-gdb | 1,083 | gold/testsuite/arm_thm_jump11.s | # arm_thm_jump11.s
# Test R_ARM_THM_JUMP11 relocations just within the branch range limits.
.syntax unified
.arch armv5te
.section .text.pre,"x"
# Add padding so that target is just in branch range.
.space 8
.global _backward_target
.code 16
.thumb_func
.type _backword_target, %function
_backward_target:
b... |
tactcomplabs/xbgas-binutils-gdb | 1,085 | gold/testsuite/arm_thm_jump8.s | # arm_thm_jump8.s
# Test R_ARM_THM_JUMP8 relocations just within the branch range limits.
.syntax unified
.arch armv5te
.section .text.pre,"x"
# Add padding so that target is just in branch range.
.space 8
.global _backward_target
.code 16
.thumb_func
.type _backword_target, %function
_backward_target:
bx ... |
tactcomplabs/xbgas-binutils-gdb | 22,230 | gold/testsuite/dwp_test_main.s | .file "dwp_test_main.cc"
.text
.Ltext0:
.section .rodata
.LC0:
.string "dwp_test_main.cc"
.LC1:
.string "c1.testcase1()"
.LC2:
.string "c1.t1a()"
.LC3:
.string "c1.testcase2()"
.LC4:
.string "c1.testcase3()"
.LC5:
.string "c1.testcase4()"
.LC6:
.string "c2.testcase1()"
.LC7:
.string "c2.testcase2()"
.LC8:
.... |
tactcomplabs/xbgas-binutils-gdb | 1,304 | gold/testsuite/aarch64_relocs.s | .text
test_R_AARCH64_MOVW_UABS_G0:
movz x4, :abs_g0:abs_0x1234
movz x4, :abs_g0:abs_0x1234 + 4
test_R_AARCH64_MOVW_UABS_G0_NC:
movz x4, :abs_g0_nc:abs_0x1234
movz x4, :abs_g0_nc:abs_0x1234 + 0x45000
test_R_AARCH64_MOVW_UABS_G1:
movz x4, :abs_g1:abs_0x1234 - 4
movz x4, :abs_g1:abs_0x11000
movz x4, :abs_g1:abs_... |
tactcomplabs/xbgas-binutils-gdb | 1,301 | gold/testsuite/thumb_bl_out_of_range.s | # thumb_bl_out_of_range.s
# Test THUMB/THUMB-2 bl instructions just out of the branch range limits.
.syntax unified
.section .text.pre,"x"
# Add padding so that target is just output of branch range.
.space 6
.global _backward_target
.code 16
.thumb_func
.type _backword_target, %function
_backward_target:
b... |
tactcomplabs/xbgas-binutils-gdb | 1,074 | gold/testsuite/gnu_property_b.S | #define NT_GNU_PROPERTY_TYPE_0 5
#define GNU_PROPERTY_STACK_SIZE 1
#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
#if __SIZEOF_PTRDIFF_T__ == 8
# define ALIGN 3
#elif __SIZEO... |
tactcomplabs/xbgas-binutils-gdb | 10,965 | ld/emultempl/spu_ovl.S | /* Overlay manager for SPU.
Copyright (C) 2006-2022 Free Software Foundation, Inc.
This file is part of the GNU Binutils.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either versi... |
tactcomplabs/xbgas-binutils-gdb | 6,170 | ld/testsuite/ld-i386/tlspic1.s | .section ".tdata", "awT", @progbits
.globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
.globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
.hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
sg1: .long 17
sg2: .long 18
sg3: .long 19
sg4: .long 20
sg5: .long 21
sg6: .long 22
sg7: .long 23
sg8: .long 24
sl1: .long 65
sl2: .long 66
s... |
tactcomplabs/xbgas-binutils-gdb | 1,933 | ld/testsuite/ld-i386/pr20253-1d.S | .text
.type implementation1, @function
implementation1:
movl $1, %eax
ret
.size implementation1, .-implementation1
.type implementation2, @function
implementation2:
movl $2, %eax
ret
.size implementation2, .-implementation2
.type resolver2, @function
resolver2:
call __x86.get_pc_thunk.ax
addl $_GLOBAL_OFFSE... |
tactcomplabs/xbgas-binutils-gdb | 1,034 | ld/testsuite/ld-i386/tlspie1.s | .text
.globl ___tls_get_addr
.type ___tls_get_addr, @function
___tls_get_addr:
ret
.size ___tls_get_addr, .-___tls_get_addr
.globl _start
.type _start, @function
_start:
pushl %ebp
movl %esp, %ebp
pushl %esi
pushl %ebx
call .L3
.L3:
popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-.L3], %ebx
movl %gs:foo2@NTPOFF,... |
tactcomplabs/xbgas-binutils-gdb | 3,276 | ld/testsuite/ld-i386/tlsbin.s | .section ".tbss", "awT", @nobits
.globl bg1, bg2, bg3, bg4, bg5, bg6, bg7, bg8
bg1: .space 4
bg2: .space 4
bg3: .space 4
bg4: .space 4
bg5: .space 4
bg6: .space 4
bg7: .space 4
bg8: .space 4
bl1: .space 4
bl2: .space 4
bl3: .space 4
bl4: .space 4
bl5: .space 4
bl6: .space 4
bl7: .space 4
bl8: .space 4
.text
.globl ... |
tactcomplabs/xbgas-binutils-gdb | 3,755 | ld/testsuite/ld-i386/tlsbindesc.s | /* Force .got aligned to 4K, so it very likely gets at 0x804a100
(0x60 bytes .tdata and 0xa0 bytes .dynamic) */
.section ".tdata", "awT", @progbits
.balign 4096
.globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
.globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
.hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
sg1: .lon... |
tactcomplabs/xbgas-binutils-gdb | 3,888 | ld/testsuite/ld-i386/tlsbinpic2.s | /* Force .got aligned to 4K, so it very likely gets at 0x804a100
(0x60 bytes .tdata and 0xa0 bytes .dynamic) */
.section ".tdata", "awT", @progbits
.balign 4096
.globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
.globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
.hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
sg1: .lon... |
tactcomplabs/xbgas-binutils-gdb | 6,038 | ld/testsuite/ld-i386/tlsdesc.s | .section ".tdata", "awT", @progbits
.globl sg1, sg2, sg3, sg4, sg5, sg6, sg7, sg8
.globl sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
.hidden sh1, sh2, sh3, sh4, sh5, sh6, sh7, sh8
sg1: .long 17
sg2: .long 18
sg3: .long 19
sg4: .long 20
sg5: .long 21
sg6: .long 22
sg7: .long 23
sg8: .long 24
sl1: .long 65
sl2: .long 66
s... |
tactcomplabs/xbgas-binutils-gdb | 1,792 | ld/testsuite/ld-i386/tlsgdesc.s | .text
.globl fc1
.type fc1,@function
fc1:
pushl %ebp
movl %esp, %ebp
pushl %ebx
pushl %eax
call 1f
1: popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-1b], %ebx
nop;nop;nop;nop
/* @gottpoff IE against global var */
movl %gs:0, %ecx
nop;nop
subl sG3@gottpoff(%ebx), %ecx
nop;nop;nop;nop
/* @gotntpoff IE agains... |
tactcomplabs/xbgas-binutils-gdb | 2,792 | ld/testsuite/ld-i386/compressed1.s | .file "compressed1.c"
.section .debug_abbrev,"",@progbits
.Ldebug_abbrev0:
.section .debug_info,"",@progbits
.Ldebug_info0:
.section .debug_line,"",@progbits
.Ldebug_line0:
.text
.Ltext0:
.cfi_sections .debug_frame
.p2align 4,,15
.globl foo
.type foo, @function
foo:
.LFB0:
.file 1 "compressed1.c"
.loc 1 12 0
... |
tactcomplabs/xbgas-binutils-gdb | 1,046 | ld/testsuite/ld-i386/pr20253-1b.S | .section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "PASS"
.text
.globl check
.type check, @function
check:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
call *get_func1@GOT(%ebx)
#ifdef CHECK_PLT
cmpl $func1, %eax
#else
cmpl func1@GOT(%ebx), %eax
#endif
jne .L3
... |
tactcomplabs/xbgas-binutils-gdb | 1,122 | ld/testsuite/ld-i386/load1.s | .data
.type bar, @object
bar:
.byte 1
.size bar, .-bar
.globl foo
.type foo, @object
foo:
.byte 1
.size foo, .-foo
.text
.globl _start
.type _start, @function
_start:
movl bar@GOT(%ecx), %eax
adcl bar@GOT(%ecx), %eax
addl bar@GOT(%ecx), %ebx
andl bar@GOT(%ecx), %ecx
cmpl bar@GOT(%ecx), %edx
orl bar@GOT... |
tactcomplabs/xbgas-binutils-gdb | 1,382 | ld/testsuite/ld-i386/tls-gd1.S | .text
.p2align 4,,15
.globl get_gd
.type get_gd, @function
get_gd:
pushl %ebx
call __x86.get_pc_thunk.bx
addl $_GLOBAL_OFFSET_TABLE_, %ebx
subl $8, %esp
leal gd@tlsgd(,%ebx,1), %eax
call ___tls_get_addr@PLT
addl $8, %esp
popl %ebx
ret
.size get_gd, .-get_gd
.p2align 4,,15
.globl set_gd
.type set_gd, @f... |
tactcomplabs/xbgas-binutils-gdb | 1,043 | ld/testsuite/ld-i386/tlspie3.s | .text
.globl ___tls_get_addr
.type ___tls_get_addr, @function
___tls_get_addr:
ret
.size ___tls_get_addr, .-___tls_get_addr
.globl _start
.type _start, @function
_start:
pushl %ebp
movl %esp, %ebp
pushl %esi
pushl %ebx
call .L3
.L3:
popl %ebx
addl $_GLOBAL_OFFSET_TABLE_+[.-.L3], %ebx
movl %gs:foo2@NTPOFF,... |
tactcomplabs/xbgas-binutils-gdb | 2,027 | ld/testsuite/ld-i386/tlsnopic1.s | .section ".data.rel.ro", "aw", @progbits
/* Align, so that .got is likely at address 0x2080. */
.balign 4096
.section ".tbss", "awT", @nobits
bl1: .space 4
bl2: .space 4
bl3: .space 4
bl4: .space 4
bl5: .space 4
.text
/* Align, so that fn3 is likely at address 0x1000. */
.balign 4096
.globl fn3
.type fn3,@fu... |
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