repo_id
string
size
int64
file_path
string
content
string
Lind-Project/wasmtime
4,052
crates/wasmtime/src/runtime/vm/arch/s390x.S
// Currently `global_asm!` isn't stable on s390x, so this is an external // assembler file built with the `build.rs`. .machine z13 .text .hidden host_to_wasm_trampoline .globl host_to_wasm_trampoline .type host_to_wasm_trampoline,@function .p2align 2 #define CONCAT2(a,...
listentodella/rCore-Study
2,599
os/src/trap/trap.S
// 首先通过 __alltraps 将 Trap 上下文保存在内核栈上 // 然后跳转到使用 Rust 编写的 trap_handler 函数完成 Trap 分发及处理 // 当 trap_handler 返回之后,使用 __restore 从保存在内核栈上的 Trap 上下文恢复寄存器 // 最后通过一条 sret 指令回到应用程序执 //加上 .altmacro 才能正常使用 .rept 命令 .altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text ...
listentodella/rCore-Study
1,273
myos/mysbi/src/sbi_entry.S
// 加上 .altmacro 才能正常使用 .rept 命令 .altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm /* sbi_exception_vector M模式的异常向量入口 8字节对齐 */ .align 3 .global sbi_exception_vector sbi_exception_vector: // 从mscratch获取M模式之前备份的sp // 并将S模式的sp保存到mscratch csrrw sp, mscratch, sp...
listentodella/rCore-Study
1,172
myos/os/src/entry.S
// 加上 .altmacro 才能正常使用 .rept 命令 .altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .macro kernel_entry // sepc + x1~x31 + sstatus + sbadaddr + scause + orig_a0 = 36 // orig_a0 is the value before syscall, just a sw backup, can remove it addi sp, sp, -36*8 sd x1, 1*8(sp...
listentodella/rCore-Study
1,231
myos/os/src/base/asm_test.S
.align 3 .globl my_test_data my_test_data: .dword 0x12345678abcdabcd .global load_store_test .global compare_and_return load_store_test: li t0, 0x80200000 lb t1, (t0) lb t1, 4(t0) lb t1, -4(t0) ld t1, (t0) lb t1, 4(t0) lui t0, 0x80200 lui t1, 0x40200 la t0, my_test_data lla t1, my_test_data ret ....
listline/arceos-driver
2,001
modules/axhal/linker.lds.S
OUTPUT_ARCH(%ARCH%) BASE_ADDRESS = %KERNEL_BASE%; ENTRY(_start) SECTIONS { . = BASE_ADDRESS; _skernel = .; .text : ALIGN(4K) { _stext = .; *(.text.boot) *(.text .text.*) . = ALIGN(4K); _etext = .; } _srodata = .; .rodata : ALIGN(4K) { *(.rodata...
listline/arceos-driver
4,325
modules/axhal/src/platform/x86_pc/multiboot.S
# Bootstrapping from 32-bit with the Multiboot specification. # See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html .section .text.boot .code32 .global _start _start: mov edi, eax # arg1: magic: 0x2BADB002 mov esi, ebx # arg2: multiboot info jmp bsp_entry32 .bal...
listline/arceos-driver
1,965
modules/axhal/src/platform/x86_pc/ap_start.S
# Boot application processors into the protected mode. # Each non-boot CPU ("AP") is started up in response to a STARTUP # IPI from the boot CPU. Section B.4.2 of the Multi-Processor # Specification says that the AP will start in real mode with CS:IP # set to XY00:0000, where XY is an 8-bit value sent with the # STAR...
listline/Arceos-visor
2,001
modules/axhal/linker.lds.S
OUTPUT_ARCH(%ARCH%) BASE_ADDRESS = %KERNEL_BASE%; ENTRY(_start) SECTIONS { . = BASE_ADDRESS; _skernel = .; .text : ALIGN(4K) { _stext = .; *(.text.boot) *(.text .text.*) . = ALIGN(4K); _etext = .; } _srodata = .; .rodata : ALIGN(4K) { *(.rodata...
listline/arceos-driver
2,544
tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s
// SPDX-License-Identifier: MIT OR Apache-2.0 // // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com> //-------------------------------------------------------------------------------------------------- // Definitions //-----------------------------------------------------------------------------------...
listline/Arceos-visor
4,325
modules/axhal/src/platform/x86_pc/multiboot.S
# Bootstrapping from 32-bit with the Multiboot specification. # See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html .section .text.boot .code32 .global _start _start: mov edi, eax # arg1: magic: 0x2BADB002 mov esi, ebx # arg2: multiboot info jmp bsp_entry32 .bal...
listline/Arceos-visor
1,965
modules/axhal/src/platform/x86_pc/ap_start.S
# Boot application processors into the protected mode. # Each non-boot CPU ("AP") is started up in response to a STARTUP # IPI from the boot CPU. Section B.4.2 of the Multi-Processor # Specification says that the AP will start in real mode with CS:IP # set to XY00:0000, where XY is an 8-bit value sent with the # STAR...
listline/Arceos-visor
1,705
modules/axhal/src/arch/loongarch64/trap.S
.macro SAVE_REGS, from_user move $t0, $sp .if \from_user == 1 csrrd $sp, KSAVE_KSP // restore kernel sp addi.d $sp, $sp, -{trapframe_size} STD $tp, $sp, 2 STD $r21, $sp, 21 csrrd $tp, KSAVE_TP csrrd $r21, KSAVE_R21 .else addi.d $sp, $sp, -{trap...
listline/Arceos-visor
1,839
modules/axhal/src/arch/riscv/trap.S
.macro SAVE_REGS, from_user addi sp, sp, -{trapframe_size} PUSH_GENERAL_REGS csrr t0, sepc csrr t1, sstatus csrrw t2, sscratch, zero // save sscratch (sp) and zero it STR t0, sp, 31 // tf.sepc STR t1, sp, 32 // tf.sstatus STR...
listline/Arceos-visor
1,339
modules/axhal/src/arch/x86_64/syscall.S
.section .text .code64 syscall_entry: swapgs // switch to kernel gs mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp // save user rsp mov rsp, gs:[offset __PERCPU_TSS + {tss_rsp0_offset}] // switch to kernel stack sub rsp, 8 ...
listline/Arceos-visor
1,505
modules/axhal/src/arch/x86_64/trap.S
.equ NUM_INT, 256 .altmacro .macro DEF_HANDLER, i .Ltrap_handler_\i: .if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17 # error code pushed by CPU push \i # interrupt vector jmp .Ltrap_common .else push 0 # fill in error code in TrapFrame push \i # interrupt ...
listline/Arceos-visor
2,616
modules/axhal/src/arch/aarch64/trap.S
.macro SAVE_REGS sub sp, sp, 34 * 8 stp x0, x1, [sp] stp x2, x3, [sp, 2 * 8] stp x4, x5, [sp, 4 * 8] stp x6, x7, [sp, 6 * 8] stp x8, x9, [sp, 8 * 8] stp x10, x11, [sp, 10 * 8] stp x12, x13, [sp, 12 * 8] stp x14, x15, [sp, 14 * 8] stp x16, x...
listline/Arceos-visor
2,544
tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s
// SPDX-License-Identifier: MIT OR Apache-2.0 // // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com> //-------------------------------------------------------------------------------------------------- // Definitions //-----------------------------------------------------------------------------------...
LittleLucifer1/duckos
1,151
os/src/entry.S
.section .text.entry .globl _start _start: # hart_id is in a0, a0 --> tp # pc = 0x8020_0000 # 1.According to hart_id, set sp to the top la sp, boot_stack_top mv tp, a0 slli t0, tp, 16 # 内核栈大小size: (4096 * 16) sub sp, sp, t0 # 2.set table & satp # satp: 8 << 60 | boot_pa...
LittleLucifer1/duckos
1,894
os/src/process/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 # stvec中的BASE必须保证是4字节对齐!因为BASE中表示的地址默认后两位为0 # TODO:暂时没有考虑中断嵌套的问题,如果 U -> S -> S 那会发生什么? __alltraps: # 不能使用spp来判断,因为此时没有空余的寄存器可以使用 # 于是这里把sp...
LittleLucifer1/duckos
17,376
dependency/riscv/asm.S
#include "asm.h" .section .text.__ebreak .global __ebreak __ebreak: ebreak ret .section .text.__wfi .global __wfi __wfi: wfi ret .section .text.__sfence_vma_all .global __sfence_vma_all __sfence_vma_all: sfence.vma ret .section .text.__sfence_vma .global __sfence_vma __sfence_vma: sfence...
Littlew0od/OSKernel2023-Main.os-2-1-1-
1,791
kernel/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text.trampoline .globl __alltraps .globl __restore .align 2 __alltraps: csrrw sp, sscratch, sp # now sp->*TrapContext in user space, sscratch->user stack # save other general purpose r...
Littlew0od/OSKernel2023-Main.os-2-1-1-
17,376
dependency/riscv/asm.S
#include "asm.h" .section .text.__ebreak .global __ebreak __ebreak: ebreak ret .section .text.__wfi .global __wfi __wfi: wfi ret .section .text.__sfence_vma_all .global __sfence_vma_all __sfence_vma_all: sfence.vma ret .section .text.__sfence_vma .global __sfence_vma __sfence_vma: sfence...
LiuJun5817/rbpf-main
8,125
execution.s
.text .file "execution.7e26790a3db53ff8-cgu.0" .section .text._ZN3std2rt10lang_start17hb21359643fb4ec85E,"ax",@progbits .hidden _ZN3std2rt10lang_start17hb21359643fb4ec85E .globl _ZN3std2rt10lang_start17hb21359643fb4ec85E .p2align 4, 0x90 .type _ZN3std2rt10lang_start17hb21359643fb4ec85E,@function _ZN3std2rt10lang...
llb1238/NPUCORE_2025_npu123team
4,264
os/src/hal/arch/loongarch64/trap/trap.S
FP_START = 32 .altmacro .macro SAVE_GP n st.d $r\n, $sp, \n*8 .endm .macro LOAD_GP n ld.d $r\n, $sp, \n*8 .endm .macro SAVE_FP n, m fst.d $f\n, $sp, \m*8 .endm .macro LOAD_FP n, m fld.d $f\n, $sp, \m*8 .endm .section .text.trampoline .globl __alltraps .globl __restore .align 2 .equ CSR_S...
llb1238/NPUCORE_2025_npu123team
2,157
os/src/hal/arch/riscv/trap/trap.S
.attribute arch, "rv64gc" FP_START = 32 .altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .macro SAVE_FP n, m fsd f\n, \m*8(sp) .endm .macro LOAD_FP n, m fld f\n, \m*8(sp) .endm .section .text.trampoline .globl __alltraps .globl __restore .align 2 ...
llb1238/NPUCORE_2025_npu123team
17,376
dependency/riscv/asm.S
#include "asm.h" .section .text.__ebreak .global __ebreak __ebreak: ebreak ret .section .text.__wfi .global __wfi __wfi: wfi ret .section .text.__sfence_vma_all .global __sfence_vma_all __sfence_vma_all: sfence.vma ret .section .text.__sfence_vma .global __sfence_vma __sfence_vma: sfence...
llb1238/NPUCORE_2025_npu123team
3,187
dependency/virtio-drivers/examples/x86_64/src/multiboot.S
# Bootstrapping from 32-bit with the Multiboot specification. # See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html .section .text.entry .code32 .global _start _start: mov ecx, {mb_magic} cmp ecx, eax jnz 1f mov edi, ebx # arg1: multiboot info jmp entry3...
LogicLanedeng/LogicLanedeng
1,854
examples/a.s
.file "a.c" .text .globl amazing_func .def amazing_func; .scl 2; .type 32; .endef .seh_proc amazing_func amazing_func: pushq %rbp .seh_pushreg %rbp movq %rsp, %rbp .seh_setframe %rbp, 0 subq $16, %rsp .seh_stackalloc 16 .seh_endprologue movl %ecx, 16(%rbp) movl 16(%rbp), %eax movl %eax, -4(%rbp) movl -4...
lululalulula/roadmap
14,578
Roadmap/01 - OPERADORES Y ESTRUCTURAS DE CONTROL/nasm/evanz2608.s
; https://www.nasm.us/ ; ====================================================================================================================== ; Testeado en Arch linux. No lo he testeado en otras distribuciones. ; Para ensamblar: nasm -f elf64 -o evanz1902.o evanz1902.s ; Para linkear y generar el ejecutable: ld -o ...
lululalulula/roadmap
2,693
Roadmap/00 - SINTAXIS, VARIABLES, TIPOS DE DATOS Y HOLA MUNDO/nasm/evanz2608.s
; https://www.nasm.us/ ; IMPORTANTE ; ============================================================================================= ; Aclarar que NASM es uno de los ensambladores que existen y no el lenguaje en si, ; aunque cada ensamblador define una sintaxis, en ensamblador las instrucciones son las mismas, ; y solo...
lunalunaa/lunaris
4,235
src/kernel/asm/boot.S
// SPDX-License-Identifier: MIT OR Apache-2.0 // // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com> //-------------------------------------------------------------------------------------------------- // Definitions //-----------------------------------------------------------------------------------...
lunalunaa/lunaris
1,190
src/kernel/asm/switch.S
// switch(old_context, new_context) // should only need to save callee saved registers? // this switches from kernel to user .section .text __switch_to_task: stp x19, x20, [x0, #0] stp x21, x22, [x0, #16] stp x23, x24, [x0, #32] stp x25, x26, [x0, #48] stp x27, x28, [x0, #64] stp x29, x30, [x0, ...
lunalunaa/lunaris
2,250
src/kernel/asm/exception.S
// Typical exception vector table code. .section .text .align 11 vector_table_start: .org 0x000 curr_el_sp0_sync: b __syscall_handler .org 0x080 b __syscall_handler .org 0x100 b __syscall_handler .org 0x180 b __syscall_handler // Current exception level with SP_ELx, x > 0. .org 0x200 b __syscall_handler .o...
lunarforky-z/octopus-rust1
2,134
src/arch/x86_64/start.s
.set PIC1_DATA_PORT, 0x21 .set PIC2_DATA_PORT, 0xA1 .set CR0_PG, 1 << 31 .set CR4_PAE, 1 << 5 .set CR4_OSFXSR, 1 << 9 .set PTE_PRESENT, 1 << 0 .set PTE_WRITE, 1 << 1 .set PTE_PS, 1 << 7 .set MSR_EFER, 0xC0000080 .set MSR_EFER_LME, 1 << 8 .set GDT_TYPE_DATA, 0x2 << 40 ...
luque667788/RaspiBareMetal
1,372
src/boot.S
// --- Boot section for Raspberry Pi 4 (AArch64) --- .section ".text.boot" .global _start // Entry point _start: // Only run on core 0; others wait forever mrs x1, mpidr_el1 and x1, x1, #3 // Mask for core ID cbz x1, 2f // If core 0, continue //q:what cbz 2f means. a: // If ...
luvroc/rCore-Tutorial-2024S
2,894
ch3/os/src/link_app.S
.align 3 .section .data .global _num_app _num_app: .quad 13 .quad app_0_start .quad app_1_start .quad app_2_start .quad app_3_start .quad app_4_start .quad app_5_start .quad app_6_start .quad app_7_start .quad app_8_start .quad app_9_start .quad app_10_start ...
luvroc/rCore-Tutorial-2024S
1,488
ch3/os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 __alltraps: csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, s...
lululalulula/roadmap
14,578
Roadmap/01 - OPERADORES Y ESTRUCTURAS DE CONTROL/nasm/evanz2608.s
; https://www.nasm.us/ ; ====================================================================================================================== ; Testeado en Arch linux. No lo he testeado en otras distribuciones. ; Para ensamblar: nasm -f elf64 -o evanz1902.o evanz1902.s ; Para linkear y generar el ejecutable: ld -o ...
lululalulula/roadmap
2,693
Roadmap/00 - SINTAXIS, VARIABLES, TIPOS DE DATOS Y HOLA MUNDO/nasm/evanz2608.s
; https://www.nasm.us/ ; IMPORTANTE ; ============================================================================================= ; Aclarar que NASM es uno de los ensambladores que existen y no el lenguaje en si, ; aunque cada ensamblador define una sintaxis, en ensamblador las instrucciones son las mismas, ; y solo...
lunalunaa/lunaris
4,235
src/kernel/asm/boot.S
// SPDX-License-Identifier: MIT OR Apache-2.0 // // Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com> //-------------------------------------------------------------------------------------------------- // Definitions //-----------------------------------------------------------------------------------...
lunalunaa/lunaris
1,190
src/kernel/asm/switch.S
// switch(old_context, new_context) // should only need to save callee saved registers? // this switches from kernel to user .section .text __switch_to_task: stp x19, x20, [x0, #0] stp x21, x22, [x0, #16] stp x23, x24, [x0, #32] stp x25, x26, [x0, #48] stp x27, x28, [x0, #64] stp x29, x30, [x0, ...
lunalunaa/lunaris
2,250
src/kernel/asm/exception.S
// Typical exception vector table code. .section .text .align 11 vector_table_start: .org 0x000 curr_el_sp0_sync: b __syscall_handler .org 0x080 b __syscall_handler .org 0x100 b __syscall_handler .org 0x180 b __syscall_handler // Current exception level with SP_ELx, x > 0. .org 0x200 b __syscall_handler .o...
lunarforky-z/octopus-rust1
2,134
src/arch/x86_64/start.s
.set PIC1_DATA_PORT, 0x21 .set PIC2_DATA_PORT, 0xA1 .set CR0_PG, 1 << 31 .set CR4_PAE, 1 << 5 .set CR4_OSFXSR, 1 << 9 .set PTE_PRESENT, 1 << 0 .set PTE_WRITE, 1 << 1 .set PTE_PS, 1 << 7 .set MSR_EFER, 0xC0000080 .set MSR_EFER_LME, 1 << 8 .set GDT_TYPE_DATA, 0x2 << 40 ...
luque667788/RaspiBareMetal
1,372
src/boot.S
// --- Boot section for Raspberry Pi 4 (AArch64) --- .section ".text.boot" .global _start // Entry point _start: // Only run on core 0; others wait forever mrs x1, mpidr_el1 and x1, x1, #3 // Mask for core ID cbz x1, 2f // If core 0, continue //q:what cbz 2f means. a: // If ...
luvroc/rCore-Tutorial-2024S
2,894
ch3/os/src/link_app.S
.align 3 .section .data .global _num_app _num_app: .quad 13 .quad app_0_start .quad app_1_start .quad app_2_start .quad app_3_start .quad app_4_start .quad app_5_start .quad app_6_start .quad app_7_start .quad app_8_start .quad app_9_start .quad app_10_start ...
luvroc/rCore-Tutorial-2024S
1,488
ch3/os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text .globl __alltraps .globl __restore .align 2 __alltraps: csrrw sp, sscratch, sp # now sp->kernel stack, sscratch->user stack # allocate a TrapContext on kernel stack addi sp, s...
lwx270901/registryintern
1,569
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/riscv64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
lwx270901/registryintern
1,571
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/riscv.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
lwx270901/registryintern
1,971
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/aarch_aapcs64.s
#include "psm.h" .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define END_FUNCTION(fnname) #elif CFG_TARGET_OS_windows #define GLOBL(fnname) .globl fnname #define TYPE(fnname) #define FUNCTI...
lwx270901/registryintern
2,299
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/arm_aapcs.s
#include "psm.h" .text .syntax unified #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define THUMBTYPE(fnname) .thumb_func _##fnname #define FUNCTION(fnname) _##fnname #define THUMBFN .code 16 #define SIZE(fnname,endlabel) #define FNSTART #define CANTUNWI...
lwx270901/registryintern
2,557
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/x86.s
#include "psm.h" /* NOTE: fastcall calling convention used on all x86 targets */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define SIZE(fnname,endlabel) #else #define GLOBL(fnname) .globl...
lwx270901/registryintern
3,609
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/powerpc64_aix.s
.csect .text[PR],2 .file "powerpc64_aix.s" .globl rust_psm_stack_direction[DS] .globl .rust_psm_stack_direction .align 4 .csect rust_psm_stack_direction[DS],3 .vbyte 8, .rust_psm_stack_direction .vbyte 8, TOC[TC0] .vbyte 8, 0 .csect .text[PR],2 .rust_psm_stack_direction: # extern "C" fn() -> u8 li 3, 2 blr L..r...
lwx270901/registryintern
2,045
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/powerpc64_openpower.s
/* Implementation of stack swtiching routines for OpenPOWER 64-bit ELF ABI The specification can be found at http://openpowerfoundation.org/wp-content/uploads/resources/leabi/content/ch_preface.html This ABI is usually used by the ppc64le targets. */ #include "psm.h" .text .abiversion 2 .globl rust_psm_st...
lwx270901/registryintern
2,218
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/x86_64_windows_gnu.s
.text .def rust_psm_stack_direction .scl 2 .type 32 .endef .globl rust_psm_stack_direction .p2align 4 rust_psm_stack_direction: /* extern "sysv64" fn() -> u8 (%al) */ .cfi_startproc movb $2, %al # always descending on x86_64 retq .cfi_endproc .def rust_psm_stack_pointer .scl 2 .type 32 .endef .globl rust_psm_...
lwx270901/registryintern
2,541
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/powerpc64.s
/* Implementation of the AIX-like PowerPC ABI. Seems to be used by the big-endian PowerPC targets. The following references were used during the implementation of this code: https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.alangref/idalangref_rntime_stack.htm https://www.ibm.com/support/k...
lwx270901/registryintern
2,264
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/x86_windows_gnu.s
/* FIXME: this works locally but not on appveyor??!? */ /* NOTE: fastcall calling convention used on all x86 targets */ .text .def @rust_psm_stack_direction@0 .scl 2 .type 32 .endef .globl @rust_psm_stack_direction@0 .p2align 4 @rust_psm_stack_direction@0: /* extern "fastcall" fn() -> u8 (%al) */ .cfi_startproc mo...
lwx270901/registryintern
1,938
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/sparc64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_sta...
lwx270901/registryintern
2,144
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/mips64_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
lwx270901/registryintern
2,094
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/x86_64.s
#include "psm.h" /* NOTE: sysv64 calling convention is used on all x86_64 targets, including Windows! */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define END_FUNCTION(fnname) #else #defi...
lwx270901/registryintern
2,149
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/mips_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
lwx270901/registryintern
1,568
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/loongarch64.s
#include "psm.h" .text .globl rust_psm_stack_direction .align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li.w $r4, STACK_DIRECTION_DESCENDING jr $r1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction...
lwx270901/registryintern
1,722
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/sparc_sysv.s
#include "psm.h" /* FIXME: this ABI has definitely not been verified at all */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_di...
lwx270901/registryintern
1,694
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/wasm32.s
#include "psm.h" # Note that this function is not compiled when this package is uploaded to # crates.io, this source is only here as a reference for how the corresponding # wasm32.o was generated. This file can be compiled with: # # cpp psm/src/arch/wasm32.s | llvm-mc -o psm/src/arch/wasm32.o --arch=wasm32 -filetyp...
lwx270901/registryintern
2,080
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/zseries_linux.s
/* Implementation of stack swtiching routines for zSeries LINUX ABI. This ABI is used by the s390x-unknown-linux-gnu target. Documents used: * LINUX for zSeries: ELF Application Binary Interface Supplement (1st ed., 2001) (LNUX-1107-01) * z/Architecture: Principles of Operation (4th ed., 2004) (SA22-7832...
lwx270901/registryintern
1,963
home/minh/.cargo/registry/src/index.crates.io-6f17d22bba15001f/psm-0.1.23/src/arch/powerpc32.s
#include "psm.h" /* FIXME: this probably does not cover all ABIs? Tested with sysv only, possibly works for AIX as well? */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li 3, STACK_DIRECTION_DESCEND...
lwx270901/registryintern
1,118
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/generator-0.7.5/src/detail/asm/asm_x86_64_sysv_elf_gas.S
.text .globl prefetch .type prefetch,@function .align 16 prefetch: prefetcht2 (%rdi) ret .size prefetch,.-prefetch .text .globl bootstrap_green_task .type bootstrap_green_task,@function .align 16 bootstrap_green_task: mov %r12, %rdi /* setup the function arg */ mov %r13, %rsi /* setup the funct...
lwx270901/registryintern
1,242
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/generator-0.7.5/src/detail/asm/asm_aarch64_aapcs_elf_gas.S
.text .globl prefetch .type prefetch,@function .align 16 prefetch: prfm pldl1keep, [x0] ret .size prefetch,.-prefetch .text .globl bootstrap_green_task .type bootstrap_green_task,@function .align 16 bootstrap_green_task: mov x0, x19 // arg0 mov x1, x20 // arg1 mov x30, #0 // clear LR ret ...
lwx270901/registryintern
1,569
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/riscv64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
lwx270901/registryintern
1,571
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/riscv.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li x10, STACK_DIRECTION_DESCENDING jr x1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction_...
lwx270901/registryintern
1,971
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/aarch_aapcs64.s
#include "psm.h" .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define END_FUNCTION(fnname) #elif CFG_TARGET_OS_windows #define GLOBL(fnname) .globl fnname #define TYPE(fnname) #define FUNCTI...
lwx270901/registryintern
2,299
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/arm_aapcs.s
#include "psm.h" .text .syntax unified #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define THUMBTYPE(fnname) .thumb_func _##fnname #define FUNCTION(fnname) _##fnname #define THUMBFN .code 16 #define SIZE(fnname,endlabel) #define FNSTART #define CANTUNWI...
lwx270901/registryintern
2,557
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/x86.s
#include "psm.h" /* NOTE: fastcall calling convention used on all x86 targets */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define SIZE(fnname,endlabel) #else #define GLOBL(fnname) .globl...
lwx270901/registryintern
3,609
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/powerpc64_aix.s
.csect .text[PR],2 .file "powerpc64_aix.s" .globl rust_psm_stack_direction[DS] .globl .rust_psm_stack_direction .align 4 .csect rust_psm_stack_direction[DS],3 .vbyte 8, .rust_psm_stack_direction .vbyte 8, TOC[TC0] .vbyte 8, 0 .csect .text[PR],2 .rust_psm_stack_direction: # extern "C" fn() -> u8 li 3, 2 blr L..r...
lwx270901/registryintern
2,045
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/powerpc64_openpower.s
/* Implementation of stack swtiching routines for OpenPOWER 64-bit ELF ABI The specification can be found at http://openpowerfoundation.org/wp-content/uploads/resources/leabi/content/ch_preface.html This ABI is usually used by the ppc64le targets. */ #include "psm.h" .text .abiversion 2 .globl rust_psm_st...
lwx270901/registryintern
2,218
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/x86_64_windows_gnu.s
.text .def rust_psm_stack_direction .scl 2 .type 32 .endef .globl rust_psm_stack_direction .p2align 4 rust_psm_stack_direction: /* extern "sysv64" fn() -> u8 (%al) */ .cfi_startproc movb $2, %al # always descending on x86_64 retq .cfi_endproc .def rust_psm_stack_pointer .scl 2 .type 32 .endef .globl rust_psm_...
lwx270901/registryintern
2,541
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/powerpc64.s
/* Implementation of the AIX-like PowerPC ABI. Seems to be used by the big-endian PowerPC targets. The following references were used during the implementation of this code: https://www.ibm.com/support/knowledgecenter/en/ssw_aix_72/com.ibm.aix.alangref/idalangref_rntime_stack.htm https://www.ibm.com/support/k...
lwx270901/registryintern
2,264
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/x86_windows_gnu.s
/* FIXME: this works locally but not on appveyor??!? */ /* NOTE: fastcall calling convention used on all x86 targets */ .text .def @rust_psm_stack_direction@0 .scl 2 .type 32 .endef .globl @rust_psm_stack_direction@0 .p2align 4 @rust_psm_stack_direction@0: /* extern "fastcall" fn() -> u8 (%al) */ .cfi_startproc mo...
lwx270901/registryintern
1,938
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/sparc64.s
#include "psm.h" .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_sta...
lwx270901/registryintern
2,144
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/mips64_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
lwx270901/registryintern
2,094
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/x86_64.s
#include "psm.h" /* NOTE: sysv64 calling convention is used on all x86_64 targets, including Windows! */ .text #if CFG_TARGET_OS_darwin || CFG_TARGET_OS_macos || CFG_TARGET_OS_ios #define GLOBL(fnname) .globl _##fnname #define TYPE(fnname) #define FUNCTION(fnname) _##fnname #define END_FUNCTION(fnname) #else #defi...
lwx270901/registryintern
2,149
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/mips_eabi.s
/* Not only MIPS has 20 different ABIs... nobody tells anybody what specific variant of which ABI is used where. This is an "EABI" implementation based on the following page: http://www.cygwin.com/ml/binutils/2003-06/msg00436.html */ #include "psm.h" .set noreorder /* we’ll manage the delay slots on our own, thanks...
lwx270901/registryintern
1,568
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/loongarch64.s
#include "psm.h" .text .globl rust_psm_stack_direction .align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li.w $r4, STACK_DIRECTION_DESCENDING jr $r1 .rust_psm_stack_direction_end: .size rust_psm_stack_direction,.rust_psm_stack_direction...
lwx270901/registryintern
1,722
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/sparc_sysv.s
#include "psm.h" /* FIXME: this ABI has definitely not been verified at all */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc jmpl %o7 + 8, %g0 mov STACK_DIRECTION_DESCENDING, %o0 .rust_psm_stack_di...
lwx270901/registryintern
1,694
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/wasm32.s
#include "psm.h" # Note that this function is not compiled when this package is uploaded to # crates.io, this source is only here as a reference for how the corresponding # wasm32.o was generated. This file can be compiled with: # # cpp psm/src/arch/wasm32.s | llvm-mc -o psm/src/arch/wasm32.o --arch=wasm32 -filetyp...
lwx270901/registryintern
2,080
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/zseries_linux.s
/* Implementation of stack swtiching routines for zSeries LINUX ABI. This ABI is used by the s390x-unknown-linux-gnu target. Documents used: * LINUX for zSeries: ELF Application Binary Interface Supplement (1st ed., 2001) (LNUX-1107-01) * z/Architecture: Principles of Operation (4th ed., 2004) (SA22-7832...
lwx270901/registryintern
1,963
home/minh/.cargo/registry/src/index.crates.io-1949cf8c6b5b557f/psm-0.1.23/src/arch/powerpc32.s
#include "psm.h" /* FIXME: this probably does not cover all ABIs? Tested with sysv only, possibly works for AIX as well? */ .text .globl rust_psm_stack_direction .p2align 2 .type rust_psm_stack_direction,@function rust_psm_stack_direction: /* extern "C" fn() -> u8 */ .cfi_startproc li 3, STACK_DIRECTION_DESCEND...
lythesia/rcore-os
2,790
os/src/trap/trap.S
.altmacro .macro SAVE_GP n sd x\n, \n*8(sp) .endm .macro LOAD_GP n ld x\n, \n*8(sp) .endm .section .text.trampoline .globl __alltraps .globl __restore .globl __alltraps_k .globl __restore_k // __alltraps 的地址 4 字节对齐,这是 RISC-V 特权级规范的要求 .align 2 __alltraps: csrrw sp, sscratch, sp...
MabaKalox/srop_task
1,505
main.S
#include <asm/unistd.h> .intel_syntax noprefix .global _start # calling convention here is: # args in RSI, RDX, result in RAX # because it is convenient with syscalls # which registers are preserved is not really defined, I'm lazy .text _start: mov RSI, offset greeting mov RDX, 7 call w...
mag1c1an1/hypercraft
4,928
src/arch/riscv/guest.S
/// Enter the guest given in `VmCpuRegisters` from `a0` .global _run_guest _run_guest: /* Save hypervisor state */ /* Save hypervisor GPRs (except T0-T6 and a0, which is GuestInfo and stashed in sscratch) */ sd ra, ({hyp_ra})(a0) sd gp, ({hyp_gp})(a0) sd tp, ({hyp_tp})(a0) sd s0, ({hyp...
mag1c1an1/hypercraft
3,397
src/arch/riscv/mem_extable.S
// Copyright (c) 2022 by Rivos Inc. // Licensed under the Apache License, Version 2.0, see LICENSE for details. // SPDX-License-Identifier: Apache-2.0 // Very unoptimized memcpy() to/from guest memory functions, using the HLV/HSV instructions. // Adds the instruction at 'lbl' to the exception table. .macro add_extabl...
mag1c1an1/hypercraft
5,858
src/arch/aarch64/memset.S
/* Copyright (c) 2012-2013, Linaro Limited All rights reserved. Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: * Redistributions of source code must retain the above copyright notice, this list of co...
mag1c1an1/hypercraft
3,611
src/arch/aarch64/memcpy.S
/* * memcpy - copy memory area * * Copyright (c) 2012-2020, Arm Limited. * SPDX-License-Identifier: MIT */ /* Assumptions: * * ARMv8-a, AArch64, unaligned accesses. * */ /* This implementation of memcpy uses unaligned accesses and branchless sequences to keep the code small, simple and improve performance...
mag1c1an1/arceos
1,376
modules/axhal/linker.lds.S
OUTPUT_ARCH(%ARCH%) BASE_ADDRESS = %KERNEL_BASE%; ENTRY(_start) SECTIONS { . = BASE_ADDRESS; skernel = .; .text : ALIGN(4K) { stext = .; *(.text.boot) *(.text .text.*) . = ALIGN(4K); etext = .; } .rodata : ALIGN(4K) { srodata = .; *(.rodata...
mag1c1an1/arceos
4,307
modules/axhal/src/platform/pc_x86/multiboot.S
# Bootstrapping from 32-bit with the Multiboot specification. # See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html .section .text.boot .code32 .global _start _start: mov edi, eax # arg1: magic: 0x2BADB002 mov esi, ebx # arg2: multiboot info jmp bsp_entry32 .bal...
mag1c1an1/arceos
1,965
modules/axhal/src/platform/pc_x86/ap_start.S
# Boot application processors into the protected mode. # Each non-boot CPU ("AP") is started up in response to a STARTUP # IPI from the boot CPU. Section B.4.2 of the Multi-Processor # Specification says that the AP will start in real mode with CS:IP # set to XY00:0000, where XY is an 8-bit value sent with the # STAR...
mag1c1an1/arceos
1,672
modules/axhal/src/arch/riscv/trap.S
.macro SAVE_REGS, from_user addi sp, sp, -{trapframe_size} PUSH_GENERAL_REGS csrr t0, sepc csrr t1, sstatus csrrw t2, sscratch, zero // save sscratch (sp) and zero it STR t0, sp, 31 // tf.sepc STR t1, sp, 32 // tf.sstatus STR...
mag1c1an1/arceos
1,505
modules/axhal/src/arch/x86_64/trap.S
.equ NUM_INT, 256 .altmacro .macro DEF_HANDLER, i .Ltrap_handler_\i: .if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17 # error code pushed by CPU push \i # interrupt vector jmp .Ltrap_common .else push 0 # fill in error code in TrapFrame push \i # interrupt ...
mag1c1an1/arceos
2,585
modules/axhal/src/arch/aarch64/trap_el2.S
.macro SAVE_REGS_EL2 sub sp, sp, 34 * 8 stp x0, x1, [sp] stp x2, x3, [sp, 2 * 8] stp x4, x5, [sp, 4 * 8] stp x6, x7, [sp, 6 * 8] stp x8, x9, [sp, 8 * 8] stp x10, x11, [sp, 10 * 8] stp x12, x13, [sp, 12 * 8] stp x14, x15, [sp, 14 * 8] stp x1...
mag1c1an1/arceos
2,416
modules/axhal/src/arch/aarch64/trap.S
.macro SAVE_REGS sub sp, sp, 34 * 8 stp x0, x1, [sp] stp x2, x3, [sp, 2 * 8] stp x4, x5, [sp, 4 * 8] stp x6, x7, [sp, 6 * 8] stp x8, x9, [sp, 8 * 8] stp x10, x11, [sp, 10 * 8] stp x12, x13, [sp, 12 * 8] stp x14, x15, [sp, 14 * 8] stp x16, x...