repo_id string | size int64 | file_path string | content string |
|---|---|---|---|
DaZhou-ECHO/arce_code | 1,839 | arceos/modules/axhal/src/arch/riscv/trap.S | .macro SAVE_REGS, from_user
addi sp, sp, -{trapframe_size}
PUSH_GENERAL_REGS
csrr t0, sepc
csrr t1, sstatus
csrrw t2, sscratch, zero // save sscratch (sp) and zero it
STR t0, sp, 31 // tf.sepc
STR t1, sp, 32 // tf.sstatus
STR... |
DaZhou-ECHO/arce_code | 2,415 | arceos/modules/axhal/src/arch/aarch64/trap.S | .macro SAVE_REGS
sub sp, sp, 34 * 8
stp x0, x1, [sp]
stp x2, x3, [sp, 2 * 8]
stp x4, x5, [sp, 4 * 8]
stp x6, x7, [sp, 6 * 8]
stp x8, x9, [sp, 8 * 8]
stp x10, x11, [sp, 10 * 8]
stp x12, x13, [sp, 12 * 8]
stp x14, x15, [sp, 14 * 8]
stp x16, x... |
DaZhou-ECHO/arce_code | 1,505 | arceos/modules/axhal/src/arch/x86_64/trap.S | .equ NUM_INT, 256
.altmacro
.macro DEF_HANDLER, i
.Ltrap_handler_\i:
.if \i == 8 || (\i >= 10 && \i <= 14) || \i == 17
# error code pushed by CPU
push \i # interrupt vector
jmp .Ltrap_common
.else
push 0 # fill in error code in TrapFrame
push \i # interrupt ... |
DaZhou-ECHO/arce_code | 1,965 | arceos/modules/axhal/src/platform/x86_pc/ap_start.S | # Boot application processors into the protected mode.
# Each non-boot CPU ("AP") is started up in response to a STARTUP
# IPI from the boot CPU. Section B.4.2 of the Multi-Processor
# Specification says that the AP will start in real mode with CS:IP
# set to XY00:0000, where XY is an 8-bit value sent with the
# STAR... |
DaZhou-ECHO/arce_code | 4,307 | arceos/modules/axhal/src/platform/x86_pc/multiboot.S | # Bootstrapping from 32-bit with the Multiboot specification.
# See https://www.gnu.org/software/grub/manual/multiboot/multiboot.html
.section .text.boot
.code32
.global _start
_start:
mov edi, eax # arg1: magic: 0x2BADB002
mov esi, ebx # arg2: multiboot info
jmp bsp_entry32
.bal... |
DaZhou-ECHO/arce_code | 4,857 | arceos/tour/h_1_0/src/guest.S |
/// Enter the guest given in `VmCpuRegisters` from `a0`
.global _run_guest
_run_guest:
/* Save hypervisor state */
/* Save hypervisor GPRs (except T0-T6 and a0, which is GuestInfo and stashed in sscratch) */
sd ra, ({hyp_ra})(a0)
sd gp, ({hyp_gp})(a0)
sd tp, ({hyp_tp})(a0)
sd s0, ({hyp... |
DaZhou-ECHO/arce_code | 2,544 | arceos/tools/raspi4/chainloader/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//-----------------------------------------------------------------------------------... |
DaZhou-ECHO/arce_code | 4,857 | arceos/exercises/simple_hv/src/guest.S |
/// Enter the guest given in `VmCpuRegisters` from `a0`
.global _run_guest
_run_guest:
/* Save hypervisor state */
/* Save hypervisor GPRs (except T0-T6 and a0, which is GuestInfo and stashed in sscratch) */
sd ra, ({hyp_ra})(a0)
sd gp, ({hyp_gp})(a0)
sd tp, ({hyp_tp})(a0)
sd s0, ({hyp... |
DDDDprog/-RustixOS | 9,210 | src/arch/aarch64/boot/boot.s | // AArch64 Boot Assembly
// Professional boot sequence with full hardware initialization
.section .text.boot
.global _start
// Boot header for bootloaders
.align 3
boot_header:
.quad 0x644d5241 // Magic: "ARMd"
.quad _start // Entry point
.quad __text_start // Text start
.... |
derchr/gem5-arm-bare-metal | 102 | src/start.s | .section .init
.globl _start
_start:
ldr x30, =LD_STACK_PTR
mov sp, x30
bl main
|
Destructor169/Raspberry-Pi-OS-Utilities-in-Rust | 1,652 | coleopter_os/src/_arch/aarch64/cpu/boot.s | // SPDX-License-Identifier: MIT OR Apache-2.0
//
// Copyright (c) 2021 Andre Richter <andre.o.richter@gmail.com>
//--------------------------------------------------------------------------------------------------
// Definitions
//----------------------------------------------------------------------------------------... |
dfaranha/au-syssec-f25-exercises | 817 | 08_software_security_ii/lib.s | .intel_syntax noprefix # Because it is more beautiful.
.section .note.GNU-stack,"",@progbits # We do not need nor want an executable stack.
.text
.global exit_process
.type exit_process, @function
exit_process:
mov rdi, 0x3c
mov rax, rdi
syscall
.global read_from_stdin
.type read_from_stdin, @fun... |
dh1303/defer-backup | 913 | Python/asm_trampoline.S | .text
.globl _Py_trampoline_func_start
# The following assembly is equivalent to:
# PyObject *
# trampoline(PyThreadState *ts, _PyInterpreterFrame *f,
# int throwflag, py_evaluator evaluator)
# {
# return evaluator(ts, f, throwflag);
# }
_Py_trampoline_func_start:
#ifdef __x86_64__
sub $8,... |
dickhfchan/rustkernel | 837 | kernel/src/boot.s | .section ".text.boot"
.global _start
.extern rust_main
.extern __bss_start
.extern __bss_end
// ARM64 boot entry point
_start:
// Disable interrupts
msr daifset, #0xf
// Check if we're running on the primary CPU (MPIDR_EL1)
mrs x0, mpidr_el1
and x0, x0, #0xFF
cbnz x0, halt // If n... |
dickhfchan/rustkernel | 4,527 | kernel/src/exceptions.s | // ARM64 Exception Vector Table
// Each exception type has 4 possible sources based on execution state and level
.section ".text.exceptions", "ax"
.align 11 // Vector table must be aligned to 2KB boundary
.global exception_vector_table
exception_vector_table:
// Current EL with SP0
.align 7
b sync_invali... |
diegobix/kboot | 1,889 | stage1/gdt.s | ;GDT
align 4
gdt_start:
gdt_null: ; the mandatory null descriptor
dd 0x0 ; ’ dd ’ means define double word ( i.e. 4 bytes )
dd 0x0
gdt_code: ; the code segment descriptor
; base =0 x0 , limit =0 xfffff ,
; 1 st flags: ( present )1 ( privilege )00 ( descriptor type )1 -> 1001 b
; type flags: ( code ... |
diegobix/kboot | 4,004 | stage1/bootsector.s | [bits 16]
[org 0x7c3e] ; FAT16 salta a esta instrucción al iniciar el bootsector
global _init
_init:
cli ; Desactivamos las interrupciones
xor ax, ax ; Registros de segmento a 0
mov ds, ax
mov ss, ax
mov es, ax
mov bp, 0x7c00 ; El stack crece hacia abajo -> hacia la dirección contraria del bootlaoder
... |
Diehard0413/rusty-kaspa | 5,802 | crypto/hashes/src/keccakf1600_x86-64-osx.s | # Source: https://github.com/dot-asm/cryptogams/blob/master/x86_64/keccak1600-x86_64.pl
.text
.p2align 5
__KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
movq 60(%rdi),%rax
movq 68(%rdi),%rbx
movq 76(%rdi),%rcx
movq 84(%rdi),%rdx
movq 92(%rdi),%rbp
jmp L$oop
.p2align 5
L$oop:
movq -100(%rdi),%r8
mo... |
Diehard0413/rusty-kaspa | 6,073 | crypto/hashes/src/keccakf1600_x86-64.s | # Source: https://github.com/dot-asm/cryptogams/blob/master/x86_64/keccak1600-x86_64.pl
.text
.type __KeccakF1600,@function
.align 32
__KeccakF1600:
.cfi_startproc
.byte 0xf3,0x0f,0x1e,0xfa
movq 60(%rdi),%rax
movq 68(%rdi),%rbx
movq 76(%rdi),%rcx
movq 84(%rdi),%rdx
movq 92(%rdi),%rbp
jmp .Loop
.align 32
.Loo... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 02_EXTERNAL_INTERRUPT/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 09_Motor_Encoder/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 06_ENCODER/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 36_FreeRTOS_Timer/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 36_FreeRTOS_Timer/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 16_UBIDOTS/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 22_SPI_TFT/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 07_TIMERS/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 08_Delay_us/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 35_FreeRTOS_Task_LCD/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 35_FreeRTOS_Task_LCD/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 13_UART_LABVIEW/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 12_UART_RX_INTERRUPT/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 10_Interrupt_Anidadas/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 33_FreeRTOS_1/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 33_FreeRTOS_1/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 30_LOW_POWER_modeSTANDBY/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 37_FreeRTOS_Queue/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 37_FreeRTOS_Queue/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 39_FreeRTOS_QueueReferencia/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 39_FreeRTOS_QueueReferencia/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 05_KEYPAD/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 11_UART/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 28_LOW_POWER_modeSLEEP/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 29_LOW_POWER_modeSTOP/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 15_ADC_Injected/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 21_SPI_THERMOCUPLE/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 38_FreeRTOS_QueueValor/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 38_FreeRTOS_QueueValor/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 42_FreeRTOS_ISR/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 42_FreeRTOS_ISR/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 03_EXTERNAL_INTERRUPT_EJM2/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 14_ADC/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 26_DMA_PWM/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 18_I2C_PCF8574/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 41_FreeRTOS_SemaforoConteo/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 41_FreeRTOS_SemaforoConteo/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 40_FreeRTOS_SemaforoBinario/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 40_FreeRTOS_SemaforoBinario/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 04_LCD/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 32_RTOS_EJM1/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 11,110 | 34_FreeRTOS_Task_Leds/Middlewares/Third_Party/SEGGER/SEGGER/SEGGER_RTT_ASM_ARMv7M.S | /*********************************************************************
* (c) SEGGER Microcontroller GmbH *
* The Embedded Experts *
* www.segger.com *
************************************... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 34_FreeRTOS_Task_Leds/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 23_SPI_SD_CARD/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 20_I2C_OLED/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 19_I2C_LDC/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 24_DMA_ADC/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 27_DMA_PROYECTO/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 01_HOLA_MUNDO/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,081 | 17_I2C_SCAN/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DiegoSuarz/ESPECIALIZACION_STM32_qhipatech_ | 20,084 | 25_DMA_UART/Core/Startup/startup_stm32f401retx.s | /**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* ... |
DikshantK2004/Sanity-Checker-CArch | 73 | Tests/Sample_Tests/test1/input1.s | addi x5, x5, 0
lui x4, 0x10
addi x5, x5, -1
sd x5, 2(x4)
addi x5, x5, 1 |
DikshantK2004/Sanity-Checker-CArch | 426 | Tests/Sample_Tests/test2/input.s | main: addi x10, x0, 2
lui sp, 0x50
jal x1, fact
beq x0, x0, exit
fact: addi sp, sp, -16
sd x1, 8(sp)
sd x10, 0(sp)
addi x5, x10, -1
blt x0, x5, L1
addi x10, x0, 1
addi sp, sp, 16
jalr x0, 0(x1)
L1: addi x10, x10, -1
jal x1, fact
addi x6, x10, 0
ld x10, 0(sp)
ld x1, 8(sp)
addi sp, sp, 16
addi x20, x0, 0
addi x8, x0, 0
m... |
Dimchikkk/rdb | 651 | test_programs/01-reg_read.s | .global main
.section .data
my_double: .double 64.125
.section .text
.macro trap
movq $62, %rax
movq %r12, %rdi
movq $5, %rsi
syscall
.endm
main:
push %rbp
movq %rsp, %rbp
# Get pid
movq $39, %rax
syscall
movq %rax, %r12
# Store to r13
movq $0xcafecaf... |
dlunch/wipi | 286 | wipi/src/ktf/entry.s | // defines ktf wipi binary entrypoint
.section .text.ktf_wipi_header, "ax"
.global __entrypoint
__entrypoint:
b after_data
.byte 0xC0 // Some kind of magic
.byte 0x46
.byte 0x24
.byte 0x02
.byte 0x04
.byte 0x20
.byte 0x01
.byte 0x00
.byte 0x02
.byte 0x00
after_data:
b start
|
dnswd/hypervisor-study | 5,264 | hypervisor/src/hardware_vt/vmx_run_vm.S | ;// The module containing the `run_vm_vmx` function.
;// Offsets to each field in the GuestRegisters struct.
.set registers_rax, 0x0
.set registers_rbx, 0x8
.set registers_rcx, 0x10
.set registers_rdx, 0x18
.set registers_rdi, 0x20
.set registers_rsi, 0x28
.set registers_rbp, 0x30
.set registers_r8, 0x38
.set registe... |
dnswd/hypervisor-study | 4,516 | hypervisor/src/hardware_vt/svm_run_vm.S | ;// The module containing the `run_vm_svm` function.
;// Offsets to each field in the `GuestRegisters` struct.
.set registers_rax, 0x0
.set registers_rbx, 0x8
.set registers_rcx, 0x10
.set registers_rdx, 0x18
.set registers_rdi, 0x20
.set registers_rsi, 0x28
.set registers_rbp, 0x30
.set registers_r8, 0x38
.set regis... |
doesDWQ/os | 1,550 | 04MemoryOs/src/linker_app.S |
.align 3
.section .data
.global _num_app
_num_app:
.quad 7
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_6_end
.section .data
.global app_0_start
.global app_0_end
... |
doesDWQ/os | 676 | 04MemoryOs/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
doesDWQ/os | 1,640 | 04MemoryOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
doesDWQ/os | 1,200 | 02BatchOs/src/linker_app.S | # os/src/link_app.S
.align 3 # 对齐到2的3次方，8字节上
.section .data
.global _num_app # 定义_num_app全局数据段
_num_app:
.quad 5 # .quad 伪指令，定义一个64位的整数，_num_app相当于连续存储了7个64位的整数
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_... |
doesDWQ/os | 2,310 | 02BatchOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n # 定义宏汇编，名字是SAVE_GP，参数是n
sd x\n, \n*8(sp) # 展开将X1到Xn寄存器存储到栈指针sp 偏移量位n*8的位置，这里假设每个寄存器占据8字节，即64位
.endm # 表示汇编宏结束
.macro LOAD_GP n
ld x\n, \n*8(sp) # sd 保存到内存中，ld加载到内存中
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2 # 将... |
doesDWQ/os | 4,131 | 05ProcessOs/src/link_app.S |
.align 3
.section .data
.global _num_app
_num_app:
.quad 17
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_7_start
.quad app_8_start
.quad app_9_start
.quad app_10_start
... |
doesDWQ/os | 676 | 05ProcessOs/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
doesDWQ/os | 1,640 | 05ProcessOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
doesDWQ/os | 4,131 | 06FileSystemOs/src/link_app.S |
.align 3
.section .data
.global _num_app
_num_app:
.quad 17
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_5_start
.quad app_6_start
.quad app_7_start
.quad app_8_start
.quad app_9_start
.quad app_10_start
... |
doesDWQ/os | 676 | 06FileSystemOs/src/task/switch.S | .altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
# __switch(
# current_task_cx_ptr: *mut TaskContext,
# next_task_cx_ptr: *const TaskContext
# )
# save kernel stack of current task
s... |
doesDWQ/os | 1,640 | 06FileSystemOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n
sd x\n, \n*8(sp)
.endm
.macro LOAD_GP n
ld x\n, \n*8(sp)
.endm
.section .text.trampoline
.globl __alltraps
.globl __restore
.align 2
__alltraps:
csrrw sp, sscratch, sp
# now sp->*TrapContext in user space, sscratch->user stack
# save other general purpose r... |
doesDWQ/os | 835 | 03.2TaskOs/src/linker_app.S | # os/src/link_app.S
.align 3 # 对齐到2的3次方，8字节上
.section .data
.global _num_app # 定义_num_app全局数据段
_num_app:
.quad 3 # .quad 伪指令，定义一个64位的整数，_num_app相当于连续存储了7个64位的整数
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_2_end
.section .data
.global app_0_... |
doesDWQ/os | 388 | 03.2TaskOs/src/task/switch.S |
.altmacro
.macro SAVE_SN n
sd s\n, (\n+2)*8(a0)
.endm
.macro LOAD_SN n
ld s\n, (\n+2)*8(a1)
.endm
.section .text
.globl __switch
__switch:
sd sp, 8(a0)
sd ra, 0(a0)
.set n, 0
.rept 12
SAVE_SN %n
.set n, n + 1
.endr
ld ra, 0(a1)
.set n, 0
.rept 12
... |
doesDWQ/os | 2,308 | 03.2TaskOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n # 定义宏汇编，名字是SAVE_GP，参数是n
sd x\n, \n*8(sp) # 展开将X1到Xn寄存器存储到栈指针sp 偏移量位n*8的位置，这里假设每个寄存器占据8字节，即64位
.endm # 表示汇编宏结束
.macro LOAD_GP n
ld x\n, \n*8(sp) # sd 保存到内存中，ld加载到内存中
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2 # 将... |
doesDWQ/os | 1,255 | 03.1MutipleOs/src/linker_app.S | # os/src/link_app.S
.align 3 # 对齐到2的3次方，8字节上
.section .data
.global _num_app # 定义_num_app全局数据段
_num_app:
.quad 5 # .quad 伪指令，定义一个64位的整数，_num_app相当于连续存储了7个64位的整数
.quad app_0_start
.quad app_1_start
.quad app_2_start
.quad app_3_start
.quad app_4_start
.quad app_... |
doesDWQ/os | 2,281 | 03.1MutipleOs/src/trap/trap.S | .altmacro
.macro SAVE_GP n # 定义宏汇编，名字是SAVE_GP，参数是n
sd x\n, \n*8(sp) # 展开将X1到Xn寄存器存储到栈指针sp 偏移量位n*8的位置，这里假设每个寄存器占据8字节，即64位
.endm # 表示汇编宏结束
.macro LOAD_GP n
ld x\n, \n*8(sp) # sd 保存到内存中，ld加载到内存中
.endm
.section .text
.globl __alltraps
.globl __restore
.align 2 # 将... |
Dokkae6949/risky | 3,538 | src/arch/rv64/asm/boot.s | .attribute arch, "rv64gc"
.option norvc
.section .init, "ax"
.global _start
_start:
.option push
.option norelax # Prevent an unsupported R_RISCV_ALIGN relocation from being generated
relocate_entry:
auipc ra, %pcrel_hi(relocate_target)
ld ra, %pcrel_lo(relocate_entry)(ra)
jr ra
.align 3
relocate_tar... |
DONwerewolf/telegram-bot | 31,033 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/armv8-mont-win64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32)
#include <ring-core/arm_arch.h>
.text
.globl bn_mul_mont
.def bn_mul_mont
.type 32
.endef... |
DONwerewolf/telegram-bot | 29,307 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/chacha-armv4-linux32.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__)
#include <ring-core/arm_arch.h>
@ Silence ARMv8 deprecated IT instruction warnings. This file is ... |
DONwerewolf/telegram-bot | 49,096 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/sha512-armv8-ios64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__)
// Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed unde... |
DONwerewolf/telegram-bot | 22,670 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/ghash-x86_64-macosx.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__)
.text
.globl _gcm_init_clmul
.private_extern _gcm_init_clmul
.p2align 4
_gcm_init_clmul:
... |
DONwerewolf/telegram-bot | 40,669 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/chacha-armv8-linux64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__)
#include <ring-core/arm_arch.h>
.hidden OPENSSL_armcap_P
.section .rodata
.align 5
.Lsigma... |
DONwerewolf/telegram-bot | 49,269 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/sha512-armv8-linux64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__)
// Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved.
//
// Licensed under ... |
DONwerewolf/telegram-bot | 74,349 | .cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.8/pregenerated/chacha20_poly1305_armv8-linux64.S | // This file is generated from a similarly-named Perl script in the BoringSSL
// source tree. Do not edit by hand.
#include <ring-core/asm_base.h>
#if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__)
#include <ring-core/arm_arch.h>
.section .rodata
.align 7
.Lchacha20_consts:
.byte 'e','x','p... |
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