repo_id
string
size
int64
file_path
string
content
string
01nstagram/Meus-projetos
193,289
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .section .rodata .align 64 chacha20_poly1305_constants: .Lchacha20_consts: .byte 'e','x','p','a...
01nstagram/Meus-projetos
20,965
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .type _aesni_encrypt2,@function .align 16 _aesni_encrypt2: .cfi_startproc movups (%rcx...
01nstagram/Meus-projetos
35,401
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-armv8-asm-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 5 Lpoly: .quad 0xffffffffffffffff,0x00000000ffffffff,0x000000...
01nstagram/Meus-projetos
30,876
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/armv8-mont-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .text .globl bn_mul_mont_nohw .hidden bn_mul_mont_nohw .type bn_mul_mont_nohw,%function .alig...
01nstagram/Meus-projetos
49,007
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha512-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) // Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved. // // Licensed under t...
01nstagram/Meus-projetos
26,206
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .section .rodata .type _vpaes_consts,%object .align 7 // totally strategic alignment _vpaes_c...
01nstagram/Meus-projetos
4,229
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86-mont-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86) && defined(__ELF__) .text .globl bn_mul_mont .hidden bn_mul_mont .type bn_mul_mont,@function .align 16 bn_mul_mont: .L...
01nstagram/Meus-projetos
18,316
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesni-gcm-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .p2align 5 _aesni_ctr32_ghash_6x: vmovdqu 32(%r11),%xmm2 subq $6,%rdx vpxor %xmm...
01nstagram/Meus-projetos
24,306
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aes-gcm-avx2-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .section __DATA,__const .p2align 4 L$bswap_mask: .quad 0x08090a0b0c0d0e0f, 0x00010203040506...
01nstagram/Meus-projetos
12,170
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .type _vpaes_encrypt_core,@function .align 16 _vpaes_encrypt_core: .cfi_...
01nstagram/Meus-projetos
31,065
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .section .rodata .align 64 .Lzero: .long 0,0,0,0 .Lone: .long 1,0,0,0 .Linc: .long 0,1,...
01nstagram/Meus-projetos
36,746
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-armv8-asm-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .section .rodata .align 5 .Lpoly: .quad 0xffffffffffffffff,0x00000000ffffffff,0x00000000000000...
01nstagram/Meus-projetos
40,185
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-armv8-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) .section __TEXT,__const .align 5 Lsigma: .quad 0x3320646e61707865,0x6b20657479622d32 // en...
01nstagram/Meus-projetos
60,192
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-armv4-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved. @ @ Licensed under the Apa...
01nstagram/Meus-projetos
34,239
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha256-armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) // Copyright 2014-2020 The OpenSSL Project Authors. All Rights Reserved. // // Licensed under ...
01nstagram/Meus-projetos
11,024
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/ghash-neon-armv8-linux64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__ELF__) .text .globl gcm_init_neon .hidden gcm_init_neon .type gcm_init_neon,%function .align 4 gcm_i...
01nstagram/Meus-projetos
40,202
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-armv8-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .section .rodata .align 5 Lsigma: .quad 0x3320646e61707865,0x6b20657479622d32 // endian-neutr...
01nstagram/Meus-projetos
78,605
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-x86_64-asm-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .section .rodata .align 64 .Lpoly: .quad 0xffffffffffffffff, 0x00000000ffffffff, 0x000...
01nstagram/Meus-projetos
190,544
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha20_poly1305_x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .section __DATA,__const .p2align 6 chacha20_poly1305_constants: L$chacha20_consts: .byte 'e',...
01nstagram/Meus-projetos
7,650
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aesv8-armx-ios64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(__APPLE__) #if __ARM_MAX_ARCH__>=7 .text .section __TEXT,__const .align 5 Lrcon: .long 0x01,0x01,0x01,...
01nstagram/Meus-projetos
42,856
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/sha512-armv4-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) @ Copyright 2007-2016 The OpenSSL Project Authors. All Rights Reserved. @ @ Licensed under the Apa...
01nstagram/Meus-projetos
25,026
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/aes-gcm-avx2-x86_64-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .section .rodata .align 16 .Lbswap_mask: .quad 0x08090a0b0c0d0e0f, 0x0001020304050607 ...
01nstagram/Meus-projetos
35,655
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/p256-armv8-asm-win64.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_AARCH64) && defined(_WIN32) .section .rodata .align 5 Lpoly: .quad 0xffffffffffffffff,0x00000000ffffffff,0x0000000000000000...
01nstagram/Meus-projetos
30,277
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/chacha-x86_64-macosx.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__APPLE__) .text .section __DATA,__const .p2align 6 L$zero: .long 0,0,0,0 L$one: .long 1,0,0,0 L$inc: ...
01nstagram/Meus-projetos
23,124
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/vpaes-armv7-linux32.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) .syntax unified .arch armv7-a .fpu neon #if defined(__thumb2__) .thumb #else .code 32 #endif .t...
01nstagram/Meus-projetos
51,084
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/pregenerated/x86_64-mont5-elf.S
// This file is generated from a similarly-named Perl script in the BoringSSL // source tree. Do not edit by hand. #include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && defined(__ELF__) .text .globl bn_mul4x_mont_gather5 .hidden bn_mul4x_mont_gather5 .type bn_mul4x_mont_gather5,...
01nstagram/Meus-projetos
2,659
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/third_party/fiat/asm/fiat_curve25519_adx_square.S
#include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && \ (defined(__APPLE__) || defined(__ELF__)) .intel_syntax noprefix .text #if defined(__APPLE__) .private_extern _fiat_curve25519_adx_square .global _fiat_curve25519_adx_square _fiat_curve25519_adx_square: #else .type fiat_cu...
01nstagram/Meus-projetos
3,464
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/third_party/fiat/asm/fiat_curve25519_adx_mul.S
#include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_X86_64) && \ (defined(__APPLE__) || defined(__ELF__)) .intel_syntax noprefix .text #if defined(__APPLE__) .private_extern _fiat_curve25519_adx_mul .global _fiat_curve25519_adx_mul _fiat_curve25519_adx_mul: #else .type fiat_curve25519_...
01nstagram/Meus-projetos
62,534
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/crypto/poly1305/poly1305_arm_asm.S
#include <ring-core/asm_base.h> #if !defined(OPENSSL_NO_ASM) && defined(OPENSSL_ARM) && defined(__ELF__) #pragma GCC diagnostic ignored "-Wlanguage-extension-token" # This implementation was taken from the public domain, neon2 version in # SUPERCOP by D. J. Bernstein and Peter Schwabe. # qhasm: int32 input_0 # qha...
01nstagram/Meus-projetos
41,448
.cargo/registry/src/index.crates.io-6f17d22bba15001f/ring-0.17.13/crypto/curve25519/asm/x25519-asm-arm.S
// Copyright 2015 The BoringSSL Authors // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // https://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or ag...
0x36D76289/kfs
1,682
boot/boot.S
.set ALIGN, 1<<0 # Align flag for multiboot .set MEMINFO, 1<<1 # Memory info flag for multiboot .set FLAGS, ALIGN | MEMINFO # Combined flags for multiboot .set MAGIC, 0x1BADB002 # Multiboot magic number .set CHECKSUM, -(MAGIC + FLAGS) # Checksum for multiboot header .section .multiboot ....
01nstagram/Meus-projetos
7,228
.cargo/registry/src/index.crates.io-6f17d22bba15001f/lzma-sys-0.1.20/xz-5.2/src/liblzma/check/crc32_x86.S
/* * Speed-optimized CRC32 using slicing-by-eight algorithm * * This uses only i386 instructions, but it is optimized for i686 and later * (including e.g. Pentium II/III/IV, Athlon XP, and Core 2). For i586 * (e.g. Pentium), slicing-by-four would be better, and even the C version * of slicing-by-eight built with ...
01nstagram/Meus-projetos
6,761
.cargo/registry/src/index.crates.io-6f17d22bba15001f/lzma-sys-0.1.20/xz-5.2/src/liblzma/check/crc64_x86.S
/* * Speed-optimized CRC64 using slicing-by-four algorithm * * This uses only i386 instructions, but it is optimized for i686 and later * (including e.g. Pentium II/III/IV, Athlon XP, and Core 2). * * Authors: Igor Pavlov (original CRC32 assembly code) * Lasse Collin (CRC64 adaptation of the modified CR...
0eufc0smique/secu_classes_ctf
583
classes/HTB/asm_intro/fibs.s
global _start section .data message1 db "fibo seq:", 0x0a length1 equ $-message1 message2 db "result:", 0x0a length2 equ $-message2 section .text _start: mov rax, 1 mov rdi, 1 mov rsi, message1 mov rdx, length1 syscall ; prints welcome message xor rcx, rcx xor...
0eufc0smique/secu_classes_ctf
163
classes/HTB/asm_intro/arithmetic.s
global _start section .text _start: mov al, 0 mov bl, 0 inc bl add rax, rbx sub rbx, 1 inc rbx imul rax, rbx not rax not rax
0eufc0smique/secu_classes_ctf
921
classes/HTB/asm_intro/message.s
global _start ; 'Hello HTB Academy!' will be rendered innnnn the stack as: ; 0x6c6c6548 0x5448206f 0x63412042 0x6d656461 0x00002179 ; Which in 'normal' order is: ; 48656C6C 6F204854 42204163 6164656D 7921 section .data ; indicates this section stores data message db "Hello HTB Academy!" l...
0eufc0smique/secu_classes_ctf
122
classes/HTB/asm_intro/conditional.s
global _start section .text _start: mov rax, 2 ; change here imul rax, 5 loop: cmp rax, 10 jnz loop
0xECEBureau/CatchTheMac
1,748
Reverse/MacNumberGuess/source/MacNumberGuess.S
bits 64 section .text global _start _start: mov r8, 0xdeadbeefdeadc0de new_game: mov rax, r8 add rax, 777 mov r8, rax and rax, 0xff mov r9, rax ; print "number:\n" mov rsi, 0x0a3a7265626d756e push rsi mov rsi, rsp mov rax, 1 ; write mov rdi, 1 ; stdout mov rdx, 8 ; n ...
0xKarl98/Blueshift
441
src/blueshift/blueshift.s
.equ NUM_ACCOUNTS, 0x00 .equ DATA_LEN, 0x08 .equ DATA, 0x10 .globl entrypoint entrypoint: ldxdw r2, [r1 + 0] # Get number of account jne r2, 0, error # error if not 0 account , meet the first requirement //Set r2 to the length of the instruction data, and r1 to the offset of the instruction da...
0xmuon/bootRS
985
bios/boot_sector/src/boot.s
.section .boot, "awx" .global _start .code16 # This stage initializes the stack, enables the A20 line _start: # zero segment registers xor ax, ax mov ds, ax mov es, ax mov ss, ax mov fs, ax mov gs, ax # clear the direction flag (e.g. go forward in memory when using # instructions ...
0xPolygonHermez/rust
4,378
library/compiler-builtins/compiler-builtins/src/hexagon/dfmul.s
.text .global __hexagon_muldf3 .type __hexagon_muldf3,@function .global __qdsp_muldf3 ; .set __qdsp_muldf3, __hexagon_muldf3 .global __hexagon_fast_muldf3 ; .set __hexagon_fast_muldf3, __hexagon_muldf3 .global __hexagon_fast2_muldf3 ; .set __hexagon_fast2_muldf3, __hexagon_muldf3 .p2align 5 __hexagon_muldf3: ...
0xPolygonHermez/rust
5,659
library/compiler-builtins/compiler-builtins/src/hexagon/dfdiv.s
.text .global __hexagon_divdf3 .type __hexagon_divdf3,@function .global __qdsp_divdf3 ; .set __qdsp_divdf3, __hexagon_divdf3 .global __hexagon_fast_divdf3 ; .set __hexagon_fast_divdf3, __hexagon_divdf3 .global __hexagon_fast2_divdf3 ; .set __hexagon_fast2_divdf3, __hexagon_divdf3 .p2align 5 __hexag...
0xPolygonHermez/rust
481
library/compiler-builtins/compiler-builtins/src/hexagon/umodsi3.s
FUNCTION_BEGIN __hexagon_umodsi3 { r2 = cl0(r0) r3 = cl0(r1) p0 = cmp.gtu(r1,r0) } { r2 = sub(r3,r2) if (p0) jumpr r31 } { loop0(1f,r2) p1 = cmp.eq(r2,#0) r2 = lsl(r1,r2) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = sub(r0,r2) r2 = lsr(r2,#1) if (p1) r1 = #0 }:endloop0 { p0...
0xPolygonHermez/rust
677
library/compiler-builtins/compiler-builtins/src/hexagon/udivmoddi4.s
FUNCTION_BEGIN __hexagon_udivmoddi4 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1:...
0xPolygonHermez/rust
158
library/compiler-builtins/compiler-builtins/src/hexagon/func_macro.s
.macro FUNCTION_BEGIN name .text .p2align 5 .globl \name .type \name, @function \name: .endm .macro FUNCTION_END name .size \name, . - \name .endm
0xPolygonHermez/rust
662
library/compiler-builtins/compiler-builtins/src/hexagon/udivdi3.s
FUNCTION_BEGIN __hexagon_udivdi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jumpr r31 } .falign 1: {...
0xPolygonHermez/rust
4,801
library/compiler-builtins/compiler-builtins/src/hexagon/dfaddsub.s
.text .global __hexagon_adddf3 .global __hexagon_subdf3 .type __hexagon_adddf3, @function .type __hexagon_subdf3, @function .global __qdsp_adddf3 ; .set __qdsp_adddf3, __hexagon_adddf3 .global __hexagon_fast_adddf3 ; .set __hexagon_fast_adddf3, __hexagon_adddf3 .global __hexagon_fast2_adddf3 ; .set __hexagon_fast...
0xPolygonHermez/rust
785
library/compiler-builtins/compiler-builtins/src/hexagon/sfdiv_opt.s
FUNCTION_BEGIN __hexagon_divsf3 { r2,p0 = sfrecipa(r0,r1) r4 = sffixupd(r0,r1) r3 = ##0x3f800000 } { r5 = sffixupn(r0,r1) r3 -= sfmpy(r4,r2):lib r6 = ##0x80000000 r7 = r3 } { r2 += sfmpy(r3,r2):lib r3 = r7 r6 = r5 r0 = and(r6,r5) } { r3 -= sfmpy(r4,r2):lib ...
0xPolygonHermez/rust
584
library/compiler-builtins/compiler-builtins/src/hexagon/modsi3.s
FUNCTION_BEGIN __hexagon_modsi3 { p2 = cmp.ge(r0,#0) r2 = abs(r0) r1 = abs(r1) } { r3 = cl0(r2) r4 = cl0(r1) p0 = cmp.gtu(r1,r2) } { r3 = sub(r4,r3) if (p0) jumpr r31 } { p1 = cmp.eq(r3,#0) loop0(1f,r3) r0 = r2 r2 = lsl(r1,r3) } .falign 1: { p0 = cmp.gtu(r2,r0) if (!p0.new) r0 = ...
0xPolygonHermez/rust
7,236
library/compiler-builtins/compiler-builtins/src/hexagon/dffma.s
.text .global __hexagon_fmadf4 .type __hexagon_fmadf4,@function .global __hexagon_fmadf5 .type __hexagon_fmadf5,@function .global __qdsp_fmadf5 ; .set __qdsp_fmadf5, __hexagon_fmadf5 .p2align 5 __hexagon_fmadf4: __hexagon_fmadf5: fma: { p0 = dfclass(r1:0,#2) p0 = dfclass(r3:2,#2) r13:12 = #0...
0xPolygonHermez/rust
4,337
library/compiler-builtins/compiler-builtins/src/hexagon/dfsqrt.s
.text .global __hexagon_sqrtdf2 .type __hexagon_sqrtdf2,@function .global __hexagon_sqrt .type __hexagon_sqrt,@function .global __qdsp_sqrtdf2 ; .set __qdsp_sqrtdf2, __hexagon_sqrtdf2; .type __qdsp_sqrtdf2,@function .global __qdsp_sqrt ; .set __qdsp_sqrt, __hexagon_sqrt; .type __qdsp_sqrt,@function .global __he...
0xPolygonHermez/rust
825
library/compiler-builtins/compiler-builtins/src/hexagon/moddi3.s
FUNCTION_BEGIN __hexagon_moddi3 { p3 = tstbit(r1,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu...
0xPolygonHermez/rust
864
library/compiler-builtins/compiler-builtins/src/hexagon/divdi3.s
FUNCTION_BEGIN __hexagon_divdi3 { p2 = tstbit(r1,#31) p3 = tstbit(r3,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { p3 = xor(p2,p3) r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14...
0xPolygonHermez/rust
543
library/compiler-builtins/compiler-builtins/src/hexagon/udivsi3.s
FUNCTION_BEGIN __hexagon_udivsi3 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) } .falign 1: { p0 = cmp.gtu(r2,r1) if (!p0.new) r1 = sub(r1,r2) if (!p0.ne...
0xPolygonHermez/rust
764
library/compiler-builtins/compiler-builtins/src/hexagon/memcpy_likely_aligned.s
FUNCTION_BEGIN __hexagon_memcpy_likely_aligned_min32bytes_mult8bytes { p0 = bitsclr(r1,#7) p0 = bitsclr(r0,#7) if (p0.new) r5:4 = memd(r1) r3 = #-3 } { if (!p0) jump .Lmemcpy_call if (p0) memd(r0++#8) = r5:4 if (p0) r5:4 = memd(r1+#8) r3 += lsr(r2,#3) } { memd(r0++#8) = r5:4 r5:4 = memd(r1+#16...
0xPolygonHermez/rust
5,120
library/compiler-builtins/compiler-builtins/src/hexagon/fastmath2_dlib_asm.s
.text .global __hexagon_fast2_dadd_asm .type __hexagon_fast2_dadd_asm, @function __hexagon_fast2_dadd_asm: .falign { R7:6 = VABSDIFFH(R1:0, R3:2) R9 = #62 R4 = SXTH(R0) R5 = SXTH(R2) } { R6 = SXTH(R6) P0 = CMP.GT(R4, R5); ...
0xPolygonHermez/rust
736
library/compiler-builtins/compiler-builtins/src/hexagon/divsi3.s
FUNCTION_BEGIN __hexagon_divsi3 { p0 = cmp.ge(r0,#0) p1 = cmp.ge(r1,#0) r1 = abs(r0) r2 = abs(r1) } { r3 = cl0(r1) r4 = cl0(r2) r5 = sub(r1,r2) p2 = cmp.gtu(r2,r1) } { r0 = #0 p1 = xor(p0,p1) p0 = cmp.gtu(r2,r5) if (p2) jumpr r31 } { r0 = mux(p1,#-1,#1) if (p0) jumpr r31 r4 = sub(...
0xPolygonHermez/rust
1,295
library/compiler-builtins/compiler-builtins/src/hexagon/memcpy_forward_vp4cp4n2.s
.text .globl hexagon_memcpy_forward_vp4cp4n2 .balign 32 .type hexagon_memcpy_forward_vp4cp4n2,@function hexagon_memcpy_forward_vp4cp4n2: { r3 = sub(##4096, r1) r5 = lsr(r2, #3) } { r3 = extractu(r3, #10, #2) r4 = extractu(r3, #7, #5) } { r3 = minu(r2, r3) r4 = minu(...
0xPolygonHermez/rust
721
library/compiler-builtins/compiler-builtins/src/hexagon/umoddi3.s
FUNCTION_BEGIN __hexagon_umoddi3 { r6 = cl0(r1:0) r7 = cl0(r3:2) r5:4 = r3:2 r3:2 = r1:0 } { r10 = sub(r7,r6) r1:0 = #0 r15:14 = #1 } { r11 = add(r10,#1) r13:12 = lsl(r5:4,r10) r15:14 = lsl(r15:14,r10) } { p0 = cmp.gtu(r5:4,r3:2) loop0(1f,r11) } { if (p0) jump .hexagon_umoddi3_retur...
0xPolygonHermez/rust
632
library/compiler-builtins/compiler-builtins/src/hexagon/udivmodsi4.s
FUNCTION_BEGIN __hexagon_udivmodsi4 { r2 = cl0(r0) r3 = cl0(r1) r5:4 = combine(#1,#0) p0 = cmp.gtu(r1,r0) } { r6 = sub(r3,r2) r4 = r1 r1:0 = combine(r0,r4) if (p0) jumpr r31 } { r3:2 = vlslw(r5:4,r6) loop0(1f,r6) p0 = cmp.eq(r6,#0) if (p0.new) r4 = #0 } .falign 1: { p0 = cmp.gtu(r2,r...
0xPolygonHermez/rust
833
library/compiler-builtins/compiler-builtins/src/hexagon/dfminmax.s
.text .global __hexagon_mindf3 .global __hexagon_maxdf3 .type __hexagon_mindf3,@function .type __hexagon_maxdf3,@function .global __qdsp_mindf3 ; .set __qdsp_mindf3, __hexagon_mindf3 .global __qdsp_maxdf3 ; .set __qdsp_maxdf3, __hexagon_maxdf3 .p2align 5 __hexagon_mindf3: { p0 = dfclass(r1:0,#0x10) p1 = df...
0xPolygonHermez/rust
3,885
library/compiler-builtins/compiler-builtins/src/hexagon/fastmath2_ldlib_asm.s
.text .global __hexagon_fast2ldadd_asm .type __hexagon_fast2ldadd_asm, @function __hexagon_fast2ldadd_asm: .falign { R4 = memw(r29+#8) R5 = memw(r29+#24) r7 = r0 } { R6 = sub(R4, R5):sat P0 = CMP.GT(R4, R5); if ( P0.new) R...
0xPolygonHermez/rust
872
library/compiler-builtins/compiler-builtins/src/hexagon/sfsqrt_opt.s
FUNCTION_BEGIN __hexagon_sqrtf { r3,p0 = sfinvsqrta(r0) r5 = sffixupr(r0) r4 = ##0x3f000000 r1:0 = combine(#0,#0) } { r0 += sfmpy(r3,r5):lib r1 += sfmpy(r3,r4):lib r2 = r4 r3 = r5 } { r2 -= sfmpy(r0,r1):lib p1 = sfclass(r5,#1) } { r0 += sfmpy(r0,r2):lib r1 ...
0xPolygonHermez/rust
11,809
library/std/src/sys/pal/sgx/abi/entry.S
/* This symbol is used at runtime to figure out the virtual address that the */ /* enclave is loaded at. */ .section absolute .global IMAGE_BASE IMAGE_BASE: .section ".note.x86_64-fortanix-unknown-sgx", "", @note .align 4 .long 1f - 0f /* name length (not including padding) */ .long 3f - 2f ...
0xPolygonHermez/rust
79
tests/ui/asm/named-asm-labels.s
lab1: nop // do more things lab2: nop // does bar // a: b lab3: nop; lab4: nop
0xPolygonHermez/rust
29
tests/codegen/asm/foo.s
.global foo foo: jmp baz
0xPolygonHermez/rust
136
tests/run-make/x86_64-fortanix-unknown-sgx-lvi/enclave/foo_asm.s
.text .global cc_plus_one_asm .type cc_plus_one_asm, @function cc_plus_one_asm: movl (%rdi), %eax inc %eax retq
0xPolygonHermez/rust
145
tests/run-make/x86_64-fortanix-unknown-sgx-lvi/enclave/libcmake_foo/src/foo_asm.s
.text .global cmake_plus_one_asm .type cmake_plus_one_asm, @function cmake_plus_one_asm: movl (%rdi), %eax inc %eax retq
189569400/Asterinas
1,106
framework/libs/linux-bzimage/setup/src/x86/amd64_efi/setup.S
/* SPDX-License-Identifier: MPL-2.0 */ .section ".setup", "ax" .code64 // start_of_setup32 should be loaded at CODE32_START, which is our base. .global start_of_setup32 start_of_setup32: // `efi_handover_setup_entry64` should be at efi_handover_setup_entry32 + 0x200, but // we could provide the 32 bit dummy entry poi...
189569400/Asterinas
2,407
framework/libs/linux-bzimage/setup/src/x86/amd64_efi/header.S
/* SPDX-License-Identifier: MPL-2.0 */ // The compatibility file for the Linux x86 Boot Protocol. // See https://www.kernel.org/doc/html/v5.6/x86/boot.html for // more information on the Linux x86 Boot Protocol. // Some of the fields filled with a 0xab* values should be filled // by the torjan builder. // Asterinas w...
189569400/Asterinas
689
framework/libs/linux-bzimage/setup/src/x86/legacy_i386/setup.S
/* SPDX-License-Identifier: MPL-2.0 */ // 32-bit setup code starts here, and will be loaded at CODE32_START. .section ".setup", "ax" .code32 .global start_of_setup32 start_of_setup32: mov eax, offset __stack_top mov esp, eax mov eax, offset halt push eax # the return address ...
189569400/Asterinas
2,165
framework/libs/linux-bzimage/setup/src/x86/legacy_i386/header.S
/* SPDX-License-Identifier: MPL-2.0 */ // The compatibility file for the Linux x86 Boot Protocol. // See https://www.kernel.org/doc/html/v5.6/x86/boot.html for // more information on the Linux x86 Boot Protocol. // Some of the fields filled with a 0xab* values should be filled // by the torjan builder. // Asterinas w...
189569400/Asterinas
700
framework/aster-frame/src/task/switch.S
/* SPDX-License-Identifier: MPL-2.0 */ .text .global context_switch .code64 context_switch: # (cur: *mut TaskContext, nxt: *TaskContext) # Save cur's register mov rax, [rsp] # return address mov [rdi + 56], rax # 56 = offsetof(Context, rip) mov [rdi + 0], rsp mov [rdi + 8], rbx mov [rdi + 16], rbp mov [r...
189569400/Asterinas
10,017
framework/aster-frame/src/arch/x86/boot/boot.S
/* SPDX-License-Identifier: MPL-2.0 */ // The boot header, initial boot setup code, temporary GDT and page tables are // in the boot section. The boot section is mapped writable since kernel may // modify the initial page table. .section ".boot", "awx" .code32 // With every entry types we could go through common pagi...
189569400/Asterinas
364
framework/aster-frame/src/arch/x86/boot/multiboot/header.S
/* SPDX-License-Identifier: MPL-2.0 */ // This is the GNU Multiboot header. // Reference: https://www.gnu.org/software/grub/manual/multiboot/multiboot.html .section ".multiboot_header", "a" MB_MAGIC = 0x1BADB002 MB_FLAGS = 0 MB_CHECKSUM = -(MB_MAGIC + MB_FLAGS) .code32 multiboot_header: .align 8 .long MB_MAG...
189569400/Asterinas
1,252
framework/aster-frame/src/arch/x86/boot/multiboot2/header.S
/* SPDX-License-Identifier: MPL-2.0 */ // This is the GNU Multiboot 2 header. // Reference: https://www.gnu.org/software/grub/manual/multiboot2/html_node/Index.html//Index .section ".multiboot2_header", "a" .code32 // Macros for cleaner code in the header fields. MB2_MAGIC = 0xE85250D6 MB2_ARCHITECTURE = 0 // 32-bit ...
189569400/Asterinas
2,102
regression/apps/fork/fork.s
# SPDX-License-Identifier: MPL-2.0 .global _start .section .text _start: call print_hello_world mov $57, %rax # syscall number of fork syscall cmp $0, %rax je _child # child process jmp _parent # parent process _pa...
189569400/Asterinas
710
regression/apps/hello_world/hello_world.s
# SPDX-License-Identifier: MPL-2.0 .global _start .section .text _start: call print_message call print_message call print_message mov $60, %rax # syscall number of exit mov $0, %rdi # exit code syscall get_pid: mov $39, %rax sysca...
20off/cs61c-2020su-proj3
45
tests/part_a/addi_pipelined/inputs/cpu-addi-pipelined.s
addi t0, x0, 5 addi t1, t0, 7 addi s0, t0, 9
20off/cs61c-2020su-proj3
45
tests/part_a/addi_single/inputs/cpu-addi-single.s
addi t0, x0, 5 addi t1, t0, 7 addi s0, t0, 9
20off/cs61c-2020su-proj3
45
tests/part_b/single_cycle/inputs/addi.s
addi t0, x0, 5 addi t1, t0, 7 addi s0, t0, 9
20off/cs61c-2020su-proj3
162
tests/part_b/single_cycle/inputs/branch-jump.s
add s0 x0 x0 addi a0 x0 -1 bne s0 s0 never_reach addi s0 s0 -1 lui s1 0 #end addi s1 s1 36 #end jr s1 never_reach: addi s0, s0, 1 j end end: addi a0 a0 1
20off/cs61c-2020su-proj3
88
tests/part_b/single_cycle/inputs/jump.s
jal ra label addi s0 x0 -1 jal x0 end label: jalr x0 ra 0 end: addi a0 x0 -1 #0,3,1,2,4
20off/cs61c-2020su-proj3
54
tests/part_b/single_cycle/inputs/mem.s
lui s0 74565 addi s0 s0 1656 sw s0 40(x0) lw ra 40(x0)
20off/cs61c-2020su-proj3
81
tests/part_b/single_cycle/inputs/add-lui-sll.s
addi s0 s0 1 addi s1 x0 14 sll s0 s0 s1 add s1 s0 x0 add t0 s1 s0 lui ra 0xfffff
20off/cs61c-2020su-proj3
326
tests/part_b/single_cycle/inputs/branch.s
beq s0 s0 start #0 bad-loop: addi sp sp -1 #1 beq x0 x0 bad-loop #2 start: addi s1 s1 10#3 blt s0 s1 label1#4 beq x0 x0 bad-loop#5 label2: addi s1 s1 -20#6 bltu s0 s1 end#7 beq x0 x0 bad-loop#8 label1: addi s0 s0 20#9 blt s1 s0 label2#10 beq x0 x0 bad-loop#11 end: add a0 x0 x0#12 #0,3,4,9,10,...
20off/cs61c-2020su-proj3
45
tests/part_b/pipelined/inputs/addi.s
addi t0, x0, 5 addi t1, t0, 7 addi s0, t0, 9
20off/cs61c-2020su-proj3
162
tests/part_b/pipelined/inputs/branch-jump.s
add s0 x0 x0 addi a0 x0 -1 bne s0 s0 never_reach addi s0 s0 -1 lui s1 0 #end addi s1 s1 36 #end jr s1 never_reach: addi s0, s0, 1 j end end: addi a0 a0 1
20off/cs61c-2020su-proj3
88
tests/part_b/pipelined/inputs/jump.s
jal ra label addi s0 x0 -1 jal x0 end label: jalr x0 ra 0 end: addi a0 x0 -1 #0,3,1,2,4
20off/cs61c-2020su-proj3
54
tests/part_b/pipelined/inputs/mem.s
lui s0 74565 addi s0 s0 1656 sw s0 40(x0) lw ra 40(x0)
20off/cs61c-2020su-proj3
81
tests/part_b/pipelined/inputs/add-lui-sll.s
addi s0 s0 1 addi s1 x0 14 sll s0 s0 s1 add s1 s0 x0 add t0 s1 s0 lui ra 0xfffff
20off/cs61c-2020su-proj3
326
tests/part_b/pipelined/inputs/branch.s
beq s0 s0 start #0 bad-loop: addi sp sp -1 #1 beq x0 x0 bad-loop #2 start: addi s1 s1 10#3 blt s0 s1 label1#4 beq x0 x0 bad-loop#5 label2: addi s1 s1 -20#6 bltu s0 s1 end#7 beq x0 x0 bad-loop#8 label1: addi s0 s0 20#9 blt s1 s0 label2#10 beq x0 x0 bad-loop#11 end: add a0 x0 x0#12 #0,3,4,9,10,...
36-H/Starry-FastDDS
1,771
modules/axhal/linker.lds.S
OUTPUT_ARCH(%ARCH%) BASE_ADDRESS = %KERNEL_BASE%; ENTRY(_start) SECTIONS { . = BASE_ADDRESS; _skernel = .; .text : ALIGN(4K) { _stext = .; *(.text.boot) . = ALIGN(4K); *(.text.signal_trampoline) . = ALIGN(4K); *(.text .text.*) . = ALIGN(4K); ...
36-H/Starry-FastDDS
121
modules/axdriver/image.S
.section .data .global img_start .global img_end .align 16 img_start: .incbin "./disk.img" img_end:
36-H/Starry-FastDDS
210
modules/axhal/src/arch/riscv/signal.S
# To create the sigreturn trampoline .equ __NR_sigreturn, 139 .section .text.signal_trampoline .balign 4 .global start_signal_trampoline start_signal_trampoline: li a7, __NR_sigreturn li a0, 0 ecall
36-H/Starry-FastDDS
2,325
modules/axhal/src/arch/riscv/trap.S
.macro SAVE_REGS, from_user addi sp, sp, -{trapframe_size} PUSH_GENERAL_REGS csrr t0, sepc csrr t1, sstatus csrrw t2, sscratch, zero // save sscratch (sp) and zero it STR t0, sp, 31 // tf.sepc STR t1, sp, 32 // tf.sstatus STR...
36-H/Starry-FastDDS
223
modules/axhal/src/arch/aarch64/signal.S
# To create the sigreturn trampoline .equ __NR_sigreturn, 139 .section .text.signal_trampoline .balign 4 .global start_signal_trampoline start_signal_trampoline: mov x8, #139 // 设置系统调用号为 139 svc #0 // 触发系统调用
36-H/Starry-FastDDS
4,138
modules/axhal/src/arch/aarch64/trap.S
.macro clear_gp_regs .irp n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29 mov x\n, xzr .endr .endm .macro SAVE_REGS, el stp x0, x1, [sp] stp x2, x3, [sp, 2 * 8] stp x4, x5, [sp, 4 * 8] stp x6, x7, [sp, 6 * 8] stp x8, x9, [sp, 8 * 8] ...
36-H/Starry-FastDDS
190
modules/axhal/src/arch/x86_64/signal.S
# To create the sigreturn trampoline .section .text.signal_trampoline .code64 .global start_signal_trampoline start_signal_trampoline: # syscall id rdi = 15 mov rax, 0xf syscall
36-H/Starry-FastDDS
1,143
modules/axhal/src/arch/x86_64/syscall.S
.section .text syscall_entry: swapgs mov gs:[offset __PERCPU_USER_RSP_OFFSET], rsp mov rsp, gs:[offset __PERCPU_KERNEL_RSP_OFFSET] sub rsp, 8 // skip user_ss push gs:[offset __PERCPU_USER_RSP_OFFSET] // user_rsp push r11 // rflags ...