code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module PG_PRIM_15 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.090332 |
module PG_PRIM_14 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.768742 |
module PG_PRIM_13 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.956673 |
module PG_PRIM_12 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.816594 |
module PG_PRIM_11 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.77165 |
module PG_PRIM_10 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.139217 |
module PG_PRIM_9 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.090893 |
module PG_PRIM_8 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.376356 |
module PG_PRIM_7 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.731576 |
module PG_PRIM_6 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.917603 |
module PG_PRIM_5 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.879807 |
module PG_PRIM_4 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.970268 |
module PG_PRIM_3 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 6.840091 |
module PG_PRIM_2 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.241739 |
module PG_PRIM_1 (
A,
B,
G,
P
);
input A, B;
output G, P;
XOR2_X1 U2 (
.A(B),
.B(A),
.Z(P)
);
AND2_X1 U1 (
.A1(B),
.A2(A),
.ZN(G)
);
endmodule
| 7.025408 |
module GG_36 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.798792 |
module GG_35 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.66741 |
module GP_0 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.78759 |
module GP_26 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.726143 |
module GG_33 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.812457 |
module GP_25 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.299142 |
module GG_32 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.733683 |
module GP_24 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.75749 |
module GG_31 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.509093 |
module GP_23 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.028675 |
module GG_30 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.625491 |
module GP_22 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.262295 |
module GG_29 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.543768 |
module GP_21 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.522471 |
module GG_28 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.576458 |
module GP_20 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.698979 |
module GG_27 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.006144 |
module GP_19 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.497553 |
module GG_26 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.692108 |
module GP_18 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.520154 |
module GG_25 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.910352 |
module GP_17 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.311245 |
module GG_24 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.963818 |
module GP_16 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.302935 |
module GG_23 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.887183 |
module GP_15 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.320759 |
module GG_22 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.943249 |
module GP_14 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.934907 |
module GG_21 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.819763 |
module GP_13 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.942651 |
module GG_20 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.122359 |
module GG_19 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.056894 |
module GP_12 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.172978 |
module GG_18 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.119173 |
module GP_11 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.769966 |
module GG_17 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.149894 |
module GP_10 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.122156 |
module GG_16 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.130425 |
module GP_9 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.424217 |
module GG_15 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.964591 |
module GP_8 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.437781 |
module GG_14 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.942219 |
module GP_7 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.92423 |
module GG_13 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.965553 |
module GP_6 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.027971 |
module GG_12 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(G_PREV),
.B2(P_CURRENT),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.114971 |
module GG_11 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.590728 |
module GP_5 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 6.967327 |
module GG_10 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.783617 |
module GP_4 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.090485 |
module GG_9 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.979936 |
module GP_3 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.136824 |
module GG_8 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.150432 |
module GG_7 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.126887 |
module GG_6 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.000066 |
module GP_2 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.383575 |
module GG_5 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.655138 |
module GP_1 (
P_CURRENT,
P_PREV,
P
);
input P_CURRENT, P_PREV;
output P;
AND2_X1 U1 (
.A1(P_PREV),
.A2(P_CURRENT),
.ZN(P)
);
endmodule
| 7.197257 |
module GG_4 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.780106 |
module GG_3 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.142291 |
module GG_2 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 7.185372 |
module GG_1 (
G_CURRENT,
P_CURRENT,
G_PREV,
G
);
input G_CURRENT, P_CURRENT, G_PREV;
output G;
wire n3;
INV_X1 U1 (
.A (n3),
.ZN(G)
);
AOI21_X1 U2 (
.B1(P_CURRENT),
.B2(G_PREV),
.A (G_CURRENT),
.ZN(n3)
);
endmodule
| 6.69631 |
module RCA_NBIT4_0 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.740963 |
module RCA_NBIT4_14 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0]... | 7.934078 |
module RCA_NBIT4_13 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0]... | 7.780681 |
module CSB_NBIT4_0 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n7, n8, n9, n10, n11, n6;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_14 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co(Co0)
);... | 6.659237 |
module RCA_NBIT4_12 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0]... | 7.992663 |
module RCA_NBIT4_11 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0]... | 7.846434 |
module CSB_NBIT4_6 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n6, n12, n13, n14, n15, n16;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_12 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co(Co0)
... | 6.820512 |
module RCA_NBIT4_10 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0]... | 7.738482 |
module RCA_NBIT4_9 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.787699 |
module CSB_NBIT4_5 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n6, n12, n13, n14, n15, n16;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_10 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co(Co0)
... | 6.939997 |
module RCA_NBIT4_8 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.986719 |
module RCA_NBIT4_7 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.936123 |
module CSB_NBIT4_4 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n6, n12, n13, n14, n15, n16;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_8 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co(Co0)
... | 6.949805 |
module RCA_NBIT4_6 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.931223 |
module RCA_NBIT4_5 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 8.124965 |
module CSB_NBIT4_3 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n1, n3, n4, n13, n14, n15, n16, n17;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_6 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co... | 6.679258 |
module RCA_NBIT4_4 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.974063 |
module RCA_NBIT4_3 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.787572 |
module CSB_NBIT4_2 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n1, n3, n4, n13, n14, n15, n16, n17;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_4 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co... | 6.843705 |
module RCA_NBIT4_2 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.968296 |
module RCA_NBIT4_1 (
A,
B,
Ci,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Ci;
output Co;
wire \add_1_root_add_74_2/carry[3] , \add_1_root_add_74_2/carry[2] ,
\add_1_root_add_74_2/carry[1] ;
FA_X1 \add_1_root_add_74_2/U1_0 (
.A (A[0]),
.B (B[0])... | 7.874833 |
module CSB_NBIT4_1 (
A,
B,
Cin,
S,
Co
);
input [3:0] A;
input [3:0] B;
output [3:0] S;
input Cin;
output Co;
wire Co0, Co1, n1, n12, n13, n14, n15, n16;
wire [3:0] S0;
wire [3:0] S1;
RCA_NBIT4_2 U_RCA0 (
.A (A),
.B (B),
.Ci(1'b0),
.S (S0),
.Co(Co0)
... | 6.730586 |
module P4_ADDER_NBIT32 (
A,
B,
Cin,
S,
Cout
);
input [31:0] A;
input [31:0] B;
output [31:0] S;
input Cin;
output Cout;
wire [6:0] carry_gen_Co;
CARRY_GENERATOR_NBIT32_NBIT_PER_BLOCK4 U_CARRY_GENERATOR (
.A (A),
.B (B),
.CIN(Cin),
.CO ({Cout, carry_gen_Co})
... | 7.456858 |
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