code stringlengths 35 6.69k | score float64 6.5 11.5 |
|---|---|
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2176 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2175 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2174 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2173 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2172 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2171 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2170 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2169 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2168 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2167 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2166 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2165 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2164 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2163 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2162 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2161 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2160 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2159 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2158 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2157 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2156 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2155 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2154 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2153 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2152 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2151 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2150 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2149 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2148 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2147 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2146 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2145 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2144 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2143 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2142 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2141 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2140 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2139 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2138 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2137 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2136 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2135 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2134 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2133 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2132 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2131 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2130 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2129 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2128 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2127 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2126 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2125 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2124 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2123 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2122 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2121 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2120 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2119 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2118 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2117 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2116 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2115 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2114 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2113 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2112 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2111 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2110 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2109 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2108 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2107 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2106 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2105 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2104 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2103 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2102 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2101 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2100 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2099 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2098 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2097 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2096 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2095 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2094 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2093 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2092 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2091 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2090 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2089 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2088 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2087 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2086 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2085 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2084 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2083 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2082 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2081 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2080 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2079 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2078 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2077 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.