code stringlengths 35 6.69k | score float64 6.5 11.5 |
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module SNPS_CLOCK_GATE_HIGH_WeightsBank_2476 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2475 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2474 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2473 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2472 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2471 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2470 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2469 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2468 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2467 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2466 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2465 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2464 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2463 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2462 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2461 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2460 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2459 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2458 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2457 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2456 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2455 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2454 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2453 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2452 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2451 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2450 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2449 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2448 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2447 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2446 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2445 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2444 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2443 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2442 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2441 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2440 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2439 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2438 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2437 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2436 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2435 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2434 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2433 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2432 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2431 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2430 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2429 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2428 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2427 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2426 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2425 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2424 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2423 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2422 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2421 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2420 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2419 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2418 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2417 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2416 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2415 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2414 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2413 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2412 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2411 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2410 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2409 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2408 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2407 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2406 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2405 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2404 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2403 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2402 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2401 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2400 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2399 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2398 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2397 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2396 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2395 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2394 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2393 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2392 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2391 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2390 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2389 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2388 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2387 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2386 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2385 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2384 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2383 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2382 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2381 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2380 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2379 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2378 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
module SNPS_CLOCK_GATE_HIGH_WeightsBank_2377 (
CLK,
EN,
ENCLK
);
input CLK, EN;
output ENCLK;
wire net1174, net1175, net1178;
tri net1172;
assign net1172 = CLK;
assign ENCLK = net1174;
assign net1175 = EN;
AND2X4 main_gate (
.A(net1178),
.B(net1172),
.Y(net1174)
);
T... | 6.575704 |
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