Datasets:

SAIFIINDUSTRIES
/

verilog_data-1

Dataset card Files Files and versions

verilog_data-1 / The-OpenROAD-Project_OpenROAD-flow-scripts /flow /designs /src /uart /README.md

SAIFIINDUSTRIES's picture

SAIFIINDUSTRIES

Add batch 5 (Luthiraa_TALOS-V2, dawsonjon_fpu, The-OpenROAD-Project_OpenROAD-flow-scripts, antonblanchard_microwatt, alexforencich_verilog-i2c)

784ee2c verified 29 days ago

|

Raw History Blame Contribute Delete

171 Bytes

Summary

Basic Universal Asynchronous Receiver Transmitter, communications application

Source

Modifications

Added sdc timing constraints.
Added LICENSE file.