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{
return 0; // return 0 for all reads in the GPIO region
}
// WRITE
static void gpio_mmio_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
// The addr argument is an offset within the MMIO region
// 0x44 == 0x18040044
if (addr == 0x44){ // Skip this register since this breaks MITM MMIO
return;
}
return;
}
// Struct for Callbacks + Endianness
static const MemoryRegionOps gpio_mmio_ops = {
.read = gpio_mmio_read,
.write = gpio_mmio_write,
.endianness = DEVICE_BIG_ENDIAN
};
// Get physical memory
MemoryRegion *address_space_mem = get_system_memory();
// Init GPIO region
memory_region_init_io(gpio_mmio, NULL, &gpio_mmio_ops, NULL, "GPIO_MMIO",
0x70);
// Add subregion to physical memory
memory_region_add_subregion(address_space_mem, 0x18040000LL, gpio_mmio);
// Reads and writes to GPIO will trigger the callbacks during runtime.
[...]
```
With the regions mapped with callbacks, the next step is to connect Qemu to
the MITM script. This can be accomplished when the virtual board is being
initialized by creating a socket, saving the socket fd, connecting to the
python listener, and return. Then, within the callbacks, the socket fd is
used to request reads and writes to physical memory from the python
listener.
This is how it's all connected:
+----------+ +----------+ +----------+
| Qemu |<-TCP->| Python |<-UART->| Router |
| | | | | U-Boot |
+----------+ +----------+ +----------+
Note: If a datasheet could not be found for this SoC in this paper then I
would register one large MMIO callback region starting at an address that
crashes when an running from a found entry point. (e.g. Address: 0x18000000
Size: 0x18000000 [0x18000000-0x30000000])
--[ 5 - Discoveries
The initial discovery that was already mentioned is that the datasheet and
source code don't line up 100%, it's more like 90%. Besides that, it was
found that the DDR region (0x18000000) is reported as 0x128 bytes in size,
but there's an additional register (DDR3_CONFIG) that lives at `0x1800015C`,
so there's either undocumented registers between `0x128-0x15c` or that
particular memory space is unused.
Another discovery was the region that wasn't fully documented within the
datasheet, but I've labeled it as `GMAC1` which lives at `0x1A000000` with
size `0x2E8` since the values written are very close to the values written
to the `GMAC0` region (0x19000000).
The virtual device actually gets pretty far within the boot process, but
fails during the initialization of the WiFi driver. Since we're just
capturing MMIO transactions, the thing that's missing are the interrupts
that need to be used when certain conditions happen for each subcomponent.
(e.g. Raise an interrupt for when a certain register for a clock reaches
zero during calibration.)
The GPIO address `0x18040044` is labeled `UART0_SIN Multiplexing` and the
usage is to set which GPIO pins are used for UART0. During the boot process
this register is written to and breaks the UART connection that used to
interact with Das U-Boot. Adding a statement to skip offset `0x44` for this
region is needed to continue booting from Das U-Boot and into Linux
(virtually).
This approach allows us to utilize a component of the SoC in real life while
being able to emulate all of the other subcomponents that we're not
interested in. (e.g. utilize the device's Ethernet Ports + Controller, but
emulate the rest of the other subcomponents)
--[ 6 - Failed ideas
My first idea was to use `/dev/mem` to read and write to physical memory,
but attempting to write to physical memory would result in a segfault.
Reading from these regions was fine, but writing as a no-go. Plus, the OS
is fully loaded with running drivers, so these regions are constantly
being used. Attempting to read and write could cause unpredictable system
instability, so leveraging the bootloader seemed like a better idea. No
drivers, No OS, just GPIO pins :)
I then attempted to bit bang GPIO pins for E-JTAG with an Arduino nano, but
this resulted in nothing being found :(